github.com/mattn/go@v0.0.0-20171011075504-07f7db3ea99f/src/cmd/internal/obj/arm64/a.out.go (about) 1 // cmd/7c/7.out.h from Vita Nuova. 2 // https://code.google.com/p/ken-cc/source/browse/src/cmd/7c/7.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm64 32 33 import "cmd/internal/obj" 34 35 const ( 36 NSNAME = 8 37 NSYM = 50 38 NREG = 32 /* number of general registers */ 39 NFREG = 32 /* number of floating point registers */ 40 ) 41 42 // General purpose registers, kept in the low bits of Prog.Reg. 43 const ( 44 // integer 45 REG_R0 = obj.RBaseARM64 + iota 46 REG_R1 47 REG_R2 48 REG_R3 49 REG_R4 50 REG_R5 51 REG_R6 52 REG_R7 53 REG_R8 54 REG_R9 55 REG_R10 56 REG_R11 57 REG_R12 58 REG_R13 59 REG_R14 60 REG_R15 61 REG_R16 62 REG_R17 63 REG_R18 64 REG_R19 65 REG_R20 66 REG_R21 67 REG_R22 68 REG_R23 69 REG_R24 70 REG_R25 71 REG_R26 72 REG_R27 73 REG_R28 74 REG_R29 75 REG_R30 76 REG_R31 77 78 // scalar floating point 79 REG_F0 80 REG_F1 81 REG_F2 82 REG_F3 83 REG_F4 84 REG_F5 85 REG_F6 86 REG_F7 87 REG_F8 88 REG_F9 89 REG_F10 90 REG_F11 91 REG_F12 92 REG_F13 93 REG_F14 94 REG_F15 95 REG_F16 96 REG_F17 97 REG_F18 98 REG_F19 99 REG_F20 100 REG_F21 101 REG_F22 102 REG_F23 103 REG_F24 104 REG_F25 105 REG_F26 106 REG_F27 107 REG_F28 108 REG_F29 109 REG_F30 110 REG_F31 111 112 // SIMD 113 REG_V0 114 REG_V1 115 REG_V2 116 REG_V3 117 REG_V4 118 REG_V5 119 REG_V6 120 REG_V7 121 REG_V8 122 REG_V9 123 REG_V10 124 REG_V11 125 REG_V12 126 REG_V13 127 REG_V14 128 REG_V15 129 REG_V16 130 REG_V17 131 REG_V18 132 REG_V19 133 REG_V20 134 REG_V21 135 REG_V22 136 REG_V23 137 REG_V24 138 REG_V25 139 REG_V26 140 REG_V27 141 REG_V28 142 REG_V29 143 REG_V30 144 REG_V31 145 146 // The EQ in 147 // CSET EQ, R0 148 // is encoded as TYPE_REG, even though it's not really a register. 149 COND_EQ 150 COND_NE 151 COND_HS 152 COND_LO 153 COND_MI 154 COND_PL 155 COND_VS 156 COND_VC 157 COND_HI 158 COND_LS 159 COND_GE 160 COND_LT 161 COND_GT 162 COND_LE 163 COND_AL 164 COND_NV 165 166 REG_RSP = REG_V31 + 32 // to differentiate ZR/SP, REG_RSP&0x1f = 31 167 ) 168 169 // Not registers, but flags that can be combined with regular register 170 // constants to indicate extended register conversion. When checking, 171 // you should subtract obj.RBaseARM64 first. From this difference, bit 11 172 // indicates extended register, bits 8-10 select the conversion mode. 173 const REG_EXT = obj.RBaseARM64 + 1<<11 174 175 const ( 176 REG_UXTB = REG_EXT + iota<<8 177 REG_UXTH 178 REG_UXTW 179 REG_UXTX 180 REG_SXTB 181 REG_SXTH 182 REG_SXTW 183 REG_SXTX 184 ) 185 186 // Special registers, after subtracting obj.RBaseARM64, bit 12 indicates 187 // a special register and the low bits select the register. 188 const ( 189 REG_SPECIAL = obj.RBaseARM64 + 1<<12 + iota 190 REG_DAIF 191 REG_NZCV 192 REG_FPSR 193 REG_FPCR 194 REG_SPSR_EL1 195 REG_ELR_EL1 196 REG_SPSR_EL2 197 REG_ELR_EL2 198 REG_CurrentEL 199 REG_SP_EL0 200 REG_SPSel 201 REG_DAIFSet 202 REG_DAIFClr 203 ) 204 205 // Register assignments: 206 // 207 // compiler allocates R0 up as temps 208 // compiler allocates register variables R7-R25 209 // compiler allocates external registers R26 down 210 // 211 // compiler allocates register variables F7-F26 212 // compiler allocates external registers F26 down 213 const ( 214 REGMIN = REG_R7 // register variables allocated from here to REGMAX 215 REGRT1 = REG_R16 // ARM64 IP0, for external linker, runtime, duffzero and duffcopy 216 REGRT2 = REG_R17 // ARM64 IP1, for external linker, runtime, duffcopy 217 REGPR = REG_R18 // ARM64 platform register, unused in the Go toolchain 218 REGMAX = REG_R25 219 220 REGCTXT = REG_R26 // environment for closures 221 REGTMP = REG_R27 // reserved for liblink 222 REGG = REG_R28 // G 223 REGFP = REG_R29 // frame pointer, unused in the Go toolchain 224 REGLINK = REG_R30 225 226 // ARM64 uses R31 as both stack pointer and zero register, 227 // depending on the instruction. To differentiate RSP from ZR, 228 // we use a different numeric value for REGZERO and REGSP. 229 REGZERO = REG_R31 230 REGSP = REG_RSP 231 232 FREGRET = REG_F0 233 FREGMIN = REG_F7 // first register variable 234 FREGMAX = REG_F26 // last register variable for 7g only 235 FREGEXT = REG_F26 // first external register 236 ) 237 238 const ( 239 BIG = 2048 - 8 240 ) 241 242 const ( 243 /* mark flags */ 244 LABEL = 1 << iota 245 LEAF 246 FLOAT 247 BRANCH 248 LOAD 249 FCMP 250 SYNC 251 LIST 252 FOLL 253 NOSCHED 254 ) 255 256 const ( 257 // optab is sorted based on the order of these constants 258 // and the first match is chosen. 259 // The more specific class needs to come earlier. 260 C_NONE = iota 261 C_REG // R0..R30 262 C_RSP // R0..R30, RSP 263 C_FREG // F0..F31 264 C_VREG // V0..V31 265 C_PAIR // (Rn, Rm) 266 C_SHIFT // Rn<<2 267 C_EXTREG // Rn.UXTB<<3 268 C_SPR // REG_NZCV 269 C_COND // EQ, NE, etc 270 271 C_ZCON // $0 or ZR 272 C_ABCON0 // could be C_ADDCON0 or C_BITCON 273 C_ADDCON0 // 12-bit unsigned, unshifted 274 C_ABCON // could be C_ADDCON or C_BITCON 275 C_ADDCON // 12-bit unsigned, shifted left by 0 or 12 276 C_MBCON // could be C_MOVCON or C_BITCON 277 C_MOVCON // generated by a 16-bit constant, optionally inverted and/or shifted by multiple of 16 278 C_BITCON // bitfield and logical immediate masks 279 C_LCON // 32-bit constant 280 C_VCON // 64-bit constant 281 C_FCON // floating-point constant 282 C_VCONADDR // 64-bit memory address 283 284 C_AACON // ADDCON offset in auto constant $a(FP) 285 C_LACON // 32-bit offset in auto constant $a(FP) 286 C_AECON // ADDCON offset in extern constant $e(SB) 287 288 // TODO(aram): only one branch class should be enough 289 C_SBRA // for TYPE_BRANCH 290 C_LBRA 291 292 C_NPAUTO // -512 <= x < 0, 0 mod 8 293 C_NSAUTO // -256 <= x < 0 294 C_PSAUTO_8 // 0 to 255, 0 mod 8 295 C_PSAUTO // 0 to 255 296 C_PPAUTO // 0 to 504, 0 mod 8 297 C_UAUTO4K_8 // 0 to 4095, 0 mod 8 298 C_UAUTO4K_4 // 0 to 4095, 0 mod 4 299 C_UAUTO4K_2 // 0 to 4095, 0 mod 2 300 C_UAUTO4K // 0 to 4095 301 C_UAUTO8K_8 // 0 to 8190, 0 mod 8 302 C_UAUTO8K_4 // 0 to 8190, 0 mod 4 303 C_UAUTO8K // 0 to 8190, 0 mod 2 304 C_UAUTO16K_8 // 0 to 16380, 0 mod 8 305 C_UAUTO16K // 0 to 16380, 0 mod 4 306 C_UAUTO32K // 0 to 32760, 0 mod 8 307 C_LAUTO // any other 32-bit constant 308 309 C_SEXT1 // 0 to 4095, direct 310 C_SEXT2 // 0 to 8190 311 C_SEXT4 // 0 to 16380 312 C_SEXT8 // 0 to 32760 313 C_SEXT16 // 0 to 65520 314 C_LEXT 315 316 C_ZOREG // 0(R) 317 C_NPOREG // must mirror NPAUTO, etc 318 C_NSOREG 319 C_PSOREG_8 320 C_PSOREG 321 C_PPOREG 322 C_UOREG4K_8 323 C_UOREG4K_4 324 C_UOREG4K_2 325 C_UOREG4K 326 C_UOREG8K_8 327 C_UOREG8K_4 328 C_UOREG8K 329 C_UOREG16K_8 330 C_UOREG16K 331 C_UOREG32K 332 C_LOREG 333 334 C_ADDR // TODO(aram): explain difference from C_VCONADDR 335 336 // The GOT slot for a symbol in -dynlink mode. 337 C_GOTADDR 338 339 // TLS "var" in local exec mode: will become a constant offset from 340 // thread local base that is ultimately chosen by the program linker. 341 C_TLS_LE 342 343 // TLS "var" in initial exec mode: will become a memory address (chosen 344 // by the program linker) that the dynamic linker will fill with the 345 // offset from the thread local base. 346 C_TLS_IE 347 348 C_ROFF // register offset (including register extended) 349 350 C_GOK 351 C_TEXTSIZE 352 C_NCLASS // must be last 353 ) 354 355 const ( 356 C_XPRE = 1 << 6 // match arm.C_WBIT, so Prog.String know how to print it 357 C_XPOST = 1 << 5 // match arm.C_PBIT, so Prog.String know how to print it 358 ) 359 360 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm64 361 362 const ( 363 AADC = obj.ABaseARM64 + obj.A_ARCHSPECIFIC + iota 364 AADCS 365 AADCSW 366 AADCW 367 AADD 368 AADDS 369 AADDSW 370 AADDW 371 AADR 372 AADRP 373 AAND 374 AANDS 375 AANDSW 376 AANDW 377 AASR 378 AASRW 379 AAT 380 ABFI 381 ABFIW 382 ABFM 383 ABFMW 384 ABFXIL 385 ABFXILW 386 ABIC 387 ABICS 388 ABICSW 389 ABICW 390 ABRK 391 ACBNZ 392 ACBNZW 393 ACBZ 394 ACBZW 395 ACCMN 396 ACCMNW 397 ACCMP 398 ACCMPW 399 ACINC 400 ACINCW 401 ACINV 402 ACINVW 403 ACLREX 404 ACLS 405 ACLSW 406 ACLZ 407 ACLZW 408 ACMN 409 ACMNW 410 ACMP 411 ACMPW 412 ACNEG 413 ACNEGW 414 ACRC32B 415 ACRC32CB 416 ACRC32CH 417 ACRC32CW 418 ACRC32CX 419 ACRC32H 420 ACRC32W 421 ACRC32X 422 ACSEL 423 ACSELW 424 ACSET 425 ACSETM 426 ACSETMW 427 ACSETW 428 ACSINC 429 ACSINCW 430 ACSINV 431 ACSINVW 432 ACSNEG 433 ACSNEGW 434 ADC 435 ADCPS1 436 ADCPS2 437 ADCPS3 438 ADMB 439 ADRPS 440 ADSB 441 AEON 442 AEONW 443 AEOR 444 AEORW 445 AERET 446 AEXTR 447 AEXTRW 448 AHINT 449 AHLT 450 AHVC 451 AIC 452 AISB 453 ALDAR 454 ALDARB 455 ALDARH 456 ALDARW 457 ALDAXP 458 ALDAXPW 459 ALDAXR 460 ALDAXRB 461 ALDAXRH 462 ALDAXRW 463 ALDP 464 ALDXR 465 ALDXRB 466 ALDXRH 467 ALDXRW 468 ALDXP 469 ALDXPW 470 ALSL 471 ALSLW 472 ALSR 473 ALSRW 474 AMADD 475 AMADDW 476 AMNEG 477 AMNEGW 478 AMOVK 479 AMOVKW 480 AMOVN 481 AMOVNW 482 AMOVZ 483 AMOVZW 484 AMRS 485 AMSR 486 AMSUB 487 AMSUBW 488 AMUL 489 AMULW 490 AMVN 491 AMVNW 492 ANEG 493 ANEGS 494 ANEGSW 495 ANEGW 496 ANGC 497 ANGCS 498 ANGCSW 499 ANGCW 500 AORN 501 AORNW 502 AORR 503 AORRW 504 APRFM 505 APRFUM 506 ARBIT 507 ARBITW 508 AREM 509 AREMW 510 AREV 511 AREV16 512 AREV16W 513 AREV32 514 AREVW 515 AROR 516 ARORW 517 ASBC 518 ASBCS 519 ASBCSW 520 ASBCW 521 ASBFIZ 522 ASBFIZW 523 ASBFM 524 ASBFMW 525 ASBFX 526 ASBFXW 527 ASDIV 528 ASDIVW 529 ASEV 530 ASEVL 531 ASMADDL 532 ASMC 533 ASMNEGL 534 ASMSUBL 535 ASMULH 536 ASMULL 537 ASTXR 538 ASTXRB 539 ASTXRH 540 ASTXP 541 ASTXPW 542 ASTXRW 543 ASTLP 544 ASTLPW 545 ASTLR 546 ASTLRB 547 ASTLRH 548 ASTLRW 549 ASTLXP 550 ASTLXPW 551 ASTLXR 552 ASTLXRB 553 ASTLXRH 554 ASTLXRW 555 ASTP 556 ASUB 557 ASUBS 558 ASUBSW 559 ASUBW 560 ASVC 561 ASXTB 562 ASXTBW 563 ASXTH 564 ASXTHW 565 ASXTW 566 ASYS 567 ASYSL 568 ATBNZ 569 ATBZ 570 ATLBI 571 ATST 572 ATSTW 573 AUBFIZ 574 AUBFIZW 575 AUBFM 576 AUBFMW 577 AUBFX 578 AUBFXW 579 AUDIV 580 AUDIVW 581 AUMADDL 582 AUMNEGL 583 AUMSUBL 584 AUMULH 585 AUMULL 586 AUREM 587 AUREMW 588 AUXTB 589 AUXTH 590 AUXTW 591 AUXTBW 592 AUXTHW 593 AWFE 594 AWFI 595 AYIELD 596 AMOVB 597 AMOVBU 598 AMOVH 599 AMOVHU 600 AMOVW 601 AMOVWU 602 AMOVD 603 AMOVNP 604 AMOVNPW 605 AMOVP 606 AMOVPD 607 AMOVPQ 608 AMOVPS 609 AMOVPSW 610 AMOVPW 611 ABEQ 612 ABNE 613 ABCS 614 ABHS 615 ABCC 616 ABLO 617 ABMI 618 ABPL 619 ABVS 620 ABVC 621 ABHI 622 ABLS 623 ABGE 624 ABLT 625 ABGT 626 ABLE 627 AFABSD 628 AFABSS 629 AFADDD 630 AFADDS 631 AFCCMPD 632 AFCCMPED 633 AFCCMPS 634 AFCCMPES 635 AFCMPD 636 AFCMPED 637 AFCMPES 638 AFCMPS 639 AFCVTSD 640 AFCVTDS 641 AFCVTZSD 642 AFCVTZSDW 643 AFCVTZSS 644 AFCVTZSSW 645 AFCVTZUD 646 AFCVTZUDW 647 AFCVTZUS 648 AFCVTZUSW 649 AFDIVD 650 AFDIVS 651 AFMOVD 652 AFMOVS 653 AFMULD 654 AFMULS 655 AFNEGD 656 AFNEGS 657 AFSQRTD 658 AFSQRTS 659 AFSUBD 660 AFSUBS 661 ASCVTFD 662 ASCVTFS 663 ASCVTFWD 664 ASCVTFWS 665 AUCVTFD 666 AUCVTFS 667 AUCVTFWD 668 AUCVTFWS 669 AWORD 670 ADWORD 671 AFCSELS 672 AFCSELD 673 AFMAXS 674 AFMINS 675 AFMAXD 676 AFMIND 677 AFMAXNMS 678 AFMAXNMD 679 AFNMULS 680 AFNMULD 681 AFRINTNS 682 AFRINTND 683 AFRINTPS 684 AFRINTPD 685 AFRINTMS 686 AFRINTMD 687 AFRINTZS 688 AFRINTZD 689 AFRINTAS 690 AFRINTAD 691 AFRINTXS 692 AFRINTXD 693 AFRINTIS 694 AFRINTID 695 AFMADDS 696 AFMADDD 697 AFMSUBS 698 AFMSUBD 699 AFNMADDS 700 AFNMADDD 701 AFNMSUBS 702 AFNMSUBD 703 AFMINNMS 704 AFMINNMD 705 AFCVTDH 706 AFCVTHS 707 AFCVTHD 708 AFCVTSH 709 AAESD 710 AAESE 711 AAESIMC 712 AAESMC 713 ASHA1C 714 ASHA1H 715 ASHA1M 716 ASHA1P 717 ASHA1SU0 718 ASHA1SU1 719 ASHA256H 720 ASHA256H2 721 ASHA256SU0 722 ASHA256SU1 723 ALAST 724 AB = obj.AJMP 725 ABL = obj.ACALL 726 ) 727 728 const ( 729 // shift types 730 SHIFT_LL = 0 << 22 731 SHIFT_LR = 1 << 22 732 SHIFT_AR = 2 << 22 733 )