github.com/rohankumardubey/syslog-redirector-golang@v0.0.0-20140320174030-4859f03d829a/src/libmach/6.c (about) 1 // Inferno libmach/6.c 2 // http://code.google.com/p/inferno-os/source/browse/utils/libmach/6.c 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. 5 // Power PC support Copyright © 1995-2004 C H Forsyth (forsyth@terzarima.net). 6 // Portions Copyright © 1997-1999 Vita Nuova Limited. 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). 8 // Revisions Copyright © 2000-2004 Lucent Technologies Inc. and others. 9 // Portions Copyright © 2009 The Go Authors. All rights reserved. 10 // 11 // Permission is hereby granted, free of charge, to any person obtaining a copy 12 // of this software and associated documentation files (the "Software"), to deal 13 // in the Software without restriction, including without limitation the rights 14 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 15 // copies of the Software, and to permit persons to whom the Software is 16 // furnished to do so, subject to the following conditions: 17 // 18 // The above copyright notice and this permission notice shall be included in 19 // all copies or substantial portions of the Software. 20 // 21 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 24 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 26 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 27 // THE SOFTWARE. 28 29 /* 30 * amd64 definition 31 */ 32 #include <u.h> 33 #include <libc.h> 34 #include <bio.h> 35 #include "ureg_amd64.h" 36 #include <mach.h> 37 38 #define REGOFF(x) offsetof(struct Ureg, x) 39 40 #define REGSIZE sizeof(struct Ureg) 41 #define FP_CTLS(x) (REGSIZE+2*(x)) 42 #define FP_CTL(x) (REGSIZE+4*(x)) 43 #define FP_REG(x) (FP_CTL(8)+16*(x)) 44 #define XM_REG(x) (FP_CTL(8)+8*16+16*(x)) 45 46 #define FPREGSIZE 512 /* TO DO? currently only 0x1A0 used */ 47 48 Reglist amd64reglist[] = { 49 {"AX", REGOFF(ax), RINT, 'Y'}, 50 {"BX", REGOFF(bx), RINT, 'Y'}, 51 {"CX", REGOFF(cx), RINT, 'Y'}, 52 {"DX", REGOFF(dx), RINT, 'Y'}, 53 {"SI", REGOFF(si), RINT, 'Y'}, 54 {"DI", REGOFF(di), RINT, 'Y'}, 55 {"BP", REGOFF(bp), RINT, 'Y'}, 56 {"R8", REGOFF(r8), RINT, 'Y'}, 57 {"R9", REGOFF(r9), RINT, 'Y'}, 58 {"R10", REGOFF(r10), RINT, 'Y'}, 59 {"R11", REGOFF(r11), RINT, 'Y'}, 60 {"R12", REGOFF(r12), RINT, 'Y'}, 61 {"R13", REGOFF(r13), RINT, 'Y'}, 62 {"R14", REGOFF(r14), RINT, 'Y'}, 63 {"R15", REGOFF(r15), RINT, 'Y'}, 64 {"DS", REGOFF(ds), RINT, 'x'}, 65 {"ES", REGOFF(es), RINT, 'x'}, 66 {"FS", REGOFF(fs), RINT, 'x'}, 67 {"GS", REGOFF(gs), RINT, 'x'}, 68 {"TYPE", REGOFF(type), RINT, 'Y'}, 69 {"TRAP", REGOFF(type), RINT, 'Y'}, /* alias for acid */ 70 {"ERROR", REGOFF(error), RINT, 'Y'}, 71 {"IP", REGOFF(ip), RINT, 'Y'}, 72 {"PC", REGOFF(ip), RINT, 'Y'}, /* alias for acid */ 73 {"CS", REGOFF(cs), RINT, 'Y'}, 74 {"FLAGS", REGOFF(flags), RINT, 'Y'}, 75 {"SP", REGOFF(sp), RINT, 'Y'}, 76 {"SS", REGOFF(ss), RINT, 'Y'}, 77 78 {"FCW", FP_CTLS(0), RFLT, 'x'}, 79 {"FSW", FP_CTLS(1), RFLT, 'x'}, 80 {"FTW", FP_CTLS(2), RFLT, 'b'}, 81 {"FOP", FP_CTLS(3), RFLT, 'x'}, 82 {"RIP", FP_CTL(2), RFLT, 'Y'}, 83 {"RDP", FP_CTL(4), RFLT, 'Y'}, 84 {"MXCSR", FP_CTL(6), RFLT, 'X'}, 85 {"MXCSRMASK", FP_CTL(7), RFLT, 'X'}, 86 {"M0", FP_REG(0), RFLT, 'F'}, /* assumes double */ 87 {"M1", FP_REG(1), RFLT, 'F'}, 88 {"M2", FP_REG(2), RFLT, 'F'}, 89 {"M3", FP_REG(3), RFLT, 'F'}, 90 {"M4", FP_REG(4), RFLT, 'F'}, 91 {"M5", FP_REG(5), RFLT, 'F'}, 92 {"M6", FP_REG(6), RFLT, 'F'}, 93 {"M7", FP_REG(7), RFLT, 'F'}, 94 {"X0", XM_REG(0), RFLT, 'F'}, /* assumes double */ 95 {"X1", XM_REG(1), RFLT, 'F'}, 96 {"X2", XM_REG(2), RFLT, 'F'}, 97 {"X3", XM_REG(3), RFLT, 'F'}, 98 {"X4", XM_REG(4), RFLT, 'F'}, 99 {"X5", XM_REG(5), RFLT, 'F'}, 100 {"X6", XM_REG(6), RFLT, 'F'}, 101 {"X7", XM_REG(7), RFLT, 'F'}, 102 {"X8", XM_REG(8), RFLT, 'F'}, 103 {"X9", XM_REG(9), RFLT, 'F'}, 104 {"X10", XM_REG(10), RFLT, 'F'}, 105 {"X11", XM_REG(11), RFLT, 'F'}, 106 {"X12", XM_REG(12), RFLT, 'F'}, 107 {"X13", XM_REG(13), RFLT, 'F'}, 108 {"X14", XM_REG(14), RFLT, 'F'}, 109 {"X15", XM_REG(15), RFLT, 'F'}, 110 {"X16", XM_REG(16), RFLT, 'F'}, 111 /* 112 {"F0", FP_REG(7), RFLT, '3'}, 113 {"F1", FP_REG(6), RFLT, '3'}, 114 {"F2", FP_REG(5), RFLT, '3'}, 115 {"F3", FP_REG(4), RFLT, '3'}, 116 {"F4", FP_REG(3), RFLT, '3'}, 117 {"F5", FP_REG(2), RFLT, '3'}, 118 {"F6", FP_REG(1), RFLT, '3'}, 119 {"F7", FP_REG(0), RFLT, '3'}, 120 */ 121 { 0 } 122 }; 123 124 Mach mamd64= 125 { 126 "amd64", 127 MAMD64, /* machine type */ 128 amd64reglist, /* register list */ 129 REGSIZE, /* size of registers in bytes */ 130 FPREGSIZE, /* size of fp registers in bytes */ 131 "PC", /* name of PC */ 132 "SP", /* name of SP */ 133 0, /* link register */ 134 "setSB", /* static base register name (bogus anyways) */ 135 0, /* static base register value */ 136 0x1000, /* page size */ 137 0xFFFFFFFF80110000ULL, /* kernel base */ 138 0xFFFF800000000000ULL, /* kernel text mask */ 139 0x00007FFFFFFFF000ULL, /* user stack top */ 140 1, /* quantization of pc */ 141 8, /* szaddr */ 142 4, /* szreg */ 143 4, /* szfloat */ 144 8, /* szdouble */ 145 };