git.sr.ht/~pingoo/stdx@v0.0.0-20240218134121-094174641f6e/cpuinfo/cmd/cpuid/main.go (about) 1 // Copyright (c) 2021 Klaus Post, released under MIT License. See LICENSE file. 2 3 // package cpuinfo provides information about the CPU running the current program. 4 // 5 // CPU features are detected on startup, and kept for fast access through the life of the application. 6 // Currently x86 / x64 (AMD64) as well as arm64 is supported. 7 // 8 // You can access the CPU information by accessing the shared CPU variable of the cpuid library. 9 // 10 // Package home: https://github.com/klauspost/cpuid 11 package main 12 13 import ( 14 "encoding/json" 15 "flag" 16 "fmt" 17 "log" 18 "os" 19 "strings" 20 21 "github.com/klauspost/cpuid/v2" 22 ) 23 24 var js = flag.Bool("json", false, "Output as JSON") 25 var level = flag.Int("check-level", 0, "Check microarchitecture level. Exit code will be 0 if supported") 26 27 func main() { 28 flag.Parse() 29 if level != nil && *level > 0 { 30 if *level < 1 || *level > 4 { 31 log.Fatalln("Supply CPU level 1-4 to test as argument") 32 } 33 log.Println(cpuid.CPU.BrandName) 34 if cpuid.CPU.X64Level() < *level { 35 // Does os.Exit(1) 36 log.Fatalf("Microarchitecture level %d not supported. Max level is %d.", *level, cpuid.CPU.X64Level()) 37 } 38 log.Printf("Microarchitecture level %d is supported. Max level is %d.", *level, cpuid.CPU.X64Level()) 39 os.Exit(0) 40 } 41 if *js { 42 info := struct { 43 cpuid.CPUInfo 44 Features []string 45 X64Level int 46 }{ 47 CPUInfo: cpuid.CPU, 48 Features: cpuid.CPU.FeatureSet(), 49 X64Level: cpuid.CPU.X64Level(), 50 } 51 b, err := json.MarshalIndent(info, "", " ") 52 if err != nil { 53 panic(err) 54 } 55 fmt.Println(string(b)) 56 os.Exit(0) 57 } 58 59 fmt.Println("Name:", cpuid.CPU.BrandName) 60 fmt.Println("Vendor String:", cpuid.CPU.VendorString) 61 fmt.Println("Vendor ID:", cpuid.CPU.VendorID) 62 fmt.Println("PhysicalCores:", cpuid.CPU.PhysicalCores) 63 fmt.Println("Threads Per Core:", cpuid.CPU.ThreadsPerCore) 64 fmt.Println("Logical Cores:", cpuid.CPU.LogicalCores) 65 fmt.Println("CPU Family", cpuid.CPU.Family, "Model:", cpuid.CPU.Model, "Stepping:", cpuid.CPU.Stepping) 66 fmt.Println("Features:", strings.Join(cpuid.CPU.FeatureSet(), ",")) 67 fmt.Println("Microarchitecture level:", cpuid.CPU.X64Level()) 68 fmt.Println("Cacheline bytes:", cpuid.CPU.CacheLine) 69 fmt.Println("L1 Instruction Cache:", cpuid.CPU.Cache.L1I, "bytes") 70 fmt.Println("L1 Data Cache:", cpuid.CPU.Cache.L1D, "bytes") 71 fmt.Println("L2 Cache:", cpuid.CPU.Cache.L2, "bytes") 72 fmt.Println("L3 Cache:", cpuid.CPU.Cache.L3, "bytes") 73 if cpuid.CPU.Hz > 0 { 74 fmt.Println("Frequency:", cpuid.CPU.Hz, "Hz") 75 } 76 if cpuid.CPU.BoostFreq > 0 { 77 fmt.Println("Boost Frequency:", cpuid.CPU.BoostFreq, "Hz") 78 } 79 if cpuid.CPU.SGX.Available { 80 fmt.Printf("SGX: %+v\n", cpuid.CPU.SGX) 81 } 82 }