gitee.com/quant1x/gox@v1.7.6/num/info.go (about)

     1  package num
     2  
     3  import (
     4  	"gitee.com/quant1x/gox/num/internal/functions"
     5  	"golang.org/x/sys/cpu"
     6  	"runtime"
     7  )
     8  
     9  var cpuFeatures = map[string]bool{
    10  	"AES":              cpu.X86.HasAES,              // AES hardware implementation (AES NI)
    11  	"ADX":              cpu.X86.HasADX,              // Multi-precision add-carry instruction extensions
    12  	"AVX":              cpu.X86.HasAVX,              // Advanced vector extension
    13  	"AVX2":             cpu.X86.HasAVX2,             // Advanced vector extension 2
    14  	"AVX512":           cpu.X86.HasAVX512,           // Advanced vector extension 512
    15  	"AVX512F":          cpu.X86.HasAVX512F,          // Advanced vector extension 512 Foundation Instructions
    16  	"AVX512CD":         cpu.X86.HasAVX512CD,         // Advanced vector extension 512 Conflict Detection Instructions
    17  	"AVX512ER":         cpu.X86.HasAVX512ER,         // Advanced vector extension 512 Exponential and Reciprocal Instructions
    18  	"AVX512PF":         cpu.X86.HasAVX512PF,         // Advanced vector extension 512 Prefetch Instructions Instructions
    19  	"AVX512VL":         cpu.X86.HasAVX512VL,         // Advanced vector extension 512 Vector Length Extensions
    20  	"AVX512BW":         cpu.X86.HasAVX512BW,         // Advanced vector extension 512 Byte and Word Instructions
    21  	"AVX512DQ":         cpu.X86.HasAVX512DQ,         // Advanced vector extension 512 Doubleword and Quadword Instructions
    22  	"AVX512IFMA":       cpu.X86.HasAVX512IFMA,       // Advanced vector extension 512 Integer Fused Multiply Add
    23  	"AVX512VBMI":       cpu.X86.HasAVX512VBMI,       // Advanced vector extension 512 Vector Byte Manipulation Instructions
    24  	"AVX5124VNNIW":     cpu.X86.HasAVX5124VNNIW,     // Advanced vector extension 512 Vector Neural Network Instructions Word variable precision
    25  	"AVX5124FMAPS":     cpu.X86.HasAVX5124FMAPS,     // Advanced vector extension 512 Fused Multiply Accumulation Packed Single precision
    26  	"AVX512VPOPCNTDQ":  cpu.X86.HasAVX512VPOPCNTDQ,  // Advanced vector extension 512 Double and quad word population count instructions
    27  	"AVX512VPCLMULQDQ": cpu.X86.HasAVX512VPCLMULQDQ, // Advanced vector extension 512 Vector carry-less multiply operations
    28  	"AVX512VNNI":       cpu.X86.HasAVX512VNNI,       // Advanced vector extension 512 Vector Neural Network Instructions
    29  	"AVX512GFNI":       cpu.X86.HasAVX512GFNI,       // Advanced vector extension 512 Galois field New Instructions
    30  	"AVX512VAES":       cpu.X86.HasAVX512VAES,       // Advanced vector extension 512 Vector AES instructions
    31  	"AVX512VBMI2":      cpu.X86.HasAVX512VBMI2,      // Advanced vector extension 512 Vector Byte Manipulation Instructions 2
    32  	"AVX512BITALG":     cpu.X86.HasAVX512BITALG,     // Advanced vector extension 512 Bit Algorithms
    33  	"AVX512BF16":       cpu.X86.HasAVX512BF16,       // Advanced vector extension 512 BFloat16 Instructions
    34  	"BMI1":             cpu.X86.HasBMI1,             // Bit manipulation instruction set 1
    35  	"BMI2":             cpu.X86.HasBMI2,             // Bit manipulation instruction set 2
    36  	"CX16":             cpu.X86.HasCX16,             // Compare and exchange 16 Bytes
    37  	"ERMS":             cpu.X86.HasERMS,             // Enhanced REP for MOVSB and STOSB
    38  	"FMA":              cpu.X86.HasFMA,              // Fused-multiply-add instructions
    39  	"OSXSAVE":          cpu.X86.HasOSXSAVE,          // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
    40  	"PCLMULQDQ":        cpu.X86.HasPCLMULQDQ,        // PCLMULQDQ instruction - most often used for AES-GCM
    41  	"POPCNT":           cpu.X86.HasPOPCNT,           // Hamming weight instruction POPCNT.
    42  	"RDRAND":           cpu.X86.HasRDRAND,           // RDRAND instruction (on-chip random number generator)
    43  	"RDSEED":           cpu.X86.HasRDSEED,           // RDSEED instruction (on-chip random number generator)
    44  	"SSE2":             cpu.X86.HasSSE2,             // Streaming SIMD extension 2 (always available on amd64)
    45  	"SSE3":             cpu.X86.HasSSE3,             // Streaming SIMD extension 3
    46  	"SSSE3":            cpu.X86.HasSSSE3,            // Supplemental streaming SIMD extension 3
    47  	"SSE41":            cpu.X86.HasSSE41,            // Streaming SIMD extension 4 and 4.1
    48  	"SSE42":            cpu.X86.HasSSE42,            // Streaming SIMD extension 4 and 4.2
    49  }
    50  
    51  // SystemInfo contains information about the current operating environment.
    52  type SystemInfo struct {
    53  	CPUArchitecture string
    54  	CPUFeatures     []string
    55  	Acceleration    bool
    56  }
    57  
    58  // Info returns information about the current operating environment.
    59  func Info() SystemInfo {
    60  	var features []string
    61  	for k, v := range cpuFeatures {
    62  		if v {
    63  			features = append(features, k)
    64  		}
    65  	}
    66  
    67  	return SystemInfo{
    68  		CPUArchitecture: runtime.GOARCH,
    69  		CPUFeatures:     features,
    70  		Acceleration:    functions.UseAVX2,
    71  	}
    72  }