gitee.com/quant1x/num@v0.3.2/internal/functions/cpu_info.go (about)

     1  package functions
     2  
     3  import (
     4  	"golang.org/x/sys/cpu"
     5  	"runtime"
     6  )
     7  
     8  var cpuFeatures = map[string]bool{
     9  	"AES":              cpu.X86.HasAES,              // AES hardware implementation (AES NI)
    10  	"ADX":              cpu.X86.HasADX,              // Multi-precision add-carry instruction extensions
    11  	"AVX":              cpu.X86.HasAVX,              // Advanced vector extension
    12  	"AVX2":             cpu.X86.HasAVX2,             // Advanced vector extension 2
    13  	"AVX512":           cpu.X86.HasAVX512,           // Advanced vector extension 512
    14  	"AVX512F":          cpu.X86.HasAVX512F,          // Advanced vector extension 512 Foundation Instructions
    15  	"AVX512CD":         cpu.X86.HasAVX512CD,         // Advanced vector extension 512 Conflict Detection Instructions
    16  	"AVX512ER":         cpu.X86.HasAVX512ER,         // Advanced vector extension 512 Exponential and Reciprocal Instructions
    17  	"AVX512PF":         cpu.X86.HasAVX512PF,         // Advanced vector extension 512 Prefetch Instructions Instructions
    18  	"AVX512VL":         cpu.X86.HasAVX512VL,         // Advanced vector extension 512 Vector Length Extensions
    19  	"AVX512BW":         cpu.X86.HasAVX512BW,         // Advanced vector extension 512 Byte and Word Instructions
    20  	"AVX512DQ":         cpu.X86.HasAVX512DQ,         // Advanced vector extension 512 Doubleword and Quadword Instructions
    21  	"AVX512IFMA":       cpu.X86.HasAVX512IFMA,       // Advanced vector extension 512 Integer Fused Multiply Add
    22  	"AVX512VBMI":       cpu.X86.HasAVX512VBMI,       // Advanced vector extension 512 Vector Byte Manipulation Instructions
    23  	"AVX5124VNNIW":     cpu.X86.HasAVX5124VNNIW,     // Advanced vector extension 512 Vector Neural Network Instructions Word variable precision
    24  	"AVX5124FMAPS":     cpu.X86.HasAVX5124FMAPS,     // Advanced vector extension 512 Fused Multiply Accumulation Packed Single precision
    25  	"AVX512VPOPCNTDQ":  cpu.X86.HasAVX512VPOPCNTDQ,  // Advanced vector extension 512 Double and quad word population count instructions
    26  	"AVX512VPCLMULQDQ": cpu.X86.HasAVX512VPCLMULQDQ, // Advanced vector extension 512 Vector carry-less multiply operations
    27  	"AVX512VNNI":       cpu.X86.HasAVX512VNNI,       // Advanced vector extension 512 Vector Neural Network Instructions
    28  	"AVX512GFNI":       cpu.X86.HasAVX512GFNI,       // Advanced vector extension 512 Galois field New Instructions
    29  	"AVX512VAES":       cpu.X86.HasAVX512VAES,       // Advanced vector extension 512 Vector AES instructions
    30  	"AVX512VBMI2":      cpu.X86.HasAVX512VBMI2,      // Advanced vector extension 512 Vector Byte Manipulation Instructions 2
    31  	"AVX512BITALG":     cpu.X86.HasAVX512BITALG,     // Advanced vector extension 512 Bit Algorithms
    32  	"AVX512BF16":       cpu.X86.HasAVX512BF16,       // Advanced vector extension 512 BFloat16 Instructions
    33  	"BMI1":             cpu.X86.HasBMI1,             // Bit manipulation instruction set 1
    34  	"BMI2":             cpu.X86.HasBMI2,             // Bit manipulation instruction set 2
    35  	"CX16":             cpu.X86.HasCX16,             // Compare and exchange 16 Bytes
    36  	"ERMS":             cpu.X86.HasERMS,             // Enhanced REP for MOVSB and STOSB
    37  	"FMA":              cpu.X86.HasFMA,              // Fused-multiply-add instructions
    38  	"OSXSAVE":          cpu.X86.HasOSXSAVE,          // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
    39  	"PCLMULQDQ":        cpu.X86.HasPCLMULQDQ,        // PCLMULQDQ instruction - most often used for AES-GCM
    40  	"POPCNT":           cpu.X86.HasPOPCNT,           // Hamming weight instruction POPCNT.
    41  	"RDRAND":           cpu.X86.HasRDRAND,           // RDRAND instruction (on-chip random number generator)
    42  	"RDSEED":           cpu.X86.HasRDSEED,           // RDSEED instruction (on-chip random number generator)
    43  	"SSE2":             cpu.X86.HasSSE2,             // Streaming SIMD extension 2 (always available on amd64)
    44  	"SSE3":             cpu.X86.HasSSE3,             // Streaming SIMD extension 3
    45  	"SSSE3":            cpu.X86.HasSSSE3,            // Supplemental streaming SIMD extension 3
    46  	"SSE41":            cpu.X86.HasSSE41,            // Streaming SIMD extension 4 and 4.1
    47  	"SSE42":            cpu.X86.HasSSE42,            // Streaming SIMD extension 4 and 4.2
    48  }
    49  
    50  // SystemInfo contains information about the current operating environment.
    51  type SystemInfo struct {
    52  	CPUArchitecture string
    53  	CPUFeatures     []string
    54  	Acceleration    bool
    55  }
    56  
    57  // Info returns information about the current operating environment.
    58  func Info() SystemInfo {
    59  	var features []string
    60  	for k, v := range cpuFeatures {
    61  		if v {
    62  			features = append(features, k)
    63  		}
    64  	}
    65  
    66  	return SystemInfo{
    67  		CPUArchitecture: runtime.GOARCH,
    68  		CPUFeatures:     features,
    69  		Acceleration:    UseAVX2,
    70  	}
    71  }
    72  
    73  // SetAcceleration toggles simd acceleration. Not thread safe.
    74  func SetAcceleration(enabled bool) {
    75  	if enabled && !(cpu.X86.HasAVX2 && cpu.X86.HasFMA) {
    76  		UseAVX2 = false
    77  		//return fmt.Errorf("acceleration not supported on this platform")
    78  		return
    79  	}
    80  	UseAVX2 = enabled
    81  }