github.com/4ad/go@v0.0.0-20161219182952-69a12818b605/src/runtime/duff_sparc64.s (about)

     1  // AUTO-GENERATED by mkduff.go
     2  // Run go generate from src/runtime to update.
     3  // See mkduff.go for comments.
     4  
     5  #include "textflag.h"
     6  
     7  TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0
     8  	MOVD	ZR, 8(RT1)
     9  	ADD	$8, RT1
    10  	MOVD	ZR, 8(RT1)
    11  	ADD	$8, RT1
    12  	MOVD	ZR, 8(RT1)
    13  	ADD	$8, RT1
    14  	MOVD	ZR, 8(RT1)
    15  	ADD	$8, RT1
    16  	MOVD	ZR, 8(RT1)
    17  	ADD	$8, RT1
    18  	MOVD	ZR, 8(RT1)
    19  	ADD	$8, RT1
    20  	MOVD	ZR, 8(RT1)
    21  	ADD	$8, RT1
    22  	MOVD	ZR, 8(RT1)
    23  	ADD	$8, RT1
    24  	MOVD	ZR, 8(RT1)
    25  	ADD	$8, RT1
    26  	MOVD	ZR, 8(RT1)
    27  	ADD	$8, RT1
    28  	MOVD	ZR, 8(RT1)
    29  	ADD	$8, RT1
    30  	MOVD	ZR, 8(RT1)
    31  	ADD	$8, RT1
    32  	MOVD	ZR, 8(RT1)
    33  	ADD	$8, RT1
    34  	MOVD	ZR, 8(RT1)
    35  	ADD	$8, RT1
    36  	MOVD	ZR, 8(RT1)
    37  	ADD	$8, RT1
    38  	MOVD	ZR, 8(RT1)
    39  	ADD	$8, RT1
    40  	MOVD	ZR, 8(RT1)
    41  	ADD	$8, RT1
    42  	MOVD	ZR, 8(RT1)
    43  	ADD	$8, RT1
    44  	MOVD	ZR, 8(RT1)
    45  	ADD	$8, RT1
    46  	MOVD	ZR, 8(RT1)
    47  	ADD	$8, RT1
    48  	MOVD	ZR, 8(RT1)
    49  	ADD	$8, RT1
    50  	MOVD	ZR, 8(RT1)
    51  	ADD	$8, RT1
    52  	MOVD	ZR, 8(RT1)
    53  	ADD	$8, RT1
    54  	MOVD	ZR, 8(RT1)
    55  	ADD	$8, RT1
    56  	MOVD	ZR, 8(RT1)
    57  	ADD	$8, RT1
    58  	MOVD	ZR, 8(RT1)
    59  	ADD	$8, RT1
    60  	MOVD	ZR, 8(RT1)
    61  	ADD	$8, RT1
    62  	MOVD	ZR, 8(RT1)
    63  	ADD	$8, RT1
    64  	MOVD	ZR, 8(RT1)
    65  	ADD	$8, RT1
    66  	MOVD	ZR, 8(RT1)
    67  	ADD	$8, RT1
    68  	MOVD	ZR, 8(RT1)
    69  	ADD	$8, RT1
    70  	MOVD	ZR, 8(RT1)
    71  	ADD	$8, RT1
    72  	MOVD	ZR, 8(RT1)
    73  	ADD	$8, RT1
    74  	MOVD	ZR, 8(RT1)
    75  	ADD	$8, RT1
    76  	MOVD	ZR, 8(RT1)
    77  	ADD	$8, RT1
    78  	MOVD	ZR, 8(RT1)
    79  	ADD	$8, RT1
    80  	MOVD	ZR, 8(RT1)
    81  	ADD	$8, RT1
    82  	MOVD	ZR, 8(RT1)
    83  	ADD	$8, RT1
    84  	MOVD	ZR, 8(RT1)
    85  	ADD	$8, RT1
    86  	MOVD	ZR, 8(RT1)
    87  	ADD	$8, RT1
    88  	MOVD	ZR, 8(RT1)
    89  	ADD	$8, RT1
    90  	MOVD	ZR, 8(RT1)
    91  	ADD	$8, RT1
    92  	MOVD	ZR, 8(RT1)
    93  	ADD	$8, RT1
    94  	MOVD	ZR, 8(RT1)
    95  	ADD	$8, RT1
    96  	MOVD	ZR, 8(RT1)
    97  	ADD	$8, RT1
    98  	MOVD	ZR, 8(RT1)
    99  	ADD	$8, RT1
   100  	MOVD	ZR, 8(RT1)
   101  	ADD	$8, RT1
   102  	MOVD	ZR, 8(RT1)
   103  	ADD	$8, RT1
   104  	MOVD	ZR, 8(RT1)
   105  	ADD	$8, RT1
   106  	MOVD	ZR, 8(RT1)
   107  	ADD	$8, RT1
   108  	MOVD	ZR, 8(RT1)
   109  	ADD	$8, RT1
   110  	MOVD	ZR, 8(RT1)
   111  	ADD	$8, RT1
   112  	MOVD	ZR, 8(RT1)
   113  	ADD	$8, RT1
   114  	MOVD	ZR, 8(RT1)
   115  	ADD	$8, RT1
   116  	MOVD	ZR, 8(RT1)
   117  	ADD	$8, RT1
   118  	MOVD	ZR, 8(RT1)
   119  	ADD	$8, RT1
   120  	MOVD	ZR, 8(RT1)
   121  	ADD	$8, RT1
   122  	MOVD	ZR, 8(RT1)
   123  	ADD	$8, RT1
   124  	MOVD	ZR, 8(RT1)
   125  	ADD	$8, RT1
   126  	MOVD	ZR, 8(RT1)
   127  	ADD	$8, RT1
   128  	MOVD	ZR, 8(RT1)
   129  	ADD	$8, RT1
   130  	MOVD	ZR, 8(RT1)
   131  	ADD	$8, RT1
   132  	MOVD	ZR, 8(RT1)
   133  	ADD	$8, RT1
   134  	MOVD	ZR, 8(RT1)
   135  	ADD	$8, RT1
   136  	MOVD	ZR, 8(RT1)
   137  	ADD	$8, RT1
   138  	MOVD	ZR, 8(RT1)
   139  	ADD	$8, RT1
   140  	MOVD	ZR, 8(RT1)
   141  	ADD	$8, RT1
   142  	MOVD	ZR, 8(RT1)
   143  	ADD	$8, RT1
   144  	MOVD	ZR, 8(RT1)
   145  	ADD	$8, RT1
   146  	MOVD	ZR, 8(RT1)
   147  	ADD	$8, RT1
   148  	MOVD	ZR, 8(RT1)
   149  	ADD	$8, RT1
   150  	MOVD	ZR, 8(RT1)
   151  	ADD	$8, RT1
   152  	MOVD	ZR, 8(RT1)
   153  	ADD	$8, RT1
   154  	MOVD	ZR, 8(RT1)
   155  	ADD	$8, RT1
   156  	MOVD	ZR, 8(RT1)
   157  	ADD	$8, RT1
   158  	MOVD	ZR, 8(RT1)
   159  	ADD	$8, RT1
   160  	MOVD	ZR, 8(RT1)
   161  	ADD	$8, RT1
   162  	MOVD	ZR, 8(RT1)
   163  	ADD	$8, RT1
   164  	MOVD	ZR, 8(RT1)
   165  	ADD	$8, RT1
   166  	MOVD	ZR, 8(RT1)
   167  	ADD	$8, RT1
   168  	MOVD	ZR, 8(RT1)
   169  	ADD	$8, RT1
   170  	MOVD	ZR, 8(RT1)
   171  	ADD	$8, RT1
   172  	MOVD	ZR, 8(RT1)
   173  	ADD	$8, RT1
   174  	MOVD	ZR, 8(RT1)
   175  	ADD	$8, RT1
   176  	MOVD	ZR, 8(RT1)
   177  	ADD	$8, RT1
   178  	MOVD	ZR, 8(RT1)
   179  	ADD	$8, RT1
   180  	MOVD	ZR, 8(RT1)
   181  	ADD	$8, RT1
   182  	MOVD	ZR, 8(RT1)
   183  	ADD	$8, RT1
   184  	MOVD	ZR, 8(RT1)
   185  	ADD	$8, RT1
   186  	MOVD	ZR, 8(RT1)
   187  	ADD	$8, RT1
   188  	MOVD	ZR, 8(RT1)
   189  	ADD	$8, RT1
   190  	MOVD	ZR, 8(RT1)
   191  	ADD	$8, RT1
   192  	MOVD	ZR, 8(RT1)
   193  	ADD	$8, RT1
   194  	MOVD	ZR, 8(RT1)
   195  	ADD	$8, RT1
   196  	MOVD	ZR, 8(RT1)
   197  	ADD	$8, RT1
   198  	MOVD	ZR, 8(RT1)
   199  	ADD	$8, RT1
   200  	MOVD	ZR, 8(RT1)
   201  	ADD	$8, RT1
   202  	MOVD	ZR, 8(RT1)
   203  	ADD	$8, RT1
   204  	MOVD	ZR, 8(RT1)
   205  	ADD	$8, RT1
   206  	MOVD	ZR, 8(RT1)
   207  	ADD	$8, RT1
   208  	MOVD	ZR, 8(RT1)
   209  	ADD	$8, RT1
   210  	MOVD	ZR, 8(RT1)
   211  	ADD	$8, RT1
   212  	MOVD	ZR, 8(RT1)
   213  	ADD	$8, RT1
   214  	MOVD	ZR, 8(RT1)
   215  	ADD	$8, RT1
   216  	MOVD	ZR, 8(RT1)
   217  	ADD	$8, RT1
   218  	MOVD	ZR, 8(RT1)
   219  	ADD	$8, RT1
   220  	MOVD	ZR, 8(RT1)
   221  	ADD	$8, RT1
   222  	MOVD	ZR, 8(RT1)
   223  	ADD	$8, RT1
   224  	MOVD	ZR, 8(RT1)
   225  	ADD	$8, RT1
   226  	MOVD	ZR, 8(RT1)
   227  	ADD	$8, RT1
   228  	MOVD	ZR, 8(RT1)
   229  	ADD	$8, RT1
   230  	MOVD	ZR, 8(RT1)
   231  	ADD	$8, RT1
   232  	MOVD	ZR, 8(RT1)
   233  	ADD	$8, RT1
   234  	MOVD	ZR, 8(RT1)
   235  	ADD	$8, RT1
   236  	MOVD	ZR, 8(RT1)
   237  	ADD	$8, RT1
   238  	MOVD	ZR, 8(RT1)
   239  	ADD	$8, RT1
   240  	MOVD	ZR, 8(RT1)
   241  	ADD	$8, RT1
   242  	MOVD	ZR, 8(RT1)
   243  	ADD	$8, RT1
   244  	MOVD	ZR, 8(RT1)
   245  	ADD	$8, RT1
   246  	MOVD	ZR, 8(RT1)
   247  	ADD	$8, RT1
   248  	MOVD	ZR, 8(RT1)
   249  	ADD	$8, RT1
   250  	MOVD	ZR, 8(RT1)
   251  	ADD	$8, RT1
   252  	MOVD	ZR, 8(RT1)
   253  	ADD	$8, RT1
   254  	MOVD	ZR, 8(RT1)
   255  	ADD	$8, RT1
   256  	MOVD	ZR, 8(RT1)
   257  	ADD	$8, RT1
   258  	MOVD	ZR, 8(RT1)
   259  	ADD	$8, RT1
   260  	MOVD	ZR, 8(RT1)
   261  	ADD	$8, RT1
   262  	MOVD	ZR, 8(RT1)
   263  	ADD	$8, RT1
   264  	RET
   265  
   266  // TODO: Implement runtime·duffcopy.