github.com/FenixAra/go@v0.0.0-20170127160404-96ea0918e670/src/cmd/compile/internal/ssa/rewriteS390X.go (about) 1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLrot32: 272 return rewriteValueS390X_OpLrot32(v, config) 273 case OpLrot64: 274 return rewriteValueS390X_OpLrot64(v, config) 275 case OpLsh16x16: 276 return rewriteValueS390X_OpLsh16x16(v, config) 277 case OpLsh16x32: 278 return rewriteValueS390X_OpLsh16x32(v, config) 279 case OpLsh16x64: 280 return rewriteValueS390X_OpLsh16x64(v, config) 281 case OpLsh16x8: 282 return rewriteValueS390X_OpLsh16x8(v, config) 283 case OpLsh32x16: 284 return rewriteValueS390X_OpLsh32x16(v, config) 285 case OpLsh32x32: 286 return rewriteValueS390X_OpLsh32x32(v, config) 287 case OpLsh32x64: 288 return rewriteValueS390X_OpLsh32x64(v, config) 289 case OpLsh32x8: 290 return rewriteValueS390X_OpLsh32x8(v, config) 291 case OpLsh64x16: 292 return rewriteValueS390X_OpLsh64x16(v, config) 293 case OpLsh64x32: 294 return rewriteValueS390X_OpLsh64x32(v, config) 295 case OpLsh64x64: 296 return rewriteValueS390X_OpLsh64x64(v, config) 297 case OpLsh64x8: 298 return rewriteValueS390X_OpLsh64x8(v, config) 299 case OpLsh8x16: 300 return rewriteValueS390X_OpLsh8x16(v, config) 301 case OpLsh8x32: 302 return rewriteValueS390X_OpLsh8x32(v, config) 303 case OpLsh8x64: 304 return rewriteValueS390X_OpLsh8x64(v, config) 305 case OpLsh8x8: 306 return rewriteValueS390X_OpLsh8x8(v, config) 307 case OpMod16: 308 return rewriteValueS390X_OpMod16(v, config) 309 case OpMod16u: 310 return rewriteValueS390X_OpMod16u(v, config) 311 case OpMod32: 312 return rewriteValueS390X_OpMod32(v, config) 313 case OpMod32u: 314 return rewriteValueS390X_OpMod32u(v, config) 315 case OpMod64: 316 return rewriteValueS390X_OpMod64(v, config) 317 case OpMod64u: 318 return rewriteValueS390X_OpMod64u(v, config) 319 case OpMod8: 320 return rewriteValueS390X_OpMod8(v, config) 321 case OpMod8u: 322 return rewriteValueS390X_OpMod8u(v, config) 323 case OpMove: 324 return rewriteValueS390X_OpMove(v, config) 325 case OpMul16: 326 return rewriteValueS390X_OpMul16(v, config) 327 case OpMul32: 328 return rewriteValueS390X_OpMul32(v, config) 329 case OpMul32F: 330 return rewriteValueS390X_OpMul32F(v, config) 331 case OpMul64: 332 return rewriteValueS390X_OpMul64(v, config) 333 case OpMul64F: 334 return rewriteValueS390X_OpMul64F(v, config) 335 case OpMul8: 336 return rewriteValueS390X_OpMul8(v, config) 337 case OpNeg16: 338 return rewriteValueS390X_OpNeg16(v, config) 339 case OpNeg32: 340 return rewriteValueS390X_OpNeg32(v, config) 341 case OpNeg32F: 342 return rewriteValueS390X_OpNeg32F(v, config) 343 case OpNeg64: 344 return rewriteValueS390X_OpNeg64(v, config) 345 case OpNeg64F: 346 return rewriteValueS390X_OpNeg64F(v, config) 347 case OpNeg8: 348 return rewriteValueS390X_OpNeg8(v, config) 349 case OpNeq16: 350 return rewriteValueS390X_OpNeq16(v, config) 351 case OpNeq32: 352 return rewriteValueS390X_OpNeq32(v, config) 353 case OpNeq32F: 354 return rewriteValueS390X_OpNeq32F(v, config) 355 case OpNeq64: 356 return rewriteValueS390X_OpNeq64(v, config) 357 case OpNeq64F: 358 return rewriteValueS390X_OpNeq64F(v, config) 359 case OpNeq8: 360 return rewriteValueS390X_OpNeq8(v, config) 361 case OpNeqB: 362 return rewriteValueS390X_OpNeqB(v, config) 363 case OpNeqPtr: 364 return rewriteValueS390X_OpNeqPtr(v, config) 365 case OpNilCheck: 366 return rewriteValueS390X_OpNilCheck(v, config) 367 case OpNot: 368 return rewriteValueS390X_OpNot(v, config) 369 case OpOffPtr: 370 return rewriteValueS390X_OpOffPtr(v, config) 371 case OpOr16: 372 return rewriteValueS390X_OpOr16(v, config) 373 case OpOr32: 374 return rewriteValueS390X_OpOr32(v, config) 375 case OpOr64: 376 return rewriteValueS390X_OpOr64(v, config) 377 case OpOr8: 378 return rewriteValueS390X_OpOr8(v, config) 379 case OpOrB: 380 return rewriteValueS390X_OpOrB(v, config) 381 case OpRsh16Ux16: 382 return rewriteValueS390X_OpRsh16Ux16(v, config) 383 case OpRsh16Ux32: 384 return rewriteValueS390X_OpRsh16Ux32(v, config) 385 case OpRsh16Ux64: 386 return rewriteValueS390X_OpRsh16Ux64(v, config) 387 case OpRsh16Ux8: 388 return rewriteValueS390X_OpRsh16Ux8(v, config) 389 case OpRsh16x16: 390 return rewriteValueS390X_OpRsh16x16(v, config) 391 case OpRsh16x32: 392 return rewriteValueS390X_OpRsh16x32(v, config) 393 case OpRsh16x64: 394 return rewriteValueS390X_OpRsh16x64(v, config) 395 case OpRsh16x8: 396 return rewriteValueS390X_OpRsh16x8(v, config) 397 case OpRsh32Ux16: 398 return rewriteValueS390X_OpRsh32Ux16(v, config) 399 case OpRsh32Ux32: 400 return rewriteValueS390X_OpRsh32Ux32(v, config) 401 case OpRsh32Ux64: 402 return rewriteValueS390X_OpRsh32Ux64(v, config) 403 case OpRsh32Ux8: 404 return rewriteValueS390X_OpRsh32Ux8(v, config) 405 case OpRsh32x16: 406 return rewriteValueS390X_OpRsh32x16(v, config) 407 case OpRsh32x32: 408 return rewriteValueS390X_OpRsh32x32(v, config) 409 case OpRsh32x64: 410 return rewriteValueS390X_OpRsh32x64(v, config) 411 case OpRsh32x8: 412 return rewriteValueS390X_OpRsh32x8(v, config) 413 case OpRsh64Ux16: 414 return rewriteValueS390X_OpRsh64Ux16(v, config) 415 case OpRsh64Ux32: 416 return rewriteValueS390X_OpRsh64Ux32(v, config) 417 case OpRsh64Ux64: 418 return rewriteValueS390X_OpRsh64Ux64(v, config) 419 case OpRsh64Ux8: 420 return rewriteValueS390X_OpRsh64Ux8(v, config) 421 case OpRsh64x16: 422 return rewriteValueS390X_OpRsh64x16(v, config) 423 case OpRsh64x32: 424 return rewriteValueS390X_OpRsh64x32(v, config) 425 case OpRsh64x64: 426 return rewriteValueS390X_OpRsh64x64(v, config) 427 case OpRsh64x8: 428 return rewriteValueS390X_OpRsh64x8(v, config) 429 case OpRsh8Ux16: 430 return rewriteValueS390X_OpRsh8Ux16(v, config) 431 case OpRsh8Ux32: 432 return rewriteValueS390X_OpRsh8Ux32(v, config) 433 case OpRsh8Ux64: 434 return rewriteValueS390X_OpRsh8Ux64(v, config) 435 case OpRsh8Ux8: 436 return rewriteValueS390X_OpRsh8Ux8(v, config) 437 case OpRsh8x16: 438 return rewriteValueS390X_OpRsh8x16(v, config) 439 case OpRsh8x32: 440 return rewriteValueS390X_OpRsh8x32(v, config) 441 case OpRsh8x64: 442 return rewriteValueS390X_OpRsh8x64(v, config) 443 case OpRsh8x8: 444 return rewriteValueS390X_OpRsh8x8(v, config) 445 case OpS390XADD: 446 return rewriteValueS390X_OpS390XADD(v, config) 447 case OpS390XADDW: 448 return rewriteValueS390X_OpS390XADDW(v, config) 449 case OpS390XADDWconst: 450 return rewriteValueS390X_OpS390XADDWconst(v, config) 451 case OpS390XADDconst: 452 return rewriteValueS390X_OpS390XADDconst(v, config) 453 case OpS390XAND: 454 return rewriteValueS390X_OpS390XAND(v, config) 455 case OpS390XANDW: 456 return rewriteValueS390X_OpS390XANDW(v, config) 457 case OpS390XANDWconst: 458 return rewriteValueS390X_OpS390XANDWconst(v, config) 459 case OpS390XANDconst: 460 return rewriteValueS390X_OpS390XANDconst(v, config) 461 case OpS390XCMP: 462 return rewriteValueS390X_OpS390XCMP(v, config) 463 case OpS390XCMPU: 464 return rewriteValueS390X_OpS390XCMPU(v, config) 465 case OpS390XCMPUconst: 466 return rewriteValueS390X_OpS390XCMPUconst(v, config) 467 case OpS390XCMPW: 468 return rewriteValueS390X_OpS390XCMPW(v, config) 469 case OpS390XCMPWU: 470 return rewriteValueS390X_OpS390XCMPWU(v, config) 471 case OpS390XCMPWUconst: 472 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 473 case OpS390XCMPWconst: 474 return rewriteValueS390X_OpS390XCMPWconst(v, config) 475 case OpS390XCMPconst: 476 return rewriteValueS390X_OpS390XCMPconst(v, config) 477 case OpS390XFMOVDload: 478 return rewriteValueS390X_OpS390XFMOVDload(v, config) 479 case OpS390XFMOVDloadidx: 480 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 481 case OpS390XFMOVDstore: 482 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 483 case OpS390XFMOVDstoreidx: 484 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 485 case OpS390XFMOVSload: 486 return rewriteValueS390X_OpS390XFMOVSload(v, config) 487 case OpS390XFMOVSloadidx: 488 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 489 case OpS390XFMOVSstore: 490 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 491 case OpS390XFMOVSstoreidx: 492 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 493 case OpS390XMOVBZload: 494 return rewriteValueS390X_OpS390XMOVBZload(v, config) 495 case OpS390XMOVBZloadidx: 496 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 497 case OpS390XMOVBZreg: 498 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 499 case OpS390XMOVBload: 500 return rewriteValueS390X_OpS390XMOVBload(v, config) 501 case OpS390XMOVBreg: 502 return rewriteValueS390X_OpS390XMOVBreg(v, config) 503 case OpS390XMOVBstore: 504 return rewriteValueS390X_OpS390XMOVBstore(v, config) 505 case OpS390XMOVBstoreconst: 506 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 507 case OpS390XMOVBstoreidx: 508 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 509 case OpS390XMOVDEQ: 510 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 511 case OpS390XMOVDGE: 512 return rewriteValueS390X_OpS390XMOVDGE(v, config) 513 case OpS390XMOVDGT: 514 return rewriteValueS390X_OpS390XMOVDGT(v, config) 515 case OpS390XMOVDLE: 516 return rewriteValueS390X_OpS390XMOVDLE(v, config) 517 case OpS390XMOVDLT: 518 return rewriteValueS390X_OpS390XMOVDLT(v, config) 519 case OpS390XMOVDNE: 520 return rewriteValueS390X_OpS390XMOVDNE(v, config) 521 case OpS390XMOVDaddridx: 522 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 523 case OpS390XMOVDload: 524 return rewriteValueS390X_OpS390XMOVDload(v, config) 525 case OpS390XMOVDloadidx: 526 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 527 case OpS390XMOVDstore: 528 return rewriteValueS390X_OpS390XMOVDstore(v, config) 529 case OpS390XMOVDstoreconst: 530 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 531 case OpS390XMOVDstoreidx: 532 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 533 case OpS390XMOVHBRstore: 534 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 535 case OpS390XMOVHBRstoreidx: 536 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 537 case OpS390XMOVHZload: 538 return rewriteValueS390X_OpS390XMOVHZload(v, config) 539 case OpS390XMOVHZloadidx: 540 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 541 case OpS390XMOVHZreg: 542 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 543 case OpS390XMOVHload: 544 return rewriteValueS390X_OpS390XMOVHload(v, config) 545 case OpS390XMOVHreg: 546 return rewriteValueS390X_OpS390XMOVHreg(v, config) 547 case OpS390XMOVHstore: 548 return rewriteValueS390X_OpS390XMOVHstore(v, config) 549 case OpS390XMOVHstoreconst: 550 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 551 case OpS390XMOVHstoreidx: 552 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 553 case OpS390XMOVWBRstore: 554 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 555 case OpS390XMOVWBRstoreidx: 556 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 557 case OpS390XMOVWZload: 558 return rewriteValueS390X_OpS390XMOVWZload(v, config) 559 case OpS390XMOVWZloadidx: 560 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 561 case OpS390XMOVWZreg: 562 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 563 case OpS390XMOVWload: 564 return rewriteValueS390X_OpS390XMOVWload(v, config) 565 case OpS390XMOVWreg: 566 return rewriteValueS390X_OpS390XMOVWreg(v, config) 567 case OpS390XMOVWstore: 568 return rewriteValueS390X_OpS390XMOVWstore(v, config) 569 case OpS390XMOVWstoreconst: 570 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 571 case OpS390XMOVWstoreidx: 572 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 573 case OpS390XMULLD: 574 return rewriteValueS390X_OpS390XMULLD(v, config) 575 case OpS390XMULLDconst: 576 return rewriteValueS390X_OpS390XMULLDconst(v, config) 577 case OpS390XMULLW: 578 return rewriteValueS390X_OpS390XMULLW(v, config) 579 case OpS390XMULLWconst: 580 return rewriteValueS390X_OpS390XMULLWconst(v, config) 581 case OpS390XNEG: 582 return rewriteValueS390X_OpS390XNEG(v, config) 583 case OpS390XNEGW: 584 return rewriteValueS390X_OpS390XNEGW(v, config) 585 case OpS390XNOT: 586 return rewriteValueS390X_OpS390XNOT(v, config) 587 case OpS390XNOTW: 588 return rewriteValueS390X_OpS390XNOTW(v, config) 589 case OpS390XOR: 590 return rewriteValueS390X_OpS390XOR(v, config) 591 case OpS390XORW: 592 return rewriteValueS390X_OpS390XORW(v, config) 593 case OpS390XORWconst: 594 return rewriteValueS390X_OpS390XORWconst(v, config) 595 case OpS390XORconst: 596 return rewriteValueS390X_OpS390XORconst(v, config) 597 case OpS390XSLD: 598 return rewriteValueS390X_OpS390XSLD(v, config) 599 case OpS390XSLW: 600 return rewriteValueS390X_OpS390XSLW(v, config) 601 case OpS390XSRAD: 602 return rewriteValueS390X_OpS390XSRAD(v, config) 603 case OpS390XSRADconst: 604 return rewriteValueS390X_OpS390XSRADconst(v, config) 605 case OpS390XSRAW: 606 return rewriteValueS390X_OpS390XSRAW(v, config) 607 case OpS390XSRAWconst: 608 return rewriteValueS390X_OpS390XSRAWconst(v, config) 609 case OpS390XSRD: 610 return rewriteValueS390X_OpS390XSRD(v, config) 611 case OpS390XSRW: 612 return rewriteValueS390X_OpS390XSRW(v, config) 613 case OpS390XSTM2: 614 return rewriteValueS390X_OpS390XSTM2(v, config) 615 case OpS390XSTMG2: 616 return rewriteValueS390X_OpS390XSTMG2(v, config) 617 case OpS390XSUB: 618 return rewriteValueS390X_OpS390XSUB(v, config) 619 case OpS390XSUBEWcarrymask: 620 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 621 case OpS390XSUBEcarrymask: 622 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 623 case OpS390XSUBW: 624 return rewriteValueS390X_OpS390XSUBW(v, config) 625 case OpS390XSUBWconst: 626 return rewriteValueS390X_OpS390XSUBWconst(v, config) 627 case OpS390XSUBconst: 628 return rewriteValueS390X_OpS390XSUBconst(v, config) 629 case OpS390XXOR: 630 return rewriteValueS390X_OpS390XXOR(v, config) 631 case OpS390XXORW: 632 return rewriteValueS390X_OpS390XXORW(v, config) 633 case OpS390XXORWconst: 634 return rewriteValueS390X_OpS390XXORWconst(v, config) 635 case OpS390XXORconst: 636 return rewriteValueS390X_OpS390XXORconst(v, config) 637 case OpSelect0: 638 return rewriteValueS390X_OpSelect0(v, config) 639 case OpSelect1: 640 return rewriteValueS390X_OpSelect1(v, config) 641 case OpSignExt16to32: 642 return rewriteValueS390X_OpSignExt16to32(v, config) 643 case OpSignExt16to64: 644 return rewriteValueS390X_OpSignExt16to64(v, config) 645 case OpSignExt32to64: 646 return rewriteValueS390X_OpSignExt32to64(v, config) 647 case OpSignExt8to16: 648 return rewriteValueS390X_OpSignExt8to16(v, config) 649 case OpSignExt8to32: 650 return rewriteValueS390X_OpSignExt8to32(v, config) 651 case OpSignExt8to64: 652 return rewriteValueS390X_OpSignExt8to64(v, config) 653 case OpSlicemask: 654 return rewriteValueS390X_OpSlicemask(v, config) 655 case OpSqrt: 656 return rewriteValueS390X_OpSqrt(v, config) 657 case OpStaticCall: 658 return rewriteValueS390X_OpStaticCall(v, config) 659 case OpStore: 660 return rewriteValueS390X_OpStore(v, config) 661 case OpSub16: 662 return rewriteValueS390X_OpSub16(v, config) 663 case OpSub32: 664 return rewriteValueS390X_OpSub32(v, config) 665 case OpSub32F: 666 return rewriteValueS390X_OpSub32F(v, config) 667 case OpSub64: 668 return rewriteValueS390X_OpSub64(v, config) 669 case OpSub64F: 670 return rewriteValueS390X_OpSub64F(v, config) 671 case OpSub8: 672 return rewriteValueS390X_OpSub8(v, config) 673 case OpSubPtr: 674 return rewriteValueS390X_OpSubPtr(v, config) 675 case OpTrunc16to8: 676 return rewriteValueS390X_OpTrunc16to8(v, config) 677 case OpTrunc32to16: 678 return rewriteValueS390X_OpTrunc32to16(v, config) 679 case OpTrunc32to8: 680 return rewriteValueS390X_OpTrunc32to8(v, config) 681 case OpTrunc64to16: 682 return rewriteValueS390X_OpTrunc64to16(v, config) 683 case OpTrunc64to32: 684 return rewriteValueS390X_OpTrunc64to32(v, config) 685 case OpTrunc64to8: 686 return rewriteValueS390X_OpTrunc64to8(v, config) 687 case OpXor16: 688 return rewriteValueS390X_OpXor16(v, config) 689 case OpXor32: 690 return rewriteValueS390X_OpXor32(v, config) 691 case OpXor64: 692 return rewriteValueS390X_OpXor64(v, config) 693 case OpXor8: 694 return rewriteValueS390X_OpXor8(v, config) 695 case OpZero: 696 return rewriteValueS390X_OpZero(v, config) 697 case OpZeroExt16to32: 698 return rewriteValueS390X_OpZeroExt16to32(v, config) 699 case OpZeroExt16to64: 700 return rewriteValueS390X_OpZeroExt16to64(v, config) 701 case OpZeroExt32to64: 702 return rewriteValueS390X_OpZeroExt32to64(v, config) 703 case OpZeroExt8to16: 704 return rewriteValueS390X_OpZeroExt8to16(v, config) 705 case OpZeroExt8to32: 706 return rewriteValueS390X_OpZeroExt8to32(v, config) 707 case OpZeroExt8to64: 708 return rewriteValueS390X_OpZeroExt8to64(v, config) 709 } 710 return false 711 } 712 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 713 b := v.Block 714 _ = b 715 // match: (Add16 x y) 716 // cond: 717 // result: (ADDW x y) 718 for { 719 x := v.Args[0] 720 y := v.Args[1] 721 v.reset(OpS390XADDW) 722 v.AddArg(x) 723 v.AddArg(y) 724 return true 725 } 726 } 727 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 728 b := v.Block 729 _ = b 730 // match: (Add32 x y) 731 // cond: 732 // result: (ADDW x y) 733 for { 734 x := v.Args[0] 735 y := v.Args[1] 736 v.reset(OpS390XADDW) 737 v.AddArg(x) 738 v.AddArg(y) 739 return true 740 } 741 } 742 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 743 b := v.Block 744 _ = b 745 // match: (Add32F x y) 746 // cond: 747 // result: (FADDS x y) 748 for { 749 x := v.Args[0] 750 y := v.Args[1] 751 v.reset(OpS390XFADDS) 752 v.AddArg(x) 753 v.AddArg(y) 754 return true 755 } 756 } 757 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 758 b := v.Block 759 _ = b 760 // match: (Add64 x y) 761 // cond: 762 // result: (ADD x y) 763 for { 764 x := v.Args[0] 765 y := v.Args[1] 766 v.reset(OpS390XADD) 767 v.AddArg(x) 768 v.AddArg(y) 769 return true 770 } 771 } 772 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 773 b := v.Block 774 _ = b 775 // match: (Add64F x y) 776 // cond: 777 // result: (FADD x y) 778 for { 779 x := v.Args[0] 780 y := v.Args[1] 781 v.reset(OpS390XFADD) 782 v.AddArg(x) 783 v.AddArg(y) 784 return true 785 } 786 } 787 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 788 b := v.Block 789 _ = b 790 // match: (Add8 x y) 791 // cond: 792 // result: (ADDW x y) 793 for { 794 x := v.Args[0] 795 y := v.Args[1] 796 v.reset(OpS390XADDW) 797 v.AddArg(x) 798 v.AddArg(y) 799 return true 800 } 801 } 802 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 803 b := v.Block 804 _ = b 805 // match: (AddPtr x y) 806 // cond: 807 // result: (ADD x y) 808 for { 809 x := v.Args[0] 810 y := v.Args[1] 811 v.reset(OpS390XADD) 812 v.AddArg(x) 813 v.AddArg(y) 814 return true 815 } 816 } 817 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 818 b := v.Block 819 _ = b 820 // match: (Addr {sym} base) 821 // cond: 822 // result: (MOVDaddr {sym} base) 823 for { 824 sym := v.Aux 825 base := v.Args[0] 826 v.reset(OpS390XMOVDaddr) 827 v.Aux = sym 828 v.AddArg(base) 829 return true 830 } 831 } 832 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 833 b := v.Block 834 _ = b 835 // match: (And16 x y) 836 // cond: 837 // result: (ANDW x y) 838 for { 839 x := v.Args[0] 840 y := v.Args[1] 841 v.reset(OpS390XANDW) 842 v.AddArg(x) 843 v.AddArg(y) 844 return true 845 } 846 } 847 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 848 b := v.Block 849 _ = b 850 // match: (And32 x y) 851 // cond: 852 // result: (ANDW x y) 853 for { 854 x := v.Args[0] 855 y := v.Args[1] 856 v.reset(OpS390XANDW) 857 v.AddArg(x) 858 v.AddArg(y) 859 return true 860 } 861 } 862 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 863 b := v.Block 864 _ = b 865 // match: (And64 x y) 866 // cond: 867 // result: (AND x y) 868 for { 869 x := v.Args[0] 870 y := v.Args[1] 871 v.reset(OpS390XAND) 872 v.AddArg(x) 873 v.AddArg(y) 874 return true 875 } 876 } 877 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 878 b := v.Block 879 _ = b 880 // match: (And8 x y) 881 // cond: 882 // result: (ANDW x y) 883 for { 884 x := v.Args[0] 885 y := v.Args[1] 886 v.reset(OpS390XANDW) 887 v.AddArg(x) 888 v.AddArg(y) 889 return true 890 } 891 } 892 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 893 b := v.Block 894 _ = b 895 // match: (AndB x y) 896 // cond: 897 // result: (ANDW x y) 898 for { 899 x := v.Args[0] 900 y := v.Args[1] 901 v.reset(OpS390XANDW) 902 v.AddArg(x) 903 v.AddArg(y) 904 return true 905 } 906 } 907 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 908 b := v.Block 909 _ = b 910 // match: (AtomicAdd32 ptr val mem) 911 // cond: 912 // result: (AddTupleFirst32 (LAA ptr val mem) val) 913 for { 914 ptr := v.Args[0] 915 val := v.Args[1] 916 mem := v.Args[2] 917 v.reset(OpS390XAddTupleFirst32) 918 v0 := b.NewValue0(v.Line, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 919 v0.AddArg(ptr) 920 v0.AddArg(val) 921 v0.AddArg(mem) 922 v.AddArg(v0) 923 v.AddArg(val) 924 return true 925 } 926 } 927 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 928 b := v.Block 929 _ = b 930 // match: (AtomicAdd64 ptr val mem) 931 // cond: 932 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 933 for { 934 ptr := v.Args[0] 935 val := v.Args[1] 936 mem := v.Args[2] 937 v.reset(OpS390XAddTupleFirst64) 938 v0 := b.NewValue0(v.Line, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 939 v0.AddArg(ptr) 940 v0.AddArg(val) 941 v0.AddArg(mem) 942 v.AddArg(v0) 943 v.AddArg(val) 944 return true 945 } 946 } 947 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 948 b := v.Block 949 _ = b 950 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 951 // cond: 952 // result: (LoweredAtomicCas32 ptr old new_ mem) 953 for { 954 ptr := v.Args[0] 955 old := v.Args[1] 956 new_ := v.Args[2] 957 mem := v.Args[3] 958 v.reset(OpS390XLoweredAtomicCas32) 959 v.AddArg(ptr) 960 v.AddArg(old) 961 v.AddArg(new_) 962 v.AddArg(mem) 963 return true 964 } 965 } 966 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 967 b := v.Block 968 _ = b 969 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 970 // cond: 971 // result: (LoweredAtomicCas64 ptr old new_ mem) 972 for { 973 ptr := v.Args[0] 974 old := v.Args[1] 975 new_ := v.Args[2] 976 mem := v.Args[3] 977 v.reset(OpS390XLoweredAtomicCas64) 978 v.AddArg(ptr) 979 v.AddArg(old) 980 v.AddArg(new_) 981 v.AddArg(mem) 982 return true 983 } 984 } 985 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 986 b := v.Block 987 _ = b 988 // match: (AtomicExchange32 ptr val mem) 989 // cond: 990 // result: (LoweredAtomicExchange32 ptr val mem) 991 for { 992 ptr := v.Args[0] 993 val := v.Args[1] 994 mem := v.Args[2] 995 v.reset(OpS390XLoweredAtomicExchange32) 996 v.AddArg(ptr) 997 v.AddArg(val) 998 v.AddArg(mem) 999 return true 1000 } 1001 } 1002 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1003 b := v.Block 1004 _ = b 1005 // match: (AtomicExchange64 ptr val mem) 1006 // cond: 1007 // result: (LoweredAtomicExchange64 ptr val mem) 1008 for { 1009 ptr := v.Args[0] 1010 val := v.Args[1] 1011 mem := v.Args[2] 1012 v.reset(OpS390XLoweredAtomicExchange64) 1013 v.AddArg(ptr) 1014 v.AddArg(val) 1015 v.AddArg(mem) 1016 return true 1017 } 1018 } 1019 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1020 b := v.Block 1021 _ = b 1022 // match: (AtomicLoad32 ptr mem) 1023 // cond: 1024 // result: (MOVWZatomicload ptr mem) 1025 for { 1026 ptr := v.Args[0] 1027 mem := v.Args[1] 1028 v.reset(OpS390XMOVWZatomicload) 1029 v.AddArg(ptr) 1030 v.AddArg(mem) 1031 return true 1032 } 1033 } 1034 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1035 b := v.Block 1036 _ = b 1037 // match: (AtomicLoad64 ptr mem) 1038 // cond: 1039 // result: (MOVDatomicload ptr mem) 1040 for { 1041 ptr := v.Args[0] 1042 mem := v.Args[1] 1043 v.reset(OpS390XMOVDatomicload) 1044 v.AddArg(ptr) 1045 v.AddArg(mem) 1046 return true 1047 } 1048 } 1049 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1050 b := v.Block 1051 _ = b 1052 // match: (AtomicLoadPtr ptr mem) 1053 // cond: 1054 // result: (MOVDatomicload ptr mem) 1055 for { 1056 ptr := v.Args[0] 1057 mem := v.Args[1] 1058 v.reset(OpS390XMOVDatomicload) 1059 v.AddArg(ptr) 1060 v.AddArg(mem) 1061 return true 1062 } 1063 } 1064 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1065 b := v.Block 1066 _ = b 1067 // match: (AtomicStore32 ptr val mem) 1068 // cond: 1069 // result: (MOVWatomicstore ptr val mem) 1070 for { 1071 ptr := v.Args[0] 1072 val := v.Args[1] 1073 mem := v.Args[2] 1074 v.reset(OpS390XMOVWatomicstore) 1075 v.AddArg(ptr) 1076 v.AddArg(val) 1077 v.AddArg(mem) 1078 return true 1079 } 1080 } 1081 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1082 b := v.Block 1083 _ = b 1084 // match: (AtomicStore64 ptr val mem) 1085 // cond: 1086 // result: (MOVDatomicstore ptr val mem) 1087 for { 1088 ptr := v.Args[0] 1089 val := v.Args[1] 1090 mem := v.Args[2] 1091 v.reset(OpS390XMOVDatomicstore) 1092 v.AddArg(ptr) 1093 v.AddArg(val) 1094 v.AddArg(mem) 1095 return true 1096 } 1097 } 1098 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1099 b := v.Block 1100 _ = b 1101 // match: (AtomicStorePtrNoWB ptr val mem) 1102 // cond: 1103 // result: (MOVDatomicstore ptr val mem) 1104 for { 1105 ptr := v.Args[0] 1106 val := v.Args[1] 1107 mem := v.Args[2] 1108 v.reset(OpS390XMOVDatomicstore) 1109 v.AddArg(ptr) 1110 v.AddArg(val) 1111 v.AddArg(mem) 1112 return true 1113 } 1114 } 1115 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1116 b := v.Block 1117 _ = b 1118 // match: (Avg64u <t> x y) 1119 // cond: 1120 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1121 for { 1122 t := v.Type 1123 x := v.Args[0] 1124 y := v.Args[1] 1125 v.reset(OpS390XADD) 1126 v0 := b.NewValue0(v.Line, OpS390XADD, t) 1127 v1 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1128 v1.AuxInt = 1 1129 v1.AddArg(x) 1130 v0.AddArg(v1) 1131 v2 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1132 v2.AuxInt = 1 1133 v2.AddArg(y) 1134 v0.AddArg(v2) 1135 v.AddArg(v0) 1136 v3 := b.NewValue0(v.Line, OpS390XANDconst, t) 1137 v3.AuxInt = 1 1138 v4 := b.NewValue0(v.Line, OpS390XAND, t) 1139 v4.AddArg(x) 1140 v4.AddArg(y) 1141 v3.AddArg(v4) 1142 v.AddArg(v3) 1143 return true 1144 } 1145 } 1146 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1147 b := v.Block 1148 _ = b 1149 // match: (Bswap32 x) 1150 // cond: 1151 // result: (MOVWBR x) 1152 for { 1153 x := v.Args[0] 1154 v.reset(OpS390XMOVWBR) 1155 v.AddArg(x) 1156 return true 1157 } 1158 } 1159 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1160 b := v.Block 1161 _ = b 1162 // match: (Bswap64 x) 1163 // cond: 1164 // result: (MOVDBR x) 1165 for { 1166 x := v.Args[0] 1167 v.reset(OpS390XMOVDBR) 1168 v.AddArg(x) 1169 return true 1170 } 1171 } 1172 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1173 b := v.Block 1174 _ = b 1175 // match: (ClosureCall [argwid] entry closure mem) 1176 // cond: 1177 // result: (CALLclosure [argwid] entry closure mem) 1178 for { 1179 argwid := v.AuxInt 1180 entry := v.Args[0] 1181 closure := v.Args[1] 1182 mem := v.Args[2] 1183 v.reset(OpS390XCALLclosure) 1184 v.AuxInt = argwid 1185 v.AddArg(entry) 1186 v.AddArg(closure) 1187 v.AddArg(mem) 1188 return true 1189 } 1190 } 1191 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1192 b := v.Block 1193 _ = b 1194 // match: (Com16 x) 1195 // cond: 1196 // result: (NOTW x) 1197 for { 1198 x := v.Args[0] 1199 v.reset(OpS390XNOTW) 1200 v.AddArg(x) 1201 return true 1202 } 1203 } 1204 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1205 b := v.Block 1206 _ = b 1207 // match: (Com32 x) 1208 // cond: 1209 // result: (NOTW x) 1210 for { 1211 x := v.Args[0] 1212 v.reset(OpS390XNOTW) 1213 v.AddArg(x) 1214 return true 1215 } 1216 } 1217 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1218 b := v.Block 1219 _ = b 1220 // match: (Com64 x) 1221 // cond: 1222 // result: (NOT x) 1223 for { 1224 x := v.Args[0] 1225 v.reset(OpS390XNOT) 1226 v.AddArg(x) 1227 return true 1228 } 1229 } 1230 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1231 b := v.Block 1232 _ = b 1233 // match: (Com8 x) 1234 // cond: 1235 // result: (NOTW x) 1236 for { 1237 x := v.Args[0] 1238 v.reset(OpS390XNOTW) 1239 v.AddArg(x) 1240 return true 1241 } 1242 } 1243 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1244 b := v.Block 1245 _ = b 1246 // match: (Const16 [val]) 1247 // cond: 1248 // result: (MOVDconst [val]) 1249 for { 1250 val := v.AuxInt 1251 v.reset(OpS390XMOVDconst) 1252 v.AuxInt = val 1253 return true 1254 } 1255 } 1256 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1257 b := v.Block 1258 _ = b 1259 // match: (Const32 [val]) 1260 // cond: 1261 // result: (MOVDconst [val]) 1262 for { 1263 val := v.AuxInt 1264 v.reset(OpS390XMOVDconst) 1265 v.AuxInt = val 1266 return true 1267 } 1268 } 1269 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1270 b := v.Block 1271 _ = b 1272 // match: (Const32F [val]) 1273 // cond: 1274 // result: (FMOVSconst [val]) 1275 for { 1276 val := v.AuxInt 1277 v.reset(OpS390XFMOVSconst) 1278 v.AuxInt = val 1279 return true 1280 } 1281 } 1282 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1283 b := v.Block 1284 _ = b 1285 // match: (Const64 [val]) 1286 // cond: 1287 // result: (MOVDconst [val]) 1288 for { 1289 val := v.AuxInt 1290 v.reset(OpS390XMOVDconst) 1291 v.AuxInt = val 1292 return true 1293 } 1294 } 1295 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1296 b := v.Block 1297 _ = b 1298 // match: (Const64F [val]) 1299 // cond: 1300 // result: (FMOVDconst [val]) 1301 for { 1302 val := v.AuxInt 1303 v.reset(OpS390XFMOVDconst) 1304 v.AuxInt = val 1305 return true 1306 } 1307 } 1308 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1309 b := v.Block 1310 _ = b 1311 // match: (Const8 [val]) 1312 // cond: 1313 // result: (MOVDconst [val]) 1314 for { 1315 val := v.AuxInt 1316 v.reset(OpS390XMOVDconst) 1317 v.AuxInt = val 1318 return true 1319 } 1320 } 1321 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1322 b := v.Block 1323 _ = b 1324 // match: (ConstBool [b]) 1325 // cond: 1326 // result: (MOVDconst [b]) 1327 for { 1328 b := v.AuxInt 1329 v.reset(OpS390XMOVDconst) 1330 v.AuxInt = b 1331 return true 1332 } 1333 } 1334 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1335 b := v.Block 1336 _ = b 1337 // match: (ConstNil) 1338 // cond: 1339 // result: (MOVDconst [0]) 1340 for { 1341 v.reset(OpS390XMOVDconst) 1342 v.AuxInt = 0 1343 return true 1344 } 1345 } 1346 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1347 b := v.Block 1348 _ = b 1349 // match: (Convert <t> x mem) 1350 // cond: 1351 // result: (MOVDconvert <t> x mem) 1352 for { 1353 t := v.Type 1354 x := v.Args[0] 1355 mem := v.Args[1] 1356 v.reset(OpS390XMOVDconvert) 1357 v.Type = t 1358 v.AddArg(x) 1359 v.AddArg(mem) 1360 return true 1361 } 1362 } 1363 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1364 b := v.Block 1365 _ = b 1366 // match: (Ctz32 <t> x) 1367 // cond: 1368 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1369 for { 1370 t := v.Type 1371 x := v.Args[0] 1372 v.reset(OpS390XSUB) 1373 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1374 v0.AuxInt = 64 1375 v.AddArg(v0) 1376 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1377 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1378 v3 := b.NewValue0(v.Line, OpS390XANDW, t) 1379 v4 := b.NewValue0(v.Line, OpS390XSUBWconst, t) 1380 v4.AuxInt = 1 1381 v4.AddArg(x) 1382 v3.AddArg(v4) 1383 v5 := b.NewValue0(v.Line, OpS390XNOTW, t) 1384 v5.AddArg(x) 1385 v3.AddArg(v5) 1386 v2.AddArg(v3) 1387 v1.AddArg(v2) 1388 v.AddArg(v1) 1389 return true 1390 } 1391 } 1392 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1393 b := v.Block 1394 _ = b 1395 // match: (Ctz64 <t> x) 1396 // cond: 1397 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1398 for { 1399 t := v.Type 1400 x := v.Args[0] 1401 v.reset(OpS390XSUB) 1402 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1403 v0.AuxInt = 64 1404 v.AddArg(v0) 1405 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1406 v2 := b.NewValue0(v.Line, OpS390XAND, t) 1407 v3 := b.NewValue0(v.Line, OpS390XSUBconst, t) 1408 v3.AuxInt = 1 1409 v3.AddArg(x) 1410 v2.AddArg(v3) 1411 v4 := b.NewValue0(v.Line, OpS390XNOT, t) 1412 v4.AddArg(x) 1413 v2.AddArg(v4) 1414 v1.AddArg(v2) 1415 v.AddArg(v1) 1416 return true 1417 } 1418 } 1419 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1420 b := v.Block 1421 _ = b 1422 // match: (Cvt32Fto32 x) 1423 // cond: 1424 // result: (CFEBRA x) 1425 for { 1426 x := v.Args[0] 1427 v.reset(OpS390XCFEBRA) 1428 v.AddArg(x) 1429 return true 1430 } 1431 } 1432 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1433 b := v.Block 1434 _ = b 1435 // match: (Cvt32Fto64 x) 1436 // cond: 1437 // result: (CGEBRA x) 1438 for { 1439 x := v.Args[0] 1440 v.reset(OpS390XCGEBRA) 1441 v.AddArg(x) 1442 return true 1443 } 1444 } 1445 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1446 b := v.Block 1447 _ = b 1448 // match: (Cvt32Fto64F x) 1449 // cond: 1450 // result: (LDEBR x) 1451 for { 1452 x := v.Args[0] 1453 v.reset(OpS390XLDEBR) 1454 v.AddArg(x) 1455 return true 1456 } 1457 } 1458 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1459 b := v.Block 1460 _ = b 1461 // match: (Cvt32to32F x) 1462 // cond: 1463 // result: (CEFBRA x) 1464 for { 1465 x := v.Args[0] 1466 v.reset(OpS390XCEFBRA) 1467 v.AddArg(x) 1468 return true 1469 } 1470 } 1471 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1472 b := v.Block 1473 _ = b 1474 // match: (Cvt32to64F x) 1475 // cond: 1476 // result: (CDFBRA x) 1477 for { 1478 x := v.Args[0] 1479 v.reset(OpS390XCDFBRA) 1480 v.AddArg(x) 1481 return true 1482 } 1483 } 1484 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1485 b := v.Block 1486 _ = b 1487 // match: (Cvt64Fto32 x) 1488 // cond: 1489 // result: (CFDBRA x) 1490 for { 1491 x := v.Args[0] 1492 v.reset(OpS390XCFDBRA) 1493 v.AddArg(x) 1494 return true 1495 } 1496 } 1497 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1498 b := v.Block 1499 _ = b 1500 // match: (Cvt64Fto32F x) 1501 // cond: 1502 // result: (LEDBR x) 1503 for { 1504 x := v.Args[0] 1505 v.reset(OpS390XLEDBR) 1506 v.AddArg(x) 1507 return true 1508 } 1509 } 1510 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1511 b := v.Block 1512 _ = b 1513 // match: (Cvt64Fto64 x) 1514 // cond: 1515 // result: (CGDBRA x) 1516 for { 1517 x := v.Args[0] 1518 v.reset(OpS390XCGDBRA) 1519 v.AddArg(x) 1520 return true 1521 } 1522 } 1523 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1524 b := v.Block 1525 _ = b 1526 // match: (Cvt64to32F x) 1527 // cond: 1528 // result: (CEGBRA x) 1529 for { 1530 x := v.Args[0] 1531 v.reset(OpS390XCEGBRA) 1532 v.AddArg(x) 1533 return true 1534 } 1535 } 1536 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1537 b := v.Block 1538 _ = b 1539 // match: (Cvt64to64F x) 1540 // cond: 1541 // result: (CDGBRA x) 1542 for { 1543 x := v.Args[0] 1544 v.reset(OpS390XCDGBRA) 1545 v.AddArg(x) 1546 return true 1547 } 1548 } 1549 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1550 b := v.Block 1551 _ = b 1552 // match: (DeferCall [argwid] mem) 1553 // cond: 1554 // result: (CALLdefer [argwid] mem) 1555 for { 1556 argwid := v.AuxInt 1557 mem := v.Args[0] 1558 v.reset(OpS390XCALLdefer) 1559 v.AuxInt = argwid 1560 v.AddArg(mem) 1561 return true 1562 } 1563 } 1564 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1565 b := v.Block 1566 _ = b 1567 // match: (Div16 x y) 1568 // cond: 1569 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1570 for { 1571 x := v.Args[0] 1572 y := v.Args[1] 1573 v.reset(OpS390XDIVW) 1574 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1575 v0.AddArg(x) 1576 v.AddArg(v0) 1577 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1578 v1.AddArg(y) 1579 v.AddArg(v1) 1580 return true 1581 } 1582 } 1583 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1584 b := v.Block 1585 _ = b 1586 // match: (Div16u x y) 1587 // cond: 1588 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1589 for { 1590 x := v.Args[0] 1591 y := v.Args[1] 1592 v.reset(OpS390XDIVWU) 1593 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1594 v0.AddArg(x) 1595 v.AddArg(v0) 1596 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1597 v1.AddArg(y) 1598 v.AddArg(v1) 1599 return true 1600 } 1601 } 1602 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1603 b := v.Block 1604 _ = b 1605 // match: (Div32 x y) 1606 // cond: 1607 // result: (DIVW (MOVWreg x) y) 1608 for { 1609 x := v.Args[0] 1610 y := v.Args[1] 1611 v.reset(OpS390XDIVW) 1612 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 1613 v0.AddArg(x) 1614 v.AddArg(v0) 1615 v.AddArg(y) 1616 return true 1617 } 1618 } 1619 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1620 b := v.Block 1621 _ = b 1622 // match: (Div32F x y) 1623 // cond: 1624 // result: (FDIVS x y) 1625 for { 1626 x := v.Args[0] 1627 y := v.Args[1] 1628 v.reset(OpS390XFDIVS) 1629 v.AddArg(x) 1630 v.AddArg(y) 1631 return true 1632 } 1633 } 1634 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1635 b := v.Block 1636 _ = b 1637 // match: (Div32u x y) 1638 // cond: 1639 // result: (DIVWU (MOVWZreg x) y) 1640 for { 1641 x := v.Args[0] 1642 y := v.Args[1] 1643 v.reset(OpS390XDIVWU) 1644 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1645 v0.AddArg(x) 1646 v.AddArg(v0) 1647 v.AddArg(y) 1648 return true 1649 } 1650 } 1651 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1652 b := v.Block 1653 _ = b 1654 // match: (Div64 x y) 1655 // cond: 1656 // result: (DIVD x y) 1657 for { 1658 x := v.Args[0] 1659 y := v.Args[1] 1660 v.reset(OpS390XDIVD) 1661 v.AddArg(x) 1662 v.AddArg(y) 1663 return true 1664 } 1665 } 1666 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1667 b := v.Block 1668 _ = b 1669 // match: (Div64F x y) 1670 // cond: 1671 // result: (FDIV x y) 1672 for { 1673 x := v.Args[0] 1674 y := v.Args[1] 1675 v.reset(OpS390XFDIV) 1676 v.AddArg(x) 1677 v.AddArg(y) 1678 return true 1679 } 1680 } 1681 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1682 b := v.Block 1683 _ = b 1684 // match: (Div64u x y) 1685 // cond: 1686 // result: (DIVDU x y) 1687 for { 1688 x := v.Args[0] 1689 y := v.Args[1] 1690 v.reset(OpS390XDIVDU) 1691 v.AddArg(x) 1692 v.AddArg(y) 1693 return true 1694 } 1695 } 1696 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1697 b := v.Block 1698 _ = b 1699 // match: (Div8 x y) 1700 // cond: 1701 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1702 for { 1703 x := v.Args[0] 1704 y := v.Args[1] 1705 v.reset(OpS390XDIVW) 1706 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1707 v0.AddArg(x) 1708 v.AddArg(v0) 1709 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1710 v1.AddArg(y) 1711 v.AddArg(v1) 1712 return true 1713 } 1714 } 1715 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1716 b := v.Block 1717 _ = b 1718 // match: (Div8u x y) 1719 // cond: 1720 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1721 for { 1722 x := v.Args[0] 1723 y := v.Args[1] 1724 v.reset(OpS390XDIVWU) 1725 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1726 v0.AddArg(x) 1727 v.AddArg(v0) 1728 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1729 v1.AddArg(y) 1730 v.AddArg(v1) 1731 return true 1732 } 1733 } 1734 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1735 b := v.Block 1736 _ = b 1737 // match: (Eq16 x y) 1738 // cond: 1739 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1740 for { 1741 x := v.Args[0] 1742 y := v.Args[1] 1743 v.reset(OpS390XMOVDEQ) 1744 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1745 v0.AuxInt = 0 1746 v.AddArg(v0) 1747 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1748 v1.AuxInt = 1 1749 v.AddArg(v1) 1750 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1751 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1752 v3.AddArg(x) 1753 v2.AddArg(v3) 1754 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1755 v4.AddArg(y) 1756 v2.AddArg(v4) 1757 v.AddArg(v2) 1758 return true 1759 } 1760 } 1761 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1762 b := v.Block 1763 _ = b 1764 // match: (Eq32 x y) 1765 // cond: 1766 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1767 for { 1768 x := v.Args[0] 1769 y := v.Args[1] 1770 v.reset(OpS390XMOVDEQ) 1771 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1772 v0.AuxInt = 0 1773 v.AddArg(v0) 1774 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1775 v1.AuxInt = 1 1776 v.AddArg(v1) 1777 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 1778 v2.AddArg(x) 1779 v2.AddArg(y) 1780 v.AddArg(v2) 1781 return true 1782 } 1783 } 1784 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1785 b := v.Block 1786 _ = b 1787 // match: (Eq32F x y) 1788 // cond: 1789 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1790 for { 1791 x := v.Args[0] 1792 y := v.Args[1] 1793 v.reset(OpS390XMOVDEQ) 1794 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1795 v0.AuxInt = 0 1796 v.AddArg(v0) 1797 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1798 v1.AuxInt = 1 1799 v.AddArg(v1) 1800 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 1801 v2.AddArg(x) 1802 v2.AddArg(y) 1803 v.AddArg(v2) 1804 return true 1805 } 1806 } 1807 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1808 b := v.Block 1809 _ = b 1810 // match: (Eq64 x y) 1811 // cond: 1812 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1813 for { 1814 x := v.Args[0] 1815 y := v.Args[1] 1816 v.reset(OpS390XMOVDEQ) 1817 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1818 v0.AuxInt = 0 1819 v.AddArg(v0) 1820 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1821 v1.AuxInt = 1 1822 v.AddArg(v1) 1823 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1824 v2.AddArg(x) 1825 v2.AddArg(y) 1826 v.AddArg(v2) 1827 return true 1828 } 1829 } 1830 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1831 b := v.Block 1832 _ = b 1833 // match: (Eq64F x y) 1834 // cond: 1835 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1836 for { 1837 x := v.Args[0] 1838 y := v.Args[1] 1839 v.reset(OpS390XMOVDEQ) 1840 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1841 v0.AuxInt = 0 1842 v.AddArg(v0) 1843 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1844 v1.AuxInt = 1 1845 v.AddArg(v1) 1846 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 1847 v2.AddArg(x) 1848 v2.AddArg(y) 1849 v.AddArg(v2) 1850 return true 1851 } 1852 } 1853 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1854 b := v.Block 1855 _ = b 1856 // match: (Eq8 x y) 1857 // cond: 1858 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1859 for { 1860 x := v.Args[0] 1861 y := v.Args[1] 1862 v.reset(OpS390XMOVDEQ) 1863 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1864 v0.AuxInt = 0 1865 v.AddArg(v0) 1866 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1867 v1.AuxInt = 1 1868 v.AddArg(v1) 1869 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1870 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1871 v3.AddArg(x) 1872 v2.AddArg(v3) 1873 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1874 v4.AddArg(y) 1875 v2.AddArg(v4) 1876 v.AddArg(v2) 1877 return true 1878 } 1879 } 1880 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1881 b := v.Block 1882 _ = b 1883 // match: (EqB x y) 1884 // cond: 1885 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1886 for { 1887 x := v.Args[0] 1888 y := v.Args[1] 1889 v.reset(OpS390XMOVDEQ) 1890 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1891 v0.AuxInt = 0 1892 v.AddArg(v0) 1893 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1894 v1.AuxInt = 1 1895 v.AddArg(v1) 1896 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1897 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1898 v3.AddArg(x) 1899 v2.AddArg(v3) 1900 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1901 v4.AddArg(y) 1902 v2.AddArg(v4) 1903 v.AddArg(v2) 1904 return true 1905 } 1906 } 1907 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1908 b := v.Block 1909 _ = b 1910 // match: (EqPtr x y) 1911 // cond: 1912 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1913 for { 1914 x := v.Args[0] 1915 y := v.Args[1] 1916 v.reset(OpS390XMOVDEQ) 1917 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1918 v0.AuxInt = 0 1919 v.AddArg(v0) 1920 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1921 v1.AuxInt = 1 1922 v.AddArg(v1) 1923 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1924 v2.AddArg(x) 1925 v2.AddArg(y) 1926 v.AddArg(v2) 1927 return true 1928 } 1929 } 1930 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1931 b := v.Block 1932 _ = b 1933 // match: (Geq16 x y) 1934 // cond: 1935 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1936 for { 1937 x := v.Args[0] 1938 y := v.Args[1] 1939 v.reset(OpS390XMOVDGE) 1940 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1941 v0.AuxInt = 0 1942 v.AddArg(v0) 1943 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1944 v1.AuxInt = 1 1945 v.AddArg(v1) 1946 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1947 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1948 v3.AddArg(x) 1949 v2.AddArg(v3) 1950 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1951 v4.AddArg(y) 1952 v2.AddArg(v4) 1953 v.AddArg(v2) 1954 return true 1955 } 1956 } 1957 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1958 b := v.Block 1959 _ = b 1960 // match: (Geq16U x y) 1961 // cond: 1962 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1963 for { 1964 x := v.Args[0] 1965 y := v.Args[1] 1966 v.reset(OpS390XMOVDGE) 1967 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1968 v0.AuxInt = 0 1969 v.AddArg(v0) 1970 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1971 v1.AuxInt = 1 1972 v.AddArg(v1) 1973 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 1974 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1975 v3.AddArg(x) 1976 v2.AddArg(v3) 1977 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1978 v4.AddArg(y) 1979 v2.AddArg(v4) 1980 v.AddArg(v2) 1981 return true 1982 } 1983 } 1984 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1985 b := v.Block 1986 _ = b 1987 // match: (Geq32 x y) 1988 // cond: 1989 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1990 for { 1991 x := v.Args[0] 1992 y := v.Args[1] 1993 v.reset(OpS390XMOVDGE) 1994 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1995 v0.AuxInt = 0 1996 v.AddArg(v0) 1997 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1998 v1.AuxInt = 1 1999 v.AddArg(v1) 2000 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2001 v2.AddArg(x) 2002 v2.AddArg(y) 2003 v.AddArg(v2) 2004 return true 2005 } 2006 } 2007 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2008 b := v.Block 2009 _ = b 2010 // match: (Geq32F x y) 2011 // cond: 2012 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2013 for { 2014 x := v.Args[0] 2015 y := v.Args[1] 2016 v.reset(OpS390XMOVDGEnoinv) 2017 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2018 v0.AuxInt = 0 2019 v.AddArg(v0) 2020 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2021 v1.AuxInt = 1 2022 v.AddArg(v1) 2023 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2024 v2.AddArg(x) 2025 v2.AddArg(y) 2026 v.AddArg(v2) 2027 return true 2028 } 2029 } 2030 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2031 b := v.Block 2032 _ = b 2033 // match: (Geq32U x y) 2034 // cond: 2035 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2036 for { 2037 x := v.Args[0] 2038 y := v.Args[1] 2039 v.reset(OpS390XMOVDGE) 2040 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2041 v0.AuxInt = 0 2042 v.AddArg(v0) 2043 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2044 v1.AuxInt = 1 2045 v.AddArg(v1) 2046 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2047 v2.AddArg(x) 2048 v2.AddArg(y) 2049 v.AddArg(v2) 2050 return true 2051 } 2052 } 2053 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2054 b := v.Block 2055 _ = b 2056 // match: (Geq64 x y) 2057 // cond: 2058 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2059 for { 2060 x := v.Args[0] 2061 y := v.Args[1] 2062 v.reset(OpS390XMOVDGE) 2063 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2064 v0.AuxInt = 0 2065 v.AddArg(v0) 2066 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2067 v1.AuxInt = 1 2068 v.AddArg(v1) 2069 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2070 v2.AddArg(x) 2071 v2.AddArg(y) 2072 v.AddArg(v2) 2073 return true 2074 } 2075 } 2076 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2077 b := v.Block 2078 _ = b 2079 // match: (Geq64F x y) 2080 // cond: 2081 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2082 for { 2083 x := v.Args[0] 2084 y := v.Args[1] 2085 v.reset(OpS390XMOVDGEnoinv) 2086 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2087 v0.AuxInt = 0 2088 v.AddArg(v0) 2089 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2090 v1.AuxInt = 1 2091 v.AddArg(v1) 2092 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2093 v2.AddArg(x) 2094 v2.AddArg(y) 2095 v.AddArg(v2) 2096 return true 2097 } 2098 } 2099 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2100 b := v.Block 2101 _ = b 2102 // match: (Geq64U x y) 2103 // cond: 2104 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2105 for { 2106 x := v.Args[0] 2107 y := v.Args[1] 2108 v.reset(OpS390XMOVDGE) 2109 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2110 v0.AuxInt = 0 2111 v.AddArg(v0) 2112 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2113 v1.AuxInt = 1 2114 v.AddArg(v1) 2115 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2116 v2.AddArg(x) 2117 v2.AddArg(y) 2118 v.AddArg(v2) 2119 return true 2120 } 2121 } 2122 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2123 b := v.Block 2124 _ = b 2125 // match: (Geq8 x y) 2126 // cond: 2127 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2128 for { 2129 x := v.Args[0] 2130 y := v.Args[1] 2131 v.reset(OpS390XMOVDGE) 2132 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2133 v0.AuxInt = 0 2134 v.AddArg(v0) 2135 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2136 v1.AuxInt = 1 2137 v.AddArg(v1) 2138 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2139 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2140 v3.AddArg(x) 2141 v2.AddArg(v3) 2142 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2143 v4.AddArg(y) 2144 v2.AddArg(v4) 2145 v.AddArg(v2) 2146 return true 2147 } 2148 } 2149 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2150 b := v.Block 2151 _ = b 2152 // match: (Geq8U x y) 2153 // cond: 2154 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2155 for { 2156 x := v.Args[0] 2157 y := v.Args[1] 2158 v.reset(OpS390XMOVDGE) 2159 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2160 v0.AuxInt = 0 2161 v.AddArg(v0) 2162 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2163 v1.AuxInt = 1 2164 v.AddArg(v1) 2165 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2166 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2167 v3.AddArg(x) 2168 v2.AddArg(v3) 2169 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2170 v4.AddArg(y) 2171 v2.AddArg(v4) 2172 v.AddArg(v2) 2173 return true 2174 } 2175 } 2176 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2177 b := v.Block 2178 _ = b 2179 // match: (GetClosurePtr) 2180 // cond: 2181 // result: (LoweredGetClosurePtr) 2182 for { 2183 v.reset(OpS390XLoweredGetClosurePtr) 2184 return true 2185 } 2186 } 2187 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2188 b := v.Block 2189 _ = b 2190 // match: (GetG mem) 2191 // cond: 2192 // result: (LoweredGetG mem) 2193 for { 2194 mem := v.Args[0] 2195 v.reset(OpS390XLoweredGetG) 2196 v.AddArg(mem) 2197 return true 2198 } 2199 } 2200 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2201 b := v.Block 2202 _ = b 2203 // match: (GoCall [argwid] mem) 2204 // cond: 2205 // result: (CALLgo [argwid] mem) 2206 for { 2207 argwid := v.AuxInt 2208 mem := v.Args[0] 2209 v.reset(OpS390XCALLgo) 2210 v.AuxInt = argwid 2211 v.AddArg(mem) 2212 return true 2213 } 2214 } 2215 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2216 b := v.Block 2217 _ = b 2218 // match: (Greater16 x y) 2219 // cond: 2220 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2221 for { 2222 x := v.Args[0] 2223 y := v.Args[1] 2224 v.reset(OpS390XMOVDGT) 2225 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2226 v0.AuxInt = 0 2227 v.AddArg(v0) 2228 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2229 v1.AuxInt = 1 2230 v.AddArg(v1) 2231 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2232 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2233 v3.AddArg(x) 2234 v2.AddArg(v3) 2235 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2236 v4.AddArg(y) 2237 v2.AddArg(v4) 2238 v.AddArg(v2) 2239 return true 2240 } 2241 } 2242 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2243 b := v.Block 2244 _ = b 2245 // match: (Greater16U x y) 2246 // cond: 2247 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2248 for { 2249 x := v.Args[0] 2250 y := v.Args[1] 2251 v.reset(OpS390XMOVDGT) 2252 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2253 v0.AuxInt = 0 2254 v.AddArg(v0) 2255 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2256 v1.AuxInt = 1 2257 v.AddArg(v1) 2258 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2259 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2260 v3.AddArg(x) 2261 v2.AddArg(v3) 2262 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2263 v4.AddArg(y) 2264 v2.AddArg(v4) 2265 v.AddArg(v2) 2266 return true 2267 } 2268 } 2269 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2270 b := v.Block 2271 _ = b 2272 // match: (Greater32 x y) 2273 // cond: 2274 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2275 for { 2276 x := v.Args[0] 2277 y := v.Args[1] 2278 v.reset(OpS390XMOVDGT) 2279 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2280 v0.AuxInt = 0 2281 v.AddArg(v0) 2282 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2283 v1.AuxInt = 1 2284 v.AddArg(v1) 2285 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2286 v2.AddArg(x) 2287 v2.AddArg(y) 2288 v.AddArg(v2) 2289 return true 2290 } 2291 } 2292 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2293 b := v.Block 2294 _ = b 2295 // match: (Greater32F x y) 2296 // cond: 2297 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2298 for { 2299 x := v.Args[0] 2300 y := v.Args[1] 2301 v.reset(OpS390XMOVDGTnoinv) 2302 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2303 v0.AuxInt = 0 2304 v.AddArg(v0) 2305 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2306 v1.AuxInt = 1 2307 v.AddArg(v1) 2308 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2309 v2.AddArg(x) 2310 v2.AddArg(y) 2311 v.AddArg(v2) 2312 return true 2313 } 2314 } 2315 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2316 b := v.Block 2317 _ = b 2318 // match: (Greater32U x y) 2319 // cond: 2320 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2321 for { 2322 x := v.Args[0] 2323 y := v.Args[1] 2324 v.reset(OpS390XMOVDGT) 2325 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2326 v0.AuxInt = 0 2327 v.AddArg(v0) 2328 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2329 v1.AuxInt = 1 2330 v.AddArg(v1) 2331 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2332 v2.AddArg(x) 2333 v2.AddArg(y) 2334 v.AddArg(v2) 2335 return true 2336 } 2337 } 2338 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2339 b := v.Block 2340 _ = b 2341 // match: (Greater64 x y) 2342 // cond: 2343 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2344 for { 2345 x := v.Args[0] 2346 y := v.Args[1] 2347 v.reset(OpS390XMOVDGT) 2348 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2349 v0.AuxInt = 0 2350 v.AddArg(v0) 2351 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2352 v1.AuxInt = 1 2353 v.AddArg(v1) 2354 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2355 v2.AddArg(x) 2356 v2.AddArg(y) 2357 v.AddArg(v2) 2358 return true 2359 } 2360 } 2361 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2362 b := v.Block 2363 _ = b 2364 // match: (Greater64F x y) 2365 // cond: 2366 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2367 for { 2368 x := v.Args[0] 2369 y := v.Args[1] 2370 v.reset(OpS390XMOVDGTnoinv) 2371 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2372 v0.AuxInt = 0 2373 v.AddArg(v0) 2374 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2375 v1.AuxInt = 1 2376 v.AddArg(v1) 2377 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2378 v2.AddArg(x) 2379 v2.AddArg(y) 2380 v.AddArg(v2) 2381 return true 2382 } 2383 } 2384 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2385 b := v.Block 2386 _ = b 2387 // match: (Greater64U x y) 2388 // cond: 2389 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2390 for { 2391 x := v.Args[0] 2392 y := v.Args[1] 2393 v.reset(OpS390XMOVDGT) 2394 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2395 v0.AuxInt = 0 2396 v.AddArg(v0) 2397 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2398 v1.AuxInt = 1 2399 v.AddArg(v1) 2400 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2401 v2.AddArg(x) 2402 v2.AddArg(y) 2403 v.AddArg(v2) 2404 return true 2405 } 2406 } 2407 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2408 b := v.Block 2409 _ = b 2410 // match: (Greater8 x y) 2411 // cond: 2412 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2413 for { 2414 x := v.Args[0] 2415 y := v.Args[1] 2416 v.reset(OpS390XMOVDGT) 2417 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2418 v0.AuxInt = 0 2419 v.AddArg(v0) 2420 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2421 v1.AuxInt = 1 2422 v.AddArg(v1) 2423 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2424 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2425 v3.AddArg(x) 2426 v2.AddArg(v3) 2427 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2428 v4.AddArg(y) 2429 v2.AddArg(v4) 2430 v.AddArg(v2) 2431 return true 2432 } 2433 } 2434 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2435 b := v.Block 2436 _ = b 2437 // match: (Greater8U x y) 2438 // cond: 2439 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2440 for { 2441 x := v.Args[0] 2442 y := v.Args[1] 2443 v.reset(OpS390XMOVDGT) 2444 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2445 v0.AuxInt = 0 2446 v.AddArg(v0) 2447 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2448 v1.AuxInt = 1 2449 v.AddArg(v1) 2450 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2451 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2452 v3.AddArg(x) 2453 v2.AddArg(v3) 2454 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2455 v4.AddArg(y) 2456 v2.AddArg(v4) 2457 v.AddArg(v2) 2458 return true 2459 } 2460 } 2461 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2462 b := v.Block 2463 _ = b 2464 // match: (Hmul16 x y) 2465 // cond: 2466 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2467 for { 2468 x := v.Args[0] 2469 y := v.Args[1] 2470 v.reset(OpS390XSRDconst) 2471 v.AuxInt = 16 2472 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2473 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2474 v1.AddArg(x) 2475 v0.AddArg(v1) 2476 v2 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2477 v2.AddArg(y) 2478 v0.AddArg(v2) 2479 v.AddArg(v0) 2480 return true 2481 } 2482 } 2483 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2484 b := v.Block 2485 _ = b 2486 // match: (Hmul16u x y) 2487 // cond: 2488 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2489 for { 2490 x := v.Args[0] 2491 y := v.Args[1] 2492 v.reset(OpS390XSRDconst) 2493 v.AuxInt = 16 2494 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2495 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2496 v1.AddArg(x) 2497 v0.AddArg(v1) 2498 v2 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2499 v2.AddArg(y) 2500 v0.AddArg(v2) 2501 v.AddArg(v0) 2502 return true 2503 } 2504 } 2505 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2506 b := v.Block 2507 _ = b 2508 // match: (Hmul32 x y) 2509 // cond: 2510 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2511 for { 2512 x := v.Args[0] 2513 y := v.Args[1] 2514 v.reset(OpS390XSRDconst) 2515 v.AuxInt = 32 2516 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2517 v1 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2518 v1.AddArg(x) 2519 v0.AddArg(v1) 2520 v2 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2521 v2.AddArg(y) 2522 v0.AddArg(v2) 2523 v.AddArg(v0) 2524 return true 2525 } 2526 } 2527 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2528 b := v.Block 2529 _ = b 2530 // match: (Hmul32u x y) 2531 // cond: 2532 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2533 for { 2534 x := v.Args[0] 2535 y := v.Args[1] 2536 v.reset(OpS390XSRDconst) 2537 v.AuxInt = 32 2538 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2539 v1 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2540 v1.AddArg(x) 2541 v0.AddArg(v1) 2542 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2543 v2.AddArg(y) 2544 v0.AddArg(v2) 2545 v.AddArg(v0) 2546 return true 2547 } 2548 } 2549 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2550 b := v.Block 2551 _ = b 2552 // match: (Hmul64 x y) 2553 // cond: 2554 // result: (MULHD x y) 2555 for { 2556 x := v.Args[0] 2557 y := v.Args[1] 2558 v.reset(OpS390XMULHD) 2559 v.AddArg(x) 2560 v.AddArg(y) 2561 return true 2562 } 2563 } 2564 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2565 b := v.Block 2566 _ = b 2567 // match: (Hmul64u x y) 2568 // cond: 2569 // result: (MULHDU x y) 2570 for { 2571 x := v.Args[0] 2572 y := v.Args[1] 2573 v.reset(OpS390XMULHDU) 2574 v.AddArg(x) 2575 v.AddArg(y) 2576 return true 2577 } 2578 } 2579 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2580 b := v.Block 2581 _ = b 2582 // match: (Hmul8 x y) 2583 // cond: 2584 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2585 for { 2586 x := v.Args[0] 2587 y := v.Args[1] 2588 v.reset(OpS390XSRDconst) 2589 v.AuxInt = 8 2590 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2591 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2592 v1.AddArg(x) 2593 v0.AddArg(v1) 2594 v2 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2595 v2.AddArg(y) 2596 v0.AddArg(v2) 2597 v.AddArg(v0) 2598 return true 2599 } 2600 } 2601 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2602 b := v.Block 2603 _ = b 2604 // match: (Hmul8u x y) 2605 // cond: 2606 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2607 for { 2608 x := v.Args[0] 2609 y := v.Args[1] 2610 v.reset(OpS390XSRDconst) 2611 v.AuxInt = 8 2612 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2613 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2614 v1.AddArg(x) 2615 v0.AddArg(v1) 2616 v2 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2617 v2.AddArg(y) 2618 v0.AddArg(v2) 2619 v.AddArg(v0) 2620 return true 2621 } 2622 } 2623 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2624 b := v.Block 2625 _ = b 2626 // match: (ITab (Load ptr mem)) 2627 // cond: 2628 // result: (MOVDload ptr mem) 2629 for { 2630 v_0 := v.Args[0] 2631 if v_0.Op != OpLoad { 2632 break 2633 } 2634 ptr := v_0.Args[0] 2635 mem := v_0.Args[1] 2636 v.reset(OpS390XMOVDload) 2637 v.AddArg(ptr) 2638 v.AddArg(mem) 2639 return true 2640 } 2641 return false 2642 } 2643 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2644 b := v.Block 2645 _ = b 2646 // match: (InterCall [argwid] entry mem) 2647 // cond: 2648 // result: (CALLinter [argwid] entry mem) 2649 for { 2650 argwid := v.AuxInt 2651 entry := v.Args[0] 2652 mem := v.Args[1] 2653 v.reset(OpS390XCALLinter) 2654 v.AuxInt = argwid 2655 v.AddArg(entry) 2656 v.AddArg(mem) 2657 return true 2658 } 2659 } 2660 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2661 b := v.Block 2662 _ = b 2663 // match: (IsInBounds idx len) 2664 // cond: 2665 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2666 for { 2667 idx := v.Args[0] 2668 len := v.Args[1] 2669 v.reset(OpS390XMOVDLT) 2670 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2671 v0.AuxInt = 0 2672 v.AddArg(v0) 2673 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2674 v1.AuxInt = 1 2675 v.AddArg(v1) 2676 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2677 v2.AddArg(idx) 2678 v2.AddArg(len) 2679 v.AddArg(v2) 2680 return true 2681 } 2682 } 2683 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2684 b := v.Block 2685 _ = b 2686 // match: (IsNonNil p) 2687 // cond: 2688 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2689 for { 2690 p := v.Args[0] 2691 v.reset(OpS390XMOVDNE) 2692 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2693 v0.AuxInt = 0 2694 v.AddArg(v0) 2695 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2696 v1.AuxInt = 1 2697 v.AddArg(v1) 2698 v2 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 2699 v2.AuxInt = 0 2700 v2.AddArg(p) 2701 v.AddArg(v2) 2702 return true 2703 } 2704 } 2705 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2706 b := v.Block 2707 _ = b 2708 // match: (IsSliceInBounds idx len) 2709 // cond: 2710 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2711 for { 2712 idx := v.Args[0] 2713 len := v.Args[1] 2714 v.reset(OpS390XMOVDLE) 2715 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2716 v0.AuxInt = 0 2717 v.AddArg(v0) 2718 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2719 v1.AuxInt = 1 2720 v.AddArg(v1) 2721 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2722 v2.AddArg(idx) 2723 v2.AddArg(len) 2724 v.AddArg(v2) 2725 return true 2726 } 2727 } 2728 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2729 b := v.Block 2730 _ = b 2731 // match: (Leq16 x y) 2732 // cond: 2733 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2734 for { 2735 x := v.Args[0] 2736 y := v.Args[1] 2737 v.reset(OpS390XMOVDLE) 2738 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2739 v0.AuxInt = 0 2740 v.AddArg(v0) 2741 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2742 v1.AuxInt = 1 2743 v.AddArg(v1) 2744 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2745 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2746 v3.AddArg(x) 2747 v2.AddArg(v3) 2748 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2749 v4.AddArg(y) 2750 v2.AddArg(v4) 2751 v.AddArg(v2) 2752 return true 2753 } 2754 } 2755 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2756 b := v.Block 2757 _ = b 2758 // match: (Leq16U x y) 2759 // cond: 2760 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2761 for { 2762 x := v.Args[0] 2763 y := v.Args[1] 2764 v.reset(OpS390XMOVDLE) 2765 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2766 v0.AuxInt = 0 2767 v.AddArg(v0) 2768 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2769 v1.AuxInt = 1 2770 v.AddArg(v1) 2771 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2772 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2773 v3.AddArg(x) 2774 v2.AddArg(v3) 2775 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2776 v4.AddArg(y) 2777 v2.AddArg(v4) 2778 v.AddArg(v2) 2779 return true 2780 } 2781 } 2782 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2783 b := v.Block 2784 _ = b 2785 // match: (Leq32 x y) 2786 // cond: 2787 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2788 for { 2789 x := v.Args[0] 2790 y := v.Args[1] 2791 v.reset(OpS390XMOVDLE) 2792 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2793 v0.AuxInt = 0 2794 v.AddArg(v0) 2795 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2796 v1.AuxInt = 1 2797 v.AddArg(v1) 2798 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2799 v2.AddArg(x) 2800 v2.AddArg(y) 2801 v.AddArg(v2) 2802 return true 2803 } 2804 } 2805 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2806 b := v.Block 2807 _ = b 2808 // match: (Leq32F x y) 2809 // cond: 2810 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2811 for { 2812 x := v.Args[0] 2813 y := v.Args[1] 2814 v.reset(OpS390XMOVDGEnoinv) 2815 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2816 v0.AuxInt = 0 2817 v.AddArg(v0) 2818 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2819 v1.AuxInt = 1 2820 v.AddArg(v1) 2821 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2822 v2.AddArg(y) 2823 v2.AddArg(x) 2824 v.AddArg(v2) 2825 return true 2826 } 2827 } 2828 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2829 b := v.Block 2830 _ = b 2831 // match: (Leq32U x y) 2832 // cond: 2833 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2834 for { 2835 x := v.Args[0] 2836 y := v.Args[1] 2837 v.reset(OpS390XMOVDLE) 2838 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2839 v0.AuxInt = 0 2840 v.AddArg(v0) 2841 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2842 v1.AuxInt = 1 2843 v.AddArg(v1) 2844 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2845 v2.AddArg(x) 2846 v2.AddArg(y) 2847 v.AddArg(v2) 2848 return true 2849 } 2850 } 2851 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2852 b := v.Block 2853 _ = b 2854 // match: (Leq64 x y) 2855 // cond: 2856 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2857 for { 2858 x := v.Args[0] 2859 y := v.Args[1] 2860 v.reset(OpS390XMOVDLE) 2861 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2862 v0.AuxInt = 0 2863 v.AddArg(v0) 2864 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2865 v1.AuxInt = 1 2866 v.AddArg(v1) 2867 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2868 v2.AddArg(x) 2869 v2.AddArg(y) 2870 v.AddArg(v2) 2871 return true 2872 } 2873 } 2874 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2875 b := v.Block 2876 _ = b 2877 // match: (Leq64F x y) 2878 // cond: 2879 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2880 for { 2881 x := v.Args[0] 2882 y := v.Args[1] 2883 v.reset(OpS390XMOVDGEnoinv) 2884 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2885 v0.AuxInt = 0 2886 v.AddArg(v0) 2887 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2888 v1.AuxInt = 1 2889 v.AddArg(v1) 2890 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2891 v2.AddArg(y) 2892 v2.AddArg(x) 2893 v.AddArg(v2) 2894 return true 2895 } 2896 } 2897 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2898 b := v.Block 2899 _ = b 2900 // match: (Leq64U x y) 2901 // cond: 2902 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2903 for { 2904 x := v.Args[0] 2905 y := v.Args[1] 2906 v.reset(OpS390XMOVDLE) 2907 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2908 v0.AuxInt = 0 2909 v.AddArg(v0) 2910 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2911 v1.AuxInt = 1 2912 v.AddArg(v1) 2913 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2914 v2.AddArg(x) 2915 v2.AddArg(y) 2916 v.AddArg(v2) 2917 return true 2918 } 2919 } 2920 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2921 b := v.Block 2922 _ = b 2923 // match: (Leq8 x y) 2924 // cond: 2925 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2926 for { 2927 x := v.Args[0] 2928 y := v.Args[1] 2929 v.reset(OpS390XMOVDLE) 2930 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2931 v0.AuxInt = 0 2932 v.AddArg(v0) 2933 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2934 v1.AuxInt = 1 2935 v.AddArg(v1) 2936 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2937 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2938 v3.AddArg(x) 2939 v2.AddArg(v3) 2940 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2941 v4.AddArg(y) 2942 v2.AddArg(v4) 2943 v.AddArg(v2) 2944 return true 2945 } 2946 } 2947 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2948 b := v.Block 2949 _ = b 2950 // match: (Leq8U x y) 2951 // cond: 2952 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2953 for { 2954 x := v.Args[0] 2955 y := v.Args[1] 2956 v.reset(OpS390XMOVDLE) 2957 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2958 v0.AuxInt = 0 2959 v.AddArg(v0) 2960 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2961 v1.AuxInt = 1 2962 v.AddArg(v1) 2963 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2964 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2965 v3.AddArg(x) 2966 v2.AddArg(v3) 2967 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2968 v4.AddArg(y) 2969 v2.AddArg(v4) 2970 v.AddArg(v2) 2971 return true 2972 } 2973 } 2974 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2975 b := v.Block 2976 _ = b 2977 // match: (Less16 x y) 2978 // cond: 2979 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2980 for { 2981 x := v.Args[0] 2982 y := v.Args[1] 2983 v.reset(OpS390XMOVDLT) 2984 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2985 v0.AuxInt = 0 2986 v.AddArg(v0) 2987 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2988 v1.AuxInt = 1 2989 v.AddArg(v1) 2990 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2991 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2992 v3.AddArg(x) 2993 v2.AddArg(v3) 2994 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2995 v4.AddArg(y) 2996 v2.AddArg(v4) 2997 v.AddArg(v2) 2998 return true 2999 } 3000 } 3001 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3002 b := v.Block 3003 _ = b 3004 // match: (Less16U x y) 3005 // cond: 3006 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3007 for { 3008 x := v.Args[0] 3009 y := v.Args[1] 3010 v.reset(OpS390XMOVDLT) 3011 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3012 v0.AuxInt = 0 3013 v.AddArg(v0) 3014 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3015 v1.AuxInt = 1 3016 v.AddArg(v1) 3017 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3018 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3019 v3.AddArg(x) 3020 v2.AddArg(v3) 3021 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3022 v4.AddArg(y) 3023 v2.AddArg(v4) 3024 v.AddArg(v2) 3025 return true 3026 } 3027 } 3028 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3029 b := v.Block 3030 _ = b 3031 // match: (Less32 x y) 3032 // cond: 3033 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3034 for { 3035 x := v.Args[0] 3036 y := v.Args[1] 3037 v.reset(OpS390XMOVDLT) 3038 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3039 v0.AuxInt = 0 3040 v.AddArg(v0) 3041 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3042 v1.AuxInt = 1 3043 v.AddArg(v1) 3044 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 3045 v2.AddArg(x) 3046 v2.AddArg(y) 3047 v.AddArg(v2) 3048 return true 3049 } 3050 } 3051 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3052 b := v.Block 3053 _ = b 3054 // match: (Less32F x y) 3055 // cond: 3056 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3057 for { 3058 x := v.Args[0] 3059 y := v.Args[1] 3060 v.reset(OpS390XMOVDGTnoinv) 3061 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3062 v0.AuxInt = 0 3063 v.AddArg(v0) 3064 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3065 v1.AuxInt = 1 3066 v.AddArg(v1) 3067 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 3068 v2.AddArg(y) 3069 v2.AddArg(x) 3070 v.AddArg(v2) 3071 return true 3072 } 3073 } 3074 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3075 b := v.Block 3076 _ = b 3077 // match: (Less32U x y) 3078 // cond: 3079 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3080 for { 3081 x := v.Args[0] 3082 y := v.Args[1] 3083 v.reset(OpS390XMOVDLT) 3084 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3085 v0.AuxInt = 0 3086 v.AddArg(v0) 3087 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3088 v1.AuxInt = 1 3089 v.AddArg(v1) 3090 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 3091 v2.AddArg(x) 3092 v2.AddArg(y) 3093 v.AddArg(v2) 3094 return true 3095 } 3096 } 3097 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3098 b := v.Block 3099 _ = b 3100 // match: (Less64 x y) 3101 // cond: 3102 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3103 for { 3104 x := v.Args[0] 3105 y := v.Args[1] 3106 v.reset(OpS390XMOVDLT) 3107 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3108 v0.AuxInt = 0 3109 v.AddArg(v0) 3110 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3111 v1.AuxInt = 1 3112 v.AddArg(v1) 3113 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3114 v2.AddArg(x) 3115 v2.AddArg(y) 3116 v.AddArg(v2) 3117 return true 3118 } 3119 } 3120 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3121 b := v.Block 3122 _ = b 3123 // match: (Less64F x y) 3124 // cond: 3125 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3126 for { 3127 x := v.Args[0] 3128 y := v.Args[1] 3129 v.reset(OpS390XMOVDGTnoinv) 3130 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3131 v0.AuxInt = 0 3132 v.AddArg(v0) 3133 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3134 v1.AuxInt = 1 3135 v.AddArg(v1) 3136 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 3137 v2.AddArg(y) 3138 v2.AddArg(x) 3139 v.AddArg(v2) 3140 return true 3141 } 3142 } 3143 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3144 b := v.Block 3145 _ = b 3146 // match: (Less64U x y) 3147 // cond: 3148 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3149 for { 3150 x := v.Args[0] 3151 y := v.Args[1] 3152 v.reset(OpS390XMOVDLT) 3153 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3154 v0.AuxInt = 0 3155 v.AddArg(v0) 3156 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3157 v1.AuxInt = 1 3158 v.AddArg(v1) 3159 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3160 v2.AddArg(x) 3161 v2.AddArg(y) 3162 v.AddArg(v2) 3163 return true 3164 } 3165 } 3166 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3167 b := v.Block 3168 _ = b 3169 // match: (Less8 x y) 3170 // cond: 3171 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3172 for { 3173 x := v.Args[0] 3174 y := v.Args[1] 3175 v.reset(OpS390XMOVDLT) 3176 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3177 v0.AuxInt = 0 3178 v.AddArg(v0) 3179 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3180 v1.AuxInt = 1 3181 v.AddArg(v1) 3182 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3183 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3184 v3.AddArg(x) 3185 v2.AddArg(v3) 3186 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3187 v4.AddArg(y) 3188 v2.AddArg(v4) 3189 v.AddArg(v2) 3190 return true 3191 } 3192 } 3193 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3194 b := v.Block 3195 _ = b 3196 // match: (Less8U x y) 3197 // cond: 3198 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3199 for { 3200 x := v.Args[0] 3201 y := v.Args[1] 3202 v.reset(OpS390XMOVDLT) 3203 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3204 v0.AuxInt = 0 3205 v.AddArg(v0) 3206 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3207 v1.AuxInt = 1 3208 v.AddArg(v1) 3209 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3210 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3211 v3.AddArg(x) 3212 v2.AddArg(v3) 3213 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3214 v4.AddArg(y) 3215 v2.AddArg(v4) 3216 v.AddArg(v2) 3217 return true 3218 } 3219 } 3220 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3221 b := v.Block 3222 _ = b 3223 // match: (Load <t> ptr mem) 3224 // cond: (is64BitInt(t) || isPtr(t)) 3225 // result: (MOVDload ptr mem) 3226 for { 3227 t := v.Type 3228 ptr := v.Args[0] 3229 mem := v.Args[1] 3230 if !(is64BitInt(t) || isPtr(t)) { 3231 break 3232 } 3233 v.reset(OpS390XMOVDload) 3234 v.AddArg(ptr) 3235 v.AddArg(mem) 3236 return true 3237 } 3238 // match: (Load <t> ptr mem) 3239 // cond: is32BitInt(t) 3240 // result: (MOVWZload ptr mem) 3241 for { 3242 t := v.Type 3243 ptr := v.Args[0] 3244 mem := v.Args[1] 3245 if !(is32BitInt(t)) { 3246 break 3247 } 3248 v.reset(OpS390XMOVWZload) 3249 v.AddArg(ptr) 3250 v.AddArg(mem) 3251 return true 3252 } 3253 // match: (Load <t> ptr mem) 3254 // cond: is16BitInt(t) 3255 // result: (MOVHZload ptr mem) 3256 for { 3257 t := v.Type 3258 ptr := v.Args[0] 3259 mem := v.Args[1] 3260 if !(is16BitInt(t)) { 3261 break 3262 } 3263 v.reset(OpS390XMOVHZload) 3264 v.AddArg(ptr) 3265 v.AddArg(mem) 3266 return true 3267 } 3268 // match: (Load <t> ptr mem) 3269 // cond: (t.IsBoolean() || is8BitInt(t)) 3270 // result: (MOVBZload ptr mem) 3271 for { 3272 t := v.Type 3273 ptr := v.Args[0] 3274 mem := v.Args[1] 3275 if !(t.IsBoolean() || is8BitInt(t)) { 3276 break 3277 } 3278 v.reset(OpS390XMOVBZload) 3279 v.AddArg(ptr) 3280 v.AddArg(mem) 3281 return true 3282 } 3283 // match: (Load <t> ptr mem) 3284 // cond: is32BitFloat(t) 3285 // result: (FMOVSload ptr mem) 3286 for { 3287 t := v.Type 3288 ptr := v.Args[0] 3289 mem := v.Args[1] 3290 if !(is32BitFloat(t)) { 3291 break 3292 } 3293 v.reset(OpS390XFMOVSload) 3294 v.AddArg(ptr) 3295 v.AddArg(mem) 3296 return true 3297 } 3298 // match: (Load <t> ptr mem) 3299 // cond: is64BitFloat(t) 3300 // result: (FMOVDload ptr mem) 3301 for { 3302 t := v.Type 3303 ptr := v.Args[0] 3304 mem := v.Args[1] 3305 if !(is64BitFloat(t)) { 3306 break 3307 } 3308 v.reset(OpS390XFMOVDload) 3309 v.AddArg(ptr) 3310 v.AddArg(mem) 3311 return true 3312 } 3313 return false 3314 } 3315 func rewriteValueS390X_OpLrot32(v *Value, config *Config) bool { 3316 b := v.Block 3317 _ = b 3318 // match: (Lrot32 <t> x [c]) 3319 // cond: 3320 // result: (RLLconst <t> [c&31] x) 3321 for { 3322 t := v.Type 3323 c := v.AuxInt 3324 x := v.Args[0] 3325 v.reset(OpS390XRLLconst) 3326 v.Type = t 3327 v.AuxInt = c & 31 3328 v.AddArg(x) 3329 return true 3330 } 3331 } 3332 func rewriteValueS390X_OpLrot64(v *Value, config *Config) bool { 3333 b := v.Block 3334 _ = b 3335 // match: (Lrot64 <t> x [c]) 3336 // cond: 3337 // result: (RLLGconst <t> [c&63] x) 3338 for { 3339 t := v.Type 3340 c := v.AuxInt 3341 x := v.Args[0] 3342 v.reset(OpS390XRLLGconst) 3343 v.Type = t 3344 v.AuxInt = c & 63 3345 v.AddArg(x) 3346 return true 3347 } 3348 } 3349 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3350 b := v.Block 3351 _ = b 3352 // match: (Lsh16x16 <t> x y) 3353 // cond: 3354 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3355 for { 3356 t := v.Type 3357 x := v.Args[0] 3358 y := v.Args[1] 3359 v.reset(OpS390XANDW) 3360 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3361 v0.AddArg(x) 3362 v0.AddArg(y) 3363 v.AddArg(v0) 3364 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3365 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3366 v2.AuxInt = 31 3367 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3368 v3.AddArg(y) 3369 v2.AddArg(v3) 3370 v1.AddArg(v2) 3371 v.AddArg(v1) 3372 return true 3373 } 3374 } 3375 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3376 b := v.Block 3377 _ = b 3378 // match: (Lsh16x32 <t> x y) 3379 // cond: 3380 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3381 for { 3382 t := v.Type 3383 x := v.Args[0] 3384 y := v.Args[1] 3385 v.reset(OpS390XANDW) 3386 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3387 v0.AddArg(x) 3388 v0.AddArg(y) 3389 v.AddArg(v0) 3390 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3391 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3392 v2.AuxInt = 31 3393 v2.AddArg(y) 3394 v1.AddArg(v2) 3395 v.AddArg(v1) 3396 return true 3397 } 3398 } 3399 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3400 b := v.Block 3401 _ = b 3402 // match: (Lsh16x64 <t> x y) 3403 // cond: 3404 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3405 for { 3406 t := v.Type 3407 x := v.Args[0] 3408 y := v.Args[1] 3409 v.reset(OpS390XANDW) 3410 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3411 v0.AddArg(x) 3412 v0.AddArg(y) 3413 v.AddArg(v0) 3414 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3415 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3416 v2.AuxInt = 31 3417 v2.AddArg(y) 3418 v1.AddArg(v2) 3419 v.AddArg(v1) 3420 return true 3421 } 3422 } 3423 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3424 b := v.Block 3425 _ = b 3426 // match: (Lsh16x8 <t> x y) 3427 // cond: 3428 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3429 for { 3430 t := v.Type 3431 x := v.Args[0] 3432 y := v.Args[1] 3433 v.reset(OpS390XANDW) 3434 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3435 v0.AddArg(x) 3436 v0.AddArg(y) 3437 v.AddArg(v0) 3438 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3439 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3440 v2.AuxInt = 31 3441 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3442 v3.AddArg(y) 3443 v2.AddArg(v3) 3444 v1.AddArg(v2) 3445 v.AddArg(v1) 3446 return true 3447 } 3448 } 3449 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3450 b := v.Block 3451 _ = b 3452 // match: (Lsh32x16 <t> x y) 3453 // cond: 3454 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3455 for { 3456 t := v.Type 3457 x := v.Args[0] 3458 y := v.Args[1] 3459 v.reset(OpS390XANDW) 3460 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3461 v0.AddArg(x) 3462 v0.AddArg(y) 3463 v.AddArg(v0) 3464 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3465 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3466 v2.AuxInt = 31 3467 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3468 v3.AddArg(y) 3469 v2.AddArg(v3) 3470 v1.AddArg(v2) 3471 v.AddArg(v1) 3472 return true 3473 } 3474 } 3475 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3476 b := v.Block 3477 _ = b 3478 // match: (Lsh32x32 <t> x y) 3479 // cond: 3480 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3481 for { 3482 t := v.Type 3483 x := v.Args[0] 3484 y := v.Args[1] 3485 v.reset(OpS390XANDW) 3486 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3487 v0.AddArg(x) 3488 v0.AddArg(y) 3489 v.AddArg(v0) 3490 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3491 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3492 v2.AuxInt = 31 3493 v2.AddArg(y) 3494 v1.AddArg(v2) 3495 v.AddArg(v1) 3496 return true 3497 } 3498 } 3499 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3500 b := v.Block 3501 _ = b 3502 // match: (Lsh32x64 <t> x y) 3503 // cond: 3504 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3505 for { 3506 t := v.Type 3507 x := v.Args[0] 3508 y := v.Args[1] 3509 v.reset(OpS390XANDW) 3510 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3511 v0.AddArg(x) 3512 v0.AddArg(y) 3513 v.AddArg(v0) 3514 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3515 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3516 v2.AuxInt = 31 3517 v2.AddArg(y) 3518 v1.AddArg(v2) 3519 v.AddArg(v1) 3520 return true 3521 } 3522 } 3523 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3524 b := v.Block 3525 _ = b 3526 // match: (Lsh32x8 <t> x y) 3527 // cond: 3528 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3529 for { 3530 t := v.Type 3531 x := v.Args[0] 3532 y := v.Args[1] 3533 v.reset(OpS390XANDW) 3534 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3535 v0.AddArg(x) 3536 v0.AddArg(y) 3537 v.AddArg(v0) 3538 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3539 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3540 v2.AuxInt = 31 3541 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3542 v3.AddArg(y) 3543 v2.AddArg(v3) 3544 v1.AddArg(v2) 3545 v.AddArg(v1) 3546 return true 3547 } 3548 } 3549 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3550 b := v.Block 3551 _ = b 3552 // match: (Lsh64x16 <t> x y) 3553 // cond: 3554 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3555 for { 3556 t := v.Type 3557 x := v.Args[0] 3558 y := v.Args[1] 3559 v.reset(OpS390XAND) 3560 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3561 v0.AddArg(x) 3562 v0.AddArg(y) 3563 v.AddArg(v0) 3564 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3565 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3566 v2.AuxInt = 63 3567 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3568 v3.AddArg(y) 3569 v2.AddArg(v3) 3570 v1.AddArg(v2) 3571 v.AddArg(v1) 3572 return true 3573 } 3574 } 3575 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3576 b := v.Block 3577 _ = b 3578 // match: (Lsh64x32 <t> x y) 3579 // cond: 3580 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3581 for { 3582 t := v.Type 3583 x := v.Args[0] 3584 y := v.Args[1] 3585 v.reset(OpS390XAND) 3586 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3587 v0.AddArg(x) 3588 v0.AddArg(y) 3589 v.AddArg(v0) 3590 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3591 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3592 v2.AuxInt = 63 3593 v2.AddArg(y) 3594 v1.AddArg(v2) 3595 v.AddArg(v1) 3596 return true 3597 } 3598 } 3599 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3600 b := v.Block 3601 _ = b 3602 // match: (Lsh64x64 <t> x y) 3603 // cond: 3604 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3605 for { 3606 t := v.Type 3607 x := v.Args[0] 3608 y := v.Args[1] 3609 v.reset(OpS390XAND) 3610 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3611 v0.AddArg(x) 3612 v0.AddArg(y) 3613 v.AddArg(v0) 3614 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3615 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3616 v2.AuxInt = 63 3617 v2.AddArg(y) 3618 v1.AddArg(v2) 3619 v.AddArg(v1) 3620 return true 3621 } 3622 } 3623 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3624 b := v.Block 3625 _ = b 3626 // match: (Lsh64x8 <t> x y) 3627 // cond: 3628 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3629 for { 3630 t := v.Type 3631 x := v.Args[0] 3632 y := v.Args[1] 3633 v.reset(OpS390XAND) 3634 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3635 v0.AddArg(x) 3636 v0.AddArg(y) 3637 v.AddArg(v0) 3638 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3639 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3640 v2.AuxInt = 63 3641 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3642 v3.AddArg(y) 3643 v2.AddArg(v3) 3644 v1.AddArg(v2) 3645 v.AddArg(v1) 3646 return true 3647 } 3648 } 3649 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3650 b := v.Block 3651 _ = b 3652 // match: (Lsh8x16 <t> x y) 3653 // cond: 3654 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3655 for { 3656 t := v.Type 3657 x := v.Args[0] 3658 y := v.Args[1] 3659 v.reset(OpS390XANDW) 3660 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3661 v0.AddArg(x) 3662 v0.AddArg(y) 3663 v.AddArg(v0) 3664 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3665 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3666 v2.AuxInt = 31 3667 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3668 v3.AddArg(y) 3669 v2.AddArg(v3) 3670 v1.AddArg(v2) 3671 v.AddArg(v1) 3672 return true 3673 } 3674 } 3675 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3676 b := v.Block 3677 _ = b 3678 // match: (Lsh8x32 <t> x y) 3679 // cond: 3680 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3681 for { 3682 t := v.Type 3683 x := v.Args[0] 3684 y := v.Args[1] 3685 v.reset(OpS390XANDW) 3686 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3687 v0.AddArg(x) 3688 v0.AddArg(y) 3689 v.AddArg(v0) 3690 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3691 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3692 v2.AuxInt = 31 3693 v2.AddArg(y) 3694 v1.AddArg(v2) 3695 v.AddArg(v1) 3696 return true 3697 } 3698 } 3699 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3700 b := v.Block 3701 _ = b 3702 // match: (Lsh8x64 <t> x y) 3703 // cond: 3704 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3705 for { 3706 t := v.Type 3707 x := v.Args[0] 3708 y := v.Args[1] 3709 v.reset(OpS390XANDW) 3710 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3711 v0.AddArg(x) 3712 v0.AddArg(y) 3713 v.AddArg(v0) 3714 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3715 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3716 v2.AuxInt = 31 3717 v2.AddArg(y) 3718 v1.AddArg(v2) 3719 v.AddArg(v1) 3720 return true 3721 } 3722 } 3723 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3724 b := v.Block 3725 _ = b 3726 // match: (Lsh8x8 <t> x y) 3727 // cond: 3728 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3729 for { 3730 t := v.Type 3731 x := v.Args[0] 3732 y := v.Args[1] 3733 v.reset(OpS390XANDW) 3734 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3735 v0.AddArg(x) 3736 v0.AddArg(y) 3737 v.AddArg(v0) 3738 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3739 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3740 v2.AuxInt = 31 3741 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3742 v3.AddArg(y) 3743 v2.AddArg(v3) 3744 v1.AddArg(v2) 3745 v.AddArg(v1) 3746 return true 3747 } 3748 } 3749 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3750 b := v.Block 3751 _ = b 3752 // match: (Mod16 x y) 3753 // cond: 3754 // result: (MODW (MOVHreg x) (MOVHreg y)) 3755 for { 3756 x := v.Args[0] 3757 y := v.Args[1] 3758 v.reset(OpS390XMODW) 3759 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3760 v0.AddArg(x) 3761 v.AddArg(v0) 3762 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3763 v1.AddArg(y) 3764 v.AddArg(v1) 3765 return true 3766 } 3767 } 3768 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3769 b := v.Block 3770 _ = b 3771 // match: (Mod16u x y) 3772 // cond: 3773 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3774 for { 3775 x := v.Args[0] 3776 y := v.Args[1] 3777 v.reset(OpS390XMODWU) 3778 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3779 v0.AddArg(x) 3780 v.AddArg(v0) 3781 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3782 v1.AddArg(y) 3783 v.AddArg(v1) 3784 return true 3785 } 3786 } 3787 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3788 b := v.Block 3789 _ = b 3790 // match: (Mod32 x y) 3791 // cond: 3792 // result: (MODW (MOVWreg x) y) 3793 for { 3794 x := v.Args[0] 3795 y := v.Args[1] 3796 v.reset(OpS390XMODW) 3797 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 3798 v0.AddArg(x) 3799 v.AddArg(v0) 3800 v.AddArg(y) 3801 return true 3802 } 3803 } 3804 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3805 b := v.Block 3806 _ = b 3807 // match: (Mod32u x y) 3808 // cond: 3809 // result: (MODWU (MOVWZreg x) y) 3810 for { 3811 x := v.Args[0] 3812 y := v.Args[1] 3813 v.reset(OpS390XMODWU) 3814 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3815 v0.AddArg(x) 3816 v.AddArg(v0) 3817 v.AddArg(y) 3818 return true 3819 } 3820 } 3821 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3822 b := v.Block 3823 _ = b 3824 // match: (Mod64 x y) 3825 // cond: 3826 // result: (MODD x y) 3827 for { 3828 x := v.Args[0] 3829 y := v.Args[1] 3830 v.reset(OpS390XMODD) 3831 v.AddArg(x) 3832 v.AddArg(y) 3833 return true 3834 } 3835 } 3836 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3837 b := v.Block 3838 _ = b 3839 // match: (Mod64u x y) 3840 // cond: 3841 // result: (MODDU x y) 3842 for { 3843 x := v.Args[0] 3844 y := v.Args[1] 3845 v.reset(OpS390XMODDU) 3846 v.AddArg(x) 3847 v.AddArg(y) 3848 return true 3849 } 3850 } 3851 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3852 b := v.Block 3853 _ = b 3854 // match: (Mod8 x y) 3855 // cond: 3856 // result: (MODW (MOVBreg x) (MOVBreg y)) 3857 for { 3858 x := v.Args[0] 3859 y := v.Args[1] 3860 v.reset(OpS390XMODW) 3861 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3862 v0.AddArg(x) 3863 v.AddArg(v0) 3864 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3865 v1.AddArg(y) 3866 v.AddArg(v1) 3867 return true 3868 } 3869 } 3870 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3871 b := v.Block 3872 _ = b 3873 // match: (Mod8u x y) 3874 // cond: 3875 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3876 for { 3877 x := v.Args[0] 3878 y := v.Args[1] 3879 v.reset(OpS390XMODWU) 3880 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3881 v0.AddArg(x) 3882 v.AddArg(v0) 3883 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3884 v1.AddArg(y) 3885 v.AddArg(v1) 3886 return true 3887 } 3888 } 3889 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3890 b := v.Block 3891 _ = b 3892 // match: (Move [s] _ _ mem) 3893 // cond: SizeAndAlign(s).Size() == 0 3894 // result: mem 3895 for { 3896 s := v.AuxInt 3897 mem := v.Args[2] 3898 if !(SizeAndAlign(s).Size() == 0) { 3899 break 3900 } 3901 v.reset(OpCopy) 3902 v.Type = mem.Type 3903 v.AddArg(mem) 3904 return true 3905 } 3906 // match: (Move [s] dst src mem) 3907 // cond: SizeAndAlign(s).Size() == 1 3908 // result: (MOVBstore dst (MOVBZload src mem) mem) 3909 for { 3910 s := v.AuxInt 3911 dst := v.Args[0] 3912 src := v.Args[1] 3913 mem := v.Args[2] 3914 if !(SizeAndAlign(s).Size() == 1) { 3915 break 3916 } 3917 v.reset(OpS390XMOVBstore) 3918 v.AddArg(dst) 3919 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 3920 v0.AddArg(src) 3921 v0.AddArg(mem) 3922 v.AddArg(v0) 3923 v.AddArg(mem) 3924 return true 3925 } 3926 // match: (Move [s] dst src mem) 3927 // cond: SizeAndAlign(s).Size() == 2 3928 // result: (MOVHstore dst (MOVHZload src mem) mem) 3929 for { 3930 s := v.AuxInt 3931 dst := v.Args[0] 3932 src := v.Args[1] 3933 mem := v.Args[2] 3934 if !(SizeAndAlign(s).Size() == 2) { 3935 break 3936 } 3937 v.reset(OpS390XMOVHstore) 3938 v.AddArg(dst) 3939 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 3940 v0.AddArg(src) 3941 v0.AddArg(mem) 3942 v.AddArg(v0) 3943 v.AddArg(mem) 3944 return true 3945 } 3946 // match: (Move [s] dst src mem) 3947 // cond: SizeAndAlign(s).Size() == 4 3948 // result: (MOVWstore dst (MOVWZload src mem) mem) 3949 for { 3950 s := v.AuxInt 3951 dst := v.Args[0] 3952 src := v.Args[1] 3953 mem := v.Args[2] 3954 if !(SizeAndAlign(s).Size() == 4) { 3955 break 3956 } 3957 v.reset(OpS390XMOVWstore) 3958 v.AddArg(dst) 3959 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 3960 v0.AddArg(src) 3961 v0.AddArg(mem) 3962 v.AddArg(v0) 3963 v.AddArg(mem) 3964 return true 3965 } 3966 // match: (Move [s] dst src mem) 3967 // cond: SizeAndAlign(s).Size() == 8 3968 // result: (MOVDstore dst (MOVDload src mem) mem) 3969 for { 3970 s := v.AuxInt 3971 dst := v.Args[0] 3972 src := v.Args[1] 3973 mem := v.Args[2] 3974 if !(SizeAndAlign(s).Size() == 8) { 3975 break 3976 } 3977 v.reset(OpS390XMOVDstore) 3978 v.AddArg(dst) 3979 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 3980 v0.AddArg(src) 3981 v0.AddArg(mem) 3982 v.AddArg(v0) 3983 v.AddArg(mem) 3984 return true 3985 } 3986 // match: (Move [s] dst src mem) 3987 // cond: SizeAndAlign(s).Size() == 16 3988 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 3989 for { 3990 s := v.AuxInt 3991 dst := v.Args[0] 3992 src := v.Args[1] 3993 mem := v.Args[2] 3994 if !(SizeAndAlign(s).Size() == 16) { 3995 break 3996 } 3997 v.reset(OpS390XMOVDstore) 3998 v.AuxInt = 8 3999 v.AddArg(dst) 4000 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4001 v0.AuxInt = 8 4002 v0.AddArg(src) 4003 v0.AddArg(mem) 4004 v.AddArg(v0) 4005 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4006 v1.AddArg(dst) 4007 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4008 v2.AddArg(src) 4009 v2.AddArg(mem) 4010 v1.AddArg(v2) 4011 v1.AddArg(mem) 4012 v.AddArg(v1) 4013 return true 4014 } 4015 // match: (Move [s] dst src mem) 4016 // cond: SizeAndAlign(s).Size() == 24 4017 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4018 for { 4019 s := v.AuxInt 4020 dst := v.Args[0] 4021 src := v.Args[1] 4022 mem := v.Args[2] 4023 if !(SizeAndAlign(s).Size() == 24) { 4024 break 4025 } 4026 v.reset(OpS390XMOVDstore) 4027 v.AuxInt = 16 4028 v.AddArg(dst) 4029 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4030 v0.AuxInt = 16 4031 v0.AddArg(src) 4032 v0.AddArg(mem) 4033 v.AddArg(v0) 4034 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4035 v1.AuxInt = 8 4036 v1.AddArg(dst) 4037 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4038 v2.AuxInt = 8 4039 v2.AddArg(src) 4040 v2.AddArg(mem) 4041 v1.AddArg(v2) 4042 v3 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4043 v3.AddArg(dst) 4044 v4 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4045 v4.AddArg(src) 4046 v4.AddArg(mem) 4047 v3.AddArg(v4) 4048 v3.AddArg(mem) 4049 v1.AddArg(v3) 4050 v.AddArg(v1) 4051 return true 4052 } 4053 // match: (Move [s] dst src mem) 4054 // cond: SizeAndAlign(s).Size() == 3 4055 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4056 for { 4057 s := v.AuxInt 4058 dst := v.Args[0] 4059 src := v.Args[1] 4060 mem := v.Args[2] 4061 if !(SizeAndAlign(s).Size() == 3) { 4062 break 4063 } 4064 v.reset(OpS390XMOVBstore) 4065 v.AuxInt = 2 4066 v.AddArg(dst) 4067 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4068 v0.AuxInt = 2 4069 v0.AddArg(src) 4070 v0.AddArg(mem) 4071 v.AddArg(v0) 4072 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4073 v1.AddArg(dst) 4074 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4075 v2.AddArg(src) 4076 v2.AddArg(mem) 4077 v1.AddArg(v2) 4078 v1.AddArg(mem) 4079 v.AddArg(v1) 4080 return true 4081 } 4082 // match: (Move [s] dst src mem) 4083 // cond: SizeAndAlign(s).Size() == 5 4084 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4085 for { 4086 s := v.AuxInt 4087 dst := v.Args[0] 4088 src := v.Args[1] 4089 mem := v.Args[2] 4090 if !(SizeAndAlign(s).Size() == 5) { 4091 break 4092 } 4093 v.reset(OpS390XMOVBstore) 4094 v.AuxInt = 4 4095 v.AddArg(dst) 4096 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4097 v0.AuxInt = 4 4098 v0.AddArg(src) 4099 v0.AddArg(mem) 4100 v.AddArg(v0) 4101 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4102 v1.AddArg(dst) 4103 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4104 v2.AddArg(src) 4105 v2.AddArg(mem) 4106 v1.AddArg(v2) 4107 v1.AddArg(mem) 4108 v.AddArg(v1) 4109 return true 4110 } 4111 // match: (Move [s] dst src mem) 4112 // cond: SizeAndAlign(s).Size() == 6 4113 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4114 for { 4115 s := v.AuxInt 4116 dst := v.Args[0] 4117 src := v.Args[1] 4118 mem := v.Args[2] 4119 if !(SizeAndAlign(s).Size() == 6) { 4120 break 4121 } 4122 v.reset(OpS390XMOVHstore) 4123 v.AuxInt = 4 4124 v.AddArg(dst) 4125 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4126 v0.AuxInt = 4 4127 v0.AddArg(src) 4128 v0.AddArg(mem) 4129 v.AddArg(v0) 4130 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4131 v1.AddArg(dst) 4132 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4133 v2.AddArg(src) 4134 v2.AddArg(mem) 4135 v1.AddArg(v2) 4136 v1.AddArg(mem) 4137 v.AddArg(v1) 4138 return true 4139 } 4140 // match: (Move [s] dst src mem) 4141 // cond: SizeAndAlign(s).Size() == 7 4142 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4143 for { 4144 s := v.AuxInt 4145 dst := v.Args[0] 4146 src := v.Args[1] 4147 mem := v.Args[2] 4148 if !(SizeAndAlign(s).Size() == 7) { 4149 break 4150 } 4151 v.reset(OpS390XMOVBstore) 4152 v.AuxInt = 6 4153 v.AddArg(dst) 4154 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4155 v0.AuxInt = 6 4156 v0.AddArg(src) 4157 v0.AddArg(mem) 4158 v.AddArg(v0) 4159 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4160 v1.AuxInt = 4 4161 v1.AddArg(dst) 4162 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4163 v2.AuxInt = 4 4164 v2.AddArg(src) 4165 v2.AddArg(mem) 4166 v1.AddArg(v2) 4167 v3 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4168 v3.AddArg(dst) 4169 v4 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4170 v4.AddArg(src) 4171 v4.AddArg(mem) 4172 v3.AddArg(v4) 4173 v3.AddArg(mem) 4174 v1.AddArg(v3) 4175 v.AddArg(v1) 4176 return true 4177 } 4178 // match: (Move [s] dst src mem) 4179 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4180 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4181 for { 4182 s := v.AuxInt 4183 dst := v.Args[0] 4184 src := v.Args[1] 4185 mem := v.Args[2] 4186 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4187 break 4188 } 4189 v.reset(OpS390XMVC) 4190 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4191 v.AddArg(dst) 4192 v.AddArg(src) 4193 v.AddArg(mem) 4194 return true 4195 } 4196 // match: (Move [s] dst src mem) 4197 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4198 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4199 for { 4200 s := v.AuxInt 4201 dst := v.Args[0] 4202 src := v.Args[1] 4203 mem := v.Args[2] 4204 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4205 break 4206 } 4207 v.reset(OpS390XMVC) 4208 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4209 v.AddArg(dst) 4210 v.AddArg(src) 4211 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4212 v0.AuxInt = makeValAndOff(256, 0) 4213 v0.AddArg(dst) 4214 v0.AddArg(src) 4215 v0.AddArg(mem) 4216 v.AddArg(v0) 4217 return true 4218 } 4219 // match: (Move [s] dst src mem) 4220 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4221 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4222 for { 4223 s := v.AuxInt 4224 dst := v.Args[0] 4225 src := v.Args[1] 4226 mem := v.Args[2] 4227 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4228 break 4229 } 4230 v.reset(OpS390XMVC) 4231 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4232 v.AddArg(dst) 4233 v.AddArg(src) 4234 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4235 v0.AuxInt = makeValAndOff(256, 256) 4236 v0.AddArg(dst) 4237 v0.AddArg(src) 4238 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4239 v1.AuxInt = makeValAndOff(256, 0) 4240 v1.AddArg(dst) 4241 v1.AddArg(src) 4242 v1.AddArg(mem) 4243 v0.AddArg(v1) 4244 v.AddArg(v0) 4245 return true 4246 } 4247 // match: (Move [s] dst src mem) 4248 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4249 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4250 for { 4251 s := v.AuxInt 4252 dst := v.Args[0] 4253 src := v.Args[1] 4254 mem := v.Args[2] 4255 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4256 break 4257 } 4258 v.reset(OpS390XMVC) 4259 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4260 v.AddArg(dst) 4261 v.AddArg(src) 4262 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4263 v0.AuxInt = makeValAndOff(256, 512) 4264 v0.AddArg(dst) 4265 v0.AddArg(src) 4266 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4267 v1.AuxInt = makeValAndOff(256, 256) 4268 v1.AddArg(dst) 4269 v1.AddArg(src) 4270 v2 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4271 v2.AuxInt = makeValAndOff(256, 0) 4272 v2.AddArg(dst) 4273 v2.AddArg(src) 4274 v2.AddArg(mem) 4275 v1.AddArg(v2) 4276 v0.AddArg(v1) 4277 v.AddArg(v0) 4278 return true 4279 } 4280 // match: (Move [s] dst src mem) 4281 // cond: SizeAndAlign(s).Size() > 1024 4282 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4283 for { 4284 s := v.AuxInt 4285 dst := v.Args[0] 4286 src := v.Args[1] 4287 mem := v.Args[2] 4288 if !(SizeAndAlign(s).Size() > 1024) { 4289 break 4290 } 4291 v.reset(OpS390XLoweredMove) 4292 v.AuxInt = SizeAndAlign(s).Size() % 256 4293 v.AddArg(dst) 4294 v.AddArg(src) 4295 v0 := b.NewValue0(v.Line, OpS390XADDconst, src.Type) 4296 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4297 v0.AddArg(src) 4298 v.AddArg(v0) 4299 v.AddArg(mem) 4300 return true 4301 } 4302 return false 4303 } 4304 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4305 b := v.Block 4306 _ = b 4307 // match: (Mul16 x y) 4308 // cond: 4309 // result: (MULLW x y) 4310 for { 4311 x := v.Args[0] 4312 y := v.Args[1] 4313 v.reset(OpS390XMULLW) 4314 v.AddArg(x) 4315 v.AddArg(y) 4316 return true 4317 } 4318 } 4319 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4320 b := v.Block 4321 _ = b 4322 // match: (Mul32 x y) 4323 // cond: 4324 // result: (MULLW x y) 4325 for { 4326 x := v.Args[0] 4327 y := v.Args[1] 4328 v.reset(OpS390XMULLW) 4329 v.AddArg(x) 4330 v.AddArg(y) 4331 return true 4332 } 4333 } 4334 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4335 b := v.Block 4336 _ = b 4337 // match: (Mul32F x y) 4338 // cond: 4339 // result: (FMULS x y) 4340 for { 4341 x := v.Args[0] 4342 y := v.Args[1] 4343 v.reset(OpS390XFMULS) 4344 v.AddArg(x) 4345 v.AddArg(y) 4346 return true 4347 } 4348 } 4349 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4350 b := v.Block 4351 _ = b 4352 // match: (Mul64 x y) 4353 // cond: 4354 // result: (MULLD x y) 4355 for { 4356 x := v.Args[0] 4357 y := v.Args[1] 4358 v.reset(OpS390XMULLD) 4359 v.AddArg(x) 4360 v.AddArg(y) 4361 return true 4362 } 4363 } 4364 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4365 b := v.Block 4366 _ = b 4367 // match: (Mul64F x y) 4368 // cond: 4369 // result: (FMUL x y) 4370 for { 4371 x := v.Args[0] 4372 y := v.Args[1] 4373 v.reset(OpS390XFMUL) 4374 v.AddArg(x) 4375 v.AddArg(y) 4376 return true 4377 } 4378 } 4379 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4380 b := v.Block 4381 _ = b 4382 // match: (Mul8 x y) 4383 // cond: 4384 // result: (MULLW x y) 4385 for { 4386 x := v.Args[0] 4387 y := v.Args[1] 4388 v.reset(OpS390XMULLW) 4389 v.AddArg(x) 4390 v.AddArg(y) 4391 return true 4392 } 4393 } 4394 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4395 b := v.Block 4396 _ = b 4397 // match: (Neg16 x) 4398 // cond: 4399 // result: (NEGW (MOVHreg x)) 4400 for { 4401 x := v.Args[0] 4402 v.reset(OpS390XNEGW) 4403 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4404 v0.AddArg(x) 4405 v.AddArg(v0) 4406 return true 4407 } 4408 } 4409 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4410 b := v.Block 4411 _ = b 4412 // match: (Neg32 x) 4413 // cond: 4414 // result: (NEGW x) 4415 for { 4416 x := v.Args[0] 4417 v.reset(OpS390XNEGW) 4418 v.AddArg(x) 4419 return true 4420 } 4421 } 4422 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4423 b := v.Block 4424 _ = b 4425 // match: (Neg32F x) 4426 // cond: 4427 // result: (FNEGS x) 4428 for { 4429 x := v.Args[0] 4430 v.reset(OpS390XFNEGS) 4431 v.AddArg(x) 4432 return true 4433 } 4434 } 4435 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4436 b := v.Block 4437 _ = b 4438 // match: (Neg64 x) 4439 // cond: 4440 // result: (NEG x) 4441 for { 4442 x := v.Args[0] 4443 v.reset(OpS390XNEG) 4444 v.AddArg(x) 4445 return true 4446 } 4447 } 4448 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4449 b := v.Block 4450 _ = b 4451 // match: (Neg64F x) 4452 // cond: 4453 // result: (FNEG x) 4454 for { 4455 x := v.Args[0] 4456 v.reset(OpS390XFNEG) 4457 v.AddArg(x) 4458 return true 4459 } 4460 } 4461 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4462 b := v.Block 4463 _ = b 4464 // match: (Neg8 x) 4465 // cond: 4466 // result: (NEGW (MOVBreg x)) 4467 for { 4468 x := v.Args[0] 4469 v.reset(OpS390XNEGW) 4470 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4471 v0.AddArg(x) 4472 v.AddArg(v0) 4473 return true 4474 } 4475 } 4476 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4477 b := v.Block 4478 _ = b 4479 // match: (Neq16 x y) 4480 // cond: 4481 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4482 for { 4483 x := v.Args[0] 4484 y := v.Args[1] 4485 v.reset(OpS390XMOVDNE) 4486 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4487 v0.AuxInt = 0 4488 v.AddArg(v0) 4489 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4490 v1.AuxInt = 1 4491 v.AddArg(v1) 4492 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4493 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4494 v3.AddArg(x) 4495 v2.AddArg(v3) 4496 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4497 v4.AddArg(y) 4498 v2.AddArg(v4) 4499 v.AddArg(v2) 4500 return true 4501 } 4502 } 4503 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4504 b := v.Block 4505 _ = b 4506 // match: (Neq32 x y) 4507 // cond: 4508 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4509 for { 4510 x := v.Args[0] 4511 y := v.Args[1] 4512 v.reset(OpS390XMOVDNE) 4513 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4514 v0.AuxInt = 0 4515 v.AddArg(v0) 4516 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4517 v1.AuxInt = 1 4518 v.AddArg(v1) 4519 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 4520 v2.AddArg(x) 4521 v2.AddArg(y) 4522 v.AddArg(v2) 4523 return true 4524 } 4525 } 4526 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4527 b := v.Block 4528 _ = b 4529 // match: (Neq32F x y) 4530 // cond: 4531 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4532 for { 4533 x := v.Args[0] 4534 y := v.Args[1] 4535 v.reset(OpS390XMOVDNE) 4536 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4537 v0.AuxInt = 0 4538 v.AddArg(v0) 4539 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4540 v1.AuxInt = 1 4541 v.AddArg(v1) 4542 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 4543 v2.AddArg(x) 4544 v2.AddArg(y) 4545 v.AddArg(v2) 4546 return true 4547 } 4548 } 4549 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4550 b := v.Block 4551 _ = b 4552 // match: (Neq64 x y) 4553 // cond: 4554 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4555 for { 4556 x := v.Args[0] 4557 y := v.Args[1] 4558 v.reset(OpS390XMOVDNE) 4559 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4560 v0.AuxInt = 0 4561 v.AddArg(v0) 4562 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4563 v1.AuxInt = 1 4564 v.AddArg(v1) 4565 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4566 v2.AddArg(x) 4567 v2.AddArg(y) 4568 v.AddArg(v2) 4569 return true 4570 } 4571 } 4572 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4573 b := v.Block 4574 _ = b 4575 // match: (Neq64F x y) 4576 // cond: 4577 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4578 for { 4579 x := v.Args[0] 4580 y := v.Args[1] 4581 v.reset(OpS390XMOVDNE) 4582 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4583 v0.AuxInt = 0 4584 v.AddArg(v0) 4585 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4586 v1.AuxInt = 1 4587 v.AddArg(v1) 4588 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 4589 v2.AddArg(x) 4590 v2.AddArg(y) 4591 v.AddArg(v2) 4592 return true 4593 } 4594 } 4595 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4596 b := v.Block 4597 _ = b 4598 // match: (Neq8 x y) 4599 // cond: 4600 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4601 for { 4602 x := v.Args[0] 4603 y := v.Args[1] 4604 v.reset(OpS390XMOVDNE) 4605 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4606 v0.AuxInt = 0 4607 v.AddArg(v0) 4608 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4609 v1.AuxInt = 1 4610 v.AddArg(v1) 4611 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4612 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4613 v3.AddArg(x) 4614 v2.AddArg(v3) 4615 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4616 v4.AddArg(y) 4617 v2.AddArg(v4) 4618 v.AddArg(v2) 4619 return true 4620 } 4621 } 4622 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4623 b := v.Block 4624 _ = b 4625 // match: (NeqB x y) 4626 // cond: 4627 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4628 for { 4629 x := v.Args[0] 4630 y := v.Args[1] 4631 v.reset(OpS390XMOVDNE) 4632 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4633 v0.AuxInt = 0 4634 v.AddArg(v0) 4635 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4636 v1.AuxInt = 1 4637 v.AddArg(v1) 4638 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4639 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4640 v3.AddArg(x) 4641 v2.AddArg(v3) 4642 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4643 v4.AddArg(y) 4644 v2.AddArg(v4) 4645 v.AddArg(v2) 4646 return true 4647 } 4648 } 4649 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4650 b := v.Block 4651 _ = b 4652 // match: (NeqPtr x y) 4653 // cond: 4654 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4655 for { 4656 x := v.Args[0] 4657 y := v.Args[1] 4658 v.reset(OpS390XMOVDNE) 4659 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4660 v0.AuxInt = 0 4661 v.AddArg(v0) 4662 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4663 v1.AuxInt = 1 4664 v.AddArg(v1) 4665 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4666 v2.AddArg(x) 4667 v2.AddArg(y) 4668 v.AddArg(v2) 4669 return true 4670 } 4671 } 4672 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4673 b := v.Block 4674 _ = b 4675 // match: (NilCheck ptr mem) 4676 // cond: 4677 // result: (LoweredNilCheck ptr mem) 4678 for { 4679 ptr := v.Args[0] 4680 mem := v.Args[1] 4681 v.reset(OpS390XLoweredNilCheck) 4682 v.AddArg(ptr) 4683 v.AddArg(mem) 4684 return true 4685 } 4686 } 4687 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4688 b := v.Block 4689 _ = b 4690 // match: (Not x) 4691 // cond: 4692 // result: (XORWconst [1] x) 4693 for { 4694 x := v.Args[0] 4695 v.reset(OpS390XXORWconst) 4696 v.AuxInt = 1 4697 v.AddArg(x) 4698 return true 4699 } 4700 } 4701 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4702 b := v.Block 4703 _ = b 4704 // match: (OffPtr [off] ptr:(SP)) 4705 // cond: 4706 // result: (MOVDaddr [off] ptr) 4707 for { 4708 off := v.AuxInt 4709 ptr := v.Args[0] 4710 if ptr.Op != OpSP { 4711 break 4712 } 4713 v.reset(OpS390XMOVDaddr) 4714 v.AuxInt = off 4715 v.AddArg(ptr) 4716 return true 4717 } 4718 // match: (OffPtr [off] ptr) 4719 // cond: is32Bit(off) 4720 // result: (ADDconst [off] ptr) 4721 for { 4722 off := v.AuxInt 4723 ptr := v.Args[0] 4724 if !(is32Bit(off)) { 4725 break 4726 } 4727 v.reset(OpS390XADDconst) 4728 v.AuxInt = off 4729 v.AddArg(ptr) 4730 return true 4731 } 4732 // match: (OffPtr [off] ptr) 4733 // cond: 4734 // result: (ADD (MOVDconst [off]) ptr) 4735 for { 4736 off := v.AuxInt 4737 ptr := v.Args[0] 4738 v.reset(OpS390XADD) 4739 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4740 v0.AuxInt = off 4741 v.AddArg(v0) 4742 v.AddArg(ptr) 4743 return true 4744 } 4745 } 4746 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4747 b := v.Block 4748 _ = b 4749 // match: (Or16 x y) 4750 // cond: 4751 // result: (ORW x y) 4752 for { 4753 x := v.Args[0] 4754 y := v.Args[1] 4755 v.reset(OpS390XORW) 4756 v.AddArg(x) 4757 v.AddArg(y) 4758 return true 4759 } 4760 } 4761 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4762 b := v.Block 4763 _ = b 4764 // match: (Or32 x y) 4765 // cond: 4766 // result: (ORW x y) 4767 for { 4768 x := v.Args[0] 4769 y := v.Args[1] 4770 v.reset(OpS390XORW) 4771 v.AddArg(x) 4772 v.AddArg(y) 4773 return true 4774 } 4775 } 4776 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4777 b := v.Block 4778 _ = b 4779 // match: (Or64 x y) 4780 // cond: 4781 // result: (OR x y) 4782 for { 4783 x := v.Args[0] 4784 y := v.Args[1] 4785 v.reset(OpS390XOR) 4786 v.AddArg(x) 4787 v.AddArg(y) 4788 return true 4789 } 4790 } 4791 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4792 b := v.Block 4793 _ = b 4794 // match: (Or8 x y) 4795 // cond: 4796 // result: (ORW x y) 4797 for { 4798 x := v.Args[0] 4799 y := v.Args[1] 4800 v.reset(OpS390XORW) 4801 v.AddArg(x) 4802 v.AddArg(y) 4803 return true 4804 } 4805 } 4806 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4807 b := v.Block 4808 _ = b 4809 // match: (OrB x y) 4810 // cond: 4811 // result: (ORW x y) 4812 for { 4813 x := v.Args[0] 4814 y := v.Args[1] 4815 v.reset(OpS390XORW) 4816 v.AddArg(x) 4817 v.AddArg(y) 4818 return true 4819 } 4820 } 4821 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4822 b := v.Block 4823 _ = b 4824 // match: (Rsh16Ux16 <t> x y) 4825 // cond: 4826 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4827 for { 4828 t := v.Type 4829 x := v.Args[0] 4830 y := v.Args[1] 4831 v.reset(OpS390XANDW) 4832 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4833 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4834 v1.AddArg(x) 4835 v0.AddArg(v1) 4836 v0.AddArg(y) 4837 v.AddArg(v0) 4838 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4839 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4840 v3.AuxInt = 15 4841 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4842 v4.AddArg(y) 4843 v3.AddArg(v4) 4844 v2.AddArg(v3) 4845 v.AddArg(v2) 4846 return true 4847 } 4848 } 4849 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4850 b := v.Block 4851 _ = b 4852 // match: (Rsh16Ux32 <t> x y) 4853 // cond: 4854 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4855 for { 4856 t := v.Type 4857 x := v.Args[0] 4858 y := v.Args[1] 4859 v.reset(OpS390XANDW) 4860 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4861 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4862 v1.AddArg(x) 4863 v0.AddArg(v1) 4864 v0.AddArg(y) 4865 v.AddArg(v0) 4866 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4867 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4868 v3.AuxInt = 15 4869 v3.AddArg(y) 4870 v2.AddArg(v3) 4871 v.AddArg(v2) 4872 return true 4873 } 4874 } 4875 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4876 b := v.Block 4877 _ = b 4878 // match: (Rsh16Ux64 <t> x y) 4879 // cond: 4880 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4881 for { 4882 t := v.Type 4883 x := v.Args[0] 4884 y := v.Args[1] 4885 v.reset(OpS390XANDW) 4886 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4887 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4888 v1.AddArg(x) 4889 v0.AddArg(v1) 4890 v0.AddArg(y) 4891 v.AddArg(v0) 4892 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4893 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 4894 v3.AuxInt = 15 4895 v3.AddArg(y) 4896 v2.AddArg(v3) 4897 v.AddArg(v2) 4898 return true 4899 } 4900 } 4901 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4902 b := v.Block 4903 _ = b 4904 // match: (Rsh16Ux8 <t> x y) 4905 // cond: 4906 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4907 for { 4908 t := v.Type 4909 x := v.Args[0] 4910 y := v.Args[1] 4911 v.reset(OpS390XANDW) 4912 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4913 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4914 v1.AddArg(x) 4915 v0.AddArg(v1) 4916 v0.AddArg(y) 4917 v.AddArg(v0) 4918 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4919 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4920 v3.AuxInt = 15 4921 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4922 v4.AddArg(y) 4923 v3.AddArg(v4) 4924 v2.AddArg(v3) 4925 v.AddArg(v2) 4926 return true 4927 } 4928 } 4929 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4930 b := v.Block 4931 _ = b 4932 // match: (Rsh16x16 <t> x y) 4933 // cond: 4934 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4935 for { 4936 t := v.Type 4937 x := v.Args[0] 4938 y := v.Args[1] 4939 v.reset(OpS390XSRAW) 4940 v.Type = t 4941 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4942 v0.AddArg(x) 4943 v.AddArg(v0) 4944 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4945 v1.AddArg(y) 4946 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4947 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4948 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4949 v4.AuxInt = 15 4950 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4951 v5.AddArg(y) 4952 v4.AddArg(v5) 4953 v3.AddArg(v4) 4954 v2.AddArg(v3) 4955 v1.AddArg(v2) 4956 v.AddArg(v1) 4957 return true 4958 } 4959 } 4960 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 4961 b := v.Block 4962 _ = b 4963 // match: (Rsh16x32 <t> x y) 4964 // cond: 4965 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 4966 for { 4967 t := v.Type 4968 x := v.Args[0] 4969 y := v.Args[1] 4970 v.reset(OpS390XSRAW) 4971 v.Type = t 4972 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4973 v0.AddArg(x) 4974 v.AddArg(v0) 4975 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4976 v1.AddArg(y) 4977 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4978 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4979 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4980 v4.AuxInt = 15 4981 v4.AddArg(y) 4982 v3.AddArg(v4) 4983 v2.AddArg(v3) 4984 v1.AddArg(v2) 4985 v.AddArg(v1) 4986 return true 4987 } 4988 } 4989 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 4990 b := v.Block 4991 _ = b 4992 // match: (Rsh16x64 <t> x y) 4993 // cond: 4994 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 4995 for { 4996 t := v.Type 4997 x := v.Args[0] 4998 y := v.Args[1] 4999 v.reset(OpS390XSRAW) 5000 v.Type = t 5001 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5002 v0.AddArg(x) 5003 v.AddArg(v0) 5004 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5005 v1.AddArg(y) 5006 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5007 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5008 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5009 v4.AuxInt = 15 5010 v4.AddArg(y) 5011 v3.AddArg(v4) 5012 v2.AddArg(v3) 5013 v1.AddArg(v2) 5014 v.AddArg(v1) 5015 return true 5016 } 5017 } 5018 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5019 b := v.Block 5020 _ = b 5021 // match: (Rsh16x8 <t> x y) 5022 // cond: 5023 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5024 for { 5025 t := v.Type 5026 x := v.Args[0] 5027 y := v.Args[1] 5028 v.reset(OpS390XSRAW) 5029 v.Type = t 5030 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5031 v0.AddArg(x) 5032 v.AddArg(v0) 5033 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5034 v1.AddArg(y) 5035 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5036 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5037 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5038 v4.AuxInt = 15 5039 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5040 v5.AddArg(y) 5041 v4.AddArg(v5) 5042 v3.AddArg(v4) 5043 v2.AddArg(v3) 5044 v1.AddArg(v2) 5045 v.AddArg(v1) 5046 return true 5047 } 5048 } 5049 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5050 b := v.Block 5051 _ = b 5052 // match: (Rsh32Ux16 <t> x y) 5053 // cond: 5054 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5055 for { 5056 t := v.Type 5057 x := v.Args[0] 5058 y := v.Args[1] 5059 v.reset(OpS390XANDW) 5060 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5061 v0.AddArg(x) 5062 v0.AddArg(y) 5063 v.AddArg(v0) 5064 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5065 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5066 v2.AuxInt = 31 5067 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5068 v3.AddArg(y) 5069 v2.AddArg(v3) 5070 v1.AddArg(v2) 5071 v.AddArg(v1) 5072 return true 5073 } 5074 } 5075 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5076 b := v.Block 5077 _ = b 5078 // match: (Rsh32Ux32 <t> x y) 5079 // cond: 5080 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5081 for { 5082 t := v.Type 5083 x := v.Args[0] 5084 y := v.Args[1] 5085 v.reset(OpS390XANDW) 5086 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5087 v0.AddArg(x) 5088 v0.AddArg(y) 5089 v.AddArg(v0) 5090 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5091 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5092 v2.AuxInt = 31 5093 v2.AddArg(y) 5094 v1.AddArg(v2) 5095 v.AddArg(v1) 5096 return true 5097 } 5098 } 5099 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5100 b := v.Block 5101 _ = b 5102 // match: (Rsh32Ux64 <t> x y) 5103 // cond: 5104 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5105 for { 5106 t := v.Type 5107 x := v.Args[0] 5108 y := v.Args[1] 5109 v.reset(OpS390XANDW) 5110 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5111 v0.AddArg(x) 5112 v0.AddArg(y) 5113 v.AddArg(v0) 5114 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5115 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5116 v2.AuxInt = 31 5117 v2.AddArg(y) 5118 v1.AddArg(v2) 5119 v.AddArg(v1) 5120 return true 5121 } 5122 } 5123 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5124 b := v.Block 5125 _ = b 5126 // match: (Rsh32Ux8 <t> x y) 5127 // cond: 5128 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5129 for { 5130 t := v.Type 5131 x := v.Args[0] 5132 y := v.Args[1] 5133 v.reset(OpS390XANDW) 5134 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5135 v0.AddArg(x) 5136 v0.AddArg(y) 5137 v.AddArg(v0) 5138 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5139 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5140 v2.AuxInt = 31 5141 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5142 v3.AddArg(y) 5143 v2.AddArg(v3) 5144 v1.AddArg(v2) 5145 v.AddArg(v1) 5146 return true 5147 } 5148 } 5149 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5150 b := v.Block 5151 _ = b 5152 // match: (Rsh32x16 <t> x y) 5153 // cond: 5154 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5155 for { 5156 t := v.Type 5157 x := v.Args[0] 5158 y := v.Args[1] 5159 v.reset(OpS390XSRAW) 5160 v.Type = t 5161 v.AddArg(x) 5162 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5163 v0.AddArg(y) 5164 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5165 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5166 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5167 v3.AuxInt = 31 5168 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5169 v4.AddArg(y) 5170 v3.AddArg(v4) 5171 v2.AddArg(v3) 5172 v1.AddArg(v2) 5173 v0.AddArg(v1) 5174 v.AddArg(v0) 5175 return true 5176 } 5177 } 5178 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5179 b := v.Block 5180 _ = b 5181 // match: (Rsh32x32 <t> x y) 5182 // cond: 5183 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5184 for { 5185 t := v.Type 5186 x := v.Args[0] 5187 y := v.Args[1] 5188 v.reset(OpS390XSRAW) 5189 v.Type = t 5190 v.AddArg(x) 5191 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5192 v0.AddArg(y) 5193 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5194 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5195 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5196 v3.AuxInt = 31 5197 v3.AddArg(y) 5198 v2.AddArg(v3) 5199 v1.AddArg(v2) 5200 v0.AddArg(v1) 5201 v.AddArg(v0) 5202 return true 5203 } 5204 } 5205 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5206 b := v.Block 5207 _ = b 5208 // match: (Rsh32x64 <t> x y) 5209 // cond: 5210 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5211 for { 5212 t := v.Type 5213 x := v.Args[0] 5214 y := v.Args[1] 5215 v.reset(OpS390XSRAW) 5216 v.Type = t 5217 v.AddArg(x) 5218 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5219 v0.AddArg(y) 5220 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5221 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5222 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5223 v3.AuxInt = 31 5224 v3.AddArg(y) 5225 v2.AddArg(v3) 5226 v1.AddArg(v2) 5227 v0.AddArg(v1) 5228 v.AddArg(v0) 5229 return true 5230 } 5231 } 5232 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5233 b := v.Block 5234 _ = b 5235 // match: (Rsh32x8 <t> x y) 5236 // cond: 5237 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5238 for { 5239 t := v.Type 5240 x := v.Args[0] 5241 y := v.Args[1] 5242 v.reset(OpS390XSRAW) 5243 v.Type = t 5244 v.AddArg(x) 5245 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5246 v0.AddArg(y) 5247 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5248 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5249 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5250 v3.AuxInt = 31 5251 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5252 v4.AddArg(y) 5253 v3.AddArg(v4) 5254 v2.AddArg(v3) 5255 v1.AddArg(v2) 5256 v0.AddArg(v1) 5257 v.AddArg(v0) 5258 return true 5259 } 5260 } 5261 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5262 b := v.Block 5263 _ = b 5264 // match: (Rsh64Ux16 <t> x y) 5265 // cond: 5266 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5267 for { 5268 t := v.Type 5269 x := v.Args[0] 5270 y := v.Args[1] 5271 v.reset(OpS390XAND) 5272 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5273 v0.AddArg(x) 5274 v0.AddArg(y) 5275 v.AddArg(v0) 5276 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5277 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5278 v2.AuxInt = 63 5279 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5280 v3.AddArg(y) 5281 v2.AddArg(v3) 5282 v1.AddArg(v2) 5283 v.AddArg(v1) 5284 return true 5285 } 5286 } 5287 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5288 b := v.Block 5289 _ = b 5290 // match: (Rsh64Ux32 <t> x y) 5291 // cond: 5292 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5293 for { 5294 t := v.Type 5295 x := v.Args[0] 5296 y := v.Args[1] 5297 v.reset(OpS390XAND) 5298 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5299 v0.AddArg(x) 5300 v0.AddArg(y) 5301 v.AddArg(v0) 5302 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5303 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5304 v2.AuxInt = 63 5305 v2.AddArg(y) 5306 v1.AddArg(v2) 5307 v.AddArg(v1) 5308 return true 5309 } 5310 } 5311 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5312 b := v.Block 5313 _ = b 5314 // match: (Rsh64Ux64 <t> x y) 5315 // cond: 5316 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5317 for { 5318 t := v.Type 5319 x := v.Args[0] 5320 y := v.Args[1] 5321 v.reset(OpS390XAND) 5322 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5323 v0.AddArg(x) 5324 v0.AddArg(y) 5325 v.AddArg(v0) 5326 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5327 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5328 v2.AuxInt = 63 5329 v2.AddArg(y) 5330 v1.AddArg(v2) 5331 v.AddArg(v1) 5332 return true 5333 } 5334 } 5335 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5336 b := v.Block 5337 _ = b 5338 // match: (Rsh64Ux8 <t> x y) 5339 // cond: 5340 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5341 for { 5342 t := v.Type 5343 x := v.Args[0] 5344 y := v.Args[1] 5345 v.reset(OpS390XAND) 5346 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5347 v0.AddArg(x) 5348 v0.AddArg(y) 5349 v.AddArg(v0) 5350 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5351 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5352 v2.AuxInt = 63 5353 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5354 v3.AddArg(y) 5355 v2.AddArg(v3) 5356 v1.AddArg(v2) 5357 v.AddArg(v1) 5358 return true 5359 } 5360 } 5361 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5362 b := v.Block 5363 _ = b 5364 // match: (Rsh64x16 <t> x y) 5365 // cond: 5366 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5367 for { 5368 t := v.Type 5369 x := v.Args[0] 5370 y := v.Args[1] 5371 v.reset(OpS390XSRAD) 5372 v.Type = t 5373 v.AddArg(x) 5374 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5375 v0.AddArg(y) 5376 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5377 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5378 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5379 v3.AuxInt = 63 5380 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5381 v4.AddArg(y) 5382 v3.AddArg(v4) 5383 v2.AddArg(v3) 5384 v1.AddArg(v2) 5385 v0.AddArg(v1) 5386 v.AddArg(v0) 5387 return true 5388 } 5389 } 5390 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5391 b := v.Block 5392 _ = b 5393 // match: (Rsh64x32 <t> x y) 5394 // cond: 5395 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5396 for { 5397 t := v.Type 5398 x := v.Args[0] 5399 y := v.Args[1] 5400 v.reset(OpS390XSRAD) 5401 v.Type = t 5402 v.AddArg(x) 5403 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5404 v0.AddArg(y) 5405 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5406 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5407 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5408 v3.AuxInt = 63 5409 v3.AddArg(y) 5410 v2.AddArg(v3) 5411 v1.AddArg(v2) 5412 v0.AddArg(v1) 5413 v.AddArg(v0) 5414 return true 5415 } 5416 } 5417 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5418 b := v.Block 5419 _ = b 5420 // match: (Rsh64x64 <t> x y) 5421 // cond: 5422 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5423 for { 5424 t := v.Type 5425 x := v.Args[0] 5426 y := v.Args[1] 5427 v.reset(OpS390XSRAD) 5428 v.Type = t 5429 v.AddArg(x) 5430 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5431 v0.AddArg(y) 5432 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5433 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5434 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5435 v3.AuxInt = 63 5436 v3.AddArg(y) 5437 v2.AddArg(v3) 5438 v1.AddArg(v2) 5439 v0.AddArg(v1) 5440 v.AddArg(v0) 5441 return true 5442 } 5443 } 5444 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5445 b := v.Block 5446 _ = b 5447 // match: (Rsh64x8 <t> x y) 5448 // cond: 5449 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5450 for { 5451 t := v.Type 5452 x := v.Args[0] 5453 y := v.Args[1] 5454 v.reset(OpS390XSRAD) 5455 v.Type = t 5456 v.AddArg(x) 5457 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5458 v0.AddArg(y) 5459 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5460 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5461 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5462 v3.AuxInt = 63 5463 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5464 v4.AddArg(y) 5465 v3.AddArg(v4) 5466 v2.AddArg(v3) 5467 v1.AddArg(v2) 5468 v0.AddArg(v1) 5469 v.AddArg(v0) 5470 return true 5471 } 5472 } 5473 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5474 b := v.Block 5475 _ = b 5476 // match: (Rsh8Ux16 <t> x y) 5477 // cond: 5478 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5479 for { 5480 t := v.Type 5481 x := v.Args[0] 5482 y := v.Args[1] 5483 v.reset(OpS390XANDW) 5484 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5485 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5486 v1.AddArg(x) 5487 v0.AddArg(v1) 5488 v0.AddArg(y) 5489 v.AddArg(v0) 5490 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5491 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5492 v3.AuxInt = 7 5493 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5494 v4.AddArg(y) 5495 v3.AddArg(v4) 5496 v2.AddArg(v3) 5497 v.AddArg(v2) 5498 return true 5499 } 5500 } 5501 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5502 b := v.Block 5503 _ = b 5504 // match: (Rsh8Ux32 <t> x y) 5505 // cond: 5506 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5507 for { 5508 t := v.Type 5509 x := v.Args[0] 5510 y := v.Args[1] 5511 v.reset(OpS390XANDW) 5512 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5513 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5514 v1.AddArg(x) 5515 v0.AddArg(v1) 5516 v0.AddArg(y) 5517 v.AddArg(v0) 5518 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5519 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5520 v3.AuxInt = 7 5521 v3.AddArg(y) 5522 v2.AddArg(v3) 5523 v.AddArg(v2) 5524 return true 5525 } 5526 } 5527 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5528 b := v.Block 5529 _ = b 5530 // match: (Rsh8Ux64 <t> x y) 5531 // cond: 5532 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5533 for { 5534 t := v.Type 5535 x := v.Args[0] 5536 y := v.Args[1] 5537 v.reset(OpS390XANDW) 5538 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5539 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5540 v1.AddArg(x) 5541 v0.AddArg(v1) 5542 v0.AddArg(y) 5543 v.AddArg(v0) 5544 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5545 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5546 v3.AuxInt = 7 5547 v3.AddArg(y) 5548 v2.AddArg(v3) 5549 v.AddArg(v2) 5550 return true 5551 } 5552 } 5553 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5554 b := v.Block 5555 _ = b 5556 // match: (Rsh8Ux8 <t> x y) 5557 // cond: 5558 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5559 for { 5560 t := v.Type 5561 x := v.Args[0] 5562 y := v.Args[1] 5563 v.reset(OpS390XANDW) 5564 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5565 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5566 v1.AddArg(x) 5567 v0.AddArg(v1) 5568 v0.AddArg(y) 5569 v.AddArg(v0) 5570 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5571 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5572 v3.AuxInt = 7 5573 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5574 v4.AddArg(y) 5575 v3.AddArg(v4) 5576 v2.AddArg(v3) 5577 v.AddArg(v2) 5578 return true 5579 } 5580 } 5581 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5582 b := v.Block 5583 _ = b 5584 // match: (Rsh8x16 <t> x y) 5585 // cond: 5586 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5587 for { 5588 t := v.Type 5589 x := v.Args[0] 5590 y := v.Args[1] 5591 v.reset(OpS390XSRAW) 5592 v.Type = t 5593 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5594 v0.AddArg(x) 5595 v.AddArg(v0) 5596 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5597 v1.AddArg(y) 5598 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5599 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5600 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5601 v4.AuxInt = 7 5602 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5603 v5.AddArg(y) 5604 v4.AddArg(v5) 5605 v3.AddArg(v4) 5606 v2.AddArg(v3) 5607 v1.AddArg(v2) 5608 v.AddArg(v1) 5609 return true 5610 } 5611 } 5612 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5613 b := v.Block 5614 _ = b 5615 // match: (Rsh8x32 <t> x y) 5616 // cond: 5617 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5618 for { 5619 t := v.Type 5620 x := v.Args[0] 5621 y := v.Args[1] 5622 v.reset(OpS390XSRAW) 5623 v.Type = t 5624 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5625 v0.AddArg(x) 5626 v.AddArg(v0) 5627 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5628 v1.AddArg(y) 5629 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5630 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5631 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5632 v4.AuxInt = 7 5633 v4.AddArg(y) 5634 v3.AddArg(v4) 5635 v2.AddArg(v3) 5636 v1.AddArg(v2) 5637 v.AddArg(v1) 5638 return true 5639 } 5640 } 5641 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5642 b := v.Block 5643 _ = b 5644 // match: (Rsh8x64 <t> x y) 5645 // cond: 5646 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5647 for { 5648 t := v.Type 5649 x := v.Args[0] 5650 y := v.Args[1] 5651 v.reset(OpS390XSRAW) 5652 v.Type = t 5653 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5654 v0.AddArg(x) 5655 v.AddArg(v0) 5656 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5657 v1.AddArg(y) 5658 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5659 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5660 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5661 v4.AuxInt = 7 5662 v4.AddArg(y) 5663 v3.AddArg(v4) 5664 v2.AddArg(v3) 5665 v1.AddArg(v2) 5666 v.AddArg(v1) 5667 return true 5668 } 5669 } 5670 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5671 b := v.Block 5672 _ = b 5673 // match: (Rsh8x8 <t> x y) 5674 // cond: 5675 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5676 for { 5677 t := v.Type 5678 x := v.Args[0] 5679 y := v.Args[1] 5680 v.reset(OpS390XSRAW) 5681 v.Type = t 5682 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5683 v0.AddArg(x) 5684 v.AddArg(v0) 5685 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5686 v1.AddArg(y) 5687 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5688 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5689 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5690 v4.AuxInt = 7 5691 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5692 v5.AddArg(y) 5693 v4.AddArg(v5) 5694 v3.AddArg(v4) 5695 v2.AddArg(v3) 5696 v1.AddArg(v2) 5697 v.AddArg(v1) 5698 return true 5699 } 5700 } 5701 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5702 b := v.Block 5703 _ = b 5704 // match: (ADD x (MOVDconst [c])) 5705 // cond: is32Bit(c) 5706 // result: (ADDconst [c] x) 5707 for { 5708 x := v.Args[0] 5709 v_1 := v.Args[1] 5710 if v_1.Op != OpS390XMOVDconst { 5711 break 5712 } 5713 c := v_1.AuxInt 5714 if !(is32Bit(c)) { 5715 break 5716 } 5717 v.reset(OpS390XADDconst) 5718 v.AuxInt = c 5719 v.AddArg(x) 5720 return true 5721 } 5722 // match: (ADD (MOVDconst [c]) x) 5723 // cond: is32Bit(c) 5724 // result: (ADDconst [c] x) 5725 for { 5726 v_0 := v.Args[0] 5727 if v_0.Op != OpS390XMOVDconst { 5728 break 5729 } 5730 c := v_0.AuxInt 5731 x := v.Args[1] 5732 if !(is32Bit(c)) { 5733 break 5734 } 5735 v.reset(OpS390XADDconst) 5736 v.AuxInt = c 5737 v.AddArg(x) 5738 return true 5739 } 5740 // match: (ADD x (MOVDaddr [c] {s} y)) 5741 // cond: x.Op != OpSB && y.Op != OpSB 5742 // result: (MOVDaddridx [c] {s} x y) 5743 for { 5744 x := v.Args[0] 5745 v_1 := v.Args[1] 5746 if v_1.Op != OpS390XMOVDaddr { 5747 break 5748 } 5749 c := v_1.AuxInt 5750 s := v_1.Aux 5751 y := v_1.Args[0] 5752 if !(x.Op != OpSB && y.Op != OpSB) { 5753 break 5754 } 5755 v.reset(OpS390XMOVDaddridx) 5756 v.AuxInt = c 5757 v.Aux = s 5758 v.AddArg(x) 5759 v.AddArg(y) 5760 return true 5761 } 5762 // match: (ADD (MOVDaddr [c] {s} x) y) 5763 // cond: x.Op != OpSB && y.Op != OpSB 5764 // result: (MOVDaddridx [c] {s} x y) 5765 for { 5766 v_0 := v.Args[0] 5767 if v_0.Op != OpS390XMOVDaddr { 5768 break 5769 } 5770 c := v_0.AuxInt 5771 s := v_0.Aux 5772 x := v_0.Args[0] 5773 y := v.Args[1] 5774 if !(x.Op != OpSB && y.Op != OpSB) { 5775 break 5776 } 5777 v.reset(OpS390XMOVDaddridx) 5778 v.AuxInt = c 5779 v.Aux = s 5780 v.AddArg(x) 5781 v.AddArg(y) 5782 return true 5783 } 5784 // match: (ADD x (NEG y)) 5785 // cond: 5786 // result: (SUB x y) 5787 for { 5788 x := v.Args[0] 5789 v_1 := v.Args[1] 5790 if v_1.Op != OpS390XNEG { 5791 break 5792 } 5793 y := v_1.Args[0] 5794 v.reset(OpS390XSUB) 5795 v.AddArg(x) 5796 v.AddArg(y) 5797 return true 5798 } 5799 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5800 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5801 // result: (ADDload <t> [off] {sym} x ptr mem) 5802 for { 5803 t := v.Type 5804 x := v.Args[0] 5805 g := v.Args[1] 5806 if g.Op != OpS390XMOVDload { 5807 break 5808 } 5809 off := g.AuxInt 5810 sym := g.Aux 5811 ptr := g.Args[0] 5812 mem := g.Args[1] 5813 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5814 break 5815 } 5816 v.reset(OpS390XADDload) 5817 v.Type = t 5818 v.AuxInt = off 5819 v.Aux = sym 5820 v.AddArg(x) 5821 v.AddArg(ptr) 5822 v.AddArg(mem) 5823 return true 5824 } 5825 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5826 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5827 // result: (ADDload <t> [off] {sym} x ptr mem) 5828 for { 5829 t := v.Type 5830 g := v.Args[0] 5831 if g.Op != OpS390XMOVDload { 5832 break 5833 } 5834 off := g.AuxInt 5835 sym := g.Aux 5836 ptr := g.Args[0] 5837 mem := g.Args[1] 5838 x := v.Args[1] 5839 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5840 break 5841 } 5842 v.reset(OpS390XADDload) 5843 v.Type = t 5844 v.AuxInt = off 5845 v.Aux = sym 5846 v.AddArg(x) 5847 v.AddArg(ptr) 5848 v.AddArg(mem) 5849 return true 5850 } 5851 return false 5852 } 5853 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5854 b := v.Block 5855 _ = b 5856 // match: (ADDW x (MOVDconst [c])) 5857 // cond: 5858 // result: (ADDWconst [c] x) 5859 for { 5860 x := v.Args[0] 5861 v_1 := v.Args[1] 5862 if v_1.Op != OpS390XMOVDconst { 5863 break 5864 } 5865 c := v_1.AuxInt 5866 v.reset(OpS390XADDWconst) 5867 v.AuxInt = c 5868 v.AddArg(x) 5869 return true 5870 } 5871 // match: (ADDW (MOVDconst [c]) x) 5872 // cond: 5873 // result: (ADDWconst [c] x) 5874 for { 5875 v_0 := v.Args[0] 5876 if v_0.Op != OpS390XMOVDconst { 5877 break 5878 } 5879 c := v_0.AuxInt 5880 x := v.Args[1] 5881 v.reset(OpS390XADDWconst) 5882 v.AuxInt = c 5883 v.AddArg(x) 5884 return true 5885 } 5886 // match: (ADDW x (NEGW y)) 5887 // cond: 5888 // result: (SUBW x y) 5889 for { 5890 x := v.Args[0] 5891 v_1 := v.Args[1] 5892 if v_1.Op != OpS390XNEGW { 5893 break 5894 } 5895 y := v_1.Args[0] 5896 v.reset(OpS390XSUBW) 5897 v.AddArg(x) 5898 v.AddArg(y) 5899 return true 5900 } 5901 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 5902 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5903 // result: (ADDWload <t> [off] {sym} x ptr mem) 5904 for { 5905 t := v.Type 5906 x := v.Args[0] 5907 g := v.Args[1] 5908 if g.Op != OpS390XMOVWload { 5909 break 5910 } 5911 off := g.AuxInt 5912 sym := g.Aux 5913 ptr := g.Args[0] 5914 mem := g.Args[1] 5915 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5916 break 5917 } 5918 v.reset(OpS390XADDWload) 5919 v.Type = t 5920 v.AuxInt = off 5921 v.Aux = sym 5922 v.AddArg(x) 5923 v.AddArg(ptr) 5924 v.AddArg(mem) 5925 return true 5926 } 5927 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 5928 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5929 // result: (ADDWload <t> [off] {sym} x ptr mem) 5930 for { 5931 t := v.Type 5932 g := v.Args[0] 5933 if g.Op != OpS390XMOVWload { 5934 break 5935 } 5936 off := g.AuxInt 5937 sym := g.Aux 5938 ptr := g.Args[0] 5939 mem := g.Args[1] 5940 x := v.Args[1] 5941 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5942 break 5943 } 5944 v.reset(OpS390XADDWload) 5945 v.Type = t 5946 v.AuxInt = off 5947 v.Aux = sym 5948 v.AddArg(x) 5949 v.AddArg(ptr) 5950 v.AddArg(mem) 5951 return true 5952 } 5953 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 5954 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5955 // result: (ADDWload <t> [off] {sym} x ptr mem) 5956 for { 5957 t := v.Type 5958 x := v.Args[0] 5959 g := v.Args[1] 5960 if g.Op != OpS390XMOVWZload { 5961 break 5962 } 5963 off := g.AuxInt 5964 sym := g.Aux 5965 ptr := g.Args[0] 5966 mem := g.Args[1] 5967 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5968 break 5969 } 5970 v.reset(OpS390XADDWload) 5971 v.Type = t 5972 v.AuxInt = off 5973 v.Aux = sym 5974 v.AddArg(x) 5975 v.AddArg(ptr) 5976 v.AddArg(mem) 5977 return true 5978 } 5979 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 5980 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5981 // result: (ADDWload <t> [off] {sym} x ptr mem) 5982 for { 5983 t := v.Type 5984 g := v.Args[0] 5985 if g.Op != OpS390XMOVWZload { 5986 break 5987 } 5988 off := g.AuxInt 5989 sym := g.Aux 5990 ptr := g.Args[0] 5991 mem := g.Args[1] 5992 x := v.Args[1] 5993 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5994 break 5995 } 5996 v.reset(OpS390XADDWload) 5997 v.Type = t 5998 v.AuxInt = off 5999 v.Aux = sym 6000 v.AddArg(x) 6001 v.AddArg(ptr) 6002 v.AddArg(mem) 6003 return true 6004 } 6005 return false 6006 } 6007 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6008 b := v.Block 6009 _ = b 6010 // match: (ADDWconst [c] x) 6011 // cond: int32(c)==0 6012 // result: x 6013 for { 6014 c := v.AuxInt 6015 x := v.Args[0] 6016 if !(int32(c) == 0) { 6017 break 6018 } 6019 v.reset(OpCopy) 6020 v.Type = x.Type 6021 v.AddArg(x) 6022 return true 6023 } 6024 // match: (ADDWconst [c] (MOVDconst [d])) 6025 // cond: 6026 // result: (MOVDconst [int64(int32(c+d))]) 6027 for { 6028 c := v.AuxInt 6029 v_0 := v.Args[0] 6030 if v_0.Op != OpS390XMOVDconst { 6031 break 6032 } 6033 d := v_0.AuxInt 6034 v.reset(OpS390XMOVDconst) 6035 v.AuxInt = int64(int32(c + d)) 6036 return true 6037 } 6038 // match: (ADDWconst [c] (ADDWconst [d] x)) 6039 // cond: 6040 // result: (ADDWconst [int64(int32(c+d))] x) 6041 for { 6042 c := v.AuxInt 6043 v_0 := v.Args[0] 6044 if v_0.Op != OpS390XADDWconst { 6045 break 6046 } 6047 d := v_0.AuxInt 6048 x := v_0.Args[0] 6049 v.reset(OpS390XADDWconst) 6050 v.AuxInt = int64(int32(c + d)) 6051 v.AddArg(x) 6052 return true 6053 } 6054 return false 6055 } 6056 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6057 b := v.Block 6058 _ = b 6059 // match: (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) 6060 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6061 // result: (MOVDaddr [c+d] {s} x) 6062 for { 6063 c := v.AuxInt 6064 v_0 := v.Args[0] 6065 if v_0.Op != OpS390XMOVDaddr { 6066 break 6067 } 6068 d := v_0.AuxInt 6069 s := v_0.Aux 6070 x := v_0.Args[0] 6071 if x.Op != OpSB { 6072 break 6073 } 6074 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6075 break 6076 } 6077 v.reset(OpS390XMOVDaddr) 6078 v.AuxInt = c + d 6079 v.Aux = s 6080 v.AddArg(x) 6081 return true 6082 } 6083 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6084 // cond: x.Op != OpSB && is20Bit(c+d) 6085 // result: (MOVDaddr [c+d] {s} x) 6086 for { 6087 c := v.AuxInt 6088 v_0 := v.Args[0] 6089 if v_0.Op != OpS390XMOVDaddr { 6090 break 6091 } 6092 d := v_0.AuxInt 6093 s := v_0.Aux 6094 x := v_0.Args[0] 6095 if !(x.Op != OpSB && is20Bit(c+d)) { 6096 break 6097 } 6098 v.reset(OpS390XMOVDaddr) 6099 v.AuxInt = c + d 6100 v.Aux = s 6101 v.AddArg(x) 6102 return true 6103 } 6104 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6105 // cond: is20Bit(c+d) 6106 // result: (MOVDaddridx [c+d] {s} x y) 6107 for { 6108 c := v.AuxInt 6109 v_0 := v.Args[0] 6110 if v_0.Op != OpS390XMOVDaddridx { 6111 break 6112 } 6113 d := v_0.AuxInt 6114 s := v_0.Aux 6115 x := v_0.Args[0] 6116 y := v_0.Args[1] 6117 if !(is20Bit(c + d)) { 6118 break 6119 } 6120 v.reset(OpS390XMOVDaddridx) 6121 v.AuxInt = c + d 6122 v.Aux = s 6123 v.AddArg(x) 6124 v.AddArg(y) 6125 return true 6126 } 6127 // match: (ADDconst [0] x) 6128 // cond: 6129 // result: x 6130 for { 6131 if v.AuxInt != 0 { 6132 break 6133 } 6134 x := v.Args[0] 6135 v.reset(OpCopy) 6136 v.Type = x.Type 6137 v.AddArg(x) 6138 return true 6139 } 6140 // match: (ADDconst [c] (MOVDconst [d])) 6141 // cond: 6142 // result: (MOVDconst [c+d]) 6143 for { 6144 c := v.AuxInt 6145 v_0 := v.Args[0] 6146 if v_0.Op != OpS390XMOVDconst { 6147 break 6148 } 6149 d := v_0.AuxInt 6150 v.reset(OpS390XMOVDconst) 6151 v.AuxInt = c + d 6152 return true 6153 } 6154 // match: (ADDconst [c] (ADDconst [d] x)) 6155 // cond: is32Bit(c+d) 6156 // result: (ADDconst [c+d] x) 6157 for { 6158 c := v.AuxInt 6159 v_0 := v.Args[0] 6160 if v_0.Op != OpS390XADDconst { 6161 break 6162 } 6163 d := v_0.AuxInt 6164 x := v_0.Args[0] 6165 if !(is32Bit(c + d)) { 6166 break 6167 } 6168 v.reset(OpS390XADDconst) 6169 v.AuxInt = c + d 6170 v.AddArg(x) 6171 return true 6172 } 6173 return false 6174 } 6175 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6176 b := v.Block 6177 _ = b 6178 // match: (AND x (MOVDconst [c])) 6179 // cond: is32Bit(c) && c < 0 6180 // result: (ANDconst [c] x) 6181 for { 6182 x := v.Args[0] 6183 v_1 := v.Args[1] 6184 if v_1.Op != OpS390XMOVDconst { 6185 break 6186 } 6187 c := v_1.AuxInt 6188 if !(is32Bit(c) && c < 0) { 6189 break 6190 } 6191 v.reset(OpS390XANDconst) 6192 v.AuxInt = c 6193 v.AddArg(x) 6194 return true 6195 } 6196 // match: (AND (MOVDconst [c]) x) 6197 // cond: is32Bit(c) && c < 0 6198 // result: (ANDconst [c] x) 6199 for { 6200 v_0 := v.Args[0] 6201 if v_0.Op != OpS390XMOVDconst { 6202 break 6203 } 6204 c := v_0.AuxInt 6205 x := v.Args[1] 6206 if !(is32Bit(c) && c < 0) { 6207 break 6208 } 6209 v.reset(OpS390XANDconst) 6210 v.AuxInt = c 6211 v.AddArg(x) 6212 return true 6213 } 6214 // match: (AND (MOVDconst [0xFF]) x) 6215 // cond: 6216 // result: (MOVBZreg x) 6217 for { 6218 v_0 := v.Args[0] 6219 if v_0.Op != OpS390XMOVDconst { 6220 break 6221 } 6222 if v_0.AuxInt != 0xFF { 6223 break 6224 } 6225 x := v.Args[1] 6226 v.reset(OpS390XMOVBZreg) 6227 v.AddArg(x) 6228 return true 6229 } 6230 // match: (AND x (MOVDconst [0xFF])) 6231 // cond: 6232 // result: (MOVBZreg x) 6233 for { 6234 x := v.Args[0] 6235 v_1 := v.Args[1] 6236 if v_1.Op != OpS390XMOVDconst { 6237 break 6238 } 6239 if v_1.AuxInt != 0xFF { 6240 break 6241 } 6242 v.reset(OpS390XMOVBZreg) 6243 v.AddArg(x) 6244 return true 6245 } 6246 // match: (AND (MOVDconst [0xFFFF]) x) 6247 // cond: 6248 // result: (MOVHZreg x) 6249 for { 6250 v_0 := v.Args[0] 6251 if v_0.Op != OpS390XMOVDconst { 6252 break 6253 } 6254 if v_0.AuxInt != 0xFFFF { 6255 break 6256 } 6257 x := v.Args[1] 6258 v.reset(OpS390XMOVHZreg) 6259 v.AddArg(x) 6260 return true 6261 } 6262 // match: (AND x (MOVDconst [0xFFFF])) 6263 // cond: 6264 // result: (MOVHZreg x) 6265 for { 6266 x := v.Args[0] 6267 v_1 := v.Args[1] 6268 if v_1.Op != OpS390XMOVDconst { 6269 break 6270 } 6271 if v_1.AuxInt != 0xFFFF { 6272 break 6273 } 6274 v.reset(OpS390XMOVHZreg) 6275 v.AddArg(x) 6276 return true 6277 } 6278 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6279 // cond: 6280 // result: (MOVWZreg x) 6281 for { 6282 v_0 := v.Args[0] 6283 if v_0.Op != OpS390XMOVDconst { 6284 break 6285 } 6286 if v_0.AuxInt != 0xFFFFFFFF { 6287 break 6288 } 6289 x := v.Args[1] 6290 v.reset(OpS390XMOVWZreg) 6291 v.AddArg(x) 6292 return true 6293 } 6294 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6295 // cond: 6296 // result: (MOVWZreg x) 6297 for { 6298 x := v.Args[0] 6299 v_1 := v.Args[1] 6300 if v_1.Op != OpS390XMOVDconst { 6301 break 6302 } 6303 if v_1.AuxInt != 0xFFFFFFFF { 6304 break 6305 } 6306 v.reset(OpS390XMOVWZreg) 6307 v.AddArg(x) 6308 return true 6309 } 6310 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6311 // cond: 6312 // result: (MOVDconst [c&d]) 6313 for { 6314 v_0 := v.Args[0] 6315 if v_0.Op != OpS390XMOVDconst { 6316 break 6317 } 6318 c := v_0.AuxInt 6319 v_1 := v.Args[1] 6320 if v_1.Op != OpS390XMOVDconst { 6321 break 6322 } 6323 d := v_1.AuxInt 6324 v.reset(OpS390XMOVDconst) 6325 v.AuxInt = c & d 6326 return true 6327 } 6328 // match: (AND x x) 6329 // cond: 6330 // result: x 6331 for { 6332 x := v.Args[0] 6333 if x != v.Args[1] { 6334 break 6335 } 6336 v.reset(OpCopy) 6337 v.Type = x.Type 6338 v.AddArg(x) 6339 return true 6340 } 6341 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6342 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6343 // result: (ANDload <t> [off] {sym} x ptr mem) 6344 for { 6345 t := v.Type 6346 x := v.Args[0] 6347 g := v.Args[1] 6348 if g.Op != OpS390XMOVDload { 6349 break 6350 } 6351 off := g.AuxInt 6352 sym := g.Aux 6353 ptr := g.Args[0] 6354 mem := g.Args[1] 6355 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6356 break 6357 } 6358 v.reset(OpS390XANDload) 6359 v.Type = t 6360 v.AuxInt = off 6361 v.Aux = sym 6362 v.AddArg(x) 6363 v.AddArg(ptr) 6364 v.AddArg(mem) 6365 return true 6366 } 6367 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6368 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6369 // result: (ANDload <t> [off] {sym} x ptr mem) 6370 for { 6371 t := v.Type 6372 g := v.Args[0] 6373 if g.Op != OpS390XMOVDload { 6374 break 6375 } 6376 off := g.AuxInt 6377 sym := g.Aux 6378 ptr := g.Args[0] 6379 mem := g.Args[1] 6380 x := v.Args[1] 6381 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6382 break 6383 } 6384 v.reset(OpS390XANDload) 6385 v.Type = t 6386 v.AuxInt = off 6387 v.Aux = sym 6388 v.AddArg(x) 6389 v.AddArg(ptr) 6390 v.AddArg(mem) 6391 return true 6392 } 6393 return false 6394 } 6395 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6396 b := v.Block 6397 _ = b 6398 // match: (ANDW x (MOVDconst [c])) 6399 // cond: 6400 // result: (ANDWconst [c] x) 6401 for { 6402 x := v.Args[0] 6403 v_1 := v.Args[1] 6404 if v_1.Op != OpS390XMOVDconst { 6405 break 6406 } 6407 c := v_1.AuxInt 6408 v.reset(OpS390XANDWconst) 6409 v.AuxInt = c 6410 v.AddArg(x) 6411 return true 6412 } 6413 // match: (ANDW (MOVDconst [c]) x) 6414 // cond: 6415 // result: (ANDWconst [c] x) 6416 for { 6417 v_0 := v.Args[0] 6418 if v_0.Op != OpS390XMOVDconst { 6419 break 6420 } 6421 c := v_0.AuxInt 6422 x := v.Args[1] 6423 v.reset(OpS390XANDWconst) 6424 v.AuxInt = c 6425 v.AddArg(x) 6426 return true 6427 } 6428 // match: (ANDW x x) 6429 // cond: 6430 // result: x 6431 for { 6432 x := v.Args[0] 6433 if x != v.Args[1] { 6434 break 6435 } 6436 v.reset(OpCopy) 6437 v.Type = x.Type 6438 v.AddArg(x) 6439 return true 6440 } 6441 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6442 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6443 // result: (ANDWload <t> [off] {sym} x ptr mem) 6444 for { 6445 t := v.Type 6446 x := v.Args[0] 6447 g := v.Args[1] 6448 if g.Op != OpS390XMOVWload { 6449 break 6450 } 6451 off := g.AuxInt 6452 sym := g.Aux 6453 ptr := g.Args[0] 6454 mem := g.Args[1] 6455 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6456 break 6457 } 6458 v.reset(OpS390XANDWload) 6459 v.Type = t 6460 v.AuxInt = off 6461 v.Aux = sym 6462 v.AddArg(x) 6463 v.AddArg(ptr) 6464 v.AddArg(mem) 6465 return true 6466 } 6467 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6468 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6469 // result: (ANDWload <t> [off] {sym} x ptr mem) 6470 for { 6471 t := v.Type 6472 g := v.Args[0] 6473 if g.Op != OpS390XMOVWload { 6474 break 6475 } 6476 off := g.AuxInt 6477 sym := g.Aux 6478 ptr := g.Args[0] 6479 mem := g.Args[1] 6480 x := v.Args[1] 6481 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6482 break 6483 } 6484 v.reset(OpS390XANDWload) 6485 v.Type = t 6486 v.AuxInt = off 6487 v.Aux = sym 6488 v.AddArg(x) 6489 v.AddArg(ptr) 6490 v.AddArg(mem) 6491 return true 6492 } 6493 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6494 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6495 // result: (ANDWload <t> [off] {sym} x ptr mem) 6496 for { 6497 t := v.Type 6498 x := v.Args[0] 6499 g := v.Args[1] 6500 if g.Op != OpS390XMOVWZload { 6501 break 6502 } 6503 off := g.AuxInt 6504 sym := g.Aux 6505 ptr := g.Args[0] 6506 mem := g.Args[1] 6507 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6508 break 6509 } 6510 v.reset(OpS390XANDWload) 6511 v.Type = t 6512 v.AuxInt = off 6513 v.Aux = sym 6514 v.AddArg(x) 6515 v.AddArg(ptr) 6516 v.AddArg(mem) 6517 return true 6518 } 6519 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6520 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6521 // result: (ANDWload <t> [off] {sym} x ptr mem) 6522 for { 6523 t := v.Type 6524 g := v.Args[0] 6525 if g.Op != OpS390XMOVWZload { 6526 break 6527 } 6528 off := g.AuxInt 6529 sym := g.Aux 6530 ptr := g.Args[0] 6531 mem := g.Args[1] 6532 x := v.Args[1] 6533 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6534 break 6535 } 6536 v.reset(OpS390XANDWload) 6537 v.Type = t 6538 v.AuxInt = off 6539 v.Aux = sym 6540 v.AddArg(x) 6541 v.AddArg(ptr) 6542 v.AddArg(mem) 6543 return true 6544 } 6545 return false 6546 } 6547 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6548 b := v.Block 6549 _ = b 6550 // match: (ANDWconst [c] (ANDWconst [d] x)) 6551 // cond: 6552 // result: (ANDWconst [c & d] x) 6553 for { 6554 c := v.AuxInt 6555 v_0 := v.Args[0] 6556 if v_0.Op != OpS390XANDWconst { 6557 break 6558 } 6559 d := v_0.AuxInt 6560 x := v_0.Args[0] 6561 v.reset(OpS390XANDWconst) 6562 v.AuxInt = c & d 6563 v.AddArg(x) 6564 return true 6565 } 6566 // match: (ANDWconst [0xFF] x) 6567 // cond: 6568 // result: (MOVBZreg x) 6569 for { 6570 if v.AuxInt != 0xFF { 6571 break 6572 } 6573 x := v.Args[0] 6574 v.reset(OpS390XMOVBZreg) 6575 v.AddArg(x) 6576 return true 6577 } 6578 // match: (ANDWconst [0xFFFF] x) 6579 // cond: 6580 // result: (MOVHZreg x) 6581 for { 6582 if v.AuxInt != 0xFFFF { 6583 break 6584 } 6585 x := v.Args[0] 6586 v.reset(OpS390XMOVHZreg) 6587 v.AddArg(x) 6588 return true 6589 } 6590 // match: (ANDWconst [c] _) 6591 // cond: int32(c)==0 6592 // result: (MOVDconst [0]) 6593 for { 6594 c := v.AuxInt 6595 if !(int32(c) == 0) { 6596 break 6597 } 6598 v.reset(OpS390XMOVDconst) 6599 v.AuxInt = 0 6600 return true 6601 } 6602 // match: (ANDWconst [c] x) 6603 // cond: int32(c)==-1 6604 // result: x 6605 for { 6606 c := v.AuxInt 6607 x := v.Args[0] 6608 if !(int32(c) == -1) { 6609 break 6610 } 6611 v.reset(OpCopy) 6612 v.Type = x.Type 6613 v.AddArg(x) 6614 return true 6615 } 6616 // match: (ANDWconst [c] (MOVDconst [d])) 6617 // cond: 6618 // result: (MOVDconst [c&d]) 6619 for { 6620 c := v.AuxInt 6621 v_0 := v.Args[0] 6622 if v_0.Op != OpS390XMOVDconst { 6623 break 6624 } 6625 d := v_0.AuxInt 6626 v.reset(OpS390XMOVDconst) 6627 v.AuxInt = c & d 6628 return true 6629 } 6630 return false 6631 } 6632 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6633 b := v.Block 6634 _ = b 6635 // match: (ANDconst [c] (ANDconst [d] x)) 6636 // cond: 6637 // result: (ANDconst [c & d] x) 6638 for { 6639 c := v.AuxInt 6640 v_0 := v.Args[0] 6641 if v_0.Op != OpS390XANDconst { 6642 break 6643 } 6644 d := v_0.AuxInt 6645 x := v_0.Args[0] 6646 v.reset(OpS390XANDconst) 6647 v.AuxInt = c & d 6648 v.AddArg(x) 6649 return true 6650 } 6651 // match: (ANDconst [0] _) 6652 // cond: 6653 // result: (MOVDconst [0]) 6654 for { 6655 if v.AuxInt != 0 { 6656 break 6657 } 6658 v.reset(OpS390XMOVDconst) 6659 v.AuxInt = 0 6660 return true 6661 } 6662 // match: (ANDconst [-1] x) 6663 // cond: 6664 // result: x 6665 for { 6666 if v.AuxInt != -1 { 6667 break 6668 } 6669 x := v.Args[0] 6670 v.reset(OpCopy) 6671 v.Type = x.Type 6672 v.AddArg(x) 6673 return true 6674 } 6675 // match: (ANDconst [c] (MOVDconst [d])) 6676 // cond: 6677 // result: (MOVDconst [c&d]) 6678 for { 6679 c := v.AuxInt 6680 v_0 := v.Args[0] 6681 if v_0.Op != OpS390XMOVDconst { 6682 break 6683 } 6684 d := v_0.AuxInt 6685 v.reset(OpS390XMOVDconst) 6686 v.AuxInt = c & d 6687 return true 6688 } 6689 return false 6690 } 6691 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6692 b := v.Block 6693 _ = b 6694 // match: (CMP x (MOVDconst [c])) 6695 // cond: is32Bit(c) 6696 // result: (CMPconst x [c]) 6697 for { 6698 x := v.Args[0] 6699 v_1 := v.Args[1] 6700 if v_1.Op != OpS390XMOVDconst { 6701 break 6702 } 6703 c := v_1.AuxInt 6704 if !(is32Bit(c)) { 6705 break 6706 } 6707 v.reset(OpS390XCMPconst) 6708 v.AuxInt = c 6709 v.AddArg(x) 6710 return true 6711 } 6712 // match: (CMP (MOVDconst [c]) x) 6713 // cond: is32Bit(c) 6714 // result: (InvertFlags (CMPconst x [c])) 6715 for { 6716 v_0 := v.Args[0] 6717 if v_0.Op != OpS390XMOVDconst { 6718 break 6719 } 6720 c := v_0.AuxInt 6721 x := v.Args[1] 6722 if !(is32Bit(c)) { 6723 break 6724 } 6725 v.reset(OpS390XInvertFlags) 6726 v0 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 6727 v0.AuxInt = c 6728 v0.AddArg(x) 6729 v.AddArg(v0) 6730 return true 6731 } 6732 return false 6733 } 6734 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6735 b := v.Block 6736 _ = b 6737 // match: (CMPU x (MOVDconst [c])) 6738 // cond: is32Bit(c) 6739 // result: (CMPUconst x [int64(uint32(c))]) 6740 for { 6741 x := v.Args[0] 6742 v_1 := v.Args[1] 6743 if v_1.Op != OpS390XMOVDconst { 6744 break 6745 } 6746 c := v_1.AuxInt 6747 if !(is32Bit(c)) { 6748 break 6749 } 6750 v.reset(OpS390XCMPUconst) 6751 v.AuxInt = int64(uint32(c)) 6752 v.AddArg(x) 6753 return true 6754 } 6755 // match: (CMPU (MOVDconst [c]) x) 6756 // cond: is32Bit(c) 6757 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6758 for { 6759 v_0 := v.Args[0] 6760 if v_0.Op != OpS390XMOVDconst { 6761 break 6762 } 6763 c := v_0.AuxInt 6764 x := v.Args[1] 6765 if !(is32Bit(c)) { 6766 break 6767 } 6768 v.reset(OpS390XInvertFlags) 6769 v0 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 6770 v0.AuxInt = int64(uint32(c)) 6771 v0.AddArg(x) 6772 v.AddArg(v0) 6773 return true 6774 } 6775 return false 6776 } 6777 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6778 b := v.Block 6779 _ = b 6780 // match: (CMPUconst (MOVDconst [x]) [y]) 6781 // cond: uint64(x)==uint64(y) 6782 // result: (FlagEQ) 6783 for { 6784 y := v.AuxInt 6785 v_0 := v.Args[0] 6786 if v_0.Op != OpS390XMOVDconst { 6787 break 6788 } 6789 x := v_0.AuxInt 6790 if !(uint64(x) == uint64(y)) { 6791 break 6792 } 6793 v.reset(OpS390XFlagEQ) 6794 return true 6795 } 6796 // match: (CMPUconst (MOVDconst [x]) [y]) 6797 // cond: uint64(x)<uint64(y) 6798 // result: (FlagLT) 6799 for { 6800 y := v.AuxInt 6801 v_0 := v.Args[0] 6802 if v_0.Op != OpS390XMOVDconst { 6803 break 6804 } 6805 x := v_0.AuxInt 6806 if !(uint64(x) < uint64(y)) { 6807 break 6808 } 6809 v.reset(OpS390XFlagLT) 6810 return true 6811 } 6812 // match: (CMPUconst (MOVDconst [x]) [y]) 6813 // cond: uint64(x)>uint64(y) 6814 // result: (FlagGT) 6815 for { 6816 y := v.AuxInt 6817 v_0 := v.Args[0] 6818 if v_0.Op != OpS390XMOVDconst { 6819 break 6820 } 6821 x := v_0.AuxInt 6822 if !(uint64(x) > uint64(y)) { 6823 break 6824 } 6825 v.reset(OpS390XFlagGT) 6826 return true 6827 } 6828 return false 6829 } 6830 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6831 b := v.Block 6832 _ = b 6833 // match: (CMPW x (MOVDconst [c])) 6834 // cond: 6835 // result: (CMPWconst x [c]) 6836 for { 6837 x := v.Args[0] 6838 v_1 := v.Args[1] 6839 if v_1.Op != OpS390XMOVDconst { 6840 break 6841 } 6842 c := v_1.AuxInt 6843 v.reset(OpS390XCMPWconst) 6844 v.AuxInt = c 6845 v.AddArg(x) 6846 return true 6847 } 6848 // match: (CMPW (MOVDconst [c]) x) 6849 // cond: 6850 // result: (InvertFlags (CMPWconst x [c])) 6851 for { 6852 v_0 := v.Args[0] 6853 if v_0.Op != OpS390XMOVDconst { 6854 break 6855 } 6856 c := v_0.AuxInt 6857 x := v.Args[1] 6858 v.reset(OpS390XInvertFlags) 6859 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 6860 v0.AuxInt = c 6861 v0.AddArg(x) 6862 v.AddArg(v0) 6863 return true 6864 } 6865 return false 6866 } 6867 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6868 b := v.Block 6869 _ = b 6870 // match: (CMPWU x (MOVDconst [c])) 6871 // cond: 6872 // result: (CMPWUconst x [int64(uint32(c))]) 6873 for { 6874 x := v.Args[0] 6875 v_1 := v.Args[1] 6876 if v_1.Op != OpS390XMOVDconst { 6877 break 6878 } 6879 c := v_1.AuxInt 6880 v.reset(OpS390XCMPWUconst) 6881 v.AuxInt = int64(uint32(c)) 6882 v.AddArg(x) 6883 return true 6884 } 6885 // match: (CMPWU (MOVDconst [c]) x) 6886 // cond: 6887 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6888 for { 6889 v_0 := v.Args[0] 6890 if v_0.Op != OpS390XMOVDconst { 6891 break 6892 } 6893 c := v_0.AuxInt 6894 x := v.Args[1] 6895 v.reset(OpS390XInvertFlags) 6896 v0 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 6897 v0.AuxInt = int64(uint32(c)) 6898 v0.AddArg(x) 6899 v.AddArg(v0) 6900 return true 6901 } 6902 return false 6903 } 6904 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 6905 b := v.Block 6906 _ = b 6907 // match: (CMPWUconst (MOVDconst [x]) [y]) 6908 // cond: uint32(x)==uint32(y) 6909 // result: (FlagEQ) 6910 for { 6911 y := v.AuxInt 6912 v_0 := v.Args[0] 6913 if v_0.Op != OpS390XMOVDconst { 6914 break 6915 } 6916 x := v_0.AuxInt 6917 if !(uint32(x) == uint32(y)) { 6918 break 6919 } 6920 v.reset(OpS390XFlagEQ) 6921 return true 6922 } 6923 // match: (CMPWUconst (MOVDconst [x]) [y]) 6924 // cond: uint32(x)<uint32(y) 6925 // result: (FlagLT) 6926 for { 6927 y := v.AuxInt 6928 v_0 := v.Args[0] 6929 if v_0.Op != OpS390XMOVDconst { 6930 break 6931 } 6932 x := v_0.AuxInt 6933 if !(uint32(x) < uint32(y)) { 6934 break 6935 } 6936 v.reset(OpS390XFlagLT) 6937 return true 6938 } 6939 // match: (CMPWUconst (MOVDconst [x]) [y]) 6940 // cond: uint32(x)>uint32(y) 6941 // result: (FlagGT) 6942 for { 6943 y := v.AuxInt 6944 v_0 := v.Args[0] 6945 if v_0.Op != OpS390XMOVDconst { 6946 break 6947 } 6948 x := v_0.AuxInt 6949 if !(uint32(x) > uint32(y)) { 6950 break 6951 } 6952 v.reset(OpS390XFlagGT) 6953 return true 6954 } 6955 return false 6956 } 6957 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 6958 b := v.Block 6959 _ = b 6960 // match: (CMPWconst (MOVDconst [x]) [y]) 6961 // cond: int32(x)==int32(y) 6962 // result: (FlagEQ) 6963 for { 6964 y := v.AuxInt 6965 v_0 := v.Args[0] 6966 if v_0.Op != OpS390XMOVDconst { 6967 break 6968 } 6969 x := v_0.AuxInt 6970 if !(int32(x) == int32(y)) { 6971 break 6972 } 6973 v.reset(OpS390XFlagEQ) 6974 return true 6975 } 6976 // match: (CMPWconst (MOVDconst [x]) [y]) 6977 // cond: int32(x)<int32(y) 6978 // result: (FlagLT) 6979 for { 6980 y := v.AuxInt 6981 v_0 := v.Args[0] 6982 if v_0.Op != OpS390XMOVDconst { 6983 break 6984 } 6985 x := v_0.AuxInt 6986 if !(int32(x) < int32(y)) { 6987 break 6988 } 6989 v.reset(OpS390XFlagLT) 6990 return true 6991 } 6992 // match: (CMPWconst (MOVDconst [x]) [y]) 6993 // cond: int32(x)>int32(y) 6994 // result: (FlagGT) 6995 for { 6996 y := v.AuxInt 6997 v_0 := v.Args[0] 6998 if v_0.Op != OpS390XMOVDconst { 6999 break 7000 } 7001 x := v_0.AuxInt 7002 if !(int32(x) > int32(y)) { 7003 break 7004 } 7005 v.reset(OpS390XFlagGT) 7006 return true 7007 } 7008 // match: (CMPWconst (SRWconst _ [c]) [n]) 7009 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7010 // result: (FlagLT) 7011 for { 7012 n := v.AuxInt 7013 v_0 := v.Args[0] 7014 if v_0.Op != OpS390XSRWconst { 7015 break 7016 } 7017 c := v_0.AuxInt 7018 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7019 break 7020 } 7021 v.reset(OpS390XFlagLT) 7022 return true 7023 } 7024 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7025 // cond: 0 <= int32(m) && int32(m) < int32(n) 7026 // result: (FlagLT) 7027 for { 7028 n := v.AuxInt 7029 v_0 := v.Args[0] 7030 if v_0.Op != OpS390XANDWconst { 7031 break 7032 } 7033 m := v_0.AuxInt 7034 if !(0 <= int32(m) && int32(m) < int32(n)) { 7035 break 7036 } 7037 v.reset(OpS390XFlagLT) 7038 return true 7039 } 7040 return false 7041 } 7042 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7043 b := v.Block 7044 _ = b 7045 // match: (CMPconst (MOVDconst [x]) [y]) 7046 // cond: x==y 7047 // result: (FlagEQ) 7048 for { 7049 y := v.AuxInt 7050 v_0 := v.Args[0] 7051 if v_0.Op != OpS390XMOVDconst { 7052 break 7053 } 7054 x := v_0.AuxInt 7055 if !(x == y) { 7056 break 7057 } 7058 v.reset(OpS390XFlagEQ) 7059 return true 7060 } 7061 // match: (CMPconst (MOVDconst [x]) [y]) 7062 // cond: x<y 7063 // result: (FlagLT) 7064 for { 7065 y := v.AuxInt 7066 v_0 := v.Args[0] 7067 if v_0.Op != OpS390XMOVDconst { 7068 break 7069 } 7070 x := v_0.AuxInt 7071 if !(x < y) { 7072 break 7073 } 7074 v.reset(OpS390XFlagLT) 7075 return true 7076 } 7077 // match: (CMPconst (MOVDconst [x]) [y]) 7078 // cond: x>y 7079 // result: (FlagGT) 7080 for { 7081 y := v.AuxInt 7082 v_0 := v.Args[0] 7083 if v_0.Op != OpS390XMOVDconst { 7084 break 7085 } 7086 x := v_0.AuxInt 7087 if !(x > y) { 7088 break 7089 } 7090 v.reset(OpS390XFlagGT) 7091 return true 7092 } 7093 // match: (CMPconst (MOVBZreg _) [c]) 7094 // cond: 0xFF < c 7095 // result: (FlagLT) 7096 for { 7097 c := v.AuxInt 7098 v_0 := v.Args[0] 7099 if v_0.Op != OpS390XMOVBZreg { 7100 break 7101 } 7102 if !(0xFF < c) { 7103 break 7104 } 7105 v.reset(OpS390XFlagLT) 7106 return true 7107 } 7108 // match: (CMPconst (MOVHZreg _) [c]) 7109 // cond: 0xFFFF < c 7110 // result: (FlagLT) 7111 for { 7112 c := v.AuxInt 7113 v_0 := v.Args[0] 7114 if v_0.Op != OpS390XMOVHZreg { 7115 break 7116 } 7117 if !(0xFFFF < c) { 7118 break 7119 } 7120 v.reset(OpS390XFlagLT) 7121 return true 7122 } 7123 // match: (CMPconst (MOVWZreg _) [c]) 7124 // cond: 0xFFFFFFFF < c 7125 // result: (FlagLT) 7126 for { 7127 c := v.AuxInt 7128 v_0 := v.Args[0] 7129 if v_0.Op != OpS390XMOVWZreg { 7130 break 7131 } 7132 if !(0xFFFFFFFF < c) { 7133 break 7134 } 7135 v.reset(OpS390XFlagLT) 7136 return true 7137 } 7138 // match: (CMPconst (SRDconst _ [c]) [n]) 7139 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7140 // result: (FlagLT) 7141 for { 7142 n := v.AuxInt 7143 v_0 := v.Args[0] 7144 if v_0.Op != OpS390XSRDconst { 7145 break 7146 } 7147 c := v_0.AuxInt 7148 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7149 break 7150 } 7151 v.reset(OpS390XFlagLT) 7152 return true 7153 } 7154 // match: (CMPconst (ANDconst _ [m]) [n]) 7155 // cond: 0 <= m && m < n 7156 // result: (FlagLT) 7157 for { 7158 n := v.AuxInt 7159 v_0 := v.Args[0] 7160 if v_0.Op != OpS390XANDconst { 7161 break 7162 } 7163 m := v_0.AuxInt 7164 if !(0 <= m && m < n) { 7165 break 7166 } 7167 v.reset(OpS390XFlagLT) 7168 return true 7169 } 7170 return false 7171 } 7172 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7173 b := v.Block 7174 _ = b 7175 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7176 // cond: is20Bit(off1+off2) 7177 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7178 for { 7179 off1 := v.AuxInt 7180 sym := v.Aux 7181 v_0 := v.Args[0] 7182 if v_0.Op != OpS390XADDconst { 7183 break 7184 } 7185 off2 := v_0.AuxInt 7186 ptr := v_0.Args[0] 7187 mem := v.Args[1] 7188 if !(is20Bit(off1 + off2)) { 7189 break 7190 } 7191 v.reset(OpS390XFMOVDload) 7192 v.AuxInt = off1 + off2 7193 v.Aux = sym 7194 v.AddArg(ptr) 7195 v.AddArg(mem) 7196 return true 7197 } 7198 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7199 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7200 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7201 for { 7202 off1 := v.AuxInt 7203 sym1 := v.Aux 7204 v_0 := v.Args[0] 7205 if v_0.Op != OpS390XMOVDaddr { 7206 break 7207 } 7208 off2 := v_0.AuxInt 7209 sym2 := v_0.Aux 7210 base := v_0.Args[0] 7211 mem := v.Args[1] 7212 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7213 break 7214 } 7215 v.reset(OpS390XFMOVDload) 7216 v.AuxInt = off1 + off2 7217 v.Aux = mergeSym(sym1, sym2) 7218 v.AddArg(base) 7219 v.AddArg(mem) 7220 return true 7221 } 7222 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7223 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7224 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7225 for { 7226 off1 := v.AuxInt 7227 sym1 := v.Aux 7228 v_0 := v.Args[0] 7229 if v_0.Op != OpS390XMOVDaddridx { 7230 break 7231 } 7232 off2 := v_0.AuxInt 7233 sym2 := v_0.Aux 7234 ptr := v_0.Args[0] 7235 idx := v_0.Args[1] 7236 mem := v.Args[1] 7237 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7238 break 7239 } 7240 v.reset(OpS390XFMOVDloadidx) 7241 v.AuxInt = off1 + off2 7242 v.Aux = mergeSym(sym1, sym2) 7243 v.AddArg(ptr) 7244 v.AddArg(idx) 7245 v.AddArg(mem) 7246 return true 7247 } 7248 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7249 // cond: ptr.Op != OpSB 7250 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7251 for { 7252 off := v.AuxInt 7253 sym := v.Aux 7254 v_0 := v.Args[0] 7255 if v_0.Op != OpS390XADD { 7256 break 7257 } 7258 ptr := v_0.Args[0] 7259 idx := v_0.Args[1] 7260 mem := v.Args[1] 7261 if !(ptr.Op != OpSB) { 7262 break 7263 } 7264 v.reset(OpS390XFMOVDloadidx) 7265 v.AuxInt = off 7266 v.Aux = sym 7267 v.AddArg(ptr) 7268 v.AddArg(idx) 7269 v.AddArg(mem) 7270 return true 7271 } 7272 return false 7273 } 7274 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7275 b := v.Block 7276 _ = b 7277 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7278 // cond: 7279 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7280 for { 7281 c := v.AuxInt 7282 sym := v.Aux 7283 v_0 := v.Args[0] 7284 if v_0.Op != OpS390XADDconst { 7285 break 7286 } 7287 d := v_0.AuxInt 7288 ptr := v_0.Args[0] 7289 idx := v.Args[1] 7290 mem := v.Args[2] 7291 v.reset(OpS390XFMOVDloadidx) 7292 v.AuxInt = c + d 7293 v.Aux = sym 7294 v.AddArg(ptr) 7295 v.AddArg(idx) 7296 v.AddArg(mem) 7297 return true 7298 } 7299 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7300 // cond: 7301 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7302 for { 7303 c := v.AuxInt 7304 sym := v.Aux 7305 ptr := v.Args[0] 7306 v_1 := v.Args[1] 7307 if v_1.Op != OpS390XADDconst { 7308 break 7309 } 7310 d := v_1.AuxInt 7311 idx := v_1.Args[0] 7312 mem := v.Args[2] 7313 v.reset(OpS390XFMOVDloadidx) 7314 v.AuxInt = c + d 7315 v.Aux = sym 7316 v.AddArg(ptr) 7317 v.AddArg(idx) 7318 v.AddArg(mem) 7319 return true 7320 } 7321 return false 7322 } 7323 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7324 b := v.Block 7325 _ = b 7326 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7327 // cond: is20Bit(off1+off2) 7328 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7329 for { 7330 off1 := v.AuxInt 7331 sym := v.Aux 7332 v_0 := v.Args[0] 7333 if v_0.Op != OpS390XADDconst { 7334 break 7335 } 7336 off2 := v_0.AuxInt 7337 ptr := v_0.Args[0] 7338 val := v.Args[1] 7339 mem := v.Args[2] 7340 if !(is20Bit(off1 + off2)) { 7341 break 7342 } 7343 v.reset(OpS390XFMOVDstore) 7344 v.AuxInt = off1 + off2 7345 v.Aux = sym 7346 v.AddArg(ptr) 7347 v.AddArg(val) 7348 v.AddArg(mem) 7349 return true 7350 } 7351 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7352 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7353 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7354 for { 7355 off1 := v.AuxInt 7356 sym1 := v.Aux 7357 v_0 := v.Args[0] 7358 if v_0.Op != OpS390XMOVDaddr { 7359 break 7360 } 7361 off2 := v_0.AuxInt 7362 sym2 := v_0.Aux 7363 base := v_0.Args[0] 7364 val := v.Args[1] 7365 mem := v.Args[2] 7366 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7367 break 7368 } 7369 v.reset(OpS390XFMOVDstore) 7370 v.AuxInt = off1 + off2 7371 v.Aux = mergeSym(sym1, sym2) 7372 v.AddArg(base) 7373 v.AddArg(val) 7374 v.AddArg(mem) 7375 return true 7376 } 7377 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7378 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7379 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7380 for { 7381 off1 := v.AuxInt 7382 sym1 := v.Aux 7383 v_0 := v.Args[0] 7384 if v_0.Op != OpS390XMOVDaddridx { 7385 break 7386 } 7387 off2 := v_0.AuxInt 7388 sym2 := v_0.Aux 7389 ptr := v_0.Args[0] 7390 idx := v_0.Args[1] 7391 val := v.Args[1] 7392 mem := v.Args[2] 7393 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7394 break 7395 } 7396 v.reset(OpS390XFMOVDstoreidx) 7397 v.AuxInt = off1 + off2 7398 v.Aux = mergeSym(sym1, sym2) 7399 v.AddArg(ptr) 7400 v.AddArg(idx) 7401 v.AddArg(val) 7402 v.AddArg(mem) 7403 return true 7404 } 7405 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7406 // cond: ptr.Op != OpSB 7407 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7408 for { 7409 off := v.AuxInt 7410 sym := v.Aux 7411 v_0 := v.Args[0] 7412 if v_0.Op != OpS390XADD { 7413 break 7414 } 7415 ptr := v_0.Args[0] 7416 idx := v_0.Args[1] 7417 val := v.Args[1] 7418 mem := v.Args[2] 7419 if !(ptr.Op != OpSB) { 7420 break 7421 } 7422 v.reset(OpS390XFMOVDstoreidx) 7423 v.AuxInt = off 7424 v.Aux = sym 7425 v.AddArg(ptr) 7426 v.AddArg(idx) 7427 v.AddArg(val) 7428 v.AddArg(mem) 7429 return true 7430 } 7431 return false 7432 } 7433 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7434 b := v.Block 7435 _ = b 7436 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7437 // cond: 7438 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7439 for { 7440 c := v.AuxInt 7441 sym := v.Aux 7442 v_0 := v.Args[0] 7443 if v_0.Op != OpS390XADDconst { 7444 break 7445 } 7446 d := v_0.AuxInt 7447 ptr := v_0.Args[0] 7448 idx := v.Args[1] 7449 val := v.Args[2] 7450 mem := v.Args[3] 7451 v.reset(OpS390XFMOVDstoreidx) 7452 v.AuxInt = c + d 7453 v.Aux = sym 7454 v.AddArg(ptr) 7455 v.AddArg(idx) 7456 v.AddArg(val) 7457 v.AddArg(mem) 7458 return true 7459 } 7460 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7461 // cond: 7462 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7463 for { 7464 c := v.AuxInt 7465 sym := v.Aux 7466 ptr := v.Args[0] 7467 v_1 := v.Args[1] 7468 if v_1.Op != OpS390XADDconst { 7469 break 7470 } 7471 d := v_1.AuxInt 7472 idx := v_1.Args[0] 7473 val := v.Args[2] 7474 mem := v.Args[3] 7475 v.reset(OpS390XFMOVDstoreidx) 7476 v.AuxInt = c + d 7477 v.Aux = sym 7478 v.AddArg(ptr) 7479 v.AddArg(idx) 7480 v.AddArg(val) 7481 v.AddArg(mem) 7482 return true 7483 } 7484 return false 7485 } 7486 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7487 b := v.Block 7488 _ = b 7489 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7490 // cond: is20Bit(off1+off2) 7491 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7492 for { 7493 off1 := v.AuxInt 7494 sym := v.Aux 7495 v_0 := v.Args[0] 7496 if v_0.Op != OpS390XADDconst { 7497 break 7498 } 7499 off2 := v_0.AuxInt 7500 ptr := v_0.Args[0] 7501 mem := v.Args[1] 7502 if !(is20Bit(off1 + off2)) { 7503 break 7504 } 7505 v.reset(OpS390XFMOVSload) 7506 v.AuxInt = off1 + off2 7507 v.Aux = sym 7508 v.AddArg(ptr) 7509 v.AddArg(mem) 7510 return true 7511 } 7512 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7513 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7514 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7515 for { 7516 off1 := v.AuxInt 7517 sym1 := v.Aux 7518 v_0 := v.Args[0] 7519 if v_0.Op != OpS390XMOVDaddr { 7520 break 7521 } 7522 off2 := v_0.AuxInt 7523 sym2 := v_0.Aux 7524 base := v_0.Args[0] 7525 mem := v.Args[1] 7526 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7527 break 7528 } 7529 v.reset(OpS390XFMOVSload) 7530 v.AuxInt = off1 + off2 7531 v.Aux = mergeSym(sym1, sym2) 7532 v.AddArg(base) 7533 v.AddArg(mem) 7534 return true 7535 } 7536 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7537 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7538 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7539 for { 7540 off1 := v.AuxInt 7541 sym1 := v.Aux 7542 v_0 := v.Args[0] 7543 if v_0.Op != OpS390XMOVDaddridx { 7544 break 7545 } 7546 off2 := v_0.AuxInt 7547 sym2 := v_0.Aux 7548 ptr := v_0.Args[0] 7549 idx := v_0.Args[1] 7550 mem := v.Args[1] 7551 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7552 break 7553 } 7554 v.reset(OpS390XFMOVSloadidx) 7555 v.AuxInt = off1 + off2 7556 v.Aux = mergeSym(sym1, sym2) 7557 v.AddArg(ptr) 7558 v.AddArg(idx) 7559 v.AddArg(mem) 7560 return true 7561 } 7562 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7563 // cond: ptr.Op != OpSB 7564 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7565 for { 7566 off := v.AuxInt 7567 sym := v.Aux 7568 v_0 := v.Args[0] 7569 if v_0.Op != OpS390XADD { 7570 break 7571 } 7572 ptr := v_0.Args[0] 7573 idx := v_0.Args[1] 7574 mem := v.Args[1] 7575 if !(ptr.Op != OpSB) { 7576 break 7577 } 7578 v.reset(OpS390XFMOVSloadidx) 7579 v.AuxInt = off 7580 v.Aux = sym 7581 v.AddArg(ptr) 7582 v.AddArg(idx) 7583 v.AddArg(mem) 7584 return true 7585 } 7586 return false 7587 } 7588 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7589 b := v.Block 7590 _ = b 7591 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7592 // cond: 7593 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7594 for { 7595 c := v.AuxInt 7596 sym := v.Aux 7597 v_0 := v.Args[0] 7598 if v_0.Op != OpS390XADDconst { 7599 break 7600 } 7601 d := v_0.AuxInt 7602 ptr := v_0.Args[0] 7603 idx := v.Args[1] 7604 mem := v.Args[2] 7605 v.reset(OpS390XFMOVSloadidx) 7606 v.AuxInt = c + d 7607 v.Aux = sym 7608 v.AddArg(ptr) 7609 v.AddArg(idx) 7610 v.AddArg(mem) 7611 return true 7612 } 7613 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7614 // cond: 7615 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7616 for { 7617 c := v.AuxInt 7618 sym := v.Aux 7619 ptr := v.Args[0] 7620 v_1 := v.Args[1] 7621 if v_1.Op != OpS390XADDconst { 7622 break 7623 } 7624 d := v_1.AuxInt 7625 idx := v_1.Args[0] 7626 mem := v.Args[2] 7627 v.reset(OpS390XFMOVSloadidx) 7628 v.AuxInt = c + d 7629 v.Aux = sym 7630 v.AddArg(ptr) 7631 v.AddArg(idx) 7632 v.AddArg(mem) 7633 return true 7634 } 7635 return false 7636 } 7637 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7638 b := v.Block 7639 _ = b 7640 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7641 // cond: is20Bit(off1+off2) 7642 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7643 for { 7644 off1 := v.AuxInt 7645 sym := v.Aux 7646 v_0 := v.Args[0] 7647 if v_0.Op != OpS390XADDconst { 7648 break 7649 } 7650 off2 := v_0.AuxInt 7651 ptr := v_0.Args[0] 7652 val := v.Args[1] 7653 mem := v.Args[2] 7654 if !(is20Bit(off1 + off2)) { 7655 break 7656 } 7657 v.reset(OpS390XFMOVSstore) 7658 v.AuxInt = off1 + off2 7659 v.Aux = sym 7660 v.AddArg(ptr) 7661 v.AddArg(val) 7662 v.AddArg(mem) 7663 return true 7664 } 7665 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7666 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7667 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7668 for { 7669 off1 := v.AuxInt 7670 sym1 := v.Aux 7671 v_0 := v.Args[0] 7672 if v_0.Op != OpS390XMOVDaddr { 7673 break 7674 } 7675 off2 := v_0.AuxInt 7676 sym2 := v_0.Aux 7677 base := v_0.Args[0] 7678 val := v.Args[1] 7679 mem := v.Args[2] 7680 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7681 break 7682 } 7683 v.reset(OpS390XFMOVSstore) 7684 v.AuxInt = off1 + off2 7685 v.Aux = mergeSym(sym1, sym2) 7686 v.AddArg(base) 7687 v.AddArg(val) 7688 v.AddArg(mem) 7689 return true 7690 } 7691 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7692 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7693 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7694 for { 7695 off1 := v.AuxInt 7696 sym1 := v.Aux 7697 v_0 := v.Args[0] 7698 if v_0.Op != OpS390XMOVDaddridx { 7699 break 7700 } 7701 off2 := v_0.AuxInt 7702 sym2 := v_0.Aux 7703 ptr := v_0.Args[0] 7704 idx := v_0.Args[1] 7705 val := v.Args[1] 7706 mem := v.Args[2] 7707 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7708 break 7709 } 7710 v.reset(OpS390XFMOVSstoreidx) 7711 v.AuxInt = off1 + off2 7712 v.Aux = mergeSym(sym1, sym2) 7713 v.AddArg(ptr) 7714 v.AddArg(idx) 7715 v.AddArg(val) 7716 v.AddArg(mem) 7717 return true 7718 } 7719 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7720 // cond: ptr.Op != OpSB 7721 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7722 for { 7723 off := v.AuxInt 7724 sym := v.Aux 7725 v_0 := v.Args[0] 7726 if v_0.Op != OpS390XADD { 7727 break 7728 } 7729 ptr := v_0.Args[0] 7730 idx := v_0.Args[1] 7731 val := v.Args[1] 7732 mem := v.Args[2] 7733 if !(ptr.Op != OpSB) { 7734 break 7735 } 7736 v.reset(OpS390XFMOVSstoreidx) 7737 v.AuxInt = off 7738 v.Aux = sym 7739 v.AddArg(ptr) 7740 v.AddArg(idx) 7741 v.AddArg(val) 7742 v.AddArg(mem) 7743 return true 7744 } 7745 return false 7746 } 7747 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7748 b := v.Block 7749 _ = b 7750 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7751 // cond: 7752 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7753 for { 7754 c := v.AuxInt 7755 sym := v.Aux 7756 v_0 := v.Args[0] 7757 if v_0.Op != OpS390XADDconst { 7758 break 7759 } 7760 d := v_0.AuxInt 7761 ptr := v_0.Args[0] 7762 idx := v.Args[1] 7763 val := v.Args[2] 7764 mem := v.Args[3] 7765 v.reset(OpS390XFMOVSstoreidx) 7766 v.AuxInt = c + d 7767 v.Aux = sym 7768 v.AddArg(ptr) 7769 v.AddArg(idx) 7770 v.AddArg(val) 7771 v.AddArg(mem) 7772 return true 7773 } 7774 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7775 // cond: 7776 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7777 for { 7778 c := v.AuxInt 7779 sym := v.Aux 7780 ptr := v.Args[0] 7781 v_1 := v.Args[1] 7782 if v_1.Op != OpS390XADDconst { 7783 break 7784 } 7785 d := v_1.AuxInt 7786 idx := v_1.Args[0] 7787 val := v.Args[2] 7788 mem := v.Args[3] 7789 v.reset(OpS390XFMOVSstoreidx) 7790 v.AuxInt = c + d 7791 v.Aux = sym 7792 v.AddArg(ptr) 7793 v.AddArg(idx) 7794 v.AddArg(val) 7795 v.AddArg(mem) 7796 return true 7797 } 7798 return false 7799 } 7800 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7801 b := v.Block 7802 _ = b 7803 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7804 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7805 // result: x 7806 for { 7807 off := v.AuxInt 7808 sym := v.Aux 7809 ptr := v.Args[0] 7810 v_1 := v.Args[1] 7811 if v_1.Op != OpS390XMOVBstore { 7812 break 7813 } 7814 off2 := v_1.AuxInt 7815 sym2 := v_1.Aux 7816 ptr2 := v_1.Args[0] 7817 x := v_1.Args[1] 7818 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7819 break 7820 } 7821 v.reset(OpCopy) 7822 v.Type = x.Type 7823 v.AddArg(x) 7824 return true 7825 } 7826 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7827 // cond: is20Bit(off1+off2) 7828 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7829 for { 7830 off1 := v.AuxInt 7831 sym := v.Aux 7832 v_0 := v.Args[0] 7833 if v_0.Op != OpS390XADDconst { 7834 break 7835 } 7836 off2 := v_0.AuxInt 7837 ptr := v_0.Args[0] 7838 mem := v.Args[1] 7839 if !(is20Bit(off1 + off2)) { 7840 break 7841 } 7842 v.reset(OpS390XMOVBZload) 7843 v.AuxInt = off1 + off2 7844 v.Aux = sym 7845 v.AddArg(ptr) 7846 v.AddArg(mem) 7847 return true 7848 } 7849 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7850 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7851 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7852 for { 7853 off1 := v.AuxInt 7854 sym1 := v.Aux 7855 v_0 := v.Args[0] 7856 if v_0.Op != OpS390XMOVDaddr { 7857 break 7858 } 7859 off2 := v_0.AuxInt 7860 sym2 := v_0.Aux 7861 base := v_0.Args[0] 7862 mem := v.Args[1] 7863 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7864 break 7865 } 7866 v.reset(OpS390XMOVBZload) 7867 v.AuxInt = off1 + off2 7868 v.Aux = mergeSym(sym1, sym2) 7869 v.AddArg(base) 7870 v.AddArg(mem) 7871 return true 7872 } 7873 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7874 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7875 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7876 for { 7877 off1 := v.AuxInt 7878 sym1 := v.Aux 7879 v_0 := v.Args[0] 7880 if v_0.Op != OpS390XMOVDaddridx { 7881 break 7882 } 7883 off2 := v_0.AuxInt 7884 sym2 := v_0.Aux 7885 ptr := v_0.Args[0] 7886 idx := v_0.Args[1] 7887 mem := v.Args[1] 7888 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7889 break 7890 } 7891 v.reset(OpS390XMOVBZloadidx) 7892 v.AuxInt = off1 + off2 7893 v.Aux = mergeSym(sym1, sym2) 7894 v.AddArg(ptr) 7895 v.AddArg(idx) 7896 v.AddArg(mem) 7897 return true 7898 } 7899 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 7900 // cond: ptr.Op != OpSB 7901 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 7902 for { 7903 off := v.AuxInt 7904 sym := v.Aux 7905 v_0 := v.Args[0] 7906 if v_0.Op != OpS390XADD { 7907 break 7908 } 7909 ptr := v_0.Args[0] 7910 idx := v_0.Args[1] 7911 mem := v.Args[1] 7912 if !(ptr.Op != OpSB) { 7913 break 7914 } 7915 v.reset(OpS390XMOVBZloadidx) 7916 v.AuxInt = off 7917 v.Aux = sym 7918 v.AddArg(ptr) 7919 v.AddArg(idx) 7920 v.AddArg(mem) 7921 return true 7922 } 7923 return false 7924 } 7925 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 7926 b := v.Block 7927 _ = b 7928 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7929 // cond: 7930 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7931 for { 7932 c := v.AuxInt 7933 sym := v.Aux 7934 v_0 := v.Args[0] 7935 if v_0.Op != OpS390XADDconst { 7936 break 7937 } 7938 d := v_0.AuxInt 7939 ptr := v_0.Args[0] 7940 idx := v.Args[1] 7941 mem := v.Args[2] 7942 v.reset(OpS390XMOVBZloadidx) 7943 v.AuxInt = c + d 7944 v.Aux = sym 7945 v.AddArg(ptr) 7946 v.AddArg(idx) 7947 v.AddArg(mem) 7948 return true 7949 } 7950 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7951 // cond: 7952 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7953 for { 7954 c := v.AuxInt 7955 sym := v.Aux 7956 ptr := v.Args[0] 7957 v_1 := v.Args[1] 7958 if v_1.Op != OpS390XADDconst { 7959 break 7960 } 7961 d := v_1.AuxInt 7962 idx := v_1.Args[0] 7963 mem := v.Args[2] 7964 v.reset(OpS390XMOVBZloadidx) 7965 v.AuxInt = c + d 7966 v.Aux = sym 7967 v.AddArg(ptr) 7968 v.AddArg(idx) 7969 v.AddArg(mem) 7970 return true 7971 } 7972 return false 7973 } 7974 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 7975 b := v.Block 7976 _ = b 7977 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 7978 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 7979 // result: x 7980 for { 7981 x := v.Args[0] 7982 if x.Op != OpS390XMOVDLT { 7983 break 7984 } 7985 x_0 := x.Args[0] 7986 if x_0.Op != OpS390XMOVDconst { 7987 break 7988 } 7989 c := x_0.AuxInt 7990 x_1 := x.Args[1] 7991 if x_1.Op != OpS390XMOVDconst { 7992 break 7993 } 7994 d := x_1.AuxInt 7995 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 7996 break 7997 } 7998 v.reset(OpCopy) 7999 v.Type = x.Type 8000 v.AddArg(x) 8001 return true 8002 } 8003 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8004 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8005 // result: x 8006 for { 8007 x := v.Args[0] 8008 if x.Op != OpS390XMOVDLE { 8009 break 8010 } 8011 x_0 := x.Args[0] 8012 if x_0.Op != OpS390XMOVDconst { 8013 break 8014 } 8015 c := x_0.AuxInt 8016 x_1 := x.Args[1] 8017 if x_1.Op != OpS390XMOVDconst { 8018 break 8019 } 8020 d := x_1.AuxInt 8021 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8022 break 8023 } 8024 v.reset(OpCopy) 8025 v.Type = x.Type 8026 v.AddArg(x) 8027 return true 8028 } 8029 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8030 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8031 // result: x 8032 for { 8033 x := v.Args[0] 8034 if x.Op != OpS390XMOVDGT { 8035 break 8036 } 8037 x_0 := x.Args[0] 8038 if x_0.Op != OpS390XMOVDconst { 8039 break 8040 } 8041 c := x_0.AuxInt 8042 x_1 := x.Args[1] 8043 if x_1.Op != OpS390XMOVDconst { 8044 break 8045 } 8046 d := x_1.AuxInt 8047 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8048 break 8049 } 8050 v.reset(OpCopy) 8051 v.Type = x.Type 8052 v.AddArg(x) 8053 return true 8054 } 8055 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8056 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8057 // result: x 8058 for { 8059 x := v.Args[0] 8060 if x.Op != OpS390XMOVDGE { 8061 break 8062 } 8063 x_0 := x.Args[0] 8064 if x_0.Op != OpS390XMOVDconst { 8065 break 8066 } 8067 c := x_0.AuxInt 8068 x_1 := x.Args[1] 8069 if x_1.Op != OpS390XMOVDconst { 8070 break 8071 } 8072 d := x_1.AuxInt 8073 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8074 break 8075 } 8076 v.reset(OpCopy) 8077 v.Type = x.Type 8078 v.AddArg(x) 8079 return true 8080 } 8081 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8082 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8083 // result: x 8084 for { 8085 x := v.Args[0] 8086 if x.Op != OpS390XMOVDEQ { 8087 break 8088 } 8089 x_0 := x.Args[0] 8090 if x_0.Op != OpS390XMOVDconst { 8091 break 8092 } 8093 c := x_0.AuxInt 8094 x_1 := x.Args[1] 8095 if x_1.Op != OpS390XMOVDconst { 8096 break 8097 } 8098 d := x_1.AuxInt 8099 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8100 break 8101 } 8102 v.reset(OpCopy) 8103 v.Type = x.Type 8104 v.AddArg(x) 8105 return true 8106 } 8107 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8108 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8109 // result: x 8110 for { 8111 x := v.Args[0] 8112 if x.Op != OpS390XMOVDNE { 8113 break 8114 } 8115 x_0 := x.Args[0] 8116 if x_0.Op != OpS390XMOVDconst { 8117 break 8118 } 8119 c := x_0.AuxInt 8120 x_1 := x.Args[1] 8121 if x_1.Op != OpS390XMOVDconst { 8122 break 8123 } 8124 d := x_1.AuxInt 8125 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8126 break 8127 } 8128 v.reset(OpCopy) 8129 v.Type = x.Type 8130 v.AddArg(x) 8131 return true 8132 } 8133 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8134 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8135 // result: x 8136 for { 8137 x := v.Args[0] 8138 if x.Op != OpS390XMOVDGTnoinv { 8139 break 8140 } 8141 x_0 := x.Args[0] 8142 if x_0.Op != OpS390XMOVDconst { 8143 break 8144 } 8145 c := x_0.AuxInt 8146 x_1 := x.Args[1] 8147 if x_1.Op != OpS390XMOVDconst { 8148 break 8149 } 8150 d := x_1.AuxInt 8151 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8152 break 8153 } 8154 v.reset(OpCopy) 8155 v.Type = x.Type 8156 v.AddArg(x) 8157 return true 8158 } 8159 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8160 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8161 // result: x 8162 for { 8163 x := v.Args[0] 8164 if x.Op != OpS390XMOVDGEnoinv { 8165 break 8166 } 8167 x_0 := x.Args[0] 8168 if x_0.Op != OpS390XMOVDconst { 8169 break 8170 } 8171 c := x_0.AuxInt 8172 x_1 := x.Args[1] 8173 if x_1.Op != OpS390XMOVDconst { 8174 break 8175 } 8176 d := x_1.AuxInt 8177 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8178 break 8179 } 8180 v.reset(OpCopy) 8181 v.Type = x.Type 8182 v.AddArg(x) 8183 return true 8184 } 8185 // match: (MOVBZreg x:(MOVBZload _ _)) 8186 // cond: 8187 // result: x 8188 for { 8189 x := v.Args[0] 8190 if x.Op != OpS390XMOVBZload { 8191 break 8192 } 8193 v.reset(OpCopy) 8194 v.Type = x.Type 8195 v.AddArg(x) 8196 return true 8197 } 8198 // match: (MOVBZreg x:(Arg <t>)) 8199 // cond: is8BitInt(t) && !isSigned(t) 8200 // result: x 8201 for { 8202 x := v.Args[0] 8203 if x.Op != OpArg { 8204 break 8205 } 8206 t := x.Type 8207 if !(is8BitInt(t) && !isSigned(t)) { 8208 break 8209 } 8210 v.reset(OpCopy) 8211 v.Type = x.Type 8212 v.AddArg(x) 8213 return true 8214 } 8215 // match: (MOVBZreg x:(MOVBZreg _)) 8216 // cond: 8217 // result: x 8218 for { 8219 x := v.Args[0] 8220 if x.Op != OpS390XMOVBZreg { 8221 break 8222 } 8223 v.reset(OpCopy) 8224 v.Type = x.Type 8225 v.AddArg(x) 8226 return true 8227 } 8228 // match: (MOVBZreg (MOVDconst [c])) 8229 // cond: 8230 // result: (MOVDconst [int64(uint8(c))]) 8231 for { 8232 v_0 := v.Args[0] 8233 if v_0.Op != OpS390XMOVDconst { 8234 break 8235 } 8236 c := v_0.AuxInt 8237 v.reset(OpS390XMOVDconst) 8238 v.AuxInt = int64(uint8(c)) 8239 return true 8240 } 8241 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8242 // cond: x.Uses == 1 && clobber(x) 8243 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8244 for { 8245 x := v.Args[0] 8246 if x.Op != OpS390XMOVBZload { 8247 break 8248 } 8249 off := x.AuxInt 8250 sym := x.Aux 8251 ptr := x.Args[0] 8252 mem := x.Args[1] 8253 if !(x.Uses == 1 && clobber(x)) { 8254 break 8255 } 8256 b = x.Block 8257 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, v.Type) 8258 v.reset(OpCopy) 8259 v.AddArg(v0) 8260 v0.AuxInt = off 8261 v0.Aux = sym 8262 v0.AddArg(ptr) 8263 v0.AddArg(mem) 8264 return true 8265 } 8266 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8267 // cond: x.Uses == 1 && clobber(x) 8268 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8269 for { 8270 x := v.Args[0] 8271 if x.Op != OpS390XMOVBZloadidx { 8272 break 8273 } 8274 off := x.AuxInt 8275 sym := x.Aux 8276 ptr := x.Args[0] 8277 idx := x.Args[1] 8278 mem := x.Args[2] 8279 if !(x.Uses == 1 && clobber(x)) { 8280 break 8281 } 8282 b = x.Block 8283 v0 := b.NewValue0(v.Line, OpS390XMOVBZloadidx, v.Type) 8284 v.reset(OpCopy) 8285 v.AddArg(v0) 8286 v0.AuxInt = off 8287 v0.Aux = sym 8288 v0.AddArg(ptr) 8289 v0.AddArg(idx) 8290 v0.AddArg(mem) 8291 return true 8292 } 8293 return false 8294 } 8295 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8296 b := v.Block 8297 _ = b 8298 // match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) 8299 // cond: is20Bit(off1+off2) 8300 // result: (MOVBload [off1+off2] {sym} ptr mem) 8301 for { 8302 off1 := v.AuxInt 8303 sym := v.Aux 8304 v_0 := v.Args[0] 8305 if v_0.Op != OpS390XADDconst { 8306 break 8307 } 8308 off2 := v_0.AuxInt 8309 ptr := v_0.Args[0] 8310 mem := v.Args[1] 8311 if !(is20Bit(off1 + off2)) { 8312 break 8313 } 8314 v.reset(OpS390XMOVBload) 8315 v.AuxInt = off1 + off2 8316 v.Aux = sym 8317 v.AddArg(ptr) 8318 v.AddArg(mem) 8319 return true 8320 } 8321 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8322 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8323 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8324 for { 8325 off1 := v.AuxInt 8326 sym1 := v.Aux 8327 v_0 := v.Args[0] 8328 if v_0.Op != OpS390XMOVDaddr { 8329 break 8330 } 8331 off2 := v_0.AuxInt 8332 sym2 := v_0.Aux 8333 base := v_0.Args[0] 8334 mem := v.Args[1] 8335 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8336 break 8337 } 8338 v.reset(OpS390XMOVBload) 8339 v.AuxInt = off1 + off2 8340 v.Aux = mergeSym(sym1, sym2) 8341 v.AddArg(base) 8342 v.AddArg(mem) 8343 return true 8344 } 8345 return false 8346 } 8347 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8348 b := v.Block 8349 _ = b 8350 // match: (MOVBreg x:(MOVBload _ _)) 8351 // cond: 8352 // result: x 8353 for { 8354 x := v.Args[0] 8355 if x.Op != OpS390XMOVBload { 8356 break 8357 } 8358 v.reset(OpCopy) 8359 v.Type = x.Type 8360 v.AddArg(x) 8361 return true 8362 } 8363 // match: (MOVBreg x:(Arg <t>)) 8364 // cond: is8BitInt(t) && isSigned(t) 8365 // result: x 8366 for { 8367 x := v.Args[0] 8368 if x.Op != OpArg { 8369 break 8370 } 8371 t := x.Type 8372 if !(is8BitInt(t) && isSigned(t)) { 8373 break 8374 } 8375 v.reset(OpCopy) 8376 v.Type = x.Type 8377 v.AddArg(x) 8378 return true 8379 } 8380 // match: (MOVBreg x:(MOVBreg _)) 8381 // cond: 8382 // result: x 8383 for { 8384 x := v.Args[0] 8385 if x.Op != OpS390XMOVBreg { 8386 break 8387 } 8388 v.reset(OpCopy) 8389 v.Type = x.Type 8390 v.AddArg(x) 8391 return true 8392 } 8393 // match: (MOVBreg (MOVDconst [c])) 8394 // cond: 8395 // result: (MOVDconst [int64(int8(c))]) 8396 for { 8397 v_0 := v.Args[0] 8398 if v_0.Op != OpS390XMOVDconst { 8399 break 8400 } 8401 c := v_0.AuxInt 8402 v.reset(OpS390XMOVDconst) 8403 v.AuxInt = int64(int8(c)) 8404 return true 8405 } 8406 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8407 // cond: x.Uses == 1 && clobber(x) 8408 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8409 for { 8410 x := v.Args[0] 8411 if x.Op != OpS390XMOVBZload { 8412 break 8413 } 8414 off := x.AuxInt 8415 sym := x.Aux 8416 ptr := x.Args[0] 8417 mem := x.Args[1] 8418 if !(x.Uses == 1 && clobber(x)) { 8419 break 8420 } 8421 b = x.Block 8422 v0 := b.NewValue0(v.Line, OpS390XMOVBload, v.Type) 8423 v.reset(OpCopy) 8424 v.AddArg(v0) 8425 v0.AuxInt = off 8426 v0.Aux = sym 8427 v0.AddArg(ptr) 8428 v0.AddArg(mem) 8429 return true 8430 } 8431 return false 8432 } 8433 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8434 b := v.Block 8435 _ = b 8436 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8437 // cond: 8438 // result: (MOVBstore [off] {sym} ptr x mem) 8439 for { 8440 off := v.AuxInt 8441 sym := v.Aux 8442 ptr := v.Args[0] 8443 v_1 := v.Args[1] 8444 if v_1.Op != OpS390XMOVBreg { 8445 break 8446 } 8447 x := v_1.Args[0] 8448 mem := v.Args[2] 8449 v.reset(OpS390XMOVBstore) 8450 v.AuxInt = off 8451 v.Aux = sym 8452 v.AddArg(ptr) 8453 v.AddArg(x) 8454 v.AddArg(mem) 8455 return true 8456 } 8457 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8458 // cond: 8459 // result: (MOVBstore [off] {sym} ptr x mem) 8460 for { 8461 off := v.AuxInt 8462 sym := v.Aux 8463 ptr := v.Args[0] 8464 v_1 := v.Args[1] 8465 if v_1.Op != OpS390XMOVBZreg { 8466 break 8467 } 8468 x := v_1.Args[0] 8469 mem := v.Args[2] 8470 v.reset(OpS390XMOVBstore) 8471 v.AuxInt = off 8472 v.Aux = sym 8473 v.AddArg(ptr) 8474 v.AddArg(x) 8475 v.AddArg(mem) 8476 return true 8477 } 8478 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8479 // cond: is20Bit(off1+off2) 8480 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8481 for { 8482 off1 := v.AuxInt 8483 sym := v.Aux 8484 v_0 := v.Args[0] 8485 if v_0.Op != OpS390XADDconst { 8486 break 8487 } 8488 off2 := v_0.AuxInt 8489 ptr := v_0.Args[0] 8490 val := v.Args[1] 8491 mem := v.Args[2] 8492 if !(is20Bit(off1 + off2)) { 8493 break 8494 } 8495 v.reset(OpS390XMOVBstore) 8496 v.AuxInt = off1 + off2 8497 v.Aux = sym 8498 v.AddArg(ptr) 8499 v.AddArg(val) 8500 v.AddArg(mem) 8501 return true 8502 } 8503 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8504 // cond: validOff(off) && ptr.Op != OpSB 8505 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8506 for { 8507 off := v.AuxInt 8508 sym := v.Aux 8509 ptr := v.Args[0] 8510 v_1 := v.Args[1] 8511 if v_1.Op != OpS390XMOVDconst { 8512 break 8513 } 8514 c := v_1.AuxInt 8515 mem := v.Args[2] 8516 if !(validOff(off) && ptr.Op != OpSB) { 8517 break 8518 } 8519 v.reset(OpS390XMOVBstoreconst) 8520 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8521 v.Aux = sym 8522 v.AddArg(ptr) 8523 v.AddArg(mem) 8524 return true 8525 } 8526 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8527 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8528 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8529 for { 8530 off1 := v.AuxInt 8531 sym1 := v.Aux 8532 v_0 := v.Args[0] 8533 if v_0.Op != OpS390XMOVDaddr { 8534 break 8535 } 8536 off2 := v_0.AuxInt 8537 sym2 := v_0.Aux 8538 base := v_0.Args[0] 8539 val := v.Args[1] 8540 mem := v.Args[2] 8541 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8542 break 8543 } 8544 v.reset(OpS390XMOVBstore) 8545 v.AuxInt = off1 + off2 8546 v.Aux = mergeSym(sym1, sym2) 8547 v.AddArg(base) 8548 v.AddArg(val) 8549 v.AddArg(mem) 8550 return true 8551 } 8552 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8553 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8554 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8555 for { 8556 off1 := v.AuxInt 8557 sym1 := v.Aux 8558 v_0 := v.Args[0] 8559 if v_0.Op != OpS390XMOVDaddridx { 8560 break 8561 } 8562 off2 := v_0.AuxInt 8563 sym2 := v_0.Aux 8564 ptr := v_0.Args[0] 8565 idx := v_0.Args[1] 8566 val := v.Args[1] 8567 mem := v.Args[2] 8568 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8569 break 8570 } 8571 v.reset(OpS390XMOVBstoreidx) 8572 v.AuxInt = off1 + off2 8573 v.Aux = mergeSym(sym1, sym2) 8574 v.AddArg(ptr) 8575 v.AddArg(idx) 8576 v.AddArg(val) 8577 v.AddArg(mem) 8578 return true 8579 } 8580 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8581 // cond: ptr.Op != OpSB 8582 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8583 for { 8584 off := v.AuxInt 8585 sym := v.Aux 8586 v_0 := v.Args[0] 8587 if v_0.Op != OpS390XADD { 8588 break 8589 } 8590 ptr := v_0.Args[0] 8591 idx := v_0.Args[1] 8592 val := v.Args[1] 8593 mem := v.Args[2] 8594 if !(ptr.Op != OpSB) { 8595 break 8596 } 8597 v.reset(OpS390XMOVBstoreidx) 8598 v.AuxInt = off 8599 v.Aux = sym 8600 v.AddArg(ptr) 8601 v.AddArg(idx) 8602 v.AddArg(val) 8603 v.AddArg(mem) 8604 return true 8605 } 8606 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8607 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8608 // result: (MOVHstore [i-1] {s} p w mem) 8609 for { 8610 i := v.AuxInt 8611 s := v.Aux 8612 p := v.Args[0] 8613 w := v.Args[1] 8614 x := v.Args[2] 8615 if x.Op != OpS390XMOVBstore { 8616 break 8617 } 8618 if x.AuxInt != i-1 { 8619 break 8620 } 8621 if x.Aux != s { 8622 break 8623 } 8624 if p != x.Args[0] { 8625 break 8626 } 8627 x_1 := x.Args[1] 8628 if x_1.Op != OpS390XSRDconst { 8629 break 8630 } 8631 if x_1.AuxInt != 8 { 8632 break 8633 } 8634 if w != x_1.Args[0] { 8635 break 8636 } 8637 mem := x.Args[2] 8638 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8639 break 8640 } 8641 v.reset(OpS390XMOVHstore) 8642 v.AuxInt = i - 1 8643 v.Aux = s 8644 v.AddArg(p) 8645 v.AddArg(w) 8646 v.AddArg(mem) 8647 return true 8648 } 8649 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8650 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8651 // result: (MOVHstore [i-1] {s} p w0 mem) 8652 for { 8653 i := v.AuxInt 8654 s := v.Aux 8655 p := v.Args[0] 8656 w0 := v.Args[1] 8657 if w0.Op != OpS390XSRDconst { 8658 break 8659 } 8660 j := w0.AuxInt 8661 w := w0.Args[0] 8662 x := v.Args[2] 8663 if x.Op != OpS390XMOVBstore { 8664 break 8665 } 8666 if x.AuxInt != i-1 { 8667 break 8668 } 8669 if x.Aux != s { 8670 break 8671 } 8672 if p != x.Args[0] { 8673 break 8674 } 8675 x_1 := x.Args[1] 8676 if x_1.Op != OpS390XSRDconst { 8677 break 8678 } 8679 if x_1.AuxInt != j+8 { 8680 break 8681 } 8682 if w != x_1.Args[0] { 8683 break 8684 } 8685 mem := x.Args[2] 8686 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8687 break 8688 } 8689 v.reset(OpS390XMOVHstore) 8690 v.AuxInt = i - 1 8691 v.Aux = s 8692 v.AddArg(p) 8693 v.AddArg(w0) 8694 v.AddArg(mem) 8695 return true 8696 } 8697 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8698 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8699 // result: (MOVHstore [i-1] {s} p w mem) 8700 for { 8701 i := v.AuxInt 8702 s := v.Aux 8703 p := v.Args[0] 8704 w := v.Args[1] 8705 x := v.Args[2] 8706 if x.Op != OpS390XMOVBstore { 8707 break 8708 } 8709 if x.AuxInt != i-1 { 8710 break 8711 } 8712 if x.Aux != s { 8713 break 8714 } 8715 if p != x.Args[0] { 8716 break 8717 } 8718 x_1 := x.Args[1] 8719 if x_1.Op != OpS390XSRWconst { 8720 break 8721 } 8722 if x_1.AuxInt != 8 { 8723 break 8724 } 8725 if w != x_1.Args[0] { 8726 break 8727 } 8728 mem := x.Args[2] 8729 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8730 break 8731 } 8732 v.reset(OpS390XMOVHstore) 8733 v.AuxInt = i - 1 8734 v.Aux = s 8735 v.AddArg(p) 8736 v.AddArg(w) 8737 v.AddArg(mem) 8738 return true 8739 } 8740 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8741 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8742 // result: (MOVHstore [i-1] {s} p w0 mem) 8743 for { 8744 i := v.AuxInt 8745 s := v.Aux 8746 p := v.Args[0] 8747 w0 := v.Args[1] 8748 if w0.Op != OpS390XSRWconst { 8749 break 8750 } 8751 j := w0.AuxInt 8752 w := w0.Args[0] 8753 x := v.Args[2] 8754 if x.Op != OpS390XMOVBstore { 8755 break 8756 } 8757 if x.AuxInt != i-1 { 8758 break 8759 } 8760 if x.Aux != s { 8761 break 8762 } 8763 if p != x.Args[0] { 8764 break 8765 } 8766 x_1 := x.Args[1] 8767 if x_1.Op != OpS390XSRWconst { 8768 break 8769 } 8770 if x_1.AuxInt != j+8 { 8771 break 8772 } 8773 if w != x_1.Args[0] { 8774 break 8775 } 8776 mem := x.Args[2] 8777 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8778 break 8779 } 8780 v.reset(OpS390XMOVHstore) 8781 v.AuxInt = i - 1 8782 v.Aux = s 8783 v.AddArg(p) 8784 v.AddArg(w0) 8785 v.AddArg(mem) 8786 return true 8787 } 8788 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8789 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8790 // result: (MOVHBRstore [i-1] {s} p w mem) 8791 for { 8792 i := v.AuxInt 8793 s := v.Aux 8794 p := v.Args[0] 8795 v_1 := v.Args[1] 8796 if v_1.Op != OpS390XSRDconst { 8797 break 8798 } 8799 if v_1.AuxInt != 8 { 8800 break 8801 } 8802 w := v_1.Args[0] 8803 x := v.Args[2] 8804 if x.Op != OpS390XMOVBstore { 8805 break 8806 } 8807 if x.AuxInt != i-1 { 8808 break 8809 } 8810 if x.Aux != s { 8811 break 8812 } 8813 if p != x.Args[0] { 8814 break 8815 } 8816 if w != x.Args[1] { 8817 break 8818 } 8819 mem := x.Args[2] 8820 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8821 break 8822 } 8823 v.reset(OpS390XMOVHBRstore) 8824 v.AuxInt = i - 1 8825 v.Aux = s 8826 v.AddArg(p) 8827 v.AddArg(w) 8828 v.AddArg(mem) 8829 return true 8830 } 8831 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8832 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8833 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8834 for { 8835 i := v.AuxInt 8836 s := v.Aux 8837 p := v.Args[0] 8838 v_1 := v.Args[1] 8839 if v_1.Op != OpS390XSRDconst { 8840 break 8841 } 8842 j := v_1.AuxInt 8843 w := v_1.Args[0] 8844 x := v.Args[2] 8845 if x.Op != OpS390XMOVBstore { 8846 break 8847 } 8848 if x.AuxInt != i-1 { 8849 break 8850 } 8851 if x.Aux != s { 8852 break 8853 } 8854 if p != x.Args[0] { 8855 break 8856 } 8857 w0 := x.Args[1] 8858 if w0.Op != OpS390XSRDconst { 8859 break 8860 } 8861 if w0.AuxInt != j-8 { 8862 break 8863 } 8864 if w != w0.Args[0] { 8865 break 8866 } 8867 mem := x.Args[2] 8868 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8869 break 8870 } 8871 v.reset(OpS390XMOVHBRstore) 8872 v.AuxInt = i - 1 8873 v.Aux = s 8874 v.AddArg(p) 8875 v.AddArg(w0) 8876 v.AddArg(mem) 8877 return true 8878 } 8879 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8880 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8881 // result: (MOVHBRstore [i-1] {s} p w mem) 8882 for { 8883 i := v.AuxInt 8884 s := v.Aux 8885 p := v.Args[0] 8886 v_1 := v.Args[1] 8887 if v_1.Op != OpS390XSRWconst { 8888 break 8889 } 8890 if v_1.AuxInt != 8 { 8891 break 8892 } 8893 w := v_1.Args[0] 8894 x := v.Args[2] 8895 if x.Op != OpS390XMOVBstore { 8896 break 8897 } 8898 if x.AuxInt != i-1 { 8899 break 8900 } 8901 if x.Aux != s { 8902 break 8903 } 8904 if p != x.Args[0] { 8905 break 8906 } 8907 if w != x.Args[1] { 8908 break 8909 } 8910 mem := x.Args[2] 8911 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8912 break 8913 } 8914 v.reset(OpS390XMOVHBRstore) 8915 v.AuxInt = i - 1 8916 v.Aux = s 8917 v.AddArg(p) 8918 v.AddArg(w) 8919 v.AddArg(mem) 8920 return true 8921 } 8922 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 8923 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8924 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8925 for { 8926 i := v.AuxInt 8927 s := v.Aux 8928 p := v.Args[0] 8929 v_1 := v.Args[1] 8930 if v_1.Op != OpS390XSRWconst { 8931 break 8932 } 8933 j := v_1.AuxInt 8934 w := v_1.Args[0] 8935 x := v.Args[2] 8936 if x.Op != OpS390XMOVBstore { 8937 break 8938 } 8939 if x.AuxInt != i-1 { 8940 break 8941 } 8942 if x.Aux != s { 8943 break 8944 } 8945 if p != x.Args[0] { 8946 break 8947 } 8948 w0 := x.Args[1] 8949 if w0.Op != OpS390XSRWconst { 8950 break 8951 } 8952 if w0.AuxInt != j-8 { 8953 break 8954 } 8955 if w != w0.Args[0] { 8956 break 8957 } 8958 mem := x.Args[2] 8959 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8960 break 8961 } 8962 v.reset(OpS390XMOVHBRstore) 8963 v.AuxInt = i - 1 8964 v.Aux = s 8965 v.AddArg(p) 8966 v.AddArg(w0) 8967 v.AddArg(mem) 8968 return true 8969 } 8970 return false 8971 } 8972 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 8973 b := v.Block 8974 _ = b 8975 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 8976 // cond: ValAndOff(sc).canAdd(off) 8977 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 8978 for { 8979 sc := v.AuxInt 8980 s := v.Aux 8981 v_0 := v.Args[0] 8982 if v_0.Op != OpS390XADDconst { 8983 break 8984 } 8985 off := v_0.AuxInt 8986 ptr := v_0.Args[0] 8987 mem := v.Args[1] 8988 if !(ValAndOff(sc).canAdd(off)) { 8989 break 8990 } 8991 v.reset(OpS390XMOVBstoreconst) 8992 v.AuxInt = ValAndOff(sc).add(off) 8993 v.Aux = s 8994 v.AddArg(ptr) 8995 v.AddArg(mem) 8996 return true 8997 } 8998 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 8999 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 9000 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 9001 for { 9002 sc := v.AuxInt 9003 sym1 := v.Aux 9004 v_0 := v.Args[0] 9005 if v_0.Op != OpS390XMOVDaddr { 9006 break 9007 } 9008 off := v_0.AuxInt 9009 sym2 := v_0.Aux 9010 ptr := v_0.Args[0] 9011 mem := v.Args[1] 9012 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 9013 break 9014 } 9015 v.reset(OpS390XMOVBstoreconst) 9016 v.AuxInt = ValAndOff(sc).add(off) 9017 v.Aux = mergeSym(sym1, sym2) 9018 v.AddArg(ptr) 9019 v.AddArg(mem) 9020 return true 9021 } 9022 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 9023 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9024 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9025 for { 9026 c := v.AuxInt 9027 s := v.Aux 9028 p := v.Args[0] 9029 x := v.Args[1] 9030 if x.Op != OpS390XMOVBstoreconst { 9031 break 9032 } 9033 a := x.AuxInt 9034 if x.Aux != s { 9035 break 9036 } 9037 if p != x.Args[0] { 9038 break 9039 } 9040 mem := x.Args[1] 9041 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9042 break 9043 } 9044 v.reset(OpS390XMOVHstoreconst) 9045 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9046 v.Aux = s 9047 v.AddArg(p) 9048 v.AddArg(mem) 9049 return true 9050 } 9051 return false 9052 } 9053 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9054 b := v.Block 9055 _ = b 9056 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9057 // cond: 9058 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9059 for { 9060 c := v.AuxInt 9061 sym := v.Aux 9062 v_0 := v.Args[0] 9063 if v_0.Op != OpS390XADDconst { 9064 break 9065 } 9066 d := v_0.AuxInt 9067 ptr := v_0.Args[0] 9068 idx := v.Args[1] 9069 val := v.Args[2] 9070 mem := v.Args[3] 9071 v.reset(OpS390XMOVBstoreidx) 9072 v.AuxInt = c + d 9073 v.Aux = sym 9074 v.AddArg(ptr) 9075 v.AddArg(idx) 9076 v.AddArg(val) 9077 v.AddArg(mem) 9078 return true 9079 } 9080 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9081 // cond: 9082 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9083 for { 9084 c := v.AuxInt 9085 sym := v.Aux 9086 ptr := v.Args[0] 9087 v_1 := v.Args[1] 9088 if v_1.Op != OpS390XADDconst { 9089 break 9090 } 9091 d := v_1.AuxInt 9092 idx := v_1.Args[0] 9093 val := v.Args[2] 9094 mem := v.Args[3] 9095 v.reset(OpS390XMOVBstoreidx) 9096 v.AuxInt = c + d 9097 v.Aux = sym 9098 v.AddArg(ptr) 9099 v.AddArg(idx) 9100 v.AddArg(val) 9101 v.AddArg(mem) 9102 return true 9103 } 9104 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9105 // cond: x.Uses == 1 && clobber(x) 9106 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9107 for { 9108 i := v.AuxInt 9109 s := v.Aux 9110 p := v.Args[0] 9111 idx := v.Args[1] 9112 w := v.Args[2] 9113 x := v.Args[3] 9114 if x.Op != OpS390XMOVBstoreidx { 9115 break 9116 } 9117 if x.AuxInt != i-1 { 9118 break 9119 } 9120 if x.Aux != s { 9121 break 9122 } 9123 if p != x.Args[0] { 9124 break 9125 } 9126 if idx != x.Args[1] { 9127 break 9128 } 9129 x_2 := x.Args[2] 9130 if x_2.Op != OpS390XSRDconst { 9131 break 9132 } 9133 if x_2.AuxInt != 8 { 9134 break 9135 } 9136 if w != x_2.Args[0] { 9137 break 9138 } 9139 mem := x.Args[3] 9140 if !(x.Uses == 1 && clobber(x)) { 9141 break 9142 } 9143 v.reset(OpS390XMOVHstoreidx) 9144 v.AuxInt = i - 1 9145 v.Aux = s 9146 v.AddArg(p) 9147 v.AddArg(idx) 9148 v.AddArg(w) 9149 v.AddArg(mem) 9150 return true 9151 } 9152 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9153 // cond: x.Uses == 1 && clobber(x) 9154 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9155 for { 9156 i := v.AuxInt 9157 s := v.Aux 9158 p := v.Args[0] 9159 idx := v.Args[1] 9160 w0 := v.Args[2] 9161 if w0.Op != OpS390XSRDconst { 9162 break 9163 } 9164 j := w0.AuxInt 9165 w := w0.Args[0] 9166 x := v.Args[3] 9167 if x.Op != OpS390XMOVBstoreidx { 9168 break 9169 } 9170 if x.AuxInt != i-1 { 9171 break 9172 } 9173 if x.Aux != s { 9174 break 9175 } 9176 if p != x.Args[0] { 9177 break 9178 } 9179 if idx != x.Args[1] { 9180 break 9181 } 9182 x_2 := x.Args[2] 9183 if x_2.Op != OpS390XSRDconst { 9184 break 9185 } 9186 if x_2.AuxInt != j+8 { 9187 break 9188 } 9189 if w != x_2.Args[0] { 9190 break 9191 } 9192 mem := x.Args[3] 9193 if !(x.Uses == 1 && clobber(x)) { 9194 break 9195 } 9196 v.reset(OpS390XMOVHstoreidx) 9197 v.AuxInt = i - 1 9198 v.Aux = s 9199 v.AddArg(p) 9200 v.AddArg(idx) 9201 v.AddArg(w0) 9202 v.AddArg(mem) 9203 return true 9204 } 9205 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9206 // cond: x.Uses == 1 && clobber(x) 9207 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9208 for { 9209 i := v.AuxInt 9210 s := v.Aux 9211 p := v.Args[0] 9212 idx := v.Args[1] 9213 w := v.Args[2] 9214 x := v.Args[3] 9215 if x.Op != OpS390XMOVBstoreidx { 9216 break 9217 } 9218 if x.AuxInt != i-1 { 9219 break 9220 } 9221 if x.Aux != s { 9222 break 9223 } 9224 if p != x.Args[0] { 9225 break 9226 } 9227 if idx != x.Args[1] { 9228 break 9229 } 9230 x_2 := x.Args[2] 9231 if x_2.Op != OpS390XSRWconst { 9232 break 9233 } 9234 if x_2.AuxInt != 8 { 9235 break 9236 } 9237 if w != x_2.Args[0] { 9238 break 9239 } 9240 mem := x.Args[3] 9241 if !(x.Uses == 1 && clobber(x)) { 9242 break 9243 } 9244 v.reset(OpS390XMOVHstoreidx) 9245 v.AuxInt = i - 1 9246 v.Aux = s 9247 v.AddArg(p) 9248 v.AddArg(idx) 9249 v.AddArg(w) 9250 v.AddArg(mem) 9251 return true 9252 } 9253 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9254 // cond: x.Uses == 1 && clobber(x) 9255 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9256 for { 9257 i := v.AuxInt 9258 s := v.Aux 9259 p := v.Args[0] 9260 idx := v.Args[1] 9261 w0 := v.Args[2] 9262 if w0.Op != OpS390XSRWconst { 9263 break 9264 } 9265 j := w0.AuxInt 9266 w := w0.Args[0] 9267 x := v.Args[3] 9268 if x.Op != OpS390XMOVBstoreidx { 9269 break 9270 } 9271 if x.AuxInt != i-1 { 9272 break 9273 } 9274 if x.Aux != s { 9275 break 9276 } 9277 if p != x.Args[0] { 9278 break 9279 } 9280 if idx != x.Args[1] { 9281 break 9282 } 9283 x_2 := x.Args[2] 9284 if x_2.Op != OpS390XSRWconst { 9285 break 9286 } 9287 if x_2.AuxInt != j+8 { 9288 break 9289 } 9290 if w != x_2.Args[0] { 9291 break 9292 } 9293 mem := x.Args[3] 9294 if !(x.Uses == 1 && clobber(x)) { 9295 break 9296 } 9297 v.reset(OpS390XMOVHstoreidx) 9298 v.AuxInt = i - 1 9299 v.Aux = s 9300 v.AddArg(p) 9301 v.AddArg(idx) 9302 v.AddArg(w0) 9303 v.AddArg(mem) 9304 return true 9305 } 9306 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9307 // cond: x.Uses == 1 && clobber(x) 9308 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9309 for { 9310 i := v.AuxInt 9311 s := v.Aux 9312 p := v.Args[0] 9313 idx := v.Args[1] 9314 v_2 := v.Args[2] 9315 if v_2.Op != OpS390XSRDconst { 9316 break 9317 } 9318 if v_2.AuxInt != 8 { 9319 break 9320 } 9321 w := v_2.Args[0] 9322 x := v.Args[3] 9323 if x.Op != OpS390XMOVBstoreidx { 9324 break 9325 } 9326 if x.AuxInt != i-1 { 9327 break 9328 } 9329 if x.Aux != s { 9330 break 9331 } 9332 if p != x.Args[0] { 9333 break 9334 } 9335 if idx != x.Args[1] { 9336 break 9337 } 9338 if w != x.Args[2] { 9339 break 9340 } 9341 mem := x.Args[3] 9342 if !(x.Uses == 1 && clobber(x)) { 9343 break 9344 } 9345 v.reset(OpS390XMOVHBRstoreidx) 9346 v.AuxInt = i - 1 9347 v.Aux = s 9348 v.AddArg(p) 9349 v.AddArg(idx) 9350 v.AddArg(w) 9351 v.AddArg(mem) 9352 return true 9353 } 9354 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9355 // cond: x.Uses == 1 && clobber(x) 9356 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9357 for { 9358 i := v.AuxInt 9359 s := v.Aux 9360 p := v.Args[0] 9361 idx := v.Args[1] 9362 v_2 := v.Args[2] 9363 if v_2.Op != OpS390XSRDconst { 9364 break 9365 } 9366 j := v_2.AuxInt 9367 w := v_2.Args[0] 9368 x := v.Args[3] 9369 if x.Op != OpS390XMOVBstoreidx { 9370 break 9371 } 9372 if x.AuxInt != i-1 { 9373 break 9374 } 9375 if x.Aux != s { 9376 break 9377 } 9378 if p != x.Args[0] { 9379 break 9380 } 9381 if idx != x.Args[1] { 9382 break 9383 } 9384 w0 := x.Args[2] 9385 if w0.Op != OpS390XSRDconst { 9386 break 9387 } 9388 if w0.AuxInt != j-8 { 9389 break 9390 } 9391 if w != w0.Args[0] { 9392 break 9393 } 9394 mem := x.Args[3] 9395 if !(x.Uses == 1 && clobber(x)) { 9396 break 9397 } 9398 v.reset(OpS390XMOVHBRstoreidx) 9399 v.AuxInt = i - 1 9400 v.Aux = s 9401 v.AddArg(p) 9402 v.AddArg(idx) 9403 v.AddArg(w0) 9404 v.AddArg(mem) 9405 return true 9406 } 9407 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9408 // cond: x.Uses == 1 && clobber(x) 9409 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9410 for { 9411 i := v.AuxInt 9412 s := v.Aux 9413 p := v.Args[0] 9414 idx := v.Args[1] 9415 v_2 := v.Args[2] 9416 if v_2.Op != OpS390XSRWconst { 9417 break 9418 } 9419 if v_2.AuxInt != 8 { 9420 break 9421 } 9422 w := v_2.Args[0] 9423 x := v.Args[3] 9424 if x.Op != OpS390XMOVBstoreidx { 9425 break 9426 } 9427 if x.AuxInt != i-1 { 9428 break 9429 } 9430 if x.Aux != s { 9431 break 9432 } 9433 if p != x.Args[0] { 9434 break 9435 } 9436 if idx != x.Args[1] { 9437 break 9438 } 9439 if w != x.Args[2] { 9440 break 9441 } 9442 mem := x.Args[3] 9443 if !(x.Uses == 1 && clobber(x)) { 9444 break 9445 } 9446 v.reset(OpS390XMOVHBRstoreidx) 9447 v.AuxInt = i - 1 9448 v.Aux = s 9449 v.AddArg(p) 9450 v.AddArg(idx) 9451 v.AddArg(w) 9452 v.AddArg(mem) 9453 return true 9454 } 9455 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9456 // cond: x.Uses == 1 && clobber(x) 9457 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9458 for { 9459 i := v.AuxInt 9460 s := v.Aux 9461 p := v.Args[0] 9462 idx := v.Args[1] 9463 v_2 := v.Args[2] 9464 if v_2.Op != OpS390XSRWconst { 9465 break 9466 } 9467 j := v_2.AuxInt 9468 w := v_2.Args[0] 9469 x := v.Args[3] 9470 if x.Op != OpS390XMOVBstoreidx { 9471 break 9472 } 9473 if x.AuxInt != i-1 { 9474 break 9475 } 9476 if x.Aux != s { 9477 break 9478 } 9479 if p != x.Args[0] { 9480 break 9481 } 9482 if idx != x.Args[1] { 9483 break 9484 } 9485 w0 := x.Args[2] 9486 if w0.Op != OpS390XSRWconst { 9487 break 9488 } 9489 if w0.AuxInt != j-8 { 9490 break 9491 } 9492 if w != w0.Args[0] { 9493 break 9494 } 9495 mem := x.Args[3] 9496 if !(x.Uses == 1 && clobber(x)) { 9497 break 9498 } 9499 v.reset(OpS390XMOVHBRstoreidx) 9500 v.AuxInt = i - 1 9501 v.Aux = s 9502 v.AddArg(p) 9503 v.AddArg(idx) 9504 v.AddArg(w0) 9505 v.AddArg(mem) 9506 return true 9507 } 9508 return false 9509 } 9510 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9511 b := v.Block 9512 _ = b 9513 // match: (MOVDEQ x y (InvertFlags cmp)) 9514 // cond: 9515 // result: (MOVDEQ x y cmp) 9516 for { 9517 x := v.Args[0] 9518 y := v.Args[1] 9519 v_2 := v.Args[2] 9520 if v_2.Op != OpS390XInvertFlags { 9521 break 9522 } 9523 cmp := v_2.Args[0] 9524 v.reset(OpS390XMOVDEQ) 9525 v.AddArg(x) 9526 v.AddArg(y) 9527 v.AddArg(cmp) 9528 return true 9529 } 9530 // match: (MOVDEQ _ x (FlagEQ)) 9531 // cond: 9532 // result: x 9533 for { 9534 x := v.Args[1] 9535 v_2 := v.Args[2] 9536 if v_2.Op != OpS390XFlagEQ { 9537 break 9538 } 9539 v.reset(OpCopy) 9540 v.Type = x.Type 9541 v.AddArg(x) 9542 return true 9543 } 9544 // match: (MOVDEQ y _ (FlagLT)) 9545 // cond: 9546 // result: y 9547 for { 9548 y := v.Args[0] 9549 v_2 := v.Args[2] 9550 if v_2.Op != OpS390XFlagLT { 9551 break 9552 } 9553 v.reset(OpCopy) 9554 v.Type = y.Type 9555 v.AddArg(y) 9556 return true 9557 } 9558 // match: (MOVDEQ y _ (FlagGT)) 9559 // cond: 9560 // result: y 9561 for { 9562 y := v.Args[0] 9563 v_2 := v.Args[2] 9564 if v_2.Op != OpS390XFlagGT { 9565 break 9566 } 9567 v.reset(OpCopy) 9568 v.Type = y.Type 9569 v.AddArg(y) 9570 return true 9571 } 9572 return false 9573 } 9574 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9575 b := v.Block 9576 _ = b 9577 // match: (MOVDGE x y (InvertFlags cmp)) 9578 // cond: 9579 // result: (MOVDLE x y cmp) 9580 for { 9581 x := v.Args[0] 9582 y := v.Args[1] 9583 v_2 := v.Args[2] 9584 if v_2.Op != OpS390XInvertFlags { 9585 break 9586 } 9587 cmp := v_2.Args[0] 9588 v.reset(OpS390XMOVDLE) 9589 v.AddArg(x) 9590 v.AddArg(y) 9591 v.AddArg(cmp) 9592 return true 9593 } 9594 // match: (MOVDGE _ x (FlagEQ)) 9595 // cond: 9596 // result: x 9597 for { 9598 x := v.Args[1] 9599 v_2 := v.Args[2] 9600 if v_2.Op != OpS390XFlagEQ { 9601 break 9602 } 9603 v.reset(OpCopy) 9604 v.Type = x.Type 9605 v.AddArg(x) 9606 return true 9607 } 9608 // match: (MOVDGE y _ (FlagLT)) 9609 // cond: 9610 // result: y 9611 for { 9612 y := v.Args[0] 9613 v_2 := v.Args[2] 9614 if v_2.Op != OpS390XFlagLT { 9615 break 9616 } 9617 v.reset(OpCopy) 9618 v.Type = y.Type 9619 v.AddArg(y) 9620 return true 9621 } 9622 // match: (MOVDGE _ x (FlagGT)) 9623 // cond: 9624 // result: x 9625 for { 9626 x := v.Args[1] 9627 v_2 := v.Args[2] 9628 if v_2.Op != OpS390XFlagGT { 9629 break 9630 } 9631 v.reset(OpCopy) 9632 v.Type = x.Type 9633 v.AddArg(x) 9634 return true 9635 } 9636 return false 9637 } 9638 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9639 b := v.Block 9640 _ = b 9641 // match: (MOVDGT x y (InvertFlags cmp)) 9642 // cond: 9643 // result: (MOVDLT x y cmp) 9644 for { 9645 x := v.Args[0] 9646 y := v.Args[1] 9647 v_2 := v.Args[2] 9648 if v_2.Op != OpS390XInvertFlags { 9649 break 9650 } 9651 cmp := v_2.Args[0] 9652 v.reset(OpS390XMOVDLT) 9653 v.AddArg(x) 9654 v.AddArg(y) 9655 v.AddArg(cmp) 9656 return true 9657 } 9658 // match: (MOVDGT y _ (FlagEQ)) 9659 // cond: 9660 // result: y 9661 for { 9662 y := v.Args[0] 9663 v_2 := v.Args[2] 9664 if v_2.Op != OpS390XFlagEQ { 9665 break 9666 } 9667 v.reset(OpCopy) 9668 v.Type = y.Type 9669 v.AddArg(y) 9670 return true 9671 } 9672 // match: (MOVDGT y _ (FlagLT)) 9673 // cond: 9674 // result: y 9675 for { 9676 y := v.Args[0] 9677 v_2 := v.Args[2] 9678 if v_2.Op != OpS390XFlagLT { 9679 break 9680 } 9681 v.reset(OpCopy) 9682 v.Type = y.Type 9683 v.AddArg(y) 9684 return true 9685 } 9686 // match: (MOVDGT _ x (FlagGT)) 9687 // cond: 9688 // result: x 9689 for { 9690 x := v.Args[1] 9691 v_2 := v.Args[2] 9692 if v_2.Op != OpS390XFlagGT { 9693 break 9694 } 9695 v.reset(OpCopy) 9696 v.Type = x.Type 9697 v.AddArg(x) 9698 return true 9699 } 9700 return false 9701 } 9702 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9703 b := v.Block 9704 _ = b 9705 // match: (MOVDLE x y (InvertFlags cmp)) 9706 // cond: 9707 // result: (MOVDGE x y cmp) 9708 for { 9709 x := v.Args[0] 9710 y := v.Args[1] 9711 v_2 := v.Args[2] 9712 if v_2.Op != OpS390XInvertFlags { 9713 break 9714 } 9715 cmp := v_2.Args[0] 9716 v.reset(OpS390XMOVDGE) 9717 v.AddArg(x) 9718 v.AddArg(y) 9719 v.AddArg(cmp) 9720 return true 9721 } 9722 // match: (MOVDLE _ x (FlagEQ)) 9723 // cond: 9724 // result: x 9725 for { 9726 x := v.Args[1] 9727 v_2 := v.Args[2] 9728 if v_2.Op != OpS390XFlagEQ { 9729 break 9730 } 9731 v.reset(OpCopy) 9732 v.Type = x.Type 9733 v.AddArg(x) 9734 return true 9735 } 9736 // match: (MOVDLE _ x (FlagLT)) 9737 // cond: 9738 // result: x 9739 for { 9740 x := v.Args[1] 9741 v_2 := v.Args[2] 9742 if v_2.Op != OpS390XFlagLT { 9743 break 9744 } 9745 v.reset(OpCopy) 9746 v.Type = x.Type 9747 v.AddArg(x) 9748 return true 9749 } 9750 // match: (MOVDLE y _ (FlagGT)) 9751 // cond: 9752 // result: y 9753 for { 9754 y := v.Args[0] 9755 v_2 := v.Args[2] 9756 if v_2.Op != OpS390XFlagGT { 9757 break 9758 } 9759 v.reset(OpCopy) 9760 v.Type = y.Type 9761 v.AddArg(y) 9762 return true 9763 } 9764 return false 9765 } 9766 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9767 b := v.Block 9768 _ = b 9769 // match: (MOVDLT x y (InvertFlags cmp)) 9770 // cond: 9771 // result: (MOVDGT x y cmp) 9772 for { 9773 x := v.Args[0] 9774 y := v.Args[1] 9775 v_2 := v.Args[2] 9776 if v_2.Op != OpS390XInvertFlags { 9777 break 9778 } 9779 cmp := v_2.Args[0] 9780 v.reset(OpS390XMOVDGT) 9781 v.AddArg(x) 9782 v.AddArg(y) 9783 v.AddArg(cmp) 9784 return true 9785 } 9786 // match: (MOVDLT y _ (FlagEQ)) 9787 // cond: 9788 // result: y 9789 for { 9790 y := v.Args[0] 9791 v_2 := v.Args[2] 9792 if v_2.Op != OpS390XFlagEQ { 9793 break 9794 } 9795 v.reset(OpCopy) 9796 v.Type = y.Type 9797 v.AddArg(y) 9798 return true 9799 } 9800 // match: (MOVDLT _ x (FlagLT)) 9801 // cond: 9802 // result: x 9803 for { 9804 x := v.Args[1] 9805 v_2 := v.Args[2] 9806 if v_2.Op != OpS390XFlagLT { 9807 break 9808 } 9809 v.reset(OpCopy) 9810 v.Type = x.Type 9811 v.AddArg(x) 9812 return true 9813 } 9814 // match: (MOVDLT y _ (FlagGT)) 9815 // cond: 9816 // result: y 9817 for { 9818 y := v.Args[0] 9819 v_2 := v.Args[2] 9820 if v_2.Op != OpS390XFlagGT { 9821 break 9822 } 9823 v.reset(OpCopy) 9824 v.Type = y.Type 9825 v.AddArg(y) 9826 return true 9827 } 9828 return false 9829 } 9830 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9831 b := v.Block 9832 _ = b 9833 // match: (MOVDNE x y (InvertFlags cmp)) 9834 // cond: 9835 // result: (MOVDNE x y cmp) 9836 for { 9837 x := v.Args[0] 9838 y := v.Args[1] 9839 v_2 := v.Args[2] 9840 if v_2.Op != OpS390XInvertFlags { 9841 break 9842 } 9843 cmp := v_2.Args[0] 9844 v.reset(OpS390XMOVDNE) 9845 v.AddArg(x) 9846 v.AddArg(y) 9847 v.AddArg(cmp) 9848 return true 9849 } 9850 // match: (MOVDNE y _ (FlagEQ)) 9851 // cond: 9852 // result: y 9853 for { 9854 y := v.Args[0] 9855 v_2 := v.Args[2] 9856 if v_2.Op != OpS390XFlagEQ { 9857 break 9858 } 9859 v.reset(OpCopy) 9860 v.Type = y.Type 9861 v.AddArg(y) 9862 return true 9863 } 9864 // match: (MOVDNE _ x (FlagLT)) 9865 // cond: 9866 // result: x 9867 for { 9868 x := v.Args[1] 9869 v_2 := v.Args[2] 9870 if v_2.Op != OpS390XFlagLT { 9871 break 9872 } 9873 v.reset(OpCopy) 9874 v.Type = x.Type 9875 v.AddArg(x) 9876 return true 9877 } 9878 // match: (MOVDNE _ x (FlagGT)) 9879 // cond: 9880 // result: x 9881 for { 9882 x := v.Args[1] 9883 v_2 := v.Args[2] 9884 if v_2.Op != OpS390XFlagGT { 9885 break 9886 } 9887 v.reset(OpCopy) 9888 v.Type = x.Type 9889 v.AddArg(x) 9890 return true 9891 } 9892 return false 9893 } 9894 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9895 b := v.Block 9896 _ = b 9897 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9898 // cond: is20Bit(c+d) && x.Op != OpSB 9899 // result: (MOVDaddridx [c+d] {s} x y) 9900 for { 9901 c := v.AuxInt 9902 s := v.Aux 9903 v_0 := v.Args[0] 9904 if v_0.Op != OpS390XADDconst { 9905 break 9906 } 9907 d := v_0.AuxInt 9908 x := v_0.Args[0] 9909 y := v.Args[1] 9910 if !(is20Bit(c+d) && x.Op != OpSB) { 9911 break 9912 } 9913 v.reset(OpS390XMOVDaddridx) 9914 v.AuxInt = c + d 9915 v.Aux = s 9916 v.AddArg(x) 9917 v.AddArg(y) 9918 return true 9919 } 9920 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 9921 // cond: is20Bit(c+d) && y.Op != OpSB 9922 // result: (MOVDaddridx [c+d] {s} x y) 9923 for { 9924 c := v.AuxInt 9925 s := v.Aux 9926 x := v.Args[0] 9927 v_1 := v.Args[1] 9928 if v_1.Op != OpS390XADDconst { 9929 break 9930 } 9931 d := v_1.AuxInt 9932 y := v_1.Args[0] 9933 if !(is20Bit(c+d) && y.Op != OpSB) { 9934 break 9935 } 9936 v.reset(OpS390XMOVDaddridx) 9937 v.AuxInt = c + d 9938 v.Aux = s 9939 v.AddArg(x) 9940 v.AddArg(y) 9941 return true 9942 } 9943 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 9944 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 9945 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 9946 for { 9947 off1 := v.AuxInt 9948 sym1 := v.Aux 9949 v_0 := v.Args[0] 9950 if v_0.Op != OpS390XMOVDaddr { 9951 break 9952 } 9953 off2 := v_0.AuxInt 9954 sym2 := v_0.Aux 9955 x := v_0.Args[0] 9956 y := v.Args[1] 9957 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 9958 break 9959 } 9960 v.reset(OpS390XMOVDaddridx) 9961 v.AuxInt = off1 + off2 9962 v.Aux = mergeSym(sym1, sym2) 9963 v.AddArg(x) 9964 v.AddArg(y) 9965 return true 9966 } 9967 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 9968 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 9969 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 9970 for { 9971 off1 := v.AuxInt 9972 sym1 := v.Aux 9973 x := v.Args[0] 9974 v_1 := v.Args[1] 9975 if v_1.Op != OpS390XMOVDaddr { 9976 break 9977 } 9978 off2 := v_1.AuxInt 9979 sym2 := v_1.Aux 9980 y := v_1.Args[0] 9981 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 9982 break 9983 } 9984 v.reset(OpS390XMOVDaddridx) 9985 v.AuxInt = off1 + off2 9986 v.Aux = mergeSym(sym1, sym2) 9987 v.AddArg(x) 9988 v.AddArg(y) 9989 return true 9990 } 9991 return false 9992 } 9993 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 9994 b := v.Block 9995 _ = b 9996 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 9997 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 9998 // result: x 9999 for { 10000 off := v.AuxInt 10001 sym := v.Aux 10002 ptr := v.Args[0] 10003 v_1 := v.Args[1] 10004 if v_1.Op != OpS390XMOVDstore { 10005 break 10006 } 10007 off2 := v_1.AuxInt 10008 sym2 := v_1.Aux 10009 ptr2 := v_1.Args[0] 10010 x := v_1.Args[1] 10011 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10012 break 10013 } 10014 v.reset(OpCopy) 10015 v.Type = x.Type 10016 v.AddArg(x) 10017 return true 10018 } 10019 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10020 // cond: is20Bit(off1+off2) 10021 // result: (MOVDload [off1+off2] {sym} ptr mem) 10022 for { 10023 off1 := v.AuxInt 10024 sym := v.Aux 10025 v_0 := v.Args[0] 10026 if v_0.Op != OpS390XADDconst { 10027 break 10028 } 10029 off2 := v_0.AuxInt 10030 ptr := v_0.Args[0] 10031 mem := v.Args[1] 10032 if !(is20Bit(off1 + off2)) { 10033 break 10034 } 10035 v.reset(OpS390XMOVDload) 10036 v.AuxInt = off1 + off2 10037 v.Aux = sym 10038 v.AddArg(ptr) 10039 v.AddArg(mem) 10040 return true 10041 } 10042 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10043 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10044 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10045 for { 10046 off1 := v.AuxInt 10047 sym1 := v.Aux 10048 v_0 := v.Args[0] 10049 if v_0.Op != OpS390XMOVDaddr { 10050 break 10051 } 10052 off2 := v_0.AuxInt 10053 sym2 := v_0.Aux 10054 base := v_0.Args[0] 10055 mem := v.Args[1] 10056 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10057 break 10058 } 10059 v.reset(OpS390XMOVDload) 10060 v.AuxInt = off1 + off2 10061 v.Aux = mergeSym(sym1, sym2) 10062 v.AddArg(base) 10063 v.AddArg(mem) 10064 return true 10065 } 10066 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10067 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10068 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10069 for { 10070 off1 := v.AuxInt 10071 sym1 := v.Aux 10072 v_0 := v.Args[0] 10073 if v_0.Op != OpS390XMOVDaddridx { 10074 break 10075 } 10076 off2 := v_0.AuxInt 10077 sym2 := v_0.Aux 10078 ptr := v_0.Args[0] 10079 idx := v_0.Args[1] 10080 mem := v.Args[1] 10081 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10082 break 10083 } 10084 v.reset(OpS390XMOVDloadidx) 10085 v.AuxInt = off1 + off2 10086 v.Aux = mergeSym(sym1, sym2) 10087 v.AddArg(ptr) 10088 v.AddArg(idx) 10089 v.AddArg(mem) 10090 return true 10091 } 10092 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10093 // cond: ptr.Op != OpSB 10094 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10095 for { 10096 off := v.AuxInt 10097 sym := v.Aux 10098 v_0 := v.Args[0] 10099 if v_0.Op != OpS390XADD { 10100 break 10101 } 10102 ptr := v_0.Args[0] 10103 idx := v_0.Args[1] 10104 mem := v.Args[1] 10105 if !(ptr.Op != OpSB) { 10106 break 10107 } 10108 v.reset(OpS390XMOVDloadidx) 10109 v.AuxInt = off 10110 v.Aux = sym 10111 v.AddArg(ptr) 10112 v.AddArg(idx) 10113 v.AddArg(mem) 10114 return true 10115 } 10116 return false 10117 } 10118 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10119 b := v.Block 10120 _ = b 10121 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10122 // cond: 10123 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10124 for { 10125 c := v.AuxInt 10126 sym := v.Aux 10127 v_0 := v.Args[0] 10128 if v_0.Op != OpS390XADDconst { 10129 break 10130 } 10131 d := v_0.AuxInt 10132 ptr := v_0.Args[0] 10133 idx := v.Args[1] 10134 mem := v.Args[2] 10135 v.reset(OpS390XMOVDloadidx) 10136 v.AuxInt = c + d 10137 v.Aux = sym 10138 v.AddArg(ptr) 10139 v.AddArg(idx) 10140 v.AddArg(mem) 10141 return true 10142 } 10143 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10144 // cond: 10145 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10146 for { 10147 c := v.AuxInt 10148 sym := v.Aux 10149 ptr := v.Args[0] 10150 v_1 := v.Args[1] 10151 if v_1.Op != OpS390XADDconst { 10152 break 10153 } 10154 d := v_1.AuxInt 10155 idx := v_1.Args[0] 10156 mem := v.Args[2] 10157 v.reset(OpS390XMOVDloadidx) 10158 v.AuxInt = c + d 10159 v.Aux = sym 10160 v.AddArg(ptr) 10161 v.AddArg(idx) 10162 v.AddArg(mem) 10163 return true 10164 } 10165 return false 10166 } 10167 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10168 b := v.Block 10169 _ = b 10170 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10171 // cond: is20Bit(off1+off2) 10172 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10173 for { 10174 off1 := v.AuxInt 10175 sym := v.Aux 10176 v_0 := v.Args[0] 10177 if v_0.Op != OpS390XADDconst { 10178 break 10179 } 10180 off2 := v_0.AuxInt 10181 ptr := v_0.Args[0] 10182 val := v.Args[1] 10183 mem := v.Args[2] 10184 if !(is20Bit(off1 + off2)) { 10185 break 10186 } 10187 v.reset(OpS390XMOVDstore) 10188 v.AuxInt = off1 + off2 10189 v.Aux = sym 10190 v.AddArg(ptr) 10191 v.AddArg(val) 10192 v.AddArg(mem) 10193 return true 10194 } 10195 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10196 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10197 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10198 for { 10199 off := v.AuxInt 10200 sym := v.Aux 10201 ptr := v.Args[0] 10202 v_1 := v.Args[1] 10203 if v_1.Op != OpS390XMOVDconst { 10204 break 10205 } 10206 c := v_1.AuxInt 10207 mem := v.Args[2] 10208 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10209 break 10210 } 10211 v.reset(OpS390XMOVDstoreconst) 10212 v.AuxInt = makeValAndOff(c, off) 10213 v.Aux = sym 10214 v.AddArg(ptr) 10215 v.AddArg(mem) 10216 return true 10217 } 10218 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10219 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10220 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10221 for { 10222 off1 := v.AuxInt 10223 sym1 := v.Aux 10224 v_0 := v.Args[0] 10225 if v_0.Op != OpS390XMOVDaddr { 10226 break 10227 } 10228 off2 := v_0.AuxInt 10229 sym2 := v_0.Aux 10230 base := v_0.Args[0] 10231 val := v.Args[1] 10232 mem := v.Args[2] 10233 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10234 break 10235 } 10236 v.reset(OpS390XMOVDstore) 10237 v.AuxInt = off1 + off2 10238 v.Aux = mergeSym(sym1, sym2) 10239 v.AddArg(base) 10240 v.AddArg(val) 10241 v.AddArg(mem) 10242 return true 10243 } 10244 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 10245 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10246 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 10247 for { 10248 off1 := v.AuxInt 10249 sym1 := v.Aux 10250 v_0 := v.Args[0] 10251 if v_0.Op != OpS390XMOVDaddridx { 10252 break 10253 } 10254 off2 := v_0.AuxInt 10255 sym2 := v_0.Aux 10256 ptr := v_0.Args[0] 10257 idx := v_0.Args[1] 10258 val := v.Args[1] 10259 mem := v.Args[2] 10260 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10261 break 10262 } 10263 v.reset(OpS390XMOVDstoreidx) 10264 v.AuxInt = off1 + off2 10265 v.Aux = mergeSym(sym1, sym2) 10266 v.AddArg(ptr) 10267 v.AddArg(idx) 10268 v.AddArg(val) 10269 v.AddArg(mem) 10270 return true 10271 } 10272 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 10273 // cond: ptr.Op != OpSB 10274 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 10275 for { 10276 off := v.AuxInt 10277 sym := v.Aux 10278 v_0 := v.Args[0] 10279 if v_0.Op != OpS390XADD { 10280 break 10281 } 10282 ptr := v_0.Args[0] 10283 idx := v_0.Args[1] 10284 val := v.Args[1] 10285 mem := v.Args[2] 10286 if !(ptr.Op != OpSB) { 10287 break 10288 } 10289 v.reset(OpS390XMOVDstoreidx) 10290 v.AuxInt = off 10291 v.Aux = sym 10292 v.AddArg(ptr) 10293 v.AddArg(idx) 10294 v.AddArg(val) 10295 v.AddArg(mem) 10296 return true 10297 } 10298 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 10299 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 10300 // result: (STMG2 [i-8] {s} p w0 w1 mem) 10301 for { 10302 i := v.AuxInt 10303 s := v.Aux 10304 p := v.Args[0] 10305 w1 := v.Args[1] 10306 x := v.Args[2] 10307 if x.Op != OpS390XMOVDstore { 10308 break 10309 } 10310 if x.AuxInt != i-8 { 10311 break 10312 } 10313 if x.Aux != s { 10314 break 10315 } 10316 if p != x.Args[0] { 10317 break 10318 } 10319 w0 := x.Args[1] 10320 mem := x.Args[2] 10321 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 10322 break 10323 } 10324 v.reset(OpS390XSTMG2) 10325 v.AuxInt = i - 8 10326 v.Aux = s 10327 v.AddArg(p) 10328 v.AddArg(w0) 10329 v.AddArg(w1) 10330 v.AddArg(mem) 10331 return true 10332 } 10333 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 10334 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 10335 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 10336 for { 10337 i := v.AuxInt 10338 s := v.Aux 10339 p := v.Args[0] 10340 w2 := v.Args[1] 10341 x := v.Args[2] 10342 if x.Op != OpS390XSTMG2 { 10343 break 10344 } 10345 if x.AuxInt != i-16 { 10346 break 10347 } 10348 if x.Aux != s { 10349 break 10350 } 10351 if p != x.Args[0] { 10352 break 10353 } 10354 w0 := x.Args[1] 10355 w1 := x.Args[2] 10356 mem := x.Args[3] 10357 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 10358 break 10359 } 10360 v.reset(OpS390XSTMG3) 10361 v.AuxInt = i - 16 10362 v.Aux = s 10363 v.AddArg(p) 10364 v.AddArg(w0) 10365 v.AddArg(w1) 10366 v.AddArg(w2) 10367 v.AddArg(mem) 10368 return true 10369 } 10370 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 10371 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 10372 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 10373 for { 10374 i := v.AuxInt 10375 s := v.Aux 10376 p := v.Args[0] 10377 w3 := v.Args[1] 10378 x := v.Args[2] 10379 if x.Op != OpS390XSTMG3 { 10380 break 10381 } 10382 if x.AuxInt != i-24 { 10383 break 10384 } 10385 if x.Aux != s { 10386 break 10387 } 10388 if p != x.Args[0] { 10389 break 10390 } 10391 w0 := x.Args[1] 10392 w1 := x.Args[2] 10393 w2 := x.Args[3] 10394 mem := x.Args[4] 10395 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 10396 break 10397 } 10398 v.reset(OpS390XSTMG4) 10399 v.AuxInt = i - 24 10400 v.Aux = s 10401 v.AddArg(p) 10402 v.AddArg(w0) 10403 v.AddArg(w1) 10404 v.AddArg(w2) 10405 v.AddArg(w3) 10406 v.AddArg(mem) 10407 return true 10408 } 10409 return false 10410 } 10411 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 10412 b := v.Block 10413 _ = b 10414 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 10415 // cond: ValAndOff(sc).canAdd(off) 10416 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10417 for { 10418 sc := v.AuxInt 10419 s := v.Aux 10420 v_0 := v.Args[0] 10421 if v_0.Op != OpS390XADDconst { 10422 break 10423 } 10424 off := v_0.AuxInt 10425 ptr := v_0.Args[0] 10426 mem := v.Args[1] 10427 if !(ValAndOff(sc).canAdd(off)) { 10428 break 10429 } 10430 v.reset(OpS390XMOVDstoreconst) 10431 v.AuxInt = ValAndOff(sc).add(off) 10432 v.Aux = s 10433 v.AddArg(ptr) 10434 v.AddArg(mem) 10435 return true 10436 } 10437 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 10438 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 10439 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10440 for { 10441 sc := v.AuxInt 10442 sym1 := v.Aux 10443 v_0 := v.Args[0] 10444 if v_0.Op != OpS390XMOVDaddr { 10445 break 10446 } 10447 off := v_0.AuxInt 10448 sym2 := v_0.Aux 10449 ptr := v_0.Args[0] 10450 mem := v.Args[1] 10451 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 10452 break 10453 } 10454 v.reset(OpS390XMOVDstoreconst) 10455 v.AuxInt = ValAndOff(sc).add(off) 10456 v.Aux = mergeSym(sym1, sym2) 10457 v.AddArg(ptr) 10458 v.AddArg(mem) 10459 return true 10460 } 10461 return false 10462 } 10463 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 10464 b := v.Block 10465 _ = b 10466 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 10467 // cond: 10468 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10469 for { 10470 c := v.AuxInt 10471 sym := v.Aux 10472 v_0 := v.Args[0] 10473 if v_0.Op != OpS390XADDconst { 10474 break 10475 } 10476 d := v_0.AuxInt 10477 ptr := v_0.Args[0] 10478 idx := v.Args[1] 10479 val := v.Args[2] 10480 mem := v.Args[3] 10481 v.reset(OpS390XMOVDstoreidx) 10482 v.AuxInt = c + d 10483 v.Aux = sym 10484 v.AddArg(ptr) 10485 v.AddArg(idx) 10486 v.AddArg(val) 10487 v.AddArg(mem) 10488 return true 10489 } 10490 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 10491 // cond: 10492 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10493 for { 10494 c := v.AuxInt 10495 sym := v.Aux 10496 ptr := v.Args[0] 10497 v_1 := v.Args[1] 10498 if v_1.Op != OpS390XADDconst { 10499 break 10500 } 10501 d := v_1.AuxInt 10502 idx := v_1.Args[0] 10503 val := v.Args[2] 10504 mem := v.Args[3] 10505 v.reset(OpS390XMOVDstoreidx) 10506 v.AuxInt = c + d 10507 v.Aux = sym 10508 v.AddArg(ptr) 10509 v.AddArg(idx) 10510 v.AddArg(val) 10511 v.AddArg(mem) 10512 return true 10513 } 10514 return false 10515 } 10516 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 10517 b := v.Block 10518 _ = b 10519 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10520 // cond: x.Uses == 1 && clobber(x) 10521 // result: (MOVWBRstore [i-2] {s} p w mem) 10522 for { 10523 i := v.AuxInt 10524 s := v.Aux 10525 p := v.Args[0] 10526 v_1 := v.Args[1] 10527 if v_1.Op != OpS390XSRDconst { 10528 break 10529 } 10530 if v_1.AuxInt != 16 { 10531 break 10532 } 10533 w := v_1.Args[0] 10534 x := v.Args[2] 10535 if x.Op != OpS390XMOVHBRstore { 10536 break 10537 } 10538 if x.AuxInt != i-2 { 10539 break 10540 } 10541 if x.Aux != s { 10542 break 10543 } 10544 if p != x.Args[0] { 10545 break 10546 } 10547 if w != x.Args[1] { 10548 break 10549 } 10550 mem := x.Args[2] 10551 if !(x.Uses == 1 && clobber(x)) { 10552 break 10553 } 10554 v.reset(OpS390XMOVWBRstore) 10555 v.AuxInt = i - 2 10556 v.Aux = s 10557 v.AddArg(p) 10558 v.AddArg(w) 10559 v.AddArg(mem) 10560 return true 10561 } 10562 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 10563 // cond: x.Uses == 1 && clobber(x) 10564 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10565 for { 10566 i := v.AuxInt 10567 s := v.Aux 10568 p := v.Args[0] 10569 v_1 := v.Args[1] 10570 if v_1.Op != OpS390XSRDconst { 10571 break 10572 } 10573 j := v_1.AuxInt 10574 w := v_1.Args[0] 10575 x := v.Args[2] 10576 if x.Op != OpS390XMOVHBRstore { 10577 break 10578 } 10579 if x.AuxInt != i-2 { 10580 break 10581 } 10582 if x.Aux != s { 10583 break 10584 } 10585 if p != x.Args[0] { 10586 break 10587 } 10588 w0 := x.Args[1] 10589 if w0.Op != OpS390XSRDconst { 10590 break 10591 } 10592 if w0.AuxInt != j-16 { 10593 break 10594 } 10595 if w != w0.Args[0] { 10596 break 10597 } 10598 mem := x.Args[2] 10599 if !(x.Uses == 1 && clobber(x)) { 10600 break 10601 } 10602 v.reset(OpS390XMOVWBRstore) 10603 v.AuxInt = i - 2 10604 v.Aux = s 10605 v.AddArg(p) 10606 v.AddArg(w0) 10607 v.AddArg(mem) 10608 return true 10609 } 10610 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10611 // cond: x.Uses == 1 && clobber(x) 10612 // result: (MOVWBRstore [i-2] {s} p w mem) 10613 for { 10614 i := v.AuxInt 10615 s := v.Aux 10616 p := v.Args[0] 10617 v_1 := v.Args[1] 10618 if v_1.Op != OpS390XSRWconst { 10619 break 10620 } 10621 if v_1.AuxInt != 16 { 10622 break 10623 } 10624 w := v_1.Args[0] 10625 x := v.Args[2] 10626 if x.Op != OpS390XMOVHBRstore { 10627 break 10628 } 10629 if x.AuxInt != i-2 { 10630 break 10631 } 10632 if x.Aux != s { 10633 break 10634 } 10635 if p != x.Args[0] { 10636 break 10637 } 10638 if w != x.Args[1] { 10639 break 10640 } 10641 mem := x.Args[2] 10642 if !(x.Uses == 1 && clobber(x)) { 10643 break 10644 } 10645 v.reset(OpS390XMOVWBRstore) 10646 v.AuxInt = i - 2 10647 v.Aux = s 10648 v.AddArg(p) 10649 v.AddArg(w) 10650 v.AddArg(mem) 10651 return true 10652 } 10653 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 10654 // cond: x.Uses == 1 && clobber(x) 10655 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10656 for { 10657 i := v.AuxInt 10658 s := v.Aux 10659 p := v.Args[0] 10660 v_1 := v.Args[1] 10661 if v_1.Op != OpS390XSRWconst { 10662 break 10663 } 10664 j := v_1.AuxInt 10665 w := v_1.Args[0] 10666 x := v.Args[2] 10667 if x.Op != OpS390XMOVHBRstore { 10668 break 10669 } 10670 if x.AuxInt != i-2 { 10671 break 10672 } 10673 if x.Aux != s { 10674 break 10675 } 10676 if p != x.Args[0] { 10677 break 10678 } 10679 w0 := x.Args[1] 10680 if w0.Op != OpS390XSRWconst { 10681 break 10682 } 10683 if w0.AuxInt != j-16 { 10684 break 10685 } 10686 if w != w0.Args[0] { 10687 break 10688 } 10689 mem := x.Args[2] 10690 if !(x.Uses == 1 && clobber(x)) { 10691 break 10692 } 10693 v.reset(OpS390XMOVWBRstore) 10694 v.AuxInt = i - 2 10695 v.Aux = s 10696 v.AddArg(p) 10697 v.AddArg(w0) 10698 v.AddArg(mem) 10699 return true 10700 } 10701 return false 10702 } 10703 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 10704 b := v.Block 10705 _ = b 10706 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10707 // cond: x.Uses == 1 && clobber(x) 10708 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10709 for { 10710 i := v.AuxInt 10711 s := v.Aux 10712 p := v.Args[0] 10713 idx := v.Args[1] 10714 v_2 := v.Args[2] 10715 if v_2.Op != OpS390XSRDconst { 10716 break 10717 } 10718 if v_2.AuxInt != 16 { 10719 break 10720 } 10721 w := v_2.Args[0] 10722 x := v.Args[3] 10723 if x.Op != OpS390XMOVHBRstoreidx { 10724 break 10725 } 10726 if x.AuxInt != i-2 { 10727 break 10728 } 10729 if x.Aux != s { 10730 break 10731 } 10732 if p != x.Args[0] { 10733 break 10734 } 10735 if idx != x.Args[1] { 10736 break 10737 } 10738 if w != x.Args[2] { 10739 break 10740 } 10741 mem := x.Args[3] 10742 if !(x.Uses == 1 && clobber(x)) { 10743 break 10744 } 10745 v.reset(OpS390XMOVWBRstoreidx) 10746 v.AuxInt = i - 2 10747 v.Aux = s 10748 v.AddArg(p) 10749 v.AddArg(idx) 10750 v.AddArg(w) 10751 v.AddArg(mem) 10752 return true 10753 } 10754 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 10755 // cond: x.Uses == 1 && clobber(x) 10756 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10757 for { 10758 i := v.AuxInt 10759 s := v.Aux 10760 p := v.Args[0] 10761 idx := v.Args[1] 10762 v_2 := v.Args[2] 10763 if v_2.Op != OpS390XSRDconst { 10764 break 10765 } 10766 j := v_2.AuxInt 10767 w := v_2.Args[0] 10768 x := v.Args[3] 10769 if x.Op != OpS390XMOVHBRstoreidx { 10770 break 10771 } 10772 if x.AuxInt != i-2 { 10773 break 10774 } 10775 if x.Aux != s { 10776 break 10777 } 10778 if p != x.Args[0] { 10779 break 10780 } 10781 if idx != x.Args[1] { 10782 break 10783 } 10784 w0 := x.Args[2] 10785 if w0.Op != OpS390XSRDconst { 10786 break 10787 } 10788 if w0.AuxInt != j-16 { 10789 break 10790 } 10791 if w != w0.Args[0] { 10792 break 10793 } 10794 mem := x.Args[3] 10795 if !(x.Uses == 1 && clobber(x)) { 10796 break 10797 } 10798 v.reset(OpS390XMOVWBRstoreidx) 10799 v.AuxInt = i - 2 10800 v.Aux = s 10801 v.AddArg(p) 10802 v.AddArg(idx) 10803 v.AddArg(w0) 10804 v.AddArg(mem) 10805 return true 10806 } 10807 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10808 // cond: x.Uses == 1 && clobber(x) 10809 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10810 for { 10811 i := v.AuxInt 10812 s := v.Aux 10813 p := v.Args[0] 10814 idx := v.Args[1] 10815 v_2 := v.Args[2] 10816 if v_2.Op != OpS390XSRWconst { 10817 break 10818 } 10819 if v_2.AuxInt != 16 { 10820 break 10821 } 10822 w := v_2.Args[0] 10823 x := v.Args[3] 10824 if x.Op != OpS390XMOVHBRstoreidx { 10825 break 10826 } 10827 if x.AuxInt != i-2 { 10828 break 10829 } 10830 if x.Aux != s { 10831 break 10832 } 10833 if p != x.Args[0] { 10834 break 10835 } 10836 if idx != x.Args[1] { 10837 break 10838 } 10839 if w != x.Args[2] { 10840 break 10841 } 10842 mem := x.Args[3] 10843 if !(x.Uses == 1 && clobber(x)) { 10844 break 10845 } 10846 v.reset(OpS390XMOVWBRstoreidx) 10847 v.AuxInt = i - 2 10848 v.Aux = s 10849 v.AddArg(p) 10850 v.AddArg(idx) 10851 v.AddArg(w) 10852 v.AddArg(mem) 10853 return true 10854 } 10855 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 10856 // cond: x.Uses == 1 && clobber(x) 10857 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10858 for { 10859 i := v.AuxInt 10860 s := v.Aux 10861 p := v.Args[0] 10862 idx := v.Args[1] 10863 v_2 := v.Args[2] 10864 if v_2.Op != OpS390XSRWconst { 10865 break 10866 } 10867 j := v_2.AuxInt 10868 w := v_2.Args[0] 10869 x := v.Args[3] 10870 if x.Op != OpS390XMOVHBRstoreidx { 10871 break 10872 } 10873 if x.AuxInt != i-2 { 10874 break 10875 } 10876 if x.Aux != s { 10877 break 10878 } 10879 if p != x.Args[0] { 10880 break 10881 } 10882 if idx != x.Args[1] { 10883 break 10884 } 10885 w0 := x.Args[2] 10886 if w0.Op != OpS390XSRWconst { 10887 break 10888 } 10889 if w0.AuxInt != j-16 { 10890 break 10891 } 10892 if w != w0.Args[0] { 10893 break 10894 } 10895 mem := x.Args[3] 10896 if !(x.Uses == 1 && clobber(x)) { 10897 break 10898 } 10899 v.reset(OpS390XMOVWBRstoreidx) 10900 v.AuxInt = i - 2 10901 v.Aux = s 10902 v.AddArg(p) 10903 v.AddArg(idx) 10904 v.AddArg(w0) 10905 v.AddArg(mem) 10906 return true 10907 } 10908 return false 10909 } 10910 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 10911 b := v.Block 10912 _ = b 10913 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 10914 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10915 // result: x 10916 for { 10917 off := v.AuxInt 10918 sym := v.Aux 10919 ptr := v.Args[0] 10920 v_1 := v.Args[1] 10921 if v_1.Op != OpS390XMOVHstore { 10922 break 10923 } 10924 off2 := v_1.AuxInt 10925 sym2 := v_1.Aux 10926 ptr2 := v_1.Args[0] 10927 x := v_1.Args[1] 10928 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10929 break 10930 } 10931 v.reset(OpCopy) 10932 v.Type = x.Type 10933 v.AddArg(x) 10934 return true 10935 } 10936 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 10937 // cond: is20Bit(off1+off2) 10938 // result: (MOVHZload [off1+off2] {sym} ptr mem) 10939 for { 10940 off1 := v.AuxInt 10941 sym := v.Aux 10942 v_0 := v.Args[0] 10943 if v_0.Op != OpS390XADDconst { 10944 break 10945 } 10946 off2 := v_0.AuxInt 10947 ptr := v_0.Args[0] 10948 mem := v.Args[1] 10949 if !(is20Bit(off1 + off2)) { 10950 break 10951 } 10952 v.reset(OpS390XMOVHZload) 10953 v.AuxInt = off1 + off2 10954 v.Aux = sym 10955 v.AddArg(ptr) 10956 v.AddArg(mem) 10957 return true 10958 } 10959 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10960 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10961 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10962 for { 10963 off1 := v.AuxInt 10964 sym1 := v.Aux 10965 v_0 := v.Args[0] 10966 if v_0.Op != OpS390XMOVDaddr { 10967 break 10968 } 10969 off2 := v_0.AuxInt 10970 sym2 := v_0.Aux 10971 base := v_0.Args[0] 10972 mem := v.Args[1] 10973 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10974 break 10975 } 10976 v.reset(OpS390XMOVHZload) 10977 v.AuxInt = off1 + off2 10978 v.Aux = mergeSym(sym1, sym2) 10979 v.AddArg(base) 10980 v.AddArg(mem) 10981 return true 10982 } 10983 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10984 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10985 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10986 for { 10987 off1 := v.AuxInt 10988 sym1 := v.Aux 10989 v_0 := v.Args[0] 10990 if v_0.Op != OpS390XMOVDaddridx { 10991 break 10992 } 10993 off2 := v_0.AuxInt 10994 sym2 := v_0.Aux 10995 ptr := v_0.Args[0] 10996 idx := v_0.Args[1] 10997 mem := v.Args[1] 10998 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10999 break 11000 } 11001 v.reset(OpS390XMOVHZloadidx) 11002 v.AuxInt = off1 + off2 11003 v.Aux = mergeSym(sym1, sym2) 11004 v.AddArg(ptr) 11005 v.AddArg(idx) 11006 v.AddArg(mem) 11007 return true 11008 } 11009 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11010 // cond: ptr.Op != OpSB 11011 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11012 for { 11013 off := v.AuxInt 11014 sym := v.Aux 11015 v_0 := v.Args[0] 11016 if v_0.Op != OpS390XADD { 11017 break 11018 } 11019 ptr := v_0.Args[0] 11020 idx := v_0.Args[1] 11021 mem := v.Args[1] 11022 if !(ptr.Op != OpSB) { 11023 break 11024 } 11025 v.reset(OpS390XMOVHZloadidx) 11026 v.AuxInt = off 11027 v.Aux = sym 11028 v.AddArg(ptr) 11029 v.AddArg(idx) 11030 v.AddArg(mem) 11031 return true 11032 } 11033 return false 11034 } 11035 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11036 b := v.Block 11037 _ = b 11038 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11039 // cond: 11040 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11041 for { 11042 c := v.AuxInt 11043 sym := v.Aux 11044 v_0 := v.Args[0] 11045 if v_0.Op != OpS390XADDconst { 11046 break 11047 } 11048 d := v_0.AuxInt 11049 ptr := v_0.Args[0] 11050 idx := v.Args[1] 11051 mem := v.Args[2] 11052 v.reset(OpS390XMOVHZloadidx) 11053 v.AuxInt = c + d 11054 v.Aux = sym 11055 v.AddArg(ptr) 11056 v.AddArg(idx) 11057 v.AddArg(mem) 11058 return true 11059 } 11060 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11061 // cond: 11062 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11063 for { 11064 c := v.AuxInt 11065 sym := v.Aux 11066 ptr := v.Args[0] 11067 v_1 := v.Args[1] 11068 if v_1.Op != OpS390XADDconst { 11069 break 11070 } 11071 d := v_1.AuxInt 11072 idx := v_1.Args[0] 11073 mem := v.Args[2] 11074 v.reset(OpS390XMOVHZloadidx) 11075 v.AuxInt = c + d 11076 v.Aux = sym 11077 v.AddArg(ptr) 11078 v.AddArg(idx) 11079 v.AddArg(mem) 11080 return true 11081 } 11082 return false 11083 } 11084 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11085 b := v.Block 11086 _ = b 11087 // match: (MOVHZreg x:(MOVBZload _ _)) 11088 // cond: 11089 // result: x 11090 for { 11091 x := v.Args[0] 11092 if x.Op != OpS390XMOVBZload { 11093 break 11094 } 11095 v.reset(OpCopy) 11096 v.Type = x.Type 11097 v.AddArg(x) 11098 return true 11099 } 11100 // match: (MOVHZreg x:(MOVHZload _ _)) 11101 // cond: 11102 // result: x 11103 for { 11104 x := v.Args[0] 11105 if x.Op != OpS390XMOVHZload { 11106 break 11107 } 11108 v.reset(OpCopy) 11109 v.Type = x.Type 11110 v.AddArg(x) 11111 return true 11112 } 11113 // match: (MOVHZreg x:(Arg <t>)) 11114 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11115 // result: x 11116 for { 11117 x := v.Args[0] 11118 if x.Op != OpArg { 11119 break 11120 } 11121 t := x.Type 11122 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11123 break 11124 } 11125 v.reset(OpCopy) 11126 v.Type = x.Type 11127 v.AddArg(x) 11128 return true 11129 } 11130 // match: (MOVHZreg x:(MOVBZreg _)) 11131 // cond: 11132 // result: x 11133 for { 11134 x := v.Args[0] 11135 if x.Op != OpS390XMOVBZreg { 11136 break 11137 } 11138 v.reset(OpCopy) 11139 v.Type = x.Type 11140 v.AddArg(x) 11141 return true 11142 } 11143 // match: (MOVHZreg x:(MOVHZreg _)) 11144 // cond: 11145 // result: x 11146 for { 11147 x := v.Args[0] 11148 if x.Op != OpS390XMOVHZreg { 11149 break 11150 } 11151 v.reset(OpCopy) 11152 v.Type = x.Type 11153 v.AddArg(x) 11154 return true 11155 } 11156 // match: (MOVHZreg (MOVDconst [c])) 11157 // cond: 11158 // result: (MOVDconst [int64(uint16(c))]) 11159 for { 11160 v_0 := v.Args[0] 11161 if v_0.Op != OpS390XMOVDconst { 11162 break 11163 } 11164 c := v_0.AuxInt 11165 v.reset(OpS390XMOVDconst) 11166 v.AuxInt = int64(uint16(c)) 11167 return true 11168 } 11169 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11170 // cond: x.Uses == 1 && clobber(x) 11171 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11172 for { 11173 x := v.Args[0] 11174 if x.Op != OpS390XMOVHZload { 11175 break 11176 } 11177 off := x.AuxInt 11178 sym := x.Aux 11179 ptr := x.Args[0] 11180 mem := x.Args[1] 11181 if !(x.Uses == 1 && clobber(x)) { 11182 break 11183 } 11184 b = x.Block 11185 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, v.Type) 11186 v.reset(OpCopy) 11187 v.AddArg(v0) 11188 v0.AuxInt = off 11189 v0.Aux = sym 11190 v0.AddArg(ptr) 11191 v0.AddArg(mem) 11192 return true 11193 } 11194 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11195 // cond: x.Uses == 1 && clobber(x) 11196 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11197 for { 11198 x := v.Args[0] 11199 if x.Op != OpS390XMOVHZloadidx { 11200 break 11201 } 11202 off := x.AuxInt 11203 sym := x.Aux 11204 ptr := x.Args[0] 11205 idx := x.Args[1] 11206 mem := x.Args[2] 11207 if !(x.Uses == 1 && clobber(x)) { 11208 break 11209 } 11210 b = x.Block 11211 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 11212 v.reset(OpCopy) 11213 v.AddArg(v0) 11214 v0.AuxInt = off 11215 v0.Aux = sym 11216 v0.AddArg(ptr) 11217 v0.AddArg(idx) 11218 v0.AddArg(mem) 11219 return true 11220 } 11221 return false 11222 } 11223 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11224 b := v.Block 11225 _ = b 11226 // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 11227 // cond: is20Bit(off1+off2) 11228 // result: (MOVHload [off1+off2] {sym} ptr mem) 11229 for { 11230 off1 := v.AuxInt 11231 sym := v.Aux 11232 v_0 := v.Args[0] 11233 if v_0.Op != OpS390XADDconst { 11234 break 11235 } 11236 off2 := v_0.AuxInt 11237 ptr := v_0.Args[0] 11238 mem := v.Args[1] 11239 if !(is20Bit(off1 + off2)) { 11240 break 11241 } 11242 v.reset(OpS390XMOVHload) 11243 v.AuxInt = off1 + off2 11244 v.Aux = sym 11245 v.AddArg(ptr) 11246 v.AddArg(mem) 11247 return true 11248 } 11249 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11250 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11251 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11252 for { 11253 off1 := v.AuxInt 11254 sym1 := v.Aux 11255 v_0 := v.Args[0] 11256 if v_0.Op != OpS390XMOVDaddr { 11257 break 11258 } 11259 off2 := v_0.AuxInt 11260 sym2 := v_0.Aux 11261 base := v_0.Args[0] 11262 mem := v.Args[1] 11263 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11264 break 11265 } 11266 v.reset(OpS390XMOVHload) 11267 v.AuxInt = off1 + off2 11268 v.Aux = mergeSym(sym1, sym2) 11269 v.AddArg(base) 11270 v.AddArg(mem) 11271 return true 11272 } 11273 return false 11274 } 11275 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 11276 b := v.Block 11277 _ = b 11278 // match: (MOVHreg x:(MOVBload _ _)) 11279 // cond: 11280 // result: x 11281 for { 11282 x := v.Args[0] 11283 if x.Op != OpS390XMOVBload { 11284 break 11285 } 11286 v.reset(OpCopy) 11287 v.Type = x.Type 11288 v.AddArg(x) 11289 return true 11290 } 11291 // match: (MOVHreg x:(MOVBZload _ _)) 11292 // cond: 11293 // result: x 11294 for { 11295 x := v.Args[0] 11296 if x.Op != OpS390XMOVBZload { 11297 break 11298 } 11299 v.reset(OpCopy) 11300 v.Type = x.Type 11301 v.AddArg(x) 11302 return true 11303 } 11304 // match: (MOVHreg x:(MOVHload _ _)) 11305 // cond: 11306 // result: x 11307 for { 11308 x := v.Args[0] 11309 if x.Op != OpS390XMOVHload { 11310 break 11311 } 11312 v.reset(OpCopy) 11313 v.Type = x.Type 11314 v.AddArg(x) 11315 return true 11316 } 11317 // match: (MOVHreg x:(Arg <t>)) 11318 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 11319 // result: x 11320 for { 11321 x := v.Args[0] 11322 if x.Op != OpArg { 11323 break 11324 } 11325 t := x.Type 11326 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 11327 break 11328 } 11329 v.reset(OpCopy) 11330 v.Type = x.Type 11331 v.AddArg(x) 11332 return true 11333 } 11334 // match: (MOVHreg x:(MOVBreg _)) 11335 // cond: 11336 // result: x 11337 for { 11338 x := v.Args[0] 11339 if x.Op != OpS390XMOVBreg { 11340 break 11341 } 11342 v.reset(OpCopy) 11343 v.Type = x.Type 11344 v.AddArg(x) 11345 return true 11346 } 11347 // match: (MOVHreg x:(MOVBZreg _)) 11348 // cond: 11349 // result: x 11350 for { 11351 x := v.Args[0] 11352 if x.Op != OpS390XMOVBZreg { 11353 break 11354 } 11355 v.reset(OpCopy) 11356 v.Type = x.Type 11357 v.AddArg(x) 11358 return true 11359 } 11360 // match: (MOVHreg x:(MOVHreg _)) 11361 // cond: 11362 // result: x 11363 for { 11364 x := v.Args[0] 11365 if x.Op != OpS390XMOVHreg { 11366 break 11367 } 11368 v.reset(OpCopy) 11369 v.Type = x.Type 11370 v.AddArg(x) 11371 return true 11372 } 11373 // match: (MOVHreg (MOVDconst [c])) 11374 // cond: 11375 // result: (MOVDconst [int64(int16(c))]) 11376 for { 11377 v_0 := v.Args[0] 11378 if v_0.Op != OpS390XMOVDconst { 11379 break 11380 } 11381 c := v_0.AuxInt 11382 v.reset(OpS390XMOVDconst) 11383 v.AuxInt = int64(int16(c)) 11384 return true 11385 } 11386 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 11387 // cond: x.Uses == 1 && clobber(x) 11388 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 11389 for { 11390 x := v.Args[0] 11391 if x.Op != OpS390XMOVHZload { 11392 break 11393 } 11394 off := x.AuxInt 11395 sym := x.Aux 11396 ptr := x.Args[0] 11397 mem := x.Args[1] 11398 if !(x.Uses == 1 && clobber(x)) { 11399 break 11400 } 11401 b = x.Block 11402 v0 := b.NewValue0(v.Line, OpS390XMOVHload, v.Type) 11403 v.reset(OpCopy) 11404 v.AddArg(v0) 11405 v0.AuxInt = off 11406 v0.Aux = sym 11407 v0.AddArg(ptr) 11408 v0.AddArg(mem) 11409 return true 11410 } 11411 return false 11412 } 11413 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 11414 b := v.Block 11415 _ = b 11416 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 11417 // cond: 11418 // result: (MOVHstore [off] {sym} ptr x mem) 11419 for { 11420 off := v.AuxInt 11421 sym := v.Aux 11422 ptr := v.Args[0] 11423 v_1 := v.Args[1] 11424 if v_1.Op != OpS390XMOVHreg { 11425 break 11426 } 11427 x := v_1.Args[0] 11428 mem := v.Args[2] 11429 v.reset(OpS390XMOVHstore) 11430 v.AuxInt = off 11431 v.Aux = sym 11432 v.AddArg(ptr) 11433 v.AddArg(x) 11434 v.AddArg(mem) 11435 return true 11436 } 11437 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 11438 // cond: 11439 // result: (MOVHstore [off] {sym} ptr x mem) 11440 for { 11441 off := v.AuxInt 11442 sym := v.Aux 11443 ptr := v.Args[0] 11444 v_1 := v.Args[1] 11445 if v_1.Op != OpS390XMOVHZreg { 11446 break 11447 } 11448 x := v_1.Args[0] 11449 mem := v.Args[2] 11450 v.reset(OpS390XMOVHstore) 11451 v.AuxInt = off 11452 v.Aux = sym 11453 v.AddArg(ptr) 11454 v.AddArg(x) 11455 v.AddArg(mem) 11456 return true 11457 } 11458 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 11459 // cond: is20Bit(off1+off2) 11460 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 11461 for { 11462 off1 := v.AuxInt 11463 sym := v.Aux 11464 v_0 := v.Args[0] 11465 if v_0.Op != OpS390XADDconst { 11466 break 11467 } 11468 off2 := v_0.AuxInt 11469 ptr := v_0.Args[0] 11470 val := v.Args[1] 11471 mem := v.Args[2] 11472 if !(is20Bit(off1 + off2)) { 11473 break 11474 } 11475 v.reset(OpS390XMOVHstore) 11476 v.AuxInt = off1 + off2 11477 v.Aux = sym 11478 v.AddArg(ptr) 11479 v.AddArg(val) 11480 v.AddArg(mem) 11481 return true 11482 } 11483 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 11484 // cond: validOff(off) && ptr.Op != OpSB 11485 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 11486 for { 11487 off := v.AuxInt 11488 sym := v.Aux 11489 ptr := v.Args[0] 11490 v_1 := v.Args[1] 11491 if v_1.Op != OpS390XMOVDconst { 11492 break 11493 } 11494 c := v_1.AuxInt 11495 mem := v.Args[2] 11496 if !(validOff(off) && ptr.Op != OpSB) { 11497 break 11498 } 11499 v.reset(OpS390XMOVHstoreconst) 11500 v.AuxInt = makeValAndOff(int64(int16(c)), off) 11501 v.Aux = sym 11502 v.AddArg(ptr) 11503 v.AddArg(mem) 11504 return true 11505 } 11506 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 11507 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11508 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 11509 for { 11510 off1 := v.AuxInt 11511 sym1 := v.Aux 11512 v_0 := v.Args[0] 11513 if v_0.Op != OpS390XMOVDaddr { 11514 break 11515 } 11516 off2 := v_0.AuxInt 11517 sym2 := v_0.Aux 11518 base := v_0.Args[0] 11519 val := v.Args[1] 11520 mem := v.Args[2] 11521 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11522 break 11523 } 11524 v.reset(OpS390XMOVHstore) 11525 v.AuxInt = off1 + off2 11526 v.Aux = mergeSym(sym1, sym2) 11527 v.AddArg(base) 11528 v.AddArg(val) 11529 v.AddArg(mem) 11530 return true 11531 } 11532 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11533 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11534 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11535 for { 11536 off1 := v.AuxInt 11537 sym1 := v.Aux 11538 v_0 := v.Args[0] 11539 if v_0.Op != OpS390XMOVDaddridx { 11540 break 11541 } 11542 off2 := v_0.AuxInt 11543 sym2 := v_0.Aux 11544 ptr := v_0.Args[0] 11545 idx := v_0.Args[1] 11546 val := v.Args[1] 11547 mem := v.Args[2] 11548 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11549 break 11550 } 11551 v.reset(OpS390XMOVHstoreidx) 11552 v.AuxInt = off1 + off2 11553 v.Aux = mergeSym(sym1, sym2) 11554 v.AddArg(ptr) 11555 v.AddArg(idx) 11556 v.AddArg(val) 11557 v.AddArg(mem) 11558 return true 11559 } 11560 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 11561 // cond: ptr.Op != OpSB 11562 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 11563 for { 11564 off := v.AuxInt 11565 sym := v.Aux 11566 v_0 := v.Args[0] 11567 if v_0.Op != OpS390XADD { 11568 break 11569 } 11570 ptr := v_0.Args[0] 11571 idx := v_0.Args[1] 11572 val := v.Args[1] 11573 mem := v.Args[2] 11574 if !(ptr.Op != OpSB) { 11575 break 11576 } 11577 v.reset(OpS390XMOVHstoreidx) 11578 v.AuxInt = off 11579 v.Aux = sym 11580 v.AddArg(ptr) 11581 v.AddArg(idx) 11582 v.AddArg(val) 11583 v.AddArg(mem) 11584 return true 11585 } 11586 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 11587 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11588 // result: (MOVWstore [i-2] {s} p w mem) 11589 for { 11590 i := v.AuxInt 11591 s := v.Aux 11592 p := v.Args[0] 11593 w := v.Args[1] 11594 x := v.Args[2] 11595 if x.Op != OpS390XMOVHstore { 11596 break 11597 } 11598 if x.AuxInt != i-2 { 11599 break 11600 } 11601 if x.Aux != s { 11602 break 11603 } 11604 if p != x.Args[0] { 11605 break 11606 } 11607 x_1 := x.Args[1] 11608 if x_1.Op != OpS390XSRDconst { 11609 break 11610 } 11611 if x_1.AuxInt != 16 { 11612 break 11613 } 11614 if w != x_1.Args[0] { 11615 break 11616 } 11617 mem := x.Args[2] 11618 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11619 break 11620 } 11621 v.reset(OpS390XMOVWstore) 11622 v.AuxInt = i - 2 11623 v.Aux = s 11624 v.AddArg(p) 11625 v.AddArg(w) 11626 v.AddArg(mem) 11627 return true 11628 } 11629 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 11630 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11631 // result: (MOVWstore [i-2] {s} p w0 mem) 11632 for { 11633 i := v.AuxInt 11634 s := v.Aux 11635 p := v.Args[0] 11636 w0 := v.Args[1] 11637 if w0.Op != OpS390XSRDconst { 11638 break 11639 } 11640 j := w0.AuxInt 11641 w := w0.Args[0] 11642 x := v.Args[2] 11643 if x.Op != OpS390XMOVHstore { 11644 break 11645 } 11646 if x.AuxInt != i-2 { 11647 break 11648 } 11649 if x.Aux != s { 11650 break 11651 } 11652 if p != x.Args[0] { 11653 break 11654 } 11655 x_1 := x.Args[1] 11656 if x_1.Op != OpS390XSRDconst { 11657 break 11658 } 11659 if x_1.AuxInt != j+16 { 11660 break 11661 } 11662 if w != x_1.Args[0] { 11663 break 11664 } 11665 mem := x.Args[2] 11666 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11667 break 11668 } 11669 v.reset(OpS390XMOVWstore) 11670 v.AuxInt = i - 2 11671 v.Aux = s 11672 v.AddArg(p) 11673 v.AddArg(w0) 11674 v.AddArg(mem) 11675 return true 11676 } 11677 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 11678 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11679 // result: (MOVWstore [i-2] {s} p w mem) 11680 for { 11681 i := v.AuxInt 11682 s := v.Aux 11683 p := v.Args[0] 11684 w := v.Args[1] 11685 x := v.Args[2] 11686 if x.Op != OpS390XMOVHstore { 11687 break 11688 } 11689 if x.AuxInt != i-2 { 11690 break 11691 } 11692 if x.Aux != s { 11693 break 11694 } 11695 if p != x.Args[0] { 11696 break 11697 } 11698 x_1 := x.Args[1] 11699 if x_1.Op != OpS390XSRWconst { 11700 break 11701 } 11702 if x_1.AuxInt != 16 { 11703 break 11704 } 11705 if w != x_1.Args[0] { 11706 break 11707 } 11708 mem := x.Args[2] 11709 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11710 break 11711 } 11712 v.reset(OpS390XMOVWstore) 11713 v.AuxInt = i - 2 11714 v.Aux = s 11715 v.AddArg(p) 11716 v.AddArg(w) 11717 v.AddArg(mem) 11718 return true 11719 } 11720 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 11721 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11722 // result: (MOVWstore [i-2] {s} p w0 mem) 11723 for { 11724 i := v.AuxInt 11725 s := v.Aux 11726 p := v.Args[0] 11727 w0 := v.Args[1] 11728 if w0.Op != OpS390XSRWconst { 11729 break 11730 } 11731 j := w0.AuxInt 11732 w := w0.Args[0] 11733 x := v.Args[2] 11734 if x.Op != OpS390XMOVHstore { 11735 break 11736 } 11737 if x.AuxInt != i-2 { 11738 break 11739 } 11740 if x.Aux != s { 11741 break 11742 } 11743 if p != x.Args[0] { 11744 break 11745 } 11746 x_1 := x.Args[1] 11747 if x_1.Op != OpS390XSRWconst { 11748 break 11749 } 11750 if x_1.AuxInt != j+16 { 11751 break 11752 } 11753 if w != x_1.Args[0] { 11754 break 11755 } 11756 mem := x.Args[2] 11757 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11758 break 11759 } 11760 v.reset(OpS390XMOVWstore) 11761 v.AuxInt = i - 2 11762 v.Aux = s 11763 v.AddArg(p) 11764 v.AddArg(w0) 11765 v.AddArg(mem) 11766 return true 11767 } 11768 return false 11769 } 11770 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 11771 b := v.Block 11772 _ = b 11773 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11774 // cond: ValAndOff(sc).canAdd(off) 11775 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11776 for { 11777 sc := v.AuxInt 11778 s := v.Aux 11779 v_0 := v.Args[0] 11780 if v_0.Op != OpS390XADDconst { 11781 break 11782 } 11783 off := v_0.AuxInt 11784 ptr := v_0.Args[0] 11785 mem := v.Args[1] 11786 if !(ValAndOff(sc).canAdd(off)) { 11787 break 11788 } 11789 v.reset(OpS390XMOVHstoreconst) 11790 v.AuxInt = ValAndOff(sc).add(off) 11791 v.Aux = s 11792 v.AddArg(ptr) 11793 v.AddArg(mem) 11794 return true 11795 } 11796 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11797 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11798 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11799 for { 11800 sc := v.AuxInt 11801 sym1 := v.Aux 11802 v_0 := v.Args[0] 11803 if v_0.Op != OpS390XMOVDaddr { 11804 break 11805 } 11806 off := v_0.AuxInt 11807 sym2 := v_0.Aux 11808 ptr := v_0.Args[0] 11809 mem := v.Args[1] 11810 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11811 break 11812 } 11813 v.reset(OpS390XMOVHstoreconst) 11814 v.AuxInt = ValAndOff(sc).add(off) 11815 v.Aux = mergeSym(sym1, sym2) 11816 v.AddArg(ptr) 11817 v.AddArg(mem) 11818 return true 11819 } 11820 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 11821 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 11822 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 11823 for { 11824 c := v.AuxInt 11825 s := v.Aux 11826 p := v.Args[0] 11827 x := v.Args[1] 11828 if x.Op != OpS390XMOVHstoreconst { 11829 break 11830 } 11831 a := x.AuxInt 11832 if x.Aux != s { 11833 break 11834 } 11835 if p != x.Args[0] { 11836 break 11837 } 11838 mem := x.Args[1] 11839 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 11840 break 11841 } 11842 v.reset(OpS390XMOVWstoreconst) 11843 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 11844 v.Aux = s 11845 v.AddArg(p) 11846 v.AddArg(mem) 11847 return true 11848 } 11849 return false 11850 } 11851 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 11852 b := v.Block 11853 _ = b 11854 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11855 // cond: 11856 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11857 for { 11858 c := v.AuxInt 11859 sym := v.Aux 11860 v_0 := v.Args[0] 11861 if v_0.Op != OpS390XADDconst { 11862 break 11863 } 11864 d := v_0.AuxInt 11865 ptr := v_0.Args[0] 11866 idx := v.Args[1] 11867 val := v.Args[2] 11868 mem := v.Args[3] 11869 v.reset(OpS390XMOVHstoreidx) 11870 v.AuxInt = c + d 11871 v.Aux = sym 11872 v.AddArg(ptr) 11873 v.AddArg(idx) 11874 v.AddArg(val) 11875 v.AddArg(mem) 11876 return true 11877 } 11878 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11879 // cond: 11880 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11881 for { 11882 c := v.AuxInt 11883 sym := v.Aux 11884 ptr := v.Args[0] 11885 v_1 := v.Args[1] 11886 if v_1.Op != OpS390XADDconst { 11887 break 11888 } 11889 d := v_1.AuxInt 11890 idx := v_1.Args[0] 11891 val := v.Args[2] 11892 mem := v.Args[3] 11893 v.reset(OpS390XMOVHstoreidx) 11894 v.AuxInt = c + d 11895 v.Aux = sym 11896 v.AddArg(ptr) 11897 v.AddArg(idx) 11898 v.AddArg(val) 11899 v.AddArg(mem) 11900 return true 11901 } 11902 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 11903 // cond: x.Uses == 1 && clobber(x) 11904 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 11905 for { 11906 i := v.AuxInt 11907 s := v.Aux 11908 p := v.Args[0] 11909 idx := v.Args[1] 11910 w := v.Args[2] 11911 x := v.Args[3] 11912 if x.Op != OpS390XMOVHstoreidx { 11913 break 11914 } 11915 if x.AuxInt != i-2 { 11916 break 11917 } 11918 if x.Aux != s { 11919 break 11920 } 11921 if p != x.Args[0] { 11922 break 11923 } 11924 if idx != x.Args[1] { 11925 break 11926 } 11927 x_2 := x.Args[2] 11928 if x_2.Op != OpS390XSRDconst { 11929 break 11930 } 11931 if x_2.AuxInt != 16 { 11932 break 11933 } 11934 if w != x_2.Args[0] { 11935 break 11936 } 11937 mem := x.Args[3] 11938 if !(x.Uses == 1 && clobber(x)) { 11939 break 11940 } 11941 v.reset(OpS390XMOVWstoreidx) 11942 v.AuxInt = i - 2 11943 v.Aux = s 11944 v.AddArg(p) 11945 v.AddArg(idx) 11946 v.AddArg(w) 11947 v.AddArg(mem) 11948 return true 11949 } 11950 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 11951 // cond: x.Uses == 1 && clobber(x) 11952 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 11953 for { 11954 i := v.AuxInt 11955 s := v.Aux 11956 p := v.Args[0] 11957 idx := v.Args[1] 11958 w0 := v.Args[2] 11959 if w0.Op != OpS390XSRDconst { 11960 break 11961 } 11962 j := w0.AuxInt 11963 w := w0.Args[0] 11964 x := v.Args[3] 11965 if x.Op != OpS390XMOVHstoreidx { 11966 break 11967 } 11968 if x.AuxInt != i-2 { 11969 break 11970 } 11971 if x.Aux != s { 11972 break 11973 } 11974 if p != x.Args[0] { 11975 break 11976 } 11977 if idx != x.Args[1] { 11978 break 11979 } 11980 x_2 := x.Args[2] 11981 if x_2.Op != OpS390XSRDconst { 11982 break 11983 } 11984 if x_2.AuxInt != j+16 { 11985 break 11986 } 11987 if w != x_2.Args[0] { 11988 break 11989 } 11990 mem := x.Args[3] 11991 if !(x.Uses == 1 && clobber(x)) { 11992 break 11993 } 11994 v.reset(OpS390XMOVWstoreidx) 11995 v.AuxInt = i - 2 11996 v.Aux = s 11997 v.AddArg(p) 11998 v.AddArg(idx) 11999 v.AddArg(w0) 12000 v.AddArg(mem) 12001 return true 12002 } 12003 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12004 // cond: x.Uses == 1 && clobber(x) 12005 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12006 for { 12007 i := v.AuxInt 12008 s := v.Aux 12009 p := v.Args[0] 12010 idx := v.Args[1] 12011 w := v.Args[2] 12012 x := v.Args[3] 12013 if x.Op != OpS390XMOVHstoreidx { 12014 break 12015 } 12016 if x.AuxInt != i-2 { 12017 break 12018 } 12019 if x.Aux != s { 12020 break 12021 } 12022 if p != x.Args[0] { 12023 break 12024 } 12025 if idx != x.Args[1] { 12026 break 12027 } 12028 x_2 := x.Args[2] 12029 if x_2.Op != OpS390XSRWconst { 12030 break 12031 } 12032 if x_2.AuxInt != 16 { 12033 break 12034 } 12035 if w != x_2.Args[0] { 12036 break 12037 } 12038 mem := x.Args[3] 12039 if !(x.Uses == 1 && clobber(x)) { 12040 break 12041 } 12042 v.reset(OpS390XMOVWstoreidx) 12043 v.AuxInt = i - 2 12044 v.Aux = s 12045 v.AddArg(p) 12046 v.AddArg(idx) 12047 v.AddArg(w) 12048 v.AddArg(mem) 12049 return true 12050 } 12051 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12052 // cond: x.Uses == 1 && clobber(x) 12053 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12054 for { 12055 i := v.AuxInt 12056 s := v.Aux 12057 p := v.Args[0] 12058 idx := v.Args[1] 12059 w0 := v.Args[2] 12060 if w0.Op != OpS390XSRWconst { 12061 break 12062 } 12063 j := w0.AuxInt 12064 w := w0.Args[0] 12065 x := v.Args[3] 12066 if x.Op != OpS390XMOVHstoreidx { 12067 break 12068 } 12069 if x.AuxInt != i-2 { 12070 break 12071 } 12072 if x.Aux != s { 12073 break 12074 } 12075 if p != x.Args[0] { 12076 break 12077 } 12078 if idx != x.Args[1] { 12079 break 12080 } 12081 x_2 := x.Args[2] 12082 if x_2.Op != OpS390XSRWconst { 12083 break 12084 } 12085 if x_2.AuxInt != j+16 { 12086 break 12087 } 12088 if w != x_2.Args[0] { 12089 break 12090 } 12091 mem := x.Args[3] 12092 if !(x.Uses == 1 && clobber(x)) { 12093 break 12094 } 12095 v.reset(OpS390XMOVWstoreidx) 12096 v.AuxInt = i - 2 12097 v.Aux = s 12098 v.AddArg(p) 12099 v.AddArg(idx) 12100 v.AddArg(w0) 12101 v.AddArg(mem) 12102 return true 12103 } 12104 return false 12105 } 12106 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12107 b := v.Block 12108 _ = b 12109 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12110 // cond: x.Uses == 1 && clobber(x) 12111 // result: (MOVDBRstore [i-4] {s} p w mem) 12112 for { 12113 i := v.AuxInt 12114 s := v.Aux 12115 p := v.Args[0] 12116 v_1 := v.Args[1] 12117 if v_1.Op != OpS390XSRDconst { 12118 break 12119 } 12120 if v_1.AuxInt != 32 { 12121 break 12122 } 12123 w := v_1.Args[0] 12124 x := v.Args[2] 12125 if x.Op != OpS390XMOVWBRstore { 12126 break 12127 } 12128 if x.AuxInt != i-4 { 12129 break 12130 } 12131 if x.Aux != s { 12132 break 12133 } 12134 if p != x.Args[0] { 12135 break 12136 } 12137 if w != x.Args[1] { 12138 break 12139 } 12140 mem := x.Args[2] 12141 if !(x.Uses == 1 && clobber(x)) { 12142 break 12143 } 12144 v.reset(OpS390XMOVDBRstore) 12145 v.AuxInt = i - 4 12146 v.Aux = s 12147 v.AddArg(p) 12148 v.AddArg(w) 12149 v.AddArg(mem) 12150 return true 12151 } 12152 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12153 // cond: x.Uses == 1 && clobber(x) 12154 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12155 for { 12156 i := v.AuxInt 12157 s := v.Aux 12158 p := v.Args[0] 12159 v_1 := v.Args[1] 12160 if v_1.Op != OpS390XSRDconst { 12161 break 12162 } 12163 j := v_1.AuxInt 12164 w := v_1.Args[0] 12165 x := v.Args[2] 12166 if x.Op != OpS390XMOVWBRstore { 12167 break 12168 } 12169 if x.AuxInt != i-4 { 12170 break 12171 } 12172 if x.Aux != s { 12173 break 12174 } 12175 if p != x.Args[0] { 12176 break 12177 } 12178 w0 := x.Args[1] 12179 if w0.Op != OpS390XSRDconst { 12180 break 12181 } 12182 if w0.AuxInt != j-32 { 12183 break 12184 } 12185 if w != w0.Args[0] { 12186 break 12187 } 12188 mem := x.Args[2] 12189 if !(x.Uses == 1 && clobber(x)) { 12190 break 12191 } 12192 v.reset(OpS390XMOVDBRstore) 12193 v.AuxInt = i - 4 12194 v.Aux = s 12195 v.AddArg(p) 12196 v.AddArg(w0) 12197 v.AddArg(mem) 12198 return true 12199 } 12200 return false 12201 } 12202 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12203 b := v.Block 12204 _ = b 12205 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12206 // cond: x.Uses == 1 && clobber(x) 12207 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12208 for { 12209 i := v.AuxInt 12210 s := v.Aux 12211 p := v.Args[0] 12212 idx := v.Args[1] 12213 v_2 := v.Args[2] 12214 if v_2.Op != OpS390XSRDconst { 12215 break 12216 } 12217 if v_2.AuxInt != 32 { 12218 break 12219 } 12220 w := v_2.Args[0] 12221 x := v.Args[3] 12222 if x.Op != OpS390XMOVWBRstoreidx { 12223 break 12224 } 12225 if x.AuxInt != i-4 { 12226 break 12227 } 12228 if x.Aux != s { 12229 break 12230 } 12231 if p != x.Args[0] { 12232 break 12233 } 12234 if idx != x.Args[1] { 12235 break 12236 } 12237 if w != x.Args[2] { 12238 break 12239 } 12240 mem := x.Args[3] 12241 if !(x.Uses == 1 && clobber(x)) { 12242 break 12243 } 12244 v.reset(OpS390XMOVDBRstoreidx) 12245 v.AuxInt = i - 4 12246 v.Aux = s 12247 v.AddArg(p) 12248 v.AddArg(idx) 12249 v.AddArg(w) 12250 v.AddArg(mem) 12251 return true 12252 } 12253 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 12254 // cond: x.Uses == 1 && clobber(x) 12255 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 12256 for { 12257 i := v.AuxInt 12258 s := v.Aux 12259 p := v.Args[0] 12260 idx := v.Args[1] 12261 v_2 := v.Args[2] 12262 if v_2.Op != OpS390XSRDconst { 12263 break 12264 } 12265 j := v_2.AuxInt 12266 w := v_2.Args[0] 12267 x := v.Args[3] 12268 if x.Op != OpS390XMOVWBRstoreidx { 12269 break 12270 } 12271 if x.AuxInt != i-4 { 12272 break 12273 } 12274 if x.Aux != s { 12275 break 12276 } 12277 if p != x.Args[0] { 12278 break 12279 } 12280 if idx != x.Args[1] { 12281 break 12282 } 12283 w0 := x.Args[2] 12284 if w0.Op != OpS390XSRDconst { 12285 break 12286 } 12287 if w0.AuxInt != j-32 { 12288 break 12289 } 12290 if w != w0.Args[0] { 12291 break 12292 } 12293 mem := x.Args[3] 12294 if !(x.Uses == 1 && clobber(x)) { 12295 break 12296 } 12297 v.reset(OpS390XMOVDBRstoreidx) 12298 v.AuxInt = i - 4 12299 v.Aux = s 12300 v.AddArg(p) 12301 v.AddArg(idx) 12302 v.AddArg(w0) 12303 v.AddArg(mem) 12304 return true 12305 } 12306 return false 12307 } 12308 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 12309 b := v.Block 12310 _ = b 12311 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 12312 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 12313 // result: x 12314 for { 12315 off := v.AuxInt 12316 sym := v.Aux 12317 ptr := v.Args[0] 12318 v_1 := v.Args[1] 12319 if v_1.Op != OpS390XMOVWstore { 12320 break 12321 } 12322 off2 := v_1.AuxInt 12323 sym2 := v_1.Aux 12324 ptr2 := v_1.Args[0] 12325 x := v_1.Args[1] 12326 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 12327 break 12328 } 12329 v.reset(OpCopy) 12330 v.Type = x.Type 12331 v.AddArg(x) 12332 return true 12333 } 12334 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 12335 // cond: is20Bit(off1+off2) 12336 // result: (MOVWZload [off1+off2] {sym} ptr mem) 12337 for { 12338 off1 := v.AuxInt 12339 sym := v.Aux 12340 v_0 := v.Args[0] 12341 if v_0.Op != OpS390XADDconst { 12342 break 12343 } 12344 off2 := v_0.AuxInt 12345 ptr := v_0.Args[0] 12346 mem := v.Args[1] 12347 if !(is20Bit(off1 + off2)) { 12348 break 12349 } 12350 v.reset(OpS390XMOVWZload) 12351 v.AuxInt = off1 + off2 12352 v.Aux = sym 12353 v.AddArg(ptr) 12354 v.AddArg(mem) 12355 return true 12356 } 12357 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12358 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12359 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12360 for { 12361 off1 := v.AuxInt 12362 sym1 := v.Aux 12363 v_0 := v.Args[0] 12364 if v_0.Op != OpS390XMOVDaddr { 12365 break 12366 } 12367 off2 := v_0.AuxInt 12368 sym2 := v_0.Aux 12369 base := v_0.Args[0] 12370 mem := v.Args[1] 12371 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12372 break 12373 } 12374 v.reset(OpS390XMOVWZload) 12375 v.AuxInt = off1 + off2 12376 v.Aux = mergeSym(sym1, sym2) 12377 v.AddArg(base) 12378 v.AddArg(mem) 12379 return true 12380 } 12381 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 12382 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12383 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 12384 for { 12385 off1 := v.AuxInt 12386 sym1 := v.Aux 12387 v_0 := v.Args[0] 12388 if v_0.Op != OpS390XMOVDaddridx { 12389 break 12390 } 12391 off2 := v_0.AuxInt 12392 sym2 := v_0.Aux 12393 ptr := v_0.Args[0] 12394 idx := v_0.Args[1] 12395 mem := v.Args[1] 12396 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12397 break 12398 } 12399 v.reset(OpS390XMOVWZloadidx) 12400 v.AuxInt = off1 + off2 12401 v.Aux = mergeSym(sym1, sym2) 12402 v.AddArg(ptr) 12403 v.AddArg(idx) 12404 v.AddArg(mem) 12405 return true 12406 } 12407 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 12408 // cond: ptr.Op != OpSB 12409 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 12410 for { 12411 off := v.AuxInt 12412 sym := v.Aux 12413 v_0 := v.Args[0] 12414 if v_0.Op != OpS390XADD { 12415 break 12416 } 12417 ptr := v_0.Args[0] 12418 idx := v_0.Args[1] 12419 mem := v.Args[1] 12420 if !(ptr.Op != OpSB) { 12421 break 12422 } 12423 v.reset(OpS390XMOVWZloadidx) 12424 v.AuxInt = off 12425 v.Aux = sym 12426 v.AddArg(ptr) 12427 v.AddArg(idx) 12428 v.AddArg(mem) 12429 return true 12430 } 12431 return false 12432 } 12433 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 12434 b := v.Block 12435 _ = b 12436 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 12437 // cond: 12438 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12439 for { 12440 c := v.AuxInt 12441 sym := v.Aux 12442 v_0 := v.Args[0] 12443 if v_0.Op != OpS390XADDconst { 12444 break 12445 } 12446 d := v_0.AuxInt 12447 ptr := v_0.Args[0] 12448 idx := v.Args[1] 12449 mem := v.Args[2] 12450 v.reset(OpS390XMOVWZloadidx) 12451 v.AuxInt = c + d 12452 v.Aux = sym 12453 v.AddArg(ptr) 12454 v.AddArg(idx) 12455 v.AddArg(mem) 12456 return true 12457 } 12458 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 12459 // cond: 12460 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12461 for { 12462 c := v.AuxInt 12463 sym := v.Aux 12464 ptr := v.Args[0] 12465 v_1 := v.Args[1] 12466 if v_1.Op != OpS390XADDconst { 12467 break 12468 } 12469 d := v_1.AuxInt 12470 idx := v_1.Args[0] 12471 mem := v.Args[2] 12472 v.reset(OpS390XMOVWZloadidx) 12473 v.AuxInt = c + d 12474 v.Aux = sym 12475 v.AddArg(ptr) 12476 v.AddArg(idx) 12477 v.AddArg(mem) 12478 return true 12479 } 12480 return false 12481 } 12482 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 12483 b := v.Block 12484 _ = b 12485 // match: (MOVWZreg x:(MOVBZload _ _)) 12486 // cond: 12487 // result: x 12488 for { 12489 x := v.Args[0] 12490 if x.Op != OpS390XMOVBZload { 12491 break 12492 } 12493 v.reset(OpCopy) 12494 v.Type = x.Type 12495 v.AddArg(x) 12496 return true 12497 } 12498 // match: (MOVWZreg x:(MOVHZload _ _)) 12499 // cond: 12500 // result: x 12501 for { 12502 x := v.Args[0] 12503 if x.Op != OpS390XMOVHZload { 12504 break 12505 } 12506 v.reset(OpCopy) 12507 v.Type = x.Type 12508 v.AddArg(x) 12509 return true 12510 } 12511 // match: (MOVWZreg x:(MOVWZload _ _)) 12512 // cond: 12513 // result: x 12514 for { 12515 x := v.Args[0] 12516 if x.Op != OpS390XMOVWZload { 12517 break 12518 } 12519 v.reset(OpCopy) 12520 v.Type = x.Type 12521 v.AddArg(x) 12522 return true 12523 } 12524 // match: (MOVWZreg x:(Arg <t>)) 12525 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 12526 // result: x 12527 for { 12528 x := v.Args[0] 12529 if x.Op != OpArg { 12530 break 12531 } 12532 t := x.Type 12533 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 12534 break 12535 } 12536 v.reset(OpCopy) 12537 v.Type = x.Type 12538 v.AddArg(x) 12539 return true 12540 } 12541 // match: (MOVWZreg x:(MOVBZreg _)) 12542 // cond: 12543 // result: x 12544 for { 12545 x := v.Args[0] 12546 if x.Op != OpS390XMOVBZreg { 12547 break 12548 } 12549 v.reset(OpCopy) 12550 v.Type = x.Type 12551 v.AddArg(x) 12552 return true 12553 } 12554 // match: (MOVWZreg x:(MOVHZreg _)) 12555 // cond: 12556 // result: x 12557 for { 12558 x := v.Args[0] 12559 if x.Op != OpS390XMOVHZreg { 12560 break 12561 } 12562 v.reset(OpCopy) 12563 v.Type = x.Type 12564 v.AddArg(x) 12565 return true 12566 } 12567 // match: (MOVWZreg x:(MOVWZreg _)) 12568 // cond: 12569 // result: x 12570 for { 12571 x := v.Args[0] 12572 if x.Op != OpS390XMOVWZreg { 12573 break 12574 } 12575 v.reset(OpCopy) 12576 v.Type = x.Type 12577 v.AddArg(x) 12578 return true 12579 } 12580 // match: (MOVWZreg (MOVDconst [c])) 12581 // cond: 12582 // result: (MOVDconst [int64(uint32(c))]) 12583 for { 12584 v_0 := v.Args[0] 12585 if v_0.Op != OpS390XMOVDconst { 12586 break 12587 } 12588 c := v_0.AuxInt 12589 v.reset(OpS390XMOVDconst) 12590 v.AuxInt = int64(uint32(c)) 12591 return true 12592 } 12593 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 12594 // cond: x.Uses == 1 && clobber(x) 12595 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 12596 for { 12597 x := v.Args[0] 12598 if x.Op != OpS390XMOVWZload { 12599 break 12600 } 12601 off := x.AuxInt 12602 sym := x.Aux 12603 ptr := x.Args[0] 12604 mem := x.Args[1] 12605 if !(x.Uses == 1 && clobber(x)) { 12606 break 12607 } 12608 b = x.Block 12609 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, v.Type) 12610 v.reset(OpCopy) 12611 v.AddArg(v0) 12612 v0.AuxInt = off 12613 v0.Aux = sym 12614 v0.AddArg(ptr) 12615 v0.AddArg(mem) 12616 return true 12617 } 12618 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 12619 // cond: x.Uses == 1 && clobber(x) 12620 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 12621 for { 12622 x := v.Args[0] 12623 if x.Op != OpS390XMOVWZloadidx { 12624 break 12625 } 12626 off := x.AuxInt 12627 sym := x.Aux 12628 ptr := x.Args[0] 12629 idx := x.Args[1] 12630 mem := x.Args[2] 12631 if !(x.Uses == 1 && clobber(x)) { 12632 break 12633 } 12634 b = x.Block 12635 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 12636 v.reset(OpCopy) 12637 v.AddArg(v0) 12638 v0.AuxInt = off 12639 v0.Aux = sym 12640 v0.AddArg(ptr) 12641 v0.AddArg(idx) 12642 v0.AddArg(mem) 12643 return true 12644 } 12645 return false 12646 } 12647 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 12648 b := v.Block 12649 _ = b 12650 // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 12651 // cond: is20Bit(off1+off2) 12652 // result: (MOVWload [off1+off2] {sym} ptr mem) 12653 for { 12654 off1 := v.AuxInt 12655 sym := v.Aux 12656 v_0 := v.Args[0] 12657 if v_0.Op != OpS390XADDconst { 12658 break 12659 } 12660 off2 := v_0.AuxInt 12661 ptr := v_0.Args[0] 12662 mem := v.Args[1] 12663 if !(is20Bit(off1 + off2)) { 12664 break 12665 } 12666 v.reset(OpS390XMOVWload) 12667 v.AuxInt = off1 + off2 12668 v.Aux = sym 12669 v.AddArg(ptr) 12670 v.AddArg(mem) 12671 return true 12672 } 12673 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12674 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12675 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12676 for { 12677 off1 := v.AuxInt 12678 sym1 := v.Aux 12679 v_0 := v.Args[0] 12680 if v_0.Op != OpS390XMOVDaddr { 12681 break 12682 } 12683 off2 := v_0.AuxInt 12684 sym2 := v_0.Aux 12685 base := v_0.Args[0] 12686 mem := v.Args[1] 12687 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12688 break 12689 } 12690 v.reset(OpS390XMOVWload) 12691 v.AuxInt = off1 + off2 12692 v.Aux = mergeSym(sym1, sym2) 12693 v.AddArg(base) 12694 v.AddArg(mem) 12695 return true 12696 } 12697 return false 12698 } 12699 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 12700 b := v.Block 12701 _ = b 12702 // match: (MOVWreg x:(MOVBload _ _)) 12703 // cond: 12704 // result: x 12705 for { 12706 x := v.Args[0] 12707 if x.Op != OpS390XMOVBload { 12708 break 12709 } 12710 v.reset(OpCopy) 12711 v.Type = x.Type 12712 v.AddArg(x) 12713 return true 12714 } 12715 // match: (MOVWreg x:(MOVBZload _ _)) 12716 // cond: 12717 // result: x 12718 for { 12719 x := v.Args[0] 12720 if x.Op != OpS390XMOVBZload { 12721 break 12722 } 12723 v.reset(OpCopy) 12724 v.Type = x.Type 12725 v.AddArg(x) 12726 return true 12727 } 12728 // match: (MOVWreg x:(MOVHload _ _)) 12729 // cond: 12730 // result: x 12731 for { 12732 x := v.Args[0] 12733 if x.Op != OpS390XMOVHload { 12734 break 12735 } 12736 v.reset(OpCopy) 12737 v.Type = x.Type 12738 v.AddArg(x) 12739 return true 12740 } 12741 // match: (MOVWreg x:(MOVHZload _ _)) 12742 // cond: 12743 // result: x 12744 for { 12745 x := v.Args[0] 12746 if x.Op != OpS390XMOVHZload { 12747 break 12748 } 12749 v.reset(OpCopy) 12750 v.Type = x.Type 12751 v.AddArg(x) 12752 return true 12753 } 12754 // match: (MOVWreg x:(MOVWload _ _)) 12755 // cond: 12756 // result: x 12757 for { 12758 x := v.Args[0] 12759 if x.Op != OpS390XMOVWload { 12760 break 12761 } 12762 v.reset(OpCopy) 12763 v.Type = x.Type 12764 v.AddArg(x) 12765 return true 12766 } 12767 // match: (MOVWreg x:(Arg <t>)) 12768 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 12769 // result: x 12770 for { 12771 x := v.Args[0] 12772 if x.Op != OpArg { 12773 break 12774 } 12775 t := x.Type 12776 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 12777 break 12778 } 12779 v.reset(OpCopy) 12780 v.Type = x.Type 12781 v.AddArg(x) 12782 return true 12783 } 12784 // match: (MOVWreg x:(MOVBreg _)) 12785 // cond: 12786 // result: x 12787 for { 12788 x := v.Args[0] 12789 if x.Op != OpS390XMOVBreg { 12790 break 12791 } 12792 v.reset(OpCopy) 12793 v.Type = x.Type 12794 v.AddArg(x) 12795 return true 12796 } 12797 // match: (MOVWreg x:(MOVBZreg _)) 12798 // cond: 12799 // result: x 12800 for { 12801 x := v.Args[0] 12802 if x.Op != OpS390XMOVBZreg { 12803 break 12804 } 12805 v.reset(OpCopy) 12806 v.Type = x.Type 12807 v.AddArg(x) 12808 return true 12809 } 12810 // match: (MOVWreg x:(MOVHreg _)) 12811 // cond: 12812 // result: x 12813 for { 12814 x := v.Args[0] 12815 if x.Op != OpS390XMOVHreg { 12816 break 12817 } 12818 v.reset(OpCopy) 12819 v.Type = x.Type 12820 v.AddArg(x) 12821 return true 12822 } 12823 // match: (MOVWreg x:(MOVHreg _)) 12824 // cond: 12825 // result: x 12826 for { 12827 x := v.Args[0] 12828 if x.Op != OpS390XMOVHreg { 12829 break 12830 } 12831 v.reset(OpCopy) 12832 v.Type = x.Type 12833 v.AddArg(x) 12834 return true 12835 } 12836 // match: (MOVWreg x:(MOVWreg _)) 12837 // cond: 12838 // result: x 12839 for { 12840 x := v.Args[0] 12841 if x.Op != OpS390XMOVWreg { 12842 break 12843 } 12844 v.reset(OpCopy) 12845 v.Type = x.Type 12846 v.AddArg(x) 12847 return true 12848 } 12849 // match: (MOVWreg (MOVDconst [c])) 12850 // cond: 12851 // result: (MOVDconst [int64(int32(c))]) 12852 for { 12853 v_0 := v.Args[0] 12854 if v_0.Op != OpS390XMOVDconst { 12855 break 12856 } 12857 c := v_0.AuxInt 12858 v.reset(OpS390XMOVDconst) 12859 v.AuxInt = int64(int32(c)) 12860 return true 12861 } 12862 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 12863 // cond: x.Uses == 1 && clobber(x) 12864 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 12865 for { 12866 x := v.Args[0] 12867 if x.Op != OpS390XMOVWZload { 12868 break 12869 } 12870 off := x.AuxInt 12871 sym := x.Aux 12872 ptr := x.Args[0] 12873 mem := x.Args[1] 12874 if !(x.Uses == 1 && clobber(x)) { 12875 break 12876 } 12877 b = x.Block 12878 v0 := b.NewValue0(v.Line, OpS390XMOVWload, v.Type) 12879 v.reset(OpCopy) 12880 v.AddArg(v0) 12881 v0.AuxInt = off 12882 v0.Aux = sym 12883 v0.AddArg(ptr) 12884 v0.AddArg(mem) 12885 return true 12886 } 12887 return false 12888 } 12889 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 12890 b := v.Block 12891 _ = b 12892 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 12893 // cond: 12894 // result: (MOVWstore [off] {sym} ptr x mem) 12895 for { 12896 off := v.AuxInt 12897 sym := v.Aux 12898 ptr := v.Args[0] 12899 v_1 := v.Args[1] 12900 if v_1.Op != OpS390XMOVWreg { 12901 break 12902 } 12903 x := v_1.Args[0] 12904 mem := v.Args[2] 12905 v.reset(OpS390XMOVWstore) 12906 v.AuxInt = off 12907 v.Aux = sym 12908 v.AddArg(ptr) 12909 v.AddArg(x) 12910 v.AddArg(mem) 12911 return true 12912 } 12913 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 12914 // cond: 12915 // result: (MOVWstore [off] {sym} ptr x mem) 12916 for { 12917 off := v.AuxInt 12918 sym := v.Aux 12919 ptr := v.Args[0] 12920 v_1 := v.Args[1] 12921 if v_1.Op != OpS390XMOVWZreg { 12922 break 12923 } 12924 x := v_1.Args[0] 12925 mem := v.Args[2] 12926 v.reset(OpS390XMOVWstore) 12927 v.AuxInt = off 12928 v.Aux = sym 12929 v.AddArg(ptr) 12930 v.AddArg(x) 12931 v.AddArg(mem) 12932 return true 12933 } 12934 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 12935 // cond: is20Bit(off1+off2) 12936 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 12937 for { 12938 off1 := v.AuxInt 12939 sym := v.Aux 12940 v_0 := v.Args[0] 12941 if v_0.Op != OpS390XADDconst { 12942 break 12943 } 12944 off2 := v_0.AuxInt 12945 ptr := v_0.Args[0] 12946 val := v.Args[1] 12947 mem := v.Args[2] 12948 if !(is20Bit(off1 + off2)) { 12949 break 12950 } 12951 v.reset(OpS390XMOVWstore) 12952 v.AuxInt = off1 + off2 12953 v.Aux = sym 12954 v.AddArg(ptr) 12955 v.AddArg(val) 12956 v.AddArg(mem) 12957 return true 12958 } 12959 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 12960 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 12961 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 12962 for { 12963 off := v.AuxInt 12964 sym := v.Aux 12965 ptr := v.Args[0] 12966 v_1 := v.Args[1] 12967 if v_1.Op != OpS390XMOVDconst { 12968 break 12969 } 12970 c := v_1.AuxInt 12971 mem := v.Args[2] 12972 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 12973 break 12974 } 12975 v.reset(OpS390XMOVWstoreconst) 12976 v.AuxInt = makeValAndOff(int64(int32(c)), off) 12977 v.Aux = sym 12978 v.AddArg(ptr) 12979 v.AddArg(mem) 12980 return true 12981 } 12982 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 12983 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12984 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 12985 for { 12986 off1 := v.AuxInt 12987 sym1 := v.Aux 12988 v_0 := v.Args[0] 12989 if v_0.Op != OpS390XMOVDaddr { 12990 break 12991 } 12992 off2 := v_0.AuxInt 12993 sym2 := v_0.Aux 12994 base := v_0.Args[0] 12995 val := v.Args[1] 12996 mem := v.Args[2] 12997 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12998 break 12999 } 13000 v.reset(OpS390XMOVWstore) 13001 v.AuxInt = off1 + off2 13002 v.Aux = mergeSym(sym1, sym2) 13003 v.AddArg(base) 13004 v.AddArg(val) 13005 v.AddArg(mem) 13006 return true 13007 } 13008 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13009 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13010 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13011 for { 13012 off1 := v.AuxInt 13013 sym1 := v.Aux 13014 v_0 := v.Args[0] 13015 if v_0.Op != OpS390XMOVDaddridx { 13016 break 13017 } 13018 off2 := v_0.AuxInt 13019 sym2 := v_0.Aux 13020 ptr := v_0.Args[0] 13021 idx := v_0.Args[1] 13022 val := v.Args[1] 13023 mem := v.Args[2] 13024 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13025 break 13026 } 13027 v.reset(OpS390XMOVWstoreidx) 13028 v.AuxInt = off1 + off2 13029 v.Aux = mergeSym(sym1, sym2) 13030 v.AddArg(ptr) 13031 v.AddArg(idx) 13032 v.AddArg(val) 13033 v.AddArg(mem) 13034 return true 13035 } 13036 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13037 // cond: ptr.Op != OpSB 13038 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13039 for { 13040 off := v.AuxInt 13041 sym := v.Aux 13042 v_0 := v.Args[0] 13043 if v_0.Op != OpS390XADD { 13044 break 13045 } 13046 ptr := v_0.Args[0] 13047 idx := v_0.Args[1] 13048 val := v.Args[1] 13049 mem := v.Args[2] 13050 if !(ptr.Op != OpSB) { 13051 break 13052 } 13053 v.reset(OpS390XMOVWstoreidx) 13054 v.AuxInt = off 13055 v.Aux = sym 13056 v.AddArg(ptr) 13057 v.AddArg(idx) 13058 v.AddArg(val) 13059 v.AddArg(mem) 13060 return true 13061 } 13062 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13063 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13064 // result: (MOVDstore [i-4] {s} p w mem) 13065 for { 13066 i := v.AuxInt 13067 s := v.Aux 13068 p := v.Args[0] 13069 v_1 := v.Args[1] 13070 if v_1.Op != OpS390XSRDconst { 13071 break 13072 } 13073 if v_1.AuxInt != 32 { 13074 break 13075 } 13076 w := v_1.Args[0] 13077 x := v.Args[2] 13078 if x.Op != OpS390XMOVWstore { 13079 break 13080 } 13081 if x.AuxInt != i-4 { 13082 break 13083 } 13084 if x.Aux != s { 13085 break 13086 } 13087 if p != x.Args[0] { 13088 break 13089 } 13090 if w != x.Args[1] { 13091 break 13092 } 13093 mem := x.Args[2] 13094 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13095 break 13096 } 13097 v.reset(OpS390XMOVDstore) 13098 v.AuxInt = i - 4 13099 v.Aux = s 13100 v.AddArg(p) 13101 v.AddArg(w) 13102 v.AddArg(mem) 13103 return true 13104 } 13105 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13106 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13107 // result: (MOVDstore [i-4] {s} p w0 mem) 13108 for { 13109 i := v.AuxInt 13110 s := v.Aux 13111 p := v.Args[0] 13112 w0 := v.Args[1] 13113 if w0.Op != OpS390XSRDconst { 13114 break 13115 } 13116 j := w0.AuxInt 13117 w := w0.Args[0] 13118 x := v.Args[2] 13119 if x.Op != OpS390XMOVWstore { 13120 break 13121 } 13122 if x.AuxInt != i-4 { 13123 break 13124 } 13125 if x.Aux != s { 13126 break 13127 } 13128 if p != x.Args[0] { 13129 break 13130 } 13131 x_1 := x.Args[1] 13132 if x_1.Op != OpS390XSRDconst { 13133 break 13134 } 13135 if x_1.AuxInt != j+32 { 13136 break 13137 } 13138 if w != x_1.Args[0] { 13139 break 13140 } 13141 mem := x.Args[2] 13142 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13143 break 13144 } 13145 v.reset(OpS390XMOVDstore) 13146 v.AuxInt = i - 4 13147 v.Aux = s 13148 v.AddArg(p) 13149 v.AddArg(w0) 13150 v.AddArg(mem) 13151 return true 13152 } 13153 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13154 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13155 // result: (STM2 [i-4] {s} p w0 w1 mem) 13156 for { 13157 i := v.AuxInt 13158 s := v.Aux 13159 p := v.Args[0] 13160 w1 := v.Args[1] 13161 x := v.Args[2] 13162 if x.Op != OpS390XMOVWstore { 13163 break 13164 } 13165 if x.AuxInt != i-4 { 13166 break 13167 } 13168 if x.Aux != s { 13169 break 13170 } 13171 if p != x.Args[0] { 13172 break 13173 } 13174 w0 := x.Args[1] 13175 mem := x.Args[2] 13176 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13177 break 13178 } 13179 v.reset(OpS390XSTM2) 13180 v.AuxInt = i - 4 13181 v.Aux = s 13182 v.AddArg(p) 13183 v.AddArg(w0) 13184 v.AddArg(w1) 13185 v.AddArg(mem) 13186 return true 13187 } 13188 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13189 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13190 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13191 for { 13192 i := v.AuxInt 13193 s := v.Aux 13194 p := v.Args[0] 13195 w2 := v.Args[1] 13196 x := v.Args[2] 13197 if x.Op != OpS390XSTM2 { 13198 break 13199 } 13200 if x.AuxInt != i-8 { 13201 break 13202 } 13203 if x.Aux != s { 13204 break 13205 } 13206 if p != x.Args[0] { 13207 break 13208 } 13209 w0 := x.Args[1] 13210 w1 := x.Args[2] 13211 mem := x.Args[3] 13212 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13213 break 13214 } 13215 v.reset(OpS390XSTM3) 13216 v.AuxInt = i - 8 13217 v.Aux = s 13218 v.AddArg(p) 13219 v.AddArg(w0) 13220 v.AddArg(w1) 13221 v.AddArg(w2) 13222 v.AddArg(mem) 13223 return true 13224 } 13225 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13226 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13227 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13228 for { 13229 i := v.AuxInt 13230 s := v.Aux 13231 p := v.Args[0] 13232 w3 := v.Args[1] 13233 x := v.Args[2] 13234 if x.Op != OpS390XSTM3 { 13235 break 13236 } 13237 if x.AuxInt != i-12 { 13238 break 13239 } 13240 if x.Aux != s { 13241 break 13242 } 13243 if p != x.Args[0] { 13244 break 13245 } 13246 w0 := x.Args[1] 13247 w1 := x.Args[2] 13248 w2 := x.Args[3] 13249 mem := x.Args[4] 13250 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13251 break 13252 } 13253 v.reset(OpS390XSTM4) 13254 v.AuxInt = i - 12 13255 v.Aux = s 13256 v.AddArg(p) 13257 v.AddArg(w0) 13258 v.AddArg(w1) 13259 v.AddArg(w2) 13260 v.AddArg(w3) 13261 v.AddArg(mem) 13262 return true 13263 } 13264 return false 13265 } 13266 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13267 b := v.Block 13268 _ = b 13269 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13270 // cond: ValAndOff(sc).canAdd(off) 13271 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13272 for { 13273 sc := v.AuxInt 13274 s := v.Aux 13275 v_0 := v.Args[0] 13276 if v_0.Op != OpS390XADDconst { 13277 break 13278 } 13279 off := v_0.AuxInt 13280 ptr := v_0.Args[0] 13281 mem := v.Args[1] 13282 if !(ValAndOff(sc).canAdd(off)) { 13283 break 13284 } 13285 v.reset(OpS390XMOVWstoreconst) 13286 v.AuxInt = ValAndOff(sc).add(off) 13287 v.Aux = s 13288 v.AddArg(ptr) 13289 v.AddArg(mem) 13290 return true 13291 } 13292 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 13293 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 13294 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 13295 for { 13296 sc := v.AuxInt 13297 sym1 := v.Aux 13298 v_0 := v.Args[0] 13299 if v_0.Op != OpS390XMOVDaddr { 13300 break 13301 } 13302 off := v_0.AuxInt 13303 sym2 := v_0.Aux 13304 ptr := v_0.Args[0] 13305 mem := v.Args[1] 13306 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 13307 break 13308 } 13309 v.reset(OpS390XMOVWstoreconst) 13310 v.AuxInt = ValAndOff(sc).add(off) 13311 v.Aux = mergeSym(sym1, sym2) 13312 v.AddArg(ptr) 13313 v.AddArg(mem) 13314 return true 13315 } 13316 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 13317 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 13318 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 13319 for { 13320 c := v.AuxInt 13321 s := v.Aux 13322 p := v.Args[0] 13323 x := v.Args[1] 13324 if x.Op != OpS390XMOVWstoreconst { 13325 break 13326 } 13327 a := x.AuxInt 13328 if x.Aux != s { 13329 break 13330 } 13331 if p != x.Args[0] { 13332 break 13333 } 13334 mem := x.Args[1] 13335 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 13336 break 13337 } 13338 v.reset(OpS390XMOVDstore) 13339 v.AuxInt = ValAndOff(a).Off() 13340 v.Aux = s 13341 v.AddArg(p) 13342 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 13343 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 13344 v.AddArg(v0) 13345 v.AddArg(mem) 13346 return true 13347 } 13348 return false 13349 } 13350 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 13351 b := v.Block 13352 _ = b 13353 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 13354 // cond: 13355 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13356 for { 13357 c := v.AuxInt 13358 sym := v.Aux 13359 v_0 := v.Args[0] 13360 if v_0.Op != OpS390XADDconst { 13361 break 13362 } 13363 d := v_0.AuxInt 13364 ptr := v_0.Args[0] 13365 idx := v.Args[1] 13366 val := v.Args[2] 13367 mem := v.Args[3] 13368 v.reset(OpS390XMOVWstoreidx) 13369 v.AuxInt = c + d 13370 v.Aux = sym 13371 v.AddArg(ptr) 13372 v.AddArg(idx) 13373 v.AddArg(val) 13374 v.AddArg(mem) 13375 return true 13376 } 13377 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 13378 // cond: 13379 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13380 for { 13381 c := v.AuxInt 13382 sym := v.Aux 13383 ptr := v.Args[0] 13384 v_1 := v.Args[1] 13385 if v_1.Op != OpS390XADDconst { 13386 break 13387 } 13388 d := v_1.AuxInt 13389 idx := v_1.Args[0] 13390 val := v.Args[2] 13391 mem := v.Args[3] 13392 v.reset(OpS390XMOVWstoreidx) 13393 v.AuxInt = c + d 13394 v.Aux = sym 13395 v.AddArg(ptr) 13396 v.AddArg(idx) 13397 v.AddArg(val) 13398 v.AddArg(mem) 13399 return true 13400 } 13401 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 13402 // cond: x.Uses == 1 && clobber(x) 13403 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 13404 for { 13405 i := v.AuxInt 13406 s := v.Aux 13407 p := v.Args[0] 13408 idx := v.Args[1] 13409 w := v.Args[2] 13410 x := v.Args[3] 13411 if x.Op != OpS390XMOVWstoreidx { 13412 break 13413 } 13414 if x.AuxInt != i-4 { 13415 break 13416 } 13417 if x.Aux != s { 13418 break 13419 } 13420 if p != x.Args[0] { 13421 break 13422 } 13423 if idx != x.Args[1] { 13424 break 13425 } 13426 x_2 := x.Args[2] 13427 if x_2.Op != OpS390XSRDconst { 13428 break 13429 } 13430 if x_2.AuxInt != 32 { 13431 break 13432 } 13433 if w != x_2.Args[0] { 13434 break 13435 } 13436 mem := x.Args[3] 13437 if !(x.Uses == 1 && clobber(x)) { 13438 break 13439 } 13440 v.reset(OpS390XMOVDstoreidx) 13441 v.AuxInt = i - 4 13442 v.Aux = s 13443 v.AddArg(p) 13444 v.AddArg(idx) 13445 v.AddArg(w) 13446 v.AddArg(mem) 13447 return true 13448 } 13449 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 13450 // cond: x.Uses == 1 && clobber(x) 13451 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 13452 for { 13453 i := v.AuxInt 13454 s := v.Aux 13455 p := v.Args[0] 13456 idx := v.Args[1] 13457 w0 := v.Args[2] 13458 if w0.Op != OpS390XSRDconst { 13459 break 13460 } 13461 j := w0.AuxInt 13462 w := w0.Args[0] 13463 x := v.Args[3] 13464 if x.Op != OpS390XMOVWstoreidx { 13465 break 13466 } 13467 if x.AuxInt != i-4 { 13468 break 13469 } 13470 if x.Aux != s { 13471 break 13472 } 13473 if p != x.Args[0] { 13474 break 13475 } 13476 if idx != x.Args[1] { 13477 break 13478 } 13479 x_2 := x.Args[2] 13480 if x_2.Op != OpS390XSRDconst { 13481 break 13482 } 13483 if x_2.AuxInt != j+32 { 13484 break 13485 } 13486 if w != x_2.Args[0] { 13487 break 13488 } 13489 mem := x.Args[3] 13490 if !(x.Uses == 1 && clobber(x)) { 13491 break 13492 } 13493 v.reset(OpS390XMOVDstoreidx) 13494 v.AuxInt = i - 4 13495 v.Aux = s 13496 v.AddArg(p) 13497 v.AddArg(idx) 13498 v.AddArg(w0) 13499 v.AddArg(mem) 13500 return true 13501 } 13502 return false 13503 } 13504 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 13505 b := v.Block 13506 _ = b 13507 // match: (MULLD x (MOVDconst [c])) 13508 // cond: is32Bit(c) 13509 // result: (MULLDconst [c] x) 13510 for { 13511 x := v.Args[0] 13512 v_1 := v.Args[1] 13513 if v_1.Op != OpS390XMOVDconst { 13514 break 13515 } 13516 c := v_1.AuxInt 13517 if !(is32Bit(c)) { 13518 break 13519 } 13520 v.reset(OpS390XMULLDconst) 13521 v.AuxInt = c 13522 v.AddArg(x) 13523 return true 13524 } 13525 // match: (MULLD (MOVDconst [c]) x) 13526 // cond: is32Bit(c) 13527 // result: (MULLDconst [c] x) 13528 for { 13529 v_0 := v.Args[0] 13530 if v_0.Op != OpS390XMOVDconst { 13531 break 13532 } 13533 c := v_0.AuxInt 13534 x := v.Args[1] 13535 if !(is32Bit(c)) { 13536 break 13537 } 13538 v.reset(OpS390XMULLDconst) 13539 v.AuxInt = c 13540 v.AddArg(x) 13541 return true 13542 } 13543 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 13544 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13545 // result: (MULLDload <t> [off] {sym} x ptr mem) 13546 for { 13547 t := v.Type 13548 x := v.Args[0] 13549 g := v.Args[1] 13550 if g.Op != OpS390XMOVDload { 13551 break 13552 } 13553 off := g.AuxInt 13554 sym := g.Aux 13555 ptr := g.Args[0] 13556 mem := g.Args[1] 13557 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13558 break 13559 } 13560 v.reset(OpS390XMULLDload) 13561 v.Type = t 13562 v.AuxInt = off 13563 v.Aux = sym 13564 v.AddArg(x) 13565 v.AddArg(ptr) 13566 v.AddArg(mem) 13567 return true 13568 } 13569 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 13570 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13571 // result: (MULLDload <t> [off] {sym} x ptr mem) 13572 for { 13573 t := v.Type 13574 g := v.Args[0] 13575 if g.Op != OpS390XMOVDload { 13576 break 13577 } 13578 off := g.AuxInt 13579 sym := g.Aux 13580 ptr := g.Args[0] 13581 mem := g.Args[1] 13582 x := v.Args[1] 13583 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13584 break 13585 } 13586 v.reset(OpS390XMULLDload) 13587 v.Type = t 13588 v.AuxInt = off 13589 v.Aux = sym 13590 v.AddArg(x) 13591 v.AddArg(ptr) 13592 v.AddArg(mem) 13593 return true 13594 } 13595 return false 13596 } 13597 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 13598 b := v.Block 13599 _ = b 13600 // match: (MULLDconst [-1] x) 13601 // cond: 13602 // result: (NEG x) 13603 for { 13604 if v.AuxInt != -1 { 13605 break 13606 } 13607 x := v.Args[0] 13608 v.reset(OpS390XNEG) 13609 v.AddArg(x) 13610 return true 13611 } 13612 // match: (MULLDconst [0] _) 13613 // cond: 13614 // result: (MOVDconst [0]) 13615 for { 13616 if v.AuxInt != 0 { 13617 break 13618 } 13619 v.reset(OpS390XMOVDconst) 13620 v.AuxInt = 0 13621 return true 13622 } 13623 // match: (MULLDconst [1] x) 13624 // cond: 13625 // result: x 13626 for { 13627 if v.AuxInt != 1 { 13628 break 13629 } 13630 x := v.Args[0] 13631 v.reset(OpCopy) 13632 v.Type = x.Type 13633 v.AddArg(x) 13634 return true 13635 } 13636 // match: (MULLDconst [c] x) 13637 // cond: isPowerOfTwo(c) 13638 // result: (SLDconst [log2(c)] x) 13639 for { 13640 c := v.AuxInt 13641 x := v.Args[0] 13642 if !(isPowerOfTwo(c)) { 13643 break 13644 } 13645 v.reset(OpS390XSLDconst) 13646 v.AuxInt = log2(c) 13647 v.AddArg(x) 13648 return true 13649 } 13650 // match: (MULLDconst [c] x) 13651 // cond: isPowerOfTwo(c+1) && c >= 15 13652 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 13653 for { 13654 c := v.AuxInt 13655 x := v.Args[0] 13656 if !(isPowerOfTwo(c+1) && c >= 15) { 13657 break 13658 } 13659 v.reset(OpS390XSUB) 13660 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13661 v0.AuxInt = log2(c + 1) 13662 v0.AddArg(x) 13663 v.AddArg(v0) 13664 v.AddArg(x) 13665 return true 13666 } 13667 // match: (MULLDconst [c] x) 13668 // cond: isPowerOfTwo(c-1) && c >= 17 13669 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 13670 for { 13671 c := v.AuxInt 13672 x := v.Args[0] 13673 if !(isPowerOfTwo(c-1) && c >= 17) { 13674 break 13675 } 13676 v.reset(OpS390XADD) 13677 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13678 v0.AuxInt = log2(c - 1) 13679 v0.AddArg(x) 13680 v.AddArg(v0) 13681 v.AddArg(x) 13682 return true 13683 } 13684 // match: (MULLDconst [c] (MOVDconst [d])) 13685 // cond: 13686 // result: (MOVDconst [c*d]) 13687 for { 13688 c := v.AuxInt 13689 v_0 := v.Args[0] 13690 if v_0.Op != OpS390XMOVDconst { 13691 break 13692 } 13693 d := v_0.AuxInt 13694 v.reset(OpS390XMOVDconst) 13695 v.AuxInt = c * d 13696 return true 13697 } 13698 return false 13699 } 13700 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 13701 b := v.Block 13702 _ = b 13703 // match: (MULLW x (MOVDconst [c])) 13704 // cond: 13705 // result: (MULLWconst [c] x) 13706 for { 13707 x := v.Args[0] 13708 v_1 := v.Args[1] 13709 if v_1.Op != OpS390XMOVDconst { 13710 break 13711 } 13712 c := v_1.AuxInt 13713 v.reset(OpS390XMULLWconst) 13714 v.AuxInt = c 13715 v.AddArg(x) 13716 return true 13717 } 13718 // match: (MULLW (MOVDconst [c]) x) 13719 // cond: 13720 // result: (MULLWconst [c] x) 13721 for { 13722 v_0 := v.Args[0] 13723 if v_0.Op != OpS390XMOVDconst { 13724 break 13725 } 13726 c := v_0.AuxInt 13727 x := v.Args[1] 13728 v.reset(OpS390XMULLWconst) 13729 v.AuxInt = c 13730 v.AddArg(x) 13731 return true 13732 } 13733 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 13734 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13735 // result: (MULLWload <t> [off] {sym} x ptr mem) 13736 for { 13737 t := v.Type 13738 x := v.Args[0] 13739 g := v.Args[1] 13740 if g.Op != OpS390XMOVWload { 13741 break 13742 } 13743 off := g.AuxInt 13744 sym := g.Aux 13745 ptr := g.Args[0] 13746 mem := g.Args[1] 13747 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13748 break 13749 } 13750 v.reset(OpS390XMULLWload) 13751 v.Type = t 13752 v.AuxInt = off 13753 v.Aux = sym 13754 v.AddArg(x) 13755 v.AddArg(ptr) 13756 v.AddArg(mem) 13757 return true 13758 } 13759 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 13760 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13761 // result: (MULLWload <t> [off] {sym} x ptr mem) 13762 for { 13763 t := v.Type 13764 g := v.Args[0] 13765 if g.Op != OpS390XMOVWload { 13766 break 13767 } 13768 off := g.AuxInt 13769 sym := g.Aux 13770 ptr := g.Args[0] 13771 mem := g.Args[1] 13772 x := v.Args[1] 13773 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13774 break 13775 } 13776 v.reset(OpS390XMULLWload) 13777 v.Type = t 13778 v.AuxInt = off 13779 v.Aux = sym 13780 v.AddArg(x) 13781 v.AddArg(ptr) 13782 v.AddArg(mem) 13783 return true 13784 } 13785 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 13786 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13787 // result: (MULLWload <t> [off] {sym} x ptr mem) 13788 for { 13789 t := v.Type 13790 x := v.Args[0] 13791 g := v.Args[1] 13792 if g.Op != OpS390XMOVWZload { 13793 break 13794 } 13795 off := g.AuxInt 13796 sym := g.Aux 13797 ptr := g.Args[0] 13798 mem := g.Args[1] 13799 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13800 break 13801 } 13802 v.reset(OpS390XMULLWload) 13803 v.Type = t 13804 v.AuxInt = off 13805 v.Aux = sym 13806 v.AddArg(x) 13807 v.AddArg(ptr) 13808 v.AddArg(mem) 13809 return true 13810 } 13811 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 13812 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13813 // result: (MULLWload <t> [off] {sym} x ptr mem) 13814 for { 13815 t := v.Type 13816 g := v.Args[0] 13817 if g.Op != OpS390XMOVWZload { 13818 break 13819 } 13820 off := g.AuxInt 13821 sym := g.Aux 13822 ptr := g.Args[0] 13823 mem := g.Args[1] 13824 x := v.Args[1] 13825 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13826 break 13827 } 13828 v.reset(OpS390XMULLWload) 13829 v.Type = t 13830 v.AuxInt = off 13831 v.Aux = sym 13832 v.AddArg(x) 13833 v.AddArg(ptr) 13834 v.AddArg(mem) 13835 return true 13836 } 13837 return false 13838 } 13839 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 13840 b := v.Block 13841 _ = b 13842 // match: (MULLWconst [-1] x) 13843 // cond: 13844 // result: (NEGW x) 13845 for { 13846 if v.AuxInt != -1 { 13847 break 13848 } 13849 x := v.Args[0] 13850 v.reset(OpS390XNEGW) 13851 v.AddArg(x) 13852 return true 13853 } 13854 // match: (MULLWconst [0] _) 13855 // cond: 13856 // result: (MOVDconst [0]) 13857 for { 13858 if v.AuxInt != 0 { 13859 break 13860 } 13861 v.reset(OpS390XMOVDconst) 13862 v.AuxInt = 0 13863 return true 13864 } 13865 // match: (MULLWconst [1] x) 13866 // cond: 13867 // result: x 13868 for { 13869 if v.AuxInt != 1 { 13870 break 13871 } 13872 x := v.Args[0] 13873 v.reset(OpCopy) 13874 v.Type = x.Type 13875 v.AddArg(x) 13876 return true 13877 } 13878 // match: (MULLWconst [c] x) 13879 // cond: isPowerOfTwo(c) 13880 // result: (SLWconst [log2(c)] x) 13881 for { 13882 c := v.AuxInt 13883 x := v.Args[0] 13884 if !(isPowerOfTwo(c)) { 13885 break 13886 } 13887 v.reset(OpS390XSLWconst) 13888 v.AuxInt = log2(c) 13889 v.AddArg(x) 13890 return true 13891 } 13892 // match: (MULLWconst [c] x) 13893 // cond: isPowerOfTwo(c+1) && c >= 15 13894 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 13895 for { 13896 c := v.AuxInt 13897 x := v.Args[0] 13898 if !(isPowerOfTwo(c+1) && c >= 15) { 13899 break 13900 } 13901 v.reset(OpS390XSUBW) 13902 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13903 v0.AuxInt = log2(c + 1) 13904 v0.AddArg(x) 13905 v.AddArg(v0) 13906 v.AddArg(x) 13907 return true 13908 } 13909 // match: (MULLWconst [c] x) 13910 // cond: isPowerOfTwo(c-1) && c >= 17 13911 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 13912 for { 13913 c := v.AuxInt 13914 x := v.Args[0] 13915 if !(isPowerOfTwo(c-1) && c >= 17) { 13916 break 13917 } 13918 v.reset(OpS390XADDW) 13919 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13920 v0.AuxInt = log2(c - 1) 13921 v0.AddArg(x) 13922 v.AddArg(v0) 13923 v.AddArg(x) 13924 return true 13925 } 13926 // match: (MULLWconst [c] (MOVDconst [d])) 13927 // cond: 13928 // result: (MOVDconst [int64(int32(c*d))]) 13929 for { 13930 c := v.AuxInt 13931 v_0 := v.Args[0] 13932 if v_0.Op != OpS390XMOVDconst { 13933 break 13934 } 13935 d := v_0.AuxInt 13936 v.reset(OpS390XMOVDconst) 13937 v.AuxInt = int64(int32(c * d)) 13938 return true 13939 } 13940 return false 13941 } 13942 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 13943 b := v.Block 13944 _ = b 13945 // match: (NEG (MOVDconst [c])) 13946 // cond: 13947 // result: (MOVDconst [-c]) 13948 for { 13949 v_0 := v.Args[0] 13950 if v_0.Op != OpS390XMOVDconst { 13951 break 13952 } 13953 c := v_0.AuxInt 13954 v.reset(OpS390XMOVDconst) 13955 v.AuxInt = -c 13956 return true 13957 } 13958 return false 13959 } 13960 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 13961 b := v.Block 13962 _ = b 13963 // match: (NEGW (MOVDconst [c])) 13964 // cond: 13965 // result: (MOVDconst [int64(int32(-c))]) 13966 for { 13967 v_0 := v.Args[0] 13968 if v_0.Op != OpS390XMOVDconst { 13969 break 13970 } 13971 c := v_0.AuxInt 13972 v.reset(OpS390XMOVDconst) 13973 v.AuxInt = int64(int32(-c)) 13974 return true 13975 } 13976 return false 13977 } 13978 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 13979 b := v.Block 13980 _ = b 13981 // match: (NOT x) 13982 // cond: true 13983 // result: (XOR (MOVDconst [-1]) x) 13984 for { 13985 x := v.Args[0] 13986 if !(true) { 13987 break 13988 } 13989 v.reset(OpS390XXOR) 13990 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 13991 v0.AuxInt = -1 13992 v.AddArg(v0) 13993 v.AddArg(x) 13994 return true 13995 } 13996 return false 13997 } 13998 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 13999 b := v.Block 14000 _ = b 14001 // match: (NOTW x) 14002 // cond: true 14003 // result: (XORWconst [-1] x) 14004 for { 14005 x := v.Args[0] 14006 if !(true) { 14007 break 14008 } 14009 v.reset(OpS390XXORWconst) 14010 v.AuxInt = -1 14011 v.AddArg(x) 14012 return true 14013 } 14014 return false 14015 } 14016 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14017 b := v.Block 14018 _ = b 14019 // match: (OR x (MOVDconst [c])) 14020 // cond: isU32Bit(c) 14021 // result: (ORconst [c] x) 14022 for { 14023 x := v.Args[0] 14024 v_1 := v.Args[1] 14025 if v_1.Op != OpS390XMOVDconst { 14026 break 14027 } 14028 c := v_1.AuxInt 14029 if !(isU32Bit(c)) { 14030 break 14031 } 14032 v.reset(OpS390XORconst) 14033 v.AuxInt = c 14034 v.AddArg(x) 14035 return true 14036 } 14037 // match: (OR (MOVDconst [c]) x) 14038 // cond: isU32Bit(c) 14039 // result: (ORconst [c] x) 14040 for { 14041 v_0 := v.Args[0] 14042 if v_0.Op != OpS390XMOVDconst { 14043 break 14044 } 14045 c := v_0.AuxInt 14046 x := v.Args[1] 14047 if !(isU32Bit(c)) { 14048 break 14049 } 14050 v.reset(OpS390XORconst) 14051 v.AuxInt = c 14052 v.AddArg(x) 14053 return true 14054 } 14055 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14056 // cond: 14057 // result: (MOVDconst [c|d]) 14058 for { 14059 v_0 := v.Args[0] 14060 if v_0.Op != OpS390XMOVDconst { 14061 break 14062 } 14063 c := v_0.AuxInt 14064 v_1 := v.Args[1] 14065 if v_1.Op != OpS390XMOVDconst { 14066 break 14067 } 14068 d := v_1.AuxInt 14069 v.reset(OpS390XMOVDconst) 14070 v.AuxInt = c | d 14071 return true 14072 } 14073 // match: (OR x x) 14074 // cond: 14075 // result: x 14076 for { 14077 x := v.Args[0] 14078 if x != v.Args[1] { 14079 break 14080 } 14081 v.reset(OpCopy) 14082 v.Type = x.Type 14083 v.AddArg(x) 14084 return true 14085 } 14086 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14087 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14088 // result: (ORload <t> [off] {sym} x ptr mem) 14089 for { 14090 t := v.Type 14091 x := v.Args[0] 14092 g := v.Args[1] 14093 if g.Op != OpS390XMOVDload { 14094 break 14095 } 14096 off := g.AuxInt 14097 sym := g.Aux 14098 ptr := g.Args[0] 14099 mem := g.Args[1] 14100 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14101 break 14102 } 14103 v.reset(OpS390XORload) 14104 v.Type = t 14105 v.AuxInt = off 14106 v.Aux = sym 14107 v.AddArg(x) 14108 v.AddArg(ptr) 14109 v.AddArg(mem) 14110 return true 14111 } 14112 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14113 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14114 // result: (ORload <t> [off] {sym} x ptr mem) 14115 for { 14116 t := v.Type 14117 g := v.Args[0] 14118 if g.Op != OpS390XMOVDload { 14119 break 14120 } 14121 off := g.AuxInt 14122 sym := g.Aux 14123 ptr := g.Args[0] 14124 mem := g.Args[1] 14125 x := v.Args[1] 14126 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14127 break 14128 } 14129 v.reset(OpS390XORload) 14130 v.Type = t 14131 v.AuxInt = off 14132 v.Aux = sym 14133 v.AddArg(x) 14134 v.AddArg(ptr) 14135 v.AddArg(mem) 14136 return true 14137 } 14138 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14139 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14140 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14141 for { 14142 o0 := v.Args[0] 14143 if o0.Op != OpS390XOR { 14144 break 14145 } 14146 o1 := o0.Args[0] 14147 if o1.Op != OpS390XOR { 14148 break 14149 } 14150 o2 := o1.Args[0] 14151 if o2.Op != OpS390XOR { 14152 break 14153 } 14154 o3 := o2.Args[0] 14155 if o3.Op != OpS390XOR { 14156 break 14157 } 14158 o4 := o3.Args[0] 14159 if o4.Op != OpS390XOR { 14160 break 14161 } 14162 o5 := o4.Args[0] 14163 if o5.Op != OpS390XOR { 14164 break 14165 } 14166 x0 := o5.Args[0] 14167 if x0.Op != OpS390XMOVBZload { 14168 break 14169 } 14170 i := x0.AuxInt 14171 s := x0.Aux 14172 p := x0.Args[0] 14173 mem := x0.Args[1] 14174 s0 := o5.Args[1] 14175 if s0.Op != OpS390XSLDconst { 14176 break 14177 } 14178 if s0.AuxInt != 8 { 14179 break 14180 } 14181 x1 := s0.Args[0] 14182 if x1.Op != OpS390XMOVBZload { 14183 break 14184 } 14185 if x1.AuxInt != i+1 { 14186 break 14187 } 14188 if x1.Aux != s { 14189 break 14190 } 14191 if p != x1.Args[0] { 14192 break 14193 } 14194 if mem != x1.Args[1] { 14195 break 14196 } 14197 s1 := o4.Args[1] 14198 if s1.Op != OpS390XSLDconst { 14199 break 14200 } 14201 if s1.AuxInt != 16 { 14202 break 14203 } 14204 x2 := s1.Args[0] 14205 if x2.Op != OpS390XMOVBZload { 14206 break 14207 } 14208 if x2.AuxInt != i+2 { 14209 break 14210 } 14211 if x2.Aux != s { 14212 break 14213 } 14214 if p != x2.Args[0] { 14215 break 14216 } 14217 if mem != x2.Args[1] { 14218 break 14219 } 14220 s2 := o3.Args[1] 14221 if s2.Op != OpS390XSLDconst { 14222 break 14223 } 14224 if s2.AuxInt != 24 { 14225 break 14226 } 14227 x3 := s2.Args[0] 14228 if x3.Op != OpS390XMOVBZload { 14229 break 14230 } 14231 if x3.AuxInt != i+3 { 14232 break 14233 } 14234 if x3.Aux != s { 14235 break 14236 } 14237 if p != x3.Args[0] { 14238 break 14239 } 14240 if mem != x3.Args[1] { 14241 break 14242 } 14243 s3 := o2.Args[1] 14244 if s3.Op != OpS390XSLDconst { 14245 break 14246 } 14247 if s3.AuxInt != 32 { 14248 break 14249 } 14250 x4 := s3.Args[0] 14251 if x4.Op != OpS390XMOVBZload { 14252 break 14253 } 14254 if x4.AuxInt != i+4 { 14255 break 14256 } 14257 if x4.Aux != s { 14258 break 14259 } 14260 if p != x4.Args[0] { 14261 break 14262 } 14263 if mem != x4.Args[1] { 14264 break 14265 } 14266 s4 := o1.Args[1] 14267 if s4.Op != OpS390XSLDconst { 14268 break 14269 } 14270 if s4.AuxInt != 40 { 14271 break 14272 } 14273 x5 := s4.Args[0] 14274 if x5.Op != OpS390XMOVBZload { 14275 break 14276 } 14277 if x5.AuxInt != i+5 { 14278 break 14279 } 14280 if x5.Aux != s { 14281 break 14282 } 14283 if p != x5.Args[0] { 14284 break 14285 } 14286 if mem != x5.Args[1] { 14287 break 14288 } 14289 s5 := o0.Args[1] 14290 if s5.Op != OpS390XSLDconst { 14291 break 14292 } 14293 if s5.AuxInt != 48 { 14294 break 14295 } 14296 x6 := s5.Args[0] 14297 if x6.Op != OpS390XMOVBZload { 14298 break 14299 } 14300 if x6.AuxInt != i+6 { 14301 break 14302 } 14303 if x6.Aux != s { 14304 break 14305 } 14306 if p != x6.Args[0] { 14307 break 14308 } 14309 if mem != x6.Args[1] { 14310 break 14311 } 14312 s6 := v.Args[1] 14313 if s6.Op != OpS390XSLDconst { 14314 break 14315 } 14316 if s6.AuxInt != 56 { 14317 break 14318 } 14319 x7 := s6.Args[0] 14320 if x7.Op != OpS390XMOVBZload { 14321 break 14322 } 14323 if x7.AuxInt != i+7 { 14324 break 14325 } 14326 if x7.Aux != s { 14327 break 14328 } 14329 if p != x7.Args[0] { 14330 break 14331 } 14332 if mem != x7.Args[1] { 14333 break 14334 } 14335 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14336 break 14337 } 14338 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14339 v0 := b.NewValue0(v.Line, OpS390XMOVDBRload, config.fe.TypeUInt64()) 14340 v.reset(OpCopy) 14341 v.AddArg(v0) 14342 v0.AuxInt = i 14343 v0.Aux = s 14344 v0.AddArg(p) 14345 v0.AddArg(mem) 14346 return true 14347 } 14348 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 14349 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14350 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 14351 for { 14352 o0 := v.Args[0] 14353 if o0.Op != OpS390XOR { 14354 break 14355 } 14356 o1 := o0.Args[0] 14357 if o1.Op != OpS390XOR { 14358 break 14359 } 14360 o2 := o1.Args[0] 14361 if o2.Op != OpS390XOR { 14362 break 14363 } 14364 o3 := o2.Args[0] 14365 if o3.Op != OpS390XOR { 14366 break 14367 } 14368 o4 := o3.Args[0] 14369 if o4.Op != OpS390XOR { 14370 break 14371 } 14372 o5 := o4.Args[0] 14373 if o5.Op != OpS390XOR { 14374 break 14375 } 14376 x0 := o5.Args[0] 14377 if x0.Op != OpS390XMOVBZloadidx { 14378 break 14379 } 14380 i := x0.AuxInt 14381 s := x0.Aux 14382 p := x0.Args[0] 14383 idx := x0.Args[1] 14384 mem := x0.Args[2] 14385 s0 := o5.Args[1] 14386 if s0.Op != OpS390XSLDconst { 14387 break 14388 } 14389 if s0.AuxInt != 8 { 14390 break 14391 } 14392 x1 := s0.Args[0] 14393 if x1.Op != OpS390XMOVBZloadidx { 14394 break 14395 } 14396 if x1.AuxInt != i+1 { 14397 break 14398 } 14399 if x1.Aux != s { 14400 break 14401 } 14402 if p != x1.Args[0] { 14403 break 14404 } 14405 if idx != x1.Args[1] { 14406 break 14407 } 14408 if mem != x1.Args[2] { 14409 break 14410 } 14411 s1 := o4.Args[1] 14412 if s1.Op != OpS390XSLDconst { 14413 break 14414 } 14415 if s1.AuxInt != 16 { 14416 break 14417 } 14418 x2 := s1.Args[0] 14419 if x2.Op != OpS390XMOVBZloadidx { 14420 break 14421 } 14422 if x2.AuxInt != i+2 { 14423 break 14424 } 14425 if x2.Aux != s { 14426 break 14427 } 14428 if p != x2.Args[0] { 14429 break 14430 } 14431 if idx != x2.Args[1] { 14432 break 14433 } 14434 if mem != x2.Args[2] { 14435 break 14436 } 14437 s2 := o3.Args[1] 14438 if s2.Op != OpS390XSLDconst { 14439 break 14440 } 14441 if s2.AuxInt != 24 { 14442 break 14443 } 14444 x3 := s2.Args[0] 14445 if x3.Op != OpS390XMOVBZloadidx { 14446 break 14447 } 14448 if x3.AuxInt != i+3 { 14449 break 14450 } 14451 if x3.Aux != s { 14452 break 14453 } 14454 if p != x3.Args[0] { 14455 break 14456 } 14457 if idx != x3.Args[1] { 14458 break 14459 } 14460 if mem != x3.Args[2] { 14461 break 14462 } 14463 s3 := o2.Args[1] 14464 if s3.Op != OpS390XSLDconst { 14465 break 14466 } 14467 if s3.AuxInt != 32 { 14468 break 14469 } 14470 x4 := s3.Args[0] 14471 if x4.Op != OpS390XMOVBZloadidx { 14472 break 14473 } 14474 if x4.AuxInt != i+4 { 14475 break 14476 } 14477 if x4.Aux != s { 14478 break 14479 } 14480 if p != x4.Args[0] { 14481 break 14482 } 14483 if idx != x4.Args[1] { 14484 break 14485 } 14486 if mem != x4.Args[2] { 14487 break 14488 } 14489 s4 := o1.Args[1] 14490 if s4.Op != OpS390XSLDconst { 14491 break 14492 } 14493 if s4.AuxInt != 40 { 14494 break 14495 } 14496 x5 := s4.Args[0] 14497 if x5.Op != OpS390XMOVBZloadidx { 14498 break 14499 } 14500 if x5.AuxInt != i+5 { 14501 break 14502 } 14503 if x5.Aux != s { 14504 break 14505 } 14506 if p != x5.Args[0] { 14507 break 14508 } 14509 if idx != x5.Args[1] { 14510 break 14511 } 14512 if mem != x5.Args[2] { 14513 break 14514 } 14515 s5 := o0.Args[1] 14516 if s5.Op != OpS390XSLDconst { 14517 break 14518 } 14519 if s5.AuxInt != 48 { 14520 break 14521 } 14522 x6 := s5.Args[0] 14523 if x6.Op != OpS390XMOVBZloadidx { 14524 break 14525 } 14526 if x6.AuxInt != i+6 { 14527 break 14528 } 14529 if x6.Aux != s { 14530 break 14531 } 14532 if p != x6.Args[0] { 14533 break 14534 } 14535 if idx != x6.Args[1] { 14536 break 14537 } 14538 if mem != x6.Args[2] { 14539 break 14540 } 14541 s6 := v.Args[1] 14542 if s6.Op != OpS390XSLDconst { 14543 break 14544 } 14545 if s6.AuxInt != 56 { 14546 break 14547 } 14548 x7 := s6.Args[0] 14549 if x7.Op != OpS390XMOVBZloadidx { 14550 break 14551 } 14552 if x7.AuxInt != i+7 { 14553 break 14554 } 14555 if x7.Aux != s { 14556 break 14557 } 14558 if p != x7.Args[0] { 14559 break 14560 } 14561 if idx != x7.Args[1] { 14562 break 14563 } 14564 if mem != x7.Args[2] { 14565 break 14566 } 14567 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14568 break 14569 } 14570 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14571 v0 := b.NewValue0(v.Line, OpS390XMOVDBRloadidx, v.Type) 14572 v.reset(OpCopy) 14573 v.AddArg(v0) 14574 v0.AuxInt = i 14575 v0.Aux = s 14576 v0.AddArg(p) 14577 v0.AddArg(idx) 14578 v0.AddArg(mem) 14579 return true 14580 } 14581 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 14582 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14583 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 14584 for { 14585 o0 := v.Args[0] 14586 if o0.Op != OpS390XOR { 14587 break 14588 } 14589 o1 := o0.Args[0] 14590 if o1.Op != OpS390XOR { 14591 break 14592 } 14593 o2 := o1.Args[0] 14594 if o2.Op != OpS390XOR { 14595 break 14596 } 14597 o3 := o2.Args[0] 14598 if o3.Op != OpS390XOR { 14599 break 14600 } 14601 o4 := o3.Args[0] 14602 if o4.Op != OpS390XOR { 14603 break 14604 } 14605 o5 := o4.Args[0] 14606 if o5.Op != OpS390XOR { 14607 break 14608 } 14609 x0 := o5.Args[0] 14610 if x0.Op != OpS390XMOVBZload { 14611 break 14612 } 14613 i := x0.AuxInt 14614 s := x0.Aux 14615 p := x0.Args[0] 14616 mem := x0.Args[1] 14617 s0 := o5.Args[1] 14618 if s0.Op != OpS390XSLDconst { 14619 break 14620 } 14621 if s0.AuxInt != 8 { 14622 break 14623 } 14624 x1 := s0.Args[0] 14625 if x1.Op != OpS390XMOVBZload { 14626 break 14627 } 14628 if x1.AuxInt != i-1 { 14629 break 14630 } 14631 if x1.Aux != s { 14632 break 14633 } 14634 if p != x1.Args[0] { 14635 break 14636 } 14637 if mem != x1.Args[1] { 14638 break 14639 } 14640 s1 := o4.Args[1] 14641 if s1.Op != OpS390XSLDconst { 14642 break 14643 } 14644 if s1.AuxInt != 16 { 14645 break 14646 } 14647 x2 := s1.Args[0] 14648 if x2.Op != OpS390XMOVBZload { 14649 break 14650 } 14651 if x2.AuxInt != i-2 { 14652 break 14653 } 14654 if x2.Aux != s { 14655 break 14656 } 14657 if p != x2.Args[0] { 14658 break 14659 } 14660 if mem != x2.Args[1] { 14661 break 14662 } 14663 s2 := o3.Args[1] 14664 if s2.Op != OpS390XSLDconst { 14665 break 14666 } 14667 if s2.AuxInt != 24 { 14668 break 14669 } 14670 x3 := s2.Args[0] 14671 if x3.Op != OpS390XMOVBZload { 14672 break 14673 } 14674 if x3.AuxInt != i-3 { 14675 break 14676 } 14677 if x3.Aux != s { 14678 break 14679 } 14680 if p != x3.Args[0] { 14681 break 14682 } 14683 if mem != x3.Args[1] { 14684 break 14685 } 14686 s3 := o2.Args[1] 14687 if s3.Op != OpS390XSLDconst { 14688 break 14689 } 14690 if s3.AuxInt != 32 { 14691 break 14692 } 14693 x4 := s3.Args[0] 14694 if x4.Op != OpS390XMOVBZload { 14695 break 14696 } 14697 if x4.AuxInt != i-4 { 14698 break 14699 } 14700 if x4.Aux != s { 14701 break 14702 } 14703 if p != x4.Args[0] { 14704 break 14705 } 14706 if mem != x4.Args[1] { 14707 break 14708 } 14709 s4 := o1.Args[1] 14710 if s4.Op != OpS390XSLDconst { 14711 break 14712 } 14713 if s4.AuxInt != 40 { 14714 break 14715 } 14716 x5 := s4.Args[0] 14717 if x5.Op != OpS390XMOVBZload { 14718 break 14719 } 14720 if x5.AuxInt != i-5 { 14721 break 14722 } 14723 if x5.Aux != s { 14724 break 14725 } 14726 if p != x5.Args[0] { 14727 break 14728 } 14729 if mem != x5.Args[1] { 14730 break 14731 } 14732 s5 := o0.Args[1] 14733 if s5.Op != OpS390XSLDconst { 14734 break 14735 } 14736 if s5.AuxInt != 48 { 14737 break 14738 } 14739 x6 := s5.Args[0] 14740 if x6.Op != OpS390XMOVBZload { 14741 break 14742 } 14743 if x6.AuxInt != i-6 { 14744 break 14745 } 14746 if x6.Aux != s { 14747 break 14748 } 14749 if p != x6.Args[0] { 14750 break 14751 } 14752 if mem != x6.Args[1] { 14753 break 14754 } 14755 s6 := v.Args[1] 14756 if s6.Op != OpS390XSLDconst { 14757 break 14758 } 14759 if s6.AuxInt != 56 { 14760 break 14761 } 14762 x7 := s6.Args[0] 14763 if x7.Op != OpS390XMOVBZload { 14764 break 14765 } 14766 if x7.AuxInt != i-7 { 14767 break 14768 } 14769 if x7.Aux != s { 14770 break 14771 } 14772 if p != x7.Args[0] { 14773 break 14774 } 14775 if mem != x7.Args[1] { 14776 break 14777 } 14778 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14779 break 14780 } 14781 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14782 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 14783 v.reset(OpCopy) 14784 v.AddArg(v0) 14785 v0.AuxInt = i - 7 14786 v0.Aux = s 14787 v0.AddArg(p) 14788 v0.AddArg(mem) 14789 return true 14790 } 14791 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 14792 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14793 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 14794 for { 14795 o0 := v.Args[0] 14796 if o0.Op != OpS390XOR { 14797 break 14798 } 14799 o1 := o0.Args[0] 14800 if o1.Op != OpS390XOR { 14801 break 14802 } 14803 o2 := o1.Args[0] 14804 if o2.Op != OpS390XOR { 14805 break 14806 } 14807 o3 := o2.Args[0] 14808 if o3.Op != OpS390XOR { 14809 break 14810 } 14811 o4 := o3.Args[0] 14812 if o4.Op != OpS390XOR { 14813 break 14814 } 14815 o5 := o4.Args[0] 14816 if o5.Op != OpS390XOR { 14817 break 14818 } 14819 x0 := o5.Args[0] 14820 if x0.Op != OpS390XMOVBZloadidx { 14821 break 14822 } 14823 i := x0.AuxInt 14824 s := x0.Aux 14825 p := x0.Args[0] 14826 idx := x0.Args[1] 14827 mem := x0.Args[2] 14828 s0 := o5.Args[1] 14829 if s0.Op != OpS390XSLDconst { 14830 break 14831 } 14832 if s0.AuxInt != 8 { 14833 break 14834 } 14835 x1 := s0.Args[0] 14836 if x1.Op != OpS390XMOVBZloadidx { 14837 break 14838 } 14839 if x1.AuxInt != i-1 { 14840 break 14841 } 14842 if x1.Aux != s { 14843 break 14844 } 14845 if p != x1.Args[0] { 14846 break 14847 } 14848 if idx != x1.Args[1] { 14849 break 14850 } 14851 if mem != x1.Args[2] { 14852 break 14853 } 14854 s1 := o4.Args[1] 14855 if s1.Op != OpS390XSLDconst { 14856 break 14857 } 14858 if s1.AuxInt != 16 { 14859 break 14860 } 14861 x2 := s1.Args[0] 14862 if x2.Op != OpS390XMOVBZloadidx { 14863 break 14864 } 14865 if x2.AuxInt != i-2 { 14866 break 14867 } 14868 if x2.Aux != s { 14869 break 14870 } 14871 if p != x2.Args[0] { 14872 break 14873 } 14874 if idx != x2.Args[1] { 14875 break 14876 } 14877 if mem != x2.Args[2] { 14878 break 14879 } 14880 s2 := o3.Args[1] 14881 if s2.Op != OpS390XSLDconst { 14882 break 14883 } 14884 if s2.AuxInt != 24 { 14885 break 14886 } 14887 x3 := s2.Args[0] 14888 if x3.Op != OpS390XMOVBZloadidx { 14889 break 14890 } 14891 if x3.AuxInt != i-3 { 14892 break 14893 } 14894 if x3.Aux != s { 14895 break 14896 } 14897 if p != x3.Args[0] { 14898 break 14899 } 14900 if idx != x3.Args[1] { 14901 break 14902 } 14903 if mem != x3.Args[2] { 14904 break 14905 } 14906 s3 := o2.Args[1] 14907 if s3.Op != OpS390XSLDconst { 14908 break 14909 } 14910 if s3.AuxInt != 32 { 14911 break 14912 } 14913 x4 := s3.Args[0] 14914 if x4.Op != OpS390XMOVBZloadidx { 14915 break 14916 } 14917 if x4.AuxInt != i-4 { 14918 break 14919 } 14920 if x4.Aux != s { 14921 break 14922 } 14923 if p != x4.Args[0] { 14924 break 14925 } 14926 if idx != x4.Args[1] { 14927 break 14928 } 14929 if mem != x4.Args[2] { 14930 break 14931 } 14932 s4 := o1.Args[1] 14933 if s4.Op != OpS390XSLDconst { 14934 break 14935 } 14936 if s4.AuxInt != 40 { 14937 break 14938 } 14939 x5 := s4.Args[0] 14940 if x5.Op != OpS390XMOVBZloadidx { 14941 break 14942 } 14943 if x5.AuxInt != i-5 { 14944 break 14945 } 14946 if x5.Aux != s { 14947 break 14948 } 14949 if p != x5.Args[0] { 14950 break 14951 } 14952 if idx != x5.Args[1] { 14953 break 14954 } 14955 if mem != x5.Args[2] { 14956 break 14957 } 14958 s5 := o0.Args[1] 14959 if s5.Op != OpS390XSLDconst { 14960 break 14961 } 14962 if s5.AuxInt != 48 { 14963 break 14964 } 14965 x6 := s5.Args[0] 14966 if x6.Op != OpS390XMOVBZloadidx { 14967 break 14968 } 14969 if x6.AuxInt != i-6 { 14970 break 14971 } 14972 if x6.Aux != s { 14973 break 14974 } 14975 if p != x6.Args[0] { 14976 break 14977 } 14978 if idx != x6.Args[1] { 14979 break 14980 } 14981 if mem != x6.Args[2] { 14982 break 14983 } 14984 s6 := v.Args[1] 14985 if s6.Op != OpS390XSLDconst { 14986 break 14987 } 14988 if s6.AuxInt != 56 { 14989 break 14990 } 14991 x7 := s6.Args[0] 14992 if x7.Op != OpS390XMOVBZloadidx { 14993 break 14994 } 14995 if x7.AuxInt != i-7 { 14996 break 14997 } 14998 if x7.Aux != s { 14999 break 15000 } 15001 if p != x7.Args[0] { 15002 break 15003 } 15004 if idx != x7.Args[1] { 15005 break 15006 } 15007 if mem != x7.Args[2] { 15008 break 15009 } 15010 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15011 break 15012 } 15013 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15014 v0 := b.NewValue0(v.Line, OpS390XMOVDloadidx, v.Type) 15015 v.reset(OpCopy) 15016 v.AddArg(v0) 15017 v0.AuxInt = i - 7 15018 v0.Aux = s 15019 v0.AddArg(p) 15020 v0.AddArg(idx) 15021 v0.AddArg(mem) 15022 return true 15023 } 15024 return false 15025 } 15026 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15027 b := v.Block 15028 _ = b 15029 // match: (ORW x (MOVDconst [c])) 15030 // cond: 15031 // result: (ORWconst [c] x) 15032 for { 15033 x := v.Args[0] 15034 v_1 := v.Args[1] 15035 if v_1.Op != OpS390XMOVDconst { 15036 break 15037 } 15038 c := v_1.AuxInt 15039 v.reset(OpS390XORWconst) 15040 v.AuxInt = c 15041 v.AddArg(x) 15042 return true 15043 } 15044 // match: (ORW (MOVDconst [c]) x) 15045 // cond: 15046 // result: (ORWconst [c] x) 15047 for { 15048 v_0 := v.Args[0] 15049 if v_0.Op != OpS390XMOVDconst { 15050 break 15051 } 15052 c := v_0.AuxInt 15053 x := v.Args[1] 15054 v.reset(OpS390XORWconst) 15055 v.AuxInt = c 15056 v.AddArg(x) 15057 return true 15058 } 15059 // match: (ORW x x) 15060 // cond: 15061 // result: x 15062 for { 15063 x := v.Args[0] 15064 if x != v.Args[1] { 15065 break 15066 } 15067 v.reset(OpCopy) 15068 v.Type = x.Type 15069 v.AddArg(x) 15070 return true 15071 } 15072 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15073 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15074 // result: (ORWload <t> [off] {sym} x ptr mem) 15075 for { 15076 t := v.Type 15077 x := v.Args[0] 15078 g := v.Args[1] 15079 if g.Op != OpS390XMOVWload { 15080 break 15081 } 15082 off := g.AuxInt 15083 sym := g.Aux 15084 ptr := g.Args[0] 15085 mem := g.Args[1] 15086 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15087 break 15088 } 15089 v.reset(OpS390XORWload) 15090 v.Type = t 15091 v.AuxInt = off 15092 v.Aux = sym 15093 v.AddArg(x) 15094 v.AddArg(ptr) 15095 v.AddArg(mem) 15096 return true 15097 } 15098 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15099 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15100 // result: (ORWload <t> [off] {sym} x ptr mem) 15101 for { 15102 t := v.Type 15103 g := v.Args[0] 15104 if g.Op != OpS390XMOVWload { 15105 break 15106 } 15107 off := g.AuxInt 15108 sym := g.Aux 15109 ptr := g.Args[0] 15110 mem := g.Args[1] 15111 x := v.Args[1] 15112 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15113 break 15114 } 15115 v.reset(OpS390XORWload) 15116 v.Type = t 15117 v.AuxInt = off 15118 v.Aux = sym 15119 v.AddArg(x) 15120 v.AddArg(ptr) 15121 v.AddArg(mem) 15122 return true 15123 } 15124 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15125 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15126 // result: (ORWload <t> [off] {sym} x ptr mem) 15127 for { 15128 t := v.Type 15129 x := v.Args[0] 15130 g := v.Args[1] 15131 if g.Op != OpS390XMOVWZload { 15132 break 15133 } 15134 off := g.AuxInt 15135 sym := g.Aux 15136 ptr := g.Args[0] 15137 mem := g.Args[1] 15138 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15139 break 15140 } 15141 v.reset(OpS390XORWload) 15142 v.Type = t 15143 v.AuxInt = off 15144 v.Aux = sym 15145 v.AddArg(x) 15146 v.AddArg(ptr) 15147 v.AddArg(mem) 15148 return true 15149 } 15150 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15151 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15152 // result: (ORWload <t> [off] {sym} x ptr mem) 15153 for { 15154 t := v.Type 15155 g := v.Args[0] 15156 if g.Op != OpS390XMOVWZload { 15157 break 15158 } 15159 off := g.AuxInt 15160 sym := g.Aux 15161 ptr := g.Args[0] 15162 mem := g.Args[1] 15163 x := v.Args[1] 15164 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15165 break 15166 } 15167 v.reset(OpS390XORWload) 15168 v.Type = t 15169 v.AuxInt = off 15170 v.Aux = sym 15171 v.AddArg(x) 15172 v.AddArg(ptr) 15173 v.AddArg(mem) 15174 return true 15175 } 15176 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 15177 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15178 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 15179 for { 15180 x0 := v.Args[0] 15181 if x0.Op != OpS390XMOVBZload { 15182 break 15183 } 15184 i := x0.AuxInt 15185 s := x0.Aux 15186 p := x0.Args[0] 15187 mem := x0.Args[1] 15188 s0 := v.Args[1] 15189 if s0.Op != OpS390XSLWconst { 15190 break 15191 } 15192 if s0.AuxInt != 8 { 15193 break 15194 } 15195 x1 := s0.Args[0] 15196 if x1.Op != OpS390XMOVBZload { 15197 break 15198 } 15199 if x1.AuxInt != i+1 { 15200 break 15201 } 15202 if x1.Aux != s { 15203 break 15204 } 15205 if p != x1.Args[0] { 15206 break 15207 } 15208 if mem != x1.Args[1] { 15209 break 15210 } 15211 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15212 break 15213 } 15214 b = mergePoint(b, x0, x1) 15215 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15216 v.reset(OpCopy) 15217 v.AddArg(v0) 15218 v1 := b.NewValue0(v.Line, OpS390XMOVHBRload, config.fe.TypeUInt16()) 15219 v1.AuxInt = i 15220 v1.Aux = s 15221 v1.AddArg(p) 15222 v1.AddArg(mem) 15223 v0.AddArg(v1) 15224 return true 15225 } 15226 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 15227 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15228 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 15229 for { 15230 o0 := v.Args[0] 15231 if o0.Op != OpS390XORW { 15232 break 15233 } 15234 z0 := o0.Args[0] 15235 if z0.Op != OpS390XMOVHZreg { 15236 break 15237 } 15238 x0 := z0.Args[0] 15239 if x0.Op != OpS390XMOVHBRload { 15240 break 15241 } 15242 i := x0.AuxInt 15243 s := x0.Aux 15244 p := x0.Args[0] 15245 mem := x0.Args[1] 15246 s0 := o0.Args[1] 15247 if s0.Op != OpS390XSLWconst { 15248 break 15249 } 15250 if s0.AuxInt != 16 { 15251 break 15252 } 15253 x1 := s0.Args[0] 15254 if x1.Op != OpS390XMOVBZload { 15255 break 15256 } 15257 if x1.AuxInt != i+2 { 15258 break 15259 } 15260 if x1.Aux != s { 15261 break 15262 } 15263 if p != x1.Args[0] { 15264 break 15265 } 15266 if mem != x1.Args[1] { 15267 break 15268 } 15269 s1 := v.Args[1] 15270 if s1.Op != OpS390XSLWconst { 15271 break 15272 } 15273 if s1.AuxInt != 24 { 15274 break 15275 } 15276 x2 := s1.Args[0] 15277 if x2.Op != OpS390XMOVBZload { 15278 break 15279 } 15280 if x2.AuxInt != i+3 { 15281 break 15282 } 15283 if x2.Aux != s { 15284 break 15285 } 15286 if p != x2.Args[0] { 15287 break 15288 } 15289 if mem != x2.Args[1] { 15290 break 15291 } 15292 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15293 break 15294 } 15295 b = mergePoint(b, x0, x1, x2) 15296 v0 := b.NewValue0(v.Line, OpS390XMOVWBRload, config.fe.TypeUInt32()) 15297 v.reset(OpCopy) 15298 v.AddArg(v0) 15299 v0.AuxInt = i 15300 v0.Aux = s 15301 v0.AddArg(p) 15302 v0.AddArg(mem) 15303 return true 15304 } 15305 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 15306 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15307 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 15308 for { 15309 x0 := v.Args[0] 15310 if x0.Op != OpS390XMOVBZloadidx { 15311 break 15312 } 15313 i := x0.AuxInt 15314 s := x0.Aux 15315 p := x0.Args[0] 15316 idx := x0.Args[1] 15317 mem := x0.Args[2] 15318 s0 := v.Args[1] 15319 if s0.Op != OpS390XSLWconst { 15320 break 15321 } 15322 if s0.AuxInt != 8 { 15323 break 15324 } 15325 x1 := s0.Args[0] 15326 if x1.Op != OpS390XMOVBZloadidx { 15327 break 15328 } 15329 if x1.AuxInt != i+1 { 15330 break 15331 } 15332 if x1.Aux != s { 15333 break 15334 } 15335 if p != x1.Args[0] { 15336 break 15337 } 15338 if idx != x1.Args[1] { 15339 break 15340 } 15341 if mem != x1.Args[2] { 15342 break 15343 } 15344 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15345 break 15346 } 15347 b = mergePoint(b, x0, x1) 15348 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15349 v.reset(OpCopy) 15350 v.AddArg(v0) 15351 v1 := b.NewValue0(v.Line, OpS390XMOVHBRloadidx, v.Type) 15352 v1.AuxInt = i 15353 v1.Aux = s 15354 v1.AddArg(p) 15355 v1.AddArg(idx) 15356 v1.AddArg(mem) 15357 v0.AddArg(v1) 15358 return true 15359 } 15360 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 15361 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15362 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 15363 for { 15364 o0 := v.Args[0] 15365 if o0.Op != OpS390XORW { 15366 break 15367 } 15368 z0 := o0.Args[0] 15369 if z0.Op != OpS390XMOVHZreg { 15370 break 15371 } 15372 x0 := z0.Args[0] 15373 if x0.Op != OpS390XMOVHBRloadidx { 15374 break 15375 } 15376 i := x0.AuxInt 15377 s := x0.Aux 15378 p := x0.Args[0] 15379 idx := x0.Args[1] 15380 mem := x0.Args[2] 15381 s0 := o0.Args[1] 15382 if s0.Op != OpS390XSLWconst { 15383 break 15384 } 15385 if s0.AuxInt != 16 { 15386 break 15387 } 15388 x1 := s0.Args[0] 15389 if x1.Op != OpS390XMOVBZloadidx { 15390 break 15391 } 15392 if x1.AuxInt != i+2 { 15393 break 15394 } 15395 if x1.Aux != s { 15396 break 15397 } 15398 if p != x1.Args[0] { 15399 break 15400 } 15401 if idx != x1.Args[1] { 15402 break 15403 } 15404 if mem != x1.Args[2] { 15405 break 15406 } 15407 s1 := v.Args[1] 15408 if s1.Op != OpS390XSLWconst { 15409 break 15410 } 15411 if s1.AuxInt != 24 { 15412 break 15413 } 15414 x2 := s1.Args[0] 15415 if x2.Op != OpS390XMOVBZloadidx { 15416 break 15417 } 15418 if x2.AuxInt != i+3 { 15419 break 15420 } 15421 if x2.Aux != s { 15422 break 15423 } 15424 if p != x2.Args[0] { 15425 break 15426 } 15427 if idx != x2.Args[1] { 15428 break 15429 } 15430 if mem != x2.Args[2] { 15431 break 15432 } 15433 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15434 break 15435 } 15436 b = mergePoint(b, x0, x1, x2) 15437 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 15438 v.reset(OpCopy) 15439 v.AddArg(v0) 15440 v1 := b.NewValue0(v.Line, OpS390XMOVWBRloadidx, v.Type) 15441 v1.AuxInt = i 15442 v1.Aux = s 15443 v1.AddArg(p) 15444 v1.AddArg(idx) 15445 v1.AddArg(mem) 15446 v0.AddArg(v1) 15447 return true 15448 } 15449 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 15450 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15451 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 15452 for { 15453 x0 := v.Args[0] 15454 if x0.Op != OpS390XMOVBZload { 15455 break 15456 } 15457 i := x0.AuxInt 15458 s := x0.Aux 15459 p := x0.Args[0] 15460 mem := x0.Args[1] 15461 s0 := v.Args[1] 15462 if s0.Op != OpS390XSLWconst { 15463 break 15464 } 15465 if s0.AuxInt != 8 { 15466 break 15467 } 15468 x1 := s0.Args[0] 15469 if x1.Op != OpS390XMOVBZload { 15470 break 15471 } 15472 if x1.AuxInt != i-1 { 15473 break 15474 } 15475 if x1.Aux != s { 15476 break 15477 } 15478 if p != x1.Args[0] { 15479 break 15480 } 15481 if mem != x1.Args[1] { 15482 break 15483 } 15484 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15485 break 15486 } 15487 b = mergePoint(b, x0, x1) 15488 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 15489 v.reset(OpCopy) 15490 v.AddArg(v0) 15491 v0.AuxInt = i - 1 15492 v0.Aux = s 15493 v0.AddArg(p) 15494 v0.AddArg(mem) 15495 return true 15496 } 15497 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 15498 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15499 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 15500 for { 15501 o0 := v.Args[0] 15502 if o0.Op != OpS390XORW { 15503 break 15504 } 15505 x0 := o0.Args[0] 15506 if x0.Op != OpS390XMOVHZload { 15507 break 15508 } 15509 i := x0.AuxInt 15510 s := x0.Aux 15511 p := x0.Args[0] 15512 mem := x0.Args[1] 15513 s0 := o0.Args[1] 15514 if s0.Op != OpS390XSLWconst { 15515 break 15516 } 15517 if s0.AuxInt != 16 { 15518 break 15519 } 15520 x1 := s0.Args[0] 15521 if x1.Op != OpS390XMOVBZload { 15522 break 15523 } 15524 if x1.AuxInt != i-1 { 15525 break 15526 } 15527 if x1.Aux != s { 15528 break 15529 } 15530 if p != x1.Args[0] { 15531 break 15532 } 15533 if mem != x1.Args[1] { 15534 break 15535 } 15536 s1 := v.Args[1] 15537 if s1.Op != OpS390XSLWconst { 15538 break 15539 } 15540 if s1.AuxInt != 24 { 15541 break 15542 } 15543 x2 := s1.Args[0] 15544 if x2.Op != OpS390XMOVBZload { 15545 break 15546 } 15547 if x2.AuxInt != i-2 { 15548 break 15549 } 15550 if x2.Aux != s { 15551 break 15552 } 15553 if p != x2.Args[0] { 15554 break 15555 } 15556 if mem != x2.Args[1] { 15557 break 15558 } 15559 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15560 break 15561 } 15562 b = mergePoint(b, x0, x1, x2) 15563 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 15564 v.reset(OpCopy) 15565 v.AddArg(v0) 15566 v0.AuxInt = i - 2 15567 v0.Aux = s 15568 v0.AddArg(p) 15569 v0.AddArg(mem) 15570 return true 15571 } 15572 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 15573 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15574 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 15575 for { 15576 x0 := v.Args[0] 15577 if x0.Op != OpS390XMOVBZloadidx { 15578 break 15579 } 15580 i := x0.AuxInt 15581 s := x0.Aux 15582 p := x0.Args[0] 15583 idx := x0.Args[1] 15584 mem := x0.Args[2] 15585 s0 := v.Args[1] 15586 if s0.Op != OpS390XSLWconst { 15587 break 15588 } 15589 if s0.AuxInt != 8 { 15590 break 15591 } 15592 x1 := s0.Args[0] 15593 if x1.Op != OpS390XMOVBZloadidx { 15594 break 15595 } 15596 if x1.AuxInt != i-1 { 15597 break 15598 } 15599 if x1.Aux != s { 15600 break 15601 } 15602 if p != x1.Args[0] { 15603 break 15604 } 15605 if idx != x1.Args[1] { 15606 break 15607 } 15608 if mem != x1.Args[2] { 15609 break 15610 } 15611 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15612 break 15613 } 15614 b = mergePoint(b, x0, x1) 15615 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 15616 v.reset(OpCopy) 15617 v.AddArg(v0) 15618 v0.AuxInt = i - 1 15619 v0.Aux = s 15620 v0.AddArg(p) 15621 v0.AddArg(idx) 15622 v0.AddArg(mem) 15623 return true 15624 } 15625 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 15626 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15627 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 15628 for { 15629 o0 := v.Args[0] 15630 if o0.Op != OpS390XORW { 15631 break 15632 } 15633 x0 := o0.Args[0] 15634 if x0.Op != OpS390XMOVHZloadidx { 15635 break 15636 } 15637 i := x0.AuxInt 15638 s := x0.Aux 15639 p := x0.Args[0] 15640 idx := x0.Args[1] 15641 mem := x0.Args[2] 15642 s0 := o0.Args[1] 15643 if s0.Op != OpS390XSLWconst { 15644 break 15645 } 15646 if s0.AuxInt != 16 { 15647 break 15648 } 15649 x1 := s0.Args[0] 15650 if x1.Op != OpS390XMOVBZloadidx { 15651 break 15652 } 15653 if x1.AuxInt != i-1 { 15654 break 15655 } 15656 if x1.Aux != s { 15657 break 15658 } 15659 if p != x1.Args[0] { 15660 break 15661 } 15662 if idx != x1.Args[1] { 15663 break 15664 } 15665 if mem != x1.Args[2] { 15666 break 15667 } 15668 s1 := v.Args[1] 15669 if s1.Op != OpS390XSLWconst { 15670 break 15671 } 15672 if s1.AuxInt != 24 { 15673 break 15674 } 15675 x2 := s1.Args[0] 15676 if x2.Op != OpS390XMOVBZloadidx { 15677 break 15678 } 15679 if x2.AuxInt != i-2 { 15680 break 15681 } 15682 if x2.Aux != s { 15683 break 15684 } 15685 if p != x2.Args[0] { 15686 break 15687 } 15688 if idx != x2.Args[1] { 15689 break 15690 } 15691 if mem != x2.Args[2] { 15692 break 15693 } 15694 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15695 break 15696 } 15697 b = mergePoint(b, x0, x1, x2) 15698 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 15699 v.reset(OpCopy) 15700 v.AddArg(v0) 15701 v0.AuxInt = i - 2 15702 v0.Aux = s 15703 v0.AddArg(p) 15704 v0.AddArg(idx) 15705 v0.AddArg(mem) 15706 return true 15707 } 15708 return false 15709 } 15710 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 15711 b := v.Block 15712 _ = b 15713 // match: (ORWconst [c] x) 15714 // cond: int32(c)==0 15715 // result: x 15716 for { 15717 c := v.AuxInt 15718 x := v.Args[0] 15719 if !(int32(c) == 0) { 15720 break 15721 } 15722 v.reset(OpCopy) 15723 v.Type = x.Type 15724 v.AddArg(x) 15725 return true 15726 } 15727 // match: (ORWconst [c] _) 15728 // cond: int32(c)==-1 15729 // result: (MOVDconst [-1]) 15730 for { 15731 c := v.AuxInt 15732 if !(int32(c) == -1) { 15733 break 15734 } 15735 v.reset(OpS390XMOVDconst) 15736 v.AuxInt = -1 15737 return true 15738 } 15739 // match: (ORWconst [c] (MOVDconst [d])) 15740 // cond: 15741 // result: (MOVDconst [c|d]) 15742 for { 15743 c := v.AuxInt 15744 v_0 := v.Args[0] 15745 if v_0.Op != OpS390XMOVDconst { 15746 break 15747 } 15748 d := v_0.AuxInt 15749 v.reset(OpS390XMOVDconst) 15750 v.AuxInt = c | d 15751 return true 15752 } 15753 return false 15754 } 15755 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 15756 b := v.Block 15757 _ = b 15758 // match: (ORconst [0] x) 15759 // cond: 15760 // result: x 15761 for { 15762 if v.AuxInt != 0 { 15763 break 15764 } 15765 x := v.Args[0] 15766 v.reset(OpCopy) 15767 v.Type = x.Type 15768 v.AddArg(x) 15769 return true 15770 } 15771 // match: (ORconst [-1] _) 15772 // cond: 15773 // result: (MOVDconst [-1]) 15774 for { 15775 if v.AuxInt != -1 { 15776 break 15777 } 15778 v.reset(OpS390XMOVDconst) 15779 v.AuxInt = -1 15780 return true 15781 } 15782 // match: (ORconst [c] (MOVDconst [d])) 15783 // cond: 15784 // result: (MOVDconst [c|d]) 15785 for { 15786 c := v.AuxInt 15787 v_0 := v.Args[0] 15788 if v_0.Op != OpS390XMOVDconst { 15789 break 15790 } 15791 d := v_0.AuxInt 15792 v.reset(OpS390XMOVDconst) 15793 v.AuxInt = c | d 15794 return true 15795 } 15796 return false 15797 } 15798 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 15799 b := v.Block 15800 _ = b 15801 // match: (SLD x (MOVDconst [c])) 15802 // cond: 15803 // result: (SLDconst [c&63] x) 15804 for { 15805 x := v.Args[0] 15806 v_1 := v.Args[1] 15807 if v_1.Op != OpS390XMOVDconst { 15808 break 15809 } 15810 c := v_1.AuxInt 15811 v.reset(OpS390XSLDconst) 15812 v.AuxInt = c & 63 15813 v.AddArg(x) 15814 return true 15815 } 15816 // match: (SLD x (ANDconst [63] y)) 15817 // cond: 15818 // result: (SLD x y) 15819 for { 15820 x := v.Args[0] 15821 v_1 := v.Args[1] 15822 if v_1.Op != OpS390XANDconst { 15823 break 15824 } 15825 if v_1.AuxInt != 63 { 15826 break 15827 } 15828 y := v_1.Args[0] 15829 v.reset(OpS390XSLD) 15830 v.AddArg(x) 15831 v.AddArg(y) 15832 return true 15833 } 15834 return false 15835 } 15836 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 15837 b := v.Block 15838 _ = b 15839 // match: (SLW x (MOVDconst [c])) 15840 // cond: 15841 // result: (SLWconst [c&63] x) 15842 for { 15843 x := v.Args[0] 15844 v_1 := v.Args[1] 15845 if v_1.Op != OpS390XMOVDconst { 15846 break 15847 } 15848 c := v_1.AuxInt 15849 v.reset(OpS390XSLWconst) 15850 v.AuxInt = c & 63 15851 v.AddArg(x) 15852 return true 15853 } 15854 // match: (SLW x (ANDWconst [63] y)) 15855 // cond: 15856 // result: (SLW x y) 15857 for { 15858 x := v.Args[0] 15859 v_1 := v.Args[1] 15860 if v_1.Op != OpS390XANDWconst { 15861 break 15862 } 15863 if v_1.AuxInt != 63 { 15864 break 15865 } 15866 y := v_1.Args[0] 15867 v.reset(OpS390XSLW) 15868 v.AddArg(x) 15869 v.AddArg(y) 15870 return true 15871 } 15872 return false 15873 } 15874 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 15875 b := v.Block 15876 _ = b 15877 // match: (SRAD x (MOVDconst [c])) 15878 // cond: 15879 // result: (SRADconst [c&63] x) 15880 for { 15881 x := v.Args[0] 15882 v_1 := v.Args[1] 15883 if v_1.Op != OpS390XMOVDconst { 15884 break 15885 } 15886 c := v_1.AuxInt 15887 v.reset(OpS390XSRADconst) 15888 v.AuxInt = c & 63 15889 v.AddArg(x) 15890 return true 15891 } 15892 // match: (SRAD x (ANDconst [63] y)) 15893 // cond: 15894 // result: (SRAD x y) 15895 for { 15896 x := v.Args[0] 15897 v_1 := v.Args[1] 15898 if v_1.Op != OpS390XANDconst { 15899 break 15900 } 15901 if v_1.AuxInt != 63 { 15902 break 15903 } 15904 y := v_1.Args[0] 15905 v.reset(OpS390XSRAD) 15906 v.AddArg(x) 15907 v.AddArg(y) 15908 return true 15909 } 15910 return false 15911 } 15912 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 15913 b := v.Block 15914 _ = b 15915 // match: (SRADconst [c] (MOVDconst [d])) 15916 // cond: 15917 // result: (MOVDconst [d>>uint64(c)]) 15918 for { 15919 c := v.AuxInt 15920 v_0 := v.Args[0] 15921 if v_0.Op != OpS390XMOVDconst { 15922 break 15923 } 15924 d := v_0.AuxInt 15925 v.reset(OpS390XMOVDconst) 15926 v.AuxInt = d >> uint64(c) 15927 return true 15928 } 15929 return false 15930 } 15931 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 15932 b := v.Block 15933 _ = b 15934 // match: (SRAW x (MOVDconst [c])) 15935 // cond: 15936 // result: (SRAWconst [c&63] x) 15937 for { 15938 x := v.Args[0] 15939 v_1 := v.Args[1] 15940 if v_1.Op != OpS390XMOVDconst { 15941 break 15942 } 15943 c := v_1.AuxInt 15944 v.reset(OpS390XSRAWconst) 15945 v.AuxInt = c & 63 15946 v.AddArg(x) 15947 return true 15948 } 15949 // match: (SRAW x (ANDWconst [63] y)) 15950 // cond: 15951 // result: (SRAW x y) 15952 for { 15953 x := v.Args[0] 15954 v_1 := v.Args[1] 15955 if v_1.Op != OpS390XANDWconst { 15956 break 15957 } 15958 if v_1.AuxInt != 63 { 15959 break 15960 } 15961 y := v_1.Args[0] 15962 v.reset(OpS390XSRAW) 15963 v.AddArg(x) 15964 v.AddArg(y) 15965 return true 15966 } 15967 return false 15968 } 15969 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 15970 b := v.Block 15971 _ = b 15972 // match: (SRAWconst [c] (MOVDconst [d])) 15973 // cond: 15974 // result: (MOVDconst [d>>uint64(c)]) 15975 for { 15976 c := v.AuxInt 15977 v_0 := v.Args[0] 15978 if v_0.Op != OpS390XMOVDconst { 15979 break 15980 } 15981 d := v_0.AuxInt 15982 v.reset(OpS390XMOVDconst) 15983 v.AuxInt = d >> uint64(c) 15984 return true 15985 } 15986 return false 15987 } 15988 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 15989 b := v.Block 15990 _ = b 15991 // match: (SRD x (MOVDconst [c])) 15992 // cond: 15993 // result: (SRDconst [c&63] x) 15994 for { 15995 x := v.Args[0] 15996 v_1 := v.Args[1] 15997 if v_1.Op != OpS390XMOVDconst { 15998 break 15999 } 16000 c := v_1.AuxInt 16001 v.reset(OpS390XSRDconst) 16002 v.AuxInt = c & 63 16003 v.AddArg(x) 16004 return true 16005 } 16006 // match: (SRD x (ANDconst [63] y)) 16007 // cond: 16008 // result: (SRD x y) 16009 for { 16010 x := v.Args[0] 16011 v_1 := v.Args[1] 16012 if v_1.Op != OpS390XANDconst { 16013 break 16014 } 16015 if v_1.AuxInt != 63 { 16016 break 16017 } 16018 y := v_1.Args[0] 16019 v.reset(OpS390XSRD) 16020 v.AddArg(x) 16021 v.AddArg(y) 16022 return true 16023 } 16024 return false 16025 } 16026 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16027 b := v.Block 16028 _ = b 16029 // match: (SRW x (MOVDconst [c])) 16030 // cond: 16031 // result: (SRWconst [c&63] x) 16032 for { 16033 x := v.Args[0] 16034 v_1 := v.Args[1] 16035 if v_1.Op != OpS390XMOVDconst { 16036 break 16037 } 16038 c := v_1.AuxInt 16039 v.reset(OpS390XSRWconst) 16040 v.AuxInt = c & 63 16041 v.AddArg(x) 16042 return true 16043 } 16044 // match: (SRW x (ANDWconst [63] y)) 16045 // cond: 16046 // result: (SRW x y) 16047 for { 16048 x := v.Args[0] 16049 v_1 := v.Args[1] 16050 if v_1.Op != OpS390XANDWconst { 16051 break 16052 } 16053 if v_1.AuxInt != 63 { 16054 break 16055 } 16056 y := v_1.Args[0] 16057 v.reset(OpS390XSRW) 16058 v.AddArg(x) 16059 v.AddArg(y) 16060 return true 16061 } 16062 return false 16063 } 16064 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16065 b := v.Block 16066 _ = b 16067 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16068 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16069 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16070 for { 16071 i := v.AuxInt 16072 s := v.Aux 16073 p := v.Args[0] 16074 w2 := v.Args[1] 16075 w3 := v.Args[2] 16076 x := v.Args[3] 16077 if x.Op != OpS390XSTM2 { 16078 break 16079 } 16080 if x.AuxInt != i-8 { 16081 break 16082 } 16083 if x.Aux != s { 16084 break 16085 } 16086 if p != x.Args[0] { 16087 break 16088 } 16089 w0 := x.Args[1] 16090 w1 := x.Args[2] 16091 mem := x.Args[3] 16092 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16093 break 16094 } 16095 v.reset(OpS390XSTM4) 16096 v.AuxInt = i - 8 16097 v.Aux = s 16098 v.AddArg(p) 16099 v.AddArg(w0) 16100 v.AddArg(w1) 16101 v.AddArg(w2) 16102 v.AddArg(w3) 16103 v.AddArg(mem) 16104 return true 16105 } 16106 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16107 // cond: 16108 // result: (MOVDstore [i] {s} p x mem) 16109 for { 16110 i := v.AuxInt 16111 s := v.Aux 16112 p := v.Args[0] 16113 v_1 := v.Args[1] 16114 if v_1.Op != OpS390XSRDconst { 16115 break 16116 } 16117 if v_1.AuxInt != 32 { 16118 break 16119 } 16120 x := v_1.Args[0] 16121 if x != v.Args[2] { 16122 break 16123 } 16124 mem := v.Args[3] 16125 v.reset(OpS390XMOVDstore) 16126 v.AuxInt = i 16127 v.Aux = s 16128 v.AddArg(p) 16129 v.AddArg(x) 16130 v.AddArg(mem) 16131 return true 16132 } 16133 return false 16134 } 16135 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16136 b := v.Block 16137 _ = b 16138 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 16139 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 16140 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 16141 for { 16142 i := v.AuxInt 16143 s := v.Aux 16144 p := v.Args[0] 16145 w2 := v.Args[1] 16146 w3 := v.Args[2] 16147 x := v.Args[3] 16148 if x.Op != OpS390XSTMG2 { 16149 break 16150 } 16151 if x.AuxInt != i-16 { 16152 break 16153 } 16154 if x.Aux != s { 16155 break 16156 } 16157 if p != x.Args[0] { 16158 break 16159 } 16160 w0 := x.Args[1] 16161 w1 := x.Args[2] 16162 mem := x.Args[3] 16163 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 16164 break 16165 } 16166 v.reset(OpS390XSTMG4) 16167 v.AuxInt = i - 16 16168 v.Aux = s 16169 v.AddArg(p) 16170 v.AddArg(w0) 16171 v.AddArg(w1) 16172 v.AddArg(w2) 16173 v.AddArg(w3) 16174 v.AddArg(mem) 16175 return true 16176 } 16177 return false 16178 } 16179 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 16180 b := v.Block 16181 _ = b 16182 // match: (SUB x (MOVDconst [c])) 16183 // cond: is32Bit(c) 16184 // result: (SUBconst x [c]) 16185 for { 16186 x := v.Args[0] 16187 v_1 := v.Args[1] 16188 if v_1.Op != OpS390XMOVDconst { 16189 break 16190 } 16191 c := v_1.AuxInt 16192 if !(is32Bit(c)) { 16193 break 16194 } 16195 v.reset(OpS390XSUBconst) 16196 v.AuxInt = c 16197 v.AddArg(x) 16198 return true 16199 } 16200 // match: (SUB (MOVDconst [c]) x) 16201 // cond: is32Bit(c) 16202 // result: (NEG (SUBconst <v.Type> x [c])) 16203 for { 16204 v_0 := v.Args[0] 16205 if v_0.Op != OpS390XMOVDconst { 16206 break 16207 } 16208 c := v_0.AuxInt 16209 x := v.Args[1] 16210 if !(is32Bit(c)) { 16211 break 16212 } 16213 v.reset(OpS390XNEG) 16214 v0 := b.NewValue0(v.Line, OpS390XSUBconst, v.Type) 16215 v0.AuxInt = c 16216 v0.AddArg(x) 16217 v.AddArg(v0) 16218 return true 16219 } 16220 // match: (SUB x x) 16221 // cond: 16222 // result: (MOVDconst [0]) 16223 for { 16224 x := v.Args[0] 16225 if x != v.Args[1] { 16226 break 16227 } 16228 v.reset(OpS390XMOVDconst) 16229 v.AuxInt = 0 16230 return true 16231 } 16232 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 16233 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16234 // result: (SUBload <t> [off] {sym} x ptr mem) 16235 for { 16236 t := v.Type 16237 x := v.Args[0] 16238 g := v.Args[1] 16239 if g.Op != OpS390XMOVDload { 16240 break 16241 } 16242 off := g.AuxInt 16243 sym := g.Aux 16244 ptr := g.Args[0] 16245 mem := g.Args[1] 16246 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16247 break 16248 } 16249 v.reset(OpS390XSUBload) 16250 v.Type = t 16251 v.AuxInt = off 16252 v.Aux = sym 16253 v.AddArg(x) 16254 v.AddArg(ptr) 16255 v.AddArg(mem) 16256 return true 16257 } 16258 return false 16259 } 16260 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 16261 b := v.Block 16262 _ = b 16263 // match: (SUBEWcarrymask (FlagEQ)) 16264 // cond: 16265 // result: (MOVDconst [-1]) 16266 for { 16267 v_0 := v.Args[0] 16268 if v_0.Op != OpS390XFlagEQ { 16269 break 16270 } 16271 v.reset(OpS390XMOVDconst) 16272 v.AuxInt = -1 16273 return true 16274 } 16275 // match: (SUBEWcarrymask (FlagLT)) 16276 // cond: 16277 // result: (MOVDconst [-1]) 16278 for { 16279 v_0 := v.Args[0] 16280 if v_0.Op != OpS390XFlagLT { 16281 break 16282 } 16283 v.reset(OpS390XMOVDconst) 16284 v.AuxInt = -1 16285 return true 16286 } 16287 // match: (SUBEWcarrymask (FlagGT)) 16288 // cond: 16289 // result: (MOVDconst [0]) 16290 for { 16291 v_0 := v.Args[0] 16292 if v_0.Op != OpS390XFlagGT { 16293 break 16294 } 16295 v.reset(OpS390XMOVDconst) 16296 v.AuxInt = 0 16297 return true 16298 } 16299 return false 16300 } 16301 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 16302 b := v.Block 16303 _ = b 16304 // match: (SUBEcarrymask (FlagEQ)) 16305 // cond: 16306 // result: (MOVDconst [-1]) 16307 for { 16308 v_0 := v.Args[0] 16309 if v_0.Op != OpS390XFlagEQ { 16310 break 16311 } 16312 v.reset(OpS390XMOVDconst) 16313 v.AuxInt = -1 16314 return true 16315 } 16316 // match: (SUBEcarrymask (FlagLT)) 16317 // cond: 16318 // result: (MOVDconst [-1]) 16319 for { 16320 v_0 := v.Args[0] 16321 if v_0.Op != OpS390XFlagLT { 16322 break 16323 } 16324 v.reset(OpS390XMOVDconst) 16325 v.AuxInt = -1 16326 return true 16327 } 16328 // match: (SUBEcarrymask (FlagGT)) 16329 // cond: 16330 // result: (MOVDconst [0]) 16331 for { 16332 v_0 := v.Args[0] 16333 if v_0.Op != OpS390XFlagGT { 16334 break 16335 } 16336 v.reset(OpS390XMOVDconst) 16337 v.AuxInt = 0 16338 return true 16339 } 16340 return false 16341 } 16342 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 16343 b := v.Block 16344 _ = b 16345 // match: (SUBW x (MOVDconst [c])) 16346 // cond: 16347 // result: (SUBWconst x [c]) 16348 for { 16349 x := v.Args[0] 16350 v_1 := v.Args[1] 16351 if v_1.Op != OpS390XMOVDconst { 16352 break 16353 } 16354 c := v_1.AuxInt 16355 v.reset(OpS390XSUBWconst) 16356 v.AuxInt = c 16357 v.AddArg(x) 16358 return true 16359 } 16360 // match: (SUBW (MOVDconst [c]) x) 16361 // cond: 16362 // result: (NEGW (SUBWconst <v.Type> x [c])) 16363 for { 16364 v_0 := v.Args[0] 16365 if v_0.Op != OpS390XMOVDconst { 16366 break 16367 } 16368 c := v_0.AuxInt 16369 x := v.Args[1] 16370 v.reset(OpS390XNEGW) 16371 v0 := b.NewValue0(v.Line, OpS390XSUBWconst, v.Type) 16372 v0.AuxInt = c 16373 v0.AddArg(x) 16374 v.AddArg(v0) 16375 return true 16376 } 16377 // match: (SUBW x x) 16378 // cond: 16379 // result: (MOVDconst [0]) 16380 for { 16381 x := v.Args[0] 16382 if x != v.Args[1] { 16383 break 16384 } 16385 v.reset(OpS390XMOVDconst) 16386 v.AuxInt = 0 16387 return true 16388 } 16389 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 16390 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16391 // result: (SUBWload <t> [off] {sym} x ptr mem) 16392 for { 16393 t := v.Type 16394 x := v.Args[0] 16395 g := v.Args[1] 16396 if g.Op != OpS390XMOVWload { 16397 break 16398 } 16399 off := g.AuxInt 16400 sym := g.Aux 16401 ptr := g.Args[0] 16402 mem := g.Args[1] 16403 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16404 break 16405 } 16406 v.reset(OpS390XSUBWload) 16407 v.Type = t 16408 v.AuxInt = off 16409 v.Aux = sym 16410 v.AddArg(x) 16411 v.AddArg(ptr) 16412 v.AddArg(mem) 16413 return true 16414 } 16415 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16416 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16417 // result: (SUBWload <t> [off] {sym} x ptr mem) 16418 for { 16419 t := v.Type 16420 x := v.Args[0] 16421 g := v.Args[1] 16422 if g.Op != OpS390XMOVWZload { 16423 break 16424 } 16425 off := g.AuxInt 16426 sym := g.Aux 16427 ptr := g.Args[0] 16428 mem := g.Args[1] 16429 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16430 break 16431 } 16432 v.reset(OpS390XSUBWload) 16433 v.Type = t 16434 v.AuxInt = off 16435 v.Aux = sym 16436 v.AddArg(x) 16437 v.AddArg(ptr) 16438 v.AddArg(mem) 16439 return true 16440 } 16441 return false 16442 } 16443 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 16444 b := v.Block 16445 _ = b 16446 // match: (SUBWconst [c] x) 16447 // cond: int32(c) == 0 16448 // result: x 16449 for { 16450 c := v.AuxInt 16451 x := v.Args[0] 16452 if !(int32(c) == 0) { 16453 break 16454 } 16455 v.reset(OpCopy) 16456 v.Type = x.Type 16457 v.AddArg(x) 16458 return true 16459 } 16460 // match: (SUBWconst [c] x) 16461 // cond: 16462 // result: (ADDWconst [int64(int32(-c))] x) 16463 for { 16464 c := v.AuxInt 16465 x := v.Args[0] 16466 v.reset(OpS390XADDWconst) 16467 v.AuxInt = int64(int32(-c)) 16468 v.AddArg(x) 16469 return true 16470 } 16471 } 16472 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 16473 b := v.Block 16474 _ = b 16475 // match: (SUBconst [0] x) 16476 // cond: 16477 // result: x 16478 for { 16479 if v.AuxInt != 0 { 16480 break 16481 } 16482 x := v.Args[0] 16483 v.reset(OpCopy) 16484 v.Type = x.Type 16485 v.AddArg(x) 16486 return true 16487 } 16488 // match: (SUBconst [c] x) 16489 // cond: c != -(1<<31) 16490 // result: (ADDconst [-c] x) 16491 for { 16492 c := v.AuxInt 16493 x := v.Args[0] 16494 if !(c != -(1 << 31)) { 16495 break 16496 } 16497 v.reset(OpS390XADDconst) 16498 v.AuxInt = -c 16499 v.AddArg(x) 16500 return true 16501 } 16502 // match: (SUBconst (MOVDconst [d]) [c]) 16503 // cond: 16504 // result: (MOVDconst [d-c]) 16505 for { 16506 c := v.AuxInt 16507 v_0 := v.Args[0] 16508 if v_0.Op != OpS390XMOVDconst { 16509 break 16510 } 16511 d := v_0.AuxInt 16512 v.reset(OpS390XMOVDconst) 16513 v.AuxInt = d - c 16514 return true 16515 } 16516 // match: (SUBconst (SUBconst x [d]) [c]) 16517 // cond: is32Bit(-c-d) 16518 // result: (ADDconst [-c-d] x) 16519 for { 16520 c := v.AuxInt 16521 v_0 := v.Args[0] 16522 if v_0.Op != OpS390XSUBconst { 16523 break 16524 } 16525 d := v_0.AuxInt 16526 x := v_0.Args[0] 16527 if !(is32Bit(-c - d)) { 16528 break 16529 } 16530 v.reset(OpS390XADDconst) 16531 v.AuxInt = -c - d 16532 v.AddArg(x) 16533 return true 16534 } 16535 return false 16536 } 16537 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 16538 b := v.Block 16539 _ = b 16540 // match: (XOR x (MOVDconst [c])) 16541 // cond: isU32Bit(c) 16542 // result: (XORconst [c] x) 16543 for { 16544 x := v.Args[0] 16545 v_1 := v.Args[1] 16546 if v_1.Op != OpS390XMOVDconst { 16547 break 16548 } 16549 c := v_1.AuxInt 16550 if !(isU32Bit(c)) { 16551 break 16552 } 16553 v.reset(OpS390XXORconst) 16554 v.AuxInt = c 16555 v.AddArg(x) 16556 return true 16557 } 16558 // match: (XOR (MOVDconst [c]) x) 16559 // cond: isU32Bit(c) 16560 // result: (XORconst [c] x) 16561 for { 16562 v_0 := v.Args[0] 16563 if v_0.Op != OpS390XMOVDconst { 16564 break 16565 } 16566 c := v_0.AuxInt 16567 x := v.Args[1] 16568 if !(isU32Bit(c)) { 16569 break 16570 } 16571 v.reset(OpS390XXORconst) 16572 v.AuxInt = c 16573 v.AddArg(x) 16574 return true 16575 } 16576 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 16577 // cond: 16578 // result: (MOVDconst [c^d]) 16579 for { 16580 v_0 := v.Args[0] 16581 if v_0.Op != OpS390XMOVDconst { 16582 break 16583 } 16584 c := v_0.AuxInt 16585 v_1 := v.Args[1] 16586 if v_1.Op != OpS390XMOVDconst { 16587 break 16588 } 16589 d := v_1.AuxInt 16590 v.reset(OpS390XMOVDconst) 16591 v.AuxInt = c ^ d 16592 return true 16593 } 16594 // match: (XOR x x) 16595 // cond: 16596 // result: (MOVDconst [0]) 16597 for { 16598 x := v.Args[0] 16599 if x != v.Args[1] { 16600 break 16601 } 16602 v.reset(OpS390XMOVDconst) 16603 v.AuxInt = 0 16604 return true 16605 } 16606 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 16607 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16608 // result: (XORload <t> [off] {sym} x ptr mem) 16609 for { 16610 t := v.Type 16611 x := v.Args[0] 16612 g := v.Args[1] 16613 if g.Op != OpS390XMOVDload { 16614 break 16615 } 16616 off := g.AuxInt 16617 sym := g.Aux 16618 ptr := g.Args[0] 16619 mem := g.Args[1] 16620 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16621 break 16622 } 16623 v.reset(OpS390XXORload) 16624 v.Type = t 16625 v.AuxInt = off 16626 v.Aux = sym 16627 v.AddArg(x) 16628 v.AddArg(ptr) 16629 v.AddArg(mem) 16630 return true 16631 } 16632 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 16633 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16634 // result: (XORload <t> [off] {sym} x ptr mem) 16635 for { 16636 t := v.Type 16637 g := v.Args[0] 16638 if g.Op != OpS390XMOVDload { 16639 break 16640 } 16641 off := g.AuxInt 16642 sym := g.Aux 16643 ptr := g.Args[0] 16644 mem := g.Args[1] 16645 x := v.Args[1] 16646 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16647 break 16648 } 16649 v.reset(OpS390XXORload) 16650 v.Type = t 16651 v.AuxInt = off 16652 v.Aux = sym 16653 v.AddArg(x) 16654 v.AddArg(ptr) 16655 v.AddArg(mem) 16656 return true 16657 } 16658 return false 16659 } 16660 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 16661 b := v.Block 16662 _ = b 16663 // match: (XORW x (MOVDconst [c])) 16664 // cond: 16665 // result: (XORWconst [c] x) 16666 for { 16667 x := v.Args[0] 16668 v_1 := v.Args[1] 16669 if v_1.Op != OpS390XMOVDconst { 16670 break 16671 } 16672 c := v_1.AuxInt 16673 v.reset(OpS390XXORWconst) 16674 v.AuxInt = c 16675 v.AddArg(x) 16676 return true 16677 } 16678 // match: (XORW (MOVDconst [c]) x) 16679 // cond: 16680 // result: (XORWconst [c] x) 16681 for { 16682 v_0 := v.Args[0] 16683 if v_0.Op != OpS390XMOVDconst { 16684 break 16685 } 16686 c := v_0.AuxInt 16687 x := v.Args[1] 16688 v.reset(OpS390XXORWconst) 16689 v.AuxInt = c 16690 v.AddArg(x) 16691 return true 16692 } 16693 // match: (XORW x x) 16694 // cond: 16695 // result: (MOVDconst [0]) 16696 for { 16697 x := v.Args[0] 16698 if x != v.Args[1] { 16699 break 16700 } 16701 v.reset(OpS390XMOVDconst) 16702 v.AuxInt = 0 16703 return true 16704 } 16705 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 16706 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16707 // result: (XORWload <t> [off] {sym} x ptr mem) 16708 for { 16709 t := v.Type 16710 x := v.Args[0] 16711 g := v.Args[1] 16712 if g.Op != OpS390XMOVWload { 16713 break 16714 } 16715 off := g.AuxInt 16716 sym := g.Aux 16717 ptr := g.Args[0] 16718 mem := g.Args[1] 16719 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16720 break 16721 } 16722 v.reset(OpS390XXORWload) 16723 v.Type = t 16724 v.AuxInt = off 16725 v.Aux = sym 16726 v.AddArg(x) 16727 v.AddArg(ptr) 16728 v.AddArg(mem) 16729 return true 16730 } 16731 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 16732 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16733 // result: (XORWload <t> [off] {sym} x ptr mem) 16734 for { 16735 t := v.Type 16736 g := v.Args[0] 16737 if g.Op != OpS390XMOVWload { 16738 break 16739 } 16740 off := g.AuxInt 16741 sym := g.Aux 16742 ptr := g.Args[0] 16743 mem := g.Args[1] 16744 x := v.Args[1] 16745 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16746 break 16747 } 16748 v.reset(OpS390XXORWload) 16749 v.Type = t 16750 v.AuxInt = off 16751 v.Aux = sym 16752 v.AddArg(x) 16753 v.AddArg(ptr) 16754 v.AddArg(mem) 16755 return true 16756 } 16757 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16758 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16759 // result: (XORWload <t> [off] {sym} x ptr mem) 16760 for { 16761 t := v.Type 16762 x := v.Args[0] 16763 g := v.Args[1] 16764 if g.Op != OpS390XMOVWZload { 16765 break 16766 } 16767 off := g.AuxInt 16768 sym := g.Aux 16769 ptr := g.Args[0] 16770 mem := g.Args[1] 16771 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16772 break 16773 } 16774 v.reset(OpS390XXORWload) 16775 v.Type = t 16776 v.AuxInt = off 16777 v.Aux = sym 16778 v.AddArg(x) 16779 v.AddArg(ptr) 16780 v.AddArg(mem) 16781 return true 16782 } 16783 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 16784 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16785 // result: (XORWload <t> [off] {sym} x ptr mem) 16786 for { 16787 t := v.Type 16788 g := v.Args[0] 16789 if g.Op != OpS390XMOVWZload { 16790 break 16791 } 16792 off := g.AuxInt 16793 sym := g.Aux 16794 ptr := g.Args[0] 16795 mem := g.Args[1] 16796 x := v.Args[1] 16797 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16798 break 16799 } 16800 v.reset(OpS390XXORWload) 16801 v.Type = t 16802 v.AuxInt = off 16803 v.Aux = sym 16804 v.AddArg(x) 16805 v.AddArg(ptr) 16806 v.AddArg(mem) 16807 return true 16808 } 16809 return false 16810 } 16811 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 16812 b := v.Block 16813 _ = b 16814 // match: (XORWconst [c] x) 16815 // cond: int32(c)==0 16816 // result: x 16817 for { 16818 c := v.AuxInt 16819 x := v.Args[0] 16820 if !(int32(c) == 0) { 16821 break 16822 } 16823 v.reset(OpCopy) 16824 v.Type = x.Type 16825 v.AddArg(x) 16826 return true 16827 } 16828 // match: (XORWconst [c] (MOVDconst [d])) 16829 // cond: 16830 // result: (MOVDconst [c^d]) 16831 for { 16832 c := v.AuxInt 16833 v_0 := v.Args[0] 16834 if v_0.Op != OpS390XMOVDconst { 16835 break 16836 } 16837 d := v_0.AuxInt 16838 v.reset(OpS390XMOVDconst) 16839 v.AuxInt = c ^ d 16840 return true 16841 } 16842 return false 16843 } 16844 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 16845 b := v.Block 16846 _ = b 16847 // match: (XORconst [0] x) 16848 // cond: 16849 // result: x 16850 for { 16851 if v.AuxInt != 0 { 16852 break 16853 } 16854 x := v.Args[0] 16855 v.reset(OpCopy) 16856 v.Type = x.Type 16857 v.AddArg(x) 16858 return true 16859 } 16860 // match: (XORconst [c] (MOVDconst [d])) 16861 // cond: 16862 // result: (MOVDconst [c^d]) 16863 for { 16864 c := v.AuxInt 16865 v_0 := v.Args[0] 16866 if v_0.Op != OpS390XMOVDconst { 16867 break 16868 } 16869 d := v_0.AuxInt 16870 v.reset(OpS390XMOVDconst) 16871 v.AuxInt = c ^ d 16872 return true 16873 } 16874 return false 16875 } 16876 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 16877 b := v.Block 16878 _ = b 16879 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 16880 // cond: 16881 // result: (ADDW val (Select0 <t> tuple)) 16882 for { 16883 t := v.Type 16884 v_0 := v.Args[0] 16885 if v_0.Op != OpS390XAddTupleFirst32 { 16886 break 16887 } 16888 tuple := v_0.Args[0] 16889 val := v_0.Args[1] 16890 v.reset(OpS390XADDW) 16891 v.AddArg(val) 16892 v0 := b.NewValue0(v.Line, OpSelect0, t) 16893 v0.AddArg(tuple) 16894 v.AddArg(v0) 16895 return true 16896 } 16897 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 16898 // cond: 16899 // result: (ADD val (Select0 <t> tuple)) 16900 for { 16901 t := v.Type 16902 v_0 := v.Args[0] 16903 if v_0.Op != OpS390XAddTupleFirst64 { 16904 break 16905 } 16906 tuple := v_0.Args[0] 16907 val := v_0.Args[1] 16908 v.reset(OpS390XADD) 16909 v.AddArg(val) 16910 v0 := b.NewValue0(v.Line, OpSelect0, t) 16911 v0.AddArg(tuple) 16912 v.AddArg(v0) 16913 return true 16914 } 16915 return false 16916 } 16917 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 16918 b := v.Block 16919 _ = b 16920 // match: (Select1 (AddTupleFirst32 tuple _ )) 16921 // cond: 16922 // result: (Select1 tuple) 16923 for { 16924 v_0 := v.Args[0] 16925 if v_0.Op != OpS390XAddTupleFirst32 { 16926 break 16927 } 16928 tuple := v_0.Args[0] 16929 v.reset(OpSelect1) 16930 v.AddArg(tuple) 16931 return true 16932 } 16933 // match: (Select1 (AddTupleFirst64 tuple _ )) 16934 // cond: 16935 // result: (Select1 tuple) 16936 for { 16937 v_0 := v.Args[0] 16938 if v_0.Op != OpS390XAddTupleFirst64 { 16939 break 16940 } 16941 tuple := v_0.Args[0] 16942 v.reset(OpSelect1) 16943 v.AddArg(tuple) 16944 return true 16945 } 16946 return false 16947 } 16948 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 16949 b := v.Block 16950 _ = b 16951 // match: (SignExt16to32 x) 16952 // cond: 16953 // result: (MOVHreg x) 16954 for { 16955 x := v.Args[0] 16956 v.reset(OpS390XMOVHreg) 16957 v.AddArg(x) 16958 return true 16959 } 16960 } 16961 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 16962 b := v.Block 16963 _ = b 16964 // match: (SignExt16to64 x) 16965 // cond: 16966 // result: (MOVHreg x) 16967 for { 16968 x := v.Args[0] 16969 v.reset(OpS390XMOVHreg) 16970 v.AddArg(x) 16971 return true 16972 } 16973 } 16974 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 16975 b := v.Block 16976 _ = b 16977 // match: (SignExt32to64 x) 16978 // cond: 16979 // result: (MOVWreg x) 16980 for { 16981 x := v.Args[0] 16982 v.reset(OpS390XMOVWreg) 16983 v.AddArg(x) 16984 return true 16985 } 16986 } 16987 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 16988 b := v.Block 16989 _ = b 16990 // match: (SignExt8to16 x) 16991 // cond: 16992 // result: (MOVBreg x) 16993 for { 16994 x := v.Args[0] 16995 v.reset(OpS390XMOVBreg) 16996 v.AddArg(x) 16997 return true 16998 } 16999 } 17000 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17001 b := v.Block 17002 _ = b 17003 // match: (SignExt8to32 x) 17004 // cond: 17005 // result: (MOVBreg x) 17006 for { 17007 x := v.Args[0] 17008 v.reset(OpS390XMOVBreg) 17009 v.AddArg(x) 17010 return true 17011 } 17012 } 17013 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17014 b := v.Block 17015 _ = b 17016 // match: (SignExt8to64 x) 17017 // cond: 17018 // result: (MOVBreg x) 17019 for { 17020 x := v.Args[0] 17021 v.reset(OpS390XMOVBreg) 17022 v.AddArg(x) 17023 return true 17024 } 17025 } 17026 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17027 b := v.Block 17028 _ = b 17029 // match: (Slicemask <t> x) 17030 // cond: 17031 // result: (XOR (MOVDconst [-1]) (SRADconst <t> (SUBconst <t> x [1]) [63])) 17032 for { 17033 t := v.Type 17034 x := v.Args[0] 17035 v.reset(OpS390XXOR) 17036 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 17037 v0.AuxInt = -1 17038 v.AddArg(v0) 17039 v1 := b.NewValue0(v.Line, OpS390XSRADconst, t) 17040 v1.AuxInt = 63 17041 v2 := b.NewValue0(v.Line, OpS390XSUBconst, t) 17042 v2.AuxInt = 1 17043 v2.AddArg(x) 17044 v1.AddArg(v2) 17045 v.AddArg(v1) 17046 return true 17047 } 17048 } 17049 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 17050 b := v.Block 17051 _ = b 17052 // match: (Sqrt x) 17053 // cond: 17054 // result: (FSQRT x) 17055 for { 17056 x := v.Args[0] 17057 v.reset(OpS390XFSQRT) 17058 v.AddArg(x) 17059 return true 17060 } 17061 } 17062 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 17063 b := v.Block 17064 _ = b 17065 // match: (StaticCall [argwid] {target} mem) 17066 // cond: 17067 // result: (CALLstatic [argwid] {target} mem) 17068 for { 17069 argwid := v.AuxInt 17070 target := v.Aux 17071 mem := v.Args[0] 17072 v.reset(OpS390XCALLstatic) 17073 v.AuxInt = argwid 17074 v.Aux = target 17075 v.AddArg(mem) 17076 return true 17077 } 17078 } 17079 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 17080 b := v.Block 17081 _ = b 17082 // match: (Store [8] ptr val mem) 17083 // cond: is64BitFloat(val.Type) 17084 // result: (FMOVDstore ptr val mem) 17085 for { 17086 if v.AuxInt != 8 { 17087 break 17088 } 17089 ptr := v.Args[0] 17090 val := v.Args[1] 17091 mem := v.Args[2] 17092 if !(is64BitFloat(val.Type)) { 17093 break 17094 } 17095 v.reset(OpS390XFMOVDstore) 17096 v.AddArg(ptr) 17097 v.AddArg(val) 17098 v.AddArg(mem) 17099 return true 17100 } 17101 // match: (Store [4] ptr val mem) 17102 // cond: is32BitFloat(val.Type) 17103 // result: (FMOVSstore ptr val mem) 17104 for { 17105 if v.AuxInt != 4 { 17106 break 17107 } 17108 ptr := v.Args[0] 17109 val := v.Args[1] 17110 mem := v.Args[2] 17111 if !(is32BitFloat(val.Type)) { 17112 break 17113 } 17114 v.reset(OpS390XFMOVSstore) 17115 v.AddArg(ptr) 17116 v.AddArg(val) 17117 v.AddArg(mem) 17118 return true 17119 } 17120 // match: (Store [8] ptr val mem) 17121 // cond: 17122 // result: (MOVDstore ptr val mem) 17123 for { 17124 if v.AuxInt != 8 { 17125 break 17126 } 17127 ptr := v.Args[0] 17128 val := v.Args[1] 17129 mem := v.Args[2] 17130 v.reset(OpS390XMOVDstore) 17131 v.AddArg(ptr) 17132 v.AddArg(val) 17133 v.AddArg(mem) 17134 return true 17135 } 17136 // match: (Store [4] ptr val mem) 17137 // cond: 17138 // result: (MOVWstore ptr val mem) 17139 for { 17140 if v.AuxInt != 4 { 17141 break 17142 } 17143 ptr := v.Args[0] 17144 val := v.Args[1] 17145 mem := v.Args[2] 17146 v.reset(OpS390XMOVWstore) 17147 v.AddArg(ptr) 17148 v.AddArg(val) 17149 v.AddArg(mem) 17150 return true 17151 } 17152 // match: (Store [2] ptr val mem) 17153 // cond: 17154 // result: (MOVHstore ptr val mem) 17155 for { 17156 if v.AuxInt != 2 { 17157 break 17158 } 17159 ptr := v.Args[0] 17160 val := v.Args[1] 17161 mem := v.Args[2] 17162 v.reset(OpS390XMOVHstore) 17163 v.AddArg(ptr) 17164 v.AddArg(val) 17165 v.AddArg(mem) 17166 return true 17167 } 17168 // match: (Store [1] ptr val mem) 17169 // cond: 17170 // result: (MOVBstore ptr val mem) 17171 for { 17172 if v.AuxInt != 1 { 17173 break 17174 } 17175 ptr := v.Args[0] 17176 val := v.Args[1] 17177 mem := v.Args[2] 17178 v.reset(OpS390XMOVBstore) 17179 v.AddArg(ptr) 17180 v.AddArg(val) 17181 v.AddArg(mem) 17182 return true 17183 } 17184 return false 17185 } 17186 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 17187 b := v.Block 17188 _ = b 17189 // match: (Sub16 x y) 17190 // cond: 17191 // result: (SUBW x y) 17192 for { 17193 x := v.Args[0] 17194 y := v.Args[1] 17195 v.reset(OpS390XSUBW) 17196 v.AddArg(x) 17197 v.AddArg(y) 17198 return true 17199 } 17200 } 17201 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 17202 b := v.Block 17203 _ = b 17204 // match: (Sub32 x y) 17205 // cond: 17206 // result: (SUBW x y) 17207 for { 17208 x := v.Args[0] 17209 y := v.Args[1] 17210 v.reset(OpS390XSUBW) 17211 v.AddArg(x) 17212 v.AddArg(y) 17213 return true 17214 } 17215 } 17216 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 17217 b := v.Block 17218 _ = b 17219 // match: (Sub32F x y) 17220 // cond: 17221 // result: (FSUBS x y) 17222 for { 17223 x := v.Args[0] 17224 y := v.Args[1] 17225 v.reset(OpS390XFSUBS) 17226 v.AddArg(x) 17227 v.AddArg(y) 17228 return true 17229 } 17230 } 17231 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 17232 b := v.Block 17233 _ = b 17234 // match: (Sub64 x y) 17235 // cond: 17236 // result: (SUB x y) 17237 for { 17238 x := v.Args[0] 17239 y := v.Args[1] 17240 v.reset(OpS390XSUB) 17241 v.AddArg(x) 17242 v.AddArg(y) 17243 return true 17244 } 17245 } 17246 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 17247 b := v.Block 17248 _ = b 17249 // match: (Sub64F x y) 17250 // cond: 17251 // result: (FSUB x y) 17252 for { 17253 x := v.Args[0] 17254 y := v.Args[1] 17255 v.reset(OpS390XFSUB) 17256 v.AddArg(x) 17257 v.AddArg(y) 17258 return true 17259 } 17260 } 17261 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 17262 b := v.Block 17263 _ = b 17264 // match: (Sub8 x y) 17265 // cond: 17266 // result: (SUBW x y) 17267 for { 17268 x := v.Args[0] 17269 y := v.Args[1] 17270 v.reset(OpS390XSUBW) 17271 v.AddArg(x) 17272 v.AddArg(y) 17273 return true 17274 } 17275 } 17276 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 17277 b := v.Block 17278 _ = b 17279 // match: (SubPtr x y) 17280 // cond: 17281 // result: (SUB x y) 17282 for { 17283 x := v.Args[0] 17284 y := v.Args[1] 17285 v.reset(OpS390XSUB) 17286 v.AddArg(x) 17287 v.AddArg(y) 17288 return true 17289 } 17290 } 17291 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 17292 b := v.Block 17293 _ = b 17294 // match: (Trunc16to8 x) 17295 // cond: 17296 // result: x 17297 for { 17298 x := v.Args[0] 17299 v.reset(OpCopy) 17300 v.Type = x.Type 17301 v.AddArg(x) 17302 return true 17303 } 17304 } 17305 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 17306 b := v.Block 17307 _ = b 17308 // match: (Trunc32to16 x) 17309 // cond: 17310 // result: x 17311 for { 17312 x := v.Args[0] 17313 v.reset(OpCopy) 17314 v.Type = x.Type 17315 v.AddArg(x) 17316 return true 17317 } 17318 } 17319 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 17320 b := v.Block 17321 _ = b 17322 // match: (Trunc32to8 x) 17323 // cond: 17324 // result: x 17325 for { 17326 x := v.Args[0] 17327 v.reset(OpCopy) 17328 v.Type = x.Type 17329 v.AddArg(x) 17330 return true 17331 } 17332 } 17333 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 17334 b := v.Block 17335 _ = b 17336 // match: (Trunc64to16 x) 17337 // cond: 17338 // result: x 17339 for { 17340 x := v.Args[0] 17341 v.reset(OpCopy) 17342 v.Type = x.Type 17343 v.AddArg(x) 17344 return true 17345 } 17346 } 17347 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 17348 b := v.Block 17349 _ = b 17350 // match: (Trunc64to32 x) 17351 // cond: 17352 // result: x 17353 for { 17354 x := v.Args[0] 17355 v.reset(OpCopy) 17356 v.Type = x.Type 17357 v.AddArg(x) 17358 return true 17359 } 17360 } 17361 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 17362 b := v.Block 17363 _ = b 17364 // match: (Trunc64to8 x) 17365 // cond: 17366 // result: x 17367 for { 17368 x := v.Args[0] 17369 v.reset(OpCopy) 17370 v.Type = x.Type 17371 v.AddArg(x) 17372 return true 17373 } 17374 } 17375 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 17376 b := v.Block 17377 _ = b 17378 // match: (Xor16 x y) 17379 // cond: 17380 // result: (XORW x y) 17381 for { 17382 x := v.Args[0] 17383 y := v.Args[1] 17384 v.reset(OpS390XXORW) 17385 v.AddArg(x) 17386 v.AddArg(y) 17387 return true 17388 } 17389 } 17390 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 17391 b := v.Block 17392 _ = b 17393 // match: (Xor32 x y) 17394 // cond: 17395 // result: (XORW x y) 17396 for { 17397 x := v.Args[0] 17398 y := v.Args[1] 17399 v.reset(OpS390XXORW) 17400 v.AddArg(x) 17401 v.AddArg(y) 17402 return true 17403 } 17404 } 17405 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 17406 b := v.Block 17407 _ = b 17408 // match: (Xor64 x y) 17409 // cond: 17410 // result: (XOR x y) 17411 for { 17412 x := v.Args[0] 17413 y := v.Args[1] 17414 v.reset(OpS390XXOR) 17415 v.AddArg(x) 17416 v.AddArg(y) 17417 return true 17418 } 17419 } 17420 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 17421 b := v.Block 17422 _ = b 17423 // match: (Xor8 x y) 17424 // cond: 17425 // result: (XORW x y) 17426 for { 17427 x := v.Args[0] 17428 y := v.Args[1] 17429 v.reset(OpS390XXORW) 17430 v.AddArg(x) 17431 v.AddArg(y) 17432 return true 17433 } 17434 } 17435 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 17436 b := v.Block 17437 _ = b 17438 // match: (Zero [s] _ mem) 17439 // cond: SizeAndAlign(s).Size() == 0 17440 // result: mem 17441 for { 17442 s := v.AuxInt 17443 mem := v.Args[1] 17444 if !(SizeAndAlign(s).Size() == 0) { 17445 break 17446 } 17447 v.reset(OpCopy) 17448 v.Type = mem.Type 17449 v.AddArg(mem) 17450 return true 17451 } 17452 // match: (Zero [s] destptr mem) 17453 // cond: SizeAndAlign(s).Size() == 1 17454 // result: (MOVBstoreconst [0] destptr mem) 17455 for { 17456 s := v.AuxInt 17457 destptr := v.Args[0] 17458 mem := v.Args[1] 17459 if !(SizeAndAlign(s).Size() == 1) { 17460 break 17461 } 17462 v.reset(OpS390XMOVBstoreconst) 17463 v.AuxInt = 0 17464 v.AddArg(destptr) 17465 v.AddArg(mem) 17466 return true 17467 } 17468 // match: (Zero [s] destptr mem) 17469 // cond: SizeAndAlign(s).Size() == 2 17470 // result: (MOVHstoreconst [0] destptr mem) 17471 for { 17472 s := v.AuxInt 17473 destptr := v.Args[0] 17474 mem := v.Args[1] 17475 if !(SizeAndAlign(s).Size() == 2) { 17476 break 17477 } 17478 v.reset(OpS390XMOVHstoreconst) 17479 v.AuxInt = 0 17480 v.AddArg(destptr) 17481 v.AddArg(mem) 17482 return true 17483 } 17484 // match: (Zero [s] destptr mem) 17485 // cond: SizeAndAlign(s).Size() == 4 17486 // result: (MOVWstoreconst [0] destptr mem) 17487 for { 17488 s := v.AuxInt 17489 destptr := v.Args[0] 17490 mem := v.Args[1] 17491 if !(SizeAndAlign(s).Size() == 4) { 17492 break 17493 } 17494 v.reset(OpS390XMOVWstoreconst) 17495 v.AuxInt = 0 17496 v.AddArg(destptr) 17497 v.AddArg(mem) 17498 return true 17499 } 17500 // match: (Zero [s] destptr mem) 17501 // cond: SizeAndAlign(s).Size() == 8 17502 // result: (MOVDstoreconst [0] destptr mem) 17503 for { 17504 s := v.AuxInt 17505 destptr := v.Args[0] 17506 mem := v.Args[1] 17507 if !(SizeAndAlign(s).Size() == 8) { 17508 break 17509 } 17510 v.reset(OpS390XMOVDstoreconst) 17511 v.AuxInt = 0 17512 v.AddArg(destptr) 17513 v.AddArg(mem) 17514 return true 17515 } 17516 // match: (Zero [s] destptr mem) 17517 // cond: SizeAndAlign(s).Size() == 3 17518 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 17519 for { 17520 s := v.AuxInt 17521 destptr := v.Args[0] 17522 mem := v.Args[1] 17523 if !(SizeAndAlign(s).Size() == 3) { 17524 break 17525 } 17526 v.reset(OpS390XMOVBstoreconst) 17527 v.AuxInt = makeValAndOff(0, 2) 17528 v.AddArg(destptr) 17529 v0 := b.NewValue0(v.Line, OpS390XMOVHstoreconst, TypeMem) 17530 v0.AuxInt = 0 17531 v0.AddArg(destptr) 17532 v0.AddArg(mem) 17533 v.AddArg(v0) 17534 return true 17535 } 17536 // match: (Zero [s] destptr mem) 17537 // cond: SizeAndAlign(s).Size() == 5 17538 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17539 for { 17540 s := v.AuxInt 17541 destptr := v.Args[0] 17542 mem := v.Args[1] 17543 if !(SizeAndAlign(s).Size() == 5) { 17544 break 17545 } 17546 v.reset(OpS390XMOVBstoreconst) 17547 v.AuxInt = makeValAndOff(0, 4) 17548 v.AddArg(destptr) 17549 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17550 v0.AuxInt = 0 17551 v0.AddArg(destptr) 17552 v0.AddArg(mem) 17553 v.AddArg(v0) 17554 return true 17555 } 17556 // match: (Zero [s] destptr mem) 17557 // cond: SizeAndAlign(s).Size() == 6 17558 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17559 for { 17560 s := v.AuxInt 17561 destptr := v.Args[0] 17562 mem := v.Args[1] 17563 if !(SizeAndAlign(s).Size() == 6) { 17564 break 17565 } 17566 v.reset(OpS390XMOVHstoreconst) 17567 v.AuxInt = makeValAndOff(0, 4) 17568 v.AddArg(destptr) 17569 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17570 v0.AuxInt = 0 17571 v0.AddArg(destptr) 17572 v0.AddArg(mem) 17573 v.AddArg(v0) 17574 return true 17575 } 17576 // match: (Zero [s] destptr mem) 17577 // cond: SizeAndAlign(s).Size() == 7 17578 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 17579 for { 17580 s := v.AuxInt 17581 destptr := v.Args[0] 17582 mem := v.Args[1] 17583 if !(SizeAndAlign(s).Size() == 7) { 17584 break 17585 } 17586 v.reset(OpS390XMOVWstoreconst) 17587 v.AuxInt = makeValAndOff(0, 3) 17588 v.AddArg(destptr) 17589 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17590 v0.AuxInt = 0 17591 v0.AddArg(destptr) 17592 v0.AddArg(mem) 17593 v.AddArg(v0) 17594 return true 17595 } 17596 // match: (Zero [s] destptr mem) 17597 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 17598 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 17599 for { 17600 s := v.AuxInt 17601 destptr := v.Args[0] 17602 mem := v.Args[1] 17603 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 17604 break 17605 } 17606 v.reset(OpS390XCLEAR) 17607 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 17608 v.AddArg(destptr) 17609 v.AddArg(mem) 17610 return true 17611 } 17612 // match: (Zero [s] destptr mem) 17613 // cond: SizeAndAlign(s).Size() > 1024 17614 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 17615 for { 17616 s := v.AuxInt 17617 destptr := v.Args[0] 17618 mem := v.Args[1] 17619 if !(SizeAndAlign(s).Size() > 1024) { 17620 break 17621 } 17622 v.reset(OpS390XLoweredZero) 17623 v.AuxInt = SizeAndAlign(s).Size() % 256 17624 v.AddArg(destptr) 17625 v0 := b.NewValue0(v.Line, OpS390XADDconst, destptr.Type) 17626 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 17627 v0.AddArg(destptr) 17628 v.AddArg(v0) 17629 v.AddArg(mem) 17630 return true 17631 } 17632 return false 17633 } 17634 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 17635 b := v.Block 17636 _ = b 17637 // match: (ZeroExt16to32 x) 17638 // cond: 17639 // result: (MOVHZreg x) 17640 for { 17641 x := v.Args[0] 17642 v.reset(OpS390XMOVHZreg) 17643 v.AddArg(x) 17644 return true 17645 } 17646 } 17647 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 17648 b := v.Block 17649 _ = b 17650 // match: (ZeroExt16to64 x) 17651 // cond: 17652 // result: (MOVHZreg x) 17653 for { 17654 x := v.Args[0] 17655 v.reset(OpS390XMOVHZreg) 17656 v.AddArg(x) 17657 return true 17658 } 17659 } 17660 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 17661 b := v.Block 17662 _ = b 17663 // match: (ZeroExt32to64 x) 17664 // cond: 17665 // result: (MOVWZreg x) 17666 for { 17667 x := v.Args[0] 17668 v.reset(OpS390XMOVWZreg) 17669 v.AddArg(x) 17670 return true 17671 } 17672 } 17673 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 17674 b := v.Block 17675 _ = b 17676 // match: (ZeroExt8to16 x) 17677 // cond: 17678 // result: (MOVBZreg x) 17679 for { 17680 x := v.Args[0] 17681 v.reset(OpS390XMOVBZreg) 17682 v.AddArg(x) 17683 return true 17684 } 17685 } 17686 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 17687 b := v.Block 17688 _ = b 17689 // match: (ZeroExt8to32 x) 17690 // cond: 17691 // result: (MOVBZreg x) 17692 for { 17693 x := v.Args[0] 17694 v.reset(OpS390XMOVBZreg) 17695 v.AddArg(x) 17696 return true 17697 } 17698 } 17699 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 17700 b := v.Block 17701 _ = b 17702 // match: (ZeroExt8to64 x) 17703 // cond: 17704 // result: (MOVBZreg x) 17705 for { 17706 x := v.Args[0] 17707 v.reset(OpS390XMOVBZreg) 17708 v.AddArg(x) 17709 return true 17710 } 17711 } 17712 func rewriteBlockS390X(b *Block, config *Config) bool { 17713 switch b.Kind { 17714 case BlockS390XEQ: 17715 // match: (EQ (InvertFlags cmp) yes no) 17716 // cond: 17717 // result: (EQ cmp yes no) 17718 for { 17719 v := b.Control 17720 if v.Op != OpS390XInvertFlags { 17721 break 17722 } 17723 cmp := v.Args[0] 17724 yes := b.Succs[0] 17725 no := b.Succs[1] 17726 b.Kind = BlockS390XEQ 17727 b.SetControl(cmp) 17728 _ = yes 17729 _ = no 17730 return true 17731 } 17732 // match: (EQ (FlagEQ) yes no) 17733 // cond: 17734 // result: (First nil yes no) 17735 for { 17736 v := b.Control 17737 if v.Op != OpS390XFlagEQ { 17738 break 17739 } 17740 yes := b.Succs[0] 17741 no := b.Succs[1] 17742 b.Kind = BlockFirst 17743 b.SetControl(nil) 17744 _ = yes 17745 _ = no 17746 return true 17747 } 17748 // match: (EQ (FlagLT) yes no) 17749 // cond: 17750 // result: (First nil no yes) 17751 for { 17752 v := b.Control 17753 if v.Op != OpS390XFlagLT { 17754 break 17755 } 17756 yes := b.Succs[0] 17757 no := b.Succs[1] 17758 b.Kind = BlockFirst 17759 b.SetControl(nil) 17760 b.swapSuccessors() 17761 _ = no 17762 _ = yes 17763 return true 17764 } 17765 // match: (EQ (FlagGT) yes no) 17766 // cond: 17767 // result: (First nil no yes) 17768 for { 17769 v := b.Control 17770 if v.Op != OpS390XFlagGT { 17771 break 17772 } 17773 yes := b.Succs[0] 17774 no := b.Succs[1] 17775 b.Kind = BlockFirst 17776 b.SetControl(nil) 17777 b.swapSuccessors() 17778 _ = no 17779 _ = yes 17780 return true 17781 } 17782 case BlockS390XGE: 17783 // match: (GE (InvertFlags cmp) yes no) 17784 // cond: 17785 // result: (LE cmp yes no) 17786 for { 17787 v := b.Control 17788 if v.Op != OpS390XInvertFlags { 17789 break 17790 } 17791 cmp := v.Args[0] 17792 yes := b.Succs[0] 17793 no := b.Succs[1] 17794 b.Kind = BlockS390XLE 17795 b.SetControl(cmp) 17796 _ = yes 17797 _ = no 17798 return true 17799 } 17800 // match: (GE (FlagEQ) yes no) 17801 // cond: 17802 // result: (First nil yes no) 17803 for { 17804 v := b.Control 17805 if v.Op != OpS390XFlagEQ { 17806 break 17807 } 17808 yes := b.Succs[0] 17809 no := b.Succs[1] 17810 b.Kind = BlockFirst 17811 b.SetControl(nil) 17812 _ = yes 17813 _ = no 17814 return true 17815 } 17816 // match: (GE (FlagLT) yes no) 17817 // cond: 17818 // result: (First nil no yes) 17819 for { 17820 v := b.Control 17821 if v.Op != OpS390XFlagLT { 17822 break 17823 } 17824 yes := b.Succs[0] 17825 no := b.Succs[1] 17826 b.Kind = BlockFirst 17827 b.SetControl(nil) 17828 b.swapSuccessors() 17829 _ = no 17830 _ = yes 17831 return true 17832 } 17833 // match: (GE (FlagGT) yes no) 17834 // cond: 17835 // result: (First nil yes no) 17836 for { 17837 v := b.Control 17838 if v.Op != OpS390XFlagGT { 17839 break 17840 } 17841 yes := b.Succs[0] 17842 no := b.Succs[1] 17843 b.Kind = BlockFirst 17844 b.SetControl(nil) 17845 _ = yes 17846 _ = no 17847 return true 17848 } 17849 case BlockS390XGT: 17850 // match: (GT (InvertFlags cmp) yes no) 17851 // cond: 17852 // result: (LT cmp yes no) 17853 for { 17854 v := b.Control 17855 if v.Op != OpS390XInvertFlags { 17856 break 17857 } 17858 cmp := v.Args[0] 17859 yes := b.Succs[0] 17860 no := b.Succs[1] 17861 b.Kind = BlockS390XLT 17862 b.SetControl(cmp) 17863 _ = yes 17864 _ = no 17865 return true 17866 } 17867 // match: (GT (FlagEQ) yes no) 17868 // cond: 17869 // result: (First nil no yes) 17870 for { 17871 v := b.Control 17872 if v.Op != OpS390XFlagEQ { 17873 break 17874 } 17875 yes := b.Succs[0] 17876 no := b.Succs[1] 17877 b.Kind = BlockFirst 17878 b.SetControl(nil) 17879 b.swapSuccessors() 17880 _ = no 17881 _ = yes 17882 return true 17883 } 17884 // match: (GT (FlagLT) yes no) 17885 // cond: 17886 // result: (First nil no yes) 17887 for { 17888 v := b.Control 17889 if v.Op != OpS390XFlagLT { 17890 break 17891 } 17892 yes := b.Succs[0] 17893 no := b.Succs[1] 17894 b.Kind = BlockFirst 17895 b.SetControl(nil) 17896 b.swapSuccessors() 17897 _ = no 17898 _ = yes 17899 return true 17900 } 17901 // match: (GT (FlagGT) yes no) 17902 // cond: 17903 // result: (First nil yes no) 17904 for { 17905 v := b.Control 17906 if v.Op != OpS390XFlagGT { 17907 break 17908 } 17909 yes := b.Succs[0] 17910 no := b.Succs[1] 17911 b.Kind = BlockFirst 17912 b.SetControl(nil) 17913 _ = yes 17914 _ = no 17915 return true 17916 } 17917 case BlockIf: 17918 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17919 // cond: 17920 // result: (LT cmp yes no) 17921 for { 17922 v := b.Control 17923 if v.Op != OpS390XMOVDLT { 17924 break 17925 } 17926 v_0 := v.Args[0] 17927 if v_0.Op != OpS390XMOVDconst { 17928 break 17929 } 17930 if v_0.AuxInt != 0 { 17931 break 17932 } 17933 v_1 := v.Args[1] 17934 if v_1.Op != OpS390XMOVDconst { 17935 break 17936 } 17937 if v_1.AuxInt != 1 { 17938 break 17939 } 17940 cmp := v.Args[2] 17941 yes := b.Succs[0] 17942 no := b.Succs[1] 17943 b.Kind = BlockS390XLT 17944 b.SetControl(cmp) 17945 _ = yes 17946 _ = no 17947 return true 17948 } 17949 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17950 // cond: 17951 // result: (LE cmp yes no) 17952 for { 17953 v := b.Control 17954 if v.Op != OpS390XMOVDLE { 17955 break 17956 } 17957 v_0 := v.Args[0] 17958 if v_0.Op != OpS390XMOVDconst { 17959 break 17960 } 17961 if v_0.AuxInt != 0 { 17962 break 17963 } 17964 v_1 := v.Args[1] 17965 if v_1.Op != OpS390XMOVDconst { 17966 break 17967 } 17968 if v_1.AuxInt != 1 { 17969 break 17970 } 17971 cmp := v.Args[2] 17972 yes := b.Succs[0] 17973 no := b.Succs[1] 17974 b.Kind = BlockS390XLE 17975 b.SetControl(cmp) 17976 _ = yes 17977 _ = no 17978 return true 17979 } 17980 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17981 // cond: 17982 // result: (GT cmp yes no) 17983 for { 17984 v := b.Control 17985 if v.Op != OpS390XMOVDGT { 17986 break 17987 } 17988 v_0 := v.Args[0] 17989 if v_0.Op != OpS390XMOVDconst { 17990 break 17991 } 17992 if v_0.AuxInt != 0 { 17993 break 17994 } 17995 v_1 := v.Args[1] 17996 if v_1.Op != OpS390XMOVDconst { 17997 break 17998 } 17999 if v_1.AuxInt != 1 { 18000 break 18001 } 18002 cmp := v.Args[2] 18003 yes := b.Succs[0] 18004 no := b.Succs[1] 18005 b.Kind = BlockS390XGT 18006 b.SetControl(cmp) 18007 _ = yes 18008 _ = no 18009 return true 18010 } 18011 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18012 // cond: 18013 // result: (GE cmp yes no) 18014 for { 18015 v := b.Control 18016 if v.Op != OpS390XMOVDGE { 18017 break 18018 } 18019 v_0 := v.Args[0] 18020 if v_0.Op != OpS390XMOVDconst { 18021 break 18022 } 18023 if v_0.AuxInt != 0 { 18024 break 18025 } 18026 v_1 := v.Args[1] 18027 if v_1.Op != OpS390XMOVDconst { 18028 break 18029 } 18030 if v_1.AuxInt != 1 { 18031 break 18032 } 18033 cmp := v.Args[2] 18034 yes := b.Succs[0] 18035 no := b.Succs[1] 18036 b.Kind = BlockS390XGE 18037 b.SetControl(cmp) 18038 _ = yes 18039 _ = no 18040 return true 18041 } 18042 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18043 // cond: 18044 // result: (EQ cmp yes no) 18045 for { 18046 v := b.Control 18047 if v.Op != OpS390XMOVDEQ { 18048 break 18049 } 18050 v_0 := v.Args[0] 18051 if v_0.Op != OpS390XMOVDconst { 18052 break 18053 } 18054 if v_0.AuxInt != 0 { 18055 break 18056 } 18057 v_1 := v.Args[1] 18058 if v_1.Op != OpS390XMOVDconst { 18059 break 18060 } 18061 if v_1.AuxInt != 1 { 18062 break 18063 } 18064 cmp := v.Args[2] 18065 yes := b.Succs[0] 18066 no := b.Succs[1] 18067 b.Kind = BlockS390XEQ 18068 b.SetControl(cmp) 18069 _ = yes 18070 _ = no 18071 return true 18072 } 18073 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18074 // cond: 18075 // result: (NE cmp yes no) 18076 for { 18077 v := b.Control 18078 if v.Op != OpS390XMOVDNE { 18079 break 18080 } 18081 v_0 := v.Args[0] 18082 if v_0.Op != OpS390XMOVDconst { 18083 break 18084 } 18085 if v_0.AuxInt != 0 { 18086 break 18087 } 18088 v_1 := v.Args[1] 18089 if v_1.Op != OpS390XMOVDconst { 18090 break 18091 } 18092 if v_1.AuxInt != 1 { 18093 break 18094 } 18095 cmp := v.Args[2] 18096 yes := b.Succs[0] 18097 no := b.Succs[1] 18098 b.Kind = BlockS390XNE 18099 b.SetControl(cmp) 18100 _ = yes 18101 _ = no 18102 return true 18103 } 18104 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18105 // cond: 18106 // result: (GTF cmp yes no) 18107 for { 18108 v := b.Control 18109 if v.Op != OpS390XMOVDGTnoinv { 18110 break 18111 } 18112 v_0 := v.Args[0] 18113 if v_0.Op != OpS390XMOVDconst { 18114 break 18115 } 18116 if v_0.AuxInt != 0 { 18117 break 18118 } 18119 v_1 := v.Args[1] 18120 if v_1.Op != OpS390XMOVDconst { 18121 break 18122 } 18123 if v_1.AuxInt != 1 { 18124 break 18125 } 18126 cmp := v.Args[2] 18127 yes := b.Succs[0] 18128 no := b.Succs[1] 18129 b.Kind = BlockS390XGTF 18130 b.SetControl(cmp) 18131 _ = yes 18132 _ = no 18133 return true 18134 } 18135 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18136 // cond: 18137 // result: (GEF cmp yes no) 18138 for { 18139 v := b.Control 18140 if v.Op != OpS390XMOVDGEnoinv { 18141 break 18142 } 18143 v_0 := v.Args[0] 18144 if v_0.Op != OpS390XMOVDconst { 18145 break 18146 } 18147 if v_0.AuxInt != 0 { 18148 break 18149 } 18150 v_1 := v.Args[1] 18151 if v_1.Op != OpS390XMOVDconst { 18152 break 18153 } 18154 if v_1.AuxInt != 1 { 18155 break 18156 } 18157 cmp := v.Args[2] 18158 yes := b.Succs[0] 18159 no := b.Succs[1] 18160 b.Kind = BlockS390XGEF 18161 b.SetControl(cmp) 18162 _ = yes 18163 _ = no 18164 return true 18165 } 18166 // match: (If cond yes no) 18167 // cond: 18168 // result: (NE (CMPWconst [0] (MOVBZreg cond)) yes no) 18169 for { 18170 v := b.Control 18171 _ = v 18172 cond := b.Control 18173 yes := b.Succs[0] 18174 no := b.Succs[1] 18175 b.Kind = BlockS390XNE 18176 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 18177 v0.AuxInt = 0 18178 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 18179 v1.AddArg(cond) 18180 v0.AddArg(v1) 18181 b.SetControl(v0) 18182 _ = yes 18183 _ = no 18184 return true 18185 } 18186 case BlockS390XLE: 18187 // match: (LE (InvertFlags cmp) yes no) 18188 // cond: 18189 // result: (GE cmp yes no) 18190 for { 18191 v := b.Control 18192 if v.Op != OpS390XInvertFlags { 18193 break 18194 } 18195 cmp := v.Args[0] 18196 yes := b.Succs[0] 18197 no := b.Succs[1] 18198 b.Kind = BlockS390XGE 18199 b.SetControl(cmp) 18200 _ = yes 18201 _ = no 18202 return true 18203 } 18204 // match: (LE (FlagEQ) yes no) 18205 // cond: 18206 // result: (First nil yes no) 18207 for { 18208 v := b.Control 18209 if v.Op != OpS390XFlagEQ { 18210 break 18211 } 18212 yes := b.Succs[0] 18213 no := b.Succs[1] 18214 b.Kind = BlockFirst 18215 b.SetControl(nil) 18216 _ = yes 18217 _ = no 18218 return true 18219 } 18220 // match: (LE (FlagLT) yes no) 18221 // cond: 18222 // result: (First nil yes no) 18223 for { 18224 v := b.Control 18225 if v.Op != OpS390XFlagLT { 18226 break 18227 } 18228 yes := b.Succs[0] 18229 no := b.Succs[1] 18230 b.Kind = BlockFirst 18231 b.SetControl(nil) 18232 _ = yes 18233 _ = no 18234 return true 18235 } 18236 // match: (LE (FlagGT) yes no) 18237 // cond: 18238 // result: (First nil no yes) 18239 for { 18240 v := b.Control 18241 if v.Op != OpS390XFlagGT { 18242 break 18243 } 18244 yes := b.Succs[0] 18245 no := b.Succs[1] 18246 b.Kind = BlockFirst 18247 b.SetControl(nil) 18248 b.swapSuccessors() 18249 _ = no 18250 _ = yes 18251 return true 18252 } 18253 case BlockS390XLT: 18254 // match: (LT (InvertFlags cmp) yes no) 18255 // cond: 18256 // result: (GT cmp yes no) 18257 for { 18258 v := b.Control 18259 if v.Op != OpS390XInvertFlags { 18260 break 18261 } 18262 cmp := v.Args[0] 18263 yes := b.Succs[0] 18264 no := b.Succs[1] 18265 b.Kind = BlockS390XGT 18266 b.SetControl(cmp) 18267 _ = yes 18268 _ = no 18269 return true 18270 } 18271 // match: (LT (FlagEQ) yes no) 18272 // cond: 18273 // result: (First nil no yes) 18274 for { 18275 v := b.Control 18276 if v.Op != OpS390XFlagEQ { 18277 break 18278 } 18279 yes := b.Succs[0] 18280 no := b.Succs[1] 18281 b.Kind = BlockFirst 18282 b.SetControl(nil) 18283 b.swapSuccessors() 18284 _ = no 18285 _ = yes 18286 return true 18287 } 18288 // match: (LT (FlagLT) yes no) 18289 // cond: 18290 // result: (First nil yes no) 18291 for { 18292 v := b.Control 18293 if v.Op != OpS390XFlagLT { 18294 break 18295 } 18296 yes := b.Succs[0] 18297 no := b.Succs[1] 18298 b.Kind = BlockFirst 18299 b.SetControl(nil) 18300 _ = yes 18301 _ = no 18302 return true 18303 } 18304 // match: (LT (FlagGT) yes no) 18305 // cond: 18306 // result: (First nil no yes) 18307 for { 18308 v := b.Control 18309 if v.Op != OpS390XFlagGT { 18310 break 18311 } 18312 yes := b.Succs[0] 18313 no := b.Succs[1] 18314 b.Kind = BlockFirst 18315 b.SetControl(nil) 18316 b.swapSuccessors() 18317 _ = no 18318 _ = yes 18319 return true 18320 } 18321 case BlockS390XNE: 18322 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18323 // cond: 18324 // result: (LT cmp yes no) 18325 for { 18326 v := b.Control 18327 if v.Op != OpS390XCMPWconst { 18328 break 18329 } 18330 if v.AuxInt != 0 { 18331 break 18332 } 18333 v_0 := v.Args[0] 18334 if v_0.Op != OpS390XMOVDLT { 18335 break 18336 } 18337 v_0_0 := v_0.Args[0] 18338 if v_0_0.Op != OpS390XMOVDconst { 18339 break 18340 } 18341 if v_0_0.AuxInt != 0 { 18342 break 18343 } 18344 v_0_1 := v_0.Args[1] 18345 if v_0_1.Op != OpS390XMOVDconst { 18346 break 18347 } 18348 if v_0_1.AuxInt != 1 { 18349 break 18350 } 18351 cmp := v_0.Args[2] 18352 yes := b.Succs[0] 18353 no := b.Succs[1] 18354 b.Kind = BlockS390XLT 18355 b.SetControl(cmp) 18356 _ = yes 18357 _ = no 18358 return true 18359 } 18360 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18361 // cond: 18362 // result: (LE cmp yes no) 18363 for { 18364 v := b.Control 18365 if v.Op != OpS390XCMPWconst { 18366 break 18367 } 18368 if v.AuxInt != 0 { 18369 break 18370 } 18371 v_0 := v.Args[0] 18372 if v_0.Op != OpS390XMOVDLE { 18373 break 18374 } 18375 v_0_0 := v_0.Args[0] 18376 if v_0_0.Op != OpS390XMOVDconst { 18377 break 18378 } 18379 if v_0_0.AuxInt != 0 { 18380 break 18381 } 18382 v_0_1 := v_0.Args[1] 18383 if v_0_1.Op != OpS390XMOVDconst { 18384 break 18385 } 18386 if v_0_1.AuxInt != 1 { 18387 break 18388 } 18389 cmp := v_0.Args[2] 18390 yes := b.Succs[0] 18391 no := b.Succs[1] 18392 b.Kind = BlockS390XLE 18393 b.SetControl(cmp) 18394 _ = yes 18395 _ = no 18396 return true 18397 } 18398 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18399 // cond: 18400 // result: (GT cmp yes no) 18401 for { 18402 v := b.Control 18403 if v.Op != OpS390XCMPWconst { 18404 break 18405 } 18406 if v.AuxInt != 0 { 18407 break 18408 } 18409 v_0 := v.Args[0] 18410 if v_0.Op != OpS390XMOVDGT { 18411 break 18412 } 18413 v_0_0 := v_0.Args[0] 18414 if v_0_0.Op != OpS390XMOVDconst { 18415 break 18416 } 18417 if v_0_0.AuxInt != 0 { 18418 break 18419 } 18420 v_0_1 := v_0.Args[1] 18421 if v_0_1.Op != OpS390XMOVDconst { 18422 break 18423 } 18424 if v_0_1.AuxInt != 1 { 18425 break 18426 } 18427 cmp := v_0.Args[2] 18428 yes := b.Succs[0] 18429 no := b.Succs[1] 18430 b.Kind = BlockS390XGT 18431 b.SetControl(cmp) 18432 _ = yes 18433 _ = no 18434 return true 18435 } 18436 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18437 // cond: 18438 // result: (GE cmp yes no) 18439 for { 18440 v := b.Control 18441 if v.Op != OpS390XCMPWconst { 18442 break 18443 } 18444 if v.AuxInt != 0 { 18445 break 18446 } 18447 v_0 := v.Args[0] 18448 if v_0.Op != OpS390XMOVDGE { 18449 break 18450 } 18451 v_0_0 := v_0.Args[0] 18452 if v_0_0.Op != OpS390XMOVDconst { 18453 break 18454 } 18455 if v_0_0.AuxInt != 0 { 18456 break 18457 } 18458 v_0_1 := v_0.Args[1] 18459 if v_0_1.Op != OpS390XMOVDconst { 18460 break 18461 } 18462 if v_0_1.AuxInt != 1 { 18463 break 18464 } 18465 cmp := v_0.Args[2] 18466 yes := b.Succs[0] 18467 no := b.Succs[1] 18468 b.Kind = BlockS390XGE 18469 b.SetControl(cmp) 18470 _ = yes 18471 _ = no 18472 return true 18473 } 18474 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18475 // cond: 18476 // result: (EQ cmp yes no) 18477 for { 18478 v := b.Control 18479 if v.Op != OpS390XCMPWconst { 18480 break 18481 } 18482 if v.AuxInt != 0 { 18483 break 18484 } 18485 v_0 := v.Args[0] 18486 if v_0.Op != OpS390XMOVDEQ { 18487 break 18488 } 18489 v_0_0 := v_0.Args[0] 18490 if v_0_0.Op != OpS390XMOVDconst { 18491 break 18492 } 18493 if v_0_0.AuxInt != 0 { 18494 break 18495 } 18496 v_0_1 := v_0.Args[1] 18497 if v_0_1.Op != OpS390XMOVDconst { 18498 break 18499 } 18500 if v_0_1.AuxInt != 1 { 18501 break 18502 } 18503 cmp := v_0.Args[2] 18504 yes := b.Succs[0] 18505 no := b.Succs[1] 18506 b.Kind = BlockS390XEQ 18507 b.SetControl(cmp) 18508 _ = yes 18509 _ = no 18510 return true 18511 } 18512 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18513 // cond: 18514 // result: (NE cmp yes no) 18515 for { 18516 v := b.Control 18517 if v.Op != OpS390XCMPWconst { 18518 break 18519 } 18520 if v.AuxInt != 0 { 18521 break 18522 } 18523 v_0 := v.Args[0] 18524 if v_0.Op != OpS390XMOVDNE { 18525 break 18526 } 18527 v_0_0 := v_0.Args[0] 18528 if v_0_0.Op != OpS390XMOVDconst { 18529 break 18530 } 18531 if v_0_0.AuxInt != 0 { 18532 break 18533 } 18534 v_0_1 := v_0.Args[1] 18535 if v_0_1.Op != OpS390XMOVDconst { 18536 break 18537 } 18538 if v_0_1.AuxInt != 1 { 18539 break 18540 } 18541 cmp := v_0.Args[2] 18542 yes := b.Succs[0] 18543 no := b.Succs[1] 18544 b.Kind = BlockS390XNE 18545 b.SetControl(cmp) 18546 _ = yes 18547 _ = no 18548 return true 18549 } 18550 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18551 // cond: 18552 // result: (GTF cmp yes no) 18553 for { 18554 v := b.Control 18555 if v.Op != OpS390XCMPWconst { 18556 break 18557 } 18558 if v.AuxInt != 0 { 18559 break 18560 } 18561 v_0 := v.Args[0] 18562 if v_0.Op != OpS390XMOVDGTnoinv { 18563 break 18564 } 18565 v_0_0 := v_0.Args[0] 18566 if v_0_0.Op != OpS390XMOVDconst { 18567 break 18568 } 18569 if v_0_0.AuxInt != 0 { 18570 break 18571 } 18572 v_0_1 := v_0.Args[1] 18573 if v_0_1.Op != OpS390XMOVDconst { 18574 break 18575 } 18576 if v_0_1.AuxInt != 1 { 18577 break 18578 } 18579 cmp := v_0.Args[2] 18580 yes := b.Succs[0] 18581 no := b.Succs[1] 18582 b.Kind = BlockS390XGTF 18583 b.SetControl(cmp) 18584 _ = yes 18585 _ = no 18586 return true 18587 } 18588 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18589 // cond: 18590 // result: (GEF cmp yes no) 18591 for { 18592 v := b.Control 18593 if v.Op != OpS390XCMPWconst { 18594 break 18595 } 18596 if v.AuxInt != 0 { 18597 break 18598 } 18599 v_0 := v.Args[0] 18600 if v_0.Op != OpS390XMOVDGEnoinv { 18601 break 18602 } 18603 v_0_0 := v_0.Args[0] 18604 if v_0_0.Op != OpS390XMOVDconst { 18605 break 18606 } 18607 if v_0_0.AuxInt != 0 { 18608 break 18609 } 18610 v_0_1 := v_0.Args[1] 18611 if v_0_1.Op != OpS390XMOVDconst { 18612 break 18613 } 18614 if v_0_1.AuxInt != 1 { 18615 break 18616 } 18617 cmp := v_0.Args[2] 18618 yes := b.Succs[0] 18619 no := b.Succs[1] 18620 b.Kind = BlockS390XGEF 18621 b.SetControl(cmp) 18622 _ = yes 18623 _ = no 18624 return true 18625 } 18626 // match: (NE (InvertFlags cmp) yes no) 18627 // cond: 18628 // result: (NE cmp yes no) 18629 for { 18630 v := b.Control 18631 if v.Op != OpS390XInvertFlags { 18632 break 18633 } 18634 cmp := v.Args[0] 18635 yes := b.Succs[0] 18636 no := b.Succs[1] 18637 b.Kind = BlockS390XNE 18638 b.SetControl(cmp) 18639 _ = yes 18640 _ = no 18641 return true 18642 } 18643 // match: (NE (FlagEQ) yes no) 18644 // cond: 18645 // result: (First nil no yes) 18646 for { 18647 v := b.Control 18648 if v.Op != OpS390XFlagEQ { 18649 break 18650 } 18651 yes := b.Succs[0] 18652 no := b.Succs[1] 18653 b.Kind = BlockFirst 18654 b.SetControl(nil) 18655 b.swapSuccessors() 18656 _ = no 18657 _ = yes 18658 return true 18659 } 18660 // match: (NE (FlagLT) yes no) 18661 // cond: 18662 // result: (First nil yes no) 18663 for { 18664 v := b.Control 18665 if v.Op != OpS390XFlagLT { 18666 break 18667 } 18668 yes := b.Succs[0] 18669 no := b.Succs[1] 18670 b.Kind = BlockFirst 18671 b.SetControl(nil) 18672 _ = yes 18673 _ = no 18674 return true 18675 } 18676 // match: (NE (FlagGT) yes no) 18677 // cond: 18678 // result: (First nil yes no) 18679 for { 18680 v := b.Control 18681 if v.Op != OpS390XFlagGT { 18682 break 18683 } 18684 yes := b.Succs[0] 18685 no := b.Succs[1] 18686 b.Kind = BlockFirst 18687 b.SetControl(nil) 18688 _ = yes 18689 _ = no 18690 return true 18691 } 18692 } 18693 return false 18694 }