github.com/FenixAra/go@v0.0.0-20170127160404-96ea0918e670/src/cmd/internal/obj/arm/a.out.go (about) 1 // Inferno utils/5c/5.out.h 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/utils/5c/5.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm 32 33 import "cmd/internal/obj" 34 35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm 36 37 const ( 38 NSNAME = 8 39 NSYM = 50 40 NREG = 16 41 ) 42 43 /* -1 disables use of REGARG */ 44 const ( 45 REGARG = -1 46 ) 47 48 const ( 49 REG_R0 = obj.RBaseARM + iota // must be 16-aligned 50 REG_R1 51 REG_R2 52 REG_R3 53 REG_R4 54 REG_R5 55 REG_R6 56 REG_R7 57 REG_R8 58 REG_R9 59 REG_R10 60 REG_R11 61 REG_R12 62 REG_R13 63 REG_R14 64 REG_R15 65 66 REG_F0 // must be 16-aligned 67 REG_F1 68 REG_F2 69 REG_F3 70 REG_F4 71 REG_F5 72 REG_F6 73 REG_F7 74 REG_F8 75 REG_F9 76 REG_F10 77 REG_F11 78 REG_F12 79 REG_F13 80 REG_F14 81 REG_F15 82 83 REG_FPSR // must be 2-aligned 84 REG_FPCR 85 86 REG_CPSR // must be 2-aligned 87 REG_SPSR 88 89 MAXREG 90 REGRET = REG_R0 91 /* compiler allocates R1 up as temps */ 92 /* compiler allocates register variables R3 up */ 93 /* compiler allocates external registers R10 down */ 94 REGEXT = REG_R10 95 /* these two registers are declared in runtime.h */ 96 REGG = REGEXT - 0 97 REGM = REGEXT - 1 98 99 REGCTXT = REG_R7 100 REGTMP = REG_R11 101 REGSP = REG_R13 102 REGLINK = REG_R14 103 REGPC = REG_R15 104 105 NFREG = 16 106 /* compiler allocates register variables F0 up */ 107 /* compiler allocates external registers F7 down */ 108 FREGRET = REG_F0 109 FREGEXT = REG_F7 110 FREGTMP = REG_F15 111 ) 112 113 const ( 114 C_NONE = iota 115 C_REG 116 C_REGREG 117 C_REGREG2 118 C_REGLIST 119 C_SHIFT 120 C_FREG 121 C_PSR 122 C_FCR 123 124 C_RCON /* 0xff rotated */ 125 C_NCON /* ~RCON */ 126 C_SCON /* 0xffff */ 127 C_LCON 128 C_LCONADDR 129 C_ZFCON 130 C_SFCON 131 C_LFCON 132 133 C_RACON 134 C_LACON 135 136 C_SBRA 137 C_LBRA 138 139 C_HAUTO /* halfword insn offset (-0xff to 0xff) */ 140 C_FAUTO /* float insn offset (0 to 0x3fc, word aligned) */ 141 C_HFAUTO /* both H and F */ 142 C_SAUTO /* -0xfff to 0xfff */ 143 C_LAUTO 144 145 C_HOREG 146 C_FOREG 147 C_HFOREG 148 C_SOREG 149 C_ROREG 150 C_SROREG /* both nil and R */ 151 C_LOREG 152 153 C_PC 154 C_SP 155 C_HREG 156 157 C_ADDR /* reference to relocatable address */ 158 159 // TLS "var" in local exec mode: will become a constant offset from 160 // thread local base that is ultimately chosen by the program linker. 161 C_TLS_LE 162 163 // TLS "var" in initial exec mode: will become a memory address (chosen 164 // by the program linker) that the dynamic linker will fill with the 165 // offset from the thread local base. 166 C_TLS_IE 167 168 C_TEXTSIZE 169 170 C_GOK 171 172 C_NCLASS /* must be the last */ 173 ) 174 175 const ( 176 AAND = obj.ABaseARM + obj.A_ARCHSPECIFIC + iota 177 AEOR 178 ASUB 179 ARSB 180 AADD 181 AADC 182 ASBC 183 ARSC 184 ATST 185 ATEQ 186 ACMP 187 ACMN 188 AORR 189 ABIC 190 191 AMVN 192 193 /* 194 * Do not reorder or fragment the conditional branch 195 * opcodes, or the predication code will break 196 */ 197 ABEQ 198 ABNE 199 ABCS 200 ABHS 201 ABCC 202 ABLO 203 ABMI 204 ABPL 205 ABVS 206 ABVC 207 ABHI 208 ABLS 209 ABGE 210 ABLT 211 ABGT 212 ABLE 213 214 AMOVWD 215 AMOVWF 216 AMOVDW 217 AMOVFW 218 AMOVFD 219 AMOVDF 220 AMOVF 221 AMOVD 222 223 ACMPF 224 ACMPD 225 AADDF 226 AADDD 227 ASUBF 228 ASUBD 229 AMULF 230 AMULD 231 ADIVF 232 ADIVD 233 ASQRTF 234 ASQRTD 235 AABSF 236 AABSD 237 ANEGF 238 ANEGD 239 240 ASRL 241 ASRA 242 ASLL 243 AMULU 244 ADIVU 245 AMUL 246 ADIV 247 AMOD 248 AMODU 249 250 AMOVB 251 AMOVBS 252 AMOVBU 253 AMOVH 254 AMOVHS 255 AMOVHU 256 AMOVW 257 AMOVM 258 ASWPBU 259 ASWPW 260 261 ARFE 262 ASWI 263 AMULA 264 265 AWORD 266 267 AMULL 268 AMULAL 269 AMULLU 270 AMULALU 271 272 ABX 273 ABXRET 274 ADWORD 275 276 ALDREX 277 ASTREX 278 ALDREXD 279 ASTREXD 280 281 APLD 282 283 ACLZ 284 285 AMULWT 286 AMULWB 287 AMULAWT 288 AMULAWB 289 290 ADATABUNDLE 291 ADATABUNDLEEND 292 293 AMRC // MRC/MCR 294 295 ALAST 296 297 // aliases 298 AB = obj.AJMP 299 ABL = obj.ACALL 300 ) 301 302 /* scond byte */ 303 const ( 304 C_SCOND = (1 << 4) - 1 305 C_SBIT = 1 << 4 306 C_PBIT = 1 << 5 307 C_WBIT = 1 << 6 308 C_FBIT = 1 << 7 /* psr flags-only */ 309 C_UBIT = 1 << 7 /* up bit, unsigned bit */ 310 311 // These constants are the ARM condition codes encodings, 312 // XORed with 14 so that C_SCOND_NONE has value 0, 313 // so that a zeroed Prog.scond means "always execute". 314 C_SCOND_XOR = 14 315 316 C_SCOND_EQ = 0 ^ C_SCOND_XOR 317 C_SCOND_NE = 1 ^ C_SCOND_XOR 318 C_SCOND_HS = 2 ^ C_SCOND_XOR 319 C_SCOND_LO = 3 ^ C_SCOND_XOR 320 C_SCOND_MI = 4 ^ C_SCOND_XOR 321 C_SCOND_PL = 5 ^ C_SCOND_XOR 322 C_SCOND_VS = 6 ^ C_SCOND_XOR 323 C_SCOND_VC = 7 ^ C_SCOND_XOR 324 C_SCOND_HI = 8 ^ C_SCOND_XOR 325 C_SCOND_LS = 9 ^ C_SCOND_XOR 326 C_SCOND_GE = 10 ^ C_SCOND_XOR 327 C_SCOND_LT = 11 ^ C_SCOND_XOR 328 C_SCOND_GT = 12 ^ C_SCOND_XOR 329 C_SCOND_LE = 13 ^ C_SCOND_XOR 330 C_SCOND_NONE = 14 ^ C_SCOND_XOR 331 C_SCOND_NV = 15 ^ C_SCOND_XOR 332 333 /* D_SHIFT type */ 334 SHIFT_LL = 0 << 5 335 SHIFT_LR = 1 << 5 336 SHIFT_AR = 2 << 5 337 SHIFT_RR = 3 << 5 338 )