github.com/FenixAra/go@v0.0.0-20170127160404-96ea0918e670/src/cmd/internal/obj/mips/a.out.go (about) 1 // cmd/9c/9.out.h from Vita Nuova. 2 // 3 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 4 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 5 // Portions Copyright © 1997-1999 Vita Nuova Limited 6 // Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) 7 // Portions Copyright © 2004,2006 Bruce Ellis 8 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 9 // Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others 10 // Portions Copyright © 2009 The Go Authors. All rights reserved. 11 // 12 // Permission is hereby granted, free of charge, to any person obtaining a copy 13 // of this software and associated documentation files (the "Software"), to deal 14 // in the Software without restriction, including without limitation the rights 15 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 16 // copies of the Software, and to permit persons to whom the Software is 17 // furnished to do so, subject to the following conditions: 18 // 19 // The above copyright notice and this permission notice shall be included in 20 // all copies or substantial portions of the Software. 21 // 22 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 25 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 27 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 28 // THE SOFTWARE. 29 30 package mips 31 32 import "cmd/internal/obj" 33 34 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p mips 35 36 /* 37 * mips 64 38 */ 39 const ( 40 NSNAME = 8 41 NSYM = 50 42 NREG = 32 /* number of general registers */ 43 NFREG = 32 /* number of floating point registers */ 44 ) 45 46 const ( 47 REG_R0 = obj.RBaseMIPS + iota 48 REG_R1 49 REG_R2 50 REG_R3 51 REG_R4 52 REG_R5 53 REG_R6 54 REG_R7 55 REG_R8 56 REG_R9 57 REG_R10 58 REG_R11 59 REG_R12 60 REG_R13 61 REG_R14 62 REG_R15 63 REG_R16 64 REG_R17 65 REG_R18 66 REG_R19 67 REG_R20 68 REG_R21 69 REG_R22 70 REG_R23 71 REG_R24 72 REG_R25 73 REG_R26 74 REG_R27 75 REG_R28 76 REG_R29 77 REG_R30 78 REG_R31 79 80 REG_F0 81 REG_F1 82 REG_F2 83 REG_F3 84 REG_F4 85 REG_F5 86 REG_F6 87 REG_F7 88 REG_F8 89 REG_F9 90 REG_F10 91 REG_F11 92 REG_F12 93 REG_F13 94 REG_F14 95 REG_F15 96 REG_F16 97 REG_F17 98 REG_F18 99 REG_F19 100 REG_F20 101 REG_F21 102 REG_F22 103 REG_F23 104 REG_F24 105 REG_F25 106 REG_F26 107 REG_F27 108 REG_F28 109 REG_F29 110 REG_F30 111 REG_F31 112 113 REG_HI 114 REG_LO 115 116 // co-processor 0 control registers 117 REG_M0 118 REG_M1 119 REG_M2 120 REG_M3 121 REG_M4 122 REG_M5 123 REG_M6 124 REG_M7 125 REG_M8 126 REG_M9 127 REG_M10 128 REG_M11 129 REG_M12 130 REG_M13 131 REG_M14 132 REG_M15 133 REG_M16 134 REG_M17 135 REG_M18 136 REG_M19 137 REG_M20 138 REG_M21 139 REG_M22 140 REG_M23 141 REG_M24 142 REG_M25 143 REG_M26 144 REG_M27 145 REG_M28 146 REG_M29 147 REG_M30 148 REG_M31 149 150 // FPU control registers 151 REG_FCR0 152 REG_FCR1 153 REG_FCR2 154 REG_FCR3 155 REG_FCR4 156 REG_FCR5 157 REG_FCR6 158 REG_FCR7 159 REG_FCR8 160 REG_FCR9 161 REG_FCR10 162 REG_FCR11 163 REG_FCR12 164 REG_FCR13 165 REG_FCR14 166 REG_FCR15 167 REG_FCR16 168 REG_FCR17 169 REG_FCR18 170 REG_FCR19 171 REG_FCR20 172 REG_FCR21 173 REG_FCR22 174 REG_FCR23 175 REG_FCR24 176 REG_FCR25 177 REG_FCR26 178 REG_FCR27 179 REG_FCR28 180 REG_FCR29 181 REG_FCR30 182 REG_FCR31 183 184 REG_LAST = REG_FCR31 // the last defined register 185 186 REG_SPECIAL = REG_M0 187 188 REGZERO = REG_R0 /* set to zero */ 189 REGSP = REG_R29 190 REGSB = REG_R28 191 REGLINK = REG_R31 192 REGRET = REG_R1 193 REGARG = -1 /* -1 disables passing the first argument in register */ 194 REGRT1 = REG_R1 /* reserved for runtime, duffzero and duffcopy */ 195 REGRT2 = REG_R2 /* reserved for runtime, duffcopy */ 196 REGCTXT = REG_R22 /* context for closures */ 197 REGG = REG_R30 /* G */ 198 REGTMP = REG_R23 /* used by the linker */ 199 FREGRET = REG_F0 200 ) 201 202 const ( 203 BIG = 32766 204 ) 205 206 const ( 207 /* mark flags */ 208 FOLL = 1 << 0 209 LABEL = 1 << 1 210 LEAF = 1 << 2 211 SYNC = 1 << 3 212 BRANCH = 1 << 4 213 LOAD = 1 << 5 214 FCMP = 1 << 6 215 NOSCHED = 1 << 7 216 217 NSCHED = 20 218 ) 219 220 const ( 221 Mips32 = 32 222 Mips64 = 64 223 ) 224 225 const ( 226 C_NONE = iota 227 C_REG 228 C_FREG 229 C_FCREG 230 C_MREG /* special processor register */ 231 C_HI 232 C_LO 233 C_ZCON 234 C_SCON /* 16 bit signed */ 235 C_UCON /* 32 bit signed, low 16 bits 0 */ 236 C_ADD0CON 237 C_AND0CON 238 C_ADDCON /* -0x8000 <= v < 0 */ 239 C_ANDCON /* 0 < v <= 0xFFFF */ 240 C_LCON /* other 32 */ 241 C_DCON /* other 64 (could subdivide further) */ 242 C_SACON /* $n(REG) where n <= int16 */ 243 C_SECON 244 C_LACON /* $n(REG) where int16 < n <= int32 */ 245 C_LECON 246 C_DACON /* $n(REG) where int32 < n */ 247 C_STCON /* $tlsvar */ 248 C_SBRA 249 C_LBRA 250 C_SAUTO 251 C_LAUTO 252 C_SEXT 253 C_LEXT 254 C_ZOREG 255 C_SOREG 256 C_LOREG 257 C_GOK 258 C_ADDR 259 C_TLS 260 C_TEXTSIZE 261 262 C_NCLASS /* must be the last */ 263 ) 264 265 const ( 266 AABSD = obj.ABaseMIPS + obj.A_ARCHSPECIFIC + iota 267 AABSF 268 AABSW 269 AADD 270 AADDD 271 AADDF 272 AADDU 273 AADDW 274 AAND 275 ABEQ 276 ABFPF 277 ABFPT 278 ABGEZ 279 ABGEZAL 280 ABGTZ 281 ABLEZ 282 ABLTZ 283 ABLTZAL 284 ABNE 285 ABREAK 286 ACLO 287 ACLZ 288 ACMOVF 289 ACMOVN 290 ACMOVT 291 ACMOVZ 292 ACMPEQD 293 ACMPEQF 294 ACMPGED 295 ACMPGEF 296 ACMPGTD 297 ACMPGTF 298 ADIV 299 ADIVD 300 ADIVF 301 ADIVU 302 ADIVW 303 AGOK 304 ALL 305 ALUI 306 AMOVB 307 AMOVBU 308 AMOVD 309 AMOVDF 310 AMOVDW 311 AMOVF 312 AMOVFD 313 AMOVFW 314 AMOVH 315 AMOVHU 316 AMOVW 317 AMOVWD 318 AMOVWF 319 AMOVWL 320 AMOVWR 321 AMUL 322 AMULD 323 AMULF 324 AMULU 325 AMULW 326 ANEGD 327 ANEGF 328 ANEGW 329 ANOR 330 AOR 331 AREM 332 AREMU 333 ARFE 334 ASC 335 ASGT 336 ASGTU 337 ASLL 338 ASQRTD 339 ASQRTF 340 ASRA 341 ASRL 342 ASUB 343 ASUBD 344 ASUBF 345 ASUBU 346 ASUBW 347 ASYNC 348 ASYSCALL 349 ATEQ 350 ATLBP 351 ATLBR 352 ATLBWI 353 ATLBWR 354 ATNE 355 AWORD 356 AXOR 357 358 /* 64-bit */ 359 AMOVV 360 AMOVVL 361 AMOVVR 362 ASLLV 363 ASRAV 364 ASRLV 365 ADIVV 366 ADIVVU 367 AREMV 368 AREMVU 369 AMULV 370 AMULVU 371 AADDV 372 AADDVU 373 ASUBV 374 ASUBVU 375 376 /* 64-bit FP */ 377 ATRUNCFV 378 ATRUNCDV 379 ATRUNCFW 380 ATRUNCDW 381 AMOVWU 382 AMOVFV 383 AMOVDV 384 AMOVVF 385 AMOVVD 386 387 ALAST 388 389 // aliases 390 AJMP = obj.AJMP 391 AJAL = obj.ACALL 392 ARET = obj.ARET 393 )