github.com/JimmyHuang454/JLS-go@v0.0.0-20230831150107-90d536585ba0/cpu/cpu_arm64.go (about)

     1  // Copyright 2017 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  package cpu
     6  
     7  // CacheLinePadSize is used to prevent false sharing of cache lines.
     8  // We choose 128 because Apple Silicon, a.k.a. M1, has 128-byte cache line size.
     9  // It doesn't cost much and is much more future-proof.
    10  const CacheLinePadSize = 128
    11  
    12  func doinit() {
    13  	options = []option{
    14  		{Name: "aes", Feature: &ARM64.HasAES},
    15  		{Name: "pmull", Feature: &ARM64.HasPMULL},
    16  		{Name: "sha1", Feature: &ARM64.HasSHA1},
    17  		{Name: "sha2", Feature: &ARM64.HasSHA2},
    18  		{Name: "sha512", Feature: &ARM64.HasSHA512},
    19  		{Name: "crc32", Feature: &ARM64.HasCRC32},
    20  		{Name: "atomics", Feature: &ARM64.HasATOMICS},
    21  		{Name: "cpuid", Feature: &ARM64.HasCPUID},
    22  		{Name: "isNeoverseN1", Feature: &ARM64.IsNeoverseN1},
    23  		{Name: "isNeoverseV1", Feature: &ARM64.IsNeoverseV1},
    24  	}
    25  
    26  	// arm64 uses different ways to detect CPU features at runtime depending on the operating system.
    27  	osInit()
    28  }
    29  
    30  func getisar0() uint64
    31  
    32  func getMIDR() uint64
    33  
    34  func extractBits(data uint64, start, end uint) uint {
    35  	return (uint)(data>>start) & ((1 << (end - start + 1)) - 1)
    36  }
    37  
    38  func parseARM64SystemRegisters(isar0 uint64) {
    39  	// ID_AA64ISAR0_EL1
    40  	switch extractBits(isar0, 4, 7) {
    41  	case 1:
    42  		ARM64.HasAES = true
    43  	case 2:
    44  		ARM64.HasAES = true
    45  		ARM64.HasPMULL = true
    46  	}
    47  
    48  	switch extractBits(isar0, 8, 11) {
    49  	case 1:
    50  		ARM64.HasSHA1 = true
    51  	}
    52  
    53  	switch extractBits(isar0, 12, 15) {
    54  	case 1:
    55  		ARM64.HasSHA2 = true
    56  	case 2:
    57  		ARM64.HasSHA2 = true
    58  		ARM64.HasSHA512 = true
    59  	}
    60  
    61  	switch extractBits(isar0, 16, 19) {
    62  	case 1:
    63  		ARM64.HasCRC32 = true
    64  	}
    65  
    66  	switch extractBits(isar0, 20, 23) {
    67  	case 2:
    68  		ARM64.HasATOMICS = true
    69  	}
    70  }