github.com/MerlinKodo/gvisor@v0.0.0-20231110090155-957f62ecf90e/pkg/abi/nvgpu/ctrl.go (about) 1 // Copyright 2023 The gVisor Authors. 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 package nvgpu 16 17 // From src/nvidia/interface/deprecated/rmapi_deprecated.h: 18 const ( 19 RM_GSS_LEGACY_MASK = 0x00008000 20 ) 21 22 // From src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h: 23 24 // +marshal 25 type NVXXXX_CTRL_XXX_INFO struct { 26 Index uint32 27 Data uint32 28 } 29 30 // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000client.h: 31 const ( 32 NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE = 0xd01 33 NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY = 0xd04 34 ) 35 36 // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h: 37 const ( 38 NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS = 0x201 39 NV0000_CTRL_CMD_GPU_GET_ID_INFO = 0x202 40 NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2 = 0x205 41 NV0000_CTRL_CMD_GPU_GET_PROBED_IDS = 0x214 42 NV0000_CTRL_CMD_GPU_ATTACH_IDS = 0x215 43 NV0000_CTRL_CMD_GPU_DETACH_IDS = 0x216 44 NV0000_CTRL_CMD_GPU_GET_PCI_INFO = 0x21b 45 NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE = 0x279 46 NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE = 0x27b 47 ) 48 49 // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000syncgpuboost.h: 50 const ( 51 NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO = 0xa04 52 ) 53 54 // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h: 55 const ( 56 NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION = 0x101 57 NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS = 0x127 58 NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS = 0x136 59 NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX = 0x13a 60 ) 61 62 // +marshal 63 type NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS struct { 64 SizeOfStrings uint32 65 Pad [4]byte 66 PDriverVersionBuffer P64 67 PVersionBuffer P64 68 PTitleBuffer P64 69 ChangelistNumber uint32 70 OfficialChangelistNumber uint32 71 } 72 73 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fb.h: 74 const ( 75 NV0080_CTRL_CMD_FB_GET_CAPS_V2 = 0x801307 76 ) 77 78 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h: 79 const ( 80 NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST = 0x80170d 81 ) 82 83 // +marshal 84 type NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS struct { 85 NumChannels uint32 86 Pad [4]byte 87 PChannelHandleList P64 88 PChannelList P64 89 } 90 91 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h: 92 const ( 93 NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES = 0x800280 94 NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE = 0x800288 95 NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE = 0x800289 96 NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2 = 0x800292 97 ) 98 99 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gr.h: 100 101 // +marshal 102 type NV0080_CTRL_GR_ROUTE_INFO struct { 103 Flags uint32 104 Pad [4]byte 105 Route uint64 106 } 107 108 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080host.h: 109 const ( 110 NV0080_CTRL_CMD_HOST_GET_CAPS_V2 = 0x801402 111 ) 112 113 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h: 114 const ( 115 NV2080_CTRL_CMD_BUS_GET_PCI_INFO = 0x20801801 116 NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO = 0x20801803 117 NV2080_CTRL_CMD_BUS_GET_INFO_V2 = 0x20801823 118 NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS = 0x2080182a 119 ) 120 121 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h: 122 const ( 123 NV2080_CTRL_CMD_CE_GET_ALL_CAPS = 0x20802a0a 124 ) 125 126 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h: 127 const ( 128 NV2080_CTRL_CMD_FB_GET_INFO_V2 = 0x20801303 129 ) 130 131 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h: 132 const ( 133 NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS = 0x2080110b 134 135 NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES = 64 136 ) 137 138 // +marshal 139 type NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS struct { 140 BDisable uint8 141 Pad1 [3]byte 142 NumChannels uint32 143 BOnlyDisableScheduling uint8 144 BRewindGpPut uint8 145 Pad2 [6]byte 146 PRunlistPreemptEvent P64 147 HClientList [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle 148 HChannelList [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle 149 } 150 151 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h: 152 const ( 153 NV2080_CTRL_CMD_GPU_GET_INFO_V2 = 0x20800102 154 NV2080_CTRL_CMD_GPU_GET_NAME_STRING = 0x20800110 155 NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING = 0x20800111 156 NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO = 0x20800119 157 NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS = 0x2080012f 158 NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES = 0x20800131 159 NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION = 0x20800145 // undocumented; paramSize == 0 160 NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION = 0x20800146 // undocumented; paramSize == 0 161 NV2080_CTRL_CMD_GPU_GET_GID_INFO = 0x2080014a 162 NV2080_CTRL_CMD_GPU_GET_ENGINES_V2 = 0x20800170 163 NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS = 0x2080018b 164 NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG = 0x20800195 165 NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO = 0x208001a3 166 ) 167 168 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h: 169 const ( 170 NV2080_CTRL_CMD_GR_GET_INFO = 0x20801201 171 NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE = 0x20801210 172 NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE = 0x20801218 173 NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER = 0x2080121b 174 NV2080_CTRL_CMD_GR_GET_CAPS_V2 = 0x20801227 175 NV2080_CTRL_CMD_GR_GET_GPC_MASK = 0x2080122a 176 NV2080_CTRL_CMD_GR_GET_TPC_MASK = 0x2080122b 177 ) 178 179 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h: 180 const ( 181 NV2080_CTRL_CMD_GSP_GET_FEATURES = 0x20803601 182 ) 183 184 // +marshal 185 type NV2080_CTRL_GR_GET_INFO_PARAMS struct { 186 GRInfoListSize uint32 // in elements 187 Pad [4]byte 188 GRInfoList P64 189 GRRouteInfo NV0080_CTRL_GR_ROUTE_INFO 190 } 191 192 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h: 193 const ( 194 NV2080_CTRL_CMD_MC_GET_ARCH_INFO = 0x20801701 195 NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS = 0x20801702 196 ) 197 198 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h: 199 const ( 200 NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS = 0x20803002 201 ) 202 203 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080perf.h: 204 const ( 205 NV2080_CTRL_CMD_PERF_BOOST = 0x2080200a 206 ) 207 208 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080rc.h: 209 const ( 210 NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO = 0x20802209 211 NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS = 0x2080220c 212 NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG = 0x20802210 213 ) 214 215 // From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080tmr.h: 216 const ( 217 NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO = 0x20800406 218 ) 219 220 // From src/common/sdk/nvidia/inc/ctrl/ctrl503c.h: 221 const ( 222 NV503C_CTRL_CMD_REGISTER_VA_SPACE = 0x503c0102 223 NV503C_CTRL_CMD_REGISTER_VIDMEM = 0x503c0104 224 NV503C_CTRL_CMD_UNREGISTER_VIDMEM = 0x503c0105 225 ) 226 227 // From src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h: 228 const ( 229 NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK = 0x83de0309 230 NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES = 0x83de030c 231 NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES = 0x83de0310 232 ) 233 234 // From src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h: 235 const ( 236 NVC36F_CTRL_GET_CLASS_ENGINEID = 0xc36f0101 237 NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN = 0xc36f0108 238 ) 239 240 // From src/common/sdk/nvidia/inc/ctrl/ctrl906f.h: 241 const ( 242 NV906F_CTRL_CMD_RESET_CHANNEL = 0x906f0102 243 ) 244 245 // From src/common/sdk/nvidia/inc/ctrl/ctrl90e6.h: 246 const ( 247 NV90E6_CTRL_CMD_MASTER_GET_ERROR_INTR_OFFSET_MASK = 0x90e60101 248 NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK = 0x90e60102 249 ) 250 251 // From src/common/sdk/nvidia/inc/ctrl/ctrla06c.h: 252 const ( 253 NVA06C_CTRL_CMD_GPFIFO_SCHEDULE = 0xa06c0101 254 NVA06C_CTRL_CMD_SET_TIMESLICE = 0xa06c0103 255 NVA06C_CTRL_CMD_PREEMPT = 0xa06c0105 256 )