github.com/SagerNet/gvisor@v0.0.0-20210707092255-7731c139d75c/pkg/ring0/aarch64.go (about)

     1  // Copyright 2019 The gVisor Authors.
     2  //
     3  // Licensed under the Apache License, Version 2.0 (the "License");
     4  // you may not use this file except in compliance with the License.
     5  // You may obtain a copy of the License at
     6  //
     7  //     http://www.apache.org/licenses/LICENSE-2.0
     8  //
     9  // Unless required by applicable law or agreed to in writing, software
    10  // distributed under the License is distributed on an "AS IS" BASIS,
    11  // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    12  // See the License for the specific language governing permissions and
    13  // limitations under the License.
    14  
    15  // +build arm64
    16  
    17  package ring0
    18  
    19  // Useful bits.
    20  const (
    21  	_PGD_PGT_BASE = 0x1000
    22  	_PGD_PGT_SIZE = 0x1000
    23  	_PUD_PGT_BASE = 0x2000
    24  	_PUD_PGT_SIZE = 0x1000
    25  	_PMD_PGT_BASE = 0x3000
    26  	_PMD_PGT_SIZE = 0x4000
    27  	_PTE_PGT_BASE = 0x7000
    28  	_PTE_PGT_SIZE = 0x1000
    29  )
    30  
    31  const (
    32  	// DAIF bits:debug, sError, IRQ, FIQ.
    33  	_PSR_D_BIT      = 0x00000200
    34  	_PSR_A_BIT      = 0x00000100
    35  	_PSR_I_BIT      = 0x00000080
    36  	_PSR_F_BIT      = 0x00000040
    37  	_PSR_DAIF_SHIFT = 6
    38  	_PSR_DAIF_MASK  = 0xf << _PSR_DAIF_SHIFT
    39  
    40  	// PSR bits.
    41  	_PSR_MODE_EL0t = 0x00000000
    42  	_PSR_MODE_EL1t = 0x00000004
    43  	_PSR_MODE_EL1h = 0x00000005
    44  	_PSR_MODE_MASK = 0x0000000f
    45  
    46  	PsrFlagsClear = _PSR_MODE_MASK | _PSR_DAIF_MASK
    47  	PsrModeMask   = _PSR_MODE_MASK
    48  
    49  	// KernelFlagsSet should always be set in the kernel.
    50  	KernelFlagsSet = _PSR_MODE_EL1h | _PSR_D_BIT | _PSR_A_BIT | _PSR_I_BIT | _PSR_F_BIT
    51  
    52  	// UserFlagsSet are always set in userspace.
    53  	UserFlagsSet = _PSR_MODE_EL0t
    54  )
    55  
    56  // Vector is an exception vector.
    57  type Vector uintptr
    58  
    59  // Exception vectors.
    60  const (
    61  	El1InvSync = iota
    62  	El1InvIrq
    63  	El1InvFiq
    64  	El1InvError
    65  
    66  	El1Sync
    67  	El1Irq
    68  	El1Fiq
    69  	El1Err
    70  
    71  	El0Sync
    72  	El0Irq
    73  	El0Fiq
    74  	El0Err
    75  
    76  	El0InvSync
    77  	El0InvIrq
    78  	El0InvFiq
    79  	El0InvErr
    80  
    81  	El1SyncDa
    82  	El1SyncIa
    83  	El1SyncSpPc
    84  	El1SyncUndef
    85  	El1SyncDbg
    86  	El1SyncInv
    87  
    88  	El0SyncSVC
    89  	El0SyncDa
    90  	El0SyncIa
    91  	El0SyncFpsimdAcc
    92  	El0SyncSveAcc
    93  	El0SyncFpsimdExc
    94  	El0SyncSys
    95  	El0SyncSpPc
    96  	El0SyncUndef
    97  	El0SyncDbg
    98  	El0SyncWfx
    99  	El0SyncInv
   100  
   101  	El0ErrNMI
   102  	El0ErrBounce
   103  
   104  	_NR_INTERRUPTS
   105  )
   106  
   107  // System call vectors.
   108  const (
   109  	Syscall                 Vector = El0SyncSVC
   110  	PageFault               Vector = El0SyncDa
   111  	VirtualizationException Vector = El0ErrBounce
   112  )
   113  
   114  // VirtualAddressBits returns the number bits available for virtual addresses.
   115  func VirtualAddressBits() uint32 {
   116  	return 48
   117  }
   118  
   119  // PhysicalAddressBits returns the number of bits available for physical addresses.
   120  func PhysicalAddressBits() uint32 {
   121  	return 40
   122  }