github.com/SagerNet/gvisor@v0.0.0-20210707092255-7731c139d75c/pkg/sentry/platform/kvm/testutil/testutil_arm64.s (about) 1 // Copyright 2019 The gVisor Authors. 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 // +build arm64 16 17 // test_util_arm64.s provides ARM64 test functions. 18 19 #include "funcdata.h" 20 #include "textflag.h" 21 22 #define SYS_GETPID 172 23 24 // This function simulates the getpid syscall. 25 TEXT ·Getpid(SB),NOSPLIT,$0 26 NO_LOCAL_POINTERS 27 MOVD $SYS_GETPID, R8 28 SVC 29 RET 30 31 TEXT ·Touch(SB),NOSPLIT,$0 32 start: 33 MOVD 0(R8), R1 34 MOVD $SYS_GETPID, R8 // getpid 35 SVC 36 B start 37 38 TEXT ·HaltLoop(SB),NOSPLIT,$0 39 start: 40 HLT 41 B start 42 43 // This function simulates a loop of syscall. 44 TEXT ·SyscallLoop(SB),NOSPLIT,$0 45 start: 46 SVC 47 B start 48 49 TEXT ·SpinLoop(SB),NOSPLIT,$0 50 start: 51 B start 52 53 TEXT ·TLSWorks(SB),NOSPLIT,$0-8 54 NO_LOCAL_POINTERS 55 MOVD $0x6789, R5 56 MSR R5, TPIDR_EL0 57 MOVD $SYS_GETPID, R8 // getpid 58 SVC 59 MRS TPIDR_EL0, R6 60 CMP R5, R6 61 BNE isNaN 62 MOVD $1, R0 63 MOVD R0, ret+0(FP) 64 RET 65 isNaN: 66 MOVD $0, ret+0(FP) 67 RET 68 69 TEXT ·FloatingPointWorks(SB),NOSPLIT,$0-8 70 NO_LOCAL_POINTERS 71 // gc will touch fpsimd, so we should test it. 72 // such as in <runtime.deductSweepCredit>. 73 FMOVD $(9.9), F0 74 MOVD $SYS_GETPID, R8 // getpid 75 SVC 76 FMOVD $(9.9), F1 77 FCMPD F0, F1 78 BNE isNaN 79 MOVD $1, R0 80 MOVD R0, ret+0(FP) 81 RET 82 isNaN: 83 MOVD $0, ret+0(FP) 84 RET 85 86 // MVN: bitwise logical NOT 87 // This case simulates an application that modified R0-R30. 88 #define TWIDDLE_REGS() \ 89 MVN R0, R0; \ 90 MVN R1, R1; \ 91 MVN R2, R2; \ 92 MVN R3, R3; \ 93 MVN R4, R4; \ 94 MVN R5, R5; \ 95 MVN R6, R6; \ 96 MVN R7, R7; \ 97 MVN R8, R8; \ 98 MVN R9, R9; \ 99 MVN R10, R10; \ 100 MVN R11, R11; \ 101 MVN R12, R12; \ 102 MVN R13, R13; \ 103 MVN R14, R14; \ 104 MVN R15, R15; \ 105 MVN R16, R16; \ 106 MVN R17, R17; \ 107 MVN R18_PLATFORM, R18_PLATFORM; \ 108 MVN R19, R19; \ 109 MVN R20, R20; \ 110 MVN R21, R21; \ 111 MVN R22, R22; \ 112 MVN R23, R23; \ 113 MVN R24, R24; \ 114 MVN R25, R25; \ 115 MVN R26, R26; \ 116 MVN R27, R27; \ 117 MVN g, g; \ 118 MVN R29, R29; \ 119 MVN R30, R30; 120 121 TEXT ·TwiddleRegsSyscall(SB),NOSPLIT,$0 122 TWIDDLE_REGS() 123 MSR R10, TPIDR_EL0 124 // Trapped in el0_svc. 125 SVC 126 RET // never reached 127 128 TEXT ·TwiddleRegsFault(SB),NOSPLIT,$0 129 TWIDDLE_REGS() 130 MSR R10, TPIDR_EL0 131 // Trapped in el0_ia. 132 // Branch to Register branches unconditionally to an address in <Rn>. 133 JMP (R6) // <=> br x6, must fault 134 RET // never reached