github.com/aergoio/aergo@v1.3.1/libtool/src/gmp-6.1.2/mpn/arm/mul_1.asm (about)

     1  dnl  ARM mpn_mul_1 -- Multiply a limb vector with a limb and store the result
     2  dnl  in a second limb vector.
     3  dnl  Contributed by Robert Harley.
     4  
     5  dnl  Copyright 1998, 2000, 2001, 2003, 2012 Free Software Foundation, Inc.
     6  
     7  dnl  This file is part of the GNU MP Library.
     8  dnl
     9  dnl  The GNU MP Library is free software; you can redistribute it and/or modify
    10  dnl  it under the terms of either:
    11  dnl
    12  dnl    * the GNU Lesser General Public License as published by the Free
    13  dnl      Software Foundation; either version 3 of the License, or (at your
    14  dnl      option) any later version.
    15  dnl
    16  dnl  or
    17  dnl
    18  dnl    * the GNU General Public License as published by the Free Software
    19  dnl      Foundation; either version 2 of the License, or (at your option) any
    20  dnl      later version.
    21  dnl
    22  dnl  or both in parallel, as here.
    23  dnl
    24  dnl  The GNU MP Library is distributed in the hope that it will be useful, but
    25  dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
    26  dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    27  dnl  for more details.
    28  dnl
    29  dnl  You should have received copies of the GNU General Public License and the
    30  dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
    31  dnl  see https://www.gnu.org/licenses/.
    32  
    33  include(`../config.m4')
    34  
    35  C	     cycles/limb
    36  C StrongARM	6-8
    37  C XScale	 ?
    38  C Cortex-A7	 ?
    39  C Cortex-A8	 ?
    40  C Cortex-A9	 4.75
    41  C Cortex-A15	 ?
    42  
    43  C We should rewrite this along the lines of addmul_1.asm.  That should save a
    44  C cycle on StrongARM, and several cycles on XScale.
    45  
    46  define(`rp',`r0')
    47  define(`up',`r1')
    48  define(`n',`r2')
    49  define(`vl',`r3')
    50  
    51  
    52  ASM_START()
    53  PROLOGUE(mpn_mul_1)
    54  	stmfd	sp!, { r8, r9, lr }
    55  	ands	r12, n, #1
    56  	beq	L(skip1)
    57  	ldr	lr, [up], #4
    58  	umull	r9, r12, lr, vl
    59  	str	r9, [rp], #4
    60  L(skip1):
    61  	tst	n, #2
    62  	beq	L(skip2)
    63  	mov	r8, r12
    64  	ldmia	up!, { r12, lr }
    65  	mov	r9, #0
    66  	umlal	r8, r9, r12, vl
    67  	mov	r12, #0
    68  	umlal	r9, r12, lr, vl
    69  	stmia	rp!, { r8, r9 }
    70  L(skip2):
    71  	bics	n, n, #3
    72  	beq	L(rtn)
    73  	stmfd	sp!, { r6, r7 }
    74  
    75  L(top):	mov	r6, r12
    76  	ldmia	up!, { r8, r9, r12, lr }
    77  	ldr	r7, [rp, #12]			C cache allocate
    78  	mov	r7, #0
    79  	umlal	r6, r7, r8, vl
    80  	mov	r8, #0
    81  	umlal	r7, r8, r9, vl
    82  	mov	r9, #0
    83  	umlal	r8, r9, r12, vl
    84  	mov	r12, #0
    85  	umlal	r9, r12, lr, vl
    86  	subs	n, n, #4
    87  	stmia	rp!, { r6, r7, r8, r9 }
    88  	bne	L(top)
    89  
    90  	ldmfd	sp!, { r6, r7 }
    91  
    92  L(rtn):	mov	r0, r12
    93  	ldmfd	sp!, { r8, r9, pc }
    94  EPILOGUE()