github.com/aergoio/aergo@v1.3.1/libtool/src/gmp-6.1.2/mpn/arm64/gcd_1.asm (about)

     1  dnl  ARM v6t2 mpn_gcd_1.
     2  
     3  dnl  Based on the K7 gcd_1.asm, by Kevin Ryde.  Rehacked for ARM by Torbjorn
     4  dnl  Granlund.
     5  
     6  dnl  Copyright 2000-2002, 2005, 2009, 2011-2013 Free Software Foundation, Inc.
     7  
     8  dnl  This file is part of the GNU MP Library.
     9  dnl
    10  dnl  The GNU MP Library is free software; you can redistribute it and/or modify
    11  dnl  it under the terms of either:
    12  dnl
    13  dnl    * the GNU Lesser General Public License as published by the Free
    14  dnl      Software Foundation; either version 3 of the License, or (at your
    15  dnl      option) any later version.
    16  dnl
    17  dnl  or
    18  dnl
    19  dnl    * the GNU General Public License as published by the Free Software
    20  dnl      Foundation; either version 2 of the License, or (at your option) any
    21  dnl      later version.
    22  dnl
    23  dnl  or both in parallel, as here.
    24  dnl
    25  dnl  The GNU MP Library is distributed in the hope that it will be useful, but
    26  dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
    27  dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    28  dnl  for more details.
    29  dnl
    30  dnl  You should have received copies of the GNU General Public License and the
    31  dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
    32  dnl  see https://www.gnu.org/licenses/.
    33  
    34  include(`../config.m4')
    35  
    36  changecom(@&*$)
    37  
    38  C	     cycles/bit (approx)
    39  C Cortex-A53	 ?
    40  C Cortex-A57	 ?
    41  
    42  C TODO
    43  C  * Optimise inner-loop better.
    44  C  * Push saving/restoring of callee-user regs into call code
    45  
    46  C Threshold of when to call bmod when U is one limb.  Should be about
    47  C (time_in_cycles(bmod_1,1) + call_overhead) / (cycles/bit).
    48  define(`BMOD_THRES_LOG2', 7)
    49  
    50  C INPUT PARAMETERS
    51  define(`up',    `x0')
    52  define(`n',     `x1')
    53  define(`v0',    `x2')
    54  
    55  ifdef(`BMOD_1_TO_MOD_1_THRESHOLD',,
    56    `define(`BMOD_1_TO_MOD_1_THRESHOLD',30)')
    57  
    58  ASM_START()
    59  	TEXT
    60  	ALIGN(16)
    61  PROLOGUE(mpn_gcd_1)
    62  	stp	x29, x30, [sp,#-32]!
    63  	ldr	x3, [up]		C U low limb
    64  	stp     x19, x20, [sp,#16]
    65  
    66  	orr	x3, x3, v0
    67  	rbit	x4, x3
    68  	clz	x20, x4			C min(ctz(u0),ctz(v0))
    69  
    70  	rbit	x12, v0
    71  	clz	x12, x12
    72  	lsr	v0, v0, x12
    73  
    74  	mov	x19, v0
    75  
    76  	cmp	n, #1
    77  	b.ne	L(nby1)
    78  
    79  C Both U and V are single limbs, reduce with bmod if u0 >> v0.
    80  	ldr	x3, [up]
    81  	cmp	v0, x3, lsr #BMOD_THRES_LOG2
    82  	b.hi	L(red1)
    83  
    84  L(bmod):mov	x3, #0			C carry argument
    85  	bl	mpn_modexact_1c_odd
    86  	b	L(red0)
    87  
    88  L(nby1):cmp	n, #BMOD_1_TO_MOD_1_THRESHOLD
    89  	b.lo	L(bmod)
    90  
    91  	bl	mpn_mod_1
    92  
    93  L(red0):mov	x3, x0
    94  L(red1):cmp	x3, #0
    95  	rbit	x12, x3
    96  	clz	x12, x12
    97  	b.ne	L(mid)
    98  	b	L(end)
    99  
   100  	ALIGN(8)
   101  L(top):
   102  ifelse(1,1,`
   103  C This shorter variant makes full use of armv8 insns
   104  	csneg	x3, x1, x1, cs		C if x-y < 0
   105  	csel	x19, x4, x19, cs	C use x,y-x
   106  L(mid):	lsr	x4, x3, x12		C
   107  	subs	x1, x19, x4		C
   108  ',`
   109  C This variant is akin to the 32-bit v6t2 code
   110  	csel	x3, x1, x3, cs		C if x-y < 0
   111  	csel	x19, x0, x19, cs	C use x,y-x
   112  L(mid):	lsr	x3, x3, x12		C
   113  	mov	x0, x3			C
   114  	subs	x1, x19, x3		C
   115  	sub	x3, x3, x19		C
   116  ')
   117  	rbit	x12, x1
   118  	clz	x12, x12		C
   119  	b.ne	L(top)			C
   120  
   121  L(end):	lsl	x0, x19, x20
   122  	ldp     x19, x20, [sp,#16]
   123  	ldp	x29, x30, [sp],#32
   124  	ret
   125  EPILOGUE()