github.com/aergoio/aergo@v1.3.1/libtool/src/gmp-6.1.2/mpn/sparc32/README (about)

     1  Copyright 1996, 2001 Free Software Foundation, Inc.
     2  
     3  This file is part of the GNU MP Library.
     4  
     5  The GNU MP Library is free software; you can redistribute it and/or modify
     6  it under the terms of either:
     7  
     8    * the GNU Lesser General Public License as published by the Free
     9      Software Foundation; either version 3 of the License, or (at your
    10      option) any later version.
    11  
    12  or
    13  
    14    * the GNU General Public License as published by the Free Software
    15      Foundation; either version 2 of the License, or (at your option) any
    16      later version.
    17  
    18  or both in parallel, as here.
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    20  The GNU MP Library is distributed in the hope that it will be useful, but
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    22  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    23  for more details.
    24  
    25  You should have received copies of the GNU General Public License and the
    26  GNU Lesser General Public License along with the GNU MP Library.  If not,
    27  see https://www.gnu.org/licenses/.
    28  
    29  
    30  
    31  
    32  
    33  This directory contains mpn functions for various SPARC chips.  Code that
    34  runs only on version 8 SPARC implementations, is in the v8 subdirectory.
    35  
    36  RELEVANT OPTIMIZATION ISSUES
    37  
    38    Load and Store timing
    39  
    40  On most early SPARC implementations, the ST instructions takes multiple
    41  cycles, while a STD takes just a single cycle more than an ST.  For the CPUs
    42  in SPARCstation I and II, the times are 3 and 4 cycles, respectively.
    43  Therefore, combining two ST instructions into a STD when possible is a
    44  significant optimization.
    45  
    46  Later SPARC implementations have single cycle ST.
    47  
    48  For SuperSPARC, we can perform just one memory instruction per cycle, even
    49  if up to two integer instructions can be executed in its pipeline.  For
    50  programs that perform so many memory operations that there are not enough
    51  non-memory operations to issue in parallel with all memory operations, using
    52  LDD and STD when possible helps.
    53  
    54  UltraSPARC-1/2 has very slow integer multiplication.  In the v9 subdirectory,
    55  we therefore use floating-point multiplication.
    56  
    57  STATUS
    58  
    59  1. On a SuperSPARC, mpn_lshift and mpn_rshift run at 3 cycles/limb, or 2.5
    60     cycles/limb asymptotically.  We could optimize speed for special counts
    61     by using ADDXCC.
    62  
    63  2. On a SuperSPARC, mpn_add_n and mpn_sub_n runs at 2.5 cycles/limb, or 2
    64     cycles/limb asymptotically.
    65  
    66  3. mpn_mul_1 runs at what is believed to be optimal speed.
    67  
    68  4. On SuperSPARC, mpn_addmul_1 and mpn_submul_1 could both be improved by a
    69     cycle by avoiding one of the add instructions.  See a29k/addmul_1.
    70  
    71  The speed of the code for other SPARC implementations is uncertain.