github.com/aergoio/aergo@v1.3.1/libtool/src/gmp-6.1.2/mpn/sparc32/sparc-defs.m4 (about)

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     2  
     3  dnl  m4 macros for SPARC assembler (32 and 64 bit).
     4  
     5  
     6  dnl  Copyright 2002, 2011, 2013 Free Software Foundation, Inc.
     7  
     8  dnl  This file is part of the GNU MP Library.
     9  dnl
    10  dnl  The GNU MP Library is free software; you can redistribute it and/or modify
    11  dnl  it under the terms of either:
    12  dnl
    13  dnl    * the GNU Lesser General Public License as published by the Free
    14  dnl      Software Foundation; either version 3 of the License, or (at your
    15  dnl      option) any later version.
    16  dnl
    17  dnl  or
    18  dnl
    19  dnl    * the GNU General Public License as published by the Free Software
    20  dnl      Foundation; either version 2 of the License, or (at your option) any
    21  dnl      later version.
    22  dnl
    23  dnl  or both in parallel, as here.
    24  dnl
    25  dnl  The GNU MP Library is distributed in the hope that it will be useful, but
    26  dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
    27  dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    28  dnl  for more details.
    29  dnl
    30  dnl  You should have received copies of the GNU General Public License and the
    31  dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
    32  dnl  see https://www.gnu.org/licenses/.
    33  
    34  
    35  changecom(;)	dnl cannot use default # since that's used in REGISTER decls
    36  
    37  
    38  dnl  Usage: REGISTER(reg,attr)
    39  dnl
    40  dnl  Give a ".register reg,attr" directive, if the assembler supports it.
    41  dnl  HAVE_REGISTER comes from the GMP_ASM_SPARC_REGISTER configure test.
    42  
    43  define(REGISTER,
    44  m4_assert_numargs(2)
    45  m4_assert_defined(`HAVE_REGISTER')
    46  `ifelse(HAVE_REGISTER,yes,
    47  `.register `$1',`$2'')')
    48  
    49  
    50  C Testing mechanism for running newer code on older processors
    51  ifdef(`FAKE_T3',`
    52    include_mpn(`sparc64/ultrasparct3/missing.m4')
    53  ',`
    54    define(`addxccc',	``addxccc'	$1, $2, $3')
    55    define(`addxc',	``addxc'	$1, $2, $3')
    56    define(`umulxhi',	``umulxhi'	$1, $2, $3')
    57    define(`lzcnt',	``lzd'	$1, $2')
    58  ')
    59  
    60  dnl  Usage: LEA64(symbol,reg,pic_reg)
    61  dnl
    62  dnl  Use whatever 64-bit code sequence is appropriate to load "symbol" into
    63  dnl  register "reg", potentially using register "pic_reg" to perform the
    64  dnl  calculations.
    65  
    66  define(LEA64,
    67  m4_assert_numargs(3)
    68  m4_assert_defined(`HAVE_GOTDATA')
    69  `ifdef(`PIC',`
    70  	rd	%pc, %`$2'
    71  	sethi	%hi(_GLOBAL_OFFSET_TABLE_+4), %`$3'
    72  	add	%`$3', %lo(_GLOBAL_OFFSET_TABLE_+8), %`$3'
    73  	add	%`$2', %`$3', %`$3'
    74  	sethi	%hi(`$1'), %`$2'
    75  	or	%`$2', %lo(`$1'), %`$2'
    76  	ldx	[%`$3' + %`$2'], %`$2'',`
    77  	setx	`$1', %`$3', %`$2'')')
    78  
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