github.com/afumu/libc@v0.0.6/musl/arch/arm/atomic_arch.h (about)

     1  #include "libc.h"
     2  
     3  #if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
     4  #define BLX "mov lr,pc\n\tbx"
     5  #else
     6  #define BLX "blx"
     7  #endif
     8  
     9  extern hidden uintptr_t __a_cas_ptr, __a_barrier_ptr;
    10  
    11  #if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
    12   || __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
    13  
    14  #define a_ll a_ll
    15  static inline int a_ll(volatile int *p)
    16  {
    17  	int v;
    18  	__asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
    19  	return v;
    20  }
    21  
    22  #define a_sc a_sc
    23  static inline int a_sc(volatile int *p, int v)
    24  {
    25  	int r;
    26  	__asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
    27  	return !r;
    28  }
    29  
    30  #if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ ||  __ARM_ARCH >= 7
    31  
    32  #define a_barrier a_barrier
    33  static inline void a_barrier()
    34  {
    35  	__asm__ __volatile__ ("dmb ish" : : : "memory");
    36  }
    37  
    38  #endif
    39  
    40  #define a_pre_llsc a_barrier
    41  #define a_post_llsc a_barrier
    42  
    43  #else
    44  
    45  #define a_cas a_cas
    46  static inline int a_cas(volatile int *p, int t, int s)
    47  {
    48  	__asm__ __volatile__ ("TODO");
    49  	//TODO for (;;) {
    50  	//TODO 	register int r0 __asm__("r0") = t;
    51  	//TODO 	register int r1 __asm__("r1") = s;
    52  	//TODO 	register volatile int *r2 __asm__("r2") = p;
    53  	//TODO 	register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
    54  	//TODO 	int old;
    55  	//TODO 	__asm__ __volatile__ (
    56  	//TODO 		BLX " r3"
    57  	//TODO 		: "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
    58  	//TODO 		: "memory", "lr", "ip", "cc" );
    59  	//TODO 	if (!r0) return t;
    60  	//TODO 	if ((old=*p)!=t) return old;
    61  	//TODO }
    62  }
    63  
    64  #endif
    65  
    66  #ifndef a_barrier
    67  #define a_barrier a_barrier
    68  static inline void a_barrier()
    69  {
    70  	__asm__ __volatile__ ("TODO");
    71  	//TODO register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
    72  	//TODO __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
    73  }
    74  #endif
    75  
    76  #define a_crash a_crash
    77  static inline void a_crash()
    78  {
    79  	__asm__ __volatile__(
    80  #ifndef __thumb__
    81  		".word 0xe7f000f0"
    82  #else
    83  		".short 0xdeff"
    84  #endif
    85  		: : : "memory");
    86  }
    87  
    88  #if __ARM_ARCH >= 5 && (!__thumb__ || __thumb2__)
    89  
    90  #define a_clz_32 a_clz_32
    91  static inline int a_clz_32(uint32_t x)
    92  {
    93  	__asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
    94  	return x;
    95  }
    96  
    97  #if __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
    98  
    99  #define a_ctz_32 a_ctz_32
   100  static inline int a_ctz_32(uint32_t x)
   101  {
   102  	uint32_t xr;
   103  	__asm__ ("rbit %0, %1" : "=r"(xr) : "r"(x));
   104  	return a_clz_32(xr);
   105  }
   106  
   107  #endif
   108  
   109  #endif