github.com/afumu/libc@v0.0.6/musl/arch/microblaze/atomic_arch.h (about)

     1  #define a_cas a_cas
     2  static inline int a_cas(volatile int *p, int t, int s)
     3  {
     4  	register int old, tmp;
     5  	__asm__ __volatile__ (
     6  		"	addi %0, r0, 0\n"
     7  		"1:	lwx %0, %2, r0\n"
     8  		"	rsubk %1, %0, %3\n"
     9  		"	bnei %1, 1f\n"
    10  		"	swx %4, %2, r0\n"
    11  		"	addic %1, r0, 0\n"
    12  		"	bnei %1, 1b\n"
    13  		"1:	"
    14  		: "=&r"(old), "=&r"(tmp)
    15  		: "r"(p), "r"(t), "r"(s)
    16  		: "cc", "memory" );
    17  	return old;
    18  }
    19  
    20  #define a_swap a_swap
    21  static inline int a_swap(volatile int *x, int v)
    22  {
    23  	register int old, tmp;
    24  	__asm__ __volatile__ (
    25  		"	addi %0, r0, 0\n"
    26  		"1:	lwx %0, %2, r0\n"
    27  		"	swx %3, %2, r0\n"
    28  		"	addic %1, r0, 0\n"
    29  		"	bnei %1, 1b\n"
    30  		"1:	"
    31  		: "=&r"(old), "=&r"(tmp)
    32  		: "r"(x), "r"(v)
    33  		: "cc", "memory" );
    34  	return old;
    35  }
    36  
    37  #define a_fetch_add a_fetch_add
    38  static inline int a_fetch_add(volatile int *x, int v)
    39  {
    40  	register int new, tmp;
    41  	__asm__ __volatile__ (
    42  		"	addi %0, r0, 0\n"
    43  		"1:	lwx %0, %2, r0\n"
    44  		"	addk %0, %0, %3\n"
    45  		"	swx %0, %2, r0\n"
    46  		"	addic %1, r0, 0\n"
    47  		"	bnei %1, 1b\n"
    48  		"1:	"
    49  		: "=&r"(new), "=&r"(tmp)
    50  		: "r"(x), "r"(v)
    51  		: "cc", "memory" );
    52  	return new-v;
    53  }