github.com/afumu/libc@v0.0.6/musl/arch/powerpc/syscall_arch.h (about) 1 #define __SYSCALL_LL_E(x) \ 2 ((union { long long ll; long l[2]; }){ .ll = x }).l[0], \ 3 ((union { long long ll; long l[2]; }){ .ll = x }).l[1] 4 #define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x)) 5 6 static inline long __syscall0(long n) 7 { 8 register long r0 __asm__("r0") = n; 9 register long r3 __asm__("r3"); 10 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 11 : "+r"(r0), "=r"(r3) 12 :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); 13 return r3; 14 } 15 16 static inline long __syscall1(long n, long a) 17 { 18 register long r0 __asm__("r0") = n; 19 register long r3 __asm__("r3") = a; 20 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 21 : "+r"(r0), "+r"(r3) 22 :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); 23 return r3; 24 } 25 26 static inline long __syscall2(long n, long a, long b) 27 { 28 register long r0 __asm__("r0") = n; 29 register long r3 __asm__("r3") = a; 30 register long r4 __asm__("r4") = b; 31 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 32 : "+r"(r0), "+r"(r3), "+r"(r4) 33 :: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); 34 return r3; 35 } 36 37 static inline long __syscall3(long n, long a, long b, long c) 38 { 39 register long r0 __asm__("r0") = n; 40 register long r3 __asm__("r3") = a; 41 register long r4 __asm__("r4") = b; 42 register long r5 __asm__("r5") = c; 43 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 44 : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5) 45 :: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); 46 return r3; 47 } 48 49 static inline long __syscall4(long n, long a, long b, long c, long d) 50 { 51 register long r0 __asm__("r0") = n; 52 register long r3 __asm__("r3") = a; 53 register long r4 __asm__("r4") = b; 54 register long r5 __asm__("r5") = c; 55 register long r6 __asm__("r6") = d; 56 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 57 : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6) 58 :: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12"); 59 return r3; 60 } 61 62 static inline long __syscall5(long n, long a, long b, long c, long d, long e) 63 { 64 register long r0 __asm__("r0") = n; 65 register long r3 __asm__("r3") = a; 66 register long r4 __asm__("r4") = b; 67 register long r5 __asm__("r5") = c; 68 register long r6 __asm__("r6") = d; 69 register long r7 __asm__("r7") = e; 70 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 71 : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7) 72 :: "memory", "cr0", "r8", "r9", "r10", "r11", "r12"); 73 return r3; 74 } 75 76 static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f) 77 { 78 register long r0 __asm__("r0") = n; 79 register long r3 __asm__("r3") = a; 80 register long r4 __asm__("r4") = b; 81 register long r5 __asm__("r5") = c; 82 register long r6 __asm__("r6") = d; 83 register long r7 __asm__("r7") = e; 84 register long r8 __asm__("r8") = f; 85 __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" 86 : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8) 87 :: "memory", "cr0", "r9", "r10", "r11", "r12"); 88 return r3; 89 } 90 91 #define SYSCALL_FADVISE_6_ARG 92 93 #define SO_RCVTIMEO_OLD 18 94 #define SO_SNDTIMEO_OLD 19