github.com/afumu/libc@v0.0.6/musl/arch/riscv64/atomic_arch.h (about)

     1  #define a_barrier a_barrier
     2  static inline void a_barrier()
     3  {
     4  	__asm__ __volatile__ ("fence rw,rw" : : : "memory");
     5  }
     6  
     7  #define a_cas a_cas
     8  static inline int a_cas(volatile int *p, int t, int s)
     9  {
    10  	int old, tmp;
    11  	__asm__ __volatile__ (
    12  		"\n1:	lr.w.aqrl %0, (%2)\n"
    13  		"	bne %0, %3, 1f\n"
    14  		"	sc.w.aqrl %1, %4, (%2)\n"
    15  		"	bnez %1, 1b\n"
    16  		"1:"
    17  		: "=&r"(old), "=&r"(tmp)
    18  		: "r"(p), "r"((long)t), "r"((long)s)
    19  		: "memory");
    20  	return old;
    21  }
    22  
    23  #define a_cas_p a_cas_p
    24  static inline void *a_cas_p(volatile void *p, void *t, void *s)
    25  {
    26  	void *old;
    27  	int tmp;
    28  	__asm__ __volatile__ (
    29  		"\n1:	lr.d.aqrl %0, (%2)\n"
    30  		"	bne %0, %3, 1f\n"
    31  		"	sc.d.aqrl %1, %4, (%2)\n"
    32  		"	bnez %1, 1b\n"
    33  		"1:"
    34  		: "=&r"(old), "=&r"(tmp)
    35  		: "r"(p), "r"(t), "r"(s)
    36  		: "memory");
    37  	return old;
    38  }