github.com/afumu/libc@v0.0.6/musl/src/setjmp/powerpc64/longjmp.s (about)

     1  	.global _longjmp
     2  	.global longjmp
     3  	.type   _longjmp,@function
     4  	.type   longjmp,@function
     5  _longjmp:
     6  longjmp:
     7  	# 0) move old return address into the link register
     8  	ld   0,  0*8(3)
     9  	mtlr 0
    10  	# 1) restore cr
    11  	ld   0,  1*8(3)
    12  	mtcr 0
    13  	# 2) restore SP
    14  	ld   1,  2*8(3)
    15  	# 3) restore TOC into both r2 and the caller's stack.
    16  	#    Which location is required depends on whether setjmp was called
    17  	#    locally or non-locally, but it's always safe to restore to both.
    18  	ld   2,  3*8(3)
    19  	std  2,   24(1)
    20  	# 4) restore r14-r31
    21  	ld  14,  4*8(3)
    22  	ld  15,  5*8(3)
    23  	ld  16,  6*8(3)
    24  	ld  17,  7*8(3)
    25  	ld  18,  8*8(3)
    26  	ld  19,  9*8(3)
    27  	ld  20, 10*8(3)
    28  	ld  21, 11*8(3)
    29  	ld  22, 12*8(3)
    30  	ld  23, 13*8(3)
    31  	ld  24, 14*8(3)
    32  	ld  25, 15*8(3)
    33  	ld  26, 16*8(3)
    34  	ld  27, 17*8(3)
    35  	ld  28, 18*8(3)
    36  	ld  29, 19*8(3)
    37  	ld  30, 20*8(3)
    38  	ld  31, 21*8(3)
    39  	# 5) restore floating point registers f14-f31
    40  	lfd 14, 22*8(3)
    41  	lfd 15, 23*8(3)
    42  	lfd 16, 24*8(3)
    43  	lfd 17, 25*8(3)
    44  	lfd 18, 26*8(3)
    45  	lfd 19, 27*8(3)
    46  	lfd 20, 28*8(3)
    47  	lfd 21, 29*8(3)
    48  	lfd 22, 30*8(3)
    49  	lfd 23, 31*8(3)
    50  	lfd 24, 32*8(3)
    51  	lfd 25, 33*8(3)
    52  	lfd 26, 34*8(3)
    53  	lfd 27, 35*8(3)
    54  	lfd 28, 36*8(3)
    55  	lfd 29, 37*8(3)
    56  	lfd 30, 38*8(3)
    57  	lfd 31, 39*8(3)
    58  
    59  	# 6) restore vector registers v20-v31
    60  	addi 3, 3, 40*8
    61  	lvx 20, 0, 3 ; addi 3, 3, 16
    62  	lvx 21, 0, 3 ; addi 3, 3, 16
    63  	lvx 22, 0, 3 ; addi 3, 3, 16
    64  	lvx 23, 0, 3 ; addi 3, 3, 16
    65  	lvx 24, 0, 3 ; addi 3, 3, 16
    66  	lvx 25, 0, 3 ; addi 3, 3, 16
    67  	lvx 26, 0, 3 ; addi 3, 3, 16
    68  	lvx 27, 0, 3 ; addi 3, 3, 16
    69  	lvx 28, 0, 3 ; addi 3, 3, 16
    70  	lvx 29, 0, 3 ; addi 3, 3, 16
    71  	lvx 30, 0, 3 ; addi 3, 3, 16
    72  	lvx 31, 0, 3
    73  
    74  	# 7) return r4 ? r4 : 1
    75  	mr    3,   4
    76  	cmpwi cr7, 4, 0
    77  	bne   cr7, 1f
    78  	li    3,   1
    79  1:
    80  	blr
    81