github.com/bananabytelabs/wazero@v0.0.0-20240105073314-54b22a776da8/internal/asm/amd64/consts.go (about) 1 package amd64 2 3 import ( 4 "fmt" 5 6 "github.com/bananabytelabs/wazero/internal/asm" 7 ) 8 9 // AMD64-specific conditional register states. 10 // 11 // See https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf 12 // See https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf 13 const ( 14 // ConditionalRegisterStateE is the e (equal to zero) condition code 15 ConditionalRegisterStateE = asm.ConditionalRegisterStateUnset + 1 + iota // ZF equal to zero 16 // ConditionalRegisterStateNE is the ne (not equal to zero) condition code 17 ConditionalRegisterStateNE // ˜ZF not equal to zero 18 // ConditionalRegisterStateS is the s (negative) condition code 19 ConditionalRegisterStateS // SF negative 20 // ConditionalRegisterStateNS is the ns (non-negative) condition code 21 ConditionalRegisterStateNS // ˜SF non-negative 22 // ConditionalRegisterStateG is the g (greater) condition code 23 ConditionalRegisterStateG // ˜(SF xor OF) & ˜ ZF greater (signed >) 24 // ConditionalRegisterStateGE is the ge (greater or equal) condition code 25 ConditionalRegisterStateGE // ˜(SF xor OF) greater or equal (signed >=) 26 // ConditionalRegisterStateL is the l (less) condition code 27 ConditionalRegisterStateL // SF xor OF less (signed <) 28 // ConditionalRegisterStateLE is the le (less or equal) condition code 29 ConditionalRegisterStateLE // (SF xor OF) | ZF less or equal (signed <=) 30 // ConditionalRegisterStateA is the a (above) condition code 31 ConditionalRegisterStateA // ˜CF & ˜ZF above (unsigned >) 32 // ConditionalRegisterStateAE is the ae (above or equal) condition code 33 ConditionalRegisterStateAE // ˜CF above or equal (unsigned >=) 34 // ConditionalRegisterStateB is the b (below) condition code 35 ConditionalRegisterStateB // CF below (unsigned <) 36 // ConditionalRegisterStateBE is the be (below or equal) condition code 37 ConditionalRegisterStateBE // CF | ZF below or equal (unsigned <=) 38 ) 39 40 // AMD64-specific instructions. 41 // 42 // Note: This only defines amd64 instructions used by wazero's compiler. 43 // Note: Naming conventions intentionally match the Go assembler: https://go.dev/doc/asm 44 // See https://www.felixcloutier.com/x86/index.html 45 const ( 46 // NONE is not a real instruction but represents the lack of an instruction 47 NONE asm.Instruction = iota 48 // ADDL is the ADD instruction in 32-bit mode. https://www.felixcloutier.com/x86/add 49 ADDL 50 // ADDQ is the ADD instruction in 64-bit mode. https://www.felixcloutier.com/x86/add 51 ADDQ 52 // ADDSD is the ADDSD instruction. https://www.felixcloutier.com/x86/addsd 53 ADDSD 54 // ADDSS is the ADDSS instruction. https://www.felixcloutier.com/x86/addss 55 ADDSS 56 // ANDL is the AND instruction in 32-bit mode. https://www.felixcloutier.com/x86/and 57 ANDL 58 // ANDPD is the ANDPD instruction. https://www.felixcloutier.com/x86/andpd 59 ANDPD 60 // ANDPS is the ANDPS instruction. https://www.felixcloutier.com/x86/andps 61 ANDPS 62 // ANDQ is the AND instruction in 64-bit mode. https://www.felixcloutier.com/x86/and 63 ANDQ 64 // BSRL is the BSR instruction in 32-bit mode. https://www.felixcloutier.com/x86/bsr 65 BSRL 66 // BSRQ is the BSR instruction in 64-bit mode. https://www.felixcloutier.com/x86/bsr 67 BSRQ 68 // CDQ is the CDQ instruction. https://www.felixcloutier.com/x86/cwd:cdq:cqo 69 CDQ 70 // CLD is the CLD instruction. https://www.felixcloutier.com/x86/cld 71 CLD 72 // CMOVQCS is the CMOVC (move if carry) instruction in 64-bit mode. https://www.felixcloutier.com/x86/cmovcc 73 CMOVQCS 74 // CMPL is the CMP instruction in 32-bit mode. https://www.felixcloutier.com/x86/cmp 75 CMPL 76 // CMPQ is the CMP instruction in 64-bit mode. https://www.felixcloutier.com/x86/cmp 77 CMPQ 78 // COMISD is the COMISD instruction. https://www.felixcloutier.com/x86/comisd 79 COMISD 80 // COMISS is the COMISS instruction. https://www.felixcloutier.com/x86/comiss 81 COMISS 82 // CQO is the CQO instruction. https://www.felixcloutier.com/x86/cwd:cdq:cqo 83 CQO 84 // CVTSD2SS is the CVTSD2SS instruction. https://www.felixcloutier.com/x86/cvtsd2ss 85 CVTSD2SS 86 // CVTSL2SD is the CVTSI2SD instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvtsi2sd 87 CVTSL2SD 88 // CVTSL2SS is the CVTSI2SS instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvtsi2ss 89 CVTSL2SS 90 // CVTSQ2SD is the CVTSI2SD instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvtsi2sd 91 CVTSQ2SD 92 // CVTSQ2SS is the CVTSI2SS instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvtsi2ss 93 CVTSQ2SS 94 // CVTSS2SD is the CVTSS2SD instruction. https://www.felixcloutier.com/x86/cvtss2sd 95 CVTSS2SD 96 // CVTTSD2SL is the CVTTSD2SI instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvttsd2si 97 CVTTSD2SL 98 // CVTTSD2SQ is the CVTTSD2SI instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvttsd2si 99 CVTTSD2SQ 100 // CVTTSS2SL is the CVTTSS2SI instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvttss2si 101 CVTTSS2SL 102 // CVTTSS2SQ is the CVTTSS2SI instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvttss2si 103 CVTTSS2SQ 104 // DECQ is the DEC instruction in 64-bit mode. https://www.felixcloutier.com/x86/dec 105 DECQ 106 // DIVL is the DIV instruction in 32-bit mode. https://www.felixcloutier.com/x86/div 107 DIVL 108 // DIVQ is the DIV instruction in 64-bit mode. https://www.felixcloutier.com/x86/div 109 DIVQ 110 // DIVSD is the DIVSD instruction. https://www.felixcloutier.com/x86/divsd 111 DIVSD 112 // DIVSS is the DIVSS instruction. https://www.felixcloutier.com/x86/divss 113 DIVSS 114 // IDIVL is the IDIV instruction in 32-bit mode. https://www.felixcloutier.com/x86/idiv 115 IDIVL 116 // IDIVQ is the IDIV instruction in 64-bit mode. https://www.felixcloutier.com/x86/idiv 117 IDIVQ 118 // INCQ is the INC instruction in 64-bit mode. https://www.felixcloutier.com/x86/inc 119 INCQ 120 // JCC is the JAE (jump if above or equal) instruction. https://www.felixcloutier.com/x86/jcc 121 JCC 122 // JCS is the JB (jump if below) instruction. https://www.felixcloutier.com/x86/jcc 123 JCS 124 // JEQ is the JE (jump if equal) instruction. https://www.felixcloutier.com/x86/jcc 125 JEQ 126 // JGE is the JGE (jump if greater or equal) instruction. https://www.felixcloutier.com/x86/jcc 127 JGE 128 // JGT is the JG (jump if greater) instruction. https://www.felixcloutier.com/x86/jcc 129 JGT 130 // JHI is the JNBE (jump if not below or equal) instruction. https://www.felixcloutier.com/x86/jcc 131 JHI 132 // JLE is the JLE (jump if less or equal) instruction. https://www.felixcloutier.com/x86/jcc 133 JLE 134 // JLS is the JNA (jump if not above) instruction. https://www.felixcloutier.com/x86/jcc 135 JLS 136 // JLT is the JL (jump if less) instruction. https://www.felixcloutier.com/x86/jcc 137 JLT 138 // JMI is the JS (jump if sign) instruction. https://www.felixcloutier.com/x86/jcc 139 JMI 140 // JNE is the JNE (jump if not equal) instruction. https://www.felixcloutier.com/x86/jcc 141 JNE 142 // JPC is the JPO (jump if parity odd) instruction. https://www.felixcloutier.com/x86/jcc 143 JPC 144 // JPL is the JNS (jump if not sign) instruction. https://www.felixcloutier.com/x86/jcc 145 JPL 146 // JPS is the JPE (jump if parity even) instruction. https://www.felixcloutier.com/x86/jcc 147 JPS 148 // LEAQ is the LEA instruction in 64-bit mode. https://www.felixcloutier.com/x86/lea 149 LEAQ 150 // LZCNTL is the LZCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/lzcnt 151 LZCNTL 152 // LZCNTQ is the LZCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/lzcnt 153 LZCNTQ 154 // MAXSD is the MAXSD instruction. https://www.felixcloutier.com/x86/maxsd 155 MAXSD 156 // MAXSS is the MAXSS instruction. https://www.felixcloutier.com/x86/maxss 157 MAXSS 158 // MINSD is the MINSD instruction. https://www.felixcloutier.com/x86/minsd 159 MINSD 160 // MINSS is the MINSS instruction. https://www.felixcloutier.com/x86/minss 161 MINSS 162 // MOVB is the MOV instruction for a single byte. https://www.felixcloutier.com/x86/mov 163 MOVB 164 // MOVBLSX is the MOVSX instruction for single byte in 32-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 165 MOVBLSX 166 // MOVBLZX is the MOVZX instruction for single-byte in 32-bit mode. https://www.felixcloutier.com/x86/movzx 167 MOVBLZX 168 // MOVBQSX is the MOVSX instruction for single byte in 64-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 169 MOVBQSX 170 // MOVBQZX is the MOVZX instruction for single-byte in 64-bit mode. https://www.felixcloutier.com/x86/movzx 171 MOVBQZX 172 // MOVL is the MOV instruction for a double word. 173 MOVL 174 // MOVLQSX is the MOVSXD instruction. https://www.felixcloutier.com/x86/movsx:movsxd 175 MOVLQSX 176 // MOVLQZX is the MOVZX instruction for a word to a doubleword. https://www.felixcloutier.com/x86/movzx 177 MOVLQZX 178 // MOVQ is the MOV instruction for a doubleword. https://www.felixcloutier.com/x86/mov 179 MOVQ 180 // MOVW is the MOV instruction for a word. https://www.felixcloutier.com/x86/mov 181 MOVW 182 // MOVWLSX is the MOVSX instruction for a word in 32-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 183 MOVWLSX 184 // MOVWLZX is the MOVZX instruction for a word in 32-bit mode. https://www.felixcloutier.com/x86/movzx 185 MOVWLZX 186 // MOVWQSX is the MOVSX instruction for a word in 64-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 187 MOVWQSX 188 // MOVWQZX is the MOVZX instruction for a word in 64-bit mode. https://www.felixcloutier.com/x86/movzx 189 MOVWQZX 190 // MULL is the MUL instruction in 32-bit mode. https://www.felixcloutier.com/x86/mul 191 MULL 192 // MULQ is the MUL instruction in 64-bit mode. https://www.felixcloutier.com/x86/mul 193 MULQ 194 // IMULQ is the IMUL instruction in 64-bit mode. https://www.felixcloutier.com/x86/imul 195 IMULQ 196 // MULSD is the MULSD instruction. https://www.felixcloutier.com/x86/mulsd 197 MULSD 198 // MULSS is the MULSS instruction. https://www.felixcloutier.com/x86/mulss 199 MULSS 200 // NEGQ is the NEG instruction in 64-bit mode. https://www.felixcloutier.com/x86/neg 201 NEGQ 202 // ORL is the OR instruction in 32-bit mode. https://www.felixcloutier.com/x86/or 203 ORL 204 // ORPD is the ORPD instruction. https://www.felixcloutier.com/x86/orpd 205 ORPD 206 // ORPS is the ORPS instruction. https://www.felixcloutier.com/x86/orps 207 ORPS 208 // ORQ is the OR instruction in 64-bit mode. https://www.felixcloutier.com/x86/or 209 ORQ 210 // POPCNTL is the POPCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/popcnt 211 POPCNTL 212 // POPCNTQ is the POPCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/popcnt 213 POPCNTQ 214 // PSLLD is the PSLLD instruction. https://www.felixcloutier.com/x86/psllw:pslld:psllq 215 PSLLD 216 // PSLLQ is the PSLLQ instruction. https://www.felixcloutier.com/x86/psllw:pslld:psllq 217 PSLLQ 218 // PSRLD is the PSRLD instruction. https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 219 PSRLD 220 // PSRLQ is the PSRLQ instruction. https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 221 PSRLQ 222 // REPMOVSQ is the REP MOVSQ instruction in 64-bit mode. https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:movsq https://www.felixcloutier.com/x86/rep:repe:repz:repne:repnz 223 REPMOVSQ 224 // REPSTOSQ is the REP STOSQ instruction in 64-bit mode. https://www.felixcloutier.com/x86/stos:stosb:stosw:stosd:stosq https://www.felixcloutier.com/x86/rep:repe:repz:repne:repnz 225 REPSTOSQ 226 // ROLL is the ROL instruction in 32-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 227 ROLL 228 // ROLQ is the ROL instruction in 64-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 229 ROLQ 230 // RORL is the ROR instruction in 32-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 231 RORL 232 // RORQ is the ROR instruction in 64-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 233 RORQ 234 // ROUNDSD is the ROUNDSD instruction. https://www.felixcloutier.com/x86/roundsd 235 ROUNDSD 236 // ROUNDSS is the ROUNDSS instruction. https://www.felixcloutier.com/x86/roundss 237 ROUNDSS 238 // SARL is the SAR instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 239 SARL 240 // SARQ is the SAR instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 241 SARQ 242 // SETCC is the SETAE (set if above or equal) instruction. https://www.felixcloutier.com/x86/setcc 243 SETCC 244 // SETCS is the SETB (set if below) instruction. https://www.felixcloutier.com/x86/setcc 245 SETCS 246 // SETEQ is the SETE (set if equal) instruction. https://www.felixcloutier.com/x86/setcc 247 SETEQ 248 // SETGE is the SETGE (set if greater or equal) instruction. https://www.felixcloutier.com/x86/setcc 249 SETGE 250 // SETGT is the SETG (set if greater) instruction. https://www.felixcloutier.com/x86/setcc 251 SETGT 252 // SETHI is the SETNBE (set if not below or equal) instruction. https://www.felixcloutier.com/x86/setcc 253 SETHI 254 // SETLE is the SETLE (set if less or equal) instruction. https://www.felixcloutier.com/x86/setcc 255 SETLE 256 // SETLS is the SETNA (set if not above) instruction. https://www.felixcloutier.com/x86/setcc 257 SETLS 258 // SETLT is the SETL (set if less) instruction. https://www.felixcloutier.com/x86/setcc 259 SETLT 260 // SETMI is the SETS (set if sign) instruction. https://www.felixcloutier.com/x86/setcc 261 SETMI 262 // SETNE is the SETNE (set if not equal) instruction. https://www.felixcloutier.com/x86/setcc 263 SETNE 264 // SETPC is the SETNP (set if not parity) instruction. https://www.felixcloutier.com/x86/setcc 265 SETPC 266 // SETPL is the SETNS (set if not sign) instruction. https://www.felixcloutier.com/x86/setcc 267 SETPL 268 // SETPS is the SETP (set if parity) instruction. https://www.felixcloutier.com/x86/setcc 269 SETPS 270 // SHLL is the SHL instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 271 SHLL 272 // SHLQ is the SHL instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 273 SHLQ 274 // SHRL is the SHR instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 275 SHRL 276 // SHRQ is the SHR instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 277 SHRQ 278 // SQRTSD is the SQRTSD instruction. https://www.felixcloutier.com/x86/sqrtsd 279 SQRTSD 280 // SQRTSS is the SQRTSS instruction. https://www.felixcloutier.com/x86/sqrtss 281 SQRTSS 282 // STD is the STD instruction. https://www.felixcloutier.com/x86/std 283 STD 284 // SUBL is the SUB instruction in 32-bit mode. https://www.felixcloutier.com/x86/sub 285 SUBL 286 // SUBQ is the SUB instruction in 64-bit mode. https://www.felixcloutier.com/x86/sub 287 SUBQ 288 // SUBSD is the SUBSD instruction. https://www.felixcloutier.com/x86/subsd 289 SUBSD 290 // SUBSS is the SUBSS instruction. https://www.felixcloutier.com/x86/subss 291 SUBSS 292 // TESTL is the TEST instruction in 32-bit mode. https://www.felixcloutier.com/x86/test 293 TESTL 294 // TESTQ is the TEST instruction in 64-bit mode. https://www.felixcloutier.com/x86/test 295 TESTQ 296 // TZCNTL is the TZCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/tzcnt 297 TZCNTL 298 // TZCNTQ is the TZCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/tzcnt 299 TZCNTQ 300 // UCOMISD is the UCOMISD instruction. https://www.felixcloutier.com/x86/ucomisd 301 UCOMISD 302 // UCOMISS is the UCOMISS instruction. https://www.felixcloutier.com/x86/ucomisd 303 UCOMISS 304 // XORL is the XOR instruction in 32-bit mode. https://www.felixcloutier.com/x86/xor 305 XORL 306 // XORPD is the XORPD instruction. https://www.felixcloutier.com/x86/xorpd 307 XORPD 308 // XORPS is the XORPS instruction. https://www.felixcloutier.com/x86/xorps 309 XORPS 310 // XORQ is the XOR instruction in 64-bit mode. https://www.felixcloutier.com/x86/xor 311 XORQ 312 // XCHGQ is the XCHG instruction in 64-bit mode. https://www.felixcloutier.com/x86/xchg 313 XCHGQ 314 // RET is the RET instruction. https://www.felixcloutier.com/x86/ret 315 RET 316 // JMP is the JMP instruction. https://www.felixcloutier.com/x86/jmp 317 JMP 318 // NOP is the NOP instruction. https://www.felixcloutier.com/x86/nop 319 NOP 320 // UD2 is the UD2 instruction. https://www.felixcloutier.com/x86/ud 321 UD2 322 // MOVDQU is the MOVDQU instruction in 64-bit mode. https://www.felixcloutier.com/x86/movdqu:vmovdqu8:vmovdqu16:vmovdqu32:vmovdqu64 323 MOVDQU 324 // MOVDQA is the MOVDQA instruction in 64-bit mode. https://www.felixcloutier.com/x86/movdqa:vmovdqa32:vmovdqa64 325 MOVDQA 326 // PINSRB is the PINSRB instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 327 PINSRB 328 // PINSRW is the PINSRW instruction. https://www.felixcloutier.com/x86/pinsrw 329 PINSRW 330 // PINSRD is the PINSRD instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 331 PINSRD 332 // PINSRQ is the PINSRQ instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 333 PINSRQ 334 // PADDB is the PADDB instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 335 PADDB 336 // PADDW is the PADDW instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 337 PADDW 338 // PADDD is the PADDD instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 339 PADDD 340 // PADDQ is the PADDQ instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 341 PADDQ 342 // PSUBB is the PSUBB instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 343 PSUBB 344 // PSUBW is the PSUBW instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 345 PSUBW 346 // PSUBD is the PSUBD instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 347 PSUBD 348 // PSUBQ is the PSUBQ instruction. https://www.felixcloutier.com/x86/psubq 349 PSUBQ 350 // ADDPS is the ADDPS instruction. https://www.felixcloutier.com/x86/addps 351 ADDPS 352 // ADDPD is the ADDPD instruction. https://www.felixcloutier.com/x86/addpd 353 ADDPD 354 // SUBPS is the SUBPS instruction. https://www.felixcloutier.com/x86/subps 355 SUBPS 356 // SUBPD is the SUBPD instruction. https://www.felixcloutier.com/x86/subpd 357 SUBPD 358 // PMOVSXBW is the PMOVSXBW instruction https://www.felixcloutier.com/x86/pmovsx 359 PMOVSXBW 360 // PMOVSXWD is the PMOVSXWD instruction https://www.felixcloutier.com/x86/pmovsx 361 PMOVSXWD 362 // PMOVSXDQ is the PMOVSXDQ instruction https://www.felixcloutier.com/x86/pmovsx 363 PMOVSXDQ 364 // PMOVZXBW is the PMOVZXBW instruction https://www.felixcloutier.com/x86/pmovzx 365 PMOVZXBW 366 // PMOVZXWD is the PMOVZXWD instruction https://www.felixcloutier.com/x86/pmovzx 367 PMOVZXWD 368 // PMOVZXDQ is the PMOVZXDQ instruction https://www.felixcloutier.com/x86/pmovzx 369 PMOVZXDQ 370 // PSHUFB is the PSHUFB instruction https://www.felixcloutier.com/x86/pshufb 371 PSHUFB 372 // PSHUFD is the PSHUFD instruction https://www.felixcloutier.com/x86/pshufd 373 PSHUFD 374 // PXOR is the PXOR instruction https://www.felixcloutier.com/x86/pxor 375 PXOR 376 // PEXTRB is the PEXTRB instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 377 PEXTRB 378 // PEXTRW is the PEXTRW instruction https://www.felixcloutier.com/x86/pextrw 379 PEXTRW 380 // PEXTRD is the PEXTRD instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 381 PEXTRD 382 // PEXTRQ is the PEXTRQ instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 383 PEXTRQ 384 // MOVLHPS is the MOVLHPS instruction https://www.felixcloutier.com/x86/movlhps 385 MOVLHPS 386 // INSERTPS is the INSERTPS instruction https://www.felixcloutier.com/x86/insertps 387 INSERTPS 388 // PTEST is the PTEST instruction https://www.felixcloutier.com/x86/ptest 389 PTEST 390 // PCMPEQB is the PCMPEQB instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 391 PCMPEQB 392 // PCMPEQW is the PCMPEQW instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 393 PCMPEQW 394 // PCMPEQD is the PCMPEQD instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 395 PCMPEQD 396 // PCMPEQQ is the PCMPEQQ instruction https://www.felixcloutier.com/x86/pcmpeqq 397 PCMPEQQ 398 // PADDUSB is the PADDUSB instruction https://www.felixcloutier.com/x86/paddusb:paddusw 399 PADDUSB 400 // MOVSD is the MOVSD instruction https://www.felixcloutier.com/x86/movsd 401 MOVSD 402 // PACKSSWB is the PACKSSWB instruction https://www.felixcloutier.com/x86/packsswb:packssdw 403 PACKSSWB 404 // PMOVMSKB is the PMOVMSKB instruction https://www.felixcloutier.com/x86/pmovmskb 405 PMOVMSKB 406 // MOVMSKPS is the MOVMSKPS instruction https://www.felixcloutier.com/x86/movmskps 407 MOVMSKPS 408 // MOVMSKPD is the MOVMSKPD instruction https://www.felixcloutier.com/x86/movmskpd 409 MOVMSKPD 410 // PAND is the PAND instruction https://www.felixcloutier.com/x86/pand 411 PAND 412 // POR is the POR instruction https://www.felixcloutier.com/x86/por 413 POR 414 // PANDN is the PANDN instruction https://www.felixcloutier.com/x86/pandn 415 PANDN 416 // PSRAD is the PSRAD instruction https://www.felixcloutier.com/x86/psraw:psrad:psraq 417 PSRAD 418 // PSRAW is the PSRAW instruction https://www.felixcloutier.com/x86/psraw:psrad:psraq 419 PSRAW 420 // PSRLW is the PSRLW instruction https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 421 PSRLW 422 // PSLLW is the PSLLW instruction https://www.felixcloutier.com/x86/psllw:pslld:psllq 423 PSLLW 424 // PUNPCKLBW is the PUNPCKLBW instruction https://www.felixcloutier.com/x86/punpcklbw:punpcklwd:punpckldq:punpcklqdq 425 PUNPCKLBW 426 // PUNPCKHBW is the PUNPCKHBW instruction https://www.felixcloutier.com/x86/punpckhbw:punpckhwd:punpckhdq:punpckhqdq 427 PUNPCKHBW 428 // CMPPS is the CMPPS instruction https://www.felixcloutier.com/x86/cmpps 429 CMPPS 430 // CMPPD is the https://www.felixcloutier.com/x86/cmppd 431 CMPPD 432 // PCMPGTQ is the PCMPGTQ instruction https://www.felixcloutier.com/x86/pcmpgtq 433 PCMPGTQ 434 // PCMPGTD is the PCMPGTD instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 435 PCMPGTD 436 // PCMPGTW is the PCMPGTW instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 437 PCMPGTW 438 // PCMPGTB is the PCMPGTB instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 439 PCMPGTB 440 // PMINSD is the PMINSD instruction https://www.felixcloutier.com/x86/pminsd:pminsq 441 PMINSD 442 // PMINSW is the PMINSW instruction https://www.felixcloutier.com/x86/pminsb:pminsw 443 PMINSW 444 // PMINSB is the PMINSB instruction https://www.felixcloutier.com/x86/pminsb:pminsw 445 PMINSB 446 // PMAXSD is the PMAXSD instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 447 PMAXSD 448 // PMAXSW is the PMAXSW instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 449 PMAXSW 450 // PMAXSB is the PMAXSB instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 451 PMAXSB 452 // PMINUD is the PMINUD instruction https://www.felixcloutier.com/x86/pminud:pminuq 453 PMINUD 454 // PMINUW is the PMINUW instruction https://www.felixcloutier.com/x86/pminub:pminuw 455 PMINUW 456 // PMINUB is the PMINUB instruction https://www.felixcloutier.com/x86/pminub:pminuw 457 PMINUB 458 // PMAXUD is the PMAXUD instruction https://www.felixcloutier.com/x86/pmaxud:pmaxuq 459 PMAXUD 460 // PMAXUW is the PMAXUW instruction https://www.felixcloutier.com/x86/pmaxub:pmaxuw 461 PMAXUW 462 // PMAXUB is the PMAXUB instruction https://www.felixcloutier.com/x86/pmaxub:pmaxuw 463 PMAXUB 464 // PMULLW is the PMULLW instruction https://www.felixcloutier.com/x86/pmullw 465 PMULLW 466 // PMULLD is the PMULLD instruction https://www.felixcloutier.com/x86/pmulld:pmullq 467 PMULLD 468 // PMULUDQ is the PMULUDQ instruction https://www.felixcloutier.com/x86/pmuludq 469 PMULUDQ 470 // PSUBSB is the PSUBSB instruction https://www.felixcloutier.com/x86/psubsb:psubsw 471 PSUBSB 472 // PSUBSW is the PSUBSW instruction https://www.felixcloutier.com/x86/psubsb:psubsw 473 PSUBSW 474 // PSUBUSB is the PSUBUSB instruction https://www.felixcloutier.com/x86/psubusb:psubusw 475 PSUBUSB 476 // PSUBUSW is the PSUBUSW instruction https://www.felixcloutier.com/x86/psubusb:psubusw 477 PSUBUSW 478 // PADDSW is the PADDSW instruction https://www.felixcloutier.com/x86/paddsb:paddsw 479 PADDSW 480 // PADDSB is the PADDSB instruction https://www.felixcloutier.com/x86/paddsb:paddsw 481 PADDSB 482 // PADDUSW is the PADDUSW instruction https://www.felixcloutier.com/x86/paddusb:paddusw 483 PADDUSW 484 // PAVGB is the PAVGB instruction https://www.felixcloutier.com/x86/pavgb:pavgw 485 PAVGB 486 // PAVGW is the PAVGW instruction https://www.felixcloutier.com/x86/pavgb:pavgw 487 PAVGW 488 // PABSB is the PABSB instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 489 PABSB 490 // PABSW is the PABSW instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 491 PABSW 492 // PABSD is the PABSD instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 493 PABSD 494 // BLENDVPD is the BLENDVPD instruction https://www.felixcloutier.com/x86/blendvpd 495 BLENDVPD 496 // MAXPD is the MAXPD instruction https://www.felixcloutier.com/x86/maxpd 497 MAXPD 498 // MAXPS is the MAXPS instruction https://www.felixcloutier.com/x86/maxps 499 MAXPS 500 // MINPD is the MINPD instruction https://www.felixcloutier.com/x86/minpd 501 MINPD 502 // MINPS is the MINPS instruction https://www.felixcloutier.com/x86/minps 503 MINPS 504 // ANDNPD is the ANDNPD instruction https://www.felixcloutier.com/x86/andnpd 505 ANDNPD 506 // ANDNPS is the ANDNPS instruction https://www.felixcloutier.com/x86/andnps 507 ANDNPS 508 // MULPS is the MULPS instruction https://www.felixcloutier.com/x86/mulps 509 MULPS 510 // MULPD is the MULPD instruction https://www.felixcloutier.com/x86/mulpd 511 MULPD 512 // DIVPS is the DIVPS instruction https://www.felixcloutier.com/x86/divps 513 DIVPS 514 // DIVPD is the DIVPD instruction https://www.felixcloutier.com/x86/divpd 515 DIVPD 516 // SQRTPS is the SQRTPS instruction https://www.felixcloutier.com/x86/sqrtps 517 SQRTPS 518 // SQRTPD is the SQRTPD instruction https://www.felixcloutier.com/x86/sqrtpd 519 SQRTPD 520 // ROUNDPS is the ROUNDPS instruction https://www.felixcloutier.com/x86/roundps 521 ROUNDPS 522 // ROUNDPD is the ROUNDPD instruction https://www.felixcloutier.com/x86/roundpd 523 ROUNDPD 524 // PALIGNR is the PALIGNR instruction https://www.felixcloutier.com/x86/palignr 525 PALIGNR 526 // PUNPCKLWD is the PUNPCKLWD instruction https://www.felixcloutier.com/x86/punpcklbw:punpcklwd:punpckldq:punpcklqdq 527 PUNPCKLWD 528 // PUNPCKHWD is the PUNPCKHWD instruction https://www.felixcloutier.com/x86/punpckhbw:punpckhwd:punpckhdq:punpckhqdq 529 PUNPCKHWD 530 // PMULHUW is the PMULHUW instruction https://www.felixcloutier.com/x86/pmulhuw 531 PMULHUW 532 // PMULDQ is the PMULDQ instruction https://www.felixcloutier.com/x86/pmuldq 533 PMULDQ 534 // PMULHRSW is the PMULHRSW instruction https://www.felixcloutier.com/x86/pmulhrsw 535 PMULHRSW 536 // PMULHW is the PMULHW instruction https://www.felixcloutier.com/x86/pmulhw 537 PMULHW 538 // CMPEQPS is the CMPEQPS instruction https://www.felixcloutier.com/x86/cmpps 539 CMPEQPS 540 // CMPEQPD is the CMPEQPD instruction https://www.felixcloutier.com/x86/cmppd 541 CMPEQPD 542 // CVTTPS2DQ is the CVTTPS2DQ instruction https://www.felixcloutier.com/x86/cvttps2dq 543 CVTTPS2DQ 544 // CVTDQ2PS is the CVTDQ2PS instruction https://www.felixcloutier.com/x86/cvtdq2ps 545 CVTDQ2PS 546 // MOVUPD is the MOVUPD instruction https://www.felixcloutier.com/x86/movupd 547 MOVUPD 548 // SHUFPS is the SHUFPS instruction https://www.felixcloutier.com/x86/shufps 549 SHUFPS 550 // PMADDWD is the PMADDWD instruction https://www.felixcloutier.com/x86/pmaddwd 551 PMADDWD 552 // CVTDQ2PD is the CVTDQ2PD instruction https://www.felixcloutier.com/x86/cvtdq2pd 553 CVTDQ2PD 554 // UNPCKLPS is the UNPCKLPS instruction https://www.felixcloutier.com/x86/unpcklps 555 UNPCKLPS 556 // PACKUSWB is the PACKUSWB instruction https://www.felixcloutier.com/x86/packuswb 557 PACKUSWB 558 // PACKSSDW is the PACKSSDW instruction https://www.felixcloutier.com/x86/packsswb:packssdw 559 PACKSSDW 560 // PACKUSDW is the PACKUSDW instruction https://www.felixcloutier.com/x86/packusdw 561 PACKUSDW 562 // CVTPS2PD is the CVTPS2PD instruction https://www.felixcloutier.com/x86/cvtps2pd 563 CVTPS2PD 564 // CVTPD2PS is the CVTPD2PS instruction https://www.felixcloutier.com/x86/cvtpd2ps 565 CVTPD2PS 566 // PMADDUBSW is the PMADDUBSW instruction https://www.felixcloutier.com/x86/pmaddubsw 567 PMADDUBSW 568 // CVTTPD2DQ is the CVTTPD2DQ instruction https://www.felixcloutier.com/x86/cvttpd2dq 569 CVTTPD2DQ 570 571 // instructionEnd is always placed at the bottom of this iota definition to be used in the test. 572 instructionEnd 573 ) 574 575 // InstructionName returns the name for an instruction 576 func InstructionName(instruction asm.Instruction) string { 577 switch instruction { 578 case ADDL: 579 return "ADDL" 580 case ADDQ: 581 return "ADDQ" 582 case ADDSD: 583 return "ADDSD" 584 case ADDSS: 585 return "ADDSS" 586 case ANDL: 587 return "ANDL" 588 case ANDPD: 589 return "ANDPD" 590 case ANDPS: 591 return "ANDPS" 592 case ANDQ: 593 return "ANDQ" 594 case BSRL: 595 return "BSRL" 596 case BSRQ: 597 return "BSRQ" 598 case CDQ: 599 return "CDQ" 600 case CLD: 601 return "CLD" 602 case CMOVQCS: 603 return "CMOVQCS" 604 case CMPL: 605 return "CMPL" 606 case CMPQ: 607 return "CMPQ" 608 case COMISD: 609 return "COMISD" 610 case COMISS: 611 return "COMISS" 612 case CQO: 613 return "CQO" 614 case CVTSD2SS: 615 return "CVTSD2SS" 616 case CVTSL2SD: 617 return "CVTSL2SD" 618 case CVTSL2SS: 619 return "CVTSL2SS" 620 case CVTSQ2SD: 621 return "CVTSQ2SD" 622 case CVTSQ2SS: 623 return "CVTSQ2SS" 624 case CVTSS2SD: 625 return "CVTSS2SD" 626 case CVTTSD2SL: 627 return "CVTTSD2SL" 628 case CVTTSD2SQ: 629 return "CVTTSD2SQ" 630 case CVTTSS2SL: 631 return "CVTTSS2SL" 632 case CVTTSS2SQ: 633 return "CVTTSS2SQ" 634 case DECQ: 635 return "DECQ" 636 case DIVL: 637 return "DIVL" 638 case DIVQ: 639 return "DIVQ" 640 case DIVSD: 641 return "DIVSD" 642 case DIVSS: 643 return "DIVSS" 644 case IDIVL: 645 return "IDIVL" 646 case IDIVQ: 647 return "IDIVQ" 648 case INCQ: 649 return "INCQ" 650 case JCC: 651 return "JCC" 652 case JCS: 653 return "JCS" 654 case JEQ: 655 return "JEQ" 656 case JGE: 657 return "JGE" 658 case JGT: 659 return "JGT" 660 case JHI: 661 return "JHI" 662 case JLE: 663 return "JLE" 664 case JLS: 665 return "JLS" 666 case JLT: 667 return "JLT" 668 case JMI: 669 return "JMI" 670 case JNE: 671 return "JNE" 672 case JPC: 673 return "JPC" 674 case JPL: 675 return "JPL" 676 case JPS: 677 return "JPS" 678 case LEAQ: 679 return "LEAQ" 680 case LZCNTL: 681 return "LZCNTL" 682 case LZCNTQ: 683 return "LZCNTQ" 684 case MAXSD: 685 return "MAXSD" 686 case MAXSS: 687 return "MAXSS" 688 case MINSD: 689 return "MINSD" 690 case MINSS: 691 return "MINSS" 692 case MOVB: 693 return "MOVB" 694 case MOVBLSX: 695 return "MOVBLSX" 696 case MOVBLZX: 697 return "MOVBLZX" 698 case MOVBQSX: 699 return "MOVBQSX" 700 case MOVBQZX: 701 return "MOVBQZX" 702 case MOVL: 703 return "MOVL" 704 case MOVLQSX: 705 return "MOVLQSX" 706 case MOVLQZX: 707 return "MOVLQZX" 708 case MOVQ: 709 return "MOVQ" 710 case MOVW: 711 return "MOVW" 712 case MOVWLSX: 713 return "MOVWLSX" 714 case MOVWLZX: 715 return "MOVWLZX" 716 case MOVWQSX: 717 return "MOVWQSX" 718 case MOVWQZX: 719 return "MOVWQZX" 720 case MULL: 721 return "MULL" 722 case MULQ: 723 return "MULQ" 724 case IMULQ: 725 return "IMULQ" 726 case MULSD: 727 return "MULSD" 728 case MULSS: 729 return "MULSS" 730 case ORL: 731 return "ORL" 732 case ORPD: 733 return "ORPD" 734 case ORPS: 735 return "ORPS" 736 case ORQ: 737 return "ORQ" 738 case POPCNTL: 739 return "POPCNTL" 740 case POPCNTQ: 741 return "POPCNTQ" 742 case PSLLD: 743 return "PSLLD" 744 case PSLLQ: 745 return "PSLLQ" 746 case PSRLD: 747 return "PSRLD" 748 case PSRLQ: 749 return "PSRLQ" 750 case REPMOVSQ: 751 return "REP MOVSQ" 752 case REPSTOSQ: 753 return "REP STOSQ" 754 case ROLL: 755 return "ROLL" 756 case ROLQ: 757 return "ROLQ" 758 case RORL: 759 return "RORL" 760 case RORQ: 761 return "RORQ" 762 case ROUNDSD: 763 return "ROUNDSD" 764 case ROUNDSS: 765 return "ROUNDSS" 766 case SARL: 767 return "SARL" 768 case SARQ: 769 return "SARQ" 770 case SETCC: 771 return "SETCC" 772 case SETCS: 773 return "SETCS" 774 case SETEQ: 775 return "SETEQ" 776 case SETGE: 777 return "SETGE" 778 case SETGT: 779 return "SETGT" 780 case SETHI: 781 return "SETHI" 782 case SETLE: 783 return "SETLE" 784 case SETLS: 785 return "SETLS" 786 case SETLT: 787 return "SETLT" 788 case SETMI: 789 return "SETMI" 790 case SETNE: 791 return "SETNE" 792 case SETPC: 793 return "SETPC" 794 case SETPL: 795 return "SETPL" 796 case SETPS: 797 return "SETPS" 798 case SHLL: 799 return "SHLL" 800 case SHLQ: 801 return "SHLQ" 802 case SHRL: 803 return "SHRL" 804 case SHRQ: 805 return "SHRQ" 806 case SQRTSD: 807 return "SQRTSD" 808 case SQRTSS: 809 return "SQRTSS" 810 case STD: 811 return "STD" 812 case SUBL: 813 return "SUBL" 814 case SUBQ: 815 return "SUBQ" 816 case SUBSD: 817 return "SUBSD" 818 case SUBSS: 819 return "SUBSS" 820 case TESTL: 821 return "TESTL" 822 case TESTQ: 823 return "TESTQ" 824 case TZCNTL: 825 return "TZCNTL" 826 case TZCNTQ: 827 return "TZCNTQ" 828 case UCOMISD: 829 return "UCOMISD" 830 case UCOMISS: 831 return "UCOMISS" 832 case XORL: 833 return "XORL" 834 case XORPD: 835 return "XORPD" 836 case XORPS: 837 return "XORPS" 838 case XORQ: 839 return "XORQ" 840 case XCHGQ: 841 return "XCHGQ" 842 case RET: 843 return "RET" 844 case JMP: 845 return "JMP" 846 case NOP: 847 return "NOP" 848 case UD2: 849 return "UD2" 850 case MOVDQU: 851 return "MOVDQU" 852 case PINSRB: 853 return "PINSRB" 854 case PINSRW: 855 return "PINSRW" 856 case PINSRD: 857 return "PINSRD" 858 case PINSRQ: 859 return "PINSRQ" 860 case PADDB: 861 return "PADDB" 862 case PADDW: 863 return "PADDW" 864 case PADDD: 865 return "PADDD" 866 case PADDQ: 867 return "PADDQ" 868 case ADDPS: 869 return "ADDPS" 870 case ADDPD: 871 return "ADDPD" 872 case PSUBB: 873 return "PSUBB" 874 case PSUBW: 875 return "PSUBW" 876 case PSUBD: 877 return "PSUBD" 878 case PSUBQ: 879 return "PSUBQ" 880 case SUBPS: 881 return "SUBPS" 882 case SUBPD: 883 return "SUBPD" 884 case PMOVSXBW: 885 return "PMOVSXBW" 886 case PMOVSXWD: 887 return "PMOVSXWD" 888 case PMOVSXDQ: 889 return "PMOVSXDQ" 890 case PMOVZXBW: 891 return "PMOVZXBW" 892 case PMOVZXWD: 893 return "PMOVZXWD" 894 case PMOVZXDQ: 895 return "PMOVZXDQ" 896 case PSHUFB: 897 return "PSHUFB" 898 case PSHUFD: 899 return "PSHUFD" 900 case PXOR: 901 return "PXOR" 902 case PEXTRB: 903 return "PEXTRB" 904 case PEXTRW: 905 return "PEXTRW" 906 case PEXTRD: 907 return "PEXTRD" 908 case PEXTRQ: 909 return "PEXTRQ" 910 case INSERTPS: 911 return "INSERTPS" 912 case MOVLHPS: 913 return "MOVLHPS" 914 case PTEST: 915 return "PTEST" 916 case PCMPEQB: 917 return "PCMPEQB" 918 case PCMPEQW: 919 return "PCMPEQW" 920 case PCMPEQD: 921 return "PCMPEQD" 922 case PCMPEQQ: 923 return "PCMPEQQ" 924 case PADDUSB: 925 return "PADDUSB" 926 case MOVDQA: 927 return "MOVDQA" 928 case MOVSD: 929 return "MOVSD" 930 case PACKSSWB: 931 return "PACKSSWB" 932 case PMOVMSKB: 933 return "PMOVMSKB" 934 case MOVMSKPS: 935 return "MOVMSKPS" 936 case MOVMSKPD: 937 return "MOVMSKPD" 938 case PAND: 939 return "PAND" 940 case POR: 941 return "POR" 942 case PANDN: 943 return "PANDN" 944 case PSRAD: 945 return "PSRAD" 946 case PSRAW: 947 return "PSRAW" 948 case PSRLW: 949 return "PSRLW" 950 case PSLLW: 951 return "PSLLW" 952 case PUNPCKLBW: 953 return "PUNPCKLBW" 954 case PUNPCKHBW: 955 return "PUNPCKHBW" 956 case NEGQ: 957 return "NEGQ" 958 case NONE: 959 return "NONE" 960 case CMPPS: 961 return "CMPPS" 962 case CMPPD: 963 return "CMPPD" 964 case PCMPGTQ: 965 return "PCMPGTQ" 966 case PCMPGTD: 967 return "PCMPGTD" 968 case PMINSD: 969 return "PMINSD" 970 case PMAXSD: 971 return "PMAXSD" 972 case PMINSW: 973 return "PMINSW" 974 case PCMPGTB: 975 return "PCMPGTB" 976 case PMINSB: 977 return "PMINSB" 978 case PMINUD: 979 return "PMINUD" 980 case PMINUW: 981 return "PMINUW" 982 case PMINUB: 983 return "PMINUB" 984 case PMAXUD: 985 return "PMAXUD" 986 case PMAXUW: 987 return "PMAXUW" 988 case PMAXUB: 989 return "PMAXUB" 990 case PCMPGTW: 991 return "PCMPGTW" 992 case PMAXSW: 993 return "PMAXSW" 994 case PMAXSB: 995 return "PMAXSB" 996 case PMULLW: 997 return "PMULLW" 998 case PMULLD: 999 return "PMULLD" 1000 case PMULUDQ: 1001 return "PMULUDQ" 1002 case PSUBSB: 1003 return "PSUBSB" 1004 case PSUBUSB: 1005 return "PSUBUSB" 1006 case PADDSW: 1007 return "PADDSW" 1008 case PADDSB: 1009 return "PADDSB" 1010 case PADDUSW: 1011 return "PADDUSW" 1012 case PSUBSW: 1013 return "PSUBSW" 1014 case PSUBUSW: 1015 return "PSUBUSW" 1016 case PAVGB: 1017 return "PAVGB" 1018 case PAVGW: 1019 return "PAVGW" 1020 case PABSB: 1021 return "PABSB" 1022 case PABSW: 1023 return "PABSW" 1024 case PABSD: 1025 return "PABSD" 1026 case BLENDVPD: 1027 return "BLENDVPD" 1028 case MAXPD: 1029 return "MAXPD" 1030 case MAXPS: 1031 return "MAXPS" 1032 case MINPD: 1033 return "MINPD" 1034 case MINPS: 1035 return "MINPS" 1036 case ANDNPD: 1037 return "ANDNPD" 1038 case ANDNPS: 1039 return "ANDNPS" 1040 case MULPS: 1041 return "MULPS" 1042 case MULPD: 1043 return "MULPD" 1044 case DIVPS: 1045 return "DIVPS" 1046 case DIVPD: 1047 return "DIVPD" 1048 case SQRTPS: 1049 return "SQRTPS" 1050 case SQRTPD: 1051 return "SQRTPD" 1052 case ROUNDPS: 1053 return "ROUNDPS" 1054 case ROUNDPD: 1055 return "ROUNDPD" 1056 case PALIGNR: 1057 return "PALIGNR" 1058 case PUNPCKLWD: 1059 return "PUNPCKLWD" 1060 case PUNPCKHWD: 1061 return "PUNPCKHWD" 1062 case PMULHUW: 1063 return "PMULHUW" 1064 case PMULDQ: 1065 return "PMULDQ" 1066 case PMULHRSW: 1067 return "PMULHRSW" 1068 case PMULHW: 1069 return "PMULHW" 1070 case CMPEQPS: 1071 return "CMPEQPS" 1072 case CMPEQPD: 1073 return "CMPEQPD" 1074 case CVTTPS2DQ: 1075 return "CVTTPS2DQ" 1076 case CVTDQ2PS: 1077 return "CVTDQ2PS" 1078 case MOVUPD: 1079 return "MOVUPD" 1080 case SHUFPS: 1081 return "SHUFPS" 1082 case PMADDWD: 1083 return "PMADDWD" 1084 case CVTDQ2PD: 1085 return "CVTDQ2PD" 1086 case UNPCKLPS: 1087 return "UNPCKLPS" 1088 case PACKUSWB: 1089 return "PACKUSWB" 1090 case PACKSSDW: 1091 return "PACKSSDW" 1092 case PACKUSDW: 1093 return "PACKUSDW" 1094 case CVTPS2PD: 1095 return "CVTPS2PD" 1096 case CVTPD2PS: 1097 return "CVTPD2PS" 1098 case PMADDUBSW: 1099 return "PMADDUBSW" 1100 case CVTTPD2DQ: 1101 return "CVTTPD2DQ" 1102 } 1103 panic(fmt.Errorf("unknown instruction %d", instruction)) 1104 } 1105 1106 // Amd64-specific registers. 1107 // 1108 // Note: naming convention intentionally matches the Go assembler: https://go.dev/doc/asm 1109 // See https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf 1110 // See https://cs.brown.edu/courses/cs033/docs/guides/x64_cheatsheet.pdf 1111 const ( 1112 // RegAX is the ax register 1113 RegAX = asm.NilRegister + 1 + iota 1114 // RegCX is the cx register 1115 RegCX 1116 // RegDX is the dx register 1117 RegDX 1118 // RegBX is the bx register 1119 RegBX 1120 // RegSP is the sp register 1121 RegSP 1122 // RegBP is the bp register 1123 RegBP 1124 // RegSI is the si register 1125 RegSI 1126 // RegDI is the di register 1127 RegDI 1128 // RegR8 is the r8 register 1129 RegR8 1130 // RegR9 is the r9 register 1131 RegR9 1132 // RegR10 is the r10 register 1133 RegR10 1134 // RegR11 is the r11 register 1135 RegR11 1136 // RegR12 is the r12 register 1137 RegR12 1138 // RegR13 is the r13 register 1139 RegR13 1140 // RegR14 is the r14 register 1141 RegR14 1142 // RegR15 is the r15 register 1143 RegR15 1144 // RegX0 is the x0 register 1145 RegX0 1146 // RegX1 is the x1 register 1147 RegX1 1148 // RegX2 is the x2 register 1149 RegX2 1150 // RegX3 is the x3 register 1151 RegX3 1152 // RegX4 is the x4 register 1153 RegX4 1154 // RegX5 is the x5 register 1155 RegX5 1156 // RegX6 is the x6 register 1157 RegX6 1158 // RegX7 is the x7 register 1159 RegX7 1160 // RegX8 is the x8 register 1161 RegX8 1162 // RegX9 is the x9 register 1163 RegX9 1164 // RegX10 is the x10 register 1165 RegX10 1166 // RegX11 is the x11 register 1167 RegX11 1168 // RegX12 is the x12 register 1169 RegX12 1170 // RegX13 is the x13 register 1171 RegX13 1172 // RegX14 is the x14 register 1173 RegX14 1174 // RegX15 is the x15 register 1175 RegX15 1176 ) 1177 1178 // RegisterName returns the name for a register 1179 func RegisterName(reg asm.Register) string { 1180 switch reg { 1181 case RegAX: 1182 return "AX" 1183 case RegCX: 1184 return "CX" 1185 case RegDX: 1186 return "DX" 1187 case RegBX: 1188 return "BX" 1189 case RegSP: 1190 return "SP" 1191 case RegBP: 1192 return "BP" 1193 case RegSI: 1194 return "SI" 1195 case RegDI: 1196 return "DI" 1197 case RegR8: 1198 return "R8" 1199 case RegR9: 1200 return "R9" 1201 case RegR10: 1202 return "R10" 1203 case RegR11: 1204 return "R11" 1205 case RegR12: 1206 return "R12" 1207 case RegR13: 1208 return "R13" 1209 case RegR14: 1210 return "R14" 1211 case RegR15: 1212 return "R15" 1213 case RegX0: 1214 return "X0" 1215 case RegX1: 1216 return "X1" 1217 case RegX2: 1218 return "X2" 1219 case RegX3: 1220 return "X3" 1221 case RegX4: 1222 return "X4" 1223 case RegX5: 1224 return "X5" 1225 case RegX6: 1226 return "X6" 1227 case RegX7: 1228 return "X7" 1229 case RegX8: 1230 return "X8" 1231 case RegX9: 1232 return "X9" 1233 case RegX10: 1234 return "X10" 1235 case RegX11: 1236 return "X11" 1237 case RegX12: 1238 return "X12" 1239 case RegX13: 1240 return "X13" 1241 case RegX14: 1242 return "X14" 1243 case RegX15: 1244 return "X15" 1245 default: 1246 return "nil" 1247 } 1248 }