github.com/bir3/gocompiler@v0.3.205/src/cmd/compile/internal/ssa/addressingmodes.go (about) 1 // Copyright 2020 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 package ssa 6 7 // addressingModes combines address calculations into memory operations 8 // that can perform complicated addressing modes. 9 func addressingModes(f *Func) { 10 isInImmediateRange := is32Bit 11 switch f.Config.arch { 12 default: 13 // Most architectures can't do this. 14 return 15 case "amd64", "386": 16 case "s390x": 17 isInImmediateRange = is20Bit 18 } 19 20 var tmp []*Value 21 for _, b := range f.Blocks { 22 for _, v := range b.Values { 23 if !combineFirst[v.Op] { 24 continue 25 } 26 // All matched operations have the pointer in arg[0]. 27 // All results have the pointer in arg[0] and the index in arg[1]. 28 // *Except* for operations which update a register, 29 // which are marked with resultInArg0. Those have 30 // the pointer in arg[1], and the corresponding result op 31 // has the pointer in arg[1] and the index in arg[2]. 32 ptrIndex := 0 33 if opcodeTable[v.Op].resultInArg0 { 34 ptrIndex = 1 35 } 36 p := v.Args[ptrIndex] 37 c, ok := combine[[2]Op{v.Op, p.Op}] 38 if !ok { 39 continue 40 } 41 // See if we can combine the Aux/AuxInt values. 42 switch [2]auxType{opcodeTable[v.Op].auxType, opcodeTable[p.Op].auxType} { 43 case [2]auxType{auxSymOff, auxInt32}: 44 // TODO: introduce auxSymOff32 45 if !isInImmediateRange(v.AuxInt + p.AuxInt) { 46 continue 47 } 48 v.AuxInt += p.AuxInt 49 case [2]auxType{auxSymOff, auxSymOff}: 50 if v.Aux != nil && p.Aux != nil { 51 continue 52 } 53 if !isInImmediateRange(v.AuxInt + p.AuxInt) { 54 continue 55 } 56 if p.Aux != nil { 57 v.Aux = p.Aux 58 } 59 v.AuxInt += p.AuxInt 60 case [2]auxType{auxSymValAndOff, auxInt32}: 61 vo := ValAndOff(v.AuxInt) 62 if !vo.canAdd64(p.AuxInt) { 63 continue 64 } 65 v.AuxInt = int64(vo.addOffset64(p.AuxInt)) 66 case [2]auxType{auxSymValAndOff, auxSymOff}: 67 vo := ValAndOff(v.AuxInt) 68 if v.Aux != nil && p.Aux != nil { 69 continue 70 } 71 if !vo.canAdd64(p.AuxInt) { 72 continue 73 } 74 if p.Aux != nil { 75 v.Aux = p.Aux 76 } 77 v.AuxInt = int64(vo.addOffset64(p.AuxInt)) 78 case [2]auxType{auxSymOff, auxNone}: 79 // nothing to do 80 case [2]auxType{auxSymValAndOff, auxNone}: 81 // nothing to do 82 default: 83 f.Fatalf("unknown aux combining for %s and %s\n", v.Op, p.Op) 84 } 85 // Combine the operations. 86 tmp = append(tmp[:0], v.Args[:ptrIndex]...) 87 tmp = append(tmp, p.Args...) 88 tmp = append(tmp, v.Args[ptrIndex+1:]...) 89 v.resetArgs() 90 v.Op = c 91 v.AddArgs(tmp...) 92 if needSplit[c] { 93 // It turns out that some of the combined instructions have faster two-instruction equivalents, 94 // but not the two instructions that led to them being combined here. For example 95 // (CMPBconstload c (ADDQ x y)) -> (CMPBconstloadidx1 c x y) -> (CMPB c (MOVBloadidx1 x y)) 96 // The final pair of instructions turns out to be notably faster, at least in some benchmarks. 97 f.Config.splitLoad(v) 98 } 99 } 100 } 101 } 102 103 // combineFirst contains ops which appear in combine as the 104 // first part of the key. 105 var combineFirst = map[Op]bool{} 106 107 func init() { 108 for k := range combine { 109 combineFirst[k[0]] = true 110 } 111 } 112 113 // needSplit contains instructions that should be postprocessed by splitLoad 114 // into a more-efficient two-instruction form. 115 var needSplit = map[Op]bool{ 116 OpAMD64CMPBloadidx1: true, 117 OpAMD64CMPWloadidx1: true, 118 OpAMD64CMPLloadidx1: true, 119 OpAMD64CMPQloadidx1: true, 120 OpAMD64CMPWloadidx2: true, 121 OpAMD64CMPLloadidx4: true, 122 OpAMD64CMPQloadidx8: true, 123 124 OpAMD64CMPBconstloadidx1: true, 125 OpAMD64CMPWconstloadidx1: true, 126 OpAMD64CMPLconstloadidx1: true, 127 OpAMD64CMPQconstloadidx1: true, 128 OpAMD64CMPWconstloadidx2: true, 129 OpAMD64CMPLconstloadidx4: true, 130 OpAMD64CMPQconstloadidx8: true, 131 } 132 133 // For each entry k, v in this map, if we have a value x with: 134 // 135 // x.Op == k[0] 136 // x.Args[0].Op == k[1] 137 // 138 // then we can set x.Op to v and set x.Args like this: 139 // 140 // x.Args[0].Args + x.Args[1:] 141 // 142 // Additionally, the Aux/AuxInt from x.Args[0] is merged into x. 143 var combine = map[[2]Op]Op{ 144 // amd64 145 [2]Op{OpAMD64MOVBload, OpAMD64ADDQ}: OpAMD64MOVBloadidx1, 146 [2]Op{OpAMD64MOVWload, OpAMD64ADDQ}: OpAMD64MOVWloadidx1, 147 [2]Op{OpAMD64MOVLload, OpAMD64ADDQ}: OpAMD64MOVLloadidx1, 148 [2]Op{OpAMD64MOVQload, OpAMD64ADDQ}: OpAMD64MOVQloadidx1, 149 [2]Op{OpAMD64MOVSSload, OpAMD64ADDQ}: OpAMD64MOVSSloadidx1, 150 [2]Op{OpAMD64MOVSDload, OpAMD64ADDQ}: OpAMD64MOVSDloadidx1, 151 152 [2]Op{OpAMD64MOVBstore, OpAMD64ADDQ}: OpAMD64MOVBstoreidx1, 153 [2]Op{OpAMD64MOVWstore, OpAMD64ADDQ}: OpAMD64MOVWstoreidx1, 154 [2]Op{OpAMD64MOVLstore, OpAMD64ADDQ}: OpAMD64MOVLstoreidx1, 155 [2]Op{OpAMD64MOVQstore, OpAMD64ADDQ}: OpAMD64MOVQstoreidx1, 156 [2]Op{OpAMD64MOVSSstore, OpAMD64ADDQ}: OpAMD64MOVSSstoreidx1, 157 [2]Op{OpAMD64MOVSDstore, OpAMD64ADDQ}: OpAMD64MOVSDstoreidx1, 158 159 [2]Op{OpAMD64MOVBstoreconst, OpAMD64ADDQ}: OpAMD64MOVBstoreconstidx1, 160 [2]Op{OpAMD64MOVWstoreconst, OpAMD64ADDQ}: OpAMD64MOVWstoreconstidx1, 161 [2]Op{OpAMD64MOVLstoreconst, OpAMD64ADDQ}: OpAMD64MOVLstoreconstidx1, 162 [2]Op{OpAMD64MOVQstoreconst, OpAMD64ADDQ}: OpAMD64MOVQstoreconstidx1, 163 164 [2]Op{OpAMD64MOVBload, OpAMD64LEAQ1}: OpAMD64MOVBloadidx1, 165 [2]Op{OpAMD64MOVWload, OpAMD64LEAQ1}: OpAMD64MOVWloadidx1, 166 [2]Op{OpAMD64MOVWload, OpAMD64LEAQ2}: OpAMD64MOVWloadidx2, 167 [2]Op{OpAMD64MOVLload, OpAMD64LEAQ1}: OpAMD64MOVLloadidx1, 168 [2]Op{OpAMD64MOVLload, OpAMD64LEAQ4}: OpAMD64MOVLloadidx4, 169 [2]Op{OpAMD64MOVLload, OpAMD64LEAQ8}: OpAMD64MOVLloadidx8, 170 [2]Op{OpAMD64MOVQload, OpAMD64LEAQ1}: OpAMD64MOVQloadidx1, 171 [2]Op{OpAMD64MOVQload, OpAMD64LEAQ8}: OpAMD64MOVQloadidx8, 172 [2]Op{OpAMD64MOVSSload, OpAMD64LEAQ1}: OpAMD64MOVSSloadidx1, 173 [2]Op{OpAMD64MOVSSload, OpAMD64LEAQ4}: OpAMD64MOVSSloadidx4, 174 [2]Op{OpAMD64MOVSDload, OpAMD64LEAQ1}: OpAMD64MOVSDloadidx1, 175 [2]Op{OpAMD64MOVSDload, OpAMD64LEAQ8}: OpAMD64MOVSDloadidx8, 176 177 [2]Op{OpAMD64MOVBstore, OpAMD64LEAQ1}: OpAMD64MOVBstoreidx1, 178 [2]Op{OpAMD64MOVWstore, OpAMD64LEAQ1}: OpAMD64MOVWstoreidx1, 179 [2]Op{OpAMD64MOVWstore, OpAMD64LEAQ2}: OpAMD64MOVWstoreidx2, 180 [2]Op{OpAMD64MOVLstore, OpAMD64LEAQ1}: OpAMD64MOVLstoreidx1, 181 [2]Op{OpAMD64MOVLstore, OpAMD64LEAQ4}: OpAMD64MOVLstoreidx4, 182 [2]Op{OpAMD64MOVLstore, OpAMD64LEAQ8}: OpAMD64MOVLstoreidx8, 183 [2]Op{OpAMD64MOVQstore, OpAMD64LEAQ1}: OpAMD64MOVQstoreidx1, 184 [2]Op{OpAMD64MOVQstore, OpAMD64LEAQ8}: OpAMD64MOVQstoreidx8, 185 [2]Op{OpAMD64MOVSSstore, OpAMD64LEAQ1}: OpAMD64MOVSSstoreidx1, 186 [2]Op{OpAMD64MOVSSstore, OpAMD64LEAQ4}: OpAMD64MOVSSstoreidx4, 187 [2]Op{OpAMD64MOVSDstore, OpAMD64LEAQ1}: OpAMD64MOVSDstoreidx1, 188 [2]Op{OpAMD64MOVSDstore, OpAMD64LEAQ8}: OpAMD64MOVSDstoreidx8, 189 190 [2]Op{OpAMD64MOVBstoreconst, OpAMD64LEAQ1}: OpAMD64MOVBstoreconstidx1, 191 [2]Op{OpAMD64MOVWstoreconst, OpAMD64LEAQ1}: OpAMD64MOVWstoreconstidx1, 192 [2]Op{OpAMD64MOVWstoreconst, OpAMD64LEAQ2}: OpAMD64MOVWstoreconstidx2, 193 [2]Op{OpAMD64MOVLstoreconst, OpAMD64LEAQ1}: OpAMD64MOVLstoreconstidx1, 194 [2]Op{OpAMD64MOVLstoreconst, OpAMD64LEAQ4}: OpAMD64MOVLstoreconstidx4, 195 [2]Op{OpAMD64MOVQstoreconst, OpAMD64LEAQ1}: OpAMD64MOVQstoreconstidx1, 196 [2]Op{OpAMD64MOVQstoreconst, OpAMD64LEAQ8}: OpAMD64MOVQstoreconstidx8, 197 198 // These instructions are re-split differently for performance, see needSplit above. 199 // TODO if 386 versions are created, also update needSplit and _gen/386splitload.rules 200 [2]Op{OpAMD64CMPBload, OpAMD64ADDQ}: OpAMD64CMPBloadidx1, 201 [2]Op{OpAMD64CMPWload, OpAMD64ADDQ}: OpAMD64CMPWloadidx1, 202 [2]Op{OpAMD64CMPLload, OpAMD64ADDQ}: OpAMD64CMPLloadidx1, 203 [2]Op{OpAMD64CMPQload, OpAMD64ADDQ}: OpAMD64CMPQloadidx1, 204 205 [2]Op{OpAMD64CMPBload, OpAMD64LEAQ1}: OpAMD64CMPBloadidx1, 206 [2]Op{OpAMD64CMPWload, OpAMD64LEAQ1}: OpAMD64CMPWloadidx1, 207 [2]Op{OpAMD64CMPWload, OpAMD64LEAQ2}: OpAMD64CMPWloadidx2, 208 [2]Op{OpAMD64CMPLload, OpAMD64LEAQ1}: OpAMD64CMPLloadidx1, 209 [2]Op{OpAMD64CMPLload, OpAMD64LEAQ4}: OpAMD64CMPLloadidx4, 210 [2]Op{OpAMD64CMPQload, OpAMD64LEAQ1}: OpAMD64CMPQloadidx1, 211 [2]Op{OpAMD64CMPQload, OpAMD64LEAQ8}: OpAMD64CMPQloadidx8, 212 213 [2]Op{OpAMD64CMPBconstload, OpAMD64ADDQ}: OpAMD64CMPBconstloadidx1, 214 [2]Op{OpAMD64CMPWconstload, OpAMD64ADDQ}: OpAMD64CMPWconstloadidx1, 215 [2]Op{OpAMD64CMPLconstload, OpAMD64ADDQ}: OpAMD64CMPLconstloadidx1, 216 [2]Op{OpAMD64CMPQconstload, OpAMD64ADDQ}: OpAMD64CMPQconstloadidx1, 217 218 [2]Op{OpAMD64CMPBconstload, OpAMD64LEAQ1}: OpAMD64CMPBconstloadidx1, 219 [2]Op{OpAMD64CMPWconstload, OpAMD64LEAQ1}: OpAMD64CMPWconstloadidx1, 220 [2]Op{OpAMD64CMPWconstload, OpAMD64LEAQ2}: OpAMD64CMPWconstloadidx2, 221 [2]Op{OpAMD64CMPLconstload, OpAMD64LEAQ1}: OpAMD64CMPLconstloadidx1, 222 [2]Op{OpAMD64CMPLconstload, OpAMD64LEAQ4}: OpAMD64CMPLconstloadidx4, 223 [2]Op{OpAMD64CMPQconstload, OpAMD64LEAQ1}: OpAMD64CMPQconstloadidx1, 224 [2]Op{OpAMD64CMPQconstload, OpAMD64LEAQ8}: OpAMD64CMPQconstloadidx8, 225 226 [2]Op{OpAMD64ADDLload, OpAMD64ADDQ}: OpAMD64ADDLloadidx1, 227 [2]Op{OpAMD64ADDQload, OpAMD64ADDQ}: OpAMD64ADDQloadidx1, 228 [2]Op{OpAMD64SUBLload, OpAMD64ADDQ}: OpAMD64SUBLloadidx1, 229 [2]Op{OpAMD64SUBQload, OpAMD64ADDQ}: OpAMD64SUBQloadidx1, 230 [2]Op{OpAMD64ANDLload, OpAMD64ADDQ}: OpAMD64ANDLloadidx1, 231 [2]Op{OpAMD64ANDQload, OpAMD64ADDQ}: OpAMD64ANDQloadidx1, 232 [2]Op{OpAMD64ORLload, OpAMD64ADDQ}: OpAMD64ORLloadidx1, 233 [2]Op{OpAMD64ORQload, OpAMD64ADDQ}: OpAMD64ORQloadidx1, 234 [2]Op{OpAMD64XORLload, OpAMD64ADDQ}: OpAMD64XORLloadidx1, 235 [2]Op{OpAMD64XORQload, OpAMD64ADDQ}: OpAMD64XORQloadidx1, 236 237 [2]Op{OpAMD64ADDLload, OpAMD64LEAQ1}: OpAMD64ADDLloadidx1, 238 [2]Op{OpAMD64ADDLload, OpAMD64LEAQ4}: OpAMD64ADDLloadidx4, 239 [2]Op{OpAMD64ADDLload, OpAMD64LEAQ8}: OpAMD64ADDLloadidx8, 240 [2]Op{OpAMD64ADDQload, OpAMD64LEAQ1}: OpAMD64ADDQloadidx1, 241 [2]Op{OpAMD64ADDQload, OpAMD64LEAQ8}: OpAMD64ADDQloadidx8, 242 [2]Op{OpAMD64SUBLload, OpAMD64LEAQ1}: OpAMD64SUBLloadidx1, 243 [2]Op{OpAMD64SUBLload, OpAMD64LEAQ4}: OpAMD64SUBLloadidx4, 244 [2]Op{OpAMD64SUBLload, OpAMD64LEAQ8}: OpAMD64SUBLloadidx8, 245 [2]Op{OpAMD64SUBQload, OpAMD64LEAQ1}: OpAMD64SUBQloadidx1, 246 [2]Op{OpAMD64SUBQload, OpAMD64LEAQ8}: OpAMD64SUBQloadidx8, 247 [2]Op{OpAMD64ANDLload, OpAMD64LEAQ1}: OpAMD64ANDLloadidx1, 248 [2]Op{OpAMD64ANDLload, OpAMD64LEAQ4}: OpAMD64ANDLloadidx4, 249 [2]Op{OpAMD64ANDLload, OpAMD64LEAQ8}: OpAMD64ANDLloadidx8, 250 [2]Op{OpAMD64ANDQload, OpAMD64LEAQ1}: OpAMD64ANDQloadidx1, 251 [2]Op{OpAMD64ANDQload, OpAMD64LEAQ8}: OpAMD64ANDQloadidx8, 252 [2]Op{OpAMD64ORLload, OpAMD64LEAQ1}: OpAMD64ORLloadidx1, 253 [2]Op{OpAMD64ORLload, OpAMD64LEAQ4}: OpAMD64ORLloadidx4, 254 [2]Op{OpAMD64ORLload, OpAMD64LEAQ8}: OpAMD64ORLloadidx8, 255 [2]Op{OpAMD64ORQload, OpAMD64LEAQ1}: OpAMD64ORQloadidx1, 256 [2]Op{OpAMD64ORQload, OpAMD64LEAQ8}: OpAMD64ORQloadidx8, 257 [2]Op{OpAMD64XORLload, OpAMD64LEAQ1}: OpAMD64XORLloadidx1, 258 [2]Op{OpAMD64XORLload, OpAMD64LEAQ4}: OpAMD64XORLloadidx4, 259 [2]Op{OpAMD64XORLload, OpAMD64LEAQ8}: OpAMD64XORLloadidx8, 260 [2]Op{OpAMD64XORQload, OpAMD64LEAQ1}: OpAMD64XORQloadidx1, 261 [2]Op{OpAMD64XORQload, OpAMD64LEAQ8}: OpAMD64XORQloadidx8, 262 263 [2]Op{OpAMD64ADDLmodify, OpAMD64ADDQ}: OpAMD64ADDLmodifyidx1, 264 [2]Op{OpAMD64ADDQmodify, OpAMD64ADDQ}: OpAMD64ADDQmodifyidx1, 265 [2]Op{OpAMD64SUBLmodify, OpAMD64ADDQ}: OpAMD64SUBLmodifyidx1, 266 [2]Op{OpAMD64SUBQmodify, OpAMD64ADDQ}: OpAMD64SUBQmodifyidx1, 267 [2]Op{OpAMD64ANDLmodify, OpAMD64ADDQ}: OpAMD64ANDLmodifyidx1, 268 [2]Op{OpAMD64ANDQmodify, OpAMD64ADDQ}: OpAMD64ANDQmodifyidx1, 269 [2]Op{OpAMD64ORLmodify, OpAMD64ADDQ}: OpAMD64ORLmodifyidx1, 270 [2]Op{OpAMD64ORQmodify, OpAMD64ADDQ}: OpAMD64ORQmodifyidx1, 271 [2]Op{OpAMD64XORLmodify, OpAMD64ADDQ}: OpAMD64XORLmodifyidx1, 272 [2]Op{OpAMD64XORQmodify, OpAMD64ADDQ}: OpAMD64XORQmodifyidx1, 273 274 [2]Op{OpAMD64ADDLmodify, OpAMD64LEAQ1}: OpAMD64ADDLmodifyidx1, 275 [2]Op{OpAMD64ADDLmodify, OpAMD64LEAQ4}: OpAMD64ADDLmodifyidx4, 276 [2]Op{OpAMD64ADDLmodify, OpAMD64LEAQ8}: OpAMD64ADDLmodifyidx8, 277 [2]Op{OpAMD64ADDQmodify, OpAMD64LEAQ1}: OpAMD64ADDQmodifyidx1, 278 [2]Op{OpAMD64ADDQmodify, OpAMD64LEAQ8}: OpAMD64ADDQmodifyidx8, 279 [2]Op{OpAMD64SUBLmodify, OpAMD64LEAQ1}: OpAMD64SUBLmodifyidx1, 280 [2]Op{OpAMD64SUBLmodify, OpAMD64LEAQ4}: OpAMD64SUBLmodifyidx4, 281 [2]Op{OpAMD64SUBLmodify, OpAMD64LEAQ8}: OpAMD64SUBLmodifyidx8, 282 [2]Op{OpAMD64SUBQmodify, OpAMD64LEAQ1}: OpAMD64SUBQmodifyidx1, 283 [2]Op{OpAMD64SUBQmodify, OpAMD64LEAQ8}: OpAMD64SUBQmodifyidx8, 284 [2]Op{OpAMD64ANDLmodify, OpAMD64LEAQ1}: OpAMD64ANDLmodifyidx1, 285 [2]Op{OpAMD64ANDLmodify, OpAMD64LEAQ4}: OpAMD64ANDLmodifyidx4, 286 [2]Op{OpAMD64ANDLmodify, OpAMD64LEAQ8}: OpAMD64ANDLmodifyidx8, 287 [2]Op{OpAMD64ANDQmodify, OpAMD64LEAQ1}: OpAMD64ANDQmodifyidx1, 288 [2]Op{OpAMD64ANDQmodify, OpAMD64LEAQ8}: OpAMD64ANDQmodifyidx8, 289 [2]Op{OpAMD64ORLmodify, OpAMD64LEAQ1}: OpAMD64ORLmodifyidx1, 290 [2]Op{OpAMD64ORLmodify, OpAMD64LEAQ4}: OpAMD64ORLmodifyidx4, 291 [2]Op{OpAMD64ORLmodify, OpAMD64LEAQ8}: OpAMD64ORLmodifyidx8, 292 [2]Op{OpAMD64ORQmodify, OpAMD64LEAQ1}: OpAMD64ORQmodifyidx1, 293 [2]Op{OpAMD64ORQmodify, OpAMD64LEAQ8}: OpAMD64ORQmodifyidx8, 294 [2]Op{OpAMD64XORLmodify, OpAMD64LEAQ1}: OpAMD64XORLmodifyidx1, 295 [2]Op{OpAMD64XORLmodify, OpAMD64LEAQ4}: OpAMD64XORLmodifyidx4, 296 [2]Op{OpAMD64XORLmodify, OpAMD64LEAQ8}: OpAMD64XORLmodifyidx8, 297 [2]Op{OpAMD64XORQmodify, OpAMD64LEAQ1}: OpAMD64XORQmodifyidx1, 298 [2]Op{OpAMD64XORQmodify, OpAMD64LEAQ8}: OpAMD64XORQmodifyidx8, 299 300 [2]Op{OpAMD64ADDLconstmodify, OpAMD64ADDQ}: OpAMD64ADDLconstmodifyidx1, 301 [2]Op{OpAMD64ADDQconstmodify, OpAMD64ADDQ}: OpAMD64ADDQconstmodifyidx1, 302 [2]Op{OpAMD64ANDLconstmodify, OpAMD64ADDQ}: OpAMD64ANDLconstmodifyidx1, 303 [2]Op{OpAMD64ANDQconstmodify, OpAMD64ADDQ}: OpAMD64ANDQconstmodifyidx1, 304 [2]Op{OpAMD64ORLconstmodify, OpAMD64ADDQ}: OpAMD64ORLconstmodifyidx1, 305 [2]Op{OpAMD64ORQconstmodify, OpAMD64ADDQ}: OpAMD64ORQconstmodifyidx1, 306 [2]Op{OpAMD64XORLconstmodify, OpAMD64ADDQ}: OpAMD64XORLconstmodifyidx1, 307 [2]Op{OpAMD64XORQconstmodify, OpAMD64ADDQ}: OpAMD64XORQconstmodifyidx1, 308 309 [2]Op{OpAMD64ADDLconstmodify, OpAMD64LEAQ1}: OpAMD64ADDLconstmodifyidx1, 310 [2]Op{OpAMD64ADDLconstmodify, OpAMD64LEAQ4}: OpAMD64ADDLconstmodifyidx4, 311 [2]Op{OpAMD64ADDLconstmodify, OpAMD64LEAQ8}: OpAMD64ADDLconstmodifyidx8, 312 [2]Op{OpAMD64ADDQconstmodify, OpAMD64LEAQ1}: OpAMD64ADDQconstmodifyidx1, 313 [2]Op{OpAMD64ADDQconstmodify, OpAMD64LEAQ8}: OpAMD64ADDQconstmodifyidx8, 314 [2]Op{OpAMD64ANDLconstmodify, OpAMD64LEAQ1}: OpAMD64ANDLconstmodifyidx1, 315 [2]Op{OpAMD64ANDLconstmodify, OpAMD64LEAQ4}: OpAMD64ANDLconstmodifyidx4, 316 [2]Op{OpAMD64ANDLconstmodify, OpAMD64LEAQ8}: OpAMD64ANDLconstmodifyidx8, 317 [2]Op{OpAMD64ANDQconstmodify, OpAMD64LEAQ1}: OpAMD64ANDQconstmodifyidx1, 318 [2]Op{OpAMD64ANDQconstmodify, OpAMD64LEAQ8}: OpAMD64ANDQconstmodifyidx8, 319 [2]Op{OpAMD64ORLconstmodify, OpAMD64LEAQ1}: OpAMD64ORLconstmodifyidx1, 320 [2]Op{OpAMD64ORLconstmodify, OpAMD64LEAQ4}: OpAMD64ORLconstmodifyidx4, 321 [2]Op{OpAMD64ORLconstmodify, OpAMD64LEAQ8}: OpAMD64ORLconstmodifyidx8, 322 [2]Op{OpAMD64ORQconstmodify, OpAMD64LEAQ1}: OpAMD64ORQconstmodifyidx1, 323 [2]Op{OpAMD64ORQconstmodify, OpAMD64LEAQ8}: OpAMD64ORQconstmodifyidx8, 324 [2]Op{OpAMD64XORLconstmodify, OpAMD64LEAQ1}: OpAMD64XORLconstmodifyidx1, 325 [2]Op{OpAMD64XORLconstmodify, OpAMD64LEAQ4}: OpAMD64XORLconstmodifyidx4, 326 [2]Op{OpAMD64XORLconstmodify, OpAMD64LEAQ8}: OpAMD64XORLconstmodifyidx8, 327 [2]Op{OpAMD64XORQconstmodify, OpAMD64LEAQ1}: OpAMD64XORQconstmodifyidx1, 328 [2]Op{OpAMD64XORQconstmodify, OpAMD64LEAQ8}: OpAMD64XORQconstmodifyidx8, 329 330 [2]Op{OpAMD64ADDSSload, OpAMD64LEAQ1}: OpAMD64ADDSSloadidx1, 331 [2]Op{OpAMD64ADDSSload, OpAMD64LEAQ4}: OpAMD64ADDSSloadidx4, 332 [2]Op{OpAMD64ADDSDload, OpAMD64LEAQ1}: OpAMD64ADDSDloadidx1, 333 [2]Op{OpAMD64ADDSDload, OpAMD64LEAQ8}: OpAMD64ADDSDloadidx8, 334 [2]Op{OpAMD64SUBSSload, OpAMD64LEAQ1}: OpAMD64SUBSSloadidx1, 335 [2]Op{OpAMD64SUBSSload, OpAMD64LEAQ4}: OpAMD64SUBSSloadidx4, 336 [2]Op{OpAMD64SUBSDload, OpAMD64LEAQ1}: OpAMD64SUBSDloadidx1, 337 [2]Op{OpAMD64SUBSDload, OpAMD64LEAQ8}: OpAMD64SUBSDloadidx8, 338 [2]Op{OpAMD64MULSSload, OpAMD64LEAQ1}: OpAMD64MULSSloadidx1, 339 [2]Op{OpAMD64MULSSload, OpAMD64LEAQ4}: OpAMD64MULSSloadidx4, 340 [2]Op{OpAMD64MULSDload, OpAMD64LEAQ1}: OpAMD64MULSDloadidx1, 341 [2]Op{OpAMD64MULSDload, OpAMD64LEAQ8}: OpAMD64MULSDloadidx8, 342 [2]Op{OpAMD64DIVSSload, OpAMD64LEAQ1}: OpAMD64DIVSSloadidx1, 343 [2]Op{OpAMD64DIVSSload, OpAMD64LEAQ4}: OpAMD64DIVSSloadidx4, 344 [2]Op{OpAMD64DIVSDload, OpAMD64LEAQ1}: OpAMD64DIVSDloadidx1, 345 [2]Op{OpAMD64DIVSDload, OpAMD64LEAQ8}: OpAMD64DIVSDloadidx8, 346 347 [2]Op{OpAMD64SARXLload, OpAMD64ADDQ}: OpAMD64SARXLloadidx1, 348 [2]Op{OpAMD64SARXQload, OpAMD64ADDQ}: OpAMD64SARXQloadidx1, 349 [2]Op{OpAMD64SHLXLload, OpAMD64ADDQ}: OpAMD64SHLXLloadidx1, 350 [2]Op{OpAMD64SHLXQload, OpAMD64ADDQ}: OpAMD64SHLXQloadidx1, 351 [2]Op{OpAMD64SHRXLload, OpAMD64ADDQ}: OpAMD64SHRXLloadidx1, 352 [2]Op{OpAMD64SHRXQload, OpAMD64ADDQ}: OpAMD64SHRXQloadidx1, 353 354 [2]Op{OpAMD64SARXLload, OpAMD64LEAQ1}: OpAMD64SARXLloadidx1, 355 [2]Op{OpAMD64SARXLload, OpAMD64LEAQ4}: OpAMD64SARXLloadidx4, 356 [2]Op{OpAMD64SARXLload, OpAMD64LEAQ8}: OpAMD64SARXLloadidx8, 357 [2]Op{OpAMD64SARXQload, OpAMD64LEAQ1}: OpAMD64SARXQloadidx1, 358 [2]Op{OpAMD64SARXQload, OpAMD64LEAQ8}: OpAMD64SARXQloadidx8, 359 [2]Op{OpAMD64SHLXLload, OpAMD64LEAQ1}: OpAMD64SHLXLloadidx1, 360 [2]Op{OpAMD64SHLXLload, OpAMD64LEAQ4}: OpAMD64SHLXLloadidx4, 361 [2]Op{OpAMD64SHLXLload, OpAMD64LEAQ8}: OpAMD64SHLXLloadidx8, 362 [2]Op{OpAMD64SHLXQload, OpAMD64LEAQ1}: OpAMD64SHLXQloadidx1, 363 [2]Op{OpAMD64SHLXQload, OpAMD64LEAQ8}: OpAMD64SHLXQloadidx8, 364 [2]Op{OpAMD64SHRXLload, OpAMD64LEAQ1}: OpAMD64SHRXLloadidx1, 365 [2]Op{OpAMD64SHRXLload, OpAMD64LEAQ4}: OpAMD64SHRXLloadidx4, 366 [2]Op{OpAMD64SHRXLload, OpAMD64LEAQ8}: OpAMD64SHRXLloadidx8, 367 [2]Op{OpAMD64SHRXQload, OpAMD64LEAQ1}: OpAMD64SHRXQloadidx1, 368 [2]Op{OpAMD64SHRXQload, OpAMD64LEAQ8}: OpAMD64SHRXQloadidx8, 369 370 // amd64/v3 371 [2]Op{OpAMD64MOVBELload, OpAMD64ADDQ}: OpAMD64MOVBELloadidx1, 372 [2]Op{OpAMD64MOVBEQload, OpAMD64ADDQ}: OpAMD64MOVBEQloadidx1, 373 [2]Op{OpAMD64MOVBELload, OpAMD64LEAQ1}: OpAMD64MOVBELloadidx1, 374 [2]Op{OpAMD64MOVBELload, OpAMD64LEAQ4}: OpAMD64MOVBELloadidx4, 375 [2]Op{OpAMD64MOVBELload, OpAMD64LEAQ8}: OpAMD64MOVBELloadidx8, 376 [2]Op{OpAMD64MOVBEQload, OpAMD64LEAQ1}: OpAMD64MOVBEQloadidx1, 377 [2]Op{OpAMD64MOVBEQload, OpAMD64LEAQ8}: OpAMD64MOVBEQloadidx8, 378 379 [2]Op{OpAMD64MOVBEWstore, OpAMD64ADDQ}: OpAMD64MOVBEWstoreidx1, 380 [2]Op{OpAMD64MOVBELstore, OpAMD64ADDQ}: OpAMD64MOVBELstoreidx1, 381 [2]Op{OpAMD64MOVBEQstore, OpAMD64ADDQ}: OpAMD64MOVBEQstoreidx1, 382 [2]Op{OpAMD64MOVBEWstore, OpAMD64LEAQ1}: OpAMD64MOVBEWstoreidx1, 383 [2]Op{OpAMD64MOVBEWstore, OpAMD64LEAQ2}: OpAMD64MOVBEWstoreidx2, 384 [2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ1}: OpAMD64MOVBELstoreidx1, 385 [2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ4}: OpAMD64MOVBELstoreidx4, 386 [2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ8}: OpAMD64MOVBELstoreidx8, 387 [2]Op{OpAMD64MOVBEQstore, OpAMD64LEAQ1}: OpAMD64MOVBEQstoreidx1, 388 [2]Op{OpAMD64MOVBEQstore, OpAMD64LEAQ8}: OpAMD64MOVBEQstoreidx8, 389 390 // 386 391 [2]Op{Op386MOVBload, Op386ADDL}: Op386MOVBloadidx1, 392 [2]Op{Op386MOVWload, Op386ADDL}: Op386MOVWloadidx1, 393 [2]Op{Op386MOVLload, Op386ADDL}: Op386MOVLloadidx1, 394 [2]Op{Op386MOVSSload, Op386ADDL}: Op386MOVSSloadidx1, 395 [2]Op{Op386MOVSDload, Op386ADDL}: Op386MOVSDloadidx1, 396 397 [2]Op{Op386MOVBstore, Op386ADDL}: Op386MOVBstoreidx1, 398 [2]Op{Op386MOVWstore, Op386ADDL}: Op386MOVWstoreidx1, 399 [2]Op{Op386MOVLstore, Op386ADDL}: Op386MOVLstoreidx1, 400 [2]Op{Op386MOVSSstore, Op386ADDL}: Op386MOVSSstoreidx1, 401 [2]Op{Op386MOVSDstore, Op386ADDL}: Op386MOVSDstoreidx1, 402 403 [2]Op{Op386MOVBstoreconst, Op386ADDL}: Op386MOVBstoreconstidx1, 404 [2]Op{Op386MOVWstoreconst, Op386ADDL}: Op386MOVWstoreconstidx1, 405 [2]Op{Op386MOVLstoreconst, Op386ADDL}: Op386MOVLstoreconstidx1, 406 407 [2]Op{Op386MOVBload, Op386LEAL1}: Op386MOVBloadidx1, 408 [2]Op{Op386MOVWload, Op386LEAL1}: Op386MOVWloadidx1, 409 [2]Op{Op386MOVWload, Op386LEAL2}: Op386MOVWloadidx2, 410 [2]Op{Op386MOVLload, Op386LEAL1}: Op386MOVLloadidx1, 411 [2]Op{Op386MOVLload, Op386LEAL4}: Op386MOVLloadidx4, 412 [2]Op{Op386MOVSSload, Op386LEAL1}: Op386MOVSSloadidx1, 413 [2]Op{Op386MOVSSload, Op386LEAL4}: Op386MOVSSloadidx4, 414 [2]Op{Op386MOVSDload, Op386LEAL1}: Op386MOVSDloadidx1, 415 [2]Op{Op386MOVSDload, Op386LEAL8}: Op386MOVSDloadidx8, 416 417 [2]Op{Op386MOVBstore, Op386LEAL1}: Op386MOVBstoreidx1, 418 [2]Op{Op386MOVWstore, Op386LEAL1}: Op386MOVWstoreidx1, 419 [2]Op{Op386MOVWstore, Op386LEAL2}: Op386MOVWstoreidx2, 420 [2]Op{Op386MOVLstore, Op386LEAL1}: Op386MOVLstoreidx1, 421 [2]Op{Op386MOVLstore, Op386LEAL4}: Op386MOVLstoreidx4, 422 [2]Op{Op386MOVSSstore, Op386LEAL1}: Op386MOVSSstoreidx1, 423 [2]Op{Op386MOVSSstore, Op386LEAL4}: Op386MOVSSstoreidx4, 424 [2]Op{Op386MOVSDstore, Op386LEAL1}: Op386MOVSDstoreidx1, 425 [2]Op{Op386MOVSDstore, Op386LEAL8}: Op386MOVSDstoreidx8, 426 427 [2]Op{Op386MOVBstoreconst, Op386LEAL1}: Op386MOVBstoreconstidx1, 428 [2]Op{Op386MOVWstoreconst, Op386LEAL1}: Op386MOVWstoreconstidx1, 429 [2]Op{Op386MOVWstoreconst, Op386LEAL2}: Op386MOVWstoreconstidx2, 430 [2]Op{Op386MOVLstoreconst, Op386LEAL1}: Op386MOVLstoreconstidx1, 431 [2]Op{Op386MOVLstoreconst, Op386LEAL4}: Op386MOVLstoreconstidx4, 432 433 [2]Op{Op386ADDLload, Op386LEAL4}: Op386ADDLloadidx4, 434 [2]Op{Op386SUBLload, Op386LEAL4}: Op386SUBLloadidx4, 435 [2]Op{Op386MULLload, Op386LEAL4}: Op386MULLloadidx4, 436 [2]Op{Op386ANDLload, Op386LEAL4}: Op386ANDLloadidx4, 437 [2]Op{Op386ORLload, Op386LEAL4}: Op386ORLloadidx4, 438 [2]Op{Op386XORLload, Op386LEAL4}: Op386XORLloadidx4, 439 440 [2]Op{Op386ADDLmodify, Op386LEAL4}: Op386ADDLmodifyidx4, 441 [2]Op{Op386SUBLmodify, Op386LEAL4}: Op386SUBLmodifyidx4, 442 [2]Op{Op386ANDLmodify, Op386LEAL4}: Op386ANDLmodifyidx4, 443 [2]Op{Op386ORLmodify, Op386LEAL4}: Op386ORLmodifyidx4, 444 [2]Op{Op386XORLmodify, Op386LEAL4}: Op386XORLmodifyidx4, 445 446 [2]Op{Op386ADDLconstmodify, Op386LEAL4}: Op386ADDLconstmodifyidx4, 447 [2]Op{Op386ANDLconstmodify, Op386LEAL4}: Op386ANDLconstmodifyidx4, 448 [2]Op{Op386ORLconstmodify, Op386LEAL4}: Op386ORLconstmodifyidx4, 449 [2]Op{Op386XORLconstmodify, Op386LEAL4}: Op386XORLconstmodifyidx4, 450 451 // s390x 452 [2]Op{OpS390XMOVDload, OpS390XADD}: OpS390XMOVDloadidx, 453 [2]Op{OpS390XMOVWload, OpS390XADD}: OpS390XMOVWloadidx, 454 [2]Op{OpS390XMOVHload, OpS390XADD}: OpS390XMOVHloadidx, 455 [2]Op{OpS390XMOVBload, OpS390XADD}: OpS390XMOVBloadidx, 456 457 [2]Op{OpS390XMOVWZload, OpS390XADD}: OpS390XMOVWZloadidx, 458 [2]Op{OpS390XMOVHZload, OpS390XADD}: OpS390XMOVHZloadidx, 459 [2]Op{OpS390XMOVBZload, OpS390XADD}: OpS390XMOVBZloadidx, 460 461 [2]Op{OpS390XMOVDBRload, OpS390XADD}: OpS390XMOVDBRloadidx, 462 [2]Op{OpS390XMOVWBRload, OpS390XADD}: OpS390XMOVWBRloadidx, 463 [2]Op{OpS390XMOVHBRload, OpS390XADD}: OpS390XMOVHBRloadidx, 464 465 [2]Op{OpS390XFMOVDload, OpS390XADD}: OpS390XFMOVDloadidx, 466 [2]Op{OpS390XFMOVSload, OpS390XADD}: OpS390XFMOVSloadidx, 467 468 [2]Op{OpS390XMOVDstore, OpS390XADD}: OpS390XMOVDstoreidx, 469 [2]Op{OpS390XMOVWstore, OpS390XADD}: OpS390XMOVWstoreidx, 470 [2]Op{OpS390XMOVHstore, OpS390XADD}: OpS390XMOVHstoreidx, 471 [2]Op{OpS390XMOVBstore, OpS390XADD}: OpS390XMOVBstoreidx, 472 473 [2]Op{OpS390XMOVDBRstore, OpS390XADD}: OpS390XMOVDBRstoreidx, 474 [2]Op{OpS390XMOVWBRstore, OpS390XADD}: OpS390XMOVWBRstoreidx, 475 [2]Op{OpS390XMOVHBRstore, OpS390XADD}: OpS390XMOVHBRstoreidx, 476 477 [2]Op{OpS390XFMOVDstore, OpS390XADD}: OpS390XFMOVDstoreidx, 478 [2]Op{OpS390XFMOVSstore, OpS390XADD}: OpS390XFMOVSstoreidx, 479 480 [2]Op{OpS390XMOVDload, OpS390XMOVDaddridx}: OpS390XMOVDloadidx, 481 [2]Op{OpS390XMOVWload, OpS390XMOVDaddridx}: OpS390XMOVWloadidx, 482 [2]Op{OpS390XMOVHload, OpS390XMOVDaddridx}: OpS390XMOVHloadidx, 483 [2]Op{OpS390XMOVBload, OpS390XMOVDaddridx}: OpS390XMOVBloadidx, 484 485 [2]Op{OpS390XMOVWZload, OpS390XMOVDaddridx}: OpS390XMOVWZloadidx, 486 [2]Op{OpS390XMOVHZload, OpS390XMOVDaddridx}: OpS390XMOVHZloadidx, 487 [2]Op{OpS390XMOVBZload, OpS390XMOVDaddridx}: OpS390XMOVBZloadidx, 488 489 [2]Op{OpS390XMOVDBRload, OpS390XMOVDaddridx}: OpS390XMOVDBRloadidx, 490 [2]Op{OpS390XMOVWBRload, OpS390XMOVDaddridx}: OpS390XMOVWBRloadidx, 491 [2]Op{OpS390XMOVHBRload, OpS390XMOVDaddridx}: OpS390XMOVHBRloadidx, 492 493 [2]Op{OpS390XFMOVDload, OpS390XMOVDaddridx}: OpS390XFMOVDloadidx, 494 [2]Op{OpS390XFMOVSload, OpS390XMOVDaddridx}: OpS390XFMOVSloadidx, 495 496 [2]Op{OpS390XMOVDstore, OpS390XMOVDaddridx}: OpS390XMOVDstoreidx, 497 [2]Op{OpS390XMOVWstore, OpS390XMOVDaddridx}: OpS390XMOVWstoreidx, 498 [2]Op{OpS390XMOVHstore, OpS390XMOVDaddridx}: OpS390XMOVHstoreidx, 499 [2]Op{OpS390XMOVBstore, OpS390XMOVDaddridx}: OpS390XMOVBstoreidx, 500 501 [2]Op{OpS390XMOVDBRstore, OpS390XMOVDaddridx}: OpS390XMOVDBRstoreidx, 502 [2]Op{OpS390XMOVWBRstore, OpS390XMOVDaddridx}: OpS390XMOVWBRstoreidx, 503 [2]Op{OpS390XMOVHBRstore, OpS390XMOVDaddridx}: OpS390XMOVHBRstoreidx, 504 505 [2]Op{OpS390XFMOVDstore, OpS390XMOVDaddridx}: OpS390XFMOVDstoreidx, 506 [2]Op{OpS390XFMOVSstore, OpS390XMOVDaddridx}: OpS390XFMOVSstoreidx, 507 }