github.com/cloudwego/frugal@v0.1.15/internal/atm/pgen/iasm_amd64.go (about)

     1  /*
     2   * Copyright 2022 ByteDance Inc.
     3   *
     4   * Licensed under the Apache License, Version 2.0 (the "License");
     5   * you may not use this file except in compliance with the License.
     6   * You may obtain a copy of the License at
     7   *
     8   *     http://www.apache.org/licenses/LICENSE-2.0
     9   *
    10   * Unless required by applicable law or agreed to in writing, software
    11   * distributed under the License is distributed on an "AS IS" BASIS,
    12   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    13   * See the License for the specific language governing permissions and
    14   * limitations under the License.
    15   */
    16  
    17  package pgen
    18  
    19  import (
    20      `math`
    21  
    22      `github.com/cloudwego/iasm/x86_64`
    23  )
    24  
    25  const (
    26      AL    = x86_64.AL
    27      AX    = x86_64.AX
    28      EAX   = x86_64.EAX
    29      RAX   = x86_64.RAX
    30      RCX   = x86_64.RCX
    31      RDX   = x86_64.RDX
    32      RBX   = x86_64.RBX
    33      RSP   = x86_64.RSP
    34      RBP   = x86_64.RBP
    35      RSI   = x86_64.RSI
    36      RDI   = x86_64.RDI
    37      R8    = x86_64.R8
    38      R9    = x86_64.R9
    39      R10   = x86_64.R10
    40      R11   = x86_64.R11
    41      R12   = x86_64.R12
    42      R13   = x86_64.R13
    43      R14   = x86_64.R14
    44      R15   = x86_64.R15
    45      XMM15 = x86_64.XMM15
    46  )
    47  
    48  var allocationOrder = [11]x86_64.Register64 {
    49      R12, R13, R14, R15,         // reserved registers first (except for RBX)
    50      R10, R11,                   // then scratch registers
    51      R9, R8, RCX, RDX,           // then argument registers in reverse order (RDI, RSI and RAX are always free)
    52      RBX,                        // finally the RBX, we put RBX here to reduce collision with Go register ABI
    53  }
    54  
    55  func Abs(disp int32) *x86_64.MemoryOperand {
    56      return x86_64.Abs(disp)
    57  }
    58  
    59  func Ptr(base x86_64.Register, disp int32) *x86_64.MemoryOperand {
    60      return x86_64.Ptr(base, disp)
    61  }
    62  
    63  func Sib(base x86_64.Register, index x86_64.Register64, scale uint8, disp int32) *x86_64.MemoryOperand {
    64      return x86_64.Sib(base, index, scale, disp)
    65  }
    66  
    67  func isPow2(v int64) bool {
    68      return v & (v - 1) == 0
    69  }
    70  
    71  func isInt32(v int64) bool {
    72      return v >= math.MinInt32 && v <= math.MaxInt32
    73  }
    74  
    75  func isReg64(v x86_64.Register) (ok bool) {
    76      _, ok = v.(x86_64.Register64)
    77      return
    78  }
    79  
    80  func toAddress(p *x86_64.Label) uintptr {
    81      if v, err := p.Evaluate(); err != nil {
    82          panic(err)
    83      } else {
    84          return uintptr(v)
    85      }
    86  }
    87  
    88  func isSimpleMem(v *x86_64.MemoryOperand) bool {
    89      return !v.Masked                        &&
    90              v.Broadcast == 0                &&
    91              v.Addr.Type == x86_64.Memory    &&
    92              v.Addr.Offset == 0              &&
    93              v.Addr.Reference == nil         &&
    94              v.Addr.Memory.Scale <= 1        &&
    95              v.Addr.Memory.Index == nil      &&
    96              v.Addr.Memory.Displacement == 0 &&
    97              isReg64(v.Addr.Memory.Base)
    98  }