github.com/cnboonhan/delve@v0.0.0-20230908061759-363f2388c2fb/pkg/dwarf/regnum/ppc64le.go (about)

     1  package regnum
     2  
     3  import "fmt"
     4  
     5  // The mapping between hardware registers and DWARF registers is specified
     6  // in the 64-Bit ELF V2 ABI Specification of the Power Architecture in section
     7  // 2.4 DWARF Definition
     8  // https://openpowerfoundation.org/specifications/64bitelfabi/
     9  
    10  const (
    11  	// General Purpose Registers: from R0 to R31
    12  	PPC64LE_FIRST_GPR = 0
    13  	PPC64LE_R0        = PPC64LE_FIRST_GPR
    14  	PPC64LE_LAST_GPR  = 31
    15  	// Floating point registers: from F0 to F31
    16  	PPC64LE_FIRST_FPR = 32
    17  	PPC64LE_F0        = PPC64LE_FIRST_FPR
    18  	PPC64LE_LAST_FPR  = 63
    19  	// Vector (Altivec/VMX) registers: from V0 to V31
    20  	PPC64LE_FIRST_VMX = 64
    21  	PPC64LE_V0        = PPC64LE_FIRST_VMX
    22  	PPC64LE_LAST_VMX  = 95
    23  	// Vector Scalar (VSX) registers: from VS0 to VS63
    24  	PPC64LE_FIRST_VSX = 96
    25  	PPC64LE_VS0       = PPC64LE_FIRST_VSX
    26  	PPC64LE_LAST_VSX  = 160
    27  	// Condition Registers: from CR0 to CR7
    28  	PPC64LE_CR0 = 0
    29  	// Special registers
    30  	PPC64LE_SP = 1  // Stack frame pointer: Gpr[1]
    31  	PPC64LE_PC = 12 // The documentation refers to this as the CIA (Current Instruction Address)
    32  	PPC64LE_LR = 65 // Link register
    33  )
    34  
    35  func PPC64LEToName(num uint64) string {
    36  	switch {
    37  	case num == PPC64LE_SP:
    38  		return "SP"
    39  	case num == PPC64LE_PC:
    40  		return "PC"
    41  	case num == PPC64LE_LR:
    42  		return "LR"
    43  	case isGPR(num):
    44  		return fmt.Sprintf("r%d", int(num-PPC64LE_FIRST_GPR))
    45  	case isFPR(num):
    46  		return fmt.Sprintf("f%d", int(num-PPC64LE_FIRST_FPR))
    47  	case isVMX(num):
    48  		return fmt.Sprintf("v%d", int(num-PPC64LE_FIRST_VMX))
    49  	case isVSX(num):
    50  		return fmt.Sprintf("vs%d", int(num-PPC64LE_FIRST_VSX))
    51  	default:
    52  		return fmt.Sprintf("unknown%d", num)
    53  	}
    54  }
    55  
    56  // PPC64LEMaxRegNum is 172 registers in total, across 4 categories:
    57  // General Purpose Registers or GPR (32 GPR + 9 special registers)
    58  // Floating Point Registers or FPR (32 FPR + 1 special register)
    59  // Altivec/VMX Registers or VMX (32 VMX + 2 special registers)
    60  // VSX Registers or VSX (64 VSX)
    61  // Documentation: https://lldb.llvm.org/cpp_reference/RegisterContextPOSIX__ppc64le_8cpp_source.html
    62  func PPC64LEMaxRegNum() uint64 {
    63  	return 172
    64  }
    65  
    66  func isGPR(num uint64) bool {
    67  	return num < PPC64LE_LAST_GPR
    68  }
    69  
    70  func isFPR(num uint64) bool {
    71  	return num >= PPC64LE_FIRST_FPR && num <= PPC64LE_LAST_FPR
    72  }
    73  
    74  func isVMX(num uint64) bool {
    75  	return num >= PPC64LE_FIRST_VMX && num <= PPC64LE_LAST_VMX
    76  }
    77  
    78  func isVSX(num uint64) bool {
    79  	return num >= PPC64LE_FIRST_VSX && num <= PPC64LE_LAST_VSX
    80  }
    81  
    82  var PPC64LENameToDwarf = func() map[string]int {
    83  	r := make(map[string]int)
    84  
    85  	r["nip"] = PPC64LE_PC
    86  	r["sp"] = PPC64LE_SP
    87  	r["bp"] = PPC64LE_SP
    88  	r["link"] = PPC64LE_LR
    89  
    90  	// General Purpose Registers: from R0 to R31
    91  	for i := 0; i <= 31; i++ {
    92  		r[fmt.Sprintf("r%d", i)] = PPC64LE_R0 + i
    93  	}
    94  
    95  	// Floating point registers: from F0 to F31
    96  	for i := 0; i <= 31; i++ {
    97  		r[fmt.Sprintf("f%d", i)] = PPC64LE_F0 + i
    98  	}
    99  
   100  	// Vector (Altivec/VMX) registers: from V0 to V31
   101  	for i := 0; i <= 31; i++ {
   102  		r[fmt.Sprintf("v%d", i)] = PPC64LE_V0 + i
   103  	}
   104  
   105  	// Vector Scalar (VSX) registers: from VS0 to VS63
   106  	for i := 0; i <= 63; i++ {
   107  		r[fmt.Sprintf("vs%d", i)] = PPC64LE_VS0 + i
   108  	}
   109  
   110  	// Condition Registers: from CR0 to CR7
   111  	for i := 0; i <= 7; i++ {
   112  		r[fmt.Sprintf("cr%d", i)] = PPC64LE_CR0 + i
   113  	}
   114  	return r
   115  }()