github.com/corona10/go@v0.0.0-20180224231303-7a218942be57/src/cmd/compile/internal/ssa/gen/ARM.rules (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (Add(Ptr|32|16|8) x y) -> (ADD x y) 6 (Add(32|64)F x y) -> (ADD(F|D) x y) 7 (Add32carry x y) -> (ADDS x y) 8 (Add32withcarry x y c) -> (ADC x y c) 9 10 (Sub(Ptr|32|16|8) x y) -> (SUB x y) 11 (Sub(32|64)F x y) -> (SUB(F|D) x y) 12 (Sub32carry x y) -> (SUBS x y) 13 (Sub32withcarry x y c) -> (SBC x y c) 14 15 (Mul(32|16|8) x y) -> (MUL x y) 16 (Mul(32|64)F x y) -> (MUL(F|D) x y) 17 (Hmul(32|32u) x y) -> (HMU(L|LU) x y) 18 (Mul32uhilo x y) -> (MULLU x y) 19 20 (Div32 x y) -> 21 (SUB (XOR <typ.UInt32> // negate the result if one operand is negative 22 (Select0 <typ.UInt32> (CALLudiv 23 (SUB <typ.UInt32> (XOR x <typ.UInt32> (Signmask x)) (Signmask x)) // negate x if negative 24 (SUB <typ.UInt32> (XOR y <typ.UInt32> (Signmask y)) (Signmask y)))) // negate y if negative 25 (Signmask (XOR <typ.UInt32> x y))) (Signmask (XOR <typ.UInt32> x y))) 26 (Div32u x y) -> (Select0 <typ.UInt32> (CALLudiv x y)) 27 (Div16 x y) -> (Div32 (SignExt16to32 x) (SignExt16to32 y)) 28 (Div16u x y) -> (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 29 (Div8 x y) -> (Div32 (SignExt8to32 x) (SignExt8to32 y)) 30 (Div8u x y) -> (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 31 (Div(32|64)F x y) -> (DIV(F|D) x y) 32 33 (Mod32 x y) -> 34 (SUB (XOR <typ.UInt32> // negate the result if x is negative 35 (Select1 <typ.UInt32> (CALLudiv 36 (SUB <typ.UInt32> (XOR <typ.UInt32> x (Signmask x)) (Signmask x)) // negate x if negative 37 (SUB <typ.UInt32> (XOR <typ.UInt32> y (Signmask y)) (Signmask y)))) // negate y if negative 38 (Signmask x)) (Signmask x)) 39 (Mod32u x y) -> (Select1 <typ.UInt32> (CALLudiv x y)) 40 (Mod16 x y) -> (Mod32 (SignExt16to32 x) (SignExt16to32 y)) 41 (Mod16u x y) -> (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 42 (Mod8 x y) -> (Mod32 (SignExt8to32 x) (SignExt8to32 y)) 43 (Mod8u x y) -> (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 44 45 // (x + y) / 2 with x>=y -> (x - y) / 2 + y 46 (Avg32u <t> x y) -> (ADD (SRLconst <t> (SUB <t> x y) [1]) y) 47 48 (And(32|16|8) x y) -> (AND x y) 49 (Or(32|16|8) x y) -> (OR x y) 50 (Xor(32|16|8) x y) -> (XOR x y) 51 52 // unary ops 53 (Neg(32|16|8) x) -> (RSBconst [0] x) 54 (Neg(32|64)F x) -> (NEG(F|D) x) 55 56 (Com(32|16|8) x) -> (MVN x) 57 58 (Sqrt x) -> (SQRTD x) 59 60 // count trailing zero for ARMv5 and ARMv6 61 // 32 - CLZ(x&-x - 1) 62 (Ctz32 <t> x) && objabi.GOARM<=6 -> (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1]))) 63 64 // count trailing zero for ARMv7 65 (Ctz32 <t> x) && objabi.GOARM==7 -> (CLZ <t> (RBIT <t> x)) 66 67 // bit length 68 (BitLen32 <t> x) -> (RSBconst [32] (CLZ <t> x)) 69 70 // byte swap for ARMv5 71 // let (a, b, c, d) be the bytes of x from high to low 72 // t1 = x right rotate 16 bits -- (c, d, a, b ) 73 // t2 = x ^ t1 -- (a^c, b^d, a^c, b^d) 74 // t3 = t2 &^ 0xff0000 -- (a^c, 0, a^c, b^d) 75 // t4 = t3 >> 8 -- (0, a^c, 0, a^c) 76 // t5 = x right rotate 8 bits -- (d, a, b, c ) 77 // result = t4 ^ t5 -- (d, c, b, a ) 78 // using shifted ops this can be done in 4 instructions. 79 (Bswap32 <t> x) && objabi.GOARM==5 -> 80 (XOR <t> 81 (SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8]) 82 (SRRconst <t> x [8])) 83 84 // byte swap for ARMv6 and above 85 (Bswap32 x) && objabi.GOARM>=6 -> (REV x) 86 87 // boolean ops -- booleans are represented with 0=false, 1=true 88 (AndB x y) -> (AND x y) 89 (OrB x y) -> (OR x y) 90 (EqB x y) -> (XORconst [1] (XOR <typ.Bool> x y)) 91 (NeqB x y) -> (XOR x y) 92 (Not x) -> (XORconst [1] x) 93 94 // shifts 95 // hardware instruction uses only the low byte of the shift 96 // we compare to 256 to ensure Go semantics for large shifts 97 (Lsh32x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 98 (Lsh32x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 99 (Lsh32x8 x y) -> (SLL x (ZeroExt8to32 y)) 100 101 (Lsh16x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 102 (Lsh16x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 103 (Lsh16x8 x y) -> (SLL x (ZeroExt8to32 y)) 104 105 (Lsh8x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 106 (Lsh8x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 107 (Lsh8x8 x y) -> (SLL x (ZeroExt8to32 y)) 108 109 (Rsh32Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0]) 110 (Rsh32Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 111 (Rsh32Ux8 x y) -> (SRL x (ZeroExt8to32 y)) 112 113 (Rsh16Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0]) 114 (Rsh16Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 115 (Rsh16Ux8 x y) -> (SRL (ZeroExt16to32 x) (ZeroExt8to32 y)) 116 117 (Rsh8Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0]) 118 (Rsh8Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 119 (Rsh8Ux8 x y) -> (SRL (ZeroExt8to32 x) (ZeroExt8to32 y)) 120 121 (Rsh32x32 x y) -> (SRAcond x y (CMPconst [256] y)) 122 (Rsh32x16 x y) -> (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 123 (Rsh32x8 x y) -> (SRA x (ZeroExt8to32 y)) 124 125 (Rsh16x32 x y) -> (SRAcond (SignExt16to32 x) y (CMPconst [256] y)) 126 (Rsh16x16 x y) -> (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 127 (Rsh16x8 x y) -> (SRA (SignExt16to32 x) (ZeroExt8to32 y)) 128 129 (Rsh8x32 x y) -> (SRAcond (SignExt8to32 x) y (CMPconst [256] y)) 130 (Rsh8x16 x y) -> (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 131 (Rsh8x8 x y) -> (SRA (SignExt8to32 x) (ZeroExt8to32 y)) 132 133 // constant shifts 134 // generic opt rewrites all constant shifts to shift by Const64 135 (Lsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SLLconst x [c]) 136 (Rsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SRAconst x [c]) 137 (Rsh32Ux64 x (Const64 [c])) && uint64(c) < 32 -> (SRLconst x [c]) 138 (Lsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SLLconst x [c]) 139 (Rsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [c+16]) 140 (Rsh16Ux64 x (Const64 [c])) && uint64(c) < 16 -> (SRLconst (SLLconst <typ.UInt32> x [16]) [c+16]) 141 (Lsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SLLconst x [c]) 142 (Rsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [c+24]) 143 (Rsh8Ux64 x (Const64 [c])) && uint64(c) < 8 -> (SRLconst (SLLconst <typ.UInt32> x [24]) [c+24]) 144 145 // large constant shifts 146 (Lsh32x64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 147 (Rsh32Ux64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 148 (Lsh16x64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 149 (Rsh16Ux64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 150 (Lsh8x64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 151 (Rsh8Ux64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 152 153 // large constant signed right shift, we leave the sign bit 154 (Rsh32x64 x (Const64 [c])) && uint64(c) >= 32 -> (SRAconst x [31]) 155 (Rsh16x64 x (Const64 [c])) && uint64(c) >= 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [31]) 156 (Rsh8x64 x (Const64 [c])) && uint64(c) >= 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [31]) 157 158 // constants 159 (Const8 [val]) -> (MOVWconst [val]) 160 (Const16 [val]) -> (MOVWconst [val]) 161 (Const32 [val]) -> (MOVWconst [val]) 162 (Const32F [val]) -> (MOVFconst [val]) 163 (Const64F [val]) -> (MOVDconst [val]) 164 (ConstNil) -> (MOVWconst [0]) 165 (ConstBool [b]) -> (MOVWconst [b]) 166 167 // truncations 168 // Because we ignore high parts of registers, truncates are just copies. 169 (Trunc16to8 x) -> x 170 (Trunc32to8 x) -> x 171 (Trunc32to16 x) -> x 172 173 // Zero-/Sign-extensions 174 (ZeroExt8to16 x) -> (MOVBUreg x) 175 (ZeroExt8to32 x) -> (MOVBUreg x) 176 (ZeroExt16to32 x) -> (MOVHUreg x) 177 178 (SignExt8to16 x) -> (MOVBreg x) 179 (SignExt8to32 x) -> (MOVBreg x) 180 (SignExt16to32 x) -> (MOVHreg x) 181 182 (Signmask x) -> (SRAconst x [31]) 183 (Zeromask x) -> (SRAconst (RSBshiftRL <typ.Int32> x x [1]) [31]) // sign bit of uint32(x)>>1 - x 184 (Slicemask <t> x) -> (SRAconst (RSBconst <t> [0] x) [31]) 185 186 // float <-> int conversion 187 (Cvt32to32F x) -> (MOVWF x) 188 (Cvt32to64F x) -> (MOVWD x) 189 (Cvt32Uto32F x) -> (MOVWUF x) 190 (Cvt32Uto64F x) -> (MOVWUD x) 191 (Cvt32Fto32 x) -> (MOVFW x) 192 (Cvt64Fto32 x) -> (MOVDW x) 193 (Cvt32Fto32U x) -> (MOVFWU x) 194 (Cvt64Fto32U x) -> (MOVDWU x) 195 (Cvt32Fto64F x) -> (MOVFD x) 196 (Cvt64Fto32F x) -> (MOVDF x) 197 198 (Round(32|64)F x) -> x 199 200 // comparisons 201 (Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 202 (Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 203 (Eq32 x y) -> (Equal (CMP x y)) 204 (EqPtr x y) -> (Equal (CMP x y)) 205 (Eq(32|64)F x y) -> (Equal (CMP(F|D) x y)) 206 207 (Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 208 (Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 209 (Neq32 x y) -> (NotEqual (CMP x y)) 210 (NeqPtr x y) -> (NotEqual (CMP x y)) 211 (Neq(32|64)F x y) -> (NotEqual (CMP(F|D) x y)) 212 213 (Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 214 (Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 215 (Less32 x y) -> (LessThan (CMP x y)) 216 (Less(32|64)F x y) -> (GreaterThan (CMP(F|D) y x)) // reverse operands to work around NaN 217 218 (Less8U x y) -> (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 219 (Less16U x y) -> (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 220 (Less32U x y) -> (LessThanU (CMP x y)) 221 222 (Leq8 x y) -> (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 223 (Leq16 x y) -> (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 224 (Leq32 x y) -> (LessEqual (CMP x y)) 225 (Leq(32|64)F x y) -> (GreaterEqual (CMP(F|D) y x)) // reverse operands to work around NaN 226 227 (Leq8U x y) -> (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 228 (Leq16U x y) -> (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 229 (Leq32U x y) -> (LessEqualU (CMP x y)) 230 231 (Greater8 x y) -> (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 232 (Greater16 x y) -> (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 233 (Greater32 x y) -> (GreaterThan (CMP x y)) 234 (Greater(32|64)F x y) -> (GreaterThan (CMP(F|D) x y)) 235 236 (Greater8U x y) -> (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 237 (Greater16U x y) -> (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 238 (Greater32U x y) -> (GreaterThanU (CMP x y)) 239 240 (Geq8 x y) -> (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 241 (Geq16 x y) -> (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 242 (Geq32 x y) -> (GreaterEqual (CMP x y)) 243 (Geq(32|64)F x y) -> (GreaterEqual (CMP(F|D) x y)) 244 245 (Geq8U x y) -> (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 246 (Geq16U x y) -> (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 247 (Geq32U x y) -> (GreaterEqualU (CMP x y)) 248 249 (OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr) 250 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 251 252 (Addr {sym} base) -> (MOVWaddr {sym} base) 253 254 // loads 255 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 256 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 257 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 258 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 259 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 260 (Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem) 261 (Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem) 262 (Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem) 263 264 // stores 265 (Store {t} ptr val mem) && t.(*types.Type).Size() == 1 -> (MOVBstore ptr val mem) 266 (Store {t} ptr val mem) && t.(*types.Type).Size() == 2 -> (MOVHstore ptr val mem) 267 (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 268 (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && is32BitFloat(val.Type) -> (MOVFstore ptr val mem) 269 (Store {t} ptr val mem) && t.(*types.Type).Size() == 8 && is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 270 271 // zero instructions 272 (Zero [0] _ mem) -> mem 273 (Zero [1] ptr mem) -> (MOVBstore ptr (MOVWconst [0]) mem) 274 (Zero [2] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> 275 (MOVHstore ptr (MOVWconst [0]) mem) 276 (Zero [2] ptr mem) -> 277 (MOVBstore [1] ptr (MOVWconst [0]) 278 (MOVBstore [0] ptr (MOVWconst [0]) mem)) 279 (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 -> 280 (MOVWstore ptr (MOVWconst [0]) mem) 281 (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> 282 (MOVHstore [2] ptr (MOVWconst [0]) 283 (MOVHstore [0] ptr (MOVWconst [0]) mem)) 284 (Zero [4] ptr mem) -> 285 (MOVBstore [3] ptr (MOVWconst [0]) 286 (MOVBstore [2] ptr (MOVWconst [0]) 287 (MOVBstore [1] ptr (MOVWconst [0]) 288 (MOVBstore [0] ptr (MOVWconst [0]) mem)))) 289 290 (Zero [3] ptr mem) -> 291 (MOVBstore [2] ptr (MOVWconst [0]) 292 (MOVBstore [1] ptr (MOVWconst [0]) 293 (MOVBstore [0] ptr (MOVWconst [0]) mem))) 294 295 // Medium zeroing uses a duff device 296 // 4 and 128 are magic constants, see runtime/mkduff.go 297 (Zero [s] {t} ptr mem) 298 && s%4 == 0 && s > 4 && s <= 512 299 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> 300 (DUFFZERO [4 * (128 - int64(s/4))] ptr (MOVWconst [0]) mem) 301 302 // Large zeroing uses a loop 303 (Zero [s] {t} ptr mem) 304 && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> 305 (LoweredZero [t.(*types.Type).Alignment()] 306 ptr 307 (ADDconst <ptr.Type> ptr [s-moveSize(t.(*types.Type).Alignment(), config)]) 308 (MOVWconst [0]) 309 mem) 310 311 // moves 312 (Move [0] _ _ mem) -> mem 313 (Move [1] dst src mem) -> (MOVBstore dst (MOVBUload src mem) mem) 314 (Move [2] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> 315 (MOVHstore dst (MOVHUload src mem) mem) 316 (Move [2] dst src mem) -> 317 (MOVBstore [1] dst (MOVBUload [1] src mem) 318 (MOVBstore dst (MOVBUload src mem) mem)) 319 (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 -> 320 (MOVWstore dst (MOVWload src mem) mem) 321 (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> 322 (MOVHstore [2] dst (MOVHUload [2] src mem) 323 (MOVHstore dst (MOVHUload src mem) mem)) 324 (Move [4] dst src mem) -> 325 (MOVBstore [3] dst (MOVBUload [3] src mem) 326 (MOVBstore [2] dst (MOVBUload [2] src mem) 327 (MOVBstore [1] dst (MOVBUload [1] src mem) 328 (MOVBstore dst (MOVBUload src mem) mem)))) 329 330 (Move [3] dst src mem) -> 331 (MOVBstore [2] dst (MOVBUload [2] src mem) 332 (MOVBstore [1] dst (MOVBUload [1] src mem) 333 (MOVBstore dst (MOVBUload src mem) mem))) 334 335 // Medium move uses a duff device 336 // 8 and 128 are magic constants, see runtime/mkduff.go 337 (Move [s] {t} dst src mem) 338 && s%4 == 0 && s > 4 && s <= 512 339 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> 340 (DUFFCOPY [8 * (128 - int64(s/4))] dst src mem) 341 342 // Large move uses a loop 343 (Move [s] {t} dst src mem) 344 && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> 345 (LoweredMove [t.(*types.Type).Alignment()] 346 dst 347 src 348 (ADDconst <src.Type> src [s-moveSize(t.(*types.Type).Alignment(), config)]) 349 mem) 350 351 // calls 352 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 353 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 354 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 355 356 // checks 357 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 358 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 359 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 360 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 361 362 // pseudo-ops 363 (GetClosurePtr) -> (LoweredGetClosurePtr) 364 (GetCallerSP) -> (LoweredGetCallerSP) 365 (Convert x mem) -> (MOVWconvert x mem) 366 367 // Absorb pseudo-ops into blocks. 368 (If (Equal cc) yes no) -> (EQ cc yes no) 369 (If (NotEqual cc) yes no) -> (NE cc yes no) 370 (If (LessThan cc) yes no) -> (LT cc yes no) 371 (If (LessThanU cc) yes no) -> (ULT cc yes no) 372 (If (LessEqual cc) yes no) -> (LE cc yes no) 373 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 374 (If (GreaterThan cc) yes no) -> (GT cc yes no) 375 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 376 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 377 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 378 379 (If cond yes no) -> (NE (CMPconst [0] cond) yes no) 380 381 // Absorb boolean tests into block 382 (NE (CMPconst [0] (Equal cc)) yes no) -> (EQ cc yes no) 383 (NE (CMPconst [0] (NotEqual cc)) yes no) -> (NE cc yes no) 384 (NE (CMPconst [0] (LessThan cc)) yes no) -> (LT cc yes no) 385 (NE (CMPconst [0] (LessThanU cc)) yes no) -> (ULT cc yes no) 386 (NE (CMPconst [0] (LessEqual cc)) yes no) -> (LE cc yes no) 387 (NE (CMPconst [0] (LessEqualU cc)) yes no) -> (ULE cc yes no) 388 (NE (CMPconst [0] (GreaterThan cc)) yes no) -> (GT cc yes no) 389 (NE (CMPconst [0] (GreaterThanU cc)) yes no) -> (UGT cc yes no) 390 (NE (CMPconst [0] (GreaterEqual cc)) yes no) -> (GE cc yes no) 391 (NE (CMPconst [0] (GreaterEqualU cc)) yes no) -> (UGE cc yes no) 392 393 // Write barrier. 394 (WB {fn} destptr srcptr mem) -> (LoweredWB {fn} destptr srcptr mem) 395 396 // Optimizations 397 398 // fold offset into address 399 (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off1+off2] {sym} ptr) 400 (SUBconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off2-off1] {sym} ptr) 401 402 // fold address into load/store 403 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBload [off1+off2] {sym} ptr mem) 404 (MOVBload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBload [off1-off2] {sym} ptr mem) 405 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBUload [off1+off2] {sym} ptr mem) 406 (MOVBUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBUload [off1-off2] {sym} ptr mem) 407 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHload [off1+off2] {sym} ptr mem) 408 (MOVHload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHload [off1-off2] {sym} ptr mem) 409 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHUload [off1+off2] {sym} ptr mem) 410 (MOVHUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHUload [off1-off2] {sym} ptr mem) 411 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVWload [off1+off2] {sym} ptr mem) 412 (MOVWload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVWload [off1-off2] {sym} ptr mem) 413 (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVFload [off1+off2] {sym} ptr mem) 414 (MOVFload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVFload [off1-off2] {sym} ptr mem) 415 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVDload [off1+off2] {sym} ptr mem) 416 (MOVDload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVDload [off1-off2] {sym} ptr mem) 417 418 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVBstore [off1+off2] {sym} ptr val mem) 419 (MOVBstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVBstore [off1-off2] {sym} ptr val mem) 420 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVHstore [off1+off2] {sym} ptr val mem) 421 (MOVHstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVHstore [off1-off2] {sym} ptr val mem) 422 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVWstore [off1+off2] {sym} ptr val mem) 423 (MOVWstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVWstore [off1-off2] {sym} ptr val mem) 424 (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVFstore [off1+off2] {sym} ptr val mem) 425 (MOVFstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVFstore [off1-off2] {sym} ptr val mem) 426 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVDstore [off1+off2] {sym} ptr val mem) 427 (MOVDstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVDstore [off1-off2] {sym} ptr val mem) 428 429 (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 430 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 431 (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 432 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 433 (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 434 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 435 (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 436 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 437 (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 438 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 439 (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 440 (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 441 (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 442 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 443 444 (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 445 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 446 (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 447 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 448 (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 449 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 450 (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 451 (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 452 (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 453 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 454 455 // replace load from same location as preceding store with zero/sign extension (or copy in case of full width) 456 (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBreg x) 457 (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBUreg x) 458 (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHreg x) 459 (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHUreg x) 460 (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 461 462 (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 463 (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 464 465 (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> x 466 (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 467 (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 468 (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 469 (MOVBUloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBUreg x) 470 (MOVBloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBreg x) 471 (MOVHUloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHUreg x) 472 (MOVHloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHreg x) 473 474 // fold constant into arithmatic ops 475 (ADD x (MOVWconst [c])) -> (ADDconst [c] x) 476 (SUB (MOVWconst [c]) x) -> (RSBconst [c] x) 477 (SUB x (MOVWconst [c])) -> (SUBconst [c] x) 478 (RSB (MOVWconst [c]) x) -> (SUBconst [c] x) 479 (RSB x (MOVWconst [c])) -> (RSBconst [c] x) 480 481 (ADDS x (MOVWconst [c])) -> (ADDSconst [c] x) 482 (SUBS x (MOVWconst [c])) -> (SUBSconst [c] x) 483 484 (ADC (MOVWconst [c]) x flags) -> (ADCconst [c] x flags) 485 (ADC x (MOVWconst [c]) flags) -> (ADCconst [c] x flags) 486 (SBC (MOVWconst [c]) x flags) -> (RSCconst [c] x flags) 487 (SBC x (MOVWconst [c]) flags) -> (SBCconst [c] x flags) 488 489 (AND x (MOVWconst [c])) -> (ANDconst [c] x) 490 (OR x (MOVWconst [c])) -> (ORconst [c] x) 491 (XOR x (MOVWconst [c])) -> (XORconst [c] x) 492 (BIC x (MOVWconst [c])) -> (BICconst [c] x) 493 494 (SLL x (MOVWconst [c])) -> (SLLconst x [c&31]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=32) 495 (SRL x (MOVWconst [c])) -> (SRLconst x [c&31]) 496 (SRA x (MOVWconst [c])) -> (SRAconst x [c&31]) 497 498 (CMP x (MOVWconst [c])) -> (CMPconst [c] x) 499 (CMP (MOVWconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 500 (CMN x (MOVWconst [c])) -> (CMNconst [c] x) 501 (TST x (MOVWconst [c])) -> (TSTconst [c] x) 502 (TEQ x (MOVWconst [c])) -> (TEQconst [c] x) 503 504 // don't extend after proper load 505 // MOVWreg instruction is not emitted if src and dst registers are same, but it ensures the type. 506 (MOVBreg x:(MOVBload _ _)) -> (MOVWreg x) 507 (MOVBUreg x:(MOVBUload _ _)) -> (MOVWreg x) 508 (MOVHreg x:(MOVBload _ _)) -> (MOVWreg x) 509 (MOVHreg x:(MOVBUload _ _)) -> (MOVWreg x) 510 (MOVHreg x:(MOVHload _ _)) -> (MOVWreg x) 511 (MOVHUreg x:(MOVBUload _ _)) -> (MOVWreg x) 512 (MOVHUreg x:(MOVHUload _ _)) -> (MOVWreg x) 513 514 // fold extensions and ANDs together 515 (MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&0xff] x) 516 (MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&0xffff] x) 517 (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 -> (ANDconst [c&0x7f] x) 518 (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 -> (ANDconst [c&0x7fff] x) 519 520 // fold double extensions 521 (MOVBreg x:(MOVBreg _)) -> (MOVWreg x) 522 (MOVBUreg x:(MOVBUreg _)) -> (MOVWreg x) 523 (MOVHreg x:(MOVBreg _)) -> (MOVWreg x) 524 (MOVHreg x:(MOVBUreg _)) -> (MOVWreg x) 525 (MOVHreg x:(MOVHreg _)) -> (MOVWreg x) 526 (MOVHUreg x:(MOVBUreg _)) -> (MOVWreg x) 527 (MOVHUreg x:(MOVHUreg _)) -> (MOVWreg x) 528 529 // don't extend before store 530 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 531 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 532 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 533 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 534 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 535 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 536 537 // if a register move has only 1 use, just use the same register without emitting instruction 538 // MOVWnop doesn't emit instruction, only for ensuring the type. 539 (MOVWreg x) && x.Uses == 1 -> (MOVWnop x) 540 541 // mul by constant 542 (MUL x (MOVWconst [c])) && int32(c) == -1 -> (RSBconst [0] x) 543 (MUL _ (MOVWconst [0])) -> (MOVWconst [0]) 544 (MUL x (MOVWconst [1])) -> x 545 (MUL x (MOVWconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 546 (MUL x (MOVWconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 547 (MUL x (MOVWconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 548 (MUL x (MOVWconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 549 (MUL x (MOVWconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 550 (MUL x (MOVWconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 551 (MUL x (MOVWconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 552 553 (MULA x (MOVWconst [c]) a) && int32(c) == -1 -> (SUB a x) 554 (MULA _ (MOVWconst [0]) a) -> a 555 (MULA x (MOVWconst [1]) a) -> (ADD x a) 556 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 557 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 558 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 559 (MULA x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 560 (MULA x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 561 (MULA x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 562 (MULA x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 563 564 (MULA (MOVWconst [c]) x a) && int32(c) == -1 -> (SUB a x) 565 (MULA (MOVWconst [0]) _ a) -> a 566 (MULA (MOVWconst [1]) x a) -> (ADD x a) 567 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 568 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 569 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 570 (MULA (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 571 (MULA (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 572 (MULA (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 573 (MULA (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 574 575 (MULS x (MOVWconst [c]) a) && int32(c) == -1 -> (ADD a x) 576 (MULS _ (MOVWconst [0]) a) -> a 577 (MULS x (MOVWconst [1]) a) -> (RSB x a) 578 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) 579 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 580 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 581 (MULS x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 582 (MULS x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 583 (MULS x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 584 (MULS x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 585 586 (MULS (MOVWconst [c]) x a) && int32(c) == -1 -> (ADD a x) 587 (MULS (MOVWconst [0]) _ a) -> a 588 (MULS (MOVWconst [1]) x a) -> (RSB x a) 589 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) 590 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 591 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 592 (MULS (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 593 (MULS (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 594 (MULS (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 595 (MULS (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 596 597 // div by constant 598 (Select0 (CALLudiv x (MOVWconst [1]))) -> x 599 (Select1 (CALLudiv _ (MOVWconst [1]))) -> (MOVWconst [0]) 600 (Select0 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 601 (Select1 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (ANDconst [c-1] x) 602 603 // constant comparisons 604 (CMPconst (MOVWconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 605 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 606 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 607 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 608 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 609 (CMNconst (MOVWconst [x]) [y]) && int32(x)==int32(-y) -> (FlagEQ) 610 (CMNconst (MOVWconst [x]) [y]) && int32(x)<int32(-y) && uint32(x)<uint32(-y) -> (FlagLT_ULT) 611 (CMNconst (MOVWconst [x]) [y]) && int32(x)<int32(-y) && uint32(x)>uint32(-y) -> (FlagLT_UGT) 612 (CMNconst (MOVWconst [x]) [y]) && int32(x)>int32(-y) && uint32(x)<uint32(-y) -> (FlagGT_ULT) 613 (CMNconst (MOVWconst [x]) [y]) && int32(x)>int32(-y) && uint32(x)>uint32(-y) -> (FlagGT_UGT) 614 (TSTconst (MOVWconst [x]) [y]) && int32(x&y)==0 -> (FlagEQ) 615 (TSTconst (MOVWconst [x]) [y]) && int32(x&y)<0 -> (FlagLT_UGT) 616 (TSTconst (MOVWconst [x]) [y]) && int32(x&y)>0 -> (FlagGT_UGT) 617 (TEQconst (MOVWconst [x]) [y]) && int32(x^y)==0 -> (FlagEQ) 618 (TEQconst (MOVWconst [x]) [y]) && int32(x^y)<0 -> (FlagLT_UGT) 619 (TEQconst (MOVWconst [x]) [y]) && int32(x^y)>0 -> (FlagGT_UGT) 620 621 // other known comparisons 622 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 623 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 624 (CMPconst (ANDconst _ [m]) [n]) && 0 <= int32(m) && int32(m) < int32(n) -> (FlagLT_ULT) 625 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n) -> (FlagLT_ULT) 626 627 // absorb flag constants into branches 628 (EQ (FlagEQ) yes no) -> (First nil yes no) 629 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 630 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 631 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 632 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 633 634 (NE (FlagEQ) yes no) -> (First nil no yes) 635 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 636 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 637 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 638 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 639 640 (LT (FlagEQ) yes no) -> (First nil no yes) 641 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 642 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 643 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 644 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 645 646 (LE (FlagEQ) yes no) -> (First nil yes no) 647 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 648 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 649 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 650 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 651 652 (GT (FlagEQ) yes no) -> (First nil no yes) 653 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 654 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 655 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 656 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 657 658 (GE (FlagEQ) yes no) -> (First nil yes no) 659 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 660 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 661 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 662 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 663 664 (ULT (FlagEQ) yes no) -> (First nil no yes) 665 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 666 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 667 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 668 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 669 670 (ULE (FlagEQ) yes no) -> (First nil yes no) 671 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 672 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 673 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 674 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 675 676 (UGT (FlagEQ) yes no) -> (First nil no yes) 677 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 678 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 679 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 680 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 681 682 (UGE (FlagEQ) yes no) -> (First nil yes no) 683 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 684 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 685 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 686 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 687 688 // absorb InvertFlags into branches 689 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 690 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 691 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 692 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 693 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 694 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 695 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 696 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 697 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 698 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 699 700 // absorb flag constants into boolean values 701 (Equal (FlagEQ)) -> (MOVWconst [1]) 702 (Equal (FlagLT_ULT)) -> (MOVWconst [0]) 703 (Equal (FlagLT_UGT)) -> (MOVWconst [0]) 704 (Equal (FlagGT_ULT)) -> (MOVWconst [0]) 705 (Equal (FlagGT_UGT)) -> (MOVWconst [0]) 706 707 (NotEqual (FlagEQ)) -> (MOVWconst [0]) 708 (NotEqual (FlagLT_ULT)) -> (MOVWconst [1]) 709 (NotEqual (FlagLT_UGT)) -> (MOVWconst [1]) 710 (NotEqual (FlagGT_ULT)) -> (MOVWconst [1]) 711 (NotEqual (FlagGT_UGT)) -> (MOVWconst [1]) 712 713 (LessThan (FlagEQ)) -> (MOVWconst [0]) 714 (LessThan (FlagLT_ULT)) -> (MOVWconst [1]) 715 (LessThan (FlagLT_UGT)) -> (MOVWconst [1]) 716 (LessThan (FlagGT_ULT)) -> (MOVWconst [0]) 717 (LessThan (FlagGT_UGT)) -> (MOVWconst [0]) 718 719 (LessThanU (FlagEQ)) -> (MOVWconst [0]) 720 (LessThanU (FlagLT_ULT)) -> (MOVWconst [1]) 721 (LessThanU (FlagLT_UGT)) -> (MOVWconst [0]) 722 (LessThanU (FlagGT_ULT)) -> (MOVWconst [1]) 723 (LessThanU (FlagGT_UGT)) -> (MOVWconst [0]) 724 725 (LessEqual (FlagEQ)) -> (MOVWconst [1]) 726 (LessEqual (FlagLT_ULT)) -> (MOVWconst [1]) 727 (LessEqual (FlagLT_UGT)) -> (MOVWconst [1]) 728 (LessEqual (FlagGT_ULT)) -> (MOVWconst [0]) 729 (LessEqual (FlagGT_UGT)) -> (MOVWconst [0]) 730 731 (LessEqualU (FlagEQ)) -> (MOVWconst [1]) 732 (LessEqualU (FlagLT_ULT)) -> (MOVWconst [1]) 733 (LessEqualU (FlagLT_UGT)) -> (MOVWconst [0]) 734 (LessEqualU (FlagGT_ULT)) -> (MOVWconst [1]) 735 (LessEqualU (FlagGT_UGT)) -> (MOVWconst [0]) 736 737 (GreaterThan (FlagEQ)) -> (MOVWconst [0]) 738 (GreaterThan (FlagLT_ULT)) -> (MOVWconst [0]) 739 (GreaterThan (FlagLT_UGT)) -> (MOVWconst [0]) 740 (GreaterThan (FlagGT_ULT)) -> (MOVWconst [1]) 741 (GreaterThan (FlagGT_UGT)) -> (MOVWconst [1]) 742 743 (GreaterThanU (FlagEQ)) -> (MOVWconst [0]) 744 (GreaterThanU (FlagLT_ULT)) -> (MOVWconst [0]) 745 (GreaterThanU (FlagLT_UGT)) -> (MOVWconst [1]) 746 (GreaterThanU (FlagGT_ULT)) -> (MOVWconst [0]) 747 (GreaterThanU (FlagGT_UGT)) -> (MOVWconst [1]) 748 749 (GreaterEqual (FlagEQ)) -> (MOVWconst [1]) 750 (GreaterEqual (FlagLT_ULT)) -> (MOVWconst [0]) 751 (GreaterEqual (FlagLT_UGT)) -> (MOVWconst [0]) 752 (GreaterEqual (FlagGT_ULT)) -> (MOVWconst [1]) 753 (GreaterEqual (FlagGT_UGT)) -> (MOVWconst [1]) 754 755 (GreaterEqualU (FlagEQ)) -> (MOVWconst [1]) 756 (GreaterEqualU (FlagLT_ULT)) -> (MOVWconst [0]) 757 (GreaterEqualU (FlagLT_UGT)) -> (MOVWconst [1]) 758 (GreaterEqualU (FlagGT_ULT)) -> (MOVWconst [0]) 759 (GreaterEqualU (FlagGT_UGT)) -> (MOVWconst [1]) 760 761 // absorb InvertFlags into boolean values 762 (Equal (InvertFlags x)) -> (Equal x) 763 (NotEqual (InvertFlags x)) -> (NotEqual x) 764 (LessThan (InvertFlags x)) -> (GreaterThan x) 765 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 766 (GreaterThan (InvertFlags x)) -> (LessThan x) 767 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 768 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 769 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 770 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 771 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 772 773 // absorb flag constants into conditional instructions 774 (CMOVWLSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 775 (CMOVWLSconst _ (FlagLT_ULT) [c]) -> (MOVWconst [c]) 776 (CMOVWLSconst x (FlagLT_UGT)) -> x 777 (CMOVWLSconst _ (FlagGT_ULT) [c]) -> (MOVWconst [c]) 778 (CMOVWLSconst x (FlagGT_UGT)) -> x 779 780 (CMOVWHSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 781 (CMOVWHSconst x (FlagLT_ULT)) -> x 782 (CMOVWHSconst _ (FlagLT_UGT) [c]) -> (MOVWconst [c]) 783 (CMOVWHSconst x (FlagGT_ULT)) -> x 784 (CMOVWHSconst _ (FlagGT_UGT) [c]) -> (MOVWconst [c]) 785 786 (CMOVWLSconst x (InvertFlags flags) [c]) -> (CMOVWHSconst x flags [c]) 787 (CMOVWHSconst x (InvertFlags flags) [c]) -> (CMOVWLSconst x flags [c]) 788 789 (SRAcond x _ (FlagEQ)) -> (SRAconst x [31]) 790 (SRAcond x y (FlagLT_ULT)) -> (SRA x y) 791 (SRAcond x _ (FlagLT_UGT)) -> (SRAconst x [31]) 792 (SRAcond x y (FlagGT_ULT)) -> (SRA x y) 793 (SRAcond x _ (FlagGT_UGT)) -> (SRAconst x [31]) 794 795 // remove redundant *const ops 796 (ADDconst [0] x) -> x 797 (SUBconst [0] x) -> x 798 (ANDconst [0] _) -> (MOVWconst [0]) 799 (ANDconst [c] x) && int32(c)==-1 -> x 800 (ORconst [0] x) -> x 801 (ORconst [c] _) && int32(c)==-1 -> (MOVWconst [-1]) 802 (XORconst [0] x) -> x 803 (BICconst [0] x) -> x 804 (BICconst [c] _) && int32(c)==-1 -> (MOVWconst [0]) 805 806 // generic constant folding 807 (ADDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (SUBconst [int64(int32(-c))] x) 808 (SUBconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (ADDconst [int64(int32(-c))] x) 809 (ANDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (BICconst [int64(int32(^uint32(c)))] x) 810 (BICconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (ANDconst [int64(int32(^uint32(c)))] x) 811 (ADDconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c+d))]) 812 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(c+d))] x) 813 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 814 (ADDconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 815 (ADCconst [c] (ADDconst [d] x) flags) -> (ADCconst [int64(int32(c+d))] x flags) 816 (ADCconst [c] (SUBconst [d] x) flags) -> (ADCconst [int64(int32(c-d))] x flags) 817 (SUBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d-c))]) 818 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(-c-d))] x) 819 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(-c+d))] x) 820 (SUBconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(-c+d))] x) 821 (SBCconst [c] (ADDconst [d] x) flags) -> (SBCconst [int64(int32(c-d))] x flags) 822 (SBCconst [c] (SUBconst [d] x) flags) -> (SBCconst [int64(int32(c+d))] x flags) 823 (RSBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c-d))]) 824 (RSBconst [c] (RSBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 825 (RSBconst [c] (ADDconst [d] x)) -> (RSBconst [int64(int32(c-d))] x) 826 (RSBconst [c] (SUBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 827 (RSCconst [c] (ADDconst [d] x) flags) -> (RSCconst [int64(int32(c-d))] x flags) 828 (RSCconst [c] (SUBconst [d] x) flags) -> (RSCconst [int64(int32(c+d))] x flags) 829 (SLLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<uint64(c))]) 830 (SRLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)>>uint64(c))]) 831 (SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))]) 832 (MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))]) 833 (MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a) 834 (MULS (MOVWconst [c]) (MOVWconst [d]) a) -> (SUBconst [int64(int32(c*d))] a) 835 (Select0 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)/uint32(d))]) 836 (Select1 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)%uint32(d))]) 837 (ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d]) 838 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 839 (ORconst [c] (MOVWconst [d])) -> (MOVWconst [c|d]) 840 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 841 (XORconst [c] (MOVWconst [d])) -> (MOVWconst [c^d]) 842 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 843 (BICconst [c] (MOVWconst [d])) -> (MOVWconst [d&^c]) 844 (BICconst [c] (BICconst [d] x)) -> (BICconst [int64(int32(c|d))] x) 845 (MVN (MOVWconst [c])) -> (MOVWconst [^c]) 846 (MOVBreg (MOVWconst [c])) -> (MOVWconst [int64(int8(c))]) 847 (MOVBUreg (MOVWconst [c])) -> (MOVWconst [int64(uint8(c))]) 848 (MOVHreg (MOVWconst [c])) -> (MOVWconst [int64(int16(c))]) 849 (MOVHUreg (MOVWconst [c])) -> (MOVWconst [int64(uint16(c))]) 850 (MOVWreg (MOVWconst [c])) -> (MOVWconst [c]) 851 // BFX: Width = c >> 8, LSB = c & 0xff, result = d << (32 - Width - LSB) >> (32 - Width) 852 (BFX [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) 853 (BFXU [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) 854 855 // absorb shifts into ops 856 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 857 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 858 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 859 (ADD x (SLL y z)) -> (ADDshiftLLreg x y z) 860 (ADD x (SRL y z)) -> (ADDshiftRLreg x y z) 861 (ADD x (SRA y z)) -> (ADDshiftRAreg x y z) 862 (ADC x (SLLconst [c] y) flags) -> (ADCshiftLL x y [c] flags) 863 (ADC (SLLconst [c] y) x flags) -> (ADCshiftLL x y [c] flags) 864 (ADC x (SRLconst [c] y) flags) -> (ADCshiftRL x y [c] flags) 865 (ADC (SRLconst [c] y) x flags) -> (ADCshiftRL x y [c] flags) 866 (ADC x (SRAconst [c] y) flags) -> (ADCshiftRA x y [c] flags) 867 (ADC (SRAconst [c] y) x flags) -> (ADCshiftRA x y [c] flags) 868 (ADC x (SLL y z) flags) -> (ADCshiftLLreg x y z flags) 869 (ADC (SLL y z) x flags) -> (ADCshiftLLreg x y z flags) 870 (ADC x (SRL y z) flags) -> (ADCshiftRLreg x y z flags) 871 (ADC (SRL y z) x flags) -> (ADCshiftRLreg x y z flags) 872 (ADC x (SRA y z) flags) -> (ADCshiftRAreg x y z flags) 873 (ADC (SRA y z) x flags) -> (ADCshiftRAreg x y z flags) 874 (ADDS x (SLLconst [c] y)) -> (ADDSshiftLL x y [c]) 875 (ADDS x (SRLconst [c] y)) -> (ADDSshiftRL x y [c]) 876 (ADDS x (SRAconst [c] y)) -> (ADDSshiftRA x y [c]) 877 (ADDS x (SLL y z)) -> (ADDSshiftLLreg x y z) 878 (ADDS x (SRL y z)) -> (ADDSshiftRLreg x y z) 879 (ADDS x (SRA y z)) -> (ADDSshiftRAreg x y z) 880 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 881 (SUB (SLLconst [c] y) x) -> (RSBshiftLL x y [c]) 882 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 883 (SUB (SRLconst [c] y) x) -> (RSBshiftRL x y [c]) 884 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 885 (SUB (SRAconst [c] y) x) -> (RSBshiftRA x y [c]) 886 (SUB x (SLL y z)) -> (SUBshiftLLreg x y z) 887 (SUB (SLL y z) x) -> (RSBshiftLLreg x y z) 888 (SUB x (SRL y z)) -> (SUBshiftRLreg x y z) 889 (SUB (SRL y z) x) -> (RSBshiftRLreg x y z) 890 (SUB x (SRA y z)) -> (SUBshiftRAreg x y z) 891 (SUB (SRA y z) x) -> (RSBshiftRAreg x y z) 892 (SBC x (SLLconst [c] y) flags) -> (SBCshiftLL x y [c] flags) 893 (SBC (SLLconst [c] y) x flags) -> (RSCshiftLL x y [c] flags) 894 (SBC x (SRLconst [c] y) flags) -> (SBCshiftRL x y [c] flags) 895 (SBC (SRLconst [c] y) x flags) -> (RSCshiftRL x y [c] flags) 896 (SBC x (SRAconst [c] y) flags) -> (SBCshiftRA x y [c] flags) 897 (SBC (SRAconst [c] y) x flags) -> (RSCshiftRA x y [c] flags) 898 (SBC x (SLL y z) flags) -> (SBCshiftLLreg x y z flags) 899 (SBC (SLL y z) x flags) -> (RSCshiftLLreg x y z flags) 900 (SBC x (SRL y z) flags) -> (SBCshiftRLreg x y z flags) 901 (SBC (SRL y z) x flags) -> (RSCshiftRLreg x y z flags) 902 (SBC x (SRA y z) flags) -> (SBCshiftRAreg x y z flags) 903 (SBC (SRA y z) x flags) -> (RSCshiftRAreg x y z flags) 904 (SUBS x (SLLconst [c] y)) -> (SUBSshiftLL x y [c]) 905 (SUBS (SLLconst [c] y) x) -> (RSBSshiftLL x y [c]) 906 (SUBS x (SRLconst [c] y)) -> (SUBSshiftRL x y [c]) 907 (SUBS (SRLconst [c] y) x) -> (RSBSshiftRL x y [c]) 908 (SUBS x (SRAconst [c] y)) -> (SUBSshiftRA x y [c]) 909 (SUBS (SRAconst [c] y) x) -> (RSBSshiftRA x y [c]) 910 (SUBS x (SLL y z)) -> (SUBSshiftLLreg x y z) 911 (SUBS (SLL y z) x) -> (RSBSshiftLLreg x y z) 912 (SUBS x (SRL y z)) -> (SUBSshiftRLreg x y z) 913 (SUBS (SRL y z) x) -> (RSBSshiftRLreg x y z) 914 (SUBS x (SRA y z)) -> (SUBSshiftRAreg x y z) 915 (SUBS (SRA y z) x) -> (RSBSshiftRAreg x y z) 916 (RSB x (SLLconst [c] y)) -> (RSBshiftLL x y [c]) 917 (RSB (SLLconst [c] y) x) -> (SUBshiftLL x y [c]) 918 (RSB x (SRLconst [c] y)) -> (RSBshiftRL x y [c]) 919 (RSB (SRLconst [c] y) x) -> (SUBshiftRL x y [c]) 920 (RSB x (SRAconst [c] y)) -> (RSBshiftRA x y [c]) 921 (RSB (SRAconst [c] y) x) -> (SUBshiftRA x y [c]) 922 (RSB x (SLL y z)) -> (RSBshiftLLreg x y z) 923 (RSB (SLL y z) x) -> (SUBshiftLLreg x y z) 924 (RSB x (SRL y z)) -> (RSBshiftRLreg x y z) 925 (RSB (SRL y z) x) -> (SUBshiftRLreg x y z) 926 (RSB x (SRA y z)) -> (RSBshiftRAreg x y z) 927 (RSB (SRA y z) x) -> (SUBshiftRAreg x y z) 928 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 929 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 930 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 931 (AND x (SLL y z)) -> (ANDshiftLLreg x y z) 932 (AND x (SRL y z)) -> (ANDshiftRLreg x y z) 933 (AND x (SRA y z)) -> (ANDshiftRAreg x y z) 934 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 935 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 936 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 937 (OR x (SLL y z)) -> (ORshiftLLreg x y z) 938 (OR x (SRL y z)) -> (ORshiftRLreg x y z) 939 (OR x (SRA y z)) -> (ORshiftRAreg x y z) 940 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 941 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 942 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 943 (XOR x (SRRconst [c] y)) -> (XORshiftRR x y [c]) 944 (XOR x (SLL y z)) -> (XORshiftLLreg x y z) 945 (XOR x (SRL y z)) -> (XORshiftRLreg x y z) 946 (XOR x (SRA y z)) -> (XORshiftRAreg x y z) 947 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 948 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 949 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 950 (BIC x (SLL y z)) -> (BICshiftLLreg x y z) 951 (BIC x (SRL y z)) -> (BICshiftRLreg x y z) 952 (BIC x (SRA y z)) -> (BICshiftRAreg x y z) 953 (MVN (SLLconst [c] x)) -> (MVNshiftLL x [c]) 954 (MVN (SRLconst [c] x)) -> (MVNshiftRL x [c]) 955 (MVN (SRAconst [c] x)) -> (MVNshiftRA x [c]) 956 (MVN (SLL x y)) -> (MVNshiftLLreg x y) 957 (MVN (SRL x y)) -> (MVNshiftRLreg x y) 958 (MVN (SRA x y)) -> (MVNshiftRAreg x y) 959 960 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 961 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 962 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 963 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 964 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 965 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 966 (CMP x (SLL y z)) -> (CMPshiftLLreg x y z) 967 (CMP (SLL y z) x) -> (InvertFlags (CMPshiftLLreg x y z)) 968 (CMP x (SRL y z)) -> (CMPshiftRLreg x y z) 969 (CMP (SRL y z) x) -> (InvertFlags (CMPshiftRLreg x y z)) 970 (CMP x (SRA y z)) -> (CMPshiftRAreg x y z) 971 (CMP (SRA y z) x) -> (InvertFlags (CMPshiftRAreg x y z)) 972 (TST x (SLLconst [c] y)) -> (TSTshiftLL x y [c]) 973 (TST x (SRLconst [c] y)) -> (TSTshiftRL x y [c]) 974 (TST x (SRAconst [c] y)) -> (TSTshiftRA x y [c]) 975 (TST x (SLL y z)) -> (TSTshiftLLreg x y z) 976 (TST x (SRL y z)) -> (TSTshiftRLreg x y z) 977 (TST x (SRA y z)) -> (TSTshiftRAreg x y z) 978 (TEQ x (SLLconst [c] y)) -> (TEQshiftLL x y [c]) 979 (TEQ x (SRLconst [c] y)) -> (TEQshiftRL x y [c]) 980 (TEQ x (SRAconst [c] y)) -> (TEQshiftRA x y [c]) 981 (TEQ x (SLL y z)) -> (TEQshiftLLreg x y z) 982 (TEQ x (SRL y z)) -> (TEQshiftRLreg x y z) 983 (TEQ x (SRA y z)) -> (TEQshiftRAreg x y z) 984 (CMN x (SLLconst [c] y)) -> (CMNshiftLL x y [c]) 985 (CMN x (SRLconst [c] y)) -> (CMNshiftRL x y [c]) 986 (CMN x (SRAconst [c] y)) -> (CMNshiftRA x y [c]) 987 (CMN x (SLL y z)) -> (CMNshiftLLreg x y z) 988 (CMN x (SRL y z)) -> (CMNshiftRLreg x y z) 989 (CMN x (SRA y z)) -> (CMNshiftRAreg x y z) 990 991 // prefer *const ops to *shift ops 992 (ADDshiftLL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 993 (ADDshiftRL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 994 (ADDshiftRA (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 995 (ADCshiftLL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SLLconst <x.Type> x [d]) flags) 996 (ADCshiftRL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRLconst <x.Type> x [d]) flags) 997 (ADCshiftRA (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRAconst <x.Type> x [d]) flags) 998 (ADDSshiftLL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SLLconst <x.Type> x [d])) 999 (ADDSshiftRL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRLconst <x.Type> x [d])) 1000 (ADDSshiftRA (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRAconst <x.Type> x [d])) 1001 (SUBshiftLL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SLLconst <x.Type> x [d])) 1002 (SUBshiftRL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRLconst <x.Type> x [d])) 1003 (SUBshiftRA (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRAconst <x.Type> x [d])) 1004 (SBCshiftLL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SLLconst <x.Type> x [d]) flags) 1005 (SBCshiftRL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRLconst <x.Type> x [d]) flags) 1006 (SBCshiftRA (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRAconst <x.Type> x [d]) flags) 1007 (SUBSshiftLL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SLLconst <x.Type> x [d])) 1008 (SUBSshiftRL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRLconst <x.Type> x [d])) 1009 (SUBSshiftRA (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRAconst <x.Type> x [d])) 1010 (RSBshiftLL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SLLconst <x.Type> x [d])) 1011 (RSBshiftRL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRLconst <x.Type> x [d])) 1012 (RSBshiftRA (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRAconst <x.Type> x [d])) 1013 (RSCshiftLL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SLLconst <x.Type> x [d]) flags) 1014 (RSCshiftRL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRLconst <x.Type> x [d]) flags) 1015 (RSCshiftRA (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRAconst <x.Type> x [d]) flags) 1016 (RSBSshiftLL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SLLconst <x.Type> x [d])) 1017 (RSBSshiftRL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRLconst <x.Type> x [d])) 1018 (RSBSshiftRA (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRAconst <x.Type> x [d])) 1019 (ANDshiftLL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 1020 (ANDshiftRL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 1021 (ANDshiftRA (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 1022 (ORshiftLL (MOVWconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 1023 (ORshiftRL (MOVWconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 1024 (ORshiftRA (MOVWconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 1025 (XORshiftLL (MOVWconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 1026 (XORshiftRL (MOVWconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 1027 (XORshiftRA (MOVWconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 1028 (XORshiftRR (MOVWconst [c]) x [d]) -> (XORconst [c] (SRRconst <x.Type> x [d])) 1029 (CMPshiftLL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 1030 (CMPshiftRL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 1031 (CMPshiftRA (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 1032 (TSTshiftLL (MOVWconst [c]) x [d]) -> (TSTconst [c] (SLLconst <x.Type> x [d])) 1033 (TSTshiftRL (MOVWconst [c]) x [d]) -> (TSTconst [c] (SRLconst <x.Type> x [d])) 1034 (TSTshiftRA (MOVWconst [c]) x [d]) -> (TSTconst [c] (SRAconst <x.Type> x [d])) 1035 (TEQshiftLL (MOVWconst [c]) x [d]) -> (TEQconst [c] (SLLconst <x.Type> x [d])) 1036 (TEQshiftRL (MOVWconst [c]) x [d]) -> (TEQconst [c] (SRLconst <x.Type> x [d])) 1037 (TEQshiftRA (MOVWconst [c]) x [d]) -> (TEQconst [c] (SRAconst <x.Type> x [d])) 1038 (CMNshiftLL (MOVWconst [c]) x [d]) -> (CMNconst [c] (SLLconst <x.Type> x [d])) 1039 (CMNshiftRL (MOVWconst [c]) x [d]) -> (CMNconst [c] (SRLconst <x.Type> x [d])) 1040 (CMNshiftRA (MOVWconst [c]) x [d]) -> (CMNconst [c] (SRAconst <x.Type> x [d])) 1041 1042 (ADDshiftLLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SLL <x.Type> x y)) 1043 (ADDshiftRLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRL <x.Type> x y)) 1044 (ADDshiftRAreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRA <x.Type> x y)) 1045 (ADCshiftLLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SLL <x.Type> x y) flags) 1046 (ADCshiftRLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRL <x.Type> x y) flags) 1047 (ADCshiftRAreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRA <x.Type> x y) flags) 1048 (ADDSshiftLLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SLL <x.Type> x y)) 1049 (ADDSshiftRLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRL <x.Type> x y)) 1050 (ADDSshiftRAreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRA <x.Type> x y)) 1051 (SUBshiftLLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SLL <x.Type> x y)) 1052 (SUBshiftRLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRL <x.Type> x y)) 1053 (SUBshiftRAreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRA <x.Type> x y)) 1054 (SBCshiftLLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SLL <x.Type> x y) flags) 1055 (SBCshiftRLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRL <x.Type> x y) flags) 1056 (SBCshiftRAreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRA <x.Type> x y) flags) 1057 (SUBSshiftLLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SLL <x.Type> x y)) 1058 (SUBSshiftRLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRL <x.Type> x y)) 1059 (SUBSshiftRAreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRA <x.Type> x y)) 1060 (RSBshiftLLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SLL <x.Type> x y)) 1061 (RSBshiftRLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRL <x.Type> x y)) 1062 (RSBshiftRAreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRA <x.Type> x y)) 1063 (RSCshiftLLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SLL <x.Type> x y) flags) 1064 (RSCshiftRLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRL <x.Type> x y) flags) 1065 (RSCshiftRAreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRA <x.Type> x y) flags) 1066 (RSBSshiftLLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SLL <x.Type> x y)) 1067 (RSBSshiftRLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRL <x.Type> x y)) 1068 (RSBSshiftRAreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRA <x.Type> x y)) 1069 (ANDshiftLLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SLL <x.Type> x y)) 1070 (ANDshiftRLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRL <x.Type> x y)) 1071 (ANDshiftRAreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRA <x.Type> x y)) 1072 (ORshiftLLreg (MOVWconst [c]) x y) -> (ORconst [c] (SLL <x.Type> x y)) 1073 (ORshiftRLreg (MOVWconst [c]) x y) -> (ORconst [c] (SRL <x.Type> x y)) 1074 (ORshiftRAreg (MOVWconst [c]) x y) -> (ORconst [c] (SRA <x.Type> x y)) 1075 (XORshiftLLreg (MOVWconst [c]) x y) -> (XORconst [c] (SLL <x.Type> x y)) 1076 (XORshiftRLreg (MOVWconst [c]) x y) -> (XORconst [c] (SRL <x.Type> x y)) 1077 (XORshiftRAreg (MOVWconst [c]) x y) -> (XORconst [c] (SRA <x.Type> x y)) 1078 (CMPshiftLLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SLL <x.Type> x y))) 1079 (CMPshiftRLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRL <x.Type> x y))) 1080 (CMPshiftRAreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRA <x.Type> x y))) 1081 (TSTshiftLLreg (MOVWconst [c]) x y) -> (TSTconst [c] (SLL <x.Type> x y)) 1082 (TSTshiftRLreg (MOVWconst [c]) x y) -> (TSTconst [c] (SRL <x.Type> x y)) 1083 (TSTshiftRAreg (MOVWconst [c]) x y) -> (TSTconst [c] (SRA <x.Type> x y)) 1084 (TEQshiftLLreg (MOVWconst [c]) x y) -> (TEQconst [c] (SLL <x.Type> x y)) 1085 (TEQshiftRLreg (MOVWconst [c]) x y) -> (TEQconst [c] (SRL <x.Type> x y)) 1086 (TEQshiftRAreg (MOVWconst [c]) x y) -> (TEQconst [c] (SRA <x.Type> x y)) 1087 (CMNshiftLLreg (MOVWconst [c]) x y) -> (CMNconst [c] (SLL <x.Type> x y)) 1088 (CMNshiftRLreg (MOVWconst [c]) x y) -> (CMNconst [c] (SRL <x.Type> x y)) 1089 (CMNshiftRAreg (MOVWconst [c]) x y) -> (CMNconst [c] (SRA <x.Type> x y)) 1090 1091 // constant folding in *shift ops 1092 (ADDshiftLL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(uint32(c)<<uint64(d)))]) 1093 (ADDshiftRL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(uint32(c)>>uint64(d)))]) 1094 (ADDshiftRA x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(c)>>uint64(d))]) 1095 (ADCshiftLL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) 1096 (ADCshiftRL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) 1097 (ADCshiftRA x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(c)>>uint64(d))] flags) 1098 (ADDSshiftLL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(uint32(c)<<uint64(d)))]) 1099 (ADDSshiftRL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(uint32(c)>>uint64(d)))]) 1100 (ADDSshiftRA x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(c)>>uint64(d))]) 1101 (SUBshiftLL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(uint32(c)<<uint64(d)))]) 1102 (SUBshiftRL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(uint32(c)>>uint64(d)))]) 1103 (SUBshiftRA x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(c)>>uint64(d))]) 1104 (SBCshiftLL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) 1105 (SBCshiftRL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) 1106 (SBCshiftRA x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(c)>>uint64(d))] flags) 1107 (SUBSshiftLL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(uint32(c)<<uint64(d)))]) 1108 (SUBSshiftRL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(uint32(c)>>uint64(d)))]) 1109 (SUBSshiftRA x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(c)>>uint64(d))]) 1110 (RSBshiftLL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(uint32(c)<<uint64(d)))]) 1111 (RSBshiftRL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(uint32(c)>>uint64(d)))]) 1112 (RSBshiftRA x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(c)>>uint64(d))]) 1113 (RSCshiftLL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(uint32(c)<<uint64(d)))] flags) 1114 (RSCshiftRL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(uint32(c)>>uint64(d)))] flags) 1115 (RSCshiftRA x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(c)>>uint64(d))] flags) 1116 (RSBSshiftLL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(uint32(c)<<uint64(d)))]) 1117 (RSBSshiftRL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(uint32(c)>>uint64(d)))]) 1118 (RSBSshiftRA x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(c)>>uint64(d))]) 1119 (ANDshiftLL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(uint32(c)<<uint64(d)))]) 1120 (ANDshiftRL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(uint32(c)>>uint64(d)))]) 1121 (ANDshiftRA x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(c)>>uint64(d))]) 1122 (ORshiftLL x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(uint32(c)<<uint64(d)))]) 1123 (ORshiftRL x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(uint32(c)>>uint64(d)))]) 1124 (ORshiftRA x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(c)>>uint64(d))]) 1125 (XORshiftLL x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)<<uint64(d)))]) 1126 (XORshiftRL x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)>>uint64(d)))]) 1127 (XORshiftRA x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(c)>>uint64(d))]) 1128 (XORshiftRR x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(uint32(c)>>uint64(d)|uint32(c)<<uint64(32-d)))]) 1129 (BICshiftLL x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(uint32(c)<<uint64(d)))]) 1130 (BICshiftRL x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(uint32(c)>>uint64(d)))]) 1131 (BICshiftRA x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(c)>>uint64(d))]) 1132 (MVNshiftLL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)<<uint64(d))]) 1133 (MVNshiftRL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)>>uint64(d))]) 1134 (MVNshiftRA (MOVWconst [c]) [d]) -> (MOVWconst [^int64(int32(c)>>uint64(d))]) 1135 (CMPshiftLL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(uint32(c)<<uint64(d)))]) 1136 (CMPshiftRL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(uint32(c)>>uint64(d)))]) 1137 (CMPshiftRA x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(c)>>uint64(d))]) 1138 (TSTshiftLL x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(uint32(c)<<uint64(d)))]) 1139 (TSTshiftRL x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(uint32(c)>>uint64(d)))]) 1140 (TSTshiftRA x (MOVWconst [c]) [d]) -> (TSTconst x [int64(int32(c)>>uint64(d))]) 1141 (TEQshiftLL x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(uint32(c)<<uint64(d)))]) 1142 (TEQshiftRL x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(uint32(c)>>uint64(d)))]) 1143 (TEQshiftRA x (MOVWconst [c]) [d]) -> (TEQconst x [int64(int32(c)>>uint64(d))]) 1144 (CMNshiftLL x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(uint32(c)<<uint64(d)))]) 1145 (CMNshiftRL x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(uint32(c)>>uint64(d)))]) 1146 (CMNshiftRA x (MOVWconst [c]) [d]) -> (CMNconst x [int64(int32(c)>>uint64(d))]) 1147 1148 (ADDshiftLLreg x y (MOVWconst [c])) -> (ADDshiftLL x y [c]) 1149 (ADDshiftRLreg x y (MOVWconst [c])) -> (ADDshiftRL x y [c]) 1150 (ADDshiftRAreg x y (MOVWconst [c])) -> (ADDshiftRA x y [c]) 1151 (ADCshiftLLreg x y (MOVWconst [c]) flags) -> (ADCshiftLL x y [c] flags) 1152 (ADCshiftRLreg x y (MOVWconst [c]) flags) -> (ADCshiftRL x y [c] flags) 1153 (ADCshiftRAreg x y (MOVWconst [c]) flags) -> (ADCshiftRA x y [c] flags) 1154 (ADDSshiftLLreg x y (MOVWconst [c])) -> (ADDSshiftLL x y [c]) 1155 (ADDSshiftRLreg x y (MOVWconst [c])) -> (ADDSshiftRL x y [c]) 1156 (ADDSshiftRAreg x y (MOVWconst [c])) -> (ADDSshiftRA x y [c]) 1157 (SUBshiftLLreg x y (MOVWconst [c])) -> (SUBshiftLL x y [c]) 1158 (SUBshiftRLreg x y (MOVWconst [c])) -> (SUBshiftRL x y [c]) 1159 (SUBshiftRAreg x y (MOVWconst [c])) -> (SUBshiftRA x y [c]) 1160 (SBCshiftLLreg x y (MOVWconst [c]) flags) -> (SBCshiftLL x y [c] flags) 1161 (SBCshiftRLreg x y (MOVWconst [c]) flags) -> (SBCshiftRL x y [c] flags) 1162 (SBCshiftRAreg x y (MOVWconst [c]) flags) -> (SBCshiftRA x y [c] flags) 1163 (SUBSshiftLLreg x y (MOVWconst [c])) -> (SUBSshiftLL x y [c]) 1164 (SUBSshiftRLreg x y (MOVWconst [c])) -> (SUBSshiftRL x y [c]) 1165 (SUBSshiftRAreg x y (MOVWconst [c])) -> (SUBSshiftRA x y [c]) 1166 (RSBshiftLLreg x y (MOVWconst [c])) -> (RSBshiftLL x y [c]) 1167 (RSBshiftRLreg x y (MOVWconst [c])) -> (RSBshiftRL x y [c]) 1168 (RSBshiftRAreg x y (MOVWconst [c])) -> (RSBshiftRA x y [c]) 1169 (RSCshiftLLreg x y (MOVWconst [c]) flags) -> (RSCshiftLL x y [c] flags) 1170 (RSCshiftRLreg x y (MOVWconst [c]) flags) -> (RSCshiftRL x y [c] flags) 1171 (RSCshiftRAreg x y (MOVWconst [c]) flags) -> (RSCshiftRA x y [c] flags) 1172 (RSBSshiftLLreg x y (MOVWconst [c])) -> (RSBSshiftLL x y [c]) 1173 (RSBSshiftRLreg x y (MOVWconst [c])) -> (RSBSshiftRL x y [c]) 1174 (RSBSshiftRAreg x y (MOVWconst [c])) -> (RSBSshiftRA x y [c]) 1175 (ANDshiftLLreg x y (MOVWconst [c])) -> (ANDshiftLL x y [c]) 1176 (ANDshiftRLreg x y (MOVWconst [c])) -> (ANDshiftRL x y [c]) 1177 (ANDshiftRAreg x y (MOVWconst [c])) -> (ANDshiftRA x y [c]) 1178 (ORshiftLLreg x y (MOVWconst [c])) -> (ORshiftLL x y [c]) 1179 (ORshiftRLreg x y (MOVWconst [c])) -> (ORshiftRL x y [c]) 1180 (ORshiftRAreg x y (MOVWconst [c])) -> (ORshiftRA x y [c]) 1181 (XORshiftLLreg x y (MOVWconst [c])) -> (XORshiftLL x y [c]) 1182 (XORshiftRLreg x y (MOVWconst [c])) -> (XORshiftRL x y [c]) 1183 (XORshiftRAreg x y (MOVWconst [c])) -> (XORshiftRA x y [c]) 1184 (BICshiftLLreg x y (MOVWconst [c])) -> (BICshiftLL x y [c]) 1185 (BICshiftRLreg x y (MOVWconst [c])) -> (BICshiftRL x y [c]) 1186 (BICshiftRAreg x y (MOVWconst [c])) -> (BICshiftRA x y [c]) 1187 (MVNshiftLLreg x (MOVWconst [c])) -> (MVNshiftLL x [c]) 1188 (MVNshiftRLreg x (MOVWconst [c])) -> (MVNshiftRL x [c]) 1189 (MVNshiftRAreg x (MOVWconst [c])) -> (MVNshiftRA x [c]) 1190 (CMPshiftLLreg x y (MOVWconst [c])) -> (CMPshiftLL x y [c]) 1191 (CMPshiftRLreg x y (MOVWconst [c])) -> (CMPshiftRL x y [c]) 1192 (CMPshiftRAreg x y (MOVWconst [c])) -> (CMPshiftRA x y [c]) 1193 (TSTshiftLLreg x y (MOVWconst [c])) -> (TSTshiftLL x y [c]) 1194 (TSTshiftRLreg x y (MOVWconst [c])) -> (TSTshiftRL x y [c]) 1195 (TSTshiftRAreg x y (MOVWconst [c])) -> (TSTshiftRA x y [c]) 1196 (TEQshiftLLreg x y (MOVWconst [c])) -> (TEQshiftLL x y [c]) 1197 (TEQshiftRLreg x y (MOVWconst [c])) -> (TEQshiftRL x y [c]) 1198 (TEQshiftRAreg x y (MOVWconst [c])) -> (TEQshiftRA x y [c]) 1199 (CMNshiftLLreg x y (MOVWconst [c])) -> (CMNshiftLL x y [c]) 1200 (CMNshiftRLreg x y (MOVWconst [c])) -> (CMNshiftRL x y [c]) 1201 (CMNshiftRAreg x y (MOVWconst [c])) -> (CMNshiftRA x y [c]) 1202 1203 // Generate rotates 1204 (ADDshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1205 ( ORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1206 (XORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1207 (ADDshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1208 ( ORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1209 (XORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1210 1211 // use indexed loads and stores 1212 (MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVWloadidx ptr idx mem) 1213 (MOVWstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVWstoreidx ptr idx val mem) 1214 (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftLL ptr idx [c] mem) 1215 (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRL ptr idx [c] mem) 1216 (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRA ptr idx [c] mem) 1217 (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftLL ptr idx [c] val mem) 1218 (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRL ptr idx [c] val mem) 1219 (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRA ptr idx [c] val mem) 1220 (MOVBUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBUloadidx ptr idx mem) 1221 (MOVBload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBloadidx ptr idx mem) 1222 (MOVBstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVBstoreidx ptr idx val mem) 1223 (MOVHUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHUloadidx ptr idx mem) 1224 (MOVHload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHloadidx ptr idx mem) 1225 (MOVHstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVHstoreidx ptr idx val mem) 1226 1227 // constant folding in indexed loads and stores 1228 (MOVWloadidx ptr (MOVWconst [c]) mem) -> (MOVWload [c] ptr mem) 1229 (MOVWloadidx (MOVWconst [c]) ptr mem) -> (MOVWload [c] ptr mem) 1230 (MOVBloadidx ptr (MOVWconst [c]) mem) -> (MOVBload [c] ptr mem) 1231 (MOVBloadidx (MOVWconst [c]) ptr mem) -> (MOVBload [c] ptr mem) 1232 (MOVBUloadidx ptr (MOVWconst [c]) mem) -> (MOVBUload [c] ptr mem) 1233 (MOVBUloadidx (MOVWconst [c]) ptr mem) -> (MOVBUload [c] ptr mem) 1234 (MOVHUloadidx ptr (MOVWconst [c]) mem) -> (MOVHUload [c] ptr mem) 1235 (MOVHUloadidx (MOVWconst [c]) ptr mem) -> (MOVHUload [c] ptr mem) 1236 (MOVHloadidx ptr (MOVWconst [c]) mem) -> (MOVHload [c] ptr mem) 1237 (MOVHloadidx (MOVWconst [c]) ptr mem) -> (MOVHload [c] ptr mem) 1238 1239 (MOVWstoreidx ptr (MOVWconst [c]) val mem) -> (MOVWstore [c] ptr val mem) 1240 (MOVWstoreidx (MOVWconst [c]) ptr val mem) -> (MOVWstore [c] ptr val mem) 1241 (MOVBstoreidx ptr (MOVWconst [c]) val mem) -> (MOVBstore [c] ptr val mem) 1242 (MOVBstoreidx (MOVWconst [c]) ptr val mem) -> (MOVBstore [c] ptr val mem) 1243 (MOVHstoreidx ptr (MOVWconst [c]) val mem) -> (MOVHstore [c] ptr val mem) 1244 (MOVHstoreidx (MOVWconst [c]) ptr val mem) -> (MOVHstore [c] ptr val mem) 1245 1246 (MOVWloadidx ptr (SLLconst idx [c]) mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1247 (MOVWloadidx (SLLconst idx [c]) ptr mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1248 (MOVWloadidx ptr (SRLconst idx [c]) mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1249 (MOVWloadidx (SRLconst idx [c]) ptr mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1250 (MOVWloadidx ptr (SRAconst idx [c]) mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1251 (MOVWloadidx (SRAconst idx [c]) ptr mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1252 1253 (MOVWstoreidx ptr (SLLconst idx [c]) val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1254 (MOVWstoreidx (SLLconst idx [c]) ptr val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1255 (MOVWstoreidx ptr (SRLconst idx [c]) val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1256 (MOVWstoreidx (SRLconst idx [c]) ptr val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1257 (MOVWstoreidx ptr (SRAconst idx [c]) val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1258 (MOVWstoreidx (SRAconst idx [c]) ptr val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1259 1260 (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem) 1261 (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem) 1262 (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(int32(c)>>uint64(d))] ptr mem) 1263 1264 (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem) 1265 (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem) 1266 (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem) 1267 1268 // generic simplifications 1269 (ADD x (RSBconst [0] y)) -> (SUB x y) 1270 (ADD <t> (RSBconst [c] x) (RSBconst [d] y)) -> (RSBconst [c+d] (ADD <t> x y)) 1271 (SUB x x) -> (MOVWconst [0]) 1272 (RSB x x) -> (MOVWconst [0]) 1273 (AND x x) -> x 1274 (OR x x) -> x 1275 (XOR x x) -> (MOVWconst [0]) 1276 (BIC x x) -> (MOVWconst [0]) 1277 1278 (ADD (MUL x y) a) -> (MULA x y a) 1279 (SUB a (MUL x y)) && objabi.GOARM == 7 -> (MULS x y a) 1280 (RSB (MUL x y) a) && objabi.GOARM == 7 -> (MULS x y a) 1281 1282 (NEGF (MULF x y)) && objabi.GOARM >= 6 -> (NMULF x y) 1283 (NEGD (MULD x y)) && objabi.GOARM >= 6 -> (NMULD x y) 1284 (MULF (NEGF x) y) && objabi.GOARM >= 6 -> (NMULF x y) 1285 (MULD (NEGD x) y) && objabi.GOARM >= 6 -> (NMULD x y) 1286 (NMULF (NEGF x) y) -> (MULF x y) 1287 (NMULD (NEGD x) y) -> (MULD x y) 1288 1289 // the result will overwrite the addend, since they are in the same register 1290 (ADDF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) 1291 (ADDF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) 1292 (ADDD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) 1293 (ADDD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) 1294 (SUBF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) 1295 (SUBF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) 1296 (SUBD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) 1297 (SUBD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) 1298 1299 (AND x (MVN y)) -> (BIC x y) 1300 1301 // simplification with *shift ops 1302 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1303 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1304 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1305 (RSBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1306 (RSBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1307 (RSBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1308 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1309 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1310 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1311 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1312 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1313 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1314 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1315 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1316 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1317 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1318 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1319 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1320 (AND x (MVNshiftLL y [c])) -> (BICshiftLL x y [c]) 1321 (AND x (MVNshiftRL y [c])) -> (BICshiftRL x y [c]) 1322 (AND x (MVNshiftRA y [c])) -> (BICshiftRA x y [c]) 1323 1324 // floating point optimizations 1325 (CMPF x (MOVFconst [0])) -> (CMPF0 x) 1326 (CMPD x (MOVDconst [0])) -> (CMPD0 x) 1327 1328 // bit extraction 1329 (SRAconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFX [(d-c)|(32-d)<<8] x) 1330 (SRLconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFXU [(d-c)|(32-d)<<8] x) 1331 1332 // comparison simplification 1333 (CMP x (RSBconst [0] y)) -> (CMN x y) 1334 (CMN x (RSBconst [0] y)) -> (CMP x y) 1335 (EQ (CMPconst [0] (SUB x y)) yes no) -> (EQ (CMP x y) yes no) 1336 (EQ (CMPconst [0] (SUBconst [c] x)) yes no) -> (EQ (CMPconst [c] x) yes no) 1337 (EQ (CMPconst [0] (SUBshiftLL x y [c])) yes no) -> (EQ (CMPshiftLL x y [c]) yes no) 1338 (EQ (CMPconst [0] (SUBshiftRL x y [c])) yes no) -> (EQ (CMPshiftRL x y [c]) yes no) 1339 (EQ (CMPconst [0] (SUBshiftRA x y [c])) yes no) -> (EQ (CMPshiftRA x y [c]) yes no) 1340 (EQ (CMPconst [0] (SUBshiftLLreg x y z)) yes no) -> (EQ (CMPshiftLLreg x y z) yes no) 1341 (EQ (CMPconst [0] (SUBshiftRLreg x y z)) yes no) -> (EQ (CMPshiftRLreg x y z) yes no) 1342 (EQ (CMPconst [0] (SUBshiftRAreg x y z)) yes no) -> (EQ (CMPshiftRAreg x y z) yes no) 1343 (NE (CMPconst [0] (SUB x y)) yes no) -> (NE (CMP x y) yes no) 1344 (NE (CMPconst [0] (SUBconst [c] x)) yes no) -> (NE (CMPconst [c] x) yes no) 1345 (NE (CMPconst [0] (SUBshiftLL x y [c])) yes no) -> (NE (CMPshiftLL x y [c]) yes no) 1346 (NE (CMPconst [0] (SUBshiftRL x y [c])) yes no) -> (NE (CMPshiftRL x y [c]) yes no) 1347 (NE (CMPconst [0] (SUBshiftRA x y [c])) yes no) -> (NE (CMPshiftRA x y [c]) yes no) 1348 (NE (CMPconst [0] (SUBshiftLLreg x y z)) yes no) -> (NE (CMPshiftLLreg x y z) yes no) 1349 (NE (CMPconst [0] (SUBshiftRLreg x y z)) yes no) -> (NE (CMPshiftRLreg x y z) yes no) 1350 (NE (CMPconst [0] (SUBshiftRAreg x y z)) yes no) -> (NE (CMPshiftRAreg x y z) yes no) 1351 (EQ (CMPconst [0] (ADD x y)) yes no) -> (EQ (CMN x y) yes no) 1352 (EQ (CMPconst [0] (ADDconst [c] x)) yes no) -> (EQ (CMNconst [c] x) yes no) 1353 (EQ (CMPconst [0] (ADDshiftLL x y [c])) yes no) -> (EQ (CMNshiftLL x y [c]) yes no) 1354 (EQ (CMPconst [0] (ADDshiftRL x y [c])) yes no) -> (EQ (CMNshiftRL x y [c]) yes no) 1355 (EQ (CMPconst [0] (ADDshiftRA x y [c])) yes no) -> (EQ (CMNshiftRA x y [c]) yes no) 1356 (EQ (CMPconst [0] (ADDshiftLLreg x y z)) yes no) -> (EQ (CMNshiftLLreg x y z) yes no) 1357 (EQ (CMPconst [0] (ADDshiftRLreg x y z)) yes no) -> (EQ (CMNshiftRLreg x y z) yes no) 1358 (EQ (CMPconst [0] (ADDshiftRAreg x y z)) yes no) -> (EQ (CMNshiftRAreg x y z) yes no) 1359 (NE (CMPconst [0] (ADD x y)) yes no) -> (NE (CMN x y) yes no) 1360 (NE (CMPconst [0] (ADDconst [c] x)) yes no) -> (NE (CMNconst [c] x) yes no) 1361 (NE (CMPconst [0] (ADDshiftLL x y [c])) yes no) -> (NE (CMNshiftLL x y [c]) yes no) 1362 (NE (CMPconst [0] (ADDshiftRL x y [c])) yes no) -> (NE (CMNshiftRL x y [c]) yes no) 1363 (NE (CMPconst [0] (ADDshiftRA x y [c])) yes no) -> (NE (CMNshiftRA x y [c]) yes no) 1364 (NE (CMPconst [0] (ADDshiftLLreg x y z)) yes no) -> (NE (CMNshiftLLreg x y z) yes no) 1365 (NE (CMPconst [0] (ADDshiftRLreg x y z)) yes no) -> (NE (CMNshiftRLreg x y z) yes no) 1366 (NE (CMPconst [0] (ADDshiftRAreg x y z)) yes no) -> (NE (CMNshiftRAreg x y z) yes no) 1367 (EQ (CMPconst [0] (AND x y)) yes no) -> (EQ (TST x y) yes no) 1368 (EQ (CMPconst [0] (ANDconst [c] x)) yes no) -> (EQ (TSTconst [c] x) yes no) 1369 (EQ (CMPconst [0] (ANDshiftLL x y [c])) yes no) -> (EQ (TSTshiftLL x y [c]) yes no) 1370 (EQ (CMPconst [0] (ANDshiftRL x y [c])) yes no) -> (EQ (TSTshiftRL x y [c]) yes no) 1371 (EQ (CMPconst [0] (ANDshiftRA x y [c])) yes no) -> (EQ (TSTshiftRA x y [c]) yes no) 1372 (EQ (CMPconst [0] (ANDshiftLLreg x y z)) yes no) -> (EQ (TSTshiftLLreg x y z) yes no) 1373 (EQ (CMPconst [0] (ANDshiftRLreg x y z)) yes no) -> (EQ (TSTshiftRLreg x y z) yes no) 1374 (EQ (CMPconst [0] (ANDshiftRAreg x y z)) yes no) -> (EQ (TSTshiftRAreg x y z) yes no) 1375 (NE (CMPconst [0] (AND x y)) yes no) -> (NE (TST x y) yes no) 1376 (NE (CMPconst [0] (ANDconst [c] x)) yes no) -> (NE (TSTconst [c] x) yes no) 1377 (NE (CMPconst [0] (ANDshiftLL x y [c])) yes no) -> (NE (TSTshiftLL x y [c]) yes no) 1378 (NE (CMPconst [0] (ANDshiftRL x y [c])) yes no) -> (NE (TSTshiftRL x y [c]) yes no) 1379 (NE (CMPconst [0] (ANDshiftRA x y [c])) yes no) -> (NE (TSTshiftRA x y [c]) yes no) 1380 (NE (CMPconst [0] (ANDshiftLLreg x y z)) yes no) -> (NE (TSTshiftLLreg x y z) yes no) 1381 (NE (CMPconst [0] (ANDshiftRLreg x y z)) yes no) -> (NE (TSTshiftRLreg x y z) yes no) 1382 (NE (CMPconst [0] (ANDshiftRAreg x y z)) yes no) -> (NE (TSTshiftRAreg x y z) yes no) 1383 (EQ (CMPconst [0] (XOR x y)) yes no) -> (EQ (TEQ x y) yes no) 1384 (EQ (CMPconst [0] (XORconst [c] x)) yes no) -> (EQ (TEQconst [c] x) yes no) 1385 (EQ (CMPconst [0] (XORshiftLL x y [c])) yes no) -> (EQ (TEQshiftLL x y [c]) yes no) 1386 (EQ (CMPconst [0] (XORshiftRL x y [c])) yes no) -> (EQ (TEQshiftRL x y [c]) yes no) 1387 (EQ (CMPconst [0] (XORshiftRA x y [c])) yes no) -> (EQ (TEQshiftRA x y [c]) yes no) 1388 (EQ (CMPconst [0] (XORshiftLLreg x y z)) yes no) -> (EQ (TEQshiftLLreg x y z) yes no) 1389 (EQ (CMPconst [0] (XORshiftRLreg x y z)) yes no) -> (EQ (TEQshiftRLreg x y z) yes no) 1390 (EQ (CMPconst [0] (XORshiftRAreg x y z)) yes no) -> (EQ (TEQshiftRAreg x y z) yes no) 1391 (NE (CMPconst [0] (XOR x y)) yes no) -> (NE (TEQ x y) yes no) 1392 (NE (CMPconst [0] (XORconst [c] x)) yes no) -> (NE (TEQconst [c] x) yes no) 1393 (NE (CMPconst [0] (XORshiftLL x y [c])) yes no) -> (NE (TEQshiftLL x y [c]) yes no) 1394 (NE (CMPconst [0] (XORshiftRL x y [c])) yes no) -> (NE (TEQshiftRL x y [c]) yes no) 1395 (NE (CMPconst [0] (XORshiftRA x y [c])) yes no) -> (NE (TEQshiftRA x y [c]) yes no) 1396 (NE (CMPconst [0] (XORshiftLLreg x y z)) yes no) -> (NE (TEQshiftLLreg x y z) yes no) 1397 (NE (CMPconst [0] (XORshiftRLreg x y z)) yes no) -> (NE (TEQshiftRLreg x y z) yes no) 1398 (NE (CMPconst [0] (XORshiftRAreg x y z)) yes no) -> (NE (TEQshiftRAreg x y z) yes no)