github.com/corona10/go@v0.0.0-20180224231303-7a218942be57/src/cmd/compile/internal/ssa/rewritePPC64.go (about)

     1  // Code generated from gen/PPC64.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "math"
     7  import "cmd/internal/obj"
     8  import "cmd/internal/objabi"
     9  import "cmd/compile/internal/types"
    10  
    11  var _ = math.MinInt8  // in case not otherwise used
    12  var _ = obj.ANOP      // in case not otherwise used
    13  var _ = objabi.GOROOT // in case not otherwise used
    14  var _ = types.TypeMem // in case not otherwise used
    15  
    16  func rewriteValuePPC64(v *Value) bool {
    17  	switch v.Op {
    18  	case OpAbs:
    19  		return rewriteValuePPC64_OpAbs_0(v)
    20  	case OpAdd16:
    21  		return rewriteValuePPC64_OpAdd16_0(v)
    22  	case OpAdd32:
    23  		return rewriteValuePPC64_OpAdd32_0(v)
    24  	case OpAdd32F:
    25  		return rewriteValuePPC64_OpAdd32F_0(v)
    26  	case OpAdd64:
    27  		return rewriteValuePPC64_OpAdd64_0(v)
    28  	case OpAdd64F:
    29  		return rewriteValuePPC64_OpAdd64F_0(v)
    30  	case OpAdd8:
    31  		return rewriteValuePPC64_OpAdd8_0(v)
    32  	case OpAddPtr:
    33  		return rewriteValuePPC64_OpAddPtr_0(v)
    34  	case OpAddr:
    35  		return rewriteValuePPC64_OpAddr_0(v)
    36  	case OpAnd16:
    37  		return rewriteValuePPC64_OpAnd16_0(v)
    38  	case OpAnd32:
    39  		return rewriteValuePPC64_OpAnd32_0(v)
    40  	case OpAnd64:
    41  		return rewriteValuePPC64_OpAnd64_0(v)
    42  	case OpAnd8:
    43  		return rewriteValuePPC64_OpAnd8_0(v)
    44  	case OpAndB:
    45  		return rewriteValuePPC64_OpAndB_0(v)
    46  	case OpAtomicAdd32:
    47  		return rewriteValuePPC64_OpAtomicAdd32_0(v)
    48  	case OpAtomicAdd64:
    49  		return rewriteValuePPC64_OpAtomicAdd64_0(v)
    50  	case OpAtomicAnd8:
    51  		return rewriteValuePPC64_OpAtomicAnd8_0(v)
    52  	case OpAtomicCompareAndSwap32:
    53  		return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
    54  	case OpAtomicCompareAndSwap64:
    55  		return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
    56  	case OpAtomicExchange32:
    57  		return rewriteValuePPC64_OpAtomicExchange32_0(v)
    58  	case OpAtomicExchange64:
    59  		return rewriteValuePPC64_OpAtomicExchange64_0(v)
    60  	case OpAtomicLoad32:
    61  		return rewriteValuePPC64_OpAtomicLoad32_0(v)
    62  	case OpAtomicLoad64:
    63  		return rewriteValuePPC64_OpAtomicLoad64_0(v)
    64  	case OpAtomicLoadPtr:
    65  		return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
    66  	case OpAtomicOr8:
    67  		return rewriteValuePPC64_OpAtomicOr8_0(v)
    68  	case OpAtomicStore32:
    69  		return rewriteValuePPC64_OpAtomicStore32_0(v)
    70  	case OpAtomicStore64:
    71  		return rewriteValuePPC64_OpAtomicStore64_0(v)
    72  	case OpAvg64u:
    73  		return rewriteValuePPC64_OpAvg64u_0(v)
    74  	case OpBitLen32:
    75  		return rewriteValuePPC64_OpBitLen32_0(v)
    76  	case OpBitLen64:
    77  		return rewriteValuePPC64_OpBitLen64_0(v)
    78  	case OpCeil:
    79  		return rewriteValuePPC64_OpCeil_0(v)
    80  	case OpClosureCall:
    81  		return rewriteValuePPC64_OpClosureCall_0(v)
    82  	case OpCom16:
    83  		return rewriteValuePPC64_OpCom16_0(v)
    84  	case OpCom32:
    85  		return rewriteValuePPC64_OpCom32_0(v)
    86  	case OpCom64:
    87  		return rewriteValuePPC64_OpCom64_0(v)
    88  	case OpCom8:
    89  		return rewriteValuePPC64_OpCom8_0(v)
    90  	case OpConst16:
    91  		return rewriteValuePPC64_OpConst16_0(v)
    92  	case OpConst32:
    93  		return rewriteValuePPC64_OpConst32_0(v)
    94  	case OpConst32F:
    95  		return rewriteValuePPC64_OpConst32F_0(v)
    96  	case OpConst64:
    97  		return rewriteValuePPC64_OpConst64_0(v)
    98  	case OpConst64F:
    99  		return rewriteValuePPC64_OpConst64F_0(v)
   100  	case OpConst8:
   101  		return rewriteValuePPC64_OpConst8_0(v)
   102  	case OpConstBool:
   103  		return rewriteValuePPC64_OpConstBool_0(v)
   104  	case OpConstNil:
   105  		return rewriteValuePPC64_OpConstNil_0(v)
   106  	case OpConvert:
   107  		return rewriteValuePPC64_OpConvert_0(v)
   108  	case OpCopysign:
   109  		return rewriteValuePPC64_OpCopysign_0(v)
   110  	case OpCtz32:
   111  		return rewriteValuePPC64_OpCtz32_0(v)
   112  	case OpCtz64:
   113  		return rewriteValuePPC64_OpCtz64_0(v)
   114  	case OpCvt32Fto32:
   115  		return rewriteValuePPC64_OpCvt32Fto32_0(v)
   116  	case OpCvt32Fto64:
   117  		return rewriteValuePPC64_OpCvt32Fto64_0(v)
   118  	case OpCvt32Fto64F:
   119  		return rewriteValuePPC64_OpCvt32Fto64F_0(v)
   120  	case OpCvt32to32F:
   121  		return rewriteValuePPC64_OpCvt32to32F_0(v)
   122  	case OpCvt32to64F:
   123  		return rewriteValuePPC64_OpCvt32to64F_0(v)
   124  	case OpCvt64Fto32:
   125  		return rewriteValuePPC64_OpCvt64Fto32_0(v)
   126  	case OpCvt64Fto32F:
   127  		return rewriteValuePPC64_OpCvt64Fto32F_0(v)
   128  	case OpCvt64Fto64:
   129  		return rewriteValuePPC64_OpCvt64Fto64_0(v)
   130  	case OpCvt64to32F:
   131  		return rewriteValuePPC64_OpCvt64to32F_0(v)
   132  	case OpCvt64to64F:
   133  		return rewriteValuePPC64_OpCvt64to64F_0(v)
   134  	case OpDiv16:
   135  		return rewriteValuePPC64_OpDiv16_0(v)
   136  	case OpDiv16u:
   137  		return rewriteValuePPC64_OpDiv16u_0(v)
   138  	case OpDiv32:
   139  		return rewriteValuePPC64_OpDiv32_0(v)
   140  	case OpDiv32F:
   141  		return rewriteValuePPC64_OpDiv32F_0(v)
   142  	case OpDiv32u:
   143  		return rewriteValuePPC64_OpDiv32u_0(v)
   144  	case OpDiv64:
   145  		return rewriteValuePPC64_OpDiv64_0(v)
   146  	case OpDiv64F:
   147  		return rewriteValuePPC64_OpDiv64F_0(v)
   148  	case OpDiv64u:
   149  		return rewriteValuePPC64_OpDiv64u_0(v)
   150  	case OpDiv8:
   151  		return rewriteValuePPC64_OpDiv8_0(v)
   152  	case OpDiv8u:
   153  		return rewriteValuePPC64_OpDiv8u_0(v)
   154  	case OpEq16:
   155  		return rewriteValuePPC64_OpEq16_0(v)
   156  	case OpEq32:
   157  		return rewriteValuePPC64_OpEq32_0(v)
   158  	case OpEq32F:
   159  		return rewriteValuePPC64_OpEq32F_0(v)
   160  	case OpEq64:
   161  		return rewriteValuePPC64_OpEq64_0(v)
   162  	case OpEq64F:
   163  		return rewriteValuePPC64_OpEq64F_0(v)
   164  	case OpEq8:
   165  		return rewriteValuePPC64_OpEq8_0(v)
   166  	case OpEqB:
   167  		return rewriteValuePPC64_OpEqB_0(v)
   168  	case OpEqPtr:
   169  		return rewriteValuePPC64_OpEqPtr_0(v)
   170  	case OpFloor:
   171  		return rewriteValuePPC64_OpFloor_0(v)
   172  	case OpGeq16:
   173  		return rewriteValuePPC64_OpGeq16_0(v)
   174  	case OpGeq16U:
   175  		return rewriteValuePPC64_OpGeq16U_0(v)
   176  	case OpGeq32:
   177  		return rewriteValuePPC64_OpGeq32_0(v)
   178  	case OpGeq32F:
   179  		return rewriteValuePPC64_OpGeq32F_0(v)
   180  	case OpGeq32U:
   181  		return rewriteValuePPC64_OpGeq32U_0(v)
   182  	case OpGeq64:
   183  		return rewriteValuePPC64_OpGeq64_0(v)
   184  	case OpGeq64F:
   185  		return rewriteValuePPC64_OpGeq64F_0(v)
   186  	case OpGeq64U:
   187  		return rewriteValuePPC64_OpGeq64U_0(v)
   188  	case OpGeq8:
   189  		return rewriteValuePPC64_OpGeq8_0(v)
   190  	case OpGeq8U:
   191  		return rewriteValuePPC64_OpGeq8U_0(v)
   192  	case OpGetCallerSP:
   193  		return rewriteValuePPC64_OpGetCallerSP_0(v)
   194  	case OpGetClosurePtr:
   195  		return rewriteValuePPC64_OpGetClosurePtr_0(v)
   196  	case OpGreater16:
   197  		return rewriteValuePPC64_OpGreater16_0(v)
   198  	case OpGreater16U:
   199  		return rewriteValuePPC64_OpGreater16U_0(v)
   200  	case OpGreater32:
   201  		return rewriteValuePPC64_OpGreater32_0(v)
   202  	case OpGreater32F:
   203  		return rewriteValuePPC64_OpGreater32F_0(v)
   204  	case OpGreater32U:
   205  		return rewriteValuePPC64_OpGreater32U_0(v)
   206  	case OpGreater64:
   207  		return rewriteValuePPC64_OpGreater64_0(v)
   208  	case OpGreater64F:
   209  		return rewriteValuePPC64_OpGreater64F_0(v)
   210  	case OpGreater64U:
   211  		return rewriteValuePPC64_OpGreater64U_0(v)
   212  	case OpGreater8:
   213  		return rewriteValuePPC64_OpGreater8_0(v)
   214  	case OpGreater8U:
   215  		return rewriteValuePPC64_OpGreater8U_0(v)
   216  	case OpHmul32:
   217  		return rewriteValuePPC64_OpHmul32_0(v)
   218  	case OpHmul32u:
   219  		return rewriteValuePPC64_OpHmul32u_0(v)
   220  	case OpHmul64:
   221  		return rewriteValuePPC64_OpHmul64_0(v)
   222  	case OpHmul64u:
   223  		return rewriteValuePPC64_OpHmul64u_0(v)
   224  	case OpInterCall:
   225  		return rewriteValuePPC64_OpInterCall_0(v)
   226  	case OpIsInBounds:
   227  		return rewriteValuePPC64_OpIsInBounds_0(v)
   228  	case OpIsNonNil:
   229  		return rewriteValuePPC64_OpIsNonNil_0(v)
   230  	case OpIsSliceInBounds:
   231  		return rewriteValuePPC64_OpIsSliceInBounds_0(v)
   232  	case OpLeq16:
   233  		return rewriteValuePPC64_OpLeq16_0(v)
   234  	case OpLeq16U:
   235  		return rewriteValuePPC64_OpLeq16U_0(v)
   236  	case OpLeq32:
   237  		return rewriteValuePPC64_OpLeq32_0(v)
   238  	case OpLeq32F:
   239  		return rewriteValuePPC64_OpLeq32F_0(v)
   240  	case OpLeq32U:
   241  		return rewriteValuePPC64_OpLeq32U_0(v)
   242  	case OpLeq64:
   243  		return rewriteValuePPC64_OpLeq64_0(v)
   244  	case OpLeq64F:
   245  		return rewriteValuePPC64_OpLeq64F_0(v)
   246  	case OpLeq64U:
   247  		return rewriteValuePPC64_OpLeq64U_0(v)
   248  	case OpLeq8:
   249  		return rewriteValuePPC64_OpLeq8_0(v)
   250  	case OpLeq8U:
   251  		return rewriteValuePPC64_OpLeq8U_0(v)
   252  	case OpLess16:
   253  		return rewriteValuePPC64_OpLess16_0(v)
   254  	case OpLess16U:
   255  		return rewriteValuePPC64_OpLess16U_0(v)
   256  	case OpLess32:
   257  		return rewriteValuePPC64_OpLess32_0(v)
   258  	case OpLess32F:
   259  		return rewriteValuePPC64_OpLess32F_0(v)
   260  	case OpLess32U:
   261  		return rewriteValuePPC64_OpLess32U_0(v)
   262  	case OpLess64:
   263  		return rewriteValuePPC64_OpLess64_0(v)
   264  	case OpLess64F:
   265  		return rewriteValuePPC64_OpLess64F_0(v)
   266  	case OpLess64U:
   267  		return rewriteValuePPC64_OpLess64U_0(v)
   268  	case OpLess8:
   269  		return rewriteValuePPC64_OpLess8_0(v)
   270  	case OpLess8U:
   271  		return rewriteValuePPC64_OpLess8U_0(v)
   272  	case OpLoad:
   273  		return rewriteValuePPC64_OpLoad_0(v)
   274  	case OpLsh16x16:
   275  		return rewriteValuePPC64_OpLsh16x16_0(v)
   276  	case OpLsh16x32:
   277  		return rewriteValuePPC64_OpLsh16x32_0(v)
   278  	case OpLsh16x64:
   279  		return rewriteValuePPC64_OpLsh16x64_0(v)
   280  	case OpLsh16x8:
   281  		return rewriteValuePPC64_OpLsh16x8_0(v)
   282  	case OpLsh32x16:
   283  		return rewriteValuePPC64_OpLsh32x16_0(v)
   284  	case OpLsh32x32:
   285  		return rewriteValuePPC64_OpLsh32x32_0(v)
   286  	case OpLsh32x64:
   287  		return rewriteValuePPC64_OpLsh32x64_0(v)
   288  	case OpLsh32x8:
   289  		return rewriteValuePPC64_OpLsh32x8_0(v)
   290  	case OpLsh64x16:
   291  		return rewriteValuePPC64_OpLsh64x16_0(v)
   292  	case OpLsh64x32:
   293  		return rewriteValuePPC64_OpLsh64x32_0(v)
   294  	case OpLsh64x64:
   295  		return rewriteValuePPC64_OpLsh64x64_0(v)
   296  	case OpLsh64x8:
   297  		return rewriteValuePPC64_OpLsh64x8_0(v)
   298  	case OpLsh8x16:
   299  		return rewriteValuePPC64_OpLsh8x16_0(v)
   300  	case OpLsh8x32:
   301  		return rewriteValuePPC64_OpLsh8x32_0(v)
   302  	case OpLsh8x64:
   303  		return rewriteValuePPC64_OpLsh8x64_0(v)
   304  	case OpLsh8x8:
   305  		return rewriteValuePPC64_OpLsh8x8_0(v)
   306  	case OpMod16:
   307  		return rewriteValuePPC64_OpMod16_0(v)
   308  	case OpMod16u:
   309  		return rewriteValuePPC64_OpMod16u_0(v)
   310  	case OpMod32:
   311  		return rewriteValuePPC64_OpMod32_0(v)
   312  	case OpMod32u:
   313  		return rewriteValuePPC64_OpMod32u_0(v)
   314  	case OpMod64:
   315  		return rewriteValuePPC64_OpMod64_0(v)
   316  	case OpMod64u:
   317  		return rewriteValuePPC64_OpMod64u_0(v)
   318  	case OpMod8:
   319  		return rewriteValuePPC64_OpMod8_0(v)
   320  	case OpMod8u:
   321  		return rewriteValuePPC64_OpMod8u_0(v)
   322  	case OpMove:
   323  		return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
   324  	case OpMul16:
   325  		return rewriteValuePPC64_OpMul16_0(v)
   326  	case OpMul32:
   327  		return rewriteValuePPC64_OpMul32_0(v)
   328  	case OpMul32F:
   329  		return rewriteValuePPC64_OpMul32F_0(v)
   330  	case OpMul64:
   331  		return rewriteValuePPC64_OpMul64_0(v)
   332  	case OpMul64F:
   333  		return rewriteValuePPC64_OpMul64F_0(v)
   334  	case OpMul8:
   335  		return rewriteValuePPC64_OpMul8_0(v)
   336  	case OpNeg16:
   337  		return rewriteValuePPC64_OpNeg16_0(v)
   338  	case OpNeg32:
   339  		return rewriteValuePPC64_OpNeg32_0(v)
   340  	case OpNeg32F:
   341  		return rewriteValuePPC64_OpNeg32F_0(v)
   342  	case OpNeg64:
   343  		return rewriteValuePPC64_OpNeg64_0(v)
   344  	case OpNeg64F:
   345  		return rewriteValuePPC64_OpNeg64F_0(v)
   346  	case OpNeg8:
   347  		return rewriteValuePPC64_OpNeg8_0(v)
   348  	case OpNeq16:
   349  		return rewriteValuePPC64_OpNeq16_0(v)
   350  	case OpNeq32:
   351  		return rewriteValuePPC64_OpNeq32_0(v)
   352  	case OpNeq32F:
   353  		return rewriteValuePPC64_OpNeq32F_0(v)
   354  	case OpNeq64:
   355  		return rewriteValuePPC64_OpNeq64_0(v)
   356  	case OpNeq64F:
   357  		return rewriteValuePPC64_OpNeq64F_0(v)
   358  	case OpNeq8:
   359  		return rewriteValuePPC64_OpNeq8_0(v)
   360  	case OpNeqB:
   361  		return rewriteValuePPC64_OpNeqB_0(v)
   362  	case OpNeqPtr:
   363  		return rewriteValuePPC64_OpNeqPtr_0(v)
   364  	case OpNilCheck:
   365  		return rewriteValuePPC64_OpNilCheck_0(v)
   366  	case OpNot:
   367  		return rewriteValuePPC64_OpNot_0(v)
   368  	case OpOffPtr:
   369  		return rewriteValuePPC64_OpOffPtr_0(v)
   370  	case OpOr16:
   371  		return rewriteValuePPC64_OpOr16_0(v)
   372  	case OpOr32:
   373  		return rewriteValuePPC64_OpOr32_0(v)
   374  	case OpOr64:
   375  		return rewriteValuePPC64_OpOr64_0(v)
   376  	case OpOr8:
   377  		return rewriteValuePPC64_OpOr8_0(v)
   378  	case OpOrB:
   379  		return rewriteValuePPC64_OpOrB_0(v)
   380  	case OpPPC64ADD:
   381  		return rewriteValuePPC64_OpPPC64ADD_0(v)
   382  	case OpPPC64ADDconst:
   383  		return rewriteValuePPC64_OpPPC64ADDconst_0(v)
   384  	case OpPPC64AND:
   385  		return rewriteValuePPC64_OpPPC64AND_0(v)
   386  	case OpPPC64ANDconst:
   387  		return rewriteValuePPC64_OpPPC64ANDconst_0(v)
   388  	case OpPPC64CMP:
   389  		return rewriteValuePPC64_OpPPC64CMP_0(v)
   390  	case OpPPC64CMPU:
   391  		return rewriteValuePPC64_OpPPC64CMPU_0(v)
   392  	case OpPPC64CMPUconst:
   393  		return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
   394  	case OpPPC64CMPW:
   395  		return rewriteValuePPC64_OpPPC64CMPW_0(v)
   396  	case OpPPC64CMPWU:
   397  		return rewriteValuePPC64_OpPPC64CMPWU_0(v)
   398  	case OpPPC64CMPWUconst:
   399  		return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
   400  	case OpPPC64CMPWconst:
   401  		return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
   402  	case OpPPC64CMPconst:
   403  		return rewriteValuePPC64_OpPPC64CMPconst_0(v)
   404  	case OpPPC64Equal:
   405  		return rewriteValuePPC64_OpPPC64Equal_0(v)
   406  	case OpPPC64FABS:
   407  		return rewriteValuePPC64_OpPPC64FABS_0(v)
   408  	case OpPPC64FADD:
   409  		return rewriteValuePPC64_OpPPC64FADD_0(v)
   410  	case OpPPC64FADDS:
   411  		return rewriteValuePPC64_OpPPC64FADDS_0(v)
   412  	case OpPPC64FCEIL:
   413  		return rewriteValuePPC64_OpPPC64FCEIL_0(v)
   414  	case OpPPC64FFLOOR:
   415  		return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
   416  	case OpPPC64FMOVDload:
   417  		return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
   418  	case OpPPC64FMOVDstore:
   419  		return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
   420  	case OpPPC64FMOVSload:
   421  		return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
   422  	case OpPPC64FMOVSstore:
   423  		return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
   424  	case OpPPC64FNEG:
   425  		return rewriteValuePPC64_OpPPC64FNEG_0(v)
   426  	case OpPPC64FSQRT:
   427  		return rewriteValuePPC64_OpPPC64FSQRT_0(v)
   428  	case OpPPC64FSUB:
   429  		return rewriteValuePPC64_OpPPC64FSUB_0(v)
   430  	case OpPPC64FSUBS:
   431  		return rewriteValuePPC64_OpPPC64FSUBS_0(v)
   432  	case OpPPC64FTRUNC:
   433  		return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
   434  	case OpPPC64GreaterEqual:
   435  		return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
   436  	case OpPPC64GreaterThan:
   437  		return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
   438  	case OpPPC64LessEqual:
   439  		return rewriteValuePPC64_OpPPC64LessEqual_0(v)
   440  	case OpPPC64LessThan:
   441  		return rewriteValuePPC64_OpPPC64LessThan_0(v)
   442  	case OpPPC64MFVSRD:
   443  		return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
   444  	case OpPPC64MOVBZload:
   445  		return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
   446  	case OpPPC64MOVBZreg:
   447  		return rewriteValuePPC64_OpPPC64MOVBZreg_0(v)
   448  	case OpPPC64MOVBreg:
   449  		return rewriteValuePPC64_OpPPC64MOVBreg_0(v)
   450  	case OpPPC64MOVBstore:
   451  		return rewriteValuePPC64_OpPPC64MOVBstore_0(v)
   452  	case OpPPC64MOVBstorezero:
   453  		return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
   454  	case OpPPC64MOVDload:
   455  		return rewriteValuePPC64_OpPPC64MOVDload_0(v)
   456  	case OpPPC64MOVDstore:
   457  		return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
   458  	case OpPPC64MOVDstorezero:
   459  		return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
   460  	case OpPPC64MOVHZload:
   461  		return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
   462  	case OpPPC64MOVHZreg:
   463  		return rewriteValuePPC64_OpPPC64MOVHZreg_0(v)
   464  	case OpPPC64MOVHload:
   465  		return rewriteValuePPC64_OpPPC64MOVHload_0(v)
   466  	case OpPPC64MOVHreg:
   467  		return rewriteValuePPC64_OpPPC64MOVHreg_0(v)
   468  	case OpPPC64MOVHstore:
   469  		return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
   470  	case OpPPC64MOVHstorezero:
   471  		return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
   472  	case OpPPC64MOVWZload:
   473  		return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
   474  	case OpPPC64MOVWZreg:
   475  		return rewriteValuePPC64_OpPPC64MOVWZreg_0(v)
   476  	case OpPPC64MOVWload:
   477  		return rewriteValuePPC64_OpPPC64MOVWload_0(v)
   478  	case OpPPC64MOVWreg:
   479  		return rewriteValuePPC64_OpPPC64MOVWreg_0(v)
   480  	case OpPPC64MOVWstore:
   481  		return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
   482  	case OpPPC64MOVWstorezero:
   483  		return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
   484  	case OpPPC64MTVSRD:
   485  		return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
   486  	case OpPPC64MaskIfNotCarry:
   487  		return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
   488  	case OpPPC64NotEqual:
   489  		return rewriteValuePPC64_OpPPC64NotEqual_0(v)
   490  	case OpPPC64OR:
   491  		return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v) || rewriteValuePPC64_OpPPC64OR_120(v) || rewriteValuePPC64_OpPPC64OR_130(v) || rewriteValuePPC64_OpPPC64OR_140(v)
   492  	case OpPPC64ORN:
   493  		return rewriteValuePPC64_OpPPC64ORN_0(v)
   494  	case OpPPC64ORconst:
   495  		return rewriteValuePPC64_OpPPC64ORconst_0(v)
   496  	case OpPPC64SUB:
   497  		return rewriteValuePPC64_OpPPC64SUB_0(v)
   498  	case OpPPC64XOR:
   499  		return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
   500  	case OpPPC64XORconst:
   501  		return rewriteValuePPC64_OpPPC64XORconst_0(v)
   502  	case OpPopCount16:
   503  		return rewriteValuePPC64_OpPopCount16_0(v)
   504  	case OpPopCount32:
   505  		return rewriteValuePPC64_OpPopCount32_0(v)
   506  	case OpPopCount64:
   507  		return rewriteValuePPC64_OpPopCount64_0(v)
   508  	case OpPopCount8:
   509  		return rewriteValuePPC64_OpPopCount8_0(v)
   510  	case OpRound32F:
   511  		return rewriteValuePPC64_OpRound32F_0(v)
   512  	case OpRound64F:
   513  		return rewriteValuePPC64_OpRound64F_0(v)
   514  	case OpRsh16Ux16:
   515  		return rewriteValuePPC64_OpRsh16Ux16_0(v)
   516  	case OpRsh16Ux32:
   517  		return rewriteValuePPC64_OpRsh16Ux32_0(v)
   518  	case OpRsh16Ux64:
   519  		return rewriteValuePPC64_OpRsh16Ux64_0(v)
   520  	case OpRsh16Ux8:
   521  		return rewriteValuePPC64_OpRsh16Ux8_0(v)
   522  	case OpRsh16x16:
   523  		return rewriteValuePPC64_OpRsh16x16_0(v)
   524  	case OpRsh16x32:
   525  		return rewriteValuePPC64_OpRsh16x32_0(v)
   526  	case OpRsh16x64:
   527  		return rewriteValuePPC64_OpRsh16x64_0(v)
   528  	case OpRsh16x8:
   529  		return rewriteValuePPC64_OpRsh16x8_0(v)
   530  	case OpRsh32Ux16:
   531  		return rewriteValuePPC64_OpRsh32Ux16_0(v)
   532  	case OpRsh32Ux32:
   533  		return rewriteValuePPC64_OpRsh32Ux32_0(v)
   534  	case OpRsh32Ux64:
   535  		return rewriteValuePPC64_OpRsh32Ux64_0(v)
   536  	case OpRsh32Ux8:
   537  		return rewriteValuePPC64_OpRsh32Ux8_0(v)
   538  	case OpRsh32x16:
   539  		return rewriteValuePPC64_OpRsh32x16_0(v)
   540  	case OpRsh32x32:
   541  		return rewriteValuePPC64_OpRsh32x32_0(v)
   542  	case OpRsh32x64:
   543  		return rewriteValuePPC64_OpRsh32x64_0(v)
   544  	case OpRsh32x8:
   545  		return rewriteValuePPC64_OpRsh32x8_0(v)
   546  	case OpRsh64Ux16:
   547  		return rewriteValuePPC64_OpRsh64Ux16_0(v)
   548  	case OpRsh64Ux32:
   549  		return rewriteValuePPC64_OpRsh64Ux32_0(v)
   550  	case OpRsh64Ux64:
   551  		return rewriteValuePPC64_OpRsh64Ux64_0(v)
   552  	case OpRsh64Ux8:
   553  		return rewriteValuePPC64_OpRsh64Ux8_0(v)
   554  	case OpRsh64x16:
   555  		return rewriteValuePPC64_OpRsh64x16_0(v)
   556  	case OpRsh64x32:
   557  		return rewriteValuePPC64_OpRsh64x32_0(v)
   558  	case OpRsh64x64:
   559  		return rewriteValuePPC64_OpRsh64x64_0(v)
   560  	case OpRsh64x8:
   561  		return rewriteValuePPC64_OpRsh64x8_0(v)
   562  	case OpRsh8Ux16:
   563  		return rewriteValuePPC64_OpRsh8Ux16_0(v)
   564  	case OpRsh8Ux32:
   565  		return rewriteValuePPC64_OpRsh8Ux32_0(v)
   566  	case OpRsh8Ux64:
   567  		return rewriteValuePPC64_OpRsh8Ux64_0(v)
   568  	case OpRsh8Ux8:
   569  		return rewriteValuePPC64_OpRsh8Ux8_0(v)
   570  	case OpRsh8x16:
   571  		return rewriteValuePPC64_OpRsh8x16_0(v)
   572  	case OpRsh8x32:
   573  		return rewriteValuePPC64_OpRsh8x32_0(v)
   574  	case OpRsh8x64:
   575  		return rewriteValuePPC64_OpRsh8x64_0(v)
   576  	case OpRsh8x8:
   577  		return rewriteValuePPC64_OpRsh8x8_0(v)
   578  	case OpSignExt16to32:
   579  		return rewriteValuePPC64_OpSignExt16to32_0(v)
   580  	case OpSignExt16to64:
   581  		return rewriteValuePPC64_OpSignExt16to64_0(v)
   582  	case OpSignExt32to64:
   583  		return rewriteValuePPC64_OpSignExt32to64_0(v)
   584  	case OpSignExt8to16:
   585  		return rewriteValuePPC64_OpSignExt8to16_0(v)
   586  	case OpSignExt8to32:
   587  		return rewriteValuePPC64_OpSignExt8to32_0(v)
   588  	case OpSignExt8to64:
   589  		return rewriteValuePPC64_OpSignExt8to64_0(v)
   590  	case OpSlicemask:
   591  		return rewriteValuePPC64_OpSlicemask_0(v)
   592  	case OpSqrt:
   593  		return rewriteValuePPC64_OpSqrt_0(v)
   594  	case OpStaticCall:
   595  		return rewriteValuePPC64_OpStaticCall_0(v)
   596  	case OpStore:
   597  		return rewriteValuePPC64_OpStore_0(v)
   598  	case OpSub16:
   599  		return rewriteValuePPC64_OpSub16_0(v)
   600  	case OpSub32:
   601  		return rewriteValuePPC64_OpSub32_0(v)
   602  	case OpSub32F:
   603  		return rewriteValuePPC64_OpSub32F_0(v)
   604  	case OpSub64:
   605  		return rewriteValuePPC64_OpSub64_0(v)
   606  	case OpSub64F:
   607  		return rewriteValuePPC64_OpSub64F_0(v)
   608  	case OpSub8:
   609  		return rewriteValuePPC64_OpSub8_0(v)
   610  	case OpSubPtr:
   611  		return rewriteValuePPC64_OpSubPtr_0(v)
   612  	case OpTrunc:
   613  		return rewriteValuePPC64_OpTrunc_0(v)
   614  	case OpTrunc16to8:
   615  		return rewriteValuePPC64_OpTrunc16to8_0(v)
   616  	case OpTrunc32to16:
   617  		return rewriteValuePPC64_OpTrunc32to16_0(v)
   618  	case OpTrunc32to8:
   619  		return rewriteValuePPC64_OpTrunc32to8_0(v)
   620  	case OpTrunc64to16:
   621  		return rewriteValuePPC64_OpTrunc64to16_0(v)
   622  	case OpTrunc64to32:
   623  		return rewriteValuePPC64_OpTrunc64to32_0(v)
   624  	case OpTrunc64to8:
   625  		return rewriteValuePPC64_OpTrunc64to8_0(v)
   626  	case OpWB:
   627  		return rewriteValuePPC64_OpWB_0(v)
   628  	case OpXor16:
   629  		return rewriteValuePPC64_OpXor16_0(v)
   630  	case OpXor32:
   631  		return rewriteValuePPC64_OpXor32_0(v)
   632  	case OpXor64:
   633  		return rewriteValuePPC64_OpXor64_0(v)
   634  	case OpXor8:
   635  		return rewriteValuePPC64_OpXor8_0(v)
   636  	case OpZero:
   637  		return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
   638  	case OpZeroExt16to32:
   639  		return rewriteValuePPC64_OpZeroExt16to32_0(v)
   640  	case OpZeroExt16to64:
   641  		return rewriteValuePPC64_OpZeroExt16to64_0(v)
   642  	case OpZeroExt32to64:
   643  		return rewriteValuePPC64_OpZeroExt32to64_0(v)
   644  	case OpZeroExt8to16:
   645  		return rewriteValuePPC64_OpZeroExt8to16_0(v)
   646  	case OpZeroExt8to32:
   647  		return rewriteValuePPC64_OpZeroExt8to32_0(v)
   648  	case OpZeroExt8to64:
   649  		return rewriteValuePPC64_OpZeroExt8to64_0(v)
   650  	}
   651  	return false
   652  }
   653  func rewriteValuePPC64_OpAbs_0(v *Value) bool {
   654  	// match: (Abs x)
   655  	// cond:
   656  	// result: (FABS x)
   657  	for {
   658  		x := v.Args[0]
   659  		v.reset(OpPPC64FABS)
   660  		v.AddArg(x)
   661  		return true
   662  	}
   663  }
   664  func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
   665  	// match: (Add16 x y)
   666  	// cond:
   667  	// result: (ADD x y)
   668  	for {
   669  		_ = v.Args[1]
   670  		x := v.Args[0]
   671  		y := v.Args[1]
   672  		v.reset(OpPPC64ADD)
   673  		v.AddArg(x)
   674  		v.AddArg(y)
   675  		return true
   676  	}
   677  }
   678  func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
   679  	// match: (Add32 x y)
   680  	// cond:
   681  	// result: (ADD x y)
   682  	for {
   683  		_ = v.Args[1]
   684  		x := v.Args[0]
   685  		y := v.Args[1]
   686  		v.reset(OpPPC64ADD)
   687  		v.AddArg(x)
   688  		v.AddArg(y)
   689  		return true
   690  	}
   691  }
   692  func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
   693  	// match: (Add32F x y)
   694  	// cond:
   695  	// result: (FADDS x y)
   696  	for {
   697  		_ = v.Args[1]
   698  		x := v.Args[0]
   699  		y := v.Args[1]
   700  		v.reset(OpPPC64FADDS)
   701  		v.AddArg(x)
   702  		v.AddArg(y)
   703  		return true
   704  	}
   705  }
   706  func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
   707  	// match: (Add64 x y)
   708  	// cond:
   709  	// result: (ADD x y)
   710  	for {
   711  		_ = v.Args[1]
   712  		x := v.Args[0]
   713  		y := v.Args[1]
   714  		v.reset(OpPPC64ADD)
   715  		v.AddArg(x)
   716  		v.AddArg(y)
   717  		return true
   718  	}
   719  }
   720  func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
   721  	// match: (Add64F x y)
   722  	// cond:
   723  	// result: (FADD x y)
   724  	for {
   725  		_ = v.Args[1]
   726  		x := v.Args[0]
   727  		y := v.Args[1]
   728  		v.reset(OpPPC64FADD)
   729  		v.AddArg(x)
   730  		v.AddArg(y)
   731  		return true
   732  	}
   733  }
   734  func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
   735  	// match: (Add8 x y)
   736  	// cond:
   737  	// result: (ADD x y)
   738  	for {
   739  		_ = v.Args[1]
   740  		x := v.Args[0]
   741  		y := v.Args[1]
   742  		v.reset(OpPPC64ADD)
   743  		v.AddArg(x)
   744  		v.AddArg(y)
   745  		return true
   746  	}
   747  }
   748  func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
   749  	// match: (AddPtr x y)
   750  	// cond:
   751  	// result: (ADD x y)
   752  	for {
   753  		_ = v.Args[1]
   754  		x := v.Args[0]
   755  		y := v.Args[1]
   756  		v.reset(OpPPC64ADD)
   757  		v.AddArg(x)
   758  		v.AddArg(y)
   759  		return true
   760  	}
   761  }
   762  func rewriteValuePPC64_OpAddr_0(v *Value) bool {
   763  	// match: (Addr {sym} base)
   764  	// cond:
   765  	// result: (MOVDaddr {sym} base)
   766  	for {
   767  		sym := v.Aux
   768  		base := v.Args[0]
   769  		v.reset(OpPPC64MOVDaddr)
   770  		v.Aux = sym
   771  		v.AddArg(base)
   772  		return true
   773  	}
   774  }
   775  func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
   776  	// match: (And16 x y)
   777  	// cond:
   778  	// result: (AND x y)
   779  	for {
   780  		_ = v.Args[1]
   781  		x := v.Args[0]
   782  		y := v.Args[1]
   783  		v.reset(OpPPC64AND)
   784  		v.AddArg(x)
   785  		v.AddArg(y)
   786  		return true
   787  	}
   788  }
   789  func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
   790  	// match: (And32 x y)
   791  	// cond:
   792  	// result: (AND x y)
   793  	for {
   794  		_ = v.Args[1]
   795  		x := v.Args[0]
   796  		y := v.Args[1]
   797  		v.reset(OpPPC64AND)
   798  		v.AddArg(x)
   799  		v.AddArg(y)
   800  		return true
   801  	}
   802  }
   803  func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
   804  	// match: (And64 x y)
   805  	// cond:
   806  	// result: (AND x y)
   807  	for {
   808  		_ = v.Args[1]
   809  		x := v.Args[0]
   810  		y := v.Args[1]
   811  		v.reset(OpPPC64AND)
   812  		v.AddArg(x)
   813  		v.AddArg(y)
   814  		return true
   815  	}
   816  }
   817  func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
   818  	// match: (And8 x y)
   819  	// cond:
   820  	// result: (AND x y)
   821  	for {
   822  		_ = v.Args[1]
   823  		x := v.Args[0]
   824  		y := v.Args[1]
   825  		v.reset(OpPPC64AND)
   826  		v.AddArg(x)
   827  		v.AddArg(y)
   828  		return true
   829  	}
   830  }
   831  func rewriteValuePPC64_OpAndB_0(v *Value) bool {
   832  	// match: (AndB x y)
   833  	// cond:
   834  	// result: (AND x y)
   835  	for {
   836  		_ = v.Args[1]
   837  		x := v.Args[0]
   838  		y := v.Args[1]
   839  		v.reset(OpPPC64AND)
   840  		v.AddArg(x)
   841  		v.AddArg(y)
   842  		return true
   843  	}
   844  }
   845  func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
   846  	// match: (AtomicAdd32 ptr val mem)
   847  	// cond:
   848  	// result: (LoweredAtomicAdd32 ptr val mem)
   849  	for {
   850  		_ = v.Args[2]
   851  		ptr := v.Args[0]
   852  		val := v.Args[1]
   853  		mem := v.Args[2]
   854  		v.reset(OpPPC64LoweredAtomicAdd32)
   855  		v.AddArg(ptr)
   856  		v.AddArg(val)
   857  		v.AddArg(mem)
   858  		return true
   859  	}
   860  }
   861  func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
   862  	// match: (AtomicAdd64 ptr val mem)
   863  	// cond:
   864  	// result: (LoweredAtomicAdd64 ptr val mem)
   865  	for {
   866  		_ = v.Args[2]
   867  		ptr := v.Args[0]
   868  		val := v.Args[1]
   869  		mem := v.Args[2]
   870  		v.reset(OpPPC64LoweredAtomicAdd64)
   871  		v.AddArg(ptr)
   872  		v.AddArg(val)
   873  		v.AddArg(mem)
   874  		return true
   875  	}
   876  }
   877  func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
   878  	// match: (AtomicAnd8 ptr val mem)
   879  	// cond:
   880  	// result: (LoweredAtomicAnd8 ptr val mem)
   881  	for {
   882  		_ = v.Args[2]
   883  		ptr := v.Args[0]
   884  		val := v.Args[1]
   885  		mem := v.Args[2]
   886  		v.reset(OpPPC64LoweredAtomicAnd8)
   887  		v.AddArg(ptr)
   888  		v.AddArg(val)
   889  		v.AddArg(mem)
   890  		return true
   891  	}
   892  }
   893  func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
   894  	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   895  	// cond:
   896  	// result: (LoweredAtomicCas32 ptr old new_ mem)
   897  	for {
   898  		_ = v.Args[3]
   899  		ptr := v.Args[0]
   900  		old := v.Args[1]
   901  		new_ := v.Args[2]
   902  		mem := v.Args[3]
   903  		v.reset(OpPPC64LoweredAtomicCas32)
   904  		v.AddArg(ptr)
   905  		v.AddArg(old)
   906  		v.AddArg(new_)
   907  		v.AddArg(mem)
   908  		return true
   909  	}
   910  }
   911  func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
   912  	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
   913  	// cond:
   914  	// result: (LoweredAtomicCas64 ptr old new_ mem)
   915  	for {
   916  		_ = v.Args[3]
   917  		ptr := v.Args[0]
   918  		old := v.Args[1]
   919  		new_ := v.Args[2]
   920  		mem := v.Args[3]
   921  		v.reset(OpPPC64LoweredAtomicCas64)
   922  		v.AddArg(ptr)
   923  		v.AddArg(old)
   924  		v.AddArg(new_)
   925  		v.AddArg(mem)
   926  		return true
   927  	}
   928  }
   929  func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
   930  	// match: (AtomicExchange32 ptr val mem)
   931  	// cond:
   932  	// result: (LoweredAtomicExchange32 ptr val mem)
   933  	for {
   934  		_ = v.Args[2]
   935  		ptr := v.Args[0]
   936  		val := v.Args[1]
   937  		mem := v.Args[2]
   938  		v.reset(OpPPC64LoweredAtomicExchange32)
   939  		v.AddArg(ptr)
   940  		v.AddArg(val)
   941  		v.AddArg(mem)
   942  		return true
   943  	}
   944  }
   945  func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
   946  	// match: (AtomicExchange64 ptr val mem)
   947  	// cond:
   948  	// result: (LoweredAtomicExchange64 ptr val mem)
   949  	for {
   950  		_ = v.Args[2]
   951  		ptr := v.Args[0]
   952  		val := v.Args[1]
   953  		mem := v.Args[2]
   954  		v.reset(OpPPC64LoweredAtomicExchange64)
   955  		v.AddArg(ptr)
   956  		v.AddArg(val)
   957  		v.AddArg(mem)
   958  		return true
   959  	}
   960  }
   961  func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
   962  	// match: (AtomicLoad32 ptr mem)
   963  	// cond:
   964  	// result: (LoweredAtomicLoad32 ptr mem)
   965  	for {
   966  		_ = v.Args[1]
   967  		ptr := v.Args[0]
   968  		mem := v.Args[1]
   969  		v.reset(OpPPC64LoweredAtomicLoad32)
   970  		v.AddArg(ptr)
   971  		v.AddArg(mem)
   972  		return true
   973  	}
   974  }
   975  func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
   976  	// match: (AtomicLoad64 ptr mem)
   977  	// cond:
   978  	// result: (LoweredAtomicLoad64 ptr mem)
   979  	for {
   980  		_ = v.Args[1]
   981  		ptr := v.Args[0]
   982  		mem := v.Args[1]
   983  		v.reset(OpPPC64LoweredAtomicLoad64)
   984  		v.AddArg(ptr)
   985  		v.AddArg(mem)
   986  		return true
   987  	}
   988  }
   989  func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
   990  	// match: (AtomicLoadPtr ptr mem)
   991  	// cond:
   992  	// result: (LoweredAtomicLoadPtr ptr mem)
   993  	for {
   994  		_ = v.Args[1]
   995  		ptr := v.Args[0]
   996  		mem := v.Args[1]
   997  		v.reset(OpPPC64LoweredAtomicLoadPtr)
   998  		v.AddArg(ptr)
   999  		v.AddArg(mem)
  1000  		return true
  1001  	}
  1002  }
  1003  func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
  1004  	// match: (AtomicOr8 ptr val mem)
  1005  	// cond:
  1006  	// result: (LoweredAtomicOr8 ptr val mem)
  1007  	for {
  1008  		_ = v.Args[2]
  1009  		ptr := v.Args[0]
  1010  		val := v.Args[1]
  1011  		mem := v.Args[2]
  1012  		v.reset(OpPPC64LoweredAtomicOr8)
  1013  		v.AddArg(ptr)
  1014  		v.AddArg(val)
  1015  		v.AddArg(mem)
  1016  		return true
  1017  	}
  1018  }
  1019  func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
  1020  	// match: (AtomicStore32 ptr val mem)
  1021  	// cond:
  1022  	// result: (LoweredAtomicStore32 ptr val mem)
  1023  	for {
  1024  		_ = v.Args[2]
  1025  		ptr := v.Args[0]
  1026  		val := v.Args[1]
  1027  		mem := v.Args[2]
  1028  		v.reset(OpPPC64LoweredAtomicStore32)
  1029  		v.AddArg(ptr)
  1030  		v.AddArg(val)
  1031  		v.AddArg(mem)
  1032  		return true
  1033  	}
  1034  }
  1035  func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
  1036  	// match: (AtomicStore64 ptr val mem)
  1037  	// cond:
  1038  	// result: (LoweredAtomicStore64 ptr val mem)
  1039  	for {
  1040  		_ = v.Args[2]
  1041  		ptr := v.Args[0]
  1042  		val := v.Args[1]
  1043  		mem := v.Args[2]
  1044  		v.reset(OpPPC64LoweredAtomicStore64)
  1045  		v.AddArg(ptr)
  1046  		v.AddArg(val)
  1047  		v.AddArg(mem)
  1048  		return true
  1049  	}
  1050  }
  1051  func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
  1052  	b := v.Block
  1053  	_ = b
  1054  	// match: (Avg64u <t> x y)
  1055  	// cond:
  1056  	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
  1057  	for {
  1058  		t := v.Type
  1059  		_ = v.Args[1]
  1060  		x := v.Args[0]
  1061  		y := v.Args[1]
  1062  		v.reset(OpPPC64ADD)
  1063  		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
  1064  		v0.AuxInt = 1
  1065  		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
  1066  		v1.AddArg(x)
  1067  		v1.AddArg(y)
  1068  		v0.AddArg(v1)
  1069  		v.AddArg(v0)
  1070  		v.AddArg(y)
  1071  		return true
  1072  	}
  1073  }
  1074  func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
  1075  	b := v.Block
  1076  	_ = b
  1077  	typ := &b.Func.Config.Types
  1078  	_ = typ
  1079  	// match: (BitLen32 x)
  1080  	// cond:
  1081  	// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
  1082  	for {
  1083  		x := v.Args[0]
  1084  		v.reset(OpPPC64SUB)
  1085  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1086  		v0.AuxInt = 32
  1087  		v.AddArg(v0)
  1088  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
  1089  		v1.AddArg(x)
  1090  		v.AddArg(v1)
  1091  		return true
  1092  	}
  1093  }
  1094  func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
  1095  	b := v.Block
  1096  	_ = b
  1097  	typ := &b.Func.Config.Types
  1098  	_ = typ
  1099  	// match: (BitLen64 x)
  1100  	// cond:
  1101  	// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
  1102  	for {
  1103  		x := v.Args[0]
  1104  		v.reset(OpPPC64SUB)
  1105  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1106  		v0.AuxInt = 64
  1107  		v.AddArg(v0)
  1108  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
  1109  		v1.AddArg(x)
  1110  		v.AddArg(v1)
  1111  		return true
  1112  	}
  1113  }
  1114  func rewriteValuePPC64_OpCeil_0(v *Value) bool {
  1115  	// match: (Ceil x)
  1116  	// cond:
  1117  	// result: (FCEIL x)
  1118  	for {
  1119  		x := v.Args[0]
  1120  		v.reset(OpPPC64FCEIL)
  1121  		v.AddArg(x)
  1122  		return true
  1123  	}
  1124  }
  1125  func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
  1126  	// match: (ClosureCall [argwid] entry closure mem)
  1127  	// cond:
  1128  	// result: (CALLclosure [argwid] entry closure mem)
  1129  	for {
  1130  		argwid := v.AuxInt
  1131  		_ = v.Args[2]
  1132  		entry := v.Args[0]
  1133  		closure := v.Args[1]
  1134  		mem := v.Args[2]
  1135  		v.reset(OpPPC64CALLclosure)
  1136  		v.AuxInt = argwid
  1137  		v.AddArg(entry)
  1138  		v.AddArg(closure)
  1139  		v.AddArg(mem)
  1140  		return true
  1141  	}
  1142  }
  1143  func rewriteValuePPC64_OpCom16_0(v *Value) bool {
  1144  	// match: (Com16 x)
  1145  	// cond:
  1146  	// result: (NOR x x)
  1147  	for {
  1148  		x := v.Args[0]
  1149  		v.reset(OpPPC64NOR)
  1150  		v.AddArg(x)
  1151  		v.AddArg(x)
  1152  		return true
  1153  	}
  1154  }
  1155  func rewriteValuePPC64_OpCom32_0(v *Value) bool {
  1156  	// match: (Com32 x)
  1157  	// cond:
  1158  	// result: (NOR x x)
  1159  	for {
  1160  		x := v.Args[0]
  1161  		v.reset(OpPPC64NOR)
  1162  		v.AddArg(x)
  1163  		v.AddArg(x)
  1164  		return true
  1165  	}
  1166  }
  1167  func rewriteValuePPC64_OpCom64_0(v *Value) bool {
  1168  	// match: (Com64 x)
  1169  	// cond:
  1170  	// result: (NOR x x)
  1171  	for {
  1172  		x := v.Args[0]
  1173  		v.reset(OpPPC64NOR)
  1174  		v.AddArg(x)
  1175  		v.AddArg(x)
  1176  		return true
  1177  	}
  1178  }
  1179  func rewriteValuePPC64_OpCom8_0(v *Value) bool {
  1180  	// match: (Com8 x)
  1181  	// cond:
  1182  	// result: (NOR x x)
  1183  	for {
  1184  		x := v.Args[0]
  1185  		v.reset(OpPPC64NOR)
  1186  		v.AddArg(x)
  1187  		v.AddArg(x)
  1188  		return true
  1189  	}
  1190  }
  1191  func rewriteValuePPC64_OpConst16_0(v *Value) bool {
  1192  	// match: (Const16 [val])
  1193  	// cond:
  1194  	// result: (MOVDconst [val])
  1195  	for {
  1196  		val := v.AuxInt
  1197  		v.reset(OpPPC64MOVDconst)
  1198  		v.AuxInt = val
  1199  		return true
  1200  	}
  1201  }
  1202  func rewriteValuePPC64_OpConst32_0(v *Value) bool {
  1203  	// match: (Const32 [val])
  1204  	// cond:
  1205  	// result: (MOVDconst [val])
  1206  	for {
  1207  		val := v.AuxInt
  1208  		v.reset(OpPPC64MOVDconst)
  1209  		v.AuxInt = val
  1210  		return true
  1211  	}
  1212  }
  1213  func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
  1214  	// match: (Const32F [val])
  1215  	// cond:
  1216  	// result: (FMOVSconst [val])
  1217  	for {
  1218  		val := v.AuxInt
  1219  		v.reset(OpPPC64FMOVSconst)
  1220  		v.AuxInt = val
  1221  		return true
  1222  	}
  1223  }
  1224  func rewriteValuePPC64_OpConst64_0(v *Value) bool {
  1225  	// match: (Const64 [val])
  1226  	// cond:
  1227  	// result: (MOVDconst [val])
  1228  	for {
  1229  		val := v.AuxInt
  1230  		v.reset(OpPPC64MOVDconst)
  1231  		v.AuxInt = val
  1232  		return true
  1233  	}
  1234  }
  1235  func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
  1236  	// match: (Const64F [val])
  1237  	// cond:
  1238  	// result: (FMOVDconst [val])
  1239  	for {
  1240  		val := v.AuxInt
  1241  		v.reset(OpPPC64FMOVDconst)
  1242  		v.AuxInt = val
  1243  		return true
  1244  	}
  1245  }
  1246  func rewriteValuePPC64_OpConst8_0(v *Value) bool {
  1247  	// match: (Const8 [val])
  1248  	// cond:
  1249  	// result: (MOVDconst [val])
  1250  	for {
  1251  		val := v.AuxInt
  1252  		v.reset(OpPPC64MOVDconst)
  1253  		v.AuxInt = val
  1254  		return true
  1255  	}
  1256  }
  1257  func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
  1258  	// match: (ConstBool [b])
  1259  	// cond:
  1260  	// result: (MOVDconst [b])
  1261  	for {
  1262  		b := v.AuxInt
  1263  		v.reset(OpPPC64MOVDconst)
  1264  		v.AuxInt = b
  1265  		return true
  1266  	}
  1267  }
  1268  func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
  1269  	// match: (ConstNil)
  1270  	// cond:
  1271  	// result: (MOVDconst [0])
  1272  	for {
  1273  		v.reset(OpPPC64MOVDconst)
  1274  		v.AuxInt = 0
  1275  		return true
  1276  	}
  1277  }
  1278  func rewriteValuePPC64_OpConvert_0(v *Value) bool {
  1279  	// match: (Convert <t> x mem)
  1280  	// cond:
  1281  	// result: (MOVDconvert <t> x mem)
  1282  	for {
  1283  		t := v.Type
  1284  		_ = v.Args[1]
  1285  		x := v.Args[0]
  1286  		mem := v.Args[1]
  1287  		v.reset(OpPPC64MOVDconvert)
  1288  		v.Type = t
  1289  		v.AddArg(x)
  1290  		v.AddArg(mem)
  1291  		return true
  1292  	}
  1293  }
  1294  func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
  1295  	// match: (Copysign x y)
  1296  	// cond:
  1297  	// result: (FCPSGN y x)
  1298  	for {
  1299  		_ = v.Args[1]
  1300  		x := v.Args[0]
  1301  		y := v.Args[1]
  1302  		v.reset(OpPPC64FCPSGN)
  1303  		v.AddArg(y)
  1304  		v.AddArg(x)
  1305  		return true
  1306  	}
  1307  }
  1308  func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
  1309  	b := v.Block
  1310  	_ = b
  1311  	typ := &b.Func.Config.Types
  1312  	_ = typ
  1313  	// match: (Ctz32 x)
  1314  	// cond:
  1315  	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
  1316  	for {
  1317  		x := v.Args[0]
  1318  		v.reset(OpPPC64POPCNTW)
  1319  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1320  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
  1321  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
  1322  		v2.AuxInt = -1
  1323  		v2.AddArg(x)
  1324  		v1.AddArg(v2)
  1325  		v1.AddArg(x)
  1326  		v0.AddArg(v1)
  1327  		v.AddArg(v0)
  1328  		return true
  1329  	}
  1330  }
  1331  func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
  1332  	b := v.Block
  1333  	_ = b
  1334  	typ := &b.Func.Config.Types
  1335  	_ = typ
  1336  	// match: (Ctz64 x)
  1337  	// cond:
  1338  	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
  1339  	for {
  1340  		x := v.Args[0]
  1341  		v.reset(OpPPC64POPCNTD)
  1342  		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
  1343  		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
  1344  		v1.AuxInt = -1
  1345  		v1.AddArg(x)
  1346  		v0.AddArg(v1)
  1347  		v0.AddArg(x)
  1348  		v.AddArg(v0)
  1349  		return true
  1350  	}
  1351  }
  1352  func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
  1353  	b := v.Block
  1354  	_ = b
  1355  	typ := &b.Func.Config.Types
  1356  	_ = typ
  1357  	// match: (Cvt32Fto32 x)
  1358  	// cond:
  1359  	// result: (MFVSRD (FCTIWZ x))
  1360  	for {
  1361  		x := v.Args[0]
  1362  		v.reset(OpPPC64MFVSRD)
  1363  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1364  		v0.AddArg(x)
  1365  		v.AddArg(v0)
  1366  		return true
  1367  	}
  1368  }
  1369  func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
  1370  	b := v.Block
  1371  	_ = b
  1372  	typ := &b.Func.Config.Types
  1373  	_ = typ
  1374  	// match: (Cvt32Fto64 x)
  1375  	// cond:
  1376  	// result: (MFVSRD (FCTIDZ x))
  1377  	for {
  1378  		x := v.Args[0]
  1379  		v.reset(OpPPC64MFVSRD)
  1380  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1381  		v0.AddArg(x)
  1382  		v.AddArg(v0)
  1383  		return true
  1384  	}
  1385  }
  1386  func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
  1387  	// match: (Cvt32Fto64F x)
  1388  	// cond:
  1389  	// result: x
  1390  	for {
  1391  		x := v.Args[0]
  1392  		v.reset(OpCopy)
  1393  		v.Type = x.Type
  1394  		v.AddArg(x)
  1395  		return true
  1396  	}
  1397  }
  1398  func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
  1399  	b := v.Block
  1400  	_ = b
  1401  	typ := &b.Func.Config.Types
  1402  	_ = typ
  1403  	// match: (Cvt32to32F x)
  1404  	// cond:
  1405  	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
  1406  	for {
  1407  		x := v.Args[0]
  1408  		v.reset(OpPPC64FCFIDS)
  1409  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1410  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1411  		v1.AddArg(x)
  1412  		v0.AddArg(v1)
  1413  		v.AddArg(v0)
  1414  		return true
  1415  	}
  1416  }
  1417  func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
  1418  	b := v.Block
  1419  	_ = b
  1420  	typ := &b.Func.Config.Types
  1421  	_ = typ
  1422  	// match: (Cvt32to64F x)
  1423  	// cond:
  1424  	// result: (FCFID (MTVSRD (SignExt32to64 x)))
  1425  	for {
  1426  		x := v.Args[0]
  1427  		v.reset(OpPPC64FCFID)
  1428  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1429  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1430  		v1.AddArg(x)
  1431  		v0.AddArg(v1)
  1432  		v.AddArg(v0)
  1433  		return true
  1434  	}
  1435  }
  1436  func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
  1437  	b := v.Block
  1438  	_ = b
  1439  	typ := &b.Func.Config.Types
  1440  	_ = typ
  1441  	// match: (Cvt64Fto32 x)
  1442  	// cond:
  1443  	// result: (MFVSRD (FCTIWZ x))
  1444  	for {
  1445  		x := v.Args[0]
  1446  		v.reset(OpPPC64MFVSRD)
  1447  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1448  		v0.AddArg(x)
  1449  		v.AddArg(v0)
  1450  		return true
  1451  	}
  1452  }
  1453  func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
  1454  	// match: (Cvt64Fto32F x)
  1455  	// cond:
  1456  	// result: (FRSP x)
  1457  	for {
  1458  		x := v.Args[0]
  1459  		v.reset(OpPPC64FRSP)
  1460  		v.AddArg(x)
  1461  		return true
  1462  	}
  1463  }
  1464  func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
  1465  	b := v.Block
  1466  	_ = b
  1467  	typ := &b.Func.Config.Types
  1468  	_ = typ
  1469  	// match: (Cvt64Fto64 x)
  1470  	// cond:
  1471  	// result: (MFVSRD (FCTIDZ x))
  1472  	for {
  1473  		x := v.Args[0]
  1474  		v.reset(OpPPC64MFVSRD)
  1475  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1476  		v0.AddArg(x)
  1477  		v.AddArg(v0)
  1478  		return true
  1479  	}
  1480  }
  1481  func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
  1482  	b := v.Block
  1483  	_ = b
  1484  	typ := &b.Func.Config.Types
  1485  	_ = typ
  1486  	// match: (Cvt64to32F x)
  1487  	// cond:
  1488  	// result: (FCFIDS (MTVSRD x))
  1489  	for {
  1490  		x := v.Args[0]
  1491  		v.reset(OpPPC64FCFIDS)
  1492  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1493  		v0.AddArg(x)
  1494  		v.AddArg(v0)
  1495  		return true
  1496  	}
  1497  }
  1498  func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
  1499  	b := v.Block
  1500  	_ = b
  1501  	typ := &b.Func.Config.Types
  1502  	_ = typ
  1503  	// match: (Cvt64to64F x)
  1504  	// cond:
  1505  	// result: (FCFID (MTVSRD x))
  1506  	for {
  1507  		x := v.Args[0]
  1508  		v.reset(OpPPC64FCFID)
  1509  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1510  		v0.AddArg(x)
  1511  		v.AddArg(v0)
  1512  		return true
  1513  	}
  1514  }
  1515  func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
  1516  	b := v.Block
  1517  	_ = b
  1518  	typ := &b.Func.Config.Types
  1519  	_ = typ
  1520  	// match: (Div16 x y)
  1521  	// cond:
  1522  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
  1523  	for {
  1524  		_ = v.Args[1]
  1525  		x := v.Args[0]
  1526  		y := v.Args[1]
  1527  		v.reset(OpPPC64DIVW)
  1528  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1529  		v0.AddArg(x)
  1530  		v.AddArg(v0)
  1531  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1532  		v1.AddArg(y)
  1533  		v.AddArg(v1)
  1534  		return true
  1535  	}
  1536  }
  1537  func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
  1538  	b := v.Block
  1539  	_ = b
  1540  	typ := &b.Func.Config.Types
  1541  	_ = typ
  1542  	// match: (Div16u x y)
  1543  	// cond:
  1544  	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1545  	for {
  1546  		_ = v.Args[1]
  1547  		x := v.Args[0]
  1548  		y := v.Args[1]
  1549  		v.reset(OpPPC64DIVWU)
  1550  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1551  		v0.AddArg(x)
  1552  		v.AddArg(v0)
  1553  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1554  		v1.AddArg(y)
  1555  		v.AddArg(v1)
  1556  		return true
  1557  	}
  1558  }
  1559  func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
  1560  	// match: (Div32 x y)
  1561  	// cond:
  1562  	// result: (DIVW x y)
  1563  	for {
  1564  		_ = v.Args[1]
  1565  		x := v.Args[0]
  1566  		y := v.Args[1]
  1567  		v.reset(OpPPC64DIVW)
  1568  		v.AddArg(x)
  1569  		v.AddArg(y)
  1570  		return true
  1571  	}
  1572  }
  1573  func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
  1574  	// match: (Div32F x y)
  1575  	// cond:
  1576  	// result: (FDIVS x y)
  1577  	for {
  1578  		_ = v.Args[1]
  1579  		x := v.Args[0]
  1580  		y := v.Args[1]
  1581  		v.reset(OpPPC64FDIVS)
  1582  		v.AddArg(x)
  1583  		v.AddArg(y)
  1584  		return true
  1585  	}
  1586  }
  1587  func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
  1588  	// match: (Div32u x y)
  1589  	// cond:
  1590  	// result: (DIVWU x y)
  1591  	for {
  1592  		_ = v.Args[1]
  1593  		x := v.Args[0]
  1594  		y := v.Args[1]
  1595  		v.reset(OpPPC64DIVWU)
  1596  		v.AddArg(x)
  1597  		v.AddArg(y)
  1598  		return true
  1599  	}
  1600  }
  1601  func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
  1602  	// match: (Div64 x y)
  1603  	// cond:
  1604  	// result: (DIVD x y)
  1605  	for {
  1606  		_ = v.Args[1]
  1607  		x := v.Args[0]
  1608  		y := v.Args[1]
  1609  		v.reset(OpPPC64DIVD)
  1610  		v.AddArg(x)
  1611  		v.AddArg(y)
  1612  		return true
  1613  	}
  1614  }
  1615  func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
  1616  	// match: (Div64F x y)
  1617  	// cond:
  1618  	// result: (FDIV x y)
  1619  	for {
  1620  		_ = v.Args[1]
  1621  		x := v.Args[0]
  1622  		y := v.Args[1]
  1623  		v.reset(OpPPC64FDIV)
  1624  		v.AddArg(x)
  1625  		v.AddArg(y)
  1626  		return true
  1627  	}
  1628  }
  1629  func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
  1630  	// match: (Div64u x y)
  1631  	// cond:
  1632  	// result: (DIVDU x y)
  1633  	for {
  1634  		_ = v.Args[1]
  1635  		x := v.Args[0]
  1636  		y := v.Args[1]
  1637  		v.reset(OpPPC64DIVDU)
  1638  		v.AddArg(x)
  1639  		v.AddArg(y)
  1640  		return true
  1641  	}
  1642  }
  1643  func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
  1644  	b := v.Block
  1645  	_ = b
  1646  	typ := &b.Func.Config.Types
  1647  	_ = typ
  1648  	// match: (Div8 x y)
  1649  	// cond:
  1650  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
  1651  	for {
  1652  		_ = v.Args[1]
  1653  		x := v.Args[0]
  1654  		y := v.Args[1]
  1655  		v.reset(OpPPC64DIVW)
  1656  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1657  		v0.AddArg(x)
  1658  		v.AddArg(v0)
  1659  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1660  		v1.AddArg(y)
  1661  		v.AddArg(v1)
  1662  		return true
  1663  	}
  1664  }
  1665  func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
  1666  	b := v.Block
  1667  	_ = b
  1668  	typ := &b.Func.Config.Types
  1669  	_ = typ
  1670  	// match: (Div8u x y)
  1671  	// cond:
  1672  	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1673  	for {
  1674  		_ = v.Args[1]
  1675  		x := v.Args[0]
  1676  		y := v.Args[1]
  1677  		v.reset(OpPPC64DIVWU)
  1678  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1679  		v0.AddArg(x)
  1680  		v.AddArg(v0)
  1681  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1682  		v1.AddArg(y)
  1683  		v.AddArg(v1)
  1684  		return true
  1685  	}
  1686  }
  1687  func rewriteValuePPC64_OpEq16_0(v *Value) bool {
  1688  	b := v.Block
  1689  	_ = b
  1690  	typ := &b.Func.Config.Types
  1691  	_ = typ
  1692  	// match: (Eq16 x y)
  1693  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1694  	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1695  	for {
  1696  		_ = v.Args[1]
  1697  		x := v.Args[0]
  1698  		y := v.Args[1]
  1699  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1700  			break
  1701  		}
  1702  		v.reset(OpPPC64Equal)
  1703  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1704  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1705  		v1.AddArg(x)
  1706  		v0.AddArg(v1)
  1707  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1708  		v2.AddArg(y)
  1709  		v0.AddArg(v2)
  1710  		v.AddArg(v0)
  1711  		return true
  1712  	}
  1713  	// match: (Eq16 x y)
  1714  	// cond:
  1715  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1716  	for {
  1717  		_ = v.Args[1]
  1718  		x := v.Args[0]
  1719  		y := v.Args[1]
  1720  		v.reset(OpPPC64Equal)
  1721  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1722  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1723  		v1.AddArg(x)
  1724  		v0.AddArg(v1)
  1725  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1726  		v2.AddArg(y)
  1727  		v0.AddArg(v2)
  1728  		v.AddArg(v0)
  1729  		return true
  1730  	}
  1731  }
  1732  func rewriteValuePPC64_OpEq32_0(v *Value) bool {
  1733  	b := v.Block
  1734  	_ = b
  1735  	// match: (Eq32 x y)
  1736  	// cond:
  1737  	// result: (Equal (CMPW x y))
  1738  	for {
  1739  		_ = v.Args[1]
  1740  		x := v.Args[0]
  1741  		y := v.Args[1]
  1742  		v.reset(OpPPC64Equal)
  1743  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1744  		v0.AddArg(x)
  1745  		v0.AddArg(y)
  1746  		v.AddArg(v0)
  1747  		return true
  1748  	}
  1749  }
  1750  func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
  1751  	b := v.Block
  1752  	_ = b
  1753  	// match: (Eq32F x y)
  1754  	// cond:
  1755  	// result: (Equal (FCMPU x y))
  1756  	for {
  1757  		_ = v.Args[1]
  1758  		x := v.Args[0]
  1759  		y := v.Args[1]
  1760  		v.reset(OpPPC64Equal)
  1761  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1762  		v0.AddArg(x)
  1763  		v0.AddArg(y)
  1764  		v.AddArg(v0)
  1765  		return true
  1766  	}
  1767  }
  1768  func rewriteValuePPC64_OpEq64_0(v *Value) bool {
  1769  	b := v.Block
  1770  	_ = b
  1771  	// match: (Eq64 x y)
  1772  	// cond:
  1773  	// result: (Equal (CMP x y))
  1774  	for {
  1775  		_ = v.Args[1]
  1776  		x := v.Args[0]
  1777  		y := v.Args[1]
  1778  		v.reset(OpPPC64Equal)
  1779  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1780  		v0.AddArg(x)
  1781  		v0.AddArg(y)
  1782  		v.AddArg(v0)
  1783  		return true
  1784  	}
  1785  }
  1786  func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
  1787  	b := v.Block
  1788  	_ = b
  1789  	// match: (Eq64F x y)
  1790  	// cond:
  1791  	// result: (Equal (FCMPU x y))
  1792  	for {
  1793  		_ = v.Args[1]
  1794  		x := v.Args[0]
  1795  		y := v.Args[1]
  1796  		v.reset(OpPPC64Equal)
  1797  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1798  		v0.AddArg(x)
  1799  		v0.AddArg(y)
  1800  		v.AddArg(v0)
  1801  		return true
  1802  	}
  1803  }
  1804  func rewriteValuePPC64_OpEq8_0(v *Value) bool {
  1805  	b := v.Block
  1806  	_ = b
  1807  	typ := &b.Func.Config.Types
  1808  	_ = typ
  1809  	// match: (Eq8 x y)
  1810  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1811  	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  1812  	for {
  1813  		_ = v.Args[1]
  1814  		x := v.Args[0]
  1815  		y := v.Args[1]
  1816  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1817  			break
  1818  		}
  1819  		v.reset(OpPPC64Equal)
  1820  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1821  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1822  		v1.AddArg(x)
  1823  		v0.AddArg(v1)
  1824  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1825  		v2.AddArg(y)
  1826  		v0.AddArg(v2)
  1827  		v.AddArg(v0)
  1828  		return true
  1829  	}
  1830  	// match: (Eq8 x y)
  1831  	// cond:
  1832  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1833  	for {
  1834  		_ = v.Args[1]
  1835  		x := v.Args[0]
  1836  		y := v.Args[1]
  1837  		v.reset(OpPPC64Equal)
  1838  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1839  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1840  		v1.AddArg(x)
  1841  		v0.AddArg(v1)
  1842  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1843  		v2.AddArg(y)
  1844  		v0.AddArg(v2)
  1845  		v.AddArg(v0)
  1846  		return true
  1847  	}
  1848  }
  1849  func rewriteValuePPC64_OpEqB_0(v *Value) bool {
  1850  	b := v.Block
  1851  	_ = b
  1852  	typ := &b.Func.Config.Types
  1853  	_ = typ
  1854  	// match: (EqB x y)
  1855  	// cond:
  1856  	// result: (ANDconst [1] (EQV x y))
  1857  	for {
  1858  		_ = v.Args[1]
  1859  		x := v.Args[0]
  1860  		y := v.Args[1]
  1861  		v.reset(OpPPC64ANDconst)
  1862  		v.AuxInt = 1
  1863  		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
  1864  		v0.AddArg(x)
  1865  		v0.AddArg(y)
  1866  		v.AddArg(v0)
  1867  		return true
  1868  	}
  1869  }
  1870  func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
  1871  	b := v.Block
  1872  	_ = b
  1873  	// match: (EqPtr x y)
  1874  	// cond:
  1875  	// result: (Equal (CMP x y))
  1876  	for {
  1877  		_ = v.Args[1]
  1878  		x := v.Args[0]
  1879  		y := v.Args[1]
  1880  		v.reset(OpPPC64Equal)
  1881  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1882  		v0.AddArg(x)
  1883  		v0.AddArg(y)
  1884  		v.AddArg(v0)
  1885  		return true
  1886  	}
  1887  }
  1888  func rewriteValuePPC64_OpFloor_0(v *Value) bool {
  1889  	// match: (Floor x)
  1890  	// cond:
  1891  	// result: (FFLOOR x)
  1892  	for {
  1893  		x := v.Args[0]
  1894  		v.reset(OpPPC64FFLOOR)
  1895  		v.AddArg(x)
  1896  		return true
  1897  	}
  1898  }
  1899  func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
  1900  	b := v.Block
  1901  	_ = b
  1902  	typ := &b.Func.Config.Types
  1903  	_ = typ
  1904  	// match: (Geq16 x y)
  1905  	// cond:
  1906  	// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1907  	for {
  1908  		_ = v.Args[1]
  1909  		x := v.Args[0]
  1910  		y := v.Args[1]
  1911  		v.reset(OpPPC64GreaterEqual)
  1912  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1913  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1914  		v1.AddArg(x)
  1915  		v0.AddArg(v1)
  1916  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1917  		v2.AddArg(y)
  1918  		v0.AddArg(v2)
  1919  		v.AddArg(v0)
  1920  		return true
  1921  	}
  1922  }
  1923  func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
  1924  	b := v.Block
  1925  	_ = b
  1926  	typ := &b.Func.Config.Types
  1927  	_ = typ
  1928  	// match: (Geq16U x y)
  1929  	// cond:
  1930  	// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1931  	for {
  1932  		_ = v.Args[1]
  1933  		x := v.Args[0]
  1934  		y := v.Args[1]
  1935  		v.reset(OpPPC64GreaterEqual)
  1936  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  1937  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1938  		v1.AddArg(x)
  1939  		v0.AddArg(v1)
  1940  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1941  		v2.AddArg(y)
  1942  		v0.AddArg(v2)
  1943  		v.AddArg(v0)
  1944  		return true
  1945  	}
  1946  }
  1947  func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
  1948  	b := v.Block
  1949  	_ = b
  1950  	// match: (Geq32 x y)
  1951  	// cond:
  1952  	// result: (GreaterEqual (CMPW x y))
  1953  	for {
  1954  		_ = v.Args[1]
  1955  		x := v.Args[0]
  1956  		y := v.Args[1]
  1957  		v.reset(OpPPC64GreaterEqual)
  1958  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1959  		v0.AddArg(x)
  1960  		v0.AddArg(y)
  1961  		v.AddArg(v0)
  1962  		return true
  1963  	}
  1964  }
  1965  func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
  1966  	b := v.Block
  1967  	_ = b
  1968  	// match: (Geq32F x y)
  1969  	// cond:
  1970  	// result: (FGreaterEqual (FCMPU x y))
  1971  	for {
  1972  		_ = v.Args[1]
  1973  		x := v.Args[0]
  1974  		y := v.Args[1]
  1975  		v.reset(OpPPC64FGreaterEqual)
  1976  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1977  		v0.AddArg(x)
  1978  		v0.AddArg(y)
  1979  		v.AddArg(v0)
  1980  		return true
  1981  	}
  1982  }
  1983  func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
  1984  	b := v.Block
  1985  	_ = b
  1986  	// match: (Geq32U x y)
  1987  	// cond:
  1988  	// result: (GreaterEqual (CMPWU x y))
  1989  	for {
  1990  		_ = v.Args[1]
  1991  		x := v.Args[0]
  1992  		y := v.Args[1]
  1993  		v.reset(OpPPC64GreaterEqual)
  1994  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  1995  		v0.AddArg(x)
  1996  		v0.AddArg(y)
  1997  		v.AddArg(v0)
  1998  		return true
  1999  	}
  2000  }
  2001  func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
  2002  	b := v.Block
  2003  	_ = b
  2004  	// match: (Geq64 x y)
  2005  	// cond:
  2006  	// result: (GreaterEqual (CMP x y))
  2007  	for {
  2008  		_ = v.Args[1]
  2009  		x := v.Args[0]
  2010  		y := v.Args[1]
  2011  		v.reset(OpPPC64GreaterEqual)
  2012  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2013  		v0.AddArg(x)
  2014  		v0.AddArg(y)
  2015  		v.AddArg(v0)
  2016  		return true
  2017  	}
  2018  }
  2019  func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
  2020  	b := v.Block
  2021  	_ = b
  2022  	// match: (Geq64F x y)
  2023  	// cond:
  2024  	// result: (FGreaterEqual (FCMPU x y))
  2025  	for {
  2026  		_ = v.Args[1]
  2027  		x := v.Args[0]
  2028  		y := v.Args[1]
  2029  		v.reset(OpPPC64FGreaterEqual)
  2030  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2031  		v0.AddArg(x)
  2032  		v0.AddArg(y)
  2033  		v.AddArg(v0)
  2034  		return true
  2035  	}
  2036  }
  2037  func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
  2038  	b := v.Block
  2039  	_ = b
  2040  	// match: (Geq64U x y)
  2041  	// cond:
  2042  	// result: (GreaterEqual (CMPU x y))
  2043  	for {
  2044  		_ = v.Args[1]
  2045  		x := v.Args[0]
  2046  		y := v.Args[1]
  2047  		v.reset(OpPPC64GreaterEqual)
  2048  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2049  		v0.AddArg(x)
  2050  		v0.AddArg(y)
  2051  		v.AddArg(v0)
  2052  		return true
  2053  	}
  2054  }
  2055  func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
  2056  	b := v.Block
  2057  	_ = b
  2058  	typ := &b.Func.Config.Types
  2059  	_ = typ
  2060  	// match: (Geq8 x y)
  2061  	// cond:
  2062  	// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2063  	for {
  2064  		_ = v.Args[1]
  2065  		x := v.Args[0]
  2066  		y := v.Args[1]
  2067  		v.reset(OpPPC64GreaterEqual)
  2068  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2069  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2070  		v1.AddArg(x)
  2071  		v0.AddArg(v1)
  2072  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2073  		v2.AddArg(y)
  2074  		v0.AddArg(v2)
  2075  		v.AddArg(v0)
  2076  		return true
  2077  	}
  2078  }
  2079  func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
  2080  	b := v.Block
  2081  	_ = b
  2082  	typ := &b.Func.Config.Types
  2083  	_ = typ
  2084  	// match: (Geq8U x y)
  2085  	// cond:
  2086  	// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2087  	for {
  2088  		_ = v.Args[1]
  2089  		x := v.Args[0]
  2090  		y := v.Args[1]
  2091  		v.reset(OpPPC64GreaterEqual)
  2092  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2093  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2094  		v1.AddArg(x)
  2095  		v0.AddArg(v1)
  2096  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2097  		v2.AddArg(y)
  2098  		v0.AddArg(v2)
  2099  		v.AddArg(v0)
  2100  		return true
  2101  	}
  2102  }
  2103  func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
  2104  	// match: (GetCallerSP)
  2105  	// cond:
  2106  	// result: (LoweredGetCallerSP)
  2107  	for {
  2108  		v.reset(OpPPC64LoweredGetCallerSP)
  2109  		return true
  2110  	}
  2111  }
  2112  func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
  2113  	// match: (GetClosurePtr)
  2114  	// cond:
  2115  	// result: (LoweredGetClosurePtr)
  2116  	for {
  2117  		v.reset(OpPPC64LoweredGetClosurePtr)
  2118  		return true
  2119  	}
  2120  }
  2121  func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
  2122  	b := v.Block
  2123  	_ = b
  2124  	typ := &b.Func.Config.Types
  2125  	_ = typ
  2126  	// match: (Greater16 x y)
  2127  	// cond:
  2128  	// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2129  	for {
  2130  		_ = v.Args[1]
  2131  		x := v.Args[0]
  2132  		y := v.Args[1]
  2133  		v.reset(OpPPC64GreaterThan)
  2134  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2135  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2136  		v1.AddArg(x)
  2137  		v0.AddArg(v1)
  2138  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2139  		v2.AddArg(y)
  2140  		v0.AddArg(v2)
  2141  		v.AddArg(v0)
  2142  		return true
  2143  	}
  2144  }
  2145  func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
  2146  	b := v.Block
  2147  	_ = b
  2148  	typ := &b.Func.Config.Types
  2149  	_ = typ
  2150  	// match: (Greater16U x y)
  2151  	// cond:
  2152  	// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2153  	for {
  2154  		_ = v.Args[1]
  2155  		x := v.Args[0]
  2156  		y := v.Args[1]
  2157  		v.reset(OpPPC64GreaterThan)
  2158  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2159  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2160  		v1.AddArg(x)
  2161  		v0.AddArg(v1)
  2162  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2163  		v2.AddArg(y)
  2164  		v0.AddArg(v2)
  2165  		v.AddArg(v0)
  2166  		return true
  2167  	}
  2168  }
  2169  func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
  2170  	b := v.Block
  2171  	_ = b
  2172  	// match: (Greater32 x y)
  2173  	// cond:
  2174  	// result: (GreaterThan (CMPW x y))
  2175  	for {
  2176  		_ = v.Args[1]
  2177  		x := v.Args[0]
  2178  		y := v.Args[1]
  2179  		v.reset(OpPPC64GreaterThan)
  2180  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2181  		v0.AddArg(x)
  2182  		v0.AddArg(y)
  2183  		v.AddArg(v0)
  2184  		return true
  2185  	}
  2186  }
  2187  func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
  2188  	b := v.Block
  2189  	_ = b
  2190  	// match: (Greater32F x y)
  2191  	// cond:
  2192  	// result: (FGreaterThan (FCMPU x y))
  2193  	for {
  2194  		_ = v.Args[1]
  2195  		x := v.Args[0]
  2196  		y := v.Args[1]
  2197  		v.reset(OpPPC64FGreaterThan)
  2198  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2199  		v0.AddArg(x)
  2200  		v0.AddArg(y)
  2201  		v.AddArg(v0)
  2202  		return true
  2203  	}
  2204  }
  2205  func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
  2206  	b := v.Block
  2207  	_ = b
  2208  	// match: (Greater32U x y)
  2209  	// cond:
  2210  	// result: (GreaterThan (CMPWU x y))
  2211  	for {
  2212  		_ = v.Args[1]
  2213  		x := v.Args[0]
  2214  		y := v.Args[1]
  2215  		v.reset(OpPPC64GreaterThan)
  2216  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2217  		v0.AddArg(x)
  2218  		v0.AddArg(y)
  2219  		v.AddArg(v0)
  2220  		return true
  2221  	}
  2222  }
  2223  func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
  2224  	b := v.Block
  2225  	_ = b
  2226  	// match: (Greater64 x y)
  2227  	// cond:
  2228  	// result: (GreaterThan (CMP x y))
  2229  	for {
  2230  		_ = v.Args[1]
  2231  		x := v.Args[0]
  2232  		y := v.Args[1]
  2233  		v.reset(OpPPC64GreaterThan)
  2234  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2235  		v0.AddArg(x)
  2236  		v0.AddArg(y)
  2237  		v.AddArg(v0)
  2238  		return true
  2239  	}
  2240  }
  2241  func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
  2242  	b := v.Block
  2243  	_ = b
  2244  	// match: (Greater64F x y)
  2245  	// cond:
  2246  	// result: (FGreaterThan (FCMPU x y))
  2247  	for {
  2248  		_ = v.Args[1]
  2249  		x := v.Args[0]
  2250  		y := v.Args[1]
  2251  		v.reset(OpPPC64FGreaterThan)
  2252  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2253  		v0.AddArg(x)
  2254  		v0.AddArg(y)
  2255  		v.AddArg(v0)
  2256  		return true
  2257  	}
  2258  }
  2259  func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
  2260  	b := v.Block
  2261  	_ = b
  2262  	// match: (Greater64U x y)
  2263  	// cond:
  2264  	// result: (GreaterThan (CMPU x y))
  2265  	for {
  2266  		_ = v.Args[1]
  2267  		x := v.Args[0]
  2268  		y := v.Args[1]
  2269  		v.reset(OpPPC64GreaterThan)
  2270  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2271  		v0.AddArg(x)
  2272  		v0.AddArg(y)
  2273  		v.AddArg(v0)
  2274  		return true
  2275  	}
  2276  }
  2277  func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
  2278  	b := v.Block
  2279  	_ = b
  2280  	typ := &b.Func.Config.Types
  2281  	_ = typ
  2282  	// match: (Greater8 x y)
  2283  	// cond:
  2284  	// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2285  	for {
  2286  		_ = v.Args[1]
  2287  		x := v.Args[0]
  2288  		y := v.Args[1]
  2289  		v.reset(OpPPC64GreaterThan)
  2290  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2291  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2292  		v1.AddArg(x)
  2293  		v0.AddArg(v1)
  2294  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2295  		v2.AddArg(y)
  2296  		v0.AddArg(v2)
  2297  		v.AddArg(v0)
  2298  		return true
  2299  	}
  2300  }
  2301  func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
  2302  	b := v.Block
  2303  	_ = b
  2304  	typ := &b.Func.Config.Types
  2305  	_ = typ
  2306  	// match: (Greater8U x y)
  2307  	// cond:
  2308  	// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2309  	for {
  2310  		_ = v.Args[1]
  2311  		x := v.Args[0]
  2312  		y := v.Args[1]
  2313  		v.reset(OpPPC64GreaterThan)
  2314  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2315  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2316  		v1.AddArg(x)
  2317  		v0.AddArg(v1)
  2318  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2319  		v2.AddArg(y)
  2320  		v0.AddArg(v2)
  2321  		v.AddArg(v0)
  2322  		return true
  2323  	}
  2324  }
  2325  func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
  2326  	// match: (Hmul32 x y)
  2327  	// cond:
  2328  	// result: (MULHW x y)
  2329  	for {
  2330  		_ = v.Args[1]
  2331  		x := v.Args[0]
  2332  		y := v.Args[1]
  2333  		v.reset(OpPPC64MULHW)
  2334  		v.AddArg(x)
  2335  		v.AddArg(y)
  2336  		return true
  2337  	}
  2338  }
  2339  func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
  2340  	// match: (Hmul32u x y)
  2341  	// cond:
  2342  	// result: (MULHWU x y)
  2343  	for {
  2344  		_ = v.Args[1]
  2345  		x := v.Args[0]
  2346  		y := v.Args[1]
  2347  		v.reset(OpPPC64MULHWU)
  2348  		v.AddArg(x)
  2349  		v.AddArg(y)
  2350  		return true
  2351  	}
  2352  }
  2353  func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
  2354  	// match: (Hmul64 x y)
  2355  	// cond:
  2356  	// result: (MULHD x y)
  2357  	for {
  2358  		_ = v.Args[1]
  2359  		x := v.Args[0]
  2360  		y := v.Args[1]
  2361  		v.reset(OpPPC64MULHD)
  2362  		v.AddArg(x)
  2363  		v.AddArg(y)
  2364  		return true
  2365  	}
  2366  }
  2367  func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
  2368  	// match: (Hmul64u x y)
  2369  	// cond:
  2370  	// result: (MULHDU x y)
  2371  	for {
  2372  		_ = v.Args[1]
  2373  		x := v.Args[0]
  2374  		y := v.Args[1]
  2375  		v.reset(OpPPC64MULHDU)
  2376  		v.AddArg(x)
  2377  		v.AddArg(y)
  2378  		return true
  2379  	}
  2380  }
  2381  func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
  2382  	// match: (InterCall [argwid] entry mem)
  2383  	// cond:
  2384  	// result: (CALLinter [argwid] entry mem)
  2385  	for {
  2386  		argwid := v.AuxInt
  2387  		_ = v.Args[1]
  2388  		entry := v.Args[0]
  2389  		mem := v.Args[1]
  2390  		v.reset(OpPPC64CALLinter)
  2391  		v.AuxInt = argwid
  2392  		v.AddArg(entry)
  2393  		v.AddArg(mem)
  2394  		return true
  2395  	}
  2396  }
  2397  func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
  2398  	b := v.Block
  2399  	_ = b
  2400  	// match: (IsInBounds idx len)
  2401  	// cond:
  2402  	// result: (LessThan (CMPU idx len))
  2403  	for {
  2404  		_ = v.Args[1]
  2405  		idx := v.Args[0]
  2406  		len := v.Args[1]
  2407  		v.reset(OpPPC64LessThan)
  2408  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2409  		v0.AddArg(idx)
  2410  		v0.AddArg(len)
  2411  		v.AddArg(v0)
  2412  		return true
  2413  	}
  2414  }
  2415  func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
  2416  	b := v.Block
  2417  	_ = b
  2418  	// match: (IsNonNil ptr)
  2419  	// cond:
  2420  	// result: (NotEqual (CMPconst [0] ptr))
  2421  	for {
  2422  		ptr := v.Args[0]
  2423  		v.reset(OpPPC64NotEqual)
  2424  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  2425  		v0.AuxInt = 0
  2426  		v0.AddArg(ptr)
  2427  		v.AddArg(v0)
  2428  		return true
  2429  	}
  2430  }
  2431  func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
  2432  	b := v.Block
  2433  	_ = b
  2434  	// match: (IsSliceInBounds idx len)
  2435  	// cond:
  2436  	// result: (LessEqual (CMPU idx len))
  2437  	for {
  2438  		_ = v.Args[1]
  2439  		idx := v.Args[0]
  2440  		len := v.Args[1]
  2441  		v.reset(OpPPC64LessEqual)
  2442  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2443  		v0.AddArg(idx)
  2444  		v0.AddArg(len)
  2445  		v.AddArg(v0)
  2446  		return true
  2447  	}
  2448  }
  2449  func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
  2450  	b := v.Block
  2451  	_ = b
  2452  	typ := &b.Func.Config.Types
  2453  	_ = typ
  2454  	// match: (Leq16 x y)
  2455  	// cond:
  2456  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2457  	for {
  2458  		_ = v.Args[1]
  2459  		x := v.Args[0]
  2460  		y := v.Args[1]
  2461  		v.reset(OpPPC64LessEqual)
  2462  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2463  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2464  		v1.AddArg(x)
  2465  		v0.AddArg(v1)
  2466  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2467  		v2.AddArg(y)
  2468  		v0.AddArg(v2)
  2469  		v.AddArg(v0)
  2470  		return true
  2471  	}
  2472  }
  2473  func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
  2474  	b := v.Block
  2475  	_ = b
  2476  	typ := &b.Func.Config.Types
  2477  	_ = typ
  2478  	// match: (Leq16U x y)
  2479  	// cond:
  2480  	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2481  	for {
  2482  		_ = v.Args[1]
  2483  		x := v.Args[0]
  2484  		y := v.Args[1]
  2485  		v.reset(OpPPC64LessEqual)
  2486  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2487  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2488  		v1.AddArg(x)
  2489  		v0.AddArg(v1)
  2490  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2491  		v2.AddArg(y)
  2492  		v0.AddArg(v2)
  2493  		v.AddArg(v0)
  2494  		return true
  2495  	}
  2496  }
  2497  func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
  2498  	b := v.Block
  2499  	_ = b
  2500  	// match: (Leq32 x y)
  2501  	// cond:
  2502  	// result: (LessEqual (CMPW x y))
  2503  	for {
  2504  		_ = v.Args[1]
  2505  		x := v.Args[0]
  2506  		y := v.Args[1]
  2507  		v.reset(OpPPC64LessEqual)
  2508  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2509  		v0.AddArg(x)
  2510  		v0.AddArg(y)
  2511  		v.AddArg(v0)
  2512  		return true
  2513  	}
  2514  }
  2515  func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
  2516  	b := v.Block
  2517  	_ = b
  2518  	// match: (Leq32F x y)
  2519  	// cond:
  2520  	// result: (FLessEqual (FCMPU x y))
  2521  	for {
  2522  		_ = v.Args[1]
  2523  		x := v.Args[0]
  2524  		y := v.Args[1]
  2525  		v.reset(OpPPC64FLessEqual)
  2526  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2527  		v0.AddArg(x)
  2528  		v0.AddArg(y)
  2529  		v.AddArg(v0)
  2530  		return true
  2531  	}
  2532  }
  2533  func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
  2534  	b := v.Block
  2535  	_ = b
  2536  	// match: (Leq32U x y)
  2537  	// cond:
  2538  	// result: (LessEqual (CMPWU x y))
  2539  	for {
  2540  		_ = v.Args[1]
  2541  		x := v.Args[0]
  2542  		y := v.Args[1]
  2543  		v.reset(OpPPC64LessEqual)
  2544  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2545  		v0.AddArg(x)
  2546  		v0.AddArg(y)
  2547  		v.AddArg(v0)
  2548  		return true
  2549  	}
  2550  }
  2551  func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
  2552  	b := v.Block
  2553  	_ = b
  2554  	// match: (Leq64 x y)
  2555  	// cond:
  2556  	// result: (LessEqual (CMP x y))
  2557  	for {
  2558  		_ = v.Args[1]
  2559  		x := v.Args[0]
  2560  		y := v.Args[1]
  2561  		v.reset(OpPPC64LessEqual)
  2562  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2563  		v0.AddArg(x)
  2564  		v0.AddArg(y)
  2565  		v.AddArg(v0)
  2566  		return true
  2567  	}
  2568  }
  2569  func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
  2570  	b := v.Block
  2571  	_ = b
  2572  	// match: (Leq64F x y)
  2573  	// cond:
  2574  	// result: (FLessEqual (FCMPU x y))
  2575  	for {
  2576  		_ = v.Args[1]
  2577  		x := v.Args[0]
  2578  		y := v.Args[1]
  2579  		v.reset(OpPPC64FLessEqual)
  2580  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2581  		v0.AddArg(x)
  2582  		v0.AddArg(y)
  2583  		v.AddArg(v0)
  2584  		return true
  2585  	}
  2586  }
  2587  func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
  2588  	b := v.Block
  2589  	_ = b
  2590  	// match: (Leq64U x y)
  2591  	// cond:
  2592  	// result: (LessEqual (CMPU x y))
  2593  	for {
  2594  		_ = v.Args[1]
  2595  		x := v.Args[0]
  2596  		y := v.Args[1]
  2597  		v.reset(OpPPC64LessEqual)
  2598  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2599  		v0.AddArg(x)
  2600  		v0.AddArg(y)
  2601  		v.AddArg(v0)
  2602  		return true
  2603  	}
  2604  }
  2605  func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
  2606  	b := v.Block
  2607  	_ = b
  2608  	typ := &b.Func.Config.Types
  2609  	_ = typ
  2610  	// match: (Leq8 x y)
  2611  	// cond:
  2612  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2613  	for {
  2614  		_ = v.Args[1]
  2615  		x := v.Args[0]
  2616  		y := v.Args[1]
  2617  		v.reset(OpPPC64LessEqual)
  2618  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2619  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2620  		v1.AddArg(x)
  2621  		v0.AddArg(v1)
  2622  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2623  		v2.AddArg(y)
  2624  		v0.AddArg(v2)
  2625  		v.AddArg(v0)
  2626  		return true
  2627  	}
  2628  }
  2629  func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
  2630  	b := v.Block
  2631  	_ = b
  2632  	typ := &b.Func.Config.Types
  2633  	_ = typ
  2634  	// match: (Leq8U x y)
  2635  	// cond:
  2636  	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2637  	for {
  2638  		_ = v.Args[1]
  2639  		x := v.Args[0]
  2640  		y := v.Args[1]
  2641  		v.reset(OpPPC64LessEqual)
  2642  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2643  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2644  		v1.AddArg(x)
  2645  		v0.AddArg(v1)
  2646  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2647  		v2.AddArg(y)
  2648  		v0.AddArg(v2)
  2649  		v.AddArg(v0)
  2650  		return true
  2651  	}
  2652  }
  2653  func rewriteValuePPC64_OpLess16_0(v *Value) bool {
  2654  	b := v.Block
  2655  	_ = b
  2656  	typ := &b.Func.Config.Types
  2657  	_ = typ
  2658  	// match: (Less16 x y)
  2659  	// cond:
  2660  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2661  	for {
  2662  		_ = v.Args[1]
  2663  		x := v.Args[0]
  2664  		y := v.Args[1]
  2665  		v.reset(OpPPC64LessThan)
  2666  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2667  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2668  		v1.AddArg(x)
  2669  		v0.AddArg(v1)
  2670  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2671  		v2.AddArg(y)
  2672  		v0.AddArg(v2)
  2673  		v.AddArg(v0)
  2674  		return true
  2675  	}
  2676  }
  2677  func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
  2678  	b := v.Block
  2679  	_ = b
  2680  	typ := &b.Func.Config.Types
  2681  	_ = typ
  2682  	// match: (Less16U x y)
  2683  	// cond:
  2684  	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2685  	for {
  2686  		_ = v.Args[1]
  2687  		x := v.Args[0]
  2688  		y := v.Args[1]
  2689  		v.reset(OpPPC64LessThan)
  2690  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2691  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2692  		v1.AddArg(x)
  2693  		v0.AddArg(v1)
  2694  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2695  		v2.AddArg(y)
  2696  		v0.AddArg(v2)
  2697  		v.AddArg(v0)
  2698  		return true
  2699  	}
  2700  }
  2701  func rewriteValuePPC64_OpLess32_0(v *Value) bool {
  2702  	b := v.Block
  2703  	_ = b
  2704  	// match: (Less32 x y)
  2705  	// cond:
  2706  	// result: (LessThan (CMPW x y))
  2707  	for {
  2708  		_ = v.Args[1]
  2709  		x := v.Args[0]
  2710  		y := v.Args[1]
  2711  		v.reset(OpPPC64LessThan)
  2712  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2713  		v0.AddArg(x)
  2714  		v0.AddArg(y)
  2715  		v.AddArg(v0)
  2716  		return true
  2717  	}
  2718  }
  2719  func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
  2720  	b := v.Block
  2721  	_ = b
  2722  	// match: (Less32F x y)
  2723  	// cond:
  2724  	// result: (FLessThan (FCMPU x y))
  2725  	for {
  2726  		_ = v.Args[1]
  2727  		x := v.Args[0]
  2728  		y := v.Args[1]
  2729  		v.reset(OpPPC64FLessThan)
  2730  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2731  		v0.AddArg(x)
  2732  		v0.AddArg(y)
  2733  		v.AddArg(v0)
  2734  		return true
  2735  	}
  2736  }
  2737  func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
  2738  	b := v.Block
  2739  	_ = b
  2740  	// match: (Less32U x y)
  2741  	// cond:
  2742  	// result: (LessThan (CMPWU x y))
  2743  	for {
  2744  		_ = v.Args[1]
  2745  		x := v.Args[0]
  2746  		y := v.Args[1]
  2747  		v.reset(OpPPC64LessThan)
  2748  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2749  		v0.AddArg(x)
  2750  		v0.AddArg(y)
  2751  		v.AddArg(v0)
  2752  		return true
  2753  	}
  2754  }
  2755  func rewriteValuePPC64_OpLess64_0(v *Value) bool {
  2756  	b := v.Block
  2757  	_ = b
  2758  	// match: (Less64 x y)
  2759  	// cond:
  2760  	// result: (LessThan (CMP x y))
  2761  	for {
  2762  		_ = v.Args[1]
  2763  		x := v.Args[0]
  2764  		y := v.Args[1]
  2765  		v.reset(OpPPC64LessThan)
  2766  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2767  		v0.AddArg(x)
  2768  		v0.AddArg(y)
  2769  		v.AddArg(v0)
  2770  		return true
  2771  	}
  2772  }
  2773  func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
  2774  	b := v.Block
  2775  	_ = b
  2776  	// match: (Less64F x y)
  2777  	// cond:
  2778  	// result: (FLessThan (FCMPU x y))
  2779  	for {
  2780  		_ = v.Args[1]
  2781  		x := v.Args[0]
  2782  		y := v.Args[1]
  2783  		v.reset(OpPPC64FLessThan)
  2784  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2785  		v0.AddArg(x)
  2786  		v0.AddArg(y)
  2787  		v.AddArg(v0)
  2788  		return true
  2789  	}
  2790  }
  2791  func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
  2792  	b := v.Block
  2793  	_ = b
  2794  	// match: (Less64U x y)
  2795  	// cond:
  2796  	// result: (LessThan (CMPU x y))
  2797  	for {
  2798  		_ = v.Args[1]
  2799  		x := v.Args[0]
  2800  		y := v.Args[1]
  2801  		v.reset(OpPPC64LessThan)
  2802  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2803  		v0.AddArg(x)
  2804  		v0.AddArg(y)
  2805  		v.AddArg(v0)
  2806  		return true
  2807  	}
  2808  }
  2809  func rewriteValuePPC64_OpLess8_0(v *Value) bool {
  2810  	b := v.Block
  2811  	_ = b
  2812  	typ := &b.Func.Config.Types
  2813  	_ = typ
  2814  	// match: (Less8 x y)
  2815  	// cond:
  2816  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2817  	for {
  2818  		_ = v.Args[1]
  2819  		x := v.Args[0]
  2820  		y := v.Args[1]
  2821  		v.reset(OpPPC64LessThan)
  2822  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2823  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2824  		v1.AddArg(x)
  2825  		v0.AddArg(v1)
  2826  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2827  		v2.AddArg(y)
  2828  		v0.AddArg(v2)
  2829  		v.AddArg(v0)
  2830  		return true
  2831  	}
  2832  }
  2833  func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
  2834  	b := v.Block
  2835  	_ = b
  2836  	typ := &b.Func.Config.Types
  2837  	_ = typ
  2838  	// match: (Less8U x y)
  2839  	// cond:
  2840  	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2841  	for {
  2842  		_ = v.Args[1]
  2843  		x := v.Args[0]
  2844  		y := v.Args[1]
  2845  		v.reset(OpPPC64LessThan)
  2846  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2847  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2848  		v1.AddArg(x)
  2849  		v0.AddArg(v1)
  2850  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2851  		v2.AddArg(y)
  2852  		v0.AddArg(v2)
  2853  		v.AddArg(v0)
  2854  		return true
  2855  	}
  2856  }
  2857  func rewriteValuePPC64_OpLoad_0(v *Value) bool {
  2858  	b := v.Block
  2859  	_ = b
  2860  	typ := &b.Func.Config.Types
  2861  	_ = typ
  2862  	// match: (Load <t> ptr mem)
  2863  	// cond: (is64BitInt(t) || isPtr(t))
  2864  	// result: (MOVDload ptr mem)
  2865  	for {
  2866  		t := v.Type
  2867  		_ = v.Args[1]
  2868  		ptr := v.Args[0]
  2869  		mem := v.Args[1]
  2870  		if !(is64BitInt(t) || isPtr(t)) {
  2871  			break
  2872  		}
  2873  		v.reset(OpPPC64MOVDload)
  2874  		v.AddArg(ptr)
  2875  		v.AddArg(mem)
  2876  		return true
  2877  	}
  2878  	// match: (Load <t> ptr mem)
  2879  	// cond: is32BitInt(t) && isSigned(t)
  2880  	// result: (MOVWload ptr mem)
  2881  	for {
  2882  		t := v.Type
  2883  		_ = v.Args[1]
  2884  		ptr := v.Args[0]
  2885  		mem := v.Args[1]
  2886  		if !(is32BitInt(t) && isSigned(t)) {
  2887  			break
  2888  		}
  2889  		v.reset(OpPPC64MOVWload)
  2890  		v.AddArg(ptr)
  2891  		v.AddArg(mem)
  2892  		return true
  2893  	}
  2894  	// match: (Load <t> ptr mem)
  2895  	// cond: is32BitInt(t) && !isSigned(t)
  2896  	// result: (MOVWZload ptr mem)
  2897  	for {
  2898  		t := v.Type
  2899  		_ = v.Args[1]
  2900  		ptr := v.Args[0]
  2901  		mem := v.Args[1]
  2902  		if !(is32BitInt(t) && !isSigned(t)) {
  2903  			break
  2904  		}
  2905  		v.reset(OpPPC64MOVWZload)
  2906  		v.AddArg(ptr)
  2907  		v.AddArg(mem)
  2908  		return true
  2909  	}
  2910  	// match: (Load <t> ptr mem)
  2911  	// cond: is16BitInt(t) && isSigned(t)
  2912  	// result: (MOVHload ptr mem)
  2913  	for {
  2914  		t := v.Type
  2915  		_ = v.Args[1]
  2916  		ptr := v.Args[0]
  2917  		mem := v.Args[1]
  2918  		if !(is16BitInt(t) && isSigned(t)) {
  2919  			break
  2920  		}
  2921  		v.reset(OpPPC64MOVHload)
  2922  		v.AddArg(ptr)
  2923  		v.AddArg(mem)
  2924  		return true
  2925  	}
  2926  	// match: (Load <t> ptr mem)
  2927  	// cond: is16BitInt(t) && !isSigned(t)
  2928  	// result: (MOVHZload ptr mem)
  2929  	for {
  2930  		t := v.Type
  2931  		_ = v.Args[1]
  2932  		ptr := v.Args[0]
  2933  		mem := v.Args[1]
  2934  		if !(is16BitInt(t) && !isSigned(t)) {
  2935  			break
  2936  		}
  2937  		v.reset(OpPPC64MOVHZload)
  2938  		v.AddArg(ptr)
  2939  		v.AddArg(mem)
  2940  		return true
  2941  	}
  2942  	// match: (Load <t> ptr mem)
  2943  	// cond: t.IsBoolean()
  2944  	// result: (MOVBZload ptr mem)
  2945  	for {
  2946  		t := v.Type
  2947  		_ = v.Args[1]
  2948  		ptr := v.Args[0]
  2949  		mem := v.Args[1]
  2950  		if !(t.IsBoolean()) {
  2951  			break
  2952  		}
  2953  		v.reset(OpPPC64MOVBZload)
  2954  		v.AddArg(ptr)
  2955  		v.AddArg(mem)
  2956  		return true
  2957  	}
  2958  	// match: (Load <t> ptr mem)
  2959  	// cond: is8BitInt(t) && isSigned(t)
  2960  	// result: (MOVBreg (MOVBZload ptr mem))
  2961  	for {
  2962  		t := v.Type
  2963  		_ = v.Args[1]
  2964  		ptr := v.Args[0]
  2965  		mem := v.Args[1]
  2966  		if !(is8BitInt(t) && isSigned(t)) {
  2967  			break
  2968  		}
  2969  		v.reset(OpPPC64MOVBreg)
  2970  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  2971  		v0.AddArg(ptr)
  2972  		v0.AddArg(mem)
  2973  		v.AddArg(v0)
  2974  		return true
  2975  	}
  2976  	// match: (Load <t> ptr mem)
  2977  	// cond: is8BitInt(t) && !isSigned(t)
  2978  	// result: (MOVBZload ptr mem)
  2979  	for {
  2980  		t := v.Type
  2981  		_ = v.Args[1]
  2982  		ptr := v.Args[0]
  2983  		mem := v.Args[1]
  2984  		if !(is8BitInt(t) && !isSigned(t)) {
  2985  			break
  2986  		}
  2987  		v.reset(OpPPC64MOVBZload)
  2988  		v.AddArg(ptr)
  2989  		v.AddArg(mem)
  2990  		return true
  2991  	}
  2992  	// match: (Load <t> ptr mem)
  2993  	// cond: is32BitFloat(t)
  2994  	// result: (FMOVSload ptr mem)
  2995  	for {
  2996  		t := v.Type
  2997  		_ = v.Args[1]
  2998  		ptr := v.Args[0]
  2999  		mem := v.Args[1]
  3000  		if !(is32BitFloat(t)) {
  3001  			break
  3002  		}
  3003  		v.reset(OpPPC64FMOVSload)
  3004  		v.AddArg(ptr)
  3005  		v.AddArg(mem)
  3006  		return true
  3007  	}
  3008  	// match: (Load <t> ptr mem)
  3009  	// cond: is64BitFloat(t)
  3010  	// result: (FMOVDload ptr mem)
  3011  	for {
  3012  		t := v.Type
  3013  		_ = v.Args[1]
  3014  		ptr := v.Args[0]
  3015  		mem := v.Args[1]
  3016  		if !(is64BitFloat(t)) {
  3017  			break
  3018  		}
  3019  		v.reset(OpPPC64FMOVDload)
  3020  		v.AddArg(ptr)
  3021  		v.AddArg(mem)
  3022  		return true
  3023  	}
  3024  	return false
  3025  }
  3026  func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
  3027  	b := v.Block
  3028  	_ = b
  3029  	typ := &b.Func.Config.Types
  3030  	_ = typ
  3031  	// match: (Lsh16x16 x y)
  3032  	// cond:
  3033  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
  3034  	for {
  3035  		_ = v.Args[1]
  3036  		x := v.Args[0]
  3037  		y := v.Args[1]
  3038  		v.reset(OpPPC64SLW)
  3039  		v.AddArg(x)
  3040  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3041  		v0.AddArg(y)
  3042  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3043  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3044  		v2.AuxInt = -16
  3045  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3046  		v3.AddArg(y)
  3047  		v2.AddArg(v3)
  3048  		v1.AddArg(v2)
  3049  		v0.AddArg(v1)
  3050  		v.AddArg(v0)
  3051  		return true
  3052  	}
  3053  }
  3054  func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
  3055  	b := v.Block
  3056  	_ = b
  3057  	typ := &b.Func.Config.Types
  3058  	_ = typ
  3059  	// match: (Lsh16x32 x (Const64 [c]))
  3060  	// cond: uint32(c) < 16
  3061  	// result: (SLWconst x [c])
  3062  	for {
  3063  		_ = v.Args[1]
  3064  		x := v.Args[0]
  3065  		v_1 := v.Args[1]
  3066  		if v_1.Op != OpConst64 {
  3067  			break
  3068  		}
  3069  		c := v_1.AuxInt
  3070  		if !(uint32(c) < 16) {
  3071  			break
  3072  		}
  3073  		v.reset(OpPPC64SLWconst)
  3074  		v.AuxInt = c
  3075  		v.AddArg(x)
  3076  		return true
  3077  	}
  3078  	// match: (Lsh16x32 x (MOVDconst [c]))
  3079  	// cond: uint32(c) < 16
  3080  	// result: (SLWconst x [c])
  3081  	for {
  3082  		_ = v.Args[1]
  3083  		x := v.Args[0]
  3084  		v_1 := v.Args[1]
  3085  		if v_1.Op != OpPPC64MOVDconst {
  3086  			break
  3087  		}
  3088  		c := v_1.AuxInt
  3089  		if !(uint32(c) < 16) {
  3090  			break
  3091  		}
  3092  		v.reset(OpPPC64SLWconst)
  3093  		v.AuxInt = c
  3094  		v.AddArg(x)
  3095  		return true
  3096  	}
  3097  	// match: (Lsh16x32 x y)
  3098  	// cond:
  3099  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
  3100  	for {
  3101  		_ = v.Args[1]
  3102  		x := v.Args[0]
  3103  		y := v.Args[1]
  3104  		v.reset(OpPPC64SLW)
  3105  		v.AddArg(x)
  3106  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3107  		v0.AddArg(y)
  3108  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3109  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3110  		v2.AuxInt = -16
  3111  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3112  		v3.AddArg(y)
  3113  		v2.AddArg(v3)
  3114  		v1.AddArg(v2)
  3115  		v0.AddArg(v1)
  3116  		v.AddArg(v0)
  3117  		return true
  3118  	}
  3119  }
  3120  func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
  3121  	b := v.Block
  3122  	_ = b
  3123  	typ := &b.Func.Config.Types
  3124  	_ = typ
  3125  	// match: (Lsh16x64 x (Const64 [c]))
  3126  	// cond: uint64(c) < 16
  3127  	// result: (SLWconst x [c])
  3128  	for {
  3129  		_ = v.Args[1]
  3130  		x := v.Args[0]
  3131  		v_1 := v.Args[1]
  3132  		if v_1.Op != OpConst64 {
  3133  			break
  3134  		}
  3135  		c := v_1.AuxInt
  3136  		if !(uint64(c) < 16) {
  3137  			break
  3138  		}
  3139  		v.reset(OpPPC64SLWconst)
  3140  		v.AuxInt = c
  3141  		v.AddArg(x)
  3142  		return true
  3143  	}
  3144  	// match: (Lsh16x64 _ (Const64 [c]))
  3145  	// cond: uint64(c) >= 16
  3146  	// result: (MOVDconst [0])
  3147  	for {
  3148  		_ = v.Args[1]
  3149  		v_1 := v.Args[1]
  3150  		if v_1.Op != OpConst64 {
  3151  			break
  3152  		}
  3153  		c := v_1.AuxInt
  3154  		if !(uint64(c) >= 16) {
  3155  			break
  3156  		}
  3157  		v.reset(OpPPC64MOVDconst)
  3158  		v.AuxInt = 0
  3159  		return true
  3160  	}
  3161  	// match: (Lsh16x64 x (MOVDconst [c]))
  3162  	// cond: uint64(c) < 16
  3163  	// result: (SLWconst x [c])
  3164  	for {
  3165  		_ = v.Args[1]
  3166  		x := v.Args[0]
  3167  		v_1 := v.Args[1]
  3168  		if v_1.Op != OpPPC64MOVDconst {
  3169  			break
  3170  		}
  3171  		c := v_1.AuxInt
  3172  		if !(uint64(c) < 16) {
  3173  			break
  3174  		}
  3175  		v.reset(OpPPC64SLWconst)
  3176  		v.AuxInt = c
  3177  		v.AddArg(x)
  3178  		return true
  3179  	}
  3180  	// match: (Lsh16x64 x y)
  3181  	// cond:
  3182  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
  3183  	for {
  3184  		_ = v.Args[1]
  3185  		x := v.Args[0]
  3186  		y := v.Args[1]
  3187  		v.reset(OpPPC64SLW)
  3188  		v.AddArg(x)
  3189  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3190  		v0.AddArg(y)
  3191  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3192  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3193  		v2.AuxInt = -16
  3194  		v2.AddArg(y)
  3195  		v1.AddArg(v2)
  3196  		v0.AddArg(v1)
  3197  		v.AddArg(v0)
  3198  		return true
  3199  	}
  3200  }
  3201  func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
  3202  	b := v.Block
  3203  	_ = b
  3204  	typ := &b.Func.Config.Types
  3205  	_ = typ
  3206  	// match: (Lsh16x8 x y)
  3207  	// cond:
  3208  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
  3209  	for {
  3210  		_ = v.Args[1]
  3211  		x := v.Args[0]
  3212  		y := v.Args[1]
  3213  		v.reset(OpPPC64SLW)
  3214  		v.AddArg(x)
  3215  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3216  		v0.AddArg(y)
  3217  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3218  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3219  		v2.AuxInt = -16
  3220  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3221  		v3.AddArg(y)
  3222  		v2.AddArg(v3)
  3223  		v1.AddArg(v2)
  3224  		v0.AddArg(v1)
  3225  		v.AddArg(v0)
  3226  		return true
  3227  	}
  3228  }
  3229  func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
  3230  	b := v.Block
  3231  	_ = b
  3232  	typ := &b.Func.Config.Types
  3233  	_ = typ
  3234  	// match: (Lsh32x16 x y)
  3235  	// cond:
  3236  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
  3237  	for {
  3238  		_ = v.Args[1]
  3239  		x := v.Args[0]
  3240  		y := v.Args[1]
  3241  		v.reset(OpPPC64SLW)
  3242  		v.AddArg(x)
  3243  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3244  		v0.AddArg(y)
  3245  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3246  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3247  		v2.AuxInt = -32
  3248  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3249  		v3.AddArg(y)
  3250  		v2.AddArg(v3)
  3251  		v1.AddArg(v2)
  3252  		v0.AddArg(v1)
  3253  		v.AddArg(v0)
  3254  		return true
  3255  	}
  3256  }
  3257  func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
  3258  	b := v.Block
  3259  	_ = b
  3260  	typ := &b.Func.Config.Types
  3261  	_ = typ
  3262  	// match: (Lsh32x32 x (Const64 [c]))
  3263  	// cond: uint32(c) < 32
  3264  	// result: (SLWconst x [c])
  3265  	for {
  3266  		_ = v.Args[1]
  3267  		x := v.Args[0]
  3268  		v_1 := v.Args[1]
  3269  		if v_1.Op != OpConst64 {
  3270  			break
  3271  		}
  3272  		c := v_1.AuxInt
  3273  		if !(uint32(c) < 32) {
  3274  			break
  3275  		}
  3276  		v.reset(OpPPC64SLWconst)
  3277  		v.AuxInt = c
  3278  		v.AddArg(x)
  3279  		return true
  3280  	}
  3281  	// match: (Lsh32x32 x (MOVDconst [c]))
  3282  	// cond: uint32(c) < 32
  3283  	// result: (SLWconst x [c])
  3284  	for {
  3285  		_ = v.Args[1]
  3286  		x := v.Args[0]
  3287  		v_1 := v.Args[1]
  3288  		if v_1.Op != OpPPC64MOVDconst {
  3289  			break
  3290  		}
  3291  		c := v_1.AuxInt
  3292  		if !(uint32(c) < 32) {
  3293  			break
  3294  		}
  3295  		v.reset(OpPPC64SLWconst)
  3296  		v.AuxInt = c
  3297  		v.AddArg(x)
  3298  		return true
  3299  	}
  3300  	// match: (Lsh32x32 x y)
  3301  	// cond:
  3302  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
  3303  	for {
  3304  		_ = v.Args[1]
  3305  		x := v.Args[0]
  3306  		y := v.Args[1]
  3307  		v.reset(OpPPC64SLW)
  3308  		v.AddArg(x)
  3309  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3310  		v0.AddArg(y)
  3311  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3312  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3313  		v2.AuxInt = -32
  3314  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3315  		v3.AddArg(y)
  3316  		v2.AddArg(v3)
  3317  		v1.AddArg(v2)
  3318  		v0.AddArg(v1)
  3319  		v.AddArg(v0)
  3320  		return true
  3321  	}
  3322  }
  3323  func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
  3324  	b := v.Block
  3325  	_ = b
  3326  	typ := &b.Func.Config.Types
  3327  	_ = typ
  3328  	// match: (Lsh32x64 x (Const64 [c]))
  3329  	// cond: uint64(c) < 32
  3330  	// result: (SLWconst x [c])
  3331  	for {
  3332  		_ = v.Args[1]
  3333  		x := v.Args[0]
  3334  		v_1 := v.Args[1]
  3335  		if v_1.Op != OpConst64 {
  3336  			break
  3337  		}
  3338  		c := v_1.AuxInt
  3339  		if !(uint64(c) < 32) {
  3340  			break
  3341  		}
  3342  		v.reset(OpPPC64SLWconst)
  3343  		v.AuxInt = c
  3344  		v.AddArg(x)
  3345  		return true
  3346  	}
  3347  	// match: (Lsh32x64 _ (Const64 [c]))
  3348  	// cond: uint64(c) >= 32
  3349  	// result: (MOVDconst [0])
  3350  	for {
  3351  		_ = v.Args[1]
  3352  		v_1 := v.Args[1]
  3353  		if v_1.Op != OpConst64 {
  3354  			break
  3355  		}
  3356  		c := v_1.AuxInt
  3357  		if !(uint64(c) >= 32) {
  3358  			break
  3359  		}
  3360  		v.reset(OpPPC64MOVDconst)
  3361  		v.AuxInt = 0
  3362  		return true
  3363  	}
  3364  	// match: (Lsh32x64 x (MOVDconst [c]))
  3365  	// cond: uint64(c) < 32
  3366  	// result: (SLWconst x [c])
  3367  	for {
  3368  		_ = v.Args[1]
  3369  		x := v.Args[0]
  3370  		v_1 := v.Args[1]
  3371  		if v_1.Op != OpPPC64MOVDconst {
  3372  			break
  3373  		}
  3374  		c := v_1.AuxInt
  3375  		if !(uint64(c) < 32) {
  3376  			break
  3377  		}
  3378  		v.reset(OpPPC64SLWconst)
  3379  		v.AuxInt = c
  3380  		v.AddArg(x)
  3381  		return true
  3382  	}
  3383  	// match: (Lsh32x64 x (AND y (MOVDconst [31])))
  3384  	// cond:
  3385  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3386  	for {
  3387  		_ = v.Args[1]
  3388  		x := v.Args[0]
  3389  		v_1 := v.Args[1]
  3390  		if v_1.Op != OpPPC64AND {
  3391  			break
  3392  		}
  3393  		_ = v_1.Args[1]
  3394  		y := v_1.Args[0]
  3395  		v_1_1 := v_1.Args[1]
  3396  		if v_1_1.Op != OpPPC64MOVDconst {
  3397  			break
  3398  		}
  3399  		if v_1_1.AuxInt != 31 {
  3400  			break
  3401  		}
  3402  		v.reset(OpPPC64SLW)
  3403  		v.AddArg(x)
  3404  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3405  		v0.AuxInt = 31
  3406  		v0.AddArg(y)
  3407  		v.AddArg(v0)
  3408  		return true
  3409  	}
  3410  	// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
  3411  	// cond:
  3412  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3413  	for {
  3414  		_ = v.Args[1]
  3415  		x := v.Args[0]
  3416  		v_1 := v.Args[1]
  3417  		if v_1.Op != OpPPC64AND {
  3418  			break
  3419  		}
  3420  		_ = v_1.Args[1]
  3421  		v_1_0 := v_1.Args[0]
  3422  		if v_1_0.Op != OpPPC64MOVDconst {
  3423  			break
  3424  		}
  3425  		if v_1_0.AuxInt != 31 {
  3426  			break
  3427  		}
  3428  		y := v_1.Args[1]
  3429  		v.reset(OpPPC64SLW)
  3430  		v.AddArg(x)
  3431  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3432  		v0.AuxInt = 31
  3433  		v0.AddArg(y)
  3434  		v.AddArg(v0)
  3435  		return true
  3436  	}
  3437  	// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
  3438  	// cond:
  3439  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3440  	for {
  3441  		_ = v.Args[1]
  3442  		x := v.Args[0]
  3443  		v_1 := v.Args[1]
  3444  		if v_1.Op != OpPPC64ANDconst {
  3445  			break
  3446  		}
  3447  		if v_1.Type != typ.Int32 {
  3448  			break
  3449  		}
  3450  		if v_1.AuxInt != 31 {
  3451  			break
  3452  		}
  3453  		y := v_1.Args[0]
  3454  		v.reset(OpPPC64SLW)
  3455  		v.AddArg(x)
  3456  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3457  		v0.AuxInt = 31
  3458  		v0.AddArg(y)
  3459  		v.AddArg(v0)
  3460  		return true
  3461  	}
  3462  	// match: (Lsh32x64 x y)
  3463  	// cond:
  3464  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
  3465  	for {
  3466  		_ = v.Args[1]
  3467  		x := v.Args[0]
  3468  		y := v.Args[1]
  3469  		v.reset(OpPPC64SLW)
  3470  		v.AddArg(x)
  3471  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3472  		v0.AddArg(y)
  3473  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3474  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3475  		v2.AuxInt = -32
  3476  		v2.AddArg(y)
  3477  		v1.AddArg(v2)
  3478  		v0.AddArg(v1)
  3479  		v.AddArg(v0)
  3480  		return true
  3481  	}
  3482  }
  3483  func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
  3484  	b := v.Block
  3485  	_ = b
  3486  	typ := &b.Func.Config.Types
  3487  	_ = typ
  3488  	// match: (Lsh32x8 x y)
  3489  	// cond:
  3490  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
  3491  	for {
  3492  		_ = v.Args[1]
  3493  		x := v.Args[0]
  3494  		y := v.Args[1]
  3495  		v.reset(OpPPC64SLW)
  3496  		v.AddArg(x)
  3497  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3498  		v0.AddArg(y)
  3499  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3500  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3501  		v2.AuxInt = -32
  3502  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3503  		v3.AddArg(y)
  3504  		v2.AddArg(v3)
  3505  		v1.AddArg(v2)
  3506  		v0.AddArg(v1)
  3507  		v.AddArg(v0)
  3508  		return true
  3509  	}
  3510  }
  3511  func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
  3512  	b := v.Block
  3513  	_ = b
  3514  	typ := &b.Func.Config.Types
  3515  	_ = typ
  3516  	// match: (Lsh64x16 x y)
  3517  	// cond:
  3518  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
  3519  	for {
  3520  		_ = v.Args[1]
  3521  		x := v.Args[0]
  3522  		y := v.Args[1]
  3523  		v.reset(OpPPC64SLD)
  3524  		v.AddArg(x)
  3525  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3526  		v0.AddArg(y)
  3527  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3528  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3529  		v2.AuxInt = -64
  3530  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3531  		v3.AddArg(y)
  3532  		v2.AddArg(v3)
  3533  		v1.AddArg(v2)
  3534  		v0.AddArg(v1)
  3535  		v.AddArg(v0)
  3536  		return true
  3537  	}
  3538  }
  3539  func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
  3540  	b := v.Block
  3541  	_ = b
  3542  	typ := &b.Func.Config.Types
  3543  	_ = typ
  3544  	// match: (Lsh64x32 x (Const64 [c]))
  3545  	// cond: uint32(c) < 64
  3546  	// result: (SLDconst x [c])
  3547  	for {
  3548  		_ = v.Args[1]
  3549  		x := v.Args[0]
  3550  		v_1 := v.Args[1]
  3551  		if v_1.Op != OpConst64 {
  3552  			break
  3553  		}
  3554  		c := v_1.AuxInt
  3555  		if !(uint32(c) < 64) {
  3556  			break
  3557  		}
  3558  		v.reset(OpPPC64SLDconst)
  3559  		v.AuxInt = c
  3560  		v.AddArg(x)
  3561  		return true
  3562  	}
  3563  	// match: (Lsh64x32 x (MOVDconst [c]))
  3564  	// cond: uint32(c) < 64
  3565  	// result: (SLDconst x [c])
  3566  	for {
  3567  		_ = v.Args[1]
  3568  		x := v.Args[0]
  3569  		v_1 := v.Args[1]
  3570  		if v_1.Op != OpPPC64MOVDconst {
  3571  			break
  3572  		}
  3573  		c := v_1.AuxInt
  3574  		if !(uint32(c) < 64) {
  3575  			break
  3576  		}
  3577  		v.reset(OpPPC64SLDconst)
  3578  		v.AuxInt = c
  3579  		v.AddArg(x)
  3580  		return true
  3581  	}
  3582  	// match: (Lsh64x32 x y)
  3583  	// cond:
  3584  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
  3585  	for {
  3586  		_ = v.Args[1]
  3587  		x := v.Args[0]
  3588  		y := v.Args[1]
  3589  		v.reset(OpPPC64SLD)
  3590  		v.AddArg(x)
  3591  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3592  		v0.AddArg(y)
  3593  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3594  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3595  		v2.AuxInt = -64
  3596  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3597  		v3.AddArg(y)
  3598  		v2.AddArg(v3)
  3599  		v1.AddArg(v2)
  3600  		v0.AddArg(v1)
  3601  		v.AddArg(v0)
  3602  		return true
  3603  	}
  3604  }
  3605  func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
  3606  	b := v.Block
  3607  	_ = b
  3608  	typ := &b.Func.Config.Types
  3609  	_ = typ
  3610  	// match: (Lsh64x64 x (Const64 [c]))
  3611  	// cond: uint64(c) < 64
  3612  	// result: (SLDconst x [c])
  3613  	for {
  3614  		_ = v.Args[1]
  3615  		x := v.Args[0]
  3616  		v_1 := v.Args[1]
  3617  		if v_1.Op != OpConst64 {
  3618  			break
  3619  		}
  3620  		c := v_1.AuxInt
  3621  		if !(uint64(c) < 64) {
  3622  			break
  3623  		}
  3624  		v.reset(OpPPC64SLDconst)
  3625  		v.AuxInt = c
  3626  		v.AddArg(x)
  3627  		return true
  3628  	}
  3629  	// match: (Lsh64x64 _ (Const64 [c]))
  3630  	// cond: uint64(c) >= 64
  3631  	// result: (MOVDconst [0])
  3632  	for {
  3633  		_ = v.Args[1]
  3634  		v_1 := v.Args[1]
  3635  		if v_1.Op != OpConst64 {
  3636  			break
  3637  		}
  3638  		c := v_1.AuxInt
  3639  		if !(uint64(c) >= 64) {
  3640  			break
  3641  		}
  3642  		v.reset(OpPPC64MOVDconst)
  3643  		v.AuxInt = 0
  3644  		return true
  3645  	}
  3646  	// match: (Lsh64x64 x (MOVDconst [c]))
  3647  	// cond: uint64(c) < 64
  3648  	// result: (SLDconst x [c])
  3649  	for {
  3650  		_ = v.Args[1]
  3651  		x := v.Args[0]
  3652  		v_1 := v.Args[1]
  3653  		if v_1.Op != OpPPC64MOVDconst {
  3654  			break
  3655  		}
  3656  		c := v_1.AuxInt
  3657  		if !(uint64(c) < 64) {
  3658  			break
  3659  		}
  3660  		v.reset(OpPPC64SLDconst)
  3661  		v.AuxInt = c
  3662  		v.AddArg(x)
  3663  		return true
  3664  	}
  3665  	// match: (Lsh64x64 x (AND y (MOVDconst [63])))
  3666  	// cond:
  3667  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3668  	for {
  3669  		_ = v.Args[1]
  3670  		x := v.Args[0]
  3671  		v_1 := v.Args[1]
  3672  		if v_1.Op != OpPPC64AND {
  3673  			break
  3674  		}
  3675  		_ = v_1.Args[1]
  3676  		y := v_1.Args[0]
  3677  		v_1_1 := v_1.Args[1]
  3678  		if v_1_1.Op != OpPPC64MOVDconst {
  3679  			break
  3680  		}
  3681  		if v_1_1.AuxInt != 63 {
  3682  			break
  3683  		}
  3684  		v.reset(OpPPC64SLD)
  3685  		v.AddArg(x)
  3686  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3687  		v0.AuxInt = 63
  3688  		v0.AddArg(y)
  3689  		v.AddArg(v0)
  3690  		return true
  3691  	}
  3692  	// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
  3693  	// cond:
  3694  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3695  	for {
  3696  		_ = v.Args[1]
  3697  		x := v.Args[0]
  3698  		v_1 := v.Args[1]
  3699  		if v_1.Op != OpPPC64AND {
  3700  			break
  3701  		}
  3702  		_ = v_1.Args[1]
  3703  		v_1_0 := v_1.Args[0]
  3704  		if v_1_0.Op != OpPPC64MOVDconst {
  3705  			break
  3706  		}
  3707  		if v_1_0.AuxInt != 63 {
  3708  			break
  3709  		}
  3710  		y := v_1.Args[1]
  3711  		v.reset(OpPPC64SLD)
  3712  		v.AddArg(x)
  3713  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3714  		v0.AuxInt = 63
  3715  		v0.AddArg(y)
  3716  		v.AddArg(v0)
  3717  		return true
  3718  	}
  3719  	// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
  3720  	// cond:
  3721  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3722  	for {
  3723  		_ = v.Args[1]
  3724  		x := v.Args[0]
  3725  		v_1 := v.Args[1]
  3726  		if v_1.Op != OpPPC64ANDconst {
  3727  			break
  3728  		}
  3729  		if v_1.Type != typ.Int64 {
  3730  			break
  3731  		}
  3732  		if v_1.AuxInt != 63 {
  3733  			break
  3734  		}
  3735  		y := v_1.Args[0]
  3736  		v.reset(OpPPC64SLD)
  3737  		v.AddArg(x)
  3738  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3739  		v0.AuxInt = 63
  3740  		v0.AddArg(y)
  3741  		v.AddArg(v0)
  3742  		return true
  3743  	}
  3744  	// match: (Lsh64x64 x y)
  3745  	// cond:
  3746  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
  3747  	for {
  3748  		_ = v.Args[1]
  3749  		x := v.Args[0]
  3750  		y := v.Args[1]
  3751  		v.reset(OpPPC64SLD)
  3752  		v.AddArg(x)
  3753  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3754  		v0.AddArg(y)
  3755  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3756  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3757  		v2.AuxInt = -64
  3758  		v2.AddArg(y)
  3759  		v1.AddArg(v2)
  3760  		v0.AddArg(v1)
  3761  		v.AddArg(v0)
  3762  		return true
  3763  	}
  3764  }
  3765  func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
  3766  	b := v.Block
  3767  	_ = b
  3768  	typ := &b.Func.Config.Types
  3769  	_ = typ
  3770  	// match: (Lsh64x8 x y)
  3771  	// cond:
  3772  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
  3773  	for {
  3774  		_ = v.Args[1]
  3775  		x := v.Args[0]
  3776  		y := v.Args[1]
  3777  		v.reset(OpPPC64SLD)
  3778  		v.AddArg(x)
  3779  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3780  		v0.AddArg(y)
  3781  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3782  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3783  		v2.AuxInt = -64
  3784  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3785  		v3.AddArg(y)
  3786  		v2.AddArg(v3)
  3787  		v1.AddArg(v2)
  3788  		v0.AddArg(v1)
  3789  		v.AddArg(v0)
  3790  		return true
  3791  	}
  3792  }
  3793  func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
  3794  	b := v.Block
  3795  	_ = b
  3796  	typ := &b.Func.Config.Types
  3797  	_ = typ
  3798  	// match: (Lsh8x16 x y)
  3799  	// cond:
  3800  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
  3801  	for {
  3802  		_ = v.Args[1]
  3803  		x := v.Args[0]
  3804  		y := v.Args[1]
  3805  		v.reset(OpPPC64SLW)
  3806  		v.AddArg(x)
  3807  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3808  		v0.AddArg(y)
  3809  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3810  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3811  		v2.AuxInt = -8
  3812  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3813  		v3.AddArg(y)
  3814  		v2.AddArg(v3)
  3815  		v1.AddArg(v2)
  3816  		v0.AddArg(v1)
  3817  		v.AddArg(v0)
  3818  		return true
  3819  	}
  3820  }
  3821  func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
  3822  	b := v.Block
  3823  	_ = b
  3824  	typ := &b.Func.Config.Types
  3825  	_ = typ
  3826  	// match: (Lsh8x32 x (Const64 [c]))
  3827  	// cond: uint32(c) < 8
  3828  	// result: (SLWconst x [c])
  3829  	for {
  3830  		_ = v.Args[1]
  3831  		x := v.Args[0]
  3832  		v_1 := v.Args[1]
  3833  		if v_1.Op != OpConst64 {
  3834  			break
  3835  		}
  3836  		c := v_1.AuxInt
  3837  		if !(uint32(c) < 8) {
  3838  			break
  3839  		}
  3840  		v.reset(OpPPC64SLWconst)
  3841  		v.AuxInt = c
  3842  		v.AddArg(x)
  3843  		return true
  3844  	}
  3845  	// match: (Lsh8x32 x (MOVDconst [c]))
  3846  	// cond: uint32(c) < 8
  3847  	// result: (SLWconst x [c])
  3848  	for {
  3849  		_ = v.Args[1]
  3850  		x := v.Args[0]
  3851  		v_1 := v.Args[1]
  3852  		if v_1.Op != OpPPC64MOVDconst {
  3853  			break
  3854  		}
  3855  		c := v_1.AuxInt
  3856  		if !(uint32(c) < 8) {
  3857  			break
  3858  		}
  3859  		v.reset(OpPPC64SLWconst)
  3860  		v.AuxInt = c
  3861  		v.AddArg(x)
  3862  		return true
  3863  	}
  3864  	// match: (Lsh8x32 x y)
  3865  	// cond:
  3866  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
  3867  	for {
  3868  		_ = v.Args[1]
  3869  		x := v.Args[0]
  3870  		y := v.Args[1]
  3871  		v.reset(OpPPC64SLW)
  3872  		v.AddArg(x)
  3873  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3874  		v0.AddArg(y)
  3875  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3876  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3877  		v2.AuxInt = -8
  3878  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3879  		v3.AddArg(y)
  3880  		v2.AddArg(v3)
  3881  		v1.AddArg(v2)
  3882  		v0.AddArg(v1)
  3883  		v.AddArg(v0)
  3884  		return true
  3885  	}
  3886  }
  3887  func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
  3888  	b := v.Block
  3889  	_ = b
  3890  	typ := &b.Func.Config.Types
  3891  	_ = typ
  3892  	// match: (Lsh8x64 x (Const64 [c]))
  3893  	// cond: uint64(c) < 8
  3894  	// result: (SLWconst x [c])
  3895  	for {
  3896  		_ = v.Args[1]
  3897  		x := v.Args[0]
  3898  		v_1 := v.Args[1]
  3899  		if v_1.Op != OpConst64 {
  3900  			break
  3901  		}
  3902  		c := v_1.AuxInt
  3903  		if !(uint64(c) < 8) {
  3904  			break
  3905  		}
  3906  		v.reset(OpPPC64SLWconst)
  3907  		v.AuxInt = c
  3908  		v.AddArg(x)
  3909  		return true
  3910  	}
  3911  	// match: (Lsh8x64 _ (Const64 [c]))
  3912  	// cond: uint64(c) >= 8
  3913  	// result: (MOVDconst [0])
  3914  	for {
  3915  		_ = v.Args[1]
  3916  		v_1 := v.Args[1]
  3917  		if v_1.Op != OpConst64 {
  3918  			break
  3919  		}
  3920  		c := v_1.AuxInt
  3921  		if !(uint64(c) >= 8) {
  3922  			break
  3923  		}
  3924  		v.reset(OpPPC64MOVDconst)
  3925  		v.AuxInt = 0
  3926  		return true
  3927  	}
  3928  	// match: (Lsh8x64 x (MOVDconst [c]))
  3929  	// cond: uint64(c) < 8
  3930  	// result: (SLWconst x [c])
  3931  	for {
  3932  		_ = v.Args[1]
  3933  		x := v.Args[0]
  3934  		v_1 := v.Args[1]
  3935  		if v_1.Op != OpPPC64MOVDconst {
  3936  			break
  3937  		}
  3938  		c := v_1.AuxInt
  3939  		if !(uint64(c) < 8) {
  3940  			break
  3941  		}
  3942  		v.reset(OpPPC64SLWconst)
  3943  		v.AuxInt = c
  3944  		v.AddArg(x)
  3945  		return true
  3946  	}
  3947  	// match: (Lsh8x64 x y)
  3948  	// cond:
  3949  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
  3950  	for {
  3951  		_ = v.Args[1]
  3952  		x := v.Args[0]
  3953  		y := v.Args[1]
  3954  		v.reset(OpPPC64SLW)
  3955  		v.AddArg(x)
  3956  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3957  		v0.AddArg(y)
  3958  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3959  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3960  		v2.AuxInt = -8
  3961  		v2.AddArg(y)
  3962  		v1.AddArg(v2)
  3963  		v0.AddArg(v1)
  3964  		v.AddArg(v0)
  3965  		return true
  3966  	}
  3967  }
  3968  func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
  3969  	b := v.Block
  3970  	_ = b
  3971  	typ := &b.Func.Config.Types
  3972  	_ = typ
  3973  	// match: (Lsh8x8 x y)
  3974  	// cond:
  3975  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
  3976  	for {
  3977  		_ = v.Args[1]
  3978  		x := v.Args[0]
  3979  		y := v.Args[1]
  3980  		v.reset(OpPPC64SLW)
  3981  		v.AddArg(x)
  3982  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3983  		v0.AddArg(y)
  3984  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3985  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3986  		v2.AuxInt = -8
  3987  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3988  		v3.AddArg(y)
  3989  		v2.AddArg(v3)
  3990  		v1.AddArg(v2)
  3991  		v0.AddArg(v1)
  3992  		v.AddArg(v0)
  3993  		return true
  3994  	}
  3995  }
  3996  func rewriteValuePPC64_OpMod16_0(v *Value) bool {
  3997  	b := v.Block
  3998  	_ = b
  3999  	typ := &b.Func.Config.Types
  4000  	_ = typ
  4001  	// match: (Mod16 x y)
  4002  	// cond:
  4003  	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
  4004  	for {
  4005  		_ = v.Args[1]
  4006  		x := v.Args[0]
  4007  		y := v.Args[1]
  4008  		v.reset(OpMod32)
  4009  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4010  		v0.AddArg(x)
  4011  		v.AddArg(v0)
  4012  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4013  		v1.AddArg(y)
  4014  		v.AddArg(v1)
  4015  		return true
  4016  	}
  4017  }
  4018  func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
  4019  	b := v.Block
  4020  	_ = b
  4021  	typ := &b.Func.Config.Types
  4022  	_ = typ
  4023  	// match: (Mod16u x y)
  4024  	// cond:
  4025  	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
  4026  	for {
  4027  		_ = v.Args[1]
  4028  		x := v.Args[0]
  4029  		y := v.Args[1]
  4030  		v.reset(OpMod32u)
  4031  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4032  		v0.AddArg(x)
  4033  		v.AddArg(v0)
  4034  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4035  		v1.AddArg(y)
  4036  		v.AddArg(v1)
  4037  		return true
  4038  	}
  4039  }
  4040  func rewriteValuePPC64_OpMod32_0(v *Value) bool {
  4041  	b := v.Block
  4042  	_ = b
  4043  	typ := &b.Func.Config.Types
  4044  	_ = typ
  4045  	// match: (Mod32 x y)
  4046  	// cond:
  4047  	// result: (SUB x (MULLW y (DIVW x y)))
  4048  	for {
  4049  		_ = v.Args[1]
  4050  		x := v.Args[0]
  4051  		y := v.Args[1]
  4052  		v.reset(OpPPC64SUB)
  4053  		v.AddArg(x)
  4054  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4055  		v0.AddArg(y)
  4056  		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
  4057  		v1.AddArg(x)
  4058  		v1.AddArg(y)
  4059  		v0.AddArg(v1)
  4060  		v.AddArg(v0)
  4061  		return true
  4062  	}
  4063  }
  4064  func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
  4065  	b := v.Block
  4066  	_ = b
  4067  	typ := &b.Func.Config.Types
  4068  	_ = typ
  4069  	// match: (Mod32u x y)
  4070  	// cond:
  4071  	// result: (SUB x (MULLW y (DIVWU x y)))
  4072  	for {
  4073  		_ = v.Args[1]
  4074  		x := v.Args[0]
  4075  		y := v.Args[1]
  4076  		v.reset(OpPPC64SUB)
  4077  		v.AddArg(x)
  4078  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4079  		v0.AddArg(y)
  4080  		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
  4081  		v1.AddArg(x)
  4082  		v1.AddArg(y)
  4083  		v0.AddArg(v1)
  4084  		v.AddArg(v0)
  4085  		return true
  4086  	}
  4087  }
  4088  func rewriteValuePPC64_OpMod64_0(v *Value) bool {
  4089  	b := v.Block
  4090  	_ = b
  4091  	typ := &b.Func.Config.Types
  4092  	_ = typ
  4093  	// match: (Mod64 x y)
  4094  	// cond:
  4095  	// result: (SUB x (MULLD y (DIVD x y)))
  4096  	for {
  4097  		_ = v.Args[1]
  4098  		x := v.Args[0]
  4099  		y := v.Args[1]
  4100  		v.reset(OpPPC64SUB)
  4101  		v.AddArg(x)
  4102  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4103  		v0.AddArg(y)
  4104  		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
  4105  		v1.AddArg(x)
  4106  		v1.AddArg(y)
  4107  		v0.AddArg(v1)
  4108  		v.AddArg(v0)
  4109  		return true
  4110  	}
  4111  }
  4112  func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
  4113  	b := v.Block
  4114  	_ = b
  4115  	typ := &b.Func.Config.Types
  4116  	_ = typ
  4117  	// match: (Mod64u x y)
  4118  	// cond:
  4119  	// result: (SUB x (MULLD y (DIVDU x y)))
  4120  	for {
  4121  		_ = v.Args[1]
  4122  		x := v.Args[0]
  4123  		y := v.Args[1]
  4124  		v.reset(OpPPC64SUB)
  4125  		v.AddArg(x)
  4126  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4127  		v0.AddArg(y)
  4128  		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
  4129  		v1.AddArg(x)
  4130  		v1.AddArg(y)
  4131  		v0.AddArg(v1)
  4132  		v.AddArg(v0)
  4133  		return true
  4134  	}
  4135  }
  4136  func rewriteValuePPC64_OpMod8_0(v *Value) bool {
  4137  	b := v.Block
  4138  	_ = b
  4139  	typ := &b.Func.Config.Types
  4140  	_ = typ
  4141  	// match: (Mod8 x y)
  4142  	// cond:
  4143  	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
  4144  	for {
  4145  		_ = v.Args[1]
  4146  		x := v.Args[0]
  4147  		y := v.Args[1]
  4148  		v.reset(OpMod32)
  4149  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4150  		v0.AddArg(x)
  4151  		v.AddArg(v0)
  4152  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4153  		v1.AddArg(y)
  4154  		v.AddArg(v1)
  4155  		return true
  4156  	}
  4157  }
  4158  func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
  4159  	b := v.Block
  4160  	_ = b
  4161  	typ := &b.Func.Config.Types
  4162  	_ = typ
  4163  	// match: (Mod8u x y)
  4164  	// cond:
  4165  	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
  4166  	for {
  4167  		_ = v.Args[1]
  4168  		x := v.Args[0]
  4169  		y := v.Args[1]
  4170  		v.reset(OpMod32u)
  4171  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4172  		v0.AddArg(x)
  4173  		v.AddArg(v0)
  4174  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4175  		v1.AddArg(y)
  4176  		v.AddArg(v1)
  4177  		return true
  4178  	}
  4179  }
  4180  func rewriteValuePPC64_OpMove_0(v *Value) bool {
  4181  	b := v.Block
  4182  	_ = b
  4183  	typ := &b.Func.Config.Types
  4184  	_ = typ
  4185  	// match: (Move [0] _ _ mem)
  4186  	// cond:
  4187  	// result: mem
  4188  	for {
  4189  		if v.AuxInt != 0 {
  4190  			break
  4191  		}
  4192  		_ = v.Args[2]
  4193  		mem := v.Args[2]
  4194  		v.reset(OpCopy)
  4195  		v.Type = mem.Type
  4196  		v.AddArg(mem)
  4197  		return true
  4198  	}
  4199  	// match: (Move [1] dst src mem)
  4200  	// cond:
  4201  	// result: (MOVBstore dst (MOVBZload src mem) mem)
  4202  	for {
  4203  		if v.AuxInt != 1 {
  4204  			break
  4205  		}
  4206  		_ = v.Args[2]
  4207  		dst := v.Args[0]
  4208  		src := v.Args[1]
  4209  		mem := v.Args[2]
  4210  		v.reset(OpPPC64MOVBstore)
  4211  		v.AddArg(dst)
  4212  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4213  		v0.AddArg(src)
  4214  		v0.AddArg(mem)
  4215  		v.AddArg(v0)
  4216  		v.AddArg(mem)
  4217  		return true
  4218  	}
  4219  	// match: (Move [2] dst src mem)
  4220  	// cond:
  4221  	// result: (MOVHstore dst (MOVHZload src mem) mem)
  4222  	for {
  4223  		if v.AuxInt != 2 {
  4224  			break
  4225  		}
  4226  		_ = v.Args[2]
  4227  		dst := v.Args[0]
  4228  		src := v.Args[1]
  4229  		mem := v.Args[2]
  4230  		v.reset(OpPPC64MOVHstore)
  4231  		v.AddArg(dst)
  4232  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4233  		v0.AddArg(src)
  4234  		v0.AddArg(mem)
  4235  		v.AddArg(v0)
  4236  		v.AddArg(mem)
  4237  		return true
  4238  	}
  4239  	// match: (Move [4] dst src mem)
  4240  	// cond:
  4241  	// result: (MOVWstore dst (MOVWZload src mem) mem)
  4242  	for {
  4243  		if v.AuxInt != 4 {
  4244  			break
  4245  		}
  4246  		_ = v.Args[2]
  4247  		dst := v.Args[0]
  4248  		src := v.Args[1]
  4249  		mem := v.Args[2]
  4250  		v.reset(OpPPC64MOVWstore)
  4251  		v.AddArg(dst)
  4252  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4253  		v0.AddArg(src)
  4254  		v0.AddArg(mem)
  4255  		v.AddArg(v0)
  4256  		v.AddArg(mem)
  4257  		return true
  4258  	}
  4259  	// match: (Move [8] {t} dst src mem)
  4260  	// cond: t.(*types.Type).Alignment()%4 == 0
  4261  	// result: (MOVDstore dst (MOVDload src mem) mem)
  4262  	for {
  4263  		if v.AuxInt != 8 {
  4264  			break
  4265  		}
  4266  		t := v.Aux
  4267  		_ = v.Args[2]
  4268  		dst := v.Args[0]
  4269  		src := v.Args[1]
  4270  		mem := v.Args[2]
  4271  		if !(t.(*types.Type).Alignment()%4 == 0) {
  4272  			break
  4273  		}
  4274  		v.reset(OpPPC64MOVDstore)
  4275  		v.AddArg(dst)
  4276  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  4277  		v0.AddArg(src)
  4278  		v0.AddArg(mem)
  4279  		v.AddArg(v0)
  4280  		v.AddArg(mem)
  4281  		return true
  4282  	}
  4283  	// match: (Move [8] dst src mem)
  4284  	// cond:
  4285  	// result: (MOVWstore [4] dst (MOVWZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4286  	for {
  4287  		if v.AuxInt != 8 {
  4288  			break
  4289  		}
  4290  		_ = v.Args[2]
  4291  		dst := v.Args[0]
  4292  		src := v.Args[1]
  4293  		mem := v.Args[2]
  4294  		v.reset(OpPPC64MOVWstore)
  4295  		v.AuxInt = 4
  4296  		v.AddArg(dst)
  4297  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4298  		v0.AuxInt = 4
  4299  		v0.AddArg(src)
  4300  		v0.AddArg(mem)
  4301  		v.AddArg(v0)
  4302  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4303  		v1.AddArg(dst)
  4304  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4305  		v2.AddArg(src)
  4306  		v2.AddArg(mem)
  4307  		v1.AddArg(v2)
  4308  		v1.AddArg(mem)
  4309  		v.AddArg(v1)
  4310  		return true
  4311  	}
  4312  	// match: (Move [3] dst src mem)
  4313  	// cond:
  4314  	// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  4315  	for {
  4316  		if v.AuxInt != 3 {
  4317  			break
  4318  		}
  4319  		_ = v.Args[2]
  4320  		dst := v.Args[0]
  4321  		src := v.Args[1]
  4322  		mem := v.Args[2]
  4323  		v.reset(OpPPC64MOVBstore)
  4324  		v.AuxInt = 2
  4325  		v.AddArg(dst)
  4326  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4327  		v0.AuxInt = 2
  4328  		v0.AddArg(src)
  4329  		v0.AddArg(mem)
  4330  		v.AddArg(v0)
  4331  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4332  		v1.AddArg(dst)
  4333  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
  4334  		v2.AddArg(src)
  4335  		v2.AddArg(mem)
  4336  		v1.AddArg(v2)
  4337  		v1.AddArg(mem)
  4338  		v.AddArg(v1)
  4339  		return true
  4340  	}
  4341  	// match: (Move [5] dst src mem)
  4342  	// cond:
  4343  	// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4344  	for {
  4345  		if v.AuxInt != 5 {
  4346  			break
  4347  		}
  4348  		_ = v.Args[2]
  4349  		dst := v.Args[0]
  4350  		src := v.Args[1]
  4351  		mem := v.Args[2]
  4352  		v.reset(OpPPC64MOVBstore)
  4353  		v.AuxInt = 4
  4354  		v.AddArg(dst)
  4355  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4356  		v0.AuxInt = 4
  4357  		v0.AddArg(src)
  4358  		v0.AddArg(mem)
  4359  		v.AddArg(v0)
  4360  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4361  		v1.AddArg(dst)
  4362  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4363  		v2.AddArg(src)
  4364  		v2.AddArg(mem)
  4365  		v1.AddArg(v2)
  4366  		v1.AddArg(mem)
  4367  		v.AddArg(v1)
  4368  		return true
  4369  	}
  4370  	// match: (Move [6] dst src mem)
  4371  	// cond:
  4372  	// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4373  	for {
  4374  		if v.AuxInt != 6 {
  4375  			break
  4376  		}
  4377  		_ = v.Args[2]
  4378  		dst := v.Args[0]
  4379  		src := v.Args[1]
  4380  		mem := v.Args[2]
  4381  		v.reset(OpPPC64MOVHstore)
  4382  		v.AuxInt = 4
  4383  		v.AddArg(dst)
  4384  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4385  		v0.AuxInt = 4
  4386  		v0.AddArg(src)
  4387  		v0.AddArg(mem)
  4388  		v.AddArg(v0)
  4389  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4390  		v1.AddArg(dst)
  4391  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4392  		v2.AddArg(src)
  4393  		v2.AddArg(mem)
  4394  		v1.AddArg(v2)
  4395  		v1.AddArg(mem)
  4396  		v.AddArg(v1)
  4397  		return true
  4398  	}
  4399  	// match: (Move [7] dst src mem)
  4400  	// cond:
  4401  	// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
  4402  	for {
  4403  		if v.AuxInt != 7 {
  4404  			break
  4405  		}
  4406  		_ = v.Args[2]
  4407  		dst := v.Args[0]
  4408  		src := v.Args[1]
  4409  		mem := v.Args[2]
  4410  		v.reset(OpPPC64MOVBstore)
  4411  		v.AuxInt = 6
  4412  		v.AddArg(dst)
  4413  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4414  		v0.AuxInt = 6
  4415  		v0.AddArg(src)
  4416  		v0.AddArg(mem)
  4417  		v.AddArg(v0)
  4418  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4419  		v1.AuxInt = 4
  4420  		v1.AddArg(dst)
  4421  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4422  		v2.AuxInt = 4
  4423  		v2.AddArg(src)
  4424  		v2.AddArg(mem)
  4425  		v1.AddArg(v2)
  4426  		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4427  		v3.AddArg(dst)
  4428  		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4429  		v4.AddArg(src)
  4430  		v4.AddArg(mem)
  4431  		v3.AddArg(v4)
  4432  		v3.AddArg(mem)
  4433  		v1.AddArg(v3)
  4434  		v.AddArg(v1)
  4435  		return true
  4436  	}
  4437  	return false
  4438  }
  4439  func rewriteValuePPC64_OpMove_10(v *Value) bool {
  4440  	// match: (Move [s] dst src mem)
  4441  	// cond: s > 8
  4442  	// result: (LoweredMove [s] dst src mem)
  4443  	for {
  4444  		s := v.AuxInt
  4445  		_ = v.Args[2]
  4446  		dst := v.Args[0]
  4447  		src := v.Args[1]
  4448  		mem := v.Args[2]
  4449  		if !(s > 8) {
  4450  			break
  4451  		}
  4452  		v.reset(OpPPC64LoweredMove)
  4453  		v.AuxInt = s
  4454  		v.AddArg(dst)
  4455  		v.AddArg(src)
  4456  		v.AddArg(mem)
  4457  		return true
  4458  	}
  4459  	return false
  4460  }
  4461  func rewriteValuePPC64_OpMul16_0(v *Value) bool {
  4462  	// match: (Mul16 x y)
  4463  	// cond:
  4464  	// result: (MULLW x y)
  4465  	for {
  4466  		_ = v.Args[1]
  4467  		x := v.Args[0]
  4468  		y := v.Args[1]
  4469  		v.reset(OpPPC64MULLW)
  4470  		v.AddArg(x)
  4471  		v.AddArg(y)
  4472  		return true
  4473  	}
  4474  }
  4475  func rewriteValuePPC64_OpMul32_0(v *Value) bool {
  4476  	// match: (Mul32 x y)
  4477  	// cond:
  4478  	// result: (MULLW x y)
  4479  	for {
  4480  		_ = v.Args[1]
  4481  		x := v.Args[0]
  4482  		y := v.Args[1]
  4483  		v.reset(OpPPC64MULLW)
  4484  		v.AddArg(x)
  4485  		v.AddArg(y)
  4486  		return true
  4487  	}
  4488  }
  4489  func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
  4490  	// match: (Mul32F x y)
  4491  	// cond:
  4492  	// result: (FMULS x y)
  4493  	for {
  4494  		_ = v.Args[1]
  4495  		x := v.Args[0]
  4496  		y := v.Args[1]
  4497  		v.reset(OpPPC64FMULS)
  4498  		v.AddArg(x)
  4499  		v.AddArg(y)
  4500  		return true
  4501  	}
  4502  }
  4503  func rewriteValuePPC64_OpMul64_0(v *Value) bool {
  4504  	// match: (Mul64 x y)
  4505  	// cond:
  4506  	// result: (MULLD x y)
  4507  	for {
  4508  		_ = v.Args[1]
  4509  		x := v.Args[0]
  4510  		y := v.Args[1]
  4511  		v.reset(OpPPC64MULLD)
  4512  		v.AddArg(x)
  4513  		v.AddArg(y)
  4514  		return true
  4515  	}
  4516  }
  4517  func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
  4518  	// match: (Mul64F x y)
  4519  	// cond:
  4520  	// result: (FMUL x y)
  4521  	for {
  4522  		_ = v.Args[1]
  4523  		x := v.Args[0]
  4524  		y := v.Args[1]
  4525  		v.reset(OpPPC64FMUL)
  4526  		v.AddArg(x)
  4527  		v.AddArg(y)
  4528  		return true
  4529  	}
  4530  }
  4531  func rewriteValuePPC64_OpMul8_0(v *Value) bool {
  4532  	// match: (Mul8 x y)
  4533  	// cond:
  4534  	// result: (MULLW x y)
  4535  	for {
  4536  		_ = v.Args[1]
  4537  		x := v.Args[0]
  4538  		y := v.Args[1]
  4539  		v.reset(OpPPC64MULLW)
  4540  		v.AddArg(x)
  4541  		v.AddArg(y)
  4542  		return true
  4543  	}
  4544  }
  4545  func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
  4546  	// match: (Neg16 x)
  4547  	// cond:
  4548  	// result: (NEG x)
  4549  	for {
  4550  		x := v.Args[0]
  4551  		v.reset(OpPPC64NEG)
  4552  		v.AddArg(x)
  4553  		return true
  4554  	}
  4555  }
  4556  func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
  4557  	// match: (Neg32 x)
  4558  	// cond:
  4559  	// result: (NEG x)
  4560  	for {
  4561  		x := v.Args[0]
  4562  		v.reset(OpPPC64NEG)
  4563  		v.AddArg(x)
  4564  		return true
  4565  	}
  4566  }
  4567  func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
  4568  	// match: (Neg32F x)
  4569  	// cond:
  4570  	// result: (FNEG x)
  4571  	for {
  4572  		x := v.Args[0]
  4573  		v.reset(OpPPC64FNEG)
  4574  		v.AddArg(x)
  4575  		return true
  4576  	}
  4577  }
  4578  func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
  4579  	// match: (Neg64 x)
  4580  	// cond:
  4581  	// result: (NEG x)
  4582  	for {
  4583  		x := v.Args[0]
  4584  		v.reset(OpPPC64NEG)
  4585  		v.AddArg(x)
  4586  		return true
  4587  	}
  4588  }
  4589  func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
  4590  	// match: (Neg64F x)
  4591  	// cond:
  4592  	// result: (FNEG x)
  4593  	for {
  4594  		x := v.Args[0]
  4595  		v.reset(OpPPC64FNEG)
  4596  		v.AddArg(x)
  4597  		return true
  4598  	}
  4599  }
  4600  func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
  4601  	// match: (Neg8 x)
  4602  	// cond:
  4603  	// result: (NEG x)
  4604  	for {
  4605  		x := v.Args[0]
  4606  		v.reset(OpPPC64NEG)
  4607  		v.AddArg(x)
  4608  		return true
  4609  	}
  4610  }
  4611  func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
  4612  	b := v.Block
  4613  	_ = b
  4614  	typ := &b.Func.Config.Types
  4615  	_ = typ
  4616  	// match: (Neq16 x y)
  4617  	// cond: isSigned(x.Type) && isSigned(y.Type)
  4618  	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  4619  	for {
  4620  		_ = v.Args[1]
  4621  		x := v.Args[0]
  4622  		y := v.Args[1]
  4623  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  4624  			break
  4625  		}
  4626  		v.reset(OpPPC64NotEqual)
  4627  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4628  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4629  		v1.AddArg(x)
  4630  		v0.AddArg(v1)
  4631  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4632  		v2.AddArg(y)
  4633  		v0.AddArg(v2)
  4634  		v.AddArg(v0)
  4635  		return true
  4636  	}
  4637  	// match: (Neq16 x y)
  4638  	// cond:
  4639  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4640  	for {
  4641  		_ = v.Args[1]
  4642  		x := v.Args[0]
  4643  		y := v.Args[1]
  4644  		v.reset(OpPPC64NotEqual)
  4645  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4646  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4647  		v1.AddArg(x)
  4648  		v0.AddArg(v1)
  4649  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4650  		v2.AddArg(y)
  4651  		v0.AddArg(v2)
  4652  		v.AddArg(v0)
  4653  		return true
  4654  	}
  4655  }
  4656  func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
  4657  	b := v.Block
  4658  	_ = b
  4659  	// match: (Neq32 x y)
  4660  	// cond:
  4661  	// result: (NotEqual (CMPW x y))
  4662  	for {
  4663  		_ = v.Args[1]
  4664  		x := v.Args[0]
  4665  		y := v.Args[1]
  4666  		v.reset(OpPPC64NotEqual)
  4667  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4668  		v0.AddArg(x)
  4669  		v0.AddArg(y)
  4670  		v.AddArg(v0)
  4671  		return true
  4672  	}
  4673  }
  4674  func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
  4675  	b := v.Block
  4676  	_ = b
  4677  	// match: (Neq32F x y)
  4678  	// cond:
  4679  	// result: (NotEqual (FCMPU x y))
  4680  	for {
  4681  		_ = v.Args[1]
  4682  		x := v.Args[0]
  4683  		y := v.Args[1]
  4684  		v.reset(OpPPC64NotEqual)
  4685  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4686  		v0.AddArg(x)
  4687  		v0.AddArg(y)
  4688  		v.AddArg(v0)
  4689  		return true
  4690  	}
  4691  }
  4692  func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
  4693  	b := v.Block
  4694  	_ = b
  4695  	// match: (Neq64 x y)
  4696  	// cond:
  4697  	// result: (NotEqual (CMP x y))
  4698  	for {
  4699  		_ = v.Args[1]
  4700  		x := v.Args[0]
  4701  		y := v.Args[1]
  4702  		v.reset(OpPPC64NotEqual)
  4703  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4704  		v0.AddArg(x)
  4705  		v0.AddArg(y)
  4706  		v.AddArg(v0)
  4707  		return true
  4708  	}
  4709  }
  4710  func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
  4711  	b := v.Block
  4712  	_ = b
  4713  	// match: (Neq64F x y)
  4714  	// cond:
  4715  	// result: (NotEqual (FCMPU x y))
  4716  	for {
  4717  		_ = v.Args[1]
  4718  		x := v.Args[0]
  4719  		y := v.Args[1]
  4720  		v.reset(OpPPC64NotEqual)
  4721  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4722  		v0.AddArg(x)
  4723  		v0.AddArg(y)
  4724  		v.AddArg(v0)
  4725  		return true
  4726  	}
  4727  }
  4728  func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
  4729  	b := v.Block
  4730  	_ = b
  4731  	typ := &b.Func.Config.Types
  4732  	_ = typ
  4733  	// match: (Neq8 x y)
  4734  	// cond: isSigned(x.Type) && isSigned(y.Type)
  4735  	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  4736  	for {
  4737  		_ = v.Args[1]
  4738  		x := v.Args[0]
  4739  		y := v.Args[1]
  4740  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  4741  			break
  4742  		}
  4743  		v.reset(OpPPC64NotEqual)
  4744  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4745  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4746  		v1.AddArg(x)
  4747  		v0.AddArg(v1)
  4748  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4749  		v2.AddArg(y)
  4750  		v0.AddArg(v2)
  4751  		v.AddArg(v0)
  4752  		return true
  4753  	}
  4754  	// match: (Neq8 x y)
  4755  	// cond:
  4756  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  4757  	for {
  4758  		_ = v.Args[1]
  4759  		x := v.Args[0]
  4760  		y := v.Args[1]
  4761  		v.reset(OpPPC64NotEqual)
  4762  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4763  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4764  		v1.AddArg(x)
  4765  		v0.AddArg(v1)
  4766  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4767  		v2.AddArg(y)
  4768  		v0.AddArg(v2)
  4769  		v.AddArg(v0)
  4770  		return true
  4771  	}
  4772  }
  4773  func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
  4774  	// match: (NeqB x y)
  4775  	// cond:
  4776  	// result: (XOR x y)
  4777  	for {
  4778  		_ = v.Args[1]
  4779  		x := v.Args[0]
  4780  		y := v.Args[1]
  4781  		v.reset(OpPPC64XOR)
  4782  		v.AddArg(x)
  4783  		v.AddArg(y)
  4784  		return true
  4785  	}
  4786  }
  4787  func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
  4788  	b := v.Block
  4789  	_ = b
  4790  	// match: (NeqPtr x y)
  4791  	// cond:
  4792  	// result: (NotEqual (CMP x y))
  4793  	for {
  4794  		_ = v.Args[1]
  4795  		x := v.Args[0]
  4796  		y := v.Args[1]
  4797  		v.reset(OpPPC64NotEqual)
  4798  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4799  		v0.AddArg(x)
  4800  		v0.AddArg(y)
  4801  		v.AddArg(v0)
  4802  		return true
  4803  	}
  4804  }
  4805  func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
  4806  	// match: (NilCheck ptr mem)
  4807  	// cond:
  4808  	// result: (LoweredNilCheck ptr mem)
  4809  	for {
  4810  		_ = v.Args[1]
  4811  		ptr := v.Args[0]
  4812  		mem := v.Args[1]
  4813  		v.reset(OpPPC64LoweredNilCheck)
  4814  		v.AddArg(ptr)
  4815  		v.AddArg(mem)
  4816  		return true
  4817  	}
  4818  }
  4819  func rewriteValuePPC64_OpNot_0(v *Value) bool {
  4820  	// match: (Not x)
  4821  	// cond:
  4822  	// result: (XORconst [1] x)
  4823  	for {
  4824  		x := v.Args[0]
  4825  		v.reset(OpPPC64XORconst)
  4826  		v.AuxInt = 1
  4827  		v.AddArg(x)
  4828  		return true
  4829  	}
  4830  }
  4831  func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
  4832  	b := v.Block
  4833  	_ = b
  4834  	typ := &b.Func.Config.Types
  4835  	_ = typ
  4836  	// match: (OffPtr [off] ptr)
  4837  	// cond:
  4838  	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
  4839  	for {
  4840  		off := v.AuxInt
  4841  		ptr := v.Args[0]
  4842  		v.reset(OpPPC64ADD)
  4843  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  4844  		v0.AuxInt = off
  4845  		v.AddArg(v0)
  4846  		v.AddArg(ptr)
  4847  		return true
  4848  	}
  4849  }
  4850  func rewriteValuePPC64_OpOr16_0(v *Value) bool {
  4851  	// match: (Or16 x y)
  4852  	// cond:
  4853  	// result: (OR x y)
  4854  	for {
  4855  		_ = v.Args[1]
  4856  		x := v.Args[0]
  4857  		y := v.Args[1]
  4858  		v.reset(OpPPC64OR)
  4859  		v.AddArg(x)
  4860  		v.AddArg(y)
  4861  		return true
  4862  	}
  4863  }
  4864  func rewriteValuePPC64_OpOr32_0(v *Value) bool {
  4865  	// match: (Or32 x y)
  4866  	// cond:
  4867  	// result: (OR x y)
  4868  	for {
  4869  		_ = v.Args[1]
  4870  		x := v.Args[0]
  4871  		y := v.Args[1]
  4872  		v.reset(OpPPC64OR)
  4873  		v.AddArg(x)
  4874  		v.AddArg(y)
  4875  		return true
  4876  	}
  4877  }
  4878  func rewriteValuePPC64_OpOr64_0(v *Value) bool {
  4879  	// match: (Or64 x y)
  4880  	// cond:
  4881  	// result: (OR x y)
  4882  	for {
  4883  		_ = v.Args[1]
  4884  		x := v.Args[0]
  4885  		y := v.Args[1]
  4886  		v.reset(OpPPC64OR)
  4887  		v.AddArg(x)
  4888  		v.AddArg(y)
  4889  		return true
  4890  	}
  4891  }
  4892  func rewriteValuePPC64_OpOr8_0(v *Value) bool {
  4893  	// match: (Or8 x y)
  4894  	// cond:
  4895  	// result: (OR x y)
  4896  	for {
  4897  		_ = v.Args[1]
  4898  		x := v.Args[0]
  4899  		y := v.Args[1]
  4900  		v.reset(OpPPC64OR)
  4901  		v.AddArg(x)
  4902  		v.AddArg(y)
  4903  		return true
  4904  	}
  4905  }
  4906  func rewriteValuePPC64_OpOrB_0(v *Value) bool {
  4907  	// match: (OrB x y)
  4908  	// cond:
  4909  	// result: (OR x y)
  4910  	for {
  4911  		_ = v.Args[1]
  4912  		x := v.Args[0]
  4913  		y := v.Args[1]
  4914  		v.reset(OpPPC64OR)
  4915  		v.AddArg(x)
  4916  		v.AddArg(y)
  4917  		return true
  4918  	}
  4919  }
  4920  func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
  4921  	b := v.Block
  4922  	_ = b
  4923  	typ := &b.Func.Config.Types
  4924  	_ = typ
  4925  	// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
  4926  	// cond: d == 64-c
  4927  	// result: (ROTLconst [c] x)
  4928  	for {
  4929  		_ = v.Args[1]
  4930  		v_0 := v.Args[0]
  4931  		if v_0.Op != OpPPC64SLDconst {
  4932  			break
  4933  		}
  4934  		c := v_0.AuxInt
  4935  		x := v_0.Args[0]
  4936  		v_1 := v.Args[1]
  4937  		if v_1.Op != OpPPC64SRDconst {
  4938  			break
  4939  		}
  4940  		d := v_1.AuxInt
  4941  		if x != v_1.Args[0] {
  4942  			break
  4943  		}
  4944  		if !(d == 64-c) {
  4945  			break
  4946  		}
  4947  		v.reset(OpPPC64ROTLconst)
  4948  		v.AuxInt = c
  4949  		v.AddArg(x)
  4950  		return true
  4951  	}
  4952  	// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
  4953  	// cond: d == 64-c
  4954  	// result: (ROTLconst [c] x)
  4955  	for {
  4956  		_ = v.Args[1]
  4957  		v_0 := v.Args[0]
  4958  		if v_0.Op != OpPPC64SRDconst {
  4959  			break
  4960  		}
  4961  		d := v_0.AuxInt
  4962  		x := v_0.Args[0]
  4963  		v_1 := v.Args[1]
  4964  		if v_1.Op != OpPPC64SLDconst {
  4965  			break
  4966  		}
  4967  		c := v_1.AuxInt
  4968  		if x != v_1.Args[0] {
  4969  			break
  4970  		}
  4971  		if !(d == 64-c) {
  4972  			break
  4973  		}
  4974  		v.reset(OpPPC64ROTLconst)
  4975  		v.AuxInt = c
  4976  		v.AddArg(x)
  4977  		return true
  4978  	}
  4979  	// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
  4980  	// cond: d == 32-c
  4981  	// result: (ROTLWconst [c] x)
  4982  	for {
  4983  		_ = v.Args[1]
  4984  		v_0 := v.Args[0]
  4985  		if v_0.Op != OpPPC64SLWconst {
  4986  			break
  4987  		}
  4988  		c := v_0.AuxInt
  4989  		x := v_0.Args[0]
  4990  		v_1 := v.Args[1]
  4991  		if v_1.Op != OpPPC64SRWconst {
  4992  			break
  4993  		}
  4994  		d := v_1.AuxInt
  4995  		if x != v_1.Args[0] {
  4996  			break
  4997  		}
  4998  		if !(d == 32-c) {
  4999  			break
  5000  		}
  5001  		v.reset(OpPPC64ROTLWconst)
  5002  		v.AuxInt = c
  5003  		v.AddArg(x)
  5004  		return true
  5005  	}
  5006  	// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
  5007  	// cond: d == 32-c
  5008  	// result: (ROTLWconst [c] x)
  5009  	for {
  5010  		_ = v.Args[1]
  5011  		v_0 := v.Args[0]
  5012  		if v_0.Op != OpPPC64SRWconst {
  5013  			break
  5014  		}
  5015  		d := v_0.AuxInt
  5016  		x := v_0.Args[0]
  5017  		v_1 := v.Args[1]
  5018  		if v_1.Op != OpPPC64SLWconst {
  5019  			break
  5020  		}
  5021  		c := v_1.AuxInt
  5022  		if x != v_1.Args[0] {
  5023  			break
  5024  		}
  5025  		if !(d == 32-c) {
  5026  			break
  5027  		}
  5028  		v.reset(OpPPC64ROTLWconst)
  5029  		v.AuxInt = c
  5030  		v.AddArg(x)
  5031  		return true
  5032  	}
  5033  	// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  5034  	// cond:
  5035  	// result: (ROTL x y)
  5036  	for {
  5037  		_ = v.Args[1]
  5038  		v_0 := v.Args[0]
  5039  		if v_0.Op != OpPPC64SLD {
  5040  			break
  5041  		}
  5042  		_ = v_0.Args[1]
  5043  		x := v_0.Args[0]
  5044  		v_0_1 := v_0.Args[1]
  5045  		if v_0_1.Op != OpPPC64ANDconst {
  5046  			break
  5047  		}
  5048  		if v_0_1.Type != typ.Int64 {
  5049  			break
  5050  		}
  5051  		if v_0_1.AuxInt != 63 {
  5052  			break
  5053  		}
  5054  		y := v_0_1.Args[0]
  5055  		v_1 := v.Args[1]
  5056  		if v_1.Op != OpPPC64SRD {
  5057  			break
  5058  		}
  5059  		_ = v_1.Args[1]
  5060  		if x != v_1.Args[0] {
  5061  			break
  5062  		}
  5063  		v_1_1 := v_1.Args[1]
  5064  		if v_1_1.Op != OpPPC64SUB {
  5065  			break
  5066  		}
  5067  		if v_1_1.Type != typ.UInt {
  5068  			break
  5069  		}
  5070  		_ = v_1_1.Args[1]
  5071  		v_1_1_0 := v_1_1.Args[0]
  5072  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5073  			break
  5074  		}
  5075  		if v_1_1_0.AuxInt != 64 {
  5076  			break
  5077  		}
  5078  		v_1_1_1 := v_1_1.Args[1]
  5079  		if v_1_1_1.Op != OpPPC64ANDconst {
  5080  			break
  5081  		}
  5082  		if v_1_1_1.Type != typ.UInt {
  5083  			break
  5084  		}
  5085  		if v_1_1_1.AuxInt != 63 {
  5086  			break
  5087  		}
  5088  		if y != v_1_1_1.Args[0] {
  5089  			break
  5090  		}
  5091  		v.reset(OpPPC64ROTL)
  5092  		v.AddArg(x)
  5093  		v.AddArg(y)
  5094  		return true
  5095  	}
  5096  	// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  5097  	// cond:
  5098  	// result: (ROTL x y)
  5099  	for {
  5100  		_ = v.Args[1]
  5101  		v_0 := v.Args[0]
  5102  		if v_0.Op != OpPPC64SRD {
  5103  			break
  5104  		}
  5105  		_ = v_0.Args[1]
  5106  		x := v_0.Args[0]
  5107  		v_0_1 := v_0.Args[1]
  5108  		if v_0_1.Op != OpPPC64SUB {
  5109  			break
  5110  		}
  5111  		if v_0_1.Type != typ.UInt {
  5112  			break
  5113  		}
  5114  		_ = v_0_1.Args[1]
  5115  		v_0_1_0 := v_0_1.Args[0]
  5116  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5117  			break
  5118  		}
  5119  		if v_0_1_0.AuxInt != 64 {
  5120  			break
  5121  		}
  5122  		v_0_1_1 := v_0_1.Args[1]
  5123  		if v_0_1_1.Op != OpPPC64ANDconst {
  5124  			break
  5125  		}
  5126  		if v_0_1_1.Type != typ.UInt {
  5127  			break
  5128  		}
  5129  		if v_0_1_1.AuxInt != 63 {
  5130  			break
  5131  		}
  5132  		y := v_0_1_1.Args[0]
  5133  		v_1 := v.Args[1]
  5134  		if v_1.Op != OpPPC64SLD {
  5135  			break
  5136  		}
  5137  		_ = v_1.Args[1]
  5138  		if x != v_1.Args[0] {
  5139  			break
  5140  		}
  5141  		v_1_1 := v_1.Args[1]
  5142  		if v_1_1.Op != OpPPC64ANDconst {
  5143  			break
  5144  		}
  5145  		if v_1_1.Type != typ.Int64 {
  5146  			break
  5147  		}
  5148  		if v_1_1.AuxInt != 63 {
  5149  			break
  5150  		}
  5151  		if y != v_1_1.Args[0] {
  5152  			break
  5153  		}
  5154  		v.reset(OpPPC64ROTL)
  5155  		v.AddArg(x)
  5156  		v.AddArg(y)
  5157  		return true
  5158  	}
  5159  	// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  5160  	// cond:
  5161  	// result: (ROTLW x y)
  5162  	for {
  5163  		_ = v.Args[1]
  5164  		v_0 := v.Args[0]
  5165  		if v_0.Op != OpPPC64SLW {
  5166  			break
  5167  		}
  5168  		_ = v_0.Args[1]
  5169  		x := v_0.Args[0]
  5170  		v_0_1 := v_0.Args[1]
  5171  		if v_0_1.Op != OpPPC64ANDconst {
  5172  			break
  5173  		}
  5174  		if v_0_1.Type != typ.Int32 {
  5175  			break
  5176  		}
  5177  		if v_0_1.AuxInt != 31 {
  5178  			break
  5179  		}
  5180  		y := v_0_1.Args[0]
  5181  		v_1 := v.Args[1]
  5182  		if v_1.Op != OpPPC64SRW {
  5183  			break
  5184  		}
  5185  		_ = v_1.Args[1]
  5186  		if x != v_1.Args[0] {
  5187  			break
  5188  		}
  5189  		v_1_1 := v_1.Args[1]
  5190  		if v_1_1.Op != OpPPC64SUB {
  5191  			break
  5192  		}
  5193  		if v_1_1.Type != typ.UInt {
  5194  			break
  5195  		}
  5196  		_ = v_1_1.Args[1]
  5197  		v_1_1_0 := v_1_1.Args[0]
  5198  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5199  			break
  5200  		}
  5201  		if v_1_1_0.AuxInt != 32 {
  5202  			break
  5203  		}
  5204  		v_1_1_1 := v_1_1.Args[1]
  5205  		if v_1_1_1.Op != OpPPC64ANDconst {
  5206  			break
  5207  		}
  5208  		if v_1_1_1.Type != typ.UInt {
  5209  			break
  5210  		}
  5211  		if v_1_1_1.AuxInt != 31 {
  5212  			break
  5213  		}
  5214  		if y != v_1_1_1.Args[0] {
  5215  			break
  5216  		}
  5217  		v.reset(OpPPC64ROTLW)
  5218  		v.AddArg(x)
  5219  		v.AddArg(y)
  5220  		return true
  5221  	}
  5222  	// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  5223  	// cond:
  5224  	// result: (ROTLW x y)
  5225  	for {
  5226  		_ = v.Args[1]
  5227  		v_0 := v.Args[0]
  5228  		if v_0.Op != OpPPC64SRW {
  5229  			break
  5230  		}
  5231  		_ = v_0.Args[1]
  5232  		x := v_0.Args[0]
  5233  		v_0_1 := v_0.Args[1]
  5234  		if v_0_1.Op != OpPPC64SUB {
  5235  			break
  5236  		}
  5237  		if v_0_1.Type != typ.UInt {
  5238  			break
  5239  		}
  5240  		_ = v_0_1.Args[1]
  5241  		v_0_1_0 := v_0_1.Args[0]
  5242  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5243  			break
  5244  		}
  5245  		if v_0_1_0.AuxInt != 32 {
  5246  			break
  5247  		}
  5248  		v_0_1_1 := v_0_1.Args[1]
  5249  		if v_0_1_1.Op != OpPPC64ANDconst {
  5250  			break
  5251  		}
  5252  		if v_0_1_1.Type != typ.UInt {
  5253  			break
  5254  		}
  5255  		if v_0_1_1.AuxInt != 31 {
  5256  			break
  5257  		}
  5258  		y := v_0_1_1.Args[0]
  5259  		v_1 := v.Args[1]
  5260  		if v_1.Op != OpPPC64SLW {
  5261  			break
  5262  		}
  5263  		_ = v_1.Args[1]
  5264  		if x != v_1.Args[0] {
  5265  			break
  5266  		}
  5267  		v_1_1 := v_1.Args[1]
  5268  		if v_1_1.Op != OpPPC64ANDconst {
  5269  			break
  5270  		}
  5271  		if v_1_1.Type != typ.Int32 {
  5272  			break
  5273  		}
  5274  		if v_1_1.AuxInt != 31 {
  5275  			break
  5276  		}
  5277  		if y != v_1_1.Args[0] {
  5278  			break
  5279  		}
  5280  		v.reset(OpPPC64ROTLW)
  5281  		v.AddArg(x)
  5282  		v.AddArg(y)
  5283  		return true
  5284  	}
  5285  	// match: (ADD x (MOVDconst [c]))
  5286  	// cond: is32Bit(c)
  5287  	// result: (ADDconst [c] x)
  5288  	for {
  5289  		_ = v.Args[1]
  5290  		x := v.Args[0]
  5291  		v_1 := v.Args[1]
  5292  		if v_1.Op != OpPPC64MOVDconst {
  5293  			break
  5294  		}
  5295  		c := v_1.AuxInt
  5296  		if !(is32Bit(c)) {
  5297  			break
  5298  		}
  5299  		v.reset(OpPPC64ADDconst)
  5300  		v.AuxInt = c
  5301  		v.AddArg(x)
  5302  		return true
  5303  	}
  5304  	// match: (ADD (MOVDconst [c]) x)
  5305  	// cond: is32Bit(c)
  5306  	// result: (ADDconst [c] x)
  5307  	for {
  5308  		_ = v.Args[1]
  5309  		v_0 := v.Args[0]
  5310  		if v_0.Op != OpPPC64MOVDconst {
  5311  			break
  5312  		}
  5313  		c := v_0.AuxInt
  5314  		x := v.Args[1]
  5315  		if !(is32Bit(c)) {
  5316  			break
  5317  		}
  5318  		v.reset(OpPPC64ADDconst)
  5319  		v.AuxInt = c
  5320  		v.AddArg(x)
  5321  		return true
  5322  	}
  5323  	return false
  5324  }
  5325  func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
  5326  	// match: (ADDconst [c] (ADDconst [d] x))
  5327  	// cond: is32Bit(c+d)
  5328  	// result: (ADDconst [c+d] x)
  5329  	for {
  5330  		c := v.AuxInt
  5331  		v_0 := v.Args[0]
  5332  		if v_0.Op != OpPPC64ADDconst {
  5333  			break
  5334  		}
  5335  		d := v_0.AuxInt
  5336  		x := v_0.Args[0]
  5337  		if !(is32Bit(c + d)) {
  5338  			break
  5339  		}
  5340  		v.reset(OpPPC64ADDconst)
  5341  		v.AuxInt = c + d
  5342  		v.AddArg(x)
  5343  		return true
  5344  	}
  5345  	// match: (ADDconst [0] x)
  5346  	// cond:
  5347  	// result: x
  5348  	for {
  5349  		if v.AuxInt != 0 {
  5350  			break
  5351  		}
  5352  		x := v.Args[0]
  5353  		v.reset(OpCopy)
  5354  		v.Type = x.Type
  5355  		v.AddArg(x)
  5356  		return true
  5357  	}
  5358  	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
  5359  	// cond:
  5360  	// result: (MOVDaddr [c+d] {sym} x)
  5361  	for {
  5362  		c := v.AuxInt
  5363  		v_0 := v.Args[0]
  5364  		if v_0.Op != OpPPC64MOVDaddr {
  5365  			break
  5366  		}
  5367  		d := v_0.AuxInt
  5368  		sym := v_0.Aux
  5369  		x := v_0.Args[0]
  5370  		v.reset(OpPPC64MOVDaddr)
  5371  		v.AuxInt = c + d
  5372  		v.Aux = sym
  5373  		v.AddArg(x)
  5374  		return true
  5375  	}
  5376  	return false
  5377  }
  5378  func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
  5379  	// match: (AND x (NOR y y))
  5380  	// cond:
  5381  	// result: (ANDN x y)
  5382  	for {
  5383  		_ = v.Args[1]
  5384  		x := v.Args[0]
  5385  		v_1 := v.Args[1]
  5386  		if v_1.Op != OpPPC64NOR {
  5387  			break
  5388  		}
  5389  		_ = v_1.Args[1]
  5390  		y := v_1.Args[0]
  5391  		if y != v_1.Args[1] {
  5392  			break
  5393  		}
  5394  		v.reset(OpPPC64ANDN)
  5395  		v.AddArg(x)
  5396  		v.AddArg(y)
  5397  		return true
  5398  	}
  5399  	// match: (AND (NOR y y) x)
  5400  	// cond:
  5401  	// result: (ANDN x y)
  5402  	for {
  5403  		_ = v.Args[1]
  5404  		v_0 := v.Args[0]
  5405  		if v_0.Op != OpPPC64NOR {
  5406  			break
  5407  		}
  5408  		_ = v_0.Args[1]
  5409  		y := v_0.Args[0]
  5410  		if y != v_0.Args[1] {
  5411  			break
  5412  		}
  5413  		x := v.Args[1]
  5414  		v.reset(OpPPC64ANDN)
  5415  		v.AddArg(x)
  5416  		v.AddArg(y)
  5417  		return true
  5418  	}
  5419  	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
  5420  	// cond:
  5421  	// result: (MOVDconst [c&d])
  5422  	for {
  5423  		_ = v.Args[1]
  5424  		v_0 := v.Args[0]
  5425  		if v_0.Op != OpPPC64MOVDconst {
  5426  			break
  5427  		}
  5428  		c := v_0.AuxInt
  5429  		v_1 := v.Args[1]
  5430  		if v_1.Op != OpPPC64MOVDconst {
  5431  			break
  5432  		}
  5433  		d := v_1.AuxInt
  5434  		v.reset(OpPPC64MOVDconst)
  5435  		v.AuxInt = c & d
  5436  		return true
  5437  	}
  5438  	// match: (AND (MOVDconst [d]) (MOVDconst [c]))
  5439  	// cond:
  5440  	// result: (MOVDconst [c&d])
  5441  	for {
  5442  		_ = v.Args[1]
  5443  		v_0 := v.Args[0]
  5444  		if v_0.Op != OpPPC64MOVDconst {
  5445  			break
  5446  		}
  5447  		d := v_0.AuxInt
  5448  		v_1 := v.Args[1]
  5449  		if v_1.Op != OpPPC64MOVDconst {
  5450  			break
  5451  		}
  5452  		c := v_1.AuxInt
  5453  		v.reset(OpPPC64MOVDconst)
  5454  		v.AuxInt = c & d
  5455  		return true
  5456  	}
  5457  	// match: (AND x (MOVDconst [c]))
  5458  	// cond: isU16Bit(c)
  5459  	// result: (ANDconst [c] x)
  5460  	for {
  5461  		_ = v.Args[1]
  5462  		x := v.Args[0]
  5463  		v_1 := v.Args[1]
  5464  		if v_1.Op != OpPPC64MOVDconst {
  5465  			break
  5466  		}
  5467  		c := v_1.AuxInt
  5468  		if !(isU16Bit(c)) {
  5469  			break
  5470  		}
  5471  		v.reset(OpPPC64ANDconst)
  5472  		v.AuxInt = c
  5473  		v.AddArg(x)
  5474  		return true
  5475  	}
  5476  	// match: (AND (MOVDconst [c]) x)
  5477  	// cond: isU16Bit(c)
  5478  	// result: (ANDconst [c] x)
  5479  	for {
  5480  		_ = v.Args[1]
  5481  		v_0 := v.Args[0]
  5482  		if v_0.Op != OpPPC64MOVDconst {
  5483  			break
  5484  		}
  5485  		c := v_0.AuxInt
  5486  		x := v.Args[1]
  5487  		if !(isU16Bit(c)) {
  5488  			break
  5489  		}
  5490  		v.reset(OpPPC64ANDconst)
  5491  		v.AuxInt = c
  5492  		v.AddArg(x)
  5493  		return true
  5494  	}
  5495  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5496  	// cond:
  5497  	// result: (ANDconst [c&0xFF] x)
  5498  	for {
  5499  		_ = v.Args[1]
  5500  		v_0 := v.Args[0]
  5501  		if v_0.Op != OpPPC64MOVDconst {
  5502  			break
  5503  		}
  5504  		c := v_0.AuxInt
  5505  		x := v.Args[1]
  5506  		if x.Op != OpPPC64MOVBZload {
  5507  			break
  5508  		}
  5509  		_ = x.Args[1]
  5510  		v.reset(OpPPC64ANDconst)
  5511  		v.AuxInt = c & 0xFF
  5512  		v.AddArg(x)
  5513  		return true
  5514  	}
  5515  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5516  	// cond:
  5517  	// result: (ANDconst [c&0xFF] x)
  5518  	for {
  5519  		_ = v.Args[1]
  5520  		x := v.Args[0]
  5521  		if x.Op != OpPPC64MOVBZload {
  5522  			break
  5523  		}
  5524  		_ = x.Args[1]
  5525  		v_1 := v.Args[1]
  5526  		if v_1.Op != OpPPC64MOVDconst {
  5527  			break
  5528  		}
  5529  		c := v_1.AuxInt
  5530  		v.reset(OpPPC64ANDconst)
  5531  		v.AuxInt = c & 0xFF
  5532  		v.AddArg(x)
  5533  		return true
  5534  	}
  5535  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5536  	// cond:
  5537  	// result: (ANDconst [c&0xFF] x)
  5538  	for {
  5539  		_ = v.Args[1]
  5540  		x := v.Args[0]
  5541  		if x.Op != OpPPC64MOVBZload {
  5542  			break
  5543  		}
  5544  		_ = x.Args[1]
  5545  		v_1 := v.Args[1]
  5546  		if v_1.Op != OpPPC64MOVDconst {
  5547  			break
  5548  		}
  5549  		c := v_1.AuxInt
  5550  		v.reset(OpPPC64ANDconst)
  5551  		v.AuxInt = c & 0xFF
  5552  		v.AddArg(x)
  5553  		return true
  5554  	}
  5555  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5556  	// cond:
  5557  	// result: (ANDconst [c&0xFF] x)
  5558  	for {
  5559  		_ = v.Args[1]
  5560  		v_0 := v.Args[0]
  5561  		if v_0.Op != OpPPC64MOVDconst {
  5562  			break
  5563  		}
  5564  		c := v_0.AuxInt
  5565  		x := v.Args[1]
  5566  		if x.Op != OpPPC64MOVBZload {
  5567  			break
  5568  		}
  5569  		_ = x.Args[1]
  5570  		v.reset(OpPPC64ANDconst)
  5571  		v.AuxInt = c & 0xFF
  5572  		v.AddArg(x)
  5573  		return true
  5574  	}
  5575  	return false
  5576  }
  5577  func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
  5578  	// match: (ANDconst [c] (ANDconst [d] x))
  5579  	// cond:
  5580  	// result: (ANDconst [c&d] x)
  5581  	for {
  5582  		c := v.AuxInt
  5583  		v_0 := v.Args[0]
  5584  		if v_0.Op != OpPPC64ANDconst {
  5585  			break
  5586  		}
  5587  		d := v_0.AuxInt
  5588  		x := v_0.Args[0]
  5589  		v.reset(OpPPC64ANDconst)
  5590  		v.AuxInt = c & d
  5591  		v.AddArg(x)
  5592  		return true
  5593  	}
  5594  	// match: (ANDconst [-1] x)
  5595  	// cond:
  5596  	// result: x
  5597  	for {
  5598  		if v.AuxInt != -1 {
  5599  			break
  5600  		}
  5601  		x := v.Args[0]
  5602  		v.reset(OpCopy)
  5603  		v.Type = x.Type
  5604  		v.AddArg(x)
  5605  		return true
  5606  	}
  5607  	// match: (ANDconst [0] _)
  5608  	// cond:
  5609  	// result: (MOVDconst [0])
  5610  	for {
  5611  		if v.AuxInt != 0 {
  5612  			break
  5613  		}
  5614  		v.reset(OpPPC64MOVDconst)
  5615  		v.AuxInt = 0
  5616  		return true
  5617  	}
  5618  	// match: (ANDconst [c] y:(MOVBZreg _))
  5619  	// cond: c&0xFF == 0xFF
  5620  	// result: y
  5621  	for {
  5622  		c := v.AuxInt
  5623  		y := v.Args[0]
  5624  		if y.Op != OpPPC64MOVBZreg {
  5625  			break
  5626  		}
  5627  		if !(c&0xFF == 0xFF) {
  5628  			break
  5629  		}
  5630  		v.reset(OpCopy)
  5631  		v.Type = y.Type
  5632  		v.AddArg(y)
  5633  		return true
  5634  	}
  5635  	// match: (ANDconst [c] y:(MOVHZreg _))
  5636  	// cond: c&0xFFFF == 0xFFFF
  5637  	// result: y
  5638  	for {
  5639  		c := v.AuxInt
  5640  		y := v.Args[0]
  5641  		if y.Op != OpPPC64MOVHZreg {
  5642  			break
  5643  		}
  5644  		if !(c&0xFFFF == 0xFFFF) {
  5645  			break
  5646  		}
  5647  		v.reset(OpCopy)
  5648  		v.Type = y.Type
  5649  		v.AddArg(y)
  5650  		return true
  5651  	}
  5652  	// match: (ANDconst [c] y:(MOVWZreg _))
  5653  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5654  	// result: y
  5655  	for {
  5656  		c := v.AuxInt
  5657  		y := v.Args[0]
  5658  		if y.Op != OpPPC64MOVWZreg {
  5659  			break
  5660  		}
  5661  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5662  			break
  5663  		}
  5664  		v.reset(OpCopy)
  5665  		v.Type = y.Type
  5666  		v.AddArg(y)
  5667  		return true
  5668  	}
  5669  	// match: (ANDconst [c] (MOVBZreg x))
  5670  	// cond:
  5671  	// result: (ANDconst [c&0xFF] x)
  5672  	for {
  5673  		c := v.AuxInt
  5674  		v_0 := v.Args[0]
  5675  		if v_0.Op != OpPPC64MOVBZreg {
  5676  			break
  5677  		}
  5678  		x := v_0.Args[0]
  5679  		v.reset(OpPPC64ANDconst)
  5680  		v.AuxInt = c & 0xFF
  5681  		v.AddArg(x)
  5682  		return true
  5683  	}
  5684  	// match: (ANDconst [c] (MOVHZreg x))
  5685  	// cond:
  5686  	// result: (ANDconst [c&0xFFFF] x)
  5687  	for {
  5688  		c := v.AuxInt
  5689  		v_0 := v.Args[0]
  5690  		if v_0.Op != OpPPC64MOVHZreg {
  5691  			break
  5692  		}
  5693  		x := v_0.Args[0]
  5694  		v.reset(OpPPC64ANDconst)
  5695  		v.AuxInt = c & 0xFFFF
  5696  		v.AddArg(x)
  5697  		return true
  5698  	}
  5699  	// match: (ANDconst [c] (MOVWZreg x))
  5700  	// cond:
  5701  	// result: (ANDconst [c&0xFFFFFFFF] x)
  5702  	for {
  5703  		c := v.AuxInt
  5704  		v_0 := v.Args[0]
  5705  		if v_0.Op != OpPPC64MOVWZreg {
  5706  			break
  5707  		}
  5708  		x := v_0.Args[0]
  5709  		v.reset(OpPPC64ANDconst)
  5710  		v.AuxInt = c & 0xFFFFFFFF
  5711  		v.AddArg(x)
  5712  		return true
  5713  	}
  5714  	return false
  5715  }
  5716  func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
  5717  	b := v.Block
  5718  	_ = b
  5719  	// match: (CMP x (MOVDconst [c]))
  5720  	// cond: is16Bit(c)
  5721  	// result: (CMPconst x [c])
  5722  	for {
  5723  		_ = v.Args[1]
  5724  		x := v.Args[0]
  5725  		v_1 := v.Args[1]
  5726  		if v_1.Op != OpPPC64MOVDconst {
  5727  			break
  5728  		}
  5729  		c := v_1.AuxInt
  5730  		if !(is16Bit(c)) {
  5731  			break
  5732  		}
  5733  		v.reset(OpPPC64CMPconst)
  5734  		v.AuxInt = c
  5735  		v.AddArg(x)
  5736  		return true
  5737  	}
  5738  	// match: (CMP (MOVDconst [c]) y)
  5739  	// cond: is16Bit(c)
  5740  	// result: (InvertFlags (CMPconst y [c]))
  5741  	for {
  5742  		_ = v.Args[1]
  5743  		v_0 := v.Args[0]
  5744  		if v_0.Op != OpPPC64MOVDconst {
  5745  			break
  5746  		}
  5747  		c := v_0.AuxInt
  5748  		y := v.Args[1]
  5749  		if !(is16Bit(c)) {
  5750  			break
  5751  		}
  5752  		v.reset(OpPPC64InvertFlags)
  5753  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  5754  		v0.AuxInt = c
  5755  		v0.AddArg(y)
  5756  		v.AddArg(v0)
  5757  		return true
  5758  	}
  5759  	return false
  5760  }
  5761  func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
  5762  	b := v.Block
  5763  	_ = b
  5764  	// match: (CMPU x (MOVDconst [c]))
  5765  	// cond: isU16Bit(c)
  5766  	// result: (CMPUconst x [c])
  5767  	for {
  5768  		_ = v.Args[1]
  5769  		x := v.Args[0]
  5770  		v_1 := v.Args[1]
  5771  		if v_1.Op != OpPPC64MOVDconst {
  5772  			break
  5773  		}
  5774  		c := v_1.AuxInt
  5775  		if !(isU16Bit(c)) {
  5776  			break
  5777  		}
  5778  		v.reset(OpPPC64CMPUconst)
  5779  		v.AuxInt = c
  5780  		v.AddArg(x)
  5781  		return true
  5782  	}
  5783  	// match: (CMPU (MOVDconst [c]) y)
  5784  	// cond: isU16Bit(c)
  5785  	// result: (InvertFlags (CMPUconst y [c]))
  5786  	for {
  5787  		_ = v.Args[1]
  5788  		v_0 := v.Args[0]
  5789  		if v_0.Op != OpPPC64MOVDconst {
  5790  			break
  5791  		}
  5792  		c := v_0.AuxInt
  5793  		y := v.Args[1]
  5794  		if !(isU16Bit(c)) {
  5795  			break
  5796  		}
  5797  		v.reset(OpPPC64InvertFlags)
  5798  		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
  5799  		v0.AuxInt = c
  5800  		v0.AddArg(y)
  5801  		v.AddArg(v0)
  5802  		return true
  5803  	}
  5804  	return false
  5805  }
  5806  func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
  5807  	// match: (CMPUconst (MOVDconst [x]) [y])
  5808  	// cond: int64(x)==int64(y)
  5809  	// result: (FlagEQ)
  5810  	for {
  5811  		y := v.AuxInt
  5812  		v_0 := v.Args[0]
  5813  		if v_0.Op != OpPPC64MOVDconst {
  5814  			break
  5815  		}
  5816  		x := v_0.AuxInt
  5817  		if !(int64(x) == int64(y)) {
  5818  			break
  5819  		}
  5820  		v.reset(OpPPC64FlagEQ)
  5821  		return true
  5822  	}
  5823  	// match: (CMPUconst (MOVDconst [x]) [y])
  5824  	// cond: uint64(x)<uint64(y)
  5825  	// result: (FlagLT)
  5826  	for {
  5827  		y := v.AuxInt
  5828  		v_0 := v.Args[0]
  5829  		if v_0.Op != OpPPC64MOVDconst {
  5830  			break
  5831  		}
  5832  		x := v_0.AuxInt
  5833  		if !(uint64(x) < uint64(y)) {
  5834  			break
  5835  		}
  5836  		v.reset(OpPPC64FlagLT)
  5837  		return true
  5838  	}
  5839  	// match: (CMPUconst (MOVDconst [x]) [y])
  5840  	// cond: uint64(x)>uint64(y)
  5841  	// result: (FlagGT)
  5842  	for {
  5843  		y := v.AuxInt
  5844  		v_0 := v.Args[0]
  5845  		if v_0.Op != OpPPC64MOVDconst {
  5846  			break
  5847  		}
  5848  		x := v_0.AuxInt
  5849  		if !(uint64(x) > uint64(y)) {
  5850  			break
  5851  		}
  5852  		v.reset(OpPPC64FlagGT)
  5853  		return true
  5854  	}
  5855  	return false
  5856  }
  5857  func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
  5858  	b := v.Block
  5859  	_ = b
  5860  	// match: (CMPW x (MOVWreg y))
  5861  	// cond:
  5862  	// result: (CMPW x y)
  5863  	for {
  5864  		_ = v.Args[1]
  5865  		x := v.Args[0]
  5866  		v_1 := v.Args[1]
  5867  		if v_1.Op != OpPPC64MOVWreg {
  5868  			break
  5869  		}
  5870  		y := v_1.Args[0]
  5871  		v.reset(OpPPC64CMPW)
  5872  		v.AddArg(x)
  5873  		v.AddArg(y)
  5874  		return true
  5875  	}
  5876  	// match: (CMPW (MOVWreg x) y)
  5877  	// cond:
  5878  	// result: (CMPW x y)
  5879  	for {
  5880  		_ = v.Args[1]
  5881  		v_0 := v.Args[0]
  5882  		if v_0.Op != OpPPC64MOVWreg {
  5883  			break
  5884  		}
  5885  		x := v_0.Args[0]
  5886  		y := v.Args[1]
  5887  		v.reset(OpPPC64CMPW)
  5888  		v.AddArg(x)
  5889  		v.AddArg(y)
  5890  		return true
  5891  	}
  5892  	// match: (CMPW x (MOVDconst [c]))
  5893  	// cond: is16Bit(c)
  5894  	// result: (CMPWconst x [c])
  5895  	for {
  5896  		_ = v.Args[1]
  5897  		x := v.Args[0]
  5898  		v_1 := v.Args[1]
  5899  		if v_1.Op != OpPPC64MOVDconst {
  5900  			break
  5901  		}
  5902  		c := v_1.AuxInt
  5903  		if !(is16Bit(c)) {
  5904  			break
  5905  		}
  5906  		v.reset(OpPPC64CMPWconst)
  5907  		v.AuxInt = c
  5908  		v.AddArg(x)
  5909  		return true
  5910  	}
  5911  	// match: (CMPW (MOVDconst [c]) y)
  5912  	// cond: is16Bit(c)
  5913  	// result: (InvertFlags (CMPWconst y [c]))
  5914  	for {
  5915  		_ = v.Args[1]
  5916  		v_0 := v.Args[0]
  5917  		if v_0.Op != OpPPC64MOVDconst {
  5918  			break
  5919  		}
  5920  		c := v_0.AuxInt
  5921  		y := v.Args[1]
  5922  		if !(is16Bit(c)) {
  5923  			break
  5924  		}
  5925  		v.reset(OpPPC64InvertFlags)
  5926  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
  5927  		v0.AuxInt = c
  5928  		v0.AddArg(y)
  5929  		v.AddArg(v0)
  5930  		return true
  5931  	}
  5932  	return false
  5933  }
  5934  func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
  5935  	b := v.Block
  5936  	_ = b
  5937  	// match: (CMPWU x (MOVWZreg y))
  5938  	// cond:
  5939  	// result: (CMPWU x y)
  5940  	for {
  5941  		_ = v.Args[1]
  5942  		x := v.Args[0]
  5943  		v_1 := v.Args[1]
  5944  		if v_1.Op != OpPPC64MOVWZreg {
  5945  			break
  5946  		}
  5947  		y := v_1.Args[0]
  5948  		v.reset(OpPPC64CMPWU)
  5949  		v.AddArg(x)
  5950  		v.AddArg(y)
  5951  		return true
  5952  	}
  5953  	// match: (CMPWU (MOVWZreg x) y)
  5954  	// cond:
  5955  	// result: (CMPWU x y)
  5956  	for {
  5957  		_ = v.Args[1]
  5958  		v_0 := v.Args[0]
  5959  		if v_0.Op != OpPPC64MOVWZreg {
  5960  			break
  5961  		}
  5962  		x := v_0.Args[0]
  5963  		y := v.Args[1]
  5964  		v.reset(OpPPC64CMPWU)
  5965  		v.AddArg(x)
  5966  		v.AddArg(y)
  5967  		return true
  5968  	}
  5969  	// match: (CMPWU x (MOVDconst [c]))
  5970  	// cond: isU16Bit(c)
  5971  	// result: (CMPWUconst x [c])
  5972  	for {
  5973  		_ = v.Args[1]
  5974  		x := v.Args[0]
  5975  		v_1 := v.Args[1]
  5976  		if v_1.Op != OpPPC64MOVDconst {
  5977  			break
  5978  		}
  5979  		c := v_1.AuxInt
  5980  		if !(isU16Bit(c)) {
  5981  			break
  5982  		}
  5983  		v.reset(OpPPC64CMPWUconst)
  5984  		v.AuxInt = c
  5985  		v.AddArg(x)
  5986  		return true
  5987  	}
  5988  	// match: (CMPWU (MOVDconst [c]) y)
  5989  	// cond: isU16Bit(c)
  5990  	// result: (InvertFlags (CMPWUconst y [c]))
  5991  	for {
  5992  		_ = v.Args[1]
  5993  		v_0 := v.Args[0]
  5994  		if v_0.Op != OpPPC64MOVDconst {
  5995  			break
  5996  		}
  5997  		c := v_0.AuxInt
  5998  		y := v.Args[1]
  5999  		if !(isU16Bit(c)) {
  6000  			break
  6001  		}
  6002  		v.reset(OpPPC64InvertFlags)
  6003  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
  6004  		v0.AuxInt = c
  6005  		v0.AddArg(y)
  6006  		v.AddArg(v0)
  6007  		return true
  6008  	}
  6009  	return false
  6010  }
  6011  func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
  6012  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6013  	// cond: int32(x)==int32(y)
  6014  	// result: (FlagEQ)
  6015  	for {
  6016  		y := v.AuxInt
  6017  		v_0 := v.Args[0]
  6018  		if v_0.Op != OpPPC64MOVDconst {
  6019  			break
  6020  		}
  6021  		x := v_0.AuxInt
  6022  		if !(int32(x) == int32(y)) {
  6023  			break
  6024  		}
  6025  		v.reset(OpPPC64FlagEQ)
  6026  		return true
  6027  	}
  6028  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6029  	// cond: uint32(x)<uint32(y)
  6030  	// result: (FlagLT)
  6031  	for {
  6032  		y := v.AuxInt
  6033  		v_0 := v.Args[0]
  6034  		if v_0.Op != OpPPC64MOVDconst {
  6035  			break
  6036  		}
  6037  		x := v_0.AuxInt
  6038  		if !(uint32(x) < uint32(y)) {
  6039  			break
  6040  		}
  6041  		v.reset(OpPPC64FlagLT)
  6042  		return true
  6043  	}
  6044  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6045  	// cond: uint32(x)>uint32(y)
  6046  	// result: (FlagGT)
  6047  	for {
  6048  		y := v.AuxInt
  6049  		v_0 := v.Args[0]
  6050  		if v_0.Op != OpPPC64MOVDconst {
  6051  			break
  6052  		}
  6053  		x := v_0.AuxInt
  6054  		if !(uint32(x) > uint32(y)) {
  6055  			break
  6056  		}
  6057  		v.reset(OpPPC64FlagGT)
  6058  		return true
  6059  	}
  6060  	return false
  6061  }
  6062  func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
  6063  	// match: (CMPWconst (MOVDconst [x]) [y])
  6064  	// cond: int32(x)==int32(y)
  6065  	// result: (FlagEQ)
  6066  	for {
  6067  		y := v.AuxInt
  6068  		v_0 := v.Args[0]
  6069  		if v_0.Op != OpPPC64MOVDconst {
  6070  			break
  6071  		}
  6072  		x := v_0.AuxInt
  6073  		if !(int32(x) == int32(y)) {
  6074  			break
  6075  		}
  6076  		v.reset(OpPPC64FlagEQ)
  6077  		return true
  6078  	}
  6079  	// match: (CMPWconst (MOVDconst [x]) [y])
  6080  	// cond: int32(x)<int32(y)
  6081  	// result: (FlagLT)
  6082  	for {
  6083  		y := v.AuxInt
  6084  		v_0 := v.Args[0]
  6085  		if v_0.Op != OpPPC64MOVDconst {
  6086  			break
  6087  		}
  6088  		x := v_0.AuxInt
  6089  		if !(int32(x) < int32(y)) {
  6090  			break
  6091  		}
  6092  		v.reset(OpPPC64FlagLT)
  6093  		return true
  6094  	}
  6095  	// match: (CMPWconst (MOVDconst [x]) [y])
  6096  	// cond: int32(x)>int32(y)
  6097  	// result: (FlagGT)
  6098  	for {
  6099  		y := v.AuxInt
  6100  		v_0 := v.Args[0]
  6101  		if v_0.Op != OpPPC64MOVDconst {
  6102  			break
  6103  		}
  6104  		x := v_0.AuxInt
  6105  		if !(int32(x) > int32(y)) {
  6106  			break
  6107  		}
  6108  		v.reset(OpPPC64FlagGT)
  6109  		return true
  6110  	}
  6111  	return false
  6112  }
  6113  func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
  6114  	// match: (CMPconst (MOVDconst [x]) [y])
  6115  	// cond: int64(x)==int64(y)
  6116  	// result: (FlagEQ)
  6117  	for {
  6118  		y := v.AuxInt
  6119  		v_0 := v.Args[0]
  6120  		if v_0.Op != OpPPC64MOVDconst {
  6121  			break
  6122  		}
  6123  		x := v_0.AuxInt
  6124  		if !(int64(x) == int64(y)) {
  6125  			break
  6126  		}
  6127  		v.reset(OpPPC64FlagEQ)
  6128  		return true
  6129  	}
  6130  	// match: (CMPconst (MOVDconst [x]) [y])
  6131  	// cond: int64(x)<int64(y)
  6132  	// result: (FlagLT)
  6133  	for {
  6134  		y := v.AuxInt
  6135  		v_0 := v.Args[0]
  6136  		if v_0.Op != OpPPC64MOVDconst {
  6137  			break
  6138  		}
  6139  		x := v_0.AuxInt
  6140  		if !(int64(x) < int64(y)) {
  6141  			break
  6142  		}
  6143  		v.reset(OpPPC64FlagLT)
  6144  		return true
  6145  	}
  6146  	// match: (CMPconst (MOVDconst [x]) [y])
  6147  	// cond: int64(x)>int64(y)
  6148  	// result: (FlagGT)
  6149  	for {
  6150  		y := v.AuxInt
  6151  		v_0 := v.Args[0]
  6152  		if v_0.Op != OpPPC64MOVDconst {
  6153  			break
  6154  		}
  6155  		x := v_0.AuxInt
  6156  		if !(int64(x) > int64(y)) {
  6157  			break
  6158  		}
  6159  		v.reset(OpPPC64FlagGT)
  6160  		return true
  6161  	}
  6162  	return false
  6163  }
  6164  func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
  6165  	// match: (Equal (FlagEQ))
  6166  	// cond:
  6167  	// result: (MOVDconst [1])
  6168  	for {
  6169  		v_0 := v.Args[0]
  6170  		if v_0.Op != OpPPC64FlagEQ {
  6171  			break
  6172  		}
  6173  		v.reset(OpPPC64MOVDconst)
  6174  		v.AuxInt = 1
  6175  		return true
  6176  	}
  6177  	// match: (Equal (FlagLT))
  6178  	// cond:
  6179  	// result: (MOVDconst [0])
  6180  	for {
  6181  		v_0 := v.Args[0]
  6182  		if v_0.Op != OpPPC64FlagLT {
  6183  			break
  6184  		}
  6185  		v.reset(OpPPC64MOVDconst)
  6186  		v.AuxInt = 0
  6187  		return true
  6188  	}
  6189  	// match: (Equal (FlagGT))
  6190  	// cond:
  6191  	// result: (MOVDconst [0])
  6192  	for {
  6193  		v_0 := v.Args[0]
  6194  		if v_0.Op != OpPPC64FlagGT {
  6195  			break
  6196  		}
  6197  		v.reset(OpPPC64MOVDconst)
  6198  		v.AuxInt = 0
  6199  		return true
  6200  	}
  6201  	// match: (Equal (InvertFlags x))
  6202  	// cond:
  6203  	// result: (Equal x)
  6204  	for {
  6205  		v_0 := v.Args[0]
  6206  		if v_0.Op != OpPPC64InvertFlags {
  6207  			break
  6208  		}
  6209  		x := v_0.Args[0]
  6210  		v.reset(OpPPC64Equal)
  6211  		v.AddArg(x)
  6212  		return true
  6213  	}
  6214  	return false
  6215  }
  6216  func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
  6217  	// match: (FABS (FMOVDconst [x]))
  6218  	// cond:
  6219  	// result: (FMOVDconst [f2i(math.Abs(i2f(x)))])
  6220  	for {
  6221  		v_0 := v.Args[0]
  6222  		if v_0.Op != OpPPC64FMOVDconst {
  6223  			break
  6224  		}
  6225  		x := v_0.AuxInt
  6226  		v.reset(OpPPC64FMOVDconst)
  6227  		v.AuxInt = f2i(math.Abs(i2f(x)))
  6228  		return true
  6229  	}
  6230  	return false
  6231  }
  6232  func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
  6233  	// match: (FADD (FMUL x y) z)
  6234  	// cond:
  6235  	// result: (FMADD x y z)
  6236  	for {
  6237  		_ = v.Args[1]
  6238  		v_0 := v.Args[0]
  6239  		if v_0.Op != OpPPC64FMUL {
  6240  			break
  6241  		}
  6242  		_ = v_0.Args[1]
  6243  		x := v_0.Args[0]
  6244  		y := v_0.Args[1]
  6245  		z := v.Args[1]
  6246  		v.reset(OpPPC64FMADD)
  6247  		v.AddArg(x)
  6248  		v.AddArg(y)
  6249  		v.AddArg(z)
  6250  		return true
  6251  	}
  6252  	// match: (FADD z (FMUL x y))
  6253  	// cond:
  6254  	// result: (FMADD x y z)
  6255  	for {
  6256  		_ = v.Args[1]
  6257  		z := v.Args[0]
  6258  		v_1 := v.Args[1]
  6259  		if v_1.Op != OpPPC64FMUL {
  6260  			break
  6261  		}
  6262  		_ = v_1.Args[1]
  6263  		x := v_1.Args[0]
  6264  		y := v_1.Args[1]
  6265  		v.reset(OpPPC64FMADD)
  6266  		v.AddArg(x)
  6267  		v.AddArg(y)
  6268  		v.AddArg(z)
  6269  		return true
  6270  	}
  6271  	return false
  6272  }
  6273  func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
  6274  	// match: (FADDS (FMULS x y) z)
  6275  	// cond:
  6276  	// result: (FMADDS x y z)
  6277  	for {
  6278  		_ = v.Args[1]
  6279  		v_0 := v.Args[0]
  6280  		if v_0.Op != OpPPC64FMULS {
  6281  			break
  6282  		}
  6283  		_ = v_0.Args[1]
  6284  		x := v_0.Args[0]
  6285  		y := v_0.Args[1]
  6286  		z := v.Args[1]
  6287  		v.reset(OpPPC64FMADDS)
  6288  		v.AddArg(x)
  6289  		v.AddArg(y)
  6290  		v.AddArg(z)
  6291  		return true
  6292  	}
  6293  	// match: (FADDS z (FMULS x y))
  6294  	// cond:
  6295  	// result: (FMADDS x y z)
  6296  	for {
  6297  		_ = v.Args[1]
  6298  		z := v.Args[0]
  6299  		v_1 := v.Args[1]
  6300  		if v_1.Op != OpPPC64FMULS {
  6301  			break
  6302  		}
  6303  		_ = v_1.Args[1]
  6304  		x := v_1.Args[0]
  6305  		y := v_1.Args[1]
  6306  		v.reset(OpPPC64FMADDS)
  6307  		v.AddArg(x)
  6308  		v.AddArg(y)
  6309  		v.AddArg(z)
  6310  		return true
  6311  	}
  6312  	return false
  6313  }
  6314  func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
  6315  	// match: (FCEIL (FMOVDconst [x]))
  6316  	// cond:
  6317  	// result: (FMOVDconst [f2i(math.Ceil(i2f(x)))])
  6318  	for {
  6319  		v_0 := v.Args[0]
  6320  		if v_0.Op != OpPPC64FMOVDconst {
  6321  			break
  6322  		}
  6323  		x := v_0.AuxInt
  6324  		v.reset(OpPPC64FMOVDconst)
  6325  		v.AuxInt = f2i(math.Ceil(i2f(x)))
  6326  		return true
  6327  	}
  6328  	return false
  6329  }
  6330  func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
  6331  	// match: (FFLOOR (FMOVDconst [x]))
  6332  	// cond:
  6333  	// result: (FMOVDconst [f2i(math.Floor(i2f(x)))])
  6334  	for {
  6335  		v_0 := v.Args[0]
  6336  		if v_0.Op != OpPPC64FMOVDconst {
  6337  			break
  6338  		}
  6339  		x := v_0.AuxInt
  6340  		v.reset(OpPPC64FMOVDconst)
  6341  		v.AuxInt = f2i(math.Floor(i2f(x)))
  6342  		return true
  6343  	}
  6344  	return false
  6345  }
  6346  func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
  6347  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
  6348  	// cond:
  6349  	// result: (MTVSRD x)
  6350  	for {
  6351  		off := v.AuxInt
  6352  		sym := v.Aux
  6353  		_ = v.Args[1]
  6354  		ptr := v.Args[0]
  6355  		v_1 := v.Args[1]
  6356  		if v_1.Op != OpPPC64MOVDstore {
  6357  			break
  6358  		}
  6359  		if v_1.AuxInt != off {
  6360  			break
  6361  		}
  6362  		if v_1.Aux != sym {
  6363  			break
  6364  		}
  6365  		_ = v_1.Args[2]
  6366  		if ptr != v_1.Args[0] {
  6367  			break
  6368  		}
  6369  		x := v_1.Args[1]
  6370  		v.reset(OpPPC64MTVSRD)
  6371  		v.AddArg(x)
  6372  		return true
  6373  	}
  6374  	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6375  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6376  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6377  	for {
  6378  		off1 := v.AuxInt
  6379  		sym1 := v.Aux
  6380  		_ = v.Args[1]
  6381  		p := v.Args[0]
  6382  		if p.Op != OpPPC64MOVDaddr {
  6383  			break
  6384  		}
  6385  		off2 := p.AuxInt
  6386  		sym2 := p.Aux
  6387  		ptr := p.Args[0]
  6388  		mem := v.Args[1]
  6389  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6390  			break
  6391  		}
  6392  		v.reset(OpPPC64FMOVDload)
  6393  		v.AuxInt = off1 + off2
  6394  		v.Aux = mergeSym(sym1, sym2)
  6395  		v.AddArg(ptr)
  6396  		v.AddArg(mem)
  6397  		return true
  6398  	}
  6399  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6400  	// cond: is16Bit(off1+off2)
  6401  	// result: (FMOVDload [off1+off2] {sym} ptr mem)
  6402  	for {
  6403  		off1 := v.AuxInt
  6404  		sym := v.Aux
  6405  		_ = v.Args[1]
  6406  		v_0 := v.Args[0]
  6407  		if v_0.Op != OpPPC64ADDconst {
  6408  			break
  6409  		}
  6410  		off2 := v_0.AuxInt
  6411  		ptr := v_0.Args[0]
  6412  		mem := v.Args[1]
  6413  		if !(is16Bit(off1 + off2)) {
  6414  			break
  6415  		}
  6416  		v.reset(OpPPC64FMOVDload)
  6417  		v.AuxInt = off1 + off2
  6418  		v.Aux = sym
  6419  		v.AddArg(ptr)
  6420  		v.AddArg(mem)
  6421  		return true
  6422  	}
  6423  	return false
  6424  }
  6425  func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
  6426  	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
  6427  	// cond:
  6428  	// result: (MOVDstore [off] {sym} ptr x mem)
  6429  	for {
  6430  		off := v.AuxInt
  6431  		sym := v.Aux
  6432  		_ = v.Args[2]
  6433  		ptr := v.Args[0]
  6434  		v_1 := v.Args[1]
  6435  		if v_1.Op != OpPPC64MTVSRD {
  6436  			break
  6437  		}
  6438  		x := v_1.Args[0]
  6439  		mem := v.Args[2]
  6440  		v.reset(OpPPC64MOVDstore)
  6441  		v.AuxInt = off
  6442  		v.Aux = sym
  6443  		v.AddArg(ptr)
  6444  		v.AddArg(x)
  6445  		v.AddArg(mem)
  6446  		return true
  6447  	}
  6448  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6449  	// cond: is16Bit(off1+off2)
  6450  	// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
  6451  	for {
  6452  		off1 := v.AuxInt
  6453  		sym := v.Aux
  6454  		_ = v.Args[2]
  6455  		v_0 := v.Args[0]
  6456  		if v_0.Op != OpPPC64ADDconst {
  6457  			break
  6458  		}
  6459  		off2 := v_0.AuxInt
  6460  		ptr := v_0.Args[0]
  6461  		val := v.Args[1]
  6462  		mem := v.Args[2]
  6463  		if !(is16Bit(off1 + off2)) {
  6464  			break
  6465  		}
  6466  		v.reset(OpPPC64FMOVDstore)
  6467  		v.AuxInt = off1 + off2
  6468  		v.Aux = sym
  6469  		v.AddArg(ptr)
  6470  		v.AddArg(val)
  6471  		v.AddArg(mem)
  6472  		return true
  6473  	}
  6474  	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6475  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6476  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6477  	for {
  6478  		off1 := v.AuxInt
  6479  		sym1 := v.Aux
  6480  		_ = v.Args[2]
  6481  		p := v.Args[0]
  6482  		if p.Op != OpPPC64MOVDaddr {
  6483  			break
  6484  		}
  6485  		off2 := p.AuxInt
  6486  		sym2 := p.Aux
  6487  		ptr := p.Args[0]
  6488  		val := v.Args[1]
  6489  		mem := v.Args[2]
  6490  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6491  			break
  6492  		}
  6493  		v.reset(OpPPC64FMOVDstore)
  6494  		v.AuxInt = off1 + off2
  6495  		v.Aux = mergeSym(sym1, sym2)
  6496  		v.AddArg(ptr)
  6497  		v.AddArg(val)
  6498  		v.AddArg(mem)
  6499  		return true
  6500  	}
  6501  	return false
  6502  }
  6503  func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
  6504  	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6505  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6506  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6507  	for {
  6508  		off1 := v.AuxInt
  6509  		sym1 := v.Aux
  6510  		_ = v.Args[1]
  6511  		p := v.Args[0]
  6512  		if p.Op != OpPPC64MOVDaddr {
  6513  			break
  6514  		}
  6515  		off2 := p.AuxInt
  6516  		sym2 := p.Aux
  6517  		ptr := p.Args[0]
  6518  		mem := v.Args[1]
  6519  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6520  			break
  6521  		}
  6522  		v.reset(OpPPC64FMOVSload)
  6523  		v.AuxInt = off1 + off2
  6524  		v.Aux = mergeSym(sym1, sym2)
  6525  		v.AddArg(ptr)
  6526  		v.AddArg(mem)
  6527  		return true
  6528  	}
  6529  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  6530  	// cond: is16Bit(off1+off2)
  6531  	// result: (FMOVSload [off1+off2] {sym} ptr mem)
  6532  	for {
  6533  		off1 := v.AuxInt
  6534  		sym := v.Aux
  6535  		_ = v.Args[1]
  6536  		v_0 := v.Args[0]
  6537  		if v_0.Op != OpPPC64ADDconst {
  6538  			break
  6539  		}
  6540  		off2 := v_0.AuxInt
  6541  		ptr := v_0.Args[0]
  6542  		mem := v.Args[1]
  6543  		if !(is16Bit(off1 + off2)) {
  6544  			break
  6545  		}
  6546  		v.reset(OpPPC64FMOVSload)
  6547  		v.AuxInt = off1 + off2
  6548  		v.Aux = sym
  6549  		v.AddArg(ptr)
  6550  		v.AddArg(mem)
  6551  		return true
  6552  	}
  6553  	return false
  6554  }
  6555  func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
  6556  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6557  	// cond: is16Bit(off1+off2)
  6558  	// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
  6559  	for {
  6560  		off1 := v.AuxInt
  6561  		sym := v.Aux
  6562  		_ = v.Args[2]
  6563  		v_0 := v.Args[0]
  6564  		if v_0.Op != OpPPC64ADDconst {
  6565  			break
  6566  		}
  6567  		off2 := v_0.AuxInt
  6568  		ptr := v_0.Args[0]
  6569  		val := v.Args[1]
  6570  		mem := v.Args[2]
  6571  		if !(is16Bit(off1 + off2)) {
  6572  			break
  6573  		}
  6574  		v.reset(OpPPC64FMOVSstore)
  6575  		v.AuxInt = off1 + off2
  6576  		v.Aux = sym
  6577  		v.AddArg(ptr)
  6578  		v.AddArg(val)
  6579  		v.AddArg(mem)
  6580  		return true
  6581  	}
  6582  	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6583  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6584  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6585  	for {
  6586  		off1 := v.AuxInt
  6587  		sym1 := v.Aux
  6588  		_ = v.Args[2]
  6589  		p := v.Args[0]
  6590  		if p.Op != OpPPC64MOVDaddr {
  6591  			break
  6592  		}
  6593  		off2 := p.AuxInt
  6594  		sym2 := p.Aux
  6595  		ptr := p.Args[0]
  6596  		val := v.Args[1]
  6597  		mem := v.Args[2]
  6598  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6599  			break
  6600  		}
  6601  		v.reset(OpPPC64FMOVSstore)
  6602  		v.AuxInt = off1 + off2
  6603  		v.Aux = mergeSym(sym1, sym2)
  6604  		v.AddArg(ptr)
  6605  		v.AddArg(val)
  6606  		v.AddArg(mem)
  6607  		return true
  6608  	}
  6609  	return false
  6610  }
  6611  func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
  6612  	// match: (FNEG (FABS x))
  6613  	// cond:
  6614  	// result: (FNABS x)
  6615  	for {
  6616  		v_0 := v.Args[0]
  6617  		if v_0.Op != OpPPC64FABS {
  6618  			break
  6619  		}
  6620  		x := v_0.Args[0]
  6621  		v.reset(OpPPC64FNABS)
  6622  		v.AddArg(x)
  6623  		return true
  6624  	}
  6625  	// match: (FNEG (FNABS x))
  6626  	// cond:
  6627  	// result: (FABS x)
  6628  	for {
  6629  		v_0 := v.Args[0]
  6630  		if v_0.Op != OpPPC64FNABS {
  6631  			break
  6632  		}
  6633  		x := v_0.Args[0]
  6634  		v.reset(OpPPC64FABS)
  6635  		v.AddArg(x)
  6636  		return true
  6637  	}
  6638  	return false
  6639  }
  6640  func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
  6641  	// match: (FSQRT (FMOVDconst [x]))
  6642  	// cond:
  6643  	// result: (FMOVDconst [f2i(math.Sqrt(i2f(x)))])
  6644  	for {
  6645  		v_0 := v.Args[0]
  6646  		if v_0.Op != OpPPC64FMOVDconst {
  6647  			break
  6648  		}
  6649  		x := v_0.AuxInt
  6650  		v.reset(OpPPC64FMOVDconst)
  6651  		v.AuxInt = f2i(math.Sqrt(i2f(x)))
  6652  		return true
  6653  	}
  6654  	return false
  6655  }
  6656  func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
  6657  	// match: (FSUB (FMUL x y) z)
  6658  	// cond:
  6659  	// result: (FMSUB x y z)
  6660  	for {
  6661  		_ = v.Args[1]
  6662  		v_0 := v.Args[0]
  6663  		if v_0.Op != OpPPC64FMUL {
  6664  			break
  6665  		}
  6666  		_ = v_0.Args[1]
  6667  		x := v_0.Args[0]
  6668  		y := v_0.Args[1]
  6669  		z := v.Args[1]
  6670  		v.reset(OpPPC64FMSUB)
  6671  		v.AddArg(x)
  6672  		v.AddArg(y)
  6673  		v.AddArg(z)
  6674  		return true
  6675  	}
  6676  	return false
  6677  }
  6678  func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
  6679  	// match: (FSUBS (FMULS x y) z)
  6680  	// cond:
  6681  	// result: (FMSUBS x y z)
  6682  	for {
  6683  		_ = v.Args[1]
  6684  		v_0 := v.Args[0]
  6685  		if v_0.Op != OpPPC64FMULS {
  6686  			break
  6687  		}
  6688  		_ = v_0.Args[1]
  6689  		x := v_0.Args[0]
  6690  		y := v_0.Args[1]
  6691  		z := v.Args[1]
  6692  		v.reset(OpPPC64FMSUBS)
  6693  		v.AddArg(x)
  6694  		v.AddArg(y)
  6695  		v.AddArg(z)
  6696  		return true
  6697  	}
  6698  	return false
  6699  }
  6700  func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
  6701  	// match: (FTRUNC (FMOVDconst [x]))
  6702  	// cond:
  6703  	// result: (FMOVDconst [f2i(math.Trunc(i2f(x)))])
  6704  	for {
  6705  		v_0 := v.Args[0]
  6706  		if v_0.Op != OpPPC64FMOVDconst {
  6707  			break
  6708  		}
  6709  		x := v_0.AuxInt
  6710  		v.reset(OpPPC64FMOVDconst)
  6711  		v.AuxInt = f2i(math.Trunc(i2f(x)))
  6712  		return true
  6713  	}
  6714  	return false
  6715  }
  6716  func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
  6717  	// match: (GreaterEqual (FlagEQ))
  6718  	// cond:
  6719  	// result: (MOVDconst [1])
  6720  	for {
  6721  		v_0 := v.Args[0]
  6722  		if v_0.Op != OpPPC64FlagEQ {
  6723  			break
  6724  		}
  6725  		v.reset(OpPPC64MOVDconst)
  6726  		v.AuxInt = 1
  6727  		return true
  6728  	}
  6729  	// match: (GreaterEqual (FlagLT))
  6730  	// cond:
  6731  	// result: (MOVDconst [0])
  6732  	for {
  6733  		v_0 := v.Args[0]
  6734  		if v_0.Op != OpPPC64FlagLT {
  6735  			break
  6736  		}
  6737  		v.reset(OpPPC64MOVDconst)
  6738  		v.AuxInt = 0
  6739  		return true
  6740  	}
  6741  	// match: (GreaterEqual (FlagGT))
  6742  	// cond:
  6743  	// result: (MOVDconst [1])
  6744  	for {
  6745  		v_0 := v.Args[0]
  6746  		if v_0.Op != OpPPC64FlagGT {
  6747  			break
  6748  		}
  6749  		v.reset(OpPPC64MOVDconst)
  6750  		v.AuxInt = 1
  6751  		return true
  6752  	}
  6753  	// match: (GreaterEqual (InvertFlags x))
  6754  	// cond:
  6755  	// result: (LessEqual x)
  6756  	for {
  6757  		v_0 := v.Args[0]
  6758  		if v_0.Op != OpPPC64InvertFlags {
  6759  			break
  6760  		}
  6761  		x := v_0.Args[0]
  6762  		v.reset(OpPPC64LessEqual)
  6763  		v.AddArg(x)
  6764  		return true
  6765  	}
  6766  	return false
  6767  }
  6768  func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
  6769  	// match: (GreaterThan (FlagEQ))
  6770  	// cond:
  6771  	// result: (MOVDconst [0])
  6772  	for {
  6773  		v_0 := v.Args[0]
  6774  		if v_0.Op != OpPPC64FlagEQ {
  6775  			break
  6776  		}
  6777  		v.reset(OpPPC64MOVDconst)
  6778  		v.AuxInt = 0
  6779  		return true
  6780  	}
  6781  	// match: (GreaterThan (FlagLT))
  6782  	// cond:
  6783  	// result: (MOVDconst [0])
  6784  	for {
  6785  		v_0 := v.Args[0]
  6786  		if v_0.Op != OpPPC64FlagLT {
  6787  			break
  6788  		}
  6789  		v.reset(OpPPC64MOVDconst)
  6790  		v.AuxInt = 0
  6791  		return true
  6792  	}
  6793  	// match: (GreaterThan (FlagGT))
  6794  	// cond:
  6795  	// result: (MOVDconst [1])
  6796  	for {
  6797  		v_0 := v.Args[0]
  6798  		if v_0.Op != OpPPC64FlagGT {
  6799  			break
  6800  		}
  6801  		v.reset(OpPPC64MOVDconst)
  6802  		v.AuxInt = 1
  6803  		return true
  6804  	}
  6805  	// match: (GreaterThan (InvertFlags x))
  6806  	// cond:
  6807  	// result: (LessThan x)
  6808  	for {
  6809  		v_0 := v.Args[0]
  6810  		if v_0.Op != OpPPC64InvertFlags {
  6811  			break
  6812  		}
  6813  		x := v_0.Args[0]
  6814  		v.reset(OpPPC64LessThan)
  6815  		v.AddArg(x)
  6816  		return true
  6817  	}
  6818  	return false
  6819  }
  6820  func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
  6821  	// match: (LessEqual (FlagEQ))
  6822  	// cond:
  6823  	// result: (MOVDconst [1])
  6824  	for {
  6825  		v_0 := v.Args[0]
  6826  		if v_0.Op != OpPPC64FlagEQ {
  6827  			break
  6828  		}
  6829  		v.reset(OpPPC64MOVDconst)
  6830  		v.AuxInt = 1
  6831  		return true
  6832  	}
  6833  	// match: (LessEqual (FlagLT))
  6834  	// cond:
  6835  	// result: (MOVDconst [1])
  6836  	for {
  6837  		v_0 := v.Args[0]
  6838  		if v_0.Op != OpPPC64FlagLT {
  6839  			break
  6840  		}
  6841  		v.reset(OpPPC64MOVDconst)
  6842  		v.AuxInt = 1
  6843  		return true
  6844  	}
  6845  	// match: (LessEqual (FlagGT))
  6846  	// cond:
  6847  	// result: (MOVDconst [0])
  6848  	for {
  6849  		v_0 := v.Args[0]
  6850  		if v_0.Op != OpPPC64FlagGT {
  6851  			break
  6852  		}
  6853  		v.reset(OpPPC64MOVDconst)
  6854  		v.AuxInt = 0
  6855  		return true
  6856  	}
  6857  	// match: (LessEqual (InvertFlags x))
  6858  	// cond:
  6859  	// result: (GreaterEqual x)
  6860  	for {
  6861  		v_0 := v.Args[0]
  6862  		if v_0.Op != OpPPC64InvertFlags {
  6863  			break
  6864  		}
  6865  		x := v_0.Args[0]
  6866  		v.reset(OpPPC64GreaterEqual)
  6867  		v.AddArg(x)
  6868  		return true
  6869  	}
  6870  	return false
  6871  }
  6872  func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
  6873  	// match: (LessThan (FlagEQ))
  6874  	// cond:
  6875  	// result: (MOVDconst [0])
  6876  	for {
  6877  		v_0 := v.Args[0]
  6878  		if v_0.Op != OpPPC64FlagEQ {
  6879  			break
  6880  		}
  6881  		v.reset(OpPPC64MOVDconst)
  6882  		v.AuxInt = 0
  6883  		return true
  6884  	}
  6885  	// match: (LessThan (FlagLT))
  6886  	// cond:
  6887  	// result: (MOVDconst [1])
  6888  	for {
  6889  		v_0 := v.Args[0]
  6890  		if v_0.Op != OpPPC64FlagLT {
  6891  			break
  6892  		}
  6893  		v.reset(OpPPC64MOVDconst)
  6894  		v.AuxInt = 1
  6895  		return true
  6896  	}
  6897  	// match: (LessThan (FlagGT))
  6898  	// cond:
  6899  	// result: (MOVDconst [0])
  6900  	for {
  6901  		v_0 := v.Args[0]
  6902  		if v_0.Op != OpPPC64FlagGT {
  6903  			break
  6904  		}
  6905  		v.reset(OpPPC64MOVDconst)
  6906  		v.AuxInt = 0
  6907  		return true
  6908  	}
  6909  	// match: (LessThan (InvertFlags x))
  6910  	// cond:
  6911  	// result: (GreaterThan x)
  6912  	for {
  6913  		v_0 := v.Args[0]
  6914  		if v_0.Op != OpPPC64InvertFlags {
  6915  			break
  6916  		}
  6917  		x := v_0.Args[0]
  6918  		v.reset(OpPPC64GreaterThan)
  6919  		v.AddArg(x)
  6920  		return true
  6921  	}
  6922  	return false
  6923  }
  6924  func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
  6925  	b := v.Block
  6926  	_ = b
  6927  	typ := &b.Func.Config.Types
  6928  	_ = typ
  6929  	// match: (MFVSRD (FMOVDconst [c]))
  6930  	// cond:
  6931  	// result: (MOVDconst [c])
  6932  	for {
  6933  		v_0 := v.Args[0]
  6934  		if v_0.Op != OpPPC64FMOVDconst {
  6935  			break
  6936  		}
  6937  		c := v_0.AuxInt
  6938  		v.reset(OpPPC64MOVDconst)
  6939  		v.AuxInt = c
  6940  		return true
  6941  	}
  6942  	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
  6943  	// cond: x.Uses == 1 && clobber(x)
  6944  	// result: @x.Block (MOVDload [off] {sym} ptr mem)
  6945  	for {
  6946  		x := v.Args[0]
  6947  		if x.Op != OpPPC64FMOVDload {
  6948  			break
  6949  		}
  6950  		off := x.AuxInt
  6951  		sym := x.Aux
  6952  		_ = x.Args[1]
  6953  		ptr := x.Args[0]
  6954  		mem := x.Args[1]
  6955  		if !(x.Uses == 1 && clobber(x)) {
  6956  			break
  6957  		}
  6958  		b = x.Block
  6959  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  6960  		v.reset(OpCopy)
  6961  		v.AddArg(v0)
  6962  		v0.AuxInt = off
  6963  		v0.Aux = sym
  6964  		v0.AddArg(ptr)
  6965  		v0.AddArg(mem)
  6966  		return true
  6967  	}
  6968  	return false
  6969  }
  6970  func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
  6971  	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6972  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6973  	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6974  	for {
  6975  		off1 := v.AuxInt
  6976  		sym1 := v.Aux
  6977  		_ = v.Args[1]
  6978  		p := v.Args[0]
  6979  		if p.Op != OpPPC64MOVDaddr {
  6980  			break
  6981  		}
  6982  		off2 := p.AuxInt
  6983  		sym2 := p.Aux
  6984  		ptr := p.Args[0]
  6985  		mem := v.Args[1]
  6986  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6987  			break
  6988  		}
  6989  		v.reset(OpPPC64MOVBZload)
  6990  		v.AuxInt = off1 + off2
  6991  		v.Aux = mergeSym(sym1, sym2)
  6992  		v.AddArg(ptr)
  6993  		v.AddArg(mem)
  6994  		return true
  6995  	}
  6996  	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
  6997  	// cond: is16Bit(off1+off2)
  6998  	// result: (MOVBZload [off1+off2] {sym} x mem)
  6999  	for {
  7000  		off1 := v.AuxInt
  7001  		sym := v.Aux
  7002  		_ = v.Args[1]
  7003  		v_0 := v.Args[0]
  7004  		if v_0.Op != OpPPC64ADDconst {
  7005  			break
  7006  		}
  7007  		off2 := v_0.AuxInt
  7008  		x := v_0.Args[0]
  7009  		mem := v.Args[1]
  7010  		if !(is16Bit(off1 + off2)) {
  7011  			break
  7012  		}
  7013  		v.reset(OpPPC64MOVBZload)
  7014  		v.AuxInt = off1 + off2
  7015  		v.Aux = sym
  7016  		v.AddArg(x)
  7017  		v.AddArg(mem)
  7018  		return true
  7019  	}
  7020  	return false
  7021  }
  7022  func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
  7023  	// match: (MOVBZreg y:(ANDconst [c] _))
  7024  	// cond: uint64(c) <= 0xFF
  7025  	// result: y
  7026  	for {
  7027  		y := v.Args[0]
  7028  		if y.Op != OpPPC64ANDconst {
  7029  			break
  7030  		}
  7031  		c := y.AuxInt
  7032  		if !(uint64(c) <= 0xFF) {
  7033  			break
  7034  		}
  7035  		v.reset(OpCopy)
  7036  		v.Type = y.Type
  7037  		v.AddArg(y)
  7038  		return true
  7039  	}
  7040  	// match: (MOVBZreg y:(MOVBZreg _))
  7041  	// cond:
  7042  	// result: y
  7043  	for {
  7044  		y := v.Args[0]
  7045  		if y.Op != OpPPC64MOVBZreg {
  7046  			break
  7047  		}
  7048  		v.reset(OpCopy)
  7049  		v.Type = y.Type
  7050  		v.AddArg(y)
  7051  		return true
  7052  	}
  7053  	// match: (MOVBZreg (MOVBreg x))
  7054  	// cond:
  7055  	// result: (MOVBZreg x)
  7056  	for {
  7057  		v_0 := v.Args[0]
  7058  		if v_0.Op != OpPPC64MOVBreg {
  7059  			break
  7060  		}
  7061  		x := v_0.Args[0]
  7062  		v.reset(OpPPC64MOVBZreg)
  7063  		v.AddArg(x)
  7064  		return true
  7065  	}
  7066  	// match: (MOVBZreg x:(MOVBZload _ _))
  7067  	// cond:
  7068  	// result: x
  7069  	for {
  7070  		x := v.Args[0]
  7071  		if x.Op != OpPPC64MOVBZload {
  7072  			break
  7073  		}
  7074  		_ = x.Args[1]
  7075  		v.reset(OpCopy)
  7076  		v.Type = x.Type
  7077  		v.AddArg(x)
  7078  		return true
  7079  	}
  7080  	// match: (MOVBZreg (MOVDconst [c]))
  7081  	// cond:
  7082  	// result: (MOVDconst [int64(uint8(c))])
  7083  	for {
  7084  		v_0 := v.Args[0]
  7085  		if v_0.Op != OpPPC64MOVDconst {
  7086  			break
  7087  		}
  7088  		c := v_0.AuxInt
  7089  		v.reset(OpPPC64MOVDconst)
  7090  		v.AuxInt = int64(uint8(c))
  7091  		return true
  7092  	}
  7093  	return false
  7094  }
  7095  func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
  7096  	// match: (MOVBreg y:(ANDconst [c] _))
  7097  	// cond: uint64(c) <= 0x7F
  7098  	// result: y
  7099  	for {
  7100  		y := v.Args[0]
  7101  		if y.Op != OpPPC64ANDconst {
  7102  			break
  7103  		}
  7104  		c := y.AuxInt
  7105  		if !(uint64(c) <= 0x7F) {
  7106  			break
  7107  		}
  7108  		v.reset(OpCopy)
  7109  		v.Type = y.Type
  7110  		v.AddArg(y)
  7111  		return true
  7112  	}
  7113  	// match: (MOVBreg y:(MOVBreg _))
  7114  	// cond:
  7115  	// result: y
  7116  	for {
  7117  		y := v.Args[0]
  7118  		if y.Op != OpPPC64MOVBreg {
  7119  			break
  7120  		}
  7121  		v.reset(OpCopy)
  7122  		v.Type = y.Type
  7123  		v.AddArg(y)
  7124  		return true
  7125  	}
  7126  	// match: (MOVBreg (MOVBZreg x))
  7127  	// cond:
  7128  	// result: (MOVBreg x)
  7129  	for {
  7130  		v_0 := v.Args[0]
  7131  		if v_0.Op != OpPPC64MOVBZreg {
  7132  			break
  7133  		}
  7134  		x := v_0.Args[0]
  7135  		v.reset(OpPPC64MOVBreg)
  7136  		v.AddArg(x)
  7137  		return true
  7138  	}
  7139  	// match: (MOVBreg (MOVDconst [c]))
  7140  	// cond:
  7141  	// result: (MOVDconst [int64(int8(c))])
  7142  	for {
  7143  		v_0 := v.Args[0]
  7144  		if v_0.Op != OpPPC64MOVDconst {
  7145  			break
  7146  		}
  7147  		c := v_0.AuxInt
  7148  		v.reset(OpPPC64MOVDconst)
  7149  		v.AuxInt = int64(int8(c))
  7150  		return true
  7151  	}
  7152  	return false
  7153  }
  7154  func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
  7155  	b := v.Block
  7156  	_ = b
  7157  	config := b.Func.Config
  7158  	_ = config
  7159  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
  7160  	// cond: is16Bit(off1+off2)
  7161  	// result: (MOVBstore [off1+off2] {sym} x val mem)
  7162  	for {
  7163  		off1 := v.AuxInt
  7164  		sym := v.Aux
  7165  		_ = v.Args[2]
  7166  		v_0 := v.Args[0]
  7167  		if v_0.Op != OpPPC64ADDconst {
  7168  			break
  7169  		}
  7170  		off2 := v_0.AuxInt
  7171  		x := v_0.Args[0]
  7172  		val := v.Args[1]
  7173  		mem := v.Args[2]
  7174  		if !(is16Bit(off1 + off2)) {
  7175  			break
  7176  		}
  7177  		v.reset(OpPPC64MOVBstore)
  7178  		v.AuxInt = off1 + off2
  7179  		v.Aux = sym
  7180  		v.AddArg(x)
  7181  		v.AddArg(val)
  7182  		v.AddArg(mem)
  7183  		return true
  7184  	}
  7185  	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7186  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7187  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7188  	for {
  7189  		off1 := v.AuxInt
  7190  		sym1 := v.Aux
  7191  		_ = v.Args[2]
  7192  		p := v.Args[0]
  7193  		if p.Op != OpPPC64MOVDaddr {
  7194  			break
  7195  		}
  7196  		off2 := p.AuxInt
  7197  		sym2 := p.Aux
  7198  		ptr := p.Args[0]
  7199  		val := v.Args[1]
  7200  		mem := v.Args[2]
  7201  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7202  			break
  7203  		}
  7204  		v.reset(OpPPC64MOVBstore)
  7205  		v.AuxInt = off1 + off2
  7206  		v.Aux = mergeSym(sym1, sym2)
  7207  		v.AddArg(ptr)
  7208  		v.AddArg(val)
  7209  		v.AddArg(mem)
  7210  		return true
  7211  	}
  7212  	// match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem)
  7213  	// cond: c == 0
  7214  	// result: (MOVBstorezero [off] {sym} ptr mem)
  7215  	for {
  7216  		off := v.AuxInt
  7217  		sym := v.Aux
  7218  		_ = v.Args[2]
  7219  		ptr := v.Args[0]
  7220  		v_1 := v.Args[1]
  7221  		if v_1.Op != OpPPC64MOVDconst {
  7222  			break
  7223  		}
  7224  		c := v_1.AuxInt
  7225  		mem := v.Args[2]
  7226  		if !(c == 0) {
  7227  			break
  7228  		}
  7229  		v.reset(OpPPC64MOVBstorezero)
  7230  		v.AuxInt = off
  7231  		v.Aux = sym
  7232  		v.AddArg(ptr)
  7233  		v.AddArg(mem)
  7234  		return true
  7235  	}
  7236  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  7237  	// cond:
  7238  	// result: (MOVBstore [off] {sym} ptr x mem)
  7239  	for {
  7240  		off := v.AuxInt
  7241  		sym := v.Aux
  7242  		_ = v.Args[2]
  7243  		ptr := v.Args[0]
  7244  		v_1 := v.Args[1]
  7245  		if v_1.Op != OpPPC64MOVBreg {
  7246  			break
  7247  		}
  7248  		x := v_1.Args[0]
  7249  		mem := v.Args[2]
  7250  		v.reset(OpPPC64MOVBstore)
  7251  		v.AuxInt = off
  7252  		v.Aux = sym
  7253  		v.AddArg(ptr)
  7254  		v.AddArg(x)
  7255  		v.AddArg(mem)
  7256  		return true
  7257  	}
  7258  	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
  7259  	// cond:
  7260  	// result: (MOVBstore [off] {sym} ptr x mem)
  7261  	for {
  7262  		off := v.AuxInt
  7263  		sym := v.Aux
  7264  		_ = v.Args[2]
  7265  		ptr := v.Args[0]
  7266  		v_1 := v.Args[1]
  7267  		if v_1.Op != OpPPC64MOVBZreg {
  7268  			break
  7269  		}
  7270  		x := v_1.Args[0]
  7271  		mem := v.Args[2]
  7272  		v.reset(OpPPC64MOVBstore)
  7273  		v.AuxInt = off
  7274  		v.Aux = sym
  7275  		v.AddArg(ptr)
  7276  		v.AddArg(x)
  7277  		v.AddArg(mem)
  7278  		return true
  7279  	}
  7280  	// match: (MOVBstore [i1] {s} p (SRWconst (MOVHZreg w) [8]) x0:(MOVBstore [i0] {s} p w mem))
  7281  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  7282  	// result: (MOVHstore [i0] {s} p w mem)
  7283  	for {
  7284  		i1 := v.AuxInt
  7285  		s := v.Aux
  7286  		_ = v.Args[2]
  7287  		p := v.Args[0]
  7288  		v_1 := v.Args[1]
  7289  		if v_1.Op != OpPPC64SRWconst {
  7290  			break
  7291  		}
  7292  		if v_1.AuxInt != 8 {
  7293  			break
  7294  		}
  7295  		v_1_0 := v_1.Args[0]
  7296  		if v_1_0.Op != OpPPC64MOVHZreg {
  7297  			break
  7298  		}
  7299  		w := v_1_0.Args[0]
  7300  		x0 := v.Args[2]
  7301  		if x0.Op != OpPPC64MOVBstore {
  7302  			break
  7303  		}
  7304  		i0 := x0.AuxInt
  7305  		if x0.Aux != s {
  7306  			break
  7307  		}
  7308  		_ = x0.Args[2]
  7309  		if p != x0.Args[0] {
  7310  			break
  7311  		}
  7312  		if w != x0.Args[1] {
  7313  			break
  7314  		}
  7315  		mem := x0.Args[2]
  7316  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  7317  			break
  7318  		}
  7319  		v.reset(OpPPC64MOVHstore)
  7320  		v.AuxInt = i0
  7321  		v.Aux = s
  7322  		v.AddArg(p)
  7323  		v.AddArg(w)
  7324  		v.AddArg(mem)
  7325  		return true
  7326  	}
  7327  	// match: (MOVBstore [i3] {s} p (SRWconst w [24]) x0:(MOVBstore [i2] {s} p (SRWconst w [16]) x1:(MOVBstore [i1] {s} p (SRWconst w [8]) x2:(MOVBstore [i0] {s} p w mem))))
  7328  	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)
  7329  	// result: (MOVWstore [i0] {s} p w mem)
  7330  	for {
  7331  		i3 := v.AuxInt
  7332  		s := v.Aux
  7333  		_ = v.Args[2]
  7334  		p := v.Args[0]
  7335  		v_1 := v.Args[1]
  7336  		if v_1.Op != OpPPC64SRWconst {
  7337  			break
  7338  		}
  7339  		if v_1.AuxInt != 24 {
  7340  			break
  7341  		}
  7342  		w := v_1.Args[0]
  7343  		x0 := v.Args[2]
  7344  		if x0.Op != OpPPC64MOVBstore {
  7345  			break
  7346  		}
  7347  		i2 := x0.AuxInt
  7348  		if x0.Aux != s {
  7349  			break
  7350  		}
  7351  		_ = x0.Args[2]
  7352  		if p != x0.Args[0] {
  7353  			break
  7354  		}
  7355  		x0_1 := x0.Args[1]
  7356  		if x0_1.Op != OpPPC64SRWconst {
  7357  			break
  7358  		}
  7359  		if x0_1.AuxInt != 16 {
  7360  			break
  7361  		}
  7362  		if w != x0_1.Args[0] {
  7363  			break
  7364  		}
  7365  		x1 := x0.Args[2]
  7366  		if x1.Op != OpPPC64MOVBstore {
  7367  			break
  7368  		}
  7369  		i1 := x1.AuxInt
  7370  		if x1.Aux != s {
  7371  			break
  7372  		}
  7373  		_ = x1.Args[2]
  7374  		if p != x1.Args[0] {
  7375  			break
  7376  		}
  7377  		x1_1 := x1.Args[1]
  7378  		if x1_1.Op != OpPPC64SRWconst {
  7379  			break
  7380  		}
  7381  		if x1_1.AuxInt != 8 {
  7382  			break
  7383  		}
  7384  		if w != x1_1.Args[0] {
  7385  			break
  7386  		}
  7387  		x2 := x1.Args[2]
  7388  		if x2.Op != OpPPC64MOVBstore {
  7389  			break
  7390  		}
  7391  		i0 := x2.AuxInt
  7392  		if x2.Aux != s {
  7393  			break
  7394  		}
  7395  		_ = x2.Args[2]
  7396  		if p != x2.Args[0] {
  7397  			break
  7398  		}
  7399  		if w != x2.Args[1] {
  7400  			break
  7401  		}
  7402  		mem := x2.Args[2]
  7403  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
  7404  			break
  7405  		}
  7406  		v.reset(OpPPC64MOVWstore)
  7407  		v.AuxInt = i0
  7408  		v.Aux = s
  7409  		v.AddArg(p)
  7410  		v.AddArg(w)
  7411  		v.AddArg(mem)
  7412  		return true
  7413  	}
  7414  	// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVBstore [i3] {s} p (SRDconst w [24]) x4:(MOVBstore [i2] {s} p (SRDconst w [16]) x5:(MOVBstore [i1] {s} p (SRDconst w [8]) x6:(MOVBstore [i0] {s} p w mem))))))))
  7415  	// cond: !config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
  7416  	// result: (MOVDstore [i0] {s} p w mem)
  7417  	for {
  7418  		i7 := v.AuxInt
  7419  		s := v.Aux
  7420  		_ = v.Args[2]
  7421  		p := v.Args[0]
  7422  		v_1 := v.Args[1]
  7423  		if v_1.Op != OpPPC64SRDconst {
  7424  			break
  7425  		}
  7426  		if v_1.AuxInt != 56 {
  7427  			break
  7428  		}
  7429  		w := v_1.Args[0]
  7430  		x0 := v.Args[2]
  7431  		if x0.Op != OpPPC64MOVBstore {
  7432  			break
  7433  		}
  7434  		i6 := x0.AuxInt
  7435  		if x0.Aux != s {
  7436  			break
  7437  		}
  7438  		_ = x0.Args[2]
  7439  		if p != x0.Args[0] {
  7440  			break
  7441  		}
  7442  		x0_1 := x0.Args[1]
  7443  		if x0_1.Op != OpPPC64SRDconst {
  7444  			break
  7445  		}
  7446  		if x0_1.AuxInt != 48 {
  7447  			break
  7448  		}
  7449  		if w != x0_1.Args[0] {
  7450  			break
  7451  		}
  7452  		x1 := x0.Args[2]
  7453  		if x1.Op != OpPPC64MOVBstore {
  7454  			break
  7455  		}
  7456  		i5 := x1.AuxInt
  7457  		if x1.Aux != s {
  7458  			break
  7459  		}
  7460  		_ = x1.Args[2]
  7461  		if p != x1.Args[0] {
  7462  			break
  7463  		}
  7464  		x1_1 := x1.Args[1]
  7465  		if x1_1.Op != OpPPC64SRDconst {
  7466  			break
  7467  		}
  7468  		if x1_1.AuxInt != 40 {
  7469  			break
  7470  		}
  7471  		if w != x1_1.Args[0] {
  7472  			break
  7473  		}
  7474  		x2 := x1.Args[2]
  7475  		if x2.Op != OpPPC64MOVBstore {
  7476  			break
  7477  		}
  7478  		i4 := x2.AuxInt
  7479  		if x2.Aux != s {
  7480  			break
  7481  		}
  7482  		_ = x2.Args[2]
  7483  		if p != x2.Args[0] {
  7484  			break
  7485  		}
  7486  		x2_1 := x2.Args[1]
  7487  		if x2_1.Op != OpPPC64SRDconst {
  7488  			break
  7489  		}
  7490  		if x2_1.AuxInt != 32 {
  7491  			break
  7492  		}
  7493  		if w != x2_1.Args[0] {
  7494  			break
  7495  		}
  7496  		x3 := x2.Args[2]
  7497  		if x3.Op != OpPPC64MOVBstore {
  7498  			break
  7499  		}
  7500  		i3 := x3.AuxInt
  7501  		if x3.Aux != s {
  7502  			break
  7503  		}
  7504  		_ = x3.Args[2]
  7505  		if p != x3.Args[0] {
  7506  			break
  7507  		}
  7508  		x3_1 := x3.Args[1]
  7509  		if x3_1.Op != OpPPC64SRDconst {
  7510  			break
  7511  		}
  7512  		if x3_1.AuxInt != 24 {
  7513  			break
  7514  		}
  7515  		if w != x3_1.Args[0] {
  7516  			break
  7517  		}
  7518  		x4 := x3.Args[2]
  7519  		if x4.Op != OpPPC64MOVBstore {
  7520  			break
  7521  		}
  7522  		i2 := x4.AuxInt
  7523  		if x4.Aux != s {
  7524  			break
  7525  		}
  7526  		_ = x4.Args[2]
  7527  		if p != x4.Args[0] {
  7528  			break
  7529  		}
  7530  		x4_1 := x4.Args[1]
  7531  		if x4_1.Op != OpPPC64SRDconst {
  7532  			break
  7533  		}
  7534  		if x4_1.AuxInt != 16 {
  7535  			break
  7536  		}
  7537  		if w != x4_1.Args[0] {
  7538  			break
  7539  		}
  7540  		x5 := x4.Args[2]
  7541  		if x5.Op != OpPPC64MOVBstore {
  7542  			break
  7543  		}
  7544  		i1 := x5.AuxInt
  7545  		if x5.Aux != s {
  7546  			break
  7547  		}
  7548  		_ = x5.Args[2]
  7549  		if p != x5.Args[0] {
  7550  			break
  7551  		}
  7552  		x5_1 := x5.Args[1]
  7553  		if x5_1.Op != OpPPC64SRDconst {
  7554  			break
  7555  		}
  7556  		if x5_1.AuxInt != 8 {
  7557  			break
  7558  		}
  7559  		if w != x5_1.Args[0] {
  7560  			break
  7561  		}
  7562  		x6 := x5.Args[2]
  7563  		if x6.Op != OpPPC64MOVBstore {
  7564  			break
  7565  		}
  7566  		i0 := x6.AuxInt
  7567  		if x6.Aux != s {
  7568  			break
  7569  		}
  7570  		_ = x6.Args[2]
  7571  		if p != x6.Args[0] {
  7572  			break
  7573  		}
  7574  		if w != x6.Args[1] {
  7575  			break
  7576  		}
  7577  		mem := x6.Args[2]
  7578  		if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
  7579  			break
  7580  		}
  7581  		v.reset(OpPPC64MOVDstore)
  7582  		v.AuxInt = i0
  7583  		v.Aux = s
  7584  		v.AddArg(p)
  7585  		v.AddArg(w)
  7586  		v.AddArg(mem)
  7587  		return true
  7588  	}
  7589  	return false
  7590  }
  7591  func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
  7592  	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
  7593  	// cond: is16Bit(off1+off2)
  7594  	// result: (MOVBstorezero [off1+off2] {sym} x mem)
  7595  	for {
  7596  		off1 := v.AuxInt
  7597  		sym := v.Aux
  7598  		_ = v.Args[1]
  7599  		v_0 := v.Args[0]
  7600  		if v_0.Op != OpPPC64ADDconst {
  7601  			break
  7602  		}
  7603  		off2 := v_0.AuxInt
  7604  		x := v_0.Args[0]
  7605  		mem := v.Args[1]
  7606  		if !(is16Bit(off1 + off2)) {
  7607  			break
  7608  		}
  7609  		v.reset(OpPPC64MOVBstorezero)
  7610  		v.AuxInt = off1 + off2
  7611  		v.Aux = sym
  7612  		v.AddArg(x)
  7613  		v.AddArg(mem)
  7614  		return true
  7615  	}
  7616  	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  7617  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  7618  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  7619  	for {
  7620  		off1 := v.AuxInt
  7621  		sym1 := v.Aux
  7622  		_ = v.Args[1]
  7623  		p := v.Args[0]
  7624  		if p.Op != OpPPC64MOVDaddr {
  7625  			break
  7626  		}
  7627  		off2 := p.AuxInt
  7628  		sym2 := p.Aux
  7629  		x := p.Args[0]
  7630  		mem := v.Args[1]
  7631  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  7632  			break
  7633  		}
  7634  		v.reset(OpPPC64MOVBstorezero)
  7635  		v.AuxInt = off1 + off2
  7636  		v.Aux = mergeSym(sym1, sym2)
  7637  		v.AddArg(x)
  7638  		v.AddArg(mem)
  7639  		return true
  7640  	}
  7641  	return false
  7642  }
  7643  func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
  7644  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
  7645  	// cond:
  7646  	// result: (MFVSRD x)
  7647  	for {
  7648  		off := v.AuxInt
  7649  		sym := v.Aux
  7650  		_ = v.Args[1]
  7651  		ptr := v.Args[0]
  7652  		v_1 := v.Args[1]
  7653  		if v_1.Op != OpPPC64FMOVDstore {
  7654  			break
  7655  		}
  7656  		if v_1.AuxInt != off {
  7657  			break
  7658  		}
  7659  		if v_1.Aux != sym {
  7660  			break
  7661  		}
  7662  		_ = v_1.Args[2]
  7663  		if ptr != v_1.Args[0] {
  7664  			break
  7665  		}
  7666  		x := v_1.Args[1]
  7667  		v.reset(OpPPC64MFVSRD)
  7668  		v.AddArg(x)
  7669  		return true
  7670  	}
  7671  	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7672  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7673  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7674  	for {
  7675  		off1 := v.AuxInt
  7676  		sym1 := v.Aux
  7677  		_ = v.Args[1]
  7678  		p := v.Args[0]
  7679  		if p.Op != OpPPC64MOVDaddr {
  7680  			break
  7681  		}
  7682  		off2 := p.AuxInt
  7683  		sym2 := p.Aux
  7684  		ptr := p.Args[0]
  7685  		mem := v.Args[1]
  7686  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7687  			break
  7688  		}
  7689  		v.reset(OpPPC64MOVDload)
  7690  		v.AuxInt = off1 + off2
  7691  		v.Aux = mergeSym(sym1, sym2)
  7692  		v.AddArg(ptr)
  7693  		v.AddArg(mem)
  7694  		return true
  7695  	}
  7696  	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
  7697  	// cond: is16Bit(off1+off2)
  7698  	// result: (MOVDload [off1+off2] {sym} x mem)
  7699  	for {
  7700  		off1 := v.AuxInt
  7701  		sym := v.Aux
  7702  		_ = v.Args[1]
  7703  		v_0 := v.Args[0]
  7704  		if v_0.Op != OpPPC64ADDconst {
  7705  			break
  7706  		}
  7707  		off2 := v_0.AuxInt
  7708  		x := v_0.Args[0]
  7709  		mem := v.Args[1]
  7710  		if !(is16Bit(off1 + off2)) {
  7711  			break
  7712  		}
  7713  		v.reset(OpPPC64MOVDload)
  7714  		v.AuxInt = off1 + off2
  7715  		v.Aux = sym
  7716  		v.AddArg(x)
  7717  		v.AddArg(mem)
  7718  		return true
  7719  	}
  7720  	return false
  7721  }
  7722  func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
  7723  	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
  7724  	// cond:
  7725  	// result: (FMOVDstore [off] {sym} ptr x mem)
  7726  	for {
  7727  		off := v.AuxInt
  7728  		sym := v.Aux
  7729  		_ = v.Args[2]
  7730  		ptr := v.Args[0]
  7731  		v_1 := v.Args[1]
  7732  		if v_1.Op != OpPPC64MFVSRD {
  7733  			break
  7734  		}
  7735  		x := v_1.Args[0]
  7736  		mem := v.Args[2]
  7737  		v.reset(OpPPC64FMOVDstore)
  7738  		v.AuxInt = off
  7739  		v.Aux = sym
  7740  		v.AddArg(ptr)
  7741  		v.AddArg(x)
  7742  		v.AddArg(mem)
  7743  		return true
  7744  	}
  7745  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
  7746  	// cond: is16Bit(off1+off2)
  7747  	// result: (MOVDstore [off1+off2] {sym} x val mem)
  7748  	for {
  7749  		off1 := v.AuxInt
  7750  		sym := v.Aux
  7751  		_ = v.Args[2]
  7752  		v_0 := v.Args[0]
  7753  		if v_0.Op != OpPPC64ADDconst {
  7754  			break
  7755  		}
  7756  		off2 := v_0.AuxInt
  7757  		x := v_0.Args[0]
  7758  		val := v.Args[1]
  7759  		mem := v.Args[2]
  7760  		if !(is16Bit(off1 + off2)) {
  7761  			break
  7762  		}
  7763  		v.reset(OpPPC64MOVDstore)
  7764  		v.AuxInt = off1 + off2
  7765  		v.Aux = sym
  7766  		v.AddArg(x)
  7767  		v.AddArg(val)
  7768  		v.AddArg(mem)
  7769  		return true
  7770  	}
  7771  	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7772  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7773  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7774  	for {
  7775  		off1 := v.AuxInt
  7776  		sym1 := v.Aux
  7777  		_ = v.Args[2]
  7778  		p := v.Args[0]
  7779  		if p.Op != OpPPC64MOVDaddr {
  7780  			break
  7781  		}
  7782  		off2 := p.AuxInt
  7783  		sym2 := p.Aux
  7784  		ptr := p.Args[0]
  7785  		val := v.Args[1]
  7786  		mem := v.Args[2]
  7787  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7788  			break
  7789  		}
  7790  		v.reset(OpPPC64MOVDstore)
  7791  		v.AuxInt = off1 + off2
  7792  		v.Aux = mergeSym(sym1, sym2)
  7793  		v.AddArg(ptr)
  7794  		v.AddArg(val)
  7795  		v.AddArg(mem)
  7796  		return true
  7797  	}
  7798  	// match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem)
  7799  	// cond: c == 0
  7800  	// result: (MOVDstorezero [off] {sym} ptr mem)
  7801  	for {
  7802  		off := v.AuxInt
  7803  		sym := v.Aux
  7804  		_ = v.Args[2]
  7805  		ptr := v.Args[0]
  7806  		v_1 := v.Args[1]
  7807  		if v_1.Op != OpPPC64MOVDconst {
  7808  			break
  7809  		}
  7810  		c := v_1.AuxInt
  7811  		mem := v.Args[2]
  7812  		if !(c == 0) {
  7813  			break
  7814  		}
  7815  		v.reset(OpPPC64MOVDstorezero)
  7816  		v.AuxInt = off
  7817  		v.Aux = sym
  7818  		v.AddArg(ptr)
  7819  		v.AddArg(mem)
  7820  		return true
  7821  	}
  7822  	return false
  7823  }
  7824  func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
  7825  	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
  7826  	// cond: is16Bit(off1+off2)
  7827  	// result: (MOVDstorezero [off1+off2] {sym} x mem)
  7828  	for {
  7829  		off1 := v.AuxInt
  7830  		sym := v.Aux
  7831  		_ = v.Args[1]
  7832  		v_0 := v.Args[0]
  7833  		if v_0.Op != OpPPC64ADDconst {
  7834  			break
  7835  		}
  7836  		off2 := v_0.AuxInt
  7837  		x := v_0.Args[0]
  7838  		mem := v.Args[1]
  7839  		if !(is16Bit(off1 + off2)) {
  7840  			break
  7841  		}
  7842  		v.reset(OpPPC64MOVDstorezero)
  7843  		v.AuxInt = off1 + off2
  7844  		v.Aux = sym
  7845  		v.AddArg(x)
  7846  		v.AddArg(mem)
  7847  		return true
  7848  	}
  7849  	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  7850  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  7851  	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  7852  	for {
  7853  		off1 := v.AuxInt
  7854  		sym1 := v.Aux
  7855  		_ = v.Args[1]
  7856  		p := v.Args[0]
  7857  		if p.Op != OpPPC64MOVDaddr {
  7858  			break
  7859  		}
  7860  		off2 := p.AuxInt
  7861  		sym2 := p.Aux
  7862  		x := p.Args[0]
  7863  		mem := v.Args[1]
  7864  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  7865  			break
  7866  		}
  7867  		v.reset(OpPPC64MOVDstorezero)
  7868  		v.AuxInt = off1 + off2
  7869  		v.Aux = mergeSym(sym1, sym2)
  7870  		v.AddArg(x)
  7871  		v.AddArg(mem)
  7872  		return true
  7873  	}
  7874  	return false
  7875  }
  7876  func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
  7877  	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7878  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7879  	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7880  	for {
  7881  		off1 := v.AuxInt
  7882  		sym1 := v.Aux
  7883  		_ = v.Args[1]
  7884  		p := v.Args[0]
  7885  		if p.Op != OpPPC64MOVDaddr {
  7886  			break
  7887  		}
  7888  		off2 := p.AuxInt
  7889  		sym2 := p.Aux
  7890  		ptr := p.Args[0]
  7891  		mem := v.Args[1]
  7892  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7893  			break
  7894  		}
  7895  		v.reset(OpPPC64MOVHZload)
  7896  		v.AuxInt = off1 + off2
  7897  		v.Aux = mergeSym(sym1, sym2)
  7898  		v.AddArg(ptr)
  7899  		v.AddArg(mem)
  7900  		return true
  7901  	}
  7902  	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
  7903  	// cond: is16Bit(off1+off2)
  7904  	// result: (MOVHZload [off1+off2] {sym} x mem)
  7905  	for {
  7906  		off1 := v.AuxInt
  7907  		sym := v.Aux
  7908  		_ = v.Args[1]
  7909  		v_0 := v.Args[0]
  7910  		if v_0.Op != OpPPC64ADDconst {
  7911  			break
  7912  		}
  7913  		off2 := v_0.AuxInt
  7914  		x := v_0.Args[0]
  7915  		mem := v.Args[1]
  7916  		if !(is16Bit(off1 + off2)) {
  7917  			break
  7918  		}
  7919  		v.reset(OpPPC64MOVHZload)
  7920  		v.AuxInt = off1 + off2
  7921  		v.Aux = sym
  7922  		v.AddArg(x)
  7923  		v.AddArg(mem)
  7924  		return true
  7925  	}
  7926  	return false
  7927  }
  7928  func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
  7929  	// match: (MOVHZreg y:(ANDconst [c] _))
  7930  	// cond: uint64(c) <= 0xFFFF
  7931  	// result: y
  7932  	for {
  7933  		y := v.Args[0]
  7934  		if y.Op != OpPPC64ANDconst {
  7935  			break
  7936  		}
  7937  		c := y.AuxInt
  7938  		if !(uint64(c) <= 0xFFFF) {
  7939  			break
  7940  		}
  7941  		v.reset(OpCopy)
  7942  		v.Type = y.Type
  7943  		v.AddArg(y)
  7944  		return true
  7945  	}
  7946  	// match: (MOVHZreg y:(MOVHZreg _))
  7947  	// cond:
  7948  	// result: y
  7949  	for {
  7950  		y := v.Args[0]
  7951  		if y.Op != OpPPC64MOVHZreg {
  7952  			break
  7953  		}
  7954  		v.reset(OpCopy)
  7955  		v.Type = y.Type
  7956  		v.AddArg(y)
  7957  		return true
  7958  	}
  7959  	// match: (MOVHZreg y:(MOVBZreg _))
  7960  	// cond:
  7961  	// result: y
  7962  	for {
  7963  		y := v.Args[0]
  7964  		if y.Op != OpPPC64MOVBZreg {
  7965  			break
  7966  		}
  7967  		v.reset(OpCopy)
  7968  		v.Type = y.Type
  7969  		v.AddArg(y)
  7970  		return true
  7971  	}
  7972  	// match: (MOVHZreg y:(MOVHreg x))
  7973  	// cond:
  7974  	// result: (MOVHZreg x)
  7975  	for {
  7976  		y := v.Args[0]
  7977  		if y.Op != OpPPC64MOVHreg {
  7978  			break
  7979  		}
  7980  		x := y.Args[0]
  7981  		v.reset(OpPPC64MOVHZreg)
  7982  		v.AddArg(x)
  7983  		return true
  7984  	}
  7985  	// match: (MOVHZreg x:(MOVHZload _ _))
  7986  	// cond:
  7987  	// result: x
  7988  	for {
  7989  		x := v.Args[0]
  7990  		if x.Op != OpPPC64MOVHZload {
  7991  			break
  7992  		}
  7993  		_ = x.Args[1]
  7994  		v.reset(OpCopy)
  7995  		v.Type = x.Type
  7996  		v.AddArg(x)
  7997  		return true
  7998  	}
  7999  	// match: (MOVHZreg (MOVDconst [c]))
  8000  	// cond:
  8001  	// result: (MOVDconst [int64(uint16(c))])
  8002  	for {
  8003  		v_0 := v.Args[0]
  8004  		if v_0.Op != OpPPC64MOVDconst {
  8005  			break
  8006  		}
  8007  		c := v_0.AuxInt
  8008  		v.reset(OpPPC64MOVDconst)
  8009  		v.AuxInt = int64(uint16(c))
  8010  		return true
  8011  	}
  8012  	return false
  8013  }
  8014  func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
  8015  	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8016  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8017  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8018  	for {
  8019  		off1 := v.AuxInt
  8020  		sym1 := v.Aux
  8021  		_ = v.Args[1]
  8022  		p := v.Args[0]
  8023  		if p.Op != OpPPC64MOVDaddr {
  8024  			break
  8025  		}
  8026  		off2 := p.AuxInt
  8027  		sym2 := p.Aux
  8028  		ptr := p.Args[0]
  8029  		mem := v.Args[1]
  8030  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8031  			break
  8032  		}
  8033  		v.reset(OpPPC64MOVHload)
  8034  		v.AuxInt = off1 + off2
  8035  		v.Aux = mergeSym(sym1, sym2)
  8036  		v.AddArg(ptr)
  8037  		v.AddArg(mem)
  8038  		return true
  8039  	}
  8040  	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
  8041  	// cond: is16Bit(off1+off2)
  8042  	// result: (MOVHload [off1+off2] {sym} x mem)
  8043  	for {
  8044  		off1 := v.AuxInt
  8045  		sym := v.Aux
  8046  		_ = v.Args[1]
  8047  		v_0 := v.Args[0]
  8048  		if v_0.Op != OpPPC64ADDconst {
  8049  			break
  8050  		}
  8051  		off2 := v_0.AuxInt
  8052  		x := v_0.Args[0]
  8053  		mem := v.Args[1]
  8054  		if !(is16Bit(off1 + off2)) {
  8055  			break
  8056  		}
  8057  		v.reset(OpPPC64MOVHload)
  8058  		v.AuxInt = off1 + off2
  8059  		v.Aux = sym
  8060  		v.AddArg(x)
  8061  		v.AddArg(mem)
  8062  		return true
  8063  	}
  8064  	return false
  8065  }
  8066  func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
  8067  	// match: (MOVHreg y:(ANDconst [c] _))
  8068  	// cond: uint64(c) <= 0x7FFF
  8069  	// result: y
  8070  	for {
  8071  		y := v.Args[0]
  8072  		if y.Op != OpPPC64ANDconst {
  8073  			break
  8074  		}
  8075  		c := y.AuxInt
  8076  		if !(uint64(c) <= 0x7FFF) {
  8077  			break
  8078  		}
  8079  		v.reset(OpCopy)
  8080  		v.Type = y.Type
  8081  		v.AddArg(y)
  8082  		return true
  8083  	}
  8084  	// match: (MOVHreg y:(MOVHreg _))
  8085  	// cond:
  8086  	// result: y
  8087  	for {
  8088  		y := v.Args[0]
  8089  		if y.Op != OpPPC64MOVHreg {
  8090  			break
  8091  		}
  8092  		v.reset(OpCopy)
  8093  		v.Type = y.Type
  8094  		v.AddArg(y)
  8095  		return true
  8096  	}
  8097  	// match: (MOVHreg y:(MOVBreg _))
  8098  	// cond:
  8099  	// result: y
  8100  	for {
  8101  		y := v.Args[0]
  8102  		if y.Op != OpPPC64MOVBreg {
  8103  			break
  8104  		}
  8105  		v.reset(OpCopy)
  8106  		v.Type = y.Type
  8107  		v.AddArg(y)
  8108  		return true
  8109  	}
  8110  	// match: (MOVHreg y:(MOVHZreg x))
  8111  	// cond:
  8112  	// result: (MOVHreg x)
  8113  	for {
  8114  		y := v.Args[0]
  8115  		if y.Op != OpPPC64MOVHZreg {
  8116  			break
  8117  		}
  8118  		x := y.Args[0]
  8119  		v.reset(OpPPC64MOVHreg)
  8120  		v.AddArg(x)
  8121  		return true
  8122  	}
  8123  	// match: (MOVHreg x:(MOVHload _ _))
  8124  	// cond:
  8125  	// result: x
  8126  	for {
  8127  		x := v.Args[0]
  8128  		if x.Op != OpPPC64MOVHload {
  8129  			break
  8130  		}
  8131  		_ = x.Args[1]
  8132  		v.reset(OpCopy)
  8133  		v.Type = x.Type
  8134  		v.AddArg(x)
  8135  		return true
  8136  	}
  8137  	// match: (MOVHreg (MOVDconst [c]))
  8138  	// cond:
  8139  	// result: (MOVDconst [int64(int16(c))])
  8140  	for {
  8141  		v_0 := v.Args[0]
  8142  		if v_0.Op != OpPPC64MOVDconst {
  8143  			break
  8144  		}
  8145  		c := v_0.AuxInt
  8146  		v.reset(OpPPC64MOVDconst)
  8147  		v.AuxInt = int64(int16(c))
  8148  		return true
  8149  	}
  8150  	return false
  8151  }
  8152  func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
  8153  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
  8154  	// cond: is16Bit(off1+off2)
  8155  	// result: (MOVHstore [off1+off2] {sym} x val mem)
  8156  	for {
  8157  		off1 := v.AuxInt
  8158  		sym := v.Aux
  8159  		_ = v.Args[2]
  8160  		v_0 := v.Args[0]
  8161  		if v_0.Op != OpPPC64ADDconst {
  8162  			break
  8163  		}
  8164  		off2 := v_0.AuxInt
  8165  		x := v_0.Args[0]
  8166  		val := v.Args[1]
  8167  		mem := v.Args[2]
  8168  		if !(is16Bit(off1 + off2)) {
  8169  			break
  8170  		}
  8171  		v.reset(OpPPC64MOVHstore)
  8172  		v.AuxInt = off1 + off2
  8173  		v.Aux = sym
  8174  		v.AddArg(x)
  8175  		v.AddArg(val)
  8176  		v.AddArg(mem)
  8177  		return true
  8178  	}
  8179  	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8180  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8181  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8182  	for {
  8183  		off1 := v.AuxInt
  8184  		sym1 := v.Aux
  8185  		_ = v.Args[2]
  8186  		p := v.Args[0]
  8187  		if p.Op != OpPPC64MOVDaddr {
  8188  			break
  8189  		}
  8190  		off2 := p.AuxInt
  8191  		sym2 := p.Aux
  8192  		ptr := p.Args[0]
  8193  		val := v.Args[1]
  8194  		mem := v.Args[2]
  8195  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8196  			break
  8197  		}
  8198  		v.reset(OpPPC64MOVHstore)
  8199  		v.AuxInt = off1 + off2
  8200  		v.Aux = mergeSym(sym1, sym2)
  8201  		v.AddArg(ptr)
  8202  		v.AddArg(val)
  8203  		v.AddArg(mem)
  8204  		return true
  8205  	}
  8206  	// match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem)
  8207  	// cond: c == 0
  8208  	// result: (MOVHstorezero [off] {sym} ptr mem)
  8209  	for {
  8210  		off := v.AuxInt
  8211  		sym := v.Aux
  8212  		_ = v.Args[2]
  8213  		ptr := v.Args[0]
  8214  		v_1 := v.Args[1]
  8215  		if v_1.Op != OpPPC64MOVDconst {
  8216  			break
  8217  		}
  8218  		c := v_1.AuxInt
  8219  		mem := v.Args[2]
  8220  		if !(c == 0) {
  8221  			break
  8222  		}
  8223  		v.reset(OpPPC64MOVHstorezero)
  8224  		v.AuxInt = off
  8225  		v.Aux = sym
  8226  		v.AddArg(ptr)
  8227  		v.AddArg(mem)
  8228  		return true
  8229  	}
  8230  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  8231  	// cond:
  8232  	// result: (MOVHstore [off] {sym} ptr x mem)
  8233  	for {
  8234  		off := v.AuxInt
  8235  		sym := v.Aux
  8236  		_ = v.Args[2]
  8237  		ptr := v.Args[0]
  8238  		v_1 := v.Args[1]
  8239  		if v_1.Op != OpPPC64MOVHreg {
  8240  			break
  8241  		}
  8242  		x := v_1.Args[0]
  8243  		mem := v.Args[2]
  8244  		v.reset(OpPPC64MOVHstore)
  8245  		v.AuxInt = off
  8246  		v.Aux = sym
  8247  		v.AddArg(ptr)
  8248  		v.AddArg(x)
  8249  		v.AddArg(mem)
  8250  		return true
  8251  	}
  8252  	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
  8253  	// cond:
  8254  	// result: (MOVHstore [off] {sym} ptr x mem)
  8255  	for {
  8256  		off := v.AuxInt
  8257  		sym := v.Aux
  8258  		_ = v.Args[2]
  8259  		ptr := v.Args[0]
  8260  		v_1 := v.Args[1]
  8261  		if v_1.Op != OpPPC64MOVHZreg {
  8262  			break
  8263  		}
  8264  		x := v_1.Args[0]
  8265  		mem := v.Args[2]
  8266  		v.reset(OpPPC64MOVHstore)
  8267  		v.AuxInt = off
  8268  		v.Aux = sym
  8269  		v.AddArg(ptr)
  8270  		v.AddArg(x)
  8271  		v.AddArg(mem)
  8272  		return true
  8273  	}
  8274  	return false
  8275  }
  8276  func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
  8277  	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
  8278  	// cond: is16Bit(off1+off2)
  8279  	// result: (MOVHstorezero [off1+off2] {sym} x mem)
  8280  	for {
  8281  		off1 := v.AuxInt
  8282  		sym := v.Aux
  8283  		_ = v.Args[1]
  8284  		v_0 := v.Args[0]
  8285  		if v_0.Op != OpPPC64ADDconst {
  8286  			break
  8287  		}
  8288  		off2 := v_0.AuxInt
  8289  		x := v_0.Args[0]
  8290  		mem := v.Args[1]
  8291  		if !(is16Bit(off1 + off2)) {
  8292  			break
  8293  		}
  8294  		v.reset(OpPPC64MOVHstorezero)
  8295  		v.AuxInt = off1 + off2
  8296  		v.Aux = sym
  8297  		v.AddArg(x)
  8298  		v.AddArg(mem)
  8299  		return true
  8300  	}
  8301  	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  8302  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  8303  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  8304  	for {
  8305  		off1 := v.AuxInt
  8306  		sym1 := v.Aux
  8307  		_ = v.Args[1]
  8308  		p := v.Args[0]
  8309  		if p.Op != OpPPC64MOVDaddr {
  8310  			break
  8311  		}
  8312  		off2 := p.AuxInt
  8313  		sym2 := p.Aux
  8314  		x := p.Args[0]
  8315  		mem := v.Args[1]
  8316  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  8317  			break
  8318  		}
  8319  		v.reset(OpPPC64MOVHstorezero)
  8320  		v.AuxInt = off1 + off2
  8321  		v.Aux = mergeSym(sym1, sym2)
  8322  		v.AddArg(x)
  8323  		v.AddArg(mem)
  8324  		return true
  8325  	}
  8326  	return false
  8327  }
  8328  func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
  8329  	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8330  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8331  	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8332  	for {
  8333  		off1 := v.AuxInt
  8334  		sym1 := v.Aux
  8335  		_ = v.Args[1]
  8336  		p := v.Args[0]
  8337  		if p.Op != OpPPC64MOVDaddr {
  8338  			break
  8339  		}
  8340  		off2 := p.AuxInt
  8341  		sym2 := p.Aux
  8342  		ptr := p.Args[0]
  8343  		mem := v.Args[1]
  8344  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8345  			break
  8346  		}
  8347  		v.reset(OpPPC64MOVWZload)
  8348  		v.AuxInt = off1 + off2
  8349  		v.Aux = mergeSym(sym1, sym2)
  8350  		v.AddArg(ptr)
  8351  		v.AddArg(mem)
  8352  		return true
  8353  	}
  8354  	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
  8355  	// cond: is16Bit(off1+off2)
  8356  	// result: (MOVWZload [off1+off2] {sym} x mem)
  8357  	for {
  8358  		off1 := v.AuxInt
  8359  		sym := v.Aux
  8360  		_ = v.Args[1]
  8361  		v_0 := v.Args[0]
  8362  		if v_0.Op != OpPPC64ADDconst {
  8363  			break
  8364  		}
  8365  		off2 := v_0.AuxInt
  8366  		x := v_0.Args[0]
  8367  		mem := v.Args[1]
  8368  		if !(is16Bit(off1 + off2)) {
  8369  			break
  8370  		}
  8371  		v.reset(OpPPC64MOVWZload)
  8372  		v.AuxInt = off1 + off2
  8373  		v.Aux = sym
  8374  		v.AddArg(x)
  8375  		v.AddArg(mem)
  8376  		return true
  8377  	}
  8378  	return false
  8379  }
  8380  func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
  8381  	// match: (MOVWZreg y:(ANDconst [c] _))
  8382  	// cond: uint64(c) <= 0xFFFFFFFF
  8383  	// result: y
  8384  	for {
  8385  		y := v.Args[0]
  8386  		if y.Op != OpPPC64ANDconst {
  8387  			break
  8388  		}
  8389  		c := y.AuxInt
  8390  		if !(uint64(c) <= 0xFFFFFFFF) {
  8391  			break
  8392  		}
  8393  		v.reset(OpCopy)
  8394  		v.Type = y.Type
  8395  		v.AddArg(y)
  8396  		return true
  8397  	}
  8398  	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
  8399  	// cond: uint64(c) <= 0xFFFFFFFF
  8400  	// result: y
  8401  	for {
  8402  		y := v.Args[0]
  8403  		if y.Op != OpPPC64AND {
  8404  			break
  8405  		}
  8406  		_ = y.Args[1]
  8407  		y_0 := y.Args[0]
  8408  		if y_0.Op != OpPPC64MOVDconst {
  8409  			break
  8410  		}
  8411  		c := y_0.AuxInt
  8412  		if !(uint64(c) <= 0xFFFFFFFF) {
  8413  			break
  8414  		}
  8415  		v.reset(OpCopy)
  8416  		v.Type = y.Type
  8417  		v.AddArg(y)
  8418  		return true
  8419  	}
  8420  	// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
  8421  	// cond: uint64(c) <= 0xFFFFFFFF
  8422  	// result: y
  8423  	for {
  8424  		y := v.Args[0]
  8425  		if y.Op != OpPPC64AND {
  8426  			break
  8427  		}
  8428  		_ = y.Args[1]
  8429  		y_1 := y.Args[1]
  8430  		if y_1.Op != OpPPC64MOVDconst {
  8431  			break
  8432  		}
  8433  		c := y_1.AuxInt
  8434  		if !(uint64(c) <= 0xFFFFFFFF) {
  8435  			break
  8436  		}
  8437  		v.reset(OpCopy)
  8438  		v.Type = y.Type
  8439  		v.AddArg(y)
  8440  		return true
  8441  	}
  8442  	// match: (MOVWZreg y:(MOVWZreg _))
  8443  	// cond:
  8444  	// result: y
  8445  	for {
  8446  		y := v.Args[0]
  8447  		if y.Op != OpPPC64MOVWZreg {
  8448  			break
  8449  		}
  8450  		v.reset(OpCopy)
  8451  		v.Type = y.Type
  8452  		v.AddArg(y)
  8453  		return true
  8454  	}
  8455  	// match: (MOVWZreg y:(MOVHZreg _))
  8456  	// cond:
  8457  	// result: y
  8458  	for {
  8459  		y := v.Args[0]
  8460  		if y.Op != OpPPC64MOVHZreg {
  8461  			break
  8462  		}
  8463  		v.reset(OpCopy)
  8464  		v.Type = y.Type
  8465  		v.AddArg(y)
  8466  		return true
  8467  	}
  8468  	// match: (MOVWZreg y:(MOVBZreg _))
  8469  	// cond:
  8470  	// result: y
  8471  	for {
  8472  		y := v.Args[0]
  8473  		if y.Op != OpPPC64MOVBZreg {
  8474  			break
  8475  		}
  8476  		v.reset(OpCopy)
  8477  		v.Type = y.Type
  8478  		v.AddArg(y)
  8479  		return true
  8480  	}
  8481  	// match: (MOVWZreg y:(MOVWreg x))
  8482  	// cond:
  8483  	// result: (MOVWZreg x)
  8484  	for {
  8485  		y := v.Args[0]
  8486  		if y.Op != OpPPC64MOVWreg {
  8487  			break
  8488  		}
  8489  		x := y.Args[0]
  8490  		v.reset(OpPPC64MOVWZreg)
  8491  		v.AddArg(x)
  8492  		return true
  8493  	}
  8494  	return false
  8495  }
  8496  func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
  8497  	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8498  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8499  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8500  	for {
  8501  		off1 := v.AuxInt
  8502  		sym1 := v.Aux
  8503  		_ = v.Args[1]
  8504  		p := v.Args[0]
  8505  		if p.Op != OpPPC64MOVDaddr {
  8506  			break
  8507  		}
  8508  		off2 := p.AuxInt
  8509  		sym2 := p.Aux
  8510  		ptr := p.Args[0]
  8511  		mem := v.Args[1]
  8512  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8513  			break
  8514  		}
  8515  		v.reset(OpPPC64MOVWload)
  8516  		v.AuxInt = off1 + off2
  8517  		v.Aux = mergeSym(sym1, sym2)
  8518  		v.AddArg(ptr)
  8519  		v.AddArg(mem)
  8520  		return true
  8521  	}
  8522  	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
  8523  	// cond: is16Bit(off1+off2)
  8524  	// result: (MOVWload [off1+off2] {sym} x mem)
  8525  	for {
  8526  		off1 := v.AuxInt
  8527  		sym := v.Aux
  8528  		_ = v.Args[1]
  8529  		v_0 := v.Args[0]
  8530  		if v_0.Op != OpPPC64ADDconst {
  8531  			break
  8532  		}
  8533  		off2 := v_0.AuxInt
  8534  		x := v_0.Args[0]
  8535  		mem := v.Args[1]
  8536  		if !(is16Bit(off1 + off2)) {
  8537  			break
  8538  		}
  8539  		v.reset(OpPPC64MOVWload)
  8540  		v.AuxInt = off1 + off2
  8541  		v.Aux = sym
  8542  		v.AddArg(x)
  8543  		v.AddArg(mem)
  8544  		return true
  8545  	}
  8546  	return false
  8547  }
  8548  func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
  8549  	// match: (MOVWreg y:(ANDconst [c] _))
  8550  	// cond: uint64(c) <= 0xFFFF
  8551  	// result: y
  8552  	for {
  8553  		y := v.Args[0]
  8554  		if y.Op != OpPPC64ANDconst {
  8555  			break
  8556  		}
  8557  		c := y.AuxInt
  8558  		if !(uint64(c) <= 0xFFFF) {
  8559  			break
  8560  		}
  8561  		v.reset(OpCopy)
  8562  		v.Type = y.Type
  8563  		v.AddArg(y)
  8564  		return true
  8565  	}
  8566  	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
  8567  	// cond: uint64(c) <= 0x7FFFFFFF
  8568  	// result: y
  8569  	for {
  8570  		y := v.Args[0]
  8571  		if y.Op != OpPPC64AND {
  8572  			break
  8573  		}
  8574  		_ = y.Args[1]
  8575  		y_0 := y.Args[0]
  8576  		if y_0.Op != OpPPC64MOVDconst {
  8577  			break
  8578  		}
  8579  		c := y_0.AuxInt
  8580  		if !(uint64(c) <= 0x7FFFFFFF) {
  8581  			break
  8582  		}
  8583  		v.reset(OpCopy)
  8584  		v.Type = y.Type
  8585  		v.AddArg(y)
  8586  		return true
  8587  	}
  8588  	// match: (MOVWreg y:(AND _ (MOVDconst [c])))
  8589  	// cond: uint64(c) <= 0x7FFFFFFF
  8590  	// result: y
  8591  	for {
  8592  		y := v.Args[0]
  8593  		if y.Op != OpPPC64AND {
  8594  			break
  8595  		}
  8596  		_ = y.Args[1]
  8597  		y_1 := y.Args[1]
  8598  		if y_1.Op != OpPPC64MOVDconst {
  8599  			break
  8600  		}
  8601  		c := y_1.AuxInt
  8602  		if !(uint64(c) <= 0x7FFFFFFF) {
  8603  			break
  8604  		}
  8605  		v.reset(OpCopy)
  8606  		v.Type = y.Type
  8607  		v.AddArg(y)
  8608  		return true
  8609  	}
  8610  	// match: (MOVWreg y:(MOVWreg _))
  8611  	// cond:
  8612  	// result: y
  8613  	for {
  8614  		y := v.Args[0]
  8615  		if y.Op != OpPPC64MOVWreg {
  8616  			break
  8617  		}
  8618  		v.reset(OpCopy)
  8619  		v.Type = y.Type
  8620  		v.AddArg(y)
  8621  		return true
  8622  	}
  8623  	// match: (MOVWreg y:(MOVHreg _))
  8624  	// cond:
  8625  	// result: y
  8626  	for {
  8627  		y := v.Args[0]
  8628  		if y.Op != OpPPC64MOVHreg {
  8629  			break
  8630  		}
  8631  		v.reset(OpCopy)
  8632  		v.Type = y.Type
  8633  		v.AddArg(y)
  8634  		return true
  8635  	}
  8636  	// match: (MOVWreg y:(MOVBreg _))
  8637  	// cond:
  8638  	// result: y
  8639  	for {
  8640  		y := v.Args[0]
  8641  		if y.Op != OpPPC64MOVBreg {
  8642  			break
  8643  		}
  8644  		v.reset(OpCopy)
  8645  		v.Type = y.Type
  8646  		v.AddArg(y)
  8647  		return true
  8648  	}
  8649  	// match: (MOVWreg y:(MOVWZreg x))
  8650  	// cond:
  8651  	// result: (MOVWreg x)
  8652  	for {
  8653  		y := v.Args[0]
  8654  		if y.Op != OpPPC64MOVWZreg {
  8655  			break
  8656  		}
  8657  		x := y.Args[0]
  8658  		v.reset(OpPPC64MOVWreg)
  8659  		v.AddArg(x)
  8660  		return true
  8661  	}
  8662  	return false
  8663  }
  8664  func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
  8665  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
  8666  	// cond: is16Bit(off1+off2)
  8667  	// result: (MOVWstore [off1+off2] {sym} x val mem)
  8668  	for {
  8669  		off1 := v.AuxInt
  8670  		sym := v.Aux
  8671  		_ = v.Args[2]
  8672  		v_0 := v.Args[0]
  8673  		if v_0.Op != OpPPC64ADDconst {
  8674  			break
  8675  		}
  8676  		off2 := v_0.AuxInt
  8677  		x := v_0.Args[0]
  8678  		val := v.Args[1]
  8679  		mem := v.Args[2]
  8680  		if !(is16Bit(off1 + off2)) {
  8681  			break
  8682  		}
  8683  		v.reset(OpPPC64MOVWstore)
  8684  		v.AuxInt = off1 + off2
  8685  		v.Aux = sym
  8686  		v.AddArg(x)
  8687  		v.AddArg(val)
  8688  		v.AddArg(mem)
  8689  		return true
  8690  	}
  8691  	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8692  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8693  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8694  	for {
  8695  		off1 := v.AuxInt
  8696  		sym1 := v.Aux
  8697  		_ = v.Args[2]
  8698  		p := v.Args[0]
  8699  		if p.Op != OpPPC64MOVDaddr {
  8700  			break
  8701  		}
  8702  		off2 := p.AuxInt
  8703  		sym2 := p.Aux
  8704  		ptr := p.Args[0]
  8705  		val := v.Args[1]
  8706  		mem := v.Args[2]
  8707  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8708  			break
  8709  		}
  8710  		v.reset(OpPPC64MOVWstore)
  8711  		v.AuxInt = off1 + off2
  8712  		v.Aux = mergeSym(sym1, sym2)
  8713  		v.AddArg(ptr)
  8714  		v.AddArg(val)
  8715  		v.AddArg(mem)
  8716  		return true
  8717  	}
  8718  	// match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem)
  8719  	// cond: c == 0
  8720  	// result: (MOVWstorezero [off] {sym} ptr mem)
  8721  	for {
  8722  		off := v.AuxInt
  8723  		sym := v.Aux
  8724  		_ = v.Args[2]
  8725  		ptr := v.Args[0]
  8726  		v_1 := v.Args[1]
  8727  		if v_1.Op != OpPPC64MOVDconst {
  8728  			break
  8729  		}
  8730  		c := v_1.AuxInt
  8731  		mem := v.Args[2]
  8732  		if !(c == 0) {
  8733  			break
  8734  		}
  8735  		v.reset(OpPPC64MOVWstorezero)
  8736  		v.AuxInt = off
  8737  		v.Aux = sym
  8738  		v.AddArg(ptr)
  8739  		v.AddArg(mem)
  8740  		return true
  8741  	}
  8742  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  8743  	// cond:
  8744  	// result: (MOVWstore [off] {sym} ptr x mem)
  8745  	for {
  8746  		off := v.AuxInt
  8747  		sym := v.Aux
  8748  		_ = v.Args[2]
  8749  		ptr := v.Args[0]
  8750  		v_1 := v.Args[1]
  8751  		if v_1.Op != OpPPC64MOVWreg {
  8752  			break
  8753  		}
  8754  		x := v_1.Args[0]
  8755  		mem := v.Args[2]
  8756  		v.reset(OpPPC64MOVWstore)
  8757  		v.AuxInt = off
  8758  		v.Aux = sym
  8759  		v.AddArg(ptr)
  8760  		v.AddArg(x)
  8761  		v.AddArg(mem)
  8762  		return true
  8763  	}
  8764  	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
  8765  	// cond:
  8766  	// result: (MOVWstore [off] {sym} ptr x mem)
  8767  	for {
  8768  		off := v.AuxInt
  8769  		sym := v.Aux
  8770  		_ = v.Args[2]
  8771  		ptr := v.Args[0]
  8772  		v_1 := v.Args[1]
  8773  		if v_1.Op != OpPPC64MOVWZreg {
  8774  			break
  8775  		}
  8776  		x := v_1.Args[0]
  8777  		mem := v.Args[2]
  8778  		v.reset(OpPPC64MOVWstore)
  8779  		v.AuxInt = off
  8780  		v.Aux = sym
  8781  		v.AddArg(ptr)
  8782  		v.AddArg(x)
  8783  		v.AddArg(mem)
  8784  		return true
  8785  	}
  8786  	return false
  8787  }
  8788  func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
  8789  	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
  8790  	// cond: is16Bit(off1+off2)
  8791  	// result: (MOVWstorezero [off1+off2] {sym} x mem)
  8792  	for {
  8793  		off1 := v.AuxInt
  8794  		sym := v.Aux
  8795  		_ = v.Args[1]
  8796  		v_0 := v.Args[0]
  8797  		if v_0.Op != OpPPC64ADDconst {
  8798  			break
  8799  		}
  8800  		off2 := v_0.AuxInt
  8801  		x := v_0.Args[0]
  8802  		mem := v.Args[1]
  8803  		if !(is16Bit(off1 + off2)) {
  8804  			break
  8805  		}
  8806  		v.reset(OpPPC64MOVWstorezero)
  8807  		v.AuxInt = off1 + off2
  8808  		v.Aux = sym
  8809  		v.AddArg(x)
  8810  		v.AddArg(mem)
  8811  		return true
  8812  	}
  8813  	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  8814  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  8815  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  8816  	for {
  8817  		off1 := v.AuxInt
  8818  		sym1 := v.Aux
  8819  		_ = v.Args[1]
  8820  		p := v.Args[0]
  8821  		if p.Op != OpPPC64MOVDaddr {
  8822  			break
  8823  		}
  8824  		off2 := p.AuxInt
  8825  		sym2 := p.Aux
  8826  		x := p.Args[0]
  8827  		mem := v.Args[1]
  8828  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  8829  			break
  8830  		}
  8831  		v.reset(OpPPC64MOVWstorezero)
  8832  		v.AuxInt = off1 + off2
  8833  		v.Aux = mergeSym(sym1, sym2)
  8834  		v.AddArg(x)
  8835  		v.AddArg(mem)
  8836  		return true
  8837  	}
  8838  	return false
  8839  }
  8840  func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
  8841  	b := v.Block
  8842  	_ = b
  8843  	typ := &b.Func.Config.Types
  8844  	_ = typ
  8845  	// match: (MTVSRD (MOVDconst [c]))
  8846  	// cond:
  8847  	// result: (FMOVDconst [c])
  8848  	for {
  8849  		v_0 := v.Args[0]
  8850  		if v_0.Op != OpPPC64MOVDconst {
  8851  			break
  8852  		}
  8853  		c := v_0.AuxInt
  8854  		v.reset(OpPPC64FMOVDconst)
  8855  		v.AuxInt = c
  8856  		return true
  8857  	}
  8858  	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
  8859  	// cond: x.Uses == 1 && clobber(x)
  8860  	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
  8861  	for {
  8862  		x := v.Args[0]
  8863  		if x.Op != OpPPC64MOVDload {
  8864  			break
  8865  		}
  8866  		off := x.AuxInt
  8867  		sym := x.Aux
  8868  		_ = x.Args[1]
  8869  		ptr := x.Args[0]
  8870  		mem := x.Args[1]
  8871  		if !(x.Uses == 1 && clobber(x)) {
  8872  			break
  8873  		}
  8874  		b = x.Block
  8875  		v0 := b.NewValue0(v.Pos, OpPPC64FMOVDload, typ.Float64)
  8876  		v.reset(OpCopy)
  8877  		v.AddArg(v0)
  8878  		v0.AuxInt = off
  8879  		v0.Aux = sym
  8880  		v0.AddArg(ptr)
  8881  		v0.AddArg(mem)
  8882  		return true
  8883  	}
  8884  	return false
  8885  }
  8886  func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
  8887  	// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
  8888  	// cond: c < 0 && d > 0 && c + d < 0
  8889  	// result: (MOVDconst [-1])
  8890  	for {
  8891  		v_0 := v.Args[0]
  8892  		if v_0.Op != OpPPC64ADDconstForCarry {
  8893  			break
  8894  		}
  8895  		c := v_0.AuxInt
  8896  		v_0_0 := v_0.Args[0]
  8897  		if v_0_0.Op != OpPPC64ANDconst {
  8898  			break
  8899  		}
  8900  		d := v_0_0.AuxInt
  8901  		if !(c < 0 && d > 0 && c+d < 0) {
  8902  			break
  8903  		}
  8904  		v.reset(OpPPC64MOVDconst)
  8905  		v.AuxInt = -1
  8906  		return true
  8907  	}
  8908  	return false
  8909  }
  8910  func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
  8911  	// match: (NotEqual (FlagEQ))
  8912  	// cond:
  8913  	// result: (MOVDconst [0])
  8914  	for {
  8915  		v_0 := v.Args[0]
  8916  		if v_0.Op != OpPPC64FlagEQ {
  8917  			break
  8918  		}
  8919  		v.reset(OpPPC64MOVDconst)
  8920  		v.AuxInt = 0
  8921  		return true
  8922  	}
  8923  	// match: (NotEqual (FlagLT))
  8924  	// cond:
  8925  	// result: (MOVDconst [1])
  8926  	for {
  8927  		v_0 := v.Args[0]
  8928  		if v_0.Op != OpPPC64FlagLT {
  8929  			break
  8930  		}
  8931  		v.reset(OpPPC64MOVDconst)
  8932  		v.AuxInt = 1
  8933  		return true
  8934  	}
  8935  	// match: (NotEqual (FlagGT))
  8936  	// cond:
  8937  	// result: (MOVDconst [1])
  8938  	for {
  8939  		v_0 := v.Args[0]
  8940  		if v_0.Op != OpPPC64FlagGT {
  8941  			break
  8942  		}
  8943  		v.reset(OpPPC64MOVDconst)
  8944  		v.AuxInt = 1
  8945  		return true
  8946  	}
  8947  	// match: (NotEqual (InvertFlags x))
  8948  	// cond:
  8949  	// result: (NotEqual x)
  8950  	for {
  8951  		v_0 := v.Args[0]
  8952  		if v_0.Op != OpPPC64InvertFlags {
  8953  			break
  8954  		}
  8955  		x := v_0.Args[0]
  8956  		v.reset(OpPPC64NotEqual)
  8957  		v.AddArg(x)
  8958  		return true
  8959  	}
  8960  	return false
  8961  }
  8962  func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
  8963  	b := v.Block
  8964  	_ = b
  8965  	typ := &b.Func.Config.Types
  8966  	_ = typ
  8967  	// match: (OR (SLDconst x [c]) (SRDconst x [d]))
  8968  	// cond: d == 64-c
  8969  	// result: (ROTLconst [c] x)
  8970  	for {
  8971  		_ = v.Args[1]
  8972  		v_0 := v.Args[0]
  8973  		if v_0.Op != OpPPC64SLDconst {
  8974  			break
  8975  		}
  8976  		c := v_0.AuxInt
  8977  		x := v_0.Args[0]
  8978  		v_1 := v.Args[1]
  8979  		if v_1.Op != OpPPC64SRDconst {
  8980  			break
  8981  		}
  8982  		d := v_1.AuxInt
  8983  		if x != v_1.Args[0] {
  8984  			break
  8985  		}
  8986  		if !(d == 64-c) {
  8987  			break
  8988  		}
  8989  		v.reset(OpPPC64ROTLconst)
  8990  		v.AuxInt = c
  8991  		v.AddArg(x)
  8992  		return true
  8993  	}
  8994  	// match: (OR (SRDconst x [d]) (SLDconst x [c]))
  8995  	// cond: d == 64-c
  8996  	// result: (ROTLconst [c] x)
  8997  	for {
  8998  		_ = v.Args[1]
  8999  		v_0 := v.Args[0]
  9000  		if v_0.Op != OpPPC64SRDconst {
  9001  			break
  9002  		}
  9003  		d := v_0.AuxInt
  9004  		x := v_0.Args[0]
  9005  		v_1 := v.Args[1]
  9006  		if v_1.Op != OpPPC64SLDconst {
  9007  			break
  9008  		}
  9009  		c := v_1.AuxInt
  9010  		if x != v_1.Args[0] {
  9011  			break
  9012  		}
  9013  		if !(d == 64-c) {
  9014  			break
  9015  		}
  9016  		v.reset(OpPPC64ROTLconst)
  9017  		v.AuxInt = c
  9018  		v.AddArg(x)
  9019  		return true
  9020  	}
  9021  	// match: (OR (SLWconst x [c]) (SRWconst x [d]))
  9022  	// cond: d == 32-c
  9023  	// result: (ROTLWconst [c] x)
  9024  	for {
  9025  		_ = v.Args[1]
  9026  		v_0 := v.Args[0]
  9027  		if v_0.Op != OpPPC64SLWconst {
  9028  			break
  9029  		}
  9030  		c := v_0.AuxInt
  9031  		x := v_0.Args[0]
  9032  		v_1 := v.Args[1]
  9033  		if v_1.Op != OpPPC64SRWconst {
  9034  			break
  9035  		}
  9036  		d := v_1.AuxInt
  9037  		if x != v_1.Args[0] {
  9038  			break
  9039  		}
  9040  		if !(d == 32-c) {
  9041  			break
  9042  		}
  9043  		v.reset(OpPPC64ROTLWconst)
  9044  		v.AuxInt = c
  9045  		v.AddArg(x)
  9046  		return true
  9047  	}
  9048  	// match: (OR (SRWconst x [d]) (SLWconst x [c]))
  9049  	// cond: d == 32-c
  9050  	// result: (ROTLWconst [c] x)
  9051  	for {
  9052  		_ = v.Args[1]
  9053  		v_0 := v.Args[0]
  9054  		if v_0.Op != OpPPC64SRWconst {
  9055  			break
  9056  		}
  9057  		d := v_0.AuxInt
  9058  		x := v_0.Args[0]
  9059  		v_1 := v.Args[1]
  9060  		if v_1.Op != OpPPC64SLWconst {
  9061  			break
  9062  		}
  9063  		c := v_1.AuxInt
  9064  		if x != v_1.Args[0] {
  9065  			break
  9066  		}
  9067  		if !(d == 32-c) {
  9068  			break
  9069  		}
  9070  		v.reset(OpPPC64ROTLWconst)
  9071  		v.AuxInt = c
  9072  		v.AddArg(x)
  9073  		return true
  9074  	}
  9075  	// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  9076  	// cond:
  9077  	// result: (ROTL x y)
  9078  	for {
  9079  		_ = v.Args[1]
  9080  		v_0 := v.Args[0]
  9081  		if v_0.Op != OpPPC64SLD {
  9082  			break
  9083  		}
  9084  		_ = v_0.Args[1]
  9085  		x := v_0.Args[0]
  9086  		v_0_1 := v_0.Args[1]
  9087  		if v_0_1.Op != OpPPC64ANDconst {
  9088  			break
  9089  		}
  9090  		if v_0_1.Type != typ.Int64 {
  9091  			break
  9092  		}
  9093  		if v_0_1.AuxInt != 63 {
  9094  			break
  9095  		}
  9096  		y := v_0_1.Args[0]
  9097  		v_1 := v.Args[1]
  9098  		if v_1.Op != OpPPC64SRD {
  9099  			break
  9100  		}
  9101  		_ = v_1.Args[1]
  9102  		if x != v_1.Args[0] {
  9103  			break
  9104  		}
  9105  		v_1_1 := v_1.Args[1]
  9106  		if v_1_1.Op != OpPPC64SUB {
  9107  			break
  9108  		}
  9109  		if v_1_1.Type != typ.UInt {
  9110  			break
  9111  		}
  9112  		_ = v_1_1.Args[1]
  9113  		v_1_1_0 := v_1_1.Args[0]
  9114  		if v_1_1_0.Op != OpPPC64MOVDconst {
  9115  			break
  9116  		}
  9117  		if v_1_1_0.AuxInt != 64 {
  9118  			break
  9119  		}
  9120  		v_1_1_1 := v_1_1.Args[1]
  9121  		if v_1_1_1.Op != OpPPC64ANDconst {
  9122  			break
  9123  		}
  9124  		if v_1_1_1.Type != typ.UInt {
  9125  			break
  9126  		}
  9127  		if v_1_1_1.AuxInt != 63 {
  9128  			break
  9129  		}
  9130  		if y != v_1_1_1.Args[0] {
  9131  			break
  9132  		}
  9133  		v.reset(OpPPC64ROTL)
  9134  		v.AddArg(x)
  9135  		v.AddArg(y)
  9136  		return true
  9137  	}
  9138  	// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  9139  	// cond:
  9140  	// result: (ROTL x y)
  9141  	for {
  9142  		_ = v.Args[1]
  9143  		v_0 := v.Args[0]
  9144  		if v_0.Op != OpPPC64SRD {
  9145  			break
  9146  		}
  9147  		_ = v_0.Args[1]
  9148  		x := v_0.Args[0]
  9149  		v_0_1 := v_0.Args[1]
  9150  		if v_0_1.Op != OpPPC64SUB {
  9151  			break
  9152  		}
  9153  		if v_0_1.Type != typ.UInt {
  9154  			break
  9155  		}
  9156  		_ = v_0_1.Args[1]
  9157  		v_0_1_0 := v_0_1.Args[0]
  9158  		if v_0_1_0.Op != OpPPC64MOVDconst {
  9159  			break
  9160  		}
  9161  		if v_0_1_0.AuxInt != 64 {
  9162  			break
  9163  		}
  9164  		v_0_1_1 := v_0_1.Args[1]
  9165  		if v_0_1_1.Op != OpPPC64ANDconst {
  9166  			break
  9167  		}
  9168  		if v_0_1_1.Type != typ.UInt {
  9169  			break
  9170  		}
  9171  		if v_0_1_1.AuxInt != 63 {
  9172  			break
  9173  		}
  9174  		y := v_0_1_1.Args[0]
  9175  		v_1 := v.Args[1]
  9176  		if v_1.Op != OpPPC64SLD {
  9177  			break
  9178  		}
  9179  		_ = v_1.Args[1]
  9180  		if x != v_1.Args[0] {
  9181  			break
  9182  		}
  9183  		v_1_1 := v_1.Args[1]
  9184  		if v_1_1.Op != OpPPC64ANDconst {
  9185  			break
  9186  		}
  9187  		if v_1_1.Type != typ.Int64 {
  9188  			break
  9189  		}
  9190  		if v_1_1.AuxInt != 63 {
  9191  			break
  9192  		}
  9193  		if y != v_1_1.Args[0] {
  9194  			break
  9195  		}
  9196  		v.reset(OpPPC64ROTL)
  9197  		v.AddArg(x)
  9198  		v.AddArg(y)
  9199  		return true
  9200  	}
  9201  	// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  9202  	// cond:
  9203  	// result: (ROTLW x y)
  9204  	for {
  9205  		_ = v.Args[1]
  9206  		v_0 := v.Args[0]
  9207  		if v_0.Op != OpPPC64SLW {
  9208  			break
  9209  		}
  9210  		_ = v_0.Args[1]
  9211  		x := v_0.Args[0]
  9212  		v_0_1 := v_0.Args[1]
  9213  		if v_0_1.Op != OpPPC64ANDconst {
  9214  			break
  9215  		}
  9216  		if v_0_1.Type != typ.Int32 {
  9217  			break
  9218  		}
  9219  		if v_0_1.AuxInt != 31 {
  9220  			break
  9221  		}
  9222  		y := v_0_1.Args[0]
  9223  		v_1 := v.Args[1]
  9224  		if v_1.Op != OpPPC64SRW {
  9225  			break
  9226  		}
  9227  		_ = v_1.Args[1]
  9228  		if x != v_1.Args[0] {
  9229  			break
  9230  		}
  9231  		v_1_1 := v_1.Args[1]
  9232  		if v_1_1.Op != OpPPC64SUB {
  9233  			break
  9234  		}
  9235  		if v_1_1.Type != typ.UInt {
  9236  			break
  9237  		}
  9238  		_ = v_1_1.Args[1]
  9239  		v_1_1_0 := v_1_1.Args[0]
  9240  		if v_1_1_0.Op != OpPPC64MOVDconst {
  9241  			break
  9242  		}
  9243  		if v_1_1_0.AuxInt != 32 {
  9244  			break
  9245  		}
  9246  		v_1_1_1 := v_1_1.Args[1]
  9247  		if v_1_1_1.Op != OpPPC64ANDconst {
  9248  			break
  9249  		}
  9250  		if v_1_1_1.Type != typ.UInt {
  9251  			break
  9252  		}
  9253  		if v_1_1_1.AuxInt != 31 {
  9254  			break
  9255  		}
  9256  		if y != v_1_1_1.Args[0] {
  9257  			break
  9258  		}
  9259  		v.reset(OpPPC64ROTLW)
  9260  		v.AddArg(x)
  9261  		v.AddArg(y)
  9262  		return true
  9263  	}
  9264  	// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  9265  	// cond:
  9266  	// result: (ROTLW x y)
  9267  	for {
  9268  		_ = v.Args[1]
  9269  		v_0 := v.Args[0]
  9270  		if v_0.Op != OpPPC64SRW {
  9271  			break
  9272  		}
  9273  		_ = v_0.Args[1]
  9274  		x := v_0.Args[0]
  9275  		v_0_1 := v_0.Args[1]
  9276  		if v_0_1.Op != OpPPC64SUB {
  9277  			break
  9278  		}
  9279  		if v_0_1.Type != typ.UInt {
  9280  			break
  9281  		}
  9282  		_ = v_0_1.Args[1]
  9283  		v_0_1_0 := v_0_1.Args[0]
  9284  		if v_0_1_0.Op != OpPPC64MOVDconst {
  9285  			break
  9286  		}
  9287  		if v_0_1_0.AuxInt != 32 {
  9288  			break
  9289  		}
  9290  		v_0_1_1 := v_0_1.Args[1]
  9291  		if v_0_1_1.Op != OpPPC64ANDconst {
  9292  			break
  9293  		}
  9294  		if v_0_1_1.Type != typ.UInt {
  9295  			break
  9296  		}
  9297  		if v_0_1_1.AuxInt != 31 {
  9298  			break
  9299  		}
  9300  		y := v_0_1_1.Args[0]
  9301  		v_1 := v.Args[1]
  9302  		if v_1.Op != OpPPC64SLW {
  9303  			break
  9304  		}
  9305  		_ = v_1.Args[1]
  9306  		if x != v_1.Args[0] {
  9307  			break
  9308  		}
  9309  		v_1_1 := v_1.Args[1]
  9310  		if v_1_1.Op != OpPPC64ANDconst {
  9311  			break
  9312  		}
  9313  		if v_1_1.Type != typ.Int32 {
  9314  			break
  9315  		}
  9316  		if v_1_1.AuxInt != 31 {
  9317  			break
  9318  		}
  9319  		if y != v_1_1.Args[0] {
  9320  			break
  9321  		}
  9322  		v.reset(OpPPC64ROTLW)
  9323  		v.AddArg(x)
  9324  		v.AddArg(y)
  9325  		return true
  9326  	}
  9327  	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
  9328  	// cond:
  9329  	// result: (MOVDconst [c|d])
  9330  	for {
  9331  		_ = v.Args[1]
  9332  		v_0 := v.Args[0]
  9333  		if v_0.Op != OpPPC64MOVDconst {
  9334  			break
  9335  		}
  9336  		c := v_0.AuxInt
  9337  		v_1 := v.Args[1]
  9338  		if v_1.Op != OpPPC64MOVDconst {
  9339  			break
  9340  		}
  9341  		d := v_1.AuxInt
  9342  		v.reset(OpPPC64MOVDconst)
  9343  		v.AuxInt = c | d
  9344  		return true
  9345  	}
  9346  	// match: (OR (MOVDconst [d]) (MOVDconst [c]))
  9347  	// cond:
  9348  	// result: (MOVDconst [c|d])
  9349  	for {
  9350  		_ = v.Args[1]
  9351  		v_0 := v.Args[0]
  9352  		if v_0.Op != OpPPC64MOVDconst {
  9353  			break
  9354  		}
  9355  		d := v_0.AuxInt
  9356  		v_1 := v.Args[1]
  9357  		if v_1.Op != OpPPC64MOVDconst {
  9358  			break
  9359  		}
  9360  		c := v_1.AuxInt
  9361  		v.reset(OpPPC64MOVDconst)
  9362  		v.AuxInt = c | d
  9363  		return true
  9364  	}
  9365  	return false
  9366  }
  9367  func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
  9368  	b := v.Block
  9369  	_ = b
  9370  	config := b.Func.Config
  9371  	_ = config
  9372  	// match: (OR x (MOVDconst [c]))
  9373  	// cond: isU32Bit(c)
  9374  	// result: (ORconst [c] x)
  9375  	for {
  9376  		_ = v.Args[1]
  9377  		x := v.Args[0]
  9378  		v_1 := v.Args[1]
  9379  		if v_1.Op != OpPPC64MOVDconst {
  9380  			break
  9381  		}
  9382  		c := v_1.AuxInt
  9383  		if !(isU32Bit(c)) {
  9384  			break
  9385  		}
  9386  		v.reset(OpPPC64ORconst)
  9387  		v.AuxInt = c
  9388  		v.AddArg(x)
  9389  		return true
  9390  	}
  9391  	// match: (OR (MOVDconst [c]) x)
  9392  	// cond: isU32Bit(c)
  9393  	// result: (ORconst [c] x)
  9394  	for {
  9395  		_ = v.Args[1]
  9396  		v_0 := v.Args[0]
  9397  		if v_0.Op != OpPPC64MOVDconst {
  9398  			break
  9399  		}
  9400  		c := v_0.AuxInt
  9401  		x := v.Args[1]
  9402  		if !(isU32Bit(c)) {
  9403  			break
  9404  		}
  9405  		v.reset(OpPPC64ORconst)
  9406  		v.AuxInt = c
  9407  		v.AddArg(x)
  9408  		return true
  9409  	}
  9410  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
  9411  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
  9412  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
  9413  	for {
  9414  		t := v.Type
  9415  		_ = v.Args[1]
  9416  		x0 := v.Args[0]
  9417  		if x0.Op != OpPPC64MOVBZload {
  9418  			break
  9419  		}
  9420  		i0 := x0.AuxInt
  9421  		s := x0.Aux
  9422  		_ = x0.Args[1]
  9423  		p := x0.Args[0]
  9424  		mem := x0.Args[1]
  9425  		o1 := v.Args[1]
  9426  		if o1.Op != OpPPC64SLWconst {
  9427  			break
  9428  		}
  9429  		if o1.AuxInt != 8 {
  9430  			break
  9431  		}
  9432  		x1 := o1.Args[0]
  9433  		if x1.Op != OpPPC64MOVBZload {
  9434  			break
  9435  		}
  9436  		i1 := x1.AuxInt
  9437  		if x1.Aux != s {
  9438  			break
  9439  		}
  9440  		_ = x1.Args[1]
  9441  		if p != x1.Args[0] {
  9442  			break
  9443  		}
  9444  		if mem != x1.Args[1] {
  9445  			break
  9446  		}
  9447  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
  9448  			break
  9449  		}
  9450  		b = mergePoint(b, x0, x1)
  9451  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
  9452  		v.reset(OpCopy)
  9453  		v.AddArg(v0)
  9454  		v0.AuxInt = i0
  9455  		v0.Aux = s
  9456  		v0.AddArg(p)
  9457  		v0.AddArg(mem)
  9458  		return true
  9459  	}
  9460  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
  9461  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
  9462  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
  9463  	for {
  9464  		t := v.Type
  9465  		_ = v.Args[1]
  9466  		o1 := v.Args[0]
  9467  		if o1.Op != OpPPC64SLWconst {
  9468  			break
  9469  		}
  9470  		if o1.AuxInt != 8 {
  9471  			break
  9472  		}
  9473  		x1 := o1.Args[0]
  9474  		if x1.Op != OpPPC64MOVBZload {
  9475  			break
  9476  		}
  9477  		i1 := x1.AuxInt
  9478  		s := x1.Aux
  9479  		_ = x1.Args[1]
  9480  		p := x1.Args[0]
  9481  		mem := x1.Args[1]
  9482  		x0 := v.Args[1]
  9483  		if x0.Op != OpPPC64MOVBZload {
  9484  			break
  9485  		}
  9486  		i0 := x0.AuxInt
  9487  		if x0.Aux != s {
  9488  			break
  9489  		}
  9490  		_ = x0.Args[1]
  9491  		if p != x0.Args[0] {
  9492  			break
  9493  		}
  9494  		if mem != x0.Args[1] {
  9495  			break
  9496  		}
  9497  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
  9498  			break
  9499  		}
  9500  		b = mergePoint(b, x0, x1)
  9501  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
  9502  		v.reset(OpCopy)
  9503  		v.AddArg(v0)
  9504  		v0.AuxInt = i0
  9505  		v0.Aux = s
  9506  		v0.AddArg(p)
  9507  		v0.AddArg(mem)
  9508  		return true
  9509  	}
  9510  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
  9511  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
  9512  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9513  	for {
  9514  		t := v.Type
  9515  		_ = v.Args[1]
  9516  		s1 := v.Args[0]
  9517  		if s1.Op != OpPPC64SLWconst {
  9518  			break
  9519  		}
  9520  		if s1.AuxInt != 24 {
  9521  			break
  9522  		}
  9523  		x2 := s1.Args[0]
  9524  		if x2.Op != OpPPC64MOVBZload {
  9525  			break
  9526  		}
  9527  		i3 := x2.AuxInt
  9528  		s := x2.Aux
  9529  		_ = x2.Args[1]
  9530  		p := x2.Args[0]
  9531  		mem := x2.Args[1]
  9532  		o0 := v.Args[1]
  9533  		if o0.Op != OpPPC64OR {
  9534  			break
  9535  		}
  9536  		if o0.Type != t {
  9537  			break
  9538  		}
  9539  		_ = o0.Args[1]
  9540  		s0 := o0.Args[0]
  9541  		if s0.Op != OpPPC64SLWconst {
  9542  			break
  9543  		}
  9544  		if s0.AuxInt != 16 {
  9545  			break
  9546  		}
  9547  		x1 := s0.Args[0]
  9548  		if x1.Op != OpPPC64MOVBZload {
  9549  			break
  9550  		}
  9551  		i2 := x1.AuxInt
  9552  		if x1.Aux != s {
  9553  			break
  9554  		}
  9555  		_ = x1.Args[1]
  9556  		if p != x1.Args[0] {
  9557  			break
  9558  		}
  9559  		if mem != x1.Args[1] {
  9560  			break
  9561  		}
  9562  		x0 := o0.Args[1]
  9563  		if x0.Op != OpPPC64MOVHZload {
  9564  			break
  9565  		}
  9566  		i0 := x0.AuxInt
  9567  		if x0.Aux != s {
  9568  			break
  9569  		}
  9570  		_ = x0.Args[1]
  9571  		if p != x0.Args[0] {
  9572  			break
  9573  		}
  9574  		if mem != x0.Args[1] {
  9575  			break
  9576  		}
  9577  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9578  			break
  9579  		}
  9580  		b = mergePoint(b, x0, x1, x2)
  9581  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9582  		v.reset(OpCopy)
  9583  		v.AddArg(v0)
  9584  		v0.AuxInt = i0
  9585  		v0.Aux = s
  9586  		v0.AddArg(p)
  9587  		v0.AddArg(mem)
  9588  		return true
  9589  	}
  9590  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
  9591  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
  9592  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9593  	for {
  9594  		t := v.Type
  9595  		_ = v.Args[1]
  9596  		s1 := v.Args[0]
  9597  		if s1.Op != OpPPC64SLWconst {
  9598  			break
  9599  		}
  9600  		if s1.AuxInt != 24 {
  9601  			break
  9602  		}
  9603  		x2 := s1.Args[0]
  9604  		if x2.Op != OpPPC64MOVBZload {
  9605  			break
  9606  		}
  9607  		i3 := x2.AuxInt
  9608  		s := x2.Aux
  9609  		_ = x2.Args[1]
  9610  		p := x2.Args[0]
  9611  		mem := x2.Args[1]
  9612  		o0 := v.Args[1]
  9613  		if o0.Op != OpPPC64OR {
  9614  			break
  9615  		}
  9616  		if o0.Type != t {
  9617  			break
  9618  		}
  9619  		_ = o0.Args[1]
  9620  		x0 := o0.Args[0]
  9621  		if x0.Op != OpPPC64MOVHZload {
  9622  			break
  9623  		}
  9624  		i0 := x0.AuxInt
  9625  		if x0.Aux != s {
  9626  			break
  9627  		}
  9628  		_ = x0.Args[1]
  9629  		if p != x0.Args[0] {
  9630  			break
  9631  		}
  9632  		if mem != x0.Args[1] {
  9633  			break
  9634  		}
  9635  		s0 := o0.Args[1]
  9636  		if s0.Op != OpPPC64SLWconst {
  9637  			break
  9638  		}
  9639  		if s0.AuxInt != 16 {
  9640  			break
  9641  		}
  9642  		x1 := s0.Args[0]
  9643  		if x1.Op != OpPPC64MOVBZload {
  9644  			break
  9645  		}
  9646  		i2 := x1.AuxInt
  9647  		if x1.Aux != s {
  9648  			break
  9649  		}
  9650  		_ = x1.Args[1]
  9651  		if p != x1.Args[0] {
  9652  			break
  9653  		}
  9654  		if mem != x1.Args[1] {
  9655  			break
  9656  		}
  9657  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9658  			break
  9659  		}
  9660  		b = mergePoint(b, x0, x1, x2)
  9661  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9662  		v.reset(OpCopy)
  9663  		v.AddArg(v0)
  9664  		v0.AuxInt = i0
  9665  		v0.Aux = s
  9666  		v0.AddArg(p)
  9667  		v0.AddArg(mem)
  9668  		return true
  9669  	}
  9670  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
  9671  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
  9672  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9673  	for {
  9674  		t := v.Type
  9675  		_ = v.Args[1]
  9676  		o0 := v.Args[0]
  9677  		if o0.Op != OpPPC64OR {
  9678  			break
  9679  		}
  9680  		if o0.Type != t {
  9681  			break
  9682  		}
  9683  		_ = o0.Args[1]
  9684  		s0 := o0.Args[0]
  9685  		if s0.Op != OpPPC64SLWconst {
  9686  			break
  9687  		}
  9688  		if s0.AuxInt != 16 {
  9689  			break
  9690  		}
  9691  		x1 := s0.Args[0]
  9692  		if x1.Op != OpPPC64MOVBZload {
  9693  			break
  9694  		}
  9695  		i2 := x1.AuxInt
  9696  		s := x1.Aux
  9697  		_ = x1.Args[1]
  9698  		p := x1.Args[0]
  9699  		mem := x1.Args[1]
  9700  		x0 := o0.Args[1]
  9701  		if x0.Op != OpPPC64MOVHZload {
  9702  			break
  9703  		}
  9704  		i0 := x0.AuxInt
  9705  		if x0.Aux != s {
  9706  			break
  9707  		}
  9708  		_ = x0.Args[1]
  9709  		if p != x0.Args[0] {
  9710  			break
  9711  		}
  9712  		if mem != x0.Args[1] {
  9713  			break
  9714  		}
  9715  		s1 := v.Args[1]
  9716  		if s1.Op != OpPPC64SLWconst {
  9717  			break
  9718  		}
  9719  		if s1.AuxInt != 24 {
  9720  			break
  9721  		}
  9722  		x2 := s1.Args[0]
  9723  		if x2.Op != OpPPC64MOVBZload {
  9724  			break
  9725  		}
  9726  		i3 := x2.AuxInt
  9727  		if x2.Aux != s {
  9728  			break
  9729  		}
  9730  		_ = x2.Args[1]
  9731  		if p != x2.Args[0] {
  9732  			break
  9733  		}
  9734  		if mem != x2.Args[1] {
  9735  			break
  9736  		}
  9737  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9738  			break
  9739  		}
  9740  		b = mergePoint(b, x0, x1, x2)
  9741  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9742  		v.reset(OpCopy)
  9743  		v.AddArg(v0)
  9744  		v0.AuxInt = i0
  9745  		v0.Aux = s
  9746  		v0.AddArg(p)
  9747  		v0.AddArg(mem)
  9748  		return true
  9749  	}
  9750  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
  9751  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
  9752  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9753  	for {
  9754  		t := v.Type
  9755  		_ = v.Args[1]
  9756  		o0 := v.Args[0]
  9757  		if o0.Op != OpPPC64OR {
  9758  			break
  9759  		}
  9760  		if o0.Type != t {
  9761  			break
  9762  		}
  9763  		_ = o0.Args[1]
  9764  		x0 := o0.Args[0]
  9765  		if x0.Op != OpPPC64MOVHZload {
  9766  			break
  9767  		}
  9768  		i0 := x0.AuxInt
  9769  		s := x0.Aux
  9770  		_ = x0.Args[1]
  9771  		p := x0.Args[0]
  9772  		mem := x0.Args[1]
  9773  		s0 := o0.Args[1]
  9774  		if s0.Op != OpPPC64SLWconst {
  9775  			break
  9776  		}
  9777  		if s0.AuxInt != 16 {
  9778  			break
  9779  		}
  9780  		x1 := s0.Args[0]
  9781  		if x1.Op != OpPPC64MOVBZload {
  9782  			break
  9783  		}
  9784  		i2 := x1.AuxInt
  9785  		if x1.Aux != s {
  9786  			break
  9787  		}
  9788  		_ = x1.Args[1]
  9789  		if p != x1.Args[0] {
  9790  			break
  9791  		}
  9792  		if mem != x1.Args[1] {
  9793  			break
  9794  		}
  9795  		s1 := v.Args[1]
  9796  		if s1.Op != OpPPC64SLWconst {
  9797  			break
  9798  		}
  9799  		if s1.AuxInt != 24 {
  9800  			break
  9801  		}
  9802  		x2 := s1.Args[0]
  9803  		if x2.Op != OpPPC64MOVBZload {
  9804  			break
  9805  		}
  9806  		i3 := x2.AuxInt
  9807  		if x2.Aux != s {
  9808  			break
  9809  		}
  9810  		_ = x2.Args[1]
  9811  		if p != x2.Args[0] {
  9812  			break
  9813  		}
  9814  		if mem != x2.Args[1] {
  9815  			break
  9816  		}
  9817  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9818  			break
  9819  		}
  9820  		b = mergePoint(b, x0, x1, x2)
  9821  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9822  		v.reset(OpCopy)
  9823  		v.AddArg(v0)
  9824  		v0.AuxInt = i0
  9825  		v0.Aux = s
  9826  		v0.AddArg(p)
  9827  		v0.AddArg(mem)
  9828  		return true
  9829  	}
  9830  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))))))
  9831  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
  9832  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
  9833  	for {
  9834  		t := v.Type
  9835  		_ = v.Args[1]
  9836  		s6 := v.Args[0]
  9837  		if s6.Op != OpPPC64SLDconst {
  9838  			break
  9839  		}
  9840  		if s6.AuxInt != 56 {
  9841  			break
  9842  		}
  9843  		x7 := s6.Args[0]
  9844  		if x7.Op != OpPPC64MOVBZload {
  9845  			break
  9846  		}
  9847  		i7 := x7.AuxInt
  9848  		s := x7.Aux
  9849  		_ = x7.Args[1]
  9850  		p := x7.Args[0]
  9851  		mem := x7.Args[1]
  9852  		o5 := v.Args[1]
  9853  		if o5.Op != OpPPC64OR {
  9854  			break
  9855  		}
  9856  		if o5.Type != t {
  9857  			break
  9858  		}
  9859  		_ = o5.Args[1]
  9860  		s5 := o5.Args[0]
  9861  		if s5.Op != OpPPC64SLDconst {
  9862  			break
  9863  		}
  9864  		if s5.AuxInt != 48 {
  9865  			break
  9866  		}
  9867  		x6 := s5.Args[0]
  9868  		if x6.Op != OpPPC64MOVBZload {
  9869  			break
  9870  		}
  9871  		i6 := x6.AuxInt
  9872  		if x6.Aux != s {
  9873  			break
  9874  		}
  9875  		_ = x6.Args[1]
  9876  		if p != x6.Args[0] {
  9877  			break
  9878  		}
  9879  		if mem != x6.Args[1] {
  9880  			break
  9881  		}
  9882  		o4 := o5.Args[1]
  9883  		if o4.Op != OpPPC64OR {
  9884  			break
  9885  		}
  9886  		if o4.Type != t {
  9887  			break
  9888  		}
  9889  		_ = o4.Args[1]
  9890  		s4 := o4.Args[0]
  9891  		if s4.Op != OpPPC64SLDconst {
  9892  			break
  9893  		}
  9894  		if s4.AuxInt != 40 {
  9895  			break
  9896  		}
  9897  		x5 := s4.Args[0]
  9898  		if x5.Op != OpPPC64MOVBZload {
  9899  			break
  9900  		}
  9901  		i5 := x5.AuxInt
  9902  		if x5.Aux != s {
  9903  			break
  9904  		}
  9905  		_ = x5.Args[1]
  9906  		if p != x5.Args[0] {
  9907  			break
  9908  		}
  9909  		if mem != x5.Args[1] {
  9910  			break
  9911  		}
  9912  		o3 := o4.Args[1]
  9913  		if o3.Op != OpPPC64OR {
  9914  			break
  9915  		}
  9916  		if o3.Type != t {
  9917  			break
  9918  		}
  9919  		_ = o3.Args[1]
  9920  		s3 := o3.Args[0]
  9921  		if s3.Op != OpPPC64SLDconst {
  9922  			break
  9923  		}
  9924  		if s3.AuxInt != 32 {
  9925  			break
  9926  		}
  9927  		x4 := s3.Args[0]
  9928  		if x4.Op != OpPPC64MOVBZload {
  9929  			break
  9930  		}
  9931  		i4 := x4.AuxInt
  9932  		if x4.Aux != s {
  9933  			break
  9934  		}
  9935  		_ = x4.Args[1]
  9936  		if p != x4.Args[0] {
  9937  			break
  9938  		}
  9939  		if mem != x4.Args[1] {
  9940  			break
  9941  		}
  9942  		o2 := o3.Args[1]
  9943  		if o2.Op != OpPPC64OR {
  9944  			break
  9945  		}
  9946  		if o2.Type != t {
  9947  			break
  9948  		}
  9949  		_ = o2.Args[1]
  9950  		s2 := o2.Args[0]
  9951  		if s2.Op != OpPPC64SLDconst {
  9952  			break
  9953  		}
  9954  		if s2.AuxInt != 24 {
  9955  			break
  9956  		}
  9957  		x3 := s2.Args[0]
  9958  		if x3.Op != OpPPC64MOVBZload {
  9959  			break
  9960  		}
  9961  		i3 := x3.AuxInt
  9962  		if x3.Aux != s {
  9963  			break
  9964  		}
  9965  		_ = x3.Args[1]
  9966  		if p != x3.Args[0] {
  9967  			break
  9968  		}
  9969  		if mem != x3.Args[1] {
  9970  			break
  9971  		}
  9972  		o1 := o2.Args[1]
  9973  		if o1.Op != OpPPC64OR {
  9974  			break
  9975  		}
  9976  		if o1.Type != t {
  9977  			break
  9978  		}
  9979  		_ = o1.Args[1]
  9980  		s1 := o1.Args[0]
  9981  		if s1.Op != OpPPC64SLDconst {
  9982  			break
  9983  		}
  9984  		if s1.AuxInt != 16 {
  9985  			break
  9986  		}
  9987  		x2 := s1.Args[0]
  9988  		if x2.Op != OpPPC64MOVBZload {
  9989  			break
  9990  		}
  9991  		i2 := x2.AuxInt
  9992  		if x2.Aux != s {
  9993  			break
  9994  		}
  9995  		_ = x2.Args[1]
  9996  		if p != x2.Args[0] {
  9997  			break
  9998  		}
  9999  		if mem != x2.Args[1] {
 10000  			break
 10001  		}
 10002  		o0 := o1.Args[1]
 10003  		if o0.Op != OpPPC64OR {
 10004  			break
 10005  		}
 10006  		if o0.Type != t {
 10007  			break
 10008  		}
 10009  		_ = o0.Args[1]
 10010  		s0 := o0.Args[0]
 10011  		if s0.Op != OpPPC64SLDconst {
 10012  			break
 10013  		}
 10014  		if s0.AuxInt != 8 {
 10015  			break
 10016  		}
 10017  		x1 := s0.Args[0]
 10018  		if x1.Op != OpPPC64MOVBZload {
 10019  			break
 10020  		}
 10021  		i1 := x1.AuxInt
 10022  		if x1.Aux != s {
 10023  			break
 10024  		}
 10025  		_ = x1.Args[1]
 10026  		if p != x1.Args[0] {
 10027  			break
 10028  		}
 10029  		if mem != x1.Args[1] {
 10030  			break
 10031  		}
 10032  		x0 := o0.Args[1]
 10033  		if x0.Op != OpPPC64MOVBZload {
 10034  			break
 10035  		}
 10036  		i0 := x0.AuxInt
 10037  		if x0.Aux != s {
 10038  			break
 10039  		}
 10040  		_ = x0.Args[1]
 10041  		if p != x0.Args[0] {
 10042  			break
 10043  		}
 10044  		if mem != x0.Args[1] {
 10045  			break
 10046  		}
 10047  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10048  			break
 10049  		}
 10050  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10051  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10052  		v.reset(OpCopy)
 10053  		v.AddArg(v0)
 10054  		v0.AuxInt = i0
 10055  		v0.Aux = s
 10056  		v0.AddArg(p)
 10057  		v0.AddArg(mem)
 10058  		return true
 10059  	}
 10060  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))))))
 10061  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10062  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10063  	for {
 10064  		t := v.Type
 10065  		_ = v.Args[1]
 10066  		s6 := v.Args[0]
 10067  		if s6.Op != OpPPC64SLDconst {
 10068  			break
 10069  		}
 10070  		if s6.AuxInt != 56 {
 10071  			break
 10072  		}
 10073  		x7 := s6.Args[0]
 10074  		if x7.Op != OpPPC64MOVBZload {
 10075  			break
 10076  		}
 10077  		i7 := x7.AuxInt
 10078  		s := x7.Aux
 10079  		_ = x7.Args[1]
 10080  		p := x7.Args[0]
 10081  		mem := x7.Args[1]
 10082  		o5 := v.Args[1]
 10083  		if o5.Op != OpPPC64OR {
 10084  			break
 10085  		}
 10086  		if o5.Type != t {
 10087  			break
 10088  		}
 10089  		_ = o5.Args[1]
 10090  		s5 := o5.Args[0]
 10091  		if s5.Op != OpPPC64SLDconst {
 10092  			break
 10093  		}
 10094  		if s5.AuxInt != 48 {
 10095  			break
 10096  		}
 10097  		x6 := s5.Args[0]
 10098  		if x6.Op != OpPPC64MOVBZload {
 10099  			break
 10100  		}
 10101  		i6 := x6.AuxInt
 10102  		if x6.Aux != s {
 10103  			break
 10104  		}
 10105  		_ = x6.Args[1]
 10106  		if p != x6.Args[0] {
 10107  			break
 10108  		}
 10109  		if mem != x6.Args[1] {
 10110  			break
 10111  		}
 10112  		o4 := o5.Args[1]
 10113  		if o4.Op != OpPPC64OR {
 10114  			break
 10115  		}
 10116  		if o4.Type != t {
 10117  			break
 10118  		}
 10119  		_ = o4.Args[1]
 10120  		s4 := o4.Args[0]
 10121  		if s4.Op != OpPPC64SLDconst {
 10122  			break
 10123  		}
 10124  		if s4.AuxInt != 40 {
 10125  			break
 10126  		}
 10127  		x5 := s4.Args[0]
 10128  		if x5.Op != OpPPC64MOVBZload {
 10129  			break
 10130  		}
 10131  		i5 := x5.AuxInt
 10132  		if x5.Aux != s {
 10133  			break
 10134  		}
 10135  		_ = x5.Args[1]
 10136  		if p != x5.Args[0] {
 10137  			break
 10138  		}
 10139  		if mem != x5.Args[1] {
 10140  			break
 10141  		}
 10142  		o3 := o4.Args[1]
 10143  		if o3.Op != OpPPC64OR {
 10144  			break
 10145  		}
 10146  		if o3.Type != t {
 10147  			break
 10148  		}
 10149  		_ = o3.Args[1]
 10150  		s3 := o3.Args[0]
 10151  		if s3.Op != OpPPC64SLDconst {
 10152  			break
 10153  		}
 10154  		if s3.AuxInt != 32 {
 10155  			break
 10156  		}
 10157  		x4 := s3.Args[0]
 10158  		if x4.Op != OpPPC64MOVBZload {
 10159  			break
 10160  		}
 10161  		i4 := x4.AuxInt
 10162  		if x4.Aux != s {
 10163  			break
 10164  		}
 10165  		_ = x4.Args[1]
 10166  		if p != x4.Args[0] {
 10167  			break
 10168  		}
 10169  		if mem != x4.Args[1] {
 10170  			break
 10171  		}
 10172  		o2 := o3.Args[1]
 10173  		if o2.Op != OpPPC64OR {
 10174  			break
 10175  		}
 10176  		if o2.Type != t {
 10177  			break
 10178  		}
 10179  		_ = o2.Args[1]
 10180  		s2 := o2.Args[0]
 10181  		if s2.Op != OpPPC64SLDconst {
 10182  			break
 10183  		}
 10184  		if s2.AuxInt != 24 {
 10185  			break
 10186  		}
 10187  		x3 := s2.Args[0]
 10188  		if x3.Op != OpPPC64MOVBZload {
 10189  			break
 10190  		}
 10191  		i3 := x3.AuxInt
 10192  		if x3.Aux != s {
 10193  			break
 10194  		}
 10195  		_ = x3.Args[1]
 10196  		if p != x3.Args[0] {
 10197  			break
 10198  		}
 10199  		if mem != x3.Args[1] {
 10200  			break
 10201  		}
 10202  		o1 := o2.Args[1]
 10203  		if o1.Op != OpPPC64OR {
 10204  			break
 10205  		}
 10206  		if o1.Type != t {
 10207  			break
 10208  		}
 10209  		_ = o1.Args[1]
 10210  		s1 := o1.Args[0]
 10211  		if s1.Op != OpPPC64SLDconst {
 10212  			break
 10213  		}
 10214  		if s1.AuxInt != 16 {
 10215  			break
 10216  		}
 10217  		x2 := s1.Args[0]
 10218  		if x2.Op != OpPPC64MOVBZload {
 10219  			break
 10220  		}
 10221  		i2 := x2.AuxInt
 10222  		if x2.Aux != s {
 10223  			break
 10224  		}
 10225  		_ = x2.Args[1]
 10226  		if p != x2.Args[0] {
 10227  			break
 10228  		}
 10229  		if mem != x2.Args[1] {
 10230  			break
 10231  		}
 10232  		o0 := o1.Args[1]
 10233  		if o0.Op != OpPPC64OR {
 10234  			break
 10235  		}
 10236  		if o0.Type != t {
 10237  			break
 10238  		}
 10239  		_ = o0.Args[1]
 10240  		x0 := o0.Args[0]
 10241  		if x0.Op != OpPPC64MOVBZload {
 10242  			break
 10243  		}
 10244  		i0 := x0.AuxInt
 10245  		if x0.Aux != s {
 10246  			break
 10247  		}
 10248  		_ = x0.Args[1]
 10249  		if p != x0.Args[0] {
 10250  			break
 10251  		}
 10252  		if mem != x0.Args[1] {
 10253  			break
 10254  		}
 10255  		s0 := o0.Args[1]
 10256  		if s0.Op != OpPPC64SLDconst {
 10257  			break
 10258  		}
 10259  		if s0.AuxInt != 8 {
 10260  			break
 10261  		}
 10262  		x1 := s0.Args[0]
 10263  		if x1.Op != OpPPC64MOVBZload {
 10264  			break
 10265  		}
 10266  		i1 := x1.AuxInt
 10267  		if x1.Aux != s {
 10268  			break
 10269  		}
 10270  		_ = x1.Args[1]
 10271  		if p != x1.Args[0] {
 10272  			break
 10273  		}
 10274  		if mem != x1.Args[1] {
 10275  			break
 10276  		}
 10277  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10278  			break
 10279  		}
 10280  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10281  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10282  		v.reset(OpCopy)
 10283  		v.AddArg(v0)
 10284  		v0.AuxInt = i0
 10285  		v0.Aux = s
 10286  		v0.AddArg(p)
 10287  		v0.AddArg(mem)
 10288  		return true
 10289  	}
 10290  	return false
 10291  }
 10292  func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
 10293  	b := v.Block
 10294  	_ = b
 10295  	config := b.Func.Config
 10296  	_ = config
 10297  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))))
 10298  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10299  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10300  	for {
 10301  		t := v.Type
 10302  		_ = v.Args[1]
 10303  		s6 := v.Args[0]
 10304  		if s6.Op != OpPPC64SLDconst {
 10305  			break
 10306  		}
 10307  		if s6.AuxInt != 56 {
 10308  			break
 10309  		}
 10310  		x7 := s6.Args[0]
 10311  		if x7.Op != OpPPC64MOVBZload {
 10312  			break
 10313  		}
 10314  		i7 := x7.AuxInt
 10315  		s := x7.Aux
 10316  		_ = x7.Args[1]
 10317  		p := x7.Args[0]
 10318  		mem := x7.Args[1]
 10319  		o5 := v.Args[1]
 10320  		if o5.Op != OpPPC64OR {
 10321  			break
 10322  		}
 10323  		if o5.Type != t {
 10324  			break
 10325  		}
 10326  		_ = o5.Args[1]
 10327  		s5 := o5.Args[0]
 10328  		if s5.Op != OpPPC64SLDconst {
 10329  			break
 10330  		}
 10331  		if s5.AuxInt != 48 {
 10332  			break
 10333  		}
 10334  		x6 := s5.Args[0]
 10335  		if x6.Op != OpPPC64MOVBZload {
 10336  			break
 10337  		}
 10338  		i6 := x6.AuxInt
 10339  		if x6.Aux != s {
 10340  			break
 10341  		}
 10342  		_ = x6.Args[1]
 10343  		if p != x6.Args[0] {
 10344  			break
 10345  		}
 10346  		if mem != x6.Args[1] {
 10347  			break
 10348  		}
 10349  		o4 := o5.Args[1]
 10350  		if o4.Op != OpPPC64OR {
 10351  			break
 10352  		}
 10353  		if o4.Type != t {
 10354  			break
 10355  		}
 10356  		_ = o4.Args[1]
 10357  		s4 := o4.Args[0]
 10358  		if s4.Op != OpPPC64SLDconst {
 10359  			break
 10360  		}
 10361  		if s4.AuxInt != 40 {
 10362  			break
 10363  		}
 10364  		x5 := s4.Args[0]
 10365  		if x5.Op != OpPPC64MOVBZload {
 10366  			break
 10367  		}
 10368  		i5 := x5.AuxInt
 10369  		if x5.Aux != s {
 10370  			break
 10371  		}
 10372  		_ = x5.Args[1]
 10373  		if p != x5.Args[0] {
 10374  			break
 10375  		}
 10376  		if mem != x5.Args[1] {
 10377  			break
 10378  		}
 10379  		o3 := o4.Args[1]
 10380  		if o3.Op != OpPPC64OR {
 10381  			break
 10382  		}
 10383  		if o3.Type != t {
 10384  			break
 10385  		}
 10386  		_ = o3.Args[1]
 10387  		s3 := o3.Args[0]
 10388  		if s3.Op != OpPPC64SLDconst {
 10389  			break
 10390  		}
 10391  		if s3.AuxInt != 32 {
 10392  			break
 10393  		}
 10394  		x4 := s3.Args[0]
 10395  		if x4.Op != OpPPC64MOVBZload {
 10396  			break
 10397  		}
 10398  		i4 := x4.AuxInt
 10399  		if x4.Aux != s {
 10400  			break
 10401  		}
 10402  		_ = x4.Args[1]
 10403  		if p != x4.Args[0] {
 10404  			break
 10405  		}
 10406  		if mem != x4.Args[1] {
 10407  			break
 10408  		}
 10409  		o2 := o3.Args[1]
 10410  		if o2.Op != OpPPC64OR {
 10411  			break
 10412  		}
 10413  		if o2.Type != t {
 10414  			break
 10415  		}
 10416  		_ = o2.Args[1]
 10417  		s2 := o2.Args[0]
 10418  		if s2.Op != OpPPC64SLDconst {
 10419  			break
 10420  		}
 10421  		if s2.AuxInt != 24 {
 10422  			break
 10423  		}
 10424  		x3 := s2.Args[0]
 10425  		if x3.Op != OpPPC64MOVBZload {
 10426  			break
 10427  		}
 10428  		i3 := x3.AuxInt
 10429  		if x3.Aux != s {
 10430  			break
 10431  		}
 10432  		_ = x3.Args[1]
 10433  		if p != x3.Args[0] {
 10434  			break
 10435  		}
 10436  		if mem != x3.Args[1] {
 10437  			break
 10438  		}
 10439  		o1 := o2.Args[1]
 10440  		if o1.Op != OpPPC64OR {
 10441  			break
 10442  		}
 10443  		if o1.Type != t {
 10444  			break
 10445  		}
 10446  		_ = o1.Args[1]
 10447  		o0 := o1.Args[0]
 10448  		if o0.Op != OpPPC64OR {
 10449  			break
 10450  		}
 10451  		if o0.Type != t {
 10452  			break
 10453  		}
 10454  		_ = o0.Args[1]
 10455  		s0 := o0.Args[0]
 10456  		if s0.Op != OpPPC64SLDconst {
 10457  			break
 10458  		}
 10459  		if s0.AuxInt != 8 {
 10460  			break
 10461  		}
 10462  		x1 := s0.Args[0]
 10463  		if x1.Op != OpPPC64MOVBZload {
 10464  			break
 10465  		}
 10466  		i1 := x1.AuxInt
 10467  		if x1.Aux != s {
 10468  			break
 10469  		}
 10470  		_ = x1.Args[1]
 10471  		if p != x1.Args[0] {
 10472  			break
 10473  		}
 10474  		if mem != x1.Args[1] {
 10475  			break
 10476  		}
 10477  		x0 := o0.Args[1]
 10478  		if x0.Op != OpPPC64MOVBZload {
 10479  			break
 10480  		}
 10481  		i0 := x0.AuxInt
 10482  		if x0.Aux != s {
 10483  			break
 10484  		}
 10485  		_ = x0.Args[1]
 10486  		if p != x0.Args[0] {
 10487  			break
 10488  		}
 10489  		if mem != x0.Args[1] {
 10490  			break
 10491  		}
 10492  		s1 := o1.Args[1]
 10493  		if s1.Op != OpPPC64SLDconst {
 10494  			break
 10495  		}
 10496  		if s1.AuxInt != 16 {
 10497  			break
 10498  		}
 10499  		x2 := s1.Args[0]
 10500  		if x2.Op != OpPPC64MOVBZload {
 10501  			break
 10502  		}
 10503  		i2 := x2.AuxInt
 10504  		if x2.Aux != s {
 10505  			break
 10506  		}
 10507  		_ = x2.Args[1]
 10508  		if p != x2.Args[0] {
 10509  			break
 10510  		}
 10511  		if mem != x2.Args[1] {
 10512  			break
 10513  		}
 10514  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10515  			break
 10516  		}
 10517  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10518  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10519  		v.reset(OpCopy)
 10520  		v.AddArg(v0)
 10521  		v0.AuxInt = i0
 10522  		v0.Aux = s
 10523  		v0.AddArg(p)
 10524  		v0.AddArg(mem)
 10525  		return true
 10526  	}
 10527  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))))
 10528  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10529  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10530  	for {
 10531  		t := v.Type
 10532  		_ = v.Args[1]
 10533  		s6 := v.Args[0]
 10534  		if s6.Op != OpPPC64SLDconst {
 10535  			break
 10536  		}
 10537  		if s6.AuxInt != 56 {
 10538  			break
 10539  		}
 10540  		x7 := s6.Args[0]
 10541  		if x7.Op != OpPPC64MOVBZload {
 10542  			break
 10543  		}
 10544  		i7 := x7.AuxInt
 10545  		s := x7.Aux
 10546  		_ = x7.Args[1]
 10547  		p := x7.Args[0]
 10548  		mem := x7.Args[1]
 10549  		o5 := v.Args[1]
 10550  		if o5.Op != OpPPC64OR {
 10551  			break
 10552  		}
 10553  		if o5.Type != t {
 10554  			break
 10555  		}
 10556  		_ = o5.Args[1]
 10557  		s5 := o5.Args[0]
 10558  		if s5.Op != OpPPC64SLDconst {
 10559  			break
 10560  		}
 10561  		if s5.AuxInt != 48 {
 10562  			break
 10563  		}
 10564  		x6 := s5.Args[0]
 10565  		if x6.Op != OpPPC64MOVBZload {
 10566  			break
 10567  		}
 10568  		i6 := x6.AuxInt
 10569  		if x6.Aux != s {
 10570  			break
 10571  		}
 10572  		_ = x6.Args[1]
 10573  		if p != x6.Args[0] {
 10574  			break
 10575  		}
 10576  		if mem != x6.Args[1] {
 10577  			break
 10578  		}
 10579  		o4 := o5.Args[1]
 10580  		if o4.Op != OpPPC64OR {
 10581  			break
 10582  		}
 10583  		if o4.Type != t {
 10584  			break
 10585  		}
 10586  		_ = o4.Args[1]
 10587  		s4 := o4.Args[0]
 10588  		if s4.Op != OpPPC64SLDconst {
 10589  			break
 10590  		}
 10591  		if s4.AuxInt != 40 {
 10592  			break
 10593  		}
 10594  		x5 := s4.Args[0]
 10595  		if x5.Op != OpPPC64MOVBZload {
 10596  			break
 10597  		}
 10598  		i5 := x5.AuxInt
 10599  		if x5.Aux != s {
 10600  			break
 10601  		}
 10602  		_ = x5.Args[1]
 10603  		if p != x5.Args[0] {
 10604  			break
 10605  		}
 10606  		if mem != x5.Args[1] {
 10607  			break
 10608  		}
 10609  		o3 := o4.Args[1]
 10610  		if o3.Op != OpPPC64OR {
 10611  			break
 10612  		}
 10613  		if o3.Type != t {
 10614  			break
 10615  		}
 10616  		_ = o3.Args[1]
 10617  		s3 := o3.Args[0]
 10618  		if s3.Op != OpPPC64SLDconst {
 10619  			break
 10620  		}
 10621  		if s3.AuxInt != 32 {
 10622  			break
 10623  		}
 10624  		x4 := s3.Args[0]
 10625  		if x4.Op != OpPPC64MOVBZload {
 10626  			break
 10627  		}
 10628  		i4 := x4.AuxInt
 10629  		if x4.Aux != s {
 10630  			break
 10631  		}
 10632  		_ = x4.Args[1]
 10633  		if p != x4.Args[0] {
 10634  			break
 10635  		}
 10636  		if mem != x4.Args[1] {
 10637  			break
 10638  		}
 10639  		o2 := o3.Args[1]
 10640  		if o2.Op != OpPPC64OR {
 10641  			break
 10642  		}
 10643  		if o2.Type != t {
 10644  			break
 10645  		}
 10646  		_ = o2.Args[1]
 10647  		s2 := o2.Args[0]
 10648  		if s2.Op != OpPPC64SLDconst {
 10649  			break
 10650  		}
 10651  		if s2.AuxInt != 24 {
 10652  			break
 10653  		}
 10654  		x3 := s2.Args[0]
 10655  		if x3.Op != OpPPC64MOVBZload {
 10656  			break
 10657  		}
 10658  		i3 := x3.AuxInt
 10659  		if x3.Aux != s {
 10660  			break
 10661  		}
 10662  		_ = x3.Args[1]
 10663  		if p != x3.Args[0] {
 10664  			break
 10665  		}
 10666  		if mem != x3.Args[1] {
 10667  			break
 10668  		}
 10669  		o1 := o2.Args[1]
 10670  		if o1.Op != OpPPC64OR {
 10671  			break
 10672  		}
 10673  		if o1.Type != t {
 10674  			break
 10675  		}
 10676  		_ = o1.Args[1]
 10677  		o0 := o1.Args[0]
 10678  		if o0.Op != OpPPC64OR {
 10679  			break
 10680  		}
 10681  		if o0.Type != t {
 10682  			break
 10683  		}
 10684  		_ = o0.Args[1]
 10685  		x0 := o0.Args[0]
 10686  		if x0.Op != OpPPC64MOVBZload {
 10687  			break
 10688  		}
 10689  		i0 := x0.AuxInt
 10690  		if x0.Aux != s {
 10691  			break
 10692  		}
 10693  		_ = x0.Args[1]
 10694  		if p != x0.Args[0] {
 10695  			break
 10696  		}
 10697  		if mem != x0.Args[1] {
 10698  			break
 10699  		}
 10700  		s0 := o0.Args[1]
 10701  		if s0.Op != OpPPC64SLDconst {
 10702  			break
 10703  		}
 10704  		if s0.AuxInt != 8 {
 10705  			break
 10706  		}
 10707  		x1 := s0.Args[0]
 10708  		if x1.Op != OpPPC64MOVBZload {
 10709  			break
 10710  		}
 10711  		i1 := x1.AuxInt
 10712  		if x1.Aux != s {
 10713  			break
 10714  		}
 10715  		_ = x1.Args[1]
 10716  		if p != x1.Args[0] {
 10717  			break
 10718  		}
 10719  		if mem != x1.Args[1] {
 10720  			break
 10721  		}
 10722  		s1 := o1.Args[1]
 10723  		if s1.Op != OpPPC64SLDconst {
 10724  			break
 10725  		}
 10726  		if s1.AuxInt != 16 {
 10727  			break
 10728  		}
 10729  		x2 := s1.Args[0]
 10730  		if x2.Op != OpPPC64MOVBZload {
 10731  			break
 10732  		}
 10733  		i2 := x2.AuxInt
 10734  		if x2.Aux != s {
 10735  			break
 10736  		}
 10737  		_ = x2.Args[1]
 10738  		if p != x2.Args[0] {
 10739  			break
 10740  		}
 10741  		if mem != x2.Args[1] {
 10742  			break
 10743  		}
 10744  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10745  			break
 10746  		}
 10747  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10748  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10749  		v.reset(OpCopy)
 10750  		v.AddArg(v0)
 10751  		v0.AuxInt = i0
 10752  		v0.Aux = s
 10753  		v0.AddArg(p)
 10754  		v0.AddArg(mem)
 10755  		return true
 10756  	}
 10757  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 10758  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10759  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10760  	for {
 10761  		t := v.Type
 10762  		_ = v.Args[1]
 10763  		s6 := v.Args[0]
 10764  		if s6.Op != OpPPC64SLDconst {
 10765  			break
 10766  		}
 10767  		if s6.AuxInt != 56 {
 10768  			break
 10769  		}
 10770  		x7 := s6.Args[0]
 10771  		if x7.Op != OpPPC64MOVBZload {
 10772  			break
 10773  		}
 10774  		i7 := x7.AuxInt
 10775  		s := x7.Aux
 10776  		_ = x7.Args[1]
 10777  		p := x7.Args[0]
 10778  		mem := x7.Args[1]
 10779  		o5 := v.Args[1]
 10780  		if o5.Op != OpPPC64OR {
 10781  			break
 10782  		}
 10783  		if o5.Type != t {
 10784  			break
 10785  		}
 10786  		_ = o5.Args[1]
 10787  		s5 := o5.Args[0]
 10788  		if s5.Op != OpPPC64SLDconst {
 10789  			break
 10790  		}
 10791  		if s5.AuxInt != 48 {
 10792  			break
 10793  		}
 10794  		x6 := s5.Args[0]
 10795  		if x6.Op != OpPPC64MOVBZload {
 10796  			break
 10797  		}
 10798  		i6 := x6.AuxInt
 10799  		if x6.Aux != s {
 10800  			break
 10801  		}
 10802  		_ = x6.Args[1]
 10803  		if p != x6.Args[0] {
 10804  			break
 10805  		}
 10806  		if mem != x6.Args[1] {
 10807  			break
 10808  		}
 10809  		o4 := o5.Args[1]
 10810  		if o4.Op != OpPPC64OR {
 10811  			break
 10812  		}
 10813  		if o4.Type != t {
 10814  			break
 10815  		}
 10816  		_ = o4.Args[1]
 10817  		s4 := o4.Args[0]
 10818  		if s4.Op != OpPPC64SLDconst {
 10819  			break
 10820  		}
 10821  		if s4.AuxInt != 40 {
 10822  			break
 10823  		}
 10824  		x5 := s4.Args[0]
 10825  		if x5.Op != OpPPC64MOVBZload {
 10826  			break
 10827  		}
 10828  		i5 := x5.AuxInt
 10829  		if x5.Aux != s {
 10830  			break
 10831  		}
 10832  		_ = x5.Args[1]
 10833  		if p != x5.Args[0] {
 10834  			break
 10835  		}
 10836  		if mem != x5.Args[1] {
 10837  			break
 10838  		}
 10839  		o3 := o4.Args[1]
 10840  		if o3.Op != OpPPC64OR {
 10841  			break
 10842  		}
 10843  		if o3.Type != t {
 10844  			break
 10845  		}
 10846  		_ = o3.Args[1]
 10847  		s3 := o3.Args[0]
 10848  		if s3.Op != OpPPC64SLDconst {
 10849  			break
 10850  		}
 10851  		if s3.AuxInt != 32 {
 10852  			break
 10853  		}
 10854  		x4 := s3.Args[0]
 10855  		if x4.Op != OpPPC64MOVBZload {
 10856  			break
 10857  		}
 10858  		i4 := x4.AuxInt
 10859  		if x4.Aux != s {
 10860  			break
 10861  		}
 10862  		_ = x4.Args[1]
 10863  		if p != x4.Args[0] {
 10864  			break
 10865  		}
 10866  		if mem != x4.Args[1] {
 10867  			break
 10868  		}
 10869  		o2 := o3.Args[1]
 10870  		if o2.Op != OpPPC64OR {
 10871  			break
 10872  		}
 10873  		if o2.Type != t {
 10874  			break
 10875  		}
 10876  		_ = o2.Args[1]
 10877  		o1 := o2.Args[0]
 10878  		if o1.Op != OpPPC64OR {
 10879  			break
 10880  		}
 10881  		if o1.Type != t {
 10882  			break
 10883  		}
 10884  		_ = o1.Args[1]
 10885  		s1 := o1.Args[0]
 10886  		if s1.Op != OpPPC64SLDconst {
 10887  			break
 10888  		}
 10889  		if s1.AuxInt != 16 {
 10890  			break
 10891  		}
 10892  		x2 := s1.Args[0]
 10893  		if x2.Op != OpPPC64MOVBZload {
 10894  			break
 10895  		}
 10896  		i2 := x2.AuxInt
 10897  		if x2.Aux != s {
 10898  			break
 10899  		}
 10900  		_ = x2.Args[1]
 10901  		if p != x2.Args[0] {
 10902  			break
 10903  		}
 10904  		if mem != x2.Args[1] {
 10905  			break
 10906  		}
 10907  		o0 := o1.Args[1]
 10908  		if o0.Op != OpPPC64OR {
 10909  			break
 10910  		}
 10911  		if o0.Type != t {
 10912  			break
 10913  		}
 10914  		_ = o0.Args[1]
 10915  		s0 := o0.Args[0]
 10916  		if s0.Op != OpPPC64SLDconst {
 10917  			break
 10918  		}
 10919  		if s0.AuxInt != 8 {
 10920  			break
 10921  		}
 10922  		x1 := s0.Args[0]
 10923  		if x1.Op != OpPPC64MOVBZload {
 10924  			break
 10925  		}
 10926  		i1 := x1.AuxInt
 10927  		if x1.Aux != s {
 10928  			break
 10929  		}
 10930  		_ = x1.Args[1]
 10931  		if p != x1.Args[0] {
 10932  			break
 10933  		}
 10934  		if mem != x1.Args[1] {
 10935  			break
 10936  		}
 10937  		x0 := o0.Args[1]
 10938  		if x0.Op != OpPPC64MOVBZload {
 10939  			break
 10940  		}
 10941  		i0 := x0.AuxInt
 10942  		if x0.Aux != s {
 10943  			break
 10944  		}
 10945  		_ = x0.Args[1]
 10946  		if p != x0.Args[0] {
 10947  			break
 10948  		}
 10949  		if mem != x0.Args[1] {
 10950  			break
 10951  		}
 10952  		s2 := o2.Args[1]
 10953  		if s2.Op != OpPPC64SLDconst {
 10954  			break
 10955  		}
 10956  		if s2.AuxInt != 24 {
 10957  			break
 10958  		}
 10959  		x3 := s2.Args[0]
 10960  		if x3.Op != OpPPC64MOVBZload {
 10961  			break
 10962  		}
 10963  		i3 := x3.AuxInt
 10964  		if x3.Aux != s {
 10965  			break
 10966  		}
 10967  		_ = x3.Args[1]
 10968  		if p != x3.Args[0] {
 10969  			break
 10970  		}
 10971  		if mem != x3.Args[1] {
 10972  			break
 10973  		}
 10974  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10975  			break
 10976  		}
 10977  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10978  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10979  		v.reset(OpCopy)
 10980  		v.AddArg(v0)
 10981  		v0.AuxInt = i0
 10982  		v0.Aux = s
 10983  		v0.AddArg(p)
 10984  		v0.AddArg(mem)
 10985  		return true
 10986  	}
 10987  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 10988  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10989  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10990  	for {
 10991  		t := v.Type
 10992  		_ = v.Args[1]
 10993  		s6 := v.Args[0]
 10994  		if s6.Op != OpPPC64SLDconst {
 10995  			break
 10996  		}
 10997  		if s6.AuxInt != 56 {
 10998  			break
 10999  		}
 11000  		x7 := s6.Args[0]
 11001  		if x7.Op != OpPPC64MOVBZload {
 11002  			break
 11003  		}
 11004  		i7 := x7.AuxInt
 11005  		s := x7.Aux
 11006  		_ = x7.Args[1]
 11007  		p := x7.Args[0]
 11008  		mem := x7.Args[1]
 11009  		o5 := v.Args[1]
 11010  		if o5.Op != OpPPC64OR {
 11011  			break
 11012  		}
 11013  		if o5.Type != t {
 11014  			break
 11015  		}
 11016  		_ = o5.Args[1]
 11017  		s5 := o5.Args[0]
 11018  		if s5.Op != OpPPC64SLDconst {
 11019  			break
 11020  		}
 11021  		if s5.AuxInt != 48 {
 11022  			break
 11023  		}
 11024  		x6 := s5.Args[0]
 11025  		if x6.Op != OpPPC64MOVBZload {
 11026  			break
 11027  		}
 11028  		i6 := x6.AuxInt
 11029  		if x6.Aux != s {
 11030  			break
 11031  		}
 11032  		_ = x6.Args[1]
 11033  		if p != x6.Args[0] {
 11034  			break
 11035  		}
 11036  		if mem != x6.Args[1] {
 11037  			break
 11038  		}
 11039  		o4 := o5.Args[1]
 11040  		if o4.Op != OpPPC64OR {
 11041  			break
 11042  		}
 11043  		if o4.Type != t {
 11044  			break
 11045  		}
 11046  		_ = o4.Args[1]
 11047  		s4 := o4.Args[0]
 11048  		if s4.Op != OpPPC64SLDconst {
 11049  			break
 11050  		}
 11051  		if s4.AuxInt != 40 {
 11052  			break
 11053  		}
 11054  		x5 := s4.Args[0]
 11055  		if x5.Op != OpPPC64MOVBZload {
 11056  			break
 11057  		}
 11058  		i5 := x5.AuxInt
 11059  		if x5.Aux != s {
 11060  			break
 11061  		}
 11062  		_ = x5.Args[1]
 11063  		if p != x5.Args[0] {
 11064  			break
 11065  		}
 11066  		if mem != x5.Args[1] {
 11067  			break
 11068  		}
 11069  		o3 := o4.Args[1]
 11070  		if o3.Op != OpPPC64OR {
 11071  			break
 11072  		}
 11073  		if o3.Type != t {
 11074  			break
 11075  		}
 11076  		_ = o3.Args[1]
 11077  		s3 := o3.Args[0]
 11078  		if s3.Op != OpPPC64SLDconst {
 11079  			break
 11080  		}
 11081  		if s3.AuxInt != 32 {
 11082  			break
 11083  		}
 11084  		x4 := s3.Args[0]
 11085  		if x4.Op != OpPPC64MOVBZload {
 11086  			break
 11087  		}
 11088  		i4 := x4.AuxInt
 11089  		if x4.Aux != s {
 11090  			break
 11091  		}
 11092  		_ = x4.Args[1]
 11093  		if p != x4.Args[0] {
 11094  			break
 11095  		}
 11096  		if mem != x4.Args[1] {
 11097  			break
 11098  		}
 11099  		o2 := o3.Args[1]
 11100  		if o2.Op != OpPPC64OR {
 11101  			break
 11102  		}
 11103  		if o2.Type != t {
 11104  			break
 11105  		}
 11106  		_ = o2.Args[1]
 11107  		o1 := o2.Args[0]
 11108  		if o1.Op != OpPPC64OR {
 11109  			break
 11110  		}
 11111  		if o1.Type != t {
 11112  			break
 11113  		}
 11114  		_ = o1.Args[1]
 11115  		s1 := o1.Args[0]
 11116  		if s1.Op != OpPPC64SLDconst {
 11117  			break
 11118  		}
 11119  		if s1.AuxInt != 16 {
 11120  			break
 11121  		}
 11122  		x2 := s1.Args[0]
 11123  		if x2.Op != OpPPC64MOVBZload {
 11124  			break
 11125  		}
 11126  		i2 := x2.AuxInt
 11127  		if x2.Aux != s {
 11128  			break
 11129  		}
 11130  		_ = x2.Args[1]
 11131  		if p != x2.Args[0] {
 11132  			break
 11133  		}
 11134  		if mem != x2.Args[1] {
 11135  			break
 11136  		}
 11137  		o0 := o1.Args[1]
 11138  		if o0.Op != OpPPC64OR {
 11139  			break
 11140  		}
 11141  		if o0.Type != t {
 11142  			break
 11143  		}
 11144  		_ = o0.Args[1]
 11145  		x0 := o0.Args[0]
 11146  		if x0.Op != OpPPC64MOVBZload {
 11147  			break
 11148  		}
 11149  		i0 := x0.AuxInt
 11150  		if x0.Aux != s {
 11151  			break
 11152  		}
 11153  		_ = x0.Args[1]
 11154  		if p != x0.Args[0] {
 11155  			break
 11156  		}
 11157  		if mem != x0.Args[1] {
 11158  			break
 11159  		}
 11160  		s0 := o0.Args[1]
 11161  		if s0.Op != OpPPC64SLDconst {
 11162  			break
 11163  		}
 11164  		if s0.AuxInt != 8 {
 11165  			break
 11166  		}
 11167  		x1 := s0.Args[0]
 11168  		if x1.Op != OpPPC64MOVBZload {
 11169  			break
 11170  		}
 11171  		i1 := x1.AuxInt
 11172  		if x1.Aux != s {
 11173  			break
 11174  		}
 11175  		_ = x1.Args[1]
 11176  		if p != x1.Args[0] {
 11177  			break
 11178  		}
 11179  		if mem != x1.Args[1] {
 11180  			break
 11181  		}
 11182  		s2 := o2.Args[1]
 11183  		if s2.Op != OpPPC64SLDconst {
 11184  			break
 11185  		}
 11186  		if s2.AuxInt != 24 {
 11187  			break
 11188  		}
 11189  		x3 := s2.Args[0]
 11190  		if x3.Op != OpPPC64MOVBZload {
 11191  			break
 11192  		}
 11193  		i3 := x3.AuxInt
 11194  		if x3.Aux != s {
 11195  			break
 11196  		}
 11197  		_ = x3.Args[1]
 11198  		if p != x3.Args[0] {
 11199  			break
 11200  		}
 11201  		if mem != x3.Args[1] {
 11202  			break
 11203  		}
 11204  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11205  			break
 11206  		}
 11207  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11208  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11209  		v.reset(OpCopy)
 11210  		v.AddArg(v0)
 11211  		v0.AuxInt = i0
 11212  		v0.Aux = s
 11213  		v0.AddArg(p)
 11214  		v0.AddArg(mem)
 11215  		return true
 11216  	}
 11217  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 11218  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11219  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11220  	for {
 11221  		t := v.Type
 11222  		_ = v.Args[1]
 11223  		s6 := v.Args[0]
 11224  		if s6.Op != OpPPC64SLDconst {
 11225  			break
 11226  		}
 11227  		if s6.AuxInt != 56 {
 11228  			break
 11229  		}
 11230  		x7 := s6.Args[0]
 11231  		if x7.Op != OpPPC64MOVBZload {
 11232  			break
 11233  		}
 11234  		i7 := x7.AuxInt
 11235  		s := x7.Aux
 11236  		_ = x7.Args[1]
 11237  		p := x7.Args[0]
 11238  		mem := x7.Args[1]
 11239  		o5 := v.Args[1]
 11240  		if o5.Op != OpPPC64OR {
 11241  			break
 11242  		}
 11243  		if o5.Type != t {
 11244  			break
 11245  		}
 11246  		_ = o5.Args[1]
 11247  		s5 := o5.Args[0]
 11248  		if s5.Op != OpPPC64SLDconst {
 11249  			break
 11250  		}
 11251  		if s5.AuxInt != 48 {
 11252  			break
 11253  		}
 11254  		x6 := s5.Args[0]
 11255  		if x6.Op != OpPPC64MOVBZload {
 11256  			break
 11257  		}
 11258  		i6 := x6.AuxInt
 11259  		if x6.Aux != s {
 11260  			break
 11261  		}
 11262  		_ = x6.Args[1]
 11263  		if p != x6.Args[0] {
 11264  			break
 11265  		}
 11266  		if mem != x6.Args[1] {
 11267  			break
 11268  		}
 11269  		o4 := o5.Args[1]
 11270  		if o4.Op != OpPPC64OR {
 11271  			break
 11272  		}
 11273  		if o4.Type != t {
 11274  			break
 11275  		}
 11276  		_ = o4.Args[1]
 11277  		s4 := o4.Args[0]
 11278  		if s4.Op != OpPPC64SLDconst {
 11279  			break
 11280  		}
 11281  		if s4.AuxInt != 40 {
 11282  			break
 11283  		}
 11284  		x5 := s4.Args[0]
 11285  		if x5.Op != OpPPC64MOVBZload {
 11286  			break
 11287  		}
 11288  		i5 := x5.AuxInt
 11289  		if x5.Aux != s {
 11290  			break
 11291  		}
 11292  		_ = x5.Args[1]
 11293  		if p != x5.Args[0] {
 11294  			break
 11295  		}
 11296  		if mem != x5.Args[1] {
 11297  			break
 11298  		}
 11299  		o3 := o4.Args[1]
 11300  		if o3.Op != OpPPC64OR {
 11301  			break
 11302  		}
 11303  		if o3.Type != t {
 11304  			break
 11305  		}
 11306  		_ = o3.Args[1]
 11307  		s3 := o3.Args[0]
 11308  		if s3.Op != OpPPC64SLDconst {
 11309  			break
 11310  		}
 11311  		if s3.AuxInt != 32 {
 11312  			break
 11313  		}
 11314  		x4 := s3.Args[0]
 11315  		if x4.Op != OpPPC64MOVBZload {
 11316  			break
 11317  		}
 11318  		i4 := x4.AuxInt
 11319  		if x4.Aux != s {
 11320  			break
 11321  		}
 11322  		_ = x4.Args[1]
 11323  		if p != x4.Args[0] {
 11324  			break
 11325  		}
 11326  		if mem != x4.Args[1] {
 11327  			break
 11328  		}
 11329  		o2 := o3.Args[1]
 11330  		if o2.Op != OpPPC64OR {
 11331  			break
 11332  		}
 11333  		if o2.Type != t {
 11334  			break
 11335  		}
 11336  		_ = o2.Args[1]
 11337  		o1 := o2.Args[0]
 11338  		if o1.Op != OpPPC64OR {
 11339  			break
 11340  		}
 11341  		if o1.Type != t {
 11342  			break
 11343  		}
 11344  		_ = o1.Args[1]
 11345  		o0 := o1.Args[0]
 11346  		if o0.Op != OpPPC64OR {
 11347  			break
 11348  		}
 11349  		if o0.Type != t {
 11350  			break
 11351  		}
 11352  		_ = o0.Args[1]
 11353  		s0 := o0.Args[0]
 11354  		if s0.Op != OpPPC64SLDconst {
 11355  			break
 11356  		}
 11357  		if s0.AuxInt != 8 {
 11358  			break
 11359  		}
 11360  		x1 := s0.Args[0]
 11361  		if x1.Op != OpPPC64MOVBZload {
 11362  			break
 11363  		}
 11364  		i1 := x1.AuxInt
 11365  		if x1.Aux != s {
 11366  			break
 11367  		}
 11368  		_ = x1.Args[1]
 11369  		if p != x1.Args[0] {
 11370  			break
 11371  		}
 11372  		if mem != x1.Args[1] {
 11373  			break
 11374  		}
 11375  		x0 := o0.Args[1]
 11376  		if x0.Op != OpPPC64MOVBZload {
 11377  			break
 11378  		}
 11379  		i0 := x0.AuxInt
 11380  		if x0.Aux != s {
 11381  			break
 11382  		}
 11383  		_ = x0.Args[1]
 11384  		if p != x0.Args[0] {
 11385  			break
 11386  		}
 11387  		if mem != x0.Args[1] {
 11388  			break
 11389  		}
 11390  		s1 := o1.Args[1]
 11391  		if s1.Op != OpPPC64SLDconst {
 11392  			break
 11393  		}
 11394  		if s1.AuxInt != 16 {
 11395  			break
 11396  		}
 11397  		x2 := s1.Args[0]
 11398  		if x2.Op != OpPPC64MOVBZload {
 11399  			break
 11400  		}
 11401  		i2 := x2.AuxInt
 11402  		if x2.Aux != s {
 11403  			break
 11404  		}
 11405  		_ = x2.Args[1]
 11406  		if p != x2.Args[0] {
 11407  			break
 11408  		}
 11409  		if mem != x2.Args[1] {
 11410  			break
 11411  		}
 11412  		s2 := o2.Args[1]
 11413  		if s2.Op != OpPPC64SLDconst {
 11414  			break
 11415  		}
 11416  		if s2.AuxInt != 24 {
 11417  			break
 11418  		}
 11419  		x3 := s2.Args[0]
 11420  		if x3.Op != OpPPC64MOVBZload {
 11421  			break
 11422  		}
 11423  		i3 := x3.AuxInt
 11424  		if x3.Aux != s {
 11425  			break
 11426  		}
 11427  		_ = x3.Args[1]
 11428  		if p != x3.Args[0] {
 11429  			break
 11430  		}
 11431  		if mem != x3.Args[1] {
 11432  			break
 11433  		}
 11434  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11435  			break
 11436  		}
 11437  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11438  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11439  		v.reset(OpCopy)
 11440  		v.AddArg(v0)
 11441  		v0.AuxInt = i0
 11442  		v0.Aux = s
 11443  		v0.AddArg(p)
 11444  		v0.AddArg(mem)
 11445  		return true
 11446  	}
 11447  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 11448  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11449  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11450  	for {
 11451  		t := v.Type
 11452  		_ = v.Args[1]
 11453  		s6 := v.Args[0]
 11454  		if s6.Op != OpPPC64SLDconst {
 11455  			break
 11456  		}
 11457  		if s6.AuxInt != 56 {
 11458  			break
 11459  		}
 11460  		x7 := s6.Args[0]
 11461  		if x7.Op != OpPPC64MOVBZload {
 11462  			break
 11463  		}
 11464  		i7 := x7.AuxInt
 11465  		s := x7.Aux
 11466  		_ = x7.Args[1]
 11467  		p := x7.Args[0]
 11468  		mem := x7.Args[1]
 11469  		o5 := v.Args[1]
 11470  		if o5.Op != OpPPC64OR {
 11471  			break
 11472  		}
 11473  		if o5.Type != t {
 11474  			break
 11475  		}
 11476  		_ = o5.Args[1]
 11477  		s5 := o5.Args[0]
 11478  		if s5.Op != OpPPC64SLDconst {
 11479  			break
 11480  		}
 11481  		if s5.AuxInt != 48 {
 11482  			break
 11483  		}
 11484  		x6 := s5.Args[0]
 11485  		if x6.Op != OpPPC64MOVBZload {
 11486  			break
 11487  		}
 11488  		i6 := x6.AuxInt
 11489  		if x6.Aux != s {
 11490  			break
 11491  		}
 11492  		_ = x6.Args[1]
 11493  		if p != x6.Args[0] {
 11494  			break
 11495  		}
 11496  		if mem != x6.Args[1] {
 11497  			break
 11498  		}
 11499  		o4 := o5.Args[1]
 11500  		if o4.Op != OpPPC64OR {
 11501  			break
 11502  		}
 11503  		if o4.Type != t {
 11504  			break
 11505  		}
 11506  		_ = o4.Args[1]
 11507  		s4 := o4.Args[0]
 11508  		if s4.Op != OpPPC64SLDconst {
 11509  			break
 11510  		}
 11511  		if s4.AuxInt != 40 {
 11512  			break
 11513  		}
 11514  		x5 := s4.Args[0]
 11515  		if x5.Op != OpPPC64MOVBZload {
 11516  			break
 11517  		}
 11518  		i5 := x5.AuxInt
 11519  		if x5.Aux != s {
 11520  			break
 11521  		}
 11522  		_ = x5.Args[1]
 11523  		if p != x5.Args[0] {
 11524  			break
 11525  		}
 11526  		if mem != x5.Args[1] {
 11527  			break
 11528  		}
 11529  		o3 := o4.Args[1]
 11530  		if o3.Op != OpPPC64OR {
 11531  			break
 11532  		}
 11533  		if o3.Type != t {
 11534  			break
 11535  		}
 11536  		_ = o3.Args[1]
 11537  		s3 := o3.Args[0]
 11538  		if s3.Op != OpPPC64SLDconst {
 11539  			break
 11540  		}
 11541  		if s3.AuxInt != 32 {
 11542  			break
 11543  		}
 11544  		x4 := s3.Args[0]
 11545  		if x4.Op != OpPPC64MOVBZload {
 11546  			break
 11547  		}
 11548  		i4 := x4.AuxInt
 11549  		if x4.Aux != s {
 11550  			break
 11551  		}
 11552  		_ = x4.Args[1]
 11553  		if p != x4.Args[0] {
 11554  			break
 11555  		}
 11556  		if mem != x4.Args[1] {
 11557  			break
 11558  		}
 11559  		o2 := o3.Args[1]
 11560  		if o2.Op != OpPPC64OR {
 11561  			break
 11562  		}
 11563  		if o2.Type != t {
 11564  			break
 11565  		}
 11566  		_ = o2.Args[1]
 11567  		o1 := o2.Args[0]
 11568  		if o1.Op != OpPPC64OR {
 11569  			break
 11570  		}
 11571  		if o1.Type != t {
 11572  			break
 11573  		}
 11574  		_ = o1.Args[1]
 11575  		o0 := o1.Args[0]
 11576  		if o0.Op != OpPPC64OR {
 11577  			break
 11578  		}
 11579  		if o0.Type != t {
 11580  			break
 11581  		}
 11582  		_ = o0.Args[1]
 11583  		x0 := o0.Args[0]
 11584  		if x0.Op != OpPPC64MOVBZload {
 11585  			break
 11586  		}
 11587  		i0 := x0.AuxInt
 11588  		if x0.Aux != s {
 11589  			break
 11590  		}
 11591  		_ = x0.Args[1]
 11592  		if p != x0.Args[0] {
 11593  			break
 11594  		}
 11595  		if mem != x0.Args[1] {
 11596  			break
 11597  		}
 11598  		s0 := o0.Args[1]
 11599  		if s0.Op != OpPPC64SLDconst {
 11600  			break
 11601  		}
 11602  		if s0.AuxInt != 8 {
 11603  			break
 11604  		}
 11605  		x1 := s0.Args[0]
 11606  		if x1.Op != OpPPC64MOVBZload {
 11607  			break
 11608  		}
 11609  		i1 := x1.AuxInt
 11610  		if x1.Aux != s {
 11611  			break
 11612  		}
 11613  		_ = x1.Args[1]
 11614  		if p != x1.Args[0] {
 11615  			break
 11616  		}
 11617  		if mem != x1.Args[1] {
 11618  			break
 11619  		}
 11620  		s1 := o1.Args[1]
 11621  		if s1.Op != OpPPC64SLDconst {
 11622  			break
 11623  		}
 11624  		if s1.AuxInt != 16 {
 11625  			break
 11626  		}
 11627  		x2 := s1.Args[0]
 11628  		if x2.Op != OpPPC64MOVBZload {
 11629  			break
 11630  		}
 11631  		i2 := x2.AuxInt
 11632  		if x2.Aux != s {
 11633  			break
 11634  		}
 11635  		_ = x2.Args[1]
 11636  		if p != x2.Args[0] {
 11637  			break
 11638  		}
 11639  		if mem != x2.Args[1] {
 11640  			break
 11641  		}
 11642  		s2 := o2.Args[1]
 11643  		if s2.Op != OpPPC64SLDconst {
 11644  			break
 11645  		}
 11646  		if s2.AuxInt != 24 {
 11647  			break
 11648  		}
 11649  		x3 := s2.Args[0]
 11650  		if x3.Op != OpPPC64MOVBZload {
 11651  			break
 11652  		}
 11653  		i3 := x3.AuxInt
 11654  		if x3.Aux != s {
 11655  			break
 11656  		}
 11657  		_ = x3.Args[1]
 11658  		if p != x3.Args[0] {
 11659  			break
 11660  		}
 11661  		if mem != x3.Args[1] {
 11662  			break
 11663  		}
 11664  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11665  			break
 11666  		}
 11667  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11668  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11669  		v.reset(OpCopy)
 11670  		v.AddArg(v0)
 11671  		v0.AuxInt = i0
 11672  		v0.Aux = s
 11673  		v0.AddArg(p)
 11674  		v0.AddArg(mem)
 11675  		return true
 11676  	}
 11677  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 11678  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11679  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11680  	for {
 11681  		t := v.Type
 11682  		_ = v.Args[1]
 11683  		s6 := v.Args[0]
 11684  		if s6.Op != OpPPC64SLDconst {
 11685  			break
 11686  		}
 11687  		if s6.AuxInt != 56 {
 11688  			break
 11689  		}
 11690  		x7 := s6.Args[0]
 11691  		if x7.Op != OpPPC64MOVBZload {
 11692  			break
 11693  		}
 11694  		i7 := x7.AuxInt
 11695  		s := x7.Aux
 11696  		_ = x7.Args[1]
 11697  		p := x7.Args[0]
 11698  		mem := x7.Args[1]
 11699  		o5 := v.Args[1]
 11700  		if o5.Op != OpPPC64OR {
 11701  			break
 11702  		}
 11703  		if o5.Type != t {
 11704  			break
 11705  		}
 11706  		_ = o5.Args[1]
 11707  		s5 := o5.Args[0]
 11708  		if s5.Op != OpPPC64SLDconst {
 11709  			break
 11710  		}
 11711  		if s5.AuxInt != 48 {
 11712  			break
 11713  		}
 11714  		x6 := s5.Args[0]
 11715  		if x6.Op != OpPPC64MOVBZload {
 11716  			break
 11717  		}
 11718  		i6 := x6.AuxInt
 11719  		if x6.Aux != s {
 11720  			break
 11721  		}
 11722  		_ = x6.Args[1]
 11723  		if p != x6.Args[0] {
 11724  			break
 11725  		}
 11726  		if mem != x6.Args[1] {
 11727  			break
 11728  		}
 11729  		o4 := o5.Args[1]
 11730  		if o4.Op != OpPPC64OR {
 11731  			break
 11732  		}
 11733  		if o4.Type != t {
 11734  			break
 11735  		}
 11736  		_ = o4.Args[1]
 11737  		s4 := o4.Args[0]
 11738  		if s4.Op != OpPPC64SLDconst {
 11739  			break
 11740  		}
 11741  		if s4.AuxInt != 40 {
 11742  			break
 11743  		}
 11744  		x5 := s4.Args[0]
 11745  		if x5.Op != OpPPC64MOVBZload {
 11746  			break
 11747  		}
 11748  		i5 := x5.AuxInt
 11749  		if x5.Aux != s {
 11750  			break
 11751  		}
 11752  		_ = x5.Args[1]
 11753  		if p != x5.Args[0] {
 11754  			break
 11755  		}
 11756  		if mem != x5.Args[1] {
 11757  			break
 11758  		}
 11759  		o3 := o4.Args[1]
 11760  		if o3.Op != OpPPC64OR {
 11761  			break
 11762  		}
 11763  		if o3.Type != t {
 11764  			break
 11765  		}
 11766  		_ = o3.Args[1]
 11767  		o2 := o3.Args[0]
 11768  		if o2.Op != OpPPC64OR {
 11769  			break
 11770  		}
 11771  		if o2.Type != t {
 11772  			break
 11773  		}
 11774  		_ = o2.Args[1]
 11775  		s2 := o2.Args[0]
 11776  		if s2.Op != OpPPC64SLDconst {
 11777  			break
 11778  		}
 11779  		if s2.AuxInt != 24 {
 11780  			break
 11781  		}
 11782  		x3 := s2.Args[0]
 11783  		if x3.Op != OpPPC64MOVBZload {
 11784  			break
 11785  		}
 11786  		i3 := x3.AuxInt
 11787  		if x3.Aux != s {
 11788  			break
 11789  		}
 11790  		_ = x3.Args[1]
 11791  		if p != x3.Args[0] {
 11792  			break
 11793  		}
 11794  		if mem != x3.Args[1] {
 11795  			break
 11796  		}
 11797  		o1 := o2.Args[1]
 11798  		if o1.Op != OpPPC64OR {
 11799  			break
 11800  		}
 11801  		if o1.Type != t {
 11802  			break
 11803  		}
 11804  		_ = o1.Args[1]
 11805  		s1 := o1.Args[0]
 11806  		if s1.Op != OpPPC64SLDconst {
 11807  			break
 11808  		}
 11809  		if s1.AuxInt != 16 {
 11810  			break
 11811  		}
 11812  		x2 := s1.Args[0]
 11813  		if x2.Op != OpPPC64MOVBZload {
 11814  			break
 11815  		}
 11816  		i2 := x2.AuxInt
 11817  		if x2.Aux != s {
 11818  			break
 11819  		}
 11820  		_ = x2.Args[1]
 11821  		if p != x2.Args[0] {
 11822  			break
 11823  		}
 11824  		if mem != x2.Args[1] {
 11825  			break
 11826  		}
 11827  		o0 := o1.Args[1]
 11828  		if o0.Op != OpPPC64OR {
 11829  			break
 11830  		}
 11831  		if o0.Type != t {
 11832  			break
 11833  		}
 11834  		_ = o0.Args[1]
 11835  		s0 := o0.Args[0]
 11836  		if s0.Op != OpPPC64SLDconst {
 11837  			break
 11838  		}
 11839  		if s0.AuxInt != 8 {
 11840  			break
 11841  		}
 11842  		x1 := s0.Args[0]
 11843  		if x1.Op != OpPPC64MOVBZload {
 11844  			break
 11845  		}
 11846  		i1 := x1.AuxInt
 11847  		if x1.Aux != s {
 11848  			break
 11849  		}
 11850  		_ = x1.Args[1]
 11851  		if p != x1.Args[0] {
 11852  			break
 11853  		}
 11854  		if mem != x1.Args[1] {
 11855  			break
 11856  		}
 11857  		x0 := o0.Args[1]
 11858  		if x0.Op != OpPPC64MOVBZload {
 11859  			break
 11860  		}
 11861  		i0 := x0.AuxInt
 11862  		if x0.Aux != s {
 11863  			break
 11864  		}
 11865  		_ = x0.Args[1]
 11866  		if p != x0.Args[0] {
 11867  			break
 11868  		}
 11869  		if mem != x0.Args[1] {
 11870  			break
 11871  		}
 11872  		s3 := o3.Args[1]
 11873  		if s3.Op != OpPPC64SLDconst {
 11874  			break
 11875  		}
 11876  		if s3.AuxInt != 32 {
 11877  			break
 11878  		}
 11879  		x4 := s3.Args[0]
 11880  		if x4.Op != OpPPC64MOVBZload {
 11881  			break
 11882  		}
 11883  		i4 := x4.AuxInt
 11884  		if x4.Aux != s {
 11885  			break
 11886  		}
 11887  		_ = x4.Args[1]
 11888  		if p != x4.Args[0] {
 11889  			break
 11890  		}
 11891  		if mem != x4.Args[1] {
 11892  			break
 11893  		}
 11894  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11895  			break
 11896  		}
 11897  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11898  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11899  		v.reset(OpCopy)
 11900  		v.AddArg(v0)
 11901  		v0.AuxInt = i0
 11902  		v0.Aux = s
 11903  		v0.AddArg(p)
 11904  		v0.AddArg(mem)
 11905  		return true
 11906  	}
 11907  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 11908  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11909  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11910  	for {
 11911  		t := v.Type
 11912  		_ = v.Args[1]
 11913  		s6 := v.Args[0]
 11914  		if s6.Op != OpPPC64SLDconst {
 11915  			break
 11916  		}
 11917  		if s6.AuxInt != 56 {
 11918  			break
 11919  		}
 11920  		x7 := s6.Args[0]
 11921  		if x7.Op != OpPPC64MOVBZload {
 11922  			break
 11923  		}
 11924  		i7 := x7.AuxInt
 11925  		s := x7.Aux
 11926  		_ = x7.Args[1]
 11927  		p := x7.Args[0]
 11928  		mem := x7.Args[1]
 11929  		o5 := v.Args[1]
 11930  		if o5.Op != OpPPC64OR {
 11931  			break
 11932  		}
 11933  		if o5.Type != t {
 11934  			break
 11935  		}
 11936  		_ = o5.Args[1]
 11937  		s5 := o5.Args[0]
 11938  		if s5.Op != OpPPC64SLDconst {
 11939  			break
 11940  		}
 11941  		if s5.AuxInt != 48 {
 11942  			break
 11943  		}
 11944  		x6 := s5.Args[0]
 11945  		if x6.Op != OpPPC64MOVBZload {
 11946  			break
 11947  		}
 11948  		i6 := x6.AuxInt
 11949  		if x6.Aux != s {
 11950  			break
 11951  		}
 11952  		_ = x6.Args[1]
 11953  		if p != x6.Args[0] {
 11954  			break
 11955  		}
 11956  		if mem != x6.Args[1] {
 11957  			break
 11958  		}
 11959  		o4 := o5.Args[1]
 11960  		if o4.Op != OpPPC64OR {
 11961  			break
 11962  		}
 11963  		if o4.Type != t {
 11964  			break
 11965  		}
 11966  		_ = o4.Args[1]
 11967  		s4 := o4.Args[0]
 11968  		if s4.Op != OpPPC64SLDconst {
 11969  			break
 11970  		}
 11971  		if s4.AuxInt != 40 {
 11972  			break
 11973  		}
 11974  		x5 := s4.Args[0]
 11975  		if x5.Op != OpPPC64MOVBZload {
 11976  			break
 11977  		}
 11978  		i5 := x5.AuxInt
 11979  		if x5.Aux != s {
 11980  			break
 11981  		}
 11982  		_ = x5.Args[1]
 11983  		if p != x5.Args[0] {
 11984  			break
 11985  		}
 11986  		if mem != x5.Args[1] {
 11987  			break
 11988  		}
 11989  		o3 := o4.Args[1]
 11990  		if o3.Op != OpPPC64OR {
 11991  			break
 11992  		}
 11993  		if o3.Type != t {
 11994  			break
 11995  		}
 11996  		_ = o3.Args[1]
 11997  		o2 := o3.Args[0]
 11998  		if o2.Op != OpPPC64OR {
 11999  			break
 12000  		}
 12001  		if o2.Type != t {
 12002  			break
 12003  		}
 12004  		_ = o2.Args[1]
 12005  		s2 := o2.Args[0]
 12006  		if s2.Op != OpPPC64SLDconst {
 12007  			break
 12008  		}
 12009  		if s2.AuxInt != 24 {
 12010  			break
 12011  		}
 12012  		x3 := s2.Args[0]
 12013  		if x3.Op != OpPPC64MOVBZload {
 12014  			break
 12015  		}
 12016  		i3 := x3.AuxInt
 12017  		if x3.Aux != s {
 12018  			break
 12019  		}
 12020  		_ = x3.Args[1]
 12021  		if p != x3.Args[0] {
 12022  			break
 12023  		}
 12024  		if mem != x3.Args[1] {
 12025  			break
 12026  		}
 12027  		o1 := o2.Args[1]
 12028  		if o1.Op != OpPPC64OR {
 12029  			break
 12030  		}
 12031  		if o1.Type != t {
 12032  			break
 12033  		}
 12034  		_ = o1.Args[1]
 12035  		s1 := o1.Args[0]
 12036  		if s1.Op != OpPPC64SLDconst {
 12037  			break
 12038  		}
 12039  		if s1.AuxInt != 16 {
 12040  			break
 12041  		}
 12042  		x2 := s1.Args[0]
 12043  		if x2.Op != OpPPC64MOVBZload {
 12044  			break
 12045  		}
 12046  		i2 := x2.AuxInt
 12047  		if x2.Aux != s {
 12048  			break
 12049  		}
 12050  		_ = x2.Args[1]
 12051  		if p != x2.Args[0] {
 12052  			break
 12053  		}
 12054  		if mem != x2.Args[1] {
 12055  			break
 12056  		}
 12057  		o0 := o1.Args[1]
 12058  		if o0.Op != OpPPC64OR {
 12059  			break
 12060  		}
 12061  		if o0.Type != t {
 12062  			break
 12063  		}
 12064  		_ = o0.Args[1]
 12065  		x0 := o0.Args[0]
 12066  		if x0.Op != OpPPC64MOVBZload {
 12067  			break
 12068  		}
 12069  		i0 := x0.AuxInt
 12070  		if x0.Aux != s {
 12071  			break
 12072  		}
 12073  		_ = x0.Args[1]
 12074  		if p != x0.Args[0] {
 12075  			break
 12076  		}
 12077  		if mem != x0.Args[1] {
 12078  			break
 12079  		}
 12080  		s0 := o0.Args[1]
 12081  		if s0.Op != OpPPC64SLDconst {
 12082  			break
 12083  		}
 12084  		if s0.AuxInt != 8 {
 12085  			break
 12086  		}
 12087  		x1 := s0.Args[0]
 12088  		if x1.Op != OpPPC64MOVBZload {
 12089  			break
 12090  		}
 12091  		i1 := x1.AuxInt
 12092  		if x1.Aux != s {
 12093  			break
 12094  		}
 12095  		_ = x1.Args[1]
 12096  		if p != x1.Args[0] {
 12097  			break
 12098  		}
 12099  		if mem != x1.Args[1] {
 12100  			break
 12101  		}
 12102  		s3 := o3.Args[1]
 12103  		if s3.Op != OpPPC64SLDconst {
 12104  			break
 12105  		}
 12106  		if s3.AuxInt != 32 {
 12107  			break
 12108  		}
 12109  		x4 := s3.Args[0]
 12110  		if x4.Op != OpPPC64MOVBZload {
 12111  			break
 12112  		}
 12113  		i4 := x4.AuxInt
 12114  		if x4.Aux != s {
 12115  			break
 12116  		}
 12117  		_ = x4.Args[1]
 12118  		if p != x4.Args[0] {
 12119  			break
 12120  		}
 12121  		if mem != x4.Args[1] {
 12122  			break
 12123  		}
 12124  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12125  			break
 12126  		}
 12127  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12128  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12129  		v.reset(OpCopy)
 12130  		v.AddArg(v0)
 12131  		v0.AuxInt = i0
 12132  		v0.Aux = s
 12133  		v0.AddArg(p)
 12134  		v0.AddArg(mem)
 12135  		return true
 12136  	}
 12137  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12138  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12139  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12140  	for {
 12141  		t := v.Type
 12142  		_ = v.Args[1]
 12143  		s6 := v.Args[0]
 12144  		if s6.Op != OpPPC64SLDconst {
 12145  			break
 12146  		}
 12147  		if s6.AuxInt != 56 {
 12148  			break
 12149  		}
 12150  		x7 := s6.Args[0]
 12151  		if x7.Op != OpPPC64MOVBZload {
 12152  			break
 12153  		}
 12154  		i7 := x7.AuxInt
 12155  		s := x7.Aux
 12156  		_ = x7.Args[1]
 12157  		p := x7.Args[0]
 12158  		mem := x7.Args[1]
 12159  		o5 := v.Args[1]
 12160  		if o5.Op != OpPPC64OR {
 12161  			break
 12162  		}
 12163  		if o5.Type != t {
 12164  			break
 12165  		}
 12166  		_ = o5.Args[1]
 12167  		s5 := o5.Args[0]
 12168  		if s5.Op != OpPPC64SLDconst {
 12169  			break
 12170  		}
 12171  		if s5.AuxInt != 48 {
 12172  			break
 12173  		}
 12174  		x6 := s5.Args[0]
 12175  		if x6.Op != OpPPC64MOVBZload {
 12176  			break
 12177  		}
 12178  		i6 := x6.AuxInt
 12179  		if x6.Aux != s {
 12180  			break
 12181  		}
 12182  		_ = x6.Args[1]
 12183  		if p != x6.Args[0] {
 12184  			break
 12185  		}
 12186  		if mem != x6.Args[1] {
 12187  			break
 12188  		}
 12189  		o4 := o5.Args[1]
 12190  		if o4.Op != OpPPC64OR {
 12191  			break
 12192  		}
 12193  		if o4.Type != t {
 12194  			break
 12195  		}
 12196  		_ = o4.Args[1]
 12197  		s4 := o4.Args[0]
 12198  		if s4.Op != OpPPC64SLDconst {
 12199  			break
 12200  		}
 12201  		if s4.AuxInt != 40 {
 12202  			break
 12203  		}
 12204  		x5 := s4.Args[0]
 12205  		if x5.Op != OpPPC64MOVBZload {
 12206  			break
 12207  		}
 12208  		i5 := x5.AuxInt
 12209  		if x5.Aux != s {
 12210  			break
 12211  		}
 12212  		_ = x5.Args[1]
 12213  		if p != x5.Args[0] {
 12214  			break
 12215  		}
 12216  		if mem != x5.Args[1] {
 12217  			break
 12218  		}
 12219  		o3 := o4.Args[1]
 12220  		if o3.Op != OpPPC64OR {
 12221  			break
 12222  		}
 12223  		if o3.Type != t {
 12224  			break
 12225  		}
 12226  		_ = o3.Args[1]
 12227  		o2 := o3.Args[0]
 12228  		if o2.Op != OpPPC64OR {
 12229  			break
 12230  		}
 12231  		if o2.Type != t {
 12232  			break
 12233  		}
 12234  		_ = o2.Args[1]
 12235  		s2 := o2.Args[0]
 12236  		if s2.Op != OpPPC64SLDconst {
 12237  			break
 12238  		}
 12239  		if s2.AuxInt != 24 {
 12240  			break
 12241  		}
 12242  		x3 := s2.Args[0]
 12243  		if x3.Op != OpPPC64MOVBZload {
 12244  			break
 12245  		}
 12246  		i3 := x3.AuxInt
 12247  		if x3.Aux != s {
 12248  			break
 12249  		}
 12250  		_ = x3.Args[1]
 12251  		if p != x3.Args[0] {
 12252  			break
 12253  		}
 12254  		if mem != x3.Args[1] {
 12255  			break
 12256  		}
 12257  		o1 := o2.Args[1]
 12258  		if o1.Op != OpPPC64OR {
 12259  			break
 12260  		}
 12261  		if o1.Type != t {
 12262  			break
 12263  		}
 12264  		_ = o1.Args[1]
 12265  		o0 := o1.Args[0]
 12266  		if o0.Op != OpPPC64OR {
 12267  			break
 12268  		}
 12269  		if o0.Type != t {
 12270  			break
 12271  		}
 12272  		_ = o0.Args[1]
 12273  		s0 := o0.Args[0]
 12274  		if s0.Op != OpPPC64SLDconst {
 12275  			break
 12276  		}
 12277  		if s0.AuxInt != 8 {
 12278  			break
 12279  		}
 12280  		x1 := s0.Args[0]
 12281  		if x1.Op != OpPPC64MOVBZload {
 12282  			break
 12283  		}
 12284  		i1 := x1.AuxInt
 12285  		if x1.Aux != s {
 12286  			break
 12287  		}
 12288  		_ = x1.Args[1]
 12289  		if p != x1.Args[0] {
 12290  			break
 12291  		}
 12292  		if mem != x1.Args[1] {
 12293  			break
 12294  		}
 12295  		x0 := o0.Args[1]
 12296  		if x0.Op != OpPPC64MOVBZload {
 12297  			break
 12298  		}
 12299  		i0 := x0.AuxInt
 12300  		if x0.Aux != s {
 12301  			break
 12302  		}
 12303  		_ = x0.Args[1]
 12304  		if p != x0.Args[0] {
 12305  			break
 12306  		}
 12307  		if mem != x0.Args[1] {
 12308  			break
 12309  		}
 12310  		s1 := o1.Args[1]
 12311  		if s1.Op != OpPPC64SLDconst {
 12312  			break
 12313  		}
 12314  		if s1.AuxInt != 16 {
 12315  			break
 12316  		}
 12317  		x2 := s1.Args[0]
 12318  		if x2.Op != OpPPC64MOVBZload {
 12319  			break
 12320  		}
 12321  		i2 := x2.AuxInt
 12322  		if x2.Aux != s {
 12323  			break
 12324  		}
 12325  		_ = x2.Args[1]
 12326  		if p != x2.Args[0] {
 12327  			break
 12328  		}
 12329  		if mem != x2.Args[1] {
 12330  			break
 12331  		}
 12332  		s3 := o3.Args[1]
 12333  		if s3.Op != OpPPC64SLDconst {
 12334  			break
 12335  		}
 12336  		if s3.AuxInt != 32 {
 12337  			break
 12338  		}
 12339  		x4 := s3.Args[0]
 12340  		if x4.Op != OpPPC64MOVBZload {
 12341  			break
 12342  		}
 12343  		i4 := x4.AuxInt
 12344  		if x4.Aux != s {
 12345  			break
 12346  		}
 12347  		_ = x4.Args[1]
 12348  		if p != x4.Args[0] {
 12349  			break
 12350  		}
 12351  		if mem != x4.Args[1] {
 12352  			break
 12353  		}
 12354  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12355  			break
 12356  		}
 12357  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12358  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12359  		v.reset(OpCopy)
 12360  		v.AddArg(v0)
 12361  		v0.AuxInt = i0
 12362  		v0.Aux = s
 12363  		v0.AddArg(p)
 12364  		v0.AddArg(mem)
 12365  		return true
 12366  	}
 12367  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12368  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12369  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12370  	for {
 12371  		t := v.Type
 12372  		_ = v.Args[1]
 12373  		s6 := v.Args[0]
 12374  		if s6.Op != OpPPC64SLDconst {
 12375  			break
 12376  		}
 12377  		if s6.AuxInt != 56 {
 12378  			break
 12379  		}
 12380  		x7 := s6.Args[0]
 12381  		if x7.Op != OpPPC64MOVBZload {
 12382  			break
 12383  		}
 12384  		i7 := x7.AuxInt
 12385  		s := x7.Aux
 12386  		_ = x7.Args[1]
 12387  		p := x7.Args[0]
 12388  		mem := x7.Args[1]
 12389  		o5 := v.Args[1]
 12390  		if o5.Op != OpPPC64OR {
 12391  			break
 12392  		}
 12393  		if o5.Type != t {
 12394  			break
 12395  		}
 12396  		_ = o5.Args[1]
 12397  		s5 := o5.Args[0]
 12398  		if s5.Op != OpPPC64SLDconst {
 12399  			break
 12400  		}
 12401  		if s5.AuxInt != 48 {
 12402  			break
 12403  		}
 12404  		x6 := s5.Args[0]
 12405  		if x6.Op != OpPPC64MOVBZload {
 12406  			break
 12407  		}
 12408  		i6 := x6.AuxInt
 12409  		if x6.Aux != s {
 12410  			break
 12411  		}
 12412  		_ = x6.Args[1]
 12413  		if p != x6.Args[0] {
 12414  			break
 12415  		}
 12416  		if mem != x6.Args[1] {
 12417  			break
 12418  		}
 12419  		o4 := o5.Args[1]
 12420  		if o4.Op != OpPPC64OR {
 12421  			break
 12422  		}
 12423  		if o4.Type != t {
 12424  			break
 12425  		}
 12426  		_ = o4.Args[1]
 12427  		s4 := o4.Args[0]
 12428  		if s4.Op != OpPPC64SLDconst {
 12429  			break
 12430  		}
 12431  		if s4.AuxInt != 40 {
 12432  			break
 12433  		}
 12434  		x5 := s4.Args[0]
 12435  		if x5.Op != OpPPC64MOVBZload {
 12436  			break
 12437  		}
 12438  		i5 := x5.AuxInt
 12439  		if x5.Aux != s {
 12440  			break
 12441  		}
 12442  		_ = x5.Args[1]
 12443  		if p != x5.Args[0] {
 12444  			break
 12445  		}
 12446  		if mem != x5.Args[1] {
 12447  			break
 12448  		}
 12449  		o3 := o4.Args[1]
 12450  		if o3.Op != OpPPC64OR {
 12451  			break
 12452  		}
 12453  		if o3.Type != t {
 12454  			break
 12455  		}
 12456  		_ = o3.Args[1]
 12457  		o2 := o3.Args[0]
 12458  		if o2.Op != OpPPC64OR {
 12459  			break
 12460  		}
 12461  		if o2.Type != t {
 12462  			break
 12463  		}
 12464  		_ = o2.Args[1]
 12465  		s2 := o2.Args[0]
 12466  		if s2.Op != OpPPC64SLDconst {
 12467  			break
 12468  		}
 12469  		if s2.AuxInt != 24 {
 12470  			break
 12471  		}
 12472  		x3 := s2.Args[0]
 12473  		if x3.Op != OpPPC64MOVBZload {
 12474  			break
 12475  		}
 12476  		i3 := x3.AuxInt
 12477  		if x3.Aux != s {
 12478  			break
 12479  		}
 12480  		_ = x3.Args[1]
 12481  		if p != x3.Args[0] {
 12482  			break
 12483  		}
 12484  		if mem != x3.Args[1] {
 12485  			break
 12486  		}
 12487  		o1 := o2.Args[1]
 12488  		if o1.Op != OpPPC64OR {
 12489  			break
 12490  		}
 12491  		if o1.Type != t {
 12492  			break
 12493  		}
 12494  		_ = o1.Args[1]
 12495  		o0 := o1.Args[0]
 12496  		if o0.Op != OpPPC64OR {
 12497  			break
 12498  		}
 12499  		if o0.Type != t {
 12500  			break
 12501  		}
 12502  		_ = o0.Args[1]
 12503  		x0 := o0.Args[0]
 12504  		if x0.Op != OpPPC64MOVBZload {
 12505  			break
 12506  		}
 12507  		i0 := x0.AuxInt
 12508  		if x0.Aux != s {
 12509  			break
 12510  		}
 12511  		_ = x0.Args[1]
 12512  		if p != x0.Args[0] {
 12513  			break
 12514  		}
 12515  		if mem != x0.Args[1] {
 12516  			break
 12517  		}
 12518  		s0 := o0.Args[1]
 12519  		if s0.Op != OpPPC64SLDconst {
 12520  			break
 12521  		}
 12522  		if s0.AuxInt != 8 {
 12523  			break
 12524  		}
 12525  		x1 := s0.Args[0]
 12526  		if x1.Op != OpPPC64MOVBZload {
 12527  			break
 12528  		}
 12529  		i1 := x1.AuxInt
 12530  		if x1.Aux != s {
 12531  			break
 12532  		}
 12533  		_ = x1.Args[1]
 12534  		if p != x1.Args[0] {
 12535  			break
 12536  		}
 12537  		if mem != x1.Args[1] {
 12538  			break
 12539  		}
 12540  		s1 := o1.Args[1]
 12541  		if s1.Op != OpPPC64SLDconst {
 12542  			break
 12543  		}
 12544  		if s1.AuxInt != 16 {
 12545  			break
 12546  		}
 12547  		x2 := s1.Args[0]
 12548  		if x2.Op != OpPPC64MOVBZload {
 12549  			break
 12550  		}
 12551  		i2 := x2.AuxInt
 12552  		if x2.Aux != s {
 12553  			break
 12554  		}
 12555  		_ = x2.Args[1]
 12556  		if p != x2.Args[0] {
 12557  			break
 12558  		}
 12559  		if mem != x2.Args[1] {
 12560  			break
 12561  		}
 12562  		s3 := o3.Args[1]
 12563  		if s3.Op != OpPPC64SLDconst {
 12564  			break
 12565  		}
 12566  		if s3.AuxInt != 32 {
 12567  			break
 12568  		}
 12569  		x4 := s3.Args[0]
 12570  		if x4.Op != OpPPC64MOVBZload {
 12571  			break
 12572  		}
 12573  		i4 := x4.AuxInt
 12574  		if x4.Aux != s {
 12575  			break
 12576  		}
 12577  		_ = x4.Args[1]
 12578  		if p != x4.Args[0] {
 12579  			break
 12580  		}
 12581  		if mem != x4.Args[1] {
 12582  			break
 12583  		}
 12584  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12585  			break
 12586  		}
 12587  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12588  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12589  		v.reset(OpCopy)
 12590  		v.AddArg(v0)
 12591  		v0.AuxInt = i0
 12592  		v0.Aux = s
 12593  		v0.AddArg(p)
 12594  		v0.AddArg(mem)
 12595  		return true
 12596  	}
 12597  	return false
 12598  }
 12599  func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
 12600  	b := v.Block
 12601  	_ = b
 12602  	config := b.Func.Config
 12603  	_ = config
 12604  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12605  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12606  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12607  	for {
 12608  		t := v.Type
 12609  		_ = v.Args[1]
 12610  		s6 := v.Args[0]
 12611  		if s6.Op != OpPPC64SLDconst {
 12612  			break
 12613  		}
 12614  		if s6.AuxInt != 56 {
 12615  			break
 12616  		}
 12617  		x7 := s6.Args[0]
 12618  		if x7.Op != OpPPC64MOVBZload {
 12619  			break
 12620  		}
 12621  		i7 := x7.AuxInt
 12622  		s := x7.Aux
 12623  		_ = x7.Args[1]
 12624  		p := x7.Args[0]
 12625  		mem := x7.Args[1]
 12626  		o5 := v.Args[1]
 12627  		if o5.Op != OpPPC64OR {
 12628  			break
 12629  		}
 12630  		if o5.Type != t {
 12631  			break
 12632  		}
 12633  		_ = o5.Args[1]
 12634  		s5 := o5.Args[0]
 12635  		if s5.Op != OpPPC64SLDconst {
 12636  			break
 12637  		}
 12638  		if s5.AuxInt != 48 {
 12639  			break
 12640  		}
 12641  		x6 := s5.Args[0]
 12642  		if x6.Op != OpPPC64MOVBZload {
 12643  			break
 12644  		}
 12645  		i6 := x6.AuxInt
 12646  		if x6.Aux != s {
 12647  			break
 12648  		}
 12649  		_ = x6.Args[1]
 12650  		if p != x6.Args[0] {
 12651  			break
 12652  		}
 12653  		if mem != x6.Args[1] {
 12654  			break
 12655  		}
 12656  		o4 := o5.Args[1]
 12657  		if o4.Op != OpPPC64OR {
 12658  			break
 12659  		}
 12660  		if o4.Type != t {
 12661  			break
 12662  		}
 12663  		_ = o4.Args[1]
 12664  		s4 := o4.Args[0]
 12665  		if s4.Op != OpPPC64SLDconst {
 12666  			break
 12667  		}
 12668  		if s4.AuxInt != 40 {
 12669  			break
 12670  		}
 12671  		x5 := s4.Args[0]
 12672  		if x5.Op != OpPPC64MOVBZload {
 12673  			break
 12674  		}
 12675  		i5 := x5.AuxInt
 12676  		if x5.Aux != s {
 12677  			break
 12678  		}
 12679  		_ = x5.Args[1]
 12680  		if p != x5.Args[0] {
 12681  			break
 12682  		}
 12683  		if mem != x5.Args[1] {
 12684  			break
 12685  		}
 12686  		o3 := o4.Args[1]
 12687  		if o3.Op != OpPPC64OR {
 12688  			break
 12689  		}
 12690  		if o3.Type != t {
 12691  			break
 12692  		}
 12693  		_ = o3.Args[1]
 12694  		o2 := o3.Args[0]
 12695  		if o2.Op != OpPPC64OR {
 12696  			break
 12697  		}
 12698  		if o2.Type != t {
 12699  			break
 12700  		}
 12701  		_ = o2.Args[1]
 12702  		o1 := o2.Args[0]
 12703  		if o1.Op != OpPPC64OR {
 12704  			break
 12705  		}
 12706  		if o1.Type != t {
 12707  			break
 12708  		}
 12709  		_ = o1.Args[1]
 12710  		s1 := o1.Args[0]
 12711  		if s1.Op != OpPPC64SLDconst {
 12712  			break
 12713  		}
 12714  		if s1.AuxInt != 16 {
 12715  			break
 12716  		}
 12717  		x2 := s1.Args[0]
 12718  		if x2.Op != OpPPC64MOVBZload {
 12719  			break
 12720  		}
 12721  		i2 := x2.AuxInt
 12722  		if x2.Aux != s {
 12723  			break
 12724  		}
 12725  		_ = x2.Args[1]
 12726  		if p != x2.Args[0] {
 12727  			break
 12728  		}
 12729  		if mem != x2.Args[1] {
 12730  			break
 12731  		}
 12732  		o0 := o1.Args[1]
 12733  		if o0.Op != OpPPC64OR {
 12734  			break
 12735  		}
 12736  		if o0.Type != t {
 12737  			break
 12738  		}
 12739  		_ = o0.Args[1]
 12740  		s0 := o0.Args[0]
 12741  		if s0.Op != OpPPC64SLDconst {
 12742  			break
 12743  		}
 12744  		if s0.AuxInt != 8 {
 12745  			break
 12746  		}
 12747  		x1 := s0.Args[0]
 12748  		if x1.Op != OpPPC64MOVBZload {
 12749  			break
 12750  		}
 12751  		i1 := x1.AuxInt
 12752  		if x1.Aux != s {
 12753  			break
 12754  		}
 12755  		_ = x1.Args[1]
 12756  		if p != x1.Args[0] {
 12757  			break
 12758  		}
 12759  		if mem != x1.Args[1] {
 12760  			break
 12761  		}
 12762  		x0 := o0.Args[1]
 12763  		if x0.Op != OpPPC64MOVBZload {
 12764  			break
 12765  		}
 12766  		i0 := x0.AuxInt
 12767  		if x0.Aux != s {
 12768  			break
 12769  		}
 12770  		_ = x0.Args[1]
 12771  		if p != x0.Args[0] {
 12772  			break
 12773  		}
 12774  		if mem != x0.Args[1] {
 12775  			break
 12776  		}
 12777  		s2 := o2.Args[1]
 12778  		if s2.Op != OpPPC64SLDconst {
 12779  			break
 12780  		}
 12781  		if s2.AuxInt != 24 {
 12782  			break
 12783  		}
 12784  		x3 := s2.Args[0]
 12785  		if x3.Op != OpPPC64MOVBZload {
 12786  			break
 12787  		}
 12788  		i3 := x3.AuxInt
 12789  		if x3.Aux != s {
 12790  			break
 12791  		}
 12792  		_ = x3.Args[1]
 12793  		if p != x3.Args[0] {
 12794  			break
 12795  		}
 12796  		if mem != x3.Args[1] {
 12797  			break
 12798  		}
 12799  		s3 := o3.Args[1]
 12800  		if s3.Op != OpPPC64SLDconst {
 12801  			break
 12802  		}
 12803  		if s3.AuxInt != 32 {
 12804  			break
 12805  		}
 12806  		x4 := s3.Args[0]
 12807  		if x4.Op != OpPPC64MOVBZload {
 12808  			break
 12809  		}
 12810  		i4 := x4.AuxInt
 12811  		if x4.Aux != s {
 12812  			break
 12813  		}
 12814  		_ = x4.Args[1]
 12815  		if p != x4.Args[0] {
 12816  			break
 12817  		}
 12818  		if mem != x4.Args[1] {
 12819  			break
 12820  		}
 12821  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12822  			break
 12823  		}
 12824  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12825  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12826  		v.reset(OpCopy)
 12827  		v.AddArg(v0)
 12828  		v0.AuxInt = i0
 12829  		v0.Aux = s
 12830  		v0.AddArg(p)
 12831  		v0.AddArg(mem)
 12832  		return true
 12833  	}
 12834  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12835  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12836  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12837  	for {
 12838  		t := v.Type
 12839  		_ = v.Args[1]
 12840  		s6 := v.Args[0]
 12841  		if s6.Op != OpPPC64SLDconst {
 12842  			break
 12843  		}
 12844  		if s6.AuxInt != 56 {
 12845  			break
 12846  		}
 12847  		x7 := s6.Args[0]
 12848  		if x7.Op != OpPPC64MOVBZload {
 12849  			break
 12850  		}
 12851  		i7 := x7.AuxInt
 12852  		s := x7.Aux
 12853  		_ = x7.Args[1]
 12854  		p := x7.Args[0]
 12855  		mem := x7.Args[1]
 12856  		o5 := v.Args[1]
 12857  		if o5.Op != OpPPC64OR {
 12858  			break
 12859  		}
 12860  		if o5.Type != t {
 12861  			break
 12862  		}
 12863  		_ = o5.Args[1]
 12864  		s5 := o5.Args[0]
 12865  		if s5.Op != OpPPC64SLDconst {
 12866  			break
 12867  		}
 12868  		if s5.AuxInt != 48 {
 12869  			break
 12870  		}
 12871  		x6 := s5.Args[0]
 12872  		if x6.Op != OpPPC64MOVBZload {
 12873  			break
 12874  		}
 12875  		i6 := x6.AuxInt
 12876  		if x6.Aux != s {
 12877  			break
 12878  		}
 12879  		_ = x6.Args[1]
 12880  		if p != x6.Args[0] {
 12881  			break
 12882  		}
 12883  		if mem != x6.Args[1] {
 12884  			break
 12885  		}
 12886  		o4 := o5.Args[1]
 12887  		if o4.Op != OpPPC64OR {
 12888  			break
 12889  		}
 12890  		if o4.Type != t {
 12891  			break
 12892  		}
 12893  		_ = o4.Args[1]
 12894  		s4 := o4.Args[0]
 12895  		if s4.Op != OpPPC64SLDconst {
 12896  			break
 12897  		}
 12898  		if s4.AuxInt != 40 {
 12899  			break
 12900  		}
 12901  		x5 := s4.Args[0]
 12902  		if x5.Op != OpPPC64MOVBZload {
 12903  			break
 12904  		}
 12905  		i5 := x5.AuxInt
 12906  		if x5.Aux != s {
 12907  			break
 12908  		}
 12909  		_ = x5.Args[1]
 12910  		if p != x5.Args[0] {
 12911  			break
 12912  		}
 12913  		if mem != x5.Args[1] {
 12914  			break
 12915  		}
 12916  		o3 := o4.Args[1]
 12917  		if o3.Op != OpPPC64OR {
 12918  			break
 12919  		}
 12920  		if o3.Type != t {
 12921  			break
 12922  		}
 12923  		_ = o3.Args[1]
 12924  		o2 := o3.Args[0]
 12925  		if o2.Op != OpPPC64OR {
 12926  			break
 12927  		}
 12928  		if o2.Type != t {
 12929  			break
 12930  		}
 12931  		_ = o2.Args[1]
 12932  		o1 := o2.Args[0]
 12933  		if o1.Op != OpPPC64OR {
 12934  			break
 12935  		}
 12936  		if o1.Type != t {
 12937  			break
 12938  		}
 12939  		_ = o1.Args[1]
 12940  		s1 := o1.Args[0]
 12941  		if s1.Op != OpPPC64SLDconst {
 12942  			break
 12943  		}
 12944  		if s1.AuxInt != 16 {
 12945  			break
 12946  		}
 12947  		x2 := s1.Args[0]
 12948  		if x2.Op != OpPPC64MOVBZload {
 12949  			break
 12950  		}
 12951  		i2 := x2.AuxInt
 12952  		if x2.Aux != s {
 12953  			break
 12954  		}
 12955  		_ = x2.Args[1]
 12956  		if p != x2.Args[0] {
 12957  			break
 12958  		}
 12959  		if mem != x2.Args[1] {
 12960  			break
 12961  		}
 12962  		o0 := o1.Args[1]
 12963  		if o0.Op != OpPPC64OR {
 12964  			break
 12965  		}
 12966  		if o0.Type != t {
 12967  			break
 12968  		}
 12969  		_ = o0.Args[1]
 12970  		x0 := o0.Args[0]
 12971  		if x0.Op != OpPPC64MOVBZload {
 12972  			break
 12973  		}
 12974  		i0 := x0.AuxInt
 12975  		if x0.Aux != s {
 12976  			break
 12977  		}
 12978  		_ = x0.Args[1]
 12979  		if p != x0.Args[0] {
 12980  			break
 12981  		}
 12982  		if mem != x0.Args[1] {
 12983  			break
 12984  		}
 12985  		s0 := o0.Args[1]
 12986  		if s0.Op != OpPPC64SLDconst {
 12987  			break
 12988  		}
 12989  		if s0.AuxInt != 8 {
 12990  			break
 12991  		}
 12992  		x1 := s0.Args[0]
 12993  		if x1.Op != OpPPC64MOVBZload {
 12994  			break
 12995  		}
 12996  		i1 := x1.AuxInt
 12997  		if x1.Aux != s {
 12998  			break
 12999  		}
 13000  		_ = x1.Args[1]
 13001  		if p != x1.Args[0] {
 13002  			break
 13003  		}
 13004  		if mem != x1.Args[1] {
 13005  			break
 13006  		}
 13007  		s2 := o2.Args[1]
 13008  		if s2.Op != OpPPC64SLDconst {
 13009  			break
 13010  		}
 13011  		if s2.AuxInt != 24 {
 13012  			break
 13013  		}
 13014  		x3 := s2.Args[0]
 13015  		if x3.Op != OpPPC64MOVBZload {
 13016  			break
 13017  		}
 13018  		i3 := x3.AuxInt
 13019  		if x3.Aux != s {
 13020  			break
 13021  		}
 13022  		_ = x3.Args[1]
 13023  		if p != x3.Args[0] {
 13024  			break
 13025  		}
 13026  		if mem != x3.Args[1] {
 13027  			break
 13028  		}
 13029  		s3 := o3.Args[1]
 13030  		if s3.Op != OpPPC64SLDconst {
 13031  			break
 13032  		}
 13033  		if s3.AuxInt != 32 {
 13034  			break
 13035  		}
 13036  		x4 := s3.Args[0]
 13037  		if x4.Op != OpPPC64MOVBZload {
 13038  			break
 13039  		}
 13040  		i4 := x4.AuxInt
 13041  		if x4.Aux != s {
 13042  			break
 13043  		}
 13044  		_ = x4.Args[1]
 13045  		if p != x4.Args[0] {
 13046  			break
 13047  		}
 13048  		if mem != x4.Args[1] {
 13049  			break
 13050  		}
 13051  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13052  			break
 13053  		}
 13054  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13055  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13056  		v.reset(OpCopy)
 13057  		v.AddArg(v0)
 13058  		v0.AuxInt = i0
 13059  		v0.Aux = s
 13060  		v0.AddArg(p)
 13061  		v0.AddArg(mem)
 13062  		return true
 13063  	}
 13064  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 13065  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13066  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13067  	for {
 13068  		t := v.Type
 13069  		_ = v.Args[1]
 13070  		s6 := v.Args[0]
 13071  		if s6.Op != OpPPC64SLDconst {
 13072  			break
 13073  		}
 13074  		if s6.AuxInt != 56 {
 13075  			break
 13076  		}
 13077  		x7 := s6.Args[0]
 13078  		if x7.Op != OpPPC64MOVBZload {
 13079  			break
 13080  		}
 13081  		i7 := x7.AuxInt
 13082  		s := x7.Aux
 13083  		_ = x7.Args[1]
 13084  		p := x7.Args[0]
 13085  		mem := x7.Args[1]
 13086  		o5 := v.Args[1]
 13087  		if o5.Op != OpPPC64OR {
 13088  			break
 13089  		}
 13090  		if o5.Type != t {
 13091  			break
 13092  		}
 13093  		_ = o5.Args[1]
 13094  		s5 := o5.Args[0]
 13095  		if s5.Op != OpPPC64SLDconst {
 13096  			break
 13097  		}
 13098  		if s5.AuxInt != 48 {
 13099  			break
 13100  		}
 13101  		x6 := s5.Args[0]
 13102  		if x6.Op != OpPPC64MOVBZload {
 13103  			break
 13104  		}
 13105  		i6 := x6.AuxInt
 13106  		if x6.Aux != s {
 13107  			break
 13108  		}
 13109  		_ = x6.Args[1]
 13110  		if p != x6.Args[0] {
 13111  			break
 13112  		}
 13113  		if mem != x6.Args[1] {
 13114  			break
 13115  		}
 13116  		o4 := o5.Args[1]
 13117  		if o4.Op != OpPPC64OR {
 13118  			break
 13119  		}
 13120  		if o4.Type != t {
 13121  			break
 13122  		}
 13123  		_ = o4.Args[1]
 13124  		s4 := o4.Args[0]
 13125  		if s4.Op != OpPPC64SLDconst {
 13126  			break
 13127  		}
 13128  		if s4.AuxInt != 40 {
 13129  			break
 13130  		}
 13131  		x5 := s4.Args[0]
 13132  		if x5.Op != OpPPC64MOVBZload {
 13133  			break
 13134  		}
 13135  		i5 := x5.AuxInt
 13136  		if x5.Aux != s {
 13137  			break
 13138  		}
 13139  		_ = x5.Args[1]
 13140  		if p != x5.Args[0] {
 13141  			break
 13142  		}
 13143  		if mem != x5.Args[1] {
 13144  			break
 13145  		}
 13146  		o3 := o4.Args[1]
 13147  		if o3.Op != OpPPC64OR {
 13148  			break
 13149  		}
 13150  		if o3.Type != t {
 13151  			break
 13152  		}
 13153  		_ = o3.Args[1]
 13154  		o2 := o3.Args[0]
 13155  		if o2.Op != OpPPC64OR {
 13156  			break
 13157  		}
 13158  		if o2.Type != t {
 13159  			break
 13160  		}
 13161  		_ = o2.Args[1]
 13162  		o1 := o2.Args[0]
 13163  		if o1.Op != OpPPC64OR {
 13164  			break
 13165  		}
 13166  		if o1.Type != t {
 13167  			break
 13168  		}
 13169  		_ = o1.Args[1]
 13170  		o0 := o1.Args[0]
 13171  		if o0.Op != OpPPC64OR {
 13172  			break
 13173  		}
 13174  		if o0.Type != t {
 13175  			break
 13176  		}
 13177  		_ = o0.Args[1]
 13178  		s0 := o0.Args[0]
 13179  		if s0.Op != OpPPC64SLDconst {
 13180  			break
 13181  		}
 13182  		if s0.AuxInt != 8 {
 13183  			break
 13184  		}
 13185  		x1 := s0.Args[0]
 13186  		if x1.Op != OpPPC64MOVBZload {
 13187  			break
 13188  		}
 13189  		i1 := x1.AuxInt
 13190  		if x1.Aux != s {
 13191  			break
 13192  		}
 13193  		_ = x1.Args[1]
 13194  		if p != x1.Args[0] {
 13195  			break
 13196  		}
 13197  		if mem != x1.Args[1] {
 13198  			break
 13199  		}
 13200  		x0 := o0.Args[1]
 13201  		if x0.Op != OpPPC64MOVBZload {
 13202  			break
 13203  		}
 13204  		i0 := x0.AuxInt
 13205  		if x0.Aux != s {
 13206  			break
 13207  		}
 13208  		_ = x0.Args[1]
 13209  		if p != x0.Args[0] {
 13210  			break
 13211  		}
 13212  		if mem != x0.Args[1] {
 13213  			break
 13214  		}
 13215  		s1 := o1.Args[1]
 13216  		if s1.Op != OpPPC64SLDconst {
 13217  			break
 13218  		}
 13219  		if s1.AuxInt != 16 {
 13220  			break
 13221  		}
 13222  		x2 := s1.Args[0]
 13223  		if x2.Op != OpPPC64MOVBZload {
 13224  			break
 13225  		}
 13226  		i2 := x2.AuxInt
 13227  		if x2.Aux != s {
 13228  			break
 13229  		}
 13230  		_ = x2.Args[1]
 13231  		if p != x2.Args[0] {
 13232  			break
 13233  		}
 13234  		if mem != x2.Args[1] {
 13235  			break
 13236  		}
 13237  		s2 := o2.Args[1]
 13238  		if s2.Op != OpPPC64SLDconst {
 13239  			break
 13240  		}
 13241  		if s2.AuxInt != 24 {
 13242  			break
 13243  		}
 13244  		x3 := s2.Args[0]
 13245  		if x3.Op != OpPPC64MOVBZload {
 13246  			break
 13247  		}
 13248  		i3 := x3.AuxInt
 13249  		if x3.Aux != s {
 13250  			break
 13251  		}
 13252  		_ = x3.Args[1]
 13253  		if p != x3.Args[0] {
 13254  			break
 13255  		}
 13256  		if mem != x3.Args[1] {
 13257  			break
 13258  		}
 13259  		s3 := o3.Args[1]
 13260  		if s3.Op != OpPPC64SLDconst {
 13261  			break
 13262  		}
 13263  		if s3.AuxInt != 32 {
 13264  			break
 13265  		}
 13266  		x4 := s3.Args[0]
 13267  		if x4.Op != OpPPC64MOVBZload {
 13268  			break
 13269  		}
 13270  		i4 := x4.AuxInt
 13271  		if x4.Aux != s {
 13272  			break
 13273  		}
 13274  		_ = x4.Args[1]
 13275  		if p != x4.Args[0] {
 13276  			break
 13277  		}
 13278  		if mem != x4.Args[1] {
 13279  			break
 13280  		}
 13281  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13282  			break
 13283  		}
 13284  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13285  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13286  		v.reset(OpCopy)
 13287  		v.AddArg(v0)
 13288  		v0.AuxInt = i0
 13289  		v0.Aux = s
 13290  		v0.AddArg(p)
 13291  		v0.AddArg(mem)
 13292  		return true
 13293  	}
 13294  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 13295  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13296  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13297  	for {
 13298  		t := v.Type
 13299  		_ = v.Args[1]
 13300  		s6 := v.Args[0]
 13301  		if s6.Op != OpPPC64SLDconst {
 13302  			break
 13303  		}
 13304  		if s6.AuxInt != 56 {
 13305  			break
 13306  		}
 13307  		x7 := s6.Args[0]
 13308  		if x7.Op != OpPPC64MOVBZload {
 13309  			break
 13310  		}
 13311  		i7 := x7.AuxInt
 13312  		s := x7.Aux
 13313  		_ = x7.Args[1]
 13314  		p := x7.Args[0]
 13315  		mem := x7.Args[1]
 13316  		o5 := v.Args[1]
 13317  		if o5.Op != OpPPC64OR {
 13318  			break
 13319  		}
 13320  		if o5.Type != t {
 13321  			break
 13322  		}
 13323  		_ = o5.Args[1]
 13324  		s5 := o5.Args[0]
 13325  		if s5.Op != OpPPC64SLDconst {
 13326  			break
 13327  		}
 13328  		if s5.AuxInt != 48 {
 13329  			break
 13330  		}
 13331  		x6 := s5.Args[0]
 13332  		if x6.Op != OpPPC64MOVBZload {
 13333  			break
 13334  		}
 13335  		i6 := x6.AuxInt
 13336  		if x6.Aux != s {
 13337  			break
 13338  		}
 13339  		_ = x6.Args[1]
 13340  		if p != x6.Args[0] {
 13341  			break
 13342  		}
 13343  		if mem != x6.Args[1] {
 13344  			break
 13345  		}
 13346  		o4 := o5.Args[1]
 13347  		if o4.Op != OpPPC64OR {
 13348  			break
 13349  		}
 13350  		if o4.Type != t {
 13351  			break
 13352  		}
 13353  		_ = o4.Args[1]
 13354  		s4 := o4.Args[0]
 13355  		if s4.Op != OpPPC64SLDconst {
 13356  			break
 13357  		}
 13358  		if s4.AuxInt != 40 {
 13359  			break
 13360  		}
 13361  		x5 := s4.Args[0]
 13362  		if x5.Op != OpPPC64MOVBZload {
 13363  			break
 13364  		}
 13365  		i5 := x5.AuxInt
 13366  		if x5.Aux != s {
 13367  			break
 13368  		}
 13369  		_ = x5.Args[1]
 13370  		if p != x5.Args[0] {
 13371  			break
 13372  		}
 13373  		if mem != x5.Args[1] {
 13374  			break
 13375  		}
 13376  		o3 := o4.Args[1]
 13377  		if o3.Op != OpPPC64OR {
 13378  			break
 13379  		}
 13380  		if o3.Type != t {
 13381  			break
 13382  		}
 13383  		_ = o3.Args[1]
 13384  		o2 := o3.Args[0]
 13385  		if o2.Op != OpPPC64OR {
 13386  			break
 13387  		}
 13388  		if o2.Type != t {
 13389  			break
 13390  		}
 13391  		_ = o2.Args[1]
 13392  		o1 := o2.Args[0]
 13393  		if o1.Op != OpPPC64OR {
 13394  			break
 13395  		}
 13396  		if o1.Type != t {
 13397  			break
 13398  		}
 13399  		_ = o1.Args[1]
 13400  		o0 := o1.Args[0]
 13401  		if o0.Op != OpPPC64OR {
 13402  			break
 13403  		}
 13404  		if o0.Type != t {
 13405  			break
 13406  		}
 13407  		_ = o0.Args[1]
 13408  		x0 := o0.Args[0]
 13409  		if x0.Op != OpPPC64MOVBZload {
 13410  			break
 13411  		}
 13412  		i0 := x0.AuxInt
 13413  		if x0.Aux != s {
 13414  			break
 13415  		}
 13416  		_ = x0.Args[1]
 13417  		if p != x0.Args[0] {
 13418  			break
 13419  		}
 13420  		if mem != x0.Args[1] {
 13421  			break
 13422  		}
 13423  		s0 := o0.Args[1]
 13424  		if s0.Op != OpPPC64SLDconst {
 13425  			break
 13426  		}
 13427  		if s0.AuxInt != 8 {
 13428  			break
 13429  		}
 13430  		x1 := s0.Args[0]
 13431  		if x1.Op != OpPPC64MOVBZload {
 13432  			break
 13433  		}
 13434  		i1 := x1.AuxInt
 13435  		if x1.Aux != s {
 13436  			break
 13437  		}
 13438  		_ = x1.Args[1]
 13439  		if p != x1.Args[0] {
 13440  			break
 13441  		}
 13442  		if mem != x1.Args[1] {
 13443  			break
 13444  		}
 13445  		s1 := o1.Args[1]
 13446  		if s1.Op != OpPPC64SLDconst {
 13447  			break
 13448  		}
 13449  		if s1.AuxInt != 16 {
 13450  			break
 13451  		}
 13452  		x2 := s1.Args[0]
 13453  		if x2.Op != OpPPC64MOVBZload {
 13454  			break
 13455  		}
 13456  		i2 := x2.AuxInt
 13457  		if x2.Aux != s {
 13458  			break
 13459  		}
 13460  		_ = x2.Args[1]
 13461  		if p != x2.Args[0] {
 13462  			break
 13463  		}
 13464  		if mem != x2.Args[1] {
 13465  			break
 13466  		}
 13467  		s2 := o2.Args[1]
 13468  		if s2.Op != OpPPC64SLDconst {
 13469  			break
 13470  		}
 13471  		if s2.AuxInt != 24 {
 13472  			break
 13473  		}
 13474  		x3 := s2.Args[0]
 13475  		if x3.Op != OpPPC64MOVBZload {
 13476  			break
 13477  		}
 13478  		i3 := x3.AuxInt
 13479  		if x3.Aux != s {
 13480  			break
 13481  		}
 13482  		_ = x3.Args[1]
 13483  		if p != x3.Args[0] {
 13484  			break
 13485  		}
 13486  		if mem != x3.Args[1] {
 13487  			break
 13488  		}
 13489  		s3 := o3.Args[1]
 13490  		if s3.Op != OpPPC64SLDconst {
 13491  			break
 13492  		}
 13493  		if s3.AuxInt != 32 {
 13494  			break
 13495  		}
 13496  		x4 := s3.Args[0]
 13497  		if x4.Op != OpPPC64MOVBZload {
 13498  			break
 13499  		}
 13500  		i4 := x4.AuxInt
 13501  		if x4.Aux != s {
 13502  			break
 13503  		}
 13504  		_ = x4.Args[1]
 13505  		if p != x4.Args[0] {
 13506  			break
 13507  		}
 13508  		if mem != x4.Args[1] {
 13509  			break
 13510  		}
 13511  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13512  			break
 13513  		}
 13514  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13515  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13516  		v.reset(OpCopy)
 13517  		v.AddArg(v0)
 13518  		v0.AuxInt = i0
 13519  		v0.Aux = s
 13520  		v0.AddArg(p)
 13521  		v0.AddArg(mem)
 13522  		return true
 13523  	}
 13524  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13525  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13526  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13527  	for {
 13528  		t := v.Type
 13529  		_ = v.Args[1]
 13530  		s6 := v.Args[0]
 13531  		if s6.Op != OpPPC64SLDconst {
 13532  			break
 13533  		}
 13534  		if s6.AuxInt != 56 {
 13535  			break
 13536  		}
 13537  		x7 := s6.Args[0]
 13538  		if x7.Op != OpPPC64MOVBZload {
 13539  			break
 13540  		}
 13541  		i7 := x7.AuxInt
 13542  		s := x7.Aux
 13543  		_ = x7.Args[1]
 13544  		p := x7.Args[0]
 13545  		mem := x7.Args[1]
 13546  		o5 := v.Args[1]
 13547  		if o5.Op != OpPPC64OR {
 13548  			break
 13549  		}
 13550  		if o5.Type != t {
 13551  			break
 13552  		}
 13553  		_ = o5.Args[1]
 13554  		s5 := o5.Args[0]
 13555  		if s5.Op != OpPPC64SLDconst {
 13556  			break
 13557  		}
 13558  		if s5.AuxInt != 48 {
 13559  			break
 13560  		}
 13561  		x6 := s5.Args[0]
 13562  		if x6.Op != OpPPC64MOVBZload {
 13563  			break
 13564  		}
 13565  		i6 := x6.AuxInt
 13566  		if x6.Aux != s {
 13567  			break
 13568  		}
 13569  		_ = x6.Args[1]
 13570  		if p != x6.Args[0] {
 13571  			break
 13572  		}
 13573  		if mem != x6.Args[1] {
 13574  			break
 13575  		}
 13576  		o4 := o5.Args[1]
 13577  		if o4.Op != OpPPC64OR {
 13578  			break
 13579  		}
 13580  		if o4.Type != t {
 13581  			break
 13582  		}
 13583  		_ = o4.Args[1]
 13584  		o3 := o4.Args[0]
 13585  		if o3.Op != OpPPC64OR {
 13586  			break
 13587  		}
 13588  		if o3.Type != t {
 13589  			break
 13590  		}
 13591  		_ = o3.Args[1]
 13592  		s3 := o3.Args[0]
 13593  		if s3.Op != OpPPC64SLDconst {
 13594  			break
 13595  		}
 13596  		if s3.AuxInt != 32 {
 13597  			break
 13598  		}
 13599  		x4 := s3.Args[0]
 13600  		if x4.Op != OpPPC64MOVBZload {
 13601  			break
 13602  		}
 13603  		i4 := x4.AuxInt
 13604  		if x4.Aux != s {
 13605  			break
 13606  		}
 13607  		_ = x4.Args[1]
 13608  		if p != x4.Args[0] {
 13609  			break
 13610  		}
 13611  		if mem != x4.Args[1] {
 13612  			break
 13613  		}
 13614  		o2 := o3.Args[1]
 13615  		if o2.Op != OpPPC64OR {
 13616  			break
 13617  		}
 13618  		if o2.Type != t {
 13619  			break
 13620  		}
 13621  		_ = o2.Args[1]
 13622  		s2 := o2.Args[0]
 13623  		if s2.Op != OpPPC64SLDconst {
 13624  			break
 13625  		}
 13626  		if s2.AuxInt != 24 {
 13627  			break
 13628  		}
 13629  		x3 := s2.Args[0]
 13630  		if x3.Op != OpPPC64MOVBZload {
 13631  			break
 13632  		}
 13633  		i3 := x3.AuxInt
 13634  		if x3.Aux != s {
 13635  			break
 13636  		}
 13637  		_ = x3.Args[1]
 13638  		if p != x3.Args[0] {
 13639  			break
 13640  		}
 13641  		if mem != x3.Args[1] {
 13642  			break
 13643  		}
 13644  		o1 := o2.Args[1]
 13645  		if o1.Op != OpPPC64OR {
 13646  			break
 13647  		}
 13648  		if o1.Type != t {
 13649  			break
 13650  		}
 13651  		_ = o1.Args[1]
 13652  		s1 := o1.Args[0]
 13653  		if s1.Op != OpPPC64SLDconst {
 13654  			break
 13655  		}
 13656  		if s1.AuxInt != 16 {
 13657  			break
 13658  		}
 13659  		x2 := s1.Args[0]
 13660  		if x2.Op != OpPPC64MOVBZload {
 13661  			break
 13662  		}
 13663  		i2 := x2.AuxInt
 13664  		if x2.Aux != s {
 13665  			break
 13666  		}
 13667  		_ = x2.Args[1]
 13668  		if p != x2.Args[0] {
 13669  			break
 13670  		}
 13671  		if mem != x2.Args[1] {
 13672  			break
 13673  		}
 13674  		o0 := o1.Args[1]
 13675  		if o0.Op != OpPPC64OR {
 13676  			break
 13677  		}
 13678  		if o0.Type != t {
 13679  			break
 13680  		}
 13681  		_ = o0.Args[1]
 13682  		s0 := o0.Args[0]
 13683  		if s0.Op != OpPPC64SLDconst {
 13684  			break
 13685  		}
 13686  		if s0.AuxInt != 8 {
 13687  			break
 13688  		}
 13689  		x1 := s0.Args[0]
 13690  		if x1.Op != OpPPC64MOVBZload {
 13691  			break
 13692  		}
 13693  		i1 := x1.AuxInt
 13694  		if x1.Aux != s {
 13695  			break
 13696  		}
 13697  		_ = x1.Args[1]
 13698  		if p != x1.Args[0] {
 13699  			break
 13700  		}
 13701  		if mem != x1.Args[1] {
 13702  			break
 13703  		}
 13704  		x0 := o0.Args[1]
 13705  		if x0.Op != OpPPC64MOVBZload {
 13706  			break
 13707  		}
 13708  		i0 := x0.AuxInt
 13709  		if x0.Aux != s {
 13710  			break
 13711  		}
 13712  		_ = x0.Args[1]
 13713  		if p != x0.Args[0] {
 13714  			break
 13715  		}
 13716  		if mem != x0.Args[1] {
 13717  			break
 13718  		}
 13719  		s4 := o4.Args[1]
 13720  		if s4.Op != OpPPC64SLDconst {
 13721  			break
 13722  		}
 13723  		if s4.AuxInt != 40 {
 13724  			break
 13725  		}
 13726  		x5 := s4.Args[0]
 13727  		if x5.Op != OpPPC64MOVBZload {
 13728  			break
 13729  		}
 13730  		i5 := x5.AuxInt
 13731  		if x5.Aux != s {
 13732  			break
 13733  		}
 13734  		_ = x5.Args[1]
 13735  		if p != x5.Args[0] {
 13736  			break
 13737  		}
 13738  		if mem != x5.Args[1] {
 13739  			break
 13740  		}
 13741  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13742  			break
 13743  		}
 13744  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13745  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13746  		v.reset(OpCopy)
 13747  		v.AddArg(v0)
 13748  		v0.AuxInt = i0
 13749  		v0.Aux = s
 13750  		v0.AddArg(p)
 13751  		v0.AddArg(mem)
 13752  		return true
 13753  	}
 13754  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13755  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13756  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13757  	for {
 13758  		t := v.Type
 13759  		_ = v.Args[1]
 13760  		s6 := v.Args[0]
 13761  		if s6.Op != OpPPC64SLDconst {
 13762  			break
 13763  		}
 13764  		if s6.AuxInt != 56 {
 13765  			break
 13766  		}
 13767  		x7 := s6.Args[0]
 13768  		if x7.Op != OpPPC64MOVBZload {
 13769  			break
 13770  		}
 13771  		i7 := x7.AuxInt
 13772  		s := x7.Aux
 13773  		_ = x7.Args[1]
 13774  		p := x7.Args[0]
 13775  		mem := x7.Args[1]
 13776  		o5 := v.Args[1]
 13777  		if o5.Op != OpPPC64OR {
 13778  			break
 13779  		}
 13780  		if o5.Type != t {
 13781  			break
 13782  		}
 13783  		_ = o5.Args[1]
 13784  		s5 := o5.Args[0]
 13785  		if s5.Op != OpPPC64SLDconst {
 13786  			break
 13787  		}
 13788  		if s5.AuxInt != 48 {
 13789  			break
 13790  		}
 13791  		x6 := s5.Args[0]
 13792  		if x6.Op != OpPPC64MOVBZload {
 13793  			break
 13794  		}
 13795  		i6 := x6.AuxInt
 13796  		if x6.Aux != s {
 13797  			break
 13798  		}
 13799  		_ = x6.Args[1]
 13800  		if p != x6.Args[0] {
 13801  			break
 13802  		}
 13803  		if mem != x6.Args[1] {
 13804  			break
 13805  		}
 13806  		o4 := o5.Args[1]
 13807  		if o4.Op != OpPPC64OR {
 13808  			break
 13809  		}
 13810  		if o4.Type != t {
 13811  			break
 13812  		}
 13813  		_ = o4.Args[1]
 13814  		o3 := o4.Args[0]
 13815  		if o3.Op != OpPPC64OR {
 13816  			break
 13817  		}
 13818  		if o3.Type != t {
 13819  			break
 13820  		}
 13821  		_ = o3.Args[1]
 13822  		s3 := o3.Args[0]
 13823  		if s3.Op != OpPPC64SLDconst {
 13824  			break
 13825  		}
 13826  		if s3.AuxInt != 32 {
 13827  			break
 13828  		}
 13829  		x4 := s3.Args[0]
 13830  		if x4.Op != OpPPC64MOVBZload {
 13831  			break
 13832  		}
 13833  		i4 := x4.AuxInt
 13834  		if x4.Aux != s {
 13835  			break
 13836  		}
 13837  		_ = x4.Args[1]
 13838  		if p != x4.Args[0] {
 13839  			break
 13840  		}
 13841  		if mem != x4.Args[1] {
 13842  			break
 13843  		}
 13844  		o2 := o3.Args[1]
 13845  		if o2.Op != OpPPC64OR {
 13846  			break
 13847  		}
 13848  		if o2.Type != t {
 13849  			break
 13850  		}
 13851  		_ = o2.Args[1]
 13852  		s2 := o2.Args[0]
 13853  		if s2.Op != OpPPC64SLDconst {
 13854  			break
 13855  		}
 13856  		if s2.AuxInt != 24 {
 13857  			break
 13858  		}
 13859  		x3 := s2.Args[0]
 13860  		if x3.Op != OpPPC64MOVBZload {
 13861  			break
 13862  		}
 13863  		i3 := x3.AuxInt
 13864  		if x3.Aux != s {
 13865  			break
 13866  		}
 13867  		_ = x3.Args[1]
 13868  		if p != x3.Args[0] {
 13869  			break
 13870  		}
 13871  		if mem != x3.Args[1] {
 13872  			break
 13873  		}
 13874  		o1 := o2.Args[1]
 13875  		if o1.Op != OpPPC64OR {
 13876  			break
 13877  		}
 13878  		if o1.Type != t {
 13879  			break
 13880  		}
 13881  		_ = o1.Args[1]
 13882  		s1 := o1.Args[0]
 13883  		if s1.Op != OpPPC64SLDconst {
 13884  			break
 13885  		}
 13886  		if s1.AuxInt != 16 {
 13887  			break
 13888  		}
 13889  		x2 := s1.Args[0]
 13890  		if x2.Op != OpPPC64MOVBZload {
 13891  			break
 13892  		}
 13893  		i2 := x2.AuxInt
 13894  		if x2.Aux != s {
 13895  			break
 13896  		}
 13897  		_ = x2.Args[1]
 13898  		if p != x2.Args[0] {
 13899  			break
 13900  		}
 13901  		if mem != x2.Args[1] {
 13902  			break
 13903  		}
 13904  		o0 := o1.Args[1]
 13905  		if o0.Op != OpPPC64OR {
 13906  			break
 13907  		}
 13908  		if o0.Type != t {
 13909  			break
 13910  		}
 13911  		_ = o0.Args[1]
 13912  		x0 := o0.Args[0]
 13913  		if x0.Op != OpPPC64MOVBZload {
 13914  			break
 13915  		}
 13916  		i0 := x0.AuxInt
 13917  		if x0.Aux != s {
 13918  			break
 13919  		}
 13920  		_ = x0.Args[1]
 13921  		if p != x0.Args[0] {
 13922  			break
 13923  		}
 13924  		if mem != x0.Args[1] {
 13925  			break
 13926  		}
 13927  		s0 := o0.Args[1]
 13928  		if s0.Op != OpPPC64SLDconst {
 13929  			break
 13930  		}
 13931  		if s0.AuxInt != 8 {
 13932  			break
 13933  		}
 13934  		x1 := s0.Args[0]
 13935  		if x1.Op != OpPPC64MOVBZload {
 13936  			break
 13937  		}
 13938  		i1 := x1.AuxInt
 13939  		if x1.Aux != s {
 13940  			break
 13941  		}
 13942  		_ = x1.Args[1]
 13943  		if p != x1.Args[0] {
 13944  			break
 13945  		}
 13946  		if mem != x1.Args[1] {
 13947  			break
 13948  		}
 13949  		s4 := o4.Args[1]
 13950  		if s4.Op != OpPPC64SLDconst {
 13951  			break
 13952  		}
 13953  		if s4.AuxInt != 40 {
 13954  			break
 13955  		}
 13956  		x5 := s4.Args[0]
 13957  		if x5.Op != OpPPC64MOVBZload {
 13958  			break
 13959  		}
 13960  		i5 := x5.AuxInt
 13961  		if x5.Aux != s {
 13962  			break
 13963  		}
 13964  		_ = x5.Args[1]
 13965  		if p != x5.Args[0] {
 13966  			break
 13967  		}
 13968  		if mem != x5.Args[1] {
 13969  			break
 13970  		}
 13971  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13972  			break
 13973  		}
 13974  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13975  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13976  		v.reset(OpCopy)
 13977  		v.AddArg(v0)
 13978  		v0.AuxInt = i0
 13979  		v0.Aux = s
 13980  		v0.AddArg(p)
 13981  		v0.AddArg(mem)
 13982  		return true
 13983  	}
 13984  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13985  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13986  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13987  	for {
 13988  		t := v.Type
 13989  		_ = v.Args[1]
 13990  		s6 := v.Args[0]
 13991  		if s6.Op != OpPPC64SLDconst {
 13992  			break
 13993  		}
 13994  		if s6.AuxInt != 56 {
 13995  			break
 13996  		}
 13997  		x7 := s6.Args[0]
 13998  		if x7.Op != OpPPC64MOVBZload {
 13999  			break
 14000  		}
 14001  		i7 := x7.AuxInt
 14002  		s := x7.Aux
 14003  		_ = x7.Args[1]
 14004  		p := x7.Args[0]
 14005  		mem := x7.Args[1]
 14006  		o5 := v.Args[1]
 14007  		if o5.Op != OpPPC64OR {
 14008  			break
 14009  		}
 14010  		if o5.Type != t {
 14011  			break
 14012  		}
 14013  		_ = o5.Args[1]
 14014  		s5 := o5.Args[0]
 14015  		if s5.Op != OpPPC64SLDconst {
 14016  			break
 14017  		}
 14018  		if s5.AuxInt != 48 {
 14019  			break
 14020  		}
 14021  		x6 := s5.Args[0]
 14022  		if x6.Op != OpPPC64MOVBZload {
 14023  			break
 14024  		}
 14025  		i6 := x6.AuxInt
 14026  		if x6.Aux != s {
 14027  			break
 14028  		}
 14029  		_ = x6.Args[1]
 14030  		if p != x6.Args[0] {
 14031  			break
 14032  		}
 14033  		if mem != x6.Args[1] {
 14034  			break
 14035  		}
 14036  		o4 := o5.Args[1]
 14037  		if o4.Op != OpPPC64OR {
 14038  			break
 14039  		}
 14040  		if o4.Type != t {
 14041  			break
 14042  		}
 14043  		_ = o4.Args[1]
 14044  		o3 := o4.Args[0]
 14045  		if o3.Op != OpPPC64OR {
 14046  			break
 14047  		}
 14048  		if o3.Type != t {
 14049  			break
 14050  		}
 14051  		_ = o3.Args[1]
 14052  		s3 := o3.Args[0]
 14053  		if s3.Op != OpPPC64SLDconst {
 14054  			break
 14055  		}
 14056  		if s3.AuxInt != 32 {
 14057  			break
 14058  		}
 14059  		x4 := s3.Args[0]
 14060  		if x4.Op != OpPPC64MOVBZload {
 14061  			break
 14062  		}
 14063  		i4 := x4.AuxInt
 14064  		if x4.Aux != s {
 14065  			break
 14066  		}
 14067  		_ = x4.Args[1]
 14068  		if p != x4.Args[0] {
 14069  			break
 14070  		}
 14071  		if mem != x4.Args[1] {
 14072  			break
 14073  		}
 14074  		o2 := o3.Args[1]
 14075  		if o2.Op != OpPPC64OR {
 14076  			break
 14077  		}
 14078  		if o2.Type != t {
 14079  			break
 14080  		}
 14081  		_ = o2.Args[1]
 14082  		s2 := o2.Args[0]
 14083  		if s2.Op != OpPPC64SLDconst {
 14084  			break
 14085  		}
 14086  		if s2.AuxInt != 24 {
 14087  			break
 14088  		}
 14089  		x3 := s2.Args[0]
 14090  		if x3.Op != OpPPC64MOVBZload {
 14091  			break
 14092  		}
 14093  		i3 := x3.AuxInt
 14094  		if x3.Aux != s {
 14095  			break
 14096  		}
 14097  		_ = x3.Args[1]
 14098  		if p != x3.Args[0] {
 14099  			break
 14100  		}
 14101  		if mem != x3.Args[1] {
 14102  			break
 14103  		}
 14104  		o1 := o2.Args[1]
 14105  		if o1.Op != OpPPC64OR {
 14106  			break
 14107  		}
 14108  		if o1.Type != t {
 14109  			break
 14110  		}
 14111  		_ = o1.Args[1]
 14112  		o0 := o1.Args[0]
 14113  		if o0.Op != OpPPC64OR {
 14114  			break
 14115  		}
 14116  		if o0.Type != t {
 14117  			break
 14118  		}
 14119  		_ = o0.Args[1]
 14120  		s0 := o0.Args[0]
 14121  		if s0.Op != OpPPC64SLDconst {
 14122  			break
 14123  		}
 14124  		if s0.AuxInt != 8 {
 14125  			break
 14126  		}
 14127  		x1 := s0.Args[0]
 14128  		if x1.Op != OpPPC64MOVBZload {
 14129  			break
 14130  		}
 14131  		i1 := x1.AuxInt
 14132  		if x1.Aux != s {
 14133  			break
 14134  		}
 14135  		_ = x1.Args[1]
 14136  		if p != x1.Args[0] {
 14137  			break
 14138  		}
 14139  		if mem != x1.Args[1] {
 14140  			break
 14141  		}
 14142  		x0 := o0.Args[1]
 14143  		if x0.Op != OpPPC64MOVBZload {
 14144  			break
 14145  		}
 14146  		i0 := x0.AuxInt
 14147  		if x0.Aux != s {
 14148  			break
 14149  		}
 14150  		_ = x0.Args[1]
 14151  		if p != x0.Args[0] {
 14152  			break
 14153  		}
 14154  		if mem != x0.Args[1] {
 14155  			break
 14156  		}
 14157  		s1 := o1.Args[1]
 14158  		if s1.Op != OpPPC64SLDconst {
 14159  			break
 14160  		}
 14161  		if s1.AuxInt != 16 {
 14162  			break
 14163  		}
 14164  		x2 := s1.Args[0]
 14165  		if x2.Op != OpPPC64MOVBZload {
 14166  			break
 14167  		}
 14168  		i2 := x2.AuxInt
 14169  		if x2.Aux != s {
 14170  			break
 14171  		}
 14172  		_ = x2.Args[1]
 14173  		if p != x2.Args[0] {
 14174  			break
 14175  		}
 14176  		if mem != x2.Args[1] {
 14177  			break
 14178  		}
 14179  		s4 := o4.Args[1]
 14180  		if s4.Op != OpPPC64SLDconst {
 14181  			break
 14182  		}
 14183  		if s4.AuxInt != 40 {
 14184  			break
 14185  		}
 14186  		x5 := s4.Args[0]
 14187  		if x5.Op != OpPPC64MOVBZload {
 14188  			break
 14189  		}
 14190  		i5 := x5.AuxInt
 14191  		if x5.Aux != s {
 14192  			break
 14193  		}
 14194  		_ = x5.Args[1]
 14195  		if p != x5.Args[0] {
 14196  			break
 14197  		}
 14198  		if mem != x5.Args[1] {
 14199  			break
 14200  		}
 14201  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14202  			break
 14203  		}
 14204  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14205  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14206  		v.reset(OpCopy)
 14207  		v.AddArg(v0)
 14208  		v0.AuxInt = i0
 14209  		v0.Aux = s
 14210  		v0.AddArg(p)
 14211  		v0.AddArg(mem)
 14212  		return true
 14213  	}
 14214  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14215  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14216  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14217  	for {
 14218  		t := v.Type
 14219  		_ = v.Args[1]
 14220  		s6 := v.Args[0]
 14221  		if s6.Op != OpPPC64SLDconst {
 14222  			break
 14223  		}
 14224  		if s6.AuxInt != 56 {
 14225  			break
 14226  		}
 14227  		x7 := s6.Args[0]
 14228  		if x7.Op != OpPPC64MOVBZload {
 14229  			break
 14230  		}
 14231  		i7 := x7.AuxInt
 14232  		s := x7.Aux
 14233  		_ = x7.Args[1]
 14234  		p := x7.Args[0]
 14235  		mem := x7.Args[1]
 14236  		o5 := v.Args[1]
 14237  		if o5.Op != OpPPC64OR {
 14238  			break
 14239  		}
 14240  		if o5.Type != t {
 14241  			break
 14242  		}
 14243  		_ = o5.Args[1]
 14244  		s5 := o5.Args[0]
 14245  		if s5.Op != OpPPC64SLDconst {
 14246  			break
 14247  		}
 14248  		if s5.AuxInt != 48 {
 14249  			break
 14250  		}
 14251  		x6 := s5.Args[0]
 14252  		if x6.Op != OpPPC64MOVBZload {
 14253  			break
 14254  		}
 14255  		i6 := x6.AuxInt
 14256  		if x6.Aux != s {
 14257  			break
 14258  		}
 14259  		_ = x6.Args[1]
 14260  		if p != x6.Args[0] {
 14261  			break
 14262  		}
 14263  		if mem != x6.Args[1] {
 14264  			break
 14265  		}
 14266  		o4 := o5.Args[1]
 14267  		if o4.Op != OpPPC64OR {
 14268  			break
 14269  		}
 14270  		if o4.Type != t {
 14271  			break
 14272  		}
 14273  		_ = o4.Args[1]
 14274  		o3 := o4.Args[0]
 14275  		if o3.Op != OpPPC64OR {
 14276  			break
 14277  		}
 14278  		if o3.Type != t {
 14279  			break
 14280  		}
 14281  		_ = o3.Args[1]
 14282  		s3 := o3.Args[0]
 14283  		if s3.Op != OpPPC64SLDconst {
 14284  			break
 14285  		}
 14286  		if s3.AuxInt != 32 {
 14287  			break
 14288  		}
 14289  		x4 := s3.Args[0]
 14290  		if x4.Op != OpPPC64MOVBZload {
 14291  			break
 14292  		}
 14293  		i4 := x4.AuxInt
 14294  		if x4.Aux != s {
 14295  			break
 14296  		}
 14297  		_ = x4.Args[1]
 14298  		if p != x4.Args[0] {
 14299  			break
 14300  		}
 14301  		if mem != x4.Args[1] {
 14302  			break
 14303  		}
 14304  		o2 := o3.Args[1]
 14305  		if o2.Op != OpPPC64OR {
 14306  			break
 14307  		}
 14308  		if o2.Type != t {
 14309  			break
 14310  		}
 14311  		_ = o2.Args[1]
 14312  		s2 := o2.Args[0]
 14313  		if s2.Op != OpPPC64SLDconst {
 14314  			break
 14315  		}
 14316  		if s2.AuxInt != 24 {
 14317  			break
 14318  		}
 14319  		x3 := s2.Args[0]
 14320  		if x3.Op != OpPPC64MOVBZload {
 14321  			break
 14322  		}
 14323  		i3 := x3.AuxInt
 14324  		if x3.Aux != s {
 14325  			break
 14326  		}
 14327  		_ = x3.Args[1]
 14328  		if p != x3.Args[0] {
 14329  			break
 14330  		}
 14331  		if mem != x3.Args[1] {
 14332  			break
 14333  		}
 14334  		o1 := o2.Args[1]
 14335  		if o1.Op != OpPPC64OR {
 14336  			break
 14337  		}
 14338  		if o1.Type != t {
 14339  			break
 14340  		}
 14341  		_ = o1.Args[1]
 14342  		o0 := o1.Args[0]
 14343  		if o0.Op != OpPPC64OR {
 14344  			break
 14345  		}
 14346  		if o0.Type != t {
 14347  			break
 14348  		}
 14349  		_ = o0.Args[1]
 14350  		x0 := o0.Args[0]
 14351  		if x0.Op != OpPPC64MOVBZload {
 14352  			break
 14353  		}
 14354  		i0 := x0.AuxInt
 14355  		if x0.Aux != s {
 14356  			break
 14357  		}
 14358  		_ = x0.Args[1]
 14359  		if p != x0.Args[0] {
 14360  			break
 14361  		}
 14362  		if mem != x0.Args[1] {
 14363  			break
 14364  		}
 14365  		s0 := o0.Args[1]
 14366  		if s0.Op != OpPPC64SLDconst {
 14367  			break
 14368  		}
 14369  		if s0.AuxInt != 8 {
 14370  			break
 14371  		}
 14372  		x1 := s0.Args[0]
 14373  		if x1.Op != OpPPC64MOVBZload {
 14374  			break
 14375  		}
 14376  		i1 := x1.AuxInt
 14377  		if x1.Aux != s {
 14378  			break
 14379  		}
 14380  		_ = x1.Args[1]
 14381  		if p != x1.Args[0] {
 14382  			break
 14383  		}
 14384  		if mem != x1.Args[1] {
 14385  			break
 14386  		}
 14387  		s1 := o1.Args[1]
 14388  		if s1.Op != OpPPC64SLDconst {
 14389  			break
 14390  		}
 14391  		if s1.AuxInt != 16 {
 14392  			break
 14393  		}
 14394  		x2 := s1.Args[0]
 14395  		if x2.Op != OpPPC64MOVBZload {
 14396  			break
 14397  		}
 14398  		i2 := x2.AuxInt
 14399  		if x2.Aux != s {
 14400  			break
 14401  		}
 14402  		_ = x2.Args[1]
 14403  		if p != x2.Args[0] {
 14404  			break
 14405  		}
 14406  		if mem != x2.Args[1] {
 14407  			break
 14408  		}
 14409  		s4 := o4.Args[1]
 14410  		if s4.Op != OpPPC64SLDconst {
 14411  			break
 14412  		}
 14413  		if s4.AuxInt != 40 {
 14414  			break
 14415  		}
 14416  		x5 := s4.Args[0]
 14417  		if x5.Op != OpPPC64MOVBZload {
 14418  			break
 14419  		}
 14420  		i5 := x5.AuxInt
 14421  		if x5.Aux != s {
 14422  			break
 14423  		}
 14424  		_ = x5.Args[1]
 14425  		if p != x5.Args[0] {
 14426  			break
 14427  		}
 14428  		if mem != x5.Args[1] {
 14429  			break
 14430  		}
 14431  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14432  			break
 14433  		}
 14434  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14435  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14436  		v.reset(OpCopy)
 14437  		v.AddArg(v0)
 14438  		v0.AuxInt = i0
 14439  		v0.Aux = s
 14440  		v0.AddArg(p)
 14441  		v0.AddArg(mem)
 14442  		return true
 14443  	}
 14444  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14445  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14446  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14447  	for {
 14448  		t := v.Type
 14449  		_ = v.Args[1]
 14450  		s6 := v.Args[0]
 14451  		if s6.Op != OpPPC64SLDconst {
 14452  			break
 14453  		}
 14454  		if s6.AuxInt != 56 {
 14455  			break
 14456  		}
 14457  		x7 := s6.Args[0]
 14458  		if x7.Op != OpPPC64MOVBZload {
 14459  			break
 14460  		}
 14461  		i7 := x7.AuxInt
 14462  		s := x7.Aux
 14463  		_ = x7.Args[1]
 14464  		p := x7.Args[0]
 14465  		mem := x7.Args[1]
 14466  		o5 := v.Args[1]
 14467  		if o5.Op != OpPPC64OR {
 14468  			break
 14469  		}
 14470  		if o5.Type != t {
 14471  			break
 14472  		}
 14473  		_ = o5.Args[1]
 14474  		s5 := o5.Args[0]
 14475  		if s5.Op != OpPPC64SLDconst {
 14476  			break
 14477  		}
 14478  		if s5.AuxInt != 48 {
 14479  			break
 14480  		}
 14481  		x6 := s5.Args[0]
 14482  		if x6.Op != OpPPC64MOVBZload {
 14483  			break
 14484  		}
 14485  		i6 := x6.AuxInt
 14486  		if x6.Aux != s {
 14487  			break
 14488  		}
 14489  		_ = x6.Args[1]
 14490  		if p != x6.Args[0] {
 14491  			break
 14492  		}
 14493  		if mem != x6.Args[1] {
 14494  			break
 14495  		}
 14496  		o4 := o5.Args[1]
 14497  		if o4.Op != OpPPC64OR {
 14498  			break
 14499  		}
 14500  		if o4.Type != t {
 14501  			break
 14502  		}
 14503  		_ = o4.Args[1]
 14504  		o3 := o4.Args[0]
 14505  		if o3.Op != OpPPC64OR {
 14506  			break
 14507  		}
 14508  		if o3.Type != t {
 14509  			break
 14510  		}
 14511  		_ = o3.Args[1]
 14512  		s3 := o3.Args[0]
 14513  		if s3.Op != OpPPC64SLDconst {
 14514  			break
 14515  		}
 14516  		if s3.AuxInt != 32 {
 14517  			break
 14518  		}
 14519  		x4 := s3.Args[0]
 14520  		if x4.Op != OpPPC64MOVBZload {
 14521  			break
 14522  		}
 14523  		i4 := x4.AuxInt
 14524  		if x4.Aux != s {
 14525  			break
 14526  		}
 14527  		_ = x4.Args[1]
 14528  		if p != x4.Args[0] {
 14529  			break
 14530  		}
 14531  		if mem != x4.Args[1] {
 14532  			break
 14533  		}
 14534  		o2 := o3.Args[1]
 14535  		if o2.Op != OpPPC64OR {
 14536  			break
 14537  		}
 14538  		if o2.Type != t {
 14539  			break
 14540  		}
 14541  		_ = o2.Args[1]
 14542  		o1 := o2.Args[0]
 14543  		if o1.Op != OpPPC64OR {
 14544  			break
 14545  		}
 14546  		if o1.Type != t {
 14547  			break
 14548  		}
 14549  		_ = o1.Args[1]
 14550  		s1 := o1.Args[0]
 14551  		if s1.Op != OpPPC64SLDconst {
 14552  			break
 14553  		}
 14554  		if s1.AuxInt != 16 {
 14555  			break
 14556  		}
 14557  		x2 := s1.Args[0]
 14558  		if x2.Op != OpPPC64MOVBZload {
 14559  			break
 14560  		}
 14561  		i2 := x2.AuxInt
 14562  		if x2.Aux != s {
 14563  			break
 14564  		}
 14565  		_ = x2.Args[1]
 14566  		if p != x2.Args[0] {
 14567  			break
 14568  		}
 14569  		if mem != x2.Args[1] {
 14570  			break
 14571  		}
 14572  		o0 := o1.Args[1]
 14573  		if o0.Op != OpPPC64OR {
 14574  			break
 14575  		}
 14576  		if o0.Type != t {
 14577  			break
 14578  		}
 14579  		_ = o0.Args[1]
 14580  		s0 := o0.Args[0]
 14581  		if s0.Op != OpPPC64SLDconst {
 14582  			break
 14583  		}
 14584  		if s0.AuxInt != 8 {
 14585  			break
 14586  		}
 14587  		x1 := s0.Args[0]
 14588  		if x1.Op != OpPPC64MOVBZload {
 14589  			break
 14590  		}
 14591  		i1 := x1.AuxInt
 14592  		if x1.Aux != s {
 14593  			break
 14594  		}
 14595  		_ = x1.Args[1]
 14596  		if p != x1.Args[0] {
 14597  			break
 14598  		}
 14599  		if mem != x1.Args[1] {
 14600  			break
 14601  		}
 14602  		x0 := o0.Args[1]
 14603  		if x0.Op != OpPPC64MOVBZload {
 14604  			break
 14605  		}
 14606  		i0 := x0.AuxInt
 14607  		if x0.Aux != s {
 14608  			break
 14609  		}
 14610  		_ = x0.Args[1]
 14611  		if p != x0.Args[0] {
 14612  			break
 14613  		}
 14614  		if mem != x0.Args[1] {
 14615  			break
 14616  		}
 14617  		s2 := o2.Args[1]
 14618  		if s2.Op != OpPPC64SLDconst {
 14619  			break
 14620  		}
 14621  		if s2.AuxInt != 24 {
 14622  			break
 14623  		}
 14624  		x3 := s2.Args[0]
 14625  		if x3.Op != OpPPC64MOVBZload {
 14626  			break
 14627  		}
 14628  		i3 := x3.AuxInt
 14629  		if x3.Aux != s {
 14630  			break
 14631  		}
 14632  		_ = x3.Args[1]
 14633  		if p != x3.Args[0] {
 14634  			break
 14635  		}
 14636  		if mem != x3.Args[1] {
 14637  			break
 14638  		}
 14639  		s4 := o4.Args[1]
 14640  		if s4.Op != OpPPC64SLDconst {
 14641  			break
 14642  		}
 14643  		if s4.AuxInt != 40 {
 14644  			break
 14645  		}
 14646  		x5 := s4.Args[0]
 14647  		if x5.Op != OpPPC64MOVBZload {
 14648  			break
 14649  		}
 14650  		i5 := x5.AuxInt
 14651  		if x5.Aux != s {
 14652  			break
 14653  		}
 14654  		_ = x5.Args[1]
 14655  		if p != x5.Args[0] {
 14656  			break
 14657  		}
 14658  		if mem != x5.Args[1] {
 14659  			break
 14660  		}
 14661  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14662  			break
 14663  		}
 14664  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14665  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14666  		v.reset(OpCopy)
 14667  		v.AddArg(v0)
 14668  		v0.AuxInt = i0
 14669  		v0.Aux = s
 14670  		v0.AddArg(p)
 14671  		v0.AddArg(mem)
 14672  		return true
 14673  	}
 14674  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14675  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14676  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14677  	for {
 14678  		t := v.Type
 14679  		_ = v.Args[1]
 14680  		s6 := v.Args[0]
 14681  		if s6.Op != OpPPC64SLDconst {
 14682  			break
 14683  		}
 14684  		if s6.AuxInt != 56 {
 14685  			break
 14686  		}
 14687  		x7 := s6.Args[0]
 14688  		if x7.Op != OpPPC64MOVBZload {
 14689  			break
 14690  		}
 14691  		i7 := x7.AuxInt
 14692  		s := x7.Aux
 14693  		_ = x7.Args[1]
 14694  		p := x7.Args[0]
 14695  		mem := x7.Args[1]
 14696  		o5 := v.Args[1]
 14697  		if o5.Op != OpPPC64OR {
 14698  			break
 14699  		}
 14700  		if o5.Type != t {
 14701  			break
 14702  		}
 14703  		_ = o5.Args[1]
 14704  		s5 := o5.Args[0]
 14705  		if s5.Op != OpPPC64SLDconst {
 14706  			break
 14707  		}
 14708  		if s5.AuxInt != 48 {
 14709  			break
 14710  		}
 14711  		x6 := s5.Args[0]
 14712  		if x6.Op != OpPPC64MOVBZload {
 14713  			break
 14714  		}
 14715  		i6 := x6.AuxInt
 14716  		if x6.Aux != s {
 14717  			break
 14718  		}
 14719  		_ = x6.Args[1]
 14720  		if p != x6.Args[0] {
 14721  			break
 14722  		}
 14723  		if mem != x6.Args[1] {
 14724  			break
 14725  		}
 14726  		o4 := o5.Args[1]
 14727  		if o4.Op != OpPPC64OR {
 14728  			break
 14729  		}
 14730  		if o4.Type != t {
 14731  			break
 14732  		}
 14733  		_ = o4.Args[1]
 14734  		o3 := o4.Args[0]
 14735  		if o3.Op != OpPPC64OR {
 14736  			break
 14737  		}
 14738  		if o3.Type != t {
 14739  			break
 14740  		}
 14741  		_ = o3.Args[1]
 14742  		s3 := o3.Args[0]
 14743  		if s3.Op != OpPPC64SLDconst {
 14744  			break
 14745  		}
 14746  		if s3.AuxInt != 32 {
 14747  			break
 14748  		}
 14749  		x4 := s3.Args[0]
 14750  		if x4.Op != OpPPC64MOVBZload {
 14751  			break
 14752  		}
 14753  		i4 := x4.AuxInt
 14754  		if x4.Aux != s {
 14755  			break
 14756  		}
 14757  		_ = x4.Args[1]
 14758  		if p != x4.Args[0] {
 14759  			break
 14760  		}
 14761  		if mem != x4.Args[1] {
 14762  			break
 14763  		}
 14764  		o2 := o3.Args[1]
 14765  		if o2.Op != OpPPC64OR {
 14766  			break
 14767  		}
 14768  		if o2.Type != t {
 14769  			break
 14770  		}
 14771  		_ = o2.Args[1]
 14772  		o1 := o2.Args[0]
 14773  		if o1.Op != OpPPC64OR {
 14774  			break
 14775  		}
 14776  		if o1.Type != t {
 14777  			break
 14778  		}
 14779  		_ = o1.Args[1]
 14780  		s1 := o1.Args[0]
 14781  		if s1.Op != OpPPC64SLDconst {
 14782  			break
 14783  		}
 14784  		if s1.AuxInt != 16 {
 14785  			break
 14786  		}
 14787  		x2 := s1.Args[0]
 14788  		if x2.Op != OpPPC64MOVBZload {
 14789  			break
 14790  		}
 14791  		i2 := x2.AuxInt
 14792  		if x2.Aux != s {
 14793  			break
 14794  		}
 14795  		_ = x2.Args[1]
 14796  		if p != x2.Args[0] {
 14797  			break
 14798  		}
 14799  		if mem != x2.Args[1] {
 14800  			break
 14801  		}
 14802  		o0 := o1.Args[1]
 14803  		if o0.Op != OpPPC64OR {
 14804  			break
 14805  		}
 14806  		if o0.Type != t {
 14807  			break
 14808  		}
 14809  		_ = o0.Args[1]
 14810  		x0 := o0.Args[0]
 14811  		if x0.Op != OpPPC64MOVBZload {
 14812  			break
 14813  		}
 14814  		i0 := x0.AuxInt
 14815  		if x0.Aux != s {
 14816  			break
 14817  		}
 14818  		_ = x0.Args[1]
 14819  		if p != x0.Args[0] {
 14820  			break
 14821  		}
 14822  		if mem != x0.Args[1] {
 14823  			break
 14824  		}
 14825  		s0 := o0.Args[1]
 14826  		if s0.Op != OpPPC64SLDconst {
 14827  			break
 14828  		}
 14829  		if s0.AuxInt != 8 {
 14830  			break
 14831  		}
 14832  		x1 := s0.Args[0]
 14833  		if x1.Op != OpPPC64MOVBZload {
 14834  			break
 14835  		}
 14836  		i1 := x1.AuxInt
 14837  		if x1.Aux != s {
 14838  			break
 14839  		}
 14840  		_ = x1.Args[1]
 14841  		if p != x1.Args[0] {
 14842  			break
 14843  		}
 14844  		if mem != x1.Args[1] {
 14845  			break
 14846  		}
 14847  		s2 := o2.Args[1]
 14848  		if s2.Op != OpPPC64SLDconst {
 14849  			break
 14850  		}
 14851  		if s2.AuxInt != 24 {
 14852  			break
 14853  		}
 14854  		x3 := s2.Args[0]
 14855  		if x3.Op != OpPPC64MOVBZload {
 14856  			break
 14857  		}
 14858  		i3 := x3.AuxInt
 14859  		if x3.Aux != s {
 14860  			break
 14861  		}
 14862  		_ = x3.Args[1]
 14863  		if p != x3.Args[0] {
 14864  			break
 14865  		}
 14866  		if mem != x3.Args[1] {
 14867  			break
 14868  		}
 14869  		s4 := o4.Args[1]
 14870  		if s4.Op != OpPPC64SLDconst {
 14871  			break
 14872  		}
 14873  		if s4.AuxInt != 40 {
 14874  			break
 14875  		}
 14876  		x5 := s4.Args[0]
 14877  		if x5.Op != OpPPC64MOVBZload {
 14878  			break
 14879  		}
 14880  		i5 := x5.AuxInt
 14881  		if x5.Aux != s {
 14882  			break
 14883  		}
 14884  		_ = x5.Args[1]
 14885  		if p != x5.Args[0] {
 14886  			break
 14887  		}
 14888  		if mem != x5.Args[1] {
 14889  			break
 14890  		}
 14891  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14892  			break
 14893  		}
 14894  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14895  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14896  		v.reset(OpCopy)
 14897  		v.AddArg(v0)
 14898  		v0.AuxInt = i0
 14899  		v0.Aux = s
 14900  		v0.AddArg(p)
 14901  		v0.AddArg(mem)
 14902  		return true
 14903  	}
 14904  	return false
 14905  }
 14906  func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
 14907  	b := v.Block
 14908  	_ = b
 14909  	config := b.Func.Config
 14910  	_ = config
 14911  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14912  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14913  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14914  	for {
 14915  		t := v.Type
 14916  		_ = v.Args[1]
 14917  		s6 := v.Args[0]
 14918  		if s6.Op != OpPPC64SLDconst {
 14919  			break
 14920  		}
 14921  		if s6.AuxInt != 56 {
 14922  			break
 14923  		}
 14924  		x7 := s6.Args[0]
 14925  		if x7.Op != OpPPC64MOVBZload {
 14926  			break
 14927  		}
 14928  		i7 := x7.AuxInt
 14929  		s := x7.Aux
 14930  		_ = x7.Args[1]
 14931  		p := x7.Args[0]
 14932  		mem := x7.Args[1]
 14933  		o5 := v.Args[1]
 14934  		if o5.Op != OpPPC64OR {
 14935  			break
 14936  		}
 14937  		if o5.Type != t {
 14938  			break
 14939  		}
 14940  		_ = o5.Args[1]
 14941  		s5 := o5.Args[0]
 14942  		if s5.Op != OpPPC64SLDconst {
 14943  			break
 14944  		}
 14945  		if s5.AuxInt != 48 {
 14946  			break
 14947  		}
 14948  		x6 := s5.Args[0]
 14949  		if x6.Op != OpPPC64MOVBZload {
 14950  			break
 14951  		}
 14952  		i6 := x6.AuxInt
 14953  		if x6.Aux != s {
 14954  			break
 14955  		}
 14956  		_ = x6.Args[1]
 14957  		if p != x6.Args[0] {
 14958  			break
 14959  		}
 14960  		if mem != x6.Args[1] {
 14961  			break
 14962  		}
 14963  		o4 := o5.Args[1]
 14964  		if o4.Op != OpPPC64OR {
 14965  			break
 14966  		}
 14967  		if o4.Type != t {
 14968  			break
 14969  		}
 14970  		_ = o4.Args[1]
 14971  		o3 := o4.Args[0]
 14972  		if o3.Op != OpPPC64OR {
 14973  			break
 14974  		}
 14975  		if o3.Type != t {
 14976  			break
 14977  		}
 14978  		_ = o3.Args[1]
 14979  		s3 := o3.Args[0]
 14980  		if s3.Op != OpPPC64SLDconst {
 14981  			break
 14982  		}
 14983  		if s3.AuxInt != 32 {
 14984  			break
 14985  		}
 14986  		x4 := s3.Args[0]
 14987  		if x4.Op != OpPPC64MOVBZload {
 14988  			break
 14989  		}
 14990  		i4 := x4.AuxInt
 14991  		if x4.Aux != s {
 14992  			break
 14993  		}
 14994  		_ = x4.Args[1]
 14995  		if p != x4.Args[0] {
 14996  			break
 14997  		}
 14998  		if mem != x4.Args[1] {
 14999  			break
 15000  		}
 15001  		o2 := o3.Args[1]
 15002  		if o2.Op != OpPPC64OR {
 15003  			break
 15004  		}
 15005  		if o2.Type != t {
 15006  			break
 15007  		}
 15008  		_ = o2.Args[1]
 15009  		o1 := o2.Args[0]
 15010  		if o1.Op != OpPPC64OR {
 15011  			break
 15012  		}
 15013  		if o1.Type != t {
 15014  			break
 15015  		}
 15016  		_ = o1.Args[1]
 15017  		o0 := o1.Args[0]
 15018  		if o0.Op != OpPPC64OR {
 15019  			break
 15020  		}
 15021  		if o0.Type != t {
 15022  			break
 15023  		}
 15024  		_ = o0.Args[1]
 15025  		s0 := o0.Args[0]
 15026  		if s0.Op != OpPPC64SLDconst {
 15027  			break
 15028  		}
 15029  		if s0.AuxInt != 8 {
 15030  			break
 15031  		}
 15032  		x1 := s0.Args[0]
 15033  		if x1.Op != OpPPC64MOVBZload {
 15034  			break
 15035  		}
 15036  		i1 := x1.AuxInt
 15037  		if x1.Aux != s {
 15038  			break
 15039  		}
 15040  		_ = x1.Args[1]
 15041  		if p != x1.Args[0] {
 15042  			break
 15043  		}
 15044  		if mem != x1.Args[1] {
 15045  			break
 15046  		}
 15047  		x0 := o0.Args[1]
 15048  		if x0.Op != OpPPC64MOVBZload {
 15049  			break
 15050  		}
 15051  		i0 := x0.AuxInt
 15052  		if x0.Aux != s {
 15053  			break
 15054  		}
 15055  		_ = x0.Args[1]
 15056  		if p != x0.Args[0] {
 15057  			break
 15058  		}
 15059  		if mem != x0.Args[1] {
 15060  			break
 15061  		}
 15062  		s1 := o1.Args[1]
 15063  		if s1.Op != OpPPC64SLDconst {
 15064  			break
 15065  		}
 15066  		if s1.AuxInt != 16 {
 15067  			break
 15068  		}
 15069  		x2 := s1.Args[0]
 15070  		if x2.Op != OpPPC64MOVBZload {
 15071  			break
 15072  		}
 15073  		i2 := x2.AuxInt
 15074  		if x2.Aux != s {
 15075  			break
 15076  		}
 15077  		_ = x2.Args[1]
 15078  		if p != x2.Args[0] {
 15079  			break
 15080  		}
 15081  		if mem != x2.Args[1] {
 15082  			break
 15083  		}
 15084  		s2 := o2.Args[1]
 15085  		if s2.Op != OpPPC64SLDconst {
 15086  			break
 15087  		}
 15088  		if s2.AuxInt != 24 {
 15089  			break
 15090  		}
 15091  		x3 := s2.Args[0]
 15092  		if x3.Op != OpPPC64MOVBZload {
 15093  			break
 15094  		}
 15095  		i3 := x3.AuxInt
 15096  		if x3.Aux != s {
 15097  			break
 15098  		}
 15099  		_ = x3.Args[1]
 15100  		if p != x3.Args[0] {
 15101  			break
 15102  		}
 15103  		if mem != x3.Args[1] {
 15104  			break
 15105  		}
 15106  		s4 := o4.Args[1]
 15107  		if s4.Op != OpPPC64SLDconst {
 15108  			break
 15109  		}
 15110  		if s4.AuxInt != 40 {
 15111  			break
 15112  		}
 15113  		x5 := s4.Args[0]
 15114  		if x5.Op != OpPPC64MOVBZload {
 15115  			break
 15116  		}
 15117  		i5 := x5.AuxInt
 15118  		if x5.Aux != s {
 15119  			break
 15120  		}
 15121  		_ = x5.Args[1]
 15122  		if p != x5.Args[0] {
 15123  			break
 15124  		}
 15125  		if mem != x5.Args[1] {
 15126  			break
 15127  		}
 15128  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15129  			break
 15130  		}
 15131  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15132  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15133  		v.reset(OpCopy)
 15134  		v.AddArg(v0)
 15135  		v0.AuxInt = i0
 15136  		v0.Aux = s
 15137  		v0.AddArg(p)
 15138  		v0.AddArg(mem)
 15139  		return true
 15140  	}
 15141  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15142  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15143  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15144  	for {
 15145  		t := v.Type
 15146  		_ = v.Args[1]
 15147  		s6 := v.Args[0]
 15148  		if s6.Op != OpPPC64SLDconst {
 15149  			break
 15150  		}
 15151  		if s6.AuxInt != 56 {
 15152  			break
 15153  		}
 15154  		x7 := s6.Args[0]
 15155  		if x7.Op != OpPPC64MOVBZload {
 15156  			break
 15157  		}
 15158  		i7 := x7.AuxInt
 15159  		s := x7.Aux
 15160  		_ = x7.Args[1]
 15161  		p := x7.Args[0]
 15162  		mem := x7.Args[1]
 15163  		o5 := v.Args[1]
 15164  		if o5.Op != OpPPC64OR {
 15165  			break
 15166  		}
 15167  		if o5.Type != t {
 15168  			break
 15169  		}
 15170  		_ = o5.Args[1]
 15171  		s5 := o5.Args[0]
 15172  		if s5.Op != OpPPC64SLDconst {
 15173  			break
 15174  		}
 15175  		if s5.AuxInt != 48 {
 15176  			break
 15177  		}
 15178  		x6 := s5.Args[0]
 15179  		if x6.Op != OpPPC64MOVBZload {
 15180  			break
 15181  		}
 15182  		i6 := x6.AuxInt
 15183  		if x6.Aux != s {
 15184  			break
 15185  		}
 15186  		_ = x6.Args[1]
 15187  		if p != x6.Args[0] {
 15188  			break
 15189  		}
 15190  		if mem != x6.Args[1] {
 15191  			break
 15192  		}
 15193  		o4 := o5.Args[1]
 15194  		if o4.Op != OpPPC64OR {
 15195  			break
 15196  		}
 15197  		if o4.Type != t {
 15198  			break
 15199  		}
 15200  		_ = o4.Args[1]
 15201  		o3 := o4.Args[0]
 15202  		if o3.Op != OpPPC64OR {
 15203  			break
 15204  		}
 15205  		if o3.Type != t {
 15206  			break
 15207  		}
 15208  		_ = o3.Args[1]
 15209  		s3 := o3.Args[0]
 15210  		if s3.Op != OpPPC64SLDconst {
 15211  			break
 15212  		}
 15213  		if s3.AuxInt != 32 {
 15214  			break
 15215  		}
 15216  		x4 := s3.Args[0]
 15217  		if x4.Op != OpPPC64MOVBZload {
 15218  			break
 15219  		}
 15220  		i4 := x4.AuxInt
 15221  		if x4.Aux != s {
 15222  			break
 15223  		}
 15224  		_ = x4.Args[1]
 15225  		if p != x4.Args[0] {
 15226  			break
 15227  		}
 15228  		if mem != x4.Args[1] {
 15229  			break
 15230  		}
 15231  		o2 := o3.Args[1]
 15232  		if o2.Op != OpPPC64OR {
 15233  			break
 15234  		}
 15235  		if o2.Type != t {
 15236  			break
 15237  		}
 15238  		_ = o2.Args[1]
 15239  		o1 := o2.Args[0]
 15240  		if o1.Op != OpPPC64OR {
 15241  			break
 15242  		}
 15243  		if o1.Type != t {
 15244  			break
 15245  		}
 15246  		_ = o1.Args[1]
 15247  		o0 := o1.Args[0]
 15248  		if o0.Op != OpPPC64OR {
 15249  			break
 15250  		}
 15251  		if o0.Type != t {
 15252  			break
 15253  		}
 15254  		_ = o0.Args[1]
 15255  		x0 := o0.Args[0]
 15256  		if x0.Op != OpPPC64MOVBZload {
 15257  			break
 15258  		}
 15259  		i0 := x0.AuxInt
 15260  		if x0.Aux != s {
 15261  			break
 15262  		}
 15263  		_ = x0.Args[1]
 15264  		if p != x0.Args[0] {
 15265  			break
 15266  		}
 15267  		if mem != x0.Args[1] {
 15268  			break
 15269  		}
 15270  		s0 := o0.Args[1]
 15271  		if s0.Op != OpPPC64SLDconst {
 15272  			break
 15273  		}
 15274  		if s0.AuxInt != 8 {
 15275  			break
 15276  		}
 15277  		x1 := s0.Args[0]
 15278  		if x1.Op != OpPPC64MOVBZload {
 15279  			break
 15280  		}
 15281  		i1 := x1.AuxInt
 15282  		if x1.Aux != s {
 15283  			break
 15284  		}
 15285  		_ = x1.Args[1]
 15286  		if p != x1.Args[0] {
 15287  			break
 15288  		}
 15289  		if mem != x1.Args[1] {
 15290  			break
 15291  		}
 15292  		s1 := o1.Args[1]
 15293  		if s1.Op != OpPPC64SLDconst {
 15294  			break
 15295  		}
 15296  		if s1.AuxInt != 16 {
 15297  			break
 15298  		}
 15299  		x2 := s1.Args[0]
 15300  		if x2.Op != OpPPC64MOVBZload {
 15301  			break
 15302  		}
 15303  		i2 := x2.AuxInt
 15304  		if x2.Aux != s {
 15305  			break
 15306  		}
 15307  		_ = x2.Args[1]
 15308  		if p != x2.Args[0] {
 15309  			break
 15310  		}
 15311  		if mem != x2.Args[1] {
 15312  			break
 15313  		}
 15314  		s2 := o2.Args[1]
 15315  		if s2.Op != OpPPC64SLDconst {
 15316  			break
 15317  		}
 15318  		if s2.AuxInt != 24 {
 15319  			break
 15320  		}
 15321  		x3 := s2.Args[0]
 15322  		if x3.Op != OpPPC64MOVBZload {
 15323  			break
 15324  		}
 15325  		i3 := x3.AuxInt
 15326  		if x3.Aux != s {
 15327  			break
 15328  		}
 15329  		_ = x3.Args[1]
 15330  		if p != x3.Args[0] {
 15331  			break
 15332  		}
 15333  		if mem != x3.Args[1] {
 15334  			break
 15335  		}
 15336  		s4 := o4.Args[1]
 15337  		if s4.Op != OpPPC64SLDconst {
 15338  			break
 15339  		}
 15340  		if s4.AuxInt != 40 {
 15341  			break
 15342  		}
 15343  		x5 := s4.Args[0]
 15344  		if x5.Op != OpPPC64MOVBZload {
 15345  			break
 15346  		}
 15347  		i5 := x5.AuxInt
 15348  		if x5.Aux != s {
 15349  			break
 15350  		}
 15351  		_ = x5.Args[1]
 15352  		if p != x5.Args[0] {
 15353  			break
 15354  		}
 15355  		if mem != x5.Args[1] {
 15356  			break
 15357  		}
 15358  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15359  			break
 15360  		}
 15361  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15362  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15363  		v.reset(OpCopy)
 15364  		v.AddArg(v0)
 15365  		v0.AuxInt = i0
 15366  		v0.Aux = s
 15367  		v0.AddArg(p)
 15368  		v0.AddArg(mem)
 15369  		return true
 15370  	}
 15371  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15372  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15373  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15374  	for {
 15375  		t := v.Type
 15376  		_ = v.Args[1]
 15377  		s6 := v.Args[0]
 15378  		if s6.Op != OpPPC64SLDconst {
 15379  			break
 15380  		}
 15381  		if s6.AuxInt != 56 {
 15382  			break
 15383  		}
 15384  		x7 := s6.Args[0]
 15385  		if x7.Op != OpPPC64MOVBZload {
 15386  			break
 15387  		}
 15388  		i7 := x7.AuxInt
 15389  		s := x7.Aux
 15390  		_ = x7.Args[1]
 15391  		p := x7.Args[0]
 15392  		mem := x7.Args[1]
 15393  		o5 := v.Args[1]
 15394  		if o5.Op != OpPPC64OR {
 15395  			break
 15396  		}
 15397  		if o5.Type != t {
 15398  			break
 15399  		}
 15400  		_ = o5.Args[1]
 15401  		s5 := o5.Args[0]
 15402  		if s5.Op != OpPPC64SLDconst {
 15403  			break
 15404  		}
 15405  		if s5.AuxInt != 48 {
 15406  			break
 15407  		}
 15408  		x6 := s5.Args[0]
 15409  		if x6.Op != OpPPC64MOVBZload {
 15410  			break
 15411  		}
 15412  		i6 := x6.AuxInt
 15413  		if x6.Aux != s {
 15414  			break
 15415  		}
 15416  		_ = x6.Args[1]
 15417  		if p != x6.Args[0] {
 15418  			break
 15419  		}
 15420  		if mem != x6.Args[1] {
 15421  			break
 15422  		}
 15423  		o4 := o5.Args[1]
 15424  		if o4.Op != OpPPC64OR {
 15425  			break
 15426  		}
 15427  		if o4.Type != t {
 15428  			break
 15429  		}
 15430  		_ = o4.Args[1]
 15431  		o3 := o4.Args[0]
 15432  		if o3.Op != OpPPC64OR {
 15433  			break
 15434  		}
 15435  		if o3.Type != t {
 15436  			break
 15437  		}
 15438  		_ = o3.Args[1]
 15439  		o2 := o3.Args[0]
 15440  		if o2.Op != OpPPC64OR {
 15441  			break
 15442  		}
 15443  		if o2.Type != t {
 15444  			break
 15445  		}
 15446  		_ = o2.Args[1]
 15447  		s2 := o2.Args[0]
 15448  		if s2.Op != OpPPC64SLDconst {
 15449  			break
 15450  		}
 15451  		if s2.AuxInt != 24 {
 15452  			break
 15453  		}
 15454  		x3 := s2.Args[0]
 15455  		if x3.Op != OpPPC64MOVBZload {
 15456  			break
 15457  		}
 15458  		i3 := x3.AuxInt
 15459  		if x3.Aux != s {
 15460  			break
 15461  		}
 15462  		_ = x3.Args[1]
 15463  		if p != x3.Args[0] {
 15464  			break
 15465  		}
 15466  		if mem != x3.Args[1] {
 15467  			break
 15468  		}
 15469  		o1 := o2.Args[1]
 15470  		if o1.Op != OpPPC64OR {
 15471  			break
 15472  		}
 15473  		if o1.Type != t {
 15474  			break
 15475  		}
 15476  		_ = o1.Args[1]
 15477  		s1 := o1.Args[0]
 15478  		if s1.Op != OpPPC64SLDconst {
 15479  			break
 15480  		}
 15481  		if s1.AuxInt != 16 {
 15482  			break
 15483  		}
 15484  		x2 := s1.Args[0]
 15485  		if x2.Op != OpPPC64MOVBZload {
 15486  			break
 15487  		}
 15488  		i2 := x2.AuxInt
 15489  		if x2.Aux != s {
 15490  			break
 15491  		}
 15492  		_ = x2.Args[1]
 15493  		if p != x2.Args[0] {
 15494  			break
 15495  		}
 15496  		if mem != x2.Args[1] {
 15497  			break
 15498  		}
 15499  		o0 := o1.Args[1]
 15500  		if o0.Op != OpPPC64OR {
 15501  			break
 15502  		}
 15503  		if o0.Type != t {
 15504  			break
 15505  		}
 15506  		_ = o0.Args[1]
 15507  		s0 := o0.Args[0]
 15508  		if s0.Op != OpPPC64SLDconst {
 15509  			break
 15510  		}
 15511  		if s0.AuxInt != 8 {
 15512  			break
 15513  		}
 15514  		x1 := s0.Args[0]
 15515  		if x1.Op != OpPPC64MOVBZload {
 15516  			break
 15517  		}
 15518  		i1 := x1.AuxInt
 15519  		if x1.Aux != s {
 15520  			break
 15521  		}
 15522  		_ = x1.Args[1]
 15523  		if p != x1.Args[0] {
 15524  			break
 15525  		}
 15526  		if mem != x1.Args[1] {
 15527  			break
 15528  		}
 15529  		x0 := o0.Args[1]
 15530  		if x0.Op != OpPPC64MOVBZload {
 15531  			break
 15532  		}
 15533  		i0 := x0.AuxInt
 15534  		if x0.Aux != s {
 15535  			break
 15536  		}
 15537  		_ = x0.Args[1]
 15538  		if p != x0.Args[0] {
 15539  			break
 15540  		}
 15541  		if mem != x0.Args[1] {
 15542  			break
 15543  		}
 15544  		s3 := o3.Args[1]
 15545  		if s3.Op != OpPPC64SLDconst {
 15546  			break
 15547  		}
 15548  		if s3.AuxInt != 32 {
 15549  			break
 15550  		}
 15551  		x4 := s3.Args[0]
 15552  		if x4.Op != OpPPC64MOVBZload {
 15553  			break
 15554  		}
 15555  		i4 := x4.AuxInt
 15556  		if x4.Aux != s {
 15557  			break
 15558  		}
 15559  		_ = x4.Args[1]
 15560  		if p != x4.Args[0] {
 15561  			break
 15562  		}
 15563  		if mem != x4.Args[1] {
 15564  			break
 15565  		}
 15566  		s4 := o4.Args[1]
 15567  		if s4.Op != OpPPC64SLDconst {
 15568  			break
 15569  		}
 15570  		if s4.AuxInt != 40 {
 15571  			break
 15572  		}
 15573  		x5 := s4.Args[0]
 15574  		if x5.Op != OpPPC64MOVBZload {
 15575  			break
 15576  		}
 15577  		i5 := x5.AuxInt
 15578  		if x5.Aux != s {
 15579  			break
 15580  		}
 15581  		_ = x5.Args[1]
 15582  		if p != x5.Args[0] {
 15583  			break
 15584  		}
 15585  		if mem != x5.Args[1] {
 15586  			break
 15587  		}
 15588  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15589  			break
 15590  		}
 15591  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15592  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15593  		v.reset(OpCopy)
 15594  		v.AddArg(v0)
 15595  		v0.AuxInt = i0
 15596  		v0.Aux = s
 15597  		v0.AddArg(p)
 15598  		v0.AddArg(mem)
 15599  		return true
 15600  	}
 15601  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15602  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15603  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15604  	for {
 15605  		t := v.Type
 15606  		_ = v.Args[1]
 15607  		s6 := v.Args[0]
 15608  		if s6.Op != OpPPC64SLDconst {
 15609  			break
 15610  		}
 15611  		if s6.AuxInt != 56 {
 15612  			break
 15613  		}
 15614  		x7 := s6.Args[0]
 15615  		if x7.Op != OpPPC64MOVBZload {
 15616  			break
 15617  		}
 15618  		i7 := x7.AuxInt
 15619  		s := x7.Aux
 15620  		_ = x7.Args[1]
 15621  		p := x7.Args[0]
 15622  		mem := x7.Args[1]
 15623  		o5 := v.Args[1]
 15624  		if o5.Op != OpPPC64OR {
 15625  			break
 15626  		}
 15627  		if o5.Type != t {
 15628  			break
 15629  		}
 15630  		_ = o5.Args[1]
 15631  		s5 := o5.Args[0]
 15632  		if s5.Op != OpPPC64SLDconst {
 15633  			break
 15634  		}
 15635  		if s5.AuxInt != 48 {
 15636  			break
 15637  		}
 15638  		x6 := s5.Args[0]
 15639  		if x6.Op != OpPPC64MOVBZload {
 15640  			break
 15641  		}
 15642  		i6 := x6.AuxInt
 15643  		if x6.Aux != s {
 15644  			break
 15645  		}
 15646  		_ = x6.Args[1]
 15647  		if p != x6.Args[0] {
 15648  			break
 15649  		}
 15650  		if mem != x6.Args[1] {
 15651  			break
 15652  		}
 15653  		o4 := o5.Args[1]
 15654  		if o4.Op != OpPPC64OR {
 15655  			break
 15656  		}
 15657  		if o4.Type != t {
 15658  			break
 15659  		}
 15660  		_ = o4.Args[1]
 15661  		o3 := o4.Args[0]
 15662  		if o3.Op != OpPPC64OR {
 15663  			break
 15664  		}
 15665  		if o3.Type != t {
 15666  			break
 15667  		}
 15668  		_ = o3.Args[1]
 15669  		o2 := o3.Args[0]
 15670  		if o2.Op != OpPPC64OR {
 15671  			break
 15672  		}
 15673  		if o2.Type != t {
 15674  			break
 15675  		}
 15676  		_ = o2.Args[1]
 15677  		s2 := o2.Args[0]
 15678  		if s2.Op != OpPPC64SLDconst {
 15679  			break
 15680  		}
 15681  		if s2.AuxInt != 24 {
 15682  			break
 15683  		}
 15684  		x3 := s2.Args[0]
 15685  		if x3.Op != OpPPC64MOVBZload {
 15686  			break
 15687  		}
 15688  		i3 := x3.AuxInt
 15689  		if x3.Aux != s {
 15690  			break
 15691  		}
 15692  		_ = x3.Args[1]
 15693  		if p != x3.Args[0] {
 15694  			break
 15695  		}
 15696  		if mem != x3.Args[1] {
 15697  			break
 15698  		}
 15699  		o1 := o2.Args[1]
 15700  		if o1.Op != OpPPC64OR {
 15701  			break
 15702  		}
 15703  		if o1.Type != t {
 15704  			break
 15705  		}
 15706  		_ = o1.Args[1]
 15707  		s1 := o1.Args[0]
 15708  		if s1.Op != OpPPC64SLDconst {
 15709  			break
 15710  		}
 15711  		if s1.AuxInt != 16 {
 15712  			break
 15713  		}
 15714  		x2 := s1.Args[0]
 15715  		if x2.Op != OpPPC64MOVBZload {
 15716  			break
 15717  		}
 15718  		i2 := x2.AuxInt
 15719  		if x2.Aux != s {
 15720  			break
 15721  		}
 15722  		_ = x2.Args[1]
 15723  		if p != x2.Args[0] {
 15724  			break
 15725  		}
 15726  		if mem != x2.Args[1] {
 15727  			break
 15728  		}
 15729  		o0 := o1.Args[1]
 15730  		if o0.Op != OpPPC64OR {
 15731  			break
 15732  		}
 15733  		if o0.Type != t {
 15734  			break
 15735  		}
 15736  		_ = o0.Args[1]
 15737  		x0 := o0.Args[0]
 15738  		if x0.Op != OpPPC64MOVBZload {
 15739  			break
 15740  		}
 15741  		i0 := x0.AuxInt
 15742  		if x0.Aux != s {
 15743  			break
 15744  		}
 15745  		_ = x0.Args[1]
 15746  		if p != x0.Args[0] {
 15747  			break
 15748  		}
 15749  		if mem != x0.Args[1] {
 15750  			break
 15751  		}
 15752  		s0 := o0.Args[1]
 15753  		if s0.Op != OpPPC64SLDconst {
 15754  			break
 15755  		}
 15756  		if s0.AuxInt != 8 {
 15757  			break
 15758  		}
 15759  		x1 := s0.Args[0]
 15760  		if x1.Op != OpPPC64MOVBZload {
 15761  			break
 15762  		}
 15763  		i1 := x1.AuxInt
 15764  		if x1.Aux != s {
 15765  			break
 15766  		}
 15767  		_ = x1.Args[1]
 15768  		if p != x1.Args[0] {
 15769  			break
 15770  		}
 15771  		if mem != x1.Args[1] {
 15772  			break
 15773  		}
 15774  		s3 := o3.Args[1]
 15775  		if s3.Op != OpPPC64SLDconst {
 15776  			break
 15777  		}
 15778  		if s3.AuxInt != 32 {
 15779  			break
 15780  		}
 15781  		x4 := s3.Args[0]
 15782  		if x4.Op != OpPPC64MOVBZload {
 15783  			break
 15784  		}
 15785  		i4 := x4.AuxInt
 15786  		if x4.Aux != s {
 15787  			break
 15788  		}
 15789  		_ = x4.Args[1]
 15790  		if p != x4.Args[0] {
 15791  			break
 15792  		}
 15793  		if mem != x4.Args[1] {
 15794  			break
 15795  		}
 15796  		s4 := o4.Args[1]
 15797  		if s4.Op != OpPPC64SLDconst {
 15798  			break
 15799  		}
 15800  		if s4.AuxInt != 40 {
 15801  			break
 15802  		}
 15803  		x5 := s4.Args[0]
 15804  		if x5.Op != OpPPC64MOVBZload {
 15805  			break
 15806  		}
 15807  		i5 := x5.AuxInt
 15808  		if x5.Aux != s {
 15809  			break
 15810  		}
 15811  		_ = x5.Args[1]
 15812  		if p != x5.Args[0] {
 15813  			break
 15814  		}
 15815  		if mem != x5.Args[1] {
 15816  			break
 15817  		}
 15818  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15819  			break
 15820  		}
 15821  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15822  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15823  		v.reset(OpCopy)
 15824  		v.AddArg(v0)
 15825  		v0.AuxInt = i0
 15826  		v0.Aux = s
 15827  		v0.AddArg(p)
 15828  		v0.AddArg(mem)
 15829  		return true
 15830  	}
 15831  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15832  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15833  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15834  	for {
 15835  		t := v.Type
 15836  		_ = v.Args[1]
 15837  		s6 := v.Args[0]
 15838  		if s6.Op != OpPPC64SLDconst {
 15839  			break
 15840  		}
 15841  		if s6.AuxInt != 56 {
 15842  			break
 15843  		}
 15844  		x7 := s6.Args[0]
 15845  		if x7.Op != OpPPC64MOVBZload {
 15846  			break
 15847  		}
 15848  		i7 := x7.AuxInt
 15849  		s := x7.Aux
 15850  		_ = x7.Args[1]
 15851  		p := x7.Args[0]
 15852  		mem := x7.Args[1]
 15853  		o5 := v.Args[1]
 15854  		if o5.Op != OpPPC64OR {
 15855  			break
 15856  		}
 15857  		if o5.Type != t {
 15858  			break
 15859  		}
 15860  		_ = o5.Args[1]
 15861  		s5 := o5.Args[0]
 15862  		if s5.Op != OpPPC64SLDconst {
 15863  			break
 15864  		}
 15865  		if s5.AuxInt != 48 {
 15866  			break
 15867  		}
 15868  		x6 := s5.Args[0]
 15869  		if x6.Op != OpPPC64MOVBZload {
 15870  			break
 15871  		}
 15872  		i6 := x6.AuxInt
 15873  		if x6.Aux != s {
 15874  			break
 15875  		}
 15876  		_ = x6.Args[1]
 15877  		if p != x6.Args[0] {
 15878  			break
 15879  		}
 15880  		if mem != x6.Args[1] {
 15881  			break
 15882  		}
 15883  		o4 := o5.Args[1]
 15884  		if o4.Op != OpPPC64OR {
 15885  			break
 15886  		}
 15887  		if o4.Type != t {
 15888  			break
 15889  		}
 15890  		_ = o4.Args[1]
 15891  		o3 := o4.Args[0]
 15892  		if o3.Op != OpPPC64OR {
 15893  			break
 15894  		}
 15895  		if o3.Type != t {
 15896  			break
 15897  		}
 15898  		_ = o3.Args[1]
 15899  		o2 := o3.Args[0]
 15900  		if o2.Op != OpPPC64OR {
 15901  			break
 15902  		}
 15903  		if o2.Type != t {
 15904  			break
 15905  		}
 15906  		_ = o2.Args[1]
 15907  		s2 := o2.Args[0]
 15908  		if s2.Op != OpPPC64SLDconst {
 15909  			break
 15910  		}
 15911  		if s2.AuxInt != 24 {
 15912  			break
 15913  		}
 15914  		x3 := s2.Args[0]
 15915  		if x3.Op != OpPPC64MOVBZload {
 15916  			break
 15917  		}
 15918  		i3 := x3.AuxInt
 15919  		if x3.Aux != s {
 15920  			break
 15921  		}
 15922  		_ = x3.Args[1]
 15923  		if p != x3.Args[0] {
 15924  			break
 15925  		}
 15926  		if mem != x3.Args[1] {
 15927  			break
 15928  		}
 15929  		o1 := o2.Args[1]
 15930  		if o1.Op != OpPPC64OR {
 15931  			break
 15932  		}
 15933  		if o1.Type != t {
 15934  			break
 15935  		}
 15936  		_ = o1.Args[1]
 15937  		o0 := o1.Args[0]
 15938  		if o0.Op != OpPPC64OR {
 15939  			break
 15940  		}
 15941  		if o0.Type != t {
 15942  			break
 15943  		}
 15944  		_ = o0.Args[1]
 15945  		s0 := o0.Args[0]
 15946  		if s0.Op != OpPPC64SLDconst {
 15947  			break
 15948  		}
 15949  		if s0.AuxInt != 8 {
 15950  			break
 15951  		}
 15952  		x1 := s0.Args[0]
 15953  		if x1.Op != OpPPC64MOVBZload {
 15954  			break
 15955  		}
 15956  		i1 := x1.AuxInt
 15957  		if x1.Aux != s {
 15958  			break
 15959  		}
 15960  		_ = x1.Args[1]
 15961  		if p != x1.Args[0] {
 15962  			break
 15963  		}
 15964  		if mem != x1.Args[1] {
 15965  			break
 15966  		}
 15967  		x0 := o0.Args[1]
 15968  		if x0.Op != OpPPC64MOVBZload {
 15969  			break
 15970  		}
 15971  		i0 := x0.AuxInt
 15972  		if x0.Aux != s {
 15973  			break
 15974  		}
 15975  		_ = x0.Args[1]
 15976  		if p != x0.Args[0] {
 15977  			break
 15978  		}
 15979  		if mem != x0.Args[1] {
 15980  			break
 15981  		}
 15982  		s1 := o1.Args[1]
 15983  		if s1.Op != OpPPC64SLDconst {
 15984  			break
 15985  		}
 15986  		if s1.AuxInt != 16 {
 15987  			break
 15988  		}
 15989  		x2 := s1.Args[0]
 15990  		if x2.Op != OpPPC64MOVBZload {
 15991  			break
 15992  		}
 15993  		i2 := x2.AuxInt
 15994  		if x2.Aux != s {
 15995  			break
 15996  		}
 15997  		_ = x2.Args[1]
 15998  		if p != x2.Args[0] {
 15999  			break
 16000  		}
 16001  		if mem != x2.Args[1] {
 16002  			break
 16003  		}
 16004  		s3 := o3.Args[1]
 16005  		if s3.Op != OpPPC64SLDconst {
 16006  			break
 16007  		}
 16008  		if s3.AuxInt != 32 {
 16009  			break
 16010  		}
 16011  		x4 := s3.Args[0]
 16012  		if x4.Op != OpPPC64MOVBZload {
 16013  			break
 16014  		}
 16015  		i4 := x4.AuxInt
 16016  		if x4.Aux != s {
 16017  			break
 16018  		}
 16019  		_ = x4.Args[1]
 16020  		if p != x4.Args[0] {
 16021  			break
 16022  		}
 16023  		if mem != x4.Args[1] {
 16024  			break
 16025  		}
 16026  		s4 := o4.Args[1]
 16027  		if s4.Op != OpPPC64SLDconst {
 16028  			break
 16029  		}
 16030  		if s4.AuxInt != 40 {
 16031  			break
 16032  		}
 16033  		x5 := s4.Args[0]
 16034  		if x5.Op != OpPPC64MOVBZload {
 16035  			break
 16036  		}
 16037  		i5 := x5.AuxInt
 16038  		if x5.Aux != s {
 16039  			break
 16040  		}
 16041  		_ = x5.Args[1]
 16042  		if p != x5.Args[0] {
 16043  			break
 16044  		}
 16045  		if mem != x5.Args[1] {
 16046  			break
 16047  		}
 16048  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16049  			break
 16050  		}
 16051  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16052  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16053  		v.reset(OpCopy)
 16054  		v.AddArg(v0)
 16055  		v0.AuxInt = i0
 16056  		v0.Aux = s
 16057  		v0.AddArg(p)
 16058  		v0.AddArg(mem)
 16059  		return true
 16060  	}
 16061  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16062  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16063  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16064  	for {
 16065  		t := v.Type
 16066  		_ = v.Args[1]
 16067  		s6 := v.Args[0]
 16068  		if s6.Op != OpPPC64SLDconst {
 16069  			break
 16070  		}
 16071  		if s6.AuxInt != 56 {
 16072  			break
 16073  		}
 16074  		x7 := s6.Args[0]
 16075  		if x7.Op != OpPPC64MOVBZload {
 16076  			break
 16077  		}
 16078  		i7 := x7.AuxInt
 16079  		s := x7.Aux
 16080  		_ = x7.Args[1]
 16081  		p := x7.Args[0]
 16082  		mem := x7.Args[1]
 16083  		o5 := v.Args[1]
 16084  		if o5.Op != OpPPC64OR {
 16085  			break
 16086  		}
 16087  		if o5.Type != t {
 16088  			break
 16089  		}
 16090  		_ = o5.Args[1]
 16091  		s5 := o5.Args[0]
 16092  		if s5.Op != OpPPC64SLDconst {
 16093  			break
 16094  		}
 16095  		if s5.AuxInt != 48 {
 16096  			break
 16097  		}
 16098  		x6 := s5.Args[0]
 16099  		if x6.Op != OpPPC64MOVBZload {
 16100  			break
 16101  		}
 16102  		i6 := x6.AuxInt
 16103  		if x6.Aux != s {
 16104  			break
 16105  		}
 16106  		_ = x6.Args[1]
 16107  		if p != x6.Args[0] {
 16108  			break
 16109  		}
 16110  		if mem != x6.Args[1] {
 16111  			break
 16112  		}
 16113  		o4 := o5.Args[1]
 16114  		if o4.Op != OpPPC64OR {
 16115  			break
 16116  		}
 16117  		if o4.Type != t {
 16118  			break
 16119  		}
 16120  		_ = o4.Args[1]
 16121  		o3 := o4.Args[0]
 16122  		if o3.Op != OpPPC64OR {
 16123  			break
 16124  		}
 16125  		if o3.Type != t {
 16126  			break
 16127  		}
 16128  		_ = o3.Args[1]
 16129  		o2 := o3.Args[0]
 16130  		if o2.Op != OpPPC64OR {
 16131  			break
 16132  		}
 16133  		if o2.Type != t {
 16134  			break
 16135  		}
 16136  		_ = o2.Args[1]
 16137  		s2 := o2.Args[0]
 16138  		if s2.Op != OpPPC64SLDconst {
 16139  			break
 16140  		}
 16141  		if s2.AuxInt != 24 {
 16142  			break
 16143  		}
 16144  		x3 := s2.Args[0]
 16145  		if x3.Op != OpPPC64MOVBZload {
 16146  			break
 16147  		}
 16148  		i3 := x3.AuxInt
 16149  		if x3.Aux != s {
 16150  			break
 16151  		}
 16152  		_ = x3.Args[1]
 16153  		if p != x3.Args[0] {
 16154  			break
 16155  		}
 16156  		if mem != x3.Args[1] {
 16157  			break
 16158  		}
 16159  		o1 := o2.Args[1]
 16160  		if o1.Op != OpPPC64OR {
 16161  			break
 16162  		}
 16163  		if o1.Type != t {
 16164  			break
 16165  		}
 16166  		_ = o1.Args[1]
 16167  		o0 := o1.Args[0]
 16168  		if o0.Op != OpPPC64OR {
 16169  			break
 16170  		}
 16171  		if o0.Type != t {
 16172  			break
 16173  		}
 16174  		_ = o0.Args[1]
 16175  		x0 := o0.Args[0]
 16176  		if x0.Op != OpPPC64MOVBZload {
 16177  			break
 16178  		}
 16179  		i0 := x0.AuxInt
 16180  		if x0.Aux != s {
 16181  			break
 16182  		}
 16183  		_ = x0.Args[1]
 16184  		if p != x0.Args[0] {
 16185  			break
 16186  		}
 16187  		if mem != x0.Args[1] {
 16188  			break
 16189  		}
 16190  		s0 := o0.Args[1]
 16191  		if s0.Op != OpPPC64SLDconst {
 16192  			break
 16193  		}
 16194  		if s0.AuxInt != 8 {
 16195  			break
 16196  		}
 16197  		x1 := s0.Args[0]
 16198  		if x1.Op != OpPPC64MOVBZload {
 16199  			break
 16200  		}
 16201  		i1 := x1.AuxInt
 16202  		if x1.Aux != s {
 16203  			break
 16204  		}
 16205  		_ = x1.Args[1]
 16206  		if p != x1.Args[0] {
 16207  			break
 16208  		}
 16209  		if mem != x1.Args[1] {
 16210  			break
 16211  		}
 16212  		s1 := o1.Args[1]
 16213  		if s1.Op != OpPPC64SLDconst {
 16214  			break
 16215  		}
 16216  		if s1.AuxInt != 16 {
 16217  			break
 16218  		}
 16219  		x2 := s1.Args[0]
 16220  		if x2.Op != OpPPC64MOVBZload {
 16221  			break
 16222  		}
 16223  		i2 := x2.AuxInt
 16224  		if x2.Aux != s {
 16225  			break
 16226  		}
 16227  		_ = x2.Args[1]
 16228  		if p != x2.Args[0] {
 16229  			break
 16230  		}
 16231  		if mem != x2.Args[1] {
 16232  			break
 16233  		}
 16234  		s3 := o3.Args[1]
 16235  		if s3.Op != OpPPC64SLDconst {
 16236  			break
 16237  		}
 16238  		if s3.AuxInt != 32 {
 16239  			break
 16240  		}
 16241  		x4 := s3.Args[0]
 16242  		if x4.Op != OpPPC64MOVBZload {
 16243  			break
 16244  		}
 16245  		i4 := x4.AuxInt
 16246  		if x4.Aux != s {
 16247  			break
 16248  		}
 16249  		_ = x4.Args[1]
 16250  		if p != x4.Args[0] {
 16251  			break
 16252  		}
 16253  		if mem != x4.Args[1] {
 16254  			break
 16255  		}
 16256  		s4 := o4.Args[1]
 16257  		if s4.Op != OpPPC64SLDconst {
 16258  			break
 16259  		}
 16260  		if s4.AuxInt != 40 {
 16261  			break
 16262  		}
 16263  		x5 := s4.Args[0]
 16264  		if x5.Op != OpPPC64MOVBZload {
 16265  			break
 16266  		}
 16267  		i5 := x5.AuxInt
 16268  		if x5.Aux != s {
 16269  			break
 16270  		}
 16271  		_ = x5.Args[1]
 16272  		if p != x5.Args[0] {
 16273  			break
 16274  		}
 16275  		if mem != x5.Args[1] {
 16276  			break
 16277  		}
 16278  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16279  			break
 16280  		}
 16281  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16282  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16283  		v.reset(OpCopy)
 16284  		v.AddArg(v0)
 16285  		v0.AuxInt = i0
 16286  		v0.Aux = s
 16287  		v0.AddArg(p)
 16288  		v0.AddArg(mem)
 16289  		return true
 16290  	}
 16291  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16292  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16293  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16294  	for {
 16295  		t := v.Type
 16296  		_ = v.Args[1]
 16297  		s6 := v.Args[0]
 16298  		if s6.Op != OpPPC64SLDconst {
 16299  			break
 16300  		}
 16301  		if s6.AuxInt != 56 {
 16302  			break
 16303  		}
 16304  		x7 := s6.Args[0]
 16305  		if x7.Op != OpPPC64MOVBZload {
 16306  			break
 16307  		}
 16308  		i7 := x7.AuxInt
 16309  		s := x7.Aux
 16310  		_ = x7.Args[1]
 16311  		p := x7.Args[0]
 16312  		mem := x7.Args[1]
 16313  		o5 := v.Args[1]
 16314  		if o5.Op != OpPPC64OR {
 16315  			break
 16316  		}
 16317  		if o5.Type != t {
 16318  			break
 16319  		}
 16320  		_ = o5.Args[1]
 16321  		s5 := o5.Args[0]
 16322  		if s5.Op != OpPPC64SLDconst {
 16323  			break
 16324  		}
 16325  		if s5.AuxInt != 48 {
 16326  			break
 16327  		}
 16328  		x6 := s5.Args[0]
 16329  		if x6.Op != OpPPC64MOVBZload {
 16330  			break
 16331  		}
 16332  		i6 := x6.AuxInt
 16333  		if x6.Aux != s {
 16334  			break
 16335  		}
 16336  		_ = x6.Args[1]
 16337  		if p != x6.Args[0] {
 16338  			break
 16339  		}
 16340  		if mem != x6.Args[1] {
 16341  			break
 16342  		}
 16343  		o4 := o5.Args[1]
 16344  		if o4.Op != OpPPC64OR {
 16345  			break
 16346  		}
 16347  		if o4.Type != t {
 16348  			break
 16349  		}
 16350  		_ = o4.Args[1]
 16351  		o3 := o4.Args[0]
 16352  		if o3.Op != OpPPC64OR {
 16353  			break
 16354  		}
 16355  		if o3.Type != t {
 16356  			break
 16357  		}
 16358  		_ = o3.Args[1]
 16359  		o2 := o3.Args[0]
 16360  		if o2.Op != OpPPC64OR {
 16361  			break
 16362  		}
 16363  		if o2.Type != t {
 16364  			break
 16365  		}
 16366  		_ = o2.Args[1]
 16367  		o1 := o2.Args[0]
 16368  		if o1.Op != OpPPC64OR {
 16369  			break
 16370  		}
 16371  		if o1.Type != t {
 16372  			break
 16373  		}
 16374  		_ = o1.Args[1]
 16375  		s1 := o1.Args[0]
 16376  		if s1.Op != OpPPC64SLDconst {
 16377  			break
 16378  		}
 16379  		if s1.AuxInt != 16 {
 16380  			break
 16381  		}
 16382  		x2 := s1.Args[0]
 16383  		if x2.Op != OpPPC64MOVBZload {
 16384  			break
 16385  		}
 16386  		i2 := x2.AuxInt
 16387  		if x2.Aux != s {
 16388  			break
 16389  		}
 16390  		_ = x2.Args[1]
 16391  		if p != x2.Args[0] {
 16392  			break
 16393  		}
 16394  		if mem != x2.Args[1] {
 16395  			break
 16396  		}
 16397  		o0 := o1.Args[1]
 16398  		if o0.Op != OpPPC64OR {
 16399  			break
 16400  		}
 16401  		if o0.Type != t {
 16402  			break
 16403  		}
 16404  		_ = o0.Args[1]
 16405  		s0 := o0.Args[0]
 16406  		if s0.Op != OpPPC64SLDconst {
 16407  			break
 16408  		}
 16409  		if s0.AuxInt != 8 {
 16410  			break
 16411  		}
 16412  		x1 := s0.Args[0]
 16413  		if x1.Op != OpPPC64MOVBZload {
 16414  			break
 16415  		}
 16416  		i1 := x1.AuxInt
 16417  		if x1.Aux != s {
 16418  			break
 16419  		}
 16420  		_ = x1.Args[1]
 16421  		if p != x1.Args[0] {
 16422  			break
 16423  		}
 16424  		if mem != x1.Args[1] {
 16425  			break
 16426  		}
 16427  		x0 := o0.Args[1]
 16428  		if x0.Op != OpPPC64MOVBZload {
 16429  			break
 16430  		}
 16431  		i0 := x0.AuxInt
 16432  		if x0.Aux != s {
 16433  			break
 16434  		}
 16435  		_ = x0.Args[1]
 16436  		if p != x0.Args[0] {
 16437  			break
 16438  		}
 16439  		if mem != x0.Args[1] {
 16440  			break
 16441  		}
 16442  		s2 := o2.Args[1]
 16443  		if s2.Op != OpPPC64SLDconst {
 16444  			break
 16445  		}
 16446  		if s2.AuxInt != 24 {
 16447  			break
 16448  		}
 16449  		x3 := s2.Args[0]
 16450  		if x3.Op != OpPPC64MOVBZload {
 16451  			break
 16452  		}
 16453  		i3 := x3.AuxInt
 16454  		if x3.Aux != s {
 16455  			break
 16456  		}
 16457  		_ = x3.Args[1]
 16458  		if p != x3.Args[0] {
 16459  			break
 16460  		}
 16461  		if mem != x3.Args[1] {
 16462  			break
 16463  		}
 16464  		s3 := o3.Args[1]
 16465  		if s3.Op != OpPPC64SLDconst {
 16466  			break
 16467  		}
 16468  		if s3.AuxInt != 32 {
 16469  			break
 16470  		}
 16471  		x4 := s3.Args[0]
 16472  		if x4.Op != OpPPC64MOVBZload {
 16473  			break
 16474  		}
 16475  		i4 := x4.AuxInt
 16476  		if x4.Aux != s {
 16477  			break
 16478  		}
 16479  		_ = x4.Args[1]
 16480  		if p != x4.Args[0] {
 16481  			break
 16482  		}
 16483  		if mem != x4.Args[1] {
 16484  			break
 16485  		}
 16486  		s4 := o4.Args[1]
 16487  		if s4.Op != OpPPC64SLDconst {
 16488  			break
 16489  		}
 16490  		if s4.AuxInt != 40 {
 16491  			break
 16492  		}
 16493  		x5 := s4.Args[0]
 16494  		if x5.Op != OpPPC64MOVBZload {
 16495  			break
 16496  		}
 16497  		i5 := x5.AuxInt
 16498  		if x5.Aux != s {
 16499  			break
 16500  		}
 16501  		_ = x5.Args[1]
 16502  		if p != x5.Args[0] {
 16503  			break
 16504  		}
 16505  		if mem != x5.Args[1] {
 16506  			break
 16507  		}
 16508  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16509  			break
 16510  		}
 16511  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16512  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16513  		v.reset(OpCopy)
 16514  		v.AddArg(v0)
 16515  		v0.AuxInt = i0
 16516  		v0.Aux = s
 16517  		v0.AddArg(p)
 16518  		v0.AddArg(mem)
 16519  		return true
 16520  	}
 16521  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16522  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16523  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16524  	for {
 16525  		t := v.Type
 16526  		_ = v.Args[1]
 16527  		s6 := v.Args[0]
 16528  		if s6.Op != OpPPC64SLDconst {
 16529  			break
 16530  		}
 16531  		if s6.AuxInt != 56 {
 16532  			break
 16533  		}
 16534  		x7 := s6.Args[0]
 16535  		if x7.Op != OpPPC64MOVBZload {
 16536  			break
 16537  		}
 16538  		i7 := x7.AuxInt
 16539  		s := x7.Aux
 16540  		_ = x7.Args[1]
 16541  		p := x7.Args[0]
 16542  		mem := x7.Args[1]
 16543  		o5 := v.Args[1]
 16544  		if o5.Op != OpPPC64OR {
 16545  			break
 16546  		}
 16547  		if o5.Type != t {
 16548  			break
 16549  		}
 16550  		_ = o5.Args[1]
 16551  		s5 := o5.Args[0]
 16552  		if s5.Op != OpPPC64SLDconst {
 16553  			break
 16554  		}
 16555  		if s5.AuxInt != 48 {
 16556  			break
 16557  		}
 16558  		x6 := s5.Args[0]
 16559  		if x6.Op != OpPPC64MOVBZload {
 16560  			break
 16561  		}
 16562  		i6 := x6.AuxInt
 16563  		if x6.Aux != s {
 16564  			break
 16565  		}
 16566  		_ = x6.Args[1]
 16567  		if p != x6.Args[0] {
 16568  			break
 16569  		}
 16570  		if mem != x6.Args[1] {
 16571  			break
 16572  		}
 16573  		o4 := o5.Args[1]
 16574  		if o4.Op != OpPPC64OR {
 16575  			break
 16576  		}
 16577  		if o4.Type != t {
 16578  			break
 16579  		}
 16580  		_ = o4.Args[1]
 16581  		o3 := o4.Args[0]
 16582  		if o3.Op != OpPPC64OR {
 16583  			break
 16584  		}
 16585  		if o3.Type != t {
 16586  			break
 16587  		}
 16588  		_ = o3.Args[1]
 16589  		o2 := o3.Args[0]
 16590  		if o2.Op != OpPPC64OR {
 16591  			break
 16592  		}
 16593  		if o2.Type != t {
 16594  			break
 16595  		}
 16596  		_ = o2.Args[1]
 16597  		o1 := o2.Args[0]
 16598  		if o1.Op != OpPPC64OR {
 16599  			break
 16600  		}
 16601  		if o1.Type != t {
 16602  			break
 16603  		}
 16604  		_ = o1.Args[1]
 16605  		s1 := o1.Args[0]
 16606  		if s1.Op != OpPPC64SLDconst {
 16607  			break
 16608  		}
 16609  		if s1.AuxInt != 16 {
 16610  			break
 16611  		}
 16612  		x2 := s1.Args[0]
 16613  		if x2.Op != OpPPC64MOVBZload {
 16614  			break
 16615  		}
 16616  		i2 := x2.AuxInt
 16617  		if x2.Aux != s {
 16618  			break
 16619  		}
 16620  		_ = x2.Args[1]
 16621  		if p != x2.Args[0] {
 16622  			break
 16623  		}
 16624  		if mem != x2.Args[1] {
 16625  			break
 16626  		}
 16627  		o0 := o1.Args[1]
 16628  		if o0.Op != OpPPC64OR {
 16629  			break
 16630  		}
 16631  		if o0.Type != t {
 16632  			break
 16633  		}
 16634  		_ = o0.Args[1]
 16635  		x0 := o0.Args[0]
 16636  		if x0.Op != OpPPC64MOVBZload {
 16637  			break
 16638  		}
 16639  		i0 := x0.AuxInt
 16640  		if x0.Aux != s {
 16641  			break
 16642  		}
 16643  		_ = x0.Args[1]
 16644  		if p != x0.Args[0] {
 16645  			break
 16646  		}
 16647  		if mem != x0.Args[1] {
 16648  			break
 16649  		}
 16650  		s0 := o0.Args[1]
 16651  		if s0.Op != OpPPC64SLDconst {
 16652  			break
 16653  		}
 16654  		if s0.AuxInt != 8 {
 16655  			break
 16656  		}
 16657  		x1 := s0.Args[0]
 16658  		if x1.Op != OpPPC64MOVBZload {
 16659  			break
 16660  		}
 16661  		i1 := x1.AuxInt
 16662  		if x1.Aux != s {
 16663  			break
 16664  		}
 16665  		_ = x1.Args[1]
 16666  		if p != x1.Args[0] {
 16667  			break
 16668  		}
 16669  		if mem != x1.Args[1] {
 16670  			break
 16671  		}
 16672  		s2 := o2.Args[1]
 16673  		if s2.Op != OpPPC64SLDconst {
 16674  			break
 16675  		}
 16676  		if s2.AuxInt != 24 {
 16677  			break
 16678  		}
 16679  		x3 := s2.Args[0]
 16680  		if x3.Op != OpPPC64MOVBZload {
 16681  			break
 16682  		}
 16683  		i3 := x3.AuxInt
 16684  		if x3.Aux != s {
 16685  			break
 16686  		}
 16687  		_ = x3.Args[1]
 16688  		if p != x3.Args[0] {
 16689  			break
 16690  		}
 16691  		if mem != x3.Args[1] {
 16692  			break
 16693  		}
 16694  		s3 := o3.Args[1]
 16695  		if s3.Op != OpPPC64SLDconst {
 16696  			break
 16697  		}
 16698  		if s3.AuxInt != 32 {
 16699  			break
 16700  		}
 16701  		x4 := s3.Args[0]
 16702  		if x4.Op != OpPPC64MOVBZload {
 16703  			break
 16704  		}
 16705  		i4 := x4.AuxInt
 16706  		if x4.Aux != s {
 16707  			break
 16708  		}
 16709  		_ = x4.Args[1]
 16710  		if p != x4.Args[0] {
 16711  			break
 16712  		}
 16713  		if mem != x4.Args[1] {
 16714  			break
 16715  		}
 16716  		s4 := o4.Args[1]
 16717  		if s4.Op != OpPPC64SLDconst {
 16718  			break
 16719  		}
 16720  		if s4.AuxInt != 40 {
 16721  			break
 16722  		}
 16723  		x5 := s4.Args[0]
 16724  		if x5.Op != OpPPC64MOVBZload {
 16725  			break
 16726  		}
 16727  		i5 := x5.AuxInt
 16728  		if x5.Aux != s {
 16729  			break
 16730  		}
 16731  		_ = x5.Args[1]
 16732  		if p != x5.Args[0] {
 16733  			break
 16734  		}
 16735  		if mem != x5.Args[1] {
 16736  			break
 16737  		}
 16738  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16739  			break
 16740  		}
 16741  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16742  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16743  		v.reset(OpCopy)
 16744  		v.AddArg(v0)
 16745  		v0.AuxInt = i0
 16746  		v0.Aux = s
 16747  		v0.AddArg(p)
 16748  		v0.AddArg(mem)
 16749  		return true
 16750  	}
 16751  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16752  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16753  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16754  	for {
 16755  		t := v.Type
 16756  		_ = v.Args[1]
 16757  		s6 := v.Args[0]
 16758  		if s6.Op != OpPPC64SLDconst {
 16759  			break
 16760  		}
 16761  		if s6.AuxInt != 56 {
 16762  			break
 16763  		}
 16764  		x7 := s6.Args[0]
 16765  		if x7.Op != OpPPC64MOVBZload {
 16766  			break
 16767  		}
 16768  		i7 := x7.AuxInt
 16769  		s := x7.Aux
 16770  		_ = x7.Args[1]
 16771  		p := x7.Args[0]
 16772  		mem := x7.Args[1]
 16773  		o5 := v.Args[1]
 16774  		if o5.Op != OpPPC64OR {
 16775  			break
 16776  		}
 16777  		if o5.Type != t {
 16778  			break
 16779  		}
 16780  		_ = o5.Args[1]
 16781  		s5 := o5.Args[0]
 16782  		if s5.Op != OpPPC64SLDconst {
 16783  			break
 16784  		}
 16785  		if s5.AuxInt != 48 {
 16786  			break
 16787  		}
 16788  		x6 := s5.Args[0]
 16789  		if x6.Op != OpPPC64MOVBZload {
 16790  			break
 16791  		}
 16792  		i6 := x6.AuxInt
 16793  		if x6.Aux != s {
 16794  			break
 16795  		}
 16796  		_ = x6.Args[1]
 16797  		if p != x6.Args[0] {
 16798  			break
 16799  		}
 16800  		if mem != x6.Args[1] {
 16801  			break
 16802  		}
 16803  		o4 := o5.Args[1]
 16804  		if o4.Op != OpPPC64OR {
 16805  			break
 16806  		}
 16807  		if o4.Type != t {
 16808  			break
 16809  		}
 16810  		_ = o4.Args[1]
 16811  		o3 := o4.Args[0]
 16812  		if o3.Op != OpPPC64OR {
 16813  			break
 16814  		}
 16815  		if o3.Type != t {
 16816  			break
 16817  		}
 16818  		_ = o3.Args[1]
 16819  		o2 := o3.Args[0]
 16820  		if o2.Op != OpPPC64OR {
 16821  			break
 16822  		}
 16823  		if o2.Type != t {
 16824  			break
 16825  		}
 16826  		_ = o2.Args[1]
 16827  		o1 := o2.Args[0]
 16828  		if o1.Op != OpPPC64OR {
 16829  			break
 16830  		}
 16831  		if o1.Type != t {
 16832  			break
 16833  		}
 16834  		_ = o1.Args[1]
 16835  		o0 := o1.Args[0]
 16836  		if o0.Op != OpPPC64OR {
 16837  			break
 16838  		}
 16839  		if o0.Type != t {
 16840  			break
 16841  		}
 16842  		_ = o0.Args[1]
 16843  		s0 := o0.Args[0]
 16844  		if s0.Op != OpPPC64SLDconst {
 16845  			break
 16846  		}
 16847  		if s0.AuxInt != 8 {
 16848  			break
 16849  		}
 16850  		x1 := s0.Args[0]
 16851  		if x1.Op != OpPPC64MOVBZload {
 16852  			break
 16853  		}
 16854  		i1 := x1.AuxInt
 16855  		if x1.Aux != s {
 16856  			break
 16857  		}
 16858  		_ = x1.Args[1]
 16859  		if p != x1.Args[0] {
 16860  			break
 16861  		}
 16862  		if mem != x1.Args[1] {
 16863  			break
 16864  		}
 16865  		x0 := o0.Args[1]
 16866  		if x0.Op != OpPPC64MOVBZload {
 16867  			break
 16868  		}
 16869  		i0 := x0.AuxInt
 16870  		if x0.Aux != s {
 16871  			break
 16872  		}
 16873  		_ = x0.Args[1]
 16874  		if p != x0.Args[0] {
 16875  			break
 16876  		}
 16877  		if mem != x0.Args[1] {
 16878  			break
 16879  		}
 16880  		s1 := o1.Args[1]
 16881  		if s1.Op != OpPPC64SLDconst {
 16882  			break
 16883  		}
 16884  		if s1.AuxInt != 16 {
 16885  			break
 16886  		}
 16887  		x2 := s1.Args[0]
 16888  		if x2.Op != OpPPC64MOVBZload {
 16889  			break
 16890  		}
 16891  		i2 := x2.AuxInt
 16892  		if x2.Aux != s {
 16893  			break
 16894  		}
 16895  		_ = x2.Args[1]
 16896  		if p != x2.Args[0] {
 16897  			break
 16898  		}
 16899  		if mem != x2.Args[1] {
 16900  			break
 16901  		}
 16902  		s2 := o2.Args[1]
 16903  		if s2.Op != OpPPC64SLDconst {
 16904  			break
 16905  		}
 16906  		if s2.AuxInt != 24 {
 16907  			break
 16908  		}
 16909  		x3 := s2.Args[0]
 16910  		if x3.Op != OpPPC64MOVBZload {
 16911  			break
 16912  		}
 16913  		i3 := x3.AuxInt
 16914  		if x3.Aux != s {
 16915  			break
 16916  		}
 16917  		_ = x3.Args[1]
 16918  		if p != x3.Args[0] {
 16919  			break
 16920  		}
 16921  		if mem != x3.Args[1] {
 16922  			break
 16923  		}
 16924  		s3 := o3.Args[1]
 16925  		if s3.Op != OpPPC64SLDconst {
 16926  			break
 16927  		}
 16928  		if s3.AuxInt != 32 {
 16929  			break
 16930  		}
 16931  		x4 := s3.Args[0]
 16932  		if x4.Op != OpPPC64MOVBZload {
 16933  			break
 16934  		}
 16935  		i4 := x4.AuxInt
 16936  		if x4.Aux != s {
 16937  			break
 16938  		}
 16939  		_ = x4.Args[1]
 16940  		if p != x4.Args[0] {
 16941  			break
 16942  		}
 16943  		if mem != x4.Args[1] {
 16944  			break
 16945  		}
 16946  		s4 := o4.Args[1]
 16947  		if s4.Op != OpPPC64SLDconst {
 16948  			break
 16949  		}
 16950  		if s4.AuxInt != 40 {
 16951  			break
 16952  		}
 16953  		x5 := s4.Args[0]
 16954  		if x5.Op != OpPPC64MOVBZload {
 16955  			break
 16956  		}
 16957  		i5 := x5.AuxInt
 16958  		if x5.Aux != s {
 16959  			break
 16960  		}
 16961  		_ = x5.Args[1]
 16962  		if p != x5.Args[0] {
 16963  			break
 16964  		}
 16965  		if mem != x5.Args[1] {
 16966  			break
 16967  		}
 16968  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16969  			break
 16970  		}
 16971  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16972  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16973  		v.reset(OpCopy)
 16974  		v.AddArg(v0)
 16975  		v0.AuxInt = i0
 16976  		v0.Aux = s
 16977  		v0.AddArg(p)
 16978  		v0.AddArg(mem)
 16979  		return true
 16980  	}
 16981  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16982  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16983  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16984  	for {
 16985  		t := v.Type
 16986  		_ = v.Args[1]
 16987  		s6 := v.Args[0]
 16988  		if s6.Op != OpPPC64SLDconst {
 16989  			break
 16990  		}
 16991  		if s6.AuxInt != 56 {
 16992  			break
 16993  		}
 16994  		x7 := s6.Args[0]
 16995  		if x7.Op != OpPPC64MOVBZload {
 16996  			break
 16997  		}
 16998  		i7 := x7.AuxInt
 16999  		s := x7.Aux
 17000  		_ = x7.Args[1]
 17001  		p := x7.Args[0]
 17002  		mem := x7.Args[1]
 17003  		o5 := v.Args[1]
 17004  		if o5.Op != OpPPC64OR {
 17005  			break
 17006  		}
 17007  		if o5.Type != t {
 17008  			break
 17009  		}
 17010  		_ = o5.Args[1]
 17011  		s5 := o5.Args[0]
 17012  		if s5.Op != OpPPC64SLDconst {
 17013  			break
 17014  		}
 17015  		if s5.AuxInt != 48 {
 17016  			break
 17017  		}
 17018  		x6 := s5.Args[0]
 17019  		if x6.Op != OpPPC64MOVBZload {
 17020  			break
 17021  		}
 17022  		i6 := x6.AuxInt
 17023  		if x6.Aux != s {
 17024  			break
 17025  		}
 17026  		_ = x6.Args[1]
 17027  		if p != x6.Args[0] {
 17028  			break
 17029  		}
 17030  		if mem != x6.Args[1] {
 17031  			break
 17032  		}
 17033  		o4 := o5.Args[1]
 17034  		if o4.Op != OpPPC64OR {
 17035  			break
 17036  		}
 17037  		if o4.Type != t {
 17038  			break
 17039  		}
 17040  		_ = o4.Args[1]
 17041  		o3 := o4.Args[0]
 17042  		if o3.Op != OpPPC64OR {
 17043  			break
 17044  		}
 17045  		if o3.Type != t {
 17046  			break
 17047  		}
 17048  		_ = o3.Args[1]
 17049  		o2 := o3.Args[0]
 17050  		if o2.Op != OpPPC64OR {
 17051  			break
 17052  		}
 17053  		if o2.Type != t {
 17054  			break
 17055  		}
 17056  		_ = o2.Args[1]
 17057  		o1 := o2.Args[0]
 17058  		if o1.Op != OpPPC64OR {
 17059  			break
 17060  		}
 17061  		if o1.Type != t {
 17062  			break
 17063  		}
 17064  		_ = o1.Args[1]
 17065  		o0 := o1.Args[0]
 17066  		if o0.Op != OpPPC64OR {
 17067  			break
 17068  		}
 17069  		if o0.Type != t {
 17070  			break
 17071  		}
 17072  		_ = o0.Args[1]
 17073  		x0 := o0.Args[0]
 17074  		if x0.Op != OpPPC64MOVBZload {
 17075  			break
 17076  		}
 17077  		i0 := x0.AuxInt
 17078  		if x0.Aux != s {
 17079  			break
 17080  		}
 17081  		_ = x0.Args[1]
 17082  		if p != x0.Args[0] {
 17083  			break
 17084  		}
 17085  		if mem != x0.Args[1] {
 17086  			break
 17087  		}
 17088  		s0 := o0.Args[1]
 17089  		if s0.Op != OpPPC64SLDconst {
 17090  			break
 17091  		}
 17092  		if s0.AuxInt != 8 {
 17093  			break
 17094  		}
 17095  		x1 := s0.Args[0]
 17096  		if x1.Op != OpPPC64MOVBZload {
 17097  			break
 17098  		}
 17099  		i1 := x1.AuxInt
 17100  		if x1.Aux != s {
 17101  			break
 17102  		}
 17103  		_ = x1.Args[1]
 17104  		if p != x1.Args[0] {
 17105  			break
 17106  		}
 17107  		if mem != x1.Args[1] {
 17108  			break
 17109  		}
 17110  		s1 := o1.Args[1]
 17111  		if s1.Op != OpPPC64SLDconst {
 17112  			break
 17113  		}
 17114  		if s1.AuxInt != 16 {
 17115  			break
 17116  		}
 17117  		x2 := s1.Args[0]
 17118  		if x2.Op != OpPPC64MOVBZload {
 17119  			break
 17120  		}
 17121  		i2 := x2.AuxInt
 17122  		if x2.Aux != s {
 17123  			break
 17124  		}
 17125  		_ = x2.Args[1]
 17126  		if p != x2.Args[0] {
 17127  			break
 17128  		}
 17129  		if mem != x2.Args[1] {
 17130  			break
 17131  		}
 17132  		s2 := o2.Args[1]
 17133  		if s2.Op != OpPPC64SLDconst {
 17134  			break
 17135  		}
 17136  		if s2.AuxInt != 24 {
 17137  			break
 17138  		}
 17139  		x3 := s2.Args[0]
 17140  		if x3.Op != OpPPC64MOVBZload {
 17141  			break
 17142  		}
 17143  		i3 := x3.AuxInt
 17144  		if x3.Aux != s {
 17145  			break
 17146  		}
 17147  		_ = x3.Args[1]
 17148  		if p != x3.Args[0] {
 17149  			break
 17150  		}
 17151  		if mem != x3.Args[1] {
 17152  			break
 17153  		}
 17154  		s3 := o3.Args[1]
 17155  		if s3.Op != OpPPC64SLDconst {
 17156  			break
 17157  		}
 17158  		if s3.AuxInt != 32 {
 17159  			break
 17160  		}
 17161  		x4 := s3.Args[0]
 17162  		if x4.Op != OpPPC64MOVBZload {
 17163  			break
 17164  		}
 17165  		i4 := x4.AuxInt
 17166  		if x4.Aux != s {
 17167  			break
 17168  		}
 17169  		_ = x4.Args[1]
 17170  		if p != x4.Args[0] {
 17171  			break
 17172  		}
 17173  		if mem != x4.Args[1] {
 17174  			break
 17175  		}
 17176  		s4 := o4.Args[1]
 17177  		if s4.Op != OpPPC64SLDconst {
 17178  			break
 17179  		}
 17180  		if s4.AuxInt != 40 {
 17181  			break
 17182  		}
 17183  		x5 := s4.Args[0]
 17184  		if x5.Op != OpPPC64MOVBZload {
 17185  			break
 17186  		}
 17187  		i5 := x5.AuxInt
 17188  		if x5.Aux != s {
 17189  			break
 17190  		}
 17191  		_ = x5.Args[1]
 17192  		if p != x5.Args[0] {
 17193  			break
 17194  		}
 17195  		if mem != x5.Args[1] {
 17196  			break
 17197  		}
 17198  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17199  			break
 17200  		}
 17201  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17202  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17203  		v.reset(OpCopy)
 17204  		v.AddArg(v0)
 17205  		v0.AuxInt = i0
 17206  		v0.Aux = s
 17207  		v0.AddArg(p)
 17208  		v0.AddArg(mem)
 17209  		return true
 17210  	}
 17211  	return false
 17212  }
 17213  func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
 17214  	b := v.Block
 17215  	_ = b
 17216  	config := b.Func.Config
 17217  	_ = config
 17218  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17219  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17220  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17221  	for {
 17222  		t := v.Type
 17223  		_ = v.Args[1]
 17224  		s6 := v.Args[0]
 17225  		if s6.Op != OpPPC64SLDconst {
 17226  			break
 17227  		}
 17228  		if s6.AuxInt != 56 {
 17229  			break
 17230  		}
 17231  		x7 := s6.Args[0]
 17232  		if x7.Op != OpPPC64MOVBZload {
 17233  			break
 17234  		}
 17235  		i7 := x7.AuxInt
 17236  		s := x7.Aux
 17237  		_ = x7.Args[1]
 17238  		p := x7.Args[0]
 17239  		mem := x7.Args[1]
 17240  		o5 := v.Args[1]
 17241  		if o5.Op != OpPPC64OR {
 17242  			break
 17243  		}
 17244  		if o5.Type != t {
 17245  			break
 17246  		}
 17247  		_ = o5.Args[1]
 17248  		o4 := o5.Args[0]
 17249  		if o4.Op != OpPPC64OR {
 17250  			break
 17251  		}
 17252  		if o4.Type != t {
 17253  			break
 17254  		}
 17255  		_ = o4.Args[1]
 17256  		s4 := o4.Args[0]
 17257  		if s4.Op != OpPPC64SLDconst {
 17258  			break
 17259  		}
 17260  		if s4.AuxInt != 40 {
 17261  			break
 17262  		}
 17263  		x5 := s4.Args[0]
 17264  		if x5.Op != OpPPC64MOVBZload {
 17265  			break
 17266  		}
 17267  		i5 := x5.AuxInt
 17268  		if x5.Aux != s {
 17269  			break
 17270  		}
 17271  		_ = x5.Args[1]
 17272  		if p != x5.Args[0] {
 17273  			break
 17274  		}
 17275  		if mem != x5.Args[1] {
 17276  			break
 17277  		}
 17278  		o3 := o4.Args[1]
 17279  		if o3.Op != OpPPC64OR {
 17280  			break
 17281  		}
 17282  		if o3.Type != t {
 17283  			break
 17284  		}
 17285  		_ = o3.Args[1]
 17286  		s3 := o3.Args[0]
 17287  		if s3.Op != OpPPC64SLDconst {
 17288  			break
 17289  		}
 17290  		if s3.AuxInt != 32 {
 17291  			break
 17292  		}
 17293  		x4 := s3.Args[0]
 17294  		if x4.Op != OpPPC64MOVBZload {
 17295  			break
 17296  		}
 17297  		i4 := x4.AuxInt
 17298  		if x4.Aux != s {
 17299  			break
 17300  		}
 17301  		_ = x4.Args[1]
 17302  		if p != x4.Args[0] {
 17303  			break
 17304  		}
 17305  		if mem != x4.Args[1] {
 17306  			break
 17307  		}
 17308  		o2 := o3.Args[1]
 17309  		if o2.Op != OpPPC64OR {
 17310  			break
 17311  		}
 17312  		if o2.Type != t {
 17313  			break
 17314  		}
 17315  		_ = o2.Args[1]
 17316  		s2 := o2.Args[0]
 17317  		if s2.Op != OpPPC64SLDconst {
 17318  			break
 17319  		}
 17320  		if s2.AuxInt != 24 {
 17321  			break
 17322  		}
 17323  		x3 := s2.Args[0]
 17324  		if x3.Op != OpPPC64MOVBZload {
 17325  			break
 17326  		}
 17327  		i3 := x3.AuxInt
 17328  		if x3.Aux != s {
 17329  			break
 17330  		}
 17331  		_ = x3.Args[1]
 17332  		if p != x3.Args[0] {
 17333  			break
 17334  		}
 17335  		if mem != x3.Args[1] {
 17336  			break
 17337  		}
 17338  		o1 := o2.Args[1]
 17339  		if o1.Op != OpPPC64OR {
 17340  			break
 17341  		}
 17342  		if o1.Type != t {
 17343  			break
 17344  		}
 17345  		_ = o1.Args[1]
 17346  		s1 := o1.Args[0]
 17347  		if s1.Op != OpPPC64SLDconst {
 17348  			break
 17349  		}
 17350  		if s1.AuxInt != 16 {
 17351  			break
 17352  		}
 17353  		x2 := s1.Args[0]
 17354  		if x2.Op != OpPPC64MOVBZload {
 17355  			break
 17356  		}
 17357  		i2 := x2.AuxInt
 17358  		if x2.Aux != s {
 17359  			break
 17360  		}
 17361  		_ = x2.Args[1]
 17362  		if p != x2.Args[0] {
 17363  			break
 17364  		}
 17365  		if mem != x2.Args[1] {
 17366  			break
 17367  		}
 17368  		o0 := o1.Args[1]
 17369  		if o0.Op != OpPPC64OR {
 17370  			break
 17371  		}
 17372  		if o0.Type != t {
 17373  			break
 17374  		}
 17375  		_ = o0.Args[1]
 17376  		s0 := o0.Args[0]
 17377  		if s0.Op != OpPPC64SLDconst {
 17378  			break
 17379  		}
 17380  		if s0.AuxInt != 8 {
 17381  			break
 17382  		}
 17383  		x1 := s0.Args[0]
 17384  		if x1.Op != OpPPC64MOVBZload {
 17385  			break
 17386  		}
 17387  		i1 := x1.AuxInt
 17388  		if x1.Aux != s {
 17389  			break
 17390  		}
 17391  		_ = x1.Args[1]
 17392  		if p != x1.Args[0] {
 17393  			break
 17394  		}
 17395  		if mem != x1.Args[1] {
 17396  			break
 17397  		}
 17398  		x0 := o0.Args[1]
 17399  		if x0.Op != OpPPC64MOVBZload {
 17400  			break
 17401  		}
 17402  		i0 := x0.AuxInt
 17403  		if x0.Aux != s {
 17404  			break
 17405  		}
 17406  		_ = x0.Args[1]
 17407  		if p != x0.Args[0] {
 17408  			break
 17409  		}
 17410  		if mem != x0.Args[1] {
 17411  			break
 17412  		}
 17413  		s5 := o5.Args[1]
 17414  		if s5.Op != OpPPC64SLDconst {
 17415  			break
 17416  		}
 17417  		if s5.AuxInt != 48 {
 17418  			break
 17419  		}
 17420  		x6 := s5.Args[0]
 17421  		if x6.Op != OpPPC64MOVBZload {
 17422  			break
 17423  		}
 17424  		i6 := x6.AuxInt
 17425  		if x6.Aux != s {
 17426  			break
 17427  		}
 17428  		_ = x6.Args[1]
 17429  		if p != x6.Args[0] {
 17430  			break
 17431  		}
 17432  		if mem != x6.Args[1] {
 17433  			break
 17434  		}
 17435  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17436  			break
 17437  		}
 17438  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17439  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17440  		v.reset(OpCopy)
 17441  		v.AddArg(v0)
 17442  		v0.AuxInt = i0
 17443  		v0.Aux = s
 17444  		v0.AddArg(p)
 17445  		v0.AddArg(mem)
 17446  		return true
 17447  	}
 17448  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17449  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17450  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17451  	for {
 17452  		t := v.Type
 17453  		_ = v.Args[1]
 17454  		s6 := v.Args[0]
 17455  		if s6.Op != OpPPC64SLDconst {
 17456  			break
 17457  		}
 17458  		if s6.AuxInt != 56 {
 17459  			break
 17460  		}
 17461  		x7 := s6.Args[0]
 17462  		if x7.Op != OpPPC64MOVBZload {
 17463  			break
 17464  		}
 17465  		i7 := x7.AuxInt
 17466  		s := x7.Aux
 17467  		_ = x7.Args[1]
 17468  		p := x7.Args[0]
 17469  		mem := x7.Args[1]
 17470  		o5 := v.Args[1]
 17471  		if o5.Op != OpPPC64OR {
 17472  			break
 17473  		}
 17474  		if o5.Type != t {
 17475  			break
 17476  		}
 17477  		_ = o5.Args[1]
 17478  		o4 := o5.Args[0]
 17479  		if o4.Op != OpPPC64OR {
 17480  			break
 17481  		}
 17482  		if o4.Type != t {
 17483  			break
 17484  		}
 17485  		_ = o4.Args[1]
 17486  		s4 := o4.Args[0]
 17487  		if s4.Op != OpPPC64SLDconst {
 17488  			break
 17489  		}
 17490  		if s4.AuxInt != 40 {
 17491  			break
 17492  		}
 17493  		x5 := s4.Args[0]
 17494  		if x5.Op != OpPPC64MOVBZload {
 17495  			break
 17496  		}
 17497  		i5 := x5.AuxInt
 17498  		if x5.Aux != s {
 17499  			break
 17500  		}
 17501  		_ = x5.Args[1]
 17502  		if p != x5.Args[0] {
 17503  			break
 17504  		}
 17505  		if mem != x5.Args[1] {
 17506  			break
 17507  		}
 17508  		o3 := o4.Args[1]
 17509  		if o3.Op != OpPPC64OR {
 17510  			break
 17511  		}
 17512  		if o3.Type != t {
 17513  			break
 17514  		}
 17515  		_ = o3.Args[1]
 17516  		s3 := o3.Args[0]
 17517  		if s3.Op != OpPPC64SLDconst {
 17518  			break
 17519  		}
 17520  		if s3.AuxInt != 32 {
 17521  			break
 17522  		}
 17523  		x4 := s3.Args[0]
 17524  		if x4.Op != OpPPC64MOVBZload {
 17525  			break
 17526  		}
 17527  		i4 := x4.AuxInt
 17528  		if x4.Aux != s {
 17529  			break
 17530  		}
 17531  		_ = x4.Args[1]
 17532  		if p != x4.Args[0] {
 17533  			break
 17534  		}
 17535  		if mem != x4.Args[1] {
 17536  			break
 17537  		}
 17538  		o2 := o3.Args[1]
 17539  		if o2.Op != OpPPC64OR {
 17540  			break
 17541  		}
 17542  		if o2.Type != t {
 17543  			break
 17544  		}
 17545  		_ = o2.Args[1]
 17546  		s2 := o2.Args[0]
 17547  		if s2.Op != OpPPC64SLDconst {
 17548  			break
 17549  		}
 17550  		if s2.AuxInt != 24 {
 17551  			break
 17552  		}
 17553  		x3 := s2.Args[0]
 17554  		if x3.Op != OpPPC64MOVBZload {
 17555  			break
 17556  		}
 17557  		i3 := x3.AuxInt
 17558  		if x3.Aux != s {
 17559  			break
 17560  		}
 17561  		_ = x3.Args[1]
 17562  		if p != x3.Args[0] {
 17563  			break
 17564  		}
 17565  		if mem != x3.Args[1] {
 17566  			break
 17567  		}
 17568  		o1 := o2.Args[1]
 17569  		if o1.Op != OpPPC64OR {
 17570  			break
 17571  		}
 17572  		if o1.Type != t {
 17573  			break
 17574  		}
 17575  		_ = o1.Args[1]
 17576  		s1 := o1.Args[0]
 17577  		if s1.Op != OpPPC64SLDconst {
 17578  			break
 17579  		}
 17580  		if s1.AuxInt != 16 {
 17581  			break
 17582  		}
 17583  		x2 := s1.Args[0]
 17584  		if x2.Op != OpPPC64MOVBZload {
 17585  			break
 17586  		}
 17587  		i2 := x2.AuxInt
 17588  		if x2.Aux != s {
 17589  			break
 17590  		}
 17591  		_ = x2.Args[1]
 17592  		if p != x2.Args[0] {
 17593  			break
 17594  		}
 17595  		if mem != x2.Args[1] {
 17596  			break
 17597  		}
 17598  		o0 := o1.Args[1]
 17599  		if o0.Op != OpPPC64OR {
 17600  			break
 17601  		}
 17602  		if o0.Type != t {
 17603  			break
 17604  		}
 17605  		_ = o0.Args[1]
 17606  		x0 := o0.Args[0]
 17607  		if x0.Op != OpPPC64MOVBZload {
 17608  			break
 17609  		}
 17610  		i0 := x0.AuxInt
 17611  		if x0.Aux != s {
 17612  			break
 17613  		}
 17614  		_ = x0.Args[1]
 17615  		if p != x0.Args[0] {
 17616  			break
 17617  		}
 17618  		if mem != x0.Args[1] {
 17619  			break
 17620  		}
 17621  		s0 := o0.Args[1]
 17622  		if s0.Op != OpPPC64SLDconst {
 17623  			break
 17624  		}
 17625  		if s0.AuxInt != 8 {
 17626  			break
 17627  		}
 17628  		x1 := s0.Args[0]
 17629  		if x1.Op != OpPPC64MOVBZload {
 17630  			break
 17631  		}
 17632  		i1 := x1.AuxInt
 17633  		if x1.Aux != s {
 17634  			break
 17635  		}
 17636  		_ = x1.Args[1]
 17637  		if p != x1.Args[0] {
 17638  			break
 17639  		}
 17640  		if mem != x1.Args[1] {
 17641  			break
 17642  		}
 17643  		s5 := o5.Args[1]
 17644  		if s5.Op != OpPPC64SLDconst {
 17645  			break
 17646  		}
 17647  		if s5.AuxInt != 48 {
 17648  			break
 17649  		}
 17650  		x6 := s5.Args[0]
 17651  		if x6.Op != OpPPC64MOVBZload {
 17652  			break
 17653  		}
 17654  		i6 := x6.AuxInt
 17655  		if x6.Aux != s {
 17656  			break
 17657  		}
 17658  		_ = x6.Args[1]
 17659  		if p != x6.Args[0] {
 17660  			break
 17661  		}
 17662  		if mem != x6.Args[1] {
 17663  			break
 17664  		}
 17665  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17666  			break
 17667  		}
 17668  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17669  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17670  		v.reset(OpCopy)
 17671  		v.AddArg(v0)
 17672  		v0.AuxInt = i0
 17673  		v0.Aux = s
 17674  		v0.AddArg(p)
 17675  		v0.AddArg(mem)
 17676  		return true
 17677  	}
 17678  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17679  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17680  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17681  	for {
 17682  		t := v.Type
 17683  		_ = v.Args[1]
 17684  		s6 := v.Args[0]
 17685  		if s6.Op != OpPPC64SLDconst {
 17686  			break
 17687  		}
 17688  		if s6.AuxInt != 56 {
 17689  			break
 17690  		}
 17691  		x7 := s6.Args[0]
 17692  		if x7.Op != OpPPC64MOVBZload {
 17693  			break
 17694  		}
 17695  		i7 := x7.AuxInt
 17696  		s := x7.Aux
 17697  		_ = x7.Args[1]
 17698  		p := x7.Args[0]
 17699  		mem := x7.Args[1]
 17700  		o5 := v.Args[1]
 17701  		if o5.Op != OpPPC64OR {
 17702  			break
 17703  		}
 17704  		if o5.Type != t {
 17705  			break
 17706  		}
 17707  		_ = o5.Args[1]
 17708  		o4 := o5.Args[0]
 17709  		if o4.Op != OpPPC64OR {
 17710  			break
 17711  		}
 17712  		if o4.Type != t {
 17713  			break
 17714  		}
 17715  		_ = o4.Args[1]
 17716  		s4 := o4.Args[0]
 17717  		if s4.Op != OpPPC64SLDconst {
 17718  			break
 17719  		}
 17720  		if s4.AuxInt != 40 {
 17721  			break
 17722  		}
 17723  		x5 := s4.Args[0]
 17724  		if x5.Op != OpPPC64MOVBZload {
 17725  			break
 17726  		}
 17727  		i5 := x5.AuxInt
 17728  		if x5.Aux != s {
 17729  			break
 17730  		}
 17731  		_ = x5.Args[1]
 17732  		if p != x5.Args[0] {
 17733  			break
 17734  		}
 17735  		if mem != x5.Args[1] {
 17736  			break
 17737  		}
 17738  		o3 := o4.Args[1]
 17739  		if o3.Op != OpPPC64OR {
 17740  			break
 17741  		}
 17742  		if o3.Type != t {
 17743  			break
 17744  		}
 17745  		_ = o3.Args[1]
 17746  		s3 := o3.Args[0]
 17747  		if s3.Op != OpPPC64SLDconst {
 17748  			break
 17749  		}
 17750  		if s3.AuxInt != 32 {
 17751  			break
 17752  		}
 17753  		x4 := s3.Args[0]
 17754  		if x4.Op != OpPPC64MOVBZload {
 17755  			break
 17756  		}
 17757  		i4 := x4.AuxInt
 17758  		if x4.Aux != s {
 17759  			break
 17760  		}
 17761  		_ = x4.Args[1]
 17762  		if p != x4.Args[0] {
 17763  			break
 17764  		}
 17765  		if mem != x4.Args[1] {
 17766  			break
 17767  		}
 17768  		o2 := o3.Args[1]
 17769  		if o2.Op != OpPPC64OR {
 17770  			break
 17771  		}
 17772  		if o2.Type != t {
 17773  			break
 17774  		}
 17775  		_ = o2.Args[1]
 17776  		s2 := o2.Args[0]
 17777  		if s2.Op != OpPPC64SLDconst {
 17778  			break
 17779  		}
 17780  		if s2.AuxInt != 24 {
 17781  			break
 17782  		}
 17783  		x3 := s2.Args[0]
 17784  		if x3.Op != OpPPC64MOVBZload {
 17785  			break
 17786  		}
 17787  		i3 := x3.AuxInt
 17788  		if x3.Aux != s {
 17789  			break
 17790  		}
 17791  		_ = x3.Args[1]
 17792  		if p != x3.Args[0] {
 17793  			break
 17794  		}
 17795  		if mem != x3.Args[1] {
 17796  			break
 17797  		}
 17798  		o1 := o2.Args[1]
 17799  		if o1.Op != OpPPC64OR {
 17800  			break
 17801  		}
 17802  		if o1.Type != t {
 17803  			break
 17804  		}
 17805  		_ = o1.Args[1]
 17806  		o0 := o1.Args[0]
 17807  		if o0.Op != OpPPC64OR {
 17808  			break
 17809  		}
 17810  		if o0.Type != t {
 17811  			break
 17812  		}
 17813  		_ = o0.Args[1]
 17814  		s0 := o0.Args[0]
 17815  		if s0.Op != OpPPC64SLDconst {
 17816  			break
 17817  		}
 17818  		if s0.AuxInt != 8 {
 17819  			break
 17820  		}
 17821  		x1 := s0.Args[0]
 17822  		if x1.Op != OpPPC64MOVBZload {
 17823  			break
 17824  		}
 17825  		i1 := x1.AuxInt
 17826  		if x1.Aux != s {
 17827  			break
 17828  		}
 17829  		_ = x1.Args[1]
 17830  		if p != x1.Args[0] {
 17831  			break
 17832  		}
 17833  		if mem != x1.Args[1] {
 17834  			break
 17835  		}
 17836  		x0 := o0.Args[1]
 17837  		if x0.Op != OpPPC64MOVBZload {
 17838  			break
 17839  		}
 17840  		i0 := x0.AuxInt
 17841  		if x0.Aux != s {
 17842  			break
 17843  		}
 17844  		_ = x0.Args[1]
 17845  		if p != x0.Args[0] {
 17846  			break
 17847  		}
 17848  		if mem != x0.Args[1] {
 17849  			break
 17850  		}
 17851  		s1 := o1.Args[1]
 17852  		if s1.Op != OpPPC64SLDconst {
 17853  			break
 17854  		}
 17855  		if s1.AuxInt != 16 {
 17856  			break
 17857  		}
 17858  		x2 := s1.Args[0]
 17859  		if x2.Op != OpPPC64MOVBZload {
 17860  			break
 17861  		}
 17862  		i2 := x2.AuxInt
 17863  		if x2.Aux != s {
 17864  			break
 17865  		}
 17866  		_ = x2.Args[1]
 17867  		if p != x2.Args[0] {
 17868  			break
 17869  		}
 17870  		if mem != x2.Args[1] {
 17871  			break
 17872  		}
 17873  		s5 := o5.Args[1]
 17874  		if s5.Op != OpPPC64SLDconst {
 17875  			break
 17876  		}
 17877  		if s5.AuxInt != 48 {
 17878  			break
 17879  		}
 17880  		x6 := s5.Args[0]
 17881  		if x6.Op != OpPPC64MOVBZload {
 17882  			break
 17883  		}
 17884  		i6 := x6.AuxInt
 17885  		if x6.Aux != s {
 17886  			break
 17887  		}
 17888  		_ = x6.Args[1]
 17889  		if p != x6.Args[0] {
 17890  			break
 17891  		}
 17892  		if mem != x6.Args[1] {
 17893  			break
 17894  		}
 17895  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17896  			break
 17897  		}
 17898  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17899  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17900  		v.reset(OpCopy)
 17901  		v.AddArg(v0)
 17902  		v0.AuxInt = i0
 17903  		v0.Aux = s
 17904  		v0.AddArg(p)
 17905  		v0.AddArg(mem)
 17906  		return true
 17907  	}
 17908  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17909  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17910  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17911  	for {
 17912  		t := v.Type
 17913  		_ = v.Args[1]
 17914  		s6 := v.Args[0]
 17915  		if s6.Op != OpPPC64SLDconst {
 17916  			break
 17917  		}
 17918  		if s6.AuxInt != 56 {
 17919  			break
 17920  		}
 17921  		x7 := s6.Args[0]
 17922  		if x7.Op != OpPPC64MOVBZload {
 17923  			break
 17924  		}
 17925  		i7 := x7.AuxInt
 17926  		s := x7.Aux
 17927  		_ = x7.Args[1]
 17928  		p := x7.Args[0]
 17929  		mem := x7.Args[1]
 17930  		o5 := v.Args[1]
 17931  		if o5.Op != OpPPC64OR {
 17932  			break
 17933  		}
 17934  		if o5.Type != t {
 17935  			break
 17936  		}
 17937  		_ = o5.Args[1]
 17938  		o4 := o5.Args[0]
 17939  		if o4.Op != OpPPC64OR {
 17940  			break
 17941  		}
 17942  		if o4.Type != t {
 17943  			break
 17944  		}
 17945  		_ = o4.Args[1]
 17946  		s4 := o4.Args[0]
 17947  		if s4.Op != OpPPC64SLDconst {
 17948  			break
 17949  		}
 17950  		if s4.AuxInt != 40 {
 17951  			break
 17952  		}
 17953  		x5 := s4.Args[0]
 17954  		if x5.Op != OpPPC64MOVBZload {
 17955  			break
 17956  		}
 17957  		i5 := x5.AuxInt
 17958  		if x5.Aux != s {
 17959  			break
 17960  		}
 17961  		_ = x5.Args[1]
 17962  		if p != x5.Args[0] {
 17963  			break
 17964  		}
 17965  		if mem != x5.Args[1] {
 17966  			break
 17967  		}
 17968  		o3 := o4.Args[1]
 17969  		if o3.Op != OpPPC64OR {
 17970  			break
 17971  		}
 17972  		if o3.Type != t {
 17973  			break
 17974  		}
 17975  		_ = o3.Args[1]
 17976  		s3 := o3.Args[0]
 17977  		if s3.Op != OpPPC64SLDconst {
 17978  			break
 17979  		}
 17980  		if s3.AuxInt != 32 {
 17981  			break
 17982  		}
 17983  		x4 := s3.Args[0]
 17984  		if x4.Op != OpPPC64MOVBZload {
 17985  			break
 17986  		}
 17987  		i4 := x4.AuxInt
 17988  		if x4.Aux != s {
 17989  			break
 17990  		}
 17991  		_ = x4.Args[1]
 17992  		if p != x4.Args[0] {
 17993  			break
 17994  		}
 17995  		if mem != x4.Args[1] {
 17996  			break
 17997  		}
 17998  		o2 := o3.Args[1]
 17999  		if o2.Op != OpPPC64OR {
 18000  			break
 18001  		}
 18002  		if o2.Type != t {
 18003  			break
 18004  		}
 18005  		_ = o2.Args[1]
 18006  		s2 := o2.Args[0]
 18007  		if s2.Op != OpPPC64SLDconst {
 18008  			break
 18009  		}
 18010  		if s2.AuxInt != 24 {
 18011  			break
 18012  		}
 18013  		x3 := s2.Args[0]
 18014  		if x3.Op != OpPPC64MOVBZload {
 18015  			break
 18016  		}
 18017  		i3 := x3.AuxInt
 18018  		if x3.Aux != s {
 18019  			break
 18020  		}
 18021  		_ = x3.Args[1]
 18022  		if p != x3.Args[0] {
 18023  			break
 18024  		}
 18025  		if mem != x3.Args[1] {
 18026  			break
 18027  		}
 18028  		o1 := o2.Args[1]
 18029  		if o1.Op != OpPPC64OR {
 18030  			break
 18031  		}
 18032  		if o1.Type != t {
 18033  			break
 18034  		}
 18035  		_ = o1.Args[1]
 18036  		o0 := o1.Args[0]
 18037  		if o0.Op != OpPPC64OR {
 18038  			break
 18039  		}
 18040  		if o0.Type != t {
 18041  			break
 18042  		}
 18043  		_ = o0.Args[1]
 18044  		x0 := o0.Args[0]
 18045  		if x0.Op != OpPPC64MOVBZload {
 18046  			break
 18047  		}
 18048  		i0 := x0.AuxInt
 18049  		if x0.Aux != s {
 18050  			break
 18051  		}
 18052  		_ = x0.Args[1]
 18053  		if p != x0.Args[0] {
 18054  			break
 18055  		}
 18056  		if mem != x0.Args[1] {
 18057  			break
 18058  		}
 18059  		s0 := o0.Args[1]
 18060  		if s0.Op != OpPPC64SLDconst {
 18061  			break
 18062  		}
 18063  		if s0.AuxInt != 8 {
 18064  			break
 18065  		}
 18066  		x1 := s0.Args[0]
 18067  		if x1.Op != OpPPC64MOVBZload {
 18068  			break
 18069  		}
 18070  		i1 := x1.AuxInt
 18071  		if x1.Aux != s {
 18072  			break
 18073  		}
 18074  		_ = x1.Args[1]
 18075  		if p != x1.Args[0] {
 18076  			break
 18077  		}
 18078  		if mem != x1.Args[1] {
 18079  			break
 18080  		}
 18081  		s1 := o1.Args[1]
 18082  		if s1.Op != OpPPC64SLDconst {
 18083  			break
 18084  		}
 18085  		if s1.AuxInt != 16 {
 18086  			break
 18087  		}
 18088  		x2 := s1.Args[0]
 18089  		if x2.Op != OpPPC64MOVBZload {
 18090  			break
 18091  		}
 18092  		i2 := x2.AuxInt
 18093  		if x2.Aux != s {
 18094  			break
 18095  		}
 18096  		_ = x2.Args[1]
 18097  		if p != x2.Args[0] {
 18098  			break
 18099  		}
 18100  		if mem != x2.Args[1] {
 18101  			break
 18102  		}
 18103  		s5 := o5.Args[1]
 18104  		if s5.Op != OpPPC64SLDconst {
 18105  			break
 18106  		}
 18107  		if s5.AuxInt != 48 {
 18108  			break
 18109  		}
 18110  		x6 := s5.Args[0]
 18111  		if x6.Op != OpPPC64MOVBZload {
 18112  			break
 18113  		}
 18114  		i6 := x6.AuxInt
 18115  		if x6.Aux != s {
 18116  			break
 18117  		}
 18118  		_ = x6.Args[1]
 18119  		if p != x6.Args[0] {
 18120  			break
 18121  		}
 18122  		if mem != x6.Args[1] {
 18123  			break
 18124  		}
 18125  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18126  			break
 18127  		}
 18128  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18129  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18130  		v.reset(OpCopy)
 18131  		v.AddArg(v0)
 18132  		v0.AuxInt = i0
 18133  		v0.Aux = s
 18134  		v0.AddArg(p)
 18135  		v0.AddArg(mem)
 18136  		return true
 18137  	}
 18138  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18139  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18140  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18141  	for {
 18142  		t := v.Type
 18143  		_ = v.Args[1]
 18144  		s6 := v.Args[0]
 18145  		if s6.Op != OpPPC64SLDconst {
 18146  			break
 18147  		}
 18148  		if s6.AuxInt != 56 {
 18149  			break
 18150  		}
 18151  		x7 := s6.Args[0]
 18152  		if x7.Op != OpPPC64MOVBZload {
 18153  			break
 18154  		}
 18155  		i7 := x7.AuxInt
 18156  		s := x7.Aux
 18157  		_ = x7.Args[1]
 18158  		p := x7.Args[0]
 18159  		mem := x7.Args[1]
 18160  		o5 := v.Args[1]
 18161  		if o5.Op != OpPPC64OR {
 18162  			break
 18163  		}
 18164  		if o5.Type != t {
 18165  			break
 18166  		}
 18167  		_ = o5.Args[1]
 18168  		o4 := o5.Args[0]
 18169  		if o4.Op != OpPPC64OR {
 18170  			break
 18171  		}
 18172  		if o4.Type != t {
 18173  			break
 18174  		}
 18175  		_ = o4.Args[1]
 18176  		s4 := o4.Args[0]
 18177  		if s4.Op != OpPPC64SLDconst {
 18178  			break
 18179  		}
 18180  		if s4.AuxInt != 40 {
 18181  			break
 18182  		}
 18183  		x5 := s4.Args[0]
 18184  		if x5.Op != OpPPC64MOVBZload {
 18185  			break
 18186  		}
 18187  		i5 := x5.AuxInt
 18188  		if x5.Aux != s {
 18189  			break
 18190  		}
 18191  		_ = x5.Args[1]
 18192  		if p != x5.Args[0] {
 18193  			break
 18194  		}
 18195  		if mem != x5.Args[1] {
 18196  			break
 18197  		}
 18198  		o3 := o4.Args[1]
 18199  		if o3.Op != OpPPC64OR {
 18200  			break
 18201  		}
 18202  		if o3.Type != t {
 18203  			break
 18204  		}
 18205  		_ = o3.Args[1]
 18206  		s3 := o3.Args[0]
 18207  		if s3.Op != OpPPC64SLDconst {
 18208  			break
 18209  		}
 18210  		if s3.AuxInt != 32 {
 18211  			break
 18212  		}
 18213  		x4 := s3.Args[0]
 18214  		if x4.Op != OpPPC64MOVBZload {
 18215  			break
 18216  		}
 18217  		i4 := x4.AuxInt
 18218  		if x4.Aux != s {
 18219  			break
 18220  		}
 18221  		_ = x4.Args[1]
 18222  		if p != x4.Args[0] {
 18223  			break
 18224  		}
 18225  		if mem != x4.Args[1] {
 18226  			break
 18227  		}
 18228  		o2 := o3.Args[1]
 18229  		if o2.Op != OpPPC64OR {
 18230  			break
 18231  		}
 18232  		if o2.Type != t {
 18233  			break
 18234  		}
 18235  		_ = o2.Args[1]
 18236  		o1 := o2.Args[0]
 18237  		if o1.Op != OpPPC64OR {
 18238  			break
 18239  		}
 18240  		if o1.Type != t {
 18241  			break
 18242  		}
 18243  		_ = o1.Args[1]
 18244  		s1 := o1.Args[0]
 18245  		if s1.Op != OpPPC64SLDconst {
 18246  			break
 18247  		}
 18248  		if s1.AuxInt != 16 {
 18249  			break
 18250  		}
 18251  		x2 := s1.Args[0]
 18252  		if x2.Op != OpPPC64MOVBZload {
 18253  			break
 18254  		}
 18255  		i2 := x2.AuxInt
 18256  		if x2.Aux != s {
 18257  			break
 18258  		}
 18259  		_ = x2.Args[1]
 18260  		if p != x2.Args[0] {
 18261  			break
 18262  		}
 18263  		if mem != x2.Args[1] {
 18264  			break
 18265  		}
 18266  		o0 := o1.Args[1]
 18267  		if o0.Op != OpPPC64OR {
 18268  			break
 18269  		}
 18270  		if o0.Type != t {
 18271  			break
 18272  		}
 18273  		_ = o0.Args[1]
 18274  		s0 := o0.Args[0]
 18275  		if s0.Op != OpPPC64SLDconst {
 18276  			break
 18277  		}
 18278  		if s0.AuxInt != 8 {
 18279  			break
 18280  		}
 18281  		x1 := s0.Args[0]
 18282  		if x1.Op != OpPPC64MOVBZload {
 18283  			break
 18284  		}
 18285  		i1 := x1.AuxInt
 18286  		if x1.Aux != s {
 18287  			break
 18288  		}
 18289  		_ = x1.Args[1]
 18290  		if p != x1.Args[0] {
 18291  			break
 18292  		}
 18293  		if mem != x1.Args[1] {
 18294  			break
 18295  		}
 18296  		x0 := o0.Args[1]
 18297  		if x0.Op != OpPPC64MOVBZload {
 18298  			break
 18299  		}
 18300  		i0 := x0.AuxInt
 18301  		if x0.Aux != s {
 18302  			break
 18303  		}
 18304  		_ = x0.Args[1]
 18305  		if p != x0.Args[0] {
 18306  			break
 18307  		}
 18308  		if mem != x0.Args[1] {
 18309  			break
 18310  		}
 18311  		s2 := o2.Args[1]
 18312  		if s2.Op != OpPPC64SLDconst {
 18313  			break
 18314  		}
 18315  		if s2.AuxInt != 24 {
 18316  			break
 18317  		}
 18318  		x3 := s2.Args[0]
 18319  		if x3.Op != OpPPC64MOVBZload {
 18320  			break
 18321  		}
 18322  		i3 := x3.AuxInt
 18323  		if x3.Aux != s {
 18324  			break
 18325  		}
 18326  		_ = x3.Args[1]
 18327  		if p != x3.Args[0] {
 18328  			break
 18329  		}
 18330  		if mem != x3.Args[1] {
 18331  			break
 18332  		}
 18333  		s5 := o5.Args[1]
 18334  		if s5.Op != OpPPC64SLDconst {
 18335  			break
 18336  		}
 18337  		if s5.AuxInt != 48 {
 18338  			break
 18339  		}
 18340  		x6 := s5.Args[0]
 18341  		if x6.Op != OpPPC64MOVBZload {
 18342  			break
 18343  		}
 18344  		i6 := x6.AuxInt
 18345  		if x6.Aux != s {
 18346  			break
 18347  		}
 18348  		_ = x6.Args[1]
 18349  		if p != x6.Args[0] {
 18350  			break
 18351  		}
 18352  		if mem != x6.Args[1] {
 18353  			break
 18354  		}
 18355  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18356  			break
 18357  		}
 18358  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18359  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18360  		v.reset(OpCopy)
 18361  		v.AddArg(v0)
 18362  		v0.AuxInt = i0
 18363  		v0.Aux = s
 18364  		v0.AddArg(p)
 18365  		v0.AddArg(mem)
 18366  		return true
 18367  	}
 18368  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18369  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18370  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18371  	for {
 18372  		t := v.Type
 18373  		_ = v.Args[1]
 18374  		s6 := v.Args[0]
 18375  		if s6.Op != OpPPC64SLDconst {
 18376  			break
 18377  		}
 18378  		if s6.AuxInt != 56 {
 18379  			break
 18380  		}
 18381  		x7 := s6.Args[0]
 18382  		if x7.Op != OpPPC64MOVBZload {
 18383  			break
 18384  		}
 18385  		i7 := x7.AuxInt
 18386  		s := x7.Aux
 18387  		_ = x7.Args[1]
 18388  		p := x7.Args[0]
 18389  		mem := x7.Args[1]
 18390  		o5 := v.Args[1]
 18391  		if o5.Op != OpPPC64OR {
 18392  			break
 18393  		}
 18394  		if o5.Type != t {
 18395  			break
 18396  		}
 18397  		_ = o5.Args[1]
 18398  		o4 := o5.Args[0]
 18399  		if o4.Op != OpPPC64OR {
 18400  			break
 18401  		}
 18402  		if o4.Type != t {
 18403  			break
 18404  		}
 18405  		_ = o4.Args[1]
 18406  		s4 := o4.Args[0]
 18407  		if s4.Op != OpPPC64SLDconst {
 18408  			break
 18409  		}
 18410  		if s4.AuxInt != 40 {
 18411  			break
 18412  		}
 18413  		x5 := s4.Args[0]
 18414  		if x5.Op != OpPPC64MOVBZload {
 18415  			break
 18416  		}
 18417  		i5 := x5.AuxInt
 18418  		if x5.Aux != s {
 18419  			break
 18420  		}
 18421  		_ = x5.Args[1]
 18422  		if p != x5.Args[0] {
 18423  			break
 18424  		}
 18425  		if mem != x5.Args[1] {
 18426  			break
 18427  		}
 18428  		o3 := o4.Args[1]
 18429  		if o3.Op != OpPPC64OR {
 18430  			break
 18431  		}
 18432  		if o3.Type != t {
 18433  			break
 18434  		}
 18435  		_ = o3.Args[1]
 18436  		s3 := o3.Args[0]
 18437  		if s3.Op != OpPPC64SLDconst {
 18438  			break
 18439  		}
 18440  		if s3.AuxInt != 32 {
 18441  			break
 18442  		}
 18443  		x4 := s3.Args[0]
 18444  		if x4.Op != OpPPC64MOVBZload {
 18445  			break
 18446  		}
 18447  		i4 := x4.AuxInt
 18448  		if x4.Aux != s {
 18449  			break
 18450  		}
 18451  		_ = x4.Args[1]
 18452  		if p != x4.Args[0] {
 18453  			break
 18454  		}
 18455  		if mem != x4.Args[1] {
 18456  			break
 18457  		}
 18458  		o2 := o3.Args[1]
 18459  		if o2.Op != OpPPC64OR {
 18460  			break
 18461  		}
 18462  		if o2.Type != t {
 18463  			break
 18464  		}
 18465  		_ = o2.Args[1]
 18466  		o1 := o2.Args[0]
 18467  		if o1.Op != OpPPC64OR {
 18468  			break
 18469  		}
 18470  		if o1.Type != t {
 18471  			break
 18472  		}
 18473  		_ = o1.Args[1]
 18474  		s1 := o1.Args[0]
 18475  		if s1.Op != OpPPC64SLDconst {
 18476  			break
 18477  		}
 18478  		if s1.AuxInt != 16 {
 18479  			break
 18480  		}
 18481  		x2 := s1.Args[0]
 18482  		if x2.Op != OpPPC64MOVBZload {
 18483  			break
 18484  		}
 18485  		i2 := x2.AuxInt
 18486  		if x2.Aux != s {
 18487  			break
 18488  		}
 18489  		_ = x2.Args[1]
 18490  		if p != x2.Args[0] {
 18491  			break
 18492  		}
 18493  		if mem != x2.Args[1] {
 18494  			break
 18495  		}
 18496  		o0 := o1.Args[1]
 18497  		if o0.Op != OpPPC64OR {
 18498  			break
 18499  		}
 18500  		if o0.Type != t {
 18501  			break
 18502  		}
 18503  		_ = o0.Args[1]
 18504  		x0 := o0.Args[0]
 18505  		if x0.Op != OpPPC64MOVBZload {
 18506  			break
 18507  		}
 18508  		i0 := x0.AuxInt
 18509  		if x0.Aux != s {
 18510  			break
 18511  		}
 18512  		_ = x0.Args[1]
 18513  		if p != x0.Args[0] {
 18514  			break
 18515  		}
 18516  		if mem != x0.Args[1] {
 18517  			break
 18518  		}
 18519  		s0 := o0.Args[1]
 18520  		if s0.Op != OpPPC64SLDconst {
 18521  			break
 18522  		}
 18523  		if s0.AuxInt != 8 {
 18524  			break
 18525  		}
 18526  		x1 := s0.Args[0]
 18527  		if x1.Op != OpPPC64MOVBZload {
 18528  			break
 18529  		}
 18530  		i1 := x1.AuxInt
 18531  		if x1.Aux != s {
 18532  			break
 18533  		}
 18534  		_ = x1.Args[1]
 18535  		if p != x1.Args[0] {
 18536  			break
 18537  		}
 18538  		if mem != x1.Args[1] {
 18539  			break
 18540  		}
 18541  		s2 := o2.Args[1]
 18542  		if s2.Op != OpPPC64SLDconst {
 18543  			break
 18544  		}
 18545  		if s2.AuxInt != 24 {
 18546  			break
 18547  		}
 18548  		x3 := s2.Args[0]
 18549  		if x3.Op != OpPPC64MOVBZload {
 18550  			break
 18551  		}
 18552  		i3 := x3.AuxInt
 18553  		if x3.Aux != s {
 18554  			break
 18555  		}
 18556  		_ = x3.Args[1]
 18557  		if p != x3.Args[0] {
 18558  			break
 18559  		}
 18560  		if mem != x3.Args[1] {
 18561  			break
 18562  		}
 18563  		s5 := o5.Args[1]
 18564  		if s5.Op != OpPPC64SLDconst {
 18565  			break
 18566  		}
 18567  		if s5.AuxInt != 48 {
 18568  			break
 18569  		}
 18570  		x6 := s5.Args[0]
 18571  		if x6.Op != OpPPC64MOVBZload {
 18572  			break
 18573  		}
 18574  		i6 := x6.AuxInt
 18575  		if x6.Aux != s {
 18576  			break
 18577  		}
 18578  		_ = x6.Args[1]
 18579  		if p != x6.Args[0] {
 18580  			break
 18581  		}
 18582  		if mem != x6.Args[1] {
 18583  			break
 18584  		}
 18585  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18586  			break
 18587  		}
 18588  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18589  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18590  		v.reset(OpCopy)
 18591  		v.AddArg(v0)
 18592  		v0.AuxInt = i0
 18593  		v0.Aux = s
 18594  		v0.AddArg(p)
 18595  		v0.AddArg(mem)
 18596  		return true
 18597  	}
 18598  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18599  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18600  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18601  	for {
 18602  		t := v.Type
 18603  		_ = v.Args[1]
 18604  		s6 := v.Args[0]
 18605  		if s6.Op != OpPPC64SLDconst {
 18606  			break
 18607  		}
 18608  		if s6.AuxInt != 56 {
 18609  			break
 18610  		}
 18611  		x7 := s6.Args[0]
 18612  		if x7.Op != OpPPC64MOVBZload {
 18613  			break
 18614  		}
 18615  		i7 := x7.AuxInt
 18616  		s := x7.Aux
 18617  		_ = x7.Args[1]
 18618  		p := x7.Args[0]
 18619  		mem := x7.Args[1]
 18620  		o5 := v.Args[1]
 18621  		if o5.Op != OpPPC64OR {
 18622  			break
 18623  		}
 18624  		if o5.Type != t {
 18625  			break
 18626  		}
 18627  		_ = o5.Args[1]
 18628  		o4 := o5.Args[0]
 18629  		if o4.Op != OpPPC64OR {
 18630  			break
 18631  		}
 18632  		if o4.Type != t {
 18633  			break
 18634  		}
 18635  		_ = o4.Args[1]
 18636  		s4 := o4.Args[0]
 18637  		if s4.Op != OpPPC64SLDconst {
 18638  			break
 18639  		}
 18640  		if s4.AuxInt != 40 {
 18641  			break
 18642  		}
 18643  		x5 := s4.Args[0]
 18644  		if x5.Op != OpPPC64MOVBZload {
 18645  			break
 18646  		}
 18647  		i5 := x5.AuxInt
 18648  		if x5.Aux != s {
 18649  			break
 18650  		}
 18651  		_ = x5.Args[1]
 18652  		if p != x5.Args[0] {
 18653  			break
 18654  		}
 18655  		if mem != x5.Args[1] {
 18656  			break
 18657  		}
 18658  		o3 := o4.Args[1]
 18659  		if o3.Op != OpPPC64OR {
 18660  			break
 18661  		}
 18662  		if o3.Type != t {
 18663  			break
 18664  		}
 18665  		_ = o3.Args[1]
 18666  		s3 := o3.Args[0]
 18667  		if s3.Op != OpPPC64SLDconst {
 18668  			break
 18669  		}
 18670  		if s3.AuxInt != 32 {
 18671  			break
 18672  		}
 18673  		x4 := s3.Args[0]
 18674  		if x4.Op != OpPPC64MOVBZload {
 18675  			break
 18676  		}
 18677  		i4 := x4.AuxInt
 18678  		if x4.Aux != s {
 18679  			break
 18680  		}
 18681  		_ = x4.Args[1]
 18682  		if p != x4.Args[0] {
 18683  			break
 18684  		}
 18685  		if mem != x4.Args[1] {
 18686  			break
 18687  		}
 18688  		o2 := o3.Args[1]
 18689  		if o2.Op != OpPPC64OR {
 18690  			break
 18691  		}
 18692  		if o2.Type != t {
 18693  			break
 18694  		}
 18695  		_ = o2.Args[1]
 18696  		o1 := o2.Args[0]
 18697  		if o1.Op != OpPPC64OR {
 18698  			break
 18699  		}
 18700  		if o1.Type != t {
 18701  			break
 18702  		}
 18703  		_ = o1.Args[1]
 18704  		o0 := o1.Args[0]
 18705  		if o0.Op != OpPPC64OR {
 18706  			break
 18707  		}
 18708  		if o0.Type != t {
 18709  			break
 18710  		}
 18711  		_ = o0.Args[1]
 18712  		s0 := o0.Args[0]
 18713  		if s0.Op != OpPPC64SLDconst {
 18714  			break
 18715  		}
 18716  		if s0.AuxInt != 8 {
 18717  			break
 18718  		}
 18719  		x1 := s0.Args[0]
 18720  		if x1.Op != OpPPC64MOVBZload {
 18721  			break
 18722  		}
 18723  		i1 := x1.AuxInt
 18724  		if x1.Aux != s {
 18725  			break
 18726  		}
 18727  		_ = x1.Args[1]
 18728  		if p != x1.Args[0] {
 18729  			break
 18730  		}
 18731  		if mem != x1.Args[1] {
 18732  			break
 18733  		}
 18734  		x0 := o0.Args[1]
 18735  		if x0.Op != OpPPC64MOVBZload {
 18736  			break
 18737  		}
 18738  		i0 := x0.AuxInt
 18739  		if x0.Aux != s {
 18740  			break
 18741  		}
 18742  		_ = x0.Args[1]
 18743  		if p != x0.Args[0] {
 18744  			break
 18745  		}
 18746  		if mem != x0.Args[1] {
 18747  			break
 18748  		}
 18749  		s1 := o1.Args[1]
 18750  		if s1.Op != OpPPC64SLDconst {
 18751  			break
 18752  		}
 18753  		if s1.AuxInt != 16 {
 18754  			break
 18755  		}
 18756  		x2 := s1.Args[0]
 18757  		if x2.Op != OpPPC64MOVBZload {
 18758  			break
 18759  		}
 18760  		i2 := x2.AuxInt
 18761  		if x2.Aux != s {
 18762  			break
 18763  		}
 18764  		_ = x2.Args[1]
 18765  		if p != x2.Args[0] {
 18766  			break
 18767  		}
 18768  		if mem != x2.Args[1] {
 18769  			break
 18770  		}
 18771  		s2 := o2.Args[1]
 18772  		if s2.Op != OpPPC64SLDconst {
 18773  			break
 18774  		}
 18775  		if s2.AuxInt != 24 {
 18776  			break
 18777  		}
 18778  		x3 := s2.Args[0]
 18779  		if x3.Op != OpPPC64MOVBZload {
 18780  			break
 18781  		}
 18782  		i3 := x3.AuxInt
 18783  		if x3.Aux != s {
 18784  			break
 18785  		}
 18786  		_ = x3.Args[1]
 18787  		if p != x3.Args[0] {
 18788  			break
 18789  		}
 18790  		if mem != x3.Args[1] {
 18791  			break
 18792  		}
 18793  		s5 := o5.Args[1]
 18794  		if s5.Op != OpPPC64SLDconst {
 18795  			break
 18796  		}
 18797  		if s5.AuxInt != 48 {
 18798  			break
 18799  		}
 18800  		x6 := s5.Args[0]
 18801  		if x6.Op != OpPPC64MOVBZload {
 18802  			break
 18803  		}
 18804  		i6 := x6.AuxInt
 18805  		if x6.Aux != s {
 18806  			break
 18807  		}
 18808  		_ = x6.Args[1]
 18809  		if p != x6.Args[0] {
 18810  			break
 18811  		}
 18812  		if mem != x6.Args[1] {
 18813  			break
 18814  		}
 18815  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18816  			break
 18817  		}
 18818  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18819  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18820  		v.reset(OpCopy)
 18821  		v.AddArg(v0)
 18822  		v0.AuxInt = i0
 18823  		v0.Aux = s
 18824  		v0.AddArg(p)
 18825  		v0.AddArg(mem)
 18826  		return true
 18827  	}
 18828  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18829  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18830  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18831  	for {
 18832  		t := v.Type
 18833  		_ = v.Args[1]
 18834  		s6 := v.Args[0]
 18835  		if s6.Op != OpPPC64SLDconst {
 18836  			break
 18837  		}
 18838  		if s6.AuxInt != 56 {
 18839  			break
 18840  		}
 18841  		x7 := s6.Args[0]
 18842  		if x7.Op != OpPPC64MOVBZload {
 18843  			break
 18844  		}
 18845  		i7 := x7.AuxInt
 18846  		s := x7.Aux
 18847  		_ = x7.Args[1]
 18848  		p := x7.Args[0]
 18849  		mem := x7.Args[1]
 18850  		o5 := v.Args[1]
 18851  		if o5.Op != OpPPC64OR {
 18852  			break
 18853  		}
 18854  		if o5.Type != t {
 18855  			break
 18856  		}
 18857  		_ = o5.Args[1]
 18858  		o4 := o5.Args[0]
 18859  		if o4.Op != OpPPC64OR {
 18860  			break
 18861  		}
 18862  		if o4.Type != t {
 18863  			break
 18864  		}
 18865  		_ = o4.Args[1]
 18866  		s4 := o4.Args[0]
 18867  		if s4.Op != OpPPC64SLDconst {
 18868  			break
 18869  		}
 18870  		if s4.AuxInt != 40 {
 18871  			break
 18872  		}
 18873  		x5 := s4.Args[0]
 18874  		if x5.Op != OpPPC64MOVBZload {
 18875  			break
 18876  		}
 18877  		i5 := x5.AuxInt
 18878  		if x5.Aux != s {
 18879  			break
 18880  		}
 18881  		_ = x5.Args[1]
 18882  		if p != x5.Args[0] {
 18883  			break
 18884  		}
 18885  		if mem != x5.Args[1] {
 18886  			break
 18887  		}
 18888  		o3 := o4.Args[1]
 18889  		if o3.Op != OpPPC64OR {
 18890  			break
 18891  		}
 18892  		if o3.Type != t {
 18893  			break
 18894  		}
 18895  		_ = o3.Args[1]
 18896  		s3 := o3.Args[0]
 18897  		if s3.Op != OpPPC64SLDconst {
 18898  			break
 18899  		}
 18900  		if s3.AuxInt != 32 {
 18901  			break
 18902  		}
 18903  		x4 := s3.Args[0]
 18904  		if x4.Op != OpPPC64MOVBZload {
 18905  			break
 18906  		}
 18907  		i4 := x4.AuxInt
 18908  		if x4.Aux != s {
 18909  			break
 18910  		}
 18911  		_ = x4.Args[1]
 18912  		if p != x4.Args[0] {
 18913  			break
 18914  		}
 18915  		if mem != x4.Args[1] {
 18916  			break
 18917  		}
 18918  		o2 := o3.Args[1]
 18919  		if o2.Op != OpPPC64OR {
 18920  			break
 18921  		}
 18922  		if o2.Type != t {
 18923  			break
 18924  		}
 18925  		_ = o2.Args[1]
 18926  		o1 := o2.Args[0]
 18927  		if o1.Op != OpPPC64OR {
 18928  			break
 18929  		}
 18930  		if o1.Type != t {
 18931  			break
 18932  		}
 18933  		_ = o1.Args[1]
 18934  		o0 := o1.Args[0]
 18935  		if o0.Op != OpPPC64OR {
 18936  			break
 18937  		}
 18938  		if o0.Type != t {
 18939  			break
 18940  		}
 18941  		_ = o0.Args[1]
 18942  		x0 := o0.Args[0]
 18943  		if x0.Op != OpPPC64MOVBZload {
 18944  			break
 18945  		}
 18946  		i0 := x0.AuxInt
 18947  		if x0.Aux != s {
 18948  			break
 18949  		}
 18950  		_ = x0.Args[1]
 18951  		if p != x0.Args[0] {
 18952  			break
 18953  		}
 18954  		if mem != x0.Args[1] {
 18955  			break
 18956  		}
 18957  		s0 := o0.Args[1]
 18958  		if s0.Op != OpPPC64SLDconst {
 18959  			break
 18960  		}
 18961  		if s0.AuxInt != 8 {
 18962  			break
 18963  		}
 18964  		x1 := s0.Args[0]
 18965  		if x1.Op != OpPPC64MOVBZload {
 18966  			break
 18967  		}
 18968  		i1 := x1.AuxInt
 18969  		if x1.Aux != s {
 18970  			break
 18971  		}
 18972  		_ = x1.Args[1]
 18973  		if p != x1.Args[0] {
 18974  			break
 18975  		}
 18976  		if mem != x1.Args[1] {
 18977  			break
 18978  		}
 18979  		s1 := o1.Args[1]
 18980  		if s1.Op != OpPPC64SLDconst {
 18981  			break
 18982  		}
 18983  		if s1.AuxInt != 16 {
 18984  			break
 18985  		}
 18986  		x2 := s1.Args[0]
 18987  		if x2.Op != OpPPC64MOVBZload {
 18988  			break
 18989  		}
 18990  		i2 := x2.AuxInt
 18991  		if x2.Aux != s {
 18992  			break
 18993  		}
 18994  		_ = x2.Args[1]
 18995  		if p != x2.Args[0] {
 18996  			break
 18997  		}
 18998  		if mem != x2.Args[1] {
 18999  			break
 19000  		}
 19001  		s2 := o2.Args[1]
 19002  		if s2.Op != OpPPC64SLDconst {
 19003  			break
 19004  		}
 19005  		if s2.AuxInt != 24 {
 19006  			break
 19007  		}
 19008  		x3 := s2.Args[0]
 19009  		if x3.Op != OpPPC64MOVBZload {
 19010  			break
 19011  		}
 19012  		i3 := x3.AuxInt
 19013  		if x3.Aux != s {
 19014  			break
 19015  		}
 19016  		_ = x3.Args[1]
 19017  		if p != x3.Args[0] {
 19018  			break
 19019  		}
 19020  		if mem != x3.Args[1] {
 19021  			break
 19022  		}
 19023  		s5 := o5.Args[1]
 19024  		if s5.Op != OpPPC64SLDconst {
 19025  			break
 19026  		}
 19027  		if s5.AuxInt != 48 {
 19028  			break
 19029  		}
 19030  		x6 := s5.Args[0]
 19031  		if x6.Op != OpPPC64MOVBZload {
 19032  			break
 19033  		}
 19034  		i6 := x6.AuxInt
 19035  		if x6.Aux != s {
 19036  			break
 19037  		}
 19038  		_ = x6.Args[1]
 19039  		if p != x6.Args[0] {
 19040  			break
 19041  		}
 19042  		if mem != x6.Args[1] {
 19043  			break
 19044  		}
 19045  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19046  			break
 19047  		}
 19048  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19049  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19050  		v.reset(OpCopy)
 19051  		v.AddArg(v0)
 19052  		v0.AuxInt = i0
 19053  		v0.Aux = s
 19054  		v0.AddArg(p)
 19055  		v0.AddArg(mem)
 19056  		return true
 19057  	}
 19058  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19059  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19060  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19061  	for {
 19062  		t := v.Type
 19063  		_ = v.Args[1]
 19064  		s6 := v.Args[0]
 19065  		if s6.Op != OpPPC64SLDconst {
 19066  			break
 19067  		}
 19068  		if s6.AuxInt != 56 {
 19069  			break
 19070  		}
 19071  		x7 := s6.Args[0]
 19072  		if x7.Op != OpPPC64MOVBZload {
 19073  			break
 19074  		}
 19075  		i7 := x7.AuxInt
 19076  		s := x7.Aux
 19077  		_ = x7.Args[1]
 19078  		p := x7.Args[0]
 19079  		mem := x7.Args[1]
 19080  		o5 := v.Args[1]
 19081  		if o5.Op != OpPPC64OR {
 19082  			break
 19083  		}
 19084  		if o5.Type != t {
 19085  			break
 19086  		}
 19087  		_ = o5.Args[1]
 19088  		o4 := o5.Args[0]
 19089  		if o4.Op != OpPPC64OR {
 19090  			break
 19091  		}
 19092  		if o4.Type != t {
 19093  			break
 19094  		}
 19095  		_ = o4.Args[1]
 19096  		s4 := o4.Args[0]
 19097  		if s4.Op != OpPPC64SLDconst {
 19098  			break
 19099  		}
 19100  		if s4.AuxInt != 40 {
 19101  			break
 19102  		}
 19103  		x5 := s4.Args[0]
 19104  		if x5.Op != OpPPC64MOVBZload {
 19105  			break
 19106  		}
 19107  		i5 := x5.AuxInt
 19108  		if x5.Aux != s {
 19109  			break
 19110  		}
 19111  		_ = x5.Args[1]
 19112  		if p != x5.Args[0] {
 19113  			break
 19114  		}
 19115  		if mem != x5.Args[1] {
 19116  			break
 19117  		}
 19118  		o3 := o4.Args[1]
 19119  		if o3.Op != OpPPC64OR {
 19120  			break
 19121  		}
 19122  		if o3.Type != t {
 19123  			break
 19124  		}
 19125  		_ = o3.Args[1]
 19126  		o2 := o3.Args[0]
 19127  		if o2.Op != OpPPC64OR {
 19128  			break
 19129  		}
 19130  		if o2.Type != t {
 19131  			break
 19132  		}
 19133  		_ = o2.Args[1]
 19134  		s2 := o2.Args[0]
 19135  		if s2.Op != OpPPC64SLDconst {
 19136  			break
 19137  		}
 19138  		if s2.AuxInt != 24 {
 19139  			break
 19140  		}
 19141  		x3 := s2.Args[0]
 19142  		if x3.Op != OpPPC64MOVBZload {
 19143  			break
 19144  		}
 19145  		i3 := x3.AuxInt
 19146  		if x3.Aux != s {
 19147  			break
 19148  		}
 19149  		_ = x3.Args[1]
 19150  		if p != x3.Args[0] {
 19151  			break
 19152  		}
 19153  		if mem != x3.Args[1] {
 19154  			break
 19155  		}
 19156  		o1 := o2.Args[1]
 19157  		if o1.Op != OpPPC64OR {
 19158  			break
 19159  		}
 19160  		if o1.Type != t {
 19161  			break
 19162  		}
 19163  		_ = o1.Args[1]
 19164  		s1 := o1.Args[0]
 19165  		if s1.Op != OpPPC64SLDconst {
 19166  			break
 19167  		}
 19168  		if s1.AuxInt != 16 {
 19169  			break
 19170  		}
 19171  		x2 := s1.Args[0]
 19172  		if x2.Op != OpPPC64MOVBZload {
 19173  			break
 19174  		}
 19175  		i2 := x2.AuxInt
 19176  		if x2.Aux != s {
 19177  			break
 19178  		}
 19179  		_ = x2.Args[1]
 19180  		if p != x2.Args[0] {
 19181  			break
 19182  		}
 19183  		if mem != x2.Args[1] {
 19184  			break
 19185  		}
 19186  		o0 := o1.Args[1]
 19187  		if o0.Op != OpPPC64OR {
 19188  			break
 19189  		}
 19190  		if o0.Type != t {
 19191  			break
 19192  		}
 19193  		_ = o0.Args[1]
 19194  		s0 := o0.Args[0]
 19195  		if s0.Op != OpPPC64SLDconst {
 19196  			break
 19197  		}
 19198  		if s0.AuxInt != 8 {
 19199  			break
 19200  		}
 19201  		x1 := s0.Args[0]
 19202  		if x1.Op != OpPPC64MOVBZload {
 19203  			break
 19204  		}
 19205  		i1 := x1.AuxInt
 19206  		if x1.Aux != s {
 19207  			break
 19208  		}
 19209  		_ = x1.Args[1]
 19210  		if p != x1.Args[0] {
 19211  			break
 19212  		}
 19213  		if mem != x1.Args[1] {
 19214  			break
 19215  		}
 19216  		x0 := o0.Args[1]
 19217  		if x0.Op != OpPPC64MOVBZload {
 19218  			break
 19219  		}
 19220  		i0 := x0.AuxInt
 19221  		if x0.Aux != s {
 19222  			break
 19223  		}
 19224  		_ = x0.Args[1]
 19225  		if p != x0.Args[0] {
 19226  			break
 19227  		}
 19228  		if mem != x0.Args[1] {
 19229  			break
 19230  		}
 19231  		s3 := o3.Args[1]
 19232  		if s3.Op != OpPPC64SLDconst {
 19233  			break
 19234  		}
 19235  		if s3.AuxInt != 32 {
 19236  			break
 19237  		}
 19238  		x4 := s3.Args[0]
 19239  		if x4.Op != OpPPC64MOVBZload {
 19240  			break
 19241  		}
 19242  		i4 := x4.AuxInt
 19243  		if x4.Aux != s {
 19244  			break
 19245  		}
 19246  		_ = x4.Args[1]
 19247  		if p != x4.Args[0] {
 19248  			break
 19249  		}
 19250  		if mem != x4.Args[1] {
 19251  			break
 19252  		}
 19253  		s5 := o5.Args[1]
 19254  		if s5.Op != OpPPC64SLDconst {
 19255  			break
 19256  		}
 19257  		if s5.AuxInt != 48 {
 19258  			break
 19259  		}
 19260  		x6 := s5.Args[0]
 19261  		if x6.Op != OpPPC64MOVBZload {
 19262  			break
 19263  		}
 19264  		i6 := x6.AuxInt
 19265  		if x6.Aux != s {
 19266  			break
 19267  		}
 19268  		_ = x6.Args[1]
 19269  		if p != x6.Args[0] {
 19270  			break
 19271  		}
 19272  		if mem != x6.Args[1] {
 19273  			break
 19274  		}
 19275  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19276  			break
 19277  		}
 19278  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19279  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19280  		v.reset(OpCopy)
 19281  		v.AddArg(v0)
 19282  		v0.AuxInt = i0
 19283  		v0.Aux = s
 19284  		v0.AddArg(p)
 19285  		v0.AddArg(mem)
 19286  		return true
 19287  	}
 19288  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19289  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19290  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19291  	for {
 19292  		t := v.Type
 19293  		_ = v.Args[1]
 19294  		s6 := v.Args[0]
 19295  		if s6.Op != OpPPC64SLDconst {
 19296  			break
 19297  		}
 19298  		if s6.AuxInt != 56 {
 19299  			break
 19300  		}
 19301  		x7 := s6.Args[0]
 19302  		if x7.Op != OpPPC64MOVBZload {
 19303  			break
 19304  		}
 19305  		i7 := x7.AuxInt
 19306  		s := x7.Aux
 19307  		_ = x7.Args[1]
 19308  		p := x7.Args[0]
 19309  		mem := x7.Args[1]
 19310  		o5 := v.Args[1]
 19311  		if o5.Op != OpPPC64OR {
 19312  			break
 19313  		}
 19314  		if o5.Type != t {
 19315  			break
 19316  		}
 19317  		_ = o5.Args[1]
 19318  		o4 := o5.Args[0]
 19319  		if o4.Op != OpPPC64OR {
 19320  			break
 19321  		}
 19322  		if o4.Type != t {
 19323  			break
 19324  		}
 19325  		_ = o4.Args[1]
 19326  		s4 := o4.Args[0]
 19327  		if s4.Op != OpPPC64SLDconst {
 19328  			break
 19329  		}
 19330  		if s4.AuxInt != 40 {
 19331  			break
 19332  		}
 19333  		x5 := s4.Args[0]
 19334  		if x5.Op != OpPPC64MOVBZload {
 19335  			break
 19336  		}
 19337  		i5 := x5.AuxInt
 19338  		if x5.Aux != s {
 19339  			break
 19340  		}
 19341  		_ = x5.Args[1]
 19342  		if p != x5.Args[0] {
 19343  			break
 19344  		}
 19345  		if mem != x5.Args[1] {
 19346  			break
 19347  		}
 19348  		o3 := o4.Args[1]
 19349  		if o3.Op != OpPPC64OR {
 19350  			break
 19351  		}
 19352  		if o3.Type != t {
 19353  			break
 19354  		}
 19355  		_ = o3.Args[1]
 19356  		o2 := o3.Args[0]
 19357  		if o2.Op != OpPPC64OR {
 19358  			break
 19359  		}
 19360  		if o2.Type != t {
 19361  			break
 19362  		}
 19363  		_ = o2.Args[1]
 19364  		s2 := o2.Args[0]
 19365  		if s2.Op != OpPPC64SLDconst {
 19366  			break
 19367  		}
 19368  		if s2.AuxInt != 24 {
 19369  			break
 19370  		}
 19371  		x3 := s2.Args[0]
 19372  		if x3.Op != OpPPC64MOVBZload {
 19373  			break
 19374  		}
 19375  		i3 := x3.AuxInt
 19376  		if x3.Aux != s {
 19377  			break
 19378  		}
 19379  		_ = x3.Args[1]
 19380  		if p != x3.Args[0] {
 19381  			break
 19382  		}
 19383  		if mem != x3.Args[1] {
 19384  			break
 19385  		}
 19386  		o1 := o2.Args[1]
 19387  		if o1.Op != OpPPC64OR {
 19388  			break
 19389  		}
 19390  		if o1.Type != t {
 19391  			break
 19392  		}
 19393  		_ = o1.Args[1]
 19394  		s1 := o1.Args[0]
 19395  		if s1.Op != OpPPC64SLDconst {
 19396  			break
 19397  		}
 19398  		if s1.AuxInt != 16 {
 19399  			break
 19400  		}
 19401  		x2 := s1.Args[0]
 19402  		if x2.Op != OpPPC64MOVBZload {
 19403  			break
 19404  		}
 19405  		i2 := x2.AuxInt
 19406  		if x2.Aux != s {
 19407  			break
 19408  		}
 19409  		_ = x2.Args[1]
 19410  		if p != x2.Args[0] {
 19411  			break
 19412  		}
 19413  		if mem != x2.Args[1] {
 19414  			break
 19415  		}
 19416  		o0 := o1.Args[1]
 19417  		if o0.Op != OpPPC64OR {
 19418  			break
 19419  		}
 19420  		if o0.Type != t {
 19421  			break
 19422  		}
 19423  		_ = o0.Args[1]
 19424  		x0 := o0.Args[0]
 19425  		if x0.Op != OpPPC64MOVBZload {
 19426  			break
 19427  		}
 19428  		i0 := x0.AuxInt
 19429  		if x0.Aux != s {
 19430  			break
 19431  		}
 19432  		_ = x0.Args[1]
 19433  		if p != x0.Args[0] {
 19434  			break
 19435  		}
 19436  		if mem != x0.Args[1] {
 19437  			break
 19438  		}
 19439  		s0 := o0.Args[1]
 19440  		if s0.Op != OpPPC64SLDconst {
 19441  			break
 19442  		}
 19443  		if s0.AuxInt != 8 {
 19444  			break
 19445  		}
 19446  		x1 := s0.Args[0]
 19447  		if x1.Op != OpPPC64MOVBZload {
 19448  			break
 19449  		}
 19450  		i1 := x1.AuxInt
 19451  		if x1.Aux != s {
 19452  			break
 19453  		}
 19454  		_ = x1.Args[1]
 19455  		if p != x1.Args[0] {
 19456  			break
 19457  		}
 19458  		if mem != x1.Args[1] {
 19459  			break
 19460  		}
 19461  		s3 := o3.Args[1]
 19462  		if s3.Op != OpPPC64SLDconst {
 19463  			break
 19464  		}
 19465  		if s3.AuxInt != 32 {
 19466  			break
 19467  		}
 19468  		x4 := s3.Args[0]
 19469  		if x4.Op != OpPPC64MOVBZload {
 19470  			break
 19471  		}
 19472  		i4 := x4.AuxInt
 19473  		if x4.Aux != s {
 19474  			break
 19475  		}
 19476  		_ = x4.Args[1]
 19477  		if p != x4.Args[0] {
 19478  			break
 19479  		}
 19480  		if mem != x4.Args[1] {
 19481  			break
 19482  		}
 19483  		s5 := o5.Args[1]
 19484  		if s5.Op != OpPPC64SLDconst {
 19485  			break
 19486  		}
 19487  		if s5.AuxInt != 48 {
 19488  			break
 19489  		}
 19490  		x6 := s5.Args[0]
 19491  		if x6.Op != OpPPC64MOVBZload {
 19492  			break
 19493  		}
 19494  		i6 := x6.AuxInt
 19495  		if x6.Aux != s {
 19496  			break
 19497  		}
 19498  		_ = x6.Args[1]
 19499  		if p != x6.Args[0] {
 19500  			break
 19501  		}
 19502  		if mem != x6.Args[1] {
 19503  			break
 19504  		}
 19505  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19506  			break
 19507  		}
 19508  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19509  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19510  		v.reset(OpCopy)
 19511  		v.AddArg(v0)
 19512  		v0.AuxInt = i0
 19513  		v0.Aux = s
 19514  		v0.AddArg(p)
 19515  		v0.AddArg(mem)
 19516  		return true
 19517  	}
 19518  	return false
 19519  }
 19520  func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
 19521  	b := v.Block
 19522  	_ = b
 19523  	config := b.Func.Config
 19524  	_ = config
 19525  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19526  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19527  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19528  	for {
 19529  		t := v.Type
 19530  		_ = v.Args[1]
 19531  		s6 := v.Args[0]
 19532  		if s6.Op != OpPPC64SLDconst {
 19533  			break
 19534  		}
 19535  		if s6.AuxInt != 56 {
 19536  			break
 19537  		}
 19538  		x7 := s6.Args[0]
 19539  		if x7.Op != OpPPC64MOVBZload {
 19540  			break
 19541  		}
 19542  		i7 := x7.AuxInt
 19543  		s := x7.Aux
 19544  		_ = x7.Args[1]
 19545  		p := x7.Args[0]
 19546  		mem := x7.Args[1]
 19547  		o5 := v.Args[1]
 19548  		if o5.Op != OpPPC64OR {
 19549  			break
 19550  		}
 19551  		if o5.Type != t {
 19552  			break
 19553  		}
 19554  		_ = o5.Args[1]
 19555  		o4 := o5.Args[0]
 19556  		if o4.Op != OpPPC64OR {
 19557  			break
 19558  		}
 19559  		if o4.Type != t {
 19560  			break
 19561  		}
 19562  		_ = o4.Args[1]
 19563  		s4 := o4.Args[0]
 19564  		if s4.Op != OpPPC64SLDconst {
 19565  			break
 19566  		}
 19567  		if s4.AuxInt != 40 {
 19568  			break
 19569  		}
 19570  		x5 := s4.Args[0]
 19571  		if x5.Op != OpPPC64MOVBZload {
 19572  			break
 19573  		}
 19574  		i5 := x5.AuxInt
 19575  		if x5.Aux != s {
 19576  			break
 19577  		}
 19578  		_ = x5.Args[1]
 19579  		if p != x5.Args[0] {
 19580  			break
 19581  		}
 19582  		if mem != x5.Args[1] {
 19583  			break
 19584  		}
 19585  		o3 := o4.Args[1]
 19586  		if o3.Op != OpPPC64OR {
 19587  			break
 19588  		}
 19589  		if o3.Type != t {
 19590  			break
 19591  		}
 19592  		_ = o3.Args[1]
 19593  		o2 := o3.Args[0]
 19594  		if o2.Op != OpPPC64OR {
 19595  			break
 19596  		}
 19597  		if o2.Type != t {
 19598  			break
 19599  		}
 19600  		_ = o2.Args[1]
 19601  		s2 := o2.Args[0]
 19602  		if s2.Op != OpPPC64SLDconst {
 19603  			break
 19604  		}
 19605  		if s2.AuxInt != 24 {
 19606  			break
 19607  		}
 19608  		x3 := s2.Args[0]
 19609  		if x3.Op != OpPPC64MOVBZload {
 19610  			break
 19611  		}
 19612  		i3 := x3.AuxInt
 19613  		if x3.Aux != s {
 19614  			break
 19615  		}
 19616  		_ = x3.Args[1]
 19617  		if p != x3.Args[0] {
 19618  			break
 19619  		}
 19620  		if mem != x3.Args[1] {
 19621  			break
 19622  		}
 19623  		o1 := o2.Args[1]
 19624  		if o1.Op != OpPPC64OR {
 19625  			break
 19626  		}
 19627  		if o1.Type != t {
 19628  			break
 19629  		}
 19630  		_ = o1.Args[1]
 19631  		o0 := o1.Args[0]
 19632  		if o0.Op != OpPPC64OR {
 19633  			break
 19634  		}
 19635  		if o0.Type != t {
 19636  			break
 19637  		}
 19638  		_ = o0.Args[1]
 19639  		s0 := o0.Args[0]
 19640  		if s0.Op != OpPPC64SLDconst {
 19641  			break
 19642  		}
 19643  		if s0.AuxInt != 8 {
 19644  			break
 19645  		}
 19646  		x1 := s0.Args[0]
 19647  		if x1.Op != OpPPC64MOVBZload {
 19648  			break
 19649  		}
 19650  		i1 := x1.AuxInt
 19651  		if x1.Aux != s {
 19652  			break
 19653  		}
 19654  		_ = x1.Args[1]
 19655  		if p != x1.Args[0] {
 19656  			break
 19657  		}
 19658  		if mem != x1.Args[1] {
 19659  			break
 19660  		}
 19661  		x0 := o0.Args[1]
 19662  		if x0.Op != OpPPC64MOVBZload {
 19663  			break
 19664  		}
 19665  		i0 := x0.AuxInt
 19666  		if x0.Aux != s {
 19667  			break
 19668  		}
 19669  		_ = x0.Args[1]
 19670  		if p != x0.Args[0] {
 19671  			break
 19672  		}
 19673  		if mem != x0.Args[1] {
 19674  			break
 19675  		}
 19676  		s1 := o1.Args[1]
 19677  		if s1.Op != OpPPC64SLDconst {
 19678  			break
 19679  		}
 19680  		if s1.AuxInt != 16 {
 19681  			break
 19682  		}
 19683  		x2 := s1.Args[0]
 19684  		if x2.Op != OpPPC64MOVBZload {
 19685  			break
 19686  		}
 19687  		i2 := x2.AuxInt
 19688  		if x2.Aux != s {
 19689  			break
 19690  		}
 19691  		_ = x2.Args[1]
 19692  		if p != x2.Args[0] {
 19693  			break
 19694  		}
 19695  		if mem != x2.Args[1] {
 19696  			break
 19697  		}
 19698  		s3 := o3.Args[1]
 19699  		if s3.Op != OpPPC64SLDconst {
 19700  			break
 19701  		}
 19702  		if s3.AuxInt != 32 {
 19703  			break
 19704  		}
 19705  		x4 := s3.Args[0]
 19706  		if x4.Op != OpPPC64MOVBZload {
 19707  			break
 19708  		}
 19709  		i4 := x4.AuxInt
 19710  		if x4.Aux != s {
 19711  			break
 19712  		}
 19713  		_ = x4.Args[1]
 19714  		if p != x4.Args[0] {
 19715  			break
 19716  		}
 19717  		if mem != x4.Args[1] {
 19718  			break
 19719  		}
 19720  		s5 := o5.Args[1]
 19721  		if s5.Op != OpPPC64SLDconst {
 19722  			break
 19723  		}
 19724  		if s5.AuxInt != 48 {
 19725  			break
 19726  		}
 19727  		x6 := s5.Args[0]
 19728  		if x6.Op != OpPPC64MOVBZload {
 19729  			break
 19730  		}
 19731  		i6 := x6.AuxInt
 19732  		if x6.Aux != s {
 19733  			break
 19734  		}
 19735  		_ = x6.Args[1]
 19736  		if p != x6.Args[0] {
 19737  			break
 19738  		}
 19739  		if mem != x6.Args[1] {
 19740  			break
 19741  		}
 19742  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19743  			break
 19744  		}
 19745  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19746  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19747  		v.reset(OpCopy)
 19748  		v.AddArg(v0)
 19749  		v0.AuxInt = i0
 19750  		v0.Aux = s
 19751  		v0.AddArg(p)
 19752  		v0.AddArg(mem)
 19753  		return true
 19754  	}
 19755  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19756  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19757  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19758  	for {
 19759  		t := v.Type
 19760  		_ = v.Args[1]
 19761  		s6 := v.Args[0]
 19762  		if s6.Op != OpPPC64SLDconst {
 19763  			break
 19764  		}
 19765  		if s6.AuxInt != 56 {
 19766  			break
 19767  		}
 19768  		x7 := s6.Args[0]
 19769  		if x7.Op != OpPPC64MOVBZload {
 19770  			break
 19771  		}
 19772  		i7 := x7.AuxInt
 19773  		s := x7.Aux
 19774  		_ = x7.Args[1]
 19775  		p := x7.Args[0]
 19776  		mem := x7.Args[1]
 19777  		o5 := v.Args[1]
 19778  		if o5.Op != OpPPC64OR {
 19779  			break
 19780  		}
 19781  		if o5.Type != t {
 19782  			break
 19783  		}
 19784  		_ = o5.Args[1]
 19785  		o4 := o5.Args[0]
 19786  		if o4.Op != OpPPC64OR {
 19787  			break
 19788  		}
 19789  		if o4.Type != t {
 19790  			break
 19791  		}
 19792  		_ = o4.Args[1]
 19793  		s4 := o4.Args[0]
 19794  		if s4.Op != OpPPC64SLDconst {
 19795  			break
 19796  		}
 19797  		if s4.AuxInt != 40 {
 19798  			break
 19799  		}
 19800  		x5 := s4.Args[0]
 19801  		if x5.Op != OpPPC64MOVBZload {
 19802  			break
 19803  		}
 19804  		i5 := x5.AuxInt
 19805  		if x5.Aux != s {
 19806  			break
 19807  		}
 19808  		_ = x5.Args[1]
 19809  		if p != x5.Args[0] {
 19810  			break
 19811  		}
 19812  		if mem != x5.Args[1] {
 19813  			break
 19814  		}
 19815  		o3 := o4.Args[1]
 19816  		if o3.Op != OpPPC64OR {
 19817  			break
 19818  		}
 19819  		if o3.Type != t {
 19820  			break
 19821  		}
 19822  		_ = o3.Args[1]
 19823  		o2 := o3.Args[0]
 19824  		if o2.Op != OpPPC64OR {
 19825  			break
 19826  		}
 19827  		if o2.Type != t {
 19828  			break
 19829  		}
 19830  		_ = o2.Args[1]
 19831  		s2 := o2.Args[0]
 19832  		if s2.Op != OpPPC64SLDconst {
 19833  			break
 19834  		}
 19835  		if s2.AuxInt != 24 {
 19836  			break
 19837  		}
 19838  		x3 := s2.Args[0]
 19839  		if x3.Op != OpPPC64MOVBZload {
 19840  			break
 19841  		}
 19842  		i3 := x3.AuxInt
 19843  		if x3.Aux != s {
 19844  			break
 19845  		}
 19846  		_ = x3.Args[1]
 19847  		if p != x3.Args[0] {
 19848  			break
 19849  		}
 19850  		if mem != x3.Args[1] {
 19851  			break
 19852  		}
 19853  		o1 := o2.Args[1]
 19854  		if o1.Op != OpPPC64OR {
 19855  			break
 19856  		}
 19857  		if o1.Type != t {
 19858  			break
 19859  		}
 19860  		_ = o1.Args[1]
 19861  		o0 := o1.Args[0]
 19862  		if o0.Op != OpPPC64OR {
 19863  			break
 19864  		}
 19865  		if o0.Type != t {
 19866  			break
 19867  		}
 19868  		_ = o0.Args[1]
 19869  		x0 := o0.Args[0]
 19870  		if x0.Op != OpPPC64MOVBZload {
 19871  			break
 19872  		}
 19873  		i0 := x0.AuxInt
 19874  		if x0.Aux != s {
 19875  			break
 19876  		}
 19877  		_ = x0.Args[1]
 19878  		if p != x0.Args[0] {
 19879  			break
 19880  		}
 19881  		if mem != x0.Args[1] {
 19882  			break
 19883  		}
 19884  		s0 := o0.Args[1]
 19885  		if s0.Op != OpPPC64SLDconst {
 19886  			break
 19887  		}
 19888  		if s0.AuxInt != 8 {
 19889  			break
 19890  		}
 19891  		x1 := s0.Args[0]
 19892  		if x1.Op != OpPPC64MOVBZload {
 19893  			break
 19894  		}
 19895  		i1 := x1.AuxInt
 19896  		if x1.Aux != s {
 19897  			break
 19898  		}
 19899  		_ = x1.Args[1]
 19900  		if p != x1.Args[0] {
 19901  			break
 19902  		}
 19903  		if mem != x1.Args[1] {
 19904  			break
 19905  		}
 19906  		s1 := o1.Args[1]
 19907  		if s1.Op != OpPPC64SLDconst {
 19908  			break
 19909  		}
 19910  		if s1.AuxInt != 16 {
 19911  			break
 19912  		}
 19913  		x2 := s1.Args[0]
 19914  		if x2.Op != OpPPC64MOVBZload {
 19915  			break
 19916  		}
 19917  		i2 := x2.AuxInt
 19918  		if x2.Aux != s {
 19919  			break
 19920  		}
 19921  		_ = x2.Args[1]
 19922  		if p != x2.Args[0] {
 19923  			break
 19924  		}
 19925  		if mem != x2.Args[1] {
 19926  			break
 19927  		}
 19928  		s3 := o3.Args[1]
 19929  		if s3.Op != OpPPC64SLDconst {
 19930  			break
 19931  		}
 19932  		if s3.AuxInt != 32 {
 19933  			break
 19934  		}
 19935  		x4 := s3.Args[0]
 19936  		if x4.Op != OpPPC64MOVBZload {
 19937  			break
 19938  		}
 19939  		i4 := x4.AuxInt
 19940  		if x4.Aux != s {
 19941  			break
 19942  		}
 19943  		_ = x4.Args[1]
 19944  		if p != x4.Args[0] {
 19945  			break
 19946  		}
 19947  		if mem != x4.Args[1] {
 19948  			break
 19949  		}
 19950  		s5 := o5.Args[1]
 19951  		if s5.Op != OpPPC64SLDconst {
 19952  			break
 19953  		}
 19954  		if s5.AuxInt != 48 {
 19955  			break
 19956  		}
 19957  		x6 := s5.Args[0]
 19958  		if x6.Op != OpPPC64MOVBZload {
 19959  			break
 19960  		}
 19961  		i6 := x6.AuxInt
 19962  		if x6.Aux != s {
 19963  			break
 19964  		}
 19965  		_ = x6.Args[1]
 19966  		if p != x6.Args[0] {
 19967  			break
 19968  		}
 19969  		if mem != x6.Args[1] {
 19970  			break
 19971  		}
 19972  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19973  			break
 19974  		}
 19975  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19976  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19977  		v.reset(OpCopy)
 19978  		v.AddArg(v0)
 19979  		v0.AuxInt = i0
 19980  		v0.Aux = s
 19981  		v0.AddArg(p)
 19982  		v0.AddArg(mem)
 19983  		return true
 19984  	}
 19985  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19986  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19987  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19988  	for {
 19989  		t := v.Type
 19990  		_ = v.Args[1]
 19991  		s6 := v.Args[0]
 19992  		if s6.Op != OpPPC64SLDconst {
 19993  			break
 19994  		}
 19995  		if s6.AuxInt != 56 {
 19996  			break
 19997  		}
 19998  		x7 := s6.Args[0]
 19999  		if x7.Op != OpPPC64MOVBZload {
 20000  			break
 20001  		}
 20002  		i7 := x7.AuxInt
 20003  		s := x7.Aux
 20004  		_ = x7.Args[1]
 20005  		p := x7.Args[0]
 20006  		mem := x7.Args[1]
 20007  		o5 := v.Args[1]
 20008  		if o5.Op != OpPPC64OR {
 20009  			break
 20010  		}
 20011  		if o5.Type != t {
 20012  			break
 20013  		}
 20014  		_ = o5.Args[1]
 20015  		o4 := o5.Args[0]
 20016  		if o4.Op != OpPPC64OR {
 20017  			break
 20018  		}
 20019  		if o4.Type != t {
 20020  			break
 20021  		}
 20022  		_ = o4.Args[1]
 20023  		s4 := o4.Args[0]
 20024  		if s4.Op != OpPPC64SLDconst {
 20025  			break
 20026  		}
 20027  		if s4.AuxInt != 40 {
 20028  			break
 20029  		}
 20030  		x5 := s4.Args[0]
 20031  		if x5.Op != OpPPC64MOVBZload {
 20032  			break
 20033  		}
 20034  		i5 := x5.AuxInt
 20035  		if x5.Aux != s {
 20036  			break
 20037  		}
 20038  		_ = x5.Args[1]
 20039  		if p != x5.Args[0] {
 20040  			break
 20041  		}
 20042  		if mem != x5.Args[1] {
 20043  			break
 20044  		}
 20045  		o3 := o4.Args[1]
 20046  		if o3.Op != OpPPC64OR {
 20047  			break
 20048  		}
 20049  		if o3.Type != t {
 20050  			break
 20051  		}
 20052  		_ = o3.Args[1]
 20053  		o2 := o3.Args[0]
 20054  		if o2.Op != OpPPC64OR {
 20055  			break
 20056  		}
 20057  		if o2.Type != t {
 20058  			break
 20059  		}
 20060  		_ = o2.Args[1]
 20061  		o1 := o2.Args[0]
 20062  		if o1.Op != OpPPC64OR {
 20063  			break
 20064  		}
 20065  		if o1.Type != t {
 20066  			break
 20067  		}
 20068  		_ = o1.Args[1]
 20069  		s1 := o1.Args[0]
 20070  		if s1.Op != OpPPC64SLDconst {
 20071  			break
 20072  		}
 20073  		if s1.AuxInt != 16 {
 20074  			break
 20075  		}
 20076  		x2 := s1.Args[0]
 20077  		if x2.Op != OpPPC64MOVBZload {
 20078  			break
 20079  		}
 20080  		i2 := x2.AuxInt
 20081  		if x2.Aux != s {
 20082  			break
 20083  		}
 20084  		_ = x2.Args[1]
 20085  		if p != x2.Args[0] {
 20086  			break
 20087  		}
 20088  		if mem != x2.Args[1] {
 20089  			break
 20090  		}
 20091  		o0 := o1.Args[1]
 20092  		if o0.Op != OpPPC64OR {
 20093  			break
 20094  		}
 20095  		if o0.Type != t {
 20096  			break
 20097  		}
 20098  		_ = o0.Args[1]
 20099  		s0 := o0.Args[0]
 20100  		if s0.Op != OpPPC64SLDconst {
 20101  			break
 20102  		}
 20103  		if s0.AuxInt != 8 {
 20104  			break
 20105  		}
 20106  		x1 := s0.Args[0]
 20107  		if x1.Op != OpPPC64MOVBZload {
 20108  			break
 20109  		}
 20110  		i1 := x1.AuxInt
 20111  		if x1.Aux != s {
 20112  			break
 20113  		}
 20114  		_ = x1.Args[1]
 20115  		if p != x1.Args[0] {
 20116  			break
 20117  		}
 20118  		if mem != x1.Args[1] {
 20119  			break
 20120  		}
 20121  		x0 := o0.Args[1]
 20122  		if x0.Op != OpPPC64MOVBZload {
 20123  			break
 20124  		}
 20125  		i0 := x0.AuxInt
 20126  		if x0.Aux != s {
 20127  			break
 20128  		}
 20129  		_ = x0.Args[1]
 20130  		if p != x0.Args[0] {
 20131  			break
 20132  		}
 20133  		if mem != x0.Args[1] {
 20134  			break
 20135  		}
 20136  		s2 := o2.Args[1]
 20137  		if s2.Op != OpPPC64SLDconst {
 20138  			break
 20139  		}
 20140  		if s2.AuxInt != 24 {
 20141  			break
 20142  		}
 20143  		x3 := s2.Args[0]
 20144  		if x3.Op != OpPPC64MOVBZload {
 20145  			break
 20146  		}
 20147  		i3 := x3.AuxInt
 20148  		if x3.Aux != s {
 20149  			break
 20150  		}
 20151  		_ = x3.Args[1]
 20152  		if p != x3.Args[0] {
 20153  			break
 20154  		}
 20155  		if mem != x3.Args[1] {
 20156  			break
 20157  		}
 20158  		s3 := o3.Args[1]
 20159  		if s3.Op != OpPPC64SLDconst {
 20160  			break
 20161  		}
 20162  		if s3.AuxInt != 32 {
 20163  			break
 20164  		}
 20165  		x4 := s3.Args[0]
 20166  		if x4.Op != OpPPC64MOVBZload {
 20167  			break
 20168  		}
 20169  		i4 := x4.AuxInt
 20170  		if x4.Aux != s {
 20171  			break
 20172  		}
 20173  		_ = x4.Args[1]
 20174  		if p != x4.Args[0] {
 20175  			break
 20176  		}
 20177  		if mem != x4.Args[1] {
 20178  			break
 20179  		}
 20180  		s5 := o5.Args[1]
 20181  		if s5.Op != OpPPC64SLDconst {
 20182  			break
 20183  		}
 20184  		if s5.AuxInt != 48 {
 20185  			break
 20186  		}
 20187  		x6 := s5.Args[0]
 20188  		if x6.Op != OpPPC64MOVBZload {
 20189  			break
 20190  		}
 20191  		i6 := x6.AuxInt
 20192  		if x6.Aux != s {
 20193  			break
 20194  		}
 20195  		_ = x6.Args[1]
 20196  		if p != x6.Args[0] {
 20197  			break
 20198  		}
 20199  		if mem != x6.Args[1] {
 20200  			break
 20201  		}
 20202  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20203  			break
 20204  		}
 20205  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20206  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20207  		v.reset(OpCopy)
 20208  		v.AddArg(v0)
 20209  		v0.AuxInt = i0
 20210  		v0.Aux = s
 20211  		v0.AddArg(p)
 20212  		v0.AddArg(mem)
 20213  		return true
 20214  	}
 20215  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20216  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20217  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20218  	for {
 20219  		t := v.Type
 20220  		_ = v.Args[1]
 20221  		s6 := v.Args[0]
 20222  		if s6.Op != OpPPC64SLDconst {
 20223  			break
 20224  		}
 20225  		if s6.AuxInt != 56 {
 20226  			break
 20227  		}
 20228  		x7 := s6.Args[0]
 20229  		if x7.Op != OpPPC64MOVBZload {
 20230  			break
 20231  		}
 20232  		i7 := x7.AuxInt
 20233  		s := x7.Aux
 20234  		_ = x7.Args[1]
 20235  		p := x7.Args[0]
 20236  		mem := x7.Args[1]
 20237  		o5 := v.Args[1]
 20238  		if o5.Op != OpPPC64OR {
 20239  			break
 20240  		}
 20241  		if o5.Type != t {
 20242  			break
 20243  		}
 20244  		_ = o5.Args[1]
 20245  		o4 := o5.Args[0]
 20246  		if o4.Op != OpPPC64OR {
 20247  			break
 20248  		}
 20249  		if o4.Type != t {
 20250  			break
 20251  		}
 20252  		_ = o4.Args[1]
 20253  		s4 := o4.Args[0]
 20254  		if s4.Op != OpPPC64SLDconst {
 20255  			break
 20256  		}
 20257  		if s4.AuxInt != 40 {
 20258  			break
 20259  		}
 20260  		x5 := s4.Args[0]
 20261  		if x5.Op != OpPPC64MOVBZload {
 20262  			break
 20263  		}
 20264  		i5 := x5.AuxInt
 20265  		if x5.Aux != s {
 20266  			break
 20267  		}
 20268  		_ = x5.Args[1]
 20269  		if p != x5.Args[0] {
 20270  			break
 20271  		}
 20272  		if mem != x5.Args[1] {
 20273  			break
 20274  		}
 20275  		o3 := o4.Args[1]
 20276  		if o3.Op != OpPPC64OR {
 20277  			break
 20278  		}
 20279  		if o3.Type != t {
 20280  			break
 20281  		}
 20282  		_ = o3.Args[1]
 20283  		o2 := o3.Args[0]
 20284  		if o2.Op != OpPPC64OR {
 20285  			break
 20286  		}
 20287  		if o2.Type != t {
 20288  			break
 20289  		}
 20290  		_ = o2.Args[1]
 20291  		o1 := o2.Args[0]
 20292  		if o1.Op != OpPPC64OR {
 20293  			break
 20294  		}
 20295  		if o1.Type != t {
 20296  			break
 20297  		}
 20298  		_ = o1.Args[1]
 20299  		s1 := o1.Args[0]
 20300  		if s1.Op != OpPPC64SLDconst {
 20301  			break
 20302  		}
 20303  		if s1.AuxInt != 16 {
 20304  			break
 20305  		}
 20306  		x2 := s1.Args[0]
 20307  		if x2.Op != OpPPC64MOVBZload {
 20308  			break
 20309  		}
 20310  		i2 := x2.AuxInt
 20311  		if x2.Aux != s {
 20312  			break
 20313  		}
 20314  		_ = x2.Args[1]
 20315  		if p != x2.Args[0] {
 20316  			break
 20317  		}
 20318  		if mem != x2.Args[1] {
 20319  			break
 20320  		}
 20321  		o0 := o1.Args[1]
 20322  		if o0.Op != OpPPC64OR {
 20323  			break
 20324  		}
 20325  		if o0.Type != t {
 20326  			break
 20327  		}
 20328  		_ = o0.Args[1]
 20329  		x0 := o0.Args[0]
 20330  		if x0.Op != OpPPC64MOVBZload {
 20331  			break
 20332  		}
 20333  		i0 := x0.AuxInt
 20334  		if x0.Aux != s {
 20335  			break
 20336  		}
 20337  		_ = x0.Args[1]
 20338  		if p != x0.Args[0] {
 20339  			break
 20340  		}
 20341  		if mem != x0.Args[1] {
 20342  			break
 20343  		}
 20344  		s0 := o0.Args[1]
 20345  		if s0.Op != OpPPC64SLDconst {
 20346  			break
 20347  		}
 20348  		if s0.AuxInt != 8 {
 20349  			break
 20350  		}
 20351  		x1 := s0.Args[0]
 20352  		if x1.Op != OpPPC64MOVBZload {
 20353  			break
 20354  		}
 20355  		i1 := x1.AuxInt
 20356  		if x1.Aux != s {
 20357  			break
 20358  		}
 20359  		_ = x1.Args[1]
 20360  		if p != x1.Args[0] {
 20361  			break
 20362  		}
 20363  		if mem != x1.Args[1] {
 20364  			break
 20365  		}
 20366  		s2 := o2.Args[1]
 20367  		if s2.Op != OpPPC64SLDconst {
 20368  			break
 20369  		}
 20370  		if s2.AuxInt != 24 {
 20371  			break
 20372  		}
 20373  		x3 := s2.Args[0]
 20374  		if x3.Op != OpPPC64MOVBZload {
 20375  			break
 20376  		}
 20377  		i3 := x3.AuxInt
 20378  		if x3.Aux != s {
 20379  			break
 20380  		}
 20381  		_ = x3.Args[1]
 20382  		if p != x3.Args[0] {
 20383  			break
 20384  		}
 20385  		if mem != x3.Args[1] {
 20386  			break
 20387  		}
 20388  		s3 := o3.Args[1]
 20389  		if s3.Op != OpPPC64SLDconst {
 20390  			break
 20391  		}
 20392  		if s3.AuxInt != 32 {
 20393  			break
 20394  		}
 20395  		x4 := s3.Args[0]
 20396  		if x4.Op != OpPPC64MOVBZload {
 20397  			break
 20398  		}
 20399  		i4 := x4.AuxInt
 20400  		if x4.Aux != s {
 20401  			break
 20402  		}
 20403  		_ = x4.Args[1]
 20404  		if p != x4.Args[0] {
 20405  			break
 20406  		}
 20407  		if mem != x4.Args[1] {
 20408  			break
 20409  		}
 20410  		s5 := o5.Args[1]
 20411  		if s5.Op != OpPPC64SLDconst {
 20412  			break
 20413  		}
 20414  		if s5.AuxInt != 48 {
 20415  			break
 20416  		}
 20417  		x6 := s5.Args[0]
 20418  		if x6.Op != OpPPC64MOVBZload {
 20419  			break
 20420  		}
 20421  		i6 := x6.AuxInt
 20422  		if x6.Aux != s {
 20423  			break
 20424  		}
 20425  		_ = x6.Args[1]
 20426  		if p != x6.Args[0] {
 20427  			break
 20428  		}
 20429  		if mem != x6.Args[1] {
 20430  			break
 20431  		}
 20432  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20433  			break
 20434  		}
 20435  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20436  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20437  		v.reset(OpCopy)
 20438  		v.AddArg(v0)
 20439  		v0.AuxInt = i0
 20440  		v0.Aux = s
 20441  		v0.AddArg(p)
 20442  		v0.AddArg(mem)
 20443  		return true
 20444  	}
 20445  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20446  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20447  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20448  	for {
 20449  		t := v.Type
 20450  		_ = v.Args[1]
 20451  		s6 := v.Args[0]
 20452  		if s6.Op != OpPPC64SLDconst {
 20453  			break
 20454  		}
 20455  		if s6.AuxInt != 56 {
 20456  			break
 20457  		}
 20458  		x7 := s6.Args[0]
 20459  		if x7.Op != OpPPC64MOVBZload {
 20460  			break
 20461  		}
 20462  		i7 := x7.AuxInt
 20463  		s := x7.Aux
 20464  		_ = x7.Args[1]
 20465  		p := x7.Args[0]
 20466  		mem := x7.Args[1]
 20467  		o5 := v.Args[1]
 20468  		if o5.Op != OpPPC64OR {
 20469  			break
 20470  		}
 20471  		if o5.Type != t {
 20472  			break
 20473  		}
 20474  		_ = o5.Args[1]
 20475  		o4 := o5.Args[0]
 20476  		if o4.Op != OpPPC64OR {
 20477  			break
 20478  		}
 20479  		if o4.Type != t {
 20480  			break
 20481  		}
 20482  		_ = o4.Args[1]
 20483  		s4 := o4.Args[0]
 20484  		if s4.Op != OpPPC64SLDconst {
 20485  			break
 20486  		}
 20487  		if s4.AuxInt != 40 {
 20488  			break
 20489  		}
 20490  		x5 := s4.Args[0]
 20491  		if x5.Op != OpPPC64MOVBZload {
 20492  			break
 20493  		}
 20494  		i5 := x5.AuxInt
 20495  		if x5.Aux != s {
 20496  			break
 20497  		}
 20498  		_ = x5.Args[1]
 20499  		if p != x5.Args[0] {
 20500  			break
 20501  		}
 20502  		if mem != x5.Args[1] {
 20503  			break
 20504  		}
 20505  		o3 := o4.Args[1]
 20506  		if o3.Op != OpPPC64OR {
 20507  			break
 20508  		}
 20509  		if o3.Type != t {
 20510  			break
 20511  		}
 20512  		_ = o3.Args[1]
 20513  		o2 := o3.Args[0]
 20514  		if o2.Op != OpPPC64OR {
 20515  			break
 20516  		}
 20517  		if o2.Type != t {
 20518  			break
 20519  		}
 20520  		_ = o2.Args[1]
 20521  		o1 := o2.Args[0]
 20522  		if o1.Op != OpPPC64OR {
 20523  			break
 20524  		}
 20525  		if o1.Type != t {
 20526  			break
 20527  		}
 20528  		_ = o1.Args[1]
 20529  		o0 := o1.Args[0]
 20530  		if o0.Op != OpPPC64OR {
 20531  			break
 20532  		}
 20533  		if o0.Type != t {
 20534  			break
 20535  		}
 20536  		_ = o0.Args[1]
 20537  		s0 := o0.Args[0]
 20538  		if s0.Op != OpPPC64SLDconst {
 20539  			break
 20540  		}
 20541  		if s0.AuxInt != 8 {
 20542  			break
 20543  		}
 20544  		x1 := s0.Args[0]
 20545  		if x1.Op != OpPPC64MOVBZload {
 20546  			break
 20547  		}
 20548  		i1 := x1.AuxInt
 20549  		if x1.Aux != s {
 20550  			break
 20551  		}
 20552  		_ = x1.Args[1]
 20553  		if p != x1.Args[0] {
 20554  			break
 20555  		}
 20556  		if mem != x1.Args[1] {
 20557  			break
 20558  		}
 20559  		x0 := o0.Args[1]
 20560  		if x0.Op != OpPPC64MOVBZload {
 20561  			break
 20562  		}
 20563  		i0 := x0.AuxInt
 20564  		if x0.Aux != s {
 20565  			break
 20566  		}
 20567  		_ = x0.Args[1]
 20568  		if p != x0.Args[0] {
 20569  			break
 20570  		}
 20571  		if mem != x0.Args[1] {
 20572  			break
 20573  		}
 20574  		s1 := o1.Args[1]
 20575  		if s1.Op != OpPPC64SLDconst {
 20576  			break
 20577  		}
 20578  		if s1.AuxInt != 16 {
 20579  			break
 20580  		}
 20581  		x2 := s1.Args[0]
 20582  		if x2.Op != OpPPC64MOVBZload {
 20583  			break
 20584  		}
 20585  		i2 := x2.AuxInt
 20586  		if x2.Aux != s {
 20587  			break
 20588  		}
 20589  		_ = x2.Args[1]
 20590  		if p != x2.Args[0] {
 20591  			break
 20592  		}
 20593  		if mem != x2.Args[1] {
 20594  			break
 20595  		}
 20596  		s2 := o2.Args[1]
 20597  		if s2.Op != OpPPC64SLDconst {
 20598  			break
 20599  		}
 20600  		if s2.AuxInt != 24 {
 20601  			break
 20602  		}
 20603  		x3 := s2.Args[0]
 20604  		if x3.Op != OpPPC64MOVBZload {
 20605  			break
 20606  		}
 20607  		i3 := x3.AuxInt
 20608  		if x3.Aux != s {
 20609  			break
 20610  		}
 20611  		_ = x3.Args[1]
 20612  		if p != x3.Args[0] {
 20613  			break
 20614  		}
 20615  		if mem != x3.Args[1] {
 20616  			break
 20617  		}
 20618  		s3 := o3.Args[1]
 20619  		if s3.Op != OpPPC64SLDconst {
 20620  			break
 20621  		}
 20622  		if s3.AuxInt != 32 {
 20623  			break
 20624  		}
 20625  		x4 := s3.Args[0]
 20626  		if x4.Op != OpPPC64MOVBZload {
 20627  			break
 20628  		}
 20629  		i4 := x4.AuxInt
 20630  		if x4.Aux != s {
 20631  			break
 20632  		}
 20633  		_ = x4.Args[1]
 20634  		if p != x4.Args[0] {
 20635  			break
 20636  		}
 20637  		if mem != x4.Args[1] {
 20638  			break
 20639  		}
 20640  		s5 := o5.Args[1]
 20641  		if s5.Op != OpPPC64SLDconst {
 20642  			break
 20643  		}
 20644  		if s5.AuxInt != 48 {
 20645  			break
 20646  		}
 20647  		x6 := s5.Args[0]
 20648  		if x6.Op != OpPPC64MOVBZload {
 20649  			break
 20650  		}
 20651  		i6 := x6.AuxInt
 20652  		if x6.Aux != s {
 20653  			break
 20654  		}
 20655  		_ = x6.Args[1]
 20656  		if p != x6.Args[0] {
 20657  			break
 20658  		}
 20659  		if mem != x6.Args[1] {
 20660  			break
 20661  		}
 20662  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20663  			break
 20664  		}
 20665  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20666  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20667  		v.reset(OpCopy)
 20668  		v.AddArg(v0)
 20669  		v0.AuxInt = i0
 20670  		v0.Aux = s
 20671  		v0.AddArg(p)
 20672  		v0.AddArg(mem)
 20673  		return true
 20674  	}
 20675  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20676  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20677  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20678  	for {
 20679  		t := v.Type
 20680  		_ = v.Args[1]
 20681  		s6 := v.Args[0]
 20682  		if s6.Op != OpPPC64SLDconst {
 20683  			break
 20684  		}
 20685  		if s6.AuxInt != 56 {
 20686  			break
 20687  		}
 20688  		x7 := s6.Args[0]
 20689  		if x7.Op != OpPPC64MOVBZload {
 20690  			break
 20691  		}
 20692  		i7 := x7.AuxInt
 20693  		s := x7.Aux
 20694  		_ = x7.Args[1]
 20695  		p := x7.Args[0]
 20696  		mem := x7.Args[1]
 20697  		o5 := v.Args[1]
 20698  		if o5.Op != OpPPC64OR {
 20699  			break
 20700  		}
 20701  		if o5.Type != t {
 20702  			break
 20703  		}
 20704  		_ = o5.Args[1]
 20705  		o4 := o5.Args[0]
 20706  		if o4.Op != OpPPC64OR {
 20707  			break
 20708  		}
 20709  		if o4.Type != t {
 20710  			break
 20711  		}
 20712  		_ = o4.Args[1]
 20713  		s4 := o4.Args[0]
 20714  		if s4.Op != OpPPC64SLDconst {
 20715  			break
 20716  		}
 20717  		if s4.AuxInt != 40 {
 20718  			break
 20719  		}
 20720  		x5 := s4.Args[0]
 20721  		if x5.Op != OpPPC64MOVBZload {
 20722  			break
 20723  		}
 20724  		i5 := x5.AuxInt
 20725  		if x5.Aux != s {
 20726  			break
 20727  		}
 20728  		_ = x5.Args[1]
 20729  		if p != x5.Args[0] {
 20730  			break
 20731  		}
 20732  		if mem != x5.Args[1] {
 20733  			break
 20734  		}
 20735  		o3 := o4.Args[1]
 20736  		if o3.Op != OpPPC64OR {
 20737  			break
 20738  		}
 20739  		if o3.Type != t {
 20740  			break
 20741  		}
 20742  		_ = o3.Args[1]
 20743  		o2 := o3.Args[0]
 20744  		if o2.Op != OpPPC64OR {
 20745  			break
 20746  		}
 20747  		if o2.Type != t {
 20748  			break
 20749  		}
 20750  		_ = o2.Args[1]
 20751  		o1 := o2.Args[0]
 20752  		if o1.Op != OpPPC64OR {
 20753  			break
 20754  		}
 20755  		if o1.Type != t {
 20756  			break
 20757  		}
 20758  		_ = o1.Args[1]
 20759  		o0 := o1.Args[0]
 20760  		if o0.Op != OpPPC64OR {
 20761  			break
 20762  		}
 20763  		if o0.Type != t {
 20764  			break
 20765  		}
 20766  		_ = o0.Args[1]
 20767  		x0 := o0.Args[0]
 20768  		if x0.Op != OpPPC64MOVBZload {
 20769  			break
 20770  		}
 20771  		i0 := x0.AuxInt
 20772  		if x0.Aux != s {
 20773  			break
 20774  		}
 20775  		_ = x0.Args[1]
 20776  		if p != x0.Args[0] {
 20777  			break
 20778  		}
 20779  		if mem != x0.Args[1] {
 20780  			break
 20781  		}
 20782  		s0 := o0.Args[1]
 20783  		if s0.Op != OpPPC64SLDconst {
 20784  			break
 20785  		}
 20786  		if s0.AuxInt != 8 {
 20787  			break
 20788  		}
 20789  		x1 := s0.Args[0]
 20790  		if x1.Op != OpPPC64MOVBZload {
 20791  			break
 20792  		}
 20793  		i1 := x1.AuxInt
 20794  		if x1.Aux != s {
 20795  			break
 20796  		}
 20797  		_ = x1.Args[1]
 20798  		if p != x1.Args[0] {
 20799  			break
 20800  		}
 20801  		if mem != x1.Args[1] {
 20802  			break
 20803  		}
 20804  		s1 := o1.Args[1]
 20805  		if s1.Op != OpPPC64SLDconst {
 20806  			break
 20807  		}
 20808  		if s1.AuxInt != 16 {
 20809  			break
 20810  		}
 20811  		x2 := s1.Args[0]
 20812  		if x2.Op != OpPPC64MOVBZload {
 20813  			break
 20814  		}
 20815  		i2 := x2.AuxInt
 20816  		if x2.Aux != s {
 20817  			break
 20818  		}
 20819  		_ = x2.Args[1]
 20820  		if p != x2.Args[0] {
 20821  			break
 20822  		}
 20823  		if mem != x2.Args[1] {
 20824  			break
 20825  		}
 20826  		s2 := o2.Args[1]
 20827  		if s2.Op != OpPPC64SLDconst {
 20828  			break
 20829  		}
 20830  		if s2.AuxInt != 24 {
 20831  			break
 20832  		}
 20833  		x3 := s2.Args[0]
 20834  		if x3.Op != OpPPC64MOVBZload {
 20835  			break
 20836  		}
 20837  		i3 := x3.AuxInt
 20838  		if x3.Aux != s {
 20839  			break
 20840  		}
 20841  		_ = x3.Args[1]
 20842  		if p != x3.Args[0] {
 20843  			break
 20844  		}
 20845  		if mem != x3.Args[1] {
 20846  			break
 20847  		}
 20848  		s3 := o3.Args[1]
 20849  		if s3.Op != OpPPC64SLDconst {
 20850  			break
 20851  		}
 20852  		if s3.AuxInt != 32 {
 20853  			break
 20854  		}
 20855  		x4 := s3.Args[0]
 20856  		if x4.Op != OpPPC64MOVBZload {
 20857  			break
 20858  		}
 20859  		i4 := x4.AuxInt
 20860  		if x4.Aux != s {
 20861  			break
 20862  		}
 20863  		_ = x4.Args[1]
 20864  		if p != x4.Args[0] {
 20865  			break
 20866  		}
 20867  		if mem != x4.Args[1] {
 20868  			break
 20869  		}
 20870  		s5 := o5.Args[1]
 20871  		if s5.Op != OpPPC64SLDconst {
 20872  			break
 20873  		}
 20874  		if s5.AuxInt != 48 {
 20875  			break
 20876  		}
 20877  		x6 := s5.Args[0]
 20878  		if x6.Op != OpPPC64MOVBZload {
 20879  			break
 20880  		}
 20881  		i6 := x6.AuxInt
 20882  		if x6.Aux != s {
 20883  			break
 20884  		}
 20885  		_ = x6.Args[1]
 20886  		if p != x6.Args[0] {
 20887  			break
 20888  		}
 20889  		if mem != x6.Args[1] {
 20890  			break
 20891  		}
 20892  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20893  			break
 20894  		}
 20895  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20896  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20897  		v.reset(OpCopy)
 20898  		v.AddArg(v0)
 20899  		v0.AuxInt = i0
 20900  		v0.Aux = s
 20901  		v0.AddArg(p)
 20902  		v0.AddArg(mem)
 20903  		return true
 20904  	}
 20905  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20906  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20907  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20908  	for {
 20909  		t := v.Type
 20910  		_ = v.Args[1]
 20911  		s6 := v.Args[0]
 20912  		if s6.Op != OpPPC64SLDconst {
 20913  			break
 20914  		}
 20915  		if s6.AuxInt != 56 {
 20916  			break
 20917  		}
 20918  		x7 := s6.Args[0]
 20919  		if x7.Op != OpPPC64MOVBZload {
 20920  			break
 20921  		}
 20922  		i7 := x7.AuxInt
 20923  		s := x7.Aux
 20924  		_ = x7.Args[1]
 20925  		p := x7.Args[0]
 20926  		mem := x7.Args[1]
 20927  		o5 := v.Args[1]
 20928  		if o5.Op != OpPPC64OR {
 20929  			break
 20930  		}
 20931  		if o5.Type != t {
 20932  			break
 20933  		}
 20934  		_ = o5.Args[1]
 20935  		o4 := o5.Args[0]
 20936  		if o4.Op != OpPPC64OR {
 20937  			break
 20938  		}
 20939  		if o4.Type != t {
 20940  			break
 20941  		}
 20942  		_ = o4.Args[1]
 20943  		o3 := o4.Args[0]
 20944  		if o3.Op != OpPPC64OR {
 20945  			break
 20946  		}
 20947  		if o3.Type != t {
 20948  			break
 20949  		}
 20950  		_ = o3.Args[1]
 20951  		s3 := o3.Args[0]
 20952  		if s3.Op != OpPPC64SLDconst {
 20953  			break
 20954  		}
 20955  		if s3.AuxInt != 32 {
 20956  			break
 20957  		}
 20958  		x4 := s3.Args[0]
 20959  		if x4.Op != OpPPC64MOVBZload {
 20960  			break
 20961  		}
 20962  		i4 := x4.AuxInt
 20963  		if x4.Aux != s {
 20964  			break
 20965  		}
 20966  		_ = x4.Args[1]
 20967  		if p != x4.Args[0] {
 20968  			break
 20969  		}
 20970  		if mem != x4.Args[1] {
 20971  			break
 20972  		}
 20973  		o2 := o3.Args[1]
 20974  		if o2.Op != OpPPC64OR {
 20975  			break
 20976  		}
 20977  		if o2.Type != t {
 20978  			break
 20979  		}
 20980  		_ = o2.Args[1]
 20981  		s2 := o2.Args[0]
 20982  		if s2.Op != OpPPC64SLDconst {
 20983  			break
 20984  		}
 20985  		if s2.AuxInt != 24 {
 20986  			break
 20987  		}
 20988  		x3 := s2.Args[0]
 20989  		if x3.Op != OpPPC64MOVBZload {
 20990  			break
 20991  		}
 20992  		i3 := x3.AuxInt
 20993  		if x3.Aux != s {
 20994  			break
 20995  		}
 20996  		_ = x3.Args[1]
 20997  		if p != x3.Args[0] {
 20998  			break
 20999  		}
 21000  		if mem != x3.Args[1] {
 21001  			break
 21002  		}
 21003  		o1 := o2.Args[1]
 21004  		if o1.Op != OpPPC64OR {
 21005  			break
 21006  		}
 21007  		if o1.Type != t {
 21008  			break
 21009  		}
 21010  		_ = o1.Args[1]
 21011  		s1 := o1.Args[0]
 21012  		if s1.Op != OpPPC64SLDconst {
 21013  			break
 21014  		}
 21015  		if s1.AuxInt != 16 {
 21016  			break
 21017  		}
 21018  		x2 := s1.Args[0]
 21019  		if x2.Op != OpPPC64MOVBZload {
 21020  			break
 21021  		}
 21022  		i2 := x2.AuxInt
 21023  		if x2.Aux != s {
 21024  			break
 21025  		}
 21026  		_ = x2.Args[1]
 21027  		if p != x2.Args[0] {
 21028  			break
 21029  		}
 21030  		if mem != x2.Args[1] {
 21031  			break
 21032  		}
 21033  		o0 := o1.Args[1]
 21034  		if o0.Op != OpPPC64OR {
 21035  			break
 21036  		}
 21037  		if o0.Type != t {
 21038  			break
 21039  		}
 21040  		_ = o0.Args[1]
 21041  		s0 := o0.Args[0]
 21042  		if s0.Op != OpPPC64SLDconst {
 21043  			break
 21044  		}
 21045  		if s0.AuxInt != 8 {
 21046  			break
 21047  		}
 21048  		x1 := s0.Args[0]
 21049  		if x1.Op != OpPPC64MOVBZload {
 21050  			break
 21051  		}
 21052  		i1 := x1.AuxInt
 21053  		if x1.Aux != s {
 21054  			break
 21055  		}
 21056  		_ = x1.Args[1]
 21057  		if p != x1.Args[0] {
 21058  			break
 21059  		}
 21060  		if mem != x1.Args[1] {
 21061  			break
 21062  		}
 21063  		x0 := o0.Args[1]
 21064  		if x0.Op != OpPPC64MOVBZload {
 21065  			break
 21066  		}
 21067  		i0 := x0.AuxInt
 21068  		if x0.Aux != s {
 21069  			break
 21070  		}
 21071  		_ = x0.Args[1]
 21072  		if p != x0.Args[0] {
 21073  			break
 21074  		}
 21075  		if mem != x0.Args[1] {
 21076  			break
 21077  		}
 21078  		s4 := o4.Args[1]
 21079  		if s4.Op != OpPPC64SLDconst {
 21080  			break
 21081  		}
 21082  		if s4.AuxInt != 40 {
 21083  			break
 21084  		}
 21085  		x5 := s4.Args[0]
 21086  		if x5.Op != OpPPC64MOVBZload {
 21087  			break
 21088  		}
 21089  		i5 := x5.AuxInt
 21090  		if x5.Aux != s {
 21091  			break
 21092  		}
 21093  		_ = x5.Args[1]
 21094  		if p != x5.Args[0] {
 21095  			break
 21096  		}
 21097  		if mem != x5.Args[1] {
 21098  			break
 21099  		}
 21100  		s5 := o5.Args[1]
 21101  		if s5.Op != OpPPC64SLDconst {
 21102  			break
 21103  		}
 21104  		if s5.AuxInt != 48 {
 21105  			break
 21106  		}
 21107  		x6 := s5.Args[0]
 21108  		if x6.Op != OpPPC64MOVBZload {
 21109  			break
 21110  		}
 21111  		i6 := x6.AuxInt
 21112  		if x6.Aux != s {
 21113  			break
 21114  		}
 21115  		_ = x6.Args[1]
 21116  		if p != x6.Args[0] {
 21117  			break
 21118  		}
 21119  		if mem != x6.Args[1] {
 21120  			break
 21121  		}
 21122  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21123  			break
 21124  		}
 21125  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21126  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21127  		v.reset(OpCopy)
 21128  		v.AddArg(v0)
 21129  		v0.AuxInt = i0
 21130  		v0.Aux = s
 21131  		v0.AddArg(p)
 21132  		v0.AddArg(mem)
 21133  		return true
 21134  	}
 21135  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21136  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21137  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21138  	for {
 21139  		t := v.Type
 21140  		_ = v.Args[1]
 21141  		s6 := v.Args[0]
 21142  		if s6.Op != OpPPC64SLDconst {
 21143  			break
 21144  		}
 21145  		if s6.AuxInt != 56 {
 21146  			break
 21147  		}
 21148  		x7 := s6.Args[0]
 21149  		if x7.Op != OpPPC64MOVBZload {
 21150  			break
 21151  		}
 21152  		i7 := x7.AuxInt
 21153  		s := x7.Aux
 21154  		_ = x7.Args[1]
 21155  		p := x7.Args[0]
 21156  		mem := x7.Args[1]
 21157  		o5 := v.Args[1]
 21158  		if o5.Op != OpPPC64OR {
 21159  			break
 21160  		}
 21161  		if o5.Type != t {
 21162  			break
 21163  		}
 21164  		_ = o5.Args[1]
 21165  		o4 := o5.Args[0]
 21166  		if o4.Op != OpPPC64OR {
 21167  			break
 21168  		}
 21169  		if o4.Type != t {
 21170  			break
 21171  		}
 21172  		_ = o4.Args[1]
 21173  		o3 := o4.Args[0]
 21174  		if o3.Op != OpPPC64OR {
 21175  			break
 21176  		}
 21177  		if o3.Type != t {
 21178  			break
 21179  		}
 21180  		_ = o3.Args[1]
 21181  		s3 := o3.Args[0]
 21182  		if s3.Op != OpPPC64SLDconst {
 21183  			break
 21184  		}
 21185  		if s3.AuxInt != 32 {
 21186  			break
 21187  		}
 21188  		x4 := s3.Args[0]
 21189  		if x4.Op != OpPPC64MOVBZload {
 21190  			break
 21191  		}
 21192  		i4 := x4.AuxInt
 21193  		if x4.Aux != s {
 21194  			break
 21195  		}
 21196  		_ = x4.Args[1]
 21197  		if p != x4.Args[0] {
 21198  			break
 21199  		}
 21200  		if mem != x4.Args[1] {
 21201  			break
 21202  		}
 21203  		o2 := o3.Args[1]
 21204  		if o2.Op != OpPPC64OR {
 21205  			break
 21206  		}
 21207  		if o2.Type != t {
 21208  			break
 21209  		}
 21210  		_ = o2.Args[1]
 21211  		s2 := o2.Args[0]
 21212  		if s2.Op != OpPPC64SLDconst {
 21213  			break
 21214  		}
 21215  		if s2.AuxInt != 24 {
 21216  			break
 21217  		}
 21218  		x3 := s2.Args[0]
 21219  		if x3.Op != OpPPC64MOVBZload {
 21220  			break
 21221  		}
 21222  		i3 := x3.AuxInt
 21223  		if x3.Aux != s {
 21224  			break
 21225  		}
 21226  		_ = x3.Args[1]
 21227  		if p != x3.Args[0] {
 21228  			break
 21229  		}
 21230  		if mem != x3.Args[1] {
 21231  			break
 21232  		}
 21233  		o1 := o2.Args[1]
 21234  		if o1.Op != OpPPC64OR {
 21235  			break
 21236  		}
 21237  		if o1.Type != t {
 21238  			break
 21239  		}
 21240  		_ = o1.Args[1]
 21241  		s1 := o1.Args[0]
 21242  		if s1.Op != OpPPC64SLDconst {
 21243  			break
 21244  		}
 21245  		if s1.AuxInt != 16 {
 21246  			break
 21247  		}
 21248  		x2 := s1.Args[0]
 21249  		if x2.Op != OpPPC64MOVBZload {
 21250  			break
 21251  		}
 21252  		i2 := x2.AuxInt
 21253  		if x2.Aux != s {
 21254  			break
 21255  		}
 21256  		_ = x2.Args[1]
 21257  		if p != x2.Args[0] {
 21258  			break
 21259  		}
 21260  		if mem != x2.Args[1] {
 21261  			break
 21262  		}
 21263  		o0 := o1.Args[1]
 21264  		if o0.Op != OpPPC64OR {
 21265  			break
 21266  		}
 21267  		if o0.Type != t {
 21268  			break
 21269  		}
 21270  		_ = o0.Args[1]
 21271  		x0 := o0.Args[0]
 21272  		if x0.Op != OpPPC64MOVBZload {
 21273  			break
 21274  		}
 21275  		i0 := x0.AuxInt
 21276  		if x0.Aux != s {
 21277  			break
 21278  		}
 21279  		_ = x0.Args[1]
 21280  		if p != x0.Args[0] {
 21281  			break
 21282  		}
 21283  		if mem != x0.Args[1] {
 21284  			break
 21285  		}
 21286  		s0 := o0.Args[1]
 21287  		if s0.Op != OpPPC64SLDconst {
 21288  			break
 21289  		}
 21290  		if s0.AuxInt != 8 {
 21291  			break
 21292  		}
 21293  		x1 := s0.Args[0]
 21294  		if x1.Op != OpPPC64MOVBZload {
 21295  			break
 21296  		}
 21297  		i1 := x1.AuxInt
 21298  		if x1.Aux != s {
 21299  			break
 21300  		}
 21301  		_ = x1.Args[1]
 21302  		if p != x1.Args[0] {
 21303  			break
 21304  		}
 21305  		if mem != x1.Args[1] {
 21306  			break
 21307  		}
 21308  		s4 := o4.Args[1]
 21309  		if s4.Op != OpPPC64SLDconst {
 21310  			break
 21311  		}
 21312  		if s4.AuxInt != 40 {
 21313  			break
 21314  		}
 21315  		x5 := s4.Args[0]
 21316  		if x5.Op != OpPPC64MOVBZload {
 21317  			break
 21318  		}
 21319  		i5 := x5.AuxInt
 21320  		if x5.Aux != s {
 21321  			break
 21322  		}
 21323  		_ = x5.Args[1]
 21324  		if p != x5.Args[0] {
 21325  			break
 21326  		}
 21327  		if mem != x5.Args[1] {
 21328  			break
 21329  		}
 21330  		s5 := o5.Args[1]
 21331  		if s5.Op != OpPPC64SLDconst {
 21332  			break
 21333  		}
 21334  		if s5.AuxInt != 48 {
 21335  			break
 21336  		}
 21337  		x6 := s5.Args[0]
 21338  		if x6.Op != OpPPC64MOVBZload {
 21339  			break
 21340  		}
 21341  		i6 := x6.AuxInt
 21342  		if x6.Aux != s {
 21343  			break
 21344  		}
 21345  		_ = x6.Args[1]
 21346  		if p != x6.Args[0] {
 21347  			break
 21348  		}
 21349  		if mem != x6.Args[1] {
 21350  			break
 21351  		}
 21352  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21353  			break
 21354  		}
 21355  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21356  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21357  		v.reset(OpCopy)
 21358  		v.AddArg(v0)
 21359  		v0.AuxInt = i0
 21360  		v0.Aux = s
 21361  		v0.AddArg(p)
 21362  		v0.AddArg(mem)
 21363  		return true
 21364  	}
 21365  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21366  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21367  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21368  	for {
 21369  		t := v.Type
 21370  		_ = v.Args[1]
 21371  		s6 := v.Args[0]
 21372  		if s6.Op != OpPPC64SLDconst {
 21373  			break
 21374  		}
 21375  		if s6.AuxInt != 56 {
 21376  			break
 21377  		}
 21378  		x7 := s6.Args[0]
 21379  		if x7.Op != OpPPC64MOVBZload {
 21380  			break
 21381  		}
 21382  		i7 := x7.AuxInt
 21383  		s := x7.Aux
 21384  		_ = x7.Args[1]
 21385  		p := x7.Args[0]
 21386  		mem := x7.Args[1]
 21387  		o5 := v.Args[1]
 21388  		if o5.Op != OpPPC64OR {
 21389  			break
 21390  		}
 21391  		if o5.Type != t {
 21392  			break
 21393  		}
 21394  		_ = o5.Args[1]
 21395  		o4 := o5.Args[0]
 21396  		if o4.Op != OpPPC64OR {
 21397  			break
 21398  		}
 21399  		if o4.Type != t {
 21400  			break
 21401  		}
 21402  		_ = o4.Args[1]
 21403  		o3 := o4.Args[0]
 21404  		if o3.Op != OpPPC64OR {
 21405  			break
 21406  		}
 21407  		if o3.Type != t {
 21408  			break
 21409  		}
 21410  		_ = o3.Args[1]
 21411  		s3 := o3.Args[0]
 21412  		if s3.Op != OpPPC64SLDconst {
 21413  			break
 21414  		}
 21415  		if s3.AuxInt != 32 {
 21416  			break
 21417  		}
 21418  		x4 := s3.Args[0]
 21419  		if x4.Op != OpPPC64MOVBZload {
 21420  			break
 21421  		}
 21422  		i4 := x4.AuxInt
 21423  		if x4.Aux != s {
 21424  			break
 21425  		}
 21426  		_ = x4.Args[1]
 21427  		if p != x4.Args[0] {
 21428  			break
 21429  		}
 21430  		if mem != x4.Args[1] {
 21431  			break
 21432  		}
 21433  		o2 := o3.Args[1]
 21434  		if o2.Op != OpPPC64OR {
 21435  			break
 21436  		}
 21437  		if o2.Type != t {
 21438  			break
 21439  		}
 21440  		_ = o2.Args[1]
 21441  		s2 := o2.Args[0]
 21442  		if s2.Op != OpPPC64SLDconst {
 21443  			break
 21444  		}
 21445  		if s2.AuxInt != 24 {
 21446  			break
 21447  		}
 21448  		x3 := s2.Args[0]
 21449  		if x3.Op != OpPPC64MOVBZload {
 21450  			break
 21451  		}
 21452  		i3 := x3.AuxInt
 21453  		if x3.Aux != s {
 21454  			break
 21455  		}
 21456  		_ = x3.Args[1]
 21457  		if p != x3.Args[0] {
 21458  			break
 21459  		}
 21460  		if mem != x3.Args[1] {
 21461  			break
 21462  		}
 21463  		o1 := o2.Args[1]
 21464  		if o1.Op != OpPPC64OR {
 21465  			break
 21466  		}
 21467  		if o1.Type != t {
 21468  			break
 21469  		}
 21470  		_ = o1.Args[1]
 21471  		o0 := o1.Args[0]
 21472  		if o0.Op != OpPPC64OR {
 21473  			break
 21474  		}
 21475  		if o0.Type != t {
 21476  			break
 21477  		}
 21478  		_ = o0.Args[1]
 21479  		s0 := o0.Args[0]
 21480  		if s0.Op != OpPPC64SLDconst {
 21481  			break
 21482  		}
 21483  		if s0.AuxInt != 8 {
 21484  			break
 21485  		}
 21486  		x1 := s0.Args[0]
 21487  		if x1.Op != OpPPC64MOVBZload {
 21488  			break
 21489  		}
 21490  		i1 := x1.AuxInt
 21491  		if x1.Aux != s {
 21492  			break
 21493  		}
 21494  		_ = x1.Args[1]
 21495  		if p != x1.Args[0] {
 21496  			break
 21497  		}
 21498  		if mem != x1.Args[1] {
 21499  			break
 21500  		}
 21501  		x0 := o0.Args[1]
 21502  		if x0.Op != OpPPC64MOVBZload {
 21503  			break
 21504  		}
 21505  		i0 := x0.AuxInt
 21506  		if x0.Aux != s {
 21507  			break
 21508  		}
 21509  		_ = x0.Args[1]
 21510  		if p != x0.Args[0] {
 21511  			break
 21512  		}
 21513  		if mem != x0.Args[1] {
 21514  			break
 21515  		}
 21516  		s1 := o1.Args[1]
 21517  		if s1.Op != OpPPC64SLDconst {
 21518  			break
 21519  		}
 21520  		if s1.AuxInt != 16 {
 21521  			break
 21522  		}
 21523  		x2 := s1.Args[0]
 21524  		if x2.Op != OpPPC64MOVBZload {
 21525  			break
 21526  		}
 21527  		i2 := x2.AuxInt
 21528  		if x2.Aux != s {
 21529  			break
 21530  		}
 21531  		_ = x2.Args[1]
 21532  		if p != x2.Args[0] {
 21533  			break
 21534  		}
 21535  		if mem != x2.Args[1] {
 21536  			break
 21537  		}
 21538  		s4 := o4.Args[1]
 21539  		if s4.Op != OpPPC64SLDconst {
 21540  			break
 21541  		}
 21542  		if s4.AuxInt != 40 {
 21543  			break
 21544  		}
 21545  		x5 := s4.Args[0]
 21546  		if x5.Op != OpPPC64MOVBZload {
 21547  			break
 21548  		}
 21549  		i5 := x5.AuxInt
 21550  		if x5.Aux != s {
 21551  			break
 21552  		}
 21553  		_ = x5.Args[1]
 21554  		if p != x5.Args[0] {
 21555  			break
 21556  		}
 21557  		if mem != x5.Args[1] {
 21558  			break
 21559  		}
 21560  		s5 := o5.Args[1]
 21561  		if s5.Op != OpPPC64SLDconst {
 21562  			break
 21563  		}
 21564  		if s5.AuxInt != 48 {
 21565  			break
 21566  		}
 21567  		x6 := s5.Args[0]
 21568  		if x6.Op != OpPPC64MOVBZload {
 21569  			break
 21570  		}
 21571  		i6 := x6.AuxInt
 21572  		if x6.Aux != s {
 21573  			break
 21574  		}
 21575  		_ = x6.Args[1]
 21576  		if p != x6.Args[0] {
 21577  			break
 21578  		}
 21579  		if mem != x6.Args[1] {
 21580  			break
 21581  		}
 21582  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21583  			break
 21584  		}
 21585  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21586  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21587  		v.reset(OpCopy)
 21588  		v.AddArg(v0)
 21589  		v0.AuxInt = i0
 21590  		v0.Aux = s
 21591  		v0.AddArg(p)
 21592  		v0.AddArg(mem)
 21593  		return true
 21594  	}
 21595  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21596  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21597  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21598  	for {
 21599  		t := v.Type
 21600  		_ = v.Args[1]
 21601  		s6 := v.Args[0]
 21602  		if s6.Op != OpPPC64SLDconst {
 21603  			break
 21604  		}
 21605  		if s6.AuxInt != 56 {
 21606  			break
 21607  		}
 21608  		x7 := s6.Args[0]
 21609  		if x7.Op != OpPPC64MOVBZload {
 21610  			break
 21611  		}
 21612  		i7 := x7.AuxInt
 21613  		s := x7.Aux
 21614  		_ = x7.Args[1]
 21615  		p := x7.Args[0]
 21616  		mem := x7.Args[1]
 21617  		o5 := v.Args[1]
 21618  		if o5.Op != OpPPC64OR {
 21619  			break
 21620  		}
 21621  		if o5.Type != t {
 21622  			break
 21623  		}
 21624  		_ = o5.Args[1]
 21625  		o4 := o5.Args[0]
 21626  		if o4.Op != OpPPC64OR {
 21627  			break
 21628  		}
 21629  		if o4.Type != t {
 21630  			break
 21631  		}
 21632  		_ = o4.Args[1]
 21633  		o3 := o4.Args[0]
 21634  		if o3.Op != OpPPC64OR {
 21635  			break
 21636  		}
 21637  		if o3.Type != t {
 21638  			break
 21639  		}
 21640  		_ = o3.Args[1]
 21641  		s3 := o3.Args[0]
 21642  		if s3.Op != OpPPC64SLDconst {
 21643  			break
 21644  		}
 21645  		if s3.AuxInt != 32 {
 21646  			break
 21647  		}
 21648  		x4 := s3.Args[0]
 21649  		if x4.Op != OpPPC64MOVBZload {
 21650  			break
 21651  		}
 21652  		i4 := x4.AuxInt
 21653  		if x4.Aux != s {
 21654  			break
 21655  		}
 21656  		_ = x4.Args[1]
 21657  		if p != x4.Args[0] {
 21658  			break
 21659  		}
 21660  		if mem != x4.Args[1] {
 21661  			break
 21662  		}
 21663  		o2 := o3.Args[1]
 21664  		if o2.Op != OpPPC64OR {
 21665  			break
 21666  		}
 21667  		if o2.Type != t {
 21668  			break
 21669  		}
 21670  		_ = o2.Args[1]
 21671  		s2 := o2.Args[0]
 21672  		if s2.Op != OpPPC64SLDconst {
 21673  			break
 21674  		}
 21675  		if s2.AuxInt != 24 {
 21676  			break
 21677  		}
 21678  		x3 := s2.Args[0]
 21679  		if x3.Op != OpPPC64MOVBZload {
 21680  			break
 21681  		}
 21682  		i3 := x3.AuxInt
 21683  		if x3.Aux != s {
 21684  			break
 21685  		}
 21686  		_ = x3.Args[1]
 21687  		if p != x3.Args[0] {
 21688  			break
 21689  		}
 21690  		if mem != x3.Args[1] {
 21691  			break
 21692  		}
 21693  		o1 := o2.Args[1]
 21694  		if o1.Op != OpPPC64OR {
 21695  			break
 21696  		}
 21697  		if o1.Type != t {
 21698  			break
 21699  		}
 21700  		_ = o1.Args[1]
 21701  		o0 := o1.Args[0]
 21702  		if o0.Op != OpPPC64OR {
 21703  			break
 21704  		}
 21705  		if o0.Type != t {
 21706  			break
 21707  		}
 21708  		_ = o0.Args[1]
 21709  		x0 := o0.Args[0]
 21710  		if x0.Op != OpPPC64MOVBZload {
 21711  			break
 21712  		}
 21713  		i0 := x0.AuxInt
 21714  		if x0.Aux != s {
 21715  			break
 21716  		}
 21717  		_ = x0.Args[1]
 21718  		if p != x0.Args[0] {
 21719  			break
 21720  		}
 21721  		if mem != x0.Args[1] {
 21722  			break
 21723  		}
 21724  		s0 := o0.Args[1]
 21725  		if s0.Op != OpPPC64SLDconst {
 21726  			break
 21727  		}
 21728  		if s0.AuxInt != 8 {
 21729  			break
 21730  		}
 21731  		x1 := s0.Args[0]
 21732  		if x1.Op != OpPPC64MOVBZload {
 21733  			break
 21734  		}
 21735  		i1 := x1.AuxInt
 21736  		if x1.Aux != s {
 21737  			break
 21738  		}
 21739  		_ = x1.Args[1]
 21740  		if p != x1.Args[0] {
 21741  			break
 21742  		}
 21743  		if mem != x1.Args[1] {
 21744  			break
 21745  		}
 21746  		s1 := o1.Args[1]
 21747  		if s1.Op != OpPPC64SLDconst {
 21748  			break
 21749  		}
 21750  		if s1.AuxInt != 16 {
 21751  			break
 21752  		}
 21753  		x2 := s1.Args[0]
 21754  		if x2.Op != OpPPC64MOVBZload {
 21755  			break
 21756  		}
 21757  		i2 := x2.AuxInt
 21758  		if x2.Aux != s {
 21759  			break
 21760  		}
 21761  		_ = x2.Args[1]
 21762  		if p != x2.Args[0] {
 21763  			break
 21764  		}
 21765  		if mem != x2.Args[1] {
 21766  			break
 21767  		}
 21768  		s4 := o4.Args[1]
 21769  		if s4.Op != OpPPC64SLDconst {
 21770  			break
 21771  		}
 21772  		if s4.AuxInt != 40 {
 21773  			break
 21774  		}
 21775  		x5 := s4.Args[0]
 21776  		if x5.Op != OpPPC64MOVBZload {
 21777  			break
 21778  		}
 21779  		i5 := x5.AuxInt
 21780  		if x5.Aux != s {
 21781  			break
 21782  		}
 21783  		_ = x5.Args[1]
 21784  		if p != x5.Args[0] {
 21785  			break
 21786  		}
 21787  		if mem != x5.Args[1] {
 21788  			break
 21789  		}
 21790  		s5 := o5.Args[1]
 21791  		if s5.Op != OpPPC64SLDconst {
 21792  			break
 21793  		}
 21794  		if s5.AuxInt != 48 {
 21795  			break
 21796  		}
 21797  		x6 := s5.Args[0]
 21798  		if x6.Op != OpPPC64MOVBZload {
 21799  			break
 21800  		}
 21801  		i6 := x6.AuxInt
 21802  		if x6.Aux != s {
 21803  			break
 21804  		}
 21805  		_ = x6.Args[1]
 21806  		if p != x6.Args[0] {
 21807  			break
 21808  		}
 21809  		if mem != x6.Args[1] {
 21810  			break
 21811  		}
 21812  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21813  			break
 21814  		}
 21815  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21816  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21817  		v.reset(OpCopy)
 21818  		v.AddArg(v0)
 21819  		v0.AuxInt = i0
 21820  		v0.Aux = s
 21821  		v0.AddArg(p)
 21822  		v0.AddArg(mem)
 21823  		return true
 21824  	}
 21825  	return false
 21826  }
 21827  func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
 21828  	b := v.Block
 21829  	_ = b
 21830  	config := b.Func.Config
 21831  	_ = config
 21832  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21833  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21834  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21835  	for {
 21836  		t := v.Type
 21837  		_ = v.Args[1]
 21838  		s6 := v.Args[0]
 21839  		if s6.Op != OpPPC64SLDconst {
 21840  			break
 21841  		}
 21842  		if s6.AuxInt != 56 {
 21843  			break
 21844  		}
 21845  		x7 := s6.Args[0]
 21846  		if x7.Op != OpPPC64MOVBZload {
 21847  			break
 21848  		}
 21849  		i7 := x7.AuxInt
 21850  		s := x7.Aux
 21851  		_ = x7.Args[1]
 21852  		p := x7.Args[0]
 21853  		mem := x7.Args[1]
 21854  		o5 := v.Args[1]
 21855  		if o5.Op != OpPPC64OR {
 21856  			break
 21857  		}
 21858  		if o5.Type != t {
 21859  			break
 21860  		}
 21861  		_ = o5.Args[1]
 21862  		o4 := o5.Args[0]
 21863  		if o4.Op != OpPPC64OR {
 21864  			break
 21865  		}
 21866  		if o4.Type != t {
 21867  			break
 21868  		}
 21869  		_ = o4.Args[1]
 21870  		o3 := o4.Args[0]
 21871  		if o3.Op != OpPPC64OR {
 21872  			break
 21873  		}
 21874  		if o3.Type != t {
 21875  			break
 21876  		}
 21877  		_ = o3.Args[1]
 21878  		s3 := o3.Args[0]
 21879  		if s3.Op != OpPPC64SLDconst {
 21880  			break
 21881  		}
 21882  		if s3.AuxInt != 32 {
 21883  			break
 21884  		}
 21885  		x4 := s3.Args[0]
 21886  		if x4.Op != OpPPC64MOVBZload {
 21887  			break
 21888  		}
 21889  		i4 := x4.AuxInt
 21890  		if x4.Aux != s {
 21891  			break
 21892  		}
 21893  		_ = x4.Args[1]
 21894  		if p != x4.Args[0] {
 21895  			break
 21896  		}
 21897  		if mem != x4.Args[1] {
 21898  			break
 21899  		}
 21900  		o2 := o3.Args[1]
 21901  		if o2.Op != OpPPC64OR {
 21902  			break
 21903  		}
 21904  		if o2.Type != t {
 21905  			break
 21906  		}
 21907  		_ = o2.Args[1]
 21908  		o1 := o2.Args[0]
 21909  		if o1.Op != OpPPC64OR {
 21910  			break
 21911  		}
 21912  		if o1.Type != t {
 21913  			break
 21914  		}
 21915  		_ = o1.Args[1]
 21916  		s1 := o1.Args[0]
 21917  		if s1.Op != OpPPC64SLDconst {
 21918  			break
 21919  		}
 21920  		if s1.AuxInt != 16 {
 21921  			break
 21922  		}
 21923  		x2 := s1.Args[0]
 21924  		if x2.Op != OpPPC64MOVBZload {
 21925  			break
 21926  		}
 21927  		i2 := x2.AuxInt
 21928  		if x2.Aux != s {
 21929  			break
 21930  		}
 21931  		_ = x2.Args[1]
 21932  		if p != x2.Args[0] {
 21933  			break
 21934  		}
 21935  		if mem != x2.Args[1] {
 21936  			break
 21937  		}
 21938  		o0 := o1.Args[1]
 21939  		if o0.Op != OpPPC64OR {
 21940  			break
 21941  		}
 21942  		if o0.Type != t {
 21943  			break
 21944  		}
 21945  		_ = o0.Args[1]
 21946  		s0 := o0.Args[0]
 21947  		if s0.Op != OpPPC64SLDconst {
 21948  			break
 21949  		}
 21950  		if s0.AuxInt != 8 {
 21951  			break
 21952  		}
 21953  		x1 := s0.Args[0]
 21954  		if x1.Op != OpPPC64MOVBZload {
 21955  			break
 21956  		}
 21957  		i1 := x1.AuxInt
 21958  		if x1.Aux != s {
 21959  			break
 21960  		}
 21961  		_ = x1.Args[1]
 21962  		if p != x1.Args[0] {
 21963  			break
 21964  		}
 21965  		if mem != x1.Args[1] {
 21966  			break
 21967  		}
 21968  		x0 := o0.Args[1]
 21969  		if x0.Op != OpPPC64MOVBZload {
 21970  			break
 21971  		}
 21972  		i0 := x0.AuxInt
 21973  		if x0.Aux != s {
 21974  			break
 21975  		}
 21976  		_ = x0.Args[1]
 21977  		if p != x0.Args[0] {
 21978  			break
 21979  		}
 21980  		if mem != x0.Args[1] {
 21981  			break
 21982  		}
 21983  		s2 := o2.Args[1]
 21984  		if s2.Op != OpPPC64SLDconst {
 21985  			break
 21986  		}
 21987  		if s2.AuxInt != 24 {
 21988  			break
 21989  		}
 21990  		x3 := s2.Args[0]
 21991  		if x3.Op != OpPPC64MOVBZload {
 21992  			break
 21993  		}
 21994  		i3 := x3.AuxInt
 21995  		if x3.Aux != s {
 21996  			break
 21997  		}
 21998  		_ = x3.Args[1]
 21999  		if p != x3.Args[0] {
 22000  			break
 22001  		}
 22002  		if mem != x3.Args[1] {
 22003  			break
 22004  		}
 22005  		s4 := o4.Args[1]
 22006  		if s4.Op != OpPPC64SLDconst {
 22007  			break
 22008  		}
 22009  		if s4.AuxInt != 40 {
 22010  			break
 22011  		}
 22012  		x5 := s4.Args[0]
 22013  		if x5.Op != OpPPC64MOVBZload {
 22014  			break
 22015  		}
 22016  		i5 := x5.AuxInt
 22017  		if x5.Aux != s {
 22018  			break
 22019  		}
 22020  		_ = x5.Args[1]
 22021  		if p != x5.Args[0] {
 22022  			break
 22023  		}
 22024  		if mem != x5.Args[1] {
 22025  			break
 22026  		}
 22027  		s5 := o5.Args[1]
 22028  		if s5.Op != OpPPC64SLDconst {
 22029  			break
 22030  		}
 22031  		if s5.AuxInt != 48 {
 22032  			break
 22033  		}
 22034  		x6 := s5.Args[0]
 22035  		if x6.Op != OpPPC64MOVBZload {
 22036  			break
 22037  		}
 22038  		i6 := x6.AuxInt
 22039  		if x6.Aux != s {
 22040  			break
 22041  		}
 22042  		_ = x6.Args[1]
 22043  		if p != x6.Args[0] {
 22044  			break
 22045  		}
 22046  		if mem != x6.Args[1] {
 22047  			break
 22048  		}
 22049  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22050  			break
 22051  		}
 22052  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22053  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22054  		v.reset(OpCopy)
 22055  		v.AddArg(v0)
 22056  		v0.AuxInt = i0
 22057  		v0.Aux = s
 22058  		v0.AddArg(p)
 22059  		v0.AddArg(mem)
 22060  		return true
 22061  	}
 22062  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22063  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22064  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22065  	for {
 22066  		t := v.Type
 22067  		_ = v.Args[1]
 22068  		s6 := v.Args[0]
 22069  		if s6.Op != OpPPC64SLDconst {
 22070  			break
 22071  		}
 22072  		if s6.AuxInt != 56 {
 22073  			break
 22074  		}
 22075  		x7 := s6.Args[0]
 22076  		if x7.Op != OpPPC64MOVBZload {
 22077  			break
 22078  		}
 22079  		i7 := x7.AuxInt
 22080  		s := x7.Aux
 22081  		_ = x7.Args[1]
 22082  		p := x7.Args[0]
 22083  		mem := x7.Args[1]
 22084  		o5 := v.Args[1]
 22085  		if o5.Op != OpPPC64OR {
 22086  			break
 22087  		}
 22088  		if o5.Type != t {
 22089  			break
 22090  		}
 22091  		_ = o5.Args[1]
 22092  		o4 := o5.Args[0]
 22093  		if o4.Op != OpPPC64OR {
 22094  			break
 22095  		}
 22096  		if o4.Type != t {
 22097  			break
 22098  		}
 22099  		_ = o4.Args[1]
 22100  		o3 := o4.Args[0]
 22101  		if o3.Op != OpPPC64OR {
 22102  			break
 22103  		}
 22104  		if o3.Type != t {
 22105  			break
 22106  		}
 22107  		_ = o3.Args[1]
 22108  		s3 := o3.Args[0]
 22109  		if s3.Op != OpPPC64SLDconst {
 22110  			break
 22111  		}
 22112  		if s3.AuxInt != 32 {
 22113  			break
 22114  		}
 22115  		x4 := s3.Args[0]
 22116  		if x4.Op != OpPPC64MOVBZload {
 22117  			break
 22118  		}
 22119  		i4 := x4.AuxInt
 22120  		if x4.Aux != s {
 22121  			break
 22122  		}
 22123  		_ = x4.Args[1]
 22124  		if p != x4.Args[0] {
 22125  			break
 22126  		}
 22127  		if mem != x4.Args[1] {
 22128  			break
 22129  		}
 22130  		o2 := o3.Args[1]
 22131  		if o2.Op != OpPPC64OR {
 22132  			break
 22133  		}
 22134  		if o2.Type != t {
 22135  			break
 22136  		}
 22137  		_ = o2.Args[1]
 22138  		o1 := o2.Args[0]
 22139  		if o1.Op != OpPPC64OR {
 22140  			break
 22141  		}
 22142  		if o1.Type != t {
 22143  			break
 22144  		}
 22145  		_ = o1.Args[1]
 22146  		s1 := o1.Args[0]
 22147  		if s1.Op != OpPPC64SLDconst {
 22148  			break
 22149  		}
 22150  		if s1.AuxInt != 16 {
 22151  			break
 22152  		}
 22153  		x2 := s1.Args[0]
 22154  		if x2.Op != OpPPC64MOVBZload {
 22155  			break
 22156  		}
 22157  		i2 := x2.AuxInt
 22158  		if x2.Aux != s {
 22159  			break
 22160  		}
 22161  		_ = x2.Args[1]
 22162  		if p != x2.Args[0] {
 22163  			break
 22164  		}
 22165  		if mem != x2.Args[1] {
 22166  			break
 22167  		}
 22168  		o0 := o1.Args[1]
 22169  		if o0.Op != OpPPC64OR {
 22170  			break
 22171  		}
 22172  		if o0.Type != t {
 22173  			break
 22174  		}
 22175  		_ = o0.Args[1]
 22176  		x0 := o0.Args[0]
 22177  		if x0.Op != OpPPC64MOVBZload {
 22178  			break
 22179  		}
 22180  		i0 := x0.AuxInt
 22181  		if x0.Aux != s {
 22182  			break
 22183  		}
 22184  		_ = x0.Args[1]
 22185  		if p != x0.Args[0] {
 22186  			break
 22187  		}
 22188  		if mem != x0.Args[1] {
 22189  			break
 22190  		}
 22191  		s0 := o0.Args[1]
 22192  		if s0.Op != OpPPC64SLDconst {
 22193  			break
 22194  		}
 22195  		if s0.AuxInt != 8 {
 22196  			break
 22197  		}
 22198  		x1 := s0.Args[0]
 22199  		if x1.Op != OpPPC64MOVBZload {
 22200  			break
 22201  		}
 22202  		i1 := x1.AuxInt
 22203  		if x1.Aux != s {
 22204  			break
 22205  		}
 22206  		_ = x1.Args[1]
 22207  		if p != x1.Args[0] {
 22208  			break
 22209  		}
 22210  		if mem != x1.Args[1] {
 22211  			break
 22212  		}
 22213  		s2 := o2.Args[1]
 22214  		if s2.Op != OpPPC64SLDconst {
 22215  			break
 22216  		}
 22217  		if s2.AuxInt != 24 {
 22218  			break
 22219  		}
 22220  		x3 := s2.Args[0]
 22221  		if x3.Op != OpPPC64MOVBZload {
 22222  			break
 22223  		}
 22224  		i3 := x3.AuxInt
 22225  		if x3.Aux != s {
 22226  			break
 22227  		}
 22228  		_ = x3.Args[1]
 22229  		if p != x3.Args[0] {
 22230  			break
 22231  		}
 22232  		if mem != x3.Args[1] {
 22233  			break
 22234  		}
 22235  		s4 := o4.Args[1]
 22236  		if s4.Op != OpPPC64SLDconst {
 22237  			break
 22238  		}
 22239  		if s4.AuxInt != 40 {
 22240  			break
 22241  		}
 22242  		x5 := s4.Args[0]
 22243  		if x5.Op != OpPPC64MOVBZload {
 22244  			break
 22245  		}
 22246  		i5 := x5.AuxInt
 22247  		if x5.Aux != s {
 22248  			break
 22249  		}
 22250  		_ = x5.Args[1]
 22251  		if p != x5.Args[0] {
 22252  			break
 22253  		}
 22254  		if mem != x5.Args[1] {
 22255  			break
 22256  		}
 22257  		s5 := o5.Args[1]
 22258  		if s5.Op != OpPPC64SLDconst {
 22259  			break
 22260  		}
 22261  		if s5.AuxInt != 48 {
 22262  			break
 22263  		}
 22264  		x6 := s5.Args[0]
 22265  		if x6.Op != OpPPC64MOVBZload {
 22266  			break
 22267  		}
 22268  		i6 := x6.AuxInt
 22269  		if x6.Aux != s {
 22270  			break
 22271  		}
 22272  		_ = x6.Args[1]
 22273  		if p != x6.Args[0] {
 22274  			break
 22275  		}
 22276  		if mem != x6.Args[1] {
 22277  			break
 22278  		}
 22279  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22280  			break
 22281  		}
 22282  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22283  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22284  		v.reset(OpCopy)
 22285  		v.AddArg(v0)
 22286  		v0.AuxInt = i0
 22287  		v0.Aux = s
 22288  		v0.AddArg(p)
 22289  		v0.AddArg(mem)
 22290  		return true
 22291  	}
 22292  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22293  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22294  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22295  	for {
 22296  		t := v.Type
 22297  		_ = v.Args[1]
 22298  		s6 := v.Args[0]
 22299  		if s6.Op != OpPPC64SLDconst {
 22300  			break
 22301  		}
 22302  		if s6.AuxInt != 56 {
 22303  			break
 22304  		}
 22305  		x7 := s6.Args[0]
 22306  		if x7.Op != OpPPC64MOVBZload {
 22307  			break
 22308  		}
 22309  		i7 := x7.AuxInt
 22310  		s := x7.Aux
 22311  		_ = x7.Args[1]
 22312  		p := x7.Args[0]
 22313  		mem := x7.Args[1]
 22314  		o5 := v.Args[1]
 22315  		if o5.Op != OpPPC64OR {
 22316  			break
 22317  		}
 22318  		if o5.Type != t {
 22319  			break
 22320  		}
 22321  		_ = o5.Args[1]
 22322  		o4 := o5.Args[0]
 22323  		if o4.Op != OpPPC64OR {
 22324  			break
 22325  		}
 22326  		if o4.Type != t {
 22327  			break
 22328  		}
 22329  		_ = o4.Args[1]
 22330  		o3 := o4.Args[0]
 22331  		if o3.Op != OpPPC64OR {
 22332  			break
 22333  		}
 22334  		if o3.Type != t {
 22335  			break
 22336  		}
 22337  		_ = o3.Args[1]
 22338  		s3 := o3.Args[0]
 22339  		if s3.Op != OpPPC64SLDconst {
 22340  			break
 22341  		}
 22342  		if s3.AuxInt != 32 {
 22343  			break
 22344  		}
 22345  		x4 := s3.Args[0]
 22346  		if x4.Op != OpPPC64MOVBZload {
 22347  			break
 22348  		}
 22349  		i4 := x4.AuxInt
 22350  		if x4.Aux != s {
 22351  			break
 22352  		}
 22353  		_ = x4.Args[1]
 22354  		if p != x4.Args[0] {
 22355  			break
 22356  		}
 22357  		if mem != x4.Args[1] {
 22358  			break
 22359  		}
 22360  		o2 := o3.Args[1]
 22361  		if o2.Op != OpPPC64OR {
 22362  			break
 22363  		}
 22364  		if o2.Type != t {
 22365  			break
 22366  		}
 22367  		_ = o2.Args[1]
 22368  		o1 := o2.Args[0]
 22369  		if o1.Op != OpPPC64OR {
 22370  			break
 22371  		}
 22372  		if o1.Type != t {
 22373  			break
 22374  		}
 22375  		_ = o1.Args[1]
 22376  		o0 := o1.Args[0]
 22377  		if o0.Op != OpPPC64OR {
 22378  			break
 22379  		}
 22380  		if o0.Type != t {
 22381  			break
 22382  		}
 22383  		_ = o0.Args[1]
 22384  		s0 := o0.Args[0]
 22385  		if s0.Op != OpPPC64SLDconst {
 22386  			break
 22387  		}
 22388  		if s0.AuxInt != 8 {
 22389  			break
 22390  		}
 22391  		x1 := s0.Args[0]
 22392  		if x1.Op != OpPPC64MOVBZload {
 22393  			break
 22394  		}
 22395  		i1 := x1.AuxInt
 22396  		if x1.Aux != s {
 22397  			break
 22398  		}
 22399  		_ = x1.Args[1]
 22400  		if p != x1.Args[0] {
 22401  			break
 22402  		}
 22403  		if mem != x1.Args[1] {
 22404  			break
 22405  		}
 22406  		x0 := o0.Args[1]
 22407  		if x0.Op != OpPPC64MOVBZload {
 22408  			break
 22409  		}
 22410  		i0 := x0.AuxInt
 22411  		if x0.Aux != s {
 22412  			break
 22413  		}
 22414  		_ = x0.Args[1]
 22415  		if p != x0.Args[0] {
 22416  			break
 22417  		}
 22418  		if mem != x0.Args[1] {
 22419  			break
 22420  		}
 22421  		s1 := o1.Args[1]
 22422  		if s1.Op != OpPPC64SLDconst {
 22423  			break
 22424  		}
 22425  		if s1.AuxInt != 16 {
 22426  			break
 22427  		}
 22428  		x2 := s1.Args[0]
 22429  		if x2.Op != OpPPC64MOVBZload {
 22430  			break
 22431  		}
 22432  		i2 := x2.AuxInt
 22433  		if x2.Aux != s {
 22434  			break
 22435  		}
 22436  		_ = x2.Args[1]
 22437  		if p != x2.Args[0] {
 22438  			break
 22439  		}
 22440  		if mem != x2.Args[1] {
 22441  			break
 22442  		}
 22443  		s2 := o2.Args[1]
 22444  		if s2.Op != OpPPC64SLDconst {
 22445  			break
 22446  		}
 22447  		if s2.AuxInt != 24 {
 22448  			break
 22449  		}
 22450  		x3 := s2.Args[0]
 22451  		if x3.Op != OpPPC64MOVBZload {
 22452  			break
 22453  		}
 22454  		i3 := x3.AuxInt
 22455  		if x3.Aux != s {
 22456  			break
 22457  		}
 22458  		_ = x3.Args[1]
 22459  		if p != x3.Args[0] {
 22460  			break
 22461  		}
 22462  		if mem != x3.Args[1] {
 22463  			break
 22464  		}
 22465  		s4 := o4.Args[1]
 22466  		if s4.Op != OpPPC64SLDconst {
 22467  			break
 22468  		}
 22469  		if s4.AuxInt != 40 {
 22470  			break
 22471  		}
 22472  		x5 := s4.Args[0]
 22473  		if x5.Op != OpPPC64MOVBZload {
 22474  			break
 22475  		}
 22476  		i5 := x5.AuxInt
 22477  		if x5.Aux != s {
 22478  			break
 22479  		}
 22480  		_ = x5.Args[1]
 22481  		if p != x5.Args[0] {
 22482  			break
 22483  		}
 22484  		if mem != x5.Args[1] {
 22485  			break
 22486  		}
 22487  		s5 := o5.Args[1]
 22488  		if s5.Op != OpPPC64SLDconst {
 22489  			break
 22490  		}
 22491  		if s5.AuxInt != 48 {
 22492  			break
 22493  		}
 22494  		x6 := s5.Args[0]
 22495  		if x6.Op != OpPPC64MOVBZload {
 22496  			break
 22497  		}
 22498  		i6 := x6.AuxInt
 22499  		if x6.Aux != s {
 22500  			break
 22501  		}
 22502  		_ = x6.Args[1]
 22503  		if p != x6.Args[0] {
 22504  			break
 22505  		}
 22506  		if mem != x6.Args[1] {
 22507  			break
 22508  		}
 22509  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22510  			break
 22511  		}
 22512  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22513  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22514  		v.reset(OpCopy)
 22515  		v.AddArg(v0)
 22516  		v0.AuxInt = i0
 22517  		v0.Aux = s
 22518  		v0.AddArg(p)
 22519  		v0.AddArg(mem)
 22520  		return true
 22521  	}
 22522  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22523  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22524  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22525  	for {
 22526  		t := v.Type
 22527  		_ = v.Args[1]
 22528  		s6 := v.Args[0]
 22529  		if s6.Op != OpPPC64SLDconst {
 22530  			break
 22531  		}
 22532  		if s6.AuxInt != 56 {
 22533  			break
 22534  		}
 22535  		x7 := s6.Args[0]
 22536  		if x7.Op != OpPPC64MOVBZload {
 22537  			break
 22538  		}
 22539  		i7 := x7.AuxInt
 22540  		s := x7.Aux
 22541  		_ = x7.Args[1]
 22542  		p := x7.Args[0]
 22543  		mem := x7.Args[1]
 22544  		o5 := v.Args[1]
 22545  		if o5.Op != OpPPC64OR {
 22546  			break
 22547  		}
 22548  		if o5.Type != t {
 22549  			break
 22550  		}
 22551  		_ = o5.Args[1]
 22552  		o4 := o5.Args[0]
 22553  		if o4.Op != OpPPC64OR {
 22554  			break
 22555  		}
 22556  		if o4.Type != t {
 22557  			break
 22558  		}
 22559  		_ = o4.Args[1]
 22560  		o3 := o4.Args[0]
 22561  		if o3.Op != OpPPC64OR {
 22562  			break
 22563  		}
 22564  		if o3.Type != t {
 22565  			break
 22566  		}
 22567  		_ = o3.Args[1]
 22568  		s3 := o3.Args[0]
 22569  		if s3.Op != OpPPC64SLDconst {
 22570  			break
 22571  		}
 22572  		if s3.AuxInt != 32 {
 22573  			break
 22574  		}
 22575  		x4 := s3.Args[0]
 22576  		if x4.Op != OpPPC64MOVBZload {
 22577  			break
 22578  		}
 22579  		i4 := x4.AuxInt
 22580  		if x4.Aux != s {
 22581  			break
 22582  		}
 22583  		_ = x4.Args[1]
 22584  		if p != x4.Args[0] {
 22585  			break
 22586  		}
 22587  		if mem != x4.Args[1] {
 22588  			break
 22589  		}
 22590  		o2 := o3.Args[1]
 22591  		if o2.Op != OpPPC64OR {
 22592  			break
 22593  		}
 22594  		if o2.Type != t {
 22595  			break
 22596  		}
 22597  		_ = o2.Args[1]
 22598  		o1 := o2.Args[0]
 22599  		if o1.Op != OpPPC64OR {
 22600  			break
 22601  		}
 22602  		if o1.Type != t {
 22603  			break
 22604  		}
 22605  		_ = o1.Args[1]
 22606  		o0 := o1.Args[0]
 22607  		if o0.Op != OpPPC64OR {
 22608  			break
 22609  		}
 22610  		if o0.Type != t {
 22611  			break
 22612  		}
 22613  		_ = o0.Args[1]
 22614  		x0 := o0.Args[0]
 22615  		if x0.Op != OpPPC64MOVBZload {
 22616  			break
 22617  		}
 22618  		i0 := x0.AuxInt
 22619  		if x0.Aux != s {
 22620  			break
 22621  		}
 22622  		_ = x0.Args[1]
 22623  		if p != x0.Args[0] {
 22624  			break
 22625  		}
 22626  		if mem != x0.Args[1] {
 22627  			break
 22628  		}
 22629  		s0 := o0.Args[1]
 22630  		if s0.Op != OpPPC64SLDconst {
 22631  			break
 22632  		}
 22633  		if s0.AuxInt != 8 {
 22634  			break
 22635  		}
 22636  		x1 := s0.Args[0]
 22637  		if x1.Op != OpPPC64MOVBZload {
 22638  			break
 22639  		}
 22640  		i1 := x1.AuxInt
 22641  		if x1.Aux != s {
 22642  			break
 22643  		}
 22644  		_ = x1.Args[1]
 22645  		if p != x1.Args[0] {
 22646  			break
 22647  		}
 22648  		if mem != x1.Args[1] {
 22649  			break
 22650  		}
 22651  		s1 := o1.Args[1]
 22652  		if s1.Op != OpPPC64SLDconst {
 22653  			break
 22654  		}
 22655  		if s1.AuxInt != 16 {
 22656  			break
 22657  		}
 22658  		x2 := s1.Args[0]
 22659  		if x2.Op != OpPPC64MOVBZload {
 22660  			break
 22661  		}
 22662  		i2 := x2.AuxInt
 22663  		if x2.Aux != s {
 22664  			break
 22665  		}
 22666  		_ = x2.Args[1]
 22667  		if p != x2.Args[0] {
 22668  			break
 22669  		}
 22670  		if mem != x2.Args[1] {
 22671  			break
 22672  		}
 22673  		s2 := o2.Args[1]
 22674  		if s2.Op != OpPPC64SLDconst {
 22675  			break
 22676  		}
 22677  		if s2.AuxInt != 24 {
 22678  			break
 22679  		}
 22680  		x3 := s2.Args[0]
 22681  		if x3.Op != OpPPC64MOVBZload {
 22682  			break
 22683  		}
 22684  		i3 := x3.AuxInt
 22685  		if x3.Aux != s {
 22686  			break
 22687  		}
 22688  		_ = x3.Args[1]
 22689  		if p != x3.Args[0] {
 22690  			break
 22691  		}
 22692  		if mem != x3.Args[1] {
 22693  			break
 22694  		}
 22695  		s4 := o4.Args[1]
 22696  		if s4.Op != OpPPC64SLDconst {
 22697  			break
 22698  		}
 22699  		if s4.AuxInt != 40 {
 22700  			break
 22701  		}
 22702  		x5 := s4.Args[0]
 22703  		if x5.Op != OpPPC64MOVBZload {
 22704  			break
 22705  		}
 22706  		i5 := x5.AuxInt
 22707  		if x5.Aux != s {
 22708  			break
 22709  		}
 22710  		_ = x5.Args[1]
 22711  		if p != x5.Args[0] {
 22712  			break
 22713  		}
 22714  		if mem != x5.Args[1] {
 22715  			break
 22716  		}
 22717  		s5 := o5.Args[1]
 22718  		if s5.Op != OpPPC64SLDconst {
 22719  			break
 22720  		}
 22721  		if s5.AuxInt != 48 {
 22722  			break
 22723  		}
 22724  		x6 := s5.Args[0]
 22725  		if x6.Op != OpPPC64MOVBZload {
 22726  			break
 22727  		}
 22728  		i6 := x6.AuxInt
 22729  		if x6.Aux != s {
 22730  			break
 22731  		}
 22732  		_ = x6.Args[1]
 22733  		if p != x6.Args[0] {
 22734  			break
 22735  		}
 22736  		if mem != x6.Args[1] {
 22737  			break
 22738  		}
 22739  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22740  			break
 22741  		}
 22742  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22743  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22744  		v.reset(OpCopy)
 22745  		v.AddArg(v0)
 22746  		v0.AuxInt = i0
 22747  		v0.Aux = s
 22748  		v0.AddArg(p)
 22749  		v0.AddArg(mem)
 22750  		return true
 22751  	}
 22752  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22753  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22754  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22755  	for {
 22756  		t := v.Type
 22757  		_ = v.Args[1]
 22758  		s6 := v.Args[0]
 22759  		if s6.Op != OpPPC64SLDconst {
 22760  			break
 22761  		}
 22762  		if s6.AuxInt != 56 {
 22763  			break
 22764  		}
 22765  		x7 := s6.Args[0]
 22766  		if x7.Op != OpPPC64MOVBZload {
 22767  			break
 22768  		}
 22769  		i7 := x7.AuxInt
 22770  		s := x7.Aux
 22771  		_ = x7.Args[1]
 22772  		p := x7.Args[0]
 22773  		mem := x7.Args[1]
 22774  		o5 := v.Args[1]
 22775  		if o5.Op != OpPPC64OR {
 22776  			break
 22777  		}
 22778  		if o5.Type != t {
 22779  			break
 22780  		}
 22781  		_ = o5.Args[1]
 22782  		o4 := o5.Args[0]
 22783  		if o4.Op != OpPPC64OR {
 22784  			break
 22785  		}
 22786  		if o4.Type != t {
 22787  			break
 22788  		}
 22789  		_ = o4.Args[1]
 22790  		o3 := o4.Args[0]
 22791  		if o3.Op != OpPPC64OR {
 22792  			break
 22793  		}
 22794  		if o3.Type != t {
 22795  			break
 22796  		}
 22797  		_ = o3.Args[1]
 22798  		o2 := o3.Args[0]
 22799  		if o2.Op != OpPPC64OR {
 22800  			break
 22801  		}
 22802  		if o2.Type != t {
 22803  			break
 22804  		}
 22805  		_ = o2.Args[1]
 22806  		s2 := o2.Args[0]
 22807  		if s2.Op != OpPPC64SLDconst {
 22808  			break
 22809  		}
 22810  		if s2.AuxInt != 24 {
 22811  			break
 22812  		}
 22813  		x3 := s2.Args[0]
 22814  		if x3.Op != OpPPC64MOVBZload {
 22815  			break
 22816  		}
 22817  		i3 := x3.AuxInt
 22818  		if x3.Aux != s {
 22819  			break
 22820  		}
 22821  		_ = x3.Args[1]
 22822  		if p != x3.Args[0] {
 22823  			break
 22824  		}
 22825  		if mem != x3.Args[1] {
 22826  			break
 22827  		}
 22828  		o1 := o2.Args[1]
 22829  		if o1.Op != OpPPC64OR {
 22830  			break
 22831  		}
 22832  		if o1.Type != t {
 22833  			break
 22834  		}
 22835  		_ = o1.Args[1]
 22836  		s1 := o1.Args[0]
 22837  		if s1.Op != OpPPC64SLDconst {
 22838  			break
 22839  		}
 22840  		if s1.AuxInt != 16 {
 22841  			break
 22842  		}
 22843  		x2 := s1.Args[0]
 22844  		if x2.Op != OpPPC64MOVBZload {
 22845  			break
 22846  		}
 22847  		i2 := x2.AuxInt
 22848  		if x2.Aux != s {
 22849  			break
 22850  		}
 22851  		_ = x2.Args[1]
 22852  		if p != x2.Args[0] {
 22853  			break
 22854  		}
 22855  		if mem != x2.Args[1] {
 22856  			break
 22857  		}
 22858  		o0 := o1.Args[1]
 22859  		if o0.Op != OpPPC64OR {
 22860  			break
 22861  		}
 22862  		if o0.Type != t {
 22863  			break
 22864  		}
 22865  		_ = o0.Args[1]
 22866  		s0 := o0.Args[0]
 22867  		if s0.Op != OpPPC64SLDconst {
 22868  			break
 22869  		}
 22870  		if s0.AuxInt != 8 {
 22871  			break
 22872  		}
 22873  		x1 := s0.Args[0]
 22874  		if x1.Op != OpPPC64MOVBZload {
 22875  			break
 22876  		}
 22877  		i1 := x1.AuxInt
 22878  		if x1.Aux != s {
 22879  			break
 22880  		}
 22881  		_ = x1.Args[1]
 22882  		if p != x1.Args[0] {
 22883  			break
 22884  		}
 22885  		if mem != x1.Args[1] {
 22886  			break
 22887  		}
 22888  		x0 := o0.Args[1]
 22889  		if x0.Op != OpPPC64MOVBZload {
 22890  			break
 22891  		}
 22892  		i0 := x0.AuxInt
 22893  		if x0.Aux != s {
 22894  			break
 22895  		}
 22896  		_ = x0.Args[1]
 22897  		if p != x0.Args[0] {
 22898  			break
 22899  		}
 22900  		if mem != x0.Args[1] {
 22901  			break
 22902  		}
 22903  		s3 := o3.Args[1]
 22904  		if s3.Op != OpPPC64SLDconst {
 22905  			break
 22906  		}
 22907  		if s3.AuxInt != 32 {
 22908  			break
 22909  		}
 22910  		x4 := s3.Args[0]
 22911  		if x4.Op != OpPPC64MOVBZload {
 22912  			break
 22913  		}
 22914  		i4 := x4.AuxInt
 22915  		if x4.Aux != s {
 22916  			break
 22917  		}
 22918  		_ = x4.Args[1]
 22919  		if p != x4.Args[0] {
 22920  			break
 22921  		}
 22922  		if mem != x4.Args[1] {
 22923  			break
 22924  		}
 22925  		s4 := o4.Args[1]
 22926  		if s4.Op != OpPPC64SLDconst {
 22927  			break
 22928  		}
 22929  		if s4.AuxInt != 40 {
 22930  			break
 22931  		}
 22932  		x5 := s4.Args[0]
 22933  		if x5.Op != OpPPC64MOVBZload {
 22934  			break
 22935  		}
 22936  		i5 := x5.AuxInt
 22937  		if x5.Aux != s {
 22938  			break
 22939  		}
 22940  		_ = x5.Args[1]
 22941  		if p != x5.Args[0] {
 22942  			break
 22943  		}
 22944  		if mem != x5.Args[1] {
 22945  			break
 22946  		}
 22947  		s5 := o5.Args[1]
 22948  		if s5.Op != OpPPC64SLDconst {
 22949  			break
 22950  		}
 22951  		if s5.AuxInt != 48 {
 22952  			break
 22953  		}
 22954  		x6 := s5.Args[0]
 22955  		if x6.Op != OpPPC64MOVBZload {
 22956  			break
 22957  		}
 22958  		i6 := x6.AuxInt
 22959  		if x6.Aux != s {
 22960  			break
 22961  		}
 22962  		_ = x6.Args[1]
 22963  		if p != x6.Args[0] {
 22964  			break
 22965  		}
 22966  		if mem != x6.Args[1] {
 22967  			break
 22968  		}
 22969  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22970  			break
 22971  		}
 22972  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22973  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22974  		v.reset(OpCopy)
 22975  		v.AddArg(v0)
 22976  		v0.AuxInt = i0
 22977  		v0.Aux = s
 22978  		v0.AddArg(p)
 22979  		v0.AddArg(mem)
 22980  		return true
 22981  	}
 22982  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22983  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22984  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22985  	for {
 22986  		t := v.Type
 22987  		_ = v.Args[1]
 22988  		s6 := v.Args[0]
 22989  		if s6.Op != OpPPC64SLDconst {
 22990  			break
 22991  		}
 22992  		if s6.AuxInt != 56 {
 22993  			break
 22994  		}
 22995  		x7 := s6.Args[0]
 22996  		if x7.Op != OpPPC64MOVBZload {
 22997  			break
 22998  		}
 22999  		i7 := x7.AuxInt
 23000  		s := x7.Aux
 23001  		_ = x7.Args[1]
 23002  		p := x7.Args[0]
 23003  		mem := x7.Args[1]
 23004  		o5 := v.Args[1]
 23005  		if o5.Op != OpPPC64OR {
 23006  			break
 23007  		}
 23008  		if o5.Type != t {
 23009  			break
 23010  		}
 23011  		_ = o5.Args[1]
 23012  		o4 := o5.Args[0]
 23013  		if o4.Op != OpPPC64OR {
 23014  			break
 23015  		}
 23016  		if o4.Type != t {
 23017  			break
 23018  		}
 23019  		_ = o4.Args[1]
 23020  		o3 := o4.Args[0]
 23021  		if o3.Op != OpPPC64OR {
 23022  			break
 23023  		}
 23024  		if o3.Type != t {
 23025  			break
 23026  		}
 23027  		_ = o3.Args[1]
 23028  		o2 := o3.Args[0]
 23029  		if o2.Op != OpPPC64OR {
 23030  			break
 23031  		}
 23032  		if o2.Type != t {
 23033  			break
 23034  		}
 23035  		_ = o2.Args[1]
 23036  		s2 := o2.Args[0]
 23037  		if s2.Op != OpPPC64SLDconst {
 23038  			break
 23039  		}
 23040  		if s2.AuxInt != 24 {
 23041  			break
 23042  		}
 23043  		x3 := s2.Args[0]
 23044  		if x3.Op != OpPPC64MOVBZload {
 23045  			break
 23046  		}
 23047  		i3 := x3.AuxInt
 23048  		if x3.Aux != s {
 23049  			break
 23050  		}
 23051  		_ = x3.Args[1]
 23052  		if p != x3.Args[0] {
 23053  			break
 23054  		}
 23055  		if mem != x3.Args[1] {
 23056  			break
 23057  		}
 23058  		o1 := o2.Args[1]
 23059  		if o1.Op != OpPPC64OR {
 23060  			break
 23061  		}
 23062  		if o1.Type != t {
 23063  			break
 23064  		}
 23065  		_ = o1.Args[1]
 23066  		s1 := o1.Args[0]
 23067  		if s1.Op != OpPPC64SLDconst {
 23068  			break
 23069  		}
 23070  		if s1.AuxInt != 16 {
 23071  			break
 23072  		}
 23073  		x2 := s1.Args[0]
 23074  		if x2.Op != OpPPC64MOVBZload {
 23075  			break
 23076  		}
 23077  		i2 := x2.AuxInt
 23078  		if x2.Aux != s {
 23079  			break
 23080  		}
 23081  		_ = x2.Args[1]
 23082  		if p != x2.Args[0] {
 23083  			break
 23084  		}
 23085  		if mem != x2.Args[1] {
 23086  			break
 23087  		}
 23088  		o0 := o1.Args[1]
 23089  		if o0.Op != OpPPC64OR {
 23090  			break
 23091  		}
 23092  		if o0.Type != t {
 23093  			break
 23094  		}
 23095  		_ = o0.Args[1]
 23096  		x0 := o0.Args[0]
 23097  		if x0.Op != OpPPC64MOVBZload {
 23098  			break
 23099  		}
 23100  		i0 := x0.AuxInt
 23101  		if x0.Aux != s {
 23102  			break
 23103  		}
 23104  		_ = x0.Args[1]
 23105  		if p != x0.Args[0] {
 23106  			break
 23107  		}
 23108  		if mem != x0.Args[1] {
 23109  			break
 23110  		}
 23111  		s0 := o0.Args[1]
 23112  		if s0.Op != OpPPC64SLDconst {
 23113  			break
 23114  		}
 23115  		if s0.AuxInt != 8 {
 23116  			break
 23117  		}
 23118  		x1 := s0.Args[0]
 23119  		if x1.Op != OpPPC64MOVBZload {
 23120  			break
 23121  		}
 23122  		i1 := x1.AuxInt
 23123  		if x1.Aux != s {
 23124  			break
 23125  		}
 23126  		_ = x1.Args[1]
 23127  		if p != x1.Args[0] {
 23128  			break
 23129  		}
 23130  		if mem != x1.Args[1] {
 23131  			break
 23132  		}
 23133  		s3 := o3.Args[1]
 23134  		if s3.Op != OpPPC64SLDconst {
 23135  			break
 23136  		}
 23137  		if s3.AuxInt != 32 {
 23138  			break
 23139  		}
 23140  		x4 := s3.Args[0]
 23141  		if x4.Op != OpPPC64MOVBZload {
 23142  			break
 23143  		}
 23144  		i4 := x4.AuxInt
 23145  		if x4.Aux != s {
 23146  			break
 23147  		}
 23148  		_ = x4.Args[1]
 23149  		if p != x4.Args[0] {
 23150  			break
 23151  		}
 23152  		if mem != x4.Args[1] {
 23153  			break
 23154  		}
 23155  		s4 := o4.Args[1]
 23156  		if s4.Op != OpPPC64SLDconst {
 23157  			break
 23158  		}
 23159  		if s4.AuxInt != 40 {
 23160  			break
 23161  		}
 23162  		x5 := s4.Args[0]
 23163  		if x5.Op != OpPPC64MOVBZload {
 23164  			break
 23165  		}
 23166  		i5 := x5.AuxInt
 23167  		if x5.Aux != s {
 23168  			break
 23169  		}
 23170  		_ = x5.Args[1]
 23171  		if p != x5.Args[0] {
 23172  			break
 23173  		}
 23174  		if mem != x5.Args[1] {
 23175  			break
 23176  		}
 23177  		s5 := o5.Args[1]
 23178  		if s5.Op != OpPPC64SLDconst {
 23179  			break
 23180  		}
 23181  		if s5.AuxInt != 48 {
 23182  			break
 23183  		}
 23184  		x6 := s5.Args[0]
 23185  		if x6.Op != OpPPC64MOVBZload {
 23186  			break
 23187  		}
 23188  		i6 := x6.AuxInt
 23189  		if x6.Aux != s {
 23190  			break
 23191  		}
 23192  		_ = x6.Args[1]
 23193  		if p != x6.Args[0] {
 23194  			break
 23195  		}
 23196  		if mem != x6.Args[1] {
 23197  			break
 23198  		}
 23199  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23200  			break
 23201  		}
 23202  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23203  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23204  		v.reset(OpCopy)
 23205  		v.AddArg(v0)
 23206  		v0.AuxInt = i0
 23207  		v0.Aux = s
 23208  		v0.AddArg(p)
 23209  		v0.AddArg(mem)
 23210  		return true
 23211  	}
 23212  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23213  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23214  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23215  	for {
 23216  		t := v.Type
 23217  		_ = v.Args[1]
 23218  		s6 := v.Args[0]
 23219  		if s6.Op != OpPPC64SLDconst {
 23220  			break
 23221  		}
 23222  		if s6.AuxInt != 56 {
 23223  			break
 23224  		}
 23225  		x7 := s6.Args[0]
 23226  		if x7.Op != OpPPC64MOVBZload {
 23227  			break
 23228  		}
 23229  		i7 := x7.AuxInt
 23230  		s := x7.Aux
 23231  		_ = x7.Args[1]
 23232  		p := x7.Args[0]
 23233  		mem := x7.Args[1]
 23234  		o5 := v.Args[1]
 23235  		if o5.Op != OpPPC64OR {
 23236  			break
 23237  		}
 23238  		if o5.Type != t {
 23239  			break
 23240  		}
 23241  		_ = o5.Args[1]
 23242  		o4 := o5.Args[0]
 23243  		if o4.Op != OpPPC64OR {
 23244  			break
 23245  		}
 23246  		if o4.Type != t {
 23247  			break
 23248  		}
 23249  		_ = o4.Args[1]
 23250  		o3 := o4.Args[0]
 23251  		if o3.Op != OpPPC64OR {
 23252  			break
 23253  		}
 23254  		if o3.Type != t {
 23255  			break
 23256  		}
 23257  		_ = o3.Args[1]
 23258  		o2 := o3.Args[0]
 23259  		if o2.Op != OpPPC64OR {
 23260  			break
 23261  		}
 23262  		if o2.Type != t {
 23263  			break
 23264  		}
 23265  		_ = o2.Args[1]
 23266  		s2 := o2.Args[0]
 23267  		if s2.Op != OpPPC64SLDconst {
 23268  			break
 23269  		}
 23270  		if s2.AuxInt != 24 {
 23271  			break
 23272  		}
 23273  		x3 := s2.Args[0]
 23274  		if x3.Op != OpPPC64MOVBZload {
 23275  			break
 23276  		}
 23277  		i3 := x3.AuxInt
 23278  		if x3.Aux != s {
 23279  			break
 23280  		}
 23281  		_ = x3.Args[1]
 23282  		if p != x3.Args[0] {
 23283  			break
 23284  		}
 23285  		if mem != x3.Args[1] {
 23286  			break
 23287  		}
 23288  		o1 := o2.Args[1]
 23289  		if o1.Op != OpPPC64OR {
 23290  			break
 23291  		}
 23292  		if o1.Type != t {
 23293  			break
 23294  		}
 23295  		_ = o1.Args[1]
 23296  		o0 := o1.Args[0]
 23297  		if o0.Op != OpPPC64OR {
 23298  			break
 23299  		}
 23300  		if o0.Type != t {
 23301  			break
 23302  		}
 23303  		_ = o0.Args[1]
 23304  		s0 := o0.Args[0]
 23305  		if s0.Op != OpPPC64SLDconst {
 23306  			break
 23307  		}
 23308  		if s0.AuxInt != 8 {
 23309  			break
 23310  		}
 23311  		x1 := s0.Args[0]
 23312  		if x1.Op != OpPPC64MOVBZload {
 23313  			break
 23314  		}
 23315  		i1 := x1.AuxInt
 23316  		if x1.Aux != s {
 23317  			break
 23318  		}
 23319  		_ = x1.Args[1]
 23320  		if p != x1.Args[0] {
 23321  			break
 23322  		}
 23323  		if mem != x1.Args[1] {
 23324  			break
 23325  		}
 23326  		x0 := o0.Args[1]
 23327  		if x0.Op != OpPPC64MOVBZload {
 23328  			break
 23329  		}
 23330  		i0 := x0.AuxInt
 23331  		if x0.Aux != s {
 23332  			break
 23333  		}
 23334  		_ = x0.Args[1]
 23335  		if p != x0.Args[0] {
 23336  			break
 23337  		}
 23338  		if mem != x0.Args[1] {
 23339  			break
 23340  		}
 23341  		s1 := o1.Args[1]
 23342  		if s1.Op != OpPPC64SLDconst {
 23343  			break
 23344  		}
 23345  		if s1.AuxInt != 16 {
 23346  			break
 23347  		}
 23348  		x2 := s1.Args[0]
 23349  		if x2.Op != OpPPC64MOVBZload {
 23350  			break
 23351  		}
 23352  		i2 := x2.AuxInt
 23353  		if x2.Aux != s {
 23354  			break
 23355  		}
 23356  		_ = x2.Args[1]
 23357  		if p != x2.Args[0] {
 23358  			break
 23359  		}
 23360  		if mem != x2.Args[1] {
 23361  			break
 23362  		}
 23363  		s3 := o3.Args[1]
 23364  		if s3.Op != OpPPC64SLDconst {
 23365  			break
 23366  		}
 23367  		if s3.AuxInt != 32 {
 23368  			break
 23369  		}
 23370  		x4 := s3.Args[0]
 23371  		if x4.Op != OpPPC64MOVBZload {
 23372  			break
 23373  		}
 23374  		i4 := x4.AuxInt
 23375  		if x4.Aux != s {
 23376  			break
 23377  		}
 23378  		_ = x4.Args[1]
 23379  		if p != x4.Args[0] {
 23380  			break
 23381  		}
 23382  		if mem != x4.Args[1] {
 23383  			break
 23384  		}
 23385  		s4 := o4.Args[1]
 23386  		if s4.Op != OpPPC64SLDconst {
 23387  			break
 23388  		}
 23389  		if s4.AuxInt != 40 {
 23390  			break
 23391  		}
 23392  		x5 := s4.Args[0]
 23393  		if x5.Op != OpPPC64MOVBZload {
 23394  			break
 23395  		}
 23396  		i5 := x5.AuxInt
 23397  		if x5.Aux != s {
 23398  			break
 23399  		}
 23400  		_ = x5.Args[1]
 23401  		if p != x5.Args[0] {
 23402  			break
 23403  		}
 23404  		if mem != x5.Args[1] {
 23405  			break
 23406  		}
 23407  		s5 := o5.Args[1]
 23408  		if s5.Op != OpPPC64SLDconst {
 23409  			break
 23410  		}
 23411  		if s5.AuxInt != 48 {
 23412  			break
 23413  		}
 23414  		x6 := s5.Args[0]
 23415  		if x6.Op != OpPPC64MOVBZload {
 23416  			break
 23417  		}
 23418  		i6 := x6.AuxInt
 23419  		if x6.Aux != s {
 23420  			break
 23421  		}
 23422  		_ = x6.Args[1]
 23423  		if p != x6.Args[0] {
 23424  			break
 23425  		}
 23426  		if mem != x6.Args[1] {
 23427  			break
 23428  		}
 23429  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23430  			break
 23431  		}
 23432  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23433  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23434  		v.reset(OpCopy)
 23435  		v.AddArg(v0)
 23436  		v0.AuxInt = i0
 23437  		v0.Aux = s
 23438  		v0.AddArg(p)
 23439  		v0.AddArg(mem)
 23440  		return true
 23441  	}
 23442  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23443  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23444  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23445  	for {
 23446  		t := v.Type
 23447  		_ = v.Args[1]
 23448  		s6 := v.Args[0]
 23449  		if s6.Op != OpPPC64SLDconst {
 23450  			break
 23451  		}
 23452  		if s6.AuxInt != 56 {
 23453  			break
 23454  		}
 23455  		x7 := s6.Args[0]
 23456  		if x7.Op != OpPPC64MOVBZload {
 23457  			break
 23458  		}
 23459  		i7 := x7.AuxInt
 23460  		s := x7.Aux
 23461  		_ = x7.Args[1]
 23462  		p := x7.Args[0]
 23463  		mem := x7.Args[1]
 23464  		o5 := v.Args[1]
 23465  		if o5.Op != OpPPC64OR {
 23466  			break
 23467  		}
 23468  		if o5.Type != t {
 23469  			break
 23470  		}
 23471  		_ = o5.Args[1]
 23472  		o4 := o5.Args[0]
 23473  		if o4.Op != OpPPC64OR {
 23474  			break
 23475  		}
 23476  		if o4.Type != t {
 23477  			break
 23478  		}
 23479  		_ = o4.Args[1]
 23480  		o3 := o4.Args[0]
 23481  		if o3.Op != OpPPC64OR {
 23482  			break
 23483  		}
 23484  		if o3.Type != t {
 23485  			break
 23486  		}
 23487  		_ = o3.Args[1]
 23488  		o2 := o3.Args[0]
 23489  		if o2.Op != OpPPC64OR {
 23490  			break
 23491  		}
 23492  		if o2.Type != t {
 23493  			break
 23494  		}
 23495  		_ = o2.Args[1]
 23496  		s2 := o2.Args[0]
 23497  		if s2.Op != OpPPC64SLDconst {
 23498  			break
 23499  		}
 23500  		if s2.AuxInt != 24 {
 23501  			break
 23502  		}
 23503  		x3 := s2.Args[0]
 23504  		if x3.Op != OpPPC64MOVBZload {
 23505  			break
 23506  		}
 23507  		i3 := x3.AuxInt
 23508  		if x3.Aux != s {
 23509  			break
 23510  		}
 23511  		_ = x3.Args[1]
 23512  		if p != x3.Args[0] {
 23513  			break
 23514  		}
 23515  		if mem != x3.Args[1] {
 23516  			break
 23517  		}
 23518  		o1 := o2.Args[1]
 23519  		if o1.Op != OpPPC64OR {
 23520  			break
 23521  		}
 23522  		if o1.Type != t {
 23523  			break
 23524  		}
 23525  		_ = o1.Args[1]
 23526  		o0 := o1.Args[0]
 23527  		if o0.Op != OpPPC64OR {
 23528  			break
 23529  		}
 23530  		if o0.Type != t {
 23531  			break
 23532  		}
 23533  		_ = o0.Args[1]
 23534  		x0 := o0.Args[0]
 23535  		if x0.Op != OpPPC64MOVBZload {
 23536  			break
 23537  		}
 23538  		i0 := x0.AuxInt
 23539  		if x0.Aux != s {
 23540  			break
 23541  		}
 23542  		_ = x0.Args[1]
 23543  		if p != x0.Args[0] {
 23544  			break
 23545  		}
 23546  		if mem != x0.Args[1] {
 23547  			break
 23548  		}
 23549  		s0 := o0.Args[1]
 23550  		if s0.Op != OpPPC64SLDconst {
 23551  			break
 23552  		}
 23553  		if s0.AuxInt != 8 {
 23554  			break
 23555  		}
 23556  		x1 := s0.Args[0]
 23557  		if x1.Op != OpPPC64MOVBZload {
 23558  			break
 23559  		}
 23560  		i1 := x1.AuxInt
 23561  		if x1.Aux != s {
 23562  			break
 23563  		}
 23564  		_ = x1.Args[1]
 23565  		if p != x1.Args[0] {
 23566  			break
 23567  		}
 23568  		if mem != x1.Args[1] {
 23569  			break
 23570  		}
 23571  		s1 := o1.Args[1]
 23572  		if s1.Op != OpPPC64SLDconst {
 23573  			break
 23574  		}
 23575  		if s1.AuxInt != 16 {
 23576  			break
 23577  		}
 23578  		x2 := s1.Args[0]
 23579  		if x2.Op != OpPPC64MOVBZload {
 23580  			break
 23581  		}
 23582  		i2 := x2.AuxInt
 23583  		if x2.Aux != s {
 23584  			break
 23585  		}
 23586  		_ = x2.Args[1]
 23587  		if p != x2.Args[0] {
 23588  			break
 23589  		}
 23590  		if mem != x2.Args[1] {
 23591  			break
 23592  		}
 23593  		s3 := o3.Args[1]
 23594  		if s3.Op != OpPPC64SLDconst {
 23595  			break
 23596  		}
 23597  		if s3.AuxInt != 32 {
 23598  			break
 23599  		}
 23600  		x4 := s3.Args[0]
 23601  		if x4.Op != OpPPC64MOVBZload {
 23602  			break
 23603  		}
 23604  		i4 := x4.AuxInt
 23605  		if x4.Aux != s {
 23606  			break
 23607  		}
 23608  		_ = x4.Args[1]
 23609  		if p != x4.Args[0] {
 23610  			break
 23611  		}
 23612  		if mem != x4.Args[1] {
 23613  			break
 23614  		}
 23615  		s4 := o4.Args[1]
 23616  		if s4.Op != OpPPC64SLDconst {
 23617  			break
 23618  		}
 23619  		if s4.AuxInt != 40 {
 23620  			break
 23621  		}
 23622  		x5 := s4.Args[0]
 23623  		if x5.Op != OpPPC64MOVBZload {
 23624  			break
 23625  		}
 23626  		i5 := x5.AuxInt
 23627  		if x5.Aux != s {
 23628  			break
 23629  		}
 23630  		_ = x5.Args[1]
 23631  		if p != x5.Args[0] {
 23632  			break
 23633  		}
 23634  		if mem != x5.Args[1] {
 23635  			break
 23636  		}
 23637  		s5 := o5.Args[1]
 23638  		if s5.Op != OpPPC64SLDconst {
 23639  			break
 23640  		}
 23641  		if s5.AuxInt != 48 {
 23642  			break
 23643  		}
 23644  		x6 := s5.Args[0]
 23645  		if x6.Op != OpPPC64MOVBZload {
 23646  			break
 23647  		}
 23648  		i6 := x6.AuxInt
 23649  		if x6.Aux != s {
 23650  			break
 23651  		}
 23652  		_ = x6.Args[1]
 23653  		if p != x6.Args[0] {
 23654  			break
 23655  		}
 23656  		if mem != x6.Args[1] {
 23657  			break
 23658  		}
 23659  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23660  			break
 23661  		}
 23662  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23663  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23664  		v.reset(OpCopy)
 23665  		v.AddArg(v0)
 23666  		v0.AuxInt = i0
 23667  		v0.Aux = s
 23668  		v0.AddArg(p)
 23669  		v0.AddArg(mem)
 23670  		return true
 23671  	}
 23672  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23673  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23674  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23675  	for {
 23676  		t := v.Type
 23677  		_ = v.Args[1]
 23678  		s6 := v.Args[0]
 23679  		if s6.Op != OpPPC64SLDconst {
 23680  			break
 23681  		}
 23682  		if s6.AuxInt != 56 {
 23683  			break
 23684  		}
 23685  		x7 := s6.Args[0]
 23686  		if x7.Op != OpPPC64MOVBZload {
 23687  			break
 23688  		}
 23689  		i7 := x7.AuxInt
 23690  		s := x7.Aux
 23691  		_ = x7.Args[1]
 23692  		p := x7.Args[0]
 23693  		mem := x7.Args[1]
 23694  		o5 := v.Args[1]
 23695  		if o5.Op != OpPPC64OR {
 23696  			break
 23697  		}
 23698  		if o5.Type != t {
 23699  			break
 23700  		}
 23701  		_ = o5.Args[1]
 23702  		o4 := o5.Args[0]
 23703  		if o4.Op != OpPPC64OR {
 23704  			break
 23705  		}
 23706  		if o4.Type != t {
 23707  			break
 23708  		}
 23709  		_ = o4.Args[1]
 23710  		o3 := o4.Args[0]
 23711  		if o3.Op != OpPPC64OR {
 23712  			break
 23713  		}
 23714  		if o3.Type != t {
 23715  			break
 23716  		}
 23717  		_ = o3.Args[1]
 23718  		o2 := o3.Args[0]
 23719  		if o2.Op != OpPPC64OR {
 23720  			break
 23721  		}
 23722  		if o2.Type != t {
 23723  			break
 23724  		}
 23725  		_ = o2.Args[1]
 23726  		o1 := o2.Args[0]
 23727  		if o1.Op != OpPPC64OR {
 23728  			break
 23729  		}
 23730  		if o1.Type != t {
 23731  			break
 23732  		}
 23733  		_ = o1.Args[1]
 23734  		s1 := o1.Args[0]
 23735  		if s1.Op != OpPPC64SLDconst {
 23736  			break
 23737  		}
 23738  		if s1.AuxInt != 16 {
 23739  			break
 23740  		}
 23741  		x2 := s1.Args[0]
 23742  		if x2.Op != OpPPC64MOVBZload {
 23743  			break
 23744  		}
 23745  		i2 := x2.AuxInt
 23746  		if x2.Aux != s {
 23747  			break
 23748  		}
 23749  		_ = x2.Args[1]
 23750  		if p != x2.Args[0] {
 23751  			break
 23752  		}
 23753  		if mem != x2.Args[1] {
 23754  			break
 23755  		}
 23756  		o0 := o1.Args[1]
 23757  		if o0.Op != OpPPC64OR {
 23758  			break
 23759  		}
 23760  		if o0.Type != t {
 23761  			break
 23762  		}
 23763  		_ = o0.Args[1]
 23764  		s0 := o0.Args[0]
 23765  		if s0.Op != OpPPC64SLDconst {
 23766  			break
 23767  		}
 23768  		if s0.AuxInt != 8 {
 23769  			break
 23770  		}
 23771  		x1 := s0.Args[0]
 23772  		if x1.Op != OpPPC64MOVBZload {
 23773  			break
 23774  		}
 23775  		i1 := x1.AuxInt
 23776  		if x1.Aux != s {
 23777  			break
 23778  		}
 23779  		_ = x1.Args[1]
 23780  		if p != x1.Args[0] {
 23781  			break
 23782  		}
 23783  		if mem != x1.Args[1] {
 23784  			break
 23785  		}
 23786  		x0 := o0.Args[1]
 23787  		if x0.Op != OpPPC64MOVBZload {
 23788  			break
 23789  		}
 23790  		i0 := x0.AuxInt
 23791  		if x0.Aux != s {
 23792  			break
 23793  		}
 23794  		_ = x0.Args[1]
 23795  		if p != x0.Args[0] {
 23796  			break
 23797  		}
 23798  		if mem != x0.Args[1] {
 23799  			break
 23800  		}
 23801  		s2 := o2.Args[1]
 23802  		if s2.Op != OpPPC64SLDconst {
 23803  			break
 23804  		}
 23805  		if s2.AuxInt != 24 {
 23806  			break
 23807  		}
 23808  		x3 := s2.Args[0]
 23809  		if x3.Op != OpPPC64MOVBZload {
 23810  			break
 23811  		}
 23812  		i3 := x3.AuxInt
 23813  		if x3.Aux != s {
 23814  			break
 23815  		}
 23816  		_ = x3.Args[1]
 23817  		if p != x3.Args[0] {
 23818  			break
 23819  		}
 23820  		if mem != x3.Args[1] {
 23821  			break
 23822  		}
 23823  		s3 := o3.Args[1]
 23824  		if s3.Op != OpPPC64SLDconst {
 23825  			break
 23826  		}
 23827  		if s3.AuxInt != 32 {
 23828  			break
 23829  		}
 23830  		x4 := s3.Args[0]
 23831  		if x4.Op != OpPPC64MOVBZload {
 23832  			break
 23833  		}
 23834  		i4 := x4.AuxInt
 23835  		if x4.Aux != s {
 23836  			break
 23837  		}
 23838  		_ = x4.Args[1]
 23839  		if p != x4.Args[0] {
 23840  			break
 23841  		}
 23842  		if mem != x4.Args[1] {
 23843  			break
 23844  		}
 23845  		s4 := o4.Args[1]
 23846  		if s4.Op != OpPPC64SLDconst {
 23847  			break
 23848  		}
 23849  		if s4.AuxInt != 40 {
 23850  			break
 23851  		}
 23852  		x5 := s4.Args[0]
 23853  		if x5.Op != OpPPC64MOVBZload {
 23854  			break
 23855  		}
 23856  		i5 := x5.AuxInt
 23857  		if x5.Aux != s {
 23858  			break
 23859  		}
 23860  		_ = x5.Args[1]
 23861  		if p != x5.Args[0] {
 23862  			break
 23863  		}
 23864  		if mem != x5.Args[1] {
 23865  			break
 23866  		}
 23867  		s5 := o5.Args[1]
 23868  		if s5.Op != OpPPC64SLDconst {
 23869  			break
 23870  		}
 23871  		if s5.AuxInt != 48 {
 23872  			break
 23873  		}
 23874  		x6 := s5.Args[0]
 23875  		if x6.Op != OpPPC64MOVBZload {
 23876  			break
 23877  		}
 23878  		i6 := x6.AuxInt
 23879  		if x6.Aux != s {
 23880  			break
 23881  		}
 23882  		_ = x6.Args[1]
 23883  		if p != x6.Args[0] {
 23884  			break
 23885  		}
 23886  		if mem != x6.Args[1] {
 23887  			break
 23888  		}
 23889  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23890  			break
 23891  		}
 23892  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23893  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23894  		v.reset(OpCopy)
 23895  		v.AddArg(v0)
 23896  		v0.AuxInt = i0
 23897  		v0.Aux = s
 23898  		v0.AddArg(p)
 23899  		v0.AddArg(mem)
 23900  		return true
 23901  	}
 23902  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23903  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23904  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23905  	for {
 23906  		t := v.Type
 23907  		_ = v.Args[1]
 23908  		s6 := v.Args[0]
 23909  		if s6.Op != OpPPC64SLDconst {
 23910  			break
 23911  		}
 23912  		if s6.AuxInt != 56 {
 23913  			break
 23914  		}
 23915  		x7 := s6.Args[0]
 23916  		if x7.Op != OpPPC64MOVBZload {
 23917  			break
 23918  		}
 23919  		i7 := x7.AuxInt
 23920  		s := x7.Aux
 23921  		_ = x7.Args[1]
 23922  		p := x7.Args[0]
 23923  		mem := x7.Args[1]
 23924  		o5 := v.Args[1]
 23925  		if o5.Op != OpPPC64OR {
 23926  			break
 23927  		}
 23928  		if o5.Type != t {
 23929  			break
 23930  		}
 23931  		_ = o5.Args[1]
 23932  		o4 := o5.Args[0]
 23933  		if o4.Op != OpPPC64OR {
 23934  			break
 23935  		}
 23936  		if o4.Type != t {
 23937  			break
 23938  		}
 23939  		_ = o4.Args[1]
 23940  		o3 := o4.Args[0]
 23941  		if o3.Op != OpPPC64OR {
 23942  			break
 23943  		}
 23944  		if o3.Type != t {
 23945  			break
 23946  		}
 23947  		_ = o3.Args[1]
 23948  		o2 := o3.Args[0]
 23949  		if o2.Op != OpPPC64OR {
 23950  			break
 23951  		}
 23952  		if o2.Type != t {
 23953  			break
 23954  		}
 23955  		_ = o2.Args[1]
 23956  		o1 := o2.Args[0]
 23957  		if o1.Op != OpPPC64OR {
 23958  			break
 23959  		}
 23960  		if o1.Type != t {
 23961  			break
 23962  		}
 23963  		_ = o1.Args[1]
 23964  		s1 := o1.Args[0]
 23965  		if s1.Op != OpPPC64SLDconst {
 23966  			break
 23967  		}
 23968  		if s1.AuxInt != 16 {
 23969  			break
 23970  		}
 23971  		x2 := s1.Args[0]
 23972  		if x2.Op != OpPPC64MOVBZload {
 23973  			break
 23974  		}
 23975  		i2 := x2.AuxInt
 23976  		if x2.Aux != s {
 23977  			break
 23978  		}
 23979  		_ = x2.Args[1]
 23980  		if p != x2.Args[0] {
 23981  			break
 23982  		}
 23983  		if mem != x2.Args[1] {
 23984  			break
 23985  		}
 23986  		o0 := o1.Args[1]
 23987  		if o0.Op != OpPPC64OR {
 23988  			break
 23989  		}
 23990  		if o0.Type != t {
 23991  			break
 23992  		}
 23993  		_ = o0.Args[1]
 23994  		x0 := o0.Args[0]
 23995  		if x0.Op != OpPPC64MOVBZload {
 23996  			break
 23997  		}
 23998  		i0 := x0.AuxInt
 23999  		if x0.Aux != s {
 24000  			break
 24001  		}
 24002  		_ = x0.Args[1]
 24003  		if p != x0.Args[0] {
 24004  			break
 24005  		}
 24006  		if mem != x0.Args[1] {
 24007  			break
 24008  		}
 24009  		s0 := o0.Args[1]
 24010  		if s0.Op != OpPPC64SLDconst {
 24011  			break
 24012  		}
 24013  		if s0.AuxInt != 8 {
 24014  			break
 24015  		}
 24016  		x1 := s0.Args[0]
 24017  		if x1.Op != OpPPC64MOVBZload {
 24018  			break
 24019  		}
 24020  		i1 := x1.AuxInt
 24021  		if x1.Aux != s {
 24022  			break
 24023  		}
 24024  		_ = x1.Args[1]
 24025  		if p != x1.Args[0] {
 24026  			break
 24027  		}
 24028  		if mem != x1.Args[1] {
 24029  			break
 24030  		}
 24031  		s2 := o2.Args[1]
 24032  		if s2.Op != OpPPC64SLDconst {
 24033  			break
 24034  		}
 24035  		if s2.AuxInt != 24 {
 24036  			break
 24037  		}
 24038  		x3 := s2.Args[0]
 24039  		if x3.Op != OpPPC64MOVBZload {
 24040  			break
 24041  		}
 24042  		i3 := x3.AuxInt
 24043  		if x3.Aux != s {
 24044  			break
 24045  		}
 24046  		_ = x3.Args[1]
 24047  		if p != x3.Args[0] {
 24048  			break
 24049  		}
 24050  		if mem != x3.Args[1] {
 24051  			break
 24052  		}
 24053  		s3 := o3.Args[1]
 24054  		if s3.Op != OpPPC64SLDconst {
 24055  			break
 24056  		}
 24057  		if s3.AuxInt != 32 {
 24058  			break
 24059  		}
 24060  		x4 := s3.Args[0]
 24061  		if x4.Op != OpPPC64MOVBZload {
 24062  			break
 24063  		}
 24064  		i4 := x4.AuxInt
 24065  		if x4.Aux != s {
 24066  			break
 24067  		}
 24068  		_ = x4.Args[1]
 24069  		if p != x4.Args[0] {
 24070  			break
 24071  		}
 24072  		if mem != x4.Args[1] {
 24073  			break
 24074  		}
 24075  		s4 := o4.Args[1]
 24076  		if s4.Op != OpPPC64SLDconst {
 24077  			break
 24078  		}
 24079  		if s4.AuxInt != 40 {
 24080  			break
 24081  		}
 24082  		x5 := s4.Args[0]
 24083  		if x5.Op != OpPPC64MOVBZload {
 24084  			break
 24085  		}
 24086  		i5 := x5.AuxInt
 24087  		if x5.Aux != s {
 24088  			break
 24089  		}
 24090  		_ = x5.Args[1]
 24091  		if p != x5.Args[0] {
 24092  			break
 24093  		}
 24094  		if mem != x5.Args[1] {
 24095  			break
 24096  		}
 24097  		s5 := o5.Args[1]
 24098  		if s5.Op != OpPPC64SLDconst {
 24099  			break
 24100  		}
 24101  		if s5.AuxInt != 48 {
 24102  			break
 24103  		}
 24104  		x6 := s5.Args[0]
 24105  		if x6.Op != OpPPC64MOVBZload {
 24106  			break
 24107  		}
 24108  		i6 := x6.AuxInt
 24109  		if x6.Aux != s {
 24110  			break
 24111  		}
 24112  		_ = x6.Args[1]
 24113  		if p != x6.Args[0] {
 24114  			break
 24115  		}
 24116  		if mem != x6.Args[1] {
 24117  			break
 24118  		}
 24119  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24120  			break
 24121  		}
 24122  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24123  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24124  		v.reset(OpCopy)
 24125  		v.AddArg(v0)
 24126  		v0.AuxInt = i0
 24127  		v0.Aux = s
 24128  		v0.AddArg(p)
 24129  		v0.AddArg(mem)
 24130  		return true
 24131  	}
 24132  	return false
 24133  }
 24134  func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
 24135  	b := v.Block
 24136  	_ = b
 24137  	config := b.Func.Config
 24138  	_ = config
 24139  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 24140  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24141  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24142  	for {
 24143  		t := v.Type
 24144  		_ = v.Args[1]
 24145  		s6 := v.Args[0]
 24146  		if s6.Op != OpPPC64SLDconst {
 24147  			break
 24148  		}
 24149  		if s6.AuxInt != 56 {
 24150  			break
 24151  		}
 24152  		x7 := s6.Args[0]
 24153  		if x7.Op != OpPPC64MOVBZload {
 24154  			break
 24155  		}
 24156  		i7 := x7.AuxInt
 24157  		s := x7.Aux
 24158  		_ = x7.Args[1]
 24159  		p := x7.Args[0]
 24160  		mem := x7.Args[1]
 24161  		o5 := v.Args[1]
 24162  		if o5.Op != OpPPC64OR {
 24163  			break
 24164  		}
 24165  		if o5.Type != t {
 24166  			break
 24167  		}
 24168  		_ = o5.Args[1]
 24169  		o4 := o5.Args[0]
 24170  		if o4.Op != OpPPC64OR {
 24171  			break
 24172  		}
 24173  		if o4.Type != t {
 24174  			break
 24175  		}
 24176  		_ = o4.Args[1]
 24177  		o3 := o4.Args[0]
 24178  		if o3.Op != OpPPC64OR {
 24179  			break
 24180  		}
 24181  		if o3.Type != t {
 24182  			break
 24183  		}
 24184  		_ = o3.Args[1]
 24185  		o2 := o3.Args[0]
 24186  		if o2.Op != OpPPC64OR {
 24187  			break
 24188  		}
 24189  		if o2.Type != t {
 24190  			break
 24191  		}
 24192  		_ = o2.Args[1]
 24193  		o1 := o2.Args[0]
 24194  		if o1.Op != OpPPC64OR {
 24195  			break
 24196  		}
 24197  		if o1.Type != t {
 24198  			break
 24199  		}
 24200  		_ = o1.Args[1]
 24201  		o0 := o1.Args[0]
 24202  		if o0.Op != OpPPC64OR {
 24203  			break
 24204  		}
 24205  		if o0.Type != t {
 24206  			break
 24207  		}
 24208  		_ = o0.Args[1]
 24209  		s0 := o0.Args[0]
 24210  		if s0.Op != OpPPC64SLDconst {
 24211  			break
 24212  		}
 24213  		if s0.AuxInt != 8 {
 24214  			break
 24215  		}
 24216  		x1 := s0.Args[0]
 24217  		if x1.Op != OpPPC64MOVBZload {
 24218  			break
 24219  		}
 24220  		i1 := x1.AuxInt
 24221  		if x1.Aux != s {
 24222  			break
 24223  		}
 24224  		_ = x1.Args[1]
 24225  		if p != x1.Args[0] {
 24226  			break
 24227  		}
 24228  		if mem != x1.Args[1] {
 24229  			break
 24230  		}
 24231  		x0 := o0.Args[1]
 24232  		if x0.Op != OpPPC64MOVBZload {
 24233  			break
 24234  		}
 24235  		i0 := x0.AuxInt
 24236  		if x0.Aux != s {
 24237  			break
 24238  		}
 24239  		_ = x0.Args[1]
 24240  		if p != x0.Args[0] {
 24241  			break
 24242  		}
 24243  		if mem != x0.Args[1] {
 24244  			break
 24245  		}
 24246  		s1 := o1.Args[1]
 24247  		if s1.Op != OpPPC64SLDconst {
 24248  			break
 24249  		}
 24250  		if s1.AuxInt != 16 {
 24251  			break
 24252  		}
 24253  		x2 := s1.Args[0]
 24254  		if x2.Op != OpPPC64MOVBZload {
 24255  			break
 24256  		}
 24257  		i2 := x2.AuxInt
 24258  		if x2.Aux != s {
 24259  			break
 24260  		}
 24261  		_ = x2.Args[1]
 24262  		if p != x2.Args[0] {
 24263  			break
 24264  		}
 24265  		if mem != x2.Args[1] {
 24266  			break
 24267  		}
 24268  		s2 := o2.Args[1]
 24269  		if s2.Op != OpPPC64SLDconst {
 24270  			break
 24271  		}
 24272  		if s2.AuxInt != 24 {
 24273  			break
 24274  		}
 24275  		x3 := s2.Args[0]
 24276  		if x3.Op != OpPPC64MOVBZload {
 24277  			break
 24278  		}
 24279  		i3 := x3.AuxInt
 24280  		if x3.Aux != s {
 24281  			break
 24282  		}
 24283  		_ = x3.Args[1]
 24284  		if p != x3.Args[0] {
 24285  			break
 24286  		}
 24287  		if mem != x3.Args[1] {
 24288  			break
 24289  		}
 24290  		s3 := o3.Args[1]
 24291  		if s3.Op != OpPPC64SLDconst {
 24292  			break
 24293  		}
 24294  		if s3.AuxInt != 32 {
 24295  			break
 24296  		}
 24297  		x4 := s3.Args[0]
 24298  		if x4.Op != OpPPC64MOVBZload {
 24299  			break
 24300  		}
 24301  		i4 := x4.AuxInt
 24302  		if x4.Aux != s {
 24303  			break
 24304  		}
 24305  		_ = x4.Args[1]
 24306  		if p != x4.Args[0] {
 24307  			break
 24308  		}
 24309  		if mem != x4.Args[1] {
 24310  			break
 24311  		}
 24312  		s4 := o4.Args[1]
 24313  		if s4.Op != OpPPC64SLDconst {
 24314  			break
 24315  		}
 24316  		if s4.AuxInt != 40 {
 24317  			break
 24318  		}
 24319  		x5 := s4.Args[0]
 24320  		if x5.Op != OpPPC64MOVBZload {
 24321  			break
 24322  		}
 24323  		i5 := x5.AuxInt
 24324  		if x5.Aux != s {
 24325  			break
 24326  		}
 24327  		_ = x5.Args[1]
 24328  		if p != x5.Args[0] {
 24329  			break
 24330  		}
 24331  		if mem != x5.Args[1] {
 24332  			break
 24333  		}
 24334  		s5 := o5.Args[1]
 24335  		if s5.Op != OpPPC64SLDconst {
 24336  			break
 24337  		}
 24338  		if s5.AuxInt != 48 {
 24339  			break
 24340  		}
 24341  		x6 := s5.Args[0]
 24342  		if x6.Op != OpPPC64MOVBZload {
 24343  			break
 24344  		}
 24345  		i6 := x6.AuxInt
 24346  		if x6.Aux != s {
 24347  			break
 24348  		}
 24349  		_ = x6.Args[1]
 24350  		if p != x6.Args[0] {
 24351  			break
 24352  		}
 24353  		if mem != x6.Args[1] {
 24354  			break
 24355  		}
 24356  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24357  			break
 24358  		}
 24359  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24360  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24361  		v.reset(OpCopy)
 24362  		v.AddArg(v0)
 24363  		v0.AuxInt = i0
 24364  		v0.Aux = s
 24365  		v0.AddArg(p)
 24366  		v0.AddArg(mem)
 24367  		return true
 24368  	}
 24369  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 24370  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24371  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24372  	for {
 24373  		t := v.Type
 24374  		_ = v.Args[1]
 24375  		s6 := v.Args[0]
 24376  		if s6.Op != OpPPC64SLDconst {
 24377  			break
 24378  		}
 24379  		if s6.AuxInt != 56 {
 24380  			break
 24381  		}
 24382  		x7 := s6.Args[0]
 24383  		if x7.Op != OpPPC64MOVBZload {
 24384  			break
 24385  		}
 24386  		i7 := x7.AuxInt
 24387  		s := x7.Aux
 24388  		_ = x7.Args[1]
 24389  		p := x7.Args[0]
 24390  		mem := x7.Args[1]
 24391  		o5 := v.Args[1]
 24392  		if o5.Op != OpPPC64OR {
 24393  			break
 24394  		}
 24395  		if o5.Type != t {
 24396  			break
 24397  		}
 24398  		_ = o5.Args[1]
 24399  		o4 := o5.Args[0]
 24400  		if o4.Op != OpPPC64OR {
 24401  			break
 24402  		}
 24403  		if o4.Type != t {
 24404  			break
 24405  		}
 24406  		_ = o4.Args[1]
 24407  		o3 := o4.Args[0]
 24408  		if o3.Op != OpPPC64OR {
 24409  			break
 24410  		}
 24411  		if o3.Type != t {
 24412  			break
 24413  		}
 24414  		_ = o3.Args[1]
 24415  		o2 := o3.Args[0]
 24416  		if o2.Op != OpPPC64OR {
 24417  			break
 24418  		}
 24419  		if o2.Type != t {
 24420  			break
 24421  		}
 24422  		_ = o2.Args[1]
 24423  		o1 := o2.Args[0]
 24424  		if o1.Op != OpPPC64OR {
 24425  			break
 24426  		}
 24427  		if o1.Type != t {
 24428  			break
 24429  		}
 24430  		_ = o1.Args[1]
 24431  		o0 := o1.Args[0]
 24432  		if o0.Op != OpPPC64OR {
 24433  			break
 24434  		}
 24435  		if o0.Type != t {
 24436  			break
 24437  		}
 24438  		_ = o0.Args[1]
 24439  		x0 := o0.Args[0]
 24440  		if x0.Op != OpPPC64MOVBZload {
 24441  			break
 24442  		}
 24443  		i0 := x0.AuxInt
 24444  		if x0.Aux != s {
 24445  			break
 24446  		}
 24447  		_ = x0.Args[1]
 24448  		if p != x0.Args[0] {
 24449  			break
 24450  		}
 24451  		if mem != x0.Args[1] {
 24452  			break
 24453  		}
 24454  		s0 := o0.Args[1]
 24455  		if s0.Op != OpPPC64SLDconst {
 24456  			break
 24457  		}
 24458  		if s0.AuxInt != 8 {
 24459  			break
 24460  		}
 24461  		x1 := s0.Args[0]
 24462  		if x1.Op != OpPPC64MOVBZload {
 24463  			break
 24464  		}
 24465  		i1 := x1.AuxInt
 24466  		if x1.Aux != s {
 24467  			break
 24468  		}
 24469  		_ = x1.Args[1]
 24470  		if p != x1.Args[0] {
 24471  			break
 24472  		}
 24473  		if mem != x1.Args[1] {
 24474  			break
 24475  		}
 24476  		s1 := o1.Args[1]
 24477  		if s1.Op != OpPPC64SLDconst {
 24478  			break
 24479  		}
 24480  		if s1.AuxInt != 16 {
 24481  			break
 24482  		}
 24483  		x2 := s1.Args[0]
 24484  		if x2.Op != OpPPC64MOVBZload {
 24485  			break
 24486  		}
 24487  		i2 := x2.AuxInt
 24488  		if x2.Aux != s {
 24489  			break
 24490  		}
 24491  		_ = x2.Args[1]
 24492  		if p != x2.Args[0] {
 24493  			break
 24494  		}
 24495  		if mem != x2.Args[1] {
 24496  			break
 24497  		}
 24498  		s2 := o2.Args[1]
 24499  		if s2.Op != OpPPC64SLDconst {
 24500  			break
 24501  		}
 24502  		if s2.AuxInt != 24 {
 24503  			break
 24504  		}
 24505  		x3 := s2.Args[0]
 24506  		if x3.Op != OpPPC64MOVBZload {
 24507  			break
 24508  		}
 24509  		i3 := x3.AuxInt
 24510  		if x3.Aux != s {
 24511  			break
 24512  		}
 24513  		_ = x3.Args[1]
 24514  		if p != x3.Args[0] {
 24515  			break
 24516  		}
 24517  		if mem != x3.Args[1] {
 24518  			break
 24519  		}
 24520  		s3 := o3.Args[1]
 24521  		if s3.Op != OpPPC64SLDconst {
 24522  			break
 24523  		}
 24524  		if s3.AuxInt != 32 {
 24525  			break
 24526  		}
 24527  		x4 := s3.Args[0]
 24528  		if x4.Op != OpPPC64MOVBZload {
 24529  			break
 24530  		}
 24531  		i4 := x4.AuxInt
 24532  		if x4.Aux != s {
 24533  			break
 24534  		}
 24535  		_ = x4.Args[1]
 24536  		if p != x4.Args[0] {
 24537  			break
 24538  		}
 24539  		if mem != x4.Args[1] {
 24540  			break
 24541  		}
 24542  		s4 := o4.Args[1]
 24543  		if s4.Op != OpPPC64SLDconst {
 24544  			break
 24545  		}
 24546  		if s4.AuxInt != 40 {
 24547  			break
 24548  		}
 24549  		x5 := s4.Args[0]
 24550  		if x5.Op != OpPPC64MOVBZload {
 24551  			break
 24552  		}
 24553  		i5 := x5.AuxInt
 24554  		if x5.Aux != s {
 24555  			break
 24556  		}
 24557  		_ = x5.Args[1]
 24558  		if p != x5.Args[0] {
 24559  			break
 24560  		}
 24561  		if mem != x5.Args[1] {
 24562  			break
 24563  		}
 24564  		s5 := o5.Args[1]
 24565  		if s5.Op != OpPPC64SLDconst {
 24566  			break
 24567  		}
 24568  		if s5.AuxInt != 48 {
 24569  			break
 24570  		}
 24571  		x6 := s5.Args[0]
 24572  		if x6.Op != OpPPC64MOVBZload {
 24573  			break
 24574  		}
 24575  		i6 := x6.AuxInt
 24576  		if x6.Aux != s {
 24577  			break
 24578  		}
 24579  		_ = x6.Args[1]
 24580  		if p != x6.Args[0] {
 24581  			break
 24582  		}
 24583  		if mem != x6.Args[1] {
 24584  			break
 24585  		}
 24586  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24587  			break
 24588  		}
 24589  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24590  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24591  		v.reset(OpCopy)
 24592  		v.AddArg(v0)
 24593  		v0.AuxInt = i0
 24594  		v0.Aux = s
 24595  		v0.AddArg(p)
 24596  		v0.AddArg(mem)
 24597  		return true
 24598  	}
 24599  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 24600  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24601  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24602  	for {
 24603  		t := v.Type
 24604  		_ = v.Args[1]
 24605  		o5 := v.Args[0]
 24606  		if o5.Op != OpPPC64OR {
 24607  			break
 24608  		}
 24609  		if o5.Type != t {
 24610  			break
 24611  		}
 24612  		_ = o5.Args[1]
 24613  		s5 := o5.Args[0]
 24614  		if s5.Op != OpPPC64SLDconst {
 24615  			break
 24616  		}
 24617  		if s5.AuxInt != 48 {
 24618  			break
 24619  		}
 24620  		x6 := s5.Args[0]
 24621  		if x6.Op != OpPPC64MOVBZload {
 24622  			break
 24623  		}
 24624  		i6 := x6.AuxInt
 24625  		s := x6.Aux
 24626  		_ = x6.Args[1]
 24627  		p := x6.Args[0]
 24628  		mem := x6.Args[1]
 24629  		o4 := o5.Args[1]
 24630  		if o4.Op != OpPPC64OR {
 24631  			break
 24632  		}
 24633  		if o4.Type != t {
 24634  			break
 24635  		}
 24636  		_ = o4.Args[1]
 24637  		s4 := o4.Args[0]
 24638  		if s4.Op != OpPPC64SLDconst {
 24639  			break
 24640  		}
 24641  		if s4.AuxInt != 40 {
 24642  			break
 24643  		}
 24644  		x5 := s4.Args[0]
 24645  		if x5.Op != OpPPC64MOVBZload {
 24646  			break
 24647  		}
 24648  		i5 := x5.AuxInt
 24649  		if x5.Aux != s {
 24650  			break
 24651  		}
 24652  		_ = x5.Args[1]
 24653  		if p != x5.Args[0] {
 24654  			break
 24655  		}
 24656  		if mem != x5.Args[1] {
 24657  			break
 24658  		}
 24659  		o3 := o4.Args[1]
 24660  		if o3.Op != OpPPC64OR {
 24661  			break
 24662  		}
 24663  		if o3.Type != t {
 24664  			break
 24665  		}
 24666  		_ = o3.Args[1]
 24667  		s3 := o3.Args[0]
 24668  		if s3.Op != OpPPC64SLDconst {
 24669  			break
 24670  		}
 24671  		if s3.AuxInt != 32 {
 24672  			break
 24673  		}
 24674  		x4 := s3.Args[0]
 24675  		if x4.Op != OpPPC64MOVBZload {
 24676  			break
 24677  		}
 24678  		i4 := x4.AuxInt
 24679  		if x4.Aux != s {
 24680  			break
 24681  		}
 24682  		_ = x4.Args[1]
 24683  		if p != x4.Args[0] {
 24684  			break
 24685  		}
 24686  		if mem != x4.Args[1] {
 24687  			break
 24688  		}
 24689  		o2 := o3.Args[1]
 24690  		if o2.Op != OpPPC64OR {
 24691  			break
 24692  		}
 24693  		if o2.Type != t {
 24694  			break
 24695  		}
 24696  		_ = o2.Args[1]
 24697  		s2 := o2.Args[0]
 24698  		if s2.Op != OpPPC64SLDconst {
 24699  			break
 24700  		}
 24701  		if s2.AuxInt != 24 {
 24702  			break
 24703  		}
 24704  		x3 := s2.Args[0]
 24705  		if x3.Op != OpPPC64MOVBZload {
 24706  			break
 24707  		}
 24708  		i3 := x3.AuxInt
 24709  		if x3.Aux != s {
 24710  			break
 24711  		}
 24712  		_ = x3.Args[1]
 24713  		if p != x3.Args[0] {
 24714  			break
 24715  		}
 24716  		if mem != x3.Args[1] {
 24717  			break
 24718  		}
 24719  		o1 := o2.Args[1]
 24720  		if o1.Op != OpPPC64OR {
 24721  			break
 24722  		}
 24723  		if o1.Type != t {
 24724  			break
 24725  		}
 24726  		_ = o1.Args[1]
 24727  		s1 := o1.Args[0]
 24728  		if s1.Op != OpPPC64SLDconst {
 24729  			break
 24730  		}
 24731  		if s1.AuxInt != 16 {
 24732  			break
 24733  		}
 24734  		x2 := s1.Args[0]
 24735  		if x2.Op != OpPPC64MOVBZload {
 24736  			break
 24737  		}
 24738  		i2 := x2.AuxInt
 24739  		if x2.Aux != s {
 24740  			break
 24741  		}
 24742  		_ = x2.Args[1]
 24743  		if p != x2.Args[0] {
 24744  			break
 24745  		}
 24746  		if mem != x2.Args[1] {
 24747  			break
 24748  		}
 24749  		o0 := o1.Args[1]
 24750  		if o0.Op != OpPPC64OR {
 24751  			break
 24752  		}
 24753  		if o0.Type != t {
 24754  			break
 24755  		}
 24756  		_ = o0.Args[1]
 24757  		s0 := o0.Args[0]
 24758  		if s0.Op != OpPPC64SLDconst {
 24759  			break
 24760  		}
 24761  		if s0.AuxInt != 8 {
 24762  			break
 24763  		}
 24764  		x1 := s0.Args[0]
 24765  		if x1.Op != OpPPC64MOVBZload {
 24766  			break
 24767  		}
 24768  		i1 := x1.AuxInt
 24769  		if x1.Aux != s {
 24770  			break
 24771  		}
 24772  		_ = x1.Args[1]
 24773  		if p != x1.Args[0] {
 24774  			break
 24775  		}
 24776  		if mem != x1.Args[1] {
 24777  			break
 24778  		}
 24779  		x0 := o0.Args[1]
 24780  		if x0.Op != OpPPC64MOVBZload {
 24781  			break
 24782  		}
 24783  		i0 := x0.AuxInt
 24784  		if x0.Aux != s {
 24785  			break
 24786  		}
 24787  		_ = x0.Args[1]
 24788  		if p != x0.Args[0] {
 24789  			break
 24790  		}
 24791  		if mem != x0.Args[1] {
 24792  			break
 24793  		}
 24794  		s6 := v.Args[1]
 24795  		if s6.Op != OpPPC64SLDconst {
 24796  			break
 24797  		}
 24798  		if s6.AuxInt != 56 {
 24799  			break
 24800  		}
 24801  		x7 := s6.Args[0]
 24802  		if x7.Op != OpPPC64MOVBZload {
 24803  			break
 24804  		}
 24805  		i7 := x7.AuxInt
 24806  		if x7.Aux != s {
 24807  			break
 24808  		}
 24809  		_ = x7.Args[1]
 24810  		if p != x7.Args[0] {
 24811  			break
 24812  		}
 24813  		if mem != x7.Args[1] {
 24814  			break
 24815  		}
 24816  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24817  			break
 24818  		}
 24819  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24820  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24821  		v.reset(OpCopy)
 24822  		v.AddArg(v0)
 24823  		v0.AuxInt = i0
 24824  		v0.Aux = s
 24825  		v0.AddArg(p)
 24826  		v0.AddArg(mem)
 24827  		return true
 24828  	}
 24829  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 24830  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24831  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24832  	for {
 24833  		t := v.Type
 24834  		_ = v.Args[1]
 24835  		o5 := v.Args[0]
 24836  		if o5.Op != OpPPC64OR {
 24837  			break
 24838  		}
 24839  		if o5.Type != t {
 24840  			break
 24841  		}
 24842  		_ = o5.Args[1]
 24843  		s5 := o5.Args[0]
 24844  		if s5.Op != OpPPC64SLDconst {
 24845  			break
 24846  		}
 24847  		if s5.AuxInt != 48 {
 24848  			break
 24849  		}
 24850  		x6 := s5.Args[0]
 24851  		if x6.Op != OpPPC64MOVBZload {
 24852  			break
 24853  		}
 24854  		i6 := x6.AuxInt
 24855  		s := x6.Aux
 24856  		_ = x6.Args[1]
 24857  		p := x6.Args[0]
 24858  		mem := x6.Args[1]
 24859  		o4 := o5.Args[1]
 24860  		if o4.Op != OpPPC64OR {
 24861  			break
 24862  		}
 24863  		if o4.Type != t {
 24864  			break
 24865  		}
 24866  		_ = o4.Args[1]
 24867  		s4 := o4.Args[0]
 24868  		if s4.Op != OpPPC64SLDconst {
 24869  			break
 24870  		}
 24871  		if s4.AuxInt != 40 {
 24872  			break
 24873  		}
 24874  		x5 := s4.Args[0]
 24875  		if x5.Op != OpPPC64MOVBZload {
 24876  			break
 24877  		}
 24878  		i5 := x5.AuxInt
 24879  		if x5.Aux != s {
 24880  			break
 24881  		}
 24882  		_ = x5.Args[1]
 24883  		if p != x5.Args[0] {
 24884  			break
 24885  		}
 24886  		if mem != x5.Args[1] {
 24887  			break
 24888  		}
 24889  		o3 := o4.Args[1]
 24890  		if o3.Op != OpPPC64OR {
 24891  			break
 24892  		}
 24893  		if o3.Type != t {
 24894  			break
 24895  		}
 24896  		_ = o3.Args[1]
 24897  		s3 := o3.Args[0]
 24898  		if s3.Op != OpPPC64SLDconst {
 24899  			break
 24900  		}
 24901  		if s3.AuxInt != 32 {
 24902  			break
 24903  		}
 24904  		x4 := s3.Args[0]
 24905  		if x4.Op != OpPPC64MOVBZload {
 24906  			break
 24907  		}
 24908  		i4 := x4.AuxInt
 24909  		if x4.Aux != s {
 24910  			break
 24911  		}
 24912  		_ = x4.Args[1]
 24913  		if p != x4.Args[0] {
 24914  			break
 24915  		}
 24916  		if mem != x4.Args[1] {
 24917  			break
 24918  		}
 24919  		o2 := o3.Args[1]
 24920  		if o2.Op != OpPPC64OR {
 24921  			break
 24922  		}
 24923  		if o2.Type != t {
 24924  			break
 24925  		}
 24926  		_ = o2.Args[1]
 24927  		s2 := o2.Args[0]
 24928  		if s2.Op != OpPPC64SLDconst {
 24929  			break
 24930  		}
 24931  		if s2.AuxInt != 24 {
 24932  			break
 24933  		}
 24934  		x3 := s2.Args[0]
 24935  		if x3.Op != OpPPC64MOVBZload {
 24936  			break
 24937  		}
 24938  		i3 := x3.AuxInt
 24939  		if x3.Aux != s {
 24940  			break
 24941  		}
 24942  		_ = x3.Args[1]
 24943  		if p != x3.Args[0] {
 24944  			break
 24945  		}
 24946  		if mem != x3.Args[1] {
 24947  			break
 24948  		}
 24949  		o1 := o2.Args[1]
 24950  		if o1.Op != OpPPC64OR {
 24951  			break
 24952  		}
 24953  		if o1.Type != t {
 24954  			break
 24955  		}
 24956  		_ = o1.Args[1]
 24957  		s1 := o1.Args[0]
 24958  		if s1.Op != OpPPC64SLDconst {
 24959  			break
 24960  		}
 24961  		if s1.AuxInt != 16 {
 24962  			break
 24963  		}
 24964  		x2 := s1.Args[0]
 24965  		if x2.Op != OpPPC64MOVBZload {
 24966  			break
 24967  		}
 24968  		i2 := x2.AuxInt
 24969  		if x2.Aux != s {
 24970  			break
 24971  		}
 24972  		_ = x2.Args[1]
 24973  		if p != x2.Args[0] {
 24974  			break
 24975  		}
 24976  		if mem != x2.Args[1] {
 24977  			break
 24978  		}
 24979  		o0 := o1.Args[1]
 24980  		if o0.Op != OpPPC64OR {
 24981  			break
 24982  		}
 24983  		if o0.Type != t {
 24984  			break
 24985  		}
 24986  		_ = o0.Args[1]
 24987  		x0 := o0.Args[0]
 24988  		if x0.Op != OpPPC64MOVBZload {
 24989  			break
 24990  		}
 24991  		i0 := x0.AuxInt
 24992  		if x0.Aux != s {
 24993  			break
 24994  		}
 24995  		_ = x0.Args[1]
 24996  		if p != x0.Args[0] {
 24997  			break
 24998  		}
 24999  		if mem != x0.Args[1] {
 25000  			break
 25001  		}
 25002  		s0 := o0.Args[1]
 25003  		if s0.Op != OpPPC64SLDconst {
 25004  			break
 25005  		}
 25006  		if s0.AuxInt != 8 {
 25007  			break
 25008  		}
 25009  		x1 := s0.Args[0]
 25010  		if x1.Op != OpPPC64MOVBZload {
 25011  			break
 25012  		}
 25013  		i1 := x1.AuxInt
 25014  		if x1.Aux != s {
 25015  			break
 25016  		}
 25017  		_ = x1.Args[1]
 25018  		if p != x1.Args[0] {
 25019  			break
 25020  		}
 25021  		if mem != x1.Args[1] {
 25022  			break
 25023  		}
 25024  		s6 := v.Args[1]
 25025  		if s6.Op != OpPPC64SLDconst {
 25026  			break
 25027  		}
 25028  		if s6.AuxInt != 56 {
 25029  			break
 25030  		}
 25031  		x7 := s6.Args[0]
 25032  		if x7.Op != OpPPC64MOVBZload {
 25033  			break
 25034  		}
 25035  		i7 := x7.AuxInt
 25036  		if x7.Aux != s {
 25037  			break
 25038  		}
 25039  		_ = x7.Args[1]
 25040  		if p != x7.Args[0] {
 25041  			break
 25042  		}
 25043  		if mem != x7.Args[1] {
 25044  			break
 25045  		}
 25046  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25047  			break
 25048  		}
 25049  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25050  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25051  		v.reset(OpCopy)
 25052  		v.AddArg(v0)
 25053  		v0.AuxInt = i0
 25054  		v0.Aux = s
 25055  		v0.AddArg(p)
 25056  		v0.AddArg(mem)
 25057  		return true
 25058  	}
 25059  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25060  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25061  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25062  	for {
 25063  		t := v.Type
 25064  		_ = v.Args[1]
 25065  		o5 := v.Args[0]
 25066  		if o5.Op != OpPPC64OR {
 25067  			break
 25068  		}
 25069  		if o5.Type != t {
 25070  			break
 25071  		}
 25072  		_ = o5.Args[1]
 25073  		s5 := o5.Args[0]
 25074  		if s5.Op != OpPPC64SLDconst {
 25075  			break
 25076  		}
 25077  		if s5.AuxInt != 48 {
 25078  			break
 25079  		}
 25080  		x6 := s5.Args[0]
 25081  		if x6.Op != OpPPC64MOVBZload {
 25082  			break
 25083  		}
 25084  		i6 := x6.AuxInt
 25085  		s := x6.Aux
 25086  		_ = x6.Args[1]
 25087  		p := x6.Args[0]
 25088  		mem := x6.Args[1]
 25089  		o4 := o5.Args[1]
 25090  		if o4.Op != OpPPC64OR {
 25091  			break
 25092  		}
 25093  		if o4.Type != t {
 25094  			break
 25095  		}
 25096  		_ = o4.Args[1]
 25097  		s4 := o4.Args[0]
 25098  		if s4.Op != OpPPC64SLDconst {
 25099  			break
 25100  		}
 25101  		if s4.AuxInt != 40 {
 25102  			break
 25103  		}
 25104  		x5 := s4.Args[0]
 25105  		if x5.Op != OpPPC64MOVBZload {
 25106  			break
 25107  		}
 25108  		i5 := x5.AuxInt
 25109  		if x5.Aux != s {
 25110  			break
 25111  		}
 25112  		_ = x5.Args[1]
 25113  		if p != x5.Args[0] {
 25114  			break
 25115  		}
 25116  		if mem != x5.Args[1] {
 25117  			break
 25118  		}
 25119  		o3 := o4.Args[1]
 25120  		if o3.Op != OpPPC64OR {
 25121  			break
 25122  		}
 25123  		if o3.Type != t {
 25124  			break
 25125  		}
 25126  		_ = o3.Args[1]
 25127  		s3 := o3.Args[0]
 25128  		if s3.Op != OpPPC64SLDconst {
 25129  			break
 25130  		}
 25131  		if s3.AuxInt != 32 {
 25132  			break
 25133  		}
 25134  		x4 := s3.Args[0]
 25135  		if x4.Op != OpPPC64MOVBZload {
 25136  			break
 25137  		}
 25138  		i4 := x4.AuxInt
 25139  		if x4.Aux != s {
 25140  			break
 25141  		}
 25142  		_ = x4.Args[1]
 25143  		if p != x4.Args[0] {
 25144  			break
 25145  		}
 25146  		if mem != x4.Args[1] {
 25147  			break
 25148  		}
 25149  		o2 := o3.Args[1]
 25150  		if o2.Op != OpPPC64OR {
 25151  			break
 25152  		}
 25153  		if o2.Type != t {
 25154  			break
 25155  		}
 25156  		_ = o2.Args[1]
 25157  		s2 := o2.Args[0]
 25158  		if s2.Op != OpPPC64SLDconst {
 25159  			break
 25160  		}
 25161  		if s2.AuxInt != 24 {
 25162  			break
 25163  		}
 25164  		x3 := s2.Args[0]
 25165  		if x3.Op != OpPPC64MOVBZload {
 25166  			break
 25167  		}
 25168  		i3 := x3.AuxInt
 25169  		if x3.Aux != s {
 25170  			break
 25171  		}
 25172  		_ = x3.Args[1]
 25173  		if p != x3.Args[0] {
 25174  			break
 25175  		}
 25176  		if mem != x3.Args[1] {
 25177  			break
 25178  		}
 25179  		o1 := o2.Args[1]
 25180  		if o1.Op != OpPPC64OR {
 25181  			break
 25182  		}
 25183  		if o1.Type != t {
 25184  			break
 25185  		}
 25186  		_ = o1.Args[1]
 25187  		o0 := o1.Args[0]
 25188  		if o0.Op != OpPPC64OR {
 25189  			break
 25190  		}
 25191  		if o0.Type != t {
 25192  			break
 25193  		}
 25194  		_ = o0.Args[1]
 25195  		s0 := o0.Args[0]
 25196  		if s0.Op != OpPPC64SLDconst {
 25197  			break
 25198  		}
 25199  		if s0.AuxInt != 8 {
 25200  			break
 25201  		}
 25202  		x1 := s0.Args[0]
 25203  		if x1.Op != OpPPC64MOVBZload {
 25204  			break
 25205  		}
 25206  		i1 := x1.AuxInt
 25207  		if x1.Aux != s {
 25208  			break
 25209  		}
 25210  		_ = x1.Args[1]
 25211  		if p != x1.Args[0] {
 25212  			break
 25213  		}
 25214  		if mem != x1.Args[1] {
 25215  			break
 25216  		}
 25217  		x0 := o0.Args[1]
 25218  		if x0.Op != OpPPC64MOVBZload {
 25219  			break
 25220  		}
 25221  		i0 := x0.AuxInt
 25222  		if x0.Aux != s {
 25223  			break
 25224  		}
 25225  		_ = x0.Args[1]
 25226  		if p != x0.Args[0] {
 25227  			break
 25228  		}
 25229  		if mem != x0.Args[1] {
 25230  			break
 25231  		}
 25232  		s1 := o1.Args[1]
 25233  		if s1.Op != OpPPC64SLDconst {
 25234  			break
 25235  		}
 25236  		if s1.AuxInt != 16 {
 25237  			break
 25238  		}
 25239  		x2 := s1.Args[0]
 25240  		if x2.Op != OpPPC64MOVBZload {
 25241  			break
 25242  		}
 25243  		i2 := x2.AuxInt
 25244  		if x2.Aux != s {
 25245  			break
 25246  		}
 25247  		_ = x2.Args[1]
 25248  		if p != x2.Args[0] {
 25249  			break
 25250  		}
 25251  		if mem != x2.Args[1] {
 25252  			break
 25253  		}
 25254  		s6 := v.Args[1]
 25255  		if s6.Op != OpPPC64SLDconst {
 25256  			break
 25257  		}
 25258  		if s6.AuxInt != 56 {
 25259  			break
 25260  		}
 25261  		x7 := s6.Args[0]
 25262  		if x7.Op != OpPPC64MOVBZload {
 25263  			break
 25264  		}
 25265  		i7 := x7.AuxInt
 25266  		if x7.Aux != s {
 25267  			break
 25268  		}
 25269  		_ = x7.Args[1]
 25270  		if p != x7.Args[0] {
 25271  			break
 25272  		}
 25273  		if mem != x7.Args[1] {
 25274  			break
 25275  		}
 25276  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25277  			break
 25278  		}
 25279  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25280  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25281  		v.reset(OpCopy)
 25282  		v.AddArg(v0)
 25283  		v0.AuxInt = i0
 25284  		v0.Aux = s
 25285  		v0.AddArg(p)
 25286  		v0.AddArg(mem)
 25287  		return true
 25288  	}
 25289  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25290  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25291  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25292  	for {
 25293  		t := v.Type
 25294  		_ = v.Args[1]
 25295  		o5 := v.Args[0]
 25296  		if o5.Op != OpPPC64OR {
 25297  			break
 25298  		}
 25299  		if o5.Type != t {
 25300  			break
 25301  		}
 25302  		_ = o5.Args[1]
 25303  		s5 := o5.Args[0]
 25304  		if s5.Op != OpPPC64SLDconst {
 25305  			break
 25306  		}
 25307  		if s5.AuxInt != 48 {
 25308  			break
 25309  		}
 25310  		x6 := s5.Args[0]
 25311  		if x6.Op != OpPPC64MOVBZload {
 25312  			break
 25313  		}
 25314  		i6 := x6.AuxInt
 25315  		s := x6.Aux
 25316  		_ = x6.Args[1]
 25317  		p := x6.Args[0]
 25318  		mem := x6.Args[1]
 25319  		o4 := o5.Args[1]
 25320  		if o4.Op != OpPPC64OR {
 25321  			break
 25322  		}
 25323  		if o4.Type != t {
 25324  			break
 25325  		}
 25326  		_ = o4.Args[1]
 25327  		s4 := o4.Args[0]
 25328  		if s4.Op != OpPPC64SLDconst {
 25329  			break
 25330  		}
 25331  		if s4.AuxInt != 40 {
 25332  			break
 25333  		}
 25334  		x5 := s4.Args[0]
 25335  		if x5.Op != OpPPC64MOVBZload {
 25336  			break
 25337  		}
 25338  		i5 := x5.AuxInt
 25339  		if x5.Aux != s {
 25340  			break
 25341  		}
 25342  		_ = x5.Args[1]
 25343  		if p != x5.Args[0] {
 25344  			break
 25345  		}
 25346  		if mem != x5.Args[1] {
 25347  			break
 25348  		}
 25349  		o3 := o4.Args[1]
 25350  		if o3.Op != OpPPC64OR {
 25351  			break
 25352  		}
 25353  		if o3.Type != t {
 25354  			break
 25355  		}
 25356  		_ = o3.Args[1]
 25357  		s3 := o3.Args[0]
 25358  		if s3.Op != OpPPC64SLDconst {
 25359  			break
 25360  		}
 25361  		if s3.AuxInt != 32 {
 25362  			break
 25363  		}
 25364  		x4 := s3.Args[0]
 25365  		if x4.Op != OpPPC64MOVBZload {
 25366  			break
 25367  		}
 25368  		i4 := x4.AuxInt
 25369  		if x4.Aux != s {
 25370  			break
 25371  		}
 25372  		_ = x4.Args[1]
 25373  		if p != x4.Args[0] {
 25374  			break
 25375  		}
 25376  		if mem != x4.Args[1] {
 25377  			break
 25378  		}
 25379  		o2 := o3.Args[1]
 25380  		if o2.Op != OpPPC64OR {
 25381  			break
 25382  		}
 25383  		if o2.Type != t {
 25384  			break
 25385  		}
 25386  		_ = o2.Args[1]
 25387  		s2 := o2.Args[0]
 25388  		if s2.Op != OpPPC64SLDconst {
 25389  			break
 25390  		}
 25391  		if s2.AuxInt != 24 {
 25392  			break
 25393  		}
 25394  		x3 := s2.Args[0]
 25395  		if x3.Op != OpPPC64MOVBZload {
 25396  			break
 25397  		}
 25398  		i3 := x3.AuxInt
 25399  		if x3.Aux != s {
 25400  			break
 25401  		}
 25402  		_ = x3.Args[1]
 25403  		if p != x3.Args[0] {
 25404  			break
 25405  		}
 25406  		if mem != x3.Args[1] {
 25407  			break
 25408  		}
 25409  		o1 := o2.Args[1]
 25410  		if o1.Op != OpPPC64OR {
 25411  			break
 25412  		}
 25413  		if o1.Type != t {
 25414  			break
 25415  		}
 25416  		_ = o1.Args[1]
 25417  		o0 := o1.Args[0]
 25418  		if o0.Op != OpPPC64OR {
 25419  			break
 25420  		}
 25421  		if o0.Type != t {
 25422  			break
 25423  		}
 25424  		_ = o0.Args[1]
 25425  		x0 := o0.Args[0]
 25426  		if x0.Op != OpPPC64MOVBZload {
 25427  			break
 25428  		}
 25429  		i0 := x0.AuxInt
 25430  		if x0.Aux != s {
 25431  			break
 25432  		}
 25433  		_ = x0.Args[1]
 25434  		if p != x0.Args[0] {
 25435  			break
 25436  		}
 25437  		if mem != x0.Args[1] {
 25438  			break
 25439  		}
 25440  		s0 := o0.Args[1]
 25441  		if s0.Op != OpPPC64SLDconst {
 25442  			break
 25443  		}
 25444  		if s0.AuxInt != 8 {
 25445  			break
 25446  		}
 25447  		x1 := s0.Args[0]
 25448  		if x1.Op != OpPPC64MOVBZload {
 25449  			break
 25450  		}
 25451  		i1 := x1.AuxInt
 25452  		if x1.Aux != s {
 25453  			break
 25454  		}
 25455  		_ = x1.Args[1]
 25456  		if p != x1.Args[0] {
 25457  			break
 25458  		}
 25459  		if mem != x1.Args[1] {
 25460  			break
 25461  		}
 25462  		s1 := o1.Args[1]
 25463  		if s1.Op != OpPPC64SLDconst {
 25464  			break
 25465  		}
 25466  		if s1.AuxInt != 16 {
 25467  			break
 25468  		}
 25469  		x2 := s1.Args[0]
 25470  		if x2.Op != OpPPC64MOVBZload {
 25471  			break
 25472  		}
 25473  		i2 := x2.AuxInt
 25474  		if x2.Aux != s {
 25475  			break
 25476  		}
 25477  		_ = x2.Args[1]
 25478  		if p != x2.Args[0] {
 25479  			break
 25480  		}
 25481  		if mem != x2.Args[1] {
 25482  			break
 25483  		}
 25484  		s6 := v.Args[1]
 25485  		if s6.Op != OpPPC64SLDconst {
 25486  			break
 25487  		}
 25488  		if s6.AuxInt != 56 {
 25489  			break
 25490  		}
 25491  		x7 := s6.Args[0]
 25492  		if x7.Op != OpPPC64MOVBZload {
 25493  			break
 25494  		}
 25495  		i7 := x7.AuxInt
 25496  		if x7.Aux != s {
 25497  			break
 25498  		}
 25499  		_ = x7.Args[1]
 25500  		if p != x7.Args[0] {
 25501  			break
 25502  		}
 25503  		if mem != x7.Args[1] {
 25504  			break
 25505  		}
 25506  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25507  			break
 25508  		}
 25509  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25510  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25511  		v.reset(OpCopy)
 25512  		v.AddArg(v0)
 25513  		v0.AuxInt = i0
 25514  		v0.Aux = s
 25515  		v0.AddArg(p)
 25516  		v0.AddArg(mem)
 25517  		return true
 25518  	}
 25519  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25520  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25521  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25522  	for {
 25523  		t := v.Type
 25524  		_ = v.Args[1]
 25525  		o5 := v.Args[0]
 25526  		if o5.Op != OpPPC64OR {
 25527  			break
 25528  		}
 25529  		if o5.Type != t {
 25530  			break
 25531  		}
 25532  		_ = o5.Args[1]
 25533  		s5 := o5.Args[0]
 25534  		if s5.Op != OpPPC64SLDconst {
 25535  			break
 25536  		}
 25537  		if s5.AuxInt != 48 {
 25538  			break
 25539  		}
 25540  		x6 := s5.Args[0]
 25541  		if x6.Op != OpPPC64MOVBZload {
 25542  			break
 25543  		}
 25544  		i6 := x6.AuxInt
 25545  		s := x6.Aux
 25546  		_ = x6.Args[1]
 25547  		p := x6.Args[0]
 25548  		mem := x6.Args[1]
 25549  		o4 := o5.Args[1]
 25550  		if o4.Op != OpPPC64OR {
 25551  			break
 25552  		}
 25553  		if o4.Type != t {
 25554  			break
 25555  		}
 25556  		_ = o4.Args[1]
 25557  		s4 := o4.Args[0]
 25558  		if s4.Op != OpPPC64SLDconst {
 25559  			break
 25560  		}
 25561  		if s4.AuxInt != 40 {
 25562  			break
 25563  		}
 25564  		x5 := s4.Args[0]
 25565  		if x5.Op != OpPPC64MOVBZload {
 25566  			break
 25567  		}
 25568  		i5 := x5.AuxInt
 25569  		if x5.Aux != s {
 25570  			break
 25571  		}
 25572  		_ = x5.Args[1]
 25573  		if p != x5.Args[0] {
 25574  			break
 25575  		}
 25576  		if mem != x5.Args[1] {
 25577  			break
 25578  		}
 25579  		o3 := o4.Args[1]
 25580  		if o3.Op != OpPPC64OR {
 25581  			break
 25582  		}
 25583  		if o3.Type != t {
 25584  			break
 25585  		}
 25586  		_ = o3.Args[1]
 25587  		s3 := o3.Args[0]
 25588  		if s3.Op != OpPPC64SLDconst {
 25589  			break
 25590  		}
 25591  		if s3.AuxInt != 32 {
 25592  			break
 25593  		}
 25594  		x4 := s3.Args[0]
 25595  		if x4.Op != OpPPC64MOVBZload {
 25596  			break
 25597  		}
 25598  		i4 := x4.AuxInt
 25599  		if x4.Aux != s {
 25600  			break
 25601  		}
 25602  		_ = x4.Args[1]
 25603  		if p != x4.Args[0] {
 25604  			break
 25605  		}
 25606  		if mem != x4.Args[1] {
 25607  			break
 25608  		}
 25609  		o2 := o3.Args[1]
 25610  		if o2.Op != OpPPC64OR {
 25611  			break
 25612  		}
 25613  		if o2.Type != t {
 25614  			break
 25615  		}
 25616  		_ = o2.Args[1]
 25617  		o1 := o2.Args[0]
 25618  		if o1.Op != OpPPC64OR {
 25619  			break
 25620  		}
 25621  		if o1.Type != t {
 25622  			break
 25623  		}
 25624  		_ = o1.Args[1]
 25625  		s1 := o1.Args[0]
 25626  		if s1.Op != OpPPC64SLDconst {
 25627  			break
 25628  		}
 25629  		if s1.AuxInt != 16 {
 25630  			break
 25631  		}
 25632  		x2 := s1.Args[0]
 25633  		if x2.Op != OpPPC64MOVBZload {
 25634  			break
 25635  		}
 25636  		i2 := x2.AuxInt
 25637  		if x2.Aux != s {
 25638  			break
 25639  		}
 25640  		_ = x2.Args[1]
 25641  		if p != x2.Args[0] {
 25642  			break
 25643  		}
 25644  		if mem != x2.Args[1] {
 25645  			break
 25646  		}
 25647  		o0 := o1.Args[1]
 25648  		if o0.Op != OpPPC64OR {
 25649  			break
 25650  		}
 25651  		if o0.Type != t {
 25652  			break
 25653  		}
 25654  		_ = o0.Args[1]
 25655  		s0 := o0.Args[0]
 25656  		if s0.Op != OpPPC64SLDconst {
 25657  			break
 25658  		}
 25659  		if s0.AuxInt != 8 {
 25660  			break
 25661  		}
 25662  		x1 := s0.Args[0]
 25663  		if x1.Op != OpPPC64MOVBZload {
 25664  			break
 25665  		}
 25666  		i1 := x1.AuxInt
 25667  		if x1.Aux != s {
 25668  			break
 25669  		}
 25670  		_ = x1.Args[1]
 25671  		if p != x1.Args[0] {
 25672  			break
 25673  		}
 25674  		if mem != x1.Args[1] {
 25675  			break
 25676  		}
 25677  		x0 := o0.Args[1]
 25678  		if x0.Op != OpPPC64MOVBZload {
 25679  			break
 25680  		}
 25681  		i0 := x0.AuxInt
 25682  		if x0.Aux != s {
 25683  			break
 25684  		}
 25685  		_ = x0.Args[1]
 25686  		if p != x0.Args[0] {
 25687  			break
 25688  		}
 25689  		if mem != x0.Args[1] {
 25690  			break
 25691  		}
 25692  		s2 := o2.Args[1]
 25693  		if s2.Op != OpPPC64SLDconst {
 25694  			break
 25695  		}
 25696  		if s2.AuxInt != 24 {
 25697  			break
 25698  		}
 25699  		x3 := s2.Args[0]
 25700  		if x3.Op != OpPPC64MOVBZload {
 25701  			break
 25702  		}
 25703  		i3 := x3.AuxInt
 25704  		if x3.Aux != s {
 25705  			break
 25706  		}
 25707  		_ = x3.Args[1]
 25708  		if p != x3.Args[0] {
 25709  			break
 25710  		}
 25711  		if mem != x3.Args[1] {
 25712  			break
 25713  		}
 25714  		s6 := v.Args[1]
 25715  		if s6.Op != OpPPC64SLDconst {
 25716  			break
 25717  		}
 25718  		if s6.AuxInt != 56 {
 25719  			break
 25720  		}
 25721  		x7 := s6.Args[0]
 25722  		if x7.Op != OpPPC64MOVBZload {
 25723  			break
 25724  		}
 25725  		i7 := x7.AuxInt
 25726  		if x7.Aux != s {
 25727  			break
 25728  		}
 25729  		_ = x7.Args[1]
 25730  		if p != x7.Args[0] {
 25731  			break
 25732  		}
 25733  		if mem != x7.Args[1] {
 25734  			break
 25735  		}
 25736  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25737  			break
 25738  		}
 25739  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25740  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25741  		v.reset(OpCopy)
 25742  		v.AddArg(v0)
 25743  		v0.AuxInt = i0
 25744  		v0.Aux = s
 25745  		v0.AddArg(p)
 25746  		v0.AddArg(mem)
 25747  		return true
 25748  	}
 25749  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25750  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25751  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25752  	for {
 25753  		t := v.Type
 25754  		_ = v.Args[1]
 25755  		o5 := v.Args[0]
 25756  		if o5.Op != OpPPC64OR {
 25757  			break
 25758  		}
 25759  		if o5.Type != t {
 25760  			break
 25761  		}
 25762  		_ = o5.Args[1]
 25763  		s5 := o5.Args[0]
 25764  		if s5.Op != OpPPC64SLDconst {
 25765  			break
 25766  		}
 25767  		if s5.AuxInt != 48 {
 25768  			break
 25769  		}
 25770  		x6 := s5.Args[0]
 25771  		if x6.Op != OpPPC64MOVBZload {
 25772  			break
 25773  		}
 25774  		i6 := x6.AuxInt
 25775  		s := x6.Aux
 25776  		_ = x6.Args[1]
 25777  		p := x6.Args[0]
 25778  		mem := x6.Args[1]
 25779  		o4 := o5.Args[1]
 25780  		if o4.Op != OpPPC64OR {
 25781  			break
 25782  		}
 25783  		if o4.Type != t {
 25784  			break
 25785  		}
 25786  		_ = o4.Args[1]
 25787  		s4 := o4.Args[0]
 25788  		if s4.Op != OpPPC64SLDconst {
 25789  			break
 25790  		}
 25791  		if s4.AuxInt != 40 {
 25792  			break
 25793  		}
 25794  		x5 := s4.Args[0]
 25795  		if x5.Op != OpPPC64MOVBZload {
 25796  			break
 25797  		}
 25798  		i5 := x5.AuxInt
 25799  		if x5.Aux != s {
 25800  			break
 25801  		}
 25802  		_ = x5.Args[1]
 25803  		if p != x5.Args[0] {
 25804  			break
 25805  		}
 25806  		if mem != x5.Args[1] {
 25807  			break
 25808  		}
 25809  		o3 := o4.Args[1]
 25810  		if o3.Op != OpPPC64OR {
 25811  			break
 25812  		}
 25813  		if o3.Type != t {
 25814  			break
 25815  		}
 25816  		_ = o3.Args[1]
 25817  		s3 := o3.Args[0]
 25818  		if s3.Op != OpPPC64SLDconst {
 25819  			break
 25820  		}
 25821  		if s3.AuxInt != 32 {
 25822  			break
 25823  		}
 25824  		x4 := s3.Args[0]
 25825  		if x4.Op != OpPPC64MOVBZload {
 25826  			break
 25827  		}
 25828  		i4 := x4.AuxInt
 25829  		if x4.Aux != s {
 25830  			break
 25831  		}
 25832  		_ = x4.Args[1]
 25833  		if p != x4.Args[0] {
 25834  			break
 25835  		}
 25836  		if mem != x4.Args[1] {
 25837  			break
 25838  		}
 25839  		o2 := o3.Args[1]
 25840  		if o2.Op != OpPPC64OR {
 25841  			break
 25842  		}
 25843  		if o2.Type != t {
 25844  			break
 25845  		}
 25846  		_ = o2.Args[1]
 25847  		o1 := o2.Args[0]
 25848  		if o1.Op != OpPPC64OR {
 25849  			break
 25850  		}
 25851  		if o1.Type != t {
 25852  			break
 25853  		}
 25854  		_ = o1.Args[1]
 25855  		s1 := o1.Args[0]
 25856  		if s1.Op != OpPPC64SLDconst {
 25857  			break
 25858  		}
 25859  		if s1.AuxInt != 16 {
 25860  			break
 25861  		}
 25862  		x2 := s1.Args[0]
 25863  		if x2.Op != OpPPC64MOVBZload {
 25864  			break
 25865  		}
 25866  		i2 := x2.AuxInt
 25867  		if x2.Aux != s {
 25868  			break
 25869  		}
 25870  		_ = x2.Args[1]
 25871  		if p != x2.Args[0] {
 25872  			break
 25873  		}
 25874  		if mem != x2.Args[1] {
 25875  			break
 25876  		}
 25877  		o0 := o1.Args[1]
 25878  		if o0.Op != OpPPC64OR {
 25879  			break
 25880  		}
 25881  		if o0.Type != t {
 25882  			break
 25883  		}
 25884  		_ = o0.Args[1]
 25885  		x0 := o0.Args[0]
 25886  		if x0.Op != OpPPC64MOVBZload {
 25887  			break
 25888  		}
 25889  		i0 := x0.AuxInt
 25890  		if x0.Aux != s {
 25891  			break
 25892  		}
 25893  		_ = x0.Args[1]
 25894  		if p != x0.Args[0] {
 25895  			break
 25896  		}
 25897  		if mem != x0.Args[1] {
 25898  			break
 25899  		}
 25900  		s0 := o0.Args[1]
 25901  		if s0.Op != OpPPC64SLDconst {
 25902  			break
 25903  		}
 25904  		if s0.AuxInt != 8 {
 25905  			break
 25906  		}
 25907  		x1 := s0.Args[0]
 25908  		if x1.Op != OpPPC64MOVBZload {
 25909  			break
 25910  		}
 25911  		i1 := x1.AuxInt
 25912  		if x1.Aux != s {
 25913  			break
 25914  		}
 25915  		_ = x1.Args[1]
 25916  		if p != x1.Args[0] {
 25917  			break
 25918  		}
 25919  		if mem != x1.Args[1] {
 25920  			break
 25921  		}
 25922  		s2 := o2.Args[1]
 25923  		if s2.Op != OpPPC64SLDconst {
 25924  			break
 25925  		}
 25926  		if s2.AuxInt != 24 {
 25927  			break
 25928  		}
 25929  		x3 := s2.Args[0]
 25930  		if x3.Op != OpPPC64MOVBZload {
 25931  			break
 25932  		}
 25933  		i3 := x3.AuxInt
 25934  		if x3.Aux != s {
 25935  			break
 25936  		}
 25937  		_ = x3.Args[1]
 25938  		if p != x3.Args[0] {
 25939  			break
 25940  		}
 25941  		if mem != x3.Args[1] {
 25942  			break
 25943  		}
 25944  		s6 := v.Args[1]
 25945  		if s6.Op != OpPPC64SLDconst {
 25946  			break
 25947  		}
 25948  		if s6.AuxInt != 56 {
 25949  			break
 25950  		}
 25951  		x7 := s6.Args[0]
 25952  		if x7.Op != OpPPC64MOVBZload {
 25953  			break
 25954  		}
 25955  		i7 := x7.AuxInt
 25956  		if x7.Aux != s {
 25957  			break
 25958  		}
 25959  		_ = x7.Args[1]
 25960  		if p != x7.Args[0] {
 25961  			break
 25962  		}
 25963  		if mem != x7.Args[1] {
 25964  			break
 25965  		}
 25966  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25967  			break
 25968  		}
 25969  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25970  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25971  		v.reset(OpCopy)
 25972  		v.AddArg(v0)
 25973  		v0.AuxInt = i0
 25974  		v0.Aux = s
 25975  		v0.AddArg(p)
 25976  		v0.AddArg(mem)
 25977  		return true
 25978  	}
 25979  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25980  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25981  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25982  	for {
 25983  		t := v.Type
 25984  		_ = v.Args[1]
 25985  		o5 := v.Args[0]
 25986  		if o5.Op != OpPPC64OR {
 25987  			break
 25988  		}
 25989  		if o5.Type != t {
 25990  			break
 25991  		}
 25992  		_ = o5.Args[1]
 25993  		s5 := o5.Args[0]
 25994  		if s5.Op != OpPPC64SLDconst {
 25995  			break
 25996  		}
 25997  		if s5.AuxInt != 48 {
 25998  			break
 25999  		}
 26000  		x6 := s5.Args[0]
 26001  		if x6.Op != OpPPC64MOVBZload {
 26002  			break
 26003  		}
 26004  		i6 := x6.AuxInt
 26005  		s := x6.Aux
 26006  		_ = x6.Args[1]
 26007  		p := x6.Args[0]
 26008  		mem := x6.Args[1]
 26009  		o4 := o5.Args[1]
 26010  		if o4.Op != OpPPC64OR {
 26011  			break
 26012  		}
 26013  		if o4.Type != t {
 26014  			break
 26015  		}
 26016  		_ = o4.Args[1]
 26017  		s4 := o4.Args[0]
 26018  		if s4.Op != OpPPC64SLDconst {
 26019  			break
 26020  		}
 26021  		if s4.AuxInt != 40 {
 26022  			break
 26023  		}
 26024  		x5 := s4.Args[0]
 26025  		if x5.Op != OpPPC64MOVBZload {
 26026  			break
 26027  		}
 26028  		i5 := x5.AuxInt
 26029  		if x5.Aux != s {
 26030  			break
 26031  		}
 26032  		_ = x5.Args[1]
 26033  		if p != x5.Args[0] {
 26034  			break
 26035  		}
 26036  		if mem != x5.Args[1] {
 26037  			break
 26038  		}
 26039  		o3 := o4.Args[1]
 26040  		if o3.Op != OpPPC64OR {
 26041  			break
 26042  		}
 26043  		if o3.Type != t {
 26044  			break
 26045  		}
 26046  		_ = o3.Args[1]
 26047  		s3 := o3.Args[0]
 26048  		if s3.Op != OpPPC64SLDconst {
 26049  			break
 26050  		}
 26051  		if s3.AuxInt != 32 {
 26052  			break
 26053  		}
 26054  		x4 := s3.Args[0]
 26055  		if x4.Op != OpPPC64MOVBZload {
 26056  			break
 26057  		}
 26058  		i4 := x4.AuxInt
 26059  		if x4.Aux != s {
 26060  			break
 26061  		}
 26062  		_ = x4.Args[1]
 26063  		if p != x4.Args[0] {
 26064  			break
 26065  		}
 26066  		if mem != x4.Args[1] {
 26067  			break
 26068  		}
 26069  		o2 := o3.Args[1]
 26070  		if o2.Op != OpPPC64OR {
 26071  			break
 26072  		}
 26073  		if o2.Type != t {
 26074  			break
 26075  		}
 26076  		_ = o2.Args[1]
 26077  		o1 := o2.Args[0]
 26078  		if o1.Op != OpPPC64OR {
 26079  			break
 26080  		}
 26081  		if o1.Type != t {
 26082  			break
 26083  		}
 26084  		_ = o1.Args[1]
 26085  		o0 := o1.Args[0]
 26086  		if o0.Op != OpPPC64OR {
 26087  			break
 26088  		}
 26089  		if o0.Type != t {
 26090  			break
 26091  		}
 26092  		_ = o0.Args[1]
 26093  		s0 := o0.Args[0]
 26094  		if s0.Op != OpPPC64SLDconst {
 26095  			break
 26096  		}
 26097  		if s0.AuxInt != 8 {
 26098  			break
 26099  		}
 26100  		x1 := s0.Args[0]
 26101  		if x1.Op != OpPPC64MOVBZload {
 26102  			break
 26103  		}
 26104  		i1 := x1.AuxInt
 26105  		if x1.Aux != s {
 26106  			break
 26107  		}
 26108  		_ = x1.Args[1]
 26109  		if p != x1.Args[0] {
 26110  			break
 26111  		}
 26112  		if mem != x1.Args[1] {
 26113  			break
 26114  		}
 26115  		x0 := o0.Args[1]
 26116  		if x0.Op != OpPPC64MOVBZload {
 26117  			break
 26118  		}
 26119  		i0 := x0.AuxInt
 26120  		if x0.Aux != s {
 26121  			break
 26122  		}
 26123  		_ = x0.Args[1]
 26124  		if p != x0.Args[0] {
 26125  			break
 26126  		}
 26127  		if mem != x0.Args[1] {
 26128  			break
 26129  		}
 26130  		s1 := o1.Args[1]
 26131  		if s1.Op != OpPPC64SLDconst {
 26132  			break
 26133  		}
 26134  		if s1.AuxInt != 16 {
 26135  			break
 26136  		}
 26137  		x2 := s1.Args[0]
 26138  		if x2.Op != OpPPC64MOVBZload {
 26139  			break
 26140  		}
 26141  		i2 := x2.AuxInt
 26142  		if x2.Aux != s {
 26143  			break
 26144  		}
 26145  		_ = x2.Args[1]
 26146  		if p != x2.Args[0] {
 26147  			break
 26148  		}
 26149  		if mem != x2.Args[1] {
 26150  			break
 26151  		}
 26152  		s2 := o2.Args[1]
 26153  		if s2.Op != OpPPC64SLDconst {
 26154  			break
 26155  		}
 26156  		if s2.AuxInt != 24 {
 26157  			break
 26158  		}
 26159  		x3 := s2.Args[0]
 26160  		if x3.Op != OpPPC64MOVBZload {
 26161  			break
 26162  		}
 26163  		i3 := x3.AuxInt
 26164  		if x3.Aux != s {
 26165  			break
 26166  		}
 26167  		_ = x3.Args[1]
 26168  		if p != x3.Args[0] {
 26169  			break
 26170  		}
 26171  		if mem != x3.Args[1] {
 26172  			break
 26173  		}
 26174  		s6 := v.Args[1]
 26175  		if s6.Op != OpPPC64SLDconst {
 26176  			break
 26177  		}
 26178  		if s6.AuxInt != 56 {
 26179  			break
 26180  		}
 26181  		x7 := s6.Args[0]
 26182  		if x7.Op != OpPPC64MOVBZload {
 26183  			break
 26184  		}
 26185  		i7 := x7.AuxInt
 26186  		if x7.Aux != s {
 26187  			break
 26188  		}
 26189  		_ = x7.Args[1]
 26190  		if p != x7.Args[0] {
 26191  			break
 26192  		}
 26193  		if mem != x7.Args[1] {
 26194  			break
 26195  		}
 26196  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26197  			break
 26198  		}
 26199  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26200  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26201  		v.reset(OpCopy)
 26202  		v.AddArg(v0)
 26203  		v0.AuxInt = i0
 26204  		v0.Aux = s
 26205  		v0.AddArg(p)
 26206  		v0.AddArg(mem)
 26207  		return true
 26208  	}
 26209  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26210  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26211  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26212  	for {
 26213  		t := v.Type
 26214  		_ = v.Args[1]
 26215  		o5 := v.Args[0]
 26216  		if o5.Op != OpPPC64OR {
 26217  			break
 26218  		}
 26219  		if o5.Type != t {
 26220  			break
 26221  		}
 26222  		_ = o5.Args[1]
 26223  		s5 := o5.Args[0]
 26224  		if s5.Op != OpPPC64SLDconst {
 26225  			break
 26226  		}
 26227  		if s5.AuxInt != 48 {
 26228  			break
 26229  		}
 26230  		x6 := s5.Args[0]
 26231  		if x6.Op != OpPPC64MOVBZload {
 26232  			break
 26233  		}
 26234  		i6 := x6.AuxInt
 26235  		s := x6.Aux
 26236  		_ = x6.Args[1]
 26237  		p := x6.Args[0]
 26238  		mem := x6.Args[1]
 26239  		o4 := o5.Args[1]
 26240  		if o4.Op != OpPPC64OR {
 26241  			break
 26242  		}
 26243  		if o4.Type != t {
 26244  			break
 26245  		}
 26246  		_ = o4.Args[1]
 26247  		s4 := o4.Args[0]
 26248  		if s4.Op != OpPPC64SLDconst {
 26249  			break
 26250  		}
 26251  		if s4.AuxInt != 40 {
 26252  			break
 26253  		}
 26254  		x5 := s4.Args[0]
 26255  		if x5.Op != OpPPC64MOVBZload {
 26256  			break
 26257  		}
 26258  		i5 := x5.AuxInt
 26259  		if x5.Aux != s {
 26260  			break
 26261  		}
 26262  		_ = x5.Args[1]
 26263  		if p != x5.Args[0] {
 26264  			break
 26265  		}
 26266  		if mem != x5.Args[1] {
 26267  			break
 26268  		}
 26269  		o3 := o4.Args[1]
 26270  		if o3.Op != OpPPC64OR {
 26271  			break
 26272  		}
 26273  		if o3.Type != t {
 26274  			break
 26275  		}
 26276  		_ = o3.Args[1]
 26277  		s3 := o3.Args[0]
 26278  		if s3.Op != OpPPC64SLDconst {
 26279  			break
 26280  		}
 26281  		if s3.AuxInt != 32 {
 26282  			break
 26283  		}
 26284  		x4 := s3.Args[0]
 26285  		if x4.Op != OpPPC64MOVBZload {
 26286  			break
 26287  		}
 26288  		i4 := x4.AuxInt
 26289  		if x4.Aux != s {
 26290  			break
 26291  		}
 26292  		_ = x4.Args[1]
 26293  		if p != x4.Args[0] {
 26294  			break
 26295  		}
 26296  		if mem != x4.Args[1] {
 26297  			break
 26298  		}
 26299  		o2 := o3.Args[1]
 26300  		if o2.Op != OpPPC64OR {
 26301  			break
 26302  		}
 26303  		if o2.Type != t {
 26304  			break
 26305  		}
 26306  		_ = o2.Args[1]
 26307  		o1 := o2.Args[0]
 26308  		if o1.Op != OpPPC64OR {
 26309  			break
 26310  		}
 26311  		if o1.Type != t {
 26312  			break
 26313  		}
 26314  		_ = o1.Args[1]
 26315  		o0 := o1.Args[0]
 26316  		if o0.Op != OpPPC64OR {
 26317  			break
 26318  		}
 26319  		if o0.Type != t {
 26320  			break
 26321  		}
 26322  		_ = o0.Args[1]
 26323  		x0 := o0.Args[0]
 26324  		if x0.Op != OpPPC64MOVBZload {
 26325  			break
 26326  		}
 26327  		i0 := x0.AuxInt
 26328  		if x0.Aux != s {
 26329  			break
 26330  		}
 26331  		_ = x0.Args[1]
 26332  		if p != x0.Args[0] {
 26333  			break
 26334  		}
 26335  		if mem != x0.Args[1] {
 26336  			break
 26337  		}
 26338  		s0 := o0.Args[1]
 26339  		if s0.Op != OpPPC64SLDconst {
 26340  			break
 26341  		}
 26342  		if s0.AuxInt != 8 {
 26343  			break
 26344  		}
 26345  		x1 := s0.Args[0]
 26346  		if x1.Op != OpPPC64MOVBZload {
 26347  			break
 26348  		}
 26349  		i1 := x1.AuxInt
 26350  		if x1.Aux != s {
 26351  			break
 26352  		}
 26353  		_ = x1.Args[1]
 26354  		if p != x1.Args[0] {
 26355  			break
 26356  		}
 26357  		if mem != x1.Args[1] {
 26358  			break
 26359  		}
 26360  		s1 := o1.Args[1]
 26361  		if s1.Op != OpPPC64SLDconst {
 26362  			break
 26363  		}
 26364  		if s1.AuxInt != 16 {
 26365  			break
 26366  		}
 26367  		x2 := s1.Args[0]
 26368  		if x2.Op != OpPPC64MOVBZload {
 26369  			break
 26370  		}
 26371  		i2 := x2.AuxInt
 26372  		if x2.Aux != s {
 26373  			break
 26374  		}
 26375  		_ = x2.Args[1]
 26376  		if p != x2.Args[0] {
 26377  			break
 26378  		}
 26379  		if mem != x2.Args[1] {
 26380  			break
 26381  		}
 26382  		s2 := o2.Args[1]
 26383  		if s2.Op != OpPPC64SLDconst {
 26384  			break
 26385  		}
 26386  		if s2.AuxInt != 24 {
 26387  			break
 26388  		}
 26389  		x3 := s2.Args[0]
 26390  		if x3.Op != OpPPC64MOVBZload {
 26391  			break
 26392  		}
 26393  		i3 := x3.AuxInt
 26394  		if x3.Aux != s {
 26395  			break
 26396  		}
 26397  		_ = x3.Args[1]
 26398  		if p != x3.Args[0] {
 26399  			break
 26400  		}
 26401  		if mem != x3.Args[1] {
 26402  			break
 26403  		}
 26404  		s6 := v.Args[1]
 26405  		if s6.Op != OpPPC64SLDconst {
 26406  			break
 26407  		}
 26408  		if s6.AuxInt != 56 {
 26409  			break
 26410  		}
 26411  		x7 := s6.Args[0]
 26412  		if x7.Op != OpPPC64MOVBZload {
 26413  			break
 26414  		}
 26415  		i7 := x7.AuxInt
 26416  		if x7.Aux != s {
 26417  			break
 26418  		}
 26419  		_ = x7.Args[1]
 26420  		if p != x7.Args[0] {
 26421  			break
 26422  		}
 26423  		if mem != x7.Args[1] {
 26424  			break
 26425  		}
 26426  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26427  			break
 26428  		}
 26429  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26430  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26431  		v.reset(OpCopy)
 26432  		v.AddArg(v0)
 26433  		v0.AuxInt = i0
 26434  		v0.Aux = s
 26435  		v0.AddArg(p)
 26436  		v0.AddArg(mem)
 26437  		return true
 26438  	}
 26439  	return false
 26440  }
 26441  func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
 26442  	b := v.Block
 26443  	_ = b
 26444  	config := b.Func.Config
 26445  	_ = config
 26446  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26447  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26448  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26449  	for {
 26450  		t := v.Type
 26451  		_ = v.Args[1]
 26452  		o5 := v.Args[0]
 26453  		if o5.Op != OpPPC64OR {
 26454  			break
 26455  		}
 26456  		if o5.Type != t {
 26457  			break
 26458  		}
 26459  		_ = o5.Args[1]
 26460  		s5 := o5.Args[0]
 26461  		if s5.Op != OpPPC64SLDconst {
 26462  			break
 26463  		}
 26464  		if s5.AuxInt != 48 {
 26465  			break
 26466  		}
 26467  		x6 := s5.Args[0]
 26468  		if x6.Op != OpPPC64MOVBZload {
 26469  			break
 26470  		}
 26471  		i6 := x6.AuxInt
 26472  		s := x6.Aux
 26473  		_ = x6.Args[1]
 26474  		p := x6.Args[0]
 26475  		mem := x6.Args[1]
 26476  		o4 := o5.Args[1]
 26477  		if o4.Op != OpPPC64OR {
 26478  			break
 26479  		}
 26480  		if o4.Type != t {
 26481  			break
 26482  		}
 26483  		_ = o4.Args[1]
 26484  		s4 := o4.Args[0]
 26485  		if s4.Op != OpPPC64SLDconst {
 26486  			break
 26487  		}
 26488  		if s4.AuxInt != 40 {
 26489  			break
 26490  		}
 26491  		x5 := s4.Args[0]
 26492  		if x5.Op != OpPPC64MOVBZload {
 26493  			break
 26494  		}
 26495  		i5 := x5.AuxInt
 26496  		if x5.Aux != s {
 26497  			break
 26498  		}
 26499  		_ = x5.Args[1]
 26500  		if p != x5.Args[0] {
 26501  			break
 26502  		}
 26503  		if mem != x5.Args[1] {
 26504  			break
 26505  		}
 26506  		o3 := o4.Args[1]
 26507  		if o3.Op != OpPPC64OR {
 26508  			break
 26509  		}
 26510  		if o3.Type != t {
 26511  			break
 26512  		}
 26513  		_ = o3.Args[1]
 26514  		o2 := o3.Args[0]
 26515  		if o2.Op != OpPPC64OR {
 26516  			break
 26517  		}
 26518  		if o2.Type != t {
 26519  			break
 26520  		}
 26521  		_ = o2.Args[1]
 26522  		s2 := o2.Args[0]
 26523  		if s2.Op != OpPPC64SLDconst {
 26524  			break
 26525  		}
 26526  		if s2.AuxInt != 24 {
 26527  			break
 26528  		}
 26529  		x3 := s2.Args[0]
 26530  		if x3.Op != OpPPC64MOVBZload {
 26531  			break
 26532  		}
 26533  		i3 := x3.AuxInt
 26534  		if x3.Aux != s {
 26535  			break
 26536  		}
 26537  		_ = x3.Args[1]
 26538  		if p != x3.Args[0] {
 26539  			break
 26540  		}
 26541  		if mem != x3.Args[1] {
 26542  			break
 26543  		}
 26544  		o1 := o2.Args[1]
 26545  		if o1.Op != OpPPC64OR {
 26546  			break
 26547  		}
 26548  		if o1.Type != t {
 26549  			break
 26550  		}
 26551  		_ = o1.Args[1]
 26552  		s1 := o1.Args[0]
 26553  		if s1.Op != OpPPC64SLDconst {
 26554  			break
 26555  		}
 26556  		if s1.AuxInt != 16 {
 26557  			break
 26558  		}
 26559  		x2 := s1.Args[0]
 26560  		if x2.Op != OpPPC64MOVBZload {
 26561  			break
 26562  		}
 26563  		i2 := x2.AuxInt
 26564  		if x2.Aux != s {
 26565  			break
 26566  		}
 26567  		_ = x2.Args[1]
 26568  		if p != x2.Args[0] {
 26569  			break
 26570  		}
 26571  		if mem != x2.Args[1] {
 26572  			break
 26573  		}
 26574  		o0 := o1.Args[1]
 26575  		if o0.Op != OpPPC64OR {
 26576  			break
 26577  		}
 26578  		if o0.Type != t {
 26579  			break
 26580  		}
 26581  		_ = o0.Args[1]
 26582  		s0 := o0.Args[0]
 26583  		if s0.Op != OpPPC64SLDconst {
 26584  			break
 26585  		}
 26586  		if s0.AuxInt != 8 {
 26587  			break
 26588  		}
 26589  		x1 := s0.Args[0]
 26590  		if x1.Op != OpPPC64MOVBZload {
 26591  			break
 26592  		}
 26593  		i1 := x1.AuxInt
 26594  		if x1.Aux != s {
 26595  			break
 26596  		}
 26597  		_ = x1.Args[1]
 26598  		if p != x1.Args[0] {
 26599  			break
 26600  		}
 26601  		if mem != x1.Args[1] {
 26602  			break
 26603  		}
 26604  		x0 := o0.Args[1]
 26605  		if x0.Op != OpPPC64MOVBZload {
 26606  			break
 26607  		}
 26608  		i0 := x0.AuxInt
 26609  		if x0.Aux != s {
 26610  			break
 26611  		}
 26612  		_ = x0.Args[1]
 26613  		if p != x0.Args[0] {
 26614  			break
 26615  		}
 26616  		if mem != x0.Args[1] {
 26617  			break
 26618  		}
 26619  		s3 := o3.Args[1]
 26620  		if s3.Op != OpPPC64SLDconst {
 26621  			break
 26622  		}
 26623  		if s3.AuxInt != 32 {
 26624  			break
 26625  		}
 26626  		x4 := s3.Args[0]
 26627  		if x4.Op != OpPPC64MOVBZload {
 26628  			break
 26629  		}
 26630  		i4 := x4.AuxInt
 26631  		if x4.Aux != s {
 26632  			break
 26633  		}
 26634  		_ = x4.Args[1]
 26635  		if p != x4.Args[0] {
 26636  			break
 26637  		}
 26638  		if mem != x4.Args[1] {
 26639  			break
 26640  		}
 26641  		s6 := v.Args[1]
 26642  		if s6.Op != OpPPC64SLDconst {
 26643  			break
 26644  		}
 26645  		if s6.AuxInt != 56 {
 26646  			break
 26647  		}
 26648  		x7 := s6.Args[0]
 26649  		if x7.Op != OpPPC64MOVBZload {
 26650  			break
 26651  		}
 26652  		i7 := x7.AuxInt
 26653  		if x7.Aux != s {
 26654  			break
 26655  		}
 26656  		_ = x7.Args[1]
 26657  		if p != x7.Args[0] {
 26658  			break
 26659  		}
 26660  		if mem != x7.Args[1] {
 26661  			break
 26662  		}
 26663  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26664  			break
 26665  		}
 26666  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26667  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26668  		v.reset(OpCopy)
 26669  		v.AddArg(v0)
 26670  		v0.AuxInt = i0
 26671  		v0.Aux = s
 26672  		v0.AddArg(p)
 26673  		v0.AddArg(mem)
 26674  		return true
 26675  	}
 26676  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26677  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26678  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26679  	for {
 26680  		t := v.Type
 26681  		_ = v.Args[1]
 26682  		o5 := v.Args[0]
 26683  		if o5.Op != OpPPC64OR {
 26684  			break
 26685  		}
 26686  		if o5.Type != t {
 26687  			break
 26688  		}
 26689  		_ = o5.Args[1]
 26690  		s5 := o5.Args[0]
 26691  		if s5.Op != OpPPC64SLDconst {
 26692  			break
 26693  		}
 26694  		if s5.AuxInt != 48 {
 26695  			break
 26696  		}
 26697  		x6 := s5.Args[0]
 26698  		if x6.Op != OpPPC64MOVBZload {
 26699  			break
 26700  		}
 26701  		i6 := x6.AuxInt
 26702  		s := x6.Aux
 26703  		_ = x6.Args[1]
 26704  		p := x6.Args[0]
 26705  		mem := x6.Args[1]
 26706  		o4 := o5.Args[1]
 26707  		if o4.Op != OpPPC64OR {
 26708  			break
 26709  		}
 26710  		if o4.Type != t {
 26711  			break
 26712  		}
 26713  		_ = o4.Args[1]
 26714  		s4 := o4.Args[0]
 26715  		if s4.Op != OpPPC64SLDconst {
 26716  			break
 26717  		}
 26718  		if s4.AuxInt != 40 {
 26719  			break
 26720  		}
 26721  		x5 := s4.Args[0]
 26722  		if x5.Op != OpPPC64MOVBZload {
 26723  			break
 26724  		}
 26725  		i5 := x5.AuxInt
 26726  		if x5.Aux != s {
 26727  			break
 26728  		}
 26729  		_ = x5.Args[1]
 26730  		if p != x5.Args[0] {
 26731  			break
 26732  		}
 26733  		if mem != x5.Args[1] {
 26734  			break
 26735  		}
 26736  		o3 := o4.Args[1]
 26737  		if o3.Op != OpPPC64OR {
 26738  			break
 26739  		}
 26740  		if o3.Type != t {
 26741  			break
 26742  		}
 26743  		_ = o3.Args[1]
 26744  		o2 := o3.Args[0]
 26745  		if o2.Op != OpPPC64OR {
 26746  			break
 26747  		}
 26748  		if o2.Type != t {
 26749  			break
 26750  		}
 26751  		_ = o2.Args[1]
 26752  		s2 := o2.Args[0]
 26753  		if s2.Op != OpPPC64SLDconst {
 26754  			break
 26755  		}
 26756  		if s2.AuxInt != 24 {
 26757  			break
 26758  		}
 26759  		x3 := s2.Args[0]
 26760  		if x3.Op != OpPPC64MOVBZload {
 26761  			break
 26762  		}
 26763  		i3 := x3.AuxInt
 26764  		if x3.Aux != s {
 26765  			break
 26766  		}
 26767  		_ = x3.Args[1]
 26768  		if p != x3.Args[0] {
 26769  			break
 26770  		}
 26771  		if mem != x3.Args[1] {
 26772  			break
 26773  		}
 26774  		o1 := o2.Args[1]
 26775  		if o1.Op != OpPPC64OR {
 26776  			break
 26777  		}
 26778  		if o1.Type != t {
 26779  			break
 26780  		}
 26781  		_ = o1.Args[1]
 26782  		s1 := o1.Args[0]
 26783  		if s1.Op != OpPPC64SLDconst {
 26784  			break
 26785  		}
 26786  		if s1.AuxInt != 16 {
 26787  			break
 26788  		}
 26789  		x2 := s1.Args[0]
 26790  		if x2.Op != OpPPC64MOVBZload {
 26791  			break
 26792  		}
 26793  		i2 := x2.AuxInt
 26794  		if x2.Aux != s {
 26795  			break
 26796  		}
 26797  		_ = x2.Args[1]
 26798  		if p != x2.Args[0] {
 26799  			break
 26800  		}
 26801  		if mem != x2.Args[1] {
 26802  			break
 26803  		}
 26804  		o0 := o1.Args[1]
 26805  		if o0.Op != OpPPC64OR {
 26806  			break
 26807  		}
 26808  		if o0.Type != t {
 26809  			break
 26810  		}
 26811  		_ = o0.Args[1]
 26812  		x0 := o0.Args[0]
 26813  		if x0.Op != OpPPC64MOVBZload {
 26814  			break
 26815  		}
 26816  		i0 := x0.AuxInt
 26817  		if x0.Aux != s {
 26818  			break
 26819  		}
 26820  		_ = x0.Args[1]
 26821  		if p != x0.Args[0] {
 26822  			break
 26823  		}
 26824  		if mem != x0.Args[1] {
 26825  			break
 26826  		}
 26827  		s0 := o0.Args[1]
 26828  		if s0.Op != OpPPC64SLDconst {
 26829  			break
 26830  		}
 26831  		if s0.AuxInt != 8 {
 26832  			break
 26833  		}
 26834  		x1 := s0.Args[0]
 26835  		if x1.Op != OpPPC64MOVBZload {
 26836  			break
 26837  		}
 26838  		i1 := x1.AuxInt
 26839  		if x1.Aux != s {
 26840  			break
 26841  		}
 26842  		_ = x1.Args[1]
 26843  		if p != x1.Args[0] {
 26844  			break
 26845  		}
 26846  		if mem != x1.Args[1] {
 26847  			break
 26848  		}
 26849  		s3 := o3.Args[1]
 26850  		if s3.Op != OpPPC64SLDconst {
 26851  			break
 26852  		}
 26853  		if s3.AuxInt != 32 {
 26854  			break
 26855  		}
 26856  		x4 := s3.Args[0]
 26857  		if x4.Op != OpPPC64MOVBZload {
 26858  			break
 26859  		}
 26860  		i4 := x4.AuxInt
 26861  		if x4.Aux != s {
 26862  			break
 26863  		}
 26864  		_ = x4.Args[1]
 26865  		if p != x4.Args[0] {
 26866  			break
 26867  		}
 26868  		if mem != x4.Args[1] {
 26869  			break
 26870  		}
 26871  		s6 := v.Args[1]
 26872  		if s6.Op != OpPPC64SLDconst {
 26873  			break
 26874  		}
 26875  		if s6.AuxInt != 56 {
 26876  			break
 26877  		}
 26878  		x7 := s6.Args[0]
 26879  		if x7.Op != OpPPC64MOVBZload {
 26880  			break
 26881  		}
 26882  		i7 := x7.AuxInt
 26883  		if x7.Aux != s {
 26884  			break
 26885  		}
 26886  		_ = x7.Args[1]
 26887  		if p != x7.Args[0] {
 26888  			break
 26889  		}
 26890  		if mem != x7.Args[1] {
 26891  			break
 26892  		}
 26893  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26894  			break
 26895  		}
 26896  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26897  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26898  		v.reset(OpCopy)
 26899  		v.AddArg(v0)
 26900  		v0.AuxInt = i0
 26901  		v0.Aux = s
 26902  		v0.AddArg(p)
 26903  		v0.AddArg(mem)
 26904  		return true
 26905  	}
 26906  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26907  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26908  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26909  	for {
 26910  		t := v.Type
 26911  		_ = v.Args[1]
 26912  		o5 := v.Args[0]
 26913  		if o5.Op != OpPPC64OR {
 26914  			break
 26915  		}
 26916  		if o5.Type != t {
 26917  			break
 26918  		}
 26919  		_ = o5.Args[1]
 26920  		s5 := o5.Args[0]
 26921  		if s5.Op != OpPPC64SLDconst {
 26922  			break
 26923  		}
 26924  		if s5.AuxInt != 48 {
 26925  			break
 26926  		}
 26927  		x6 := s5.Args[0]
 26928  		if x6.Op != OpPPC64MOVBZload {
 26929  			break
 26930  		}
 26931  		i6 := x6.AuxInt
 26932  		s := x6.Aux
 26933  		_ = x6.Args[1]
 26934  		p := x6.Args[0]
 26935  		mem := x6.Args[1]
 26936  		o4 := o5.Args[1]
 26937  		if o4.Op != OpPPC64OR {
 26938  			break
 26939  		}
 26940  		if o4.Type != t {
 26941  			break
 26942  		}
 26943  		_ = o4.Args[1]
 26944  		s4 := o4.Args[0]
 26945  		if s4.Op != OpPPC64SLDconst {
 26946  			break
 26947  		}
 26948  		if s4.AuxInt != 40 {
 26949  			break
 26950  		}
 26951  		x5 := s4.Args[0]
 26952  		if x5.Op != OpPPC64MOVBZload {
 26953  			break
 26954  		}
 26955  		i5 := x5.AuxInt
 26956  		if x5.Aux != s {
 26957  			break
 26958  		}
 26959  		_ = x5.Args[1]
 26960  		if p != x5.Args[0] {
 26961  			break
 26962  		}
 26963  		if mem != x5.Args[1] {
 26964  			break
 26965  		}
 26966  		o3 := o4.Args[1]
 26967  		if o3.Op != OpPPC64OR {
 26968  			break
 26969  		}
 26970  		if o3.Type != t {
 26971  			break
 26972  		}
 26973  		_ = o3.Args[1]
 26974  		o2 := o3.Args[0]
 26975  		if o2.Op != OpPPC64OR {
 26976  			break
 26977  		}
 26978  		if o2.Type != t {
 26979  			break
 26980  		}
 26981  		_ = o2.Args[1]
 26982  		s2 := o2.Args[0]
 26983  		if s2.Op != OpPPC64SLDconst {
 26984  			break
 26985  		}
 26986  		if s2.AuxInt != 24 {
 26987  			break
 26988  		}
 26989  		x3 := s2.Args[0]
 26990  		if x3.Op != OpPPC64MOVBZload {
 26991  			break
 26992  		}
 26993  		i3 := x3.AuxInt
 26994  		if x3.Aux != s {
 26995  			break
 26996  		}
 26997  		_ = x3.Args[1]
 26998  		if p != x3.Args[0] {
 26999  			break
 27000  		}
 27001  		if mem != x3.Args[1] {
 27002  			break
 27003  		}
 27004  		o1 := o2.Args[1]
 27005  		if o1.Op != OpPPC64OR {
 27006  			break
 27007  		}
 27008  		if o1.Type != t {
 27009  			break
 27010  		}
 27011  		_ = o1.Args[1]
 27012  		o0 := o1.Args[0]
 27013  		if o0.Op != OpPPC64OR {
 27014  			break
 27015  		}
 27016  		if o0.Type != t {
 27017  			break
 27018  		}
 27019  		_ = o0.Args[1]
 27020  		s0 := o0.Args[0]
 27021  		if s0.Op != OpPPC64SLDconst {
 27022  			break
 27023  		}
 27024  		if s0.AuxInt != 8 {
 27025  			break
 27026  		}
 27027  		x1 := s0.Args[0]
 27028  		if x1.Op != OpPPC64MOVBZload {
 27029  			break
 27030  		}
 27031  		i1 := x1.AuxInt
 27032  		if x1.Aux != s {
 27033  			break
 27034  		}
 27035  		_ = x1.Args[1]
 27036  		if p != x1.Args[0] {
 27037  			break
 27038  		}
 27039  		if mem != x1.Args[1] {
 27040  			break
 27041  		}
 27042  		x0 := o0.Args[1]
 27043  		if x0.Op != OpPPC64MOVBZload {
 27044  			break
 27045  		}
 27046  		i0 := x0.AuxInt
 27047  		if x0.Aux != s {
 27048  			break
 27049  		}
 27050  		_ = x0.Args[1]
 27051  		if p != x0.Args[0] {
 27052  			break
 27053  		}
 27054  		if mem != x0.Args[1] {
 27055  			break
 27056  		}
 27057  		s1 := o1.Args[1]
 27058  		if s1.Op != OpPPC64SLDconst {
 27059  			break
 27060  		}
 27061  		if s1.AuxInt != 16 {
 27062  			break
 27063  		}
 27064  		x2 := s1.Args[0]
 27065  		if x2.Op != OpPPC64MOVBZload {
 27066  			break
 27067  		}
 27068  		i2 := x2.AuxInt
 27069  		if x2.Aux != s {
 27070  			break
 27071  		}
 27072  		_ = x2.Args[1]
 27073  		if p != x2.Args[0] {
 27074  			break
 27075  		}
 27076  		if mem != x2.Args[1] {
 27077  			break
 27078  		}
 27079  		s3 := o3.Args[1]
 27080  		if s3.Op != OpPPC64SLDconst {
 27081  			break
 27082  		}
 27083  		if s3.AuxInt != 32 {
 27084  			break
 27085  		}
 27086  		x4 := s3.Args[0]
 27087  		if x4.Op != OpPPC64MOVBZload {
 27088  			break
 27089  		}
 27090  		i4 := x4.AuxInt
 27091  		if x4.Aux != s {
 27092  			break
 27093  		}
 27094  		_ = x4.Args[1]
 27095  		if p != x4.Args[0] {
 27096  			break
 27097  		}
 27098  		if mem != x4.Args[1] {
 27099  			break
 27100  		}
 27101  		s6 := v.Args[1]
 27102  		if s6.Op != OpPPC64SLDconst {
 27103  			break
 27104  		}
 27105  		if s6.AuxInt != 56 {
 27106  			break
 27107  		}
 27108  		x7 := s6.Args[0]
 27109  		if x7.Op != OpPPC64MOVBZload {
 27110  			break
 27111  		}
 27112  		i7 := x7.AuxInt
 27113  		if x7.Aux != s {
 27114  			break
 27115  		}
 27116  		_ = x7.Args[1]
 27117  		if p != x7.Args[0] {
 27118  			break
 27119  		}
 27120  		if mem != x7.Args[1] {
 27121  			break
 27122  		}
 27123  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27124  			break
 27125  		}
 27126  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27127  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27128  		v.reset(OpCopy)
 27129  		v.AddArg(v0)
 27130  		v0.AuxInt = i0
 27131  		v0.Aux = s
 27132  		v0.AddArg(p)
 27133  		v0.AddArg(mem)
 27134  		return true
 27135  	}
 27136  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27137  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27138  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27139  	for {
 27140  		t := v.Type
 27141  		_ = v.Args[1]
 27142  		o5 := v.Args[0]
 27143  		if o5.Op != OpPPC64OR {
 27144  			break
 27145  		}
 27146  		if o5.Type != t {
 27147  			break
 27148  		}
 27149  		_ = o5.Args[1]
 27150  		s5 := o5.Args[0]
 27151  		if s5.Op != OpPPC64SLDconst {
 27152  			break
 27153  		}
 27154  		if s5.AuxInt != 48 {
 27155  			break
 27156  		}
 27157  		x6 := s5.Args[0]
 27158  		if x6.Op != OpPPC64MOVBZload {
 27159  			break
 27160  		}
 27161  		i6 := x6.AuxInt
 27162  		s := x6.Aux
 27163  		_ = x6.Args[1]
 27164  		p := x6.Args[0]
 27165  		mem := x6.Args[1]
 27166  		o4 := o5.Args[1]
 27167  		if o4.Op != OpPPC64OR {
 27168  			break
 27169  		}
 27170  		if o4.Type != t {
 27171  			break
 27172  		}
 27173  		_ = o4.Args[1]
 27174  		s4 := o4.Args[0]
 27175  		if s4.Op != OpPPC64SLDconst {
 27176  			break
 27177  		}
 27178  		if s4.AuxInt != 40 {
 27179  			break
 27180  		}
 27181  		x5 := s4.Args[0]
 27182  		if x5.Op != OpPPC64MOVBZload {
 27183  			break
 27184  		}
 27185  		i5 := x5.AuxInt
 27186  		if x5.Aux != s {
 27187  			break
 27188  		}
 27189  		_ = x5.Args[1]
 27190  		if p != x5.Args[0] {
 27191  			break
 27192  		}
 27193  		if mem != x5.Args[1] {
 27194  			break
 27195  		}
 27196  		o3 := o4.Args[1]
 27197  		if o3.Op != OpPPC64OR {
 27198  			break
 27199  		}
 27200  		if o3.Type != t {
 27201  			break
 27202  		}
 27203  		_ = o3.Args[1]
 27204  		o2 := o3.Args[0]
 27205  		if o2.Op != OpPPC64OR {
 27206  			break
 27207  		}
 27208  		if o2.Type != t {
 27209  			break
 27210  		}
 27211  		_ = o2.Args[1]
 27212  		s2 := o2.Args[0]
 27213  		if s2.Op != OpPPC64SLDconst {
 27214  			break
 27215  		}
 27216  		if s2.AuxInt != 24 {
 27217  			break
 27218  		}
 27219  		x3 := s2.Args[0]
 27220  		if x3.Op != OpPPC64MOVBZload {
 27221  			break
 27222  		}
 27223  		i3 := x3.AuxInt
 27224  		if x3.Aux != s {
 27225  			break
 27226  		}
 27227  		_ = x3.Args[1]
 27228  		if p != x3.Args[0] {
 27229  			break
 27230  		}
 27231  		if mem != x3.Args[1] {
 27232  			break
 27233  		}
 27234  		o1 := o2.Args[1]
 27235  		if o1.Op != OpPPC64OR {
 27236  			break
 27237  		}
 27238  		if o1.Type != t {
 27239  			break
 27240  		}
 27241  		_ = o1.Args[1]
 27242  		o0 := o1.Args[0]
 27243  		if o0.Op != OpPPC64OR {
 27244  			break
 27245  		}
 27246  		if o0.Type != t {
 27247  			break
 27248  		}
 27249  		_ = o0.Args[1]
 27250  		x0 := o0.Args[0]
 27251  		if x0.Op != OpPPC64MOVBZload {
 27252  			break
 27253  		}
 27254  		i0 := x0.AuxInt
 27255  		if x0.Aux != s {
 27256  			break
 27257  		}
 27258  		_ = x0.Args[1]
 27259  		if p != x0.Args[0] {
 27260  			break
 27261  		}
 27262  		if mem != x0.Args[1] {
 27263  			break
 27264  		}
 27265  		s0 := o0.Args[1]
 27266  		if s0.Op != OpPPC64SLDconst {
 27267  			break
 27268  		}
 27269  		if s0.AuxInt != 8 {
 27270  			break
 27271  		}
 27272  		x1 := s0.Args[0]
 27273  		if x1.Op != OpPPC64MOVBZload {
 27274  			break
 27275  		}
 27276  		i1 := x1.AuxInt
 27277  		if x1.Aux != s {
 27278  			break
 27279  		}
 27280  		_ = x1.Args[1]
 27281  		if p != x1.Args[0] {
 27282  			break
 27283  		}
 27284  		if mem != x1.Args[1] {
 27285  			break
 27286  		}
 27287  		s1 := o1.Args[1]
 27288  		if s1.Op != OpPPC64SLDconst {
 27289  			break
 27290  		}
 27291  		if s1.AuxInt != 16 {
 27292  			break
 27293  		}
 27294  		x2 := s1.Args[0]
 27295  		if x2.Op != OpPPC64MOVBZload {
 27296  			break
 27297  		}
 27298  		i2 := x2.AuxInt
 27299  		if x2.Aux != s {
 27300  			break
 27301  		}
 27302  		_ = x2.Args[1]
 27303  		if p != x2.Args[0] {
 27304  			break
 27305  		}
 27306  		if mem != x2.Args[1] {
 27307  			break
 27308  		}
 27309  		s3 := o3.Args[1]
 27310  		if s3.Op != OpPPC64SLDconst {
 27311  			break
 27312  		}
 27313  		if s3.AuxInt != 32 {
 27314  			break
 27315  		}
 27316  		x4 := s3.Args[0]
 27317  		if x4.Op != OpPPC64MOVBZload {
 27318  			break
 27319  		}
 27320  		i4 := x4.AuxInt
 27321  		if x4.Aux != s {
 27322  			break
 27323  		}
 27324  		_ = x4.Args[1]
 27325  		if p != x4.Args[0] {
 27326  			break
 27327  		}
 27328  		if mem != x4.Args[1] {
 27329  			break
 27330  		}
 27331  		s6 := v.Args[1]
 27332  		if s6.Op != OpPPC64SLDconst {
 27333  			break
 27334  		}
 27335  		if s6.AuxInt != 56 {
 27336  			break
 27337  		}
 27338  		x7 := s6.Args[0]
 27339  		if x7.Op != OpPPC64MOVBZload {
 27340  			break
 27341  		}
 27342  		i7 := x7.AuxInt
 27343  		if x7.Aux != s {
 27344  			break
 27345  		}
 27346  		_ = x7.Args[1]
 27347  		if p != x7.Args[0] {
 27348  			break
 27349  		}
 27350  		if mem != x7.Args[1] {
 27351  			break
 27352  		}
 27353  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27354  			break
 27355  		}
 27356  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27357  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27358  		v.reset(OpCopy)
 27359  		v.AddArg(v0)
 27360  		v0.AuxInt = i0
 27361  		v0.Aux = s
 27362  		v0.AddArg(p)
 27363  		v0.AddArg(mem)
 27364  		return true
 27365  	}
 27366  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27367  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27368  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27369  	for {
 27370  		t := v.Type
 27371  		_ = v.Args[1]
 27372  		o5 := v.Args[0]
 27373  		if o5.Op != OpPPC64OR {
 27374  			break
 27375  		}
 27376  		if o5.Type != t {
 27377  			break
 27378  		}
 27379  		_ = o5.Args[1]
 27380  		s5 := o5.Args[0]
 27381  		if s5.Op != OpPPC64SLDconst {
 27382  			break
 27383  		}
 27384  		if s5.AuxInt != 48 {
 27385  			break
 27386  		}
 27387  		x6 := s5.Args[0]
 27388  		if x6.Op != OpPPC64MOVBZload {
 27389  			break
 27390  		}
 27391  		i6 := x6.AuxInt
 27392  		s := x6.Aux
 27393  		_ = x6.Args[1]
 27394  		p := x6.Args[0]
 27395  		mem := x6.Args[1]
 27396  		o4 := o5.Args[1]
 27397  		if o4.Op != OpPPC64OR {
 27398  			break
 27399  		}
 27400  		if o4.Type != t {
 27401  			break
 27402  		}
 27403  		_ = o4.Args[1]
 27404  		s4 := o4.Args[0]
 27405  		if s4.Op != OpPPC64SLDconst {
 27406  			break
 27407  		}
 27408  		if s4.AuxInt != 40 {
 27409  			break
 27410  		}
 27411  		x5 := s4.Args[0]
 27412  		if x5.Op != OpPPC64MOVBZload {
 27413  			break
 27414  		}
 27415  		i5 := x5.AuxInt
 27416  		if x5.Aux != s {
 27417  			break
 27418  		}
 27419  		_ = x5.Args[1]
 27420  		if p != x5.Args[0] {
 27421  			break
 27422  		}
 27423  		if mem != x5.Args[1] {
 27424  			break
 27425  		}
 27426  		o3 := o4.Args[1]
 27427  		if o3.Op != OpPPC64OR {
 27428  			break
 27429  		}
 27430  		if o3.Type != t {
 27431  			break
 27432  		}
 27433  		_ = o3.Args[1]
 27434  		o2 := o3.Args[0]
 27435  		if o2.Op != OpPPC64OR {
 27436  			break
 27437  		}
 27438  		if o2.Type != t {
 27439  			break
 27440  		}
 27441  		_ = o2.Args[1]
 27442  		o1 := o2.Args[0]
 27443  		if o1.Op != OpPPC64OR {
 27444  			break
 27445  		}
 27446  		if o1.Type != t {
 27447  			break
 27448  		}
 27449  		_ = o1.Args[1]
 27450  		s1 := o1.Args[0]
 27451  		if s1.Op != OpPPC64SLDconst {
 27452  			break
 27453  		}
 27454  		if s1.AuxInt != 16 {
 27455  			break
 27456  		}
 27457  		x2 := s1.Args[0]
 27458  		if x2.Op != OpPPC64MOVBZload {
 27459  			break
 27460  		}
 27461  		i2 := x2.AuxInt
 27462  		if x2.Aux != s {
 27463  			break
 27464  		}
 27465  		_ = x2.Args[1]
 27466  		if p != x2.Args[0] {
 27467  			break
 27468  		}
 27469  		if mem != x2.Args[1] {
 27470  			break
 27471  		}
 27472  		o0 := o1.Args[1]
 27473  		if o0.Op != OpPPC64OR {
 27474  			break
 27475  		}
 27476  		if o0.Type != t {
 27477  			break
 27478  		}
 27479  		_ = o0.Args[1]
 27480  		s0 := o0.Args[0]
 27481  		if s0.Op != OpPPC64SLDconst {
 27482  			break
 27483  		}
 27484  		if s0.AuxInt != 8 {
 27485  			break
 27486  		}
 27487  		x1 := s0.Args[0]
 27488  		if x1.Op != OpPPC64MOVBZload {
 27489  			break
 27490  		}
 27491  		i1 := x1.AuxInt
 27492  		if x1.Aux != s {
 27493  			break
 27494  		}
 27495  		_ = x1.Args[1]
 27496  		if p != x1.Args[0] {
 27497  			break
 27498  		}
 27499  		if mem != x1.Args[1] {
 27500  			break
 27501  		}
 27502  		x0 := o0.Args[1]
 27503  		if x0.Op != OpPPC64MOVBZload {
 27504  			break
 27505  		}
 27506  		i0 := x0.AuxInt
 27507  		if x0.Aux != s {
 27508  			break
 27509  		}
 27510  		_ = x0.Args[1]
 27511  		if p != x0.Args[0] {
 27512  			break
 27513  		}
 27514  		if mem != x0.Args[1] {
 27515  			break
 27516  		}
 27517  		s2 := o2.Args[1]
 27518  		if s2.Op != OpPPC64SLDconst {
 27519  			break
 27520  		}
 27521  		if s2.AuxInt != 24 {
 27522  			break
 27523  		}
 27524  		x3 := s2.Args[0]
 27525  		if x3.Op != OpPPC64MOVBZload {
 27526  			break
 27527  		}
 27528  		i3 := x3.AuxInt
 27529  		if x3.Aux != s {
 27530  			break
 27531  		}
 27532  		_ = x3.Args[1]
 27533  		if p != x3.Args[0] {
 27534  			break
 27535  		}
 27536  		if mem != x3.Args[1] {
 27537  			break
 27538  		}
 27539  		s3 := o3.Args[1]
 27540  		if s3.Op != OpPPC64SLDconst {
 27541  			break
 27542  		}
 27543  		if s3.AuxInt != 32 {
 27544  			break
 27545  		}
 27546  		x4 := s3.Args[0]
 27547  		if x4.Op != OpPPC64MOVBZload {
 27548  			break
 27549  		}
 27550  		i4 := x4.AuxInt
 27551  		if x4.Aux != s {
 27552  			break
 27553  		}
 27554  		_ = x4.Args[1]
 27555  		if p != x4.Args[0] {
 27556  			break
 27557  		}
 27558  		if mem != x4.Args[1] {
 27559  			break
 27560  		}
 27561  		s6 := v.Args[1]
 27562  		if s6.Op != OpPPC64SLDconst {
 27563  			break
 27564  		}
 27565  		if s6.AuxInt != 56 {
 27566  			break
 27567  		}
 27568  		x7 := s6.Args[0]
 27569  		if x7.Op != OpPPC64MOVBZload {
 27570  			break
 27571  		}
 27572  		i7 := x7.AuxInt
 27573  		if x7.Aux != s {
 27574  			break
 27575  		}
 27576  		_ = x7.Args[1]
 27577  		if p != x7.Args[0] {
 27578  			break
 27579  		}
 27580  		if mem != x7.Args[1] {
 27581  			break
 27582  		}
 27583  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27584  			break
 27585  		}
 27586  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27587  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27588  		v.reset(OpCopy)
 27589  		v.AddArg(v0)
 27590  		v0.AuxInt = i0
 27591  		v0.Aux = s
 27592  		v0.AddArg(p)
 27593  		v0.AddArg(mem)
 27594  		return true
 27595  	}
 27596  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27597  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27598  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27599  	for {
 27600  		t := v.Type
 27601  		_ = v.Args[1]
 27602  		o5 := v.Args[0]
 27603  		if o5.Op != OpPPC64OR {
 27604  			break
 27605  		}
 27606  		if o5.Type != t {
 27607  			break
 27608  		}
 27609  		_ = o5.Args[1]
 27610  		s5 := o5.Args[0]
 27611  		if s5.Op != OpPPC64SLDconst {
 27612  			break
 27613  		}
 27614  		if s5.AuxInt != 48 {
 27615  			break
 27616  		}
 27617  		x6 := s5.Args[0]
 27618  		if x6.Op != OpPPC64MOVBZload {
 27619  			break
 27620  		}
 27621  		i6 := x6.AuxInt
 27622  		s := x6.Aux
 27623  		_ = x6.Args[1]
 27624  		p := x6.Args[0]
 27625  		mem := x6.Args[1]
 27626  		o4 := o5.Args[1]
 27627  		if o4.Op != OpPPC64OR {
 27628  			break
 27629  		}
 27630  		if o4.Type != t {
 27631  			break
 27632  		}
 27633  		_ = o4.Args[1]
 27634  		s4 := o4.Args[0]
 27635  		if s4.Op != OpPPC64SLDconst {
 27636  			break
 27637  		}
 27638  		if s4.AuxInt != 40 {
 27639  			break
 27640  		}
 27641  		x5 := s4.Args[0]
 27642  		if x5.Op != OpPPC64MOVBZload {
 27643  			break
 27644  		}
 27645  		i5 := x5.AuxInt
 27646  		if x5.Aux != s {
 27647  			break
 27648  		}
 27649  		_ = x5.Args[1]
 27650  		if p != x5.Args[0] {
 27651  			break
 27652  		}
 27653  		if mem != x5.Args[1] {
 27654  			break
 27655  		}
 27656  		o3 := o4.Args[1]
 27657  		if o3.Op != OpPPC64OR {
 27658  			break
 27659  		}
 27660  		if o3.Type != t {
 27661  			break
 27662  		}
 27663  		_ = o3.Args[1]
 27664  		o2 := o3.Args[0]
 27665  		if o2.Op != OpPPC64OR {
 27666  			break
 27667  		}
 27668  		if o2.Type != t {
 27669  			break
 27670  		}
 27671  		_ = o2.Args[1]
 27672  		o1 := o2.Args[0]
 27673  		if o1.Op != OpPPC64OR {
 27674  			break
 27675  		}
 27676  		if o1.Type != t {
 27677  			break
 27678  		}
 27679  		_ = o1.Args[1]
 27680  		s1 := o1.Args[0]
 27681  		if s1.Op != OpPPC64SLDconst {
 27682  			break
 27683  		}
 27684  		if s1.AuxInt != 16 {
 27685  			break
 27686  		}
 27687  		x2 := s1.Args[0]
 27688  		if x2.Op != OpPPC64MOVBZload {
 27689  			break
 27690  		}
 27691  		i2 := x2.AuxInt
 27692  		if x2.Aux != s {
 27693  			break
 27694  		}
 27695  		_ = x2.Args[1]
 27696  		if p != x2.Args[0] {
 27697  			break
 27698  		}
 27699  		if mem != x2.Args[1] {
 27700  			break
 27701  		}
 27702  		o0 := o1.Args[1]
 27703  		if o0.Op != OpPPC64OR {
 27704  			break
 27705  		}
 27706  		if o0.Type != t {
 27707  			break
 27708  		}
 27709  		_ = o0.Args[1]
 27710  		x0 := o0.Args[0]
 27711  		if x0.Op != OpPPC64MOVBZload {
 27712  			break
 27713  		}
 27714  		i0 := x0.AuxInt
 27715  		if x0.Aux != s {
 27716  			break
 27717  		}
 27718  		_ = x0.Args[1]
 27719  		if p != x0.Args[0] {
 27720  			break
 27721  		}
 27722  		if mem != x0.Args[1] {
 27723  			break
 27724  		}
 27725  		s0 := o0.Args[1]
 27726  		if s0.Op != OpPPC64SLDconst {
 27727  			break
 27728  		}
 27729  		if s0.AuxInt != 8 {
 27730  			break
 27731  		}
 27732  		x1 := s0.Args[0]
 27733  		if x1.Op != OpPPC64MOVBZload {
 27734  			break
 27735  		}
 27736  		i1 := x1.AuxInt
 27737  		if x1.Aux != s {
 27738  			break
 27739  		}
 27740  		_ = x1.Args[1]
 27741  		if p != x1.Args[0] {
 27742  			break
 27743  		}
 27744  		if mem != x1.Args[1] {
 27745  			break
 27746  		}
 27747  		s2 := o2.Args[1]
 27748  		if s2.Op != OpPPC64SLDconst {
 27749  			break
 27750  		}
 27751  		if s2.AuxInt != 24 {
 27752  			break
 27753  		}
 27754  		x3 := s2.Args[0]
 27755  		if x3.Op != OpPPC64MOVBZload {
 27756  			break
 27757  		}
 27758  		i3 := x3.AuxInt
 27759  		if x3.Aux != s {
 27760  			break
 27761  		}
 27762  		_ = x3.Args[1]
 27763  		if p != x3.Args[0] {
 27764  			break
 27765  		}
 27766  		if mem != x3.Args[1] {
 27767  			break
 27768  		}
 27769  		s3 := o3.Args[1]
 27770  		if s3.Op != OpPPC64SLDconst {
 27771  			break
 27772  		}
 27773  		if s3.AuxInt != 32 {
 27774  			break
 27775  		}
 27776  		x4 := s3.Args[0]
 27777  		if x4.Op != OpPPC64MOVBZload {
 27778  			break
 27779  		}
 27780  		i4 := x4.AuxInt
 27781  		if x4.Aux != s {
 27782  			break
 27783  		}
 27784  		_ = x4.Args[1]
 27785  		if p != x4.Args[0] {
 27786  			break
 27787  		}
 27788  		if mem != x4.Args[1] {
 27789  			break
 27790  		}
 27791  		s6 := v.Args[1]
 27792  		if s6.Op != OpPPC64SLDconst {
 27793  			break
 27794  		}
 27795  		if s6.AuxInt != 56 {
 27796  			break
 27797  		}
 27798  		x7 := s6.Args[0]
 27799  		if x7.Op != OpPPC64MOVBZload {
 27800  			break
 27801  		}
 27802  		i7 := x7.AuxInt
 27803  		if x7.Aux != s {
 27804  			break
 27805  		}
 27806  		_ = x7.Args[1]
 27807  		if p != x7.Args[0] {
 27808  			break
 27809  		}
 27810  		if mem != x7.Args[1] {
 27811  			break
 27812  		}
 27813  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27814  			break
 27815  		}
 27816  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27817  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27818  		v.reset(OpCopy)
 27819  		v.AddArg(v0)
 27820  		v0.AuxInt = i0
 27821  		v0.Aux = s
 27822  		v0.AddArg(p)
 27823  		v0.AddArg(mem)
 27824  		return true
 27825  	}
 27826  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27827  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27828  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27829  	for {
 27830  		t := v.Type
 27831  		_ = v.Args[1]
 27832  		o5 := v.Args[0]
 27833  		if o5.Op != OpPPC64OR {
 27834  			break
 27835  		}
 27836  		if o5.Type != t {
 27837  			break
 27838  		}
 27839  		_ = o5.Args[1]
 27840  		s5 := o5.Args[0]
 27841  		if s5.Op != OpPPC64SLDconst {
 27842  			break
 27843  		}
 27844  		if s5.AuxInt != 48 {
 27845  			break
 27846  		}
 27847  		x6 := s5.Args[0]
 27848  		if x6.Op != OpPPC64MOVBZload {
 27849  			break
 27850  		}
 27851  		i6 := x6.AuxInt
 27852  		s := x6.Aux
 27853  		_ = x6.Args[1]
 27854  		p := x6.Args[0]
 27855  		mem := x6.Args[1]
 27856  		o4 := o5.Args[1]
 27857  		if o4.Op != OpPPC64OR {
 27858  			break
 27859  		}
 27860  		if o4.Type != t {
 27861  			break
 27862  		}
 27863  		_ = o4.Args[1]
 27864  		s4 := o4.Args[0]
 27865  		if s4.Op != OpPPC64SLDconst {
 27866  			break
 27867  		}
 27868  		if s4.AuxInt != 40 {
 27869  			break
 27870  		}
 27871  		x5 := s4.Args[0]
 27872  		if x5.Op != OpPPC64MOVBZload {
 27873  			break
 27874  		}
 27875  		i5 := x5.AuxInt
 27876  		if x5.Aux != s {
 27877  			break
 27878  		}
 27879  		_ = x5.Args[1]
 27880  		if p != x5.Args[0] {
 27881  			break
 27882  		}
 27883  		if mem != x5.Args[1] {
 27884  			break
 27885  		}
 27886  		o3 := o4.Args[1]
 27887  		if o3.Op != OpPPC64OR {
 27888  			break
 27889  		}
 27890  		if o3.Type != t {
 27891  			break
 27892  		}
 27893  		_ = o3.Args[1]
 27894  		o2 := o3.Args[0]
 27895  		if o2.Op != OpPPC64OR {
 27896  			break
 27897  		}
 27898  		if o2.Type != t {
 27899  			break
 27900  		}
 27901  		_ = o2.Args[1]
 27902  		o1 := o2.Args[0]
 27903  		if o1.Op != OpPPC64OR {
 27904  			break
 27905  		}
 27906  		if o1.Type != t {
 27907  			break
 27908  		}
 27909  		_ = o1.Args[1]
 27910  		o0 := o1.Args[0]
 27911  		if o0.Op != OpPPC64OR {
 27912  			break
 27913  		}
 27914  		if o0.Type != t {
 27915  			break
 27916  		}
 27917  		_ = o0.Args[1]
 27918  		s0 := o0.Args[0]
 27919  		if s0.Op != OpPPC64SLDconst {
 27920  			break
 27921  		}
 27922  		if s0.AuxInt != 8 {
 27923  			break
 27924  		}
 27925  		x1 := s0.Args[0]
 27926  		if x1.Op != OpPPC64MOVBZload {
 27927  			break
 27928  		}
 27929  		i1 := x1.AuxInt
 27930  		if x1.Aux != s {
 27931  			break
 27932  		}
 27933  		_ = x1.Args[1]
 27934  		if p != x1.Args[0] {
 27935  			break
 27936  		}
 27937  		if mem != x1.Args[1] {
 27938  			break
 27939  		}
 27940  		x0 := o0.Args[1]
 27941  		if x0.Op != OpPPC64MOVBZload {
 27942  			break
 27943  		}
 27944  		i0 := x0.AuxInt
 27945  		if x0.Aux != s {
 27946  			break
 27947  		}
 27948  		_ = x0.Args[1]
 27949  		if p != x0.Args[0] {
 27950  			break
 27951  		}
 27952  		if mem != x0.Args[1] {
 27953  			break
 27954  		}
 27955  		s1 := o1.Args[1]
 27956  		if s1.Op != OpPPC64SLDconst {
 27957  			break
 27958  		}
 27959  		if s1.AuxInt != 16 {
 27960  			break
 27961  		}
 27962  		x2 := s1.Args[0]
 27963  		if x2.Op != OpPPC64MOVBZload {
 27964  			break
 27965  		}
 27966  		i2 := x2.AuxInt
 27967  		if x2.Aux != s {
 27968  			break
 27969  		}
 27970  		_ = x2.Args[1]
 27971  		if p != x2.Args[0] {
 27972  			break
 27973  		}
 27974  		if mem != x2.Args[1] {
 27975  			break
 27976  		}
 27977  		s2 := o2.Args[1]
 27978  		if s2.Op != OpPPC64SLDconst {
 27979  			break
 27980  		}
 27981  		if s2.AuxInt != 24 {
 27982  			break
 27983  		}
 27984  		x3 := s2.Args[0]
 27985  		if x3.Op != OpPPC64MOVBZload {
 27986  			break
 27987  		}
 27988  		i3 := x3.AuxInt
 27989  		if x3.Aux != s {
 27990  			break
 27991  		}
 27992  		_ = x3.Args[1]
 27993  		if p != x3.Args[0] {
 27994  			break
 27995  		}
 27996  		if mem != x3.Args[1] {
 27997  			break
 27998  		}
 27999  		s3 := o3.Args[1]
 28000  		if s3.Op != OpPPC64SLDconst {
 28001  			break
 28002  		}
 28003  		if s3.AuxInt != 32 {
 28004  			break
 28005  		}
 28006  		x4 := s3.Args[0]
 28007  		if x4.Op != OpPPC64MOVBZload {
 28008  			break
 28009  		}
 28010  		i4 := x4.AuxInt
 28011  		if x4.Aux != s {
 28012  			break
 28013  		}
 28014  		_ = x4.Args[1]
 28015  		if p != x4.Args[0] {
 28016  			break
 28017  		}
 28018  		if mem != x4.Args[1] {
 28019  			break
 28020  		}
 28021  		s6 := v.Args[1]
 28022  		if s6.Op != OpPPC64SLDconst {
 28023  			break
 28024  		}
 28025  		if s6.AuxInt != 56 {
 28026  			break
 28027  		}
 28028  		x7 := s6.Args[0]
 28029  		if x7.Op != OpPPC64MOVBZload {
 28030  			break
 28031  		}
 28032  		i7 := x7.AuxInt
 28033  		if x7.Aux != s {
 28034  			break
 28035  		}
 28036  		_ = x7.Args[1]
 28037  		if p != x7.Args[0] {
 28038  			break
 28039  		}
 28040  		if mem != x7.Args[1] {
 28041  			break
 28042  		}
 28043  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28044  			break
 28045  		}
 28046  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28047  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28048  		v.reset(OpCopy)
 28049  		v.AddArg(v0)
 28050  		v0.AuxInt = i0
 28051  		v0.Aux = s
 28052  		v0.AddArg(p)
 28053  		v0.AddArg(mem)
 28054  		return true
 28055  	}
 28056  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28057  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28058  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28059  	for {
 28060  		t := v.Type
 28061  		_ = v.Args[1]
 28062  		o5 := v.Args[0]
 28063  		if o5.Op != OpPPC64OR {
 28064  			break
 28065  		}
 28066  		if o5.Type != t {
 28067  			break
 28068  		}
 28069  		_ = o5.Args[1]
 28070  		s5 := o5.Args[0]
 28071  		if s5.Op != OpPPC64SLDconst {
 28072  			break
 28073  		}
 28074  		if s5.AuxInt != 48 {
 28075  			break
 28076  		}
 28077  		x6 := s5.Args[0]
 28078  		if x6.Op != OpPPC64MOVBZload {
 28079  			break
 28080  		}
 28081  		i6 := x6.AuxInt
 28082  		s := x6.Aux
 28083  		_ = x6.Args[1]
 28084  		p := x6.Args[0]
 28085  		mem := x6.Args[1]
 28086  		o4 := o5.Args[1]
 28087  		if o4.Op != OpPPC64OR {
 28088  			break
 28089  		}
 28090  		if o4.Type != t {
 28091  			break
 28092  		}
 28093  		_ = o4.Args[1]
 28094  		s4 := o4.Args[0]
 28095  		if s4.Op != OpPPC64SLDconst {
 28096  			break
 28097  		}
 28098  		if s4.AuxInt != 40 {
 28099  			break
 28100  		}
 28101  		x5 := s4.Args[0]
 28102  		if x5.Op != OpPPC64MOVBZload {
 28103  			break
 28104  		}
 28105  		i5 := x5.AuxInt
 28106  		if x5.Aux != s {
 28107  			break
 28108  		}
 28109  		_ = x5.Args[1]
 28110  		if p != x5.Args[0] {
 28111  			break
 28112  		}
 28113  		if mem != x5.Args[1] {
 28114  			break
 28115  		}
 28116  		o3 := o4.Args[1]
 28117  		if o3.Op != OpPPC64OR {
 28118  			break
 28119  		}
 28120  		if o3.Type != t {
 28121  			break
 28122  		}
 28123  		_ = o3.Args[1]
 28124  		o2 := o3.Args[0]
 28125  		if o2.Op != OpPPC64OR {
 28126  			break
 28127  		}
 28128  		if o2.Type != t {
 28129  			break
 28130  		}
 28131  		_ = o2.Args[1]
 28132  		o1 := o2.Args[0]
 28133  		if o1.Op != OpPPC64OR {
 28134  			break
 28135  		}
 28136  		if o1.Type != t {
 28137  			break
 28138  		}
 28139  		_ = o1.Args[1]
 28140  		o0 := o1.Args[0]
 28141  		if o0.Op != OpPPC64OR {
 28142  			break
 28143  		}
 28144  		if o0.Type != t {
 28145  			break
 28146  		}
 28147  		_ = o0.Args[1]
 28148  		x0 := o0.Args[0]
 28149  		if x0.Op != OpPPC64MOVBZload {
 28150  			break
 28151  		}
 28152  		i0 := x0.AuxInt
 28153  		if x0.Aux != s {
 28154  			break
 28155  		}
 28156  		_ = x0.Args[1]
 28157  		if p != x0.Args[0] {
 28158  			break
 28159  		}
 28160  		if mem != x0.Args[1] {
 28161  			break
 28162  		}
 28163  		s0 := o0.Args[1]
 28164  		if s0.Op != OpPPC64SLDconst {
 28165  			break
 28166  		}
 28167  		if s0.AuxInt != 8 {
 28168  			break
 28169  		}
 28170  		x1 := s0.Args[0]
 28171  		if x1.Op != OpPPC64MOVBZload {
 28172  			break
 28173  		}
 28174  		i1 := x1.AuxInt
 28175  		if x1.Aux != s {
 28176  			break
 28177  		}
 28178  		_ = x1.Args[1]
 28179  		if p != x1.Args[0] {
 28180  			break
 28181  		}
 28182  		if mem != x1.Args[1] {
 28183  			break
 28184  		}
 28185  		s1 := o1.Args[1]
 28186  		if s1.Op != OpPPC64SLDconst {
 28187  			break
 28188  		}
 28189  		if s1.AuxInt != 16 {
 28190  			break
 28191  		}
 28192  		x2 := s1.Args[0]
 28193  		if x2.Op != OpPPC64MOVBZload {
 28194  			break
 28195  		}
 28196  		i2 := x2.AuxInt
 28197  		if x2.Aux != s {
 28198  			break
 28199  		}
 28200  		_ = x2.Args[1]
 28201  		if p != x2.Args[0] {
 28202  			break
 28203  		}
 28204  		if mem != x2.Args[1] {
 28205  			break
 28206  		}
 28207  		s2 := o2.Args[1]
 28208  		if s2.Op != OpPPC64SLDconst {
 28209  			break
 28210  		}
 28211  		if s2.AuxInt != 24 {
 28212  			break
 28213  		}
 28214  		x3 := s2.Args[0]
 28215  		if x3.Op != OpPPC64MOVBZload {
 28216  			break
 28217  		}
 28218  		i3 := x3.AuxInt
 28219  		if x3.Aux != s {
 28220  			break
 28221  		}
 28222  		_ = x3.Args[1]
 28223  		if p != x3.Args[0] {
 28224  			break
 28225  		}
 28226  		if mem != x3.Args[1] {
 28227  			break
 28228  		}
 28229  		s3 := o3.Args[1]
 28230  		if s3.Op != OpPPC64SLDconst {
 28231  			break
 28232  		}
 28233  		if s3.AuxInt != 32 {
 28234  			break
 28235  		}
 28236  		x4 := s3.Args[0]
 28237  		if x4.Op != OpPPC64MOVBZload {
 28238  			break
 28239  		}
 28240  		i4 := x4.AuxInt
 28241  		if x4.Aux != s {
 28242  			break
 28243  		}
 28244  		_ = x4.Args[1]
 28245  		if p != x4.Args[0] {
 28246  			break
 28247  		}
 28248  		if mem != x4.Args[1] {
 28249  			break
 28250  		}
 28251  		s6 := v.Args[1]
 28252  		if s6.Op != OpPPC64SLDconst {
 28253  			break
 28254  		}
 28255  		if s6.AuxInt != 56 {
 28256  			break
 28257  		}
 28258  		x7 := s6.Args[0]
 28259  		if x7.Op != OpPPC64MOVBZload {
 28260  			break
 28261  		}
 28262  		i7 := x7.AuxInt
 28263  		if x7.Aux != s {
 28264  			break
 28265  		}
 28266  		_ = x7.Args[1]
 28267  		if p != x7.Args[0] {
 28268  			break
 28269  		}
 28270  		if mem != x7.Args[1] {
 28271  			break
 28272  		}
 28273  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28274  			break
 28275  		}
 28276  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28277  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28278  		v.reset(OpCopy)
 28279  		v.AddArg(v0)
 28280  		v0.AuxInt = i0
 28281  		v0.Aux = s
 28282  		v0.AddArg(p)
 28283  		v0.AddArg(mem)
 28284  		return true
 28285  	}
 28286  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28287  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28288  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28289  	for {
 28290  		t := v.Type
 28291  		_ = v.Args[1]
 28292  		o5 := v.Args[0]
 28293  		if o5.Op != OpPPC64OR {
 28294  			break
 28295  		}
 28296  		if o5.Type != t {
 28297  			break
 28298  		}
 28299  		_ = o5.Args[1]
 28300  		s5 := o5.Args[0]
 28301  		if s5.Op != OpPPC64SLDconst {
 28302  			break
 28303  		}
 28304  		if s5.AuxInt != 48 {
 28305  			break
 28306  		}
 28307  		x6 := s5.Args[0]
 28308  		if x6.Op != OpPPC64MOVBZload {
 28309  			break
 28310  		}
 28311  		i6 := x6.AuxInt
 28312  		s := x6.Aux
 28313  		_ = x6.Args[1]
 28314  		p := x6.Args[0]
 28315  		mem := x6.Args[1]
 28316  		o4 := o5.Args[1]
 28317  		if o4.Op != OpPPC64OR {
 28318  			break
 28319  		}
 28320  		if o4.Type != t {
 28321  			break
 28322  		}
 28323  		_ = o4.Args[1]
 28324  		o3 := o4.Args[0]
 28325  		if o3.Op != OpPPC64OR {
 28326  			break
 28327  		}
 28328  		if o3.Type != t {
 28329  			break
 28330  		}
 28331  		_ = o3.Args[1]
 28332  		s3 := o3.Args[0]
 28333  		if s3.Op != OpPPC64SLDconst {
 28334  			break
 28335  		}
 28336  		if s3.AuxInt != 32 {
 28337  			break
 28338  		}
 28339  		x4 := s3.Args[0]
 28340  		if x4.Op != OpPPC64MOVBZload {
 28341  			break
 28342  		}
 28343  		i4 := x4.AuxInt
 28344  		if x4.Aux != s {
 28345  			break
 28346  		}
 28347  		_ = x4.Args[1]
 28348  		if p != x4.Args[0] {
 28349  			break
 28350  		}
 28351  		if mem != x4.Args[1] {
 28352  			break
 28353  		}
 28354  		o2 := o3.Args[1]
 28355  		if o2.Op != OpPPC64OR {
 28356  			break
 28357  		}
 28358  		if o2.Type != t {
 28359  			break
 28360  		}
 28361  		_ = o2.Args[1]
 28362  		s2 := o2.Args[0]
 28363  		if s2.Op != OpPPC64SLDconst {
 28364  			break
 28365  		}
 28366  		if s2.AuxInt != 24 {
 28367  			break
 28368  		}
 28369  		x3 := s2.Args[0]
 28370  		if x3.Op != OpPPC64MOVBZload {
 28371  			break
 28372  		}
 28373  		i3 := x3.AuxInt
 28374  		if x3.Aux != s {
 28375  			break
 28376  		}
 28377  		_ = x3.Args[1]
 28378  		if p != x3.Args[0] {
 28379  			break
 28380  		}
 28381  		if mem != x3.Args[1] {
 28382  			break
 28383  		}
 28384  		o1 := o2.Args[1]
 28385  		if o1.Op != OpPPC64OR {
 28386  			break
 28387  		}
 28388  		if o1.Type != t {
 28389  			break
 28390  		}
 28391  		_ = o1.Args[1]
 28392  		s1 := o1.Args[0]
 28393  		if s1.Op != OpPPC64SLDconst {
 28394  			break
 28395  		}
 28396  		if s1.AuxInt != 16 {
 28397  			break
 28398  		}
 28399  		x2 := s1.Args[0]
 28400  		if x2.Op != OpPPC64MOVBZload {
 28401  			break
 28402  		}
 28403  		i2 := x2.AuxInt
 28404  		if x2.Aux != s {
 28405  			break
 28406  		}
 28407  		_ = x2.Args[1]
 28408  		if p != x2.Args[0] {
 28409  			break
 28410  		}
 28411  		if mem != x2.Args[1] {
 28412  			break
 28413  		}
 28414  		o0 := o1.Args[1]
 28415  		if o0.Op != OpPPC64OR {
 28416  			break
 28417  		}
 28418  		if o0.Type != t {
 28419  			break
 28420  		}
 28421  		_ = o0.Args[1]
 28422  		s0 := o0.Args[0]
 28423  		if s0.Op != OpPPC64SLDconst {
 28424  			break
 28425  		}
 28426  		if s0.AuxInt != 8 {
 28427  			break
 28428  		}
 28429  		x1 := s0.Args[0]
 28430  		if x1.Op != OpPPC64MOVBZload {
 28431  			break
 28432  		}
 28433  		i1 := x1.AuxInt
 28434  		if x1.Aux != s {
 28435  			break
 28436  		}
 28437  		_ = x1.Args[1]
 28438  		if p != x1.Args[0] {
 28439  			break
 28440  		}
 28441  		if mem != x1.Args[1] {
 28442  			break
 28443  		}
 28444  		x0 := o0.Args[1]
 28445  		if x0.Op != OpPPC64MOVBZload {
 28446  			break
 28447  		}
 28448  		i0 := x0.AuxInt
 28449  		if x0.Aux != s {
 28450  			break
 28451  		}
 28452  		_ = x0.Args[1]
 28453  		if p != x0.Args[0] {
 28454  			break
 28455  		}
 28456  		if mem != x0.Args[1] {
 28457  			break
 28458  		}
 28459  		s4 := o4.Args[1]
 28460  		if s4.Op != OpPPC64SLDconst {
 28461  			break
 28462  		}
 28463  		if s4.AuxInt != 40 {
 28464  			break
 28465  		}
 28466  		x5 := s4.Args[0]
 28467  		if x5.Op != OpPPC64MOVBZload {
 28468  			break
 28469  		}
 28470  		i5 := x5.AuxInt
 28471  		if x5.Aux != s {
 28472  			break
 28473  		}
 28474  		_ = x5.Args[1]
 28475  		if p != x5.Args[0] {
 28476  			break
 28477  		}
 28478  		if mem != x5.Args[1] {
 28479  			break
 28480  		}
 28481  		s6 := v.Args[1]
 28482  		if s6.Op != OpPPC64SLDconst {
 28483  			break
 28484  		}
 28485  		if s6.AuxInt != 56 {
 28486  			break
 28487  		}
 28488  		x7 := s6.Args[0]
 28489  		if x7.Op != OpPPC64MOVBZload {
 28490  			break
 28491  		}
 28492  		i7 := x7.AuxInt
 28493  		if x7.Aux != s {
 28494  			break
 28495  		}
 28496  		_ = x7.Args[1]
 28497  		if p != x7.Args[0] {
 28498  			break
 28499  		}
 28500  		if mem != x7.Args[1] {
 28501  			break
 28502  		}
 28503  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28504  			break
 28505  		}
 28506  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28507  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28508  		v.reset(OpCopy)
 28509  		v.AddArg(v0)
 28510  		v0.AuxInt = i0
 28511  		v0.Aux = s
 28512  		v0.AddArg(p)
 28513  		v0.AddArg(mem)
 28514  		return true
 28515  	}
 28516  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28517  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28518  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28519  	for {
 28520  		t := v.Type
 28521  		_ = v.Args[1]
 28522  		o5 := v.Args[0]
 28523  		if o5.Op != OpPPC64OR {
 28524  			break
 28525  		}
 28526  		if o5.Type != t {
 28527  			break
 28528  		}
 28529  		_ = o5.Args[1]
 28530  		s5 := o5.Args[0]
 28531  		if s5.Op != OpPPC64SLDconst {
 28532  			break
 28533  		}
 28534  		if s5.AuxInt != 48 {
 28535  			break
 28536  		}
 28537  		x6 := s5.Args[0]
 28538  		if x6.Op != OpPPC64MOVBZload {
 28539  			break
 28540  		}
 28541  		i6 := x6.AuxInt
 28542  		s := x6.Aux
 28543  		_ = x6.Args[1]
 28544  		p := x6.Args[0]
 28545  		mem := x6.Args[1]
 28546  		o4 := o5.Args[1]
 28547  		if o4.Op != OpPPC64OR {
 28548  			break
 28549  		}
 28550  		if o4.Type != t {
 28551  			break
 28552  		}
 28553  		_ = o4.Args[1]
 28554  		o3 := o4.Args[0]
 28555  		if o3.Op != OpPPC64OR {
 28556  			break
 28557  		}
 28558  		if o3.Type != t {
 28559  			break
 28560  		}
 28561  		_ = o3.Args[1]
 28562  		s3 := o3.Args[0]
 28563  		if s3.Op != OpPPC64SLDconst {
 28564  			break
 28565  		}
 28566  		if s3.AuxInt != 32 {
 28567  			break
 28568  		}
 28569  		x4 := s3.Args[0]
 28570  		if x4.Op != OpPPC64MOVBZload {
 28571  			break
 28572  		}
 28573  		i4 := x4.AuxInt
 28574  		if x4.Aux != s {
 28575  			break
 28576  		}
 28577  		_ = x4.Args[1]
 28578  		if p != x4.Args[0] {
 28579  			break
 28580  		}
 28581  		if mem != x4.Args[1] {
 28582  			break
 28583  		}
 28584  		o2 := o3.Args[1]
 28585  		if o2.Op != OpPPC64OR {
 28586  			break
 28587  		}
 28588  		if o2.Type != t {
 28589  			break
 28590  		}
 28591  		_ = o2.Args[1]
 28592  		s2 := o2.Args[0]
 28593  		if s2.Op != OpPPC64SLDconst {
 28594  			break
 28595  		}
 28596  		if s2.AuxInt != 24 {
 28597  			break
 28598  		}
 28599  		x3 := s2.Args[0]
 28600  		if x3.Op != OpPPC64MOVBZload {
 28601  			break
 28602  		}
 28603  		i3 := x3.AuxInt
 28604  		if x3.Aux != s {
 28605  			break
 28606  		}
 28607  		_ = x3.Args[1]
 28608  		if p != x3.Args[0] {
 28609  			break
 28610  		}
 28611  		if mem != x3.Args[1] {
 28612  			break
 28613  		}
 28614  		o1 := o2.Args[1]
 28615  		if o1.Op != OpPPC64OR {
 28616  			break
 28617  		}
 28618  		if o1.Type != t {
 28619  			break
 28620  		}
 28621  		_ = o1.Args[1]
 28622  		s1 := o1.Args[0]
 28623  		if s1.Op != OpPPC64SLDconst {
 28624  			break
 28625  		}
 28626  		if s1.AuxInt != 16 {
 28627  			break
 28628  		}
 28629  		x2 := s1.Args[0]
 28630  		if x2.Op != OpPPC64MOVBZload {
 28631  			break
 28632  		}
 28633  		i2 := x2.AuxInt
 28634  		if x2.Aux != s {
 28635  			break
 28636  		}
 28637  		_ = x2.Args[1]
 28638  		if p != x2.Args[0] {
 28639  			break
 28640  		}
 28641  		if mem != x2.Args[1] {
 28642  			break
 28643  		}
 28644  		o0 := o1.Args[1]
 28645  		if o0.Op != OpPPC64OR {
 28646  			break
 28647  		}
 28648  		if o0.Type != t {
 28649  			break
 28650  		}
 28651  		_ = o0.Args[1]
 28652  		x0 := o0.Args[0]
 28653  		if x0.Op != OpPPC64MOVBZload {
 28654  			break
 28655  		}
 28656  		i0 := x0.AuxInt
 28657  		if x0.Aux != s {
 28658  			break
 28659  		}
 28660  		_ = x0.Args[1]
 28661  		if p != x0.Args[0] {
 28662  			break
 28663  		}
 28664  		if mem != x0.Args[1] {
 28665  			break
 28666  		}
 28667  		s0 := o0.Args[1]
 28668  		if s0.Op != OpPPC64SLDconst {
 28669  			break
 28670  		}
 28671  		if s0.AuxInt != 8 {
 28672  			break
 28673  		}
 28674  		x1 := s0.Args[0]
 28675  		if x1.Op != OpPPC64MOVBZload {
 28676  			break
 28677  		}
 28678  		i1 := x1.AuxInt
 28679  		if x1.Aux != s {
 28680  			break
 28681  		}
 28682  		_ = x1.Args[1]
 28683  		if p != x1.Args[0] {
 28684  			break
 28685  		}
 28686  		if mem != x1.Args[1] {
 28687  			break
 28688  		}
 28689  		s4 := o4.Args[1]
 28690  		if s4.Op != OpPPC64SLDconst {
 28691  			break
 28692  		}
 28693  		if s4.AuxInt != 40 {
 28694  			break
 28695  		}
 28696  		x5 := s4.Args[0]
 28697  		if x5.Op != OpPPC64MOVBZload {
 28698  			break
 28699  		}
 28700  		i5 := x5.AuxInt
 28701  		if x5.Aux != s {
 28702  			break
 28703  		}
 28704  		_ = x5.Args[1]
 28705  		if p != x5.Args[0] {
 28706  			break
 28707  		}
 28708  		if mem != x5.Args[1] {
 28709  			break
 28710  		}
 28711  		s6 := v.Args[1]
 28712  		if s6.Op != OpPPC64SLDconst {
 28713  			break
 28714  		}
 28715  		if s6.AuxInt != 56 {
 28716  			break
 28717  		}
 28718  		x7 := s6.Args[0]
 28719  		if x7.Op != OpPPC64MOVBZload {
 28720  			break
 28721  		}
 28722  		i7 := x7.AuxInt
 28723  		if x7.Aux != s {
 28724  			break
 28725  		}
 28726  		_ = x7.Args[1]
 28727  		if p != x7.Args[0] {
 28728  			break
 28729  		}
 28730  		if mem != x7.Args[1] {
 28731  			break
 28732  		}
 28733  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28734  			break
 28735  		}
 28736  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28737  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28738  		v.reset(OpCopy)
 28739  		v.AddArg(v0)
 28740  		v0.AuxInt = i0
 28741  		v0.Aux = s
 28742  		v0.AddArg(p)
 28743  		v0.AddArg(mem)
 28744  		return true
 28745  	}
 28746  	return false
 28747  }
 28748  func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
 28749  	b := v.Block
 28750  	_ = b
 28751  	config := b.Func.Config
 28752  	_ = config
 28753  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28754  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28755  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28756  	for {
 28757  		t := v.Type
 28758  		_ = v.Args[1]
 28759  		o5 := v.Args[0]
 28760  		if o5.Op != OpPPC64OR {
 28761  			break
 28762  		}
 28763  		if o5.Type != t {
 28764  			break
 28765  		}
 28766  		_ = o5.Args[1]
 28767  		s5 := o5.Args[0]
 28768  		if s5.Op != OpPPC64SLDconst {
 28769  			break
 28770  		}
 28771  		if s5.AuxInt != 48 {
 28772  			break
 28773  		}
 28774  		x6 := s5.Args[0]
 28775  		if x6.Op != OpPPC64MOVBZload {
 28776  			break
 28777  		}
 28778  		i6 := x6.AuxInt
 28779  		s := x6.Aux
 28780  		_ = x6.Args[1]
 28781  		p := x6.Args[0]
 28782  		mem := x6.Args[1]
 28783  		o4 := o5.Args[1]
 28784  		if o4.Op != OpPPC64OR {
 28785  			break
 28786  		}
 28787  		if o4.Type != t {
 28788  			break
 28789  		}
 28790  		_ = o4.Args[1]
 28791  		o3 := o4.Args[0]
 28792  		if o3.Op != OpPPC64OR {
 28793  			break
 28794  		}
 28795  		if o3.Type != t {
 28796  			break
 28797  		}
 28798  		_ = o3.Args[1]
 28799  		s3 := o3.Args[0]
 28800  		if s3.Op != OpPPC64SLDconst {
 28801  			break
 28802  		}
 28803  		if s3.AuxInt != 32 {
 28804  			break
 28805  		}
 28806  		x4 := s3.Args[0]
 28807  		if x4.Op != OpPPC64MOVBZload {
 28808  			break
 28809  		}
 28810  		i4 := x4.AuxInt
 28811  		if x4.Aux != s {
 28812  			break
 28813  		}
 28814  		_ = x4.Args[1]
 28815  		if p != x4.Args[0] {
 28816  			break
 28817  		}
 28818  		if mem != x4.Args[1] {
 28819  			break
 28820  		}
 28821  		o2 := o3.Args[1]
 28822  		if o2.Op != OpPPC64OR {
 28823  			break
 28824  		}
 28825  		if o2.Type != t {
 28826  			break
 28827  		}
 28828  		_ = o2.Args[1]
 28829  		s2 := o2.Args[0]
 28830  		if s2.Op != OpPPC64SLDconst {
 28831  			break
 28832  		}
 28833  		if s2.AuxInt != 24 {
 28834  			break
 28835  		}
 28836  		x3 := s2.Args[0]
 28837  		if x3.Op != OpPPC64MOVBZload {
 28838  			break
 28839  		}
 28840  		i3 := x3.AuxInt
 28841  		if x3.Aux != s {
 28842  			break
 28843  		}
 28844  		_ = x3.Args[1]
 28845  		if p != x3.Args[0] {
 28846  			break
 28847  		}
 28848  		if mem != x3.Args[1] {
 28849  			break
 28850  		}
 28851  		o1 := o2.Args[1]
 28852  		if o1.Op != OpPPC64OR {
 28853  			break
 28854  		}
 28855  		if o1.Type != t {
 28856  			break
 28857  		}
 28858  		_ = o1.Args[1]
 28859  		o0 := o1.Args[0]
 28860  		if o0.Op != OpPPC64OR {
 28861  			break
 28862  		}
 28863  		if o0.Type != t {
 28864  			break
 28865  		}
 28866  		_ = o0.Args[1]
 28867  		s0 := o0.Args[0]
 28868  		if s0.Op != OpPPC64SLDconst {
 28869  			break
 28870  		}
 28871  		if s0.AuxInt != 8 {
 28872  			break
 28873  		}
 28874  		x1 := s0.Args[0]
 28875  		if x1.Op != OpPPC64MOVBZload {
 28876  			break
 28877  		}
 28878  		i1 := x1.AuxInt
 28879  		if x1.Aux != s {
 28880  			break
 28881  		}
 28882  		_ = x1.Args[1]
 28883  		if p != x1.Args[0] {
 28884  			break
 28885  		}
 28886  		if mem != x1.Args[1] {
 28887  			break
 28888  		}
 28889  		x0 := o0.Args[1]
 28890  		if x0.Op != OpPPC64MOVBZload {
 28891  			break
 28892  		}
 28893  		i0 := x0.AuxInt
 28894  		if x0.Aux != s {
 28895  			break
 28896  		}
 28897  		_ = x0.Args[1]
 28898  		if p != x0.Args[0] {
 28899  			break
 28900  		}
 28901  		if mem != x0.Args[1] {
 28902  			break
 28903  		}
 28904  		s1 := o1.Args[1]
 28905  		if s1.Op != OpPPC64SLDconst {
 28906  			break
 28907  		}
 28908  		if s1.AuxInt != 16 {
 28909  			break
 28910  		}
 28911  		x2 := s1.Args[0]
 28912  		if x2.Op != OpPPC64MOVBZload {
 28913  			break
 28914  		}
 28915  		i2 := x2.AuxInt
 28916  		if x2.Aux != s {
 28917  			break
 28918  		}
 28919  		_ = x2.Args[1]
 28920  		if p != x2.Args[0] {
 28921  			break
 28922  		}
 28923  		if mem != x2.Args[1] {
 28924  			break
 28925  		}
 28926  		s4 := o4.Args[1]
 28927  		if s4.Op != OpPPC64SLDconst {
 28928  			break
 28929  		}
 28930  		if s4.AuxInt != 40 {
 28931  			break
 28932  		}
 28933  		x5 := s4.Args[0]
 28934  		if x5.Op != OpPPC64MOVBZload {
 28935  			break
 28936  		}
 28937  		i5 := x5.AuxInt
 28938  		if x5.Aux != s {
 28939  			break
 28940  		}
 28941  		_ = x5.Args[1]
 28942  		if p != x5.Args[0] {
 28943  			break
 28944  		}
 28945  		if mem != x5.Args[1] {
 28946  			break
 28947  		}
 28948  		s6 := v.Args[1]
 28949  		if s6.Op != OpPPC64SLDconst {
 28950  			break
 28951  		}
 28952  		if s6.AuxInt != 56 {
 28953  			break
 28954  		}
 28955  		x7 := s6.Args[0]
 28956  		if x7.Op != OpPPC64MOVBZload {
 28957  			break
 28958  		}
 28959  		i7 := x7.AuxInt
 28960  		if x7.Aux != s {
 28961  			break
 28962  		}
 28963  		_ = x7.Args[1]
 28964  		if p != x7.Args[0] {
 28965  			break
 28966  		}
 28967  		if mem != x7.Args[1] {
 28968  			break
 28969  		}
 28970  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28971  			break
 28972  		}
 28973  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28974  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28975  		v.reset(OpCopy)
 28976  		v.AddArg(v0)
 28977  		v0.AuxInt = i0
 28978  		v0.Aux = s
 28979  		v0.AddArg(p)
 28980  		v0.AddArg(mem)
 28981  		return true
 28982  	}
 28983  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28984  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28985  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28986  	for {
 28987  		t := v.Type
 28988  		_ = v.Args[1]
 28989  		o5 := v.Args[0]
 28990  		if o5.Op != OpPPC64OR {
 28991  			break
 28992  		}
 28993  		if o5.Type != t {
 28994  			break
 28995  		}
 28996  		_ = o5.Args[1]
 28997  		s5 := o5.Args[0]
 28998  		if s5.Op != OpPPC64SLDconst {
 28999  			break
 29000  		}
 29001  		if s5.AuxInt != 48 {
 29002  			break
 29003  		}
 29004  		x6 := s5.Args[0]
 29005  		if x6.Op != OpPPC64MOVBZload {
 29006  			break
 29007  		}
 29008  		i6 := x6.AuxInt
 29009  		s := x6.Aux
 29010  		_ = x6.Args[1]
 29011  		p := x6.Args[0]
 29012  		mem := x6.Args[1]
 29013  		o4 := o5.Args[1]
 29014  		if o4.Op != OpPPC64OR {
 29015  			break
 29016  		}
 29017  		if o4.Type != t {
 29018  			break
 29019  		}
 29020  		_ = o4.Args[1]
 29021  		o3 := o4.Args[0]
 29022  		if o3.Op != OpPPC64OR {
 29023  			break
 29024  		}
 29025  		if o3.Type != t {
 29026  			break
 29027  		}
 29028  		_ = o3.Args[1]
 29029  		s3 := o3.Args[0]
 29030  		if s3.Op != OpPPC64SLDconst {
 29031  			break
 29032  		}
 29033  		if s3.AuxInt != 32 {
 29034  			break
 29035  		}
 29036  		x4 := s3.Args[0]
 29037  		if x4.Op != OpPPC64MOVBZload {
 29038  			break
 29039  		}
 29040  		i4 := x4.AuxInt
 29041  		if x4.Aux != s {
 29042  			break
 29043  		}
 29044  		_ = x4.Args[1]
 29045  		if p != x4.Args[0] {
 29046  			break
 29047  		}
 29048  		if mem != x4.Args[1] {
 29049  			break
 29050  		}
 29051  		o2 := o3.Args[1]
 29052  		if o2.Op != OpPPC64OR {
 29053  			break
 29054  		}
 29055  		if o2.Type != t {
 29056  			break
 29057  		}
 29058  		_ = o2.Args[1]
 29059  		s2 := o2.Args[0]
 29060  		if s2.Op != OpPPC64SLDconst {
 29061  			break
 29062  		}
 29063  		if s2.AuxInt != 24 {
 29064  			break
 29065  		}
 29066  		x3 := s2.Args[0]
 29067  		if x3.Op != OpPPC64MOVBZload {
 29068  			break
 29069  		}
 29070  		i3 := x3.AuxInt
 29071  		if x3.Aux != s {
 29072  			break
 29073  		}
 29074  		_ = x3.Args[1]
 29075  		if p != x3.Args[0] {
 29076  			break
 29077  		}
 29078  		if mem != x3.Args[1] {
 29079  			break
 29080  		}
 29081  		o1 := o2.Args[1]
 29082  		if o1.Op != OpPPC64OR {
 29083  			break
 29084  		}
 29085  		if o1.Type != t {
 29086  			break
 29087  		}
 29088  		_ = o1.Args[1]
 29089  		o0 := o1.Args[0]
 29090  		if o0.Op != OpPPC64OR {
 29091  			break
 29092  		}
 29093  		if o0.Type != t {
 29094  			break
 29095  		}
 29096  		_ = o0.Args[1]
 29097  		x0 := o0.Args[0]
 29098  		if x0.Op != OpPPC64MOVBZload {
 29099  			break
 29100  		}
 29101  		i0 := x0.AuxInt
 29102  		if x0.Aux != s {
 29103  			break
 29104  		}
 29105  		_ = x0.Args[1]
 29106  		if p != x0.Args[0] {
 29107  			break
 29108  		}
 29109  		if mem != x0.Args[1] {
 29110  			break
 29111  		}
 29112  		s0 := o0.Args[1]
 29113  		if s0.Op != OpPPC64SLDconst {
 29114  			break
 29115  		}
 29116  		if s0.AuxInt != 8 {
 29117  			break
 29118  		}
 29119  		x1 := s0.Args[0]
 29120  		if x1.Op != OpPPC64MOVBZload {
 29121  			break
 29122  		}
 29123  		i1 := x1.AuxInt
 29124  		if x1.Aux != s {
 29125  			break
 29126  		}
 29127  		_ = x1.Args[1]
 29128  		if p != x1.Args[0] {
 29129  			break
 29130  		}
 29131  		if mem != x1.Args[1] {
 29132  			break
 29133  		}
 29134  		s1 := o1.Args[1]
 29135  		if s1.Op != OpPPC64SLDconst {
 29136  			break
 29137  		}
 29138  		if s1.AuxInt != 16 {
 29139  			break
 29140  		}
 29141  		x2 := s1.Args[0]
 29142  		if x2.Op != OpPPC64MOVBZload {
 29143  			break
 29144  		}
 29145  		i2 := x2.AuxInt
 29146  		if x2.Aux != s {
 29147  			break
 29148  		}
 29149  		_ = x2.Args[1]
 29150  		if p != x2.Args[0] {
 29151  			break
 29152  		}
 29153  		if mem != x2.Args[1] {
 29154  			break
 29155  		}
 29156  		s4 := o4.Args[1]
 29157  		if s4.Op != OpPPC64SLDconst {
 29158  			break
 29159  		}
 29160  		if s4.AuxInt != 40 {
 29161  			break
 29162  		}
 29163  		x5 := s4.Args[0]
 29164  		if x5.Op != OpPPC64MOVBZload {
 29165  			break
 29166  		}
 29167  		i5 := x5.AuxInt
 29168  		if x5.Aux != s {
 29169  			break
 29170  		}
 29171  		_ = x5.Args[1]
 29172  		if p != x5.Args[0] {
 29173  			break
 29174  		}
 29175  		if mem != x5.Args[1] {
 29176  			break
 29177  		}
 29178  		s6 := v.Args[1]
 29179  		if s6.Op != OpPPC64SLDconst {
 29180  			break
 29181  		}
 29182  		if s6.AuxInt != 56 {
 29183  			break
 29184  		}
 29185  		x7 := s6.Args[0]
 29186  		if x7.Op != OpPPC64MOVBZload {
 29187  			break
 29188  		}
 29189  		i7 := x7.AuxInt
 29190  		if x7.Aux != s {
 29191  			break
 29192  		}
 29193  		_ = x7.Args[1]
 29194  		if p != x7.Args[0] {
 29195  			break
 29196  		}
 29197  		if mem != x7.Args[1] {
 29198  			break
 29199  		}
 29200  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29201  			break
 29202  		}
 29203  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29204  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29205  		v.reset(OpCopy)
 29206  		v.AddArg(v0)
 29207  		v0.AuxInt = i0
 29208  		v0.Aux = s
 29209  		v0.AddArg(p)
 29210  		v0.AddArg(mem)
 29211  		return true
 29212  	}
 29213  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29214  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29215  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29216  	for {
 29217  		t := v.Type
 29218  		_ = v.Args[1]
 29219  		o5 := v.Args[0]
 29220  		if o5.Op != OpPPC64OR {
 29221  			break
 29222  		}
 29223  		if o5.Type != t {
 29224  			break
 29225  		}
 29226  		_ = o5.Args[1]
 29227  		s5 := o5.Args[0]
 29228  		if s5.Op != OpPPC64SLDconst {
 29229  			break
 29230  		}
 29231  		if s5.AuxInt != 48 {
 29232  			break
 29233  		}
 29234  		x6 := s5.Args[0]
 29235  		if x6.Op != OpPPC64MOVBZload {
 29236  			break
 29237  		}
 29238  		i6 := x6.AuxInt
 29239  		s := x6.Aux
 29240  		_ = x6.Args[1]
 29241  		p := x6.Args[0]
 29242  		mem := x6.Args[1]
 29243  		o4 := o5.Args[1]
 29244  		if o4.Op != OpPPC64OR {
 29245  			break
 29246  		}
 29247  		if o4.Type != t {
 29248  			break
 29249  		}
 29250  		_ = o4.Args[1]
 29251  		o3 := o4.Args[0]
 29252  		if o3.Op != OpPPC64OR {
 29253  			break
 29254  		}
 29255  		if o3.Type != t {
 29256  			break
 29257  		}
 29258  		_ = o3.Args[1]
 29259  		s3 := o3.Args[0]
 29260  		if s3.Op != OpPPC64SLDconst {
 29261  			break
 29262  		}
 29263  		if s3.AuxInt != 32 {
 29264  			break
 29265  		}
 29266  		x4 := s3.Args[0]
 29267  		if x4.Op != OpPPC64MOVBZload {
 29268  			break
 29269  		}
 29270  		i4 := x4.AuxInt
 29271  		if x4.Aux != s {
 29272  			break
 29273  		}
 29274  		_ = x4.Args[1]
 29275  		if p != x4.Args[0] {
 29276  			break
 29277  		}
 29278  		if mem != x4.Args[1] {
 29279  			break
 29280  		}
 29281  		o2 := o3.Args[1]
 29282  		if o2.Op != OpPPC64OR {
 29283  			break
 29284  		}
 29285  		if o2.Type != t {
 29286  			break
 29287  		}
 29288  		_ = o2.Args[1]
 29289  		o1 := o2.Args[0]
 29290  		if o1.Op != OpPPC64OR {
 29291  			break
 29292  		}
 29293  		if o1.Type != t {
 29294  			break
 29295  		}
 29296  		_ = o1.Args[1]
 29297  		s1 := o1.Args[0]
 29298  		if s1.Op != OpPPC64SLDconst {
 29299  			break
 29300  		}
 29301  		if s1.AuxInt != 16 {
 29302  			break
 29303  		}
 29304  		x2 := s1.Args[0]
 29305  		if x2.Op != OpPPC64MOVBZload {
 29306  			break
 29307  		}
 29308  		i2 := x2.AuxInt
 29309  		if x2.Aux != s {
 29310  			break
 29311  		}
 29312  		_ = x2.Args[1]
 29313  		if p != x2.Args[0] {
 29314  			break
 29315  		}
 29316  		if mem != x2.Args[1] {
 29317  			break
 29318  		}
 29319  		o0 := o1.Args[1]
 29320  		if o0.Op != OpPPC64OR {
 29321  			break
 29322  		}
 29323  		if o0.Type != t {
 29324  			break
 29325  		}
 29326  		_ = o0.Args[1]
 29327  		s0 := o0.Args[0]
 29328  		if s0.Op != OpPPC64SLDconst {
 29329  			break
 29330  		}
 29331  		if s0.AuxInt != 8 {
 29332  			break
 29333  		}
 29334  		x1 := s0.Args[0]
 29335  		if x1.Op != OpPPC64MOVBZload {
 29336  			break
 29337  		}
 29338  		i1 := x1.AuxInt
 29339  		if x1.Aux != s {
 29340  			break
 29341  		}
 29342  		_ = x1.Args[1]
 29343  		if p != x1.Args[0] {
 29344  			break
 29345  		}
 29346  		if mem != x1.Args[1] {
 29347  			break
 29348  		}
 29349  		x0 := o0.Args[1]
 29350  		if x0.Op != OpPPC64MOVBZload {
 29351  			break
 29352  		}
 29353  		i0 := x0.AuxInt
 29354  		if x0.Aux != s {
 29355  			break
 29356  		}
 29357  		_ = x0.Args[1]
 29358  		if p != x0.Args[0] {
 29359  			break
 29360  		}
 29361  		if mem != x0.Args[1] {
 29362  			break
 29363  		}
 29364  		s2 := o2.Args[1]
 29365  		if s2.Op != OpPPC64SLDconst {
 29366  			break
 29367  		}
 29368  		if s2.AuxInt != 24 {
 29369  			break
 29370  		}
 29371  		x3 := s2.Args[0]
 29372  		if x3.Op != OpPPC64MOVBZload {
 29373  			break
 29374  		}
 29375  		i3 := x3.AuxInt
 29376  		if x3.Aux != s {
 29377  			break
 29378  		}
 29379  		_ = x3.Args[1]
 29380  		if p != x3.Args[0] {
 29381  			break
 29382  		}
 29383  		if mem != x3.Args[1] {
 29384  			break
 29385  		}
 29386  		s4 := o4.Args[1]
 29387  		if s4.Op != OpPPC64SLDconst {
 29388  			break
 29389  		}
 29390  		if s4.AuxInt != 40 {
 29391  			break
 29392  		}
 29393  		x5 := s4.Args[0]
 29394  		if x5.Op != OpPPC64MOVBZload {
 29395  			break
 29396  		}
 29397  		i5 := x5.AuxInt
 29398  		if x5.Aux != s {
 29399  			break
 29400  		}
 29401  		_ = x5.Args[1]
 29402  		if p != x5.Args[0] {
 29403  			break
 29404  		}
 29405  		if mem != x5.Args[1] {
 29406  			break
 29407  		}
 29408  		s6 := v.Args[1]
 29409  		if s6.Op != OpPPC64SLDconst {
 29410  			break
 29411  		}
 29412  		if s6.AuxInt != 56 {
 29413  			break
 29414  		}
 29415  		x7 := s6.Args[0]
 29416  		if x7.Op != OpPPC64MOVBZload {
 29417  			break
 29418  		}
 29419  		i7 := x7.AuxInt
 29420  		if x7.Aux != s {
 29421  			break
 29422  		}
 29423  		_ = x7.Args[1]
 29424  		if p != x7.Args[0] {
 29425  			break
 29426  		}
 29427  		if mem != x7.Args[1] {
 29428  			break
 29429  		}
 29430  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29431  			break
 29432  		}
 29433  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29434  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29435  		v.reset(OpCopy)
 29436  		v.AddArg(v0)
 29437  		v0.AuxInt = i0
 29438  		v0.Aux = s
 29439  		v0.AddArg(p)
 29440  		v0.AddArg(mem)
 29441  		return true
 29442  	}
 29443  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29444  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29445  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29446  	for {
 29447  		t := v.Type
 29448  		_ = v.Args[1]
 29449  		o5 := v.Args[0]
 29450  		if o5.Op != OpPPC64OR {
 29451  			break
 29452  		}
 29453  		if o5.Type != t {
 29454  			break
 29455  		}
 29456  		_ = o5.Args[1]
 29457  		s5 := o5.Args[0]
 29458  		if s5.Op != OpPPC64SLDconst {
 29459  			break
 29460  		}
 29461  		if s5.AuxInt != 48 {
 29462  			break
 29463  		}
 29464  		x6 := s5.Args[0]
 29465  		if x6.Op != OpPPC64MOVBZload {
 29466  			break
 29467  		}
 29468  		i6 := x6.AuxInt
 29469  		s := x6.Aux
 29470  		_ = x6.Args[1]
 29471  		p := x6.Args[0]
 29472  		mem := x6.Args[1]
 29473  		o4 := o5.Args[1]
 29474  		if o4.Op != OpPPC64OR {
 29475  			break
 29476  		}
 29477  		if o4.Type != t {
 29478  			break
 29479  		}
 29480  		_ = o4.Args[1]
 29481  		o3 := o4.Args[0]
 29482  		if o3.Op != OpPPC64OR {
 29483  			break
 29484  		}
 29485  		if o3.Type != t {
 29486  			break
 29487  		}
 29488  		_ = o3.Args[1]
 29489  		s3 := o3.Args[0]
 29490  		if s3.Op != OpPPC64SLDconst {
 29491  			break
 29492  		}
 29493  		if s3.AuxInt != 32 {
 29494  			break
 29495  		}
 29496  		x4 := s3.Args[0]
 29497  		if x4.Op != OpPPC64MOVBZload {
 29498  			break
 29499  		}
 29500  		i4 := x4.AuxInt
 29501  		if x4.Aux != s {
 29502  			break
 29503  		}
 29504  		_ = x4.Args[1]
 29505  		if p != x4.Args[0] {
 29506  			break
 29507  		}
 29508  		if mem != x4.Args[1] {
 29509  			break
 29510  		}
 29511  		o2 := o3.Args[1]
 29512  		if o2.Op != OpPPC64OR {
 29513  			break
 29514  		}
 29515  		if o2.Type != t {
 29516  			break
 29517  		}
 29518  		_ = o2.Args[1]
 29519  		o1 := o2.Args[0]
 29520  		if o1.Op != OpPPC64OR {
 29521  			break
 29522  		}
 29523  		if o1.Type != t {
 29524  			break
 29525  		}
 29526  		_ = o1.Args[1]
 29527  		s1 := o1.Args[0]
 29528  		if s1.Op != OpPPC64SLDconst {
 29529  			break
 29530  		}
 29531  		if s1.AuxInt != 16 {
 29532  			break
 29533  		}
 29534  		x2 := s1.Args[0]
 29535  		if x2.Op != OpPPC64MOVBZload {
 29536  			break
 29537  		}
 29538  		i2 := x2.AuxInt
 29539  		if x2.Aux != s {
 29540  			break
 29541  		}
 29542  		_ = x2.Args[1]
 29543  		if p != x2.Args[0] {
 29544  			break
 29545  		}
 29546  		if mem != x2.Args[1] {
 29547  			break
 29548  		}
 29549  		o0 := o1.Args[1]
 29550  		if o0.Op != OpPPC64OR {
 29551  			break
 29552  		}
 29553  		if o0.Type != t {
 29554  			break
 29555  		}
 29556  		_ = o0.Args[1]
 29557  		x0 := o0.Args[0]
 29558  		if x0.Op != OpPPC64MOVBZload {
 29559  			break
 29560  		}
 29561  		i0 := x0.AuxInt
 29562  		if x0.Aux != s {
 29563  			break
 29564  		}
 29565  		_ = x0.Args[1]
 29566  		if p != x0.Args[0] {
 29567  			break
 29568  		}
 29569  		if mem != x0.Args[1] {
 29570  			break
 29571  		}
 29572  		s0 := o0.Args[1]
 29573  		if s0.Op != OpPPC64SLDconst {
 29574  			break
 29575  		}
 29576  		if s0.AuxInt != 8 {
 29577  			break
 29578  		}
 29579  		x1 := s0.Args[0]
 29580  		if x1.Op != OpPPC64MOVBZload {
 29581  			break
 29582  		}
 29583  		i1 := x1.AuxInt
 29584  		if x1.Aux != s {
 29585  			break
 29586  		}
 29587  		_ = x1.Args[1]
 29588  		if p != x1.Args[0] {
 29589  			break
 29590  		}
 29591  		if mem != x1.Args[1] {
 29592  			break
 29593  		}
 29594  		s2 := o2.Args[1]
 29595  		if s2.Op != OpPPC64SLDconst {
 29596  			break
 29597  		}
 29598  		if s2.AuxInt != 24 {
 29599  			break
 29600  		}
 29601  		x3 := s2.Args[0]
 29602  		if x3.Op != OpPPC64MOVBZload {
 29603  			break
 29604  		}
 29605  		i3 := x3.AuxInt
 29606  		if x3.Aux != s {
 29607  			break
 29608  		}
 29609  		_ = x3.Args[1]
 29610  		if p != x3.Args[0] {
 29611  			break
 29612  		}
 29613  		if mem != x3.Args[1] {
 29614  			break
 29615  		}
 29616  		s4 := o4.Args[1]
 29617  		if s4.Op != OpPPC64SLDconst {
 29618  			break
 29619  		}
 29620  		if s4.AuxInt != 40 {
 29621  			break
 29622  		}
 29623  		x5 := s4.Args[0]
 29624  		if x5.Op != OpPPC64MOVBZload {
 29625  			break
 29626  		}
 29627  		i5 := x5.AuxInt
 29628  		if x5.Aux != s {
 29629  			break
 29630  		}
 29631  		_ = x5.Args[1]
 29632  		if p != x5.Args[0] {
 29633  			break
 29634  		}
 29635  		if mem != x5.Args[1] {
 29636  			break
 29637  		}
 29638  		s6 := v.Args[1]
 29639  		if s6.Op != OpPPC64SLDconst {
 29640  			break
 29641  		}
 29642  		if s6.AuxInt != 56 {
 29643  			break
 29644  		}
 29645  		x7 := s6.Args[0]
 29646  		if x7.Op != OpPPC64MOVBZload {
 29647  			break
 29648  		}
 29649  		i7 := x7.AuxInt
 29650  		if x7.Aux != s {
 29651  			break
 29652  		}
 29653  		_ = x7.Args[1]
 29654  		if p != x7.Args[0] {
 29655  			break
 29656  		}
 29657  		if mem != x7.Args[1] {
 29658  			break
 29659  		}
 29660  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29661  			break
 29662  		}
 29663  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29664  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29665  		v.reset(OpCopy)
 29666  		v.AddArg(v0)
 29667  		v0.AuxInt = i0
 29668  		v0.Aux = s
 29669  		v0.AddArg(p)
 29670  		v0.AddArg(mem)
 29671  		return true
 29672  	}
 29673  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29674  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29675  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29676  	for {
 29677  		t := v.Type
 29678  		_ = v.Args[1]
 29679  		o5 := v.Args[0]
 29680  		if o5.Op != OpPPC64OR {
 29681  			break
 29682  		}
 29683  		if o5.Type != t {
 29684  			break
 29685  		}
 29686  		_ = o5.Args[1]
 29687  		s5 := o5.Args[0]
 29688  		if s5.Op != OpPPC64SLDconst {
 29689  			break
 29690  		}
 29691  		if s5.AuxInt != 48 {
 29692  			break
 29693  		}
 29694  		x6 := s5.Args[0]
 29695  		if x6.Op != OpPPC64MOVBZload {
 29696  			break
 29697  		}
 29698  		i6 := x6.AuxInt
 29699  		s := x6.Aux
 29700  		_ = x6.Args[1]
 29701  		p := x6.Args[0]
 29702  		mem := x6.Args[1]
 29703  		o4 := o5.Args[1]
 29704  		if o4.Op != OpPPC64OR {
 29705  			break
 29706  		}
 29707  		if o4.Type != t {
 29708  			break
 29709  		}
 29710  		_ = o4.Args[1]
 29711  		o3 := o4.Args[0]
 29712  		if o3.Op != OpPPC64OR {
 29713  			break
 29714  		}
 29715  		if o3.Type != t {
 29716  			break
 29717  		}
 29718  		_ = o3.Args[1]
 29719  		s3 := o3.Args[0]
 29720  		if s3.Op != OpPPC64SLDconst {
 29721  			break
 29722  		}
 29723  		if s3.AuxInt != 32 {
 29724  			break
 29725  		}
 29726  		x4 := s3.Args[0]
 29727  		if x4.Op != OpPPC64MOVBZload {
 29728  			break
 29729  		}
 29730  		i4 := x4.AuxInt
 29731  		if x4.Aux != s {
 29732  			break
 29733  		}
 29734  		_ = x4.Args[1]
 29735  		if p != x4.Args[0] {
 29736  			break
 29737  		}
 29738  		if mem != x4.Args[1] {
 29739  			break
 29740  		}
 29741  		o2 := o3.Args[1]
 29742  		if o2.Op != OpPPC64OR {
 29743  			break
 29744  		}
 29745  		if o2.Type != t {
 29746  			break
 29747  		}
 29748  		_ = o2.Args[1]
 29749  		o1 := o2.Args[0]
 29750  		if o1.Op != OpPPC64OR {
 29751  			break
 29752  		}
 29753  		if o1.Type != t {
 29754  			break
 29755  		}
 29756  		_ = o1.Args[1]
 29757  		o0 := o1.Args[0]
 29758  		if o0.Op != OpPPC64OR {
 29759  			break
 29760  		}
 29761  		if o0.Type != t {
 29762  			break
 29763  		}
 29764  		_ = o0.Args[1]
 29765  		s0 := o0.Args[0]
 29766  		if s0.Op != OpPPC64SLDconst {
 29767  			break
 29768  		}
 29769  		if s0.AuxInt != 8 {
 29770  			break
 29771  		}
 29772  		x1 := s0.Args[0]
 29773  		if x1.Op != OpPPC64MOVBZload {
 29774  			break
 29775  		}
 29776  		i1 := x1.AuxInt
 29777  		if x1.Aux != s {
 29778  			break
 29779  		}
 29780  		_ = x1.Args[1]
 29781  		if p != x1.Args[0] {
 29782  			break
 29783  		}
 29784  		if mem != x1.Args[1] {
 29785  			break
 29786  		}
 29787  		x0 := o0.Args[1]
 29788  		if x0.Op != OpPPC64MOVBZload {
 29789  			break
 29790  		}
 29791  		i0 := x0.AuxInt
 29792  		if x0.Aux != s {
 29793  			break
 29794  		}
 29795  		_ = x0.Args[1]
 29796  		if p != x0.Args[0] {
 29797  			break
 29798  		}
 29799  		if mem != x0.Args[1] {
 29800  			break
 29801  		}
 29802  		s1 := o1.Args[1]
 29803  		if s1.Op != OpPPC64SLDconst {
 29804  			break
 29805  		}
 29806  		if s1.AuxInt != 16 {
 29807  			break
 29808  		}
 29809  		x2 := s1.Args[0]
 29810  		if x2.Op != OpPPC64MOVBZload {
 29811  			break
 29812  		}
 29813  		i2 := x2.AuxInt
 29814  		if x2.Aux != s {
 29815  			break
 29816  		}
 29817  		_ = x2.Args[1]
 29818  		if p != x2.Args[0] {
 29819  			break
 29820  		}
 29821  		if mem != x2.Args[1] {
 29822  			break
 29823  		}
 29824  		s2 := o2.Args[1]
 29825  		if s2.Op != OpPPC64SLDconst {
 29826  			break
 29827  		}
 29828  		if s2.AuxInt != 24 {
 29829  			break
 29830  		}
 29831  		x3 := s2.Args[0]
 29832  		if x3.Op != OpPPC64MOVBZload {
 29833  			break
 29834  		}
 29835  		i3 := x3.AuxInt
 29836  		if x3.Aux != s {
 29837  			break
 29838  		}
 29839  		_ = x3.Args[1]
 29840  		if p != x3.Args[0] {
 29841  			break
 29842  		}
 29843  		if mem != x3.Args[1] {
 29844  			break
 29845  		}
 29846  		s4 := o4.Args[1]
 29847  		if s4.Op != OpPPC64SLDconst {
 29848  			break
 29849  		}
 29850  		if s4.AuxInt != 40 {
 29851  			break
 29852  		}
 29853  		x5 := s4.Args[0]
 29854  		if x5.Op != OpPPC64MOVBZload {
 29855  			break
 29856  		}
 29857  		i5 := x5.AuxInt
 29858  		if x5.Aux != s {
 29859  			break
 29860  		}
 29861  		_ = x5.Args[1]
 29862  		if p != x5.Args[0] {
 29863  			break
 29864  		}
 29865  		if mem != x5.Args[1] {
 29866  			break
 29867  		}
 29868  		s6 := v.Args[1]
 29869  		if s6.Op != OpPPC64SLDconst {
 29870  			break
 29871  		}
 29872  		if s6.AuxInt != 56 {
 29873  			break
 29874  		}
 29875  		x7 := s6.Args[0]
 29876  		if x7.Op != OpPPC64MOVBZload {
 29877  			break
 29878  		}
 29879  		i7 := x7.AuxInt
 29880  		if x7.Aux != s {
 29881  			break
 29882  		}
 29883  		_ = x7.Args[1]
 29884  		if p != x7.Args[0] {
 29885  			break
 29886  		}
 29887  		if mem != x7.Args[1] {
 29888  			break
 29889  		}
 29890  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29891  			break
 29892  		}
 29893  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29894  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29895  		v.reset(OpCopy)
 29896  		v.AddArg(v0)
 29897  		v0.AuxInt = i0
 29898  		v0.Aux = s
 29899  		v0.AddArg(p)
 29900  		v0.AddArg(mem)
 29901  		return true
 29902  	}
 29903  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29904  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29905  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29906  	for {
 29907  		t := v.Type
 29908  		_ = v.Args[1]
 29909  		o5 := v.Args[0]
 29910  		if o5.Op != OpPPC64OR {
 29911  			break
 29912  		}
 29913  		if o5.Type != t {
 29914  			break
 29915  		}
 29916  		_ = o5.Args[1]
 29917  		s5 := o5.Args[0]
 29918  		if s5.Op != OpPPC64SLDconst {
 29919  			break
 29920  		}
 29921  		if s5.AuxInt != 48 {
 29922  			break
 29923  		}
 29924  		x6 := s5.Args[0]
 29925  		if x6.Op != OpPPC64MOVBZload {
 29926  			break
 29927  		}
 29928  		i6 := x6.AuxInt
 29929  		s := x6.Aux
 29930  		_ = x6.Args[1]
 29931  		p := x6.Args[0]
 29932  		mem := x6.Args[1]
 29933  		o4 := o5.Args[1]
 29934  		if o4.Op != OpPPC64OR {
 29935  			break
 29936  		}
 29937  		if o4.Type != t {
 29938  			break
 29939  		}
 29940  		_ = o4.Args[1]
 29941  		o3 := o4.Args[0]
 29942  		if o3.Op != OpPPC64OR {
 29943  			break
 29944  		}
 29945  		if o3.Type != t {
 29946  			break
 29947  		}
 29948  		_ = o3.Args[1]
 29949  		s3 := o3.Args[0]
 29950  		if s3.Op != OpPPC64SLDconst {
 29951  			break
 29952  		}
 29953  		if s3.AuxInt != 32 {
 29954  			break
 29955  		}
 29956  		x4 := s3.Args[0]
 29957  		if x4.Op != OpPPC64MOVBZload {
 29958  			break
 29959  		}
 29960  		i4 := x4.AuxInt
 29961  		if x4.Aux != s {
 29962  			break
 29963  		}
 29964  		_ = x4.Args[1]
 29965  		if p != x4.Args[0] {
 29966  			break
 29967  		}
 29968  		if mem != x4.Args[1] {
 29969  			break
 29970  		}
 29971  		o2 := o3.Args[1]
 29972  		if o2.Op != OpPPC64OR {
 29973  			break
 29974  		}
 29975  		if o2.Type != t {
 29976  			break
 29977  		}
 29978  		_ = o2.Args[1]
 29979  		o1 := o2.Args[0]
 29980  		if o1.Op != OpPPC64OR {
 29981  			break
 29982  		}
 29983  		if o1.Type != t {
 29984  			break
 29985  		}
 29986  		_ = o1.Args[1]
 29987  		o0 := o1.Args[0]
 29988  		if o0.Op != OpPPC64OR {
 29989  			break
 29990  		}
 29991  		if o0.Type != t {
 29992  			break
 29993  		}
 29994  		_ = o0.Args[1]
 29995  		x0 := o0.Args[0]
 29996  		if x0.Op != OpPPC64MOVBZload {
 29997  			break
 29998  		}
 29999  		i0 := x0.AuxInt
 30000  		if x0.Aux != s {
 30001  			break
 30002  		}
 30003  		_ = x0.Args[1]
 30004  		if p != x0.Args[0] {
 30005  			break
 30006  		}
 30007  		if mem != x0.Args[1] {
 30008  			break
 30009  		}
 30010  		s0 := o0.Args[1]
 30011  		if s0.Op != OpPPC64SLDconst {
 30012  			break
 30013  		}
 30014  		if s0.AuxInt != 8 {
 30015  			break
 30016  		}
 30017  		x1 := s0.Args[0]
 30018  		if x1.Op != OpPPC64MOVBZload {
 30019  			break
 30020  		}
 30021  		i1 := x1.AuxInt
 30022  		if x1.Aux != s {
 30023  			break
 30024  		}
 30025  		_ = x1.Args[1]
 30026  		if p != x1.Args[0] {
 30027  			break
 30028  		}
 30029  		if mem != x1.Args[1] {
 30030  			break
 30031  		}
 30032  		s1 := o1.Args[1]
 30033  		if s1.Op != OpPPC64SLDconst {
 30034  			break
 30035  		}
 30036  		if s1.AuxInt != 16 {
 30037  			break
 30038  		}
 30039  		x2 := s1.Args[0]
 30040  		if x2.Op != OpPPC64MOVBZload {
 30041  			break
 30042  		}
 30043  		i2 := x2.AuxInt
 30044  		if x2.Aux != s {
 30045  			break
 30046  		}
 30047  		_ = x2.Args[1]
 30048  		if p != x2.Args[0] {
 30049  			break
 30050  		}
 30051  		if mem != x2.Args[1] {
 30052  			break
 30053  		}
 30054  		s2 := o2.Args[1]
 30055  		if s2.Op != OpPPC64SLDconst {
 30056  			break
 30057  		}
 30058  		if s2.AuxInt != 24 {
 30059  			break
 30060  		}
 30061  		x3 := s2.Args[0]
 30062  		if x3.Op != OpPPC64MOVBZload {
 30063  			break
 30064  		}
 30065  		i3 := x3.AuxInt
 30066  		if x3.Aux != s {
 30067  			break
 30068  		}
 30069  		_ = x3.Args[1]
 30070  		if p != x3.Args[0] {
 30071  			break
 30072  		}
 30073  		if mem != x3.Args[1] {
 30074  			break
 30075  		}
 30076  		s4 := o4.Args[1]
 30077  		if s4.Op != OpPPC64SLDconst {
 30078  			break
 30079  		}
 30080  		if s4.AuxInt != 40 {
 30081  			break
 30082  		}
 30083  		x5 := s4.Args[0]
 30084  		if x5.Op != OpPPC64MOVBZload {
 30085  			break
 30086  		}
 30087  		i5 := x5.AuxInt
 30088  		if x5.Aux != s {
 30089  			break
 30090  		}
 30091  		_ = x5.Args[1]
 30092  		if p != x5.Args[0] {
 30093  			break
 30094  		}
 30095  		if mem != x5.Args[1] {
 30096  			break
 30097  		}
 30098  		s6 := v.Args[1]
 30099  		if s6.Op != OpPPC64SLDconst {
 30100  			break
 30101  		}
 30102  		if s6.AuxInt != 56 {
 30103  			break
 30104  		}
 30105  		x7 := s6.Args[0]
 30106  		if x7.Op != OpPPC64MOVBZload {
 30107  			break
 30108  		}
 30109  		i7 := x7.AuxInt
 30110  		if x7.Aux != s {
 30111  			break
 30112  		}
 30113  		_ = x7.Args[1]
 30114  		if p != x7.Args[0] {
 30115  			break
 30116  		}
 30117  		if mem != x7.Args[1] {
 30118  			break
 30119  		}
 30120  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30121  			break
 30122  		}
 30123  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30124  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30125  		v.reset(OpCopy)
 30126  		v.AddArg(v0)
 30127  		v0.AuxInt = i0
 30128  		v0.Aux = s
 30129  		v0.AddArg(p)
 30130  		v0.AddArg(mem)
 30131  		return true
 30132  	}
 30133  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30134  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30135  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30136  	for {
 30137  		t := v.Type
 30138  		_ = v.Args[1]
 30139  		o5 := v.Args[0]
 30140  		if o5.Op != OpPPC64OR {
 30141  			break
 30142  		}
 30143  		if o5.Type != t {
 30144  			break
 30145  		}
 30146  		_ = o5.Args[1]
 30147  		s5 := o5.Args[0]
 30148  		if s5.Op != OpPPC64SLDconst {
 30149  			break
 30150  		}
 30151  		if s5.AuxInt != 48 {
 30152  			break
 30153  		}
 30154  		x6 := s5.Args[0]
 30155  		if x6.Op != OpPPC64MOVBZload {
 30156  			break
 30157  		}
 30158  		i6 := x6.AuxInt
 30159  		s := x6.Aux
 30160  		_ = x6.Args[1]
 30161  		p := x6.Args[0]
 30162  		mem := x6.Args[1]
 30163  		o4 := o5.Args[1]
 30164  		if o4.Op != OpPPC64OR {
 30165  			break
 30166  		}
 30167  		if o4.Type != t {
 30168  			break
 30169  		}
 30170  		_ = o4.Args[1]
 30171  		o3 := o4.Args[0]
 30172  		if o3.Op != OpPPC64OR {
 30173  			break
 30174  		}
 30175  		if o3.Type != t {
 30176  			break
 30177  		}
 30178  		_ = o3.Args[1]
 30179  		o2 := o3.Args[0]
 30180  		if o2.Op != OpPPC64OR {
 30181  			break
 30182  		}
 30183  		if o2.Type != t {
 30184  			break
 30185  		}
 30186  		_ = o2.Args[1]
 30187  		s2 := o2.Args[0]
 30188  		if s2.Op != OpPPC64SLDconst {
 30189  			break
 30190  		}
 30191  		if s2.AuxInt != 24 {
 30192  			break
 30193  		}
 30194  		x3 := s2.Args[0]
 30195  		if x3.Op != OpPPC64MOVBZload {
 30196  			break
 30197  		}
 30198  		i3 := x3.AuxInt
 30199  		if x3.Aux != s {
 30200  			break
 30201  		}
 30202  		_ = x3.Args[1]
 30203  		if p != x3.Args[0] {
 30204  			break
 30205  		}
 30206  		if mem != x3.Args[1] {
 30207  			break
 30208  		}
 30209  		o1 := o2.Args[1]
 30210  		if o1.Op != OpPPC64OR {
 30211  			break
 30212  		}
 30213  		if o1.Type != t {
 30214  			break
 30215  		}
 30216  		_ = o1.Args[1]
 30217  		s1 := o1.Args[0]
 30218  		if s1.Op != OpPPC64SLDconst {
 30219  			break
 30220  		}
 30221  		if s1.AuxInt != 16 {
 30222  			break
 30223  		}
 30224  		x2 := s1.Args[0]
 30225  		if x2.Op != OpPPC64MOVBZload {
 30226  			break
 30227  		}
 30228  		i2 := x2.AuxInt
 30229  		if x2.Aux != s {
 30230  			break
 30231  		}
 30232  		_ = x2.Args[1]
 30233  		if p != x2.Args[0] {
 30234  			break
 30235  		}
 30236  		if mem != x2.Args[1] {
 30237  			break
 30238  		}
 30239  		o0 := o1.Args[1]
 30240  		if o0.Op != OpPPC64OR {
 30241  			break
 30242  		}
 30243  		if o0.Type != t {
 30244  			break
 30245  		}
 30246  		_ = o0.Args[1]
 30247  		s0 := o0.Args[0]
 30248  		if s0.Op != OpPPC64SLDconst {
 30249  			break
 30250  		}
 30251  		if s0.AuxInt != 8 {
 30252  			break
 30253  		}
 30254  		x1 := s0.Args[0]
 30255  		if x1.Op != OpPPC64MOVBZload {
 30256  			break
 30257  		}
 30258  		i1 := x1.AuxInt
 30259  		if x1.Aux != s {
 30260  			break
 30261  		}
 30262  		_ = x1.Args[1]
 30263  		if p != x1.Args[0] {
 30264  			break
 30265  		}
 30266  		if mem != x1.Args[1] {
 30267  			break
 30268  		}
 30269  		x0 := o0.Args[1]
 30270  		if x0.Op != OpPPC64MOVBZload {
 30271  			break
 30272  		}
 30273  		i0 := x0.AuxInt
 30274  		if x0.Aux != s {
 30275  			break
 30276  		}
 30277  		_ = x0.Args[1]
 30278  		if p != x0.Args[0] {
 30279  			break
 30280  		}
 30281  		if mem != x0.Args[1] {
 30282  			break
 30283  		}
 30284  		s3 := o3.Args[1]
 30285  		if s3.Op != OpPPC64SLDconst {
 30286  			break
 30287  		}
 30288  		if s3.AuxInt != 32 {
 30289  			break
 30290  		}
 30291  		x4 := s3.Args[0]
 30292  		if x4.Op != OpPPC64MOVBZload {
 30293  			break
 30294  		}
 30295  		i4 := x4.AuxInt
 30296  		if x4.Aux != s {
 30297  			break
 30298  		}
 30299  		_ = x4.Args[1]
 30300  		if p != x4.Args[0] {
 30301  			break
 30302  		}
 30303  		if mem != x4.Args[1] {
 30304  			break
 30305  		}
 30306  		s4 := o4.Args[1]
 30307  		if s4.Op != OpPPC64SLDconst {
 30308  			break
 30309  		}
 30310  		if s4.AuxInt != 40 {
 30311  			break
 30312  		}
 30313  		x5 := s4.Args[0]
 30314  		if x5.Op != OpPPC64MOVBZload {
 30315  			break
 30316  		}
 30317  		i5 := x5.AuxInt
 30318  		if x5.Aux != s {
 30319  			break
 30320  		}
 30321  		_ = x5.Args[1]
 30322  		if p != x5.Args[0] {
 30323  			break
 30324  		}
 30325  		if mem != x5.Args[1] {
 30326  			break
 30327  		}
 30328  		s6 := v.Args[1]
 30329  		if s6.Op != OpPPC64SLDconst {
 30330  			break
 30331  		}
 30332  		if s6.AuxInt != 56 {
 30333  			break
 30334  		}
 30335  		x7 := s6.Args[0]
 30336  		if x7.Op != OpPPC64MOVBZload {
 30337  			break
 30338  		}
 30339  		i7 := x7.AuxInt
 30340  		if x7.Aux != s {
 30341  			break
 30342  		}
 30343  		_ = x7.Args[1]
 30344  		if p != x7.Args[0] {
 30345  			break
 30346  		}
 30347  		if mem != x7.Args[1] {
 30348  			break
 30349  		}
 30350  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30351  			break
 30352  		}
 30353  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30354  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30355  		v.reset(OpCopy)
 30356  		v.AddArg(v0)
 30357  		v0.AuxInt = i0
 30358  		v0.Aux = s
 30359  		v0.AddArg(p)
 30360  		v0.AddArg(mem)
 30361  		return true
 30362  	}
 30363  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30364  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30365  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30366  	for {
 30367  		t := v.Type
 30368  		_ = v.Args[1]
 30369  		o5 := v.Args[0]
 30370  		if o5.Op != OpPPC64OR {
 30371  			break
 30372  		}
 30373  		if o5.Type != t {
 30374  			break
 30375  		}
 30376  		_ = o5.Args[1]
 30377  		s5 := o5.Args[0]
 30378  		if s5.Op != OpPPC64SLDconst {
 30379  			break
 30380  		}
 30381  		if s5.AuxInt != 48 {
 30382  			break
 30383  		}
 30384  		x6 := s5.Args[0]
 30385  		if x6.Op != OpPPC64MOVBZload {
 30386  			break
 30387  		}
 30388  		i6 := x6.AuxInt
 30389  		s := x6.Aux
 30390  		_ = x6.Args[1]
 30391  		p := x6.Args[0]
 30392  		mem := x6.Args[1]
 30393  		o4 := o5.Args[1]
 30394  		if o4.Op != OpPPC64OR {
 30395  			break
 30396  		}
 30397  		if o4.Type != t {
 30398  			break
 30399  		}
 30400  		_ = o4.Args[1]
 30401  		o3 := o4.Args[0]
 30402  		if o3.Op != OpPPC64OR {
 30403  			break
 30404  		}
 30405  		if o3.Type != t {
 30406  			break
 30407  		}
 30408  		_ = o3.Args[1]
 30409  		o2 := o3.Args[0]
 30410  		if o2.Op != OpPPC64OR {
 30411  			break
 30412  		}
 30413  		if o2.Type != t {
 30414  			break
 30415  		}
 30416  		_ = o2.Args[1]
 30417  		s2 := o2.Args[0]
 30418  		if s2.Op != OpPPC64SLDconst {
 30419  			break
 30420  		}
 30421  		if s2.AuxInt != 24 {
 30422  			break
 30423  		}
 30424  		x3 := s2.Args[0]
 30425  		if x3.Op != OpPPC64MOVBZload {
 30426  			break
 30427  		}
 30428  		i3 := x3.AuxInt
 30429  		if x3.Aux != s {
 30430  			break
 30431  		}
 30432  		_ = x3.Args[1]
 30433  		if p != x3.Args[0] {
 30434  			break
 30435  		}
 30436  		if mem != x3.Args[1] {
 30437  			break
 30438  		}
 30439  		o1 := o2.Args[1]
 30440  		if o1.Op != OpPPC64OR {
 30441  			break
 30442  		}
 30443  		if o1.Type != t {
 30444  			break
 30445  		}
 30446  		_ = o1.Args[1]
 30447  		s1 := o1.Args[0]
 30448  		if s1.Op != OpPPC64SLDconst {
 30449  			break
 30450  		}
 30451  		if s1.AuxInt != 16 {
 30452  			break
 30453  		}
 30454  		x2 := s1.Args[0]
 30455  		if x2.Op != OpPPC64MOVBZload {
 30456  			break
 30457  		}
 30458  		i2 := x2.AuxInt
 30459  		if x2.Aux != s {
 30460  			break
 30461  		}
 30462  		_ = x2.Args[1]
 30463  		if p != x2.Args[0] {
 30464  			break
 30465  		}
 30466  		if mem != x2.Args[1] {
 30467  			break
 30468  		}
 30469  		o0 := o1.Args[1]
 30470  		if o0.Op != OpPPC64OR {
 30471  			break
 30472  		}
 30473  		if o0.Type != t {
 30474  			break
 30475  		}
 30476  		_ = o0.Args[1]
 30477  		x0 := o0.Args[0]
 30478  		if x0.Op != OpPPC64MOVBZload {
 30479  			break
 30480  		}
 30481  		i0 := x0.AuxInt
 30482  		if x0.Aux != s {
 30483  			break
 30484  		}
 30485  		_ = x0.Args[1]
 30486  		if p != x0.Args[0] {
 30487  			break
 30488  		}
 30489  		if mem != x0.Args[1] {
 30490  			break
 30491  		}
 30492  		s0 := o0.Args[1]
 30493  		if s0.Op != OpPPC64SLDconst {
 30494  			break
 30495  		}
 30496  		if s0.AuxInt != 8 {
 30497  			break
 30498  		}
 30499  		x1 := s0.Args[0]
 30500  		if x1.Op != OpPPC64MOVBZload {
 30501  			break
 30502  		}
 30503  		i1 := x1.AuxInt
 30504  		if x1.Aux != s {
 30505  			break
 30506  		}
 30507  		_ = x1.Args[1]
 30508  		if p != x1.Args[0] {
 30509  			break
 30510  		}
 30511  		if mem != x1.Args[1] {
 30512  			break
 30513  		}
 30514  		s3 := o3.Args[1]
 30515  		if s3.Op != OpPPC64SLDconst {
 30516  			break
 30517  		}
 30518  		if s3.AuxInt != 32 {
 30519  			break
 30520  		}
 30521  		x4 := s3.Args[0]
 30522  		if x4.Op != OpPPC64MOVBZload {
 30523  			break
 30524  		}
 30525  		i4 := x4.AuxInt
 30526  		if x4.Aux != s {
 30527  			break
 30528  		}
 30529  		_ = x4.Args[1]
 30530  		if p != x4.Args[0] {
 30531  			break
 30532  		}
 30533  		if mem != x4.Args[1] {
 30534  			break
 30535  		}
 30536  		s4 := o4.Args[1]
 30537  		if s4.Op != OpPPC64SLDconst {
 30538  			break
 30539  		}
 30540  		if s4.AuxInt != 40 {
 30541  			break
 30542  		}
 30543  		x5 := s4.Args[0]
 30544  		if x5.Op != OpPPC64MOVBZload {
 30545  			break
 30546  		}
 30547  		i5 := x5.AuxInt
 30548  		if x5.Aux != s {
 30549  			break
 30550  		}
 30551  		_ = x5.Args[1]
 30552  		if p != x5.Args[0] {
 30553  			break
 30554  		}
 30555  		if mem != x5.Args[1] {
 30556  			break
 30557  		}
 30558  		s6 := v.Args[1]
 30559  		if s6.Op != OpPPC64SLDconst {
 30560  			break
 30561  		}
 30562  		if s6.AuxInt != 56 {
 30563  			break
 30564  		}
 30565  		x7 := s6.Args[0]
 30566  		if x7.Op != OpPPC64MOVBZload {
 30567  			break
 30568  		}
 30569  		i7 := x7.AuxInt
 30570  		if x7.Aux != s {
 30571  			break
 30572  		}
 30573  		_ = x7.Args[1]
 30574  		if p != x7.Args[0] {
 30575  			break
 30576  		}
 30577  		if mem != x7.Args[1] {
 30578  			break
 30579  		}
 30580  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30581  			break
 30582  		}
 30583  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30584  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30585  		v.reset(OpCopy)
 30586  		v.AddArg(v0)
 30587  		v0.AuxInt = i0
 30588  		v0.Aux = s
 30589  		v0.AddArg(p)
 30590  		v0.AddArg(mem)
 30591  		return true
 30592  	}
 30593  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30594  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30595  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30596  	for {
 30597  		t := v.Type
 30598  		_ = v.Args[1]
 30599  		o5 := v.Args[0]
 30600  		if o5.Op != OpPPC64OR {
 30601  			break
 30602  		}
 30603  		if o5.Type != t {
 30604  			break
 30605  		}
 30606  		_ = o5.Args[1]
 30607  		s5 := o5.Args[0]
 30608  		if s5.Op != OpPPC64SLDconst {
 30609  			break
 30610  		}
 30611  		if s5.AuxInt != 48 {
 30612  			break
 30613  		}
 30614  		x6 := s5.Args[0]
 30615  		if x6.Op != OpPPC64MOVBZload {
 30616  			break
 30617  		}
 30618  		i6 := x6.AuxInt
 30619  		s := x6.Aux
 30620  		_ = x6.Args[1]
 30621  		p := x6.Args[0]
 30622  		mem := x6.Args[1]
 30623  		o4 := o5.Args[1]
 30624  		if o4.Op != OpPPC64OR {
 30625  			break
 30626  		}
 30627  		if o4.Type != t {
 30628  			break
 30629  		}
 30630  		_ = o4.Args[1]
 30631  		o3 := o4.Args[0]
 30632  		if o3.Op != OpPPC64OR {
 30633  			break
 30634  		}
 30635  		if o3.Type != t {
 30636  			break
 30637  		}
 30638  		_ = o3.Args[1]
 30639  		o2 := o3.Args[0]
 30640  		if o2.Op != OpPPC64OR {
 30641  			break
 30642  		}
 30643  		if o2.Type != t {
 30644  			break
 30645  		}
 30646  		_ = o2.Args[1]
 30647  		s2 := o2.Args[0]
 30648  		if s2.Op != OpPPC64SLDconst {
 30649  			break
 30650  		}
 30651  		if s2.AuxInt != 24 {
 30652  			break
 30653  		}
 30654  		x3 := s2.Args[0]
 30655  		if x3.Op != OpPPC64MOVBZload {
 30656  			break
 30657  		}
 30658  		i3 := x3.AuxInt
 30659  		if x3.Aux != s {
 30660  			break
 30661  		}
 30662  		_ = x3.Args[1]
 30663  		if p != x3.Args[0] {
 30664  			break
 30665  		}
 30666  		if mem != x3.Args[1] {
 30667  			break
 30668  		}
 30669  		o1 := o2.Args[1]
 30670  		if o1.Op != OpPPC64OR {
 30671  			break
 30672  		}
 30673  		if o1.Type != t {
 30674  			break
 30675  		}
 30676  		_ = o1.Args[1]
 30677  		o0 := o1.Args[0]
 30678  		if o0.Op != OpPPC64OR {
 30679  			break
 30680  		}
 30681  		if o0.Type != t {
 30682  			break
 30683  		}
 30684  		_ = o0.Args[1]
 30685  		s0 := o0.Args[0]
 30686  		if s0.Op != OpPPC64SLDconst {
 30687  			break
 30688  		}
 30689  		if s0.AuxInt != 8 {
 30690  			break
 30691  		}
 30692  		x1 := s0.Args[0]
 30693  		if x1.Op != OpPPC64MOVBZload {
 30694  			break
 30695  		}
 30696  		i1 := x1.AuxInt
 30697  		if x1.Aux != s {
 30698  			break
 30699  		}
 30700  		_ = x1.Args[1]
 30701  		if p != x1.Args[0] {
 30702  			break
 30703  		}
 30704  		if mem != x1.Args[1] {
 30705  			break
 30706  		}
 30707  		x0 := o0.Args[1]
 30708  		if x0.Op != OpPPC64MOVBZload {
 30709  			break
 30710  		}
 30711  		i0 := x0.AuxInt
 30712  		if x0.Aux != s {
 30713  			break
 30714  		}
 30715  		_ = x0.Args[1]
 30716  		if p != x0.Args[0] {
 30717  			break
 30718  		}
 30719  		if mem != x0.Args[1] {
 30720  			break
 30721  		}
 30722  		s1 := o1.Args[1]
 30723  		if s1.Op != OpPPC64SLDconst {
 30724  			break
 30725  		}
 30726  		if s1.AuxInt != 16 {
 30727  			break
 30728  		}
 30729  		x2 := s1.Args[0]
 30730  		if x2.Op != OpPPC64MOVBZload {
 30731  			break
 30732  		}
 30733  		i2 := x2.AuxInt
 30734  		if x2.Aux != s {
 30735  			break
 30736  		}
 30737  		_ = x2.Args[1]
 30738  		if p != x2.Args[0] {
 30739  			break
 30740  		}
 30741  		if mem != x2.Args[1] {
 30742  			break
 30743  		}
 30744  		s3 := o3.Args[1]
 30745  		if s3.Op != OpPPC64SLDconst {
 30746  			break
 30747  		}
 30748  		if s3.AuxInt != 32 {
 30749  			break
 30750  		}
 30751  		x4 := s3.Args[0]
 30752  		if x4.Op != OpPPC64MOVBZload {
 30753  			break
 30754  		}
 30755  		i4 := x4.AuxInt
 30756  		if x4.Aux != s {
 30757  			break
 30758  		}
 30759  		_ = x4.Args[1]
 30760  		if p != x4.Args[0] {
 30761  			break
 30762  		}
 30763  		if mem != x4.Args[1] {
 30764  			break
 30765  		}
 30766  		s4 := o4.Args[1]
 30767  		if s4.Op != OpPPC64SLDconst {
 30768  			break
 30769  		}
 30770  		if s4.AuxInt != 40 {
 30771  			break
 30772  		}
 30773  		x5 := s4.Args[0]
 30774  		if x5.Op != OpPPC64MOVBZload {
 30775  			break
 30776  		}
 30777  		i5 := x5.AuxInt
 30778  		if x5.Aux != s {
 30779  			break
 30780  		}
 30781  		_ = x5.Args[1]
 30782  		if p != x5.Args[0] {
 30783  			break
 30784  		}
 30785  		if mem != x5.Args[1] {
 30786  			break
 30787  		}
 30788  		s6 := v.Args[1]
 30789  		if s6.Op != OpPPC64SLDconst {
 30790  			break
 30791  		}
 30792  		if s6.AuxInt != 56 {
 30793  			break
 30794  		}
 30795  		x7 := s6.Args[0]
 30796  		if x7.Op != OpPPC64MOVBZload {
 30797  			break
 30798  		}
 30799  		i7 := x7.AuxInt
 30800  		if x7.Aux != s {
 30801  			break
 30802  		}
 30803  		_ = x7.Args[1]
 30804  		if p != x7.Args[0] {
 30805  			break
 30806  		}
 30807  		if mem != x7.Args[1] {
 30808  			break
 30809  		}
 30810  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30811  			break
 30812  		}
 30813  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30814  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30815  		v.reset(OpCopy)
 30816  		v.AddArg(v0)
 30817  		v0.AuxInt = i0
 30818  		v0.Aux = s
 30819  		v0.AddArg(p)
 30820  		v0.AddArg(mem)
 30821  		return true
 30822  	}
 30823  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30824  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30825  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30826  	for {
 30827  		t := v.Type
 30828  		_ = v.Args[1]
 30829  		o5 := v.Args[0]
 30830  		if o5.Op != OpPPC64OR {
 30831  			break
 30832  		}
 30833  		if o5.Type != t {
 30834  			break
 30835  		}
 30836  		_ = o5.Args[1]
 30837  		s5 := o5.Args[0]
 30838  		if s5.Op != OpPPC64SLDconst {
 30839  			break
 30840  		}
 30841  		if s5.AuxInt != 48 {
 30842  			break
 30843  		}
 30844  		x6 := s5.Args[0]
 30845  		if x6.Op != OpPPC64MOVBZload {
 30846  			break
 30847  		}
 30848  		i6 := x6.AuxInt
 30849  		s := x6.Aux
 30850  		_ = x6.Args[1]
 30851  		p := x6.Args[0]
 30852  		mem := x6.Args[1]
 30853  		o4 := o5.Args[1]
 30854  		if o4.Op != OpPPC64OR {
 30855  			break
 30856  		}
 30857  		if o4.Type != t {
 30858  			break
 30859  		}
 30860  		_ = o4.Args[1]
 30861  		o3 := o4.Args[0]
 30862  		if o3.Op != OpPPC64OR {
 30863  			break
 30864  		}
 30865  		if o3.Type != t {
 30866  			break
 30867  		}
 30868  		_ = o3.Args[1]
 30869  		o2 := o3.Args[0]
 30870  		if o2.Op != OpPPC64OR {
 30871  			break
 30872  		}
 30873  		if o2.Type != t {
 30874  			break
 30875  		}
 30876  		_ = o2.Args[1]
 30877  		s2 := o2.Args[0]
 30878  		if s2.Op != OpPPC64SLDconst {
 30879  			break
 30880  		}
 30881  		if s2.AuxInt != 24 {
 30882  			break
 30883  		}
 30884  		x3 := s2.Args[0]
 30885  		if x3.Op != OpPPC64MOVBZload {
 30886  			break
 30887  		}
 30888  		i3 := x3.AuxInt
 30889  		if x3.Aux != s {
 30890  			break
 30891  		}
 30892  		_ = x3.Args[1]
 30893  		if p != x3.Args[0] {
 30894  			break
 30895  		}
 30896  		if mem != x3.Args[1] {
 30897  			break
 30898  		}
 30899  		o1 := o2.Args[1]
 30900  		if o1.Op != OpPPC64OR {
 30901  			break
 30902  		}
 30903  		if o1.Type != t {
 30904  			break
 30905  		}
 30906  		_ = o1.Args[1]
 30907  		o0 := o1.Args[0]
 30908  		if o0.Op != OpPPC64OR {
 30909  			break
 30910  		}
 30911  		if o0.Type != t {
 30912  			break
 30913  		}
 30914  		_ = o0.Args[1]
 30915  		x0 := o0.Args[0]
 30916  		if x0.Op != OpPPC64MOVBZload {
 30917  			break
 30918  		}
 30919  		i0 := x0.AuxInt
 30920  		if x0.Aux != s {
 30921  			break
 30922  		}
 30923  		_ = x0.Args[1]
 30924  		if p != x0.Args[0] {
 30925  			break
 30926  		}
 30927  		if mem != x0.Args[1] {
 30928  			break
 30929  		}
 30930  		s0 := o0.Args[1]
 30931  		if s0.Op != OpPPC64SLDconst {
 30932  			break
 30933  		}
 30934  		if s0.AuxInt != 8 {
 30935  			break
 30936  		}
 30937  		x1 := s0.Args[0]
 30938  		if x1.Op != OpPPC64MOVBZload {
 30939  			break
 30940  		}
 30941  		i1 := x1.AuxInt
 30942  		if x1.Aux != s {
 30943  			break
 30944  		}
 30945  		_ = x1.Args[1]
 30946  		if p != x1.Args[0] {
 30947  			break
 30948  		}
 30949  		if mem != x1.Args[1] {
 30950  			break
 30951  		}
 30952  		s1 := o1.Args[1]
 30953  		if s1.Op != OpPPC64SLDconst {
 30954  			break
 30955  		}
 30956  		if s1.AuxInt != 16 {
 30957  			break
 30958  		}
 30959  		x2 := s1.Args[0]
 30960  		if x2.Op != OpPPC64MOVBZload {
 30961  			break
 30962  		}
 30963  		i2 := x2.AuxInt
 30964  		if x2.Aux != s {
 30965  			break
 30966  		}
 30967  		_ = x2.Args[1]
 30968  		if p != x2.Args[0] {
 30969  			break
 30970  		}
 30971  		if mem != x2.Args[1] {
 30972  			break
 30973  		}
 30974  		s3 := o3.Args[1]
 30975  		if s3.Op != OpPPC64SLDconst {
 30976  			break
 30977  		}
 30978  		if s3.AuxInt != 32 {
 30979  			break
 30980  		}
 30981  		x4 := s3.Args[0]
 30982  		if x4.Op != OpPPC64MOVBZload {
 30983  			break
 30984  		}
 30985  		i4 := x4.AuxInt
 30986  		if x4.Aux != s {
 30987  			break
 30988  		}
 30989  		_ = x4.Args[1]
 30990  		if p != x4.Args[0] {
 30991  			break
 30992  		}
 30993  		if mem != x4.Args[1] {
 30994  			break
 30995  		}
 30996  		s4 := o4.Args[1]
 30997  		if s4.Op != OpPPC64SLDconst {
 30998  			break
 30999  		}
 31000  		if s4.AuxInt != 40 {
 31001  			break
 31002  		}
 31003  		x5 := s4.Args[0]
 31004  		if x5.Op != OpPPC64MOVBZload {
 31005  			break
 31006  		}
 31007  		i5 := x5.AuxInt
 31008  		if x5.Aux != s {
 31009  			break
 31010  		}
 31011  		_ = x5.Args[1]
 31012  		if p != x5.Args[0] {
 31013  			break
 31014  		}
 31015  		if mem != x5.Args[1] {
 31016  			break
 31017  		}
 31018  		s6 := v.Args[1]
 31019  		if s6.Op != OpPPC64SLDconst {
 31020  			break
 31021  		}
 31022  		if s6.AuxInt != 56 {
 31023  			break
 31024  		}
 31025  		x7 := s6.Args[0]
 31026  		if x7.Op != OpPPC64MOVBZload {
 31027  			break
 31028  		}
 31029  		i7 := x7.AuxInt
 31030  		if x7.Aux != s {
 31031  			break
 31032  		}
 31033  		_ = x7.Args[1]
 31034  		if p != x7.Args[0] {
 31035  			break
 31036  		}
 31037  		if mem != x7.Args[1] {
 31038  			break
 31039  		}
 31040  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31041  			break
 31042  		}
 31043  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31044  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31045  		v.reset(OpCopy)
 31046  		v.AddArg(v0)
 31047  		v0.AuxInt = i0
 31048  		v0.Aux = s
 31049  		v0.AddArg(p)
 31050  		v0.AddArg(mem)
 31051  		return true
 31052  	}
 31053  	return false
 31054  }
 31055  func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
 31056  	b := v.Block
 31057  	_ = b
 31058  	config := b.Func.Config
 31059  	_ = config
 31060  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31061  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31062  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31063  	for {
 31064  		t := v.Type
 31065  		_ = v.Args[1]
 31066  		o5 := v.Args[0]
 31067  		if o5.Op != OpPPC64OR {
 31068  			break
 31069  		}
 31070  		if o5.Type != t {
 31071  			break
 31072  		}
 31073  		_ = o5.Args[1]
 31074  		s5 := o5.Args[0]
 31075  		if s5.Op != OpPPC64SLDconst {
 31076  			break
 31077  		}
 31078  		if s5.AuxInt != 48 {
 31079  			break
 31080  		}
 31081  		x6 := s5.Args[0]
 31082  		if x6.Op != OpPPC64MOVBZload {
 31083  			break
 31084  		}
 31085  		i6 := x6.AuxInt
 31086  		s := x6.Aux
 31087  		_ = x6.Args[1]
 31088  		p := x6.Args[0]
 31089  		mem := x6.Args[1]
 31090  		o4 := o5.Args[1]
 31091  		if o4.Op != OpPPC64OR {
 31092  			break
 31093  		}
 31094  		if o4.Type != t {
 31095  			break
 31096  		}
 31097  		_ = o4.Args[1]
 31098  		o3 := o4.Args[0]
 31099  		if o3.Op != OpPPC64OR {
 31100  			break
 31101  		}
 31102  		if o3.Type != t {
 31103  			break
 31104  		}
 31105  		_ = o3.Args[1]
 31106  		o2 := o3.Args[0]
 31107  		if o2.Op != OpPPC64OR {
 31108  			break
 31109  		}
 31110  		if o2.Type != t {
 31111  			break
 31112  		}
 31113  		_ = o2.Args[1]
 31114  		o1 := o2.Args[0]
 31115  		if o1.Op != OpPPC64OR {
 31116  			break
 31117  		}
 31118  		if o1.Type != t {
 31119  			break
 31120  		}
 31121  		_ = o1.Args[1]
 31122  		s1 := o1.Args[0]
 31123  		if s1.Op != OpPPC64SLDconst {
 31124  			break
 31125  		}
 31126  		if s1.AuxInt != 16 {
 31127  			break
 31128  		}
 31129  		x2 := s1.Args[0]
 31130  		if x2.Op != OpPPC64MOVBZload {
 31131  			break
 31132  		}
 31133  		i2 := x2.AuxInt
 31134  		if x2.Aux != s {
 31135  			break
 31136  		}
 31137  		_ = x2.Args[1]
 31138  		if p != x2.Args[0] {
 31139  			break
 31140  		}
 31141  		if mem != x2.Args[1] {
 31142  			break
 31143  		}
 31144  		o0 := o1.Args[1]
 31145  		if o0.Op != OpPPC64OR {
 31146  			break
 31147  		}
 31148  		if o0.Type != t {
 31149  			break
 31150  		}
 31151  		_ = o0.Args[1]
 31152  		s0 := o0.Args[0]
 31153  		if s0.Op != OpPPC64SLDconst {
 31154  			break
 31155  		}
 31156  		if s0.AuxInt != 8 {
 31157  			break
 31158  		}
 31159  		x1 := s0.Args[0]
 31160  		if x1.Op != OpPPC64MOVBZload {
 31161  			break
 31162  		}
 31163  		i1 := x1.AuxInt
 31164  		if x1.Aux != s {
 31165  			break
 31166  		}
 31167  		_ = x1.Args[1]
 31168  		if p != x1.Args[0] {
 31169  			break
 31170  		}
 31171  		if mem != x1.Args[1] {
 31172  			break
 31173  		}
 31174  		x0 := o0.Args[1]
 31175  		if x0.Op != OpPPC64MOVBZload {
 31176  			break
 31177  		}
 31178  		i0 := x0.AuxInt
 31179  		if x0.Aux != s {
 31180  			break
 31181  		}
 31182  		_ = x0.Args[1]
 31183  		if p != x0.Args[0] {
 31184  			break
 31185  		}
 31186  		if mem != x0.Args[1] {
 31187  			break
 31188  		}
 31189  		s2 := o2.Args[1]
 31190  		if s2.Op != OpPPC64SLDconst {
 31191  			break
 31192  		}
 31193  		if s2.AuxInt != 24 {
 31194  			break
 31195  		}
 31196  		x3 := s2.Args[0]
 31197  		if x3.Op != OpPPC64MOVBZload {
 31198  			break
 31199  		}
 31200  		i3 := x3.AuxInt
 31201  		if x3.Aux != s {
 31202  			break
 31203  		}
 31204  		_ = x3.Args[1]
 31205  		if p != x3.Args[0] {
 31206  			break
 31207  		}
 31208  		if mem != x3.Args[1] {
 31209  			break
 31210  		}
 31211  		s3 := o3.Args[1]
 31212  		if s3.Op != OpPPC64SLDconst {
 31213  			break
 31214  		}
 31215  		if s3.AuxInt != 32 {
 31216  			break
 31217  		}
 31218  		x4 := s3.Args[0]
 31219  		if x4.Op != OpPPC64MOVBZload {
 31220  			break
 31221  		}
 31222  		i4 := x4.AuxInt
 31223  		if x4.Aux != s {
 31224  			break
 31225  		}
 31226  		_ = x4.Args[1]
 31227  		if p != x4.Args[0] {
 31228  			break
 31229  		}
 31230  		if mem != x4.Args[1] {
 31231  			break
 31232  		}
 31233  		s4 := o4.Args[1]
 31234  		if s4.Op != OpPPC64SLDconst {
 31235  			break
 31236  		}
 31237  		if s4.AuxInt != 40 {
 31238  			break
 31239  		}
 31240  		x5 := s4.Args[0]
 31241  		if x5.Op != OpPPC64MOVBZload {
 31242  			break
 31243  		}
 31244  		i5 := x5.AuxInt
 31245  		if x5.Aux != s {
 31246  			break
 31247  		}
 31248  		_ = x5.Args[1]
 31249  		if p != x5.Args[0] {
 31250  			break
 31251  		}
 31252  		if mem != x5.Args[1] {
 31253  			break
 31254  		}
 31255  		s6 := v.Args[1]
 31256  		if s6.Op != OpPPC64SLDconst {
 31257  			break
 31258  		}
 31259  		if s6.AuxInt != 56 {
 31260  			break
 31261  		}
 31262  		x7 := s6.Args[0]
 31263  		if x7.Op != OpPPC64MOVBZload {
 31264  			break
 31265  		}
 31266  		i7 := x7.AuxInt
 31267  		if x7.Aux != s {
 31268  			break
 31269  		}
 31270  		_ = x7.Args[1]
 31271  		if p != x7.Args[0] {
 31272  			break
 31273  		}
 31274  		if mem != x7.Args[1] {
 31275  			break
 31276  		}
 31277  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31278  			break
 31279  		}
 31280  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31281  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31282  		v.reset(OpCopy)
 31283  		v.AddArg(v0)
 31284  		v0.AuxInt = i0
 31285  		v0.Aux = s
 31286  		v0.AddArg(p)
 31287  		v0.AddArg(mem)
 31288  		return true
 31289  	}
 31290  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31291  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31292  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31293  	for {
 31294  		t := v.Type
 31295  		_ = v.Args[1]
 31296  		o5 := v.Args[0]
 31297  		if o5.Op != OpPPC64OR {
 31298  			break
 31299  		}
 31300  		if o5.Type != t {
 31301  			break
 31302  		}
 31303  		_ = o5.Args[1]
 31304  		s5 := o5.Args[0]
 31305  		if s5.Op != OpPPC64SLDconst {
 31306  			break
 31307  		}
 31308  		if s5.AuxInt != 48 {
 31309  			break
 31310  		}
 31311  		x6 := s5.Args[0]
 31312  		if x6.Op != OpPPC64MOVBZload {
 31313  			break
 31314  		}
 31315  		i6 := x6.AuxInt
 31316  		s := x6.Aux
 31317  		_ = x6.Args[1]
 31318  		p := x6.Args[0]
 31319  		mem := x6.Args[1]
 31320  		o4 := o5.Args[1]
 31321  		if o4.Op != OpPPC64OR {
 31322  			break
 31323  		}
 31324  		if o4.Type != t {
 31325  			break
 31326  		}
 31327  		_ = o4.Args[1]
 31328  		o3 := o4.Args[0]
 31329  		if o3.Op != OpPPC64OR {
 31330  			break
 31331  		}
 31332  		if o3.Type != t {
 31333  			break
 31334  		}
 31335  		_ = o3.Args[1]
 31336  		o2 := o3.Args[0]
 31337  		if o2.Op != OpPPC64OR {
 31338  			break
 31339  		}
 31340  		if o2.Type != t {
 31341  			break
 31342  		}
 31343  		_ = o2.Args[1]
 31344  		o1 := o2.Args[0]
 31345  		if o1.Op != OpPPC64OR {
 31346  			break
 31347  		}
 31348  		if o1.Type != t {
 31349  			break
 31350  		}
 31351  		_ = o1.Args[1]
 31352  		s1 := o1.Args[0]
 31353  		if s1.Op != OpPPC64SLDconst {
 31354  			break
 31355  		}
 31356  		if s1.AuxInt != 16 {
 31357  			break
 31358  		}
 31359  		x2 := s1.Args[0]
 31360  		if x2.Op != OpPPC64MOVBZload {
 31361  			break
 31362  		}
 31363  		i2 := x2.AuxInt
 31364  		if x2.Aux != s {
 31365  			break
 31366  		}
 31367  		_ = x2.Args[1]
 31368  		if p != x2.Args[0] {
 31369  			break
 31370  		}
 31371  		if mem != x2.Args[1] {
 31372  			break
 31373  		}
 31374  		o0 := o1.Args[1]
 31375  		if o0.Op != OpPPC64OR {
 31376  			break
 31377  		}
 31378  		if o0.Type != t {
 31379  			break
 31380  		}
 31381  		_ = o0.Args[1]
 31382  		x0 := o0.Args[0]
 31383  		if x0.Op != OpPPC64MOVBZload {
 31384  			break
 31385  		}
 31386  		i0 := x0.AuxInt
 31387  		if x0.Aux != s {
 31388  			break
 31389  		}
 31390  		_ = x0.Args[1]
 31391  		if p != x0.Args[0] {
 31392  			break
 31393  		}
 31394  		if mem != x0.Args[1] {
 31395  			break
 31396  		}
 31397  		s0 := o0.Args[1]
 31398  		if s0.Op != OpPPC64SLDconst {
 31399  			break
 31400  		}
 31401  		if s0.AuxInt != 8 {
 31402  			break
 31403  		}
 31404  		x1 := s0.Args[0]
 31405  		if x1.Op != OpPPC64MOVBZload {
 31406  			break
 31407  		}
 31408  		i1 := x1.AuxInt
 31409  		if x1.Aux != s {
 31410  			break
 31411  		}
 31412  		_ = x1.Args[1]
 31413  		if p != x1.Args[0] {
 31414  			break
 31415  		}
 31416  		if mem != x1.Args[1] {
 31417  			break
 31418  		}
 31419  		s2 := o2.Args[1]
 31420  		if s2.Op != OpPPC64SLDconst {
 31421  			break
 31422  		}
 31423  		if s2.AuxInt != 24 {
 31424  			break
 31425  		}
 31426  		x3 := s2.Args[0]
 31427  		if x3.Op != OpPPC64MOVBZload {
 31428  			break
 31429  		}
 31430  		i3 := x3.AuxInt
 31431  		if x3.Aux != s {
 31432  			break
 31433  		}
 31434  		_ = x3.Args[1]
 31435  		if p != x3.Args[0] {
 31436  			break
 31437  		}
 31438  		if mem != x3.Args[1] {
 31439  			break
 31440  		}
 31441  		s3 := o3.Args[1]
 31442  		if s3.Op != OpPPC64SLDconst {
 31443  			break
 31444  		}
 31445  		if s3.AuxInt != 32 {
 31446  			break
 31447  		}
 31448  		x4 := s3.Args[0]
 31449  		if x4.Op != OpPPC64MOVBZload {
 31450  			break
 31451  		}
 31452  		i4 := x4.AuxInt
 31453  		if x4.Aux != s {
 31454  			break
 31455  		}
 31456  		_ = x4.Args[1]
 31457  		if p != x4.Args[0] {
 31458  			break
 31459  		}
 31460  		if mem != x4.Args[1] {
 31461  			break
 31462  		}
 31463  		s4 := o4.Args[1]
 31464  		if s4.Op != OpPPC64SLDconst {
 31465  			break
 31466  		}
 31467  		if s4.AuxInt != 40 {
 31468  			break
 31469  		}
 31470  		x5 := s4.Args[0]
 31471  		if x5.Op != OpPPC64MOVBZload {
 31472  			break
 31473  		}
 31474  		i5 := x5.AuxInt
 31475  		if x5.Aux != s {
 31476  			break
 31477  		}
 31478  		_ = x5.Args[1]
 31479  		if p != x5.Args[0] {
 31480  			break
 31481  		}
 31482  		if mem != x5.Args[1] {
 31483  			break
 31484  		}
 31485  		s6 := v.Args[1]
 31486  		if s6.Op != OpPPC64SLDconst {
 31487  			break
 31488  		}
 31489  		if s6.AuxInt != 56 {
 31490  			break
 31491  		}
 31492  		x7 := s6.Args[0]
 31493  		if x7.Op != OpPPC64MOVBZload {
 31494  			break
 31495  		}
 31496  		i7 := x7.AuxInt
 31497  		if x7.Aux != s {
 31498  			break
 31499  		}
 31500  		_ = x7.Args[1]
 31501  		if p != x7.Args[0] {
 31502  			break
 31503  		}
 31504  		if mem != x7.Args[1] {
 31505  			break
 31506  		}
 31507  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31508  			break
 31509  		}
 31510  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31511  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31512  		v.reset(OpCopy)
 31513  		v.AddArg(v0)
 31514  		v0.AuxInt = i0
 31515  		v0.Aux = s
 31516  		v0.AddArg(p)
 31517  		v0.AddArg(mem)
 31518  		return true
 31519  	}
 31520  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31521  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31522  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31523  	for {
 31524  		t := v.Type
 31525  		_ = v.Args[1]
 31526  		o5 := v.Args[0]
 31527  		if o5.Op != OpPPC64OR {
 31528  			break
 31529  		}
 31530  		if o5.Type != t {
 31531  			break
 31532  		}
 31533  		_ = o5.Args[1]
 31534  		s5 := o5.Args[0]
 31535  		if s5.Op != OpPPC64SLDconst {
 31536  			break
 31537  		}
 31538  		if s5.AuxInt != 48 {
 31539  			break
 31540  		}
 31541  		x6 := s5.Args[0]
 31542  		if x6.Op != OpPPC64MOVBZload {
 31543  			break
 31544  		}
 31545  		i6 := x6.AuxInt
 31546  		s := x6.Aux
 31547  		_ = x6.Args[1]
 31548  		p := x6.Args[0]
 31549  		mem := x6.Args[1]
 31550  		o4 := o5.Args[1]
 31551  		if o4.Op != OpPPC64OR {
 31552  			break
 31553  		}
 31554  		if o4.Type != t {
 31555  			break
 31556  		}
 31557  		_ = o4.Args[1]
 31558  		o3 := o4.Args[0]
 31559  		if o3.Op != OpPPC64OR {
 31560  			break
 31561  		}
 31562  		if o3.Type != t {
 31563  			break
 31564  		}
 31565  		_ = o3.Args[1]
 31566  		o2 := o3.Args[0]
 31567  		if o2.Op != OpPPC64OR {
 31568  			break
 31569  		}
 31570  		if o2.Type != t {
 31571  			break
 31572  		}
 31573  		_ = o2.Args[1]
 31574  		o1 := o2.Args[0]
 31575  		if o1.Op != OpPPC64OR {
 31576  			break
 31577  		}
 31578  		if o1.Type != t {
 31579  			break
 31580  		}
 31581  		_ = o1.Args[1]
 31582  		o0 := o1.Args[0]
 31583  		if o0.Op != OpPPC64OR {
 31584  			break
 31585  		}
 31586  		if o0.Type != t {
 31587  			break
 31588  		}
 31589  		_ = o0.Args[1]
 31590  		s0 := o0.Args[0]
 31591  		if s0.Op != OpPPC64SLDconst {
 31592  			break
 31593  		}
 31594  		if s0.AuxInt != 8 {
 31595  			break
 31596  		}
 31597  		x1 := s0.Args[0]
 31598  		if x1.Op != OpPPC64MOVBZload {
 31599  			break
 31600  		}
 31601  		i1 := x1.AuxInt
 31602  		if x1.Aux != s {
 31603  			break
 31604  		}
 31605  		_ = x1.Args[1]
 31606  		if p != x1.Args[0] {
 31607  			break
 31608  		}
 31609  		if mem != x1.Args[1] {
 31610  			break
 31611  		}
 31612  		x0 := o0.Args[1]
 31613  		if x0.Op != OpPPC64MOVBZload {
 31614  			break
 31615  		}
 31616  		i0 := x0.AuxInt
 31617  		if x0.Aux != s {
 31618  			break
 31619  		}
 31620  		_ = x0.Args[1]
 31621  		if p != x0.Args[0] {
 31622  			break
 31623  		}
 31624  		if mem != x0.Args[1] {
 31625  			break
 31626  		}
 31627  		s1 := o1.Args[1]
 31628  		if s1.Op != OpPPC64SLDconst {
 31629  			break
 31630  		}
 31631  		if s1.AuxInt != 16 {
 31632  			break
 31633  		}
 31634  		x2 := s1.Args[0]
 31635  		if x2.Op != OpPPC64MOVBZload {
 31636  			break
 31637  		}
 31638  		i2 := x2.AuxInt
 31639  		if x2.Aux != s {
 31640  			break
 31641  		}
 31642  		_ = x2.Args[1]
 31643  		if p != x2.Args[0] {
 31644  			break
 31645  		}
 31646  		if mem != x2.Args[1] {
 31647  			break
 31648  		}
 31649  		s2 := o2.Args[1]
 31650  		if s2.Op != OpPPC64SLDconst {
 31651  			break
 31652  		}
 31653  		if s2.AuxInt != 24 {
 31654  			break
 31655  		}
 31656  		x3 := s2.Args[0]
 31657  		if x3.Op != OpPPC64MOVBZload {
 31658  			break
 31659  		}
 31660  		i3 := x3.AuxInt
 31661  		if x3.Aux != s {
 31662  			break
 31663  		}
 31664  		_ = x3.Args[1]
 31665  		if p != x3.Args[0] {
 31666  			break
 31667  		}
 31668  		if mem != x3.Args[1] {
 31669  			break
 31670  		}
 31671  		s3 := o3.Args[1]
 31672  		if s3.Op != OpPPC64SLDconst {
 31673  			break
 31674  		}
 31675  		if s3.AuxInt != 32 {
 31676  			break
 31677  		}
 31678  		x4 := s3.Args[0]
 31679  		if x4.Op != OpPPC64MOVBZload {
 31680  			break
 31681  		}
 31682  		i4 := x4.AuxInt
 31683  		if x4.Aux != s {
 31684  			break
 31685  		}
 31686  		_ = x4.Args[1]
 31687  		if p != x4.Args[0] {
 31688  			break
 31689  		}
 31690  		if mem != x4.Args[1] {
 31691  			break
 31692  		}
 31693  		s4 := o4.Args[1]
 31694  		if s4.Op != OpPPC64SLDconst {
 31695  			break
 31696  		}
 31697  		if s4.AuxInt != 40 {
 31698  			break
 31699  		}
 31700  		x5 := s4.Args[0]
 31701  		if x5.Op != OpPPC64MOVBZload {
 31702  			break
 31703  		}
 31704  		i5 := x5.AuxInt
 31705  		if x5.Aux != s {
 31706  			break
 31707  		}
 31708  		_ = x5.Args[1]
 31709  		if p != x5.Args[0] {
 31710  			break
 31711  		}
 31712  		if mem != x5.Args[1] {
 31713  			break
 31714  		}
 31715  		s6 := v.Args[1]
 31716  		if s6.Op != OpPPC64SLDconst {
 31717  			break
 31718  		}
 31719  		if s6.AuxInt != 56 {
 31720  			break
 31721  		}
 31722  		x7 := s6.Args[0]
 31723  		if x7.Op != OpPPC64MOVBZload {
 31724  			break
 31725  		}
 31726  		i7 := x7.AuxInt
 31727  		if x7.Aux != s {
 31728  			break
 31729  		}
 31730  		_ = x7.Args[1]
 31731  		if p != x7.Args[0] {
 31732  			break
 31733  		}
 31734  		if mem != x7.Args[1] {
 31735  			break
 31736  		}
 31737  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31738  			break
 31739  		}
 31740  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31741  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31742  		v.reset(OpCopy)
 31743  		v.AddArg(v0)
 31744  		v0.AuxInt = i0
 31745  		v0.Aux = s
 31746  		v0.AddArg(p)
 31747  		v0.AddArg(mem)
 31748  		return true
 31749  	}
 31750  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31751  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31752  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31753  	for {
 31754  		t := v.Type
 31755  		_ = v.Args[1]
 31756  		o5 := v.Args[0]
 31757  		if o5.Op != OpPPC64OR {
 31758  			break
 31759  		}
 31760  		if o5.Type != t {
 31761  			break
 31762  		}
 31763  		_ = o5.Args[1]
 31764  		s5 := o5.Args[0]
 31765  		if s5.Op != OpPPC64SLDconst {
 31766  			break
 31767  		}
 31768  		if s5.AuxInt != 48 {
 31769  			break
 31770  		}
 31771  		x6 := s5.Args[0]
 31772  		if x6.Op != OpPPC64MOVBZload {
 31773  			break
 31774  		}
 31775  		i6 := x6.AuxInt
 31776  		s := x6.Aux
 31777  		_ = x6.Args[1]
 31778  		p := x6.Args[0]
 31779  		mem := x6.Args[1]
 31780  		o4 := o5.Args[1]
 31781  		if o4.Op != OpPPC64OR {
 31782  			break
 31783  		}
 31784  		if o4.Type != t {
 31785  			break
 31786  		}
 31787  		_ = o4.Args[1]
 31788  		o3 := o4.Args[0]
 31789  		if o3.Op != OpPPC64OR {
 31790  			break
 31791  		}
 31792  		if o3.Type != t {
 31793  			break
 31794  		}
 31795  		_ = o3.Args[1]
 31796  		o2 := o3.Args[0]
 31797  		if o2.Op != OpPPC64OR {
 31798  			break
 31799  		}
 31800  		if o2.Type != t {
 31801  			break
 31802  		}
 31803  		_ = o2.Args[1]
 31804  		o1 := o2.Args[0]
 31805  		if o1.Op != OpPPC64OR {
 31806  			break
 31807  		}
 31808  		if o1.Type != t {
 31809  			break
 31810  		}
 31811  		_ = o1.Args[1]
 31812  		o0 := o1.Args[0]
 31813  		if o0.Op != OpPPC64OR {
 31814  			break
 31815  		}
 31816  		if o0.Type != t {
 31817  			break
 31818  		}
 31819  		_ = o0.Args[1]
 31820  		x0 := o0.Args[0]
 31821  		if x0.Op != OpPPC64MOVBZload {
 31822  			break
 31823  		}
 31824  		i0 := x0.AuxInt
 31825  		if x0.Aux != s {
 31826  			break
 31827  		}
 31828  		_ = x0.Args[1]
 31829  		if p != x0.Args[0] {
 31830  			break
 31831  		}
 31832  		if mem != x0.Args[1] {
 31833  			break
 31834  		}
 31835  		s0 := o0.Args[1]
 31836  		if s0.Op != OpPPC64SLDconst {
 31837  			break
 31838  		}
 31839  		if s0.AuxInt != 8 {
 31840  			break
 31841  		}
 31842  		x1 := s0.Args[0]
 31843  		if x1.Op != OpPPC64MOVBZload {
 31844  			break
 31845  		}
 31846  		i1 := x1.AuxInt
 31847  		if x1.Aux != s {
 31848  			break
 31849  		}
 31850  		_ = x1.Args[1]
 31851  		if p != x1.Args[0] {
 31852  			break
 31853  		}
 31854  		if mem != x1.Args[1] {
 31855  			break
 31856  		}
 31857  		s1 := o1.Args[1]
 31858  		if s1.Op != OpPPC64SLDconst {
 31859  			break
 31860  		}
 31861  		if s1.AuxInt != 16 {
 31862  			break
 31863  		}
 31864  		x2 := s1.Args[0]
 31865  		if x2.Op != OpPPC64MOVBZload {
 31866  			break
 31867  		}
 31868  		i2 := x2.AuxInt
 31869  		if x2.Aux != s {
 31870  			break
 31871  		}
 31872  		_ = x2.Args[1]
 31873  		if p != x2.Args[0] {
 31874  			break
 31875  		}
 31876  		if mem != x2.Args[1] {
 31877  			break
 31878  		}
 31879  		s2 := o2.Args[1]
 31880  		if s2.Op != OpPPC64SLDconst {
 31881  			break
 31882  		}
 31883  		if s2.AuxInt != 24 {
 31884  			break
 31885  		}
 31886  		x3 := s2.Args[0]
 31887  		if x3.Op != OpPPC64MOVBZload {
 31888  			break
 31889  		}
 31890  		i3 := x3.AuxInt
 31891  		if x3.Aux != s {
 31892  			break
 31893  		}
 31894  		_ = x3.Args[1]
 31895  		if p != x3.Args[0] {
 31896  			break
 31897  		}
 31898  		if mem != x3.Args[1] {
 31899  			break
 31900  		}
 31901  		s3 := o3.Args[1]
 31902  		if s3.Op != OpPPC64SLDconst {
 31903  			break
 31904  		}
 31905  		if s3.AuxInt != 32 {
 31906  			break
 31907  		}
 31908  		x4 := s3.Args[0]
 31909  		if x4.Op != OpPPC64MOVBZload {
 31910  			break
 31911  		}
 31912  		i4 := x4.AuxInt
 31913  		if x4.Aux != s {
 31914  			break
 31915  		}
 31916  		_ = x4.Args[1]
 31917  		if p != x4.Args[0] {
 31918  			break
 31919  		}
 31920  		if mem != x4.Args[1] {
 31921  			break
 31922  		}
 31923  		s4 := o4.Args[1]
 31924  		if s4.Op != OpPPC64SLDconst {
 31925  			break
 31926  		}
 31927  		if s4.AuxInt != 40 {
 31928  			break
 31929  		}
 31930  		x5 := s4.Args[0]
 31931  		if x5.Op != OpPPC64MOVBZload {
 31932  			break
 31933  		}
 31934  		i5 := x5.AuxInt
 31935  		if x5.Aux != s {
 31936  			break
 31937  		}
 31938  		_ = x5.Args[1]
 31939  		if p != x5.Args[0] {
 31940  			break
 31941  		}
 31942  		if mem != x5.Args[1] {
 31943  			break
 31944  		}
 31945  		s6 := v.Args[1]
 31946  		if s6.Op != OpPPC64SLDconst {
 31947  			break
 31948  		}
 31949  		if s6.AuxInt != 56 {
 31950  			break
 31951  		}
 31952  		x7 := s6.Args[0]
 31953  		if x7.Op != OpPPC64MOVBZload {
 31954  			break
 31955  		}
 31956  		i7 := x7.AuxInt
 31957  		if x7.Aux != s {
 31958  			break
 31959  		}
 31960  		_ = x7.Args[1]
 31961  		if p != x7.Args[0] {
 31962  			break
 31963  		}
 31964  		if mem != x7.Args[1] {
 31965  			break
 31966  		}
 31967  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31968  			break
 31969  		}
 31970  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31971  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31972  		v.reset(OpCopy)
 31973  		v.AddArg(v0)
 31974  		v0.AuxInt = i0
 31975  		v0.Aux = s
 31976  		v0.AddArg(p)
 31977  		v0.AddArg(mem)
 31978  		return true
 31979  	}
 31980  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31981  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31982  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31983  	for {
 31984  		t := v.Type
 31985  		_ = v.Args[1]
 31986  		o5 := v.Args[0]
 31987  		if o5.Op != OpPPC64OR {
 31988  			break
 31989  		}
 31990  		if o5.Type != t {
 31991  			break
 31992  		}
 31993  		_ = o5.Args[1]
 31994  		o4 := o5.Args[0]
 31995  		if o4.Op != OpPPC64OR {
 31996  			break
 31997  		}
 31998  		if o4.Type != t {
 31999  			break
 32000  		}
 32001  		_ = o4.Args[1]
 32002  		s4 := o4.Args[0]
 32003  		if s4.Op != OpPPC64SLDconst {
 32004  			break
 32005  		}
 32006  		if s4.AuxInt != 40 {
 32007  			break
 32008  		}
 32009  		x5 := s4.Args[0]
 32010  		if x5.Op != OpPPC64MOVBZload {
 32011  			break
 32012  		}
 32013  		i5 := x5.AuxInt
 32014  		s := x5.Aux
 32015  		_ = x5.Args[1]
 32016  		p := x5.Args[0]
 32017  		mem := x5.Args[1]
 32018  		o3 := o4.Args[1]
 32019  		if o3.Op != OpPPC64OR {
 32020  			break
 32021  		}
 32022  		if o3.Type != t {
 32023  			break
 32024  		}
 32025  		_ = o3.Args[1]
 32026  		s3 := o3.Args[0]
 32027  		if s3.Op != OpPPC64SLDconst {
 32028  			break
 32029  		}
 32030  		if s3.AuxInt != 32 {
 32031  			break
 32032  		}
 32033  		x4 := s3.Args[0]
 32034  		if x4.Op != OpPPC64MOVBZload {
 32035  			break
 32036  		}
 32037  		i4 := x4.AuxInt
 32038  		if x4.Aux != s {
 32039  			break
 32040  		}
 32041  		_ = x4.Args[1]
 32042  		if p != x4.Args[0] {
 32043  			break
 32044  		}
 32045  		if mem != x4.Args[1] {
 32046  			break
 32047  		}
 32048  		o2 := o3.Args[1]
 32049  		if o2.Op != OpPPC64OR {
 32050  			break
 32051  		}
 32052  		if o2.Type != t {
 32053  			break
 32054  		}
 32055  		_ = o2.Args[1]
 32056  		s2 := o2.Args[0]
 32057  		if s2.Op != OpPPC64SLDconst {
 32058  			break
 32059  		}
 32060  		if s2.AuxInt != 24 {
 32061  			break
 32062  		}
 32063  		x3 := s2.Args[0]
 32064  		if x3.Op != OpPPC64MOVBZload {
 32065  			break
 32066  		}
 32067  		i3 := x3.AuxInt
 32068  		if x3.Aux != s {
 32069  			break
 32070  		}
 32071  		_ = x3.Args[1]
 32072  		if p != x3.Args[0] {
 32073  			break
 32074  		}
 32075  		if mem != x3.Args[1] {
 32076  			break
 32077  		}
 32078  		o1 := o2.Args[1]
 32079  		if o1.Op != OpPPC64OR {
 32080  			break
 32081  		}
 32082  		if o1.Type != t {
 32083  			break
 32084  		}
 32085  		_ = o1.Args[1]
 32086  		s1 := o1.Args[0]
 32087  		if s1.Op != OpPPC64SLDconst {
 32088  			break
 32089  		}
 32090  		if s1.AuxInt != 16 {
 32091  			break
 32092  		}
 32093  		x2 := s1.Args[0]
 32094  		if x2.Op != OpPPC64MOVBZload {
 32095  			break
 32096  		}
 32097  		i2 := x2.AuxInt
 32098  		if x2.Aux != s {
 32099  			break
 32100  		}
 32101  		_ = x2.Args[1]
 32102  		if p != x2.Args[0] {
 32103  			break
 32104  		}
 32105  		if mem != x2.Args[1] {
 32106  			break
 32107  		}
 32108  		o0 := o1.Args[1]
 32109  		if o0.Op != OpPPC64OR {
 32110  			break
 32111  		}
 32112  		if o0.Type != t {
 32113  			break
 32114  		}
 32115  		_ = o0.Args[1]
 32116  		s0 := o0.Args[0]
 32117  		if s0.Op != OpPPC64SLDconst {
 32118  			break
 32119  		}
 32120  		if s0.AuxInt != 8 {
 32121  			break
 32122  		}
 32123  		x1 := s0.Args[0]
 32124  		if x1.Op != OpPPC64MOVBZload {
 32125  			break
 32126  		}
 32127  		i1 := x1.AuxInt
 32128  		if x1.Aux != s {
 32129  			break
 32130  		}
 32131  		_ = x1.Args[1]
 32132  		if p != x1.Args[0] {
 32133  			break
 32134  		}
 32135  		if mem != x1.Args[1] {
 32136  			break
 32137  		}
 32138  		x0 := o0.Args[1]
 32139  		if x0.Op != OpPPC64MOVBZload {
 32140  			break
 32141  		}
 32142  		i0 := x0.AuxInt
 32143  		if x0.Aux != s {
 32144  			break
 32145  		}
 32146  		_ = x0.Args[1]
 32147  		if p != x0.Args[0] {
 32148  			break
 32149  		}
 32150  		if mem != x0.Args[1] {
 32151  			break
 32152  		}
 32153  		s5 := o5.Args[1]
 32154  		if s5.Op != OpPPC64SLDconst {
 32155  			break
 32156  		}
 32157  		if s5.AuxInt != 48 {
 32158  			break
 32159  		}
 32160  		x6 := s5.Args[0]
 32161  		if x6.Op != OpPPC64MOVBZload {
 32162  			break
 32163  		}
 32164  		i6 := x6.AuxInt
 32165  		if x6.Aux != s {
 32166  			break
 32167  		}
 32168  		_ = x6.Args[1]
 32169  		if p != x6.Args[0] {
 32170  			break
 32171  		}
 32172  		if mem != x6.Args[1] {
 32173  			break
 32174  		}
 32175  		s6 := v.Args[1]
 32176  		if s6.Op != OpPPC64SLDconst {
 32177  			break
 32178  		}
 32179  		if s6.AuxInt != 56 {
 32180  			break
 32181  		}
 32182  		x7 := s6.Args[0]
 32183  		if x7.Op != OpPPC64MOVBZload {
 32184  			break
 32185  		}
 32186  		i7 := x7.AuxInt
 32187  		if x7.Aux != s {
 32188  			break
 32189  		}
 32190  		_ = x7.Args[1]
 32191  		if p != x7.Args[0] {
 32192  			break
 32193  		}
 32194  		if mem != x7.Args[1] {
 32195  			break
 32196  		}
 32197  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32198  			break
 32199  		}
 32200  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32201  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32202  		v.reset(OpCopy)
 32203  		v.AddArg(v0)
 32204  		v0.AuxInt = i0
 32205  		v0.Aux = s
 32206  		v0.AddArg(p)
 32207  		v0.AddArg(mem)
 32208  		return true
 32209  	}
 32210  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32211  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32212  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32213  	for {
 32214  		t := v.Type
 32215  		_ = v.Args[1]
 32216  		o5 := v.Args[0]
 32217  		if o5.Op != OpPPC64OR {
 32218  			break
 32219  		}
 32220  		if o5.Type != t {
 32221  			break
 32222  		}
 32223  		_ = o5.Args[1]
 32224  		o4 := o5.Args[0]
 32225  		if o4.Op != OpPPC64OR {
 32226  			break
 32227  		}
 32228  		if o4.Type != t {
 32229  			break
 32230  		}
 32231  		_ = o4.Args[1]
 32232  		s4 := o4.Args[0]
 32233  		if s4.Op != OpPPC64SLDconst {
 32234  			break
 32235  		}
 32236  		if s4.AuxInt != 40 {
 32237  			break
 32238  		}
 32239  		x5 := s4.Args[0]
 32240  		if x5.Op != OpPPC64MOVBZload {
 32241  			break
 32242  		}
 32243  		i5 := x5.AuxInt
 32244  		s := x5.Aux
 32245  		_ = x5.Args[1]
 32246  		p := x5.Args[0]
 32247  		mem := x5.Args[1]
 32248  		o3 := o4.Args[1]
 32249  		if o3.Op != OpPPC64OR {
 32250  			break
 32251  		}
 32252  		if o3.Type != t {
 32253  			break
 32254  		}
 32255  		_ = o3.Args[1]
 32256  		s3 := o3.Args[0]
 32257  		if s3.Op != OpPPC64SLDconst {
 32258  			break
 32259  		}
 32260  		if s3.AuxInt != 32 {
 32261  			break
 32262  		}
 32263  		x4 := s3.Args[0]
 32264  		if x4.Op != OpPPC64MOVBZload {
 32265  			break
 32266  		}
 32267  		i4 := x4.AuxInt
 32268  		if x4.Aux != s {
 32269  			break
 32270  		}
 32271  		_ = x4.Args[1]
 32272  		if p != x4.Args[0] {
 32273  			break
 32274  		}
 32275  		if mem != x4.Args[1] {
 32276  			break
 32277  		}
 32278  		o2 := o3.Args[1]
 32279  		if o2.Op != OpPPC64OR {
 32280  			break
 32281  		}
 32282  		if o2.Type != t {
 32283  			break
 32284  		}
 32285  		_ = o2.Args[1]
 32286  		s2 := o2.Args[0]
 32287  		if s2.Op != OpPPC64SLDconst {
 32288  			break
 32289  		}
 32290  		if s2.AuxInt != 24 {
 32291  			break
 32292  		}
 32293  		x3 := s2.Args[0]
 32294  		if x3.Op != OpPPC64MOVBZload {
 32295  			break
 32296  		}
 32297  		i3 := x3.AuxInt
 32298  		if x3.Aux != s {
 32299  			break
 32300  		}
 32301  		_ = x3.Args[1]
 32302  		if p != x3.Args[0] {
 32303  			break
 32304  		}
 32305  		if mem != x3.Args[1] {
 32306  			break
 32307  		}
 32308  		o1 := o2.Args[1]
 32309  		if o1.Op != OpPPC64OR {
 32310  			break
 32311  		}
 32312  		if o1.Type != t {
 32313  			break
 32314  		}
 32315  		_ = o1.Args[1]
 32316  		s1 := o1.Args[0]
 32317  		if s1.Op != OpPPC64SLDconst {
 32318  			break
 32319  		}
 32320  		if s1.AuxInt != 16 {
 32321  			break
 32322  		}
 32323  		x2 := s1.Args[0]
 32324  		if x2.Op != OpPPC64MOVBZload {
 32325  			break
 32326  		}
 32327  		i2 := x2.AuxInt
 32328  		if x2.Aux != s {
 32329  			break
 32330  		}
 32331  		_ = x2.Args[1]
 32332  		if p != x2.Args[0] {
 32333  			break
 32334  		}
 32335  		if mem != x2.Args[1] {
 32336  			break
 32337  		}
 32338  		o0 := o1.Args[1]
 32339  		if o0.Op != OpPPC64OR {
 32340  			break
 32341  		}
 32342  		if o0.Type != t {
 32343  			break
 32344  		}
 32345  		_ = o0.Args[1]
 32346  		x0 := o0.Args[0]
 32347  		if x0.Op != OpPPC64MOVBZload {
 32348  			break
 32349  		}
 32350  		i0 := x0.AuxInt
 32351  		if x0.Aux != s {
 32352  			break
 32353  		}
 32354  		_ = x0.Args[1]
 32355  		if p != x0.Args[0] {
 32356  			break
 32357  		}
 32358  		if mem != x0.Args[1] {
 32359  			break
 32360  		}
 32361  		s0 := o0.Args[1]
 32362  		if s0.Op != OpPPC64SLDconst {
 32363  			break
 32364  		}
 32365  		if s0.AuxInt != 8 {
 32366  			break
 32367  		}
 32368  		x1 := s0.Args[0]
 32369  		if x1.Op != OpPPC64MOVBZload {
 32370  			break
 32371  		}
 32372  		i1 := x1.AuxInt
 32373  		if x1.Aux != s {
 32374  			break
 32375  		}
 32376  		_ = x1.Args[1]
 32377  		if p != x1.Args[0] {
 32378  			break
 32379  		}
 32380  		if mem != x1.Args[1] {
 32381  			break
 32382  		}
 32383  		s5 := o5.Args[1]
 32384  		if s5.Op != OpPPC64SLDconst {
 32385  			break
 32386  		}
 32387  		if s5.AuxInt != 48 {
 32388  			break
 32389  		}
 32390  		x6 := s5.Args[0]
 32391  		if x6.Op != OpPPC64MOVBZload {
 32392  			break
 32393  		}
 32394  		i6 := x6.AuxInt
 32395  		if x6.Aux != s {
 32396  			break
 32397  		}
 32398  		_ = x6.Args[1]
 32399  		if p != x6.Args[0] {
 32400  			break
 32401  		}
 32402  		if mem != x6.Args[1] {
 32403  			break
 32404  		}
 32405  		s6 := v.Args[1]
 32406  		if s6.Op != OpPPC64SLDconst {
 32407  			break
 32408  		}
 32409  		if s6.AuxInt != 56 {
 32410  			break
 32411  		}
 32412  		x7 := s6.Args[0]
 32413  		if x7.Op != OpPPC64MOVBZload {
 32414  			break
 32415  		}
 32416  		i7 := x7.AuxInt
 32417  		if x7.Aux != s {
 32418  			break
 32419  		}
 32420  		_ = x7.Args[1]
 32421  		if p != x7.Args[0] {
 32422  			break
 32423  		}
 32424  		if mem != x7.Args[1] {
 32425  			break
 32426  		}
 32427  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32428  			break
 32429  		}
 32430  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32431  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32432  		v.reset(OpCopy)
 32433  		v.AddArg(v0)
 32434  		v0.AuxInt = i0
 32435  		v0.Aux = s
 32436  		v0.AddArg(p)
 32437  		v0.AddArg(mem)
 32438  		return true
 32439  	}
 32440  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32441  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32442  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32443  	for {
 32444  		t := v.Type
 32445  		_ = v.Args[1]
 32446  		o5 := v.Args[0]
 32447  		if o5.Op != OpPPC64OR {
 32448  			break
 32449  		}
 32450  		if o5.Type != t {
 32451  			break
 32452  		}
 32453  		_ = o5.Args[1]
 32454  		o4 := o5.Args[0]
 32455  		if o4.Op != OpPPC64OR {
 32456  			break
 32457  		}
 32458  		if o4.Type != t {
 32459  			break
 32460  		}
 32461  		_ = o4.Args[1]
 32462  		s4 := o4.Args[0]
 32463  		if s4.Op != OpPPC64SLDconst {
 32464  			break
 32465  		}
 32466  		if s4.AuxInt != 40 {
 32467  			break
 32468  		}
 32469  		x5 := s4.Args[0]
 32470  		if x5.Op != OpPPC64MOVBZload {
 32471  			break
 32472  		}
 32473  		i5 := x5.AuxInt
 32474  		s := x5.Aux
 32475  		_ = x5.Args[1]
 32476  		p := x5.Args[0]
 32477  		mem := x5.Args[1]
 32478  		o3 := o4.Args[1]
 32479  		if o3.Op != OpPPC64OR {
 32480  			break
 32481  		}
 32482  		if o3.Type != t {
 32483  			break
 32484  		}
 32485  		_ = o3.Args[1]
 32486  		s3 := o3.Args[0]
 32487  		if s3.Op != OpPPC64SLDconst {
 32488  			break
 32489  		}
 32490  		if s3.AuxInt != 32 {
 32491  			break
 32492  		}
 32493  		x4 := s3.Args[0]
 32494  		if x4.Op != OpPPC64MOVBZload {
 32495  			break
 32496  		}
 32497  		i4 := x4.AuxInt
 32498  		if x4.Aux != s {
 32499  			break
 32500  		}
 32501  		_ = x4.Args[1]
 32502  		if p != x4.Args[0] {
 32503  			break
 32504  		}
 32505  		if mem != x4.Args[1] {
 32506  			break
 32507  		}
 32508  		o2 := o3.Args[1]
 32509  		if o2.Op != OpPPC64OR {
 32510  			break
 32511  		}
 32512  		if o2.Type != t {
 32513  			break
 32514  		}
 32515  		_ = o2.Args[1]
 32516  		s2 := o2.Args[0]
 32517  		if s2.Op != OpPPC64SLDconst {
 32518  			break
 32519  		}
 32520  		if s2.AuxInt != 24 {
 32521  			break
 32522  		}
 32523  		x3 := s2.Args[0]
 32524  		if x3.Op != OpPPC64MOVBZload {
 32525  			break
 32526  		}
 32527  		i3 := x3.AuxInt
 32528  		if x3.Aux != s {
 32529  			break
 32530  		}
 32531  		_ = x3.Args[1]
 32532  		if p != x3.Args[0] {
 32533  			break
 32534  		}
 32535  		if mem != x3.Args[1] {
 32536  			break
 32537  		}
 32538  		o1 := o2.Args[1]
 32539  		if o1.Op != OpPPC64OR {
 32540  			break
 32541  		}
 32542  		if o1.Type != t {
 32543  			break
 32544  		}
 32545  		_ = o1.Args[1]
 32546  		o0 := o1.Args[0]
 32547  		if o0.Op != OpPPC64OR {
 32548  			break
 32549  		}
 32550  		if o0.Type != t {
 32551  			break
 32552  		}
 32553  		_ = o0.Args[1]
 32554  		s0 := o0.Args[0]
 32555  		if s0.Op != OpPPC64SLDconst {
 32556  			break
 32557  		}
 32558  		if s0.AuxInt != 8 {
 32559  			break
 32560  		}
 32561  		x1 := s0.Args[0]
 32562  		if x1.Op != OpPPC64MOVBZload {
 32563  			break
 32564  		}
 32565  		i1 := x1.AuxInt
 32566  		if x1.Aux != s {
 32567  			break
 32568  		}
 32569  		_ = x1.Args[1]
 32570  		if p != x1.Args[0] {
 32571  			break
 32572  		}
 32573  		if mem != x1.Args[1] {
 32574  			break
 32575  		}
 32576  		x0 := o0.Args[1]
 32577  		if x0.Op != OpPPC64MOVBZload {
 32578  			break
 32579  		}
 32580  		i0 := x0.AuxInt
 32581  		if x0.Aux != s {
 32582  			break
 32583  		}
 32584  		_ = x0.Args[1]
 32585  		if p != x0.Args[0] {
 32586  			break
 32587  		}
 32588  		if mem != x0.Args[1] {
 32589  			break
 32590  		}
 32591  		s1 := o1.Args[1]
 32592  		if s1.Op != OpPPC64SLDconst {
 32593  			break
 32594  		}
 32595  		if s1.AuxInt != 16 {
 32596  			break
 32597  		}
 32598  		x2 := s1.Args[0]
 32599  		if x2.Op != OpPPC64MOVBZload {
 32600  			break
 32601  		}
 32602  		i2 := x2.AuxInt
 32603  		if x2.Aux != s {
 32604  			break
 32605  		}
 32606  		_ = x2.Args[1]
 32607  		if p != x2.Args[0] {
 32608  			break
 32609  		}
 32610  		if mem != x2.Args[1] {
 32611  			break
 32612  		}
 32613  		s5 := o5.Args[1]
 32614  		if s5.Op != OpPPC64SLDconst {
 32615  			break
 32616  		}
 32617  		if s5.AuxInt != 48 {
 32618  			break
 32619  		}
 32620  		x6 := s5.Args[0]
 32621  		if x6.Op != OpPPC64MOVBZload {
 32622  			break
 32623  		}
 32624  		i6 := x6.AuxInt
 32625  		if x6.Aux != s {
 32626  			break
 32627  		}
 32628  		_ = x6.Args[1]
 32629  		if p != x6.Args[0] {
 32630  			break
 32631  		}
 32632  		if mem != x6.Args[1] {
 32633  			break
 32634  		}
 32635  		s6 := v.Args[1]
 32636  		if s6.Op != OpPPC64SLDconst {
 32637  			break
 32638  		}
 32639  		if s6.AuxInt != 56 {
 32640  			break
 32641  		}
 32642  		x7 := s6.Args[0]
 32643  		if x7.Op != OpPPC64MOVBZload {
 32644  			break
 32645  		}
 32646  		i7 := x7.AuxInt
 32647  		if x7.Aux != s {
 32648  			break
 32649  		}
 32650  		_ = x7.Args[1]
 32651  		if p != x7.Args[0] {
 32652  			break
 32653  		}
 32654  		if mem != x7.Args[1] {
 32655  			break
 32656  		}
 32657  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32658  			break
 32659  		}
 32660  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32661  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32662  		v.reset(OpCopy)
 32663  		v.AddArg(v0)
 32664  		v0.AuxInt = i0
 32665  		v0.Aux = s
 32666  		v0.AddArg(p)
 32667  		v0.AddArg(mem)
 32668  		return true
 32669  	}
 32670  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32671  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32672  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32673  	for {
 32674  		t := v.Type
 32675  		_ = v.Args[1]
 32676  		o5 := v.Args[0]
 32677  		if o5.Op != OpPPC64OR {
 32678  			break
 32679  		}
 32680  		if o5.Type != t {
 32681  			break
 32682  		}
 32683  		_ = o5.Args[1]
 32684  		o4 := o5.Args[0]
 32685  		if o4.Op != OpPPC64OR {
 32686  			break
 32687  		}
 32688  		if o4.Type != t {
 32689  			break
 32690  		}
 32691  		_ = o4.Args[1]
 32692  		s4 := o4.Args[0]
 32693  		if s4.Op != OpPPC64SLDconst {
 32694  			break
 32695  		}
 32696  		if s4.AuxInt != 40 {
 32697  			break
 32698  		}
 32699  		x5 := s4.Args[0]
 32700  		if x5.Op != OpPPC64MOVBZload {
 32701  			break
 32702  		}
 32703  		i5 := x5.AuxInt
 32704  		s := x5.Aux
 32705  		_ = x5.Args[1]
 32706  		p := x5.Args[0]
 32707  		mem := x5.Args[1]
 32708  		o3 := o4.Args[1]
 32709  		if o3.Op != OpPPC64OR {
 32710  			break
 32711  		}
 32712  		if o3.Type != t {
 32713  			break
 32714  		}
 32715  		_ = o3.Args[1]
 32716  		s3 := o3.Args[0]
 32717  		if s3.Op != OpPPC64SLDconst {
 32718  			break
 32719  		}
 32720  		if s3.AuxInt != 32 {
 32721  			break
 32722  		}
 32723  		x4 := s3.Args[0]
 32724  		if x4.Op != OpPPC64MOVBZload {
 32725  			break
 32726  		}
 32727  		i4 := x4.AuxInt
 32728  		if x4.Aux != s {
 32729  			break
 32730  		}
 32731  		_ = x4.Args[1]
 32732  		if p != x4.Args[0] {
 32733  			break
 32734  		}
 32735  		if mem != x4.Args[1] {
 32736  			break
 32737  		}
 32738  		o2 := o3.Args[1]
 32739  		if o2.Op != OpPPC64OR {
 32740  			break
 32741  		}
 32742  		if o2.Type != t {
 32743  			break
 32744  		}
 32745  		_ = o2.Args[1]
 32746  		s2 := o2.Args[0]
 32747  		if s2.Op != OpPPC64SLDconst {
 32748  			break
 32749  		}
 32750  		if s2.AuxInt != 24 {
 32751  			break
 32752  		}
 32753  		x3 := s2.Args[0]
 32754  		if x3.Op != OpPPC64MOVBZload {
 32755  			break
 32756  		}
 32757  		i3 := x3.AuxInt
 32758  		if x3.Aux != s {
 32759  			break
 32760  		}
 32761  		_ = x3.Args[1]
 32762  		if p != x3.Args[0] {
 32763  			break
 32764  		}
 32765  		if mem != x3.Args[1] {
 32766  			break
 32767  		}
 32768  		o1 := o2.Args[1]
 32769  		if o1.Op != OpPPC64OR {
 32770  			break
 32771  		}
 32772  		if o1.Type != t {
 32773  			break
 32774  		}
 32775  		_ = o1.Args[1]
 32776  		o0 := o1.Args[0]
 32777  		if o0.Op != OpPPC64OR {
 32778  			break
 32779  		}
 32780  		if o0.Type != t {
 32781  			break
 32782  		}
 32783  		_ = o0.Args[1]
 32784  		x0 := o0.Args[0]
 32785  		if x0.Op != OpPPC64MOVBZload {
 32786  			break
 32787  		}
 32788  		i0 := x0.AuxInt
 32789  		if x0.Aux != s {
 32790  			break
 32791  		}
 32792  		_ = x0.Args[1]
 32793  		if p != x0.Args[0] {
 32794  			break
 32795  		}
 32796  		if mem != x0.Args[1] {
 32797  			break
 32798  		}
 32799  		s0 := o0.Args[1]
 32800  		if s0.Op != OpPPC64SLDconst {
 32801  			break
 32802  		}
 32803  		if s0.AuxInt != 8 {
 32804  			break
 32805  		}
 32806  		x1 := s0.Args[0]
 32807  		if x1.Op != OpPPC64MOVBZload {
 32808  			break
 32809  		}
 32810  		i1 := x1.AuxInt
 32811  		if x1.Aux != s {
 32812  			break
 32813  		}
 32814  		_ = x1.Args[1]
 32815  		if p != x1.Args[0] {
 32816  			break
 32817  		}
 32818  		if mem != x1.Args[1] {
 32819  			break
 32820  		}
 32821  		s1 := o1.Args[1]
 32822  		if s1.Op != OpPPC64SLDconst {
 32823  			break
 32824  		}
 32825  		if s1.AuxInt != 16 {
 32826  			break
 32827  		}
 32828  		x2 := s1.Args[0]
 32829  		if x2.Op != OpPPC64MOVBZload {
 32830  			break
 32831  		}
 32832  		i2 := x2.AuxInt
 32833  		if x2.Aux != s {
 32834  			break
 32835  		}
 32836  		_ = x2.Args[1]
 32837  		if p != x2.Args[0] {
 32838  			break
 32839  		}
 32840  		if mem != x2.Args[1] {
 32841  			break
 32842  		}
 32843  		s5 := o5.Args[1]
 32844  		if s5.Op != OpPPC64SLDconst {
 32845  			break
 32846  		}
 32847  		if s5.AuxInt != 48 {
 32848  			break
 32849  		}
 32850  		x6 := s5.Args[0]
 32851  		if x6.Op != OpPPC64MOVBZload {
 32852  			break
 32853  		}
 32854  		i6 := x6.AuxInt
 32855  		if x6.Aux != s {
 32856  			break
 32857  		}
 32858  		_ = x6.Args[1]
 32859  		if p != x6.Args[0] {
 32860  			break
 32861  		}
 32862  		if mem != x6.Args[1] {
 32863  			break
 32864  		}
 32865  		s6 := v.Args[1]
 32866  		if s6.Op != OpPPC64SLDconst {
 32867  			break
 32868  		}
 32869  		if s6.AuxInt != 56 {
 32870  			break
 32871  		}
 32872  		x7 := s6.Args[0]
 32873  		if x7.Op != OpPPC64MOVBZload {
 32874  			break
 32875  		}
 32876  		i7 := x7.AuxInt
 32877  		if x7.Aux != s {
 32878  			break
 32879  		}
 32880  		_ = x7.Args[1]
 32881  		if p != x7.Args[0] {
 32882  			break
 32883  		}
 32884  		if mem != x7.Args[1] {
 32885  			break
 32886  		}
 32887  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32888  			break
 32889  		}
 32890  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32891  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32892  		v.reset(OpCopy)
 32893  		v.AddArg(v0)
 32894  		v0.AuxInt = i0
 32895  		v0.Aux = s
 32896  		v0.AddArg(p)
 32897  		v0.AddArg(mem)
 32898  		return true
 32899  	}
 32900  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32901  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32902  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32903  	for {
 32904  		t := v.Type
 32905  		_ = v.Args[1]
 32906  		o5 := v.Args[0]
 32907  		if o5.Op != OpPPC64OR {
 32908  			break
 32909  		}
 32910  		if o5.Type != t {
 32911  			break
 32912  		}
 32913  		_ = o5.Args[1]
 32914  		o4 := o5.Args[0]
 32915  		if o4.Op != OpPPC64OR {
 32916  			break
 32917  		}
 32918  		if o4.Type != t {
 32919  			break
 32920  		}
 32921  		_ = o4.Args[1]
 32922  		s4 := o4.Args[0]
 32923  		if s4.Op != OpPPC64SLDconst {
 32924  			break
 32925  		}
 32926  		if s4.AuxInt != 40 {
 32927  			break
 32928  		}
 32929  		x5 := s4.Args[0]
 32930  		if x5.Op != OpPPC64MOVBZload {
 32931  			break
 32932  		}
 32933  		i5 := x5.AuxInt
 32934  		s := x5.Aux
 32935  		_ = x5.Args[1]
 32936  		p := x5.Args[0]
 32937  		mem := x5.Args[1]
 32938  		o3 := o4.Args[1]
 32939  		if o3.Op != OpPPC64OR {
 32940  			break
 32941  		}
 32942  		if o3.Type != t {
 32943  			break
 32944  		}
 32945  		_ = o3.Args[1]
 32946  		s3 := o3.Args[0]
 32947  		if s3.Op != OpPPC64SLDconst {
 32948  			break
 32949  		}
 32950  		if s3.AuxInt != 32 {
 32951  			break
 32952  		}
 32953  		x4 := s3.Args[0]
 32954  		if x4.Op != OpPPC64MOVBZload {
 32955  			break
 32956  		}
 32957  		i4 := x4.AuxInt
 32958  		if x4.Aux != s {
 32959  			break
 32960  		}
 32961  		_ = x4.Args[1]
 32962  		if p != x4.Args[0] {
 32963  			break
 32964  		}
 32965  		if mem != x4.Args[1] {
 32966  			break
 32967  		}
 32968  		o2 := o3.Args[1]
 32969  		if o2.Op != OpPPC64OR {
 32970  			break
 32971  		}
 32972  		if o2.Type != t {
 32973  			break
 32974  		}
 32975  		_ = o2.Args[1]
 32976  		o1 := o2.Args[0]
 32977  		if o1.Op != OpPPC64OR {
 32978  			break
 32979  		}
 32980  		if o1.Type != t {
 32981  			break
 32982  		}
 32983  		_ = o1.Args[1]
 32984  		s1 := o1.Args[0]
 32985  		if s1.Op != OpPPC64SLDconst {
 32986  			break
 32987  		}
 32988  		if s1.AuxInt != 16 {
 32989  			break
 32990  		}
 32991  		x2 := s1.Args[0]
 32992  		if x2.Op != OpPPC64MOVBZload {
 32993  			break
 32994  		}
 32995  		i2 := x2.AuxInt
 32996  		if x2.Aux != s {
 32997  			break
 32998  		}
 32999  		_ = x2.Args[1]
 33000  		if p != x2.Args[0] {
 33001  			break
 33002  		}
 33003  		if mem != x2.Args[1] {
 33004  			break
 33005  		}
 33006  		o0 := o1.Args[1]
 33007  		if o0.Op != OpPPC64OR {
 33008  			break
 33009  		}
 33010  		if o0.Type != t {
 33011  			break
 33012  		}
 33013  		_ = o0.Args[1]
 33014  		s0 := o0.Args[0]
 33015  		if s0.Op != OpPPC64SLDconst {
 33016  			break
 33017  		}
 33018  		if s0.AuxInt != 8 {
 33019  			break
 33020  		}
 33021  		x1 := s0.Args[0]
 33022  		if x1.Op != OpPPC64MOVBZload {
 33023  			break
 33024  		}
 33025  		i1 := x1.AuxInt
 33026  		if x1.Aux != s {
 33027  			break
 33028  		}
 33029  		_ = x1.Args[1]
 33030  		if p != x1.Args[0] {
 33031  			break
 33032  		}
 33033  		if mem != x1.Args[1] {
 33034  			break
 33035  		}
 33036  		x0 := o0.Args[1]
 33037  		if x0.Op != OpPPC64MOVBZload {
 33038  			break
 33039  		}
 33040  		i0 := x0.AuxInt
 33041  		if x0.Aux != s {
 33042  			break
 33043  		}
 33044  		_ = x0.Args[1]
 33045  		if p != x0.Args[0] {
 33046  			break
 33047  		}
 33048  		if mem != x0.Args[1] {
 33049  			break
 33050  		}
 33051  		s2 := o2.Args[1]
 33052  		if s2.Op != OpPPC64SLDconst {
 33053  			break
 33054  		}
 33055  		if s2.AuxInt != 24 {
 33056  			break
 33057  		}
 33058  		x3 := s2.Args[0]
 33059  		if x3.Op != OpPPC64MOVBZload {
 33060  			break
 33061  		}
 33062  		i3 := x3.AuxInt
 33063  		if x3.Aux != s {
 33064  			break
 33065  		}
 33066  		_ = x3.Args[1]
 33067  		if p != x3.Args[0] {
 33068  			break
 33069  		}
 33070  		if mem != x3.Args[1] {
 33071  			break
 33072  		}
 33073  		s5 := o5.Args[1]
 33074  		if s5.Op != OpPPC64SLDconst {
 33075  			break
 33076  		}
 33077  		if s5.AuxInt != 48 {
 33078  			break
 33079  		}
 33080  		x6 := s5.Args[0]
 33081  		if x6.Op != OpPPC64MOVBZload {
 33082  			break
 33083  		}
 33084  		i6 := x6.AuxInt
 33085  		if x6.Aux != s {
 33086  			break
 33087  		}
 33088  		_ = x6.Args[1]
 33089  		if p != x6.Args[0] {
 33090  			break
 33091  		}
 33092  		if mem != x6.Args[1] {
 33093  			break
 33094  		}
 33095  		s6 := v.Args[1]
 33096  		if s6.Op != OpPPC64SLDconst {
 33097  			break
 33098  		}
 33099  		if s6.AuxInt != 56 {
 33100  			break
 33101  		}
 33102  		x7 := s6.Args[0]
 33103  		if x7.Op != OpPPC64MOVBZload {
 33104  			break
 33105  		}
 33106  		i7 := x7.AuxInt
 33107  		if x7.Aux != s {
 33108  			break
 33109  		}
 33110  		_ = x7.Args[1]
 33111  		if p != x7.Args[0] {
 33112  			break
 33113  		}
 33114  		if mem != x7.Args[1] {
 33115  			break
 33116  		}
 33117  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33118  			break
 33119  		}
 33120  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33121  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33122  		v.reset(OpCopy)
 33123  		v.AddArg(v0)
 33124  		v0.AuxInt = i0
 33125  		v0.Aux = s
 33126  		v0.AddArg(p)
 33127  		v0.AddArg(mem)
 33128  		return true
 33129  	}
 33130  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33131  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33132  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33133  	for {
 33134  		t := v.Type
 33135  		_ = v.Args[1]
 33136  		o5 := v.Args[0]
 33137  		if o5.Op != OpPPC64OR {
 33138  			break
 33139  		}
 33140  		if o5.Type != t {
 33141  			break
 33142  		}
 33143  		_ = o5.Args[1]
 33144  		o4 := o5.Args[0]
 33145  		if o4.Op != OpPPC64OR {
 33146  			break
 33147  		}
 33148  		if o4.Type != t {
 33149  			break
 33150  		}
 33151  		_ = o4.Args[1]
 33152  		s4 := o4.Args[0]
 33153  		if s4.Op != OpPPC64SLDconst {
 33154  			break
 33155  		}
 33156  		if s4.AuxInt != 40 {
 33157  			break
 33158  		}
 33159  		x5 := s4.Args[0]
 33160  		if x5.Op != OpPPC64MOVBZload {
 33161  			break
 33162  		}
 33163  		i5 := x5.AuxInt
 33164  		s := x5.Aux
 33165  		_ = x5.Args[1]
 33166  		p := x5.Args[0]
 33167  		mem := x5.Args[1]
 33168  		o3 := o4.Args[1]
 33169  		if o3.Op != OpPPC64OR {
 33170  			break
 33171  		}
 33172  		if o3.Type != t {
 33173  			break
 33174  		}
 33175  		_ = o3.Args[1]
 33176  		s3 := o3.Args[0]
 33177  		if s3.Op != OpPPC64SLDconst {
 33178  			break
 33179  		}
 33180  		if s3.AuxInt != 32 {
 33181  			break
 33182  		}
 33183  		x4 := s3.Args[0]
 33184  		if x4.Op != OpPPC64MOVBZload {
 33185  			break
 33186  		}
 33187  		i4 := x4.AuxInt
 33188  		if x4.Aux != s {
 33189  			break
 33190  		}
 33191  		_ = x4.Args[1]
 33192  		if p != x4.Args[0] {
 33193  			break
 33194  		}
 33195  		if mem != x4.Args[1] {
 33196  			break
 33197  		}
 33198  		o2 := o3.Args[1]
 33199  		if o2.Op != OpPPC64OR {
 33200  			break
 33201  		}
 33202  		if o2.Type != t {
 33203  			break
 33204  		}
 33205  		_ = o2.Args[1]
 33206  		o1 := o2.Args[0]
 33207  		if o1.Op != OpPPC64OR {
 33208  			break
 33209  		}
 33210  		if o1.Type != t {
 33211  			break
 33212  		}
 33213  		_ = o1.Args[1]
 33214  		s1 := o1.Args[0]
 33215  		if s1.Op != OpPPC64SLDconst {
 33216  			break
 33217  		}
 33218  		if s1.AuxInt != 16 {
 33219  			break
 33220  		}
 33221  		x2 := s1.Args[0]
 33222  		if x2.Op != OpPPC64MOVBZload {
 33223  			break
 33224  		}
 33225  		i2 := x2.AuxInt
 33226  		if x2.Aux != s {
 33227  			break
 33228  		}
 33229  		_ = x2.Args[1]
 33230  		if p != x2.Args[0] {
 33231  			break
 33232  		}
 33233  		if mem != x2.Args[1] {
 33234  			break
 33235  		}
 33236  		o0 := o1.Args[1]
 33237  		if o0.Op != OpPPC64OR {
 33238  			break
 33239  		}
 33240  		if o0.Type != t {
 33241  			break
 33242  		}
 33243  		_ = o0.Args[1]
 33244  		x0 := o0.Args[0]
 33245  		if x0.Op != OpPPC64MOVBZload {
 33246  			break
 33247  		}
 33248  		i0 := x0.AuxInt
 33249  		if x0.Aux != s {
 33250  			break
 33251  		}
 33252  		_ = x0.Args[1]
 33253  		if p != x0.Args[0] {
 33254  			break
 33255  		}
 33256  		if mem != x0.Args[1] {
 33257  			break
 33258  		}
 33259  		s0 := o0.Args[1]
 33260  		if s0.Op != OpPPC64SLDconst {
 33261  			break
 33262  		}
 33263  		if s0.AuxInt != 8 {
 33264  			break
 33265  		}
 33266  		x1 := s0.Args[0]
 33267  		if x1.Op != OpPPC64MOVBZload {
 33268  			break
 33269  		}
 33270  		i1 := x1.AuxInt
 33271  		if x1.Aux != s {
 33272  			break
 33273  		}
 33274  		_ = x1.Args[1]
 33275  		if p != x1.Args[0] {
 33276  			break
 33277  		}
 33278  		if mem != x1.Args[1] {
 33279  			break
 33280  		}
 33281  		s2 := o2.Args[1]
 33282  		if s2.Op != OpPPC64SLDconst {
 33283  			break
 33284  		}
 33285  		if s2.AuxInt != 24 {
 33286  			break
 33287  		}
 33288  		x3 := s2.Args[0]
 33289  		if x3.Op != OpPPC64MOVBZload {
 33290  			break
 33291  		}
 33292  		i3 := x3.AuxInt
 33293  		if x3.Aux != s {
 33294  			break
 33295  		}
 33296  		_ = x3.Args[1]
 33297  		if p != x3.Args[0] {
 33298  			break
 33299  		}
 33300  		if mem != x3.Args[1] {
 33301  			break
 33302  		}
 33303  		s5 := o5.Args[1]
 33304  		if s5.Op != OpPPC64SLDconst {
 33305  			break
 33306  		}
 33307  		if s5.AuxInt != 48 {
 33308  			break
 33309  		}
 33310  		x6 := s5.Args[0]
 33311  		if x6.Op != OpPPC64MOVBZload {
 33312  			break
 33313  		}
 33314  		i6 := x6.AuxInt
 33315  		if x6.Aux != s {
 33316  			break
 33317  		}
 33318  		_ = x6.Args[1]
 33319  		if p != x6.Args[0] {
 33320  			break
 33321  		}
 33322  		if mem != x6.Args[1] {
 33323  			break
 33324  		}
 33325  		s6 := v.Args[1]
 33326  		if s6.Op != OpPPC64SLDconst {
 33327  			break
 33328  		}
 33329  		if s6.AuxInt != 56 {
 33330  			break
 33331  		}
 33332  		x7 := s6.Args[0]
 33333  		if x7.Op != OpPPC64MOVBZload {
 33334  			break
 33335  		}
 33336  		i7 := x7.AuxInt
 33337  		if x7.Aux != s {
 33338  			break
 33339  		}
 33340  		_ = x7.Args[1]
 33341  		if p != x7.Args[0] {
 33342  			break
 33343  		}
 33344  		if mem != x7.Args[1] {
 33345  			break
 33346  		}
 33347  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33348  			break
 33349  		}
 33350  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33351  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33352  		v.reset(OpCopy)
 33353  		v.AddArg(v0)
 33354  		v0.AuxInt = i0
 33355  		v0.Aux = s
 33356  		v0.AddArg(p)
 33357  		v0.AddArg(mem)
 33358  		return true
 33359  	}
 33360  	return false
 33361  }
 33362  func rewriteValuePPC64_OpPPC64OR_120(v *Value) bool {
 33363  	b := v.Block
 33364  	_ = b
 33365  	config := b.Func.Config
 33366  	_ = config
 33367  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33368  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33369  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33370  	for {
 33371  		t := v.Type
 33372  		_ = v.Args[1]
 33373  		o5 := v.Args[0]
 33374  		if o5.Op != OpPPC64OR {
 33375  			break
 33376  		}
 33377  		if o5.Type != t {
 33378  			break
 33379  		}
 33380  		_ = o5.Args[1]
 33381  		o4 := o5.Args[0]
 33382  		if o4.Op != OpPPC64OR {
 33383  			break
 33384  		}
 33385  		if o4.Type != t {
 33386  			break
 33387  		}
 33388  		_ = o4.Args[1]
 33389  		s4 := o4.Args[0]
 33390  		if s4.Op != OpPPC64SLDconst {
 33391  			break
 33392  		}
 33393  		if s4.AuxInt != 40 {
 33394  			break
 33395  		}
 33396  		x5 := s4.Args[0]
 33397  		if x5.Op != OpPPC64MOVBZload {
 33398  			break
 33399  		}
 33400  		i5 := x5.AuxInt
 33401  		s := x5.Aux
 33402  		_ = x5.Args[1]
 33403  		p := x5.Args[0]
 33404  		mem := x5.Args[1]
 33405  		o3 := o4.Args[1]
 33406  		if o3.Op != OpPPC64OR {
 33407  			break
 33408  		}
 33409  		if o3.Type != t {
 33410  			break
 33411  		}
 33412  		_ = o3.Args[1]
 33413  		s3 := o3.Args[0]
 33414  		if s3.Op != OpPPC64SLDconst {
 33415  			break
 33416  		}
 33417  		if s3.AuxInt != 32 {
 33418  			break
 33419  		}
 33420  		x4 := s3.Args[0]
 33421  		if x4.Op != OpPPC64MOVBZload {
 33422  			break
 33423  		}
 33424  		i4 := x4.AuxInt
 33425  		if x4.Aux != s {
 33426  			break
 33427  		}
 33428  		_ = x4.Args[1]
 33429  		if p != x4.Args[0] {
 33430  			break
 33431  		}
 33432  		if mem != x4.Args[1] {
 33433  			break
 33434  		}
 33435  		o2 := o3.Args[1]
 33436  		if o2.Op != OpPPC64OR {
 33437  			break
 33438  		}
 33439  		if o2.Type != t {
 33440  			break
 33441  		}
 33442  		_ = o2.Args[1]
 33443  		o1 := o2.Args[0]
 33444  		if o1.Op != OpPPC64OR {
 33445  			break
 33446  		}
 33447  		if o1.Type != t {
 33448  			break
 33449  		}
 33450  		_ = o1.Args[1]
 33451  		o0 := o1.Args[0]
 33452  		if o0.Op != OpPPC64OR {
 33453  			break
 33454  		}
 33455  		if o0.Type != t {
 33456  			break
 33457  		}
 33458  		_ = o0.Args[1]
 33459  		s0 := o0.Args[0]
 33460  		if s0.Op != OpPPC64SLDconst {
 33461  			break
 33462  		}
 33463  		if s0.AuxInt != 8 {
 33464  			break
 33465  		}
 33466  		x1 := s0.Args[0]
 33467  		if x1.Op != OpPPC64MOVBZload {
 33468  			break
 33469  		}
 33470  		i1 := x1.AuxInt
 33471  		if x1.Aux != s {
 33472  			break
 33473  		}
 33474  		_ = x1.Args[1]
 33475  		if p != x1.Args[0] {
 33476  			break
 33477  		}
 33478  		if mem != x1.Args[1] {
 33479  			break
 33480  		}
 33481  		x0 := o0.Args[1]
 33482  		if x0.Op != OpPPC64MOVBZload {
 33483  			break
 33484  		}
 33485  		i0 := x0.AuxInt
 33486  		if x0.Aux != s {
 33487  			break
 33488  		}
 33489  		_ = x0.Args[1]
 33490  		if p != x0.Args[0] {
 33491  			break
 33492  		}
 33493  		if mem != x0.Args[1] {
 33494  			break
 33495  		}
 33496  		s1 := o1.Args[1]
 33497  		if s1.Op != OpPPC64SLDconst {
 33498  			break
 33499  		}
 33500  		if s1.AuxInt != 16 {
 33501  			break
 33502  		}
 33503  		x2 := s1.Args[0]
 33504  		if x2.Op != OpPPC64MOVBZload {
 33505  			break
 33506  		}
 33507  		i2 := x2.AuxInt
 33508  		if x2.Aux != s {
 33509  			break
 33510  		}
 33511  		_ = x2.Args[1]
 33512  		if p != x2.Args[0] {
 33513  			break
 33514  		}
 33515  		if mem != x2.Args[1] {
 33516  			break
 33517  		}
 33518  		s2 := o2.Args[1]
 33519  		if s2.Op != OpPPC64SLDconst {
 33520  			break
 33521  		}
 33522  		if s2.AuxInt != 24 {
 33523  			break
 33524  		}
 33525  		x3 := s2.Args[0]
 33526  		if x3.Op != OpPPC64MOVBZload {
 33527  			break
 33528  		}
 33529  		i3 := x3.AuxInt
 33530  		if x3.Aux != s {
 33531  			break
 33532  		}
 33533  		_ = x3.Args[1]
 33534  		if p != x3.Args[0] {
 33535  			break
 33536  		}
 33537  		if mem != x3.Args[1] {
 33538  			break
 33539  		}
 33540  		s5 := o5.Args[1]
 33541  		if s5.Op != OpPPC64SLDconst {
 33542  			break
 33543  		}
 33544  		if s5.AuxInt != 48 {
 33545  			break
 33546  		}
 33547  		x6 := s5.Args[0]
 33548  		if x6.Op != OpPPC64MOVBZload {
 33549  			break
 33550  		}
 33551  		i6 := x6.AuxInt
 33552  		if x6.Aux != s {
 33553  			break
 33554  		}
 33555  		_ = x6.Args[1]
 33556  		if p != x6.Args[0] {
 33557  			break
 33558  		}
 33559  		if mem != x6.Args[1] {
 33560  			break
 33561  		}
 33562  		s6 := v.Args[1]
 33563  		if s6.Op != OpPPC64SLDconst {
 33564  			break
 33565  		}
 33566  		if s6.AuxInt != 56 {
 33567  			break
 33568  		}
 33569  		x7 := s6.Args[0]
 33570  		if x7.Op != OpPPC64MOVBZload {
 33571  			break
 33572  		}
 33573  		i7 := x7.AuxInt
 33574  		if x7.Aux != s {
 33575  			break
 33576  		}
 33577  		_ = x7.Args[1]
 33578  		if p != x7.Args[0] {
 33579  			break
 33580  		}
 33581  		if mem != x7.Args[1] {
 33582  			break
 33583  		}
 33584  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33585  			break
 33586  		}
 33587  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33588  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33589  		v.reset(OpCopy)
 33590  		v.AddArg(v0)
 33591  		v0.AuxInt = i0
 33592  		v0.Aux = s
 33593  		v0.AddArg(p)
 33594  		v0.AddArg(mem)
 33595  		return true
 33596  	}
 33597  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33598  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33599  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33600  	for {
 33601  		t := v.Type
 33602  		_ = v.Args[1]
 33603  		o5 := v.Args[0]
 33604  		if o5.Op != OpPPC64OR {
 33605  			break
 33606  		}
 33607  		if o5.Type != t {
 33608  			break
 33609  		}
 33610  		_ = o5.Args[1]
 33611  		o4 := o5.Args[0]
 33612  		if o4.Op != OpPPC64OR {
 33613  			break
 33614  		}
 33615  		if o4.Type != t {
 33616  			break
 33617  		}
 33618  		_ = o4.Args[1]
 33619  		s4 := o4.Args[0]
 33620  		if s4.Op != OpPPC64SLDconst {
 33621  			break
 33622  		}
 33623  		if s4.AuxInt != 40 {
 33624  			break
 33625  		}
 33626  		x5 := s4.Args[0]
 33627  		if x5.Op != OpPPC64MOVBZload {
 33628  			break
 33629  		}
 33630  		i5 := x5.AuxInt
 33631  		s := x5.Aux
 33632  		_ = x5.Args[1]
 33633  		p := x5.Args[0]
 33634  		mem := x5.Args[1]
 33635  		o3 := o4.Args[1]
 33636  		if o3.Op != OpPPC64OR {
 33637  			break
 33638  		}
 33639  		if o3.Type != t {
 33640  			break
 33641  		}
 33642  		_ = o3.Args[1]
 33643  		s3 := o3.Args[0]
 33644  		if s3.Op != OpPPC64SLDconst {
 33645  			break
 33646  		}
 33647  		if s3.AuxInt != 32 {
 33648  			break
 33649  		}
 33650  		x4 := s3.Args[0]
 33651  		if x4.Op != OpPPC64MOVBZload {
 33652  			break
 33653  		}
 33654  		i4 := x4.AuxInt
 33655  		if x4.Aux != s {
 33656  			break
 33657  		}
 33658  		_ = x4.Args[1]
 33659  		if p != x4.Args[0] {
 33660  			break
 33661  		}
 33662  		if mem != x4.Args[1] {
 33663  			break
 33664  		}
 33665  		o2 := o3.Args[1]
 33666  		if o2.Op != OpPPC64OR {
 33667  			break
 33668  		}
 33669  		if o2.Type != t {
 33670  			break
 33671  		}
 33672  		_ = o2.Args[1]
 33673  		o1 := o2.Args[0]
 33674  		if o1.Op != OpPPC64OR {
 33675  			break
 33676  		}
 33677  		if o1.Type != t {
 33678  			break
 33679  		}
 33680  		_ = o1.Args[1]
 33681  		o0 := o1.Args[0]
 33682  		if o0.Op != OpPPC64OR {
 33683  			break
 33684  		}
 33685  		if o0.Type != t {
 33686  			break
 33687  		}
 33688  		_ = o0.Args[1]
 33689  		x0 := o0.Args[0]
 33690  		if x0.Op != OpPPC64MOVBZload {
 33691  			break
 33692  		}
 33693  		i0 := x0.AuxInt
 33694  		if x0.Aux != s {
 33695  			break
 33696  		}
 33697  		_ = x0.Args[1]
 33698  		if p != x0.Args[0] {
 33699  			break
 33700  		}
 33701  		if mem != x0.Args[1] {
 33702  			break
 33703  		}
 33704  		s0 := o0.Args[1]
 33705  		if s0.Op != OpPPC64SLDconst {
 33706  			break
 33707  		}
 33708  		if s0.AuxInt != 8 {
 33709  			break
 33710  		}
 33711  		x1 := s0.Args[0]
 33712  		if x1.Op != OpPPC64MOVBZload {
 33713  			break
 33714  		}
 33715  		i1 := x1.AuxInt
 33716  		if x1.Aux != s {
 33717  			break
 33718  		}
 33719  		_ = x1.Args[1]
 33720  		if p != x1.Args[0] {
 33721  			break
 33722  		}
 33723  		if mem != x1.Args[1] {
 33724  			break
 33725  		}
 33726  		s1 := o1.Args[1]
 33727  		if s1.Op != OpPPC64SLDconst {
 33728  			break
 33729  		}
 33730  		if s1.AuxInt != 16 {
 33731  			break
 33732  		}
 33733  		x2 := s1.Args[0]
 33734  		if x2.Op != OpPPC64MOVBZload {
 33735  			break
 33736  		}
 33737  		i2 := x2.AuxInt
 33738  		if x2.Aux != s {
 33739  			break
 33740  		}
 33741  		_ = x2.Args[1]
 33742  		if p != x2.Args[0] {
 33743  			break
 33744  		}
 33745  		if mem != x2.Args[1] {
 33746  			break
 33747  		}
 33748  		s2 := o2.Args[1]
 33749  		if s2.Op != OpPPC64SLDconst {
 33750  			break
 33751  		}
 33752  		if s2.AuxInt != 24 {
 33753  			break
 33754  		}
 33755  		x3 := s2.Args[0]
 33756  		if x3.Op != OpPPC64MOVBZload {
 33757  			break
 33758  		}
 33759  		i3 := x3.AuxInt
 33760  		if x3.Aux != s {
 33761  			break
 33762  		}
 33763  		_ = x3.Args[1]
 33764  		if p != x3.Args[0] {
 33765  			break
 33766  		}
 33767  		if mem != x3.Args[1] {
 33768  			break
 33769  		}
 33770  		s5 := o5.Args[1]
 33771  		if s5.Op != OpPPC64SLDconst {
 33772  			break
 33773  		}
 33774  		if s5.AuxInt != 48 {
 33775  			break
 33776  		}
 33777  		x6 := s5.Args[0]
 33778  		if x6.Op != OpPPC64MOVBZload {
 33779  			break
 33780  		}
 33781  		i6 := x6.AuxInt
 33782  		if x6.Aux != s {
 33783  			break
 33784  		}
 33785  		_ = x6.Args[1]
 33786  		if p != x6.Args[0] {
 33787  			break
 33788  		}
 33789  		if mem != x6.Args[1] {
 33790  			break
 33791  		}
 33792  		s6 := v.Args[1]
 33793  		if s6.Op != OpPPC64SLDconst {
 33794  			break
 33795  		}
 33796  		if s6.AuxInt != 56 {
 33797  			break
 33798  		}
 33799  		x7 := s6.Args[0]
 33800  		if x7.Op != OpPPC64MOVBZload {
 33801  			break
 33802  		}
 33803  		i7 := x7.AuxInt
 33804  		if x7.Aux != s {
 33805  			break
 33806  		}
 33807  		_ = x7.Args[1]
 33808  		if p != x7.Args[0] {
 33809  			break
 33810  		}
 33811  		if mem != x7.Args[1] {
 33812  			break
 33813  		}
 33814  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33815  			break
 33816  		}
 33817  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33818  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33819  		v.reset(OpCopy)
 33820  		v.AddArg(v0)
 33821  		v0.AuxInt = i0
 33822  		v0.Aux = s
 33823  		v0.AddArg(p)
 33824  		v0.AddArg(mem)
 33825  		return true
 33826  	}
 33827  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33828  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33829  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33830  	for {
 33831  		t := v.Type
 33832  		_ = v.Args[1]
 33833  		o5 := v.Args[0]
 33834  		if o5.Op != OpPPC64OR {
 33835  			break
 33836  		}
 33837  		if o5.Type != t {
 33838  			break
 33839  		}
 33840  		_ = o5.Args[1]
 33841  		o4 := o5.Args[0]
 33842  		if o4.Op != OpPPC64OR {
 33843  			break
 33844  		}
 33845  		if o4.Type != t {
 33846  			break
 33847  		}
 33848  		_ = o4.Args[1]
 33849  		s4 := o4.Args[0]
 33850  		if s4.Op != OpPPC64SLDconst {
 33851  			break
 33852  		}
 33853  		if s4.AuxInt != 40 {
 33854  			break
 33855  		}
 33856  		x5 := s4.Args[0]
 33857  		if x5.Op != OpPPC64MOVBZload {
 33858  			break
 33859  		}
 33860  		i5 := x5.AuxInt
 33861  		s := x5.Aux
 33862  		_ = x5.Args[1]
 33863  		p := x5.Args[0]
 33864  		mem := x5.Args[1]
 33865  		o3 := o4.Args[1]
 33866  		if o3.Op != OpPPC64OR {
 33867  			break
 33868  		}
 33869  		if o3.Type != t {
 33870  			break
 33871  		}
 33872  		_ = o3.Args[1]
 33873  		o2 := o3.Args[0]
 33874  		if o2.Op != OpPPC64OR {
 33875  			break
 33876  		}
 33877  		if o2.Type != t {
 33878  			break
 33879  		}
 33880  		_ = o2.Args[1]
 33881  		s2 := o2.Args[0]
 33882  		if s2.Op != OpPPC64SLDconst {
 33883  			break
 33884  		}
 33885  		if s2.AuxInt != 24 {
 33886  			break
 33887  		}
 33888  		x3 := s2.Args[0]
 33889  		if x3.Op != OpPPC64MOVBZload {
 33890  			break
 33891  		}
 33892  		i3 := x3.AuxInt
 33893  		if x3.Aux != s {
 33894  			break
 33895  		}
 33896  		_ = x3.Args[1]
 33897  		if p != x3.Args[0] {
 33898  			break
 33899  		}
 33900  		if mem != x3.Args[1] {
 33901  			break
 33902  		}
 33903  		o1 := o2.Args[1]
 33904  		if o1.Op != OpPPC64OR {
 33905  			break
 33906  		}
 33907  		if o1.Type != t {
 33908  			break
 33909  		}
 33910  		_ = o1.Args[1]
 33911  		s1 := o1.Args[0]
 33912  		if s1.Op != OpPPC64SLDconst {
 33913  			break
 33914  		}
 33915  		if s1.AuxInt != 16 {
 33916  			break
 33917  		}
 33918  		x2 := s1.Args[0]
 33919  		if x2.Op != OpPPC64MOVBZload {
 33920  			break
 33921  		}
 33922  		i2 := x2.AuxInt
 33923  		if x2.Aux != s {
 33924  			break
 33925  		}
 33926  		_ = x2.Args[1]
 33927  		if p != x2.Args[0] {
 33928  			break
 33929  		}
 33930  		if mem != x2.Args[1] {
 33931  			break
 33932  		}
 33933  		o0 := o1.Args[1]
 33934  		if o0.Op != OpPPC64OR {
 33935  			break
 33936  		}
 33937  		if o0.Type != t {
 33938  			break
 33939  		}
 33940  		_ = o0.Args[1]
 33941  		s0 := o0.Args[0]
 33942  		if s0.Op != OpPPC64SLDconst {
 33943  			break
 33944  		}
 33945  		if s0.AuxInt != 8 {
 33946  			break
 33947  		}
 33948  		x1 := s0.Args[0]
 33949  		if x1.Op != OpPPC64MOVBZload {
 33950  			break
 33951  		}
 33952  		i1 := x1.AuxInt
 33953  		if x1.Aux != s {
 33954  			break
 33955  		}
 33956  		_ = x1.Args[1]
 33957  		if p != x1.Args[0] {
 33958  			break
 33959  		}
 33960  		if mem != x1.Args[1] {
 33961  			break
 33962  		}
 33963  		x0 := o0.Args[1]
 33964  		if x0.Op != OpPPC64MOVBZload {
 33965  			break
 33966  		}
 33967  		i0 := x0.AuxInt
 33968  		if x0.Aux != s {
 33969  			break
 33970  		}
 33971  		_ = x0.Args[1]
 33972  		if p != x0.Args[0] {
 33973  			break
 33974  		}
 33975  		if mem != x0.Args[1] {
 33976  			break
 33977  		}
 33978  		s3 := o3.Args[1]
 33979  		if s3.Op != OpPPC64SLDconst {
 33980  			break
 33981  		}
 33982  		if s3.AuxInt != 32 {
 33983  			break
 33984  		}
 33985  		x4 := s3.Args[0]
 33986  		if x4.Op != OpPPC64MOVBZload {
 33987  			break
 33988  		}
 33989  		i4 := x4.AuxInt
 33990  		if x4.Aux != s {
 33991  			break
 33992  		}
 33993  		_ = x4.Args[1]
 33994  		if p != x4.Args[0] {
 33995  			break
 33996  		}
 33997  		if mem != x4.Args[1] {
 33998  			break
 33999  		}
 34000  		s5 := o5.Args[1]
 34001  		if s5.Op != OpPPC64SLDconst {
 34002  			break
 34003  		}
 34004  		if s5.AuxInt != 48 {
 34005  			break
 34006  		}
 34007  		x6 := s5.Args[0]
 34008  		if x6.Op != OpPPC64MOVBZload {
 34009  			break
 34010  		}
 34011  		i6 := x6.AuxInt
 34012  		if x6.Aux != s {
 34013  			break
 34014  		}
 34015  		_ = x6.Args[1]
 34016  		if p != x6.Args[0] {
 34017  			break
 34018  		}
 34019  		if mem != x6.Args[1] {
 34020  			break
 34021  		}
 34022  		s6 := v.Args[1]
 34023  		if s6.Op != OpPPC64SLDconst {
 34024  			break
 34025  		}
 34026  		if s6.AuxInt != 56 {
 34027  			break
 34028  		}
 34029  		x7 := s6.Args[0]
 34030  		if x7.Op != OpPPC64MOVBZload {
 34031  			break
 34032  		}
 34033  		i7 := x7.AuxInt
 34034  		if x7.Aux != s {
 34035  			break
 34036  		}
 34037  		_ = x7.Args[1]
 34038  		if p != x7.Args[0] {
 34039  			break
 34040  		}
 34041  		if mem != x7.Args[1] {
 34042  			break
 34043  		}
 34044  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34045  			break
 34046  		}
 34047  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34048  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34049  		v.reset(OpCopy)
 34050  		v.AddArg(v0)
 34051  		v0.AuxInt = i0
 34052  		v0.Aux = s
 34053  		v0.AddArg(p)
 34054  		v0.AddArg(mem)
 34055  		return true
 34056  	}
 34057  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34058  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34059  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34060  	for {
 34061  		t := v.Type
 34062  		_ = v.Args[1]
 34063  		o5 := v.Args[0]
 34064  		if o5.Op != OpPPC64OR {
 34065  			break
 34066  		}
 34067  		if o5.Type != t {
 34068  			break
 34069  		}
 34070  		_ = o5.Args[1]
 34071  		o4 := o5.Args[0]
 34072  		if o4.Op != OpPPC64OR {
 34073  			break
 34074  		}
 34075  		if o4.Type != t {
 34076  			break
 34077  		}
 34078  		_ = o4.Args[1]
 34079  		s4 := o4.Args[0]
 34080  		if s4.Op != OpPPC64SLDconst {
 34081  			break
 34082  		}
 34083  		if s4.AuxInt != 40 {
 34084  			break
 34085  		}
 34086  		x5 := s4.Args[0]
 34087  		if x5.Op != OpPPC64MOVBZload {
 34088  			break
 34089  		}
 34090  		i5 := x5.AuxInt
 34091  		s := x5.Aux
 34092  		_ = x5.Args[1]
 34093  		p := x5.Args[0]
 34094  		mem := x5.Args[1]
 34095  		o3 := o4.Args[1]
 34096  		if o3.Op != OpPPC64OR {
 34097  			break
 34098  		}
 34099  		if o3.Type != t {
 34100  			break
 34101  		}
 34102  		_ = o3.Args[1]
 34103  		o2 := o3.Args[0]
 34104  		if o2.Op != OpPPC64OR {
 34105  			break
 34106  		}
 34107  		if o2.Type != t {
 34108  			break
 34109  		}
 34110  		_ = o2.Args[1]
 34111  		s2 := o2.Args[0]
 34112  		if s2.Op != OpPPC64SLDconst {
 34113  			break
 34114  		}
 34115  		if s2.AuxInt != 24 {
 34116  			break
 34117  		}
 34118  		x3 := s2.Args[0]
 34119  		if x3.Op != OpPPC64MOVBZload {
 34120  			break
 34121  		}
 34122  		i3 := x3.AuxInt
 34123  		if x3.Aux != s {
 34124  			break
 34125  		}
 34126  		_ = x3.Args[1]
 34127  		if p != x3.Args[0] {
 34128  			break
 34129  		}
 34130  		if mem != x3.Args[1] {
 34131  			break
 34132  		}
 34133  		o1 := o2.Args[1]
 34134  		if o1.Op != OpPPC64OR {
 34135  			break
 34136  		}
 34137  		if o1.Type != t {
 34138  			break
 34139  		}
 34140  		_ = o1.Args[1]
 34141  		s1 := o1.Args[0]
 34142  		if s1.Op != OpPPC64SLDconst {
 34143  			break
 34144  		}
 34145  		if s1.AuxInt != 16 {
 34146  			break
 34147  		}
 34148  		x2 := s1.Args[0]
 34149  		if x2.Op != OpPPC64MOVBZload {
 34150  			break
 34151  		}
 34152  		i2 := x2.AuxInt
 34153  		if x2.Aux != s {
 34154  			break
 34155  		}
 34156  		_ = x2.Args[1]
 34157  		if p != x2.Args[0] {
 34158  			break
 34159  		}
 34160  		if mem != x2.Args[1] {
 34161  			break
 34162  		}
 34163  		o0 := o1.Args[1]
 34164  		if o0.Op != OpPPC64OR {
 34165  			break
 34166  		}
 34167  		if o0.Type != t {
 34168  			break
 34169  		}
 34170  		_ = o0.Args[1]
 34171  		x0 := o0.Args[0]
 34172  		if x0.Op != OpPPC64MOVBZload {
 34173  			break
 34174  		}
 34175  		i0 := x0.AuxInt
 34176  		if x0.Aux != s {
 34177  			break
 34178  		}
 34179  		_ = x0.Args[1]
 34180  		if p != x0.Args[0] {
 34181  			break
 34182  		}
 34183  		if mem != x0.Args[1] {
 34184  			break
 34185  		}
 34186  		s0 := o0.Args[1]
 34187  		if s0.Op != OpPPC64SLDconst {
 34188  			break
 34189  		}
 34190  		if s0.AuxInt != 8 {
 34191  			break
 34192  		}
 34193  		x1 := s0.Args[0]
 34194  		if x1.Op != OpPPC64MOVBZload {
 34195  			break
 34196  		}
 34197  		i1 := x1.AuxInt
 34198  		if x1.Aux != s {
 34199  			break
 34200  		}
 34201  		_ = x1.Args[1]
 34202  		if p != x1.Args[0] {
 34203  			break
 34204  		}
 34205  		if mem != x1.Args[1] {
 34206  			break
 34207  		}
 34208  		s3 := o3.Args[1]
 34209  		if s3.Op != OpPPC64SLDconst {
 34210  			break
 34211  		}
 34212  		if s3.AuxInt != 32 {
 34213  			break
 34214  		}
 34215  		x4 := s3.Args[0]
 34216  		if x4.Op != OpPPC64MOVBZload {
 34217  			break
 34218  		}
 34219  		i4 := x4.AuxInt
 34220  		if x4.Aux != s {
 34221  			break
 34222  		}
 34223  		_ = x4.Args[1]
 34224  		if p != x4.Args[0] {
 34225  			break
 34226  		}
 34227  		if mem != x4.Args[1] {
 34228  			break
 34229  		}
 34230  		s5 := o5.Args[1]
 34231  		if s5.Op != OpPPC64SLDconst {
 34232  			break
 34233  		}
 34234  		if s5.AuxInt != 48 {
 34235  			break
 34236  		}
 34237  		x6 := s5.Args[0]
 34238  		if x6.Op != OpPPC64MOVBZload {
 34239  			break
 34240  		}
 34241  		i6 := x6.AuxInt
 34242  		if x6.Aux != s {
 34243  			break
 34244  		}
 34245  		_ = x6.Args[1]
 34246  		if p != x6.Args[0] {
 34247  			break
 34248  		}
 34249  		if mem != x6.Args[1] {
 34250  			break
 34251  		}
 34252  		s6 := v.Args[1]
 34253  		if s6.Op != OpPPC64SLDconst {
 34254  			break
 34255  		}
 34256  		if s6.AuxInt != 56 {
 34257  			break
 34258  		}
 34259  		x7 := s6.Args[0]
 34260  		if x7.Op != OpPPC64MOVBZload {
 34261  			break
 34262  		}
 34263  		i7 := x7.AuxInt
 34264  		if x7.Aux != s {
 34265  			break
 34266  		}
 34267  		_ = x7.Args[1]
 34268  		if p != x7.Args[0] {
 34269  			break
 34270  		}
 34271  		if mem != x7.Args[1] {
 34272  			break
 34273  		}
 34274  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34275  			break
 34276  		}
 34277  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34278  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34279  		v.reset(OpCopy)
 34280  		v.AddArg(v0)
 34281  		v0.AuxInt = i0
 34282  		v0.Aux = s
 34283  		v0.AddArg(p)
 34284  		v0.AddArg(mem)
 34285  		return true
 34286  	}
 34287  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34288  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34289  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34290  	for {
 34291  		t := v.Type
 34292  		_ = v.Args[1]
 34293  		o5 := v.Args[0]
 34294  		if o5.Op != OpPPC64OR {
 34295  			break
 34296  		}
 34297  		if o5.Type != t {
 34298  			break
 34299  		}
 34300  		_ = o5.Args[1]
 34301  		o4 := o5.Args[0]
 34302  		if o4.Op != OpPPC64OR {
 34303  			break
 34304  		}
 34305  		if o4.Type != t {
 34306  			break
 34307  		}
 34308  		_ = o4.Args[1]
 34309  		s4 := o4.Args[0]
 34310  		if s4.Op != OpPPC64SLDconst {
 34311  			break
 34312  		}
 34313  		if s4.AuxInt != 40 {
 34314  			break
 34315  		}
 34316  		x5 := s4.Args[0]
 34317  		if x5.Op != OpPPC64MOVBZload {
 34318  			break
 34319  		}
 34320  		i5 := x5.AuxInt
 34321  		s := x5.Aux
 34322  		_ = x5.Args[1]
 34323  		p := x5.Args[0]
 34324  		mem := x5.Args[1]
 34325  		o3 := o4.Args[1]
 34326  		if o3.Op != OpPPC64OR {
 34327  			break
 34328  		}
 34329  		if o3.Type != t {
 34330  			break
 34331  		}
 34332  		_ = o3.Args[1]
 34333  		o2 := o3.Args[0]
 34334  		if o2.Op != OpPPC64OR {
 34335  			break
 34336  		}
 34337  		if o2.Type != t {
 34338  			break
 34339  		}
 34340  		_ = o2.Args[1]
 34341  		s2 := o2.Args[0]
 34342  		if s2.Op != OpPPC64SLDconst {
 34343  			break
 34344  		}
 34345  		if s2.AuxInt != 24 {
 34346  			break
 34347  		}
 34348  		x3 := s2.Args[0]
 34349  		if x3.Op != OpPPC64MOVBZload {
 34350  			break
 34351  		}
 34352  		i3 := x3.AuxInt
 34353  		if x3.Aux != s {
 34354  			break
 34355  		}
 34356  		_ = x3.Args[1]
 34357  		if p != x3.Args[0] {
 34358  			break
 34359  		}
 34360  		if mem != x3.Args[1] {
 34361  			break
 34362  		}
 34363  		o1 := o2.Args[1]
 34364  		if o1.Op != OpPPC64OR {
 34365  			break
 34366  		}
 34367  		if o1.Type != t {
 34368  			break
 34369  		}
 34370  		_ = o1.Args[1]
 34371  		o0 := o1.Args[0]
 34372  		if o0.Op != OpPPC64OR {
 34373  			break
 34374  		}
 34375  		if o0.Type != t {
 34376  			break
 34377  		}
 34378  		_ = o0.Args[1]
 34379  		s0 := o0.Args[0]
 34380  		if s0.Op != OpPPC64SLDconst {
 34381  			break
 34382  		}
 34383  		if s0.AuxInt != 8 {
 34384  			break
 34385  		}
 34386  		x1 := s0.Args[0]
 34387  		if x1.Op != OpPPC64MOVBZload {
 34388  			break
 34389  		}
 34390  		i1 := x1.AuxInt
 34391  		if x1.Aux != s {
 34392  			break
 34393  		}
 34394  		_ = x1.Args[1]
 34395  		if p != x1.Args[0] {
 34396  			break
 34397  		}
 34398  		if mem != x1.Args[1] {
 34399  			break
 34400  		}
 34401  		x0 := o0.Args[1]
 34402  		if x0.Op != OpPPC64MOVBZload {
 34403  			break
 34404  		}
 34405  		i0 := x0.AuxInt
 34406  		if x0.Aux != s {
 34407  			break
 34408  		}
 34409  		_ = x0.Args[1]
 34410  		if p != x0.Args[0] {
 34411  			break
 34412  		}
 34413  		if mem != x0.Args[1] {
 34414  			break
 34415  		}
 34416  		s1 := o1.Args[1]
 34417  		if s1.Op != OpPPC64SLDconst {
 34418  			break
 34419  		}
 34420  		if s1.AuxInt != 16 {
 34421  			break
 34422  		}
 34423  		x2 := s1.Args[0]
 34424  		if x2.Op != OpPPC64MOVBZload {
 34425  			break
 34426  		}
 34427  		i2 := x2.AuxInt
 34428  		if x2.Aux != s {
 34429  			break
 34430  		}
 34431  		_ = x2.Args[1]
 34432  		if p != x2.Args[0] {
 34433  			break
 34434  		}
 34435  		if mem != x2.Args[1] {
 34436  			break
 34437  		}
 34438  		s3 := o3.Args[1]
 34439  		if s3.Op != OpPPC64SLDconst {
 34440  			break
 34441  		}
 34442  		if s3.AuxInt != 32 {
 34443  			break
 34444  		}
 34445  		x4 := s3.Args[0]
 34446  		if x4.Op != OpPPC64MOVBZload {
 34447  			break
 34448  		}
 34449  		i4 := x4.AuxInt
 34450  		if x4.Aux != s {
 34451  			break
 34452  		}
 34453  		_ = x4.Args[1]
 34454  		if p != x4.Args[0] {
 34455  			break
 34456  		}
 34457  		if mem != x4.Args[1] {
 34458  			break
 34459  		}
 34460  		s5 := o5.Args[1]
 34461  		if s5.Op != OpPPC64SLDconst {
 34462  			break
 34463  		}
 34464  		if s5.AuxInt != 48 {
 34465  			break
 34466  		}
 34467  		x6 := s5.Args[0]
 34468  		if x6.Op != OpPPC64MOVBZload {
 34469  			break
 34470  		}
 34471  		i6 := x6.AuxInt
 34472  		if x6.Aux != s {
 34473  			break
 34474  		}
 34475  		_ = x6.Args[1]
 34476  		if p != x6.Args[0] {
 34477  			break
 34478  		}
 34479  		if mem != x6.Args[1] {
 34480  			break
 34481  		}
 34482  		s6 := v.Args[1]
 34483  		if s6.Op != OpPPC64SLDconst {
 34484  			break
 34485  		}
 34486  		if s6.AuxInt != 56 {
 34487  			break
 34488  		}
 34489  		x7 := s6.Args[0]
 34490  		if x7.Op != OpPPC64MOVBZload {
 34491  			break
 34492  		}
 34493  		i7 := x7.AuxInt
 34494  		if x7.Aux != s {
 34495  			break
 34496  		}
 34497  		_ = x7.Args[1]
 34498  		if p != x7.Args[0] {
 34499  			break
 34500  		}
 34501  		if mem != x7.Args[1] {
 34502  			break
 34503  		}
 34504  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34505  			break
 34506  		}
 34507  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34508  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34509  		v.reset(OpCopy)
 34510  		v.AddArg(v0)
 34511  		v0.AuxInt = i0
 34512  		v0.Aux = s
 34513  		v0.AddArg(p)
 34514  		v0.AddArg(mem)
 34515  		return true
 34516  	}
 34517  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34518  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34519  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34520  	for {
 34521  		t := v.Type
 34522  		_ = v.Args[1]
 34523  		o5 := v.Args[0]
 34524  		if o5.Op != OpPPC64OR {
 34525  			break
 34526  		}
 34527  		if o5.Type != t {
 34528  			break
 34529  		}
 34530  		_ = o5.Args[1]
 34531  		o4 := o5.Args[0]
 34532  		if o4.Op != OpPPC64OR {
 34533  			break
 34534  		}
 34535  		if o4.Type != t {
 34536  			break
 34537  		}
 34538  		_ = o4.Args[1]
 34539  		s4 := o4.Args[0]
 34540  		if s4.Op != OpPPC64SLDconst {
 34541  			break
 34542  		}
 34543  		if s4.AuxInt != 40 {
 34544  			break
 34545  		}
 34546  		x5 := s4.Args[0]
 34547  		if x5.Op != OpPPC64MOVBZload {
 34548  			break
 34549  		}
 34550  		i5 := x5.AuxInt
 34551  		s := x5.Aux
 34552  		_ = x5.Args[1]
 34553  		p := x5.Args[0]
 34554  		mem := x5.Args[1]
 34555  		o3 := o4.Args[1]
 34556  		if o3.Op != OpPPC64OR {
 34557  			break
 34558  		}
 34559  		if o3.Type != t {
 34560  			break
 34561  		}
 34562  		_ = o3.Args[1]
 34563  		o2 := o3.Args[0]
 34564  		if o2.Op != OpPPC64OR {
 34565  			break
 34566  		}
 34567  		if o2.Type != t {
 34568  			break
 34569  		}
 34570  		_ = o2.Args[1]
 34571  		s2 := o2.Args[0]
 34572  		if s2.Op != OpPPC64SLDconst {
 34573  			break
 34574  		}
 34575  		if s2.AuxInt != 24 {
 34576  			break
 34577  		}
 34578  		x3 := s2.Args[0]
 34579  		if x3.Op != OpPPC64MOVBZload {
 34580  			break
 34581  		}
 34582  		i3 := x3.AuxInt
 34583  		if x3.Aux != s {
 34584  			break
 34585  		}
 34586  		_ = x3.Args[1]
 34587  		if p != x3.Args[0] {
 34588  			break
 34589  		}
 34590  		if mem != x3.Args[1] {
 34591  			break
 34592  		}
 34593  		o1 := o2.Args[1]
 34594  		if o1.Op != OpPPC64OR {
 34595  			break
 34596  		}
 34597  		if o1.Type != t {
 34598  			break
 34599  		}
 34600  		_ = o1.Args[1]
 34601  		o0 := o1.Args[0]
 34602  		if o0.Op != OpPPC64OR {
 34603  			break
 34604  		}
 34605  		if o0.Type != t {
 34606  			break
 34607  		}
 34608  		_ = o0.Args[1]
 34609  		x0 := o0.Args[0]
 34610  		if x0.Op != OpPPC64MOVBZload {
 34611  			break
 34612  		}
 34613  		i0 := x0.AuxInt
 34614  		if x0.Aux != s {
 34615  			break
 34616  		}
 34617  		_ = x0.Args[1]
 34618  		if p != x0.Args[0] {
 34619  			break
 34620  		}
 34621  		if mem != x0.Args[1] {
 34622  			break
 34623  		}
 34624  		s0 := o0.Args[1]
 34625  		if s0.Op != OpPPC64SLDconst {
 34626  			break
 34627  		}
 34628  		if s0.AuxInt != 8 {
 34629  			break
 34630  		}
 34631  		x1 := s0.Args[0]
 34632  		if x1.Op != OpPPC64MOVBZload {
 34633  			break
 34634  		}
 34635  		i1 := x1.AuxInt
 34636  		if x1.Aux != s {
 34637  			break
 34638  		}
 34639  		_ = x1.Args[1]
 34640  		if p != x1.Args[0] {
 34641  			break
 34642  		}
 34643  		if mem != x1.Args[1] {
 34644  			break
 34645  		}
 34646  		s1 := o1.Args[1]
 34647  		if s1.Op != OpPPC64SLDconst {
 34648  			break
 34649  		}
 34650  		if s1.AuxInt != 16 {
 34651  			break
 34652  		}
 34653  		x2 := s1.Args[0]
 34654  		if x2.Op != OpPPC64MOVBZload {
 34655  			break
 34656  		}
 34657  		i2 := x2.AuxInt
 34658  		if x2.Aux != s {
 34659  			break
 34660  		}
 34661  		_ = x2.Args[1]
 34662  		if p != x2.Args[0] {
 34663  			break
 34664  		}
 34665  		if mem != x2.Args[1] {
 34666  			break
 34667  		}
 34668  		s3 := o3.Args[1]
 34669  		if s3.Op != OpPPC64SLDconst {
 34670  			break
 34671  		}
 34672  		if s3.AuxInt != 32 {
 34673  			break
 34674  		}
 34675  		x4 := s3.Args[0]
 34676  		if x4.Op != OpPPC64MOVBZload {
 34677  			break
 34678  		}
 34679  		i4 := x4.AuxInt
 34680  		if x4.Aux != s {
 34681  			break
 34682  		}
 34683  		_ = x4.Args[1]
 34684  		if p != x4.Args[0] {
 34685  			break
 34686  		}
 34687  		if mem != x4.Args[1] {
 34688  			break
 34689  		}
 34690  		s5 := o5.Args[1]
 34691  		if s5.Op != OpPPC64SLDconst {
 34692  			break
 34693  		}
 34694  		if s5.AuxInt != 48 {
 34695  			break
 34696  		}
 34697  		x6 := s5.Args[0]
 34698  		if x6.Op != OpPPC64MOVBZload {
 34699  			break
 34700  		}
 34701  		i6 := x6.AuxInt
 34702  		if x6.Aux != s {
 34703  			break
 34704  		}
 34705  		_ = x6.Args[1]
 34706  		if p != x6.Args[0] {
 34707  			break
 34708  		}
 34709  		if mem != x6.Args[1] {
 34710  			break
 34711  		}
 34712  		s6 := v.Args[1]
 34713  		if s6.Op != OpPPC64SLDconst {
 34714  			break
 34715  		}
 34716  		if s6.AuxInt != 56 {
 34717  			break
 34718  		}
 34719  		x7 := s6.Args[0]
 34720  		if x7.Op != OpPPC64MOVBZload {
 34721  			break
 34722  		}
 34723  		i7 := x7.AuxInt
 34724  		if x7.Aux != s {
 34725  			break
 34726  		}
 34727  		_ = x7.Args[1]
 34728  		if p != x7.Args[0] {
 34729  			break
 34730  		}
 34731  		if mem != x7.Args[1] {
 34732  			break
 34733  		}
 34734  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34735  			break
 34736  		}
 34737  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34738  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34739  		v.reset(OpCopy)
 34740  		v.AddArg(v0)
 34741  		v0.AuxInt = i0
 34742  		v0.Aux = s
 34743  		v0.AddArg(p)
 34744  		v0.AddArg(mem)
 34745  		return true
 34746  	}
 34747  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34748  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34749  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34750  	for {
 34751  		t := v.Type
 34752  		_ = v.Args[1]
 34753  		o5 := v.Args[0]
 34754  		if o5.Op != OpPPC64OR {
 34755  			break
 34756  		}
 34757  		if o5.Type != t {
 34758  			break
 34759  		}
 34760  		_ = o5.Args[1]
 34761  		o4 := o5.Args[0]
 34762  		if o4.Op != OpPPC64OR {
 34763  			break
 34764  		}
 34765  		if o4.Type != t {
 34766  			break
 34767  		}
 34768  		_ = o4.Args[1]
 34769  		s4 := o4.Args[0]
 34770  		if s4.Op != OpPPC64SLDconst {
 34771  			break
 34772  		}
 34773  		if s4.AuxInt != 40 {
 34774  			break
 34775  		}
 34776  		x5 := s4.Args[0]
 34777  		if x5.Op != OpPPC64MOVBZload {
 34778  			break
 34779  		}
 34780  		i5 := x5.AuxInt
 34781  		s := x5.Aux
 34782  		_ = x5.Args[1]
 34783  		p := x5.Args[0]
 34784  		mem := x5.Args[1]
 34785  		o3 := o4.Args[1]
 34786  		if o3.Op != OpPPC64OR {
 34787  			break
 34788  		}
 34789  		if o3.Type != t {
 34790  			break
 34791  		}
 34792  		_ = o3.Args[1]
 34793  		o2 := o3.Args[0]
 34794  		if o2.Op != OpPPC64OR {
 34795  			break
 34796  		}
 34797  		if o2.Type != t {
 34798  			break
 34799  		}
 34800  		_ = o2.Args[1]
 34801  		o1 := o2.Args[0]
 34802  		if o1.Op != OpPPC64OR {
 34803  			break
 34804  		}
 34805  		if o1.Type != t {
 34806  			break
 34807  		}
 34808  		_ = o1.Args[1]
 34809  		s1 := o1.Args[0]
 34810  		if s1.Op != OpPPC64SLDconst {
 34811  			break
 34812  		}
 34813  		if s1.AuxInt != 16 {
 34814  			break
 34815  		}
 34816  		x2 := s1.Args[0]
 34817  		if x2.Op != OpPPC64MOVBZload {
 34818  			break
 34819  		}
 34820  		i2 := x2.AuxInt
 34821  		if x2.Aux != s {
 34822  			break
 34823  		}
 34824  		_ = x2.Args[1]
 34825  		if p != x2.Args[0] {
 34826  			break
 34827  		}
 34828  		if mem != x2.Args[1] {
 34829  			break
 34830  		}
 34831  		o0 := o1.Args[1]
 34832  		if o0.Op != OpPPC64OR {
 34833  			break
 34834  		}
 34835  		if o0.Type != t {
 34836  			break
 34837  		}
 34838  		_ = o0.Args[1]
 34839  		s0 := o0.Args[0]
 34840  		if s0.Op != OpPPC64SLDconst {
 34841  			break
 34842  		}
 34843  		if s0.AuxInt != 8 {
 34844  			break
 34845  		}
 34846  		x1 := s0.Args[0]
 34847  		if x1.Op != OpPPC64MOVBZload {
 34848  			break
 34849  		}
 34850  		i1 := x1.AuxInt
 34851  		if x1.Aux != s {
 34852  			break
 34853  		}
 34854  		_ = x1.Args[1]
 34855  		if p != x1.Args[0] {
 34856  			break
 34857  		}
 34858  		if mem != x1.Args[1] {
 34859  			break
 34860  		}
 34861  		x0 := o0.Args[1]
 34862  		if x0.Op != OpPPC64MOVBZload {
 34863  			break
 34864  		}
 34865  		i0 := x0.AuxInt
 34866  		if x0.Aux != s {
 34867  			break
 34868  		}
 34869  		_ = x0.Args[1]
 34870  		if p != x0.Args[0] {
 34871  			break
 34872  		}
 34873  		if mem != x0.Args[1] {
 34874  			break
 34875  		}
 34876  		s2 := o2.Args[1]
 34877  		if s2.Op != OpPPC64SLDconst {
 34878  			break
 34879  		}
 34880  		if s2.AuxInt != 24 {
 34881  			break
 34882  		}
 34883  		x3 := s2.Args[0]
 34884  		if x3.Op != OpPPC64MOVBZload {
 34885  			break
 34886  		}
 34887  		i3 := x3.AuxInt
 34888  		if x3.Aux != s {
 34889  			break
 34890  		}
 34891  		_ = x3.Args[1]
 34892  		if p != x3.Args[0] {
 34893  			break
 34894  		}
 34895  		if mem != x3.Args[1] {
 34896  			break
 34897  		}
 34898  		s3 := o3.Args[1]
 34899  		if s3.Op != OpPPC64SLDconst {
 34900  			break
 34901  		}
 34902  		if s3.AuxInt != 32 {
 34903  			break
 34904  		}
 34905  		x4 := s3.Args[0]
 34906  		if x4.Op != OpPPC64MOVBZload {
 34907  			break
 34908  		}
 34909  		i4 := x4.AuxInt
 34910  		if x4.Aux != s {
 34911  			break
 34912  		}
 34913  		_ = x4.Args[1]
 34914  		if p != x4.Args[0] {
 34915  			break
 34916  		}
 34917  		if mem != x4.Args[1] {
 34918  			break
 34919  		}
 34920  		s5 := o5.Args[1]
 34921  		if s5.Op != OpPPC64SLDconst {
 34922  			break
 34923  		}
 34924  		if s5.AuxInt != 48 {
 34925  			break
 34926  		}
 34927  		x6 := s5.Args[0]
 34928  		if x6.Op != OpPPC64MOVBZload {
 34929  			break
 34930  		}
 34931  		i6 := x6.AuxInt
 34932  		if x6.Aux != s {
 34933  			break
 34934  		}
 34935  		_ = x6.Args[1]
 34936  		if p != x6.Args[0] {
 34937  			break
 34938  		}
 34939  		if mem != x6.Args[1] {
 34940  			break
 34941  		}
 34942  		s6 := v.Args[1]
 34943  		if s6.Op != OpPPC64SLDconst {
 34944  			break
 34945  		}
 34946  		if s6.AuxInt != 56 {
 34947  			break
 34948  		}
 34949  		x7 := s6.Args[0]
 34950  		if x7.Op != OpPPC64MOVBZload {
 34951  			break
 34952  		}
 34953  		i7 := x7.AuxInt
 34954  		if x7.Aux != s {
 34955  			break
 34956  		}
 34957  		_ = x7.Args[1]
 34958  		if p != x7.Args[0] {
 34959  			break
 34960  		}
 34961  		if mem != x7.Args[1] {
 34962  			break
 34963  		}
 34964  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34965  			break
 34966  		}
 34967  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34968  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34969  		v.reset(OpCopy)
 34970  		v.AddArg(v0)
 34971  		v0.AuxInt = i0
 34972  		v0.Aux = s
 34973  		v0.AddArg(p)
 34974  		v0.AddArg(mem)
 34975  		return true
 34976  	}
 34977  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34978  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34979  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34980  	for {
 34981  		t := v.Type
 34982  		_ = v.Args[1]
 34983  		o5 := v.Args[0]
 34984  		if o5.Op != OpPPC64OR {
 34985  			break
 34986  		}
 34987  		if o5.Type != t {
 34988  			break
 34989  		}
 34990  		_ = o5.Args[1]
 34991  		o4 := o5.Args[0]
 34992  		if o4.Op != OpPPC64OR {
 34993  			break
 34994  		}
 34995  		if o4.Type != t {
 34996  			break
 34997  		}
 34998  		_ = o4.Args[1]
 34999  		s4 := o4.Args[0]
 35000  		if s4.Op != OpPPC64SLDconst {
 35001  			break
 35002  		}
 35003  		if s4.AuxInt != 40 {
 35004  			break
 35005  		}
 35006  		x5 := s4.Args[0]
 35007  		if x5.Op != OpPPC64MOVBZload {
 35008  			break
 35009  		}
 35010  		i5 := x5.AuxInt
 35011  		s := x5.Aux
 35012  		_ = x5.Args[1]
 35013  		p := x5.Args[0]
 35014  		mem := x5.Args[1]
 35015  		o3 := o4.Args[1]
 35016  		if o3.Op != OpPPC64OR {
 35017  			break
 35018  		}
 35019  		if o3.Type != t {
 35020  			break
 35021  		}
 35022  		_ = o3.Args[1]
 35023  		o2 := o3.Args[0]
 35024  		if o2.Op != OpPPC64OR {
 35025  			break
 35026  		}
 35027  		if o2.Type != t {
 35028  			break
 35029  		}
 35030  		_ = o2.Args[1]
 35031  		o1 := o2.Args[0]
 35032  		if o1.Op != OpPPC64OR {
 35033  			break
 35034  		}
 35035  		if o1.Type != t {
 35036  			break
 35037  		}
 35038  		_ = o1.Args[1]
 35039  		s1 := o1.Args[0]
 35040  		if s1.Op != OpPPC64SLDconst {
 35041  			break
 35042  		}
 35043  		if s1.AuxInt != 16 {
 35044  			break
 35045  		}
 35046  		x2 := s1.Args[0]
 35047  		if x2.Op != OpPPC64MOVBZload {
 35048  			break
 35049  		}
 35050  		i2 := x2.AuxInt
 35051  		if x2.Aux != s {
 35052  			break
 35053  		}
 35054  		_ = x2.Args[1]
 35055  		if p != x2.Args[0] {
 35056  			break
 35057  		}
 35058  		if mem != x2.Args[1] {
 35059  			break
 35060  		}
 35061  		o0 := o1.Args[1]
 35062  		if o0.Op != OpPPC64OR {
 35063  			break
 35064  		}
 35065  		if o0.Type != t {
 35066  			break
 35067  		}
 35068  		_ = o0.Args[1]
 35069  		x0 := o0.Args[0]
 35070  		if x0.Op != OpPPC64MOVBZload {
 35071  			break
 35072  		}
 35073  		i0 := x0.AuxInt
 35074  		if x0.Aux != s {
 35075  			break
 35076  		}
 35077  		_ = x0.Args[1]
 35078  		if p != x0.Args[0] {
 35079  			break
 35080  		}
 35081  		if mem != x0.Args[1] {
 35082  			break
 35083  		}
 35084  		s0 := o0.Args[1]
 35085  		if s0.Op != OpPPC64SLDconst {
 35086  			break
 35087  		}
 35088  		if s0.AuxInt != 8 {
 35089  			break
 35090  		}
 35091  		x1 := s0.Args[0]
 35092  		if x1.Op != OpPPC64MOVBZload {
 35093  			break
 35094  		}
 35095  		i1 := x1.AuxInt
 35096  		if x1.Aux != s {
 35097  			break
 35098  		}
 35099  		_ = x1.Args[1]
 35100  		if p != x1.Args[0] {
 35101  			break
 35102  		}
 35103  		if mem != x1.Args[1] {
 35104  			break
 35105  		}
 35106  		s2 := o2.Args[1]
 35107  		if s2.Op != OpPPC64SLDconst {
 35108  			break
 35109  		}
 35110  		if s2.AuxInt != 24 {
 35111  			break
 35112  		}
 35113  		x3 := s2.Args[0]
 35114  		if x3.Op != OpPPC64MOVBZload {
 35115  			break
 35116  		}
 35117  		i3 := x3.AuxInt
 35118  		if x3.Aux != s {
 35119  			break
 35120  		}
 35121  		_ = x3.Args[1]
 35122  		if p != x3.Args[0] {
 35123  			break
 35124  		}
 35125  		if mem != x3.Args[1] {
 35126  			break
 35127  		}
 35128  		s3 := o3.Args[1]
 35129  		if s3.Op != OpPPC64SLDconst {
 35130  			break
 35131  		}
 35132  		if s3.AuxInt != 32 {
 35133  			break
 35134  		}
 35135  		x4 := s3.Args[0]
 35136  		if x4.Op != OpPPC64MOVBZload {
 35137  			break
 35138  		}
 35139  		i4 := x4.AuxInt
 35140  		if x4.Aux != s {
 35141  			break
 35142  		}
 35143  		_ = x4.Args[1]
 35144  		if p != x4.Args[0] {
 35145  			break
 35146  		}
 35147  		if mem != x4.Args[1] {
 35148  			break
 35149  		}
 35150  		s5 := o5.Args[1]
 35151  		if s5.Op != OpPPC64SLDconst {
 35152  			break
 35153  		}
 35154  		if s5.AuxInt != 48 {
 35155  			break
 35156  		}
 35157  		x6 := s5.Args[0]
 35158  		if x6.Op != OpPPC64MOVBZload {
 35159  			break
 35160  		}
 35161  		i6 := x6.AuxInt
 35162  		if x6.Aux != s {
 35163  			break
 35164  		}
 35165  		_ = x6.Args[1]
 35166  		if p != x6.Args[0] {
 35167  			break
 35168  		}
 35169  		if mem != x6.Args[1] {
 35170  			break
 35171  		}
 35172  		s6 := v.Args[1]
 35173  		if s6.Op != OpPPC64SLDconst {
 35174  			break
 35175  		}
 35176  		if s6.AuxInt != 56 {
 35177  			break
 35178  		}
 35179  		x7 := s6.Args[0]
 35180  		if x7.Op != OpPPC64MOVBZload {
 35181  			break
 35182  		}
 35183  		i7 := x7.AuxInt
 35184  		if x7.Aux != s {
 35185  			break
 35186  		}
 35187  		_ = x7.Args[1]
 35188  		if p != x7.Args[0] {
 35189  			break
 35190  		}
 35191  		if mem != x7.Args[1] {
 35192  			break
 35193  		}
 35194  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35195  			break
 35196  		}
 35197  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35198  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35199  		v.reset(OpCopy)
 35200  		v.AddArg(v0)
 35201  		v0.AuxInt = i0
 35202  		v0.Aux = s
 35203  		v0.AddArg(p)
 35204  		v0.AddArg(mem)
 35205  		return true
 35206  	}
 35207  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35208  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35209  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35210  	for {
 35211  		t := v.Type
 35212  		_ = v.Args[1]
 35213  		o5 := v.Args[0]
 35214  		if o5.Op != OpPPC64OR {
 35215  			break
 35216  		}
 35217  		if o5.Type != t {
 35218  			break
 35219  		}
 35220  		_ = o5.Args[1]
 35221  		o4 := o5.Args[0]
 35222  		if o4.Op != OpPPC64OR {
 35223  			break
 35224  		}
 35225  		if o4.Type != t {
 35226  			break
 35227  		}
 35228  		_ = o4.Args[1]
 35229  		s4 := o4.Args[0]
 35230  		if s4.Op != OpPPC64SLDconst {
 35231  			break
 35232  		}
 35233  		if s4.AuxInt != 40 {
 35234  			break
 35235  		}
 35236  		x5 := s4.Args[0]
 35237  		if x5.Op != OpPPC64MOVBZload {
 35238  			break
 35239  		}
 35240  		i5 := x5.AuxInt
 35241  		s := x5.Aux
 35242  		_ = x5.Args[1]
 35243  		p := x5.Args[0]
 35244  		mem := x5.Args[1]
 35245  		o3 := o4.Args[1]
 35246  		if o3.Op != OpPPC64OR {
 35247  			break
 35248  		}
 35249  		if o3.Type != t {
 35250  			break
 35251  		}
 35252  		_ = o3.Args[1]
 35253  		o2 := o3.Args[0]
 35254  		if o2.Op != OpPPC64OR {
 35255  			break
 35256  		}
 35257  		if o2.Type != t {
 35258  			break
 35259  		}
 35260  		_ = o2.Args[1]
 35261  		o1 := o2.Args[0]
 35262  		if o1.Op != OpPPC64OR {
 35263  			break
 35264  		}
 35265  		if o1.Type != t {
 35266  			break
 35267  		}
 35268  		_ = o1.Args[1]
 35269  		o0 := o1.Args[0]
 35270  		if o0.Op != OpPPC64OR {
 35271  			break
 35272  		}
 35273  		if o0.Type != t {
 35274  			break
 35275  		}
 35276  		_ = o0.Args[1]
 35277  		s0 := o0.Args[0]
 35278  		if s0.Op != OpPPC64SLDconst {
 35279  			break
 35280  		}
 35281  		if s0.AuxInt != 8 {
 35282  			break
 35283  		}
 35284  		x1 := s0.Args[0]
 35285  		if x1.Op != OpPPC64MOVBZload {
 35286  			break
 35287  		}
 35288  		i1 := x1.AuxInt
 35289  		if x1.Aux != s {
 35290  			break
 35291  		}
 35292  		_ = x1.Args[1]
 35293  		if p != x1.Args[0] {
 35294  			break
 35295  		}
 35296  		if mem != x1.Args[1] {
 35297  			break
 35298  		}
 35299  		x0 := o0.Args[1]
 35300  		if x0.Op != OpPPC64MOVBZload {
 35301  			break
 35302  		}
 35303  		i0 := x0.AuxInt
 35304  		if x0.Aux != s {
 35305  			break
 35306  		}
 35307  		_ = x0.Args[1]
 35308  		if p != x0.Args[0] {
 35309  			break
 35310  		}
 35311  		if mem != x0.Args[1] {
 35312  			break
 35313  		}
 35314  		s1 := o1.Args[1]
 35315  		if s1.Op != OpPPC64SLDconst {
 35316  			break
 35317  		}
 35318  		if s1.AuxInt != 16 {
 35319  			break
 35320  		}
 35321  		x2 := s1.Args[0]
 35322  		if x2.Op != OpPPC64MOVBZload {
 35323  			break
 35324  		}
 35325  		i2 := x2.AuxInt
 35326  		if x2.Aux != s {
 35327  			break
 35328  		}
 35329  		_ = x2.Args[1]
 35330  		if p != x2.Args[0] {
 35331  			break
 35332  		}
 35333  		if mem != x2.Args[1] {
 35334  			break
 35335  		}
 35336  		s2 := o2.Args[1]
 35337  		if s2.Op != OpPPC64SLDconst {
 35338  			break
 35339  		}
 35340  		if s2.AuxInt != 24 {
 35341  			break
 35342  		}
 35343  		x3 := s2.Args[0]
 35344  		if x3.Op != OpPPC64MOVBZload {
 35345  			break
 35346  		}
 35347  		i3 := x3.AuxInt
 35348  		if x3.Aux != s {
 35349  			break
 35350  		}
 35351  		_ = x3.Args[1]
 35352  		if p != x3.Args[0] {
 35353  			break
 35354  		}
 35355  		if mem != x3.Args[1] {
 35356  			break
 35357  		}
 35358  		s3 := o3.Args[1]
 35359  		if s3.Op != OpPPC64SLDconst {
 35360  			break
 35361  		}
 35362  		if s3.AuxInt != 32 {
 35363  			break
 35364  		}
 35365  		x4 := s3.Args[0]
 35366  		if x4.Op != OpPPC64MOVBZload {
 35367  			break
 35368  		}
 35369  		i4 := x4.AuxInt
 35370  		if x4.Aux != s {
 35371  			break
 35372  		}
 35373  		_ = x4.Args[1]
 35374  		if p != x4.Args[0] {
 35375  			break
 35376  		}
 35377  		if mem != x4.Args[1] {
 35378  			break
 35379  		}
 35380  		s5 := o5.Args[1]
 35381  		if s5.Op != OpPPC64SLDconst {
 35382  			break
 35383  		}
 35384  		if s5.AuxInt != 48 {
 35385  			break
 35386  		}
 35387  		x6 := s5.Args[0]
 35388  		if x6.Op != OpPPC64MOVBZload {
 35389  			break
 35390  		}
 35391  		i6 := x6.AuxInt
 35392  		if x6.Aux != s {
 35393  			break
 35394  		}
 35395  		_ = x6.Args[1]
 35396  		if p != x6.Args[0] {
 35397  			break
 35398  		}
 35399  		if mem != x6.Args[1] {
 35400  			break
 35401  		}
 35402  		s6 := v.Args[1]
 35403  		if s6.Op != OpPPC64SLDconst {
 35404  			break
 35405  		}
 35406  		if s6.AuxInt != 56 {
 35407  			break
 35408  		}
 35409  		x7 := s6.Args[0]
 35410  		if x7.Op != OpPPC64MOVBZload {
 35411  			break
 35412  		}
 35413  		i7 := x7.AuxInt
 35414  		if x7.Aux != s {
 35415  			break
 35416  		}
 35417  		_ = x7.Args[1]
 35418  		if p != x7.Args[0] {
 35419  			break
 35420  		}
 35421  		if mem != x7.Args[1] {
 35422  			break
 35423  		}
 35424  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35425  			break
 35426  		}
 35427  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35428  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35429  		v.reset(OpCopy)
 35430  		v.AddArg(v0)
 35431  		v0.AuxInt = i0
 35432  		v0.Aux = s
 35433  		v0.AddArg(p)
 35434  		v0.AddArg(mem)
 35435  		return true
 35436  	}
 35437  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35438  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35439  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35440  	for {
 35441  		t := v.Type
 35442  		_ = v.Args[1]
 35443  		o5 := v.Args[0]
 35444  		if o5.Op != OpPPC64OR {
 35445  			break
 35446  		}
 35447  		if o5.Type != t {
 35448  			break
 35449  		}
 35450  		_ = o5.Args[1]
 35451  		o4 := o5.Args[0]
 35452  		if o4.Op != OpPPC64OR {
 35453  			break
 35454  		}
 35455  		if o4.Type != t {
 35456  			break
 35457  		}
 35458  		_ = o4.Args[1]
 35459  		s4 := o4.Args[0]
 35460  		if s4.Op != OpPPC64SLDconst {
 35461  			break
 35462  		}
 35463  		if s4.AuxInt != 40 {
 35464  			break
 35465  		}
 35466  		x5 := s4.Args[0]
 35467  		if x5.Op != OpPPC64MOVBZload {
 35468  			break
 35469  		}
 35470  		i5 := x5.AuxInt
 35471  		s := x5.Aux
 35472  		_ = x5.Args[1]
 35473  		p := x5.Args[0]
 35474  		mem := x5.Args[1]
 35475  		o3 := o4.Args[1]
 35476  		if o3.Op != OpPPC64OR {
 35477  			break
 35478  		}
 35479  		if o3.Type != t {
 35480  			break
 35481  		}
 35482  		_ = o3.Args[1]
 35483  		o2 := o3.Args[0]
 35484  		if o2.Op != OpPPC64OR {
 35485  			break
 35486  		}
 35487  		if o2.Type != t {
 35488  			break
 35489  		}
 35490  		_ = o2.Args[1]
 35491  		o1 := o2.Args[0]
 35492  		if o1.Op != OpPPC64OR {
 35493  			break
 35494  		}
 35495  		if o1.Type != t {
 35496  			break
 35497  		}
 35498  		_ = o1.Args[1]
 35499  		o0 := o1.Args[0]
 35500  		if o0.Op != OpPPC64OR {
 35501  			break
 35502  		}
 35503  		if o0.Type != t {
 35504  			break
 35505  		}
 35506  		_ = o0.Args[1]
 35507  		x0 := o0.Args[0]
 35508  		if x0.Op != OpPPC64MOVBZload {
 35509  			break
 35510  		}
 35511  		i0 := x0.AuxInt
 35512  		if x0.Aux != s {
 35513  			break
 35514  		}
 35515  		_ = x0.Args[1]
 35516  		if p != x0.Args[0] {
 35517  			break
 35518  		}
 35519  		if mem != x0.Args[1] {
 35520  			break
 35521  		}
 35522  		s0 := o0.Args[1]
 35523  		if s0.Op != OpPPC64SLDconst {
 35524  			break
 35525  		}
 35526  		if s0.AuxInt != 8 {
 35527  			break
 35528  		}
 35529  		x1 := s0.Args[0]
 35530  		if x1.Op != OpPPC64MOVBZload {
 35531  			break
 35532  		}
 35533  		i1 := x1.AuxInt
 35534  		if x1.Aux != s {
 35535  			break
 35536  		}
 35537  		_ = x1.Args[1]
 35538  		if p != x1.Args[0] {
 35539  			break
 35540  		}
 35541  		if mem != x1.Args[1] {
 35542  			break
 35543  		}
 35544  		s1 := o1.Args[1]
 35545  		if s1.Op != OpPPC64SLDconst {
 35546  			break
 35547  		}
 35548  		if s1.AuxInt != 16 {
 35549  			break
 35550  		}
 35551  		x2 := s1.Args[0]
 35552  		if x2.Op != OpPPC64MOVBZload {
 35553  			break
 35554  		}
 35555  		i2 := x2.AuxInt
 35556  		if x2.Aux != s {
 35557  			break
 35558  		}
 35559  		_ = x2.Args[1]
 35560  		if p != x2.Args[0] {
 35561  			break
 35562  		}
 35563  		if mem != x2.Args[1] {
 35564  			break
 35565  		}
 35566  		s2 := o2.Args[1]
 35567  		if s2.Op != OpPPC64SLDconst {
 35568  			break
 35569  		}
 35570  		if s2.AuxInt != 24 {
 35571  			break
 35572  		}
 35573  		x3 := s2.Args[0]
 35574  		if x3.Op != OpPPC64MOVBZload {
 35575  			break
 35576  		}
 35577  		i3 := x3.AuxInt
 35578  		if x3.Aux != s {
 35579  			break
 35580  		}
 35581  		_ = x3.Args[1]
 35582  		if p != x3.Args[0] {
 35583  			break
 35584  		}
 35585  		if mem != x3.Args[1] {
 35586  			break
 35587  		}
 35588  		s3 := o3.Args[1]
 35589  		if s3.Op != OpPPC64SLDconst {
 35590  			break
 35591  		}
 35592  		if s3.AuxInt != 32 {
 35593  			break
 35594  		}
 35595  		x4 := s3.Args[0]
 35596  		if x4.Op != OpPPC64MOVBZload {
 35597  			break
 35598  		}
 35599  		i4 := x4.AuxInt
 35600  		if x4.Aux != s {
 35601  			break
 35602  		}
 35603  		_ = x4.Args[1]
 35604  		if p != x4.Args[0] {
 35605  			break
 35606  		}
 35607  		if mem != x4.Args[1] {
 35608  			break
 35609  		}
 35610  		s5 := o5.Args[1]
 35611  		if s5.Op != OpPPC64SLDconst {
 35612  			break
 35613  		}
 35614  		if s5.AuxInt != 48 {
 35615  			break
 35616  		}
 35617  		x6 := s5.Args[0]
 35618  		if x6.Op != OpPPC64MOVBZload {
 35619  			break
 35620  		}
 35621  		i6 := x6.AuxInt
 35622  		if x6.Aux != s {
 35623  			break
 35624  		}
 35625  		_ = x6.Args[1]
 35626  		if p != x6.Args[0] {
 35627  			break
 35628  		}
 35629  		if mem != x6.Args[1] {
 35630  			break
 35631  		}
 35632  		s6 := v.Args[1]
 35633  		if s6.Op != OpPPC64SLDconst {
 35634  			break
 35635  		}
 35636  		if s6.AuxInt != 56 {
 35637  			break
 35638  		}
 35639  		x7 := s6.Args[0]
 35640  		if x7.Op != OpPPC64MOVBZload {
 35641  			break
 35642  		}
 35643  		i7 := x7.AuxInt
 35644  		if x7.Aux != s {
 35645  			break
 35646  		}
 35647  		_ = x7.Args[1]
 35648  		if p != x7.Args[0] {
 35649  			break
 35650  		}
 35651  		if mem != x7.Args[1] {
 35652  			break
 35653  		}
 35654  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35655  			break
 35656  		}
 35657  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35658  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35659  		v.reset(OpCopy)
 35660  		v.AddArg(v0)
 35661  		v0.AuxInt = i0
 35662  		v0.Aux = s
 35663  		v0.AddArg(p)
 35664  		v0.AddArg(mem)
 35665  		return true
 35666  	}
 35667  	return false
 35668  }
 35669  func rewriteValuePPC64_OpPPC64OR_130(v *Value) bool {
 35670  	b := v.Block
 35671  	_ = b
 35672  	config := b.Func.Config
 35673  	_ = config
 35674  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35675  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35676  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35677  	for {
 35678  		t := v.Type
 35679  		_ = v.Args[1]
 35680  		o5 := v.Args[0]
 35681  		if o5.Op != OpPPC64OR {
 35682  			break
 35683  		}
 35684  		if o5.Type != t {
 35685  			break
 35686  		}
 35687  		_ = o5.Args[1]
 35688  		o4 := o5.Args[0]
 35689  		if o4.Op != OpPPC64OR {
 35690  			break
 35691  		}
 35692  		if o4.Type != t {
 35693  			break
 35694  		}
 35695  		_ = o4.Args[1]
 35696  		o3 := o4.Args[0]
 35697  		if o3.Op != OpPPC64OR {
 35698  			break
 35699  		}
 35700  		if o3.Type != t {
 35701  			break
 35702  		}
 35703  		_ = o3.Args[1]
 35704  		s3 := o3.Args[0]
 35705  		if s3.Op != OpPPC64SLDconst {
 35706  			break
 35707  		}
 35708  		if s3.AuxInt != 32 {
 35709  			break
 35710  		}
 35711  		x4 := s3.Args[0]
 35712  		if x4.Op != OpPPC64MOVBZload {
 35713  			break
 35714  		}
 35715  		i4 := x4.AuxInt
 35716  		s := x4.Aux
 35717  		_ = x4.Args[1]
 35718  		p := x4.Args[0]
 35719  		mem := x4.Args[1]
 35720  		o2 := o3.Args[1]
 35721  		if o2.Op != OpPPC64OR {
 35722  			break
 35723  		}
 35724  		if o2.Type != t {
 35725  			break
 35726  		}
 35727  		_ = o2.Args[1]
 35728  		s2 := o2.Args[0]
 35729  		if s2.Op != OpPPC64SLDconst {
 35730  			break
 35731  		}
 35732  		if s2.AuxInt != 24 {
 35733  			break
 35734  		}
 35735  		x3 := s2.Args[0]
 35736  		if x3.Op != OpPPC64MOVBZload {
 35737  			break
 35738  		}
 35739  		i3 := x3.AuxInt
 35740  		if x3.Aux != s {
 35741  			break
 35742  		}
 35743  		_ = x3.Args[1]
 35744  		if p != x3.Args[0] {
 35745  			break
 35746  		}
 35747  		if mem != x3.Args[1] {
 35748  			break
 35749  		}
 35750  		o1 := o2.Args[1]
 35751  		if o1.Op != OpPPC64OR {
 35752  			break
 35753  		}
 35754  		if o1.Type != t {
 35755  			break
 35756  		}
 35757  		_ = o1.Args[1]
 35758  		s1 := o1.Args[0]
 35759  		if s1.Op != OpPPC64SLDconst {
 35760  			break
 35761  		}
 35762  		if s1.AuxInt != 16 {
 35763  			break
 35764  		}
 35765  		x2 := s1.Args[0]
 35766  		if x2.Op != OpPPC64MOVBZload {
 35767  			break
 35768  		}
 35769  		i2 := x2.AuxInt
 35770  		if x2.Aux != s {
 35771  			break
 35772  		}
 35773  		_ = x2.Args[1]
 35774  		if p != x2.Args[0] {
 35775  			break
 35776  		}
 35777  		if mem != x2.Args[1] {
 35778  			break
 35779  		}
 35780  		o0 := o1.Args[1]
 35781  		if o0.Op != OpPPC64OR {
 35782  			break
 35783  		}
 35784  		if o0.Type != t {
 35785  			break
 35786  		}
 35787  		_ = o0.Args[1]
 35788  		s0 := o0.Args[0]
 35789  		if s0.Op != OpPPC64SLDconst {
 35790  			break
 35791  		}
 35792  		if s0.AuxInt != 8 {
 35793  			break
 35794  		}
 35795  		x1 := s0.Args[0]
 35796  		if x1.Op != OpPPC64MOVBZload {
 35797  			break
 35798  		}
 35799  		i1 := x1.AuxInt
 35800  		if x1.Aux != s {
 35801  			break
 35802  		}
 35803  		_ = x1.Args[1]
 35804  		if p != x1.Args[0] {
 35805  			break
 35806  		}
 35807  		if mem != x1.Args[1] {
 35808  			break
 35809  		}
 35810  		x0 := o0.Args[1]
 35811  		if x0.Op != OpPPC64MOVBZload {
 35812  			break
 35813  		}
 35814  		i0 := x0.AuxInt
 35815  		if x0.Aux != s {
 35816  			break
 35817  		}
 35818  		_ = x0.Args[1]
 35819  		if p != x0.Args[0] {
 35820  			break
 35821  		}
 35822  		if mem != x0.Args[1] {
 35823  			break
 35824  		}
 35825  		s4 := o4.Args[1]
 35826  		if s4.Op != OpPPC64SLDconst {
 35827  			break
 35828  		}
 35829  		if s4.AuxInt != 40 {
 35830  			break
 35831  		}
 35832  		x5 := s4.Args[0]
 35833  		if x5.Op != OpPPC64MOVBZload {
 35834  			break
 35835  		}
 35836  		i5 := x5.AuxInt
 35837  		if x5.Aux != s {
 35838  			break
 35839  		}
 35840  		_ = x5.Args[1]
 35841  		if p != x5.Args[0] {
 35842  			break
 35843  		}
 35844  		if mem != x5.Args[1] {
 35845  			break
 35846  		}
 35847  		s5 := o5.Args[1]
 35848  		if s5.Op != OpPPC64SLDconst {
 35849  			break
 35850  		}
 35851  		if s5.AuxInt != 48 {
 35852  			break
 35853  		}
 35854  		x6 := s5.Args[0]
 35855  		if x6.Op != OpPPC64MOVBZload {
 35856  			break
 35857  		}
 35858  		i6 := x6.AuxInt
 35859  		if x6.Aux != s {
 35860  			break
 35861  		}
 35862  		_ = x6.Args[1]
 35863  		if p != x6.Args[0] {
 35864  			break
 35865  		}
 35866  		if mem != x6.Args[1] {
 35867  			break
 35868  		}
 35869  		s6 := v.Args[1]
 35870  		if s6.Op != OpPPC64SLDconst {
 35871  			break
 35872  		}
 35873  		if s6.AuxInt != 56 {
 35874  			break
 35875  		}
 35876  		x7 := s6.Args[0]
 35877  		if x7.Op != OpPPC64MOVBZload {
 35878  			break
 35879  		}
 35880  		i7 := x7.AuxInt
 35881  		if x7.Aux != s {
 35882  			break
 35883  		}
 35884  		_ = x7.Args[1]
 35885  		if p != x7.Args[0] {
 35886  			break
 35887  		}
 35888  		if mem != x7.Args[1] {
 35889  			break
 35890  		}
 35891  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35892  			break
 35893  		}
 35894  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35895  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35896  		v.reset(OpCopy)
 35897  		v.AddArg(v0)
 35898  		v0.AuxInt = i0
 35899  		v0.Aux = s
 35900  		v0.AddArg(p)
 35901  		v0.AddArg(mem)
 35902  		return true
 35903  	}
 35904  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35905  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35906  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35907  	for {
 35908  		t := v.Type
 35909  		_ = v.Args[1]
 35910  		o5 := v.Args[0]
 35911  		if o5.Op != OpPPC64OR {
 35912  			break
 35913  		}
 35914  		if o5.Type != t {
 35915  			break
 35916  		}
 35917  		_ = o5.Args[1]
 35918  		o4 := o5.Args[0]
 35919  		if o4.Op != OpPPC64OR {
 35920  			break
 35921  		}
 35922  		if o4.Type != t {
 35923  			break
 35924  		}
 35925  		_ = o4.Args[1]
 35926  		o3 := o4.Args[0]
 35927  		if o3.Op != OpPPC64OR {
 35928  			break
 35929  		}
 35930  		if o3.Type != t {
 35931  			break
 35932  		}
 35933  		_ = o3.Args[1]
 35934  		s3 := o3.Args[0]
 35935  		if s3.Op != OpPPC64SLDconst {
 35936  			break
 35937  		}
 35938  		if s3.AuxInt != 32 {
 35939  			break
 35940  		}
 35941  		x4 := s3.Args[0]
 35942  		if x4.Op != OpPPC64MOVBZload {
 35943  			break
 35944  		}
 35945  		i4 := x4.AuxInt
 35946  		s := x4.Aux
 35947  		_ = x4.Args[1]
 35948  		p := x4.Args[0]
 35949  		mem := x4.Args[1]
 35950  		o2 := o3.Args[1]
 35951  		if o2.Op != OpPPC64OR {
 35952  			break
 35953  		}
 35954  		if o2.Type != t {
 35955  			break
 35956  		}
 35957  		_ = o2.Args[1]
 35958  		s2 := o2.Args[0]
 35959  		if s2.Op != OpPPC64SLDconst {
 35960  			break
 35961  		}
 35962  		if s2.AuxInt != 24 {
 35963  			break
 35964  		}
 35965  		x3 := s2.Args[0]
 35966  		if x3.Op != OpPPC64MOVBZload {
 35967  			break
 35968  		}
 35969  		i3 := x3.AuxInt
 35970  		if x3.Aux != s {
 35971  			break
 35972  		}
 35973  		_ = x3.Args[1]
 35974  		if p != x3.Args[0] {
 35975  			break
 35976  		}
 35977  		if mem != x3.Args[1] {
 35978  			break
 35979  		}
 35980  		o1 := o2.Args[1]
 35981  		if o1.Op != OpPPC64OR {
 35982  			break
 35983  		}
 35984  		if o1.Type != t {
 35985  			break
 35986  		}
 35987  		_ = o1.Args[1]
 35988  		s1 := o1.Args[0]
 35989  		if s1.Op != OpPPC64SLDconst {
 35990  			break
 35991  		}
 35992  		if s1.AuxInt != 16 {
 35993  			break
 35994  		}
 35995  		x2 := s1.Args[0]
 35996  		if x2.Op != OpPPC64MOVBZload {
 35997  			break
 35998  		}
 35999  		i2 := x2.AuxInt
 36000  		if x2.Aux != s {
 36001  			break
 36002  		}
 36003  		_ = x2.Args[1]
 36004  		if p != x2.Args[0] {
 36005  			break
 36006  		}
 36007  		if mem != x2.Args[1] {
 36008  			break
 36009  		}
 36010  		o0 := o1.Args[1]
 36011  		if o0.Op != OpPPC64OR {
 36012  			break
 36013  		}
 36014  		if o0.Type != t {
 36015  			break
 36016  		}
 36017  		_ = o0.Args[1]
 36018  		x0 := o0.Args[0]
 36019  		if x0.Op != OpPPC64MOVBZload {
 36020  			break
 36021  		}
 36022  		i0 := x0.AuxInt
 36023  		if x0.Aux != s {
 36024  			break
 36025  		}
 36026  		_ = x0.Args[1]
 36027  		if p != x0.Args[0] {
 36028  			break
 36029  		}
 36030  		if mem != x0.Args[1] {
 36031  			break
 36032  		}
 36033  		s0 := o0.Args[1]
 36034  		if s0.Op != OpPPC64SLDconst {
 36035  			break
 36036  		}
 36037  		if s0.AuxInt != 8 {
 36038  			break
 36039  		}
 36040  		x1 := s0.Args[0]
 36041  		if x1.Op != OpPPC64MOVBZload {
 36042  			break
 36043  		}
 36044  		i1 := x1.AuxInt
 36045  		if x1.Aux != s {
 36046  			break
 36047  		}
 36048  		_ = x1.Args[1]
 36049  		if p != x1.Args[0] {
 36050  			break
 36051  		}
 36052  		if mem != x1.Args[1] {
 36053  			break
 36054  		}
 36055  		s4 := o4.Args[1]
 36056  		if s4.Op != OpPPC64SLDconst {
 36057  			break
 36058  		}
 36059  		if s4.AuxInt != 40 {
 36060  			break
 36061  		}
 36062  		x5 := s4.Args[0]
 36063  		if x5.Op != OpPPC64MOVBZload {
 36064  			break
 36065  		}
 36066  		i5 := x5.AuxInt
 36067  		if x5.Aux != s {
 36068  			break
 36069  		}
 36070  		_ = x5.Args[1]
 36071  		if p != x5.Args[0] {
 36072  			break
 36073  		}
 36074  		if mem != x5.Args[1] {
 36075  			break
 36076  		}
 36077  		s5 := o5.Args[1]
 36078  		if s5.Op != OpPPC64SLDconst {
 36079  			break
 36080  		}
 36081  		if s5.AuxInt != 48 {
 36082  			break
 36083  		}
 36084  		x6 := s5.Args[0]
 36085  		if x6.Op != OpPPC64MOVBZload {
 36086  			break
 36087  		}
 36088  		i6 := x6.AuxInt
 36089  		if x6.Aux != s {
 36090  			break
 36091  		}
 36092  		_ = x6.Args[1]
 36093  		if p != x6.Args[0] {
 36094  			break
 36095  		}
 36096  		if mem != x6.Args[1] {
 36097  			break
 36098  		}
 36099  		s6 := v.Args[1]
 36100  		if s6.Op != OpPPC64SLDconst {
 36101  			break
 36102  		}
 36103  		if s6.AuxInt != 56 {
 36104  			break
 36105  		}
 36106  		x7 := s6.Args[0]
 36107  		if x7.Op != OpPPC64MOVBZload {
 36108  			break
 36109  		}
 36110  		i7 := x7.AuxInt
 36111  		if x7.Aux != s {
 36112  			break
 36113  		}
 36114  		_ = x7.Args[1]
 36115  		if p != x7.Args[0] {
 36116  			break
 36117  		}
 36118  		if mem != x7.Args[1] {
 36119  			break
 36120  		}
 36121  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36122  			break
 36123  		}
 36124  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36125  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36126  		v.reset(OpCopy)
 36127  		v.AddArg(v0)
 36128  		v0.AuxInt = i0
 36129  		v0.Aux = s
 36130  		v0.AddArg(p)
 36131  		v0.AddArg(mem)
 36132  		return true
 36133  	}
 36134  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36135  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36136  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36137  	for {
 36138  		t := v.Type
 36139  		_ = v.Args[1]
 36140  		o5 := v.Args[0]
 36141  		if o5.Op != OpPPC64OR {
 36142  			break
 36143  		}
 36144  		if o5.Type != t {
 36145  			break
 36146  		}
 36147  		_ = o5.Args[1]
 36148  		o4 := o5.Args[0]
 36149  		if o4.Op != OpPPC64OR {
 36150  			break
 36151  		}
 36152  		if o4.Type != t {
 36153  			break
 36154  		}
 36155  		_ = o4.Args[1]
 36156  		o3 := o4.Args[0]
 36157  		if o3.Op != OpPPC64OR {
 36158  			break
 36159  		}
 36160  		if o3.Type != t {
 36161  			break
 36162  		}
 36163  		_ = o3.Args[1]
 36164  		s3 := o3.Args[0]
 36165  		if s3.Op != OpPPC64SLDconst {
 36166  			break
 36167  		}
 36168  		if s3.AuxInt != 32 {
 36169  			break
 36170  		}
 36171  		x4 := s3.Args[0]
 36172  		if x4.Op != OpPPC64MOVBZload {
 36173  			break
 36174  		}
 36175  		i4 := x4.AuxInt
 36176  		s := x4.Aux
 36177  		_ = x4.Args[1]
 36178  		p := x4.Args[0]
 36179  		mem := x4.Args[1]
 36180  		o2 := o3.Args[1]
 36181  		if o2.Op != OpPPC64OR {
 36182  			break
 36183  		}
 36184  		if o2.Type != t {
 36185  			break
 36186  		}
 36187  		_ = o2.Args[1]
 36188  		s2 := o2.Args[0]
 36189  		if s2.Op != OpPPC64SLDconst {
 36190  			break
 36191  		}
 36192  		if s2.AuxInt != 24 {
 36193  			break
 36194  		}
 36195  		x3 := s2.Args[0]
 36196  		if x3.Op != OpPPC64MOVBZload {
 36197  			break
 36198  		}
 36199  		i3 := x3.AuxInt
 36200  		if x3.Aux != s {
 36201  			break
 36202  		}
 36203  		_ = x3.Args[1]
 36204  		if p != x3.Args[0] {
 36205  			break
 36206  		}
 36207  		if mem != x3.Args[1] {
 36208  			break
 36209  		}
 36210  		o1 := o2.Args[1]
 36211  		if o1.Op != OpPPC64OR {
 36212  			break
 36213  		}
 36214  		if o1.Type != t {
 36215  			break
 36216  		}
 36217  		_ = o1.Args[1]
 36218  		o0 := o1.Args[0]
 36219  		if o0.Op != OpPPC64OR {
 36220  			break
 36221  		}
 36222  		if o0.Type != t {
 36223  			break
 36224  		}
 36225  		_ = o0.Args[1]
 36226  		s0 := o0.Args[0]
 36227  		if s0.Op != OpPPC64SLDconst {
 36228  			break
 36229  		}
 36230  		if s0.AuxInt != 8 {
 36231  			break
 36232  		}
 36233  		x1 := s0.Args[0]
 36234  		if x1.Op != OpPPC64MOVBZload {
 36235  			break
 36236  		}
 36237  		i1 := x1.AuxInt
 36238  		if x1.Aux != s {
 36239  			break
 36240  		}
 36241  		_ = x1.Args[1]
 36242  		if p != x1.Args[0] {
 36243  			break
 36244  		}
 36245  		if mem != x1.Args[1] {
 36246  			break
 36247  		}
 36248  		x0 := o0.Args[1]
 36249  		if x0.Op != OpPPC64MOVBZload {
 36250  			break
 36251  		}
 36252  		i0 := x0.AuxInt
 36253  		if x0.Aux != s {
 36254  			break
 36255  		}
 36256  		_ = x0.Args[1]
 36257  		if p != x0.Args[0] {
 36258  			break
 36259  		}
 36260  		if mem != x0.Args[1] {
 36261  			break
 36262  		}
 36263  		s1 := o1.Args[1]
 36264  		if s1.Op != OpPPC64SLDconst {
 36265  			break
 36266  		}
 36267  		if s1.AuxInt != 16 {
 36268  			break
 36269  		}
 36270  		x2 := s1.Args[0]
 36271  		if x2.Op != OpPPC64MOVBZload {
 36272  			break
 36273  		}
 36274  		i2 := x2.AuxInt
 36275  		if x2.Aux != s {
 36276  			break
 36277  		}
 36278  		_ = x2.Args[1]
 36279  		if p != x2.Args[0] {
 36280  			break
 36281  		}
 36282  		if mem != x2.Args[1] {
 36283  			break
 36284  		}
 36285  		s4 := o4.Args[1]
 36286  		if s4.Op != OpPPC64SLDconst {
 36287  			break
 36288  		}
 36289  		if s4.AuxInt != 40 {
 36290  			break
 36291  		}
 36292  		x5 := s4.Args[0]
 36293  		if x5.Op != OpPPC64MOVBZload {
 36294  			break
 36295  		}
 36296  		i5 := x5.AuxInt
 36297  		if x5.Aux != s {
 36298  			break
 36299  		}
 36300  		_ = x5.Args[1]
 36301  		if p != x5.Args[0] {
 36302  			break
 36303  		}
 36304  		if mem != x5.Args[1] {
 36305  			break
 36306  		}
 36307  		s5 := o5.Args[1]
 36308  		if s5.Op != OpPPC64SLDconst {
 36309  			break
 36310  		}
 36311  		if s5.AuxInt != 48 {
 36312  			break
 36313  		}
 36314  		x6 := s5.Args[0]
 36315  		if x6.Op != OpPPC64MOVBZload {
 36316  			break
 36317  		}
 36318  		i6 := x6.AuxInt
 36319  		if x6.Aux != s {
 36320  			break
 36321  		}
 36322  		_ = x6.Args[1]
 36323  		if p != x6.Args[0] {
 36324  			break
 36325  		}
 36326  		if mem != x6.Args[1] {
 36327  			break
 36328  		}
 36329  		s6 := v.Args[1]
 36330  		if s6.Op != OpPPC64SLDconst {
 36331  			break
 36332  		}
 36333  		if s6.AuxInt != 56 {
 36334  			break
 36335  		}
 36336  		x7 := s6.Args[0]
 36337  		if x7.Op != OpPPC64MOVBZload {
 36338  			break
 36339  		}
 36340  		i7 := x7.AuxInt
 36341  		if x7.Aux != s {
 36342  			break
 36343  		}
 36344  		_ = x7.Args[1]
 36345  		if p != x7.Args[0] {
 36346  			break
 36347  		}
 36348  		if mem != x7.Args[1] {
 36349  			break
 36350  		}
 36351  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36352  			break
 36353  		}
 36354  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36355  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36356  		v.reset(OpCopy)
 36357  		v.AddArg(v0)
 36358  		v0.AuxInt = i0
 36359  		v0.Aux = s
 36360  		v0.AddArg(p)
 36361  		v0.AddArg(mem)
 36362  		return true
 36363  	}
 36364  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36365  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36366  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36367  	for {
 36368  		t := v.Type
 36369  		_ = v.Args[1]
 36370  		o5 := v.Args[0]
 36371  		if o5.Op != OpPPC64OR {
 36372  			break
 36373  		}
 36374  		if o5.Type != t {
 36375  			break
 36376  		}
 36377  		_ = o5.Args[1]
 36378  		o4 := o5.Args[0]
 36379  		if o4.Op != OpPPC64OR {
 36380  			break
 36381  		}
 36382  		if o4.Type != t {
 36383  			break
 36384  		}
 36385  		_ = o4.Args[1]
 36386  		o3 := o4.Args[0]
 36387  		if o3.Op != OpPPC64OR {
 36388  			break
 36389  		}
 36390  		if o3.Type != t {
 36391  			break
 36392  		}
 36393  		_ = o3.Args[1]
 36394  		s3 := o3.Args[0]
 36395  		if s3.Op != OpPPC64SLDconst {
 36396  			break
 36397  		}
 36398  		if s3.AuxInt != 32 {
 36399  			break
 36400  		}
 36401  		x4 := s3.Args[0]
 36402  		if x4.Op != OpPPC64MOVBZload {
 36403  			break
 36404  		}
 36405  		i4 := x4.AuxInt
 36406  		s := x4.Aux
 36407  		_ = x4.Args[1]
 36408  		p := x4.Args[0]
 36409  		mem := x4.Args[1]
 36410  		o2 := o3.Args[1]
 36411  		if o2.Op != OpPPC64OR {
 36412  			break
 36413  		}
 36414  		if o2.Type != t {
 36415  			break
 36416  		}
 36417  		_ = o2.Args[1]
 36418  		s2 := o2.Args[0]
 36419  		if s2.Op != OpPPC64SLDconst {
 36420  			break
 36421  		}
 36422  		if s2.AuxInt != 24 {
 36423  			break
 36424  		}
 36425  		x3 := s2.Args[0]
 36426  		if x3.Op != OpPPC64MOVBZload {
 36427  			break
 36428  		}
 36429  		i3 := x3.AuxInt
 36430  		if x3.Aux != s {
 36431  			break
 36432  		}
 36433  		_ = x3.Args[1]
 36434  		if p != x3.Args[0] {
 36435  			break
 36436  		}
 36437  		if mem != x3.Args[1] {
 36438  			break
 36439  		}
 36440  		o1 := o2.Args[1]
 36441  		if o1.Op != OpPPC64OR {
 36442  			break
 36443  		}
 36444  		if o1.Type != t {
 36445  			break
 36446  		}
 36447  		_ = o1.Args[1]
 36448  		o0 := o1.Args[0]
 36449  		if o0.Op != OpPPC64OR {
 36450  			break
 36451  		}
 36452  		if o0.Type != t {
 36453  			break
 36454  		}
 36455  		_ = o0.Args[1]
 36456  		x0 := o0.Args[0]
 36457  		if x0.Op != OpPPC64MOVBZload {
 36458  			break
 36459  		}
 36460  		i0 := x0.AuxInt
 36461  		if x0.Aux != s {
 36462  			break
 36463  		}
 36464  		_ = x0.Args[1]
 36465  		if p != x0.Args[0] {
 36466  			break
 36467  		}
 36468  		if mem != x0.Args[1] {
 36469  			break
 36470  		}
 36471  		s0 := o0.Args[1]
 36472  		if s0.Op != OpPPC64SLDconst {
 36473  			break
 36474  		}
 36475  		if s0.AuxInt != 8 {
 36476  			break
 36477  		}
 36478  		x1 := s0.Args[0]
 36479  		if x1.Op != OpPPC64MOVBZload {
 36480  			break
 36481  		}
 36482  		i1 := x1.AuxInt
 36483  		if x1.Aux != s {
 36484  			break
 36485  		}
 36486  		_ = x1.Args[1]
 36487  		if p != x1.Args[0] {
 36488  			break
 36489  		}
 36490  		if mem != x1.Args[1] {
 36491  			break
 36492  		}
 36493  		s1 := o1.Args[1]
 36494  		if s1.Op != OpPPC64SLDconst {
 36495  			break
 36496  		}
 36497  		if s1.AuxInt != 16 {
 36498  			break
 36499  		}
 36500  		x2 := s1.Args[0]
 36501  		if x2.Op != OpPPC64MOVBZload {
 36502  			break
 36503  		}
 36504  		i2 := x2.AuxInt
 36505  		if x2.Aux != s {
 36506  			break
 36507  		}
 36508  		_ = x2.Args[1]
 36509  		if p != x2.Args[0] {
 36510  			break
 36511  		}
 36512  		if mem != x2.Args[1] {
 36513  			break
 36514  		}
 36515  		s4 := o4.Args[1]
 36516  		if s4.Op != OpPPC64SLDconst {
 36517  			break
 36518  		}
 36519  		if s4.AuxInt != 40 {
 36520  			break
 36521  		}
 36522  		x5 := s4.Args[0]
 36523  		if x5.Op != OpPPC64MOVBZload {
 36524  			break
 36525  		}
 36526  		i5 := x5.AuxInt
 36527  		if x5.Aux != s {
 36528  			break
 36529  		}
 36530  		_ = x5.Args[1]
 36531  		if p != x5.Args[0] {
 36532  			break
 36533  		}
 36534  		if mem != x5.Args[1] {
 36535  			break
 36536  		}
 36537  		s5 := o5.Args[1]
 36538  		if s5.Op != OpPPC64SLDconst {
 36539  			break
 36540  		}
 36541  		if s5.AuxInt != 48 {
 36542  			break
 36543  		}
 36544  		x6 := s5.Args[0]
 36545  		if x6.Op != OpPPC64MOVBZload {
 36546  			break
 36547  		}
 36548  		i6 := x6.AuxInt
 36549  		if x6.Aux != s {
 36550  			break
 36551  		}
 36552  		_ = x6.Args[1]
 36553  		if p != x6.Args[0] {
 36554  			break
 36555  		}
 36556  		if mem != x6.Args[1] {
 36557  			break
 36558  		}
 36559  		s6 := v.Args[1]
 36560  		if s6.Op != OpPPC64SLDconst {
 36561  			break
 36562  		}
 36563  		if s6.AuxInt != 56 {
 36564  			break
 36565  		}
 36566  		x7 := s6.Args[0]
 36567  		if x7.Op != OpPPC64MOVBZload {
 36568  			break
 36569  		}
 36570  		i7 := x7.AuxInt
 36571  		if x7.Aux != s {
 36572  			break
 36573  		}
 36574  		_ = x7.Args[1]
 36575  		if p != x7.Args[0] {
 36576  			break
 36577  		}
 36578  		if mem != x7.Args[1] {
 36579  			break
 36580  		}
 36581  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36582  			break
 36583  		}
 36584  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36585  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36586  		v.reset(OpCopy)
 36587  		v.AddArg(v0)
 36588  		v0.AuxInt = i0
 36589  		v0.Aux = s
 36590  		v0.AddArg(p)
 36591  		v0.AddArg(mem)
 36592  		return true
 36593  	}
 36594  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36595  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36596  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36597  	for {
 36598  		t := v.Type
 36599  		_ = v.Args[1]
 36600  		o5 := v.Args[0]
 36601  		if o5.Op != OpPPC64OR {
 36602  			break
 36603  		}
 36604  		if o5.Type != t {
 36605  			break
 36606  		}
 36607  		_ = o5.Args[1]
 36608  		o4 := o5.Args[0]
 36609  		if o4.Op != OpPPC64OR {
 36610  			break
 36611  		}
 36612  		if o4.Type != t {
 36613  			break
 36614  		}
 36615  		_ = o4.Args[1]
 36616  		o3 := o4.Args[0]
 36617  		if o3.Op != OpPPC64OR {
 36618  			break
 36619  		}
 36620  		if o3.Type != t {
 36621  			break
 36622  		}
 36623  		_ = o3.Args[1]
 36624  		s3 := o3.Args[0]
 36625  		if s3.Op != OpPPC64SLDconst {
 36626  			break
 36627  		}
 36628  		if s3.AuxInt != 32 {
 36629  			break
 36630  		}
 36631  		x4 := s3.Args[0]
 36632  		if x4.Op != OpPPC64MOVBZload {
 36633  			break
 36634  		}
 36635  		i4 := x4.AuxInt
 36636  		s := x4.Aux
 36637  		_ = x4.Args[1]
 36638  		p := x4.Args[0]
 36639  		mem := x4.Args[1]
 36640  		o2 := o3.Args[1]
 36641  		if o2.Op != OpPPC64OR {
 36642  			break
 36643  		}
 36644  		if o2.Type != t {
 36645  			break
 36646  		}
 36647  		_ = o2.Args[1]
 36648  		o1 := o2.Args[0]
 36649  		if o1.Op != OpPPC64OR {
 36650  			break
 36651  		}
 36652  		if o1.Type != t {
 36653  			break
 36654  		}
 36655  		_ = o1.Args[1]
 36656  		s1 := o1.Args[0]
 36657  		if s1.Op != OpPPC64SLDconst {
 36658  			break
 36659  		}
 36660  		if s1.AuxInt != 16 {
 36661  			break
 36662  		}
 36663  		x2 := s1.Args[0]
 36664  		if x2.Op != OpPPC64MOVBZload {
 36665  			break
 36666  		}
 36667  		i2 := x2.AuxInt
 36668  		if x2.Aux != s {
 36669  			break
 36670  		}
 36671  		_ = x2.Args[1]
 36672  		if p != x2.Args[0] {
 36673  			break
 36674  		}
 36675  		if mem != x2.Args[1] {
 36676  			break
 36677  		}
 36678  		o0 := o1.Args[1]
 36679  		if o0.Op != OpPPC64OR {
 36680  			break
 36681  		}
 36682  		if o0.Type != t {
 36683  			break
 36684  		}
 36685  		_ = o0.Args[1]
 36686  		s0 := o0.Args[0]
 36687  		if s0.Op != OpPPC64SLDconst {
 36688  			break
 36689  		}
 36690  		if s0.AuxInt != 8 {
 36691  			break
 36692  		}
 36693  		x1 := s0.Args[0]
 36694  		if x1.Op != OpPPC64MOVBZload {
 36695  			break
 36696  		}
 36697  		i1 := x1.AuxInt
 36698  		if x1.Aux != s {
 36699  			break
 36700  		}
 36701  		_ = x1.Args[1]
 36702  		if p != x1.Args[0] {
 36703  			break
 36704  		}
 36705  		if mem != x1.Args[1] {
 36706  			break
 36707  		}
 36708  		x0 := o0.Args[1]
 36709  		if x0.Op != OpPPC64MOVBZload {
 36710  			break
 36711  		}
 36712  		i0 := x0.AuxInt
 36713  		if x0.Aux != s {
 36714  			break
 36715  		}
 36716  		_ = x0.Args[1]
 36717  		if p != x0.Args[0] {
 36718  			break
 36719  		}
 36720  		if mem != x0.Args[1] {
 36721  			break
 36722  		}
 36723  		s2 := o2.Args[1]
 36724  		if s2.Op != OpPPC64SLDconst {
 36725  			break
 36726  		}
 36727  		if s2.AuxInt != 24 {
 36728  			break
 36729  		}
 36730  		x3 := s2.Args[0]
 36731  		if x3.Op != OpPPC64MOVBZload {
 36732  			break
 36733  		}
 36734  		i3 := x3.AuxInt
 36735  		if x3.Aux != s {
 36736  			break
 36737  		}
 36738  		_ = x3.Args[1]
 36739  		if p != x3.Args[0] {
 36740  			break
 36741  		}
 36742  		if mem != x3.Args[1] {
 36743  			break
 36744  		}
 36745  		s4 := o4.Args[1]
 36746  		if s4.Op != OpPPC64SLDconst {
 36747  			break
 36748  		}
 36749  		if s4.AuxInt != 40 {
 36750  			break
 36751  		}
 36752  		x5 := s4.Args[0]
 36753  		if x5.Op != OpPPC64MOVBZload {
 36754  			break
 36755  		}
 36756  		i5 := x5.AuxInt
 36757  		if x5.Aux != s {
 36758  			break
 36759  		}
 36760  		_ = x5.Args[1]
 36761  		if p != x5.Args[0] {
 36762  			break
 36763  		}
 36764  		if mem != x5.Args[1] {
 36765  			break
 36766  		}
 36767  		s5 := o5.Args[1]
 36768  		if s5.Op != OpPPC64SLDconst {
 36769  			break
 36770  		}
 36771  		if s5.AuxInt != 48 {
 36772  			break
 36773  		}
 36774  		x6 := s5.Args[0]
 36775  		if x6.Op != OpPPC64MOVBZload {
 36776  			break
 36777  		}
 36778  		i6 := x6.AuxInt
 36779  		if x6.Aux != s {
 36780  			break
 36781  		}
 36782  		_ = x6.Args[1]
 36783  		if p != x6.Args[0] {
 36784  			break
 36785  		}
 36786  		if mem != x6.Args[1] {
 36787  			break
 36788  		}
 36789  		s6 := v.Args[1]
 36790  		if s6.Op != OpPPC64SLDconst {
 36791  			break
 36792  		}
 36793  		if s6.AuxInt != 56 {
 36794  			break
 36795  		}
 36796  		x7 := s6.Args[0]
 36797  		if x7.Op != OpPPC64MOVBZload {
 36798  			break
 36799  		}
 36800  		i7 := x7.AuxInt
 36801  		if x7.Aux != s {
 36802  			break
 36803  		}
 36804  		_ = x7.Args[1]
 36805  		if p != x7.Args[0] {
 36806  			break
 36807  		}
 36808  		if mem != x7.Args[1] {
 36809  			break
 36810  		}
 36811  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36812  			break
 36813  		}
 36814  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36815  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36816  		v.reset(OpCopy)
 36817  		v.AddArg(v0)
 36818  		v0.AuxInt = i0
 36819  		v0.Aux = s
 36820  		v0.AddArg(p)
 36821  		v0.AddArg(mem)
 36822  		return true
 36823  	}
 36824  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36825  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36826  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36827  	for {
 36828  		t := v.Type
 36829  		_ = v.Args[1]
 36830  		o5 := v.Args[0]
 36831  		if o5.Op != OpPPC64OR {
 36832  			break
 36833  		}
 36834  		if o5.Type != t {
 36835  			break
 36836  		}
 36837  		_ = o5.Args[1]
 36838  		o4 := o5.Args[0]
 36839  		if o4.Op != OpPPC64OR {
 36840  			break
 36841  		}
 36842  		if o4.Type != t {
 36843  			break
 36844  		}
 36845  		_ = o4.Args[1]
 36846  		o3 := o4.Args[0]
 36847  		if o3.Op != OpPPC64OR {
 36848  			break
 36849  		}
 36850  		if o3.Type != t {
 36851  			break
 36852  		}
 36853  		_ = o3.Args[1]
 36854  		s3 := o3.Args[0]
 36855  		if s3.Op != OpPPC64SLDconst {
 36856  			break
 36857  		}
 36858  		if s3.AuxInt != 32 {
 36859  			break
 36860  		}
 36861  		x4 := s3.Args[0]
 36862  		if x4.Op != OpPPC64MOVBZload {
 36863  			break
 36864  		}
 36865  		i4 := x4.AuxInt
 36866  		s := x4.Aux
 36867  		_ = x4.Args[1]
 36868  		p := x4.Args[0]
 36869  		mem := x4.Args[1]
 36870  		o2 := o3.Args[1]
 36871  		if o2.Op != OpPPC64OR {
 36872  			break
 36873  		}
 36874  		if o2.Type != t {
 36875  			break
 36876  		}
 36877  		_ = o2.Args[1]
 36878  		o1 := o2.Args[0]
 36879  		if o1.Op != OpPPC64OR {
 36880  			break
 36881  		}
 36882  		if o1.Type != t {
 36883  			break
 36884  		}
 36885  		_ = o1.Args[1]
 36886  		s1 := o1.Args[0]
 36887  		if s1.Op != OpPPC64SLDconst {
 36888  			break
 36889  		}
 36890  		if s1.AuxInt != 16 {
 36891  			break
 36892  		}
 36893  		x2 := s1.Args[0]
 36894  		if x2.Op != OpPPC64MOVBZload {
 36895  			break
 36896  		}
 36897  		i2 := x2.AuxInt
 36898  		if x2.Aux != s {
 36899  			break
 36900  		}
 36901  		_ = x2.Args[1]
 36902  		if p != x2.Args[0] {
 36903  			break
 36904  		}
 36905  		if mem != x2.Args[1] {
 36906  			break
 36907  		}
 36908  		o0 := o1.Args[1]
 36909  		if o0.Op != OpPPC64OR {
 36910  			break
 36911  		}
 36912  		if o0.Type != t {
 36913  			break
 36914  		}
 36915  		_ = o0.Args[1]
 36916  		x0 := o0.Args[0]
 36917  		if x0.Op != OpPPC64MOVBZload {
 36918  			break
 36919  		}
 36920  		i0 := x0.AuxInt
 36921  		if x0.Aux != s {
 36922  			break
 36923  		}
 36924  		_ = x0.Args[1]
 36925  		if p != x0.Args[0] {
 36926  			break
 36927  		}
 36928  		if mem != x0.Args[1] {
 36929  			break
 36930  		}
 36931  		s0 := o0.Args[1]
 36932  		if s0.Op != OpPPC64SLDconst {
 36933  			break
 36934  		}
 36935  		if s0.AuxInt != 8 {
 36936  			break
 36937  		}
 36938  		x1 := s0.Args[0]
 36939  		if x1.Op != OpPPC64MOVBZload {
 36940  			break
 36941  		}
 36942  		i1 := x1.AuxInt
 36943  		if x1.Aux != s {
 36944  			break
 36945  		}
 36946  		_ = x1.Args[1]
 36947  		if p != x1.Args[0] {
 36948  			break
 36949  		}
 36950  		if mem != x1.Args[1] {
 36951  			break
 36952  		}
 36953  		s2 := o2.Args[1]
 36954  		if s2.Op != OpPPC64SLDconst {
 36955  			break
 36956  		}
 36957  		if s2.AuxInt != 24 {
 36958  			break
 36959  		}
 36960  		x3 := s2.Args[0]
 36961  		if x3.Op != OpPPC64MOVBZload {
 36962  			break
 36963  		}
 36964  		i3 := x3.AuxInt
 36965  		if x3.Aux != s {
 36966  			break
 36967  		}
 36968  		_ = x3.Args[1]
 36969  		if p != x3.Args[0] {
 36970  			break
 36971  		}
 36972  		if mem != x3.Args[1] {
 36973  			break
 36974  		}
 36975  		s4 := o4.Args[1]
 36976  		if s4.Op != OpPPC64SLDconst {
 36977  			break
 36978  		}
 36979  		if s4.AuxInt != 40 {
 36980  			break
 36981  		}
 36982  		x5 := s4.Args[0]
 36983  		if x5.Op != OpPPC64MOVBZload {
 36984  			break
 36985  		}
 36986  		i5 := x5.AuxInt
 36987  		if x5.Aux != s {
 36988  			break
 36989  		}
 36990  		_ = x5.Args[1]
 36991  		if p != x5.Args[0] {
 36992  			break
 36993  		}
 36994  		if mem != x5.Args[1] {
 36995  			break
 36996  		}
 36997  		s5 := o5.Args[1]
 36998  		if s5.Op != OpPPC64SLDconst {
 36999  			break
 37000  		}
 37001  		if s5.AuxInt != 48 {
 37002  			break
 37003  		}
 37004  		x6 := s5.Args[0]
 37005  		if x6.Op != OpPPC64MOVBZload {
 37006  			break
 37007  		}
 37008  		i6 := x6.AuxInt
 37009  		if x6.Aux != s {
 37010  			break
 37011  		}
 37012  		_ = x6.Args[1]
 37013  		if p != x6.Args[0] {
 37014  			break
 37015  		}
 37016  		if mem != x6.Args[1] {
 37017  			break
 37018  		}
 37019  		s6 := v.Args[1]
 37020  		if s6.Op != OpPPC64SLDconst {
 37021  			break
 37022  		}
 37023  		if s6.AuxInt != 56 {
 37024  			break
 37025  		}
 37026  		x7 := s6.Args[0]
 37027  		if x7.Op != OpPPC64MOVBZload {
 37028  			break
 37029  		}
 37030  		i7 := x7.AuxInt
 37031  		if x7.Aux != s {
 37032  			break
 37033  		}
 37034  		_ = x7.Args[1]
 37035  		if p != x7.Args[0] {
 37036  			break
 37037  		}
 37038  		if mem != x7.Args[1] {
 37039  			break
 37040  		}
 37041  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37042  			break
 37043  		}
 37044  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37045  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37046  		v.reset(OpCopy)
 37047  		v.AddArg(v0)
 37048  		v0.AuxInt = i0
 37049  		v0.Aux = s
 37050  		v0.AddArg(p)
 37051  		v0.AddArg(mem)
 37052  		return true
 37053  	}
 37054  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37055  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37056  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37057  	for {
 37058  		t := v.Type
 37059  		_ = v.Args[1]
 37060  		o5 := v.Args[0]
 37061  		if o5.Op != OpPPC64OR {
 37062  			break
 37063  		}
 37064  		if o5.Type != t {
 37065  			break
 37066  		}
 37067  		_ = o5.Args[1]
 37068  		o4 := o5.Args[0]
 37069  		if o4.Op != OpPPC64OR {
 37070  			break
 37071  		}
 37072  		if o4.Type != t {
 37073  			break
 37074  		}
 37075  		_ = o4.Args[1]
 37076  		o3 := o4.Args[0]
 37077  		if o3.Op != OpPPC64OR {
 37078  			break
 37079  		}
 37080  		if o3.Type != t {
 37081  			break
 37082  		}
 37083  		_ = o3.Args[1]
 37084  		s3 := o3.Args[0]
 37085  		if s3.Op != OpPPC64SLDconst {
 37086  			break
 37087  		}
 37088  		if s3.AuxInt != 32 {
 37089  			break
 37090  		}
 37091  		x4 := s3.Args[0]
 37092  		if x4.Op != OpPPC64MOVBZload {
 37093  			break
 37094  		}
 37095  		i4 := x4.AuxInt
 37096  		s := x4.Aux
 37097  		_ = x4.Args[1]
 37098  		p := x4.Args[0]
 37099  		mem := x4.Args[1]
 37100  		o2 := o3.Args[1]
 37101  		if o2.Op != OpPPC64OR {
 37102  			break
 37103  		}
 37104  		if o2.Type != t {
 37105  			break
 37106  		}
 37107  		_ = o2.Args[1]
 37108  		o1 := o2.Args[0]
 37109  		if o1.Op != OpPPC64OR {
 37110  			break
 37111  		}
 37112  		if o1.Type != t {
 37113  			break
 37114  		}
 37115  		_ = o1.Args[1]
 37116  		o0 := o1.Args[0]
 37117  		if o0.Op != OpPPC64OR {
 37118  			break
 37119  		}
 37120  		if o0.Type != t {
 37121  			break
 37122  		}
 37123  		_ = o0.Args[1]
 37124  		s0 := o0.Args[0]
 37125  		if s0.Op != OpPPC64SLDconst {
 37126  			break
 37127  		}
 37128  		if s0.AuxInt != 8 {
 37129  			break
 37130  		}
 37131  		x1 := s0.Args[0]
 37132  		if x1.Op != OpPPC64MOVBZload {
 37133  			break
 37134  		}
 37135  		i1 := x1.AuxInt
 37136  		if x1.Aux != s {
 37137  			break
 37138  		}
 37139  		_ = x1.Args[1]
 37140  		if p != x1.Args[0] {
 37141  			break
 37142  		}
 37143  		if mem != x1.Args[1] {
 37144  			break
 37145  		}
 37146  		x0 := o0.Args[1]
 37147  		if x0.Op != OpPPC64MOVBZload {
 37148  			break
 37149  		}
 37150  		i0 := x0.AuxInt
 37151  		if x0.Aux != s {
 37152  			break
 37153  		}
 37154  		_ = x0.Args[1]
 37155  		if p != x0.Args[0] {
 37156  			break
 37157  		}
 37158  		if mem != x0.Args[1] {
 37159  			break
 37160  		}
 37161  		s1 := o1.Args[1]
 37162  		if s1.Op != OpPPC64SLDconst {
 37163  			break
 37164  		}
 37165  		if s1.AuxInt != 16 {
 37166  			break
 37167  		}
 37168  		x2 := s1.Args[0]
 37169  		if x2.Op != OpPPC64MOVBZload {
 37170  			break
 37171  		}
 37172  		i2 := x2.AuxInt
 37173  		if x2.Aux != s {
 37174  			break
 37175  		}
 37176  		_ = x2.Args[1]
 37177  		if p != x2.Args[0] {
 37178  			break
 37179  		}
 37180  		if mem != x2.Args[1] {
 37181  			break
 37182  		}
 37183  		s2 := o2.Args[1]
 37184  		if s2.Op != OpPPC64SLDconst {
 37185  			break
 37186  		}
 37187  		if s2.AuxInt != 24 {
 37188  			break
 37189  		}
 37190  		x3 := s2.Args[0]
 37191  		if x3.Op != OpPPC64MOVBZload {
 37192  			break
 37193  		}
 37194  		i3 := x3.AuxInt
 37195  		if x3.Aux != s {
 37196  			break
 37197  		}
 37198  		_ = x3.Args[1]
 37199  		if p != x3.Args[0] {
 37200  			break
 37201  		}
 37202  		if mem != x3.Args[1] {
 37203  			break
 37204  		}
 37205  		s4 := o4.Args[1]
 37206  		if s4.Op != OpPPC64SLDconst {
 37207  			break
 37208  		}
 37209  		if s4.AuxInt != 40 {
 37210  			break
 37211  		}
 37212  		x5 := s4.Args[0]
 37213  		if x5.Op != OpPPC64MOVBZload {
 37214  			break
 37215  		}
 37216  		i5 := x5.AuxInt
 37217  		if x5.Aux != s {
 37218  			break
 37219  		}
 37220  		_ = x5.Args[1]
 37221  		if p != x5.Args[0] {
 37222  			break
 37223  		}
 37224  		if mem != x5.Args[1] {
 37225  			break
 37226  		}
 37227  		s5 := o5.Args[1]
 37228  		if s5.Op != OpPPC64SLDconst {
 37229  			break
 37230  		}
 37231  		if s5.AuxInt != 48 {
 37232  			break
 37233  		}
 37234  		x6 := s5.Args[0]
 37235  		if x6.Op != OpPPC64MOVBZload {
 37236  			break
 37237  		}
 37238  		i6 := x6.AuxInt
 37239  		if x6.Aux != s {
 37240  			break
 37241  		}
 37242  		_ = x6.Args[1]
 37243  		if p != x6.Args[0] {
 37244  			break
 37245  		}
 37246  		if mem != x6.Args[1] {
 37247  			break
 37248  		}
 37249  		s6 := v.Args[1]
 37250  		if s6.Op != OpPPC64SLDconst {
 37251  			break
 37252  		}
 37253  		if s6.AuxInt != 56 {
 37254  			break
 37255  		}
 37256  		x7 := s6.Args[0]
 37257  		if x7.Op != OpPPC64MOVBZload {
 37258  			break
 37259  		}
 37260  		i7 := x7.AuxInt
 37261  		if x7.Aux != s {
 37262  			break
 37263  		}
 37264  		_ = x7.Args[1]
 37265  		if p != x7.Args[0] {
 37266  			break
 37267  		}
 37268  		if mem != x7.Args[1] {
 37269  			break
 37270  		}
 37271  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37272  			break
 37273  		}
 37274  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37275  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37276  		v.reset(OpCopy)
 37277  		v.AddArg(v0)
 37278  		v0.AuxInt = i0
 37279  		v0.Aux = s
 37280  		v0.AddArg(p)
 37281  		v0.AddArg(mem)
 37282  		return true
 37283  	}
 37284  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37285  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37286  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37287  	for {
 37288  		t := v.Type
 37289  		_ = v.Args[1]
 37290  		o5 := v.Args[0]
 37291  		if o5.Op != OpPPC64OR {
 37292  			break
 37293  		}
 37294  		if o5.Type != t {
 37295  			break
 37296  		}
 37297  		_ = o5.Args[1]
 37298  		o4 := o5.Args[0]
 37299  		if o4.Op != OpPPC64OR {
 37300  			break
 37301  		}
 37302  		if o4.Type != t {
 37303  			break
 37304  		}
 37305  		_ = o4.Args[1]
 37306  		o3 := o4.Args[0]
 37307  		if o3.Op != OpPPC64OR {
 37308  			break
 37309  		}
 37310  		if o3.Type != t {
 37311  			break
 37312  		}
 37313  		_ = o3.Args[1]
 37314  		s3 := o3.Args[0]
 37315  		if s3.Op != OpPPC64SLDconst {
 37316  			break
 37317  		}
 37318  		if s3.AuxInt != 32 {
 37319  			break
 37320  		}
 37321  		x4 := s3.Args[0]
 37322  		if x4.Op != OpPPC64MOVBZload {
 37323  			break
 37324  		}
 37325  		i4 := x4.AuxInt
 37326  		s := x4.Aux
 37327  		_ = x4.Args[1]
 37328  		p := x4.Args[0]
 37329  		mem := x4.Args[1]
 37330  		o2 := o3.Args[1]
 37331  		if o2.Op != OpPPC64OR {
 37332  			break
 37333  		}
 37334  		if o2.Type != t {
 37335  			break
 37336  		}
 37337  		_ = o2.Args[1]
 37338  		o1 := o2.Args[0]
 37339  		if o1.Op != OpPPC64OR {
 37340  			break
 37341  		}
 37342  		if o1.Type != t {
 37343  			break
 37344  		}
 37345  		_ = o1.Args[1]
 37346  		o0 := o1.Args[0]
 37347  		if o0.Op != OpPPC64OR {
 37348  			break
 37349  		}
 37350  		if o0.Type != t {
 37351  			break
 37352  		}
 37353  		_ = o0.Args[1]
 37354  		x0 := o0.Args[0]
 37355  		if x0.Op != OpPPC64MOVBZload {
 37356  			break
 37357  		}
 37358  		i0 := x0.AuxInt
 37359  		if x0.Aux != s {
 37360  			break
 37361  		}
 37362  		_ = x0.Args[1]
 37363  		if p != x0.Args[0] {
 37364  			break
 37365  		}
 37366  		if mem != x0.Args[1] {
 37367  			break
 37368  		}
 37369  		s0 := o0.Args[1]
 37370  		if s0.Op != OpPPC64SLDconst {
 37371  			break
 37372  		}
 37373  		if s0.AuxInt != 8 {
 37374  			break
 37375  		}
 37376  		x1 := s0.Args[0]
 37377  		if x1.Op != OpPPC64MOVBZload {
 37378  			break
 37379  		}
 37380  		i1 := x1.AuxInt
 37381  		if x1.Aux != s {
 37382  			break
 37383  		}
 37384  		_ = x1.Args[1]
 37385  		if p != x1.Args[0] {
 37386  			break
 37387  		}
 37388  		if mem != x1.Args[1] {
 37389  			break
 37390  		}
 37391  		s1 := o1.Args[1]
 37392  		if s1.Op != OpPPC64SLDconst {
 37393  			break
 37394  		}
 37395  		if s1.AuxInt != 16 {
 37396  			break
 37397  		}
 37398  		x2 := s1.Args[0]
 37399  		if x2.Op != OpPPC64MOVBZload {
 37400  			break
 37401  		}
 37402  		i2 := x2.AuxInt
 37403  		if x2.Aux != s {
 37404  			break
 37405  		}
 37406  		_ = x2.Args[1]
 37407  		if p != x2.Args[0] {
 37408  			break
 37409  		}
 37410  		if mem != x2.Args[1] {
 37411  			break
 37412  		}
 37413  		s2 := o2.Args[1]
 37414  		if s2.Op != OpPPC64SLDconst {
 37415  			break
 37416  		}
 37417  		if s2.AuxInt != 24 {
 37418  			break
 37419  		}
 37420  		x3 := s2.Args[0]
 37421  		if x3.Op != OpPPC64MOVBZload {
 37422  			break
 37423  		}
 37424  		i3 := x3.AuxInt
 37425  		if x3.Aux != s {
 37426  			break
 37427  		}
 37428  		_ = x3.Args[1]
 37429  		if p != x3.Args[0] {
 37430  			break
 37431  		}
 37432  		if mem != x3.Args[1] {
 37433  			break
 37434  		}
 37435  		s4 := o4.Args[1]
 37436  		if s4.Op != OpPPC64SLDconst {
 37437  			break
 37438  		}
 37439  		if s4.AuxInt != 40 {
 37440  			break
 37441  		}
 37442  		x5 := s4.Args[0]
 37443  		if x5.Op != OpPPC64MOVBZload {
 37444  			break
 37445  		}
 37446  		i5 := x5.AuxInt
 37447  		if x5.Aux != s {
 37448  			break
 37449  		}
 37450  		_ = x5.Args[1]
 37451  		if p != x5.Args[0] {
 37452  			break
 37453  		}
 37454  		if mem != x5.Args[1] {
 37455  			break
 37456  		}
 37457  		s5 := o5.Args[1]
 37458  		if s5.Op != OpPPC64SLDconst {
 37459  			break
 37460  		}
 37461  		if s5.AuxInt != 48 {
 37462  			break
 37463  		}
 37464  		x6 := s5.Args[0]
 37465  		if x6.Op != OpPPC64MOVBZload {
 37466  			break
 37467  		}
 37468  		i6 := x6.AuxInt
 37469  		if x6.Aux != s {
 37470  			break
 37471  		}
 37472  		_ = x6.Args[1]
 37473  		if p != x6.Args[0] {
 37474  			break
 37475  		}
 37476  		if mem != x6.Args[1] {
 37477  			break
 37478  		}
 37479  		s6 := v.Args[1]
 37480  		if s6.Op != OpPPC64SLDconst {
 37481  			break
 37482  		}
 37483  		if s6.AuxInt != 56 {
 37484  			break
 37485  		}
 37486  		x7 := s6.Args[0]
 37487  		if x7.Op != OpPPC64MOVBZload {
 37488  			break
 37489  		}
 37490  		i7 := x7.AuxInt
 37491  		if x7.Aux != s {
 37492  			break
 37493  		}
 37494  		_ = x7.Args[1]
 37495  		if p != x7.Args[0] {
 37496  			break
 37497  		}
 37498  		if mem != x7.Args[1] {
 37499  			break
 37500  		}
 37501  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37502  			break
 37503  		}
 37504  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37505  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37506  		v.reset(OpCopy)
 37507  		v.AddArg(v0)
 37508  		v0.AuxInt = i0
 37509  		v0.Aux = s
 37510  		v0.AddArg(p)
 37511  		v0.AddArg(mem)
 37512  		return true
 37513  	}
 37514  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37515  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37516  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37517  	for {
 37518  		t := v.Type
 37519  		_ = v.Args[1]
 37520  		o5 := v.Args[0]
 37521  		if o5.Op != OpPPC64OR {
 37522  			break
 37523  		}
 37524  		if o5.Type != t {
 37525  			break
 37526  		}
 37527  		_ = o5.Args[1]
 37528  		o4 := o5.Args[0]
 37529  		if o4.Op != OpPPC64OR {
 37530  			break
 37531  		}
 37532  		if o4.Type != t {
 37533  			break
 37534  		}
 37535  		_ = o4.Args[1]
 37536  		o3 := o4.Args[0]
 37537  		if o3.Op != OpPPC64OR {
 37538  			break
 37539  		}
 37540  		if o3.Type != t {
 37541  			break
 37542  		}
 37543  		_ = o3.Args[1]
 37544  		o2 := o3.Args[0]
 37545  		if o2.Op != OpPPC64OR {
 37546  			break
 37547  		}
 37548  		if o2.Type != t {
 37549  			break
 37550  		}
 37551  		_ = o2.Args[1]
 37552  		s2 := o2.Args[0]
 37553  		if s2.Op != OpPPC64SLDconst {
 37554  			break
 37555  		}
 37556  		if s2.AuxInt != 24 {
 37557  			break
 37558  		}
 37559  		x3 := s2.Args[0]
 37560  		if x3.Op != OpPPC64MOVBZload {
 37561  			break
 37562  		}
 37563  		i3 := x3.AuxInt
 37564  		s := x3.Aux
 37565  		_ = x3.Args[1]
 37566  		p := x3.Args[0]
 37567  		mem := x3.Args[1]
 37568  		o1 := o2.Args[1]
 37569  		if o1.Op != OpPPC64OR {
 37570  			break
 37571  		}
 37572  		if o1.Type != t {
 37573  			break
 37574  		}
 37575  		_ = o1.Args[1]
 37576  		s1 := o1.Args[0]
 37577  		if s1.Op != OpPPC64SLDconst {
 37578  			break
 37579  		}
 37580  		if s1.AuxInt != 16 {
 37581  			break
 37582  		}
 37583  		x2 := s1.Args[0]
 37584  		if x2.Op != OpPPC64MOVBZload {
 37585  			break
 37586  		}
 37587  		i2 := x2.AuxInt
 37588  		if x2.Aux != s {
 37589  			break
 37590  		}
 37591  		_ = x2.Args[1]
 37592  		if p != x2.Args[0] {
 37593  			break
 37594  		}
 37595  		if mem != x2.Args[1] {
 37596  			break
 37597  		}
 37598  		o0 := o1.Args[1]
 37599  		if o0.Op != OpPPC64OR {
 37600  			break
 37601  		}
 37602  		if o0.Type != t {
 37603  			break
 37604  		}
 37605  		_ = o0.Args[1]
 37606  		s0 := o0.Args[0]
 37607  		if s0.Op != OpPPC64SLDconst {
 37608  			break
 37609  		}
 37610  		if s0.AuxInt != 8 {
 37611  			break
 37612  		}
 37613  		x1 := s0.Args[0]
 37614  		if x1.Op != OpPPC64MOVBZload {
 37615  			break
 37616  		}
 37617  		i1 := x1.AuxInt
 37618  		if x1.Aux != s {
 37619  			break
 37620  		}
 37621  		_ = x1.Args[1]
 37622  		if p != x1.Args[0] {
 37623  			break
 37624  		}
 37625  		if mem != x1.Args[1] {
 37626  			break
 37627  		}
 37628  		x0 := o0.Args[1]
 37629  		if x0.Op != OpPPC64MOVBZload {
 37630  			break
 37631  		}
 37632  		i0 := x0.AuxInt
 37633  		if x0.Aux != s {
 37634  			break
 37635  		}
 37636  		_ = x0.Args[1]
 37637  		if p != x0.Args[0] {
 37638  			break
 37639  		}
 37640  		if mem != x0.Args[1] {
 37641  			break
 37642  		}
 37643  		s3 := o3.Args[1]
 37644  		if s3.Op != OpPPC64SLDconst {
 37645  			break
 37646  		}
 37647  		if s3.AuxInt != 32 {
 37648  			break
 37649  		}
 37650  		x4 := s3.Args[0]
 37651  		if x4.Op != OpPPC64MOVBZload {
 37652  			break
 37653  		}
 37654  		i4 := x4.AuxInt
 37655  		if x4.Aux != s {
 37656  			break
 37657  		}
 37658  		_ = x4.Args[1]
 37659  		if p != x4.Args[0] {
 37660  			break
 37661  		}
 37662  		if mem != x4.Args[1] {
 37663  			break
 37664  		}
 37665  		s4 := o4.Args[1]
 37666  		if s4.Op != OpPPC64SLDconst {
 37667  			break
 37668  		}
 37669  		if s4.AuxInt != 40 {
 37670  			break
 37671  		}
 37672  		x5 := s4.Args[0]
 37673  		if x5.Op != OpPPC64MOVBZload {
 37674  			break
 37675  		}
 37676  		i5 := x5.AuxInt
 37677  		if x5.Aux != s {
 37678  			break
 37679  		}
 37680  		_ = x5.Args[1]
 37681  		if p != x5.Args[0] {
 37682  			break
 37683  		}
 37684  		if mem != x5.Args[1] {
 37685  			break
 37686  		}
 37687  		s5 := o5.Args[1]
 37688  		if s5.Op != OpPPC64SLDconst {
 37689  			break
 37690  		}
 37691  		if s5.AuxInt != 48 {
 37692  			break
 37693  		}
 37694  		x6 := s5.Args[0]
 37695  		if x6.Op != OpPPC64MOVBZload {
 37696  			break
 37697  		}
 37698  		i6 := x6.AuxInt
 37699  		if x6.Aux != s {
 37700  			break
 37701  		}
 37702  		_ = x6.Args[1]
 37703  		if p != x6.Args[0] {
 37704  			break
 37705  		}
 37706  		if mem != x6.Args[1] {
 37707  			break
 37708  		}
 37709  		s6 := v.Args[1]
 37710  		if s6.Op != OpPPC64SLDconst {
 37711  			break
 37712  		}
 37713  		if s6.AuxInt != 56 {
 37714  			break
 37715  		}
 37716  		x7 := s6.Args[0]
 37717  		if x7.Op != OpPPC64MOVBZload {
 37718  			break
 37719  		}
 37720  		i7 := x7.AuxInt
 37721  		if x7.Aux != s {
 37722  			break
 37723  		}
 37724  		_ = x7.Args[1]
 37725  		if p != x7.Args[0] {
 37726  			break
 37727  		}
 37728  		if mem != x7.Args[1] {
 37729  			break
 37730  		}
 37731  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37732  			break
 37733  		}
 37734  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37735  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37736  		v.reset(OpCopy)
 37737  		v.AddArg(v0)
 37738  		v0.AuxInt = i0
 37739  		v0.Aux = s
 37740  		v0.AddArg(p)
 37741  		v0.AddArg(mem)
 37742  		return true
 37743  	}
 37744  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37745  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37746  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37747  	for {
 37748  		t := v.Type
 37749  		_ = v.Args[1]
 37750  		o5 := v.Args[0]
 37751  		if o5.Op != OpPPC64OR {
 37752  			break
 37753  		}
 37754  		if o5.Type != t {
 37755  			break
 37756  		}
 37757  		_ = o5.Args[1]
 37758  		o4 := o5.Args[0]
 37759  		if o4.Op != OpPPC64OR {
 37760  			break
 37761  		}
 37762  		if o4.Type != t {
 37763  			break
 37764  		}
 37765  		_ = o4.Args[1]
 37766  		o3 := o4.Args[0]
 37767  		if o3.Op != OpPPC64OR {
 37768  			break
 37769  		}
 37770  		if o3.Type != t {
 37771  			break
 37772  		}
 37773  		_ = o3.Args[1]
 37774  		o2 := o3.Args[0]
 37775  		if o2.Op != OpPPC64OR {
 37776  			break
 37777  		}
 37778  		if o2.Type != t {
 37779  			break
 37780  		}
 37781  		_ = o2.Args[1]
 37782  		s2 := o2.Args[0]
 37783  		if s2.Op != OpPPC64SLDconst {
 37784  			break
 37785  		}
 37786  		if s2.AuxInt != 24 {
 37787  			break
 37788  		}
 37789  		x3 := s2.Args[0]
 37790  		if x3.Op != OpPPC64MOVBZload {
 37791  			break
 37792  		}
 37793  		i3 := x3.AuxInt
 37794  		s := x3.Aux
 37795  		_ = x3.Args[1]
 37796  		p := x3.Args[0]
 37797  		mem := x3.Args[1]
 37798  		o1 := o2.Args[1]
 37799  		if o1.Op != OpPPC64OR {
 37800  			break
 37801  		}
 37802  		if o1.Type != t {
 37803  			break
 37804  		}
 37805  		_ = o1.Args[1]
 37806  		s1 := o1.Args[0]
 37807  		if s1.Op != OpPPC64SLDconst {
 37808  			break
 37809  		}
 37810  		if s1.AuxInt != 16 {
 37811  			break
 37812  		}
 37813  		x2 := s1.Args[0]
 37814  		if x2.Op != OpPPC64MOVBZload {
 37815  			break
 37816  		}
 37817  		i2 := x2.AuxInt
 37818  		if x2.Aux != s {
 37819  			break
 37820  		}
 37821  		_ = x2.Args[1]
 37822  		if p != x2.Args[0] {
 37823  			break
 37824  		}
 37825  		if mem != x2.Args[1] {
 37826  			break
 37827  		}
 37828  		o0 := o1.Args[1]
 37829  		if o0.Op != OpPPC64OR {
 37830  			break
 37831  		}
 37832  		if o0.Type != t {
 37833  			break
 37834  		}
 37835  		_ = o0.Args[1]
 37836  		x0 := o0.Args[0]
 37837  		if x0.Op != OpPPC64MOVBZload {
 37838  			break
 37839  		}
 37840  		i0 := x0.AuxInt
 37841  		if x0.Aux != s {
 37842  			break
 37843  		}
 37844  		_ = x0.Args[1]
 37845  		if p != x0.Args[0] {
 37846  			break
 37847  		}
 37848  		if mem != x0.Args[1] {
 37849  			break
 37850  		}
 37851  		s0 := o0.Args[1]
 37852  		if s0.Op != OpPPC64SLDconst {
 37853  			break
 37854  		}
 37855  		if s0.AuxInt != 8 {
 37856  			break
 37857  		}
 37858  		x1 := s0.Args[0]
 37859  		if x1.Op != OpPPC64MOVBZload {
 37860  			break
 37861  		}
 37862  		i1 := x1.AuxInt
 37863  		if x1.Aux != s {
 37864  			break
 37865  		}
 37866  		_ = x1.Args[1]
 37867  		if p != x1.Args[0] {
 37868  			break
 37869  		}
 37870  		if mem != x1.Args[1] {
 37871  			break
 37872  		}
 37873  		s3 := o3.Args[1]
 37874  		if s3.Op != OpPPC64SLDconst {
 37875  			break
 37876  		}
 37877  		if s3.AuxInt != 32 {
 37878  			break
 37879  		}
 37880  		x4 := s3.Args[0]
 37881  		if x4.Op != OpPPC64MOVBZload {
 37882  			break
 37883  		}
 37884  		i4 := x4.AuxInt
 37885  		if x4.Aux != s {
 37886  			break
 37887  		}
 37888  		_ = x4.Args[1]
 37889  		if p != x4.Args[0] {
 37890  			break
 37891  		}
 37892  		if mem != x4.Args[1] {
 37893  			break
 37894  		}
 37895  		s4 := o4.Args[1]
 37896  		if s4.Op != OpPPC64SLDconst {
 37897  			break
 37898  		}
 37899  		if s4.AuxInt != 40 {
 37900  			break
 37901  		}
 37902  		x5 := s4.Args[0]
 37903  		if x5.Op != OpPPC64MOVBZload {
 37904  			break
 37905  		}
 37906  		i5 := x5.AuxInt
 37907  		if x5.Aux != s {
 37908  			break
 37909  		}
 37910  		_ = x5.Args[1]
 37911  		if p != x5.Args[0] {
 37912  			break
 37913  		}
 37914  		if mem != x5.Args[1] {
 37915  			break
 37916  		}
 37917  		s5 := o5.Args[1]
 37918  		if s5.Op != OpPPC64SLDconst {
 37919  			break
 37920  		}
 37921  		if s5.AuxInt != 48 {
 37922  			break
 37923  		}
 37924  		x6 := s5.Args[0]
 37925  		if x6.Op != OpPPC64MOVBZload {
 37926  			break
 37927  		}
 37928  		i6 := x6.AuxInt
 37929  		if x6.Aux != s {
 37930  			break
 37931  		}
 37932  		_ = x6.Args[1]
 37933  		if p != x6.Args[0] {
 37934  			break
 37935  		}
 37936  		if mem != x6.Args[1] {
 37937  			break
 37938  		}
 37939  		s6 := v.Args[1]
 37940  		if s6.Op != OpPPC64SLDconst {
 37941  			break
 37942  		}
 37943  		if s6.AuxInt != 56 {
 37944  			break
 37945  		}
 37946  		x7 := s6.Args[0]
 37947  		if x7.Op != OpPPC64MOVBZload {
 37948  			break
 37949  		}
 37950  		i7 := x7.AuxInt
 37951  		if x7.Aux != s {
 37952  			break
 37953  		}
 37954  		_ = x7.Args[1]
 37955  		if p != x7.Args[0] {
 37956  			break
 37957  		}
 37958  		if mem != x7.Args[1] {
 37959  			break
 37960  		}
 37961  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37962  			break
 37963  		}
 37964  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37965  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37966  		v.reset(OpCopy)
 37967  		v.AddArg(v0)
 37968  		v0.AuxInt = i0
 37969  		v0.Aux = s
 37970  		v0.AddArg(p)
 37971  		v0.AddArg(mem)
 37972  		return true
 37973  	}
 37974  	return false
 37975  }
 37976  func rewriteValuePPC64_OpPPC64OR_140(v *Value) bool {
 37977  	b := v.Block
 37978  	_ = b
 37979  	config := b.Func.Config
 37980  	_ = config
 37981  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37982  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37983  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37984  	for {
 37985  		t := v.Type
 37986  		_ = v.Args[1]
 37987  		o5 := v.Args[0]
 37988  		if o5.Op != OpPPC64OR {
 37989  			break
 37990  		}
 37991  		if o5.Type != t {
 37992  			break
 37993  		}
 37994  		_ = o5.Args[1]
 37995  		o4 := o5.Args[0]
 37996  		if o4.Op != OpPPC64OR {
 37997  			break
 37998  		}
 37999  		if o4.Type != t {
 38000  			break
 38001  		}
 38002  		_ = o4.Args[1]
 38003  		o3 := o4.Args[0]
 38004  		if o3.Op != OpPPC64OR {
 38005  			break
 38006  		}
 38007  		if o3.Type != t {
 38008  			break
 38009  		}
 38010  		_ = o3.Args[1]
 38011  		o2 := o3.Args[0]
 38012  		if o2.Op != OpPPC64OR {
 38013  			break
 38014  		}
 38015  		if o2.Type != t {
 38016  			break
 38017  		}
 38018  		_ = o2.Args[1]
 38019  		s2 := o2.Args[0]
 38020  		if s2.Op != OpPPC64SLDconst {
 38021  			break
 38022  		}
 38023  		if s2.AuxInt != 24 {
 38024  			break
 38025  		}
 38026  		x3 := s2.Args[0]
 38027  		if x3.Op != OpPPC64MOVBZload {
 38028  			break
 38029  		}
 38030  		i3 := x3.AuxInt
 38031  		s := x3.Aux
 38032  		_ = x3.Args[1]
 38033  		p := x3.Args[0]
 38034  		mem := x3.Args[1]
 38035  		o1 := o2.Args[1]
 38036  		if o1.Op != OpPPC64OR {
 38037  			break
 38038  		}
 38039  		if o1.Type != t {
 38040  			break
 38041  		}
 38042  		_ = o1.Args[1]
 38043  		o0 := o1.Args[0]
 38044  		if o0.Op != OpPPC64OR {
 38045  			break
 38046  		}
 38047  		if o0.Type != t {
 38048  			break
 38049  		}
 38050  		_ = o0.Args[1]
 38051  		s0 := o0.Args[0]
 38052  		if s0.Op != OpPPC64SLDconst {
 38053  			break
 38054  		}
 38055  		if s0.AuxInt != 8 {
 38056  			break
 38057  		}
 38058  		x1 := s0.Args[0]
 38059  		if x1.Op != OpPPC64MOVBZload {
 38060  			break
 38061  		}
 38062  		i1 := x1.AuxInt
 38063  		if x1.Aux != s {
 38064  			break
 38065  		}
 38066  		_ = x1.Args[1]
 38067  		if p != x1.Args[0] {
 38068  			break
 38069  		}
 38070  		if mem != x1.Args[1] {
 38071  			break
 38072  		}
 38073  		x0 := o0.Args[1]
 38074  		if x0.Op != OpPPC64MOVBZload {
 38075  			break
 38076  		}
 38077  		i0 := x0.AuxInt
 38078  		if x0.Aux != s {
 38079  			break
 38080  		}
 38081  		_ = x0.Args[1]
 38082  		if p != x0.Args[0] {
 38083  			break
 38084  		}
 38085  		if mem != x0.Args[1] {
 38086  			break
 38087  		}
 38088  		s1 := o1.Args[1]
 38089  		if s1.Op != OpPPC64SLDconst {
 38090  			break
 38091  		}
 38092  		if s1.AuxInt != 16 {
 38093  			break
 38094  		}
 38095  		x2 := s1.Args[0]
 38096  		if x2.Op != OpPPC64MOVBZload {
 38097  			break
 38098  		}
 38099  		i2 := x2.AuxInt
 38100  		if x2.Aux != s {
 38101  			break
 38102  		}
 38103  		_ = x2.Args[1]
 38104  		if p != x2.Args[0] {
 38105  			break
 38106  		}
 38107  		if mem != x2.Args[1] {
 38108  			break
 38109  		}
 38110  		s3 := o3.Args[1]
 38111  		if s3.Op != OpPPC64SLDconst {
 38112  			break
 38113  		}
 38114  		if s3.AuxInt != 32 {
 38115  			break
 38116  		}
 38117  		x4 := s3.Args[0]
 38118  		if x4.Op != OpPPC64MOVBZload {
 38119  			break
 38120  		}
 38121  		i4 := x4.AuxInt
 38122  		if x4.Aux != s {
 38123  			break
 38124  		}
 38125  		_ = x4.Args[1]
 38126  		if p != x4.Args[0] {
 38127  			break
 38128  		}
 38129  		if mem != x4.Args[1] {
 38130  			break
 38131  		}
 38132  		s4 := o4.Args[1]
 38133  		if s4.Op != OpPPC64SLDconst {
 38134  			break
 38135  		}
 38136  		if s4.AuxInt != 40 {
 38137  			break
 38138  		}
 38139  		x5 := s4.Args[0]
 38140  		if x5.Op != OpPPC64MOVBZload {
 38141  			break
 38142  		}
 38143  		i5 := x5.AuxInt
 38144  		if x5.Aux != s {
 38145  			break
 38146  		}
 38147  		_ = x5.Args[1]
 38148  		if p != x5.Args[0] {
 38149  			break
 38150  		}
 38151  		if mem != x5.Args[1] {
 38152  			break
 38153  		}
 38154  		s5 := o5.Args[1]
 38155  		if s5.Op != OpPPC64SLDconst {
 38156  			break
 38157  		}
 38158  		if s5.AuxInt != 48 {
 38159  			break
 38160  		}
 38161  		x6 := s5.Args[0]
 38162  		if x6.Op != OpPPC64MOVBZload {
 38163  			break
 38164  		}
 38165  		i6 := x6.AuxInt
 38166  		if x6.Aux != s {
 38167  			break
 38168  		}
 38169  		_ = x6.Args[1]
 38170  		if p != x6.Args[0] {
 38171  			break
 38172  		}
 38173  		if mem != x6.Args[1] {
 38174  			break
 38175  		}
 38176  		s6 := v.Args[1]
 38177  		if s6.Op != OpPPC64SLDconst {
 38178  			break
 38179  		}
 38180  		if s6.AuxInt != 56 {
 38181  			break
 38182  		}
 38183  		x7 := s6.Args[0]
 38184  		if x7.Op != OpPPC64MOVBZload {
 38185  			break
 38186  		}
 38187  		i7 := x7.AuxInt
 38188  		if x7.Aux != s {
 38189  			break
 38190  		}
 38191  		_ = x7.Args[1]
 38192  		if p != x7.Args[0] {
 38193  			break
 38194  		}
 38195  		if mem != x7.Args[1] {
 38196  			break
 38197  		}
 38198  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38199  			break
 38200  		}
 38201  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38202  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38203  		v.reset(OpCopy)
 38204  		v.AddArg(v0)
 38205  		v0.AuxInt = i0
 38206  		v0.Aux = s
 38207  		v0.AddArg(p)
 38208  		v0.AddArg(mem)
 38209  		return true
 38210  	}
 38211  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38212  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38213  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38214  	for {
 38215  		t := v.Type
 38216  		_ = v.Args[1]
 38217  		o5 := v.Args[0]
 38218  		if o5.Op != OpPPC64OR {
 38219  			break
 38220  		}
 38221  		if o5.Type != t {
 38222  			break
 38223  		}
 38224  		_ = o5.Args[1]
 38225  		o4 := o5.Args[0]
 38226  		if o4.Op != OpPPC64OR {
 38227  			break
 38228  		}
 38229  		if o4.Type != t {
 38230  			break
 38231  		}
 38232  		_ = o4.Args[1]
 38233  		o3 := o4.Args[0]
 38234  		if o3.Op != OpPPC64OR {
 38235  			break
 38236  		}
 38237  		if o3.Type != t {
 38238  			break
 38239  		}
 38240  		_ = o3.Args[1]
 38241  		o2 := o3.Args[0]
 38242  		if o2.Op != OpPPC64OR {
 38243  			break
 38244  		}
 38245  		if o2.Type != t {
 38246  			break
 38247  		}
 38248  		_ = o2.Args[1]
 38249  		s2 := o2.Args[0]
 38250  		if s2.Op != OpPPC64SLDconst {
 38251  			break
 38252  		}
 38253  		if s2.AuxInt != 24 {
 38254  			break
 38255  		}
 38256  		x3 := s2.Args[0]
 38257  		if x3.Op != OpPPC64MOVBZload {
 38258  			break
 38259  		}
 38260  		i3 := x3.AuxInt
 38261  		s := x3.Aux
 38262  		_ = x3.Args[1]
 38263  		p := x3.Args[0]
 38264  		mem := x3.Args[1]
 38265  		o1 := o2.Args[1]
 38266  		if o1.Op != OpPPC64OR {
 38267  			break
 38268  		}
 38269  		if o1.Type != t {
 38270  			break
 38271  		}
 38272  		_ = o1.Args[1]
 38273  		o0 := o1.Args[0]
 38274  		if o0.Op != OpPPC64OR {
 38275  			break
 38276  		}
 38277  		if o0.Type != t {
 38278  			break
 38279  		}
 38280  		_ = o0.Args[1]
 38281  		x0 := o0.Args[0]
 38282  		if x0.Op != OpPPC64MOVBZload {
 38283  			break
 38284  		}
 38285  		i0 := x0.AuxInt
 38286  		if x0.Aux != s {
 38287  			break
 38288  		}
 38289  		_ = x0.Args[1]
 38290  		if p != x0.Args[0] {
 38291  			break
 38292  		}
 38293  		if mem != x0.Args[1] {
 38294  			break
 38295  		}
 38296  		s0 := o0.Args[1]
 38297  		if s0.Op != OpPPC64SLDconst {
 38298  			break
 38299  		}
 38300  		if s0.AuxInt != 8 {
 38301  			break
 38302  		}
 38303  		x1 := s0.Args[0]
 38304  		if x1.Op != OpPPC64MOVBZload {
 38305  			break
 38306  		}
 38307  		i1 := x1.AuxInt
 38308  		if x1.Aux != s {
 38309  			break
 38310  		}
 38311  		_ = x1.Args[1]
 38312  		if p != x1.Args[0] {
 38313  			break
 38314  		}
 38315  		if mem != x1.Args[1] {
 38316  			break
 38317  		}
 38318  		s1 := o1.Args[1]
 38319  		if s1.Op != OpPPC64SLDconst {
 38320  			break
 38321  		}
 38322  		if s1.AuxInt != 16 {
 38323  			break
 38324  		}
 38325  		x2 := s1.Args[0]
 38326  		if x2.Op != OpPPC64MOVBZload {
 38327  			break
 38328  		}
 38329  		i2 := x2.AuxInt
 38330  		if x2.Aux != s {
 38331  			break
 38332  		}
 38333  		_ = x2.Args[1]
 38334  		if p != x2.Args[0] {
 38335  			break
 38336  		}
 38337  		if mem != x2.Args[1] {
 38338  			break
 38339  		}
 38340  		s3 := o3.Args[1]
 38341  		if s3.Op != OpPPC64SLDconst {
 38342  			break
 38343  		}
 38344  		if s3.AuxInt != 32 {
 38345  			break
 38346  		}
 38347  		x4 := s3.Args[0]
 38348  		if x4.Op != OpPPC64MOVBZload {
 38349  			break
 38350  		}
 38351  		i4 := x4.AuxInt
 38352  		if x4.Aux != s {
 38353  			break
 38354  		}
 38355  		_ = x4.Args[1]
 38356  		if p != x4.Args[0] {
 38357  			break
 38358  		}
 38359  		if mem != x4.Args[1] {
 38360  			break
 38361  		}
 38362  		s4 := o4.Args[1]
 38363  		if s4.Op != OpPPC64SLDconst {
 38364  			break
 38365  		}
 38366  		if s4.AuxInt != 40 {
 38367  			break
 38368  		}
 38369  		x5 := s4.Args[0]
 38370  		if x5.Op != OpPPC64MOVBZload {
 38371  			break
 38372  		}
 38373  		i5 := x5.AuxInt
 38374  		if x5.Aux != s {
 38375  			break
 38376  		}
 38377  		_ = x5.Args[1]
 38378  		if p != x5.Args[0] {
 38379  			break
 38380  		}
 38381  		if mem != x5.Args[1] {
 38382  			break
 38383  		}
 38384  		s5 := o5.Args[1]
 38385  		if s5.Op != OpPPC64SLDconst {
 38386  			break
 38387  		}
 38388  		if s5.AuxInt != 48 {
 38389  			break
 38390  		}
 38391  		x6 := s5.Args[0]
 38392  		if x6.Op != OpPPC64MOVBZload {
 38393  			break
 38394  		}
 38395  		i6 := x6.AuxInt
 38396  		if x6.Aux != s {
 38397  			break
 38398  		}
 38399  		_ = x6.Args[1]
 38400  		if p != x6.Args[0] {
 38401  			break
 38402  		}
 38403  		if mem != x6.Args[1] {
 38404  			break
 38405  		}
 38406  		s6 := v.Args[1]
 38407  		if s6.Op != OpPPC64SLDconst {
 38408  			break
 38409  		}
 38410  		if s6.AuxInt != 56 {
 38411  			break
 38412  		}
 38413  		x7 := s6.Args[0]
 38414  		if x7.Op != OpPPC64MOVBZload {
 38415  			break
 38416  		}
 38417  		i7 := x7.AuxInt
 38418  		if x7.Aux != s {
 38419  			break
 38420  		}
 38421  		_ = x7.Args[1]
 38422  		if p != x7.Args[0] {
 38423  			break
 38424  		}
 38425  		if mem != x7.Args[1] {
 38426  			break
 38427  		}
 38428  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38429  			break
 38430  		}
 38431  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38432  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38433  		v.reset(OpCopy)
 38434  		v.AddArg(v0)
 38435  		v0.AuxInt = i0
 38436  		v0.Aux = s
 38437  		v0.AddArg(p)
 38438  		v0.AddArg(mem)
 38439  		return true
 38440  	}
 38441  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38442  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38443  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38444  	for {
 38445  		t := v.Type
 38446  		_ = v.Args[1]
 38447  		o5 := v.Args[0]
 38448  		if o5.Op != OpPPC64OR {
 38449  			break
 38450  		}
 38451  		if o5.Type != t {
 38452  			break
 38453  		}
 38454  		_ = o5.Args[1]
 38455  		o4 := o5.Args[0]
 38456  		if o4.Op != OpPPC64OR {
 38457  			break
 38458  		}
 38459  		if o4.Type != t {
 38460  			break
 38461  		}
 38462  		_ = o4.Args[1]
 38463  		o3 := o4.Args[0]
 38464  		if o3.Op != OpPPC64OR {
 38465  			break
 38466  		}
 38467  		if o3.Type != t {
 38468  			break
 38469  		}
 38470  		_ = o3.Args[1]
 38471  		o2 := o3.Args[0]
 38472  		if o2.Op != OpPPC64OR {
 38473  			break
 38474  		}
 38475  		if o2.Type != t {
 38476  			break
 38477  		}
 38478  		_ = o2.Args[1]
 38479  		o1 := o2.Args[0]
 38480  		if o1.Op != OpPPC64OR {
 38481  			break
 38482  		}
 38483  		if o1.Type != t {
 38484  			break
 38485  		}
 38486  		_ = o1.Args[1]
 38487  		s1 := o1.Args[0]
 38488  		if s1.Op != OpPPC64SLDconst {
 38489  			break
 38490  		}
 38491  		if s1.AuxInt != 16 {
 38492  			break
 38493  		}
 38494  		x2 := s1.Args[0]
 38495  		if x2.Op != OpPPC64MOVBZload {
 38496  			break
 38497  		}
 38498  		i2 := x2.AuxInt
 38499  		s := x2.Aux
 38500  		_ = x2.Args[1]
 38501  		p := x2.Args[0]
 38502  		mem := x2.Args[1]
 38503  		o0 := o1.Args[1]
 38504  		if o0.Op != OpPPC64OR {
 38505  			break
 38506  		}
 38507  		if o0.Type != t {
 38508  			break
 38509  		}
 38510  		_ = o0.Args[1]
 38511  		s0 := o0.Args[0]
 38512  		if s0.Op != OpPPC64SLDconst {
 38513  			break
 38514  		}
 38515  		if s0.AuxInt != 8 {
 38516  			break
 38517  		}
 38518  		x1 := s0.Args[0]
 38519  		if x1.Op != OpPPC64MOVBZload {
 38520  			break
 38521  		}
 38522  		i1 := x1.AuxInt
 38523  		if x1.Aux != s {
 38524  			break
 38525  		}
 38526  		_ = x1.Args[1]
 38527  		if p != x1.Args[0] {
 38528  			break
 38529  		}
 38530  		if mem != x1.Args[1] {
 38531  			break
 38532  		}
 38533  		x0 := o0.Args[1]
 38534  		if x0.Op != OpPPC64MOVBZload {
 38535  			break
 38536  		}
 38537  		i0 := x0.AuxInt
 38538  		if x0.Aux != s {
 38539  			break
 38540  		}
 38541  		_ = x0.Args[1]
 38542  		if p != x0.Args[0] {
 38543  			break
 38544  		}
 38545  		if mem != x0.Args[1] {
 38546  			break
 38547  		}
 38548  		s2 := o2.Args[1]
 38549  		if s2.Op != OpPPC64SLDconst {
 38550  			break
 38551  		}
 38552  		if s2.AuxInt != 24 {
 38553  			break
 38554  		}
 38555  		x3 := s2.Args[0]
 38556  		if x3.Op != OpPPC64MOVBZload {
 38557  			break
 38558  		}
 38559  		i3 := x3.AuxInt
 38560  		if x3.Aux != s {
 38561  			break
 38562  		}
 38563  		_ = x3.Args[1]
 38564  		if p != x3.Args[0] {
 38565  			break
 38566  		}
 38567  		if mem != x3.Args[1] {
 38568  			break
 38569  		}
 38570  		s3 := o3.Args[1]
 38571  		if s3.Op != OpPPC64SLDconst {
 38572  			break
 38573  		}
 38574  		if s3.AuxInt != 32 {
 38575  			break
 38576  		}
 38577  		x4 := s3.Args[0]
 38578  		if x4.Op != OpPPC64MOVBZload {
 38579  			break
 38580  		}
 38581  		i4 := x4.AuxInt
 38582  		if x4.Aux != s {
 38583  			break
 38584  		}
 38585  		_ = x4.Args[1]
 38586  		if p != x4.Args[0] {
 38587  			break
 38588  		}
 38589  		if mem != x4.Args[1] {
 38590  			break
 38591  		}
 38592  		s4 := o4.Args[1]
 38593  		if s4.Op != OpPPC64SLDconst {
 38594  			break
 38595  		}
 38596  		if s4.AuxInt != 40 {
 38597  			break
 38598  		}
 38599  		x5 := s4.Args[0]
 38600  		if x5.Op != OpPPC64MOVBZload {
 38601  			break
 38602  		}
 38603  		i5 := x5.AuxInt
 38604  		if x5.Aux != s {
 38605  			break
 38606  		}
 38607  		_ = x5.Args[1]
 38608  		if p != x5.Args[0] {
 38609  			break
 38610  		}
 38611  		if mem != x5.Args[1] {
 38612  			break
 38613  		}
 38614  		s5 := o5.Args[1]
 38615  		if s5.Op != OpPPC64SLDconst {
 38616  			break
 38617  		}
 38618  		if s5.AuxInt != 48 {
 38619  			break
 38620  		}
 38621  		x6 := s5.Args[0]
 38622  		if x6.Op != OpPPC64MOVBZload {
 38623  			break
 38624  		}
 38625  		i6 := x6.AuxInt
 38626  		if x6.Aux != s {
 38627  			break
 38628  		}
 38629  		_ = x6.Args[1]
 38630  		if p != x6.Args[0] {
 38631  			break
 38632  		}
 38633  		if mem != x6.Args[1] {
 38634  			break
 38635  		}
 38636  		s6 := v.Args[1]
 38637  		if s6.Op != OpPPC64SLDconst {
 38638  			break
 38639  		}
 38640  		if s6.AuxInt != 56 {
 38641  			break
 38642  		}
 38643  		x7 := s6.Args[0]
 38644  		if x7.Op != OpPPC64MOVBZload {
 38645  			break
 38646  		}
 38647  		i7 := x7.AuxInt
 38648  		if x7.Aux != s {
 38649  			break
 38650  		}
 38651  		_ = x7.Args[1]
 38652  		if p != x7.Args[0] {
 38653  			break
 38654  		}
 38655  		if mem != x7.Args[1] {
 38656  			break
 38657  		}
 38658  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38659  			break
 38660  		}
 38661  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38662  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38663  		v.reset(OpCopy)
 38664  		v.AddArg(v0)
 38665  		v0.AuxInt = i0
 38666  		v0.Aux = s
 38667  		v0.AddArg(p)
 38668  		v0.AddArg(mem)
 38669  		return true
 38670  	}
 38671  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38672  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38673  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38674  	for {
 38675  		t := v.Type
 38676  		_ = v.Args[1]
 38677  		o5 := v.Args[0]
 38678  		if o5.Op != OpPPC64OR {
 38679  			break
 38680  		}
 38681  		if o5.Type != t {
 38682  			break
 38683  		}
 38684  		_ = o5.Args[1]
 38685  		o4 := o5.Args[0]
 38686  		if o4.Op != OpPPC64OR {
 38687  			break
 38688  		}
 38689  		if o4.Type != t {
 38690  			break
 38691  		}
 38692  		_ = o4.Args[1]
 38693  		o3 := o4.Args[0]
 38694  		if o3.Op != OpPPC64OR {
 38695  			break
 38696  		}
 38697  		if o3.Type != t {
 38698  			break
 38699  		}
 38700  		_ = o3.Args[1]
 38701  		o2 := o3.Args[0]
 38702  		if o2.Op != OpPPC64OR {
 38703  			break
 38704  		}
 38705  		if o2.Type != t {
 38706  			break
 38707  		}
 38708  		_ = o2.Args[1]
 38709  		o1 := o2.Args[0]
 38710  		if o1.Op != OpPPC64OR {
 38711  			break
 38712  		}
 38713  		if o1.Type != t {
 38714  			break
 38715  		}
 38716  		_ = o1.Args[1]
 38717  		s1 := o1.Args[0]
 38718  		if s1.Op != OpPPC64SLDconst {
 38719  			break
 38720  		}
 38721  		if s1.AuxInt != 16 {
 38722  			break
 38723  		}
 38724  		x2 := s1.Args[0]
 38725  		if x2.Op != OpPPC64MOVBZload {
 38726  			break
 38727  		}
 38728  		i2 := x2.AuxInt
 38729  		s := x2.Aux
 38730  		_ = x2.Args[1]
 38731  		p := x2.Args[0]
 38732  		mem := x2.Args[1]
 38733  		o0 := o1.Args[1]
 38734  		if o0.Op != OpPPC64OR {
 38735  			break
 38736  		}
 38737  		if o0.Type != t {
 38738  			break
 38739  		}
 38740  		_ = o0.Args[1]
 38741  		x0 := o0.Args[0]
 38742  		if x0.Op != OpPPC64MOVBZload {
 38743  			break
 38744  		}
 38745  		i0 := x0.AuxInt
 38746  		if x0.Aux != s {
 38747  			break
 38748  		}
 38749  		_ = x0.Args[1]
 38750  		if p != x0.Args[0] {
 38751  			break
 38752  		}
 38753  		if mem != x0.Args[1] {
 38754  			break
 38755  		}
 38756  		s0 := o0.Args[1]
 38757  		if s0.Op != OpPPC64SLDconst {
 38758  			break
 38759  		}
 38760  		if s0.AuxInt != 8 {
 38761  			break
 38762  		}
 38763  		x1 := s0.Args[0]
 38764  		if x1.Op != OpPPC64MOVBZload {
 38765  			break
 38766  		}
 38767  		i1 := x1.AuxInt
 38768  		if x1.Aux != s {
 38769  			break
 38770  		}
 38771  		_ = x1.Args[1]
 38772  		if p != x1.Args[0] {
 38773  			break
 38774  		}
 38775  		if mem != x1.Args[1] {
 38776  			break
 38777  		}
 38778  		s2 := o2.Args[1]
 38779  		if s2.Op != OpPPC64SLDconst {
 38780  			break
 38781  		}
 38782  		if s2.AuxInt != 24 {
 38783  			break
 38784  		}
 38785  		x3 := s2.Args[0]
 38786  		if x3.Op != OpPPC64MOVBZload {
 38787  			break
 38788  		}
 38789  		i3 := x3.AuxInt
 38790  		if x3.Aux != s {
 38791  			break
 38792  		}
 38793  		_ = x3.Args[1]
 38794  		if p != x3.Args[0] {
 38795  			break
 38796  		}
 38797  		if mem != x3.Args[1] {
 38798  			break
 38799  		}
 38800  		s3 := o3.Args[1]
 38801  		if s3.Op != OpPPC64SLDconst {
 38802  			break
 38803  		}
 38804  		if s3.AuxInt != 32 {
 38805  			break
 38806  		}
 38807  		x4 := s3.Args[0]
 38808  		if x4.Op != OpPPC64MOVBZload {
 38809  			break
 38810  		}
 38811  		i4 := x4.AuxInt
 38812  		if x4.Aux != s {
 38813  			break
 38814  		}
 38815  		_ = x4.Args[1]
 38816  		if p != x4.Args[0] {
 38817  			break
 38818  		}
 38819  		if mem != x4.Args[1] {
 38820  			break
 38821  		}
 38822  		s4 := o4.Args[1]
 38823  		if s4.Op != OpPPC64SLDconst {
 38824  			break
 38825  		}
 38826  		if s4.AuxInt != 40 {
 38827  			break
 38828  		}
 38829  		x5 := s4.Args[0]
 38830  		if x5.Op != OpPPC64MOVBZload {
 38831  			break
 38832  		}
 38833  		i5 := x5.AuxInt
 38834  		if x5.Aux != s {
 38835  			break
 38836  		}
 38837  		_ = x5.Args[1]
 38838  		if p != x5.Args[0] {
 38839  			break
 38840  		}
 38841  		if mem != x5.Args[1] {
 38842  			break
 38843  		}
 38844  		s5 := o5.Args[1]
 38845  		if s5.Op != OpPPC64SLDconst {
 38846  			break
 38847  		}
 38848  		if s5.AuxInt != 48 {
 38849  			break
 38850  		}
 38851  		x6 := s5.Args[0]
 38852  		if x6.Op != OpPPC64MOVBZload {
 38853  			break
 38854  		}
 38855  		i6 := x6.AuxInt
 38856  		if x6.Aux != s {
 38857  			break
 38858  		}
 38859  		_ = x6.Args[1]
 38860  		if p != x6.Args[0] {
 38861  			break
 38862  		}
 38863  		if mem != x6.Args[1] {
 38864  			break
 38865  		}
 38866  		s6 := v.Args[1]
 38867  		if s6.Op != OpPPC64SLDconst {
 38868  			break
 38869  		}
 38870  		if s6.AuxInt != 56 {
 38871  			break
 38872  		}
 38873  		x7 := s6.Args[0]
 38874  		if x7.Op != OpPPC64MOVBZload {
 38875  			break
 38876  		}
 38877  		i7 := x7.AuxInt
 38878  		if x7.Aux != s {
 38879  			break
 38880  		}
 38881  		_ = x7.Args[1]
 38882  		if p != x7.Args[0] {
 38883  			break
 38884  		}
 38885  		if mem != x7.Args[1] {
 38886  			break
 38887  		}
 38888  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38889  			break
 38890  		}
 38891  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38892  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38893  		v.reset(OpCopy)
 38894  		v.AddArg(v0)
 38895  		v0.AuxInt = i0
 38896  		v0.Aux = s
 38897  		v0.AddArg(p)
 38898  		v0.AddArg(mem)
 38899  		return true
 38900  	}
 38901  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38902  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38903  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38904  	for {
 38905  		t := v.Type
 38906  		_ = v.Args[1]
 38907  		o5 := v.Args[0]
 38908  		if o5.Op != OpPPC64OR {
 38909  			break
 38910  		}
 38911  		if o5.Type != t {
 38912  			break
 38913  		}
 38914  		_ = o5.Args[1]
 38915  		o4 := o5.Args[0]
 38916  		if o4.Op != OpPPC64OR {
 38917  			break
 38918  		}
 38919  		if o4.Type != t {
 38920  			break
 38921  		}
 38922  		_ = o4.Args[1]
 38923  		o3 := o4.Args[0]
 38924  		if o3.Op != OpPPC64OR {
 38925  			break
 38926  		}
 38927  		if o3.Type != t {
 38928  			break
 38929  		}
 38930  		_ = o3.Args[1]
 38931  		o2 := o3.Args[0]
 38932  		if o2.Op != OpPPC64OR {
 38933  			break
 38934  		}
 38935  		if o2.Type != t {
 38936  			break
 38937  		}
 38938  		_ = o2.Args[1]
 38939  		o1 := o2.Args[0]
 38940  		if o1.Op != OpPPC64OR {
 38941  			break
 38942  		}
 38943  		if o1.Type != t {
 38944  			break
 38945  		}
 38946  		_ = o1.Args[1]
 38947  		o0 := o1.Args[0]
 38948  		if o0.Op != OpPPC64OR {
 38949  			break
 38950  		}
 38951  		if o0.Type != t {
 38952  			break
 38953  		}
 38954  		_ = o0.Args[1]
 38955  		s0 := o0.Args[0]
 38956  		if s0.Op != OpPPC64SLDconst {
 38957  			break
 38958  		}
 38959  		if s0.AuxInt != 8 {
 38960  			break
 38961  		}
 38962  		x1 := s0.Args[0]
 38963  		if x1.Op != OpPPC64MOVBZload {
 38964  			break
 38965  		}
 38966  		i1 := x1.AuxInt
 38967  		s := x1.Aux
 38968  		_ = x1.Args[1]
 38969  		p := x1.Args[0]
 38970  		mem := x1.Args[1]
 38971  		x0 := o0.Args[1]
 38972  		if x0.Op != OpPPC64MOVBZload {
 38973  			break
 38974  		}
 38975  		i0 := x0.AuxInt
 38976  		if x0.Aux != s {
 38977  			break
 38978  		}
 38979  		_ = x0.Args[1]
 38980  		if p != x0.Args[0] {
 38981  			break
 38982  		}
 38983  		if mem != x0.Args[1] {
 38984  			break
 38985  		}
 38986  		s1 := o1.Args[1]
 38987  		if s1.Op != OpPPC64SLDconst {
 38988  			break
 38989  		}
 38990  		if s1.AuxInt != 16 {
 38991  			break
 38992  		}
 38993  		x2 := s1.Args[0]
 38994  		if x2.Op != OpPPC64MOVBZload {
 38995  			break
 38996  		}
 38997  		i2 := x2.AuxInt
 38998  		if x2.Aux != s {
 38999  			break
 39000  		}
 39001  		_ = x2.Args[1]
 39002  		if p != x2.Args[0] {
 39003  			break
 39004  		}
 39005  		if mem != x2.Args[1] {
 39006  			break
 39007  		}
 39008  		s2 := o2.Args[1]
 39009  		if s2.Op != OpPPC64SLDconst {
 39010  			break
 39011  		}
 39012  		if s2.AuxInt != 24 {
 39013  			break
 39014  		}
 39015  		x3 := s2.Args[0]
 39016  		if x3.Op != OpPPC64MOVBZload {
 39017  			break
 39018  		}
 39019  		i3 := x3.AuxInt
 39020  		if x3.Aux != s {
 39021  			break
 39022  		}
 39023  		_ = x3.Args[1]
 39024  		if p != x3.Args[0] {
 39025  			break
 39026  		}
 39027  		if mem != x3.Args[1] {
 39028  			break
 39029  		}
 39030  		s3 := o3.Args[1]
 39031  		if s3.Op != OpPPC64SLDconst {
 39032  			break
 39033  		}
 39034  		if s3.AuxInt != 32 {
 39035  			break
 39036  		}
 39037  		x4 := s3.Args[0]
 39038  		if x4.Op != OpPPC64MOVBZload {
 39039  			break
 39040  		}
 39041  		i4 := x4.AuxInt
 39042  		if x4.Aux != s {
 39043  			break
 39044  		}
 39045  		_ = x4.Args[1]
 39046  		if p != x4.Args[0] {
 39047  			break
 39048  		}
 39049  		if mem != x4.Args[1] {
 39050  			break
 39051  		}
 39052  		s4 := o4.Args[1]
 39053  		if s4.Op != OpPPC64SLDconst {
 39054  			break
 39055  		}
 39056  		if s4.AuxInt != 40 {
 39057  			break
 39058  		}
 39059  		x5 := s4.Args[0]
 39060  		if x5.Op != OpPPC64MOVBZload {
 39061  			break
 39062  		}
 39063  		i5 := x5.AuxInt
 39064  		if x5.Aux != s {
 39065  			break
 39066  		}
 39067  		_ = x5.Args[1]
 39068  		if p != x5.Args[0] {
 39069  			break
 39070  		}
 39071  		if mem != x5.Args[1] {
 39072  			break
 39073  		}
 39074  		s5 := o5.Args[1]
 39075  		if s5.Op != OpPPC64SLDconst {
 39076  			break
 39077  		}
 39078  		if s5.AuxInt != 48 {
 39079  			break
 39080  		}
 39081  		x6 := s5.Args[0]
 39082  		if x6.Op != OpPPC64MOVBZload {
 39083  			break
 39084  		}
 39085  		i6 := x6.AuxInt
 39086  		if x6.Aux != s {
 39087  			break
 39088  		}
 39089  		_ = x6.Args[1]
 39090  		if p != x6.Args[0] {
 39091  			break
 39092  		}
 39093  		if mem != x6.Args[1] {
 39094  			break
 39095  		}
 39096  		s6 := v.Args[1]
 39097  		if s6.Op != OpPPC64SLDconst {
 39098  			break
 39099  		}
 39100  		if s6.AuxInt != 56 {
 39101  			break
 39102  		}
 39103  		x7 := s6.Args[0]
 39104  		if x7.Op != OpPPC64MOVBZload {
 39105  			break
 39106  		}
 39107  		i7 := x7.AuxInt
 39108  		if x7.Aux != s {
 39109  			break
 39110  		}
 39111  		_ = x7.Args[1]
 39112  		if p != x7.Args[0] {
 39113  			break
 39114  		}
 39115  		if mem != x7.Args[1] {
 39116  			break
 39117  		}
 39118  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 39119  			break
 39120  		}
 39121  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 39122  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 39123  		v.reset(OpCopy)
 39124  		v.AddArg(v0)
 39125  		v0.AuxInt = i0
 39126  		v0.Aux = s
 39127  		v0.AddArg(p)
 39128  		v0.AddArg(mem)
 39129  		return true
 39130  	}
 39131  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 39132  	// cond: !config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 39133  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 39134  	for {
 39135  		t := v.Type
 39136  		_ = v.Args[1]
 39137  		o5 := v.Args[0]
 39138  		if o5.Op != OpPPC64OR {
 39139  			break
 39140  		}
 39141  		if o5.Type != t {
 39142  			break
 39143  		}
 39144  		_ = o5.Args[1]
 39145  		o4 := o5.Args[0]
 39146  		if o4.Op != OpPPC64OR {
 39147  			break
 39148  		}
 39149  		if o4.Type != t {
 39150  			break
 39151  		}
 39152  		_ = o4.Args[1]
 39153  		o3 := o4.Args[0]
 39154  		if o3.Op != OpPPC64OR {
 39155  			break
 39156  		}
 39157  		if o3.Type != t {
 39158  			break
 39159  		}
 39160  		_ = o3.Args[1]
 39161  		o2 := o3.Args[0]
 39162  		if o2.Op != OpPPC64OR {
 39163  			break
 39164  		}
 39165  		if o2.Type != t {
 39166  			break
 39167  		}
 39168  		_ = o2.Args[1]
 39169  		o1 := o2.Args[0]
 39170  		if o1.Op != OpPPC64OR {
 39171  			break
 39172  		}
 39173  		if o1.Type != t {
 39174  			break
 39175  		}
 39176  		_ = o1.Args[1]
 39177  		o0 := o1.Args[0]
 39178  		if o0.Op != OpPPC64OR {
 39179  			break
 39180  		}
 39181  		if o0.Type != t {
 39182  			break
 39183  		}
 39184  		_ = o0.Args[1]
 39185  		x0 := o0.Args[0]
 39186  		if x0.Op != OpPPC64MOVBZload {
 39187  			break
 39188  		}
 39189  		i0 := x0.AuxInt
 39190  		s := x0.Aux
 39191  		_ = x0.Args[1]
 39192  		p := x0.Args[0]
 39193  		mem := x0.Args[1]
 39194  		s0 := o0.Args[1]
 39195  		if s0.Op != OpPPC64SLDconst {
 39196  			break
 39197  		}
 39198  		if s0.AuxInt != 8 {
 39199  			break
 39200  		}
 39201  		x1 := s0.Args[0]
 39202  		if x1.Op != OpPPC64MOVBZload {
 39203  			break
 39204  		}
 39205  		i1 := x1.AuxInt
 39206  		if x1.Aux != s {
 39207  			break
 39208  		}
 39209  		_ = x1.Args[1]
 39210  		if p != x1.Args[0] {
 39211  			break
 39212  		}
 39213  		if mem != x1.Args[1] {
 39214  			break
 39215  		}
 39216  		s1 := o1.Args[1]
 39217  		if s1.Op != OpPPC64SLDconst {
 39218  			break
 39219  		}
 39220  		if s1.AuxInt != 16 {
 39221  			break
 39222  		}
 39223  		x2 := s1.Args[0]
 39224  		if x2.Op != OpPPC64MOVBZload {
 39225  			break
 39226  		}
 39227  		i2 := x2.AuxInt
 39228  		if x2.Aux != s {
 39229  			break
 39230  		}
 39231  		_ = x2.Args[1]
 39232  		if p != x2.Args[0] {
 39233  			break
 39234  		}
 39235  		if mem != x2.Args[1] {
 39236  			break
 39237  		}
 39238  		s2 := o2.Args[1]
 39239  		if s2.Op != OpPPC64SLDconst {
 39240  			break
 39241  		}
 39242  		if s2.AuxInt != 24 {
 39243  			break
 39244  		}
 39245  		x3 := s2.Args[0]
 39246  		if x3.Op != OpPPC64MOVBZload {
 39247  			break
 39248  		}
 39249  		i3 := x3.AuxInt
 39250  		if x3.Aux != s {
 39251  			break
 39252  		}
 39253  		_ = x3.Args[1]
 39254  		if p != x3.Args[0] {
 39255  			break
 39256  		}
 39257  		if mem != x3.Args[1] {
 39258  			break
 39259  		}
 39260  		s3 := o3.Args[1]
 39261  		if s3.Op != OpPPC64SLDconst {
 39262  			break
 39263  		}
 39264  		if s3.AuxInt != 32 {
 39265  			break
 39266  		}
 39267  		x4 := s3.Args[0]
 39268  		if x4.Op != OpPPC64MOVBZload {
 39269  			break
 39270  		}
 39271  		i4 := x4.AuxInt
 39272  		if x4.Aux != s {
 39273  			break
 39274  		}
 39275  		_ = x4.Args[1]
 39276  		if p != x4.Args[0] {
 39277  			break
 39278  		}
 39279  		if mem != x4.Args[1] {
 39280  			break
 39281  		}
 39282  		s4 := o4.Args[1]
 39283  		if s4.Op != OpPPC64SLDconst {
 39284  			break
 39285  		}
 39286  		if s4.AuxInt != 40 {
 39287  			break
 39288  		}
 39289  		x5 := s4.Args[0]
 39290  		if x5.Op != OpPPC64MOVBZload {
 39291  			break
 39292  		}
 39293  		i5 := x5.AuxInt
 39294  		if x5.Aux != s {
 39295  			break
 39296  		}
 39297  		_ = x5.Args[1]
 39298  		if p != x5.Args[0] {
 39299  			break
 39300  		}
 39301  		if mem != x5.Args[1] {
 39302  			break
 39303  		}
 39304  		s5 := o5.Args[1]
 39305  		if s5.Op != OpPPC64SLDconst {
 39306  			break
 39307  		}
 39308  		if s5.AuxInt != 48 {
 39309  			break
 39310  		}
 39311  		x6 := s5.Args[0]
 39312  		if x6.Op != OpPPC64MOVBZload {
 39313  			break
 39314  		}
 39315  		i6 := x6.AuxInt
 39316  		if x6.Aux != s {
 39317  			break
 39318  		}
 39319  		_ = x6.Args[1]
 39320  		if p != x6.Args[0] {
 39321  			break
 39322  		}
 39323  		if mem != x6.Args[1] {
 39324  			break
 39325  		}
 39326  		s6 := v.Args[1]
 39327  		if s6.Op != OpPPC64SLDconst {
 39328  			break
 39329  		}
 39330  		if s6.AuxInt != 56 {
 39331  			break
 39332  		}
 39333  		x7 := s6.Args[0]
 39334  		if x7.Op != OpPPC64MOVBZload {
 39335  			break
 39336  		}
 39337  		i7 := x7.AuxInt
 39338  		if x7.Aux != s {
 39339  			break
 39340  		}
 39341  		_ = x7.Args[1]
 39342  		if p != x7.Args[0] {
 39343  			break
 39344  		}
 39345  		if mem != x7.Args[1] {
 39346  			break
 39347  		}
 39348  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 39349  			break
 39350  		}
 39351  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 39352  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 39353  		v.reset(OpCopy)
 39354  		v.AddArg(v0)
 39355  		v0.AuxInt = i0
 39356  		v0.Aux = s
 39357  		v0.AddArg(p)
 39358  		v0.AddArg(mem)
 39359  		return true
 39360  	}
 39361  	return false
 39362  }
 39363  func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
 39364  	// match: (ORN x (MOVDconst [-1]))
 39365  	// cond:
 39366  	// result: x
 39367  	for {
 39368  		_ = v.Args[1]
 39369  		x := v.Args[0]
 39370  		v_1 := v.Args[1]
 39371  		if v_1.Op != OpPPC64MOVDconst {
 39372  			break
 39373  		}
 39374  		if v_1.AuxInt != -1 {
 39375  			break
 39376  		}
 39377  		v.reset(OpCopy)
 39378  		v.Type = x.Type
 39379  		v.AddArg(x)
 39380  		return true
 39381  	}
 39382  	return false
 39383  }
 39384  func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
 39385  	// match: (ORconst [c] (ORconst [d] x))
 39386  	// cond:
 39387  	// result: (ORconst [c|d] x)
 39388  	for {
 39389  		c := v.AuxInt
 39390  		v_0 := v.Args[0]
 39391  		if v_0.Op != OpPPC64ORconst {
 39392  			break
 39393  		}
 39394  		d := v_0.AuxInt
 39395  		x := v_0.Args[0]
 39396  		v.reset(OpPPC64ORconst)
 39397  		v.AuxInt = c | d
 39398  		v.AddArg(x)
 39399  		return true
 39400  	}
 39401  	// match: (ORconst [-1] _)
 39402  	// cond:
 39403  	// result: (MOVDconst [-1])
 39404  	for {
 39405  		if v.AuxInt != -1 {
 39406  			break
 39407  		}
 39408  		v.reset(OpPPC64MOVDconst)
 39409  		v.AuxInt = -1
 39410  		return true
 39411  	}
 39412  	// match: (ORconst [0] x)
 39413  	// cond:
 39414  	// result: x
 39415  	for {
 39416  		if v.AuxInt != 0 {
 39417  			break
 39418  		}
 39419  		x := v.Args[0]
 39420  		v.reset(OpCopy)
 39421  		v.Type = x.Type
 39422  		v.AddArg(x)
 39423  		return true
 39424  	}
 39425  	return false
 39426  }
 39427  func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
 39428  	// match: (SUB x (MOVDconst [c]))
 39429  	// cond: is32Bit(-c)
 39430  	// result: (ADDconst [-c] x)
 39431  	for {
 39432  		_ = v.Args[1]
 39433  		x := v.Args[0]
 39434  		v_1 := v.Args[1]
 39435  		if v_1.Op != OpPPC64MOVDconst {
 39436  			break
 39437  		}
 39438  		c := v_1.AuxInt
 39439  		if !(is32Bit(-c)) {
 39440  			break
 39441  		}
 39442  		v.reset(OpPPC64ADDconst)
 39443  		v.AuxInt = -c
 39444  		v.AddArg(x)
 39445  		return true
 39446  	}
 39447  	return false
 39448  }
 39449  func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
 39450  	b := v.Block
 39451  	_ = b
 39452  	typ := &b.Func.Config.Types
 39453  	_ = typ
 39454  	// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
 39455  	// cond: d == 64-c
 39456  	// result: (ROTLconst [c] x)
 39457  	for {
 39458  		_ = v.Args[1]
 39459  		v_0 := v.Args[0]
 39460  		if v_0.Op != OpPPC64SLDconst {
 39461  			break
 39462  		}
 39463  		c := v_0.AuxInt
 39464  		x := v_0.Args[0]
 39465  		v_1 := v.Args[1]
 39466  		if v_1.Op != OpPPC64SRDconst {
 39467  			break
 39468  		}
 39469  		d := v_1.AuxInt
 39470  		if x != v_1.Args[0] {
 39471  			break
 39472  		}
 39473  		if !(d == 64-c) {
 39474  			break
 39475  		}
 39476  		v.reset(OpPPC64ROTLconst)
 39477  		v.AuxInt = c
 39478  		v.AddArg(x)
 39479  		return true
 39480  	}
 39481  	// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
 39482  	// cond: d == 64-c
 39483  	// result: (ROTLconst [c] x)
 39484  	for {
 39485  		_ = v.Args[1]
 39486  		v_0 := v.Args[0]
 39487  		if v_0.Op != OpPPC64SRDconst {
 39488  			break
 39489  		}
 39490  		d := v_0.AuxInt
 39491  		x := v_0.Args[0]
 39492  		v_1 := v.Args[1]
 39493  		if v_1.Op != OpPPC64SLDconst {
 39494  			break
 39495  		}
 39496  		c := v_1.AuxInt
 39497  		if x != v_1.Args[0] {
 39498  			break
 39499  		}
 39500  		if !(d == 64-c) {
 39501  			break
 39502  		}
 39503  		v.reset(OpPPC64ROTLconst)
 39504  		v.AuxInt = c
 39505  		v.AddArg(x)
 39506  		return true
 39507  	}
 39508  	// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
 39509  	// cond: d == 32-c
 39510  	// result: (ROTLWconst [c] x)
 39511  	for {
 39512  		_ = v.Args[1]
 39513  		v_0 := v.Args[0]
 39514  		if v_0.Op != OpPPC64SLWconst {
 39515  			break
 39516  		}
 39517  		c := v_0.AuxInt
 39518  		x := v_0.Args[0]
 39519  		v_1 := v.Args[1]
 39520  		if v_1.Op != OpPPC64SRWconst {
 39521  			break
 39522  		}
 39523  		d := v_1.AuxInt
 39524  		if x != v_1.Args[0] {
 39525  			break
 39526  		}
 39527  		if !(d == 32-c) {
 39528  			break
 39529  		}
 39530  		v.reset(OpPPC64ROTLWconst)
 39531  		v.AuxInt = c
 39532  		v.AddArg(x)
 39533  		return true
 39534  	}
 39535  	// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
 39536  	// cond: d == 32-c
 39537  	// result: (ROTLWconst [c] x)
 39538  	for {
 39539  		_ = v.Args[1]
 39540  		v_0 := v.Args[0]
 39541  		if v_0.Op != OpPPC64SRWconst {
 39542  			break
 39543  		}
 39544  		d := v_0.AuxInt
 39545  		x := v_0.Args[0]
 39546  		v_1 := v.Args[1]
 39547  		if v_1.Op != OpPPC64SLWconst {
 39548  			break
 39549  		}
 39550  		c := v_1.AuxInt
 39551  		if x != v_1.Args[0] {
 39552  			break
 39553  		}
 39554  		if !(d == 32-c) {
 39555  			break
 39556  		}
 39557  		v.reset(OpPPC64ROTLWconst)
 39558  		v.AuxInt = c
 39559  		v.AddArg(x)
 39560  		return true
 39561  	}
 39562  	// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 39563  	// cond:
 39564  	// result: (ROTL x y)
 39565  	for {
 39566  		_ = v.Args[1]
 39567  		v_0 := v.Args[0]
 39568  		if v_0.Op != OpPPC64SLD {
 39569  			break
 39570  		}
 39571  		_ = v_0.Args[1]
 39572  		x := v_0.Args[0]
 39573  		v_0_1 := v_0.Args[1]
 39574  		if v_0_1.Op != OpPPC64ANDconst {
 39575  			break
 39576  		}
 39577  		if v_0_1.Type != typ.Int64 {
 39578  			break
 39579  		}
 39580  		if v_0_1.AuxInt != 63 {
 39581  			break
 39582  		}
 39583  		y := v_0_1.Args[0]
 39584  		v_1 := v.Args[1]
 39585  		if v_1.Op != OpPPC64SRD {
 39586  			break
 39587  		}
 39588  		_ = v_1.Args[1]
 39589  		if x != v_1.Args[0] {
 39590  			break
 39591  		}
 39592  		v_1_1 := v_1.Args[1]
 39593  		if v_1_1.Op != OpPPC64SUB {
 39594  			break
 39595  		}
 39596  		if v_1_1.Type != typ.UInt {
 39597  			break
 39598  		}
 39599  		_ = v_1_1.Args[1]
 39600  		v_1_1_0 := v_1_1.Args[0]
 39601  		if v_1_1_0.Op != OpPPC64MOVDconst {
 39602  			break
 39603  		}
 39604  		if v_1_1_0.AuxInt != 64 {
 39605  			break
 39606  		}
 39607  		v_1_1_1 := v_1_1.Args[1]
 39608  		if v_1_1_1.Op != OpPPC64ANDconst {
 39609  			break
 39610  		}
 39611  		if v_1_1_1.Type != typ.UInt {
 39612  			break
 39613  		}
 39614  		if v_1_1_1.AuxInt != 63 {
 39615  			break
 39616  		}
 39617  		if y != v_1_1_1.Args[0] {
 39618  			break
 39619  		}
 39620  		v.reset(OpPPC64ROTL)
 39621  		v.AddArg(x)
 39622  		v.AddArg(y)
 39623  		return true
 39624  	}
 39625  	// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 39626  	// cond:
 39627  	// result: (ROTL x y)
 39628  	for {
 39629  		_ = v.Args[1]
 39630  		v_0 := v.Args[0]
 39631  		if v_0.Op != OpPPC64SRD {
 39632  			break
 39633  		}
 39634  		_ = v_0.Args[1]
 39635  		x := v_0.Args[0]
 39636  		v_0_1 := v_0.Args[1]
 39637  		if v_0_1.Op != OpPPC64SUB {
 39638  			break
 39639  		}
 39640  		if v_0_1.Type != typ.UInt {
 39641  			break
 39642  		}
 39643  		_ = v_0_1.Args[1]
 39644  		v_0_1_0 := v_0_1.Args[0]
 39645  		if v_0_1_0.Op != OpPPC64MOVDconst {
 39646  			break
 39647  		}
 39648  		if v_0_1_0.AuxInt != 64 {
 39649  			break
 39650  		}
 39651  		v_0_1_1 := v_0_1.Args[1]
 39652  		if v_0_1_1.Op != OpPPC64ANDconst {
 39653  			break
 39654  		}
 39655  		if v_0_1_1.Type != typ.UInt {
 39656  			break
 39657  		}
 39658  		if v_0_1_1.AuxInt != 63 {
 39659  			break
 39660  		}
 39661  		y := v_0_1_1.Args[0]
 39662  		v_1 := v.Args[1]
 39663  		if v_1.Op != OpPPC64SLD {
 39664  			break
 39665  		}
 39666  		_ = v_1.Args[1]
 39667  		if x != v_1.Args[0] {
 39668  			break
 39669  		}
 39670  		v_1_1 := v_1.Args[1]
 39671  		if v_1_1.Op != OpPPC64ANDconst {
 39672  			break
 39673  		}
 39674  		if v_1_1.Type != typ.Int64 {
 39675  			break
 39676  		}
 39677  		if v_1_1.AuxInt != 63 {
 39678  			break
 39679  		}
 39680  		if y != v_1_1.Args[0] {
 39681  			break
 39682  		}
 39683  		v.reset(OpPPC64ROTL)
 39684  		v.AddArg(x)
 39685  		v.AddArg(y)
 39686  		return true
 39687  	}
 39688  	// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 39689  	// cond:
 39690  	// result: (ROTLW x y)
 39691  	for {
 39692  		_ = v.Args[1]
 39693  		v_0 := v.Args[0]
 39694  		if v_0.Op != OpPPC64SLW {
 39695  			break
 39696  		}
 39697  		_ = v_0.Args[1]
 39698  		x := v_0.Args[0]
 39699  		v_0_1 := v_0.Args[1]
 39700  		if v_0_1.Op != OpPPC64ANDconst {
 39701  			break
 39702  		}
 39703  		if v_0_1.Type != typ.Int32 {
 39704  			break
 39705  		}
 39706  		if v_0_1.AuxInt != 31 {
 39707  			break
 39708  		}
 39709  		y := v_0_1.Args[0]
 39710  		v_1 := v.Args[1]
 39711  		if v_1.Op != OpPPC64SRW {
 39712  			break
 39713  		}
 39714  		_ = v_1.Args[1]
 39715  		if x != v_1.Args[0] {
 39716  			break
 39717  		}
 39718  		v_1_1 := v_1.Args[1]
 39719  		if v_1_1.Op != OpPPC64SUB {
 39720  			break
 39721  		}
 39722  		if v_1_1.Type != typ.UInt {
 39723  			break
 39724  		}
 39725  		_ = v_1_1.Args[1]
 39726  		v_1_1_0 := v_1_1.Args[0]
 39727  		if v_1_1_0.Op != OpPPC64MOVDconst {
 39728  			break
 39729  		}
 39730  		if v_1_1_0.AuxInt != 32 {
 39731  			break
 39732  		}
 39733  		v_1_1_1 := v_1_1.Args[1]
 39734  		if v_1_1_1.Op != OpPPC64ANDconst {
 39735  			break
 39736  		}
 39737  		if v_1_1_1.Type != typ.UInt {
 39738  			break
 39739  		}
 39740  		if v_1_1_1.AuxInt != 31 {
 39741  			break
 39742  		}
 39743  		if y != v_1_1_1.Args[0] {
 39744  			break
 39745  		}
 39746  		v.reset(OpPPC64ROTLW)
 39747  		v.AddArg(x)
 39748  		v.AddArg(y)
 39749  		return true
 39750  	}
 39751  	// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 39752  	// cond:
 39753  	// result: (ROTLW x y)
 39754  	for {
 39755  		_ = v.Args[1]
 39756  		v_0 := v.Args[0]
 39757  		if v_0.Op != OpPPC64SRW {
 39758  			break
 39759  		}
 39760  		_ = v_0.Args[1]
 39761  		x := v_0.Args[0]
 39762  		v_0_1 := v_0.Args[1]
 39763  		if v_0_1.Op != OpPPC64SUB {
 39764  			break
 39765  		}
 39766  		if v_0_1.Type != typ.UInt {
 39767  			break
 39768  		}
 39769  		_ = v_0_1.Args[1]
 39770  		v_0_1_0 := v_0_1.Args[0]
 39771  		if v_0_1_0.Op != OpPPC64MOVDconst {
 39772  			break
 39773  		}
 39774  		if v_0_1_0.AuxInt != 32 {
 39775  			break
 39776  		}
 39777  		v_0_1_1 := v_0_1.Args[1]
 39778  		if v_0_1_1.Op != OpPPC64ANDconst {
 39779  			break
 39780  		}
 39781  		if v_0_1_1.Type != typ.UInt {
 39782  			break
 39783  		}
 39784  		if v_0_1_1.AuxInt != 31 {
 39785  			break
 39786  		}
 39787  		y := v_0_1_1.Args[0]
 39788  		v_1 := v.Args[1]
 39789  		if v_1.Op != OpPPC64SLW {
 39790  			break
 39791  		}
 39792  		_ = v_1.Args[1]
 39793  		if x != v_1.Args[0] {
 39794  			break
 39795  		}
 39796  		v_1_1 := v_1.Args[1]
 39797  		if v_1_1.Op != OpPPC64ANDconst {
 39798  			break
 39799  		}
 39800  		if v_1_1.Type != typ.Int32 {
 39801  			break
 39802  		}
 39803  		if v_1_1.AuxInt != 31 {
 39804  			break
 39805  		}
 39806  		if y != v_1_1.Args[0] {
 39807  			break
 39808  		}
 39809  		v.reset(OpPPC64ROTLW)
 39810  		v.AddArg(x)
 39811  		v.AddArg(y)
 39812  		return true
 39813  	}
 39814  	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
 39815  	// cond:
 39816  	// result: (MOVDconst [c^d])
 39817  	for {
 39818  		_ = v.Args[1]
 39819  		v_0 := v.Args[0]
 39820  		if v_0.Op != OpPPC64MOVDconst {
 39821  			break
 39822  		}
 39823  		c := v_0.AuxInt
 39824  		v_1 := v.Args[1]
 39825  		if v_1.Op != OpPPC64MOVDconst {
 39826  			break
 39827  		}
 39828  		d := v_1.AuxInt
 39829  		v.reset(OpPPC64MOVDconst)
 39830  		v.AuxInt = c ^ d
 39831  		return true
 39832  	}
 39833  	// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
 39834  	// cond:
 39835  	// result: (MOVDconst [c^d])
 39836  	for {
 39837  		_ = v.Args[1]
 39838  		v_0 := v.Args[0]
 39839  		if v_0.Op != OpPPC64MOVDconst {
 39840  			break
 39841  		}
 39842  		d := v_0.AuxInt
 39843  		v_1 := v.Args[1]
 39844  		if v_1.Op != OpPPC64MOVDconst {
 39845  			break
 39846  		}
 39847  		c := v_1.AuxInt
 39848  		v.reset(OpPPC64MOVDconst)
 39849  		v.AuxInt = c ^ d
 39850  		return true
 39851  	}
 39852  	return false
 39853  }
 39854  func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
 39855  	// match: (XOR x (MOVDconst [c]))
 39856  	// cond: isU32Bit(c)
 39857  	// result: (XORconst [c] x)
 39858  	for {
 39859  		_ = v.Args[1]
 39860  		x := v.Args[0]
 39861  		v_1 := v.Args[1]
 39862  		if v_1.Op != OpPPC64MOVDconst {
 39863  			break
 39864  		}
 39865  		c := v_1.AuxInt
 39866  		if !(isU32Bit(c)) {
 39867  			break
 39868  		}
 39869  		v.reset(OpPPC64XORconst)
 39870  		v.AuxInt = c
 39871  		v.AddArg(x)
 39872  		return true
 39873  	}
 39874  	// match: (XOR (MOVDconst [c]) x)
 39875  	// cond: isU32Bit(c)
 39876  	// result: (XORconst [c] x)
 39877  	for {
 39878  		_ = v.Args[1]
 39879  		v_0 := v.Args[0]
 39880  		if v_0.Op != OpPPC64MOVDconst {
 39881  			break
 39882  		}
 39883  		c := v_0.AuxInt
 39884  		x := v.Args[1]
 39885  		if !(isU32Bit(c)) {
 39886  			break
 39887  		}
 39888  		v.reset(OpPPC64XORconst)
 39889  		v.AuxInt = c
 39890  		v.AddArg(x)
 39891  		return true
 39892  	}
 39893  	return false
 39894  }
 39895  func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
 39896  	// match: (XORconst [c] (XORconst [d] x))
 39897  	// cond:
 39898  	// result: (XORconst [c^d] x)
 39899  	for {
 39900  		c := v.AuxInt
 39901  		v_0 := v.Args[0]
 39902  		if v_0.Op != OpPPC64XORconst {
 39903  			break
 39904  		}
 39905  		d := v_0.AuxInt
 39906  		x := v_0.Args[0]
 39907  		v.reset(OpPPC64XORconst)
 39908  		v.AuxInt = c ^ d
 39909  		v.AddArg(x)
 39910  		return true
 39911  	}
 39912  	// match: (XORconst [0] x)
 39913  	// cond:
 39914  	// result: x
 39915  	for {
 39916  		if v.AuxInt != 0 {
 39917  			break
 39918  		}
 39919  		x := v.Args[0]
 39920  		v.reset(OpCopy)
 39921  		v.Type = x.Type
 39922  		v.AddArg(x)
 39923  		return true
 39924  	}
 39925  	return false
 39926  }
 39927  func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
 39928  	b := v.Block
 39929  	_ = b
 39930  	typ := &b.Func.Config.Types
 39931  	_ = typ
 39932  	// match: (PopCount16 x)
 39933  	// cond:
 39934  	// result: (POPCNTW (MOVHZreg x))
 39935  	for {
 39936  		x := v.Args[0]
 39937  		v.reset(OpPPC64POPCNTW)
 39938  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 39939  		v0.AddArg(x)
 39940  		v.AddArg(v0)
 39941  		return true
 39942  	}
 39943  }
 39944  func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
 39945  	b := v.Block
 39946  	_ = b
 39947  	typ := &b.Func.Config.Types
 39948  	_ = typ
 39949  	// match: (PopCount32 x)
 39950  	// cond:
 39951  	// result: (POPCNTW (MOVWZreg x))
 39952  	for {
 39953  		x := v.Args[0]
 39954  		v.reset(OpPPC64POPCNTW)
 39955  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 39956  		v0.AddArg(x)
 39957  		v.AddArg(v0)
 39958  		return true
 39959  	}
 39960  }
 39961  func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
 39962  	// match: (PopCount64 x)
 39963  	// cond:
 39964  	// result: (POPCNTD x)
 39965  	for {
 39966  		x := v.Args[0]
 39967  		v.reset(OpPPC64POPCNTD)
 39968  		v.AddArg(x)
 39969  		return true
 39970  	}
 39971  }
 39972  func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
 39973  	b := v.Block
 39974  	_ = b
 39975  	typ := &b.Func.Config.Types
 39976  	_ = typ
 39977  	// match: (PopCount8 x)
 39978  	// cond:
 39979  	// result: (POPCNTB (MOVBreg x))
 39980  	for {
 39981  		x := v.Args[0]
 39982  		v.reset(OpPPC64POPCNTB)
 39983  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 39984  		v0.AddArg(x)
 39985  		v.AddArg(v0)
 39986  		return true
 39987  	}
 39988  }
 39989  func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
 39990  	// match: (Round32F x)
 39991  	// cond:
 39992  	// result: (LoweredRound32F x)
 39993  	for {
 39994  		x := v.Args[0]
 39995  		v.reset(OpPPC64LoweredRound32F)
 39996  		v.AddArg(x)
 39997  		return true
 39998  	}
 39999  }
 40000  func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
 40001  	// match: (Round64F x)
 40002  	// cond:
 40003  	// result: (LoweredRound64F x)
 40004  	for {
 40005  		x := v.Args[0]
 40006  		v.reset(OpPPC64LoweredRound64F)
 40007  		v.AddArg(x)
 40008  		return true
 40009  	}
 40010  }
 40011  func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
 40012  	b := v.Block
 40013  	_ = b
 40014  	typ := &b.Func.Config.Types
 40015  	_ = typ
 40016  	// match: (Rsh16Ux16 x y)
 40017  	// cond:
 40018  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 40019  	for {
 40020  		_ = v.Args[1]
 40021  		x := v.Args[0]
 40022  		y := v.Args[1]
 40023  		v.reset(OpPPC64SRW)
 40024  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40025  		v0.AddArg(x)
 40026  		v.AddArg(v0)
 40027  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40028  		v1.AddArg(y)
 40029  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40030  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40031  		v3.AuxInt = -16
 40032  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40033  		v4.AddArg(y)
 40034  		v3.AddArg(v4)
 40035  		v2.AddArg(v3)
 40036  		v1.AddArg(v2)
 40037  		v.AddArg(v1)
 40038  		return true
 40039  	}
 40040  }
 40041  func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
 40042  	b := v.Block
 40043  	_ = b
 40044  	typ := &b.Func.Config.Types
 40045  	_ = typ
 40046  	// match: (Rsh16Ux32 x (Const64 [c]))
 40047  	// cond: uint32(c) < 16
 40048  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40049  	for {
 40050  		_ = v.Args[1]
 40051  		x := v.Args[0]
 40052  		v_1 := v.Args[1]
 40053  		if v_1.Op != OpConst64 {
 40054  			break
 40055  		}
 40056  		c := v_1.AuxInt
 40057  		if !(uint32(c) < 16) {
 40058  			break
 40059  		}
 40060  		v.reset(OpPPC64SRWconst)
 40061  		v.AuxInt = c
 40062  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40063  		v0.AddArg(x)
 40064  		v.AddArg(v0)
 40065  		return true
 40066  	}
 40067  	// match: (Rsh16Ux32 x (MOVDconst [c]))
 40068  	// cond: uint32(c) < 16
 40069  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40070  	for {
 40071  		_ = v.Args[1]
 40072  		x := v.Args[0]
 40073  		v_1 := v.Args[1]
 40074  		if v_1.Op != OpPPC64MOVDconst {
 40075  			break
 40076  		}
 40077  		c := v_1.AuxInt
 40078  		if !(uint32(c) < 16) {
 40079  			break
 40080  		}
 40081  		v.reset(OpPPC64SRWconst)
 40082  		v.AuxInt = c
 40083  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40084  		v0.AddArg(x)
 40085  		v.AddArg(v0)
 40086  		return true
 40087  	}
 40088  	// match: (Rsh16Ux32 x y)
 40089  	// cond:
 40090  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 40091  	for {
 40092  		_ = v.Args[1]
 40093  		x := v.Args[0]
 40094  		y := v.Args[1]
 40095  		v.reset(OpPPC64SRW)
 40096  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40097  		v0.AddArg(x)
 40098  		v.AddArg(v0)
 40099  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40100  		v1.AddArg(y)
 40101  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40102  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40103  		v3.AuxInt = -16
 40104  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40105  		v4.AddArg(y)
 40106  		v3.AddArg(v4)
 40107  		v2.AddArg(v3)
 40108  		v1.AddArg(v2)
 40109  		v.AddArg(v1)
 40110  		return true
 40111  	}
 40112  }
 40113  func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
 40114  	b := v.Block
 40115  	_ = b
 40116  	typ := &b.Func.Config.Types
 40117  	_ = typ
 40118  	// match: (Rsh16Ux64 x (Const64 [c]))
 40119  	// cond: uint64(c) < 16
 40120  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40121  	for {
 40122  		_ = v.Args[1]
 40123  		x := v.Args[0]
 40124  		v_1 := v.Args[1]
 40125  		if v_1.Op != OpConst64 {
 40126  			break
 40127  		}
 40128  		c := v_1.AuxInt
 40129  		if !(uint64(c) < 16) {
 40130  			break
 40131  		}
 40132  		v.reset(OpPPC64SRWconst)
 40133  		v.AuxInt = c
 40134  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40135  		v0.AddArg(x)
 40136  		v.AddArg(v0)
 40137  		return true
 40138  	}
 40139  	// match: (Rsh16Ux64 _ (Const64 [c]))
 40140  	// cond: uint64(c) >= 16
 40141  	// result: (MOVDconst [0])
 40142  	for {
 40143  		_ = v.Args[1]
 40144  		v_1 := v.Args[1]
 40145  		if v_1.Op != OpConst64 {
 40146  			break
 40147  		}
 40148  		c := v_1.AuxInt
 40149  		if !(uint64(c) >= 16) {
 40150  			break
 40151  		}
 40152  		v.reset(OpPPC64MOVDconst)
 40153  		v.AuxInt = 0
 40154  		return true
 40155  	}
 40156  	// match: (Rsh16Ux64 x (MOVDconst [c]))
 40157  	// cond: uint64(c) < 16
 40158  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40159  	for {
 40160  		_ = v.Args[1]
 40161  		x := v.Args[0]
 40162  		v_1 := v.Args[1]
 40163  		if v_1.Op != OpPPC64MOVDconst {
 40164  			break
 40165  		}
 40166  		c := v_1.AuxInt
 40167  		if !(uint64(c) < 16) {
 40168  			break
 40169  		}
 40170  		v.reset(OpPPC64SRWconst)
 40171  		v.AuxInt = c
 40172  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40173  		v0.AddArg(x)
 40174  		v.AddArg(v0)
 40175  		return true
 40176  	}
 40177  	// match: (Rsh16Ux64 x y)
 40178  	// cond:
 40179  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 40180  	for {
 40181  		_ = v.Args[1]
 40182  		x := v.Args[0]
 40183  		y := v.Args[1]
 40184  		v.reset(OpPPC64SRW)
 40185  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40186  		v0.AddArg(x)
 40187  		v.AddArg(v0)
 40188  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40189  		v1.AddArg(y)
 40190  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40191  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40192  		v3.AuxInt = -16
 40193  		v3.AddArg(y)
 40194  		v2.AddArg(v3)
 40195  		v1.AddArg(v2)
 40196  		v.AddArg(v1)
 40197  		return true
 40198  	}
 40199  }
 40200  func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
 40201  	b := v.Block
 40202  	_ = b
 40203  	typ := &b.Func.Config.Types
 40204  	_ = typ
 40205  	// match: (Rsh16Ux8 x y)
 40206  	// cond:
 40207  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 40208  	for {
 40209  		_ = v.Args[1]
 40210  		x := v.Args[0]
 40211  		y := v.Args[1]
 40212  		v.reset(OpPPC64SRW)
 40213  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40214  		v0.AddArg(x)
 40215  		v.AddArg(v0)
 40216  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40217  		v1.AddArg(y)
 40218  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40219  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40220  		v3.AuxInt = -16
 40221  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40222  		v4.AddArg(y)
 40223  		v3.AddArg(v4)
 40224  		v2.AddArg(v3)
 40225  		v1.AddArg(v2)
 40226  		v.AddArg(v1)
 40227  		return true
 40228  	}
 40229  }
 40230  func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
 40231  	b := v.Block
 40232  	_ = b
 40233  	typ := &b.Func.Config.Types
 40234  	_ = typ
 40235  	// match: (Rsh16x16 x y)
 40236  	// cond:
 40237  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 40238  	for {
 40239  		_ = v.Args[1]
 40240  		x := v.Args[0]
 40241  		y := v.Args[1]
 40242  		v.reset(OpPPC64SRAW)
 40243  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40244  		v0.AddArg(x)
 40245  		v.AddArg(v0)
 40246  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40247  		v1.AddArg(y)
 40248  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40249  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40250  		v3.AuxInt = -16
 40251  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40252  		v4.AddArg(y)
 40253  		v3.AddArg(v4)
 40254  		v2.AddArg(v3)
 40255  		v1.AddArg(v2)
 40256  		v.AddArg(v1)
 40257  		return true
 40258  	}
 40259  }
 40260  func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
 40261  	b := v.Block
 40262  	_ = b
 40263  	typ := &b.Func.Config.Types
 40264  	_ = typ
 40265  	// match: (Rsh16x32 x (Const64 [c]))
 40266  	// cond: uint32(c) < 16
 40267  	// result: (SRAWconst (SignExt16to32 x) [c])
 40268  	for {
 40269  		_ = v.Args[1]
 40270  		x := v.Args[0]
 40271  		v_1 := v.Args[1]
 40272  		if v_1.Op != OpConst64 {
 40273  			break
 40274  		}
 40275  		c := v_1.AuxInt
 40276  		if !(uint32(c) < 16) {
 40277  			break
 40278  		}
 40279  		v.reset(OpPPC64SRAWconst)
 40280  		v.AuxInt = c
 40281  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40282  		v0.AddArg(x)
 40283  		v.AddArg(v0)
 40284  		return true
 40285  	}
 40286  	// match: (Rsh16x32 x (MOVDconst [c]))
 40287  	// cond: uint32(c) < 16
 40288  	// result: (SRAWconst (SignExt16to32 x) [c])
 40289  	for {
 40290  		_ = v.Args[1]
 40291  		x := v.Args[0]
 40292  		v_1 := v.Args[1]
 40293  		if v_1.Op != OpPPC64MOVDconst {
 40294  			break
 40295  		}
 40296  		c := v_1.AuxInt
 40297  		if !(uint32(c) < 16) {
 40298  			break
 40299  		}
 40300  		v.reset(OpPPC64SRAWconst)
 40301  		v.AuxInt = c
 40302  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40303  		v0.AddArg(x)
 40304  		v.AddArg(v0)
 40305  		return true
 40306  	}
 40307  	// match: (Rsh16x32 x y)
 40308  	// cond:
 40309  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 40310  	for {
 40311  		_ = v.Args[1]
 40312  		x := v.Args[0]
 40313  		y := v.Args[1]
 40314  		v.reset(OpPPC64SRAW)
 40315  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40316  		v0.AddArg(x)
 40317  		v.AddArg(v0)
 40318  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40319  		v1.AddArg(y)
 40320  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40321  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40322  		v3.AuxInt = -16
 40323  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40324  		v4.AddArg(y)
 40325  		v3.AddArg(v4)
 40326  		v2.AddArg(v3)
 40327  		v1.AddArg(v2)
 40328  		v.AddArg(v1)
 40329  		return true
 40330  	}
 40331  }
 40332  func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
 40333  	b := v.Block
 40334  	_ = b
 40335  	typ := &b.Func.Config.Types
 40336  	_ = typ
 40337  	// match: (Rsh16x64 x (Const64 [c]))
 40338  	// cond: uint64(c) < 16
 40339  	// result: (SRAWconst (SignExt16to32 x) [c])
 40340  	for {
 40341  		_ = v.Args[1]
 40342  		x := v.Args[0]
 40343  		v_1 := v.Args[1]
 40344  		if v_1.Op != OpConst64 {
 40345  			break
 40346  		}
 40347  		c := v_1.AuxInt
 40348  		if !(uint64(c) < 16) {
 40349  			break
 40350  		}
 40351  		v.reset(OpPPC64SRAWconst)
 40352  		v.AuxInt = c
 40353  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40354  		v0.AddArg(x)
 40355  		v.AddArg(v0)
 40356  		return true
 40357  	}
 40358  	// match: (Rsh16x64 x (Const64 [c]))
 40359  	// cond: uint64(c) >= 16
 40360  	// result: (SRAWconst (SignExt16to32 x) [63])
 40361  	for {
 40362  		_ = v.Args[1]
 40363  		x := v.Args[0]
 40364  		v_1 := v.Args[1]
 40365  		if v_1.Op != OpConst64 {
 40366  			break
 40367  		}
 40368  		c := v_1.AuxInt
 40369  		if !(uint64(c) >= 16) {
 40370  			break
 40371  		}
 40372  		v.reset(OpPPC64SRAWconst)
 40373  		v.AuxInt = 63
 40374  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40375  		v0.AddArg(x)
 40376  		v.AddArg(v0)
 40377  		return true
 40378  	}
 40379  	// match: (Rsh16x64 x (MOVDconst [c]))
 40380  	// cond: uint64(c) < 16
 40381  	// result: (SRAWconst (SignExt16to32 x) [c])
 40382  	for {
 40383  		_ = v.Args[1]
 40384  		x := v.Args[0]
 40385  		v_1 := v.Args[1]
 40386  		if v_1.Op != OpPPC64MOVDconst {
 40387  			break
 40388  		}
 40389  		c := v_1.AuxInt
 40390  		if !(uint64(c) < 16) {
 40391  			break
 40392  		}
 40393  		v.reset(OpPPC64SRAWconst)
 40394  		v.AuxInt = c
 40395  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40396  		v0.AddArg(x)
 40397  		v.AddArg(v0)
 40398  		return true
 40399  	}
 40400  	// match: (Rsh16x64 x y)
 40401  	// cond:
 40402  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 40403  	for {
 40404  		_ = v.Args[1]
 40405  		x := v.Args[0]
 40406  		y := v.Args[1]
 40407  		v.reset(OpPPC64SRAW)
 40408  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40409  		v0.AddArg(x)
 40410  		v.AddArg(v0)
 40411  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40412  		v1.AddArg(y)
 40413  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40414  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40415  		v3.AuxInt = -16
 40416  		v3.AddArg(y)
 40417  		v2.AddArg(v3)
 40418  		v1.AddArg(v2)
 40419  		v.AddArg(v1)
 40420  		return true
 40421  	}
 40422  }
 40423  func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
 40424  	b := v.Block
 40425  	_ = b
 40426  	typ := &b.Func.Config.Types
 40427  	_ = typ
 40428  	// match: (Rsh16x8 x y)
 40429  	// cond:
 40430  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 40431  	for {
 40432  		_ = v.Args[1]
 40433  		x := v.Args[0]
 40434  		y := v.Args[1]
 40435  		v.reset(OpPPC64SRAW)
 40436  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40437  		v0.AddArg(x)
 40438  		v.AddArg(v0)
 40439  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40440  		v1.AddArg(y)
 40441  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40442  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40443  		v3.AuxInt = -16
 40444  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40445  		v4.AddArg(y)
 40446  		v3.AddArg(v4)
 40447  		v2.AddArg(v3)
 40448  		v1.AddArg(v2)
 40449  		v.AddArg(v1)
 40450  		return true
 40451  	}
 40452  }
 40453  func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
 40454  	b := v.Block
 40455  	_ = b
 40456  	typ := &b.Func.Config.Types
 40457  	_ = typ
 40458  	// match: (Rsh32Ux16 x y)
 40459  	// cond:
 40460  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 40461  	for {
 40462  		_ = v.Args[1]
 40463  		x := v.Args[0]
 40464  		y := v.Args[1]
 40465  		v.reset(OpPPC64SRW)
 40466  		v.AddArg(x)
 40467  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40468  		v0.AddArg(y)
 40469  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40470  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40471  		v2.AuxInt = -32
 40472  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40473  		v3.AddArg(y)
 40474  		v2.AddArg(v3)
 40475  		v1.AddArg(v2)
 40476  		v0.AddArg(v1)
 40477  		v.AddArg(v0)
 40478  		return true
 40479  	}
 40480  }
 40481  func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
 40482  	b := v.Block
 40483  	_ = b
 40484  	typ := &b.Func.Config.Types
 40485  	_ = typ
 40486  	// match: (Rsh32Ux32 x (Const64 [c]))
 40487  	// cond: uint32(c) < 32
 40488  	// result: (SRWconst x [c])
 40489  	for {
 40490  		_ = v.Args[1]
 40491  		x := v.Args[0]
 40492  		v_1 := v.Args[1]
 40493  		if v_1.Op != OpConst64 {
 40494  			break
 40495  		}
 40496  		c := v_1.AuxInt
 40497  		if !(uint32(c) < 32) {
 40498  			break
 40499  		}
 40500  		v.reset(OpPPC64SRWconst)
 40501  		v.AuxInt = c
 40502  		v.AddArg(x)
 40503  		return true
 40504  	}
 40505  	// match: (Rsh32Ux32 x (MOVDconst [c]))
 40506  	// cond: uint32(c) < 32
 40507  	// result: (SRWconst x [c])
 40508  	for {
 40509  		_ = v.Args[1]
 40510  		x := v.Args[0]
 40511  		v_1 := v.Args[1]
 40512  		if v_1.Op != OpPPC64MOVDconst {
 40513  			break
 40514  		}
 40515  		c := v_1.AuxInt
 40516  		if !(uint32(c) < 32) {
 40517  			break
 40518  		}
 40519  		v.reset(OpPPC64SRWconst)
 40520  		v.AuxInt = c
 40521  		v.AddArg(x)
 40522  		return true
 40523  	}
 40524  	// match: (Rsh32Ux32 x y)
 40525  	// cond:
 40526  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 40527  	for {
 40528  		_ = v.Args[1]
 40529  		x := v.Args[0]
 40530  		y := v.Args[1]
 40531  		v.reset(OpPPC64SRW)
 40532  		v.AddArg(x)
 40533  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40534  		v0.AddArg(y)
 40535  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40536  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40537  		v2.AuxInt = -32
 40538  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40539  		v3.AddArg(y)
 40540  		v2.AddArg(v3)
 40541  		v1.AddArg(v2)
 40542  		v0.AddArg(v1)
 40543  		v.AddArg(v0)
 40544  		return true
 40545  	}
 40546  }
 40547  func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
 40548  	b := v.Block
 40549  	_ = b
 40550  	typ := &b.Func.Config.Types
 40551  	_ = typ
 40552  	// match: (Rsh32Ux64 x (Const64 [c]))
 40553  	// cond: uint64(c) < 32
 40554  	// result: (SRWconst x [c])
 40555  	for {
 40556  		_ = v.Args[1]
 40557  		x := v.Args[0]
 40558  		v_1 := v.Args[1]
 40559  		if v_1.Op != OpConst64 {
 40560  			break
 40561  		}
 40562  		c := v_1.AuxInt
 40563  		if !(uint64(c) < 32) {
 40564  			break
 40565  		}
 40566  		v.reset(OpPPC64SRWconst)
 40567  		v.AuxInt = c
 40568  		v.AddArg(x)
 40569  		return true
 40570  	}
 40571  	// match: (Rsh32Ux64 _ (Const64 [c]))
 40572  	// cond: uint64(c) >= 32
 40573  	// result: (MOVDconst [0])
 40574  	for {
 40575  		_ = v.Args[1]
 40576  		v_1 := v.Args[1]
 40577  		if v_1.Op != OpConst64 {
 40578  			break
 40579  		}
 40580  		c := v_1.AuxInt
 40581  		if !(uint64(c) >= 32) {
 40582  			break
 40583  		}
 40584  		v.reset(OpPPC64MOVDconst)
 40585  		v.AuxInt = 0
 40586  		return true
 40587  	}
 40588  	// match: (Rsh32Ux64 x (MOVDconst [c]))
 40589  	// cond: uint64(c) < 32
 40590  	// result: (SRWconst x [c])
 40591  	for {
 40592  		_ = v.Args[1]
 40593  		x := v.Args[0]
 40594  		v_1 := v.Args[1]
 40595  		if v_1.Op != OpPPC64MOVDconst {
 40596  			break
 40597  		}
 40598  		c := v_1.AuxInt
 40599  		if !(uint64(c) < 32) {
 40600  			break
 40601  		}
 40602  		v.reset(OpPPC64SRWconst)
 40603  		v.AuxInt = c
 40604  		v.AddArg(x)
 40605  		return true
 40606  	}
 40607  	// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
 40608  	// cond:
 40609  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 40610  	for {
 40611  		_ = v.Args[1]
 40612  		x := v.Args[0]
 40613  		v_1 := v.Args[1]
 40614  		if v_1.Op != OpPPC64AND {
 40615  			break
 40616  		}
 40617  		_ = v_1.Args[1]
 40618  		y := v_1.Args[0]
 40619  		v_1_1 := v_1.Args[1]
 40620  		if v_1_1.Op != OpPPC64MOVDconst {
 40621  			break
 40622  		}
 40623  		if v_1_1.AuxInt != 31 {
 40624  			break
 40625  		}
 40626  		v.reset(OpPPC64SRW)
 40627  		v.AddArg(x)
 40628  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 40629  		v0.AuxInt = 31
 40630  		v0.AddArg(y)
 40631  		v.AddArg(v0)
 40632  		return true
 40633  	}
 40634  	// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
 40635  	// cond:
 40636  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 40637  	for {
 40638  		_ = v.Args[1]
 40639  		x := v.Args[0]
 40640  		v_1 := v.Args[1]
 40641  		if v_1.Op != OpPPC64AND {
 40642  			break
 40643  		}
 40644  		_ = v_1.Args[1]
 40645  		v_1_0 := v_1.Args[0]
 40646  		if v_1_0.Op != OpPPC64MOVDconst {
 40647  			break
 40648  		}
 40649  		if v_1_0.AuxInt != 31 {
 40650  			break
 40651  		}
 40652  		y := v_1.Args[1]
 40653  		v.reset(OpPPC64SRW)
 40654  		v.AddArg(x)
 40655  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 40656  		v0.AuxInt = 31
 40657  		v0.AddArg(y)
 40658  		v.AddArg(v0)
 40659  		return true
 40660  	}
 40661  	// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
 40662  	// cond:
 40663  	// result: (SRW x (ANDconst <typ.UInt> [31] y))
 40664  	for {
 40665  		_ = v.Args[1]
 40666  		x := v.Args[0]
 40667  		v_1 := v.Args[1]
 40668  		if v_1.Op != OpPPC64ANDconst {
 40669  			break
 40670  		}
 40671  		if v_1.Type != typ.UInt {
 40672  			break
 40673  		}
 40674  		if v_1.AuxInt != 31 {
 40675  			break
 40676  		}
 40677  		y := v_1.Args[0]
 40678  		v.reset(OpPPC64SRW)
 40679  		v.AddArg(x)
 40680  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40681  		v0.AuxInt = 31
 40682  		v0.AddArg(y)
 40683  		v.AddArg(v0)
 40684  		return true
 40685  	}
 40686  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40687  	// cond:
 40688  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40689  	for {
 40690  		_ = v.Args[1]
 40691  		x := v.Args[0]
 40692  		v_1 := v.Args[1]
 40693  		if v_1.Op != OpPPC64SUB {
 40694  			break
 40695  		}
 40696  		if v_1.Type != typ.UInt {
 40697  			break
 40698  		}
 40699  		_ = v_1.Args[1]
 40700  		v_1_0 := v_1.Args[0]
 40701  		if v_1_0.Op != OpPPC64MOVDconst {
 40702  			break
 40703  		}
 40704  		if v_1_0.AuxInt != 32 {
 40705  			break
 40706  		}
 40707  		v_1_1 := v_1.Args[1]
 40708  		if v_1_1.Op != OpPPC64ANDconst {
 40709  			break
 40710  		}
 40711  		if v_1_1.Type != typ.UInt {
 40712  			break
 40713  		}
 40714  		if v_1_1.AuxInt != 31 {
 40715  			break
 40716  		}
 40717  		y := v_1_1.Args[0]
 40718  		v.reset(OpPPC64SRW)
 40719  		v.AddArg(x)
 40720  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40721  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40722  		v1.AuxInt = 32
 40723  		v0.AddArg(v1)
 40724  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40725  		v2.AuxInt = 31
 40726  		v2.AddArg(y)
 40727  		v0.AddArg(v2)
 40728  		v.AddArg(v0)
 40729  		return true
 40730  	}
 40731  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 40732  	// cond:
 40733  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40734  	for {
 40735  		_ = v.Args[1]
 40736  		x := v.Args[0]
 40737  		v_1 := v.Args[1]
 40738  		if v_1.Op != OpPPC64SUB {
 40739  			break
 40740  		}
 40741  		if v_1.Type != typ.UInt {
 40742  			break
 40743  		}
 40744  		_ = v_1.Args[1]
 40745  		v_1_0 := v_1.Args[0]
 40746  		if v_1_0.Op != OpPPC64MOVDconst {
 40747  			break
 40748  		}
 40749  		if v_1_0.AuxInt != 32 {
 40750  			break
 40751  		}
 40752  		v_1_1 := v_1.Args[1]
 40753  		if v_1_1.Op != OpPPC64AND {
 40754  			break
 40755  		}
 40756  		if v_1_1.Type != typ.UInt {
 40757  			break
 40758  		}
 40759  		_ = v_1_1.Args[1]
 40760  		y := v_1_1.Args[0]
 40761  		v_1_1_1 := v_1_1.Args[1]
 40762  		if v_1_1_1.Op != OpPPC64MOVDconst {
 40763  			break
 40764  		}
 40765  		if v_1_1_1.AuxInt != 31 {
 40766  			break
 40767  		}
 40768  		v.reset(OpPPC64SRW)
 40769  		v.AddArg(x)
 40770  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40771  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40772  		v1.AuxInt = 32
 40773  		v0.AddArg(v1)
 40774  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40775  		v2.AuxInt = 31
 40776  		v2.AddArg(y)
 40777  		v0.AddArg(v2)
 40778  		v.AddArg(v0)
 40779  		return true
 40780  	}
 40781  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 40782  	// cond:
 40783  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40784  	for {
 40785  		_ = v.Args[1]
 40786  		x := v.Args[0]
 40787  		v_1 := v.Args[1]
 40788  		if v_1.Op != OpPPC64SUB {
 40789  			break
 40790  		}
 40791  		if v_1.Type != typ.UInt {
 40792  			break
 40793  		}
 40794  		_ = v_1.Args[1]
 40795  		v_1_0 := v_1.Args[0]
 40796  		if v_1_0.Op != OpPPC64MOVDconst {
 40797  			break
 40798  		}
 40799  		if v_1_0.AuxInt != 32 {
 40800  			break
 40801  		}
 40802  		v_1_1 := v_1.Args[1]
 40803  		if v_1_1.Op != OpPPC64AND {
 40804  			break
 40805  		}
 40806  		if v_1_1.Type != typ.UInt {
 40807  			break
 40808  		}
 40809  		_ = v_1_1.Args[1]
 40810  		v_1_1_0 := v_1_1.Args[0]
 40811  		if v_1_1_0.Op != OpPPC64MOVDconst {
 40812  			break
 40813  		}
 40814  		if v_1_1_0.AuxInt != 31 {
 40815  			break
 40816  		}
 40817  		y := v_1_1.Args[1]
 40818  		v.reset(OpPPC64SRW)
 40819  		v.AddArg(x)
 40820  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40821  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40822  		v1.AuxInt = 32
 40823  		v0.AddArg(v1)
 40824  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40825  		v2.AuxInt = 31
 40826  		v2.AddArg(y)
 40827  		v0.AddArg(v2)
 40828  		v.AddArg(v0)
 40829  		return true
 40830  	}
 40831  	// match: (Rsh32Ux64 x y)
 40832  	// cond:
 40833  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 40834  	for {
 40835  		_ = v.Args[1]
 40836  		x := v.Args[0]
 40837  		y := v.Args[1]
 40838  		v.reset(OpPPC64SRW)
 40839  		v.AddArg(x)
 40840  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40841  		v0.AddArg(y)
 40842  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40843  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40844  		v2.AuxInt = -32
 40845  		v2.AddArg(y)
 40846  		v1.AddArg(v2)
 40847  		v0.AddArg(v1)
 40848  		v.AddArg(v0)
 40849  		return true
 40850  	}
 40851  }
 40852  func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
 40853  	b := v.Block
 40854  	_ = b
 40855  	typ := &b.Func.Config.Types
 40856  	_ = typ
 40857  	// match: (Rsh32Ux8 x y)
 40858  	// cond:
 40859  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 40860  	for {
 40861  		_ = v.Args[1]
 40862  		x := v.Args[0]
 40863  		y := v.Args[1]
 40864  		v.reset(OpPPC64SRW)
 40865  		v.AddArg(x)
 40866  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40867  		v0.AddArg(y)
 40868  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40869  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40870  		v2.AuxInt = -32
 40871  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40872  		v3.AddArg(y)
 40873  		v2.AddArg(v3)
 40874  		v1.AddArg(v2)
 40875  		v0.AddArg(v1)
 40876  		v.AddArg(v0)
 40877  		return true
 40878  	}
 40879  }
 40880  func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
 40881  	b := v.Block
 40882  	_ = b
 40883  	typ := &b.Func.Config.Types
 40884  	_ = typ
 40885  	// match: (Rsh32x16 x y)
 40886  	// cond:
 40887  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 40888  	for {
 40889  		_ = v.Args[1]
 40890  		x := v.Args[0]
 40891  		y := v.Args[1]
 40892  		v.reset(OpPPC64SRAW)
 40893  		v.AddArg(x)
 40894  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40895  		v0.AddArg(y)
 40896  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40897  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40898  		v2.AuxInt = -32
 40899  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40900  		v3.AddArg(y)
 40901  		v2.AddArg(v3)
 40902  		v1.AddArg(v2)
 40903  		v0.AddArg(v1)
 40904  		v.AddArg(v0)
 40905  		return true
 40906  	}
 40907  }
 40908  func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
 40909  	b := v.Block
 40910  	_ = b
 40911  	typ := &b.Func.Config.Types
 40912  	_ = typ
 40913  	// match: (Rsh32x32 x (Const64 [c]))
 40914  	// cond: uint32(c) < 32
 40915  	// result: (SRAWconst x [c])
 40916  	for {
 40917  		_ = v.Args[1]
 40918  		x := v.Args[0]
 40919  		v_1 := v.Args[1]
 40920  		if v_1.Op != OpConst64 {
 40921  			break
 40922  		}
 40923  		c := v_1.AuxInt
 40924  		if !(uint32(c) < 32) {
 40925  			break
 40926  		}
 40927  		v.reset(OpPPC64SRAWconst)
 40928  		v.AuxInt = c
 40929  		v.AddArg(x)
 40930  		return true
 40931  	}
 40932  	// match: (Rsh32x32 x (MOVDconst [c]))
 40933  	// cond: uint32(c) < 32
 40934  	// result: (SRAWconst x [c])
 40935  	for {
 40936  		_ = v.Args[1]
 40937  		x := v.Args[0]
 40938  		v_1 := v.Args[1]
 40939  		if v_1.Op != OpPPC64MOVDconst {
 40940  			break
 40941  		}
 40942  		c := v_1.AuxInt
 40943  		if !(uint32(c) < 32) {
 40944  			break
 40945  		}
 40946  		v.reset(OpPPC64SRAWconst)
 40947  		v.AuxInt = c
 40948  		v.AddArg(x)
 40949  		return true
 40950  	}
 40951  	// match: (Rsh32x32 x y)
 40952  	// cond:
 40953  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 40954  	for {
 40955  		_ = v.Args[1]
 40956  		x := v.Args[0]
 40957  		y := v.Args[1]
 40958  		v.reset(OpPPC64SRAW)
 40959  		v.AddArg(x)
 40960  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40961  		v0.AddArg(y)
 40962  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40963  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40964  		v2.AuxInt = -32
 40965  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40966  		v3.AddArg(y)
 40967  		v2.AddArg(v3)
 40968  		v1.AddArg(v2)
 40969  		v0.AddArg(v1)
 40970  		v.AddArg(v0)
 40971  		return true
 40972  	}
 40973  }
 40974  func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
 40975  	b := v.Block
 40976  	_ = b
 40977  	typ := &b.Func.Config.Types
 40978  	_ = typ
 40979  	// match: (Rsh32x64 x (Const64 [c]))
 40980  	// cond: uint64(c) < 32
 40981  	// result: (SRAWconst x [c])
 40982  	for {
 40983  		_ = v.Args[1]
 40984  		x := v.Args[0]
 40985  		v_1 := v.Args[1]
 40986  		if v_1.Op != OpConst64 {
 40987  			break
 40988  		}
 40989  		c := v_1.AuxInt
 40990  		if !(uint64(c) < 32) {
 40991  			break
 40992  		}
 40993  		v.reset(OpPPC64SRAWconst)
 40994  		v.AuxInt = c
 40995  		v.AddArg(x)
 40996  		return true
 40997  	}
 40998  	// match: (Rsh32x64 x (Const64 [c]))
 40999  	// cond: uint64(c) >= 32
 41000  	// result: (SRAWconst x [63])
 41001  	for {
 41002  		_ = v.Args[1]
 41003  		x := v.Args[0]
 41004  		v_1 := v.Args[1]
 41005  		if v_1.Op != OpConst64 {
 41006  			break
 41007  		}
 41008  		c := v_1.AuxInt
 41009  		if !(uint64(c) >= 32) {
 41010  			break
 41011  		}
 41012  		v.reset(OpPPC64SRAWconst)
 41013  		v.AuxInt = 63
 41014  		v.AddArg(x)
 41015  		return true
 41016  	}
 41017  	// match: (Rsh32x64 x (MOVDconst [c]))
 41018  	// cond: uint64(c) < 32
 41019  	// result: (SRAWconst x [c])
 41020  	for {
 41021  		_ = v.Args[1]
 41022  		x := v.Args[0]
 41023  		v_1 := v.Args[1]
 41024  		if v_1.Op != OpPPC64MOVDconst {
 41025  			break
 41026  		}
 41027  		c := v_1.AuxInt
 41028  		if !(uint64(c) < 32) {
 41029  			break
 41030  		}
 41031  		v.reset(OpPPC64SRAWconst)
 41032  		v.AuxInt = c
 41033  		v.AddArg(x)
 41034  		return true
 41035  	}
 41036  	// match: (Rsh32x64 x (AND y (MOVDconst [31])))
 41037  	// cond:
 41038  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 41039  	for {
 41040  		_ = v.Args[1]
 41041  		x := v.Args[0]
 41042  		v_1 := v.Args[1]
 41043  		if v_1.Op != OpPPC64AND {
 41044  			break
 41045  		}
 41046  		_ = v_1.Args[1]
 41047  		y := v_1.Args[0]
 41048  		v_1_1 := v_1.Args[1]
 41049  		if v_1_1.Op != OpPPC64MOVDconst {
 41050  			break
 41051  		}
 41052  		if v_1_1.AuxInt != 31 {
 41053  			break
 41054  		}
 41055  		v.reset(OpPPC64SRAW)
 41056  		v.AddArg(x)
 41057  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 41058  		v0.AuxInt = 31
 41059  		v0.AddArg(y)
 41060  		v.AddArg(v0)
 41061  		return true
 41062  	}
 41063  	// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
 41064  	// cond:
 41065  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 41066  	for {
 41067  		_ = v.Args[1]
 41068  		x := v.Args[0]
 41069  		v_1 := v.Args[1]
 41070  		if v_1.Op != OpPPC64AND {
 41071  			break
 41072  		}
 41073  		_ = v_1.Args[1]
 41074  		v_1_0 := v_1.Args[0]
 41075  		if v_1_0.Op != OpPPC64MOVDconst {
 41076  			break
 41077  		}
 41078  		if v_1_0.AuxInt != 31 {
 41079  			break
 41080  		}
 41081  		y := v_1.Args[1]
 41082  		v.reset(OpPPC64SRAW)
 41083  		v.AddArg(x)
 41084  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 41085  		v0.AuxInt = 31
 41086  		v0.AddArg(y)
 41087  		v.AddArg(v0)
 41088  		return true
 41089  	}
 41090  	// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
 41091  	// cond:
 41092  	// result: (SRAW x (ANDconst <typ.UInt> [31] y))
 41093  	for {
 41094  		_ = v.Args[1]
 41095  		x := v.Args[0]
 41096  		v_1 := v.Args[1]
 41097  		if v_1.Op != OpPPC64ANDconst {
 41098  			break
 41099  		}
 41100  		if v_1.Type != typ.UInt {
 41101  			break
 41102  		}
 41103  		if v_1.AuxInt != 31 {
 41104  			break
 41105  		}
 41106  		y := v_1.Args[0]
 41107  		v.reset(OpPPC64SRAW)
 41108  		v.AddArg(x)
 41109  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41110  		v0.AuxInt = 31
 41111  		v0.AddArg(y)
 41112  		v.AddArg(v0)
 41113  		return true
 41114  	}
 41115  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41116  	// cond:
 41117  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41118  	for {
 41119  		_ = v.Args[1]
 41120  		x := v.Args[0]
 41121  		v_1 := v.Args[1]
 41122  		if v_1.Op != OpPPC64SUB {
 41123  			break
 41124  		}
 41125  		if v_1.Type != typ.UInt {
 41126  			break
 41127  		}
 41128  		_ = v_1.Args[1]
 41129  		v_1_0 := v_1.Args[0]
 41130  		if v_1_0.Op != OpPPC64MOVDconst {
 41131  			break
 41132  		}
 41133  		if v_1_0.AuxInt != 32 {
 41134  			break
 41135  		}
 41136  		v_1_1 := v_1.Args[1]
 41137  		if v_1_1.Op != OpPPC64ANDconst {
 41138  			break
 41139  		}
 41140  		if v_1_1.Type != typ.UInt {
 41141  			break
 41142  		}
 41143  		if v_1_1.AuxInt != 31 {
 41144  			break
 41145  		}
 41146  		y := v_1_1.Args[0]
 41147  		v.reset(OpPPC64SRAW)
 41148  		v.AddArg(x)
 41149  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41150  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41151  		v1.AuxInt = 32
 41152  		v0.AddArg(v1)
 41153  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41154  		v2.AuxInt = 31
 41155  		v2.AddArg(y)
 41156  		v0.AddArg(v2)
 41157  		v.AddArg(v0)
 41158  		return true
 41159  	}
 41160  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 41161  	// cond:
 41162  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41163  	for {
 41164  		_ = v.Args[1]
 41165  		x := v.Args[0]
 41166  		v_1 := v.Args[1]
 41167  		if v_1.Op != OpPPC64SUB {
 41168  			break
 41169  		}
 41170  		if v_1.Type != typ.UInt {
 41171  			break
 41172  		}
 41173  		_ = v_1.Args[1]
 41174  		v_1_0 := v_1.Args[0]
 41175  		if v_1_0.Op != OpPPC64MOVDconst {
 41176  			break
 41177  		}
 41178  		if v_1_0.AuxInt != 32 {
 41179  			break
 41180  		}
 41181  		v_1_1 := v_1.Args[1]
 41182  		if v_1_1.Op != OpPPC64AND {
 41183  			break
 41184  		}
 41185  		if v_1_1.Type != typ.UInt {
 41186  			break
 41187  		}
 41188  		_ = v_1_1.Args[1]
 41189  		y := v_1_1.Args[0]
 41190  		v_1_1_1 := v_1_1.Args[1]
 41191  		if v_1_1_1.Op != OpPPC64MOVDconst {
 41192  			break
 41193  		}
 41194  		if v_1_1_1.AuxInt != 31 {
 41195  			break
 41196  		}
 41197  		v.reset(OpPPC64SRAW)
 41198  		v.AddArg(x)
 41199  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41200  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41201  		v1.AuxInt = 32
 41202  		v0.AddArg(v1)
 41203  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41204  		v2.AuxInt = 31
 41205  		v2.AddArg(y)
 41206  		v0.AddArg(v2)
 41207  		v.AddArg(v0)
 41208  		return true
 41209  	}
 41210  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 41211  	// cond:
 41212  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41213  	for {
 41214  		_ = v.Args[1]
 41215  		x := v.Args[0]
 41216  		v_1 := v.Args[1]
 41217  		if v_1.Op != OpPPC64SUB {
 41218  			break
 41219  		}
 41220  		if v_1.Type != typ.UInt {
 41221  			break
 41222  		}
 41223  		_ = v_1.Args[1]
 41224  		v_1_0 := v_1.Args[0]
 41225  		if v_1_0.Op != OpPPC64MOVDconst {
 41226  			break
 41227  		}
 41228  		if v_1_0.AuxInt != 32 {
 41229  			break
 41230  		}
 41231  		v_1_1 := v_1.Args[1]
 41232  		if v_1_1.Op != OpPPC64AND {
 41233  			break
 41234  		}
 41235  		if v_1_1.Type != typ.UInt {
 41236  			break
 41237  		}
 41238  		_ = v_1_1.Args[1]
 41239  		v_1_1_0 := v_1_1.Args[0]
 41240  		if v_1_1_0.Op != OpPPC64MOVDconst {
 41241  			break
 41242  		}
 41243  		if v_1_1_0.AuxInt != 31 {
 41244  			break
 41245  		}
 41246  		y := v_1_1.Args[1]
 41247  		v.reset(OpPPC64SRAW)
 41248  		v.AddArg(x)
 41249  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41250  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41251  		v1.AuxInt = 32
 41252  		v0.AddArg(v1)
 41253  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41254  		v2.AuxInt = 31
 41255  		v2.AddArg(y)
 41256  		v0.AddArg(v2)
 41257  		v.AddArg(v0)
 41258  		return true
 41259  	}
 41260  	// match: (Rsh32x64 x y)
 41261  	// cond:
 41262  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 41263  	for {
 41264  		_ = v.Args[1]
 41265  		x := v.Args[0]
 41266  		y := v.Args[1]
 41267  		v.reset(OpPPC64SRAW)
 41268  		v.AddArg(x)
 41269  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41270  		v0.AddArg(y)
 41271  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41272  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41273  		v2.AuxInt = -32
 41274  		v2.AddArg(y)
 41275  		v1.AddArg(v2)
 41276  		v0.AddArg(v1)
 41277  		v.AddArg(v0)
 41278  		return true
 41279  	}
 41280  }
 41281  func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
 41282  	b := v.Block
 41283  	_ = b
 41284  	typ := &b.Func.Config.Types
 41285  	_ = typ
 41286  	// match: (Rsh32x8 x y)
 41287  	// cond:
 41288  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 41289  	for {
 41290  		_ = v.Args[1]
 41291  		x := v.Args[0]
 41292  		y := v.Args[1]
 41293  		v.reset(OpPPC64SRAW)
 41294  		v.AddArg(x)
 41295  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41296  		v0.AddArg(y)
 41297  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41298  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41299  		v2.AuxInt = -32
 41300  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 41301  		v3.AddArg(y)
 41302  		v2.AddArg(v3)
 41303  		v1.AddArg(v2)
 41304  		v0.AddArg(v1)
 41305  		v.AddArg(v0)
 41306  		return true
 41307  	}
 41308  }
 41309  func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
 41310  	b := v.Block
 41311  	_ = b
 41312  	typ := &b.Func.Config.Types
 41313  	_ = typ
 41314  	// match: (Rsh64Ux16 x y)
 41315  	// cond:
 41316  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 41317  	for {
 41318  		_ = v.Args[1]
 41319  		x := v.Args[0]
 41320  		y := v.Args[1]
 41321  		v.reset(OpPPC64SRD)
 41322  		v.AddArg(x)
 41323  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41324  		v0.AddArg(y)
 41325  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41326  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41327  		v2.AuxInt = -64
 41328  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 41329  		v3.AddArg(y)
 41330  		v2.AddArg(v3)
 41331  		v1.AddArg(v2)
 41332  		v0.AddArg(v1)
 41333  		v.AddArg(v0)
 41334  		return true
 41335  	}
 41336  }
 41337  func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
 41338  	b := v.Block
 41339  	_ = b
 41340  	typ := &b.Func.Config.Types
 41341  	_ = typ
 41342  	// match: (Rsh64Ux32 x (Const64 [c]))
 41343  	// cond: uint32(c) < 64
 41344  	// result: (SRDconst x [c])
 41345  	for {
 41346  		_ = v.Args[1]
 41347  		x := v.Args[0]
 41348  		v_1 := v.Args[1]
 41349  		if v_1.Op != OpConst64 {
 41350  			break
 41351  		}
 41352  		c := v_1.AuxInt
 41353  		if !(uint32(c) < 64) {
 41354  			break
 41355  		}
 41356  		v.reset(OpPPC64SRDconst)
 41357  		v.AuxInt = c
 41358  		v.AddArg(x)
 41359  		return true
 41360  	}
 41361  	// match: (Rsh64Ux32 x (MOVDconst [c]))
 41362  	// cond: uint32(c) < 64
 41363  	// result: (SRDconst x [c])
 41364  	for {
 41365  		_ = v.Args[1]
 41366  		x := v.Args[0]
 41367  		v_1 := v.Args[1]
 41368  		if v_1.Op != OpPPC64MOVDconst {
 41369  			break
 41370  		}
 41371  		c := v_1.AuxInt
 41372  		if !(uint32(c) < 64) {
 41373  			break
 41374  		}
 41375  		v.reset(OpPPC64SRDconst)
 41376  		v.AuxInt = c
 41377  		v.AddArg(x)
 41378  		return true
 41379  	}
 41380  	// match: (Rsh64Ux32 x y)
 41381  	// cond:
 41382  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 41383  	for {
 41384  		_ = v.Args[1]
 41385  		x := v.Args[0]
 41386  		y := v.Args[1]
 41387  		v.reset(OpPPC64SRD)
 41388  		v.AddArg(x)
 41389  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41390  		v0.AddArg(y)
 41391  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41392  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41393  		v2.AuxInt = -64
 41394  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 41395  		v3.AddArg(y)
 41396  		v2.AddArg(v3)
 41397  		v1.AddArg(v2)
 41398  		v0.AddArg(v1)
 41399  		v.AddArg(v0)
 41400  		return true
 41401  	}
 41402  }
 41403  func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
 41404  	b := v.Block
 41405  	_ = b
 41406  	typ := &b.Func.Config.Types
 41407  	_ = typ
 41408  	// match: (Rsh64Ux64 x (Const64 [c]))
 41409  	// cond: uint64(c) < 64
 41410  	// result: (SRDconst x [c])
 41411  	for {
 41412  		_ = v.Args[1]
 41413  		x := v.Args[0]
 41414  		v_1 := v.Args[1]
 41415  		if v_1.Op != OpConst64 {
 41416  			break
 41417  		}
 41418  		c := v_1.AuxInt
 41419  		if !(uint64(c) < 64) {
 41420  			break
 41421  		}
 41422  		v.reset(OpPPC64SRDconst)
 41423  		v.AuxInt = c
 41424  		v.AddArg(x)
 41425  		return true
 41426  	}
 41427  	// match: (Rsh64Ux64 _ (Const64 [c]))
 41428  	// cond: uint64(c) >= 64
 41429  	// result: (MOVDconst [0])
 41430  	for {
 41431  		_ = v.Args[1]
 41432  		v_1 := v.Args[1]
 41433  		if v_1.Op != OpConst64 {
 41434  			break
 41435  		}
 41436  		c := v_1.AuxInt
 41437  		if !(uint64(c) >= 64) {
 41438  			break
 41439  		}
 41440  		v.reset(OpPPC64MOVDconst)
 41441  		v.AuxInt = 0
 41442  		return true
 41443  	}
 41444  	// match: (Rsh64Ux64 x (MOVDconst [c]))
 41445  	// cond: uint64(c) < 64
 41446  	// result: (SRDconst x [c])
 41447  	for {
 41448  		_ = v.Args[1]
 41449  		x := v.Args[0]
 41450  		v_1 := v.Args[1]
 41451  		if v_1.Op != OpPPC64MOVDconst {
 41452  			break
 41453  		}
 41454  		c := v_1.AuxInt
 41455  		if !(uint64(c) < 64) {
 41456  			break
 41457  		}
 41458  		v.reset(OpPPC64SRDconst)
 41459  		v.AuxInt = c
 41460  		v.AddArg(x)
 41461  		return true
 41462  	}
 41463  	// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
 41464  	// cond:
 41465  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 41466  	for {
 41467  		_ = v.Args[1]
 41468  		x := v.Args[0]
 41469  		v_1 := v.Args[1]
 41470  		if v_1.Op != OpPPC64AND {
 41471  			break
 41472  		}
 41473  		_ = v_1.Args[1]
 41474  		y := v_1.Args[0]
 41475  		v_1_1 := v_1.Args[1]
 41476  		if v_1_1.Op != OpPPC64MOVDconst {
 41477  			break
 41478  		}
 41479  		if v_1_1.AuxInt != 63 {
 41480  			break
 41481  		}
 41482  		v.reset(OpPPC64SRD)
 41483  		v.AddArg(x)
 41484  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41485  		v0.AuxInt = 63
 41486  		v0.AddArg(y)
 41487  		v.AddArg(v0)
 41488  		return true
 41489  	}
 41490  	// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
 41491  	// cond:
 41492  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 41493  	for {
 41494  		_ = v.Args[1]
 41495  		x := v.Args[0]
 41496  		v_1 := v.Args[1]
 41497  		if v_1.Op != OpPPC64AND {
 41498  			break
 41499  		}
 41500  		_ = v_1.Args[1]
 41501  		v_1_0 := v_1.Args[0]
 41502  		if v_1_0.Op != OpPPC64MOVDconst {
 41503  			break
 41504  		}
 41505  		if v_1_0.AuxInt != 63 {
 41506  			break
 41507  		}
 41508  		y := v_1.Args[1]
 41509  		v.reset(OpPPC64SRD)
 41510  		v.AddArg(x)
 41511  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41512  		v0.AuxInt = 63
 41513  		v0.AddArg(y)
 41514  		v.AddArg(v0)
 41515  		return true
 41516  	}
 41517  	// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
 41518  	// cond:
 41519  	// result: (SRD x (ANDconst <typ.UInt> [63] y))
 41520  	for {
 41521  		_ = v.Args[1]
 41522  		x := v.Args[0]
 41523  		v_1 := v.Args[1]
 41524  		if v_1.Op != OpPPC64ANDconst {
 41525  			break
 41526  		}
 41527  		if v_1.Type != typ.UInt {
 41528  			break
 41529  		}
 41530  		if v_1.AuxInt != 63 {
 41531  			break
 41532  		}
 41533  		y := v_1.Args[0]
 41534  		v.reset(OpPPC64SRD)
 41535  		v.AddArg(x)
 41536  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41537  		v0.AuxInt = 63
 41538  		v0.AddArg(y)
 41539  		v.AddArg(v0)
 41540  		return true
 41541  	}
 41542  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41543  	// cond:
 41544  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41545  	for {
 41546  		_ = v.Args[1]
 41547  		x := v.Args[0]
 41548  		v_1 := v.Args[1]
 41549  		if v_1.Op != OpPPC64SUB {
 41550  			break
 41551  		}
 41552  		if v_1.Type != typ.UInt {
 41553  			break
 41554  		}
 41555  		_ = v_1.Args[1]
 41556  		v_1_0 := v_1.Args[0]
 41557  		if v_1_0.Op != OpPPC64MOVDconst {
 41558  			break
 41559  		}
 41560  		if v_1_0.AuxInt != 64 {
 41561  			break
 41562  		}
 41563  		v_1_1 := v_1.Args[1]
 41564  		if v_1_1.Op != OpPPC64ANDconst {
 41565  			break
 41566  		}
 41567  		if v_1_1.Type != typ.UInt {
 41568  			break
 41569  		}
 41570  		if v_1_1.AuxInt != 63 {
 41571  			break
 41572  		}
 41573  		y := v_1_1.Args[0]
 41574  		v.reset(OpPPC64SRD)
 41575  		v.AddArg(x)
 41576  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41577  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41578  		v1.AuxInt = 64
 41579  		v0.AddArg(v1)
 41580  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41581  		v2.AuxInt = 63
 41582  		v2.AddArg(y)
 41583  		v0.AddArg(v2)
 41584  		v.AddArg(v0)
 41585  		return true
 41586  	}
 41587  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 41588  	// cond:
 41589  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41590  	for {
 41591  		_ = v.Args[1]
 41592  		x := v.Args[0]
 41593  		v_1 := v.Args[1]
 41594  		if v_1.Op != OpPPC64SUB {
 41595  			break
 41596  		}
 41597  		if v_1.Type != typ.UInt {
 41598  			break
 41599  		}
 41600  		_ = v_1.Args[1]
 41601  		v_1_0 := v_1.Args[0]
 41602  		if v_1_0.Op != OpPPC64MOVDconst {
 41603  			break
 41604  		}
 41605  		if v_1_0.AuxInt != 64 {
 41606  			break
 41607  		}
 41608  		v_1_1 := v_1.Args[1]
 41609  		if v_1_1.Op != OpPPC64AND {
 41610  			break
 41611  		}
 41612  		if v_1_1.Type != typ.UInt {
 41613  			break
 41614  		}
 41615  		_ = v_1_1.Args[1]
 41616  		y := v_1_1.Args[0]
 41617  		v_1_1_1 := v_1_1.Args[1]
 41618  		if v_1_1_1.Op != OpPPC64MOVDconst {
 41619  			break
 41620  		}
 41621  		if v_1_1_1.AuxInt != 63 {
 41622  			break
 41623  		}
 41624  		v.reset(OpPPC64SRD)
 41625  		v.AddArg(x)
 41626  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41627  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41628  		v1.AuxInt = 64
 41629  		v0.AddArg(v1)
 41630  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41631  		v2.AuxInt = 63
 41632  		v2.AddArg(y)
 41633  		v0.AddArg(v2)
 41634  		v.AddArg(v0)
 41635  		return true
 41636  	}
 41637  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 41638  	// cond:
 41639  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41640  	for {
 41641  		_ = v.Args[1]
 41642  		x := v.Args[0]
 41643  		v_1 := v.Args[1]
 41644  		if v_1.Op != OpPPC64SUB {
 41645  			break
 41646  		}
 41647  		if v_1.Type != typ.UInt {
 41648  			break
 41649  		}
 41650  		_ = v_1.Args[1]
 41651  		v_1_0 := v_1.Args[0]
 41652  		if v_1_0.Op != OpPPC64MOVDconst {
 41653  			break
 41654  		}
 41655  		if v_1_0.AuxInt != 64 {
 41656  			break
 41657  		}
 41658  		v_1_1 := v_1.Args[1]
 41659  		if v_1_1.Op != OpPPC64AND {
 41660  			break
 41661  		}
 41662  		if v_1_1.Type != typ.UInt {
 41663  			break
 41664  		}
 41665  		_ = v_1_1.Args[1]
 41666  		v_1_1_0 := v_1_1.Args[0]
 41667  		if v_1_1_0.Op != OpPPC64MOVDconst {
 41668  			break
 41669  		}
 41670  		if v_1_1_0.AuxInt != 63 {
 41671  			break
 41672  		}
 41673  		y := v_1_1.Args[1]
 41674  		v.reset(OpPPC64SRD)
 41675  		v.AddArg(x)
 41676  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41677  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41678  		v1.AuxInt = 64
 41679  		v0.AddArg(v1)
 41680  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41681  		v2.AuxInt = 63
 41682  		v2.AddArg(y)
 41683  		v0.AddArg(v2)
 41684  		v.AddArg(v0)
 41685  		return true
 41686  	}
 41687  	// match: (Rsh64Ux64 x y)
 41688  	// cond:
 41689  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 41690  	for {
 41691  		_ = v.Args[1]
 41692  		x := v.Args[0]
 41693  		y := v.Args[1]
 41694  		v.reset(OpPPC64SRD)
 41695  		v.AddArg(x)
 41696  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41697  		v0.AddArg(y)
 41698  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41699  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41700  		v2.AuxInt = -64
 41701  		v2.AddArg(y)
 41702  		v1.AddArg(v2)
 41703  		v0.AddArg(v1)
 41704  		v.AddArg(v0)
 41705  		return true
 41706  	}
 41707  }
 41708  func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
 41709  	b := v.Block
 41710  	_ = b
 41711  	typ := &b.Func.Config.Types
 41712  	_ = typ
 41713  	// match: (Rsh64Ux8 x y)
 41714  	// cond:
 41715  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 41716  	for {
 41717  		_ = v.Args[1]
 41718  		x := v.Args[0]
 41719  		y := v.Args[1]
 41720  		v.reset(OpPPC64SRD)
 41721  		v.AddArg(x)
 41722  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41723  		v0.AddArg(y)
 41724  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41725  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41726  		v2.AuxInt = -64
 41727  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 41728  		v3.AddArg(y)
 41729  		v2.AddArg(v3)
 41730  		v1.AddArg(v2)
 41731  		v0.AddArg(v1)
 41732  		v.AddArg(v0)
 41733  		return true
 41734  	}
 41735  }
 41736  func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
 41737  	b := v.Block
 41738  	_ = b
 41739  	typ := &b.Func.Config.Types
 41740  	_ = typ
 41741  	// match: (Rsh64x16 x y)
 41742  	// cond:
 41743  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 41744  	for {
 41745  		_ = v.Args[1]
 41746  		x := v.Args[0]
 41747  		y := v.Args[1]
 41748  		v.reset(OpPPC64SRAD)
 41749  		v.AddArg(x)
 41750  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41751  		v0.AddArg(y)
 41752  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41753  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41754  		v2.AuxInt = -64
 41755  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 41756  		v3.AddArg(y)
 41757  		v2.AddArg(v3)
 41758  		v1.AddArg(v2)
 41759  		v0.AddArg(v1)
 41760  		v.AddArg(v0)
 41761  		return true
 41762  	}
 41763  }
 41764  func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
 41765  	b := v.Block
 41766  	_ = b
 41767  	typ := &b.Func.Config.Types
 41768  	_ = typ
 41769  	// match: (Rsh64x32 x (Const64 [c]))
 41770  	// cond: uint32(c) < 64
 41771  	// result: (SRADconst x [c])
 41772  	for {
 41773  		_ = v.Args[1]
 41774  		x := v.Args[0]
 41775  		v_1 := v.Args[1]
 41776  		if v_1.Op != OpConst64 {
 41777  			break
 41778  		}
 41779  		c := v_1.AuxInt
 41780  		if !(uint32(c) < 64) {
 41781  			break
 41782  		}
 41783  		v.reset(OpPPC64SRADconst)
 41784  		v.AuxInt = c
 41785  		v.AddArg(x)
 41786  		return true
 41787  	}
 41788  	// match: (Rsh64x32 x (MOVDconst [c]))
 41789  	// cond: uint32(c) < 64
 41790  	// result: (SRADconst x [c])
 41791  	for {
 41792  		_ = v.Args[1]
 41793  		x := v.Args[0]
 41794  		v_1 := v.Args[1]
 41795  		if v_1.Op != OpPPC64MOVDconst {
 41796  			break
 41797  		}
 41798  		c := v_1.AuxInt
 41799  		if !(uint32(c) < 64) {
 41800  			break
 41801  		}
 41802  		v.reset(OpPPC64SRADconst)
 41803  		v.AuxInt = c
 41804  		v.AddArg(x)
 41805  		return true
 41806  	}
 41807  	// match: (Rsh64x32 x y)
 41808  	// cond:
 41809  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 41810  	for {
 41811  		_ = v.Args[1]
 41812  		x := v.Args[0]
 41813  		y := v.Args[1]
 41814  		v.reset(OpPPC64SRAD)
 41815  		v.AddArg(x)
 41816  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41817  		v0.AddArg(y)
 41818  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41819  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41820  		v2.AuxInt = -64
 41821  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 41822  		v3.AddArg(y)
 41823  		v2.AddArg(v3)
 41824  		v1.AddArg(v2)
 41825  		v0.AddArg(v1)
 41826  		v.AddArg(v0)
 41827  		return true
 41828  	}
 41829  }
 41830  func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
 41831  	b := v.Block
 41832  	_ = b
 41833  	typ := &b.Func.Config.Types
 41834  	_ = typ
 41835  	// match: (Rsh64x64 x (Const64 [c]))
 41836  	// cond: uint64(c) < 64
 41837  	// result: (SRADconst x [c])
 41838  	for {
 41839  		_ = v.Args[1]
 41840  		x := v.Args[0]
 41841  		v_1 := v.Args[1]
 41842  		if v_1.Op != OpConst64 {
 41843  			break
 41844  		}
 41845  		c := v_1.AuxInt
 41846  		if !(uint64(c) < 64) {
 41847  			break
 41848  		}
 41849  		v.reset(OpPPC64SRADconst)
 41850  		v.AuxInt = c
 41851  		v.AddArg(x)
 41852  		return true
 41853  	}
 41854  	// match: (Rsh64x64 x (Const64 [c]))
 41855  	// cond: uint64(c) >= 64
 41856  	// result: (SRADconst x [63])
 41857  	for {
 41858  		_ = v.Args[1]
 41859  		x := v.Args[0]
 41860  		v_1 := v.Args[1]
 41861  		if v_1.Op != OpConst64 {
 41862  			break
 41863  		}
 41864  		c := v_1.AuxInt
 41865  		if !(uint64(c) >= 64) {
 41866  			break
 41867  		}
 41868  		v.reset(OpPPC64SRADconst)
 41869  		v.AuxInt = 63
 41870  		v.AddArg(x)
 41871  		return true
 41872  	}
 41873  	// match: (Rsh64x64 x (MOVDconst [c]))
 41874  	// cond: uint64(c) < 64
 41875  	// result: (SRADconst x [c])
 41876  	for {
 41877  		_ = v.Args[1]
 41878  		x := v.Args[0]
 41879  		v_1 := v.Args[1]
 41880  		if v_1.Op != OpPPC64MOVDconst {
 41881  			break
 41882  		}
 41883  		c := v_1.AuxInt
 41884  		if !(uint64(c) < 64) {
 41885  			break
 41886  		}
 41887  		v.reset(OpPPC64SRADconst)
 41888  		v.AuxInt = c
 41889  		v.AddArg(x)
 41890  		return true
 41891  	}
 41892  	// match: (Rsh64x64 x (AND y (MOVDconst [63])))
 41893  	// cond:
 41894  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 41895  	for {
 41896  		_ = v.Args[1]
 41897  		x := v.Args[0]
 41898  		v_1 := v.Args[1]
 41899  		if v_1.Op != OpPPC64AND {
 41900  			break
 41901  		}
 41902  		_ = v_1.Args[1]
 41903  		y := v_1.Args[0]
 41904  		v_1_1 := v_1.Args[1]
 41905  		if v_1_1.Op != OpPPC64MOVDconst {
 41906  			break
 41907  		}
 41908  		if v_1_1.AuxInt != 63 {
 41909  			break
 41910  		}
 41911  		v.reset(OpPPC64SRAD)
 41912  		v.AddArg(x)
 41913  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41914  		v0.AuxInt = 63
 41915  		v0.AddArg(y)
 41916  		v.AddArg(v0)
 41917  		return true
 41918  	}
 41919  	// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
 41920  	// cond:
 41921  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 41922  	for {
 41923  		_ = v.Args[1]
 41924  		x := v.Args[0]
 41925  		v_1 := v.Args[1]
 41926  		if v_1.Op != OpPPC64AND {
 41927  			break
 41928  		}
 41929  		_ = v_1.Args[1]
 41930  		v_1_0 := v_1.Args[0]
 41931  		if v_1_0.Op != OpPPC64MOVDconst {
 41932  			break
 41933  		}
 41934  		if v_1_0.AuxInt != 63 {
 41935  			break
 41936  		}
 41937  		y := v_1.Args[1]
 41938  		v.reset(OpPPC64SRAD)
 41939  		v.AddArg(x)
 41940  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41941  		v0.AuxInt = 63
 41942  		v0.AddArg(y)
 41943  		v.AddArg(v0)
 41944  		return true
 41945  	}
 41946  	// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
 41947  	// cond:
 41948  	// result: (SRAD x (ANDconst <typ.UInt> [63] y))
 41949  	for {
 41950  		_ = v.Args[1]
 41951  		x := v.Args[0]
 41952  		v_1 := v.Args[1]
 41953  		if v_1.Op != OpPPC64ANDconst {
 41954  			break
 41955  		}
 41956  		if v_1.Type != typ.UInt {
 41957  			break
 41958  		}
 41959  		if v_1.AuxInt != 63 {
 41960  			break
 41961  		}
 41962  		y := v_1.Args[0]
 41963  		v.reset(OpPPC64SRAD)
 41964  		v.AddArg(x)
 41965  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41966  		v0.AuxInt = 63
 41967  		v0.AddArg(y)
 41968  		v.AddArg(v0)
 41969  		return true
 41970  	}
 41971  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41972  	// cond:
 41973  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41974  	for {
 41975  		_ = v.Args[1]
 41976  		x := v.Args[0]
 41977  		v_1 := v.Args[1]
 41978  		if v_1.Op != OpPPC64SUB {
 41979  			break
 41980  		}
 41981  		if v_1.Type != typ.UInt {
 41982  			break
 41983  		}
 41984  		_ = v_1.Args[1]
 41985  		v_1_0 := v_1.Args[0]
 41986  		if v_1_0.Op != OpPPC64MOVDconst {
 41987  			break
 41988  		}
 41989  		if v_1_0.AuxInt != 64 {
 41990  			break
 41991  		}
 41992  		v_1_1 := v_1.Args[1]
 41993  		if v_1_1.Op != OpPPC64ANDconst {
 41994  			break
 41995  		}
 41996  		if v_1_1.Type != typ.UInt {
 41997  			break
 41998  		}
 41999  		if v_1_1.AuxInt != 63 {
 42000  			break
 42001  		}
 42002  		y := v_1_1.Args[0]
 42003  		v.reset(OpPPC64SRAD)
 42004  		v.AddArg(x)
 42005  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42006  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42007  		v1.AuxInt = 64
 42008  		v0.AddArg(v1)
 42009  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42010  		v2.AuxInt = 63
 42011  		v2.AddArg(y)
 42012  		v0.AddArg(v2)
 42013  		v.AddArg(v0)
 42014  		return true
 42015  	}
 42016  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 42017  	// cond:
 42018  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 42019  	for {
 42020  		_ = v.Args[1]
 42021  		x := v.Args[0]
 42022  		v_1 := v.Args[1]
 42023  		if v_1.Op != OpPPC64SUB {
 42024  			break
 42025  		}
 42026  		if v_1.Type != typ.UInt {
 42027  			break
 42028  		}
 42029  		_ = v_1.Args[1]
 42030  		v_1_0 := v_1.Args[0]
 42031  		if v_1_0.Op != OpPPC64MOVDconst {
 42032  			break
 42033  		}
 42034  		if v_1_0.AuxInt != 64 {
 42035  			break
 42036  		}
 42037  		v_1_1 := v_1.Args[1]
 42038  		if v_1_1.Op != OpPPC64AND {
 42039  			break
 42040  		}
 42041  		if v_1_1.Type != typ.UInt {
 42042  			break
 42043  		}
 42044  		_ = v_1_1.Args[1]
 42045  		y := v_1_1.Args[0]
 42046  		v_1_1_1 := v_1_1.Args[1]
 42047  		if v_1_1_1.Op != OpPPC64MOVDconst {
 42048  			break
 42049  		}
 42050  		if v_1_1_1.AuxInt != 63 {
 42051  			break
 42052  		}
 42053  		v.reset(OpPPC64SRAD)
 42054  		v.AddArg(x)
 42055  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42056  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42057  		v1.AuxInt = 64
 42058  		v0.AddArg(v1)
 42059  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42060  		v2.AuxInt = 63
 42061  		v2.AddArg(y)
 42062  		v0.AddArg(v2)
 42063  		v.AddArg(v0)
 42064  		return true
 42065  	}
 42066  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 42067  	// cond:
 42068  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 42069  	for {
 42070  		_ = v.Args[1]
 42071  		x := v.Args[0]
 42072  		v_1 := v.Args[1]
 42073  		if v_1.Op != OpPPC64SUB {
 42074  			break
 42075  		}
 42076  		if v_1.Type != typ.UInt {
 42077  			break
 42078  		}
 42079  		_ = v_1.Args[1]
 42080  		v_1_0 := v_1.Args[0]
 42081  		if v_1_0.Op != OpPPC64MOVDconst {
 42082  			break
 42083  		}
 42084  		if v_1_0.AuxInt != 64 {
 42085  			break
 42086  		}
 42087  		v_1_1 := v_1.Args[1]
 42088  		if v_1_1.Op != OpPPC64AND {
 42089  			break
 42090  		}
 42091  		if v_1_1.Type != typ.UInt {
 42092  			break
 42093  		}
 42094  		_ = v_1_1.Args[1]
 42095  		v_1_1_0 := v_1_1.Args[0]
 42096  		if v_1_1_0.Op != OpPPC64MOVDconst {
 42097  			break
 42098  		}
 42099  		if v_1_1_0.AuxInt != 63 {
 42100  			break
 42101  		}
 42102  		y := v_1_1.Args[1]
 42103  		v.reset(OpPPC64SRAD)
 42104  		v.AddArg(x)
 42105  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42106  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42107  		v1.AuxInt = 64
 42108  		v0.AddArg(v1)
 42109  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42110  		v2.AuxInt = 63
 42111  		v2.AddArg(y)
 42112  		v0.AddArg(v2)
 42113  		v.AddArg(v0)
 42114  		return true
 42115  	}
 42116  	// match: (Rsh64x64 x y)
 42117  	// cond:
 42118  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 42119  	for {
 42120  		_ = v.Args[1]
 42121  		x := v.Args[0]
 42122  		y := v.Args[1]
 42123  		v.reset(OpPPC64SRAD)
 42124  		v.AddArg(x)
 42125  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42126  		v0.AddArg(y)
 42127  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42128  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42129  		v2.AuxInt = -64
 42130  		v2.AddArg(y)
 42131  		v1.AddArg(v2)
 42132  		v0.AddArg(v1)
 42133  		v.AddArg(v0)
 42134  		return true
 42135  	}
 42136  }
 42137  func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
 42138  	b := v.Block
 42139  	_ = b
 42140  	typ := &b.Func.Config.Types
 42141  	_ = typ
 42142  	// match: (Rsh64x8 x y)
 42143  	// cond:
 42144  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 42145  	for {
 42146  		_ = v.Args[1]
 42147  		x := v.Args[0]
 42148  		y := v.Args[1]
 42149  		v.reset(OpPPC64SRAD)
 42150  		v.AddArg(x)
 42151  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42152  		v0.AddArg(y)
 42153  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42154  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42155  		v2.AuxInt = -64
 42156  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42157  		v3.AddArg(y)
 42158  		v2.AddArg(v3)
 42159  		v1.AddArg(v2)
 42160  		v0.AddArg(v1)
 42161  		v.AddArg(v0)
 42162  		return true
 42163  	}
 42164  }
 42165  func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
 42166  	b := v.Block
 42167  	_ = b
 42168  	typ := &b.Func.Config.Types
 42169  	_ = typ
 42170  	// match: (Rsh8Ux16 x y)
 42171  	// cond:
 42172  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 42173  	for {
 42174  		_ = v.Args[1]
 42175  		x := v.Args[0]
 42176  		y := v.Args[1]
 42177  		v.reset(OpPPC64SRW)
 42178  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42179  		v0.AddArg(x)
 42180  		v.AddArg(v0)
 42181  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42182  		v1.AddArg(y)
 42183  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42184  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42185  		v3.AuxInt = -8
 42186  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 42187  		v4.AddArg(y)
 42188  		v3.AddArg(v4)
 42189  		v2.AddArg(v3)
 42190  		v1.AddArg(v2)
 42191  		v.AddArg(v1)
 42192  		return true
 42193  	}
 42194  }
 42195  func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
 42196  	b := v.Block
 42197  	_ = b
 42198  	typ := &b.Func.Config.Types
 42199  	_ = typ
 42200  	// match: (Rsh8Ux32 x (Const64 [c]))
 42201  	// cond: uint32(c) < 8
 42202  	// result: (SRWconst (ZeroExt8to32 x) [c])
 42203  	for {
 42204  		_ = v.Args[1]
 42205  		x := v.Args[0]
 42206  		v_1 := v.Args[1]
 42207  		if v_1.Op != OpConst64 {
 42208  			break
 42209  		}
 42210  		c := v_1.AuxInt
 42211  		if !(uint32(c) < 8) {
 42212  			break
 42213  		}
 42214  		v.reset(OpPPC64SRWconst)
 42215  		v.AuxInt = c
 42216  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42217  		v0.AddArg(x)
 42218  		v.AddArg(v0)
 42219  		return true
 42220  	}
 42221  	// match: (Rsh8Ux32 x (MOVDconst [c]))
 42222  	// cond: uint32(c) < 8
 42223  	// result: (SRWconst (ZeroExt8to32 x) [c])
 42224  	for {
 42225  		_ = v.Args[1]
 42226  		x := v.Args[0]
 42227  		v_1 := v.Args[1]
 42228  		if v_1.Op != OpPPC64MOVDconst {
 42229  			break
 42230  		}
 42231  		c := v_1.AuxInt
 42232  		if !(uint32(c) < 8) {
 42233  			break
 42234  		}
 42235  		v.reset(OpPPC64SRWconst)
 42236  		v.AuxInt = c
 42237  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42238  		v0.AddArg(x)
 42239  		v.AddArg(v0)
 42240  		return true
 42241  	}
 42242  	// match: (Rsh8Ux32 x y)
 42243  	// cond:
 42244  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 42245  	for {
 42246  		_ = v.Args[1]
 42247  		x := v.Args[0]
 42248  		y := v.Args[1]
 42249  		v.reset(OpPPC64SRW)
 42250  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42251  		v0.AddArg(x)
 42252  		v.AddArg(v0)
 42253  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42254  		v1.AddArg(y)
 42255  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42256  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42257  		v3.AuxInt = -8
 42258  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 42259  		v4.AddArg(y)
 42260  		v3.AddArg(v4)
 42261  		v2.AddArg(v3)
 42262  		v1.AddArg(v2)
 42263  		v.AddArg(v1)
 42264  		return true
 42265  	}
 42266  }
 42267  func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
 42268  	b := v.Block
 42269  	_ = b
 42270  	typ := &b.Func.Config.Types
 42271  	_ = typ
 42272  	// match: (Rsh8Ux64 x (Const64 [c]))
 42273  	// cond: uint64(c) < 8
 42274  	// result: (SRWconst (ZeroExt8to32 x) [c])
 42275  	for {
 42276  		_ = v.Args[1]
 42277  		x := v.Args[0]
 42278  		v_1 := v.Args[1]
 42279  		if v_1.Op != OpConst64 {
 42280  			break
 42281  		}
 42282  		c := v_1.AuxInt
 42283  		if !(uint64(c) < 8) {
 42284  			break
 42285  		}
 42286  		v.reset(OpPPC64SRWconst)
 42287  		v.AuxInt = c
 42288  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42289  		v0.AddArg(x)
 42290  		v.AddArg(v0)
 42291  		return true
 42292  	}
 42293  	// match: (Rsh8Ux64 _ (Const64 [c]))
 42294  	// cond: uint64(c) >= 8
 42295  	// result: (MOVDconst [0])
 42296  	for {
 42297  		_ = v.Args[1]
 42298  		v_1 := v.Args[1]
 42299  		if v_1.Op != OpConst64 {
 42300  			break
 42301  		}
 42302  		c := v_1.AuxInt
 42303  		if !(uint64(c) >= 8) {
 42304  			break
 42305  		}
 42306  		v.reset(OpPPC64MOVDconst)
 42307  		v.AuxInt = 0
 42308  		return true
 42309  	}
 42310  	// match: (Rsh8Ux64 x (MOVDconst [c]))
 42311  	// cond: uint64(c) < 8
 42312  	// result: (SRWconst (ZeroExt8to32 x) [c])
 42313  	for {
 42314  		_ = v.Args[1]
 42315  		x := v.Args[0]
 42316  		v_1 := v.Args[1]
 42317  		if v_1.Op != OpPPC64MOVDconst {
 42318  			break
 42319  		}
 42320  		c := v_1.AuxInt
 42321  		if !(uint64(c) < 8) {
 42322  			break
 42323  		}
 42324  		v.reset(OpPPC64SRWconst)
 42325  		v.AuxInt = c
 42326  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42327  		v0.AddArg(x)
 42328  		v.AddArg(v0)
 42329  		return true
 42330  	}
 42331  	// match: (Rsh8Ux64 x y)
 42332  	// cond:
 42333  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 42334  	for {
 42335  		_ = v.Args[1]
 42336  		x := v.Args[0]
 42337  		y := v.Args[1]
 42338  		v.reset(OpPPC64SRW)
 42339  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42340  		v0.AddArg(x)
 42341  		v.AddArg(v0)
 42342  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42343  		v1.AddArg(y)
 42344  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42345  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42346  		v3.AuxInt = -8
 42347  		v3.AddArg(y)
 42348  		v2.AddArg(v3)
 42349  		v1.AddArg(v2)
 42350  		v.AddArg(v1)
 42351  		return true
 42352  	}
 42353  }
 42354  func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
 42355  	b := v.Block
 42356  	_ = b
 42357  	typ := &b.Func.Config.Types
 42358  	_ = typ
 42359  	// match: (Rsh8Ux8 x y)
 42360  	// cond:
 42361  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 42362  	for {
 42363  		_ = v.Args[1]
 42364  		x := v.Args[0]
 42365  		y := v.Args[1]
 42366  		v.reset(OpPPC64SRW)
 42367  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42368  		v0.AddArg(x)
 42369  		v.AddArg(v0)
 42370  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42371  		v1.AddArg(y)
 42372  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42373  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42374  		v3.AuxInt = -8
 42375  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42376  		v4.AddArg(y)
 42377  		v3.AddArg(v4)
 42378  		v2.AddArg(v3)
 42379  		v1.AddArg(v2)
 42380  		v.AddArg(v1)
 42381  		return true
 42382  	}
 42383  }
 42384  func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
 42385  	b := v.Block
 42386  	_ = b
 42387  	typ := &b.Func.Config.Types
 42388  	_ = typ
 42389  	// match: (Rsh8x16 x y)
 42390  	// cond:
 42391  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 42392  	for {
 42393  		_ = v.Args[1]
 42394  		x := v.Args[0]
 42395  		y := v.Args[1]
 42396  		v.reset(OpPPC64SRAW)
 42397  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42398  		v0.AddArg(x)
 42399  		v.AddArg(v0)
 42400  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42401  		v1.AddArg(y)
 42402  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42403  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42404  		v3.AuxInt = -8
 42405  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 42406  		v4.AddArg(y)
 42407  		v3.AddArg(v4)
 42408  		v2.AddArg(v3)
 42409  		v1.AddArg(v2)
 42410  		v.AddArg(v1)
 42411  		return true
 42412  	}
 42413  }
 42414  func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
 42415  	b := v.Block
 42416  	_ = b
 42417  	typ := &b.Func.Config.Types
 42418  	_ = typ
 42419  	// match: (Rsh8x32 x (Const64 [c]))
 42420  	// cond: uint32(c) < 8
 42421  	// result: (SRAWconst (SignExt8to32 x) [c])
 42422  	for {
 42423  		_ = v.Args[1]
 42424  		x := v.Args[0]
 42425  		v_1 := v.Args[1]
 42426  		if v_1.Op != OpConst64 {
 42427  			break
 42428  		}
 42429  		c := v_1.AuxInt
 42430  		if !(uint32(c) < 8) {
 42431  			break
 42432  		}
 42433  		v.reset(OpPPC64SRAWconst)
 42434  		v.AuxInt = c
 42435  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42436  		v0.AddArg(x)
 42437  		v.AddArg(v0)
 42438  		return true
 42439  	}
 42440  	// match: (Rsh8x32 x (MOVDconst [c]))
 42441  	// cond: uint32(c) < 8
 42442  	// result: (SRAWconst (SignExt8to32 x) [c])
 42443  	for {
 42444  		_ = v.Args[1]
 42445  		x := v.Args[0]
 42446  		v_1 := v.Args[1]
 42447  		if v_1.Op != OpPPC64MOVDconst {
 42448  			break
 42449  		}
 42450  		c := v_1.AuxInt
 42451  		if !(uint32(c) < 8) {
 42452  			break
 42453  		}
 42454  		v.reset(OpPPC64SRAWconst)
 42455  		v.AuxInt = c
 42456  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42457  		v0.AddArg(x)
 42458  		v.AddArg(v0)
 42459  		return true
 42460  	}
 42461  	// match: (Rsh8x32 x y)
 42462  	// cond:
 42463  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 42464  	for {
 42465  		_ = v.Args[1]
 42466  		x := v.Args[0]
 42467  		y := v.Args[1]
 42468  		v.reset(OpPPC64SRAW)
 42469  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42470  		v0.AddArg(x)
 42471  		v.AddArg(v0)
 42472  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42473  		v1.AddArg(y)
 42474  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42475  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42476  		v3.AuxInt = -8
 42477  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 42478  		v4.AddArg(y)
 42479  		v3.AddArg(v4)
 42480  		v2.AddArg(v3)
 42481  		v1.AddArg(v2)
 42482  		v.AddArg(v1)
 42483  		return true
 42484  	}
 42485  }
 42486  func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
 42487  	b := v.Block
 42488  	_ = b
 42489  	typ := &b.Func.Config.Types
 42490  	_ = typ
 42491  	// match: (Rsh8x64 x (Const64 [c]))
 42492  	// cond: uint64(c) < 8
 42493  	// result: (SRAWconst (SignExt8to32 x) [c])
 42494  	for {
 42495  		_ = v.Args[1]
 42496  		x := v.Args[0]
 42497  		v_1 := v.Args[1]
 42498  		if v_1.Op != OpConst64 {
 42499  			break
 42500  		}
 42501  		c := v_1.AuxInt
 42502  		if !(uint64(c) < 8) {
 42503  			break
 42504  		}
 42505  		v.reset(OpPPC64SRAWconst)
 42506  		v.AuxInt = c
 42507  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42508  		v0.AddArg(x)
 42509  		v.AddArg(v0)
 42510  		return true
 42511  	}
 42512  	// match: (Rsh8x64 x (Const64 [c]))
 42513  	// cond: uint64(c) >= 8
 42514  	// result: (SRAWconst (SignExt8to32 x) [63])
 42515  	for {
 42516  		_ = v.Args[1]
 42517  		x := v.Args[0]
 42518  		v_1 := v.Args[1]
 42519  		if v_1.Op != OpConst64 {
 42520  			break
 42521  		}
 42522  		c := v_1.AuxInt
 42523  		if !(uint64(c) >= 8) {
 42524  			break
 42525  		}
 42526  		v.reset(OpPPC64SRAWconst)
 42527  		v.AuxInt = 63
 42528  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42529  		v0.AddArg(x)
 42530  		v.AddArg(v0)
 42531  		return true
 42532  	}
 42533  	// match: (Rsh8x64 x (MOVDconst [c]))
 42534  	// cond: uint64(c) < 8
 42535  	// result: (SRAWconst (SignExt8to32 x) [c])
 42536  	for {
 42537  		_ = v.Args[1]
 42538  		x := v.Args[0]
 42539  		v_1 := v.Args[1]
 42540  		if v_1.Op != OpPPC64MOVDconst {
 42541  			break
 42542  		}
 42543  		c := v_1.AuxInt
 42544  		if !(uint64(c) < 8) {
 42545  			break
 42546  		}
 42547  		v.reset(OpPPC64SRAWconst)
 42548  		v.AuxInt = c
 42549  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42550  		v0.AddArg(x)
 42551  		v.AddArg(v0)
 42552  		return true
 42553  	}
 42554  	// match: (Rsh8x64 x y)
 42555  	// cond:
 42556  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 42557  	for {
 42558  		_ = v.Args[1]
 42559  		x := v.Args[0]
 42560  		y := v.Args[1]
 42561  		v.reset(OpPPC64SRAW)
 42562  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42563  		v0.AddArg(x)
 42564  		v.AddArg(v0)
 42565  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42566  		v1.AddArg(y)
 42567  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42568  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42569  		v3.AuxInt = -8
 42570  		v3.AddArg(y)
 42571  		v2.AddArg(v3)
 42572  		v1.AddArg(v2)
 42573  		v.AddArg(v1)
 42574  		return true
 42575  	}
 42576  }
 42577  func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
 42578  	b := v.Block
 42579  	_ = b
 42580  	typ := &b.Func.Config.Types
 42581  	_ = typ
 42582  	// match: (Rsh8x8 x y)
 42583  	// cond:
 42584  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 42585  	for {
 42586  		_ = v.Args[1]
 42587  		x := v.Args[0]
 42588  		y := v.Args[1]
 42589  		v.reset(OpPPC64SRAW)
 42590  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42591  		v0.AddArg(x)
 42592  		v.AddArg(v0)
 42593  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42594  		v1.AddArg(y)
 42595  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42596  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42597  		v3.AuxInt = -8
 42598  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42599  		v4.AddArg(y)
 42600  		v3.AddArg(v4)
 42601  		v2.AddArg(v3)
 42602  		v1.AddArg(v2)
 42603  		v.AddArg(v1)
 42604  		return true
 42605  	}
 42606  }
 42607  func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
 42608  	// match: (SignExt16to32 x)
 42609  	// cond:
 42610  	// result: (MOVHreg x)
 42611  	for {
 42612  		x := v.Args[0]
 42613  		v.reset(OpPPC64MOVHreg)
 42614  		v.AddArg(x)
 42615  		return true
 42616  	}
 42617  }
 42618  func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
 42619  	// match: (SignExt16to64 x)
 42620  	// cond:
 42621  	// result: (MOVHreg x)
 42622  	for {
 42623  		x := v.Args[0]
 42624  		v.reset(OpPPC64MOVHreg)
 42625  		v.AddArg(x)
 42626  		return true
 42627  	}
 42628  }
 42629  func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
 42630  	// match: (SignExt32to64 x)
 42631  	// cond:
 42632  	// result: (MOVWreg x)
 42633  	for {
 42634  		x := v.Args[0]
 42635  		v.reset(OpPPC64MOVWreg)
 42636  		v.AddArg(x)
 42637  		return true
 42638  	}
 42639  }
 42640  func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
 42641  	// match: (SignExt8to16 x)
 42642  	// cond:
 42643  	// result: (MOVBreg x)
 42644  	for {
 42645  		x := v.Args[0]
 42646  		v.reset(OpPPC64MOVBreg)
 42647  		v.AddArg(x)
 42648  		return true
 42649  	}
 42650  }
 42651  func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
 42652  	// match: (SignExt8to32 x)
 42653  	// cond:
 42654  	// result: (MOVBreg x)
 42655  	for {
 42656  		x := v.Args[0]
 42657  		v.reset(OpPPC64MOVBreg)
 42658  		v.AddArg(x)
 42659  		return true
 42660  	}
 42661  }
 42662  func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
 42663  	// match: (SignExt8to64 x)
 42664  	// cond:
 42665  	// result: (MOVBreg x)
 42666  	for {
 42667  		x := v.Args[0]
 42668  		v.reset(OpPPC64MOVBreg)
 42669  		v.AddArg(x)
 42670  		return true
 42671  	}
 42672  }
 42673  func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
 42674  	b := v.Block
 42675  	_ = b
 42676  	// match: (Slicemask <t> x)
 42677  	// cond:
 42678  	// result: (SRADconst (NEG <t> x) [63])
 42679  	for {
 42680  		t := v.Type
 42681  		x := v.Args[0]
 42682  		v.reset(OpPPC64SRADconst)
 42683  		v.AuxInt = 63
 42684  		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
 42685  		v0.AddArg(x)
 42686  		v.AddArg(v0)
 42687  		return true
 42688  	}
 42689  }
 42690  func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
 42691  	// match: (Sqrt x)
 42692  	// cond:
 42693  	// result: (FSQRT x)
 42694  	for {
 42695  		x := v.Args[0]
 42696  		v.reset(OpPPC64FSQRT)
 42697  		v.AddArg(x)
 42698  		return true
 42699  	}
 42700  }
 42701  func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
 42702  	// match: (StaticCall [argwid] {target} mem)
 42703  	// cond:
 42704  	// result: (CALLstatic [argwid] {target} mem)
 42705  	for {
 42706  		argwid := v.AuxInt
 42707  		target := v.Aux
 42708  		mem := v.Args[0]
 42709  		v.reset(OpPPC64CALLstatic)
 42710  		v.AuxInt = argwid
 42711  		v.Aux = target
 42712  		v.AddArg(mem)
 42713  		return true
 42714  	}
 42715  }
 42716  func rewriteValuePPC64_OpStore_0(v *Value) bool {
 42717  	// match: (Store {t} ptr val mem)
 42718  	// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
 42719  	// result: (FMOVDstore ptr val mem)
 42720  	for {
 42721  		t := v.Aux
 42722  		_ = v.Args[2]
 42723  		ptr := v.Args[0]
 42724  		val := v.Args[1]
 42725  		mem := v.Args[2]
 42726  		if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
 42727  			break
 42728  		}
 42729  		v.reset(OpPPC64FMOVDstore)
 42730  		v.AddArg(ptr)
 42731  		v.AddArg(val)
 42732  		v.AddArg(mem)
 42733  		return true
 42734  	}
 42735  	// match: (Store {t} ptr val mem)
 42736  	// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
 42737  	// result: (FMOVDstore ptr val mem)
 42738  	for {
 42739  		t := v.Aux
 42740  		_ = v.Args[2]
 42741  		ptr := v.Args[0]
 42742  		val := v.Args[1]
 42743  		mem := v.Args[2]
 42744  		if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
 42745  			break
 42746  		}
 42747  		v.reset(OpPPC64FMOVDstore)
 42748  		v.AddArg(ptr)
 42749  		v.AddArg(val)
 42750  		v.AddArg(mem)
 42751  		return true
 42752  	}
 42753  	// match: (Store {t} ptr val mem)
 42754  	// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
 42755  	// result: (FMOVSstore ptr val mem)
 42756  	for {
 42757  		t := v.Aux
 42758  		_ = v.Args[2]
 42759  		ptr := v.Args[0]
 42760  		val := v.Args[1]
 42761  		mem := v.Args[2]
 42762  		if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
 42763  			break
 42764  		}
 42765  		v.reset(OpPPC64FMOVSstore)
 42766  		v.AddArg(ptr)
 42767  		v.AddArg(val)
 42768  		v.AddArg(mem)
 42769  		return true
 42770  	}
 42771  	// match: (Store {t} ptr val mem)
 42772  	// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
 42773  	// result: (MOVDstore ptr val mem)
 42774  	for {
 42775  		t := v.Aux
 42776  		_ = v.Args[2]
 42777  		ptr := v.Args[0]
 42778  		val := v.Args[1]
 42779  		mem := v.Args[2]
 42780  		if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
 42781  			break
 42782  		}
 42783  		v.reset(OpPPC64MOVDstore)
 42784  		v.AddArg(ptr)
 42785  		v.AddArg(val)
 42786  		v.AddArg(mem)
 42787  		return true
 42788  	}
 42789  	// match: (Store {t} ptr val mem)
 42790  	// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
 42791  	// result: (MOVWstore ptr val mem)
 42792  	for {
 42793  		t := v.Aux
 42794  		_ = v.Args[2]
 42795  		ptr := v.Args[0]
 42796  		val := v.Args[1]
 42797  		mem := v.Args[2]
 42798  		if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
 42799  			break
 42800  		}
 42801  		v.reset(OpPPC64MOVWstore)
 42802  		v.AddArg(ptr)
 42803  		v.AddArg(val)
 42804  		v.AddArg(mem)
 42805  		return true
 42806  	}
 42807  	// match: (Store {t} ptr val mem)
 42808  	// cond: t.(*types.Type).Size() == 2
 42809  	// result: (MOVHstore ptr val mem)
 42810  	for {
 42811  		t := v.Aux
 42812  		_ = v.Args[2]
 42813  		ptr := v.Args[0]
 42814  		val := v.Args[1]
 42815  		mem := v.Args[2]
 42816  		if !(t.(*types.Type).Size() == 2) {
 42817  			break
 42818  		}
 42819  		v.reset(OpPPC64MOVHstore)
 42820  		v.AddArg(ptr)
 42821  		v.AddArg(val)
 42822  		v.AddArg(mem)
 42823  		return true
 42824  	}
 42825  	// match: (Store {t} ptr val mem)
 42826  	// cond: t.(*types.Type).Size() == 1
 42827  	// result: (MOVBstore ptr val mem)
 42828  	for {
 42829  		t := v.Aux
 42830  		_ = v.Args[2]
 42831  		ptr := v.Args[0]
 42832  		val := v.Args[1]
 42833  		mem := v.Args[2]
 42834  		if !(t.(*types.Type).Size() == 1) {
 42835  			break
 42836  		}
 42837  		v.reset(OpPPC64MOVBstore)
 42838  		v.AddArg(ptr)
 42839  		v.AddArg(val)
 42840  		v.AddArg(mem)
 42841  		return true
 42842  	}
 42843  	return false
 42844  }
 42845  func rewriteValuePPC64_OpSub16_0(v *Value) bool {
 42846  	// match: (Sub16 x y)
 42847  	// cond:
 42848  	// result: (SUB x y)
 42849  	for {
 42850  		_ = v.Args[1]
 42851  		x := v.Args[0]
 42852  		y := v.Args[1]
 42853  		v.reset(OpPPC64SUB)
 42854  		v.AddArg(x)
 42855  		v.AddArg(y)
 42856  		return true
 42857  	}
 42858  }
 42859  func rewriteValuePPC64_OpSub32_0(v *Value) bool {
 42860  	// match: (Sub32 x y)
 42861  	// cond:
 42862  	// result: (SUB x y)
 42863  	for {
 42864  		_ = v.Args[1]
 42865  		x := v.Args[0]
 42866  		y := v.Args[1]
 42867  		v.reset(OpPPC64SUB)
 42868  		v.AddArg(x)
 42869  		v.AddArg(y)
 42870  		return true
 42871  	}
 42872  }
 42873  func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
 42874  	// match: (Sub32F x y)
 42875  	// cond:
 42876  	// result: (FSUBS x y)
 42877  	for {
 42878  		_ = v.Args[1]
 42879  		x := v.Args[0]
 42880  		y := v.Args[1]
 42881  		v.reset(OpPPC64FSUBS)
 42882  		v.AddArg(x)
 42883  		v.AddArg(y)
 42884  		return true
 42885  	}
 42886  }
 42887  func rewriteValuePPC64_OpSub64_0(v *Value) bool {
 42888  	// match: (Sub64 x y)
 42889  	// cond:
 42890  	// result: (SUB x y)
 42891  	for {
 42892  		_ = v.Args[1]
 42893  		x := v.Args[0]
 42894  		y := v.Args[1]
 42895  		v.reset(OpPPC64SUB)
 42896  		v.AddArg(x)
 42897  		v.AddArg(y)
 42898  		return true
 42899  	}
 42900  }
 42901  func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
 42902  	// match: (Sub64F x y)
 42903  	// cond:
 42904  	// result: (FSUB x y)
 42905  	for {
 42906  		_ = v.Args[1]
 42907  		x := v.Args[0]
 42908  		y := v.Args[1]
 42909  		v.reset(OpPPC64FSUB)
 42910  		v.AddArg(x)
 42911  		v.AddArg(y)
 42912  		return true
 42913  	}
 42914  }
 42915  func rewriteValuePPC64_OpSub8_0(v *Value) bool {
 42916  	// match: (Sub8 x y)
 42917  	// cond:
 42918  	// result: (SUB x y)
 42919  	for {
 42920  		_ = v.Args[1]
 42921  		x := v.Args[0]
 42922  		y := v.Args[1]
 42923  		v.reset(OpPPC64SUB)
 42924  		v.AddArg(x)
 42925  		v.AddArg(y)
 42926  		return true
 42927  	}
 42928  }
 42929  func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
 42930  	// match: (SubPtr x y)
 42931  	// cond:
 42932  	// result: (SUB x y)
 42933  	for {
 42934  		_ = v.Args[1]
 42935  		x := v.Args[0]
 42936  		y := v.Args[1]
 42937  		v.reset(OpPPC64SUB)
 42938  		v.AddArg(x)
 42939  		v.AddArg(y)
 42940  		return true
 42941  	}
 42942  }
 42943  func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
 42944  	// match: (Trunc x)
 42945  	// cond:
 42946  	// result: (FTRUNC x)
 42947  	for {
 42948  		x := v.Args[0]
 42949  		v.reset(OpPPC64FTRUNC)
 42950  		v.AddArg(x)
 42951  		return true
 42952  	}
 42953  }
 42954  func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
 42955  	// match: (Trunc16to8 x)
 42956  	// cond:
 42957  	// result: (MOVBreg x)
 42958  	for {
 42959  		x := v.Args[0]
 42960  		v.reset(OpPPC64MOVBreg)
 42961  		v.AddArg(x)
 42962  		return true
 42963  	}
 42964  }
 42965  func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
 42966  	// match: (Trunc32to16 x)
 42967  	// cond:
 42968  	// result: (MOVHreg x)
 42969  	for {
 42970  		x := v.Args[0]
 42971  		v.reset(OpPPC64MOVHreg)
 42972  		v.AddArg(x)
 42973  		return true
 42974  	}
 42975  }
 42976  func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
 42977  	// match: (Trunc32to8 x)
 42978  	// cond:
 42979  	// result: (MOVBreg x)
 42980  	for {
 42981  		x := v.Args[0]
 42982  		v.reset(OpPPC64MOVBreg)
 42983  		v.AddArg(x)
 42984  		return true
 42985  	}
 42986  }
 42987  func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
 42988  	// match: (Trunc64to16 x)
 42989  	// cond:
 42990  	// result: (MOVHreg x)
 42991  	for {
 42992  		x := v.Args[0]
 42993  		v.reset(OpPPC64MOVHreg)
 42994  		v.AddArg(x)
 42995  		return true
 42996  	}
 42997  }
 42998  func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
 42999  	// match: (Trunc64to32 x)
 43000  	// cond:
 43001  	// result: (MOVWreg x)
 43002  	for {
 43003  		x := v.Args[0]
 43004  		v.reset(OpPPC64MOVWreg)
 43005  		v.AddArg(x)
 43006  		return true
 43007  	}
 43008  }
 43009  func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
 43010  	// match: (Trunc64to8 x)
 43011  	// cond:
 43012  	// result: (MOVBreg x)
 43013  	for {
 43014  		x := v.Args[0]
 43015  		v.reset(OpPPC64MOVBreg)
 43016  		v.AddArg(x)
 43017  		return true
 43018  	}
 43019  }
 43020  func rewriteValuePPC64_OpWB_0(v *Value) bool {
 43021  	// match: (WB {fn} destptr srcptr mem)
 43022  	// cond:
 43023  	// result: (LoweredWB {fn} destptr srcptr mem)
 43024  	for {
 43025  		fn := v.Aux
 43026  		_ = v.Args[2]
 43027  		destptr := v.Args[0]
 43028  		srcptr := v.Args[1]
 43029  		mem := v.Args[2]
 43030  		v.reset(OpPPC64LoweredWB)
 43031  		v.Aux = fn
 43032  		v.AddArg(destptr)
 43033  		v.AddArg(srcptr)
 43034  		v.AddArg(mem)
 43035  		return true
 43036  	}
 43037  }
 43038  func rewriteValuePPC64_OpXor16_0(v *Value) bool {
 43039  	// match: (Xor16 x y)
 43040  	// cond:
 43041  	// result: (XOR x y)
 43042  	for {
 43043  		_ = v.Args[1]
 43044  		x := v.Args[0]
 43045  		y := v.Args[1]
 43046  		v.reset(OpPPC64XOR)
 43047  		v.AddArg(x)
 43048  		v.AddArg(y)
 43049  		return true
 43050  	}
 43051  }
 43052  func rewriteValuePPC64_OpXor32_0(v *Value) bool {
 43053  	// match: (Xor32 x y)
 43054  	// cond:
 43055  	// result: (XOR x y)
 43056  	for {
 43057  		_ = v.Args[1]
 43058  		x := v.Args[0]
 43059  		y := v.Args[1]
 43060  		v.reset(OpPPC64XOR)
 43061  		v.AddArg(x)
 43062  		v.AddArg(y)
 43063  		return true
 43064  	}
 43065  }
 43066  func rewriteValuePPC64_OpXor64_0(v *Value) bool {
 43067  	// match: (Xor64 x y)
 43068  	// cond:
 43069  	// result: (XOR x y)
 43070  	for {
 43071  		_ = v.Args[1]
 43072  		x := v.Args[0]
 43073  		y := v.Args[1]
 43074  		v.reset(OpPPC64XOR)
 43075  		v.AddArg(x)
 43076  		v.AddArg(y)
 43077  		return true
 43078  	}
 43079  }
 43080  func rewriteValuePPC64_OpXor8_0(v *Value) bool {
 43081  	// match: (Xor8 x y)
 43082  	// cond:
 43083  	// result: (XOR x y)
 43084  	for {
 43085  		_ = v.Args[1]
 43086  		x := v.Args[0]
 43087  		y := v.Args[1]
 43088  		v.reset(OpPPC64XOR)
 43089  		v.AddArg(x)
 43090  		v.AddArg(y)
 43091  		return true
 43092  	}
 43093  }
 43094  func rewriteValuePPC64_OpZero_0(v *Value) bool {
 43095  	b := v.Block
 43096  	_ = b
 43097  	// match: (Zero [0] _ mem)
 43098  	// cond:
 43099  	// result: mem
 43100  	for {
 43101  		if v.AuxInt != 0 {
 43102  			break
 43103  		}
 43104  		_ = v.Args[1]
 43105  		mem := v.Args[1]
 43106  		v.reset(OpCopy)
 43107  		v.Type = mem.Type
 43108  		v.AddArg(mem)
 43109  		return true
 43110  	}
 43111  	// match: (Zero [1] destptr mem)
 43112  	// cond:
 43113  	// result: (MOVBstorezero destptr mem)
 43114  	for {
 43115  		if v.AuxInt != 1 {
 43116  			break
 43117  		}
 43118  		_ = v.Args[1]
 43119  		destptr := v.Args[0]
 43120  		mem := v.Args[1]
 43121  		v.reset(OpPPC64MOVBstorezero)
 43122  		v.AddArg(destptr)
 43123  		v.AddArg(mem)
 43124  		return true
 43125  	}
 43126  	// match: (Zero [2] destptr mem)
 43127  	// cond:
 43128  	// result: (MOVHstorezero destptr mem)
 43129  	for {
 43130  		if v.AuxInt != 2 {
 43131  			break
 43132  		}
 43133  		_ = v.Args[1]
 43134  		destptr := v.Args[0]
 43135  		mem := v.Args[1]
 43136  		v.reset(OpPPC64MOVHstorezero)
 43137  		v.AddArg(destptr)
 43138  		v.AddArg(mem)
 43139  		return true
 43140  	}
 43141  	// match: (Zero [3] destptr mem)
 43142  	// cond:
 43143  	// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
 43144  	for {
 43145  		if v.AuxInt != 3 {
 43146  			break
 43147  		}
 43148  		_ = v.Args[1]
 43149  		destptr := v.Args[0]
 43150  		mem := v.Args[1]
 43151  		v.reset(OpPPC64MOVBstorezero)
 43152  		v.AuxInt = 2
 43153  		v.AddArg(destptr)
 43154  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 43155  		v0.AddArg(destptr)
 43156  		v0.AddArg(mem)
 43157  		v.AddArg(v0)
 43158  		return true
 43159  	}
 43160  	// match: (Zero [4] destptr mem)
 43161  	// cond:
 43162  	// result: (MOVWstorezero destptr mem)
 43163  	for {
 43164  		if v.AuxInt != 4 {
 43165  			break
 43166  		}
 43167  		_ = v.Args[1]
 43168  		destptr := v.Args[0]
 43169  		mem := v.Args[1]
 43170  		v.reset(OpPPC64MOVWstorezero)
 43171  		v.AddArg(destptr)
 43172  		v.AddArg(mem)
 43173  		return true
 43174  	}
 43175  	// match: (Zero [5] destptr mem)
 43176  	// cond:
 43177  	// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
 43178  	for {
 43179  		if v.AuxInt != 5 {
 43180  			break
 43181  		}
 43182  		_ = v.Args[1]
 43183  		destptr := v.Args[0]
 43184  		mem := v.Args[1]
 43185  		v.reset(OpPPC64MOVBstorezero)
 43186  		v.AuxInt = 4
 43187  		v.AddArg(destptr)
 43188  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43189  		v0.AddArg(destptr)
 43190  		v0.AddArg(mem)
 43191  		v.AddArg(v0)
 43192  		return true
 43193  	}
 43194  	// match: (Zero [6] destptr mem)
 43195  	// cond:
 43196  	// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
 43197  	for {
 43198  		if v.AuxInt != 6 {
 43199  			break
 43200  		}
 43201  		_ = v.Args[1]
 43202  		destptr := v.Args[0]
 43203  		mem := v.Args[1]
 43204  		v.reset(OpPPC64MOVHstorezero)
 43205  		v.AuxInt = 4
 43206  		v.AddArg(destptr)
 43207  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43208  		v0.AddArg(destptr)
 43209  		v0.AddArg(mem)
 43210  		v.AddArg(v0)
 43211  		return true
 43212  	}
 43213  	// match: (Zero [7] destptr mem)
 43214  	// cond:
 43215  	// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
 43216  	for {
 43217  		if v.AuxInt != 7 {
 43218  			break
 43219  		}
 43220  		_ = v.Args[1]
 43221  		destptr := v.Args[0]
 43222  		mem := v.Args[1]
 43223  		v.reset(OpPPC64MOVBstorezero)
 43224  		v.AuxInt = 6
 43225  		v.AddArg(destptr)
 43226  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 43227  		v0.AuxInt = 4
 43228  		v0.AddArg(destptr)
 43229  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43230  		v1.AddArg(destptr)
 43231  		v1.AddArg(mem)
 43232  		v0.AddArg(v1)
 43233  		v.AddArg(v0)
 43234  		return true
 43235  	}
 43236  	// match: (Zero [8] {t} destptr mem)
 43237  	// cond: t.(*types.Type).Alignment()%4 == 0
 43238  	// result: (MOVDstorezero destptr mem)
 43239  	for {
 43240  		if v.AuxInt != 8 {
 43241  			break
 43242  		}
 43243  		t := v.Aux
 43244  		_ = v.Args[1]
 43245  		destptr := v.Args[0]
 43246  		mem := v.Args[1]
 43247  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43248  			break
 43249  		}
 43250  		v.reset(OpPPC64MOVDstorezero)
 43251  		v.AddArg(destptr)
 43252  		v.AddArg(mem)
 43253  		return true
 43254  	}
 43255  	// match: (Zero [8] destptr mem)
 43256  	// cond:
 43257  	// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
 43258  	for {
 43259  		if v.AuxInt != 8 {
 43260  			break
 43261  		}
 43262  		_ = v.Args[1]
 43263  		destptr := v.Args[0]
 43264  		mem := v.Args[1]
 43265  		v.reset(OpPPC64MOVWstorezero)
 43266  		v.AuxInt = 4
 43267  		v.AddArg(destptr)
 43268  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43269  		v0.AuxInt = 0
 43270  		v0.AddArg(destptr)
 43271  		v0.AddArg(mem)
 43272  		v.AddArg(v0)
 43273  		return true
 43274  	}
 43275  	return false
 43276  }
 43277  func rewriteValuePPC64_OpZero_10(v *Value) bool {
 43278  	b := v.Block
 43279  	_ = b
 43280  	// match: (Zero [12] {t} destptr mem)
 43281  	// cond: t.(*types.Type).Alignment()%4 == 0
 43282  	// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 43283  	for {
 43284  		if v.AuxInt != 12 {
 43285  			break
 43286  		}
 43287  		t := v.Aux
 43288  		_ = v.Args[1]
 43289  		destptr := v.Args[0]
 43290  		mem := v.Args[1]
 43291  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43292  			break
 43293  		}
 43294  		v.reset(OpPPC64MOVWstorezero)
 43295  		v.AuxInt = 8
 43296  		v.AddArg(destptr)
 43297  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43298  		v0.AuxInt = 0
 43299  		v0.AddArg(destptr)
 43300  		v0.AddArg(mem)
 43301  		v.AddArg(v0)
 43302  		return true
 43303  	}
 43304  	// match: (Zero [16] {t} destptr mem)
 43305  	// cond: t.(*types.Type).Alignment()%4 == 0
 43306  	// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 43307  	for {
 43308  		if v.AuxInt != 16 {
 43309  			break
 43310  		}
 43311  		t := v.Aux
 43312  		_ = v.Args[1]
 43313  		destptr := v.Args[0]
 43314  		mem := v.Args[1]
 43315  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43316  			break
 43317  		}
 43318  		v.reset(OpPPC64MOVDstorezero)
 43319  		v.AuxInt = 8
 43320  		v.AddArg(destptr)
 43321  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43322  		v0.AuxInt = 0
 43323  		v0.AddArg(destptr)
 43324  		v0.AddArg(mem)
 43325  		v.AddArg(v0)
 43326  		return true
 43327  	}
 43328  	// match: (Zero [24] {t} destptr mem)
 43329  	// cond: t.(*types.Type).Alignment()%4 == 0
 43330  	// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
 43331  	for {
 43332  		if v.AuxInt != 24 {
 43333  			break
 43334  		}
 43335  		t := v.Aux
 43336  		_ = v.Args[1]
 43337  		destptr := v.Args[0]
 43338  		mem := v.Args[1]
 43339  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43340  			break
 43341  		}
 43342  		v.reset(OpPPC64MOVDstorezero)
 43343  		v.AuxInt = 16
 43344  		v.AddArg(destptr)
 43345  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43346  		v0.AuxInt = 8
 43347  		v0.AddArg(destptr)
 43348  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43349  		v1.AuxInt = 0
 43350  		v1.AddArg(destptr)
 43351  		v1.AddArg(mem)
 43352  		v0.AddArg(v1)
 43353  		v.AddArg(v0)
 43354  		return true
 43355  	}
 43356  	// match: (Zero [32] {t} destptr mem)
 43357  	// cond: t.(*types.Type).Alignment()%4 == 0
 43358  	// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
 43359  	for {
 43360  		if v.AuxInt != 32 {
 43361  			break
 43362  		}
 43363  		t := v.Aux
 43364  		_ = v.Args[1]
 43365  		destptr := v.Args[0]
 43366  		mem := v.Args[1]
 43367  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43368  			break
 43369  		}
 43370  		v.reset(OpPPC64MOVDstorezero)
 43371  		v.AuxInt = 24
 43372  		v.AddArg(destptr)
 43373  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43374  		v0.AuxInt = 16
 43375  		v0.AddArg(destptr)
 43376  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43377  		v1.AuxInt = 8
 43378  		v1.AddArg(destptr)
 43379  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43380  		v2.AuxInt = 0
 43381  		v2.AddArg(destptr)
 43382  		v2.AddArg(mem)
 43383  		v1.AddArg(v2)
 43384  		v0.AddArg(v1)
 43385  		v.AddArg(v0)
 43386  		return true
 43387  	}
 43388  	// match: (Zero [s] ptr mem)
 43389  	// cond:
 43390  	// result: (LoweredZero [s] ptr mem)
 43391  	for {
 43392  		s := v.AuxInt
 43393  		_ = v.Args[1]
 43394  		ptr := v.Args[0]
 43395  		mem := v.Args[1]
 43396  		v.reset(OpPPC64LoweredZero)
 43397  		v.AuxInt = s
 43398  		v.AddArg(ptr)
 43399  		v.AddArg(mem)
 43400  		return true
 43401  	}
 43402  }
 43403  func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
 43404  	// match: (ZeroExt16to32 x)
 43405  	// cond:
 43406  	// result: (MOVHZreg x)
 43407  	for {
 43408  		x := v.Args[0]
 43409  		v.reset(OpPPC64MOVHZreg)
 43410  		v.AddArg(x)
 43411  		return true
 43412  	}
 43413  }
 43414  func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
 43415  	// match: (ZeroExt16to64 x)
 43416  	// cond:
 43417  	// result: (MOVHZreg x)
 43418  	for {
 43419  		x := v.Args[0]
 43420  		v.reset(OpPPC64MOVHZreg)
 43421  		v.AddArg(x)
 43422  		return true
 43423  	}
 43424  }
 43425  func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
 43426  	// match: (ZeroExt32to64 x)
 43427  	// cond:
 43428  	// result: (MOVWZreg x)
 43429  	for {
 43430  		x := v.Args[0]
 43431  		v.reset(OpPPC64MOVWZreg)
 43432  		v.AddArg(x)
 43433  		return true
 43434  	}
 43435  }
 43436  func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
 43437  	// match: (ZeroExt8to16 x)
 43438  	// cond:
 43439  	// result: (MOVBZreg x)
 43440  	for {
 43441  		x := v.Args[0]
 43442  		v.reset(OpPPC64MOVBZreg)
 43443  		v.AddArg(x)
 43444  		return true
 43445  	}
 43446  }
 43447  func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
 43448  	// match: (ZeroExt8to32 x)
 43449  	// cond:
 43450  	// result: (MOVBZreg x)
 43451  	for {
 43452  		x := v.Args[0]
 43453  		v.reset(OpPPC64MOVBZreg)
 43454  		v.AddArg(x)
 43455  		return true
 43456  	}
 43457  }
 43458  func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
 43459  	// match: (ZeroExt8to64 x)
 43460  	// cond:
 43461  	// result: (MOVBZreg x)
 43462  	for {
 43463  		x := v.Args[0]
 43464  		v.reset(OpPPC64MOVBZreg)
 43465  		v.AddArg(x)
 43466  		return true
 43467  	}
 43468  }
 43469  func rewriteBlockPPC64(b *Block) bool {
 43470  	config := b.Func.Config
 43471  	_ = config
 43472  	fe := b.Func.fe
 43473  	_ = fe
 43474  	typ := &config.Types
 43475  	_ = typ
 43476  	switch b.Kind {
 43477  	case BlockPPC64EQ:
 43478  		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 43479  		// cond:
 43480  		// result: (EQ (ANDCCconst [c] x) yes no)
 43481  		for {
 43482  			v := b.Control
 43483  			if v.Op != OpPPC64CMPconst {
 43484  				break
 43485  			}
 43486  			if v.AuxInt != 0 {
 43487  				break
 43488  			}
 43489  			v_0 := v.Args[0]
 43490  			if v_0.Op != OpPPC64ANDconst {
 43491  				break
 43492  			}
 43493  			c := v_0.AuxInt
 43494  			x := v_0.Args[0]
 43495  			b.Kind = BlockPPC64EQ
 43496  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 43497  			v0.AuxInt = c
 43498  			v0.AddArg(x)
 43499  			b.SetControl(v0)
 43500  			b.Aux = nil
 43501  			return true
 43502  		}
 43503  		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 43504  		// cond:
 43505  		// result: (EQ (ANDCCconst [c] x) yes no)
 43506  		for {
 43507  			v := b.Control
 43508  			if v.Op != OpPPC64CMPWconst {
 43509  				break
 43510  			}
 43511  			if v.AuxInt != 0 {
 43512  				break
 43513  			}
 43514  			v_0 := v.Args[0]
 43515  			if v_0.Op != OpPPC64ANDconst {
 43516  				break
 43517  			}
 43518  			c := v_0.AuxInt
 43519  			x := v_0.Args[0]
 43520  			b.Kind = BlockPPC64EQ
 43521  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 43522  			v0.AuxInt = c
 43523  			v0.AddArg(x)
 43524  			b.SetControl(v0)
 43525  			b.Aux = nil
 43526  			return true
 43527  		}
 43528  		// match: (EQ (FlagEQ) yes no)
 43529  		// cond:
 43530  		// result: (First nil yes no)
 43531  		for {
 43532  			v := b.Control
 43533  			if v.Op != OpPPC64FlagEQ {
 43534  				break
 43535  			}
 43536  			b.Kind = BlockFirst
 43537  			b.SetControl(nil)
 43538  			b.Aux = nil
 43539  			return true
 43540  		}
 43541  		// match: (EQ (FlagLT) yes no)
 43542  		// cond:
 43543  		// result: (First nil no yes)
 43544  		for {
 43545  			v := b.Control
 43546  			if v.Op != OpPPC64FlagLT {
 43547  				break
 43548  			}
 43549  			b.Kind = BlockFirst
 43550  			b.SetControl(nil)
 43551  			b.Aux = nil
 43552  			b.swapSuccessors()
 43553  			return true
 43554  		}
 43555  		// match: (EQ (FlagGT) yes no)
 43556  		// cond:
 43557  		// result: (First nil no yes)
 43558  		for {
 43559  			v := b.Control
 43560  			if v.Op != OpPPC64FlagGT {
 43561  				break
 43562  			}
 43563  			b.Kind = BlockFirst
 43564  			b.SetControl(nil)
 43565  			b.Aux = nil
 43566  			b.swapSuccessors()
 43567  			return true
 43568  		}
 43569  		// match: (EQ (InvertFlags cmp) yes no)
 43570  		// cond:
 43571  		// result: (EQ cmp yes no)
 43572  		for {
 43573  			v := b.Control
 43574  			if v.Op != OpPPC64InvertFlags {
 43575  				break
 43576  			}
 43577  			cmp := v.Args[0]
 43578  			b.Kind = BlockPPC64EQ
 43579  			b.SetControl(cmp)
 43580  			b.Aux = nil
 43581  			return true
 43582  		}
 43583  	case BlockPPC64GE:
 43584  		// match: (GE (FlagEQ) yes no)
 43585  		// cond:
 43586  		// result: (First nil yes no)
 43587  		for {
 43588  			v := b.Control
 43589  			if v.Op != OpPPC64FlagEQ {
 43590  				break
 43591  			}
 43592  			b.Kind = BlockFirst
 43593  			b.SetControl(nil)
 43594  			b.Aux = nil
 43595  			return true
 43596  		}
 43597  		// match: (GE (FlagLT) yes no)
 43598  		// cond:
 43599  		// result: (First nil no yes)
 43600  		for {
 43601  			v := b.Control
 43602  			if v.Op != OpPPC64FlagLT {
 43603  				break
 43604  			}
 43605  			b.Kind = BlockFirst
 43606  			b.SetControl(nil)
 43607  			b.Aux = nil
 43608  			b.swapSuccessors()
 43609  			return true
 43610  		}
 43611  		// match: (GE (FlagGT) yes no)
 43612  		// cond:
 43613  		// result: (First nil yes no)
 43614  		for {
 43615  			v := b.Control
 43616  			if v.Op != OpPPC64FlagGT {
 43617  				break
 43618  			}
 43619  			b.Kind = BlockFirst
 43620  			b.SetControl(nil)
 43621  			b.Aux = nil
 43622  			return true
 43623  		}
 43624  		// match: (GE (InvertFlags cmp) yes no)
 43625  		// cond:
 43626  		// result: (LE cmp yes no)
 43627  		for {
 43628  			v := b.Control
 43629  			if v.Op != OpPPC64InvertFlags {
 43630  				break
 43631  			}
 43632  			cmp := v.Args[0]
 43633  			b.Kind = BlockPPC64LE
 43634  			b.SetControl(cmp)
 43635  			b.Aux = nil
 43636  			return true
 43637  		}
 43638  	case BlockPPC64GT:
 43639  		// match: (GT (FlagEQ) yes no)
 43640  		// cond:
 43641  		// result: (First nil no yes)
 43642  		for {
 43643  			v := b.Control
 43644  			if v.Op != OpPPC64FlagEQ {
 43645  				break
 43646  			}
 43647  			b.Kind = BlockFirst
 43648  			b.SetControl(nil)
 43649  			b.Aux = nil
 43650  			b.swapSuccessors()
 43651  			return true
 43652  		}
 43653  		// match: (GT (FlagLT) yes no)
 43654  		// cond:
 43655  		// result: (First nil no yes)
 43656  		for {
 43657  			v := b.Control
 43658  			if v.Op != OpPPC64FlagLT {
 43659  				break
 43660  			}
 43661  			b.Kind = BlockFirst
 43662  			b.SetControl(nil)
 43663  			b.Aux = nil
 43664  			b.swapSuccessors()
 43665  			return true
 43666  		}
 43667  		// match: (GT (FlagGT) yes no)
 43668  		// cond:
 43669  		// result: (First nil yes no)
 43670  		for {
 43671  			v := b.Control
 43672  			if v.Op != OpPPC64FlagGT {
 43673  				break
 43674  			}
 43675  			b.Kind = BlockFirst
 43676  			b.SetControl(nil)
 43677  			b.Aux = nil
 43678  			return true
 43679  		}
 43680  		// match: (GT (InvertFlags cmp) yes no)
 43681  		// cond:
 43682  		// result: (LT cmp yes no)
 43683  		for {
 43684  			v := b.Control
 43685  			if v.Op != OpPPC64InvertFlags {
 43686  				break
 43687  			}
 43688  			cmp := v.Args[0]
 43689  			b.Kind = BlockPPC64LT
 43690  			b.SetControl(cmp)
 43691  			b.Aux = nil
 43692  			return true
 43693  		}
 43694  	case BlockIf:
 43695  		// match: (If (Equal cc) yes no)
 43696  		// cond:
 43697  		// result: (EQ cc yes no)
 43698  		for {
 43699  			v := b.Control
 43700  			if v.Op != OpPPC64Equal {
 43701  				break
 43702  			}
 43703  			cc := v.Args[0]
 43704  			b.Kind = BlockPPC64EQ
 43705  			b.SetControl(cc)
 43706  			b.Aux = nil
 43707  			return true
 43708  		}
 43709  		// match: (If (NotEqual cc) yes no)
 43710  		// cond:
 43711  		// result: (NE cc yes no)
 43712  		for {
 43713  			v := b.Control
 43714  			if v.Op != OpPPC64NotEqual {
 43715  				break
 43716  			}
 43717  			cc := v.Args[0]
 43718  			b.Kind = BlockPPC64NE
 43719  			b.SetControl(cc)
 43720  			b.Aux = nil
 43721  			return true
 43722  		}
 43723  		// match: (If (LessThan cc) yes no)
 43724  		// cond:
 43725  		// result: (LT cc yes no)
 43726  		for {
 43727  			v := b.Control
 43728  			if v.Op != OpPPC64LessThan {
 43729  				break
 43730  			}
 43731  			cc := v.Args[0]
 43732  			b.Kind = BlockPPC64LT
 43733  			b.SetControl(cc)
 43734  			b.Aux = nil
 43735  			return true
 43736  		}
 43737  		// match: (If (LessEqual cc) yes no)
 43738  		// cond:
 43739  		// result: (LE cc yes no)
 43740  		for {
 43741  			v := b.Control
 43742  			if v.Op != OpPPC64LessEqual {
 43743  				break
 43744  			}
 43745  			cc := v.Args[0]
 43746  			b.Kind = BlockPPC64LE
 43747  			b.SetControl(cc)
 43748  			b.Aux = nil
 43749  			return true
 43750  		}
 43751  		// match: (If (GreaterThan cc) yes no)
 43752  		// cond:
 43753  		// result: (GT cc yes no)
 43754  		for {
 43755  			v := b.Control
 43756  			if v.Op != OpPPC64GreaterThan {
 43757  				break
 43758  			}
 43759  			cc := v.Args[0]
 43760  			b.Kind = BlockPPC64GT
 43761  			b.SetControl(cc)
 43762  			b.Aux = nil
 43763  			return true
 43764  		}
 43765  		// match: (If (GreaterEqual cc) yes no)
 43766  		// cond:
 43767  		// result: (GE cc yes no)
 43768  		for {
 43769  			v := b.Control
 43770  			if v.Op != OpPPC64GreaterEqual {
 43771  				break
 43772  			}
 43773  			cc := v.Args[0]
 43774  			b.Kind = BlockPPC64GE
 43775  			b.SetControl(cc)
 43776  			b.Aux = nil
 43777  			return true
 43778  		}
 43779  		// match: (If (FLessThan cc) yes no)
 43780  		// cond:
 43781  		// result: (FLT cc yes no)
 43782  		for {
 43783  			v := b.Control
 43784  			if v.Op != OpPPC64FLessThan {
 43785  				break
 43786  			}
 43787  			cc := v.Args[0]
 43788  			b.Kind = BlockPPC64FLT
 43789  			b.SetControl(cc)
 43790  			b.Aux = nil
 43791  			return true
 43792  		}
 43793  		// match: (If (FLessEqual cc) yes no)
 43794  		// cond:
 43795  		// result: (FLE cc yes no)
 43796  		for {
 43797  			v := b.Control
 43798  			if v.Op != OpPPC64FLessEqual {
 43799  				break
 43800  			}
 43801  			cc := v.Args[0]
 43802  			b.Kind = BlockPPC64FLE
 43803  			b.SetControl(cc)
 43804  			b.Aux = nil
 43805  			return true
 43806  		}
 43807  		// match: (If (FGreaterThan cc) yes no)
 43808  		// cond:
 43809  		// result: (FGT cc yes no)
 43810  		for {
 43811  			v := b.Control
 43812  			if v.Op != OpPPC64FGreaterThan {
 43813  				break
 43814  			}
 43815  			cc := v.Args[0]
 43816  			b.Kind = BlockPPC64FGT
 43817  			b.SetControl(cc)
 43818  			b.Aux = nil
 43819  			return true
 43820  		}
 43821  		// match: (If (FGreaterEqual cc) yes no)
 43822  		// cond:
 43823  		// result: (FGE cc yes no)
 43824  		for {
 43825  			v := b.Control
 43826  			if v.Op != OpPPC64FGreaterEqual {
 43827  				break
 43828  			}
 43829  			cc := v.Args[0]
 43830  			b.Kind = BlockPPC64FGE
 43831  			b.SetControl(cc)
 43832  			b.Aux = nil
 43833  			return true
 43834  		}
 43835  		// match: (If cond yes no)
 43836  		// cond:
 43837  		// result: (NE (CMPWconst [0] cond) yes no)
 43838  		for {
 43839  			v := b.Control
 43840  			_ = v
 43841  			cond := b.Control
 43842  			b.Kind = BlockPPC64NE
 43843  			v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
 43844  			v0.AuxInt = 0
 43845  			v0.AddArg(cond)
 43846  			b.SetControl(v0)
 43847  			b.Aux = nil
 43848  			return true
 43849  		}
 43850  	case BlockPPC64LE:
 43851  		// match: (LE (FlagEQ) yes no)
 43852  		// cond:
 43853  		// result: (First nil yes no)
 43854  		for {
 43855  			v := b.Control
 43856  			if v.Op != OpPPC64FlagEQ {
 43857  				break
 43858  			}
 43859  			b.Kind = BlockFirst
 43860  			b.SetControl(nil)
 43861  			b.Aux = nil
 43862  			return true
 43863  		}
 43864  		// match: (LE (FlagLT) yes no)
 43865  		// cond:
 43866  		// result: (First nil yes no)
 43867  		for {
 43868  			v := b.Control
 43869  			if v.Op != OpPPC64FlagLT {
 43870  				break
 43871  			}
 43872  			b.Kind = BlockFirst
 43873  			b.SetControl(nil)
 43874  			b.Aux = nil
 43875  			return true
 43876  		}
 43877  		// match: (LE (FlagGT) yes no)
 43878  		// cond:
 43879  		// result: (First nil no yes)
 43880  		for {
 43881  			v := b.Control
 43882  			if v.Op != OpPPC64FlagGT {
 43883  				break
 43884  			}
 43885  			b.Kind = BlockFirst
 43886  			b.SetControl(nil)
 43887  			b.Aux = nil
 43888  			b.swapSuccessors()
 43889  			return true
 43890  		}
 43891  		// match: (LE (InvertFlags cmp) yes no)
 43892  		// cond:
 43893  		// result: (GE cmp yes no)
 43894  		for {
 43895  			v := b.Control
 43896  			if v.Op != OpPPC64InvertFlags {
 43897  				break
 43898  			}
 43899  			cmp := v.Args[0]
 43900  			b.Kind = BlockPPC64GE
 43901  			b.SetControl(cmp)
 43902  			b.Aux = nil
 43903  			return true
 43904  		}
 43905  	case BlockPPC64LT:
 43906  		// match: (LT (FlagEQ) yes no)
 43907  		// cond:
 43908  		// result: (First nil no yes)
 43909  		for {
 43910  			v := b.Control
 43911  			if v.Op != OpPPC64FlagEQ {
 43912  				break
 43913  			}
 43914  			b.Kind = BlockFirst
 43915  			b.SetControl(nil)
 43916  			b.Aux = nil
 43917  			b.swapSuccessors()
 43918  			return true
 43919  		}
 43920  		// match: (LT (FlagLT) yes no)
 43921  		// cond:
 43922  		// result: (First nil yes no)
 43923  		for {
 43924  			v := b.Control
 43925  			if v.Op != OpPPC64FlagLT {
 43926  				break
 43927  			}
 43928  			b.Kind = BlockFirst
 43929  			b.SetControl(nil)
 43930  			b.Aux = nil
 43931  			return true
 43932  		}
 43933  		// match: (LT (FlagGT) yes no)
 43934  		// cond:
 43935  		// result: (First nil no yes)
 43936  		for {
 43937  			v := b.Control
 43938  			if v.Op != OpPPC64FlagGT {
 43939  				break
 43940  			}
 43941  			b.Kind = BlockFirst
 43942  			b.SetControl(nil)
 43943  			b.Aux = nil
 43944  			b.swapSuccessors()
 43945  			return true
 43946  		}
 43947  		// match: (LT (InvertFlags cmp) yes no)
 43948  		// cond:
 43949  		// result: (GT cmp yes no)
 43950  		for {
 43951  			v := b.Control
 43952  			if v.Op != OpPPC64InvertFlags {
 43953  				break
 43954  			}
 43955  			cmp := v.Args[0]
 43956  			b.Kind = BlockPPC64GT
 43957  			b.SetControl(cmp)
 43958  			b.Aux = nil
 43959  			return true
 43960  		}
 43961  	case BlockPPC64NE:
 43962  		// match: (NE (CMPWconst [0] (Equal cc)) yes no)
 43963  		// cond:
 43964  		// result: (EQ cc yes no)
 43965  		for {
 43966  			v := b.Control
 43967  			if v.Op != OpPPC64CMPWconst {
 43968  				break
 43969  			}
 43970  			if v.AuxInt != 0 {
 43971  				break
 43972  			}
 43973  			v_0 := v.Args[0]
 43974  			if v_0.Op != OpPPC64Equal {
 43975  				break
 43976  			}
 43977  			cc := v_0.Args[0]
 43978  			b.Kind = BlockPPC64EQ
 43979  			b.SetControl(cc)
 43980  			b.Aux = nil
 43981  			return true
 43982  		}
 43983  		// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
 43984  		// cond:
 43985  		// result: (NE cc yes no)
 43986  		for {
 43987  			v := b.Control
 43988  			if v.Op != OpPPC64CMPWconst {
 43989  				break
 43990  			}
 43991  			if v.AuxInt != 0 {
 43992  				break
 43993  			}
 43994  			v_0 := v.Args[0]
 43995  			if v_0.Op != OpPPC64NotEqual {
 43996  				break
 43997  			}
 43998  			cc := v_0.Args[0]
 43999  			b.Kind = BlockPPC64NE
 44000  			b.SetControl(cc)
 44001  			b.Aux = nil
 44002  			return true
 44003  		}
 44004  		// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
 44005  		// cond:
 44006  		// result: (LT cc yes no)
 44007  		for {
 44008  			v := b.Control
 44009  			if v.Op != OpPPC64CMPWconst {
 44010  				break
 44011  			}
 44012  			if v.AuxInt != 0 {
 44013  				break
 44014  			}
 44015  			v_0 := v.Args[0]
 44016  			if v_0.Op != OpPPC64LessThan {
 44017  				break
 44018  			}
 44019  			cc := v_0.Args[0]
 44020  			b.Kind = BlockPPC64LT
 44021  			b.SetControl(cc)
 44022  			b.Aux = nil
 44023  			return true
 44024  		}
 44025  		// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
 44026  		// cond:
 44027  		// result: (LE cc yes no)
 44028  		for {
 44029  			v := b.Control
 44030  			if v.Op != OpPPC64CMPWconst {
 44031  				break
 44032  			}
 44033  			if v.AuxInt != 0 {
 44034  				break
 44035  			}
 44036  			v_0 := v.Args[0]
 44037  			if v_0.Op != OpPPC64LessEqual {
 44038  				break
 44039  			}
 44040  			cc := v_0.Args[0]
 44041  			b.Kind = BlockPPC64LE
 44042  			b.SetControl(cc)
 44043  			b.Aux = nil
 44044  			return true
 44045  		}
 44046  		// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
 44047  		// cond:
 44048  		// result: (GT cc yes no)
 44049  		for {
 44050  			v := b.Control
 44051  			if v.Op != OpPPC64CMPWconst {
 44052  				break
 44053  			}
 44054  			if v.AuxInt != 0 {
 44055  				break
 44056  			}
 44057  			v_0 := v.Args[0]
 44058  			if v_0.Op != OpPPC64GreaterThan {
 44059  				break
 44060  			}
 44061  			cc := v_0.Args[0]
 44062  			b.Kind = BlockPPC64GT
 44063  			b.SetControl(cc)
 44064  			b.Aux = nil
 44065  			return true
 44066  		}
 44067  		// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
 44068  		// cond:
 44069  		// result: (GE cc yes no)
 44070  		for {
 44071  			v := b.Control
 44072  			if v.Op != OpPPC64CMPWconst {
 44073  				break
 44074  			}
 44075  			if v.AuxInt != 0 {
 44076  				break
 44077  			}
 44078  			v_0 := v.Args[0]
 44079  			if v_0.Op != OpPPC64GreaterEqual {
 44080  				break
 44081  			}
 44082  			cc := v_0.Args[0]
 44083  			b.Kind = BlockPPC64GE
 44084  			b.SetControl(cc)
 44085  			b.Aux = nil
 44086  			return true
 44087  		}
 44088  		// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
 44089  		// cond:
 44090  		// result: (FLT cc yes no)
 44091  		for {
 44092  			v := b.Control
 44093  			if v.Op != OpPPC64CMPWconst {
 44094  				break
 44095  			}
 44096  			if v.AuxInt != 0 {
 44097  				break
 44098  			}
 44099  			v_0 := v.Args[0]
 44100  			if v_0.Op != OpPPC64FLessThan {
 44101  				break
 44102  			}
 44103  			cc := v_0.Args[0]
 44104  			b.Kind = BlockPPC64FLT
 44105  			b.SetControl(cc)
 44106  			b.Aux = nil
 44107  			return true
 44108  		}
 44109  		// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
 44110  		// cond:
 44111  		// result: (FLE cc yes no)
 44112  		for {
 44113  			v := b.Control
 44114  			if v.Op != OpPPC64CMPWconst {
 44115  				break
 44116  			}
 44117  			if v.AuxInt != 0 {
 44118  				break
 44119  			}
 44120  			v_0 := v.Args[0]
 44121  			if v_0.Op != OpPPC64FLessEqual {
 44122  				break
 44123  			}
 44124  			cc := v_0.Args[0]
 44125  			b.Kind = BlockPPC64FLE
 44126  			b.SetControl(cc)
 44127  			b.Aux = nil
 44128  			return true
 44129  		}
 44130  		// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
 44131  		// cond:
 44132  		// result: (FGT cc yes no)
 44133  		for {
 44134  			v := b.Control
 44135  			if v.Op != OpPPC64CMPWconst {
 44136  				break
 44137  			}
 44138  			if v.AuxInt != 0 {
 44139  				break
 44140  			}
 44141  			v_0 := v.Args[0]
 44142  			if v_0.Op != OpPPC64FGreaterThan {
 44143  				break
 44144  			}
 44145  			cc := v_0.Args[0]
 44146  			b.Kind = BlockPPC64FGT
 44147  			b.SetControl(cc)
 44148  			b.Aux = nil
 44149  			return true
 44150  		}
 44151  		// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
 44152  		// cond:
 44153  		// result: (FGE cc yes no)
 44154  		for {
 44155  			v := b.Control
 44156  			if v.Op != OpPPC64CMPWconst {
 44157  				break
 44158  			}
 44159  			if v.AuxInt != 0 {
 44160  				break
 44161  			}
 44162  			v_0 := v.Args[0]
 44163  			if v_0.Op != OpPPC64FGreaterEqual {
 44164  				break
 44165  			}
 44166  			cc := v_0.Args[0]
 44167  			b.Kind = BlockPPC64FGE
 44168  			b.SetControl(cc)
 44169  			b.Aux = nil
 44170  			return true
 44171  		}
 44172  		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 44173  		// cond:
 44174  		// result: (NE (ANDCCconst [c] x) yes no)
 44175  		for {
 44176  			v := b.Control
 44177  			if v.Op != OpPPC64CMPconst {
 44178  				break
 44179  			}
 44180  			if v.AuxInt != 0 {
 44181  				break
 44182  			}
 44183  			v_0 := v.Args[0]
 44184  			if v_0.Op != OpPPC64ANDconst {
 44185  				break
 44186  			}
 44187  			c := v_0.AuxInt
 44188  			x := v_0.Args[0]
 44189  			b.Kind = BlockPPC64NE
 44190  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 44191  			v0.AuxInt = c
 44192  			v0.AddArg(x)
 44193  			b.SetControl(v0)
 44194  			b.Aux = nil
 44195  			return true
 44196  		}
 44197  		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 44198  		// cond:
 44199  		// result: (NE (ANDCCconst [c] x) yes no)
 44200  		for {
 44201  			v := b.Control
 44202  			if v.Op != OpPPC64CMPWconst {
 44203  				break
 44204  			}
 44205  			if v.AuxInt != 0 {
 44206  				break
 44207  			}
 44208  			v_0 := v.Args[0]
 44209  			if v_0.Op != OpPPC64ANDconst {
 44210  				break
 44211  			}
 44212  			c := v_0.AuxInt
 44213  			x := v_0.Args[0]
 44214  			b.Kind = BlockPPC64NE
 44215  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 44216  			v0.AuxInt = c
 44217  			v0.AddArg(x)
 44218  			b.SetControl(v0)
 44219  			b.Aux = nil
 44220  			return true
 44221  		}
 44222  		// match: (NE (FlagEQ) yes no)
 44223  		// cond:
 44224  		// result: (First nil no yes)
 44225  		for {
 44226  			v := b.Control
 44227  			if v.Op != OpPPC64FlagEQ {
 44228  				break
 44229  			}
 44230  			b.Kind = BlockFirst
 44231  			b.SetControl(nil)
 44232  			b.Aux = nil
 44233  			b.swapSuccessors()
 44234  			return true
 44235  		}
 44236  		// match: (NE (FlagLT) yes no)
 44237  		// cond:
 44238  		// result: (First nil yes no)
 44239  		for {
 44240  			v := b.Control
 44241  			if v.Op != OpPPC64FlagLT {
 44242  				break
 44243  			}
 44244  			b.Kind = BlockFirst
 44245  			b.SetControl(nil)
 44246  			b.Aux = nil
 44247  			return true
 44248  		}
 44249  		// match: (NE (FlagGT) yes no)
 44250  		// cond:
 44251  		// result: (First nil yes no)
 44252  		for {
 44253  			v := b.Control
 44254  			if v.Op != OpPPC64FlagGT {
 44255  				break
 44256  			}
 44257  			b.Kind = BlockFirst
 44258  			b.SetControl(nil)
 44259  			b.Aux = nil
 44260  			return true
 44261  		}
 44262  		// match: (NE (InvertFlags cmp) yes no)
 44263  		// cond:
 44264  		// result: (NE cmp yes no)
 44265  		for {
 44266  			v := b.Control
 44267  			if v.Op != OpPPC64InvertFlags {
 44268  				break
 44269  			}
 44270  			cmp := v.Args[0]
 44271  			b.Kind = BlockPPC64NE
 44272  			b.SetControl(cmp)
 44273  			b.Aux = nil
 44274  			return true
 44275  		}
 44276  	}
 44277  	return false
 44278  }