github.com/d4l3k/go@v0.0.0-20151015000803-65fc379daeda/src/sync/atomic/asm_ppc64x.s (about) 1 // Copyright 2014 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 // +build ppc64 ppc64le 6 7 #include "textflag.h" 8 9 TEXT ·SwapInt32(SB),NOSPLIT,$0-20 10 BR ·SwapUint32(SB) 11 12 TEXT ·SwapUint32(SB),NOSPLIT,$0-20 13 MOVD addr+0(FP), R3 14 MOVW new+8(FP), R4 15 SYNC 16 LWAR (R3), R5 17 STWCCC R4, (R3) 18 BNE -3(PC) 19 SYNC 20 ISYNC 21 MOVW R5, old+16(FP) 22 RET 23 24 TEXT ·SwapInt64(SB),NOSPLIT,$0-24 25 BR ·SwapUint64(SB) 26 27 TEXT ·SwapUint64(SB),NOSPLIT,$0-24 28 MOVD addr+0(FP), R3 29 MOVD new+8(FP), R4 30 SYNC 31 LDAR (R3), R5 32 STDCCC R4, (R3) 33 BNE -3(PC) 34 SYNC 35 ISYNC 36 MOVD R5, old+16(FP) 37 RET 38 39 TEXT ·SwapUintptr(SB),NOSPLIT,$0-24 40 BR ·SwapUint64(SB) 41 42 TEXT ·CompareAndSwapInt32(SB),NOSPLIT,$0-17 43 BR ·CompareAndSwapUint32(SB) 44 45 TEXT ·CompareAndSwapUint32(SB),NOSPLIT,$0-17 46 MOVD addr+0(FP), R3 47 MOVW old+8(FP), R4 48 MOVW new+12(FP), R5 49 SYNC 50 LWAR (R3), R6 51 CMPW R6, R4 52 BNE 8(PC) 53 STWCCC R5, (R3) 54 BNE -5(PC) 55 SYNC 56 ISYNC 57 MOVD $1, R3 58 MOVB R3, swapped+16(FP) 59 RET 60 MOVB R0, swapped+16(FP) 61 RET 62 63 TEXT ·CompareAndSwapUintptr(SB),NOSPLIT,$0-25 64 BR ·CompareAndSwapUint64(SB) 65 66 TEXT ·CompareAndSwapInt64(SB),NOSPLIT,$0-25 67 BR ·CompareAndSwapUint64(SB) 68 69 TEXT ·CompareAndSwapUint64(SB),NOSPLIT,$0-25 70 MOVD addr+0(FP), R3 71 MOVD old+8(FP), R4 72 MOVD new+16(FP), R5 73 SYNC 74 LDAR (R3), R6 75 CMP R6, R4 76 BNE 8(PC) 77 STDCCC R5, (R3) 78 BNE -5(PC) 79 SYNC 80 ISYNC 81 MOVD $1, R3 82 MOVB R3, swapped+24(FP) 83 RET 84 MOVB R0, swapped+24(FP) 85 RET 86 87 TEXT ·AddInt32(SB),NOSPLIT,$0-20 88 BR ·AddUint32(SB) 89 90 TEXT ·AddUint32(SB),NOSPLIT,$0-20 91 MOVD addr+0(FP), R3 92 MOVW delta+8(FP), R4 93 SYNC 94 LWAR (R3), R5 95 ADD R4, R5 96 STWCCC R5, (R3) 97 BNE -4(PC) 98 SYNC 99 ISYNC 100 MOVW R5, ret+16(FP) 101 RET 102 103 TEXT ·AddUintptr(SB),NOSPLIT,$0-24 104 BR ·AddUint64(SB) 105 106 TEXT ·AddInt64(SB),NOSPLIT,$0-24 107 BR ·AddUint64(SB) 108 109 TEXT ·AddUint64(SB),NOSPLIT,$0-24 110 MOVD addr+0(FP), R3 111 MOVD delta+8(FP), R4 112 SYNC 113 LDAR (R3), R5 114 ADD R4, R5 115 STDCCC R5, (R3) 116 BNE -4(PC) 117 SYNC 118 ISYNC 119 MOVD R5, ret+16(FP) 120 RET 121 122 TEXT ·LoadInt32(SB),NOSPLIT,$0-12 123 BR ·LoadUint32(SB) 124 125 TEXT ·LoadUint32(SB),NOSPLIT,$0-12 126 MOVD addr+0(FP), R3 127 SYNC 128 MOVW 0(R3), R3 129 CMPW R3, R3, CR7 130 BC 4, 30, 1(PC) // bne- cr7,0x4 131 ISYNC 132 MOVW R3, val+8(FP) 133 RET 134 135 TEXT ·LoadInt64(SB),NOSPLIT,$0-16 136 BR ·LoadUint64(SB) 137 138 TEXT ·LoadUint64(SB),NOSPLIT,$0-16 139 MOVD addr+0(FP), R3 140 SYNC 141 MOVD 0(R3), R3 142 CMP R3, R3, CR7 143 BC 4, 30, 1(PC) // bne- cr7,0x4 144 ISYNC 145 MOVD R3, val+8(FP) 146 RET 147 148 TEXT ·LoadUintptr(SB),NOSPLIT,$0-16 149 BR ·LoadPointer(SB) 150 151 TEXT ·LoadPointer(SB),NOSPLIT,$0-16 152 BR ·LoadUint64(SB) 153 154 TEXT ·StoreInt32(SB),NOSPLIT,$0-12 155 BR ·StoreUint32(SB) 156 157 TEXT ·StoreUint32(SB),NOSPLIT,$0-12 158 MOVD addr+0(FP), R3 159 MOVW val+8(FP), R4 160 SYNC 161 MOVW R4, 0(R3) 162 RET 163 164 TEXT ·StoreInt64(SB),NOSPLIT,$0-16 165 BR ·StoreUint64(SB) 166 167 TEXT ·StoreUint64(SB),NOSPLIT,$0-16 168 MOVD addr+0(FP), R3 169 MOVD val+8(FP), R4 170 SYNC 171 MOVD R4, 0(R3) 172 RET 173 174 TEXT ·StoreUintptr(SB),NOSPLIT,$0-16 175 BR ·StoreUint64(SB)