github.com/dannin/go@v0.0.0-20161031215817-d35dfd405eaa/src/cmd/compile/internal/ssa/rewriteS390X.go (about) 1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLrot32: 272 return rewriteValueS390X_OpLrot32(v, config) 273 case OpLrot64: 274 return rewriteValueS390X_OpLrot64(v, config) 275 case OpLsh16x16: 276 return rewriteValueS390X_OpLsh16x16(v, config) 277 case OpLsh16x32: 278 return rewriteValueS390X_OpLsh16x32(v, config) 279 case OpLsh16x64: 280 return rewriteValueS390X_OpLsh16x64(v, config) 281 case OpLsh16x8: 282 return rewriteValueS390X_OpLsh16x8(v, config) 283 case OpLsh32x16: 284 return rewriteValueS390X_OpLsh32x16(v, config) 285 case OpLsh32x32: 286 return rewriteValueS390X_OpLsh32x32(v, config) 287 case OpLsh32x64: 288 return rewriteValueS390X_OpLsh32x64(v, config) 289 case OpLsh32x8: 290 return rewriteValueS390X_OpLsh32x8(v, config) 291 case OpLsh64x16: 292 return rewriteValueS390X_OpLsh64x16(v, config) 293 case OpLsh64x32: 294 return rewriteValueS390X_OpLsh64x32(v, config) 295 case OpLsh64x64: 296 return rewriteValueS390X_OpLsh64x64(v, config) 297 case OpLsh64x8: 298 return rewriteValueS390X_OpLsh64x8(v, config) 299 case OpLsh8x16: 300 return rewriteValueS390X_OpLsh8x16(v, config) 301 case OpLsh8x32: 302 return rewriteValueS390X_OpLsh8x32(v, config) 303 case OpLsh8x64: 304 return rewriteValueS390X_OpLsh8x64(v, config) 305 case OpLsh8x8: 306 return rewriteValueS390X_OpLsh8x8(v, config) 307 case OpMod16: 308 return rewriteValueS390X_OpMod16(v, config) 309 case OpMod16u: 310 return rewriteValueS390X_OpMod16u(v, config) 311 case OpMod32: 312 return rewriteValueS390X_OpMod32(v, config) 313 case OpMod32u: 314 return rewriteValueS390X_OpMod32u(v, config) 315 case OpMod64: 316 return rewriteValueS390X_OpMod64(v, config) 317 case OpMod64u: 318 return rewriteValueS390X_OpMod64u(v, config) 319 case OpMod8: 320 return rewriteValueS390X_OpMod8(v, config) 321 case OpMod8u: 322 return rewriteValueS390X_OpMod8u(v, config) 323 case OpMove: 324 return rewriteValueS390X_OpMove(v, config) 325 case OpMul16: 326 return rewriteValueS390X_OpMul16(v, config) 327 case OpMul32: 328 return rewriteValueS390X_OpMul32(v, config) 329 case OpMul32F: 330 return rewriteValueS390X_OpMul32F(v, config) 331 case OpMul64: 332 return rewriteValueS390X_OpMul64(v, config) 333 case OpMul64F: 334 return rewriteValueS390X_OpMul64F(v, config) 335 case OpMul8: 336 return rewriteValueS390X_OpMul8(v, config) 337 case OpNeg16: 338 return rewriteValueS390X_OpNeg16(v, config) 339 case OpNeg32: 340 return rewriteValueS390X_OpNeg32(v, config) 341 case OpNeg32F: 342 return rewriteValueS390X_OpNeg32F(v, config) 343 case OpNeg64: 344 return rewriteValueS390X_OpNeg64(v, config) 345 case OpNeg64F: 346 return rewriteValueS390X_OpNeg64F(v, config) 347 case OpNeg8: 348 return rewriteValueS390X_OpNeg8(v, config) 349 case OpNeq16: 350 return rewriteValueS390X_OpNeq16(v, config) 351 case OpNeq32: 352 return rewriteValueS390X_OpNeq32(v, config) 353 case OpNeq32F: 354 return rewriteValueS390X_OpNeq32F(v, config) 355 case OpNeq64: 356 return rewriteValueS390X_OpNeq64(v, config) 357 case OpNeq64F: 358 return rewriteValueS390X_OpNeq64F(v, config) 359 case OpNeq8: 360 return rewriteValueS390X_OpNeq8(v, config) 361 case OpNeqB: 362 return rewriteValueS390X_OpNeqB(v, config) 363 case OpNeqPtr: 364 return rewriteValueS390X_OpNeqPtr(v, config) 365 case OpNilCheck: 366 return rewriteValueS390X_OpNilCheck(v, config) 367 case OpNot: 368 return rewriteValueS390X_OpNot(v, config) 369 case OpOffPtr: 370 return rewriteValueS390X_OpOffPtr(v, config) 371 case OpOr16: 372 return rewriteValueS390X_OpOr16(v, config) 373 case OpOr32: 374 return rewriteValueS390X_OpOr32(v, config) 375 case OpOr64: 376 return rewriteValueS390X_OpOr64(v, config) 377 case OpOr8: 378 return rewriteValueS390X_OpOr8(v, config) 379 case OpOrB: 380 return rewriteValueS390X_OpOrB(v, config) 381 case OpRsh16Ux16: 382 return rewriteValueS390X_OpRsh16Ux16(v, config) 383 case OpRsh16Ux32: 384 return rewriteValueS390X_OpRsh16Ux32(v, config) 385 case OpRsh16Ux64: 386 return rewriteValueS390X_OpRsh16Ux64(v, config) 387 case OpRsh16Ux8: 388 return rewriteValueS390X_OpRsh16Ux8(v, config) 389 case OpRsh16x16: 390 return rewriteValueS390X_OpRsh16x16(v, config) 391 case OpRsh16x32: 392 return rewriteValueS390X_OpRsh16x32(v, config) 393 case OpRsh16x64: 394 return rewriteValueS390X_OpRsh16x64(v, config) 395 case OpRsh16x8: 396 return rewriteValueS390X_OpRsh16x8(v, config) 397 case OpRsh32Ux16: 398 return rewriteValueS390X_OpRsh32Ux16(v, config) 399 case OpRsh32Ux32: 400 return rewriteValueS390X_OpRsh32Ux32(v, config) 401 case OpRsh32Ux64: 402 return rewriteValueS390X_OpRsh32Ux64(v, config) 403 case OpRsh32Ux8: 404 return rewriteValueS390X_OpRsh32Ux8(v, config) 405 case OpRsh32x16: 406 return rewriteValueS390X_OpRsh32x16(v, config) 407 case OpRsh32x32: 408 return rewriteValueS390X_OpRsh32x32(v, config) 409 case OpRsh32x64: 410 return rewriteValueS390X_OpRsh32x64(v, config) 411 case OpRsh32x8: 412 return rewriteValueS390X_OpRsh32x8(v, config) 413 case OpRsh64Ux16: 414 return rewriteValueS390X_OpRsh64Ux16(v, config) 415 case OpRsh64Ux32: 416 return rewriteValueS390X_OpRsh64Ux32(v, config) 417 case OpRsh64Ux64: 418 return rewriteValueS390X_OpRsh64Ux64(v, config) 419 case OpRsh64Ux8: 420 return rewriteValueS390X_OpRsh64Ux8(v, config) 421 case OpRsh64x16: 422 return rewriteValueS390X_OpRsh64x16(v, config) 423 case OpRsh64x32: 424 return rewriteValueS390X_OpRsh64x32(v, config) 425 case OpRsh64x64: 426 return rewriteValueS390X_OpRsh64x64(v, config) 427 case OpRsh64x8: 428 return rewriteValueS390X_OpRsh64x8(v, config) 429 case OpRsh8Ux16: 430 return rewriteValueS390X_OpRsh8Ux16(v, config) 431 case OpRsh8Ux32: 432 return rewriteValueS390X_OpRsh8Ux32(v, config) 433 case OpRsh8Ux64: 434 return rewriteValueS390X_OpRsh8Ux64(v, config) 435 case OpRsh8Ux8: 436 return rewriteValueS390X_OpRsh8Ux8(v, config) 437 case OpRsh8x16: 438 return rewriteValueS390X_OpRsh8x16(v, config) 439 case OpRsh8x32: 440 return rewriteValueS390X_OpRsh8x32(v, config) 441 case OpRsh8x64: 442 return rewriteValueS390X_OpRsh8x64(v, config) 443 case OpRsh8x8: 444 return rewriteValueS390X_OpRsh8x8(v, config) 445 case OpS390XADD: 446 return rewriteValueS390X_OpS390XADD(v, config) 447 case OpS390XADDW: 448 return rewriteValueS390X_OpS390XADDW(v, config) 449 case OpS390XADDWconst: 450 return rewriteValueS390X_OpS390XADDWconst(v, config) 451 case OpS390XADDconst: 452 return rewriteValueS390X_OpS390XADDconst(v, config) 453 case OpS390XAND: 454 return rewriteValueS390X_OpS390XAND(v, config) 455 case OpS390XANDW: 456 return rewriteValueS390X_OpS390XANDW(v, config) 457 case OpS390XANDWconst: 458 return rewriteValueS390X_OpS390XANDWconst(v, config) 459 case OpS390XANDconst: 460 return rewriteValueS390X_OpS390XANDconst(v, config) 461 case OpS390XCMP: 462 return rewriteValueS390X_OpS390XCMP(v, config) 463 case OpS390XCMPU: 464 return rewriteValueS390X_OpS390XCMPU(v, config) 465 case OpS390XCMPUconst: 466 return rewriteValueS390X_OpS390XCMPUconst(v, config) 467 case OpS390XCMPW: 468 return rewriteValueS390X_OpS390XCMPW(v, config) 469 case OpS390XCMPWU: 470 return rewriteValueS390X_OpS390XCMPWU(v, config) 471 case OpS390XCMPWUconst: 472 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 473 case OpS390XCMPWconst: 474 return rewriteValueS390X_OpS390XCMPWconst(v, config) 475 case OpS390XCMPconst: 476 return rewriteValueS390X_OpS390XCMPconst(v, config) 477 case OpS390XFMOVDload: 478 return rewriteValueS390X_OpS390XFMOVDload(v, config) 479 case OpS390XFMOVDloadidx: 480 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 481 case OpS390XFMOVDstore: 482 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 483 case OpS390XFMOVDstoreidx: 484 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 485 case OpS390XFMOVSload: 486 return rewriteValueS390X_OpS390XFMOVSload(v, config) 487 case OpS390XFMOVSloadidx: 488 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 489 case OpS390XFMOVSstore: 490 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 491 case OpS390XFMOVSstoreidx: 492 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 493 case OpS390XMOVBZload: 494 return rewriteValueS390X_OpS390XMOVBZload(v, config) 495 case OpS390XMOVBZloadidx: 496 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 497 case OpS390XMOVBZreg: 498 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 499 case OpS390XMOVBload: 500 return rewriteValueS390X_OpS390XMOVBload(v, config) 501 case OpS390XMOVBreg: 502 return rewriteValueS390X_OpS390XMOVBreg(v, config) 503 case OpS390XMOVBstore: 504 return rewriteValueS390X_OpS390XMOVBstore(v, config) 505 case OpS390XMOVBstoreconst: 506 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 507 case OpS390XMOVBstoreidx: 508 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 509 case OpS390XMOVDEQ: 510 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 511 case OpS390XMOVDGE: 512 return rewriteValueS390X_OpS390XMOVDGE(v, config) 513 case OpS390XMOVDGT: 514 return rewriteValueS390X_OpS390XMOVDGT(v, config) 515 case OpS390XMOVDLE: 516 return rewriteValueS390X_OpS390XMOVDLE(v, config) 517 case OpS390XMOVDLT: 518 return rewriteValueS390X_OpS390XMOVDLT(v, config) 519 case OpS390XMOVDNE: 520 return rewriteValueS390X_OpS390XMOVDNE(v, config) 521 case OpS390XMOVDaddr: 522 return rewriteValueS390X_OpS390XMOVDaddr(v, config) 523 case OpS390XMOVDaddridx: 524 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 525 case OpS390XMOVDload: 526 return rewriteValueS390X_OpS390XMOVDload(v, config) 527 case OpS390XMOVDloadidx: 528 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 529 case OpS390XMOVDstore: 530 return rewriteValueS390X_OpS390XMOVDstore(v, config) 531 case OpS390XMOVDstoreconst: 532 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 533 case OpS390XMOVDstoreidx: 534 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 535 case OpS390XMOVHBRstore: 536 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 537 case OpS390XMOVHBRstoreidx: 538 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 539 case OpS390XMOVHZload: 540 return rewriteValueS390X_OpS390XMOVHZload(v, config) 541 case OpS390XMOVHZloadidx: 542 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 543 case OpS390XMOVHZreg: 544 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 545 case OpS390XMOVHload: 546 return rewriteValueS390X_OpS390XMOVHload(v, config) 547 case OpS390XMOVHreg: 548 return rewriteValueS390X_OpS390XMOVHreg(v, config) 549 case OpS390XMOVHstore: 550 return rewriteValueS390X_OpS390XMOVHstore(v, config) 551 case OpS390XMOVHstoreconst: 552 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 553 case OpS390XMOVHstoreidx: 554 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 555 case OpS390XMOVWBRstore: 556 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 557 case OpS390XMOVWBRstoreidx: 558 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 559 case OpS390XMOVWZload: 560 return rewriteValueS390X_OpS390XMOVWZload(v, config) 561 case OpS390XMOVWZloadidx: 562 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 563 case OpS390XMOVWZreg: 564 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 565 case OpS390XMOVWload: 566 return rewriteValueS390X_OpS390XMOVWload(v, config) 567 case OpS390XMOVWreg: 568 return rewriteValueS390X_OpS390XMOVWreg(v, config) 569 case OpS390XMOVWstore: 570 return rewriteValueS390X_OpS390XMOVWstore(v, config) 571 case OpS390XMOVWstoreconst: 572 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 573 case OpS390XMOVWstoreidx: 574 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 575 case OpS390XMULLD: 576 return rewriteValueS390X_OpS390XMULLD(v, config) 577 case OpS390XMULLDconst: 578 return rewriteValueS390X_OpS390XMULLDconst(v, config) 579 case OpS390XMULLW: 580 return rewriteValueS390X_OpS390XMULLW(v, config) 581 case OpS390XMULLWconst: 582 return rewriteValueS390X_OpS390XMULLWconst(v, config) 583 case OpS390XNEG: 584 return rewriteValueS390X_OpS390XNEG(v, config) 585 case OpS390XNEGW: 586 return rewriteValueS390X_OpS390XNEGW(v, config) 587 case OpS390XNOT: 588 return rewriteValueS390X_OpS390XNOT(v, config) 589 case OpS390XNOTW: 590 return rewriteValueS390X_OpS390XNOTW(v, config) 591 case OpS390XOR: 592 return rewriteValueS390X_OpS390XOR(v, config) 593 case OpS390XORW: 594 return rewriteValueS390X_OpS390XORW(v, config) 595 case OpS390XORWconst: 596 return rewriteValueS390X_OpS390XORWconst(v, config) 597 case OpS390XORconst: 598 return rewriteValueS390X_OpS390XORconst(v, config) 599 case OpS390XSLD: 600 return rewriteValueS390X_OpS390XSLD(v, config) 601 case OpS390XSLW: 602 return rewriteValueS390X_OpS390XSLW(v, config) 603 case OpS390XSRAD: 604 return rewriteValueS390X_OpS390XSRAD(v, config) 605 case OpS390XSRADconst: 606 return rewriteValueS390X_OpS390XSRADconst(v, config) 607 case OpS390XSRAW: 608 return rewriteValueS390X_OpS390XSRAW(v, config) 609 case OpS390XSRAWconst: 610 return rewriteValueS390X_OpS390XSRAWconst(v, config) 611 case OpS390XSRD: 612 return rewriteValueS390X_OpS390XSRD(v, config) 613 case OpS390XSRW: 614 return rewriteValueS390X_OpS390XSRW(v, config) 615 case OpS390XSTM2: 616 return rewriteValueS390X_OpS390XSTM2(v, config) 617 case OpS390XSTMG2: 618 return rewriteValueS390X_OpS390XSTMG2(v, config) 619 case OpS390XSUB: 620 return rewriteValueS390X_OpS390XSUB(v, config) 621 case OpS390XSUBEWcarrymask: 622 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 623 case OpS390XSUBEcarrymask: 624 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 625 case OpS390XSUBW: 626 return rewriteValueS390X_OpS390XSUBW(v, config) 627 case OpS390XSUBWconst: 628 return rewriteValueS390X_OpS390XSUBWconst(v, config) 629 case OpS390XSUBconst: 630 return rewriteValueS390X_OpS390XSUBconst(v, config) 631 case OpS390XXOR: 632 return rewriteValueS390X_OpS390XXOR(v, config) 633 case OpS390XXORW: 634 return rewriteValueS390X_OpS390XXORW(v, config) 635 case OpS390XXORWconst: 636 return rewriteValueS390X_OpS390XXORWconst(v, config) 637 case OpS390XXORconst: 638 return rewriteValueS390X_OpS390XXORconst(v, config) 639 case OpSelect0: 640 return rewriteValueS390X_OpSelect0(v, config) 641 case OpSelect1: 642 return rewriteValueS390X_OpSelect1(v, config) 643 case OpSignExt16to32: 644 return rewriteValueS390X_OpSignExt16to32(v, config) 645 case OpSignExt16to64: 646 return rewriteValueS390X_OpSignExt16to64(v, config) 647 case OpSignExt32to64: 648 return rewriteValueS390X_OpSignExt32to64(v, config) 649 case OpSignExt8to16: 650 return rewriteValueS390X_OpSignExt8to16(v, config) 651 case OpSignExt8to32: 652 return rewriteValueS390X_OpSignExt8to32(v, config) 653 case OpSignExt8to64: 654 return rewriteValueS390X_OpSignExt8to64(v, config) 655 case OpSlicemask: 656 return rewriteValueS390X_OpSlicemask(v, config) 657 case OpSqrt: 658 return rewriteValueS390X_OpSqrt(v, config) 659 case OpStaticCall: 660 return rewriteValueS390X_OpStaticCall(v, config) 661 case OpStore: 662 return rewriteValueS390X_OpStore(v, config) 663 case OpSub16: 664 return rewriteValueS390X_OpSub16(v, config) 665 case OpSub32: 666 return rewriteValueS390X_OpSub32(v, config) 667 case OpSub32F: 668 return rewriteValueS390X_OpSub32F(v, config) 669 case OpSub64: 670 return rewriteValueS390X_OpSub64(v, config) 671 case OpSub64F: 672 return rewriteValueS390X_OpSub64F(v, config) 673 case OpSub8: 674 return rewriteValueS390X_OpSub8(v, config) 675 case OpSubPtr: 676 return rewriteValueS390X_OpSubPtr(v, config) 677 case OpTrunc16to8: 678 return rewriteValueS390X_OpTrunc16to8(v, config) 679 case OpTrunc32to16: 680 return rewriteValueS390X_OpTrunc32to16(v, config) 681 case OpTrunc32to8: 682 return rewriteValueS390X_OpTrunc32to8(v, config) 683 case OpTrunc64to16: 684 return rewriteValueS390X_OpTrunc64to16(v, config) 685 case OpTrunc64to32: 686 return rewriteValueS390X_OpTrunc64to32(v, config) 687 case OpTrunc64to8: 688 return rewriteValueS390X_OpTrunc64to8(v, config) 689 case OpXor16: 690 return rewriteValueS390X_OpXor16(v, config) 691 case OpXor32: 692 return rewriteValueS390X_OpXor32(v, config) 693 case OpXor64: 694 return rewriteValueS390X_OpXor64(v, config) 695 case OpXor8: 696 return rewriteValueS390X_OpXor8(v, config) 697 case OpZero: 698 return rewriteValueS390X_OpZero(v, config) 699 case OpZeroExt16to32: 700 return rewriteValueS390X_OpZeroExt16to32(v, config) 701 case OpZeroExt16to64: 702 return rewriteValueS390X_OpZeroExt16to64(v, config) 703 case OpZeroExt32to64: 704 return rewriteValueS390X_OpZeroExt32to64(v, config) 705 case OpZeroExt8to16: 706 return rewriteValueS390X_OpZeroExt8to16(v, config) 707 case OpZeroExt8to32: 708 return rewriteValueS390X_OpZeroExt8to32(v, config) 709 case OpZeroExt8to64: 710 return rewriteValueS390X_OpZeroExt8to64(v, config) 711 } 712 return false 713 } 714 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 715 b := v.Block 716 _ = b 717 // match: (Add16 x y) 718 // cond: 719 // result: (ADDW x y) 720 for { 721 x := v.Args[0] 722 y := v.Args[1] 723 v.reset(OpS390XADDW) 724 v.AddArg(x) 725 v.AddArg(y) 726 return true 727 } 728 } 729 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 730 b := v.Block 731 _ = b 732 // match: (Add32 x y) 733 // cond: 734 // result: (ADDW x y) 735 for { 736 x := v.Args[0] 737 y := v.Args[1] 738 v.reset(OpS390XADDW) 739 v.AddArg(x) 740 v.AddArg(y) 741 return true 742 } 743 } 744 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 745 b := v.Block 746 _ = b 747 // match: (Add32F x y) 748 // cond: 749 // result: (FADDS x y) 750 for { 751 x := v.Args[0] 752 y := v.Args[1] 753 v.reset(OpS390XFADDS) 754 v.AddArg(x) 755 v.AddArg(y) 756 return true 757 } 758 } 759 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 760 b := v.Block 761 _ = b 762 // match: (Add64 x y) 763 // cond: 764 // result: (ADD x y) 765 for { 766 x := v.Args[0] 767 y := v.Args[1] 768 v.reset(OpS390XADD) 769 v.AddArg(x) 770 v.AddArg(y) 771 return true 772 } 773 } 774 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 775 b := v.Block 776 _ = b 777 // match: (Add64F x y) 778 // cond: 779 // result: (FADD x y) 780 for { 781 x := v.Args[0] 782 y := v.Args[1] 783 v.reset(OpS390XFADD) 784 v.AddArg(x) 785 v.AddArg(y) 786 return true 787 } 788 } 789 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 790 b := v.Block 791 _ = b 792 // match: (Add8 x y) 793 // cond: 794 // result: (ADDW x y) 795 for { 796 x := v.Args[0] 797 y := v.Args[1] 798 v.reset(OpS390XADDW) 799 v.AddArg(x) 800 v.AddArg(y) 801 return true 802 } 803 } 804 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 805 b := v.Block 806 _ = b 807 // match: (AddPtr x y) 808 // cond: 809 // result: (ADD x y) 810 for { 811 x := v.Args[0] 812 y := v.Args[1] 813 v.reset(OpS390XADD) 814 v.AddArg(x) 815 v.AddArg(y) 816 return true 817 } 818 } 819 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 820 b := v.Block 821 _ = b 822 // match: (Addr {sym} base) 823 // cond: 824 // result: (MOVDaddr {sym} base) 825 for { 826 sym := v.Aux 827 base := v.Args[0] 828 v.reset(OpS390XMOVDaddr) 829 v.Aux = sym 830 v.AddArg(base) 831 return true 832 } 833 } 834 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 835 b := v.Block 836 _ = b 837 // match: (And16 x y) 838 // cond: 839 // result: (ANDW x y) 840 for { 841 x := v.Args[0] 842 y := v.Args[1] 843 v.reset(OpS390XANDW) 844 v.AddArg(x) 845 v.AddArg(y) 846 return true 847 } 848 } 849 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 850 b := v.Block 851 _ = b 852 // match: (And32 x y) 853 // cond: 854 // result: (ANDW x y) 855 for { 856 x := v.Args[0] 857 y := v.Args[1] 858 v.reset(OpS390XANDW) 859 v.AddArg(x) 860 v.AddArg(y) 861 return true 862 } 863 } 864 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 865 b := v.Block 866 _ = b 867 // match: (And64 x y) 868 // cond: 869 // result: (AND x y) 870 for { 871 x := v.Args[0] 872 y := v.Args[1] 873 v.reset(OpS390XAND) 874 v.AddArg(x) 875 v.AddArg(y) 876 return true 877 } 878 } 879 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 880 b := v.Block 881 _ = b 882 // match: (And8 x y) 883 // cond: 884 // result: (ANDW x y) 885 for { 886 x := v.Args[0] 887 y := v.Args[1] 888 v.reset(OpS390XANDW) 889 v.AddArg(x) 890 v.AddArg(y) 891 return true 892 } 893 } 894 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 895 b := v.Block 896 _ = b 897 // match: (AndB x y) 898 // cond: 899 // result: (ANDW x y) 900 for { 901 x := v.Args[0] 902 y := v.Args[1] 903 v.reset(OpS390XANDW) 904 v.AddArg(x) 905 v.AddArg(y) 906 return true 907 } 908 } 909 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 910 b := v.Block 911 _ = b 912 // match: (AtomicAdd32 ptr val mem) 913 // cond: 914 // result: (AddTupleFirst32 (LAA ptr val mem) val) 915 for { 916 ptr := v.Args[0] 917 val := v.Args[1] 918 mem := v.Args[2] 919 v.reset(OpS390XAddTupleFirst32) 920 v0 := b.NewValue0(v.Line, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 921 v0.AddArg(ptr) 922 v0.AddArg(val) 923 v0.AddArg(mem) 924 v.AddArg(v0) 925 v.AddArg(val) 926 return true 927 } 928 } 929 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 930 b := v.Block 931 _ = b 932 // match: (AtomicAdd64 ptr val mem) 933 // cond: 934 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 935 for { 936 ptr := v.Args[0] 937 val := v.Args[1] 938 mem := v.Args[2] 939 v.reset(OpS390XAddTupleFirst64) 940 v0 := b.NewValue0(v.Line, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 941 v0.AddArg(ptr) 942 v0.AddArg(val) 943 v0.AddArg(mem) 944 v.AddArg(v0) 945 v.AddArg(val) 946 return true 947 } 948 } 949 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 950 b := v.Block 951 _ = b 952 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 953 // cond: 954 // result: (LoweredAtomicCas32 ptr old new_ mem) 955 for { 956 ptr := v.Args[0] 957 old := v.Args[1] 958 new_ := v.Args[2] 959 mem := v.Args[3] 960 v.reset(OpS390XLoweredAtomicCas32) 961 v.AddArg(ptr) 962 v.AddArg(old) 963 v.AddArg(new_) 964 v.AddArg(mem) 965 return true 966 } 967 } 968 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 969 b := v.Block 970 _ = b 971 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 972 // cond: 973 // result: (LoweredAtomicCas64 ptr old new_ mem) 974 for { 975 ptr := v.Args[0] 976 old := v.Args[1] 977 new_ := v.Args[2] 978 mem := v.Args[3] 979 v.reset(OpS390XLoweredAtomicCas64) 980 v.AddArg(ptr) 981 v.AddArg(old) 982 v.AddArg(new_) 983 v.AddArg(mem) 984 return true 985 } 986 } 987 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 988 b := v.Block 989 _ = b 990 // match: (AtomicExchange32 ptr val mem) 991 // cond: 992 // result: (LoweredAtomicExchange32 ptr val mem) 993 for { 994 ptr := v.Args[0] 995 val := v.Args[1] 996 mem := v.Args[2] 997 v.reset(OpS390XLoweredAtomicExchange32) 998 v.AddArg(ptr) 999 v.AddArg(val) 1000 v.AddArg(mem) 1001 return true 1002 } 1003 } 1004 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1005 b := v.Block 1006 _ = b 1007 // match: (AtomicExchange64 ptr val mem) 1008 // cond: 1009 // result: (LoweredAtomicExchange64 ptr val mem) 1010 for { 1011 ptr := v.Args[0] 1012 val := v.Args[1] 1013 mem := v.Args[2] 1014 v.reset(OpS390XLoweredAtomicExchange64) 1015 v.AddArg(ptr) 1016 v.AddArg(val) 1017 v.AddArg(mem) 1018 return true 1019 } 1020 } 1021 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1022 b := v.Block 1023 _ = b 1024 // match: (AtomicLoad32 ptr mem) 1025 // cond: 1026 // result: (MOVWZatomicload ptr mem) 1027 for { 1028 ptr := v.Args[0] 1029 mem := v.Args[1] 1030 v.reset(OpS390XMOVWZatomicload) 1031 v.AddArg(ptr) 1032 v.AddArg(mem) 1033 return true 1034 } 1035 } 1036 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1037 b := v.Block 1038 _ = b 1039 // match: (AtomicLoad64 ptr mem) 1040 // cond: 1041 // result: (MOVDatomicload ptr mem) 1042 for { 1043 ptr := v.Args[0] 1044 mem := v.Args[1] 1045 v.reset(OpS390XMOVDatomicload) 1046 v.AddArg(ptr) 1047 v.AddArg(mem) 1048 return true 1049 } 1050 } 1051 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1052 b := v.Block 1053 _ = b 1054 // match: (AtomicLoadPtr ptr mem) 1055 // cond: 1056 // result: (MOVDatomicload ptr mem) 1057 for { 1058 ptr := v.Args[0] 1059 mem := v.Args[1] 1060 v.reset(OpS390XMOVDatomicload) 1061 v.AddArg(ptr) 1062 v.AddArg(mem) 1063 return true 1064 } 1065 } 1066 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1067 b := v.Block 1068 _ = b 1069 // match: (AtomicStore32 ptr val mem) 1070 // cond: 1071 // result: (MOVWatomicstore ptr val mem) 1072 for { 1073 ptr := v.Args[0] 1074 val := v.Args[1] 1075 mem := v.Args[2] 1076 v.reset(OpS390XMOVWatomicstore) 1077 v.AddArg(ptr) 1078 v.AddArg(val) 1079 v.AddArg(mem) 1080 return true 1081 } 1082 } 1083 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1084 b := v.Block 1085 _ = b 1086 // match: (AtomicStore64 ptr val mem) 1087 // cond: 1088 // result: (MOVDatomicstore ptr val mem) 1089 for { 1090 ptr := v.Args[0] 1091 val := v.Args[1] 1092 mem := v.Args[2] 1093 v.reset(OpS390XMOVDatomicstore) 1094 v.AddArg(ptr) 1095 v.AddArg(val) 1096 v.AddArg(mem) 1097 return true 1098 } 1099 } 1100 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1101 b := v.Block 1102 _ = b 1103 // match: (AtomicStorePtrNoWB ptr val mem) 1104 // cond: 1105 // result: (MOVDatomicstore ptr val mem) 1106 for { 1107 ptr := v.Args[0] 1108 val := v.Args[1] 1109 mem := v.Args[2] 1110 v.reset(OpS390XMOVDatomicstore) 1111 v.AddArg(ptr) 1112 v.AddArg(val) 1113 v.AddArg(mem) 1114 return true 1115 } 1116 } 1117 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1118 b := v.Block 1119 _ = b 1120 // match: (Avg64u <t> x y) 1121 // cond: 1122 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1123 for { 1124 t := v.Type 1125 x := v.Args[0] 1126 y := v.Args[1] 1127 v.reset(OpS390XADD) 1128 v0 := b.NewValue0(v.Line, OpS390XADD, t) 1129 v1 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1130 v1.AuxInt = 1 1131 v1.AddArg(x) 1132 v0.AddArg(v1) 1133 v2 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1134 v2.AuxInt = 1 1135 v2.AddArg(y) 1136 v0.AddArg(v2) 1137 v.AddArg(v0) 1138 v3 := b.NewValue0(v.Line, OpS390XANDconst, t) 1139 v3.AuxInt = 1 1140 v4 := b.NewValue0(v.Line, OpS390XAND, t) 1141 v4.AddArg(x) 1142 v4.AddArg(y) 1143 v3.AddArg(v4) 1144 v.AddArg(v3) 1145 return true 1146 } 1147 } 1148 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1149 b := v.Block 1150 _ = b 1151 // match: (Bswap32 x) 1152 // cond: 1153 // result: (MOVWBR x) 1154 for { 1155 x := v.Args[0] 1156 v.reset(OpS390XMOVWBR) 1157 v.AddArg(x) 1158 return true 1159 } 1160 } 1161 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1162 b := v.Block 1163 _ = b 1164 // match: (Bswap64 x) 1165 // cond: 1166 // result: (MOVDBR x) 1167 for { 1168 x := v.Args[0] 1169 v.reset(OpS390XMOVDBR) 1170 v.AddArg(x) 1171 return true 1172 } 1173 } 1174 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1175 b := v.Block 1176 _ = b 1177 // match: (ClosureCall [argwid] entry closure mem) 1178 // cond: 1179 // result: (CALLclosure [argwid] entry closure mem) 1180 for { 1181 argwid := v.AuxInt 1182 entry := v.Args[0] 1183 closure := v.Args[1] 1184 mem := v.Args[2] 1185 v.reset(OpS390XCALLclosure) 1186 v.AuxInt = argwid 1187 v.AddArg(entry) 1188 v.AddArg(closure) 1189 v.AddArg(mem) 1190 return true 1191 } 1192 } 1193 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1194 b := v.Block 1195 _ = b 1196 // match: (Com16 x) 1197 // cond: 1198 // result: (NOTW x) 1199 for { 1200 x := v.Args[0] 1201 v.reset(OpS390XNOTW) 1202 v.AddArg(x) 1203 return true 1204 } 1205 } 1206 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1207 b := v.Block 1208 _ = b 1209 // match: (Com32 x) 1210 // cond: 1211 // result: (NOTW x) 1212 for { 1213 x := v.Args[0] 1214 v.reset(OpS390XNOTW) 1215 v.AddArg(x) 1216 return true 1217 } 1218 } 1219 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1220 b := v.Block 1221 _ = b 1222 // match: (Com64 x) 1223 // cond: 1224 // result: (NOT x) 1225 for { 1226 x := v.Args[0] 1227 v.reset(OpS390XNOT) 1228 v.AddArg(x) 1229 return true 1230 } 1231 } 1232 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1233 b := v.Block 1234 _ = b 1235 // match: (Com8 x) 1236 // cond: 1237 // result: (NOTW x) 1238 for { 1239 x := v.Args[0] 1240 v.reset(OpS390XNOTW) 1241 v.AddArg(x) 1242 return true 1243 } 1244 } 1245 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1246 b := v.Block 1247 _ = b 1248 // match: (Const16 [val]) 1249 // cond: 1250 // result: (MOVDconst [val]) 1251 for { 1252 val := v.AuxInt 1253 v.reset(OpS390XMOVDconst) 1254 v.AuxInt = val 1255 return true 1256 } 1257 } 1258 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1259 b := v.Block 1260 _ = b 1261 // match: (Const32 [val]) 1262 // cond: 1263 // result: (MOVDconst [val]) 1264 for { 1265 val := v.AuxInt 1266 v.reset(OpS390XMOVDconst) 1267 v.AuxInt = val 1268 return true 1269 } 1270 } 1271 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1272 b := v.Block 1273 _ = b 1274 // match: (Const32F [val]) 1275 // cond: 1276 // result: (FMOVSconst [val]) 1277 for { 1278 val := v.AuxInt 1279 v.reset(OpS390XFMOVSconst) 1280 v.AuxInt = val 1281 return true 1282 } 1283 } 1284 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1285 b := v.Block 1286 _ = b 1287 // match: (Const64 [val]) 1288 // cond: 1289 // result: (MOVDconst [val]) 1290 for { 1291 val := v.AuxInt 1292 v.reset(OpS390XMOVDconst) 1293 v.AuxInt = val 1294 return true 1295 } 1296 } 1297 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1298 b := v.Block 1299 _ = b 1300 // match: (Const64F [val]) 1301 // cond: 1302 // result: (FMOVDconst [val]) 1303 for { 1304 val := v.AuxInt 1305 v.reset(OpS390XFMOVDconst) 1306 v.AuxInt = val 1307 return true 1308 } 1309 } 1310 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1311 b := v.Block 1312 _ = b 1313 // match: (Const8 [val]) 1314 // cond: 1315 // result: (MOVDconst [val]) 1316 for { 1317 val := v.AuxInt 1318 v.reset(OpS390XMOVDconst) 1319 v.AuxInt = val 1320 return true 1321 } 1322 } 1323 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1324 b := v.Block 1325 _ = b 1326 // match: (ConstBool [b]) 1327 // cond: 1328 // result: (MOVDconst [b]) 1329 for { 1330 b := v.AuxInt 1331 v.reset(OpS390XMOVDconst) 1332 v.AuxInt = b 1333 return true 1334 } 1335 } 1336 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1337 b := v.Block 1338 _ = b 1339 // match: (ConstNil) 1340 // cond: 1341 // result: (MOVDconst [0]) 1342 for { 1343 v.reset(OpS390XMOVDconst) 1344 v.AuxInt = 0 1345 return true 1346 } 1347 } 1348 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1349 b := v.Block 1350 _ = b 1351 // match: (Convert <t> x mem) 1352 // cond: 1353 // result: (MOVDconvert <t> x mem) 1354 for { 1355 t := v.Type 1356 x := v.Args[0] 1357 mem := v.Args[1] 1358 v.reset(OpS390XMOVDconvert) 1359 v.Type = t 1360 v.AddArg(x) 1361 v.AddArg(mem) 1362 return true 1363 } 1364 } 1365 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1366 b := v.Block 1367 _ = b 1368 // match: (Ctz32 <t> x) 1369 // cond: 1370 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1371 for { 1372 t := v.Type 1373 x := v.Args[0] 1374 v.reset(OpS390XSUB) 1375 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1376 v0.AuxInt = 64 1377 v.AddArg(v0) 1378 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1379 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1380 v3 := b.NewValue0(v.Line, OpS390XANDW, t) 1381 v4 := b.NewValue0(v.Line, OpS390XSUBWconst, t) 1382 v4.AuxInt = 1 1383 v4.AddArg(x) 1384 v3.AddArg(v4) 1385 v5 := b.NewValue0(v.Line, OpS390XNOTW, t) 1386 v5.AddArg(x) 1387 v3.AddArg(v5) 1388 v2.AddArg(v3) 1389 v1.AddArg(v2) 1390 v.AddArg(v1) 1391 return true 1392 } 1393 } 1394 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1395 b := v.Block 1396 _ = b 1397 // match: (Ctz64 <t> x) 1398 // cond: 1399 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1400 for { 1401 t := v.Type 1402 x := v.Args[0] 1403 v.reset(OpS390XSUB) 1404 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1405 v0.AuxInt = 64 1406 v.AddArg(v0) 1407 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1408 v2 := b.NewValue0(v.Line, OpS390XAND, t) 1409 v3 := b.NewValue0(v.Line, OpS390XSUBconst, t) 1410 v3.AuxInt = 1 1411 v3.AddArg(x) 1412 v2.AddArg(v3) 1413 v4 := b.NewValue0(v.Line, OpS390XNOT, t) 1414 v4.AddArg(x) 1415 v2.AddArg(v4) 1416 v1.AddArg(v2) 1417 v.AddArg(v1) 1418 return true 1419 } 1420 } 1421 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1422 b := v.Block 1423 _ = b 1424 // match: (Cvt32Fto32 x) 1425 // cond: 1426 // result: (CFEBRA x) 1427 for { 1428 x := v.Args[0] 1429 v.reset(OpS390XCFEBRA) 1430 v.AddArg(x) 1431 return true 1432 } 1433 } 1434 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1435 b := v.Block 1436 _ = b 1437 // match: (Cvt32Fto64 x) 1438 // cond: 1439 // result: (CGEBRA x) 1440 for { 1441 x := v.Args[0] 1442 v.reset(OpS390XCGEBRA) 1443 v.AddArg(x) 1444 return true 1445 } 1446 } 1447 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1448 b := v.Block 1449 _ = b 1450 // match: (Cvt32Fto64F x) 1451 // cond: 1452 // result: (LDEBR x) 1453 for { 1454 x := v.Args[0] 1455 v.reset(OpS390XLDEBR) 1456 v.AddArg(x) 1457 return true 1458 } 1459 } 1460 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1461 b := v.Block 1462 _ = b 1463 // match: (Cvt32to32F x) 1464 // cond: 1465 // result: (CEFBRA x) 1466 for { 1467 x := v.Args[0] 1468 v.reset(OpS390XCEFBRA) 1469 v.AddArg(x) 1470 return true 1471 } 1472 } 1473 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1474 b := v.Block 1475 _ = b 1476 // match: (Cvt32to64F x) 1477 // cond: 1478 // result: (CDFBRA x) 1479 for { 1480 x := v.Args[0] 1481 v.reset(OpS390XCDFBRA) 1482 v.AddArg(x) 1483 return true 1484 } 1485 } 1486 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1487 b := v.Block 1488 _ = b 1489 // match: (Cvt64Fto32 x) 1490 // cond: 1491 // result: (CFDBRA x) 1492 for { 1493 x := v.Args[0] 1494 v.reset(OpS390XCFDBRA) 1495 v.AddArg(x) 1496 return true 1497 } 1498 } 1499 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1500 b := v.Block 1501 _ = b 1502 // match: (Cvt64Fto32F x) 1503 // cond: 1504 // result: (LEDBR x) 1505 for { 1506 x := v.Args[0] 1507 v.reset(OpS390XLEDBR) 1508 v.AddArg(x) 1509 return true 1510 } 1511 } 1512 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1513 b := v.Block 1514 _ = b 1515 // match: (Cvt64Fto64 x) 1516 // cond: 1517 // result: (CGDBRA x) 1518 for { 1519 x := v.Args[0] 1520 v.reset(OpS390XCGDBRA) 1521 v.AddArg(x) 1522 return true 1523 } 1524 } 1525 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1526 b := v.Block 1527 _ = b 1528 // match: (Cvt64to32F x) 1529 // cond: 1530 // result: (CEGBRA x) 1531 for { 1532 x := v.Args[0] 1533 v.reset(OpS390XCEGBRA) 1534 v.AddArg(x) 1535 return true 1536 } 1537 } 1538 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1539 b := v.Block 1540 _ = b 1541 // match: (Cvt64to64F x) 1542 // cond: 1543 // result: (CDGBRA x) 1544 for { 1545 x := v.Args[0] 1546 v.reset(OpS390XCDGBRA) 1547 v.AddArg(x) 1548 return true 1549 } 1550 } 1551 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1552 b := v.Block 1553 _ = b 1554 // match: (DeferCall [argwid] mem) 1555 // cond: 1556 // result: (CALLdefer [argwid] mem) 1557 for { 1558 argwid := v.AuxInt 1559 mem := v.Args[0] 1560 v.reset(OpS390XCALLdefer) 1561 v.AuxInt = argwid 1562 v.AddArg(mem) 1563 return true 1564 } 1565 } 1566 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1567 b := v.Block 1568 _ = b 1569 // match: (Div16 x y) 1570 // cond: 1571 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1572 for { 1573 x := v.Args[0] 1574 y := v.Args[1] 1575 v.reset(OpS390XDIVW) 1576 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1577 v0.AddArg(x) 1578 v.AddArg(v0) 1579 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1580 v1.AddArg(y) 1581 v.AddArg(v1) 1582 return true 1583 } 1584 } 1585 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1586 b := v.Block 1587 _ = b 1588 // match: (Div16u x y) 1589 // cond: 1590 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1591 for { 1592 x := v.Args[0] 1593 y := v.Args[1] 1594 v.reset(OpS390XDIVWU) 1595 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1596 v0.AddArg(x) 1597 v.AddArg(v0) 1598 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1599 v1.AddArg(y) 1600 v.AddArg(v1) 1601 return true 1602 } 1603 } 1604 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1605 b := v.Block 1606 _ = b 1607 // match: (Div32 x y) 1608 // cond: 1609 // result: (DIVW (MOVWreg x) y) 1610 for { 1611 x := v.Args[0] 1612 y := v.Args[1] 1613 v.reset(OpS390XDIVW) 1614 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 1615 v0.AddArg(x) 1616 v.AddArg(v0) 1617 v.AddArg(y) 1618 return true 1619 } 1620 } 1621 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1622 b := v.Block 1623 _ = b 1624 // match: (Div32F x y) 1625 // cond: 1626 // result: (FDIVS x y) 1627 for { 1628 x := v.Args[0] 1629 y := v.Args[1] 1630 v.reset(OpS390XFDIVS) 1631 v.AddArg(x) 1632 v.AddArg(y) 1633 return true 1634 } 1635 } 1636 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1637 b := v.Block 1638 _ = b 1639 // match: (Div32u x y) 1640 // cond: 1641 // result: (DIVWU (MOVWZreg x) y) 1642 for { 1643 x := v.Args[0] 1644 y := v.Args[1] 1645 v.reset(OpS390XDIVWU) 1646 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1647 v0.AddArg(x) 1648 v.AddArg(v0) 1649 v.AddArg(y) 1650 return true 1651 } 1652 } 1653 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1654 b := v.Block 1655 _ = b 1656 // match: (Div64 x y) 1657 // cond: 1658 // result: (DIVD x y) 1659 for { 1660 x := v.Args[0] 1661 y := v.Args[1] 1662 v.reset(OpS390XDIVD) 1663 v.AddArg(x) 1664 v.AddArg(y) 1665 return true 1666 } 1667 } 1668 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1669 b := v.Block 1670 _ = b 1671 // match: (Div64F x y) 1672 // cond: 1673 // result: (FDIV x y) 1674 for { 1675 x := v.Args[0] 1676 y := v.Args[1] 1677 v.reset(OpS390XFDIV) 1678 v.AddArg(x) 1679 v.AddArg(y) 1680 return true 1681 } 1682 } 1683 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1684 b := v.Block 1685 _ = b 1686 // match: (Div64u x y) 1687 // cond: 1688 // result: (DIVDU x y) 1689 for { 1690 x := v.Args[0] 1691 y := v.Args[1] 1692 v.reset(OpS390XDIVDU) 1693 v.AddArg(x) 1694 v.AddArg(y) 1695 return true 1696 } 1697 } 1698 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1699 b := v.Block 1700 _ = b 1701 // match: (Div8 x y) 1702 // cond: 1703 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1704 for { 1705 x := v.Args[0] 1706 y := v.Args[1] 1707 v.reset(OpS390XDIVW) 1708 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1709 v0.AddArg(x) 1710 v.AddArg(v0) 1711 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1712 v1.AddArg(y) 1713 v.AddArg(v1) 1714 return true 1715 } 1716 } 1717 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1718 b := v.Block 1719 _ = b 1720 // match: (Div8u x y) 1721 // cond: 1722 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1723 for { 1724 x := v.Args[0] 1725 y := v.Args[1] 1726 v.reset(OpS390XDIVWU) 1727 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1728 v0.AddArg(x) 1729 v.AddArg(v0) 1730 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1731 v1.AddArg(y) 1732 v.AddArg(v1) 1733 return true 1734 } 1735 } 1736 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1737 b := v.Block 1738 _ = b 1739 // match: (Eq16 x y) 1740 // cond: 1741 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1742 for { 1743 x := v.Args[0] 1744 y := v.Args[1] 1745 v.reset(OpS390XMOVDEQ) 1746 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1747 v0.AuxInt = 0 1748 v.AddArg(v0) 1749 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1750 v1.AuxInt = 1 1751 v.AddArg(v1) 1752 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1753 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1754 v3.AddArg(x) 1755 v2.AddArg(v3) 1756 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1757 v4.AddArg(y) 1758 v2.AddArg(v4) 1759 v.AddArg(v2) 1760 return true 1761 } 1762 } 1763 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1764 b := v.Block 1765 _ = b 1766 // match: (Eq32 x y) 1767 // cond: 1768 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1769 for { 1770 x := v.Args[0] 1771 y := v.Args[1] 1772 v.reset(OpS390XMOVDEQ) 1773 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1774 v0.AuxInt = 0 1775 v.AddArg(v0) 1776 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1777 v1.AuxInt = 1 1778 v.AddArg(v1) 1779 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 1780 v2.AddArg(x) 1781 v2.AddArg(y) 1782 v.AddArg(v2) 1783 return true 1784 } 1785 } 1786 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1787 b := v.Block 1788 _ = b 1789 // match: (Eq32F x y) 1790 // cond: 1791 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1792 for { 1793 x := v.Args[0] 1794 y := v.Args[1] 1795 v.reset(OpS390XMOVDEQ) 1796 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1797 v0.AuxInt = 0 1798 v.AddArg(v0) 1799 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1800 v1.AuxInt = 1 1801 v.AddArg(v1) 1802 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 1803 v2.AddArg(x) 1804 v2.AddArg(y) 1805 v.AddArg(v2) 1806 return true 1807 } 1808 } 1809 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1810 b := v.Block 1811 _ = b 1812 // match: (Eq64 x y) 1813 // cond: 1814 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1815 for { 1816 x := v.Args[0] 1817 y := v.Args[1] 1818 v.reset(OpS390XMOVDEQ) 1819 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1820 v0.AuxInt = 0 1821 v.AddArg(v0) 1822 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1823 v1.AuxInt = 1 1824 v.AddArg(v1) 1825 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1826 v2.AddArg(x) 1827 v2.AddArg(y) 1828 v.AddArg(v2) 1829 return true 1830 } 1831 } 1832 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1833 b := v.Block 1834 _ = b 1835 // match: (Eq64F x y) 1836 // cond: 1837 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1838 for { 1839 x := v.Args[0] 1840 y := v.Args[1] 1841 v.reset(OpS390XMOVDEQ) 1842 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1843 v0.AuxInt = 0 1844 v.AddArg(v0) 1845 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1846 v1.AuxInt = 1 1847 v.AddArg(v1) 1848 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 1849 v2.AddArg(x) 1850 v2.AddArg(y) 1851 v.AddArg(v2) 1852 return true 1853 } 1854 } 1855 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1856 b := v.Block 1857 _ = b 1858 // match: (Eq8 x y) 1859 // cond: 1860 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1861 for { 1862 x := v.Args[0] 1863 y := v.Args[1] 1864 v.reset(OpS390XMOVDEQ) 1865 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1866 v0.AuxInt = 0 1867 v.AddArg(v0) 1868 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1869 v1.AuxInt = 1 1870 v.AddArg(v1) 1871 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1872 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1873 v3.AddArg(x) 1874 v2.AddArg(v3) 1875 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1876 v4.AddArg(y) 1877 v2.AddArg(v4) 1878 v.AddArg(v2) 1879 return true 1880 } 1881 } 1882 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1883 b := v.Block 1884 _ = b 1885 // match: (EqB x y) 1886 // cond: 1887 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1888 for { 1889 x := v.Args[0] 1890 y := v.Args[1] 1891 v.reset(OpS390XMOVDEQ) 1892 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1893 v0.AuxInt = 0 1894 v.AddArg(v0) 1895 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1896 v1.AuxInt = 1 1897 v.AddArg(v1) 1898 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1899 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1900 v3.AddArg(x) 1901 v2.AddArg(v3) 1902 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1903 v4.AddArg(y) 1904 v2.AddArg(v4) 1905 v.AddArg(v2) 1906 return true 1907 } 1908 } 1909 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1910 b := v.Block 1911 _ = b 1912 // match: (EqPtr x y) 1913 // cond: 1914 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1915 for { 1916 x := v.Args[0] 1917 y := v.Args[1] 1918 v.reset(OpS390XMOVDEQ) 1919 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1920 v0.AuxInt = 0 1921 v.AddArg(v0) 1922 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1923 v1.AuxInt = 1 1924 v.AddArg(v1) 1925 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1926 v2.AddArg(x) 1927 v2.AddArg(y) 1928 v.AddArg(v2) 1929 return true 1930 } 1931 } 1932 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1933 b := v.Block 1934 _ = b 1935 // match: (Geq16 x y) 1936 // cond: 1937 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1938 for { 1939 x := v.Args[0] 1940 y := v.Args[1] 1941 v.reset(OpS390XMOVDGE) 1942 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1943 v0.AuxInt = 0 1944 v.AddArg(v0) 1945 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1946 v1.AuxInt = 1 1947 v.AddArg(v1) 1948 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1949 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1950 v3.AddArg(x) 1951 v2.AddArg(v3) 1952 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1953 v4.AddArg(y) 1954 v2.AddArg(v4) 1955 v.AddArg(v2) 1956 return true 1957 } 1958 } 1959 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1960 b := v.Block 1961 _ = b 1962 // match: (Geq16U x y) 1963 // cond: 1964 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1965 for { 1966 x := v.Args[0] 1967 y := v.Args[1] 1968 v.reset(OpS390XMOVDGE) 1969 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1970 v0.AuxInt = 0 1971 v.AddArg(v0) 1972 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1973 v1.AuxInt = 1 1974 v.AddArg(v1) 1975 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 1976 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1977 v3.AddArg(x) 1978 v2.AddArg(v3) 1979 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1980 v4.AddArg(y) 1981 v2.AddArg(v4) 1982 v.AddArg(v2) 1983 return true 1984 } 1985 } 1986 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1987 b := v.Block 1988 _ = b 1989 // match: (Geq32 x y) 1990 // cond: 1991 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1992 for { 1993 x := v.Args[0] 1994 y := v.Args[1] 1995 v.reset(OpS390XMOVDGE) 1996 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1997 v0.AuxInt = 0 1998 v.AddArg(v0) 1999 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2000 v1.AuxInt = 1 2001 v.AddArg(v1) 2002 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2003 v2.AddArg(x) 2004 v2.AddArg(y) 2005 v.AddArg(v2) 2006 return true 2007 } 2008 } 2009 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2010 b := v.Block 2011 _ = b 2012 // match: (Geq32F x y) 2013 // cond: 2014 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2015 for { 2016 x := v.Args[0] 2017 y := v.Args[1] 2018 v.reset(OpS390XMOVDGEnoinv) 2019 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2020 v0.AuxInt = 0 2021 v.AddArg(v0) 2022 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2023 v1.AuxInt = 1 2024 v.AddArg(v1) 2025 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2026 v2.AddArg(x) 2027 v2.AddArg(y) 2028 v.AddArg(v2) 2029 return true 2030 } 2031 } 2032 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2033 b := v.Block 2034 _ = b 2035 // match: (Geq32U x y) 2036 // cond: 2037 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2038 for { 2039 x := v.Args[0] 2040 y := v.Args[1] 2041 v.reset(OpS390XMOVDGE) 2042 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2043 v0.AuxInt = 0 2044 v.AddArg(v0) 2045 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2046 v1.AuxInt = 1 2047 v.AddArg(v1) 2048 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2049 v2.AddArg(x) 2050 v2.AddArg(y) 2051 v.AddArg(v2) 2052 return true 2053 } 2054 } 2055 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2056 b := v.Block 2057 _ = b 2058 // match: (Geq64 x y) 2059 // cond: 2060 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2061 for { 2062 x := v.Args[0] 2063 y := v.Args[1] 2064 v.reset(OpS390XMOVDGE) 2065 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2066 v0.AuxInt = 0 2067 v.AddArg(v0) 2068 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2069 v1.AuxInt = 1 2070 v.AddArg(v1) 2071 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2072 v2.AddArg(x) 2073 v2.AddArg(y) 2074 v.AddArg(v2) 2075 return true 2076 } 2077 } 2078 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2079 b := v.Block 2080 _ = b 2081 // match: (Geq64F x y) 2082 // cond: 2083 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2084 for { 2085 x := v.Args[0] 2086 y := v.Args[1] 2087 v.reset(OpS390XMOVDGEnoinv) 2088 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2089 v0.AuxInt = 0 2090 v.AddArg(v0) 2091 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2092 v1.AuxInt = 1 2093 v.AddArg(v1) 2094 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2095 v2.AddArg(x) 2096 v2.AddArg(y) 2097 v.AddArg(v2) 2098 return true 2099 } 2100 } 2101 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2102 b := v.Block 2103 _ = b 2104 // match: (Geq64U x y) 2105 // cond: 2106 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2107 for { 2108 x := v.Args[0] 2109 y := v.Args[1] 2110 v.reset(OpS390XMOVDGE) 2111 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2112 v0.AuxInt = 0 2113 v.AddArg(v0) 2114 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2115 v1.AuxInt = 1 2116 v.AddArg(v1) 2117 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2118 v2.AddArg(x) 2119 v2.AddArg(y) 2120 v.AddArg(v2) 2121 return true 2122 } 2123 } 2124 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2125 b := v.Block 2126 _ = b 2127 // match: (Geq8 x y) 2128 // cond: 2129 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2130 for { 2131 x := v.Args[0] 2132 y := v.Args[1] 2133 v.reset(OpS390XMOVDGE) 2134 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2135 v0.AuxInt = 0 2136 v.AddArg(v0) 2137 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2138 v1.AuxInt = 1 2139 v.AddArg(v1) 2140 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2141 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2142 v3.AddArg(x) 2143 v2.AddArg(v3) 2144 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2145 v4.AddArg(y) 2146 v2.AddArg(v4) 2147 v.AddArg(v2) 2148 return true 2149 } 2150 } 2151 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2152 b := v.Block 2153 _ = b 2154 // match: (Geq8U x y) 2155 // cond: 2156 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2157 for { 2158 x := v.Args[0] 2159 y := v.Args[1] 2160 v.reset(OpS390XMOVDGE) 2161 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2162 v0.AuxInt = 0 2163 v.AddArg(v0) 2164 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2165 v1.AuxInt = 1 2166 v.AddArg(v1) 2167 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2168 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2169 v3.AddArg(x) 2170 v2.AddArg(v3) 2171 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2172 v4.AddArg(y) 2173 v2.AddArg(v4) 2174 v.AddArg(v2) 2175 return true 2176 } 2177 } 2178 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2179 b := v.Block 2180 _ = b 2181 // match: (GetClosurePtr) 2182 // cond: 2183 // result: (LoweredGetClosurePtr) 2184 for { 2185 v.reset(OpS390XLoweredGetClosurePtr) 2186 return true 2187 } 2188 } 2189 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2190 b := v.Block 2191 _ = b 2192 // match: (GetG mem) 2193 // cond: 2194 // result: (LoweredGetG mem) 2195 for { 2196 mem := v.Args[0] 2197 v.reset(OpS390XLoweredGetG) 2198 v.AddArg(mem) 2199 return true 2200 } 2201 } 2202 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2203 b := v.Block 2204 _ = b 2205 // match: (GoCall [argwid] mem) 2206 // cond: 2207 // result: (CALLgo [argwid] mem) 2208 for { 2209 argwid := v.AuxInt 2210 mem := v.Args[0] 2211 v.reset(OpS390XCALLgo) 2212 v.AuxInt = argwid 2213 v.AddArg(mem) 2214 return true 2215 } 2216 } 2217 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2218 b := v.Block 2219 _ = b 2220 // match: (Greater16 x y) 2221 // cond: 2222 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2223 for { 2224 x := v.Args[0] 2225 y := v.Args[1] 2226 v.reset(OpS390XMOVDGT) 2227 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2228 v0.AuxInt = 0 2229 v.AddArg(v0) 2230 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2231 v1.AuxInt = 1 2232 v.AddArg(v1) 2233 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2234 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2235 v3.AddArg(x) 2236 v2.AddArg(v3) 2237 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2238 v4.AddArg(y) 2239 v2.AddArg(v4) 2240 v.AddArg(v2) 2241 return true 2242 } 2243 } 2244 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2245 b := v.Block 2246 _ = b 2247 // match: (Greater16U x y) 2248 // cond: 2249 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2250 for { 2251 x := v.Args[0] 2252 y := v.Args[1] 2253 v.reset(OpS390XMOVDGT) 2254 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2255 v0.AuxInt = 0 2256 v.AddArg(v0) 2257 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2258 v1.AuxInt = 1 2259 v.AddArg(v1) 2260 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2261 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2262 v3.AddArg(x) 2263 v2.AddArg(v3) 2264 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2265 v4.AddArg(y) 2266 v2.AddArg(v4) 2267 v.AddArg(v2) 2268 return true 2269 } 2270 } 2271 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2272 b := v.Block 2273 _ = b 2274 // match: (Greater32 x y) 2275 // cond: 2276 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2277 for { 2278 x := v.Args[0] 2279 y := v.Args[1] 2280 v.reset(OpS390XMOVDGT) 2281 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2282 v0.AuxInt = 0 2283 v.AddArg(v0) 2284 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2285 v1.AuxInt = 1 2286 v.AddArg(v1) 2287 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2288 v2.AddArg(x) 2289 v2.AddArg(y) 2290 v.AddArg(v2) 2291 return true 2292 } 2293 } 2294 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2295 b := v.Block 2296 _ = b 2297 // match: (Greater32F x y) 2298 // cond: 2299 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2300 for { 2301 x := v.Args[0] 2302 y := v.Args[1] 2303 v.reset(OpS390XMOVDGTnoinv) 2304 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2305 v0.AuxInt = 0 2306 v.AddArg(v0) 2307 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2308 v1.AuxInt = 1 2309 v.AddArg(v1) 2310 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2311 v2.AddArg(x) 2312 v2.AddArg(y) 2313 v.AddArg(v2) 2314 return true 2315 } 2316 } 2317 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2318 b := v.Block 2319 _ = b 2320 // match: (Greater32U x y) 2321 // cond: 2322 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2323 for { 2324 x := v.Args[0] 2325 y := v.Args[1] 2326 v.reset(OpS390XMOVDGT) 2327 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2328 v0.AuxInt = 0 2329 v.AddArg(v0) 2330 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2331 v1.AuxInt = 1 2332 v.AddArg(v1) 2333 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2334 v2.AddArg(x) 2335 v2.AddArg(y) 2336 v.AddArg(v2) 2337 return true 2338 } 2339 } 2340 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2341 b := v.Block 2342 _ = b 2343 // match: (Greater64 x y) 2344 // cond: 2345 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2346 for { 2347 x := v.Args[0] 2348 y := v.Args[1] 2349 v.reset(OpS390XMOVDGT) 2350 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2351 v0.AuxInt = 0 2352 v.AddArg(v0) 2353 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2354 v1.AuxInt = 1 2355 v.AddArg(v1) 2356 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2357 v2.AddArg(x) 2358 v2.AddArg(y) 2359 v.AddArg(v2) 2360 return true 2361 } 2362 } 2363 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2364 b := v.Block 2365 _ = b 2366 // match: (Greater64F x y) 2367 // cond: 2368 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2369 for { 2370 x := v.Args[0] 2371 y := v.Args[1] 2372 v.reset(OpS390XMOVDGTnoinv) 2373 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2374 v0.AuxInt = 0 2375 v.AddArg(v0) 2376 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2377 v1.AuxInt = 1 2378 v.AddArg(v1) 2379 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2380 v2.AddArg(x) 2381 v2.AddArg(y) 2382 v.AddArg(v2) 2383 return true 2384 } 2385 } 2386 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2387 b := v.Block 2388 _ = b 2389 // match: (Greater64U x y) 2390 // cond: 2391 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2392 for { 2393 x := v.Args[0] 2394 y := v.Args[1] 2395 v.reset(OpS390XMOVDGT) 2396 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2397 v0.AuxInt = 0 2398 v.AddArg(v0) 2399 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2400 v1.AuxInt = 1 2401 v.AddArg(v1) 2402 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2403 v2.AddArg(x) 2404 v2.AddArg(y) 2405 v.AddArg(v2) 2406 return true 2407 } 2408 } 2409 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2410 b := v.Block 2411 _ = b 2412 // match: (Greater8 x y) 2413 // cond: 2414 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2415 for { 2416 x := v.Args[0] 2417 y := v.Args[1] 2418 v.reset(OpS390XMOVDGT) 2419 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2420 v0.AuxInt = 0 2421 v.AddArg(v0) 2422 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2423 v1.AuxInt = 1 2424 v.AddArg(v1) 2425 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2426 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2427 v3.AddArg(x) 2428 v2.AddArg(v3) 2429 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2430 v4.AddArg(y) 2431 v2.AddArg(v4) 2432 v.AddArg(v2) 2433 return true 2434 } 2435 } 2436 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2437 b := v.Block 2438 _ = b 2439 // match: (Greater8U x y) 2440 // cond: 2441 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2442 for { 2443 x := v.Args[0] 2444 y := v.Args[1] 2445 v.reset(OpS390XMOVDGT) 2446 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2447 v0.AuxInt = 0 2448 v.AddArg(v0) 2449 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2450 v1.AuxInt = 1 2451 v.AddArg(v1) 2452 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2453 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2454 v3.AddArg(x) 2455 v2.AddArg(v3) 2456 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2457 v4.AddArg(y) 2458 v2.AddArg(v4) 2459 v.AddArg(v2) 2460 return true 2461 } 2462 } 2463 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2464 b := v.Block 2465 _ = b 2466 // match: (Hmul16 x y) 2467 // cond: 2468 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2469 for { 2470 x := v.Args[0] 2471 y := v.Args[1] 2472 v.reset(OpS390XSRDconst) 2473 v.AuxInt = 16 2474 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2475 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2476 v1.AddArg(x) 2477 v0.AddArg(v1) 2478 v2 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2479 v2.AddArg(y) 2480 v0.AddArg(v2) 2481 v.AddArg(v0) 2482 return true 2483 } 2484 } 2485 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2486 b := v.Block 2487 _ = b 2488 // match: (Hmul16u x y) 2489 // cond: 2490 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2491 for { 2492 x := v.Args[0] 2493 y := v.Args[1] 2494 v.reset(OpS390XSRDconst) 2495 v.AuxInt = 16 2496 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2497 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2498 v1.AddArg(x) 2499 v0.AddArg(v1) 2500 v2 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2501 v2.AddArg(y) 2502 v0.AddArg(v2) 2503 v.AddArg(v0) 2504 return true 2505 } 2506 } 2507 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2508 b := v.Block 2509 _ = b 2510 // match: (Hmul32 x y) 2511 // cond: 2512 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2513 for { 2514 x := v.Args[0] 2515 y := v.Args[1] 2516 v.reset(OpS390XSRDconst) 2517 v.AuxInt = 32 2518 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2519 v1 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2520 v1.AddArg(x) 2521 v0.AddArg(v1) 2522 v2 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2523 v2.AddArg(y) 2524 v0.AddArg(v2) 2525 v.AddArg(v0) 2526 return true 2527 } 2528 } 2529 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2530 b := v.Block 2531 _ = b 2532 // match: (Hmul32u x y) 2533 // cond: 2534 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2535 for { 2536 x := v.Args[0] 2537 y := v.Args[1] 2538 v.reset(OpS390XSRDconst) 2539 v.AuxInt = 32 2540 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2541 v1 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2542 v1.AddArg(x) 2543 v0.AddArg(v1) 2544 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2545 v2.AddArg(y) 2546 v0.AddArg(v2) 2547 v.AddArg(v0) 2548 return true 2549 } 2550 } 2551 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2552 b := v.Block 2553 _ = b 2554 // match: (Hmul64 x y) 2555 // cond: 2556 // result: (MULHD x y) 2557 for { 2558 x := v.Args[0] 2559 y := v.Args[1] 2560 v.reset(OpS390XMULHD) 2561 v.AddArg(x) 2562 v.AddArg(y) 2563 return true 2564 } 2565 } 2566 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2567 b := v.Block 2568 _ = b 2569 // match: (Hmul64u x y) 2570 // cond: 2571 // result: (MULHDU x y) 2572 for { 2573 x := v.Args[0] 2574 y := v.Args[1] 2575 v.reset(OpS390XMULHDU) 2576 v.AddArg(x) 2577 v.AddArg(y) 2578 return true 2579 } 2580 } 2581 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2582 b := v.Block 2583 _ = b 2584 // match: (Hmul8 x y) 2585 // cond: 2586 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2587 for { 2588 x := v.Args[0] 2589 y := v.Args[1] 2590 v.reset(OpS390XSRDconst) 2591 v.AuxInt = 8 2592 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2593 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2594 v1.AddArg(x) 2595 v0.AddArg(v1) 2596 v2 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2597 v2.AddArg(y) 2598 v0.AddArg(v2) 2599 v.AddArg(v0) 2600 return true 2601 } 2602 } 2603 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2604 b := v.Block 2605 _ = b 2606 // match: (Hmul8u x y) 2607 // cond: 2608 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2609 for { 2610 x := v.Args[0] 2611 y := v.Args[1] 2612 v.reset(OpS390XSRDconst) 2613 v.AuxInt = 8 2614 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2615 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2616 v1.AddArg(x) 2617 v0.AddArg(v1) 2618 v2 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2619 v2.AddArg(y) 2620 v0.AddArg(v2) 2621 v.AddArg(v0) 2622 return true 2623 } 2624 } 2625 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2626 b := v.Block 2627 _ = b 2628 // match: (ITab (Load ptr mem)) 2629 // cond: 2630 // result: (MOVDload ptr mem) 2631 for { 2632 v_0 := v.Args[0] 2633 if v_0.Op != OpLoad { 2634 break 2635 } 2636 ptr := v_0.Args[0] 2637 mem := v_0.Args[1] 2638 v.reset(OpS390XMOVDload) 2639 v.AddArg(ptr) 2640 v.AddArg(mem) 2641 return true 2642 } 2643 return false 2644 } 2645 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2646 b := v.Block 2647 _ = b 2648 // match: (InterCall [argwid] entry mem) 2649 // cond: 2650 // result: (CALLinter [argwid] entry mem) 2651 for { 2652 argwid := v.AuxInt 2653 entry := v.Args[0] 2654 mem := v.Args[1] 2655 v.reset(OpS390XCALLinter) 2656 v.AuxInt = argwid 2657 v.AddArg(entry) 2658 v.AddArg(mem) 2659 return true 2660 } 2661 } 2662 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2663 b := v.Block 2664 _ = b 2665 // match: (IsInBounds idx len) 2666 // cond: 2667 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2668 for { 2669 idx := v.Args[0] 2670 len := v.Args[1] 2671 v.reset(OpS390XMOVDLT) 2672 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2673 v0.AuxInt = 0 2674 v.AddArg(v0) 2675 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2676 v1.AuxInt = 1 2677 v.AddArg(v1) 2678 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2679 v2.AddArg(idx) 2680 v2.AddArg(len) 2681 v.AddArg(v2) 2682 return true 2683 } 2684 } 2685 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2686 b := v.Block 2687 _ = b 2688 // match: (IsNonNil p) 2689 // cond: 2690 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2691 for { 2692 p := v.Args[0] 2693 v.reset(OpS390XMOVDNE) 2694 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2695 v0.AuxInt = 0 2696 v.AddArg(v0) 2697 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2698 v1.AuxInt = 1 2699 v.AddArg(v1) 2700 v2 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 2701 v2.AuxInt = 0 2702 v2.AddArg(p) 2703 v.AddArg(v2) 2704 return true 2705 } 2706 } 2707 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2708 b := v.Block 2709 _ = b 2710 // match: (IsSliceInBounds idx len) 2711 // cond: 2712 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2713 for { 2714 idx := v.Args[0] 2715 len := v.Args[1] 2716 v.reset(OpS390XMOVDLE) 2717 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2718 v0.AuxInt = 0 2719 v.AddArg(v0) 2720 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2721 v1.AuxInt = 1 2722 v.AddArg(v1) 2723 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2724 v2.AddArg(idx) 2725 v2.AddArg(len) 2726 v.AddArg(v2) 2727 return true 2728 } 2729 } 2730 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2731 b := v.Block 2732 _ = b 2733 // match: (Leq16 x y) 2734 // cond: 2735 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2736 for { 2737 x := v.Args[0] 2738 y := v.Args[1] 2739 v.reset(OpS390XMOVDLE) 2740 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2741 v0.AuxInt = 0 2742 v.AddArg(v0) 2743 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2744 v1.AuxInt = 1 2745 v.AddArg(v1) 2746 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2747 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2748 v3.AddArg(x) 2749 v2.AddArg(v3) 2750 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2751 v4.AddArg(y) 2752 v2.AddArg(v4) 2753 v.AddArg(v2) 2754 return true 2755 } 2756 } 2757 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2758 b := v.Block 2759 _ = b 2760 // match: (Leq16U x y) 2761 // cond: 2762 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2763 for { 2764 x := v.Args[0] 2765 y := v.Args[1] 2766 v.reset(OpS390XMOVDLE) 2767 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2768 v0.AuxInt = 0 2769 v.AddArg(v0) 2770 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2771 v1.AuxInt = 1 2772 v.AddArg(v1) 2773 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2774 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2775 v3.AddArg(x) 2776 v2.AddArg(v3) 2777 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2778 v4.AddArg(y) 2779 v2.AddArg(v4) 2780 v.AddArg(v2) 2781 return true 2782 } 2783 } 2784 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2785 b := v.Block 2786 _ = b 2787 // match: (Leq32 x y) 2788 // cond: 2789 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2790 for { 2791 x := v.Args[0] 2792 y := v.Args[1] 2793 v.reset(OpS390XMOVDLE) 2794 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2795 v0.AuxInt = 0 2796 v.AddArg(v0) 2797 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2798 v1.AuxInt = 1 2799 v.AddArg(v1) 2800 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2801 v2.AddArg(x) 2802 v2.AddArg(y) 2803 v.AddArg(v2) 2804 return true 2805 } 2806 } 2807 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2808 b := v.Block 2809 _ = b 2810 // match: (Leq32F x y) 2811 // cond: 2812 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2813 for { 2814 x := v.Args[0] 2815 y := v.Args[1] 2816 v.reset(OpS390XMOVDGEnoinv) 2817 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2818 v0.AuxInt = 0 2819 v.AddArg(v0) 2820 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2821 v1.AuxInt = 1 2822 v.AddArg(v1) 2823 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2824 v2.AddArg(y) 2825 v2.AddArg(x) 2826 v.AddArg(v2) 2827 return true 2828 } 2829 } 2830 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2831 b := v.Block 2832 _ = b 2833 // match: (Leq32U x y) 2834 // cond: 2835 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2836 for { 2837 x := v.Args[0] 2838 y := v.Args[1] 2839 v.reset(OpS390XMOVDLE) 2840 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2841 v0.AuxInt = 0 2842 v.AddArg(v0) 2843 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2844 v1.AuxInt = 1 2845 v.AddArg(v1) 2846 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2847 v2.AddArg(x) 2848 v2.AddArg(y) 2849 v.AddArg(v2) 2850 return true 2851 } 2852 } 2853 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2854 b := v.Block 2855 _ = b 2856 // match: (Leq64 x y) 2857 // cond: 2858 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2859 for { 2860 x := v.Args[0] 2861 y := v.Args[1] 2862 v.reset(OpS390XMOVDLE) 2863 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2864 v0.AuxInt = 0 2865 v.AddArg(v0) 2866 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2867 v1.AuxInt = 1 2868 v.AddArg(v1) 2869 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2870 v2.AddArg(x) 2871 v2.AddArg(y) 2872 v.AddArg(v2) 2873 return true 2874 } 2875 } 2876 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2877 b := v.Block 2878 _ = b 2879 // match: (Leq64F x y) 2880 // cond: 2881 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2882 for { 2883 x := v.Args[0] 2884 y := v.Args[1] 2885 v.reset(OpS390XMOVDGEnoinv) 2886 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2887 v0.AuxInt = 0 2888 v.AddArg(v0) 2889 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2890 v1.AuxInt = 1 2891 v.AddArg(v1) 2892 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2893 v2.AddArg(y) 2894 v2.AddArg(x) 2895 v.AddArg(v2) 2896 return true 2897 } 2898 } 2899 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2900 b := v.Block 2901 _ = b 2902 // match: (Leq64U x y) 2903 // cond: 2904 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2905 for { 2906 x := v.Args[0] 2907 y := v.Args[1] 2908 v.reset(OpS390XMOVDLE) 2909 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2910 v0.AuxInt = 0 2911 v.AddArg(v0) 2912 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2913 v1.AuxInt = 1 2914 v.AddArg(v1) 2915 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2916 v2.AddArg(x) 2917 v2.AddArg(y) 2918 v.AddArg(v2) 2919 return true 2920 } 2921 } 2922 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2923 b := v.Block 2924 _ = b 2925 // match: (Leq8 x y) 2926 // cond: 2927 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2928 for { 2929 x := v.Args[0] 2930 y := v.Args[1] 2931 v.reset(OpS390XMOVDLE) 2932 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2933 v0.AuxInt = 0 2934 v.AddArg(v0) 2935 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2936 v1.AuxInt = 1 2937 v.AddArg(v1) 2938 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2939 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2940 v3.AddArg(x) 2941 v2.AddArg(v3) 2942 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2943 v4.AddArg(y) 2944 v2.AddArg(v4) 2945 v.AddArg(v2) 2946 return true 2947 } 2948 } 2949 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2950 b := v.Block 2951 _ = b 2952 // match: (Leq8U x y) 2953 // cond: 2954 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2955 for { 2956 x := v.Args[0] 2957 y := v.Args[1] 2958 v.reset(OpS390XMOVDLE) 2959 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2960 v0.AuxInt = 0 2961 v.AddArg(v0) 2962 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2963 v1.AuxInt = 1 2964 v.AddArg(v1) 2965 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2966 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2967 v3.AddArg(x) 2968 v2.AddArg(v3) 2969 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2970 v4.AddArg(y) 2971 v2.AddArg(v4) 2972 v.AddArg(v2) 2973 return true 2974 } 2975 } 2976 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2977 b := v.Block 2978 _ = b 2979 // match: (Less16 x y) 2980 // cond: 2981 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2982 for { 2983 x := v.Args[0] 2984 y := v.Args[1] 2985 v.reset(OpS390XMOVDLT) 2986 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2987 v0.AuxInt = 0 2988 v.AddArg(v0) 2989 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2990 v1.AuxInt = 1 2991 v.AddArg(v1) 2992 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2993 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2994 v3.AddArg(x) 2995 v2.AddArg(v3) 2996 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2997 v4.AddArg(y) 2998 v2.AddArg(v4) 2999 v.AddArg(v2) 3000 return true 3001 } 3002 } 3003 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3004 b := v.Block 3005 _ = b 3006 // match: (Less16U x y) 3007 // cond: 3008 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3009 for { 3010 x := v.Args[0] 3011 y := v.Args[1] 3012 v.reset(OpS390XMOVDLT) 3013 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3014 v0.AuxInt = 0 3015 v.AddArg(v0) 3016 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3017 v1.AuxInt = 1 3018 v.AddArg(v1) 3019 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3020 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3021 v3.AddArg(x) 3022 v2.AddArg(v3) 3023 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3024 v4.AddArg(y) 3025 v2.AddArg(v4) 3026 v.AddArg(v2) 3027 return true 3028 } 3029 } 3030 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3031 b := v.Block 3032 _ = b 3033 // match: (Less32 x y) 3034 // cond: 3035 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3036 for { 3037 x := v.Args[0] 3038 y := v.Args[1] 3039 v.reset(OpS390XMOVDLT) 3040 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3041 v0.AuxInt = 0 3042 v.AddArg(v0) 3043 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3044 v1.AuxInt = 1 3045 v.AddArg(v1) 3046 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 3047 v2.AddArg(x) 3048 v2.AddArg(y) 3049 v.AddArg(v2) 3050 return true 3051 } 3052 } 3053 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3054 b := v.Block 3055 _ = b 3056 // match: (Less32F x y) 3057 // cond: 3058 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3059 for { 3060 x := v.Args[0] 3061 y := v.Args[1] 3062 v.reset(OpS390XMOVDGTnoinv) 3063 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3064 v0.AuxInt = 0 3065 v.AddArg(v0) 3066 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3067 v1.AuxInt = 1 3068 v.AddArg(v1) 3069 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 3070 v2.AddArg(y) 3071 v2.AddArg(x) 3072 v.AddArg(v2) 3073 return true 3074 } 3075 } 3076 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3077 b := v.Block 3078 _ = b 3079 // match: (Less32U x y) 3080 // cond: 3081 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3082 for { 3083 x := v.Args[0] 3084 y := v.Args[1] 3085 v.reset(OpS390XMOVDLT) 3086 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3087 v0.AuxInt = 0 3088 v.AddArg(v0) 3089 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3090 v1.AuxInt = 1 3091 v.AddArg(v1) 3092 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 3093 v2.AddArg(x) 3094 v2.AddArg(y) 3095 v.AddArg(v2) 3096 return true 3097 } 3098 } 3099 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3100 b := v.Block 3101 _ = b 3102 // match: (Less64 x y) 3103 // cond: 3104 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3105 for { 3106 x := v.Args[0] 3107 y := v.Args[1] 3108 v.reset(OpS390XMOVDLT) 3109 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3110 v0.AuxInt = 0 3111 v.AddArg(v0) 3112 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3113 v1.AuxInt = 1 3114 v.AddArg(v1) 3115 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3116 v2.AddArg(x) 3117 v2.AddArg(y) 3118 v.AddArg(v2) 3119 return true 3120 } 3121 } 3122 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3123 b := v.Block 3124 _ = b 3125 // match: (Less64F x y) 3126 // cond: 3127 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3128 for { 3129 x := v.Args[0] 3130 y := v.Args[1] 3131 v.reset(OpS390XMOVDGTnoinv) 3132 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3133 v0.AuxInt = 0 3134 v.AddArg(v0) 3135 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3136 v1.AuxInt = 1 3137 v.AddArg(v1) 3138 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 3139 v2.AddArg(y) 3140 v2.AddArg(x) 3141 v.AddArg(v2) 3142 return true 3143 } 3144 } 3145 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3146 b := v.Block 3147 _ = b 3148 // match: (Less64U x y) 3149 // cond: 3150 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3151 for { 3152 x := v.Args[0] 3153 y := v.Args[1] 3154 v.reset(OpS390XMOVDLT) 3155 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3156 v0.AuxInt = 0 3157 v.AddArg(v0) 3158 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3159 v1.AuxInt = 1 3160 v.AddArg(v1) 3161 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3162 v2.AddArg(x) 3163 v2.AddArg(y) 3164 v.AddArg(v2) 3165 return true 3166 } 3167 } 3168 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3169 b := v.Block 3170 _ = b 3171 // match: (Less8 x y) 3172 // cond: 3173 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3174 for { 3175 x := v.Args[0] 3176 y := v.Args[1] 3177 v.reset(OpS390XMOVDLT) 3178 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3179 v0.AuxInt = 0 3180 v.AddArg(v0) 3181 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3182 v1.AuxInt = 1 3183 v.AddArg(v1) 3184 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3185 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3186 v3.AddArg(x) 3187 v2.AddArg(v3) 3188 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3189 v4.AddArg(y) 3190 v2.AddArg(v4) 3191 v.AddArg(v2) 3192 return true 3193 } 3194 } 3195 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3196 b := v.Block 3197 _ = b 3198 // match: (Less8U x y) 3199 // cond: 3200 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3201 for { 3202 x := v.Args[0] 3203 y := v.Args[1] 3204 v.reset(OpS390XMOVDLT) 3205 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3206 v0.AuxInt = 0 3207 v.AddArg(v0) 3208 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3209 v1.AuxInt = 1 3210 v.AddArg(v1) 3211 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3212 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3213 v3.AddArg(x) 3214 v2.AddArg(v3) 3215 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3216 v4.AddArg(y) 3217 v2.AddArg(v4) 3218 v.AddArg(v2) 3219 return true 3220 } 3221 } 3222 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3223 b := v.Block 3224 _ = b 3225 // match: (Load <t> ptr mem) 3226 // cond: (is64BitInt(t) || isPtr(t)) 3227 // result: (MOVDload ptr mem) 3228 for { 3229 t := v.Type 3230 ptr := v.Args[0] 3231 mem := v.Args[1] 3232 if !(is64BitInt(t) || isPtr(t)) { 3233 break 3234 } 3235 v.reset(OpS390XMOVDload) 3236 v.AddArg(ptr) 3237 v.AddArg(mem) 3238 return true 3239 } 3240 // match: (Load <t> ptr mem) 3241 // cond: is32BitInt(t) 3242 // result: (MOVWZload ptr mem) 3243 for { 3244 t := v.Type 3245 ptr := v.Args[0] 3246 mem := v.Args[1] 3247 if !(is32BitInt(t)) { 3248 break 3249 } 3250 v.reset(OpS390XMOVWZload) 3251 v.AddArg(ptr) 3252 v.AddArg(mem) 3253 return true 3254 } 3255 // match: (Load <t> ptr mem) 3256 // cond: is16BitInt(t) 3257 // result: (MOVHZload ptr mem) 3258 for { 3259 t := v.Type 3260 ptr := v.Args[0] 3261 mem := v.Args[1] 3262 if !(is16BitInt(t)) { 3263 break 3264 } 3265 v.reset(OpS390XMOVHZload) 3266 v.AddArg(ptr) 3267 v.AddArg(mem) 3268 return true 3269 } 3270 // match: (Load <t> ptr mem) 3271 // cond: (t.IsBoolean() || is8BitInt(t)) 3272 // result: (MOVBZload ptr mem) 3273 for { 3274 t := v.Type 3275 ptr := v.Args[0] 3276 mem := v.Args[1] 3277 if !(t.IsBoolean() || is8BitInt(t)) { 3278 break 3279 } 3280 v.reset(OpS390XMOVBZload) 3281 v.AddArg(ptr) 3282 v.AddArg(mem) 3283 return true 3284 } 3285 // match: (Load <t> ptr mem) 3286 // cond: is32BitFloat(t) 3287 // result: (FMOVSload ptr mem) 3288 for { 3289 t := v.Type 3290 ptr := v.Args[0] 3291 mem := v.Args[1] 3292 if !(is32BitFloat(t)) { 3293 break 3294 } 3295 v.reset(OpS390XFMOVSload) 3296 v.AddArg(ptr) 3297 v.AddArg(mem) 3298 return true 3299 } 3300 // match: (Load <t> ptr mem) 3301 // cond: is64BitFloat(t) 3302 // result: (FMOVDload ptr mem) 3303 for { 3304 t := v.Type 3305 ptr := v.Args[0] 3306 mem := v.Args[1] 3307 if !(is64BitFloat(t)) { 3308 break 3309 } 3310 v.reset(OpS390XFMOVDload) 3311 v.AddArg(ptr) 3312 v.AddArg(mem) 3313 return true 3314 } 3315 return false 3316 } 3317 func rewriteValueS390X_OpLrot32(v *Value, config *Config) bool { 3318 b := v.Block 3319 _ = b 3320 // match: (Lrot32 <t> x [c]) 3321 // cond: 3322 // result: (RLLconst <t> [c&31] x) 3323 for { 3324 t := v.Type 3325 c := v.AuxInt 3326 x := v.Args[0] 3327 v.reset(OpS390XRLLconst) 3328 v.Type = t 3329 v.AuxInt = c & 31 3330 v.AddArg(x) 3331 return true 3332 } 3333 } 3334 func rewriteValueS390X_OpLrot64(v *Value, config *Config) bool { 3335 b := v.Block 3336 _ = b 3337 // match: (Lrot64 <t> x [c]) 3338 // cond: 3339 // result: (RLLGconst <t> [c&63] x) 3340 for { 3341 t := v.Type 3342 c := v.AuxInt 3343 x := v.Args[0] 3344 v.reset(OpS390XRLLGconst) 3345 v.Type = t 3346 v.AuxInt = c & 63 3347 v.AddArg(x) 3348 return true 3349 } 3350 } 3351 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3352 b := v.Block 3353 _ = b 3354 // match: (Lsh16x16 <t> x y) 3355 // cond: 3356 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3357 for { 3358 t := v.Type 3359 x := v.Args[0] 3360 y := v.Args[1] 3361 v.reset(OpS390XANDW) 3362 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3363 v0.AddArg(x) 3364 v0.AddArg(y) 3365 v.AddArg(v0) 3366 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3367 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3368 v2.AuxInt = 31 3369 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3370 v3.AddArg(y) 3371 v2.AddArg(v3) 3372 v1.AddArg(v2) 3373 v.AddArg(v1) 3374 return true 3375 } 3376 } 3377 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3378 b := v.Block 3379 _ = b 3380 // match: (Lsh16x32 <t> x y) 3381 // cond: 3382 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3383 for { 3384 t := v.Type 3385 x := v.Args[0] 3386 y := v.Args[1] 3387 v.reset(OpS390XANDW) 3388 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3389 v0.AddArg(x) 3390 v0.AddArg(y) 3391 v.AddArg(v0) 3392 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3393 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3394 v2.AuxInt = 31 3395 v2.AddArg(y) 3396 v1.AddArg(v2) 3397 v.AddArg(v1) 3398 return true 3399 } 3400 } 3401 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3402 b := v.Block 3403 _ = b 3404 // match: (Lsh16x64 <t> x y) 3405 // cond: 3406 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3407 for { 3408 t := v.Type 3409 x := v.Args[0] 3410 y := v.Args[1] 3411 v.reset(OpS390XANDW) 3412 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3413 v0.AddArg(x) 3414 v0.AddArg(y) 3415 v.AddArg(v0) 3416 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3417 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3418 v2.AuxInt = 31 3419 v2.AddArg(y) 3420 v1.AddArg(v2) 3421 v.AddArg(v1) 3422 return true 3423 } 3424 } 3425 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3426 b := v.Block 3427 _ = b 3428 // match: (Lsh16x8 <t> x y) 3429 // cond: 3430 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3431 for { 3432 t := v.Type 3433 x := v.Args[0] 3434 y := v.Args[1] 3435 v.reset(OpS390XANDW) 3436 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3437 v0.AddArg(x) 3438 v0.AddArg(y) 3439 v.AddArg(v0) 3440 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3441 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3442 v2.AuxInt = 31 3443 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3444 v3.AddArg(y) 3445 v2.AddArg(v3) 3446 v1.AddArg(v2) 3447 v.AddArg(v1) 3448 return true 3449 } 3450 } 3451 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3452 b := v.Block 3453 _ = b 3454 // match: (Lsh32x16 <t> x y) 3455 // cond: 3456 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3457 for { 3458 t := v.Type 3459 x := v.Args[0] 3460 y := v.Args[1] 3461 v.reset(OpS390XANDW) 3462 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3463 v0.AddArg(x) 3464 v0.AddArg(y) 3465 v.AddArg(v0) 3466 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3467 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3468 v2.AuxInt = 31 3469 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3470 v3.AddArg(y) 3471 v2.AddArg(v3) 3472 v1.AddArg(v2) 3473 v.AddArg(v1) 3474 return true 3475 } 3476 } 3477 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3478 b := v.Block 3479 _ = b 3480 // match: (Lsh32x32 <t> x y) 3481 // cond: 3482 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3483 for { 3484 t := v.Type 3485 x := v.Args[0] 3486 y := v.Args[1] 3487 v.reset(OpS390XANDW) 3488 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3489 v0.AddArg(x) 3490 v0.AddArg(y) 3491 v.AddArg(v0) 3492 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3493 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3494 v2.AuxInt = 31 3495 v2.AddArg(y) 3496 v1.AddArg(v2) 3497 v.AddArg(v1) 3498 return true 3499 } 3500 } 3501 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3502 b := v.Block 3503 _ = b 3504 // match: (Lsh32x64 <t> x y) 3505 // cond: 3506 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3507 for { 3508 t := v.Type 3509 x := v.Args[0] 3510 y := v.Args[1] 3511 v.reset(OpS390XANDW) 3512 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3513 v0.AddArg(x) 3514 v0.AddArg(y) 3515 v.AddArg(v0) 3516 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3517 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3518 v2.AuxInt = 31 3519 v2.AddArg(y) 3520 v1.AddArg(v2) 3521 v.AddArg(v1) 3522 return true 3523 } 3524 } 3525 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3526 b := v.Block 3527 _ = b 3528 // match: (Lsh32x8 <t> x y) 3529 // cond: 3530 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3531 for { 3532 t := v.Type 3533 x := v.Args[0] 3534 y := v.Args[1] 3535 v.reset(OpS390XANDW) 3536 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3537 v0.AddArg(x) 3538 v0.AddArg(y) 3539 v.AddArg(v0) 3540 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3541 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3542 v2.AuxInt = 31 3543 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3544 v3.AddArg(y) 3545 v2.AddArg(v3) 3546 v1.AddArg(v2) 3547 v.AddArg(v1) 3548 return true 3549 } 3550 } 3551 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3552 b := v.Block 3553 _ = b 3554 // match: (Lsh64x16 <t> x y) 3555 // cond: 3556 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3557 for { 3558 t := v.Type 3559 x := v.Args[0] 3560 y := v.Args[1] 3561 v.reset(OpS390XAND) 3562 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3563 v0.AddArg(x) 3564 v0.AddArg(y) 3565 v.AddArg(v0) 3566 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3567 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3568 v2.AuxInt = 63 3569 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3570 v3.AddArg(y) 3571 v2.AddArg(v3) 3572 v1.AddArg(v2) 3573 v.AddArg(v1) 3574 return true 3575 } 3576 } 3577 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3578 b := v.Block 3579 _ = b 3580 // match: (Lsh64x32 <t> x y) 3581 // cond: 3582 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3583 for { 3584 t := v.Type 3585 x := v.Args[0] 3586 y := v.Args[1] 3587 v.reset(OpS390XAND) 3588 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3589 v0.AddArg(x) 3590 v0.AddArg(y) 3591 v.AddArg(v0) 3592 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3593 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3594 v2.AuxInt = 63 3595 v2.AddArg(y) 3596 v1.AddArg(v2) 3597 v.AddArg(v1) 3598 return true 3599 } 3600 } 3601 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3602 b := v.Block 3603 _ = b 3604 // match: (Lsh64x64 <t> x y) 3605 // cond: 3606 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3607 for { 3608 t := v.Type 3609 x := v.Args[0] 3610 y := v.Args[1] 3611 v.reset(OpS390XAND) 3612 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3613 v0.AddArg(x) 3614 v0.AddArg(y) 3615 v.AddArg(v0) 3616 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3617 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3618 v2.AuxInt = 63 3619 v2.AddArg(y) 3620 v1.AddArg(v2) 3621 v.AddArg(v1) 3622 return true 3623 } 3624 } 3625 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3626 b := v.Block 3627 _ = b 3628 // match: (Lsh64x8 <t> x y) 3629 // cond: 3630 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3631 for { 3632 t := v.Type 3633 x := v.Args[0] 3634 y := v.Args[1] 3635 v.reset(OpS390XAND) 3636 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3637 v0.AddArg(x) 3638 v0.AddArg(y) 3639 v.AddArg(v0) 3640 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3641 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3642 v2.AuxInt = 63 3643 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3644 v3.AddArg(y) 3645 v2.AddArg(v3) 3646 v1.AddArg(v2) 3647 v.AddArg(v1) 3648 return true 3649 } 3650 } 3651 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3652 b := v.Block 3653 _ = b 3654 // match: (Lsh8x16 <t> x y) 3655 // cond: 3656 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3657 for { 3658 t := v.Type 3659 x := v.Args[0] 3660 y := v.Args[1] 3661 v.reset(OpS390XANDW) 3662 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3663 v0.AddArg(x) 3664 v0.AddArg(y) 3665 v.AddArg(v0) 3666 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3667 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3668 v2.AuxInt = 31 3669 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3670 v3.AddArg(y) 3671 v2.AddArg(v3) 3672 v1.AddArg(v2) 3673 v.AddArg(v1) 3674 return true 3675 } 3676 } 3677 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3678 b := v.Block 3679 _ = b 3680 // match: (Lsh8x32 <t> x y) 3681 // cond: 3682 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3683 for { 3684 t := v.Type 3685 x := v.Args[0] 3686 y := v.Args[1] 3687 v.reset(OpS390XANDW) 3688 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3689 v0.AddArg(x) 3690 v0.AddArg(y) 3691 v.AddArg(v0) 3692 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3693 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3694 v2.AuxInt = 31 3695 v2.AddArg(y) 3696 v1.AddArg(v2) 3697 v.AddArg(v1) 3698 return true 3699 } 3700 } 3701 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3702 b := v.Block 3703 _ = b 3704 // match: (Lsh8x64 <t> x y) 3705 // cond: 3706 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3707 for { 3708 t := v.Type 3709 x := v.Args[0] 3710 y := v.Args[1] 3711 v.reset(OpS390XANDW) 3712 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3713 v0.AddArg(x) 3714 v0.AddArg(y) 3715 v.AddArg(v0) 3716 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3717 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3718 v2.AuxInt = 31 3719 v2.AddArg(y) 3720 v1.AddArg(v2) 3721 v.AddArg(v1) 3722 return true 3723 } 3724 } 3725 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3726 b := v.Block 3727 _ = b 3728 // match: (Lsh8x8 <t> x y) 3729 // cond: 3730 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3731 for { 3732 t := v.Type 3733 x := v.Args[0] 3734 y := v.Args[1] 3735 v.reset(OpS390XANDW) 3736 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3737 v0.AddArg(x) 3738 v0.AddArg(y) 3739 v.AddArg(v0) 3740 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3741 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3742 v2.AuxInt = 31 3743 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3744 v3.AddArg(y) 3745 v2.AddArg(v3) 3746 v1.AddArg(v2) 3747 v.AddArg(v1) 3748 return true 3749 } 3750 } 3751 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3752 b := v.Block 3753 _ = b 3754 // match: (Mod16 x y) 3755 // cond: 3756 // result: (MODW (MOVHreg x) (MOVHreg y)) 3757 for { 3758 x := v.Args[0] 3759 y := v.Args[1] 3760 v.reset(OpS390XMODW) 3761 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3762 v0.AddArg(x) 3763 v.AddArg(v0) 3764 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3765 v1.AddArg(y) 3766 v.AddArg(v1) 3767 return true 3768 } 3769 } 3770 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3771 b := v.Block 3772 _ = b 3773 // match: (Mod16u x y) 3774 // cond: 3775 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3776 for { 3777 x := v.Args[0] 3778 y := v.Args[1] 3779 v.reset(OpS390XMODWU) 3780 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3781 v0.AddArg(x) 3782 v.AddArg(v0) 3783 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3784 v1.AddArg(y) 3785 v.AddArg(v1) 3786 return true 3787 } 3788 } 3789 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3790 b := v.Block 3791 _ = b 3792 // match: (Mod32 x y) 3793 // cond: 3794 // result: (MODW (MOVWreg x) y) 3795 for { 3796 x := v.Args[0] 3797 y := v.Args[1] 3798 v.reset(OpS390XMODW) 3799 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 3800 v0.AddArg(x) 3801 v.AddArg(v0) 3802 v.AddArg(y) 3803 return true 3804 } 3805 } 3806 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3807 b := v.Block 3808 _ = b 3809 // match: (Mod32u x y) 3810 // cond: 3811 // result: (MODWU (MOVWZreg x) y) 3812 for { 3813 x := v.Args[0] 3814 y := v.Args[1] 3815 v.reset(OpS390XMODWU) 3816 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3817 v0.AddArg(x) 3818 v.AddArg(v0) 3819 v.AddArg(y) 3820 return true 3821 } 3822 } 3823 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3824 b := v.Block 3825 _ = b 3826 // match: (Mod64 x y) 3827 // cond: 3828 // result: (MODD x y) 3829 for { 3830 x := v.Args[0] 3831 y := v.Args[1] 3832 v.reset(OpS390XMODD) 3833 v.AddArg(x) 3834 v.AddArg(y) 3835 return true 3836 } 3837 } 3838 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3839 b := v.Block 3840 _ = b 3841 // match: (Mod64u x y) 3842 // cond: 3843 // result: (MODDU x y) 3844 for { 3845 x := v.Args[0] 3846 y := v.Args[1] 3847 v.reset(OpS390XMODDU) 3848 v.AddArg(x) 3849 v.AddArg(y) 3850 return true 3851 } 3852 } 3853 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3854 b := v.Block 3855 _ = b 3856 // match: (Mod8 x y) 3857 // cond: 3858 // result: (MODW (MOVBreg x) (MOVBreg y)) 3859 for { 3860 x := v.Args[0] 3861 y := v.Args[1] 3862 v.reset(OpS390XMODW) 3863 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3864 v0.AddArg(x) 3865 v.AddArg(v0) 3866 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3867 v1.AddArg(y) 3868 v.AddArg(v1) 3869 return true 3870 } 3871 } 3872 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3873 b := v.Block 3874 _ = b 3875 // match: (Mod8u x y) 3876 // cond: 3877 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3878 for { 3879 x := v.Args[0] 3880 y := v.Args[1] 3881 v.reset(OpS390XMODWU) 3882 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3883 v0.AddArg(x) 3884 v.AddArg(v0) 3885 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3886 v1.AddArg(y) 3887 v.AddArg(v1) 3888 return true 3889 } 3890 } 3891 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3892 b := v.Block 3893 _ = b 3894 // match: (Move [s] _ _ mem) 3895 // cond: SizeAndAlign(s).Size() == 0 3896 // result: mem 3897 for { 3898 s := v.AuxInt 3899 mem := v.Args[2] 3900 if !(SizeAndAlign(s).Size() == 0) { 3901 break 3902 } 3903 v.reset(OpCopy) 3904 v.Type = mem.Type 3905 v.AddArg(mem) 3906 return true 3907 } 3908 // match: (Move [s] dst src mem) 3909 // cond: SizeAndAlign(s).Size() == 1 3910 // result: (MOVBstore dst (MOVBZload src mem) mem) 3911 for { 3912 s := v.AuxInt 3913 dst := v.Args[0] 3914 src := v.Args[1] 3915 mem := v.Args[2] 3916 if !(SizeAndAlign(s).Size() == 1) { 3917 break 3918 } 3919 v.reset(OpS390XMOVBstore) 3920 v.AddArg(dst) 3921 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 3922 v0.AddArg(src) 3923 v0.AddArg(mem) 3924 v.AddArg(v0) 3925 v.AddArg(mem) 3926 return true 3927 } 3928 // match: (Move [s] dst src mem) 3929 // cond: SizeAndAlign(s).Size() == 2 3930 // result: (MOVHstore dst (MOVHZload src mem) mem) 3931 for { 3932 s := v.AuxInt 3933 dst := v.Args[0] 3934 src := v.Args[1] 3935 mem := v.Args[2] 3936 if !(SizeAndAlign(s).Size() == 2) { 3937 break 3938 } 3939 v.reset(OpS390XMOVHstore) 3940 v.AddArg(dst) 3941 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 3942 v0.AddArg(src) 3943 v0.AddArg(mem) 3944 v.AddArg(v0) 3945 v.AddArg(mem) 3946 return true 3947 } 3948 // match: (Move [s] dst src mem) 3949 // cond: SizeAndAlign(s).Size() == 4 3950 // result: (MOVWstore dst (MOVWZload src mem) mem) 3951 for { 3952 s := v.AuxInt 3953 dst := v.Args[0] 3954 src := v.Args[1] 3955 mem := v.Args[2] 3956 if !(SizeAndAlign(s).Size() == 4) { 3957 break 3958 } 3959 v.reset(OpS390XMOVWstore) 3960 v.AddArg(dst) 3961 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 3962 v0.AddArg(src) 3963 v0.AddArg(mem) 3964 v.AddArg(v0) 3965 v.AddArg(mem) 3966 return true 3967 } 3968 // match: (Move [s] dst src mem) 3969 // cond: SizeAndAlign(s).Size() == 8 3970 // result: (MOVDstore dst (MOVDload src mem) mem) 3971 for { 3972 s := v.AuxInt 3973 dst := v.Args[0] 3974 src := v.Args[1] 3975 mem := v.Args[2] 3976 if !(SizeAndAlign(s).Size() == 8) { 3977 break 3978 } 3979 v.reset(OpS390XMOVDstore) 3980 v.AddArg(dst) 3981 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 3982 v0.AddArg(src) 3983 v0.AddArg(mem) 3984 v.AddArg(v0) 3985 v.AddArg(mem) 3986 return true 3987 } 3988 // match: (Move [s] dst src mem) 3989 // cond: SizeAndAlign(s).Size() == 16 3990 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 3991 for { 3992 s := v.AuxInt 3993 dst := v.Args[0] 3994 src := v.Args[1] 3995 mem := v.Args[2] 3996 if !(SizeAndAlign(s).Size() == 16) { 3997 break 3998 } 3999 v.reset(OpS390XMOVDstore) 4000 v.AuxInt = 8 4001 v.AddArg(dst) 4002 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4003 v0.AuxInt = 8 4004 v0.AddArg(src) 4005 v0.AddArg(mem) 4006 v.AddArg(v0) 4007 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4008 v1.AddArg(dst) 4009 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4010 v2.AddArg(src) 4011 v2.AddArg(mem) 4012 v1.AddArg(v2) 4013 v1.AddArg(mem) 4014 v.AddArg(v1) 4015 return true 4016 } 4017 // match: (Move [s] dst src mem) 4018 // cond: SizeAndAlign(s).Size() == 24 4019 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4020 for { 4021 s := v.AuxInt 4022 dst := v.Args[0] 4023 src := v.Args[1] 4024 mem := v.Args[2] 4025 if !(SizeAndAlign(s).Size() == 24) { 4026 break 4027 } 4028 v.reset(OpS390XMOVDstore) 4029 v.AuxInt = 16 4030 v.AddArg(dst) 4031 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4032 v0.AuxInt = 16 4033 v0.AddArg(src) 4034 v0.AddArg(mem) 4035 v.AddArg(v0) 4036 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4037 v1.AuxInt = 8 4038 v1.AddArg(dst) 4039 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4040 v2.AuxInt = 8 4041 v2.AddArg(src) 4042 v2.AddArg(mem) 4043 v1.AddArg(v2) 4044 v3 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4045 v3.AddArg(dst) 4046 v4 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4047 v4.AddArg(src) 4048 v4.AddArg(mem) 4049 v3.AddArg(v4) 4050 v3.AddArg(mem) 4051 v1.AddArg(v3) 4052 v.AddArg(v1) 4053 return true 4054 } 4055 // match: (Move [s] dst src mem) 4056 // cond: SizeAndAlign(s).Size() == 3 4057 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4058 for { 4059 s := v.AuxInt 4060 dst := v.Args[0] 4061 src := v.Args[1] 4062 mem := v.Args[2] 4063 if !(SizeAndAlign(s).Size() == 3) { 4064 break 4065 } 4066 v.reset(OpS390XMOVBstore) 4067 v.AuxInt = 2 4068 v.AddArg(dst) 4069 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4070 v0.AuxInt = 2 4071 v0.AddArg(src) 4072 v0.AddArg(mem) 4073 v.AddArg(v0) 4074 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4075 v1.AddArg(dst) 4076 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4077 v2.AddArg(src) 4078 v2.AddArg(mem) 4079 v1.AddArg(v2) 4080 v1.AddArg(mem) 4081 v.AddArg(v1) 4082 return true 4083 } 4084 // match: (Move [s] dst src mem) 4085 // cond: SizeAndAlign(s).Size() == 5 4086 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4087 for { 4088 s := v.AuxInt 4089 dst := v.Args[0] 4090 src := v.Args[1] 4091 mem := v.Args[2] 4092 if !(SizeAndAlign(s).Size() == 5) { 4093 break 4094 } 4095 v.reset(OpS390XMOVBstore) 4096 v.AuxInt = 4 4097 v.AddArg(dst) 4098 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4099 v0.AuxInt = 4 4100 v0.AddArg(src) 4101 v0.AddArg(mem) 4102 v.AddArg(v0) 4103 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4104 v1.AddArg(dst) 4105 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4106 v2.AddArg(src) 4107 v2.AddArg(mem) 4108 v1.AddArg(v2) 4109 v1.AddArg(mem) 4110 v.AddArg(v1) 4111 return true 4112 } 4113 // match: (Move [s] dst src mem) 4114 // cond: SizeAndAlign(s).Size() == 6 4115 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4116 for { 4117 s := v.AuxInt 4118 dst := v.Args[0] 4119 src := v.Args[1] 4120 mem := v.Args[2] 4121 if !(SizeAndAlign(s).Size() == 6) { 4122 break 4123 } 4124 v.reset(OpS390XMOVHstore) 4125 v.AuxInt = 4 4126 v.AddArg(dst) 4127 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4128 v0.AuxInt = 4 4129 v0.AddArg(src) 4130 v0.AddArg(mem) 4131 v.AddArg(v0) 4132 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4133 v1.AddArg(dst) 4134 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4135 v2.AddArg(src) 4136 v2.AddArg(mem) 4137 v1.AddArg(v2) 4138 v1.AddArg(mem) 4139 v.AddArg(v1) 4140 return true 4141 } 4142 // match: (Move [s] dst src mem) 4143 // cond: SizeAndAlign(s).Size() == 7 4144 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4145 for { 4146 s := v.AuxInt 4147 dst := v.Args[0] 4148 src := v.Args[1] 4149 mem := v.Args[2] 4150 if !(SizeAndAlign(s).Size() == 7) { 4151 break 4152 } 4153 v.reset(OpS390XMOVBstore) 4154 v.AuxInt = 6 4155 v.AddArg(dst) 4156 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4157 v0.AuxInt = 6 4158 v0.AddArg(src) 4159 v0.AddArg(mem) 4160 v.AddArg(v0) 4161 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4162 v1.AuxInt = 4 4163 v1.AddArg(dst) 4164 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4165 v2.AuxInt = 4 4166 v2.AddArg(src) 4167 v2.AddArg(mem) 4168 v1.AddArg(v2) 4169 v3 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4170 v3.AddArg(dst) 4171 v4 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4172 v4.AddArg(src) 4173 v4.AddArg(mem) 4174 v3.AddArg(v4) 4175 v3.AddArg(mem) 4176 v1.AddArg(v3) 4177 v.AddArg(v1) 4178 return true 4179 } 4180 // match: (Move [s] dst src mem) 4181 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4182 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4183 for { 4184 s := v.AuxInt 4185 dst := v.Args[0] 4186 src := v.Args[1] 4187 mem := v.Args[2] 4188 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4189 break 4190 } 4191 v.reset(OpS390XMVC) 4192 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4193 v.AddArg(dst) 4194 v.AddArg(src) 4195 v.AddArg(mem) 4196 return true 4197 } 4198 // match: (Move [s] dst src mem) 4199 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4200 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4201 for { 4202 s := v.AuxInt 4203 dst := v.Args[0] 4204 src := v.Args[1] 4205 mem := v.Args[2] 4206 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4207 break 4208 } 4209 v.reset(OpS390XMVC) 4210 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4211 v.AddArg(dst) 4212 v.AddArg(src) 4213 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4214 v0.AuxInt = makeValAndOff(256, 0) 4215 v0.AddArg(dst) 4216 v0.AddArg(src) 4217 v0.AddArg(mem) 4218 v.AddArg(v0) 4219 return true 4220 } 4221 // match: (Move [s] dst src mem) 4222 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4223 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4224 for { 4225 s := v.AuxInt 4226 dst := v.Args[0] 4227 src := v.Args[1] 4228 mem := v.Args[2] 4229 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4230 break 4231 } 4232 v.reset(OpS390XMVC) 4233 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4234 v.AddArg(dst) 4235 v.AddArg(src) 4236 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4237 v0.AuxInt = makeValAndOff(256, 256) 4238 v0.AddArg(dst) 4239 v0.AddArg(src) 4240 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4241 v1.AuxInt = makeValAndOff(256, 0) 4242 v1.AddArg(dst) 4243 v1.AddArg(src) 4244 v1.AddArg(mem) 4245 v0.AddArg(v1) 4246 v.AddArg(v0) 4247 return true 4248 } 4249 // match: (Move [s] dst src mem) 4250 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4251 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4252 for { 4253 s := v.AuxInt 4254 dst := v.Args[0] 4255 src := v.Args[1] 4256 mem := v.Args[2] 4257 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4258 break 4259 } 4260 v.reset(OpS390XMVC) 4261 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4262 v.AddArg(dst) 4263 v.AddArg(src) 4264 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4265 v0.AuxInt = makeValAndOff(256, 512) 4266 v0.AddArg(dst) 4267 v0.AddArg(src) 4268 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4269 v1.AuxInt = makeValAndOff(256, 256) 4270 v1.AddArg(dst) 4271 v1.AddArg(src) 4272 v2 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4273 v2.AuxInt = makeValAndOff(256, 0) 4274 v2.AddArg(dst) 4275 v2.AddArg(src) 4276 v2.AddArg(mem) 4277 v1.AddArg(v2) 4278 v0.AddArg(v1) 4279 v.AddArg(v0) 4280 return true 4281 } 4282 // match: (Move [s] dst src mem) 4283 // cond: SizeAndAlign(s).Size() > 1024 4284 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4285 for { 4286 s := v.AuxInt 4287 dst := v.Args[0] 4288 src := v.Args[1] 4289 mem := v.Args[2] 4290 if !(SizeAndAlign(s).Size() > 1024) { 4291 break 4292 } 4293 v.reset(OpS390XLoweredMove) 4294 v.AuxInt = SizeAndAlign(s).Size() % 256 4295 v.AddArg(dst) 4296 v.AddArg(src) 4297 v0 := b.NewValue0(v.Line, OpS390XADDconst, src.Type) 4298 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4299 v0.AddArg(src) 4300 v.AddArg(v0) 4301 v.AddArg(mem) 4302 return true 4303 } 4304 return false 4305 } 4306 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4307 b := v.Block 4308 _ = b 4309 // match: (Mul16 x y) 4310 // cond: 4311 // result: (MULLW x y) 4312 for { 4313 x := v.Args[0] 4314 y := v.Args[1] 4315 v.reset(OpS390XMULLW) 4316 v.AddArg(x) 4317 v.AddArg(y) 4318 return true 4319 } 4320 } 4321 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4322 b := v.Block 4323 _ = b 4324 // match: (Mul32 x y) 4325 // cond: 4326 // result: (MULLW x y) 4327 for { 4328 x := v.Args[0] 4329 y := v.Args[1] 4330 v.reset(OpS390XMULLW) 4331 v.AddArg(x) 4332 v.AddArg(y) 4333 return true 4334 } 4335 } 4336 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4337 b := v.Block 4338 _ = b 4339 // match: (Mul32F x y) 4340 // cond: 4341 // result: (FMULS x y) 4342 for { 4343 x := v.Args[0] 4344 y := v.Args[1] 4345 v.reset(OpS390XFMULS) 4346 v.AddArg(x) 4347 v.AddArg(y) 4348 return true 4349 } 4350 } 4351 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4352 b := v.Block 4353 _ = b 4354 // match: (Mul64 x y) 4355 // cond: 4356 // result: (MULLD x y) 4357 for { 4358 x := v.Args[0] 4359 y := v.Args[1] 4360 v.reset(OpS390XMULLD) 4361 v.AddArg(x) 4362 v.AddArg(y) 4363 return true 4364 } 4365 } 4366 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4367 b := v.Block 4368 _ = b 4369 // match: (Mul64F x y) 4370 // cond: 4371 // result: (FMUL x y) 4372 for { 4373 x := v.Args[0] 4374 y := v.Args[1] 4375 v.reset(OpS390XFMUL) 4376 v.AddArg(x) 4377 v.AddArg(y) 4378 return true 4379 } 4380 } 4381 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4382 b := v.Block 4383 _ = b 4384 // match: (Mul8 x y) 4385 // cond: 4386 // result: (MULLW x y) 4387 for { 4388 x := v.Args[0] 4389 y := v.Args[1] 4390 v.reset(OpS390XMULLW) 4391 v.AddArg(x) 4392 v.AddArg(y) 4393 return true 4394 } 4395 } 4396 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4397 b := v.Block 4398 _ = b 4399 // match: (Neg16 x) 4400 // cond: 4401 // result: (NEGW (MOVHreg x)) 4402 for { 4403 x := v.Args[0] 4404 v.reset(OpS390XNEGW) 4405 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4406 v0.AddArg(x) 4407 v.AddArg(v0) 4408 return true 4409 } 4410 } 4411 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4412 b := v.Block 4413 _ = b 4414 // match: (Neg32 x) 4415 // cond: 4416 // result: (NEGW x) 4417 for { 4418 x := v.Args[0] 4419 v.reset(OpS390XNEGW) 4420 v.AddArg(x) 4421 return true 4422 } 4423 } 4424 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4425 b := v.Block 4426 _ = b 4427 // match: (Neg32F x) 4428 // cond: 4429 // result: (FNEGS x) 4430 for { 4431 x := v.Args[0] 4432 v.reset(OpS390XFNEGS) 4433 v.AddArg(x) 4434 return true 4435 } 4436 } 4437 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4438 b := v.Block 4439 _ = b 4440 // match: (Neg64 x) 4441 // cond: 4442 // result: (NEG x) 4443 for { 4444 x := v.Args[0] 4445 v.reset(OpS390XNEG) 4446 v.AddArg(x) 4447 return true 4448 } 4449 } 4450 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4451 b := v.Block 4452 _ = b 4453 // match: (Neg64F x) 4454 // cond: 4455 // result: (FNEG x) 4456 for { 4457 x := v.Args[0] 4458 v.reset(OpS390XFNEG) 4459 v.AddArg(x) 4460 return true 4461 } 4462 } 4463 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4464 b := v.Block 4465 _ = b 4466 // match: (Neg8 x) 4467 // cond: 4468 // result: (NEGW (MOVBreg x)) 4469 for { 4470 x := v.Args[0] 4471 v.reset(OpS390XNEGW) 4472 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4473 v0.AddArg(x) 4474 v.AddArg(v0) 4475 return true 4476 } 4477 } 4478 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4479 b := v.Block 4480 _ = b 4481 // match: (Neq16 x y) 4482 // cond: 4483 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4484 for { 4485 x := v.Args[0] 4486 y := v.Args[1] 4487 v.reset(OpS390XMOVDNE) 4488 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4489 v0.AuxInt = 0 4490 v.AddArg(v0) 4491 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4492 v1.AuxInt = 1 4493 v.AddArg(v1) 4494 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4495 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4496 v3.AddArg(x) 4497 v2.AddArg(v3) 4498 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4499 v4.AddArg(y) 4500 v2.AddArg(v4) 4501 v.AddArg(v2) 4502 return true 4503 } 4504 } 4505 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4506 b := v.Block 4507 _ = b 4508 // match: (Neq32 x y) 4509 // cond: 4510 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4511 for { 4512 x := v.Args[0] 4513 y := v.Args[1] 4514 v.reset(OpS390XMOVDNE) 4515 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4516 v0.AuxInt = 0 4517 v.AddArg(v0) 4518 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4519 v1.AuxInt = 1 4520 v.AddArg(v1) 4521 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 4522 v2.AddArg(x) 4523 v2.AddArg(y) 4524 v.AddArg(v2) 4525 return true 4526 } 4527 } 4528 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4529 b := v.Block 4530 _ = b 4531 // match: (Neq32F x y) 4532 // cond: 4533 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4534 for { 4535 x := v.Args[0] 4536 y := v.Args[1] 4537 v.reset(OpS390XMOVDNE) 4538 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4539 v0.AuxInt = 0 4540 v.AddArg(v0) 4541 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4542 v1.AuxInt = 1 4543 v.AddArg(v1) 4544 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 4545 v2.AddArg(x) 4546 v2.AddArg(y) 4547 v.AddArg(v2) 4548 return true 4549 } 4550 } 4551 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4552 b := v.Block 4553 _ = b 4554 // match: (Neq64 x y) 4555 // cond: 4556 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4557 for { 4558 x := v.Args[0] 4559 y := v.Args[1] 4560 v.reset(OpS390XMOVDNE) 4561 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4562 v0.AuxInt = 0 4563 v.AddArg(v0) 4564 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4565 v1.AuxInt = 1 4566 v.AddArg(v1) 4567 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4568 v2.AddArg(x) 4569 v2.AddArg(y) 4570 v.AddArg(v2) 4571 return true 4572 } 4573 } 4574 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4575 b := v.Block 4576 _ = b 4577 // match: (Neq64F x y) 4578 // cond: 4579 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4580 for { 4581 x := v.Args[0] 4582 y := v.Args[1] 4583 v.reset(OpS390XMOVDNE) 4584 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4585 v0.AuxInt = 0 4586 v.AddArg(v0) 4587 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4588 v1.AuxInt = 1 4589 v.AddArg(v1) 4590 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 4591 v2.AddArg(x) 4592 v2.AddArg(y) 4593 v.AddArg(v2) 4594 return true 4595 } 4596 } 4597 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4598 b := v.Block 4599 _ = b 4600 // match: (Neq8 x y) 4601 // cond: 4602 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4603 for { 4604 x := v.Args[0] 4605 y := v.Args[1] 4606 v.reset(OpS390XMOVDNE) 4607 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4608 v0.AuxInt = 0 4609 v.AddArg(v0) 4610 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4611 v1.AuxInt = 1 4612 v.AddArg(v1) 4613 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4614 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4615 v3.AddArg(x) 4616 v2.AddArg(v3) 4617 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4618 v4.AddArg(y) 4619 v2.AddArg(v4) 4620 v.AddArg(v2) 4621 return true 4622 } 4623 } 4624 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4625 b := v.Block 4626 _ = b 4627 // match: (NeqB x y) 4628 // cond: 4629 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4630 for { 4631 x := v.Args[0] 4632 y := v.Args[1] 4633 v.reset(OpS390XMOVDNE) 4634 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4635 v0.AuxInt = 0 4636 v.AddArg(v0) 4637 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4638 v1.AuxInt = 1 4639 v.AddArg(v1) 4640 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4641 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4642 v3.AddArg(x) 4643 v2.AddArg(v3) 4644 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4645 v4.AddArg(y) 4646 v2.AddArg(v4) 4647 v.AddArg(v2) 4648 return true 4649 } 4650 } 4651 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4652 b := v.Block 4653 _ = b 4654 // match: (NeqPtr x y) 4655 // cond: 4656 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4657 for { 4658 x := v.Args[0] 4659 y := v.Args[1] 4660 v.reset(OpS390XMOVDNE) 4661 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4662 v0.AuxInt = 0 4663 v.AddArg(v0) 4664 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4665 v1.AuxInt = 1 4666 v.AddArg(v1) 4667 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4668 v2.AddArg(x) 4669 v2.AddArg(y) 4670 v.AddArg(v2) 4671 return true 4672 } 4673 } 4674 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4675 b := v.Block 4676 _ = b 4677 // match: (NilCheck ptr mem) 4678 // cond: 4679 // result: (LoweredNilCheck ptr mem) 4680 for { 4681 ptr := v.Args[0] 4682 mem := v.Args[1] 4683 v.reset(OpS390XLoweredNilCheck) 4684 v.AddArg(ptr) 4685 v.AddArg(mem) 4686 return true 4687 } 4688 } 4689 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4690 b := v.Block 4691 _ = b 4692 // match: (Not x) 4693 // cond: 4694 // result: (XORWconst [1] x) 4695 for { 4696 x := v.Args[0] 4697 v.reset(OpS390XXORWconst) 4698 v.AuxInt = 1 4699 v.AddArg(x) 4700 return true 4701 } 4702 } 4703 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4704 b := v.Block 4705 _ = b 4706 // match: (OffPtr [off] ptr:(SP)) 4707 // cond: 4708 // result: (MOVDaddr [off] ptr) 4709 for { 4710 off := v.AuxInt 4711 ptr := v.Args[0] 4712 if ptr.Op != OpSP { 4713 break 4714 } 4715 v.reset(OpS390XMOVDaddr) 4716 v.AuxInt = off 4717 v.AddArg(ptr) 4718 return true 4719 } 4720 // match: (OffPtr [off] ptr) 4721 // cond: is32Bit(off) 4722 // result: (ADDconst [off] ptr) 4723 for { 4724 off := v.AuxInt 4725 ptr := v.Args[0] 4726 if !(is32Bit(off)) { 4727 break 4728 } 4729 v.reset(OpS390XADDconst) 4730 v.AuxInt = off 4731 v.AddArg(ptr) 4732 return true 4733 } 4734 // match: (OffPtr [off] ptr) 4735 // cond: 4736 // result: (ADD (MOVDconst [off]) ptr) 4737 for { 4738 off := v.AuxInt 4739 ptr := v.Args[0] 4740 v.reset(OpS390XADD) 4741 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4742 v0.AuxInt = off 4743 v.AddArg(v0) 4744 v.AddArg(ptr) 4745 return true 4746 } 4747 } 4748 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4749 b := v.Block 4750 _ = b 4751 // match: (Or16 x y) 4752 // cond: 4753 // result: (ORW x y) 4754 for { 4755 x := v.Args[0] 4756 y := v.Args[1] 4757 v.reset(OpS390XORW) 4758 v.AddArg(x) 4759 v.AddArg(y) 4760 return true 4761 } 4762 } 4763 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4764 b := v.Block 4765 _ = b 4766 // match: (Or32 x y) 4767 // cond: 4768 // result: (ORW x y) 4769 for { 4770 x := v.Args[0] 4771 y := v.Args[1] 4772 v.reset(OpS390XORW) 4773 v.AddArg(x) 4774 v.AddArg(y) 4775 return true 4776 } 4777 } 4778 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4779 b := v.Block 4780 _ = b 4781 // match: (Or64 x y) 4782 // cond: 4783 // result: (OR x y) 4784 for { 4785 x := v.Args[0] 4786 y := v.Args[1] 4787 v.reset(OpS390XOR) 4788 v.AddArg(x) 4789 v.AddArg(y) 4790 return true 4791 } 4792 } 4793 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4794 b := v.Block 4795 _ = b 4796 // match: (Or8 x y) 4797 // cond: 4798 // result: (ORW x y) 4799 for { 4800 x := v.Args[0] 4801 y := v.Args[1] 4802 v.reset(OpS390XORW) 4803 v.AddArg(x) 4804 v.AddArg(y) 4805 return true 4806 } 4807 } 4808 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4809 b := v.Block 4810 _ = b 4811 // match: (OrB x y) 4812 // cond: 4813 // result: (ORW x y) 4814 for { 4815 x := v.Args[0] 4816 y := v.Args[1] 4817 v.reset(OpS390XORW) 4818 v.AddArg(x) 4819 v.AddArg(y) 4820 return true 4821 } 4822 } 4823 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4824 b := v.Block 4825 _ = b 4826 // match: (Rsh16Ux16 <t> x y) 4827 // cond: 4828 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4829 for { 4830 t := v.Type 4831 x := v.Args[0] 4832 y := v.Args[1] 4833 v.reset(OpS390XANDW) 4834 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4835 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4836 v1.AddArg(x) 4837 v0.AddArg(v1) 4838 v0.AddArg(y) 4839 v.AddArg(v0) 4840 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4841 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4842 v3.AuxInt = 15 4843 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4844 v4.AddArg(y) 4845 v3.AddArg(v4) 4846 v2.AddArg(v3) 4847 v.AddArg(v2) 4848 return true 4849 } 4850 } 4851 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4852 b := v.Block 4853 _ = b 4854 // match: (Rsh16Ux32 <t> x y) 4855 // cond: 4856 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4857 for { 4858 t := v.Type 4859 x := v.Args[0] 4860 y := v.Args[1] 4861 v.reset(OpS390XANDW) 4862 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4863 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4864 v1.AddArg(x) 4865 v0.AddArg(v1) 4866 v0.AddArg(y) 4867 v.AddArg(v0) 4868 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4869 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4870 v3.AuxInt = 15 4871 v3.AddArg(y) 4872 v2.AddArg(v3) 4873 v.AddArg(v2) 4874 return true 4875 } 4876 } 4877 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4878 b := v.Block 4879 _ = b 4880 // match: (Rsh16Ux64 <t> x y) 4881 // cond: 4882 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4883 for { 4884 t := v.Type 4885 x := v.Args[0] 4886 y := v.Args[1] 4887 v.reset(OpS390XANDW) 4888 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4889 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4890 v1.AddArg(x) 4891 v0.AddArg(v1) 4892 v0.AddArg(y) 4893 v.AddArg(v0) 4894 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4895 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 4896 v3.AuxInt = 15 4897 v3.AddArg(y) 4898 v2.AddArg(v3) 4899 v.AddArg(v2) 4900 return true 4901 } 4902 } 4903 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4904 b := v.Block 4905 _ = b 4906 // match: (Rsh16Ux8 <t> x y) 4907 // cond: 4908 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4909 for { 4910 t := v.Type 4911 x := v.Args[0] 4912 y := v.Args[1] 4913 v.reset(OpS390XANDW) 4914 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4915 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4916 v1.AddArg(x) 4917 v0.AddArg(v1) 4918 v0.AddArg(y) 4919 v.AddArg(v0) 4920 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4921 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4922 v3.AuxInt = 15 4923 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4924 v4.AddArg(y) 4925 v3.AddArg(v4) 4926 v2.AddArg(v3) 4927 v.AddArg(v2) 4928 return true 4929 } 4930 } 4931 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4932 b := v.Block 4933 _ = b 4934 // match: (Rsh16x16 <t> x y) 4935 // cond: 4936 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4937 for { 4938 t := v.Type 4939 x := v.Args[0] 4940 y := v.Args[1] 4941 v.reset(OpS390XSRAW) 4942 v.Type = t 4943 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4944 v0.AddArg(x) 4945 v.AddArg(v0) 4946 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4947 v1.AddArg(y) 4948 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4949 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4950 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4951 v4.AuxInt = 15 4952 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4953 v5.AddArg(y) 4954 v4.AddArg(v5) 4955 v3.AddArg(v4) 4956 v2.AddArg(v3) 4957 v1.AddArg(v2) 4958 v.AddArg(v1) 4959 return true 4960 } 4961 } 4962 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 4963 b := v.Block 4964 _ = b 4965 // match: (Rsh16x32 <t> x y) 4966 // cond: 4967 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 4968 for { 4969 t := v.Type 4970 x := v.Args[0] 4971 y := v.Args[1] 4972 v.reset(OpS390XSRAW) 4973 v.Type = t 4974 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4975 v0.AddArg(x) 4976 v.AddArg(v0) 4977 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4978 v1.AddArg(y) 4979 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4980 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4981 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4982 v4.AuxInt = 15 4983 v4.AddArg(y) 4984 v3.AddArg(v4) 4985 v2.AddArg(v3) 4986 v1.AddArg(v2) 4987 v.AddArg(v1) 4988 return true 4989 } 4990 } 4991 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 4992 b := v.Block 4993 _ = b 4994 // match: (Rsh16x64 <t> x y) 4995 // cond: 4996 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 4997 for { 4998 t := v.Type 4999 x := v.Args[0] 5000 y := v.Args[1] 5001 v.reset(OpS390XSRAW) 5002 v.Type = t 5003 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5004 v0.AddArg(x) 5005 v.AddArg(v0) 5006 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5007 v1.AddArg(y) 5008 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5009 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5010 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5011 v4.AuxInt = 15 5012 v4.AddArg(y) 5013 v3.AddArg(v4) 5014 v2.AddArg(v3) 5015 v1.AddArg(v2) 5016 v.AddArg(v1) 5017 return true 5018 } 5019 } 5020 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5021 b := v.Block 5022 _ = b 5023 // match: (Rsh16x8 <t> x y) 5024 // cond: 5025 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5026 for { 5027 t := v.Type 5028 x := v.Args[0] 5029 y := v.Args[1] 5030 v.reset(OpS390XSRAW) 5031 v.Type = t 5032 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5033 v0.AddArg(x) 5034 v.AddArg(v0) 5035 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5036 v1.AddArg(y) 5037 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5038 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5039 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5040 v4.AuxInt = 15 5041 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5042 v5.AddArg(y) 5043 v4.AddArg(v5) 5044 v3.AddArg(v4) 5045 v2.AddArg(v3) 5046 v1.AddArg(v2) 5047 v.AddArg(v1) 5048 return true 5049 } 5050 } 5051 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5052 b := v.Block 5053 _ = b 5054 // match: (Rsh32Ux16 <t> x y) 5055 // cond: 5056 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5057 for { 5058 t := v.Type 5059 x := v.Args[0] 5060 y := v.Args[1] 5061 v.reset(OpS390XANDW) 5062 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5063 v0.AddArg(x) 5064 v0.AddArg(y) 5065 v.AddArg(v0) 5066 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5067 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5068 v2.AuxInt = 31 5069 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5070 v3.AddArg(y) 5071 v2.AddArg(v3) 5072 v1.AddArg(v2) 5073 v.AddArg(v1) 5074 return true 5075 } 5076 } 5077 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5078 b := v.Block 5079 _ = b 5080 // match: (Rsh32Ux32 <t> x y) 5081 // cond: 5082 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5083 for { 5084 t := v.Type 5085 x := v.Args[0] 5086 y := v.Args[1] 5087 v.reset(OpS390XANDW) 5088 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5089 v0.AddArg(x) 5090 v0.AddArg(y) 5091 v.AddArg(v0) 5092 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5093 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5094 v2.AuxInt = 31 5095 v2.AddArg(y) 5096 v1.AddArg(v2) 5097 v.AddArg(v1) 5098 return true 5099 } 5100 } 5101 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5102 b := v.Block 5103 _ = b 5104 // match: (Rsh32Ux64 <t> x y) 5105 // cond: 5106 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5107 for { 5108 t := v.Type 5109 x := v.Args[0] 5110 y := v.Args[1] 5111 v.reset(OpS390XANDW) 5112 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5113 v0.AddArg(x) 5114 v0.AddArg(y) 5115 v.AddArg(v0) 5116 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5117 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5118 v2.AuxInt = 31 5119 v2.AddArg(y) 5120 v1.AddArg(v2) 5121 v.AddArg(v1) 5122 return true 5123 } 5124 } 5125 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5126 b := v.Block 5127 _ = b 5128 // match: (Rsh32Ux8 <t> x y) 5129 // cond: 5130 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5131 for { 5132 t := v.Type 5133 x := v.Args[0] 5134 y := v.Args[1] 5135 v.reset(OpS390XANDW) 5136 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5137 v0.AddArg(x) 5138 v0.AddArg(y) 5139 v.AddArg(v0) 5140 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5141 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5142 v2.AuxInt = 31 5143 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5144 v3.AddArg(y) 5145 v2.AddArg(v3) 5146 v1.AddArg(v2) 5147 v.AddArg(v1) 5148 return true 5149 } 5150 } 5151 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5152 b := v.Block 5153 _ = b 5154 // match: (Rsh32x16 <t> x y) 5155 // cond: 5156 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5157 for { 5158 t := v.Type 5159 x := v.Args[0] 5160 y := v.Args[1] 5161 v.reset(OpS390XSRAW) 5162 v.Type = t 5163 v.AddArg(x) 5164 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5165 v0.AddArg(y) 5166 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5167 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5168 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5169 v3.AuxInt = 31 5170 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5171 v4.AddArg(y) 5172 v3.AddArg(v4) 5173 v2.AddArg(v3) 5174 v1.AddArg(v2) 5175 v0.AddArg(v1) 5176 v.AddArg(v0) 5177 return true 5178 } 5179 } 5180 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5181 b := v.Block 5182 _ = b 5183 // match: (Rsh32x32 <t> x y) 5184 // cond: 5185 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5186 for { 5187 t := v.Type 5188 x := v.Args[0] 5189 y := v.Args[1] 5190 v.reset(OpS390XSRAW) 5191 v.Type = t 5192 v.AddArg(x) 5193 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5194 v0.AddArg(y) 5195 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5196 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5197 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5198 v3.AuxInt = 31 5199 v3.AddArg(y) 5200 v2.AddArg(v3) 5201 v1.AddArg(v2) 5202 v0.AddArg(v1) 5203 v.AddArg(v0) 5204 return true 5205 } 5206 } 5207 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5208 b := v.Block 5209 _ = b 5210 // match: (Rsh32x64 <t> x y) 5211 // cond: 5212 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5213 for { 5214 t := v.Type 5215 x := v.Args[0] 5216 y := v.Args[1] 5217 v.reset(OpS390XSRAW) 5218 v.Type = t 5219 v.AddArg(x) 5220 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5221 v0.AddArg(y) 5222 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5223 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5224 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5225 v3.AuxInt = 31 5226 v3.AddArg(y) 5227 v2.AddArg(v3) 5228 v1.AddArg(v2) 5229 v0.AddArg(v1) 5230 v.AddArg(v0) 5231 return true 5232 } 5233 } 5234 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5235 b := v.Block 5236 _ = b 5237 // match: (Rsh32x8 <t> x y) 5238 // cond: 5239 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5240 for { 5241 t := v.Type 5242 x := v.Args[0] 5243 y := v.Args[1] 5244 v.reset(OpS390XSRAW) 5245 v.Type = t 5246 v.AddArg(x) 5247 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5248 v0.AddArg(y) 5249 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5250 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5251 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5252 v3.AuxInt = 31 5253 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5254 v4.AddArg(y) 5255 v3.AddArg(v4) 5256 v2.AddArg(v3) 5257 v1.AddArg(v2) 5258 v0.AddArg(v1) 5259 v.AddArg(v0) 5260 return true 5261 } 5262 } 5263 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5264 b := v.Block 5265 _ = b 5266 // match: (Rsh64Ux16 <t> x y) 5267 // cond: 5268 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5269 for { 5270 t := v.Type 5271 x := v.Args[0] 5272 y := v.Args[1] 5273 v.reset(OpS390XAND) 5274 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5275 v0.AddArg(x) 5276 v0.AddArg(y) 5277 v.AddArg(v0) 5278 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5279 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5280 v2.AuxInt = 63 5281 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5282 v3.AddArg(y) 5283 v2.AddArg(v3) 5284 v1.AddArg(v2) 5285 v.AddArg(v1) 5286 return true 5287 } 5288 } 5289 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5290 b := v.Block 5291 _ = b 5292 // match: (Rsh64Ux32 <t> x y) 5293 // cond: 5294 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5295 for { 5296 t := v.Type 5297 x := v.Args[0] 5298 y := v.Args[1] 5299 v.reset(OpS390XAND) 5300 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5301 v0.AddArg(x) 5302 v0.AddArg(y) 5303 v.AddArg(v0) 5304 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5305 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5306 v2.AuxInt = 63 5307 v2.AddArg(y) 5308 v1.AddArg(v2) 5309 v.AddArg(v1) 5310 return true 5311 } 5312 } 5313 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5314 b := v.Block 5315 _ = b 5316 // match: (Rsh64Ux64 <t> x y) 5317 // cond: 5318 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5319 for { 5320 t := v.Type 5321 x := v.Args[0] 5322 y := v.Args[1] 5323 v.reset(OpS390XAND) 5324 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5325 v0.AddArg(x) 5326 v0.AddArg(y) 5327 v.AddArg(v0) 5328 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5329 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5330 v2.AuxInt = 63 5331 v2.AddArg(y) 5332 v1.AddArg(v2) 5333 v.AddArg(v1) 5334 return true 5335 } 5336 } 5337 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5338 b := v.Block 5339 _ = b 5340 // match: (Rsh64Ux8 <t> x y) 5341 // cond: 5342 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5343 for { 5344 t := v.Type 5345 x := v.Args[0] 5346 y := v.Args[1] 5347 v.reset(OpS390XAND) 5348 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5349 v0.AddArg(x) 5350 v0.AddArg(y) 5351 v.AddArg(v0) 5352 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5353 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5354 v2.AuxInt = 63 5355 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5356 v3.AddArg(y) 5357 v2.AddArg(v3) 5358 v1.AddArg(v2) 5359 v.AddArg(v1) 5360 return true 5361 } 5362 } 5363 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5364 b := v.Block 5365 _ = b 5366 // match: (Rsh64x16 <t> x y) 5367 // cond: 5368 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5369 for { 5370 t := v.Type 5371 x := v.Args[0] 5372 y := v.Args[1] 5373 v.reset(OpS390XSRAD) 5374 v.Type = t 5375 v.AddArg(x) 5376 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5377 v0.AddArg(y) 5378 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5379 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5380 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5381 v3.AuxInt = 63 5382 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5383 v4.AddArg(y) 5384 v3.AddArg(v4) 5385 v2.AddArg(v3) 5386 v1.AddArg(v2) 5387 v0.AddArg(v1) 5388 v.AddArg(v0) 5389 return true 5390 } 5391 } 5392 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5393 b := v.Block 5394 _ = b 5395 // match: (Rsh64x32 <t> x y) 5396 // cond: 5397 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5398 for { 5399 t := v.Type 5400 x := v.Args[0] 5401 y := v.Args[1] 5402 v.reset(OpS390XSRAD) 5403 v.Type = t 5404 v.AddArg(x) 5405 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5406 v0.AddArg(y) 5407 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5408 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5409 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5410 v3.AuxInt = 63 5411 v3.AddArg(y) 5412 v2.AddArg(v3) 5413 v1.AddArg(v2) 5414 v0.AddArg(v1) 5415 v.AddArg(v0) 5416 return true 5417 } 5418 } 5419 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5420 b := v.Block 5421 _ = b 5422 // match: (Rsh64x64 <t> x y) 5423 // cond: 5424 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5425 for { 5426 t := v.Type 5427 x := v.Args[0] 5428 y := v.Args[1] 5429 v.reset(OpS390XSRAD) 5430 v.Type = t 5431 v.AddArg(x) 5432 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5433 v0.AddArg(y) 5434 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5435 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5436 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5437 v3.AuxInt = 63 5438 v3.AddArg(y) 5439 v2.AddArg(v3) 5440 v1.AddArg(v2) 5441 v0.AddArg(v1) 5442 v.AddArg(v0) 5443 return true 5444 } 5445 } 5446 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5447 b := v.Block 5448 _ = b 5449 // match: (Rsh64x8 <t> x y) 5450 // cond: 5451 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5452 for { 5453 t := v.Type 5454 x := v.Args[0] 5455 y := v.Args[1] 5456 v.reset(OpS390XSRAD) 5457 v.Type = t 5458 v.AddArg(x) 5459 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5460 v0.AddArg(y) 5461 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5462 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5463 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5464 v3.AuxInt = 63 5465 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5466 v4.AddArg(y) 5467 v3.AddArg(v4) 5468 v2.AddArg(v3) 5469 v1.AddArg(v2) 5470 v0.AddArg(v1) 5471 v.AddArg(v0) 5472 return true 5473 } 5474 } 5475 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5476 b := v.Block 5477 _ = b 5478 // match: (Rsh8Ux16 <t> x y) 5479 // cond: 5480 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5481 for { 5482 t := v.Type 5483 x := v.Args[0] 5484 y := v.Args[1] 5485 v.reset(OpS390XANDW) 5486 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5487 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5488 v1.AddArg(x) 5489 v0.AddArg(v1) 5490 v0.AddArg(y) 5491 v.AddArg(v0) 5492 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5493 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5494 v3.AuxInt = 7 5495 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5496 v4.AddArg(y) 5497 v3.AddArg(v4) 5498 v2.AddArg(v3) 5499 v.AddArg(v2) 5500 return true 5501 } 5502 } 5503 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5504 b := v.Block 5505 _ = b 5506 // match: (Rsh8Ux32 <t> x y) 5507 // cond: 5508 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5509 for { 5510 t := v.Type 5511 x := v.Args[0] 5512 y := v.Args[1] 5513 v.reset(OpS390XANDW) 5514 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5515 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5516 v1.AddArg(x) 5517 v0.AddArg(v1) 5518 v0.AddArg(y) 5519 v.AddArg(v0) 5520 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5521 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5522 v3.AuxInt = 7 5523 v3.AddArg(y) 5524 v2.AddArg(v3) 5525 v.AddArg(v2) 5526 return true 5527 } 5528 } 5529 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5530 b := v.Block 5531 _ = b 5532 // match: (Rsh8Ux64 <t> x y) 5533 // cond: 5534 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5535 for { 5536 t := v.Type 5537 x := v.Args[0] 5538 y := v.Args[1] 5539 v.reset(OpS390XANDW) 5540 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5541 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5542 v1.AddArg(x) 5543 v0.AddArg(v1) 5544 v0.AddArg(y) 5545 v.AddArg(v0) 5546 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5547 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5548 v3.AuxInt = 7 5549 v3.AddArg(y) 5550 v2.AddArg(v3) 5551 v.AddArg(v2) 5552 return true 5553 } 5554 } 5555 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5556 b := v.Block 5557 _ = b 5558 // match: (Rsh8Ux8 <t> x y) 5559 // cond: 5560 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5561 for { 5562 t := v.Type 5563 x := v.Args[0] 5564 y := v.Args[1] 5565 v.reset(OpS390XANDW) 5566 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5567 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5568 v1.AddArg(x) 5569 v0.AddArg(v1) 5570 v0.AddArg(y) 5571 v.AddArg(v0) 5572 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5573 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5574 v3.AuxInt = 7 5575 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5576 v4.AddArg(y) 5577 v3.AddArg(v4) 5578 v2.AddArg(v3) 5579 v.AddArg(v2) 5580 return true 5581 } 5582 } 5583 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5584 b := v.Block 5585 _ = b 5586 // match: (Rsh8x16 <t> x y) 5587 // cond: 5588 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5589 for { 5590 t := v.Type 5591 x := v.Args[0] 5592 y := v.Args[1] 5593 v.reset(OpS390XSRAW) 5594 v.Type = t 5595 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5596 v0.AddArg(x) 5597 v.AddArg(v0) 5598 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5599 v1.AddArg(y) 5600 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5601 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5602 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5603 v4.AuxInt = 7 5604 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5605 v5.AddArg(y) 5606 v4.AddArg(v5) 5607 v3.AddArg(v4) 5608 v2.AddArg(v3) 5609 v1.AddArg(v2) 5610 v.AddArg(v1) 5611 return true 5612 } 5613 } 5614 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5615 b := v.Block 5616 _ = b 5617 // match: (Rsh8x32 <t> x y) 5618 // cond: 5619 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5620 for { 5621 t := v.Type 5622 x := v.Args[0] 5623 y := v.Args[1] 5624 v.reset(OpS390XSRAW) 5625 v.Type = t 5626 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5627 v0.AddArg(x) 5628 v.AddArg(v0) 5629 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5630 v1.AddArg(y) 5631 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5632 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5633 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5634 v4.AuxInt = 7 5635 v4.AddArg(y) 5636 v3.AddArg(v4) 5637 v2.AddArg(v3) 5638 v1.AddArg(v2) 5639 v.AddArg(v1) 5640 return true 5641 } 5642 } 5643 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5644 b := v.Block 5645 _ = b 5646 // match: (Rsh8x64 <t> x y) 5647 // cond: 5648 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5649 for { 5650 t := v.Type 5651 x := v.Args[0] 5652 y := v.Args[1] 5653 v.reset(OpS390XSRAW) 5654 v.Type = t 5655 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5656 v0.AddArg(x) 5657 v.AddArg(v0) 5658 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5659 v1.AddArg(y) 5660 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5661 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5662 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5663 v4.AuxInt = 7 5664 v4.AddArg(y) 5665 v3.AddArg(v4) 5666 v2.AddArg(v3) 5667 v1.AddArg(v2) 5668 v.AddArg(v1) 5669 return true 5670 } 5671 } 5672 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5673 b := v.Block 5674 _ = b 5675 // match: (Rsh8x8 <t> x y) 5676 // cond: 5677 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5678 for { 5679 t := v.Type 5680 x := v.Args[0] 5681 y := v.Args[1] 5682 v.reset(OpS390XSRAW) 5683 v.Type = t 5684 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5685 v0.AddArg(x) 5686 v.AddArg(v0) 5687 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5688 v1.AddArg(y) 5689 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5690 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5691 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5692 v4.AuxInt = 7 5693 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5694 v5.AddArg(y) 5695 v4.AddArg(v5) 5696 v3.AddArg(v4) 5697 v2.AddArg(v3) 5698 v1.AddArg(v2) 5699 v.AddArg(v1) 5700 return true 5701 } 5702 } 5703 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5704 b := v.Block 5705 _ = b 5706 // match: (ADD x (MOVDconst [c])) 5707 // cond: is32Bit(c) 5708 // result: (ADDconst [c] x) 5709 for { 5710 x := v.Args[0] 5711 v_1 := v.Args[1] 5712 if v_1.Op != OpS390XMOVDconst { 5713 break 5714 } 5715 c := v_1.AuxInt 5716 if !(is32Bit(c)) { 5717 break 5718 } 5719 v.reset(OpS390XADDconst) 5720 v.AuxInt = c 5721 v.AddArg(x) 5722 return true 5723 } 5724 // match: (ADD (MOVDconst [c]) x) 5725 // cond: is32Bit(c) 5726 // result: (ADDconst [c] x) 5727 for { 5728 v_0 := v.Args[0] 5729 if v_0.Op != OpS390XMOVDconst { 5730 break 5731 } 5732 c := v_0.AuxInt 5733 x := v.Args[1] 5734 if !(is32Bit(c)) { 5735 break 5736 } 5737 v.reset(OpS390XADDconst) 5738 v.AuxInt = c 5739 v.AddArg(x) 5740 return true 5741 } 5742 // match: (ADD x (MOVDaddr [c] {s} y)) 5743 // cond: x.Op != OpSB && y.Op != OpSB 5744 // result: (MOVDaddridx [c] {s} x y) 5745 for { 5746 x := v.Args[0] 5747 v_1 := v.Args[1] 5748 if v_1.Op != OpS390XMOVDaddr { 5749 break 5750 } 5751 c := v_1.AuxInt 5752 s := v_1.Aux 5753 y := v_1.Args[0] 5754 if !(x.Op != OpSB && y.Op != OpSB) { 5755 break 5756 } 5757 v.reset(OpS390XMOVDaddridx) 5758 v.AuxInt = c 5759 v.Aux = s 5760 v.AddArg(x) 5761 v.AddArg(y) 5762 return true 5763 } 5764 // match: (ADD (MOVDaddr [c] {s} x) y) 5765 // cond: x.Op != OpSB && y.Op != OpSB 5766 // result: (MOVDaddridx [c] {s} x y) 5767 for { 5768 v_0 := v.Args[0] 5769 if v_0.Op != OpS390XMOVDaddr { 5770 break 5771 } 5772 c := v_0.AuxInt 5773 s := v_0.Aux 5774 x := v_0.Args[0] 5775 y := v.Args[1] 5776 if !(x.Op != OpSB && y.Op != OpSB) { 5777 break 5778 } 5779 v.reset(OpS390XMOVDaddridx) 5780 v.AuxInt = c 5781 v.Aux = s 5782 v.AddArg(x) 5783 v.AddArg(y) 5784 return true 5785 } 5786 // match: (ADD x (NEG y)) 5787 // cond: 5788 // result: (SUB x y) 5789 for { 5790 x := v.Args[0] 5791 v_1 := v.Args[1] 5792 if v_1.Op != OpS390XNEG { 5793 break 5794 } 5795 y := v_1.Args[0] 5796 v.reset(OpS390XSUB) 5797 v.AddArg(x) 5798 v.AddArg(y) 5799 return true 5800 } 5801 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5802 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5803 // result: (ADDload <t> [off] {sym} x ptr mem) 5804 for { 5805 t := v.Type 5806 x := v.Args[0] 5807 g := v.Args[1] 5808 if g.Op != OpS390XMOVDload { 5809 break 5810 } 5811 off := g.AuxInt 5812 sym := g.Aux 5813 ptr := g.Args[0] 5814 mem := g.Args[1] 5815 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5816 break 5817 } 5818 v.reset(OpS390XADDload) 5819 v.Type = t 5820 v.AuxInt = off 5821 v.Aux = sym 5822 v.AddArg(x) 5823 v.AddArg(ptr) 5824 v.AddArg(mem) 5825 return true 5826 } 5827 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5828 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5829 // result: (ADDload <t> [off] {sym} x ptr mem) 5830 for { 5831 t := v.Type 5832 g := v.Args[0] 5833 if g.Op != OpS390XMOVDload { 5834 break 5835 } 5836 off := g.AuxInt 5837 sym := g.Aux 5838 ptr := g.Args[0] 5839 mem := g.Args[1] 5840 x := v.Args[1] 5841 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5842 break 5843 } 5844 v.reset(OpS390XADDload) 5845 v.Type = t 5846 v.AuxInt = off 5847 v.Aux = sym 5848 v.AddArg(x) 5849 v.AddArg(ptr) 5850 v.AddArg(mem) 5851 return true 5852 } 5853 return false 5854 } 5855 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5856 b := v.Block 5857 _ = b 5858 // match: (ADDW x (MOVDconst [c])) 5859 // cond: 5860 // result: (ADDWconst [c] x) 5861 for { 5862 x := v.Args[0] 5863 v_1 := v.Args[1] 5864 if v_1.Op != OpS390XMOVDconst { 5865 break 5866 } 5867 c := v_1.AuxInt 5868 v.reset(OpS390XADDWconst) 5869 v.AuxInt = c 5870 v.AddArg(x) 5871 return true 5872 } 5873 // match: (ADDW (MOVDconst [c]) x) 5874 // cond: 5875 // result: (ADDWconst [c] x) 5876 for { 5877 v_0 := v.Args[0] 5878 if v_0.Op != OpS390XMOVDconst { 5879 break 5880 } 5881 c := v_0.AuxInt 5882 x := v.Args[1] 5883 v.reset(OpS390XADDWconst) 5884 v.AuxInt = c 5885 v.AddArg(x) 5886 return true 5887 } 5888 // match: (ADDW x (NEGW y)) 5889 // cond: 5890 // result: (SUBW x y) 5891 for { 5892 x := v.Args[0] 5893 v_1 := v.Args[1] 5894 if v_1.Op != OpS390XNEGW { 5895 break 5896 } 5897 y := v_1.Args[0] 5898 v.reset(OpS390XSUBW) 5899 v.AddArg(x) 5900 v.AddArg(y) 5901 return true 5902 } 5903 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 5904 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5905 // result: (ADDWload <t> [off] {sym} x ptr mem) 5906 for { 5907 t := v.Type 5908 x := v.Args[0] 5909 g := v.Args[1] 5910 if g.Op != OpS390XMOVWload { 5911 break 5912 } 5913 off := g.AuxInt 5914 sym := g.Aux 5915 ptr := g.Args[0] 5916 mem := g.Args[1] 5917 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5918 break 5919 } 5920 v.reset(OpS390XADDWload) 5921 v.Type = t 5922 v.AuxInt = off 5923 v.Aux = sym 5924 v.AddArg(x) 5925 v.AddArg(ptr) 5926 v.AddArg(mem) 5927 return true 5928 } 5929 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 5930 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5931 // result: (ADDWload <t> [off] {sym} x ptr mem) 5932 for { 5933 t := v.Type 5934 g := v.Args[0] 5935 if g.Op != OpS390XMOVWload { 5936 break 5937 } 5938 off := g.AuxInt 5939 sym := g.Aux 5940 ptr := g.Args[0] 5941 mem := g.Args[1] 5942 x := v.Args[1] 5943 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5944 break 5945 } 5946 v.reset(OpS390XADDWload) 5947 v.Type = t 5948 v.AuxInt = off 5949 v.Aux = sym 5950 v.AddArg(x) 5951 v.AddArg(ptr) 5952 v.AddArg(mem) 5953 return true 5954 } 5955 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 5956 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5957 // result: (ADDWload <t> [off] {sym} x ptr mem) 5958 for { 5959 t := v.Type 5960 x := v.Args[0] 5961 g := v.Args[1] 5962 if g.Op != OpS390XMOVWZload { 5963 break 5964 } 5965 off := g.AuxInt 5966 sym := g.Aux 5967 ptr := g.Args[0] 5968 mem := g.Args[1] 5969 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5970 break 5971 } 5972 v.reset(OpS390XADDWload) 5973 v.Type = t 5974 v.AuxInt = off 5975 v.Aux = sym 5976 v.AddArg(x) 5977 v.AddArg(ptr) 5978 v.AddArg(mem) 5979 return true 5980 } 5981 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 5982 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5983 // result: (ADDWload <t> [off] {sym} x ptr mem) 5984 for { 5985 t := v.Type 5986 g := v.Args[0] 5987 if g.Op != OpS390XMOVWZload { 5988 break 5989 } 5990 off := g.AuxInt 5991 sym := g.Aux 5992 ptr := g.Args[0] 5993 mem := g.Args[1] 5994 x := v.Args[1] 5995 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5996 break 5997 } 5998 v.reset(OpS390XADDWload) 5999 v.Type = t 6000 v.AuxInt = off 6001 v.Aux = sym 6002 v.AddArg(x) 6003 v.AddArg(ptr) 6004 v.AddArg(mem) 6005 return true 6006 } 6007 return false 6008 } 6009 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6010 b := v.Block 6011 _ = b 6012 // match: (ADDWconst [c] x) 6013 // cond: int32(c)==0 6014 // result: x 6015 for { 6016 c := v.AuxInt 6017 x := v.Args[0] 6018 if !(int32(c) == 0) { 6019 break 6020 } 6021 v.reset(OpCopy) 6022 v.Type = x.Type 6023 v.AddArg(x) 6024 return true 6025 } 6026 // match: (ADDWconst [c] (MOVDconst [d])) 6027 // cond: 6028 // result: (MOVDconst [int64(int32(c+d))]) 6029 for { 6030 c := v.AuxInt 6031 v_0 := v.Args[0] 6032 if v_0.Op != OpS390XMOVDconst { 6033 break 6034 } 6035 d := v_0.AuxInt 6036 v.reset(OpS390XMOVDconst) 6037 v.AuxInt = int64(int32(c + d)) 6038 return true 6039 } 6040 // match: (ADDWconst [c] (ADDWconst [d] x)) 6041 // cond: 6042 // result: (ADDWconst [int64(int32(c+d))] x) 6043 for { 6044 c := v.AuxInt 6045 v_0 := v.Args[0] 6046 if v_0.Op != OpS390XADDWconst { 6047 break 6048 } 6049 d := v_0.AuxInt 6050 x := v_0.Args[0] 6051 v.reset(OpS390XADDWconst) 6052 v.AuxInt = int64(int32(c + d)) 6053 v.AddArg(x) 6054 return true 6055 } 6056 return false 6057 } 6058 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6059 b := v.Block 6060 _ = b 6061 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6062 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6063 // result: (MOVDaddr [c+d] {s} x) 6064 for { 6065 c := v.AuxInt 6066 v_0 := v.Args[0] 6067 if v_0.Op != OpS390XMOVDaddr { 6068 break 6069 } 6070 d := v_0.AuxInt 6071 s := v_0.Aux 6072 x := v_0.Args[0] 6073 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6074 break 6075 } 6076 v.reset(OpS390XMOVDaddr) 6077 v.AuxInt = c + d 6078 v.Aux = s 6079 v.AddArg(x) 6080 return true 6081 } 6082 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6083 // cond: x.Op != OpSB && is32Bit(c+d) 6084 // result: (MOVDaddr [c+d] {s} x) 6085 for { 6086 c := v.AuxInt 6087 v_0 := v.Args[0] 6088 if v_0.Op != OpS390XMOVDaddr { 6089 break 6090 } 6091 d := v_0.AuxInt 6092 s := v_0.Aux 6093 x := v_0.Args[0] 6094 if !(x.Op != OpSB && is32Bit(c+d)) { 6095 break 6096 } 6097 v.reset(OpS390XMOVDaddr) 6098 v.AuxInt = c + d 6099 v.Aux = s 6100 v.AddArg(x) 6101 return true 6102 } 6103 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6104 // cond: is32Bit(c+d) 6105 // result: (MOVDaddridx [c+d] {s} x y) 6106 for { 6107 c := v.AuxInt 6108 v_0 := v.Args[0] 6109 if v_0.Op != OpS390XMOVDaddridx { 6110 break 6111 } 6112 d := v_0.AuxInt 6113 s := v_0.Aux 6114 x := v_0.Args[0] 6115 y := v_0.Args[1] 6116 if !(is32Bit(c + d)) { 6117 break 6118 } 6119 v.reset(OpS390XMOVDaddridx) 6120 v.AuxInt = c + d 6121 v.Aux = s 6122 v.AddArg(x) 6123 v.AddArg(y) 6124 return true 6125 } 6126 // match: (ADDconst [0] x) 6127 // cond: 6128 // result: x 6129 for { 6130 if v.AuxInt != 0 { 6131 break 6132 } 6133 x := v.Args[0] 6134 v.reset(OpCopy) 6135 v.Type = x.Type 6136 v.AddArg(x) 6137 return true 6138 } 6139 // match: (ADDconst [c] (MOVDconst [d])) 6140 // cond: 6141 // result: (MOVDconst [c+d]) 6142 for { 6143 c := v.AuxInt 6144 v_0 := v.Args[0] 6145 if v_0.Op != OpS390XMOVDconst { 6146 break 6147 } 6148 d := v_0.AuxInt 6149 v.reset(OpS390XMOVDconst) 6150 v.AuxInt = c + d 6151 return true 6152 } 6153 // match: (ADDconst [c] (ADDconst [d] x)) 6154 // cond: is32Bit(c+d) 6155 // result: (ADDconst [c+d] x) 6156 for { 6157 c := v.AuxInt 6158 v_0 := v.Args[0] 6159 if v_0.Op != OpS390XADDconst { 6160 break 6161 } 6162 d := v_0.AuxInt 6163 x := v_0.Args[0] 6164 if !(is32Bit(c + d)) { 6165 break 6166 } 6167 v.reset(OpS390XADDconst) 6168 v.AuxInt = c + d 6169 v.AddArg(x) 6170 return true 6171 } 6172 return false 6173 } 6174 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6175 b := v.Block 6176 _ = b 6177 // match: (AND x (MOVDconst [c])) 6178 // cond: is32Bit(c) && c < 0 6179 // result: (ANDconst [c] x) 6180 for { 6181 x := v.Args[0] 6182 v_1 := v.Args[1] 6183 if v_1.Op != OpS390XMOVDconst { 6184 break 6185 } 6186 c := v_1.AuxInt 6187 if !(is32Bit(c) && c < 0) { 6188 break 6189 } 6190 v.reset(OpS390XANDconst) 6191 v.AuxInt = c 6192 v.AddArg(x) 6193 return true 6194 } 6195 // match: (AND (MOVDconst [c]) x) 6196 // cond: is32Bit(c) && c < 0 6197 // result: (ANDconst [c] x) 6198 for { 6199 v_0 := v.Args[0] 6200 if v_0.Op != OpS390XMOVDconst { 6201 break 6202 } 6203 c := v_0.AuxInt 6204 x := v.Args[1] 6205 if !(is32Bit(c) && c < 0) { 6206 break 6207 } 6208 v.reset(OpS390XANDconst) 6209 v.AuxInt = c 6210 v.AddArg(x) 6211 return true 6212 } 6213 // match: (AND (MOVDconst [0xFF]) x) 6214 // cond: 6215 // result: (MOVBZreg x) 6216 for { 6217 v_0 := v.Args[0] 6218 if v_0.Op != OpS390XMOVDconst { 6219 break 6220 } 6221 if v_0.AuxInt != 0xFF { 6222 break 6223 } 6224 x := v.Args[1] 6225 v.reset(OpS390XMOVBZreg) 6226 v.AddArg(x) 6227 return true 6228 } 6229 // match: (AND x (MOVDconst [0xFF])) 6230 // cond: 6231 // result: (MOVBZreg x) 6232 for { 6233 x := v.Args[0] 6234 v_1 := v.Args[1] 6235 if v_1.Op != OpS390XMOVDconst { 6236 break 6237 } 6238 if v_1.AuxInt != 0xFF { 6239 break 6240 } 6241 v.reset(OpS390XMOVBZreg) 6242 v.AddArg(x) 6243 return true 6244 } 6245 // match: (AND (MOVDconst [0xFFFF]) x) 6246 // cond: 6247 // result: (MOVHZreg x) 6248 for { 6249 v_0 := v.Args[0] 6250 if v_0.Op != OpS390XMOVDconst { 6251 break 6252 } 6253 if v_0.AuxInt != 0xFFFF { 6254 break 6255 } 6256 x := v.Args[1] 6257 v.reset(OpS390XMOVHZreg) 6258 v.AddArg(x) 6259 return true 6260 } 6261 // match: (AND x (MOVDconst [0xFFFF])) 6262 // cond: 6263 // result: (MOVHZreg x) 6264 for { 6265 x := v.Args[0] 6266 v_1 := v.Args[1] 6267 if v_1.Op != OpS390XMOVDconst { 6268 break 6269 } 6270 if v_1.AuxInt != 0xFFFF { 6271 break 6272 } 6273 v.reset(OpS390XMOVHZreg) 6274 v.AddArg(x) 6275 return true 6276 } 6277 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6278 // cond: 6279 // result: (MOVWZreg x) 6280 for { 6281 v_0 := v.Args[0] 6282 if v_0.Op != OpS390XMOVDconst { 6283 break 6284 } 6285 if v_0.AuxInt != 0xFFFFFFFF { 6286 break 6287 } 6288 x := v.Args[1] 6289 v.reset(OpS390XMOVWZreg) 6290 v.AddArg(x) 6291 return true 6292 } 6293 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6294 // cond: 6295 // result: (MOVWZreg x) 6296 for { 6297 x := v.Args[0] 6298 v_1 := v.Args[1] 6299 if v_1.Op != OpS390XMOVDconst { 6300 break 6301 } 6302 if v_1.AuxInt != 0xFFFFFFFF { 6303 break 6304 } 6305 v.reset(OpS390XMOVWZreg) 6306 v.AddArg(x) 6307 return true 6308 } 6309 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6310 // cond: 6311 // result: (MOVDconst [c&d]) 6312 for { 6313 v_0 := v.Args[0] 6314 if v_0.Op != OpS390XMOVDconst { 6315 break 6316 } 6317 c := v_0.AuxInt 6318 v_1 := v.Args[1] 6319 if v_1.Op != OpS390XMOVDconst { 6320 break 6321 } 6322 d := v_1.AuxInt 6323 v.reset(OpS390XMOVDconst) 6324 v.AuxInt = c & d 6325 return true 6326 } 6327 // match: (AND x x) 6328 // cond: 6329 // result: x 6330 for { 6331 x := v.Args[0] 6332 if x != v.Args[1] { 6333 break 6334 } 6335 v.reset(OpCopy) 6336 v.Type = x.Type 6337 v.AddArg(x) 6338 return true 6339 } 6340 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6341 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6342 // result: (ANDload <t> [off] {sym} x ptr mem) 6343 for { 6344 t := v.Type 6345 x := v.Args[0] 6346 g := v.Args[1] 6347 if g.Op != OpS390XMOVDload { 6348 break 6349 } 6350 off := g.AuxInt 6351 sym := g.Aux 6352 ptr := g.Args[0] 6353 mem := g.Args[1] 6354 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6355 break 6356 } 6357 v.reset(OpS390XANDload) 6358 v.Type = t 6359 v.AuxInt = off 6360 v.Aux = sym 6361 v.AddArg(x) 6362 v.AddArg(ptr) 6363 v.AddArg(mem) 6364 return true 6365 } 6366 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6367 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6368 // result: (ANDload <t> [off] {sym} x ptr mem) 6369 for { 6370 t := v.Type 6371 g := v.Args[0] 6372 if g.Op != OpS390XMOVDload { 6373 break 6374 } 6375 off := g.AuxInt 6376 sym := g.Aux 6377 ptr := g.Args[0] 6378 mem := g.Args[1] 6379 x := v.Args[1] 6380 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6381 break 6382 } 6383 v.reset(OpS390XANDload) 6384 v.Type = t 6385 v.AuxInt = off 6386 v.Aux = sym 6387 v.AddArg(x) 6388 v.AddArg(ptr) 6389 v.AddArg(mem) 6390 return true 6391 } 6392 return false 6393 } 6394 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6395 b := v.Block 6396 _ = b 6397 // match: (ANDW x (MOVDconst [c])) 6398 // cond: 6399 // result: (ANDWconst [c] x) 6400 for { 6401 x := v.Args[0] 6402 v_1 := v.Args[1] 6403 if v_1.Op != OpS390XMOVDconst { 6404 break 6405 } 6406 c := v_1.AuxInt 6407 v.reset(OpS390XANDWconst) 6408 v.AuxInt = c 6409 v.AddArg(x) 6410 return true 6411 } 6412 // match: (ANDW (MOVDconst [c]) x) 6413 // cond: 6414 // result: (ANDWconst [c] x) 6415 for { 6416 v_0 := v.Args[0] 6417 if v_0.Op != OpS390XMOVDconst { 6418 break 6419 } 6420 c := v_0.AuxInt 6421 x := v.Args[1] 6422 v.reset(OpS390XANDWconst) 6423 v.AuxInt = c 6424 v.AddArg(x) 6425 return true 6426 } 6427 // match: (ANDW x x) 6428 // cond: 6429 // result: x 6430 for { 6431 x := v.Args[0] 6432 if x != v.Args[1] { 6433 break 6434 } 6435 v.reset(OpCopy) 6436 v.Type = x.Type 6437 v.AddArg(x) 6438 return true 6439 } 6440 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6441 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6442 // result: (ANDWload <t> [off] {sym} x ptr mem) 6443 for { 6444 t := v.Type 6445 x := v.Args[0] 6446 g := v.Args[1] 6447 if g.Op != OpS390XMOVWload { 6448 break 6449 } 6450 off := g.AuxInt 6451 sym := g.Aux 6452 ptr := g.Args[0] 6453 mem := g.Args[1] 6454 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6455 break 6456 } 6457 v.reset(OpS390XANDWload) 6458 v.Type = t 6459 v.AuxInt = off 6460 v.Aux = sym 6461 v.AddArg(x) 6462 v.AddArg(ptr) 6463 v.AddArg(mem) 6464 return true 6465 } 6466 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6467 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6468 // result: (ANDWload <t> [off] {sym} x ptr mem) 6469 for { 6470 t := v.Type 6471 g := v.Args[0] 6472 if g.Op != OpS390XMOVWload { 6473 break 6474 } 6475 off := g.AuxInt 6476 sym := g.Aux 6477 ptr := g.Args[0] 6478 mem := g.Args[1] 6479 x := v.Args[1] 6480 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6481 break 6482 } 6483 v.reset(OpS390XANDWload) 6484 v.Type = t 6485 v.AuxInt = off 6486 v.Aux = sym 6487 v.AddArg(x) 6488 v.AddArg(ptr) 6489 v.AddArg(mem) 6490 return true 6491 } 6492 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6493 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6494 // result: (ANDWload <t> [off] {sym} x ptr mem) 6495 for { 6496 t := v.Type 6497 x := v.Args[0] 6498 g := v.Args[1] 6499 if g.Op != OpS390XMOVWZload { 6500 break 6501 } 6502 off := g.AuxInt 6503 sym := g.Aux 6504 ptr := g.Args[0] 6505 mem := g.Args[1] 6506 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6507 break 6508 } 6509 v.reset(OpS390XANDWload) 6510 v.Type = t 6511 v.AuxInt = off 6512 v.Aux = sym 6513 v.AddArg(x) 6514 v.AddArg(ptr) 6515 v.AddArg(mem) 6516 return true 6517 } 6518 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6519 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6520 // result: (ANDWload <t> [off] {sym} x ptr mem) 6521 for { 6522 t := v.Type 6523 g := v.Args[0] 6524 if g.Op != OpS390XMOVWZload { 6525 break 6526 } 6527 off := g.AuxInt 6528 sym := g.Aux 6529 ptr := g.Args[0] 6530 mem := g.Args[1] 6531 x := v.Args[1] 6532 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6533 break 6534 } 6535 v.reset(OpS390XANDWload) 6536 v.Type = t 6537 v.AuxInt = off 6538 v.Aux = sym 6539 v.AddArg(x) 6540 v.AddArg(ptr) 6541 v.AddArg(mem) 6542 return true 6543 } 6544 return false 6545 } 6546 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6547 b := v.Block 6548 _ = b 6549 // match: (ANDWconst [c] (ANDWconst [d] x)) 6550 // cond: 6551 // result: (ANDWconst [c & d] x) 6552 for { 6553 c := v.AuxInt 6554 v_0 := v.Args[0] 6555 if v_0.Op != OpS390XANDWconst { 6556 break 6557 } 6558 d := v_0.AuxInt 6559 x := v_0.Args[0] 6560 v.reset(OpS390XANDWconst) 6561 v.AuxInt = c & d 6562 v.AddArg(x) 6563 return true 6564 } 6565 // match: (ANDWconst [0xFF] x) 6566 // cond: 6567 // result: (MOVBZreg x) 6568 for { 6569 if v.AuxInt != 0xFF { 6570 break 6571 } 6572 x := v.Args[0] 6573 v.reset(OpS390XMOVBZreg) 6574 v.AddArg(x) 6575 return true 6576 } 6577 // match: (ANDWconst [0xFFFF] x) 6578 // cond: 6579 // result: (MOVHZreg x) 6580 for { 6581 if v.AuxInt != 0xFFFF { 6582 break 6583 } 6584 x := v.Args[0] 6585 v.reset(OpS390XMOVHZreg) 6586 v.AddArg(x) 6587 return true 6588 } 6589 // match: (ANDWconst [c] _) 6590 // cond: int32(c)==0 6591 // result: (MOVDconst [0]) 6592 for { 6593 c := v.AuxInt 6594 if !(int32(c) == 0) { 6595 break 6596 } 6597 v.reset(OpS390XMOVDconst) 6598 v.AuxInt = 0 6599 return true 6600 } 6601 // match: (ANDWconst [c] x) 6602 // cond: int32(c)==-1 6603 // result: x 6604 for { 6605 c := v.AuxInt 6606 x := v.Args[0] 6607 if !(int32(c) == -1) { 6608 break 6609 } 6610 v.reset(OpCopy) 6611 v.Type = x.Type 6612 v.AddArg(x) 6613 return true 6614 } 6615 // match: (ANDWconst [c] (MOVDconst [d])) 6616 // cond: 6617 // result: (MOVDconst [c&d]) 6618 for { 6619 c := v.AuxInt 6620 v_0 := v.Args[0] 6621 if v_0.Op != OpS390XMOVDconst { 6622 break 6623 } 6624 d := v_0.AuxInt 6625 v.reset(OpS390XMOVDconst) 6626 v.AuxInt = c & d 6627 return true 6628 } 6629 return false 6630 } 6631 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6632 b := v.Block 6633 _ = b 6634 // match: (ANDconst [c] (ANDconst [d] x)) 6635 // cond: 6636 // result: (ANDconst [c & d] x) 6637 for { 6638 c := v.AuxInt 6639 v_0 := v.Args[0] 6640 if v_0.Op != OpS390XANDconst { 6641 break 6642 } 6643 d := v_0.AuxInt 6644 x := v_0.Args[0] 6645 v.reset(OpS390XANDconst) 6646 v.AuxInt = c & d 6647 v.AddArg(x) 6648 return true 6649 } 6650 // match: (ANDconst [0] _) 6651 // cond: 6652 // result: (MOVDconst [0]) 6653 for { 6654 if v.AuxInt != 0 { 6655 break 6656 } 6657 v.reset(OpS390XMOVDconst) 6658 v.AuxInt = 0 6659 return true 6660 } 6661 // match: (ANDconst [-1] x) 6662 // cond: 6663 // result: x 6664 for { 6665 if v.AuxInt != -1 { 6666 break 6667 } 6668 x := v.Args[0] 6669 v.reset(OpCopy) 6670 v.Type = x.Type 6671 v.AddArg(x) 6672 return true 6673 } 6674 // match: (ANDconst [c] (MOVDconst [d])) 6675 // cond: 6676 // result: (MOVDconst [c&d]) 6677 for { 6678 c := v.AuxInt 6679 v_0 := v.Args[0] 6680 if v_0.Op != OpS390XMOVDconst { 6681 break 6682 } 6683 d := v_0.AuxInt 6684 v.reset(OpS390XMOVDconst) 6685 v.AuxInt = c & d 6686 return true 6687 } 6688 return false 6689 } 6690 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6691 b := v.Block 6692 _ = b 6693 // match: (CMP x (MOVDconst [c])) 6694 // cond: is32Bit(c) 6695 // result: (CMPconst x [c]) 6696 for { 6697 x := v.Args[0] 6698 v_1 := v.Args[1] 6699 if v_1.Op != OpS390XMOVDconst { 6700 break 6701 } 6702 c := v_1.AuxInt 6703 if !(is32Bit(c)) { 6704 break 6705 } 6706 v.reset(OpS390XCMPconst) 6707 v.AuxInt = c 6708 v.AddArg(x) 6709 return true 6710 } 6711 // match: (CMP (MOVDconst [c]) x) 6712 // cond: is32Bit(c) 6713 // result: (InvertFlags (CMPconst x [c])) 6714 for { 6715 v_0 := v.Args[0] 6716 if v_0.Op != OpS390XMOVDconst { 6717 break 6718 } 6719 c := v_0.AuxInt 6720 x := v.Args[1] 6721 if !(is32Bit(c)) { 6722 break 6723 } 6724 v.reset(OpS390XInvertFlags) 6725 v0 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 6726 v0.AuxInt = c 6727 v0.AddArg(x) 6728 v.AddArg(v0) 6729 return true 6730 } 6731 return false 6732 } 6733 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6734 b := v.Block 6735 _ = b 6736 // match: (CMPU x (MOVDconst [c])) 6737 // cond: is32Bit(c) 6738 // result: (CMPUconst x [int64(uint32(c))]) 6739 for { 6740 x := v.Args[0] 6741 v_1 := v.Args[1] 6742 if v_1.Op != OpS390XMOVDconst { 6743 break 6744 } 6745 c := v_1.AuxInt 6746 if !(is32Bit(c)) { 6747 break 6748 } 6749 v.reset(OpS390XCMPUconst) 6750 v.AuxInt = int64(uint32(c)) 6751 v.AddArg(x) 6752 return true 6753 } 6754 // match: (CMPU (MOVDconst [c]) x) 6755 // cond: is32Bit(c) 6756 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6757 for { 6758 v_0 := v.Args[0] 6759 if v_0.Op != OpS390XMOVDconst { 6760 break 6761 } 6762 c := v_0.AuxInt 6763 x := v.Args[1] 6764 if !(is32Bit(c)) { 6765 break 6766 } 6767 v.reset(OpS390XInvertFlags) 6768 v0 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 6769 v0.AuxInt = int64(uint32(c)) 6770 v0.AddArg(x) 6771 v.AddArg(v0) 6772 return true 6773 } 6774 return false 6775 } 6776 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6777 b := v.Block 6778 _ = b 6779 // match: (CMPUconst (MOVDconst [x]) [y]) 6780 // cond: uint64(x)==uint64(y) 6781 // result: (FlagEQ) 6782 for { 6783 y := v.AuxInt 6784 v_0 := v.Args[0] 6785 if v_0.Op != OpS390XMOVDconst { 6786 break 6787 } 6788 x := v_0.AuxInt 6789 if !(uint64(x) == uint64(y)) { 6790 break 6791 } 6792 v.reset(OpS390XFlagEQ) 6793 return true 6794 } 6795 // match: (CMPUconst (MOVDconst [x]) [y]) 6796 // cond: uint64(x)<uint64(y) 6797 // result: (FlagLT) 6798 for { 6799 y := v.AuxInt 6800 v_0 := v.Args[0] 6801 if v_0.Op != OpS390XMOVDconst { 6802 break 6803 } 6804 x := v_0.AuxInt 6805 if !(uint64(x) < uint64(y)) { 6806 break 6807 } 6808 v.reset(OpS390XFlagLT) 6809 return true 6810 } 6811 // match: (CMPUconst (MOVDconst [x]) [y]) 6812 // cond: uint64(x)>uint64(y) 6813 // result: (FlagGT) 6814 for { 6815 y := v.AuxInt 6816 v_0 := v.Args[0] 6817 if v_0.Op != OpS390XMOVDconst { 6818 break 6819 } 6820 x := v_0.AuxInt 6821 if !(uint64(x) > uint64(y)) { 6822 break 6823 } 6824 v.reset(OpS390XFlagGT) 6825 return true 6826 } 6827 return false 6828 } 6829 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6830 b := v.Block 6831 _ = b 6832 // match: (CMPW x (MOVDconst [c])) 6833 // cond: 6834 // result: (CMPWconst x [c]) 6835 for { 6836 x := v.Args[0] 6837 v_1 := v.Args[1] 6838 if v_1.Op != OpS390XMOVDconst { 6839 break 6840 } 6841 c := v_1.AuxInt 6842 v.reset(OpS390XCMPWconst) 6843 v.AuxInt = c 6844 v.AddArg(x) 6845 return true 6846 } 6847 // match: (CMPW (MOVDconst [c]) x) 6848 // cond: 6849 // result: (InvertFlags (CMPWconst x [c])) 6850 for { 6851 v_0 := v.Args[0] 6852 if v_0.Op != OpS390XMOVDconst { 6853 break 6854 } 6855 c := v_0.AuxInt 6856 x := v.Args[1] 6857 v.reset(OpS390XInvertFlags) 6858 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 6859 v0.AuxInt = c 6860 v0.AddArg(x) 6861 v.AddArg(v0) 6862 return true 6863 } 6864 return false 6865 } 6866 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6867 b := v.Block 6868 _ = b 6869 // match: (CMPWU x (MOVDconst [c])) 6870 // cond: 6871 // result: (CMPWUconst x [int64(uint32(c))]) 6872 for { 6873 x := v.Args[0] 6874 v_1 := v.Args[1] 6875 if v_1.Op != OpS390XMOVDconst { 6876 break 6877 } 6878 c := v_1.AuxInt 6879 v.reset(OpS390XCMPWUconst) 6880 v.AuxInt = int64(uint32(c)) 6881 v.AddArg(x) 6882 return true 6883 } 6884 // match: (CMPWU (MOVDconst [c]) x) 6885 // cond: 6886 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6887 for { 6888 v_0 := v.Args[0] 6889 if v_0.Op != OpS390XMOVDconst { 6890 break 6891 } 6892 c := v_0.AuxInt 6893 x := v.Args[1] 6894 v.reset(OpS390XInvertFlags) 6895 v0 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 6896 v0.AuxInt = int64(uint32(c)) 6897 v0.AddArg(x) 6898 v.AddArg(v0) 6899 return true 6900 } 6901 return false 6902 } 6903 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 6904 b := v.Block 6905 _ = b 6906 // match: (CMPWUconst (MOVDconst [x]) [y]) 6907 // cond: uint32(x)==uint32(y) 6908 // result: (FlagEQ) 6909 for { 6910 y := v.AuxInt 6911 v_0 := v.Args[0] 6912 if v_0.Op != OpS390XMOVDconst { 6913 break 6914 } 6915 x := v_0.AuxInt 6916 if !(uint32(x) == uint32(y)) { 6917 break 6918 } 6919 v.reset(OpS390XFlagEQ) 6920 return true 6921 } 6922 // match: (CMPWUconst (MOVDconst [x]) [y]) 6923 // cond: uint32(x)<uint32(y) 6924 // result: (FlagLT) 6925 for { 6926 y := v.AuxInt 6927 v_0 := v.Args[0] 6928 if v_0.Op != OpS390XMOVDconst { 6929 break 6930 } 6931 x := v_0.AuxInt 6932 if !(uint32(x) < uint32(y)) { 6933 break 6934 } 6935 v.reset(OpS390XFlagLT) 6936 return true 6937 } 6938 // match: (CMPWUconst (MOVDconst [x]) [y]) 6939 // cond: uint32(x)>uint32(y) 6940 // result: (FlagGT) 6941 for { 6942 y := v.AuxInt 6943 v_0 := v.Args[0] 6944 if v_0.Op != OpS390XMOVDconst { 6945 break 6946 } 6947 x := v_0.AuxInt 6948 if !(uint32(x) > uint32(y)) { 6949 break 6950 } 6951 v.reset(OpS390XFlagGT) 6952 return true 6953 } 6954 return false 6955 } 6956 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 6957 b := v.Block 6958 _ = b 6959 // match: (CMPWconst (MOVDconst [x]) [y]) 6960 // cond: int32(x)==int32(y) 6961 // result: (FlagEQ) 6962 for { 6963 y := v.AuxInt 6964 v_0 := v.Args[0] 6965 if v_0.Op != OpS390XMOVDconst { 6966 break 6967 } 6968 x := v_0.AuxInt 6969 if !(int32(x) == int32(y)) { 6970 break 6971 } 6972 v.reset(OpS390XFlagEQ) 6973 return true 6974 } 6975 // match: (CMPWconst (MOVDconst [x]) [y]) 6976 // cond: int32(x)<int32(y) 6977 // result: (FlagLT) 6978 for { 6979 y := v.AuxInt 6980 v_0 := v.Args[0] 6981 if v_0.Op != OpS390XMOVDconst { 6982 break 6983 } 6984 x := v_0.AuxInt 6985 if !(int32(x) < int32(y)) { 6986 break 6987 } 6988 v.reset(OpS390XFlagLT) 6989 return true 6990 } 6991 // match: (CMPWconst (MOVDconst [x]) [y]) 6992 // cond: int32(x)>int32(y) 6993 // result: (FlagGT) 6994 for { 6995 y := v.AuxInt 6996 v_0 := v.Args[0] 6997 if v_0.Op != OpS390XMOVDconst { 6998 break 6999 } 7000 x := v_0.AuxInt 7001 if !(int32(x) > int32(y)) { 7002 break 7003 } 7004 v.reset(OpS390XFlagGT) 7005 return true 7006 } 7007 // match: (CMPWconst (SRWconst _ [c]) [n]) 7008 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7009 // result: (FlagLT) 7010 for { 7011 n := v.AuxInt 7012 v_0 := v.Args[0] 7013 if v_0.Op != OpS390XSRWconst { 7014 break 7015 } 7016 c := v_0.AuxInt 7017 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7018 break 7019 } 7020 v.reset(OpS390XFlagLT) 7021 return true 7022 } 7023 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7024 // cond: 0 <= int32(m) && int32(m) < int32(n) 7025 // result: (FlagLT) 7026 for { 7027 n := v.AuxInt 7028 v_0 := v.Args[0] 7029 if v_0.Op != OpS390XANDWconst { 7030 break 7031 } 7032 m := v_0.AuxInt 7033 if !(0 <= int32(m) && int32(m) < int32(n)) { 7034 break 7035 } 7036 v.reset(OpS390XFlagLT) 7037 return true 7038 } 7039 return false 7040 } 7041 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7042 b := v.Block 7043 _ = b 7044 // match: (CMPconst (MOVDconst [x]) [y]) 7045 // cond: x==y 7046 // result: (FlagEQ) 7047 for { 7048 y := v.AuxInt 7049 v_0 := v.Args[0] 7050 if v_0.Op != OpS390XMOVDconst { 7051 break 7052 } 7053 x := v_0.AuxInt 7054 if !(x == y) { 7055 break 7056 } 7057 v.reset(OpS390XFlagEQ) 7058 return true 7059 } 7060 // match: (CMPconst (MOVDconst [x]) [y]) 7061 // cond: x<y 7062 // result: (FlagLT) 7063 for { 7064 y := v.AuxInt 7065 v_0 := v.Args[0] 7066 if v_0.Op != OpS390XMOVDconst { 7067 break 7068 } 7069 x := v_0.AuxInt 7070 if !(x < y) { 7071 break 7072 } 7073 v.reset(OpS390XFlagLT) 7074 return true 7075 } 7076 // match: (CMPconst (MOVDconst [x]) [y]) 7077 // cond: x>y 7078 // result: (FlagGT) 7079 for { 7080 y := v.AuxInt 7081 v_0 := v.Args[0] 7082 if v_0.Op != OpS390XMOVDconst { 7083 break 7084 } 7085 x := v_0.AuxInt 7086 if !(x > y) { 7087 break 7088 } 7089 v.reset(OpS390XFlagGT) 7090 return true 7091 } 7092 // match: (CMPconst (MOVBZreg _) [c]) 7093 // cond: 0xFF < c 7094 // result: (FlagLT) 7095 for { 7096 c := v.AuxInt 7097 v_0 := v.Args[0] 7098 if v_0.Op != OpS390XMOVBZreg { 7099 break 7100 } 7101 if !(0xFF < c) { 7102 break 7103 } 7104 v.reset(OpS390XFlagLT) 7105 return true 7106 } 7107 // match: (CMPconst (MOVHZreg _) [c]) 7108 // cond: 0xFFFF < c 7109 // result: (FlagLT) 7110 for { 7111 c := v.AuxInt 7112 v_0 := v.Args[0] 7113 if v_0.Op != OpS390XMOVHZreg { 7114 break 7115 } 7116 if !(0xFFFF < c) { 7117 break 7118 } 7119 v.reset(OpS390XFlagLT) 7120 return true 7121 } 7122 // match: (CMPconst (MOVWZreg _) [c]) 7123 // cond: 0xFFFFFFFF < c 7124 // result: (FlagLT) 7125 for { 7126 c := v.AuxInt 7127 v_0 := v.Args[0] 7128 if v_0.Op != OpS390XMOVWZreg { 7129 break 7130 } 7131 if !(0xFFFFFFFF < c) { 7132 break 7133 } 7134 v.reset(OpS390XFlagLT) 7135 return true 7136 } 7137 // match: (CMPconst (SRDconst _ [c]) [n]) 7138 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7139 // result: (FlagLT) 7140 for { 7141 n := v.AuxInt 7142 v_0 := v.Args[0] 7143 if v_0.Op != OpS390XSRDconst { 7144 break 7145 } 7146 c := v_0.AuxInt 7147 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7148 break 7149 } 7150 v.reset(OpS390XFlagLT) 7151 return true 7152 } 7153 // match: (CMPconst (ANDconst _ [m]) [n]) 7154 // cond: 0 <= m && m < n 7155 // result: (FlagLT) 7156 for { 7157 n := v.AuxInt 7158 v_0 := v.Args[0] 7159 if v_0.Op != OpS390XANDconst { 7160 break 7161 } 7162 m := v_0.AuxInt 7163 if !(0 <= m && m < n) { 7164 break 7165 } 7166 v.reset(OpS390XFlagLT) 7167 return true 7168 } 7169 return false 7170 } 7171 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7172 b := v.Block 7173 _ = b 7174 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7175 // cond: is32Bit(off1+off2) 7176 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7177 for { 7178 off1 := v.AuxInt 7179 sym := v.Aux 7180 v_0 := v.Args[0] 7181 if v_0.Op != OpS390XADDconst { 7182 break 7183 } 7184 off2 := v_0.AuxInt 7185 ptr := v_0.Args[0] 7186 mem := v.Args[1] 7187 if !(is32Bit(off1 + off2)) { 7188 break 7189 } 7190 v.reset(OpS390XFMOVDload) 7191 v.AuxInt = off1 + off2 7192 v.Aux = sym 7193 v.AddArg(ptr) 7194 v.AddArg(mem) 7195 return true 7196 } 7197 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7198 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7199 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7200 for { 7201 off1 := v.AuxInt 7202 sym1 := v.Aux 7203 v_0 := v.Args[0] 7204 if v_0.Op != OpS390XMOVDaddr { 7205 break 7206 } 7207 off2 := v_0.AuxInt 7208 sym2 := v_0.Aux 7209 base := v_0.Args[0] 7210 mem := v.Args[1] 7211 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7212 break 7213 } 7214 v.reset(OpS390XFMOVDload) 7215 v.AuxInt = off1 + off2 7216 v.Aux = mergeSym(sym1, sym2) 7217 v.AddArg(base) 7218 v.AddArg(mem) 7219 return true 7220 } 7221 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7222 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7223 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7224 for { 7225 off1 := v.AuxInt 7226 sym1 := v.Aux 7227 v_0 := v.Args[0] 7228 if v_0.Op != OpS390XMOVDaddridx { 7229 break 7230 } 7231 off2 := v_0.AuxInt 7232 sym2 := v_0.Aux 7233 ptr := v_0.Args[0] 7234 idx := v_0.Args[1] 7235 mem := v.Args[1] 7236 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7237 break 7238 } 7239 v.reset(OpS390XFMOVDloadidx) 7240 v.AuxInt = off1 + off2 7241 v.Aux = mergeSym(sym1, sym2) 7242 v.AddArg(ptr) 7243 v.AddArg(idx) 7244 v.AddArg(mem) 7245 return true 7246 } 7247 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7248 // cond: ptr.Op != OpSB 7249 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7250 for { 7251 off := v.AuxInt 7252 sym := v.Aux 7253 v_0 := v.Args[0] 7254 if v_0.Op != OpS390XADD { 7255 break 7256 } 7257 ptr := v_0.Args[0] 7258 idx := v_0.Args[1] 7259 mem := v.Args[1] 7260 if !(ptr.Op != OpSB) { 7261 break 7262 } 7263 v.reset(OpS390XFMOVDloadidx) 7264 v.AuxInt = off 7265 v.Aux = sym 7266 v.AddArg(ptr) 7267 v.AddArg(idx) 7268 v.AddArg(mem) 7269 return true 7270 } 7271 return false 7272 } 7273 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7274 b := v.Block 7275 _ = b 7276 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7277 // cond: 7278 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7279 for { 7280 c := v.AuxInt 7281 sym := v.Aux 7282 v_0 := v.Args[0] 7283 if v_0.Op != OpS390XADDconst { 7284 break 7285 } 7286 d := v_0.AuxInt 7287 ptr := v_0.Args[0] 7288 idx := v.Args[1] 7289 mem := v.Args[2] 7290 v.reset(OpS390XFMOVDloadidx) 7291 v.AuxInt = c + d 7292 v.Aux = sym 7293 v.AddArg(ptr) 7294 v.AddArg(idx) 7295 v.AddArg(mem) 7296 return true 7297 } 7298 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7299 // cond: 7300 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7301 for { 7302 c := v.AuxInt 7303 sym := v.Aux 7304 ptr := v.Args[0] 7305 v_1 := v.Args[1] 7306 if v_1.Op != OpS390XADDconst { 7307 break 7308 } 7309 d := v_1.AuxInt 7310 idx := v_1.Args[0] 7311 mem := v.Args[2] 7312 v.reset(OpS390XFMOVDloadidx) 7313 v.AuxInt = c + d 7314 v.Aux = sym 7315 v.AddArg(ptr) 7316 v.AddArg(idx) 7317 v.AddArg(mem) 7318 return true 7319 } 7320 return false 7321 } 7322 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7323 b := v.Block 7324 _ = b 7325 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7326 // cond: is32Bit(off1+off2) 7327 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7328 for { 7329 off1 := v.AuxInt 7330 sym := v.Aux 7331 v_0 := v.Args[0] 7332 if v_0.Op != OpS390XADDconst { 7333 break 7334 } 7335 off2 := v_0.AuxInt 7336 ptr := v_0.Args[0] 7337 val := v.Args[1] 7338 mem := v.Args[2] 7339 if !(is32Bit(off1 + off2)) { 7340 break 7341 } 7342 v.reset(OpS390XFMOVDstore) 7343 v.AuxInt = off1 + off2 7344 v.Aux = sym 7345 v.AddArg(ptr) 7346 v.AddArg(val) 7347 v.AddArg(mem) 7348 return true 7349 } 7350 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7351 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7352 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7353 for { 7354 off1 := v.AuxInt 7355 sym1 := v.Aux 7356 v_0 := v.Args[0] 7357 if v_0.Op != OpS390XMOVDaddr { 7358 break 7359 } 7360 off2 := v_0.AuxInt 7361 sym2 := v_0.Aux 7362 base := v_0.Args[0] 7363 val := v.Args[1] 7364 mem := v.Args[2] 7365 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7366 break 7367 } 7368 v.reset(OpS390XFMOVDstore) 7369 v.AuxInt = off1 + off2 7370 v.Aux = mergeSym(sym1, sym2) 7371 v.AddArg(base) 7372 v.AddArg(val) 7373 v.AddArg(mem) 7374 return true 7375 } 7376 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7377 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7378 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7379 for { 7380 off1 := v.AuxInt 7381 sym1 := v.Aux 7382 v_0 := v.Args[0] 7383 if v_0.Op != OpS390XMOVDaddridx { 7384 break 7385 } 7386 off2 := v_0.AuxInt 7387 sym2 := v_0.Aux 7388 ptr := v_0.Args[0] 7389 idx := v_0.Args[1] 7390 val := v.Args[1] 7391 mem := v.Args[2] 7392 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7393 break 7394 } 7395 v.reset(OpS390XFMOVDstoreidx) 7396 v.AuxInt = off1 + off2 7397 v.Aux = mergeSym(sym1, sym2) 7398 v.AddArg(ptr) 7399 v.AddArg(idx) 7400 v.AddArg(val) 7401 v.AddArg(mem) 7402 return true 7403 } 7404 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7405 // cond: ptr.Op != OpSB 7406 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7407 for { 7408 off := v.AuxInt 7409 sym := v.Aux 7410 v_0 := v.Args[0] 7411 if v_0.Op != OpS390XADD { 7412 break 7413 } 7414 ptr := v_0.Args[0] 7415 idx := v_0.Args[1] 7416 val := v.Args[1] 7417 mem := v.Args[2] 7418 if !(ptr.Op != OpSB) { 7419 break 7420 } 7421 v.reset(OpS390XFMOVDstoreidx) 7422 v.AuxInt = off 7423 v.Aux = sym 7424 v.AddArg(ptr) 7425 v.AddArg(idx) 7426 v.AddArg(val) 7427 v.AddArg(mem) 7428 return true 7429 } 7430 return false 7431 } 7432 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7433 b := v.Block 7434 _ = b 7435 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7436 // cond: 7437 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7438 for { 7439 c := v.AuxInt 7440 sym := v.Aux 7441 v_0 := v.Args[0] 7442 if v_0.Op != OpS390XADDconst { 7443 break 7444 } 7445 d := v_0.AuxInt 7446 ptr := v_0.Args[0] 7447 idx := v.Args[1] 7448 val := v.Args[2] 7449 mem := v.Args[3] 7450 v.reset(OpS390XFMOVDstoreidx) 7451 v.AuxInt = c + d 7452 v.Aux = sym 7453 v.AddArg(ptr) 7454 v.AddArg(idx) 7455 v.AddArg(val) 7456 v.AddArg(mem) 7457 return true 7458 } 7459 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7460 // cond: 7461 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7462 for { 7463 c := v.AuxInt 7464 sym := v.Aux 7465 ptr := v.Args[0] 7466 v_1 := v.Args[1] 7467 if v_1.Op != OpS390XADDconst { 7468 break 7469 } 7470 d := v_1.AuxInt 7471 idx := v_1.Args[0] 7472 val := v.Args[2] 7473 mem := v.Args[3] 7474 v.reset(OpS390XFMOVDstoreidx) 7475 v.AuxInt = c + d 7476 v.Aux = sym 7477 v.AddArg(ptr) 7478 v.AddArg(idx) 7479 v.AddArg(val) 7480 v.AddArg(mem) 7481 return true 7482 } 7483 return false 7484 } 7485 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7486 b := v.Block 7487 _ = b 7488 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7489 // cond: is32Bit(off1+off2) 7490 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7491 for { 7492 off1 := v.AuxInt 7493 sym := v.Aux 7494 v_0 := v.Args[0] 7495 if v_0.Op != OpS390XADDconst { 7496 break 7497 } 7498 off2 := v_0.AuxInt 7499 ptr := v_0.Args[0] 7500 mem := v.Args[1] 7501 if !(is32Bit(off1 + off2)) { 7502 break 7503 } 7504 v.reset(OpS390XFMOVSload) 7505 v.AuxInt = off1 + off2 7506 v.Aux = sym 7507 v.AddArg(ptr) 7508 v.AddArg(mem) 7509 return true 7510 } 7511 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7512 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7513 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7514 for { 7515 off1 := v.AuxInt 7516 sym1 := v.Aux 7517 v_0 := v.Args[0] 7518 if v_0.Op != OpS390XMOVDaddr { 7519 break 7520 } 7521 off2 := v_0.AuxInt 7522 sym2 := v_0.Aux 7523 base := v_0.Args[0] 7524 mem := v.Args[1] 7525 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7526 break 7527 } 7528 v.reset(OpS390XFMOVSload) 7529 v.AuxInt = off1 + off2 7530 v.Aux = mergeSym(sym1, sym2) 7531 v.AddArg(base) 7532 v.AddArg(mem) 7533 return true 7534 } 7535 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7536 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7537 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7538 for { 7539 off1 := v.AuxInt 7540 sym1 := v.Aux 7541 v_0 := v.Args[0] 7542 if v_0.Op != OpS390XMOVDaddridx { 7543 break 7544 } 7545 off2 := v_0.AuxInt 7546 sym2 := v_0.Aux 7547 ptr := v_0.Args[0] 7548 idx := v_0.Args[1] 7549 mem := v.Args[1] 7550 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7551 break 7552 } 7553 v.reset(OpS390XFMOVSloadidx) 7554 v.AuxInt = off1 + off2 7555 v.Aux = mergeSym(sym1, sym2) 7556 v.AddArg(ptr) 7557 v.AddArg(idx) 7558 v.AddArg(mem) 7559 return true 7560 } 7561 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7562 // cond: ptr.Op != OpSB 7563 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7564 for { 7565 off := v.AuxInt 7566 sym := v.Aux 7567 v_0 := v.Args[0] 7568 if v_0.Op != OpS390XADD { 7569 break 7570 } 7571 ptr := v_0.Args[0] 7572 idx := v_0.Args[1] 7573 mem := v.Args[1] 7574 if !(ptr.Op != OpSB) { 7575 break 7576 } 7577 v.reset(OpS390XFMOVSloadidx) 7578 v.AuxInt = off 7579 v.Aux = sym 7580 v.AddArg(ptr) 7581 v.AddArg(idx) 7582 v.AddArg(mem) 7583 return true 7584 } 7585 return false 7586 } 7587 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7588 b := v.Block 7589 _ = b 7590 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7591 // cond: 7592 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7593 for { 7594 c := v.AuxInt 7595 sym := v.Aux 7596 v_0 := v.Args[0] 7597 if v_0.Op != OpS390XADDconst { 7598 break 7599 } 7600 d := v_0.AuxInt 7601 ptr := v_0.Args[0] 7602 idx := v.Args[1] 7603 mem := v.Args[2] 7604 v.reset(OpS390XFMOVSloadidx) 7605 v.AuxInt = c + d 7606 v.Aux = sym 7607 v.AddArg(ptr) 7608 v.AddArg(idx) 7609 v.AddArg(mem) 7610 return true 7611 } 7612 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7613 // cond: 7614 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7615 for { 7616 c := v.AuxInt 7617 sym := v.Aux 7618 ptr := v.Args[0] 7619 v_1 := v.Args[1] 7620 if v_1.Op != OpS390XADDconst { 7621 break 7622 } 7623 d := v_1.AuxInt 7624 idx := v_1.Args[0] 7625 mem := v.Args[2] 7626 v.reset(OpS390XFMOVSloadidx) 7627 v.AuxInt = c + d 7628 v.Aux = sym 7629 v.AddArg(ptr) 7630 v.AddArg(idx) 7631 v.AddArg(mem) 7632 return true 7633 } 7634 return false 7635 } 7636 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7637 b := v.Block 7638 _ = b 7639 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7640 // cond: is32Bit(off1+off2) 7641 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7642 for { 7643 off1 := v.AuxInt 7644 sym := v.Aux 7645 v_0 := v.Args[0] 7646 if v_0.Op != OpS390XADDconst { 7647 break 7648 } 7649 off2 := v_0.AuxInt 7650 ptr := v_0.Args[0] 7651 val := v.Args[1] 7652 mem := v.Args[2] 7653 if !(is32Bit(off1 + off2)) { 7654 break 7655 } 7656 v.reset(OpS390XFMOVSstore) 7657 v.AuxInt = off1 + off2 7658 v.Aux = sym 7659 v.AddArg(ptr) 7660 v.AddArg(val) 7661 v.AddArg(mem) 7662 return true 7663 } 7664 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7665 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7666 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7667 for { 7668 off1 := v.AuxInt 7669 sym1 := v.Aux 7670 v_0 := v.Args[0] 7671 if v_0.Op != OpS390XMOVDaddr { 7672 break 7673 } 7674 off2 := v_0.AuxInt 7675 sym2 := v_0.Aux 7676 base := v_0.Args[0] 7677 val := v.Args[1] 7678 mem := v.Args[2] 7679 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7680 break 7681 } 7682 v.reset(OpS390XFMOVSstore) 7683 v.AuxInt = off1 + off2 7684 v.Aux = mergeSym(sym1, sym2) 7685 v.AddArg(base) 7686 v.AddArg(val) 7687 v.AddArg(mem) 7688 return true 7689 } 7690 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7691 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7692 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7693 for { 7694 off1 := v.AuxInt 7695 sym1 := v.Aux 7696 v_0 := v.Args[0] 7697 if v_0.Op != OpS390XMOVDaddridx { 7698 break 7699 } 7700 off2 := v_0.AuxInt 7701 sym2 := v_0.Aux 7702 ptr := v_0.Args[0] 7703 idx := v_0.Args[1] 7704 val := v.Args[1] 7705 mem := v.Args[2] 7706 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7707 break 7708 } 7709 v.reset(OpS390XFMOVSstoreidx) 7710 v.AuxInt = off1 + off2 7711 v.Aux = mergeSym(sym1, sym2) 7712 v.AddArg(ptr) 7713 v.AddArg(idx) 7714 v.AddArg(val) 7715 v.AddArg(mem) 7716 return true 7717 } 7718 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7719 // cond: ptr.Op != OpSB 7720 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7721 for { 7722 off := v.AuxInt 7723 sym := v.Aux 7724 v_0 := v.Args[0] 7725 if v_0.Op != OpS390XADD { 7726 break 7727 } 7728 ptr := v_0.Args[0] 7729 idx := v_0.Args[1] 7730 val := v.Args[1] 7731 mem := v.Args[2] 7732 if !(ptr.Op != OpSB) { 7733 break 7734 } 7735 v.reset(OpS390XFMOVSstoreidx) 7736 v.AuxInt = off 7737 v.Aux = sym 7738 v.AddArg(ptr) 7739 v.AddArg(idx) 7740 v.AddArg(val) 7741 v.AddArg(mem) 7742 return true 7743 } 7744 return false 7745 } 7746 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7747 b := v.Block 7748 _ = b 7749 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7750 // cond: 7751 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7752 for { 7753 c := v.AuxInt 7754 sym := v.Aux 7755 v_0 := v.Args[0] 7756 if v_0.Op != OpS390XADDconst { 7757 break 7758 } 7759 d := v_0.AuxInt 7760 ptr := v_0.Args[0] 7761 idx := v.Args[1] 7762 val := v.Args[2] 7763 mem := v.Args[3] 7764 v.reset(OpS390XFMOVSstoreidx) 7765 v.AuxInt = c + d 7766 v.Aux = sym 7767 v.AddArg(ptr) 7768 v.AddArg(idx) 7769 v.AddArg(val) 7770 v.AddArg(mem) 7771 return true 7772 } 7773 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7774 // cond: 7775 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7776 for { 7777 c := v.AuxInt 7778 sym := v.Aux 7779 ptr := v.Args[0] 7780 v_1 := v.Args[1] 7781 if v_1.Op != OpS390XADDconst { 7782 break 7783 } 7784 d := v_1.AuxInt 7785 idx := v_1.Args[0] 7786 val := v.Args[2] 7787 mem := v.Args[3] 7788 v.reset(OpS390XFMOVSstoreidx) 7789 v.AuxInt = c + d 7790 v.Aux = sym 7791 v.AddArg(ptr) 7792 v.AddArg(idx) 7793 v.AddArg(val) 7794 v.AddArg(mem) 7795 return true 7796 } 7797 return false 7798 } 7799 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7800 b := v.Block 7801 _ = b 7802 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7803 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7804 // result: x 7805 for { 7806 off := v.AuxInt 7807 sym := v.Aux 7808 ptr := v.Args[0] 7809 v_1 := v.Args[1] 7810 if v_1.Op != OpS390XMOVBstore { 7811 break 7812 } 7813 off2 := v_1.AuxInt 7814 sym2 := v_1.Aux 7815 ptr2 := v_1.Args[0] 7816 x := v_1.Args[1] 7817 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7818 break 7819 } 7820 v.reset(OpCopy) 7821 v.Type = x.Type 7822 v.AddArg(x) 7823 return true 7824 } 7825 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7826 // cond: is32Bit(off1+off2) 7827 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7828 for { 7829 off1 := v.AuxInt 7830 sym := v.Aux 7831 v_0 := v.Args[0] 7832 if v_0.Op != OpS390XADDconst { 7833 break 7834 } 7835 off2 := v_0.AuxInt 7836 ptr := v_0.Args[0] 7837 mem := v.Args[1] 7838 if !(is32Bit(off1 + off2)) { 7839 break 7840 } 7841 v.reset(OpS390XMOVBZload) 7842 v.AuxInt = off1 + off2 7843 v.Aux = sym 7844 v.AddArg(ptr) 7845 v.AddArg(mem) 7846 return true 7847 } 7848 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7849 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7850 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7851 for { 7852 off1 := v.AuxInt 7853 sym1 := v.Aux 7854 v_0 := v.Args[0] 7855 if v_0.Op != OpS390XMOVDaddr { 7856 break 7857 } 7858 off2 := v_0.AuxInt 7859 sym2 := v_0.Aux 7860 base := v_0.Args[0] 7861 mem := v.Args[1] 7862 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7863 break 7864 } 7865 v.reset(OpS390XMOVBZload) 7866 v.AuxInt = off1 + off2 7867 v.Aux = mergeSym(sym1, sym2) 7868 v.AddArg(base) 7869 v.AddArg(mem) 7870 return true 7871 } 7872 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7873 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7874 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7875 for { 7876 off1 := v.AuxInt 7877 sym1 := v.Aux 7878 v_0 := v.Args[0] 7879 if v_0.Op != OpS390XMOVDaddridx { 7880 break 7881 } 7882 off2 := v_0.AuxInt 7883 sym2 := v_0.Aux 7884 ptr := v_0.Args[0] 7885 idx := v_0.Args[1] 7886 mem := v.Args[1] 7887 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7888 break 7889 } 7890 v.reset(OpS390XMOVBZloadidx) 7891 v.AuxInt = off1 + off2 7892 v.Aux = mergeSym(sym1, sym2) 7893 v.AddArg(ptr) 7894 v.AddArg(idx) 7895 v.AddArg(mem) 7896 return true 7897 } 7898 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 7899 // cond: ptr.Op != OpSB 7900 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 7901 for { 7902 off := v.AuxInt 7903 sym := v.Aux 7904 v_0 := v.Args[0] 7905 if v_0.Op != OpS390XADD { 7906 break 7907 } 7908 ptr := v_0.Args[0] 7909 idx := v_0.Args[1] 7910 mem := v.Args[1] 7911 if !(ptr.Op != OpSB) { 7912 break 7913 } 7914 v.reset(OpS390XMOVBZloadidx) 7915 v.AuxInt = off 7916 v.Aux = sym 7917 v.AddArg(ptr) 7918 v.AddArg(idx) 7919 v.AddArg(mem) 7920 return true 7921 } 7922 return false 7923 } 7924 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 7925 b := v.Block 7926 _ = b 7927 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7928 // cond: 7929 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7930 for { 7931 c := v.AuxInt 7932 sym := v.Aux 7933 v_0 := v.Args[0] 7934 if v_0.Op != OpS390XADDconst { 7935 break 7936 } 7937 d := v_0.AuxInt 7938 ptr := v_0.Args[0] 7939 idx := v.Args[1] 7940 mem := v.Args[2] 7941 v.reset(OpS390XMOVBZloadidx) 7942 v.AuxInt = c + d 7943 v.Aux = sym 7944 v.AddArg(ptr) 7945 v.AddArg(idx) 7946 v.AddArg(mem) 7947 return true 7948 } 7949 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7950 // cond: 7951 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7952 for { 7953 c := v.AuxInt 7954 sym := v.Aux 7955 ptr := v.Args[0] 7956 v_1 := v.Args[1] 7957 if v_1.Op != OpS390XADDconst { 7958 break 7959 } 7960 d := v_1.AuxInt 7961 idx := v_1.Args[0] 7962 mem := v.Args[2] 7963 v.reset(OpS390XMOVBZloadidx) 7964 v.AuxInt = c + d 7965 v.Aux = sym 7966 v.AddArg(ptr) 7967 v.AddArg(idx) 7968 v.AddArg(mem) 7969 return true 7970 } 7971 return false 7972 } 7973 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 7974 b := v.Block 7975 _ = b 7976 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 7977 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 7978 // result: x 7979 for { 7980 x := v.Args[0] 7981 if x.Op != OpS390XMOVDLT { 7982 break 7983 } 7984 x_0 := x.Args[0] 7985 if x_0.Op != OpS390XMOVDconst { 7986 break 7987 } 7988 c := x_0.AuxInt 7989 x_1 := x.Args[1] 7990 if x_1.Op != OpS390XMOVDconst { 7991 break 7992 } 7993 d := x_1.AuxInt 7994 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 7995 break 7996 } 7997 v.reset(OpCopy) 7998 v.Type = x.Type 7999 v.AddArg(x) 8000 return true 8001 } 8002 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8003 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8004 // result: x 8005 for { 8006 x := v.Args[0] 8007 if x.Op != OpS390XMOVDLE { 8008 break 8009 } 8010 x_0 := x.Args[0] 8011 if x_0.Op != OpS390XMOVDconst { 8012 break 8013 } 8014 c := x_0.AuxInt 8015 x_1 := x.Args[1] 8016 if x_1.Op != OpS390XMOVDconst { 8017 break 8018 } 8019 d := x_1.AuxInt 8020 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8021 break 8022 } 8023 v.reset(OpCopy) 8024 v.Type = x.Type 8025 v.AddArg(x) 8026 return true 8027 } 8028 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8029 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8030 // result: x 8031 for { 8032 x := v.Args[0] 8033 if x.Op != OpS390XMOVDGT { 8034 break 8035 } 8036 x_0 := x.Args[0] 8037 if x_0.Op != OpS390XMOVDconst { 8038 break 8039 } 8040 c := x_0.AuxInt 8041 x_1 := x.Args[1] 8042 if x_1.Op != OpS390XMOVDconst { 8043 break 8044 } 8045 d := x_1.AuxInt 8046 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8047 break 8048 } 8049 v.reset(OpCopy) 8050 v.Type = x.Type 8051 v.AddArg(x) 8052 return true 8053 } 8054 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8055 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8056 // result: x 8057 for { 8058 x := v.Args[0] 8059 if x.Op != OpS390XMOVDGE { 8060 break 8061 } 8062 x_0 := x.Args[0] 8063 if x_0.Op != OpS390XMOVDconst { 8064 break 8065 } 8066 c := x_0.AuxInt 8067 x_1 := x.Args[1] 8068 if x_1.Op != OpS390XMOVDconst { 8069 break 8070 } 8071 d := x_1.AuxInt 8072 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8073 break 8074 } 8075 v.reset(OpCopy) 8076 v.Type = x.Type 8077 v.AddArg(x) 8078 return true 8079 } 8080 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8081 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8082 // result: x 8083 for { 8084 x := v.Args[0] 8085 if x.Op != OpS390XMOVDEQ { 8086 break 8087 } 8088 x_0 := x.Args[0] 8089 if x_0.Op != OpS390XMOVDconst { 8090 break 8091 } 8092 c := x_0.AuxInt 8093 x_1 := x.Args[1] 8094 if x_1.Op != OpS390XMOVDconst { 8095 break 8096 } 8097 d := x_1.AuxInt 8098 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8099 break 8100 } 8101 v.reset(OpCopy) 8102 v.Type = x.Type 8103 v.AddArg(x) 8104 return true 8105 } 8106 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8107 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8108 // result: x 8109 for { 8110 x := v.Args[0] 8111 if x.Op != OpS390XMOVDNE { 8112 break 8113 } 8114 x_0 := x.Args[0] 8115 if x_0.Op != OpS390XMOVDconst { 8116 break 8117 } 8118 c := x_0.AuxInt 8119 x_1 := x.Args[1] 8120 if x_1.Op != OpS390XMOVDconst { 8121 break 8122 } 8123 d := x_1.AuxInt 8124 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8125 break 8126 } 8127 v.reset(OpCopy) 8128 v.Type = x.Type 8129 v.AddArg(x) 8130 return true 8131 } 8132 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8133 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8134 // result: x 8135 for { 8136 x := v.Args[0] 8137 if x.Op != OpS390XMOVDGTnoinv { 8138 break 8139 } 8140 x_0 := x.Args[0] 8141 if x_0.Op != OpS390XMOVDconst { 8142 break 8143 } 8144 c := x_0.AuxInt 8145 x_1 := x.Args[1] 8146 if x_1.Op != OpS390XMOVDconst { 8147 break 8148 } 8149 d := x_1.AuxInt 8150 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8151 break 8152 } 8153 v.reset(OpCopy) 8154 v.Type = x.Type 8155 v.AddArg(x) 8156 return true 8157 } 8158 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8159 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8160 // result: x 8161 for { 8162 x := v.Args[0] 8163 if x.Op != OpS390XMOVDGEnoinv { 8164 break 8165 } 8166 x_0 := x.Args[0] 8167 if x_0.Op != OpS390XMOVDconst { 8168 break 8169 } 8170 c := x_0.AuxInt 8171 x_1 := x.Args[1] 8172 if x_1.Op != OpS390XMOVDconst { 8173 break 8174 } 8175 d := x_1.AuxInt 8176 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8177 break 8178 } 8179 v.reset(OpCopy) 8180 v.Type = x.Type 8181 v.AddArg(x) 8182 return true 8183 } 8184 // match: (MOVBZreg x:(MOVBZload _ _)) 8185 // cond: 8186 // result: x 8187 for { 8188 x := v.Args[0] 8189 if x.Op != OpS390XMOVBZload { 8190 break 8191 } 8192 v.reset(OpCopy) 8193 v.Type = x.Type 8194 v.AddArg(x) 8195 return true 8196 } 8197 // match: (MOVBZreg x:(Arg <t>)) 8198 // cond: is8BitInt(t) && !isSigned(t) 8199 // result: x 8200 for { 8201 x := v.Args[0] 8202 if x.Op != OpArg { 8203 break 8204 } 8205 t := x.Type 8206 if !(is8BitInt(t) && !isSigned(t)) { 8207 break 8208 } 8209 v.reset(OpCopy) 8210 v.Type = x.Type 8211 v.AddArg(x) 8212 return true 8213 } 8214 // match: (MOVBZreg x:(MOVBZreg _)) 8215 // cond: 8216 // result: x 8217 for { 8218 x := v.Args[0] 8219 if x.Op != OpS390XMOVBZreg { 8220 break 8221 } 8222 v.reset(OpCopy) 8223 v.Type = x.Type 8224 v.AddArg(x) 8225 return true 8226 } 8227 // match: (MOVBZreg (MOVDconst [c])) 8228 // cond: 8229 // result: (MOVDconst [int64(uint8(c))]) 8230 for { 8231 v_0 := v.Args[0] 8232 if v_0.Op != OpS390XMOVDconst { 8233 break 8234 } 8235 c := v_0.AuxInt 8236 v.reset(OpS390XMOVDconst) 8237 v.AuxInt = int64(uint8(c)) 8238 return true 8239 } 8240 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8241 // cond: x.Uses == 1 && clobber(x) 8242 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8243 for { 8244 x := v.Args[0] 8245 if x.Op != OpS390XMOVBZload { 8246 break 8247 } 8248 off := x.AuxInt 8249 sym := x.Aux 8250 ptr := x.Args[0] 8251 mem := x.Args[1] 8252 if !(x.Uses == 1 && clobber(x)) { 8253 break 8254 } 8255 b = x.Block 8256 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, v.Type) 8257 v.reset(OpCopy) 8258 v.AddArg(v0) 8259 v0.AuxInt = off 8260 v0.Aux = sym 8261 v0.AddArg(ptr) 8262 v0.AddArg(mem) 8263 return true 8264 } 8265 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8266 // cond: x.Uses == 1 && clobber(x) 8267 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8268 for { 8269 x := v.Args[0] 8270 if x.Op != OpS390XMOVBZloadidx { 8271 break 8272 } 8273 off := x.AuxInt 8274 sym := x.Aux 8275 ptr := x.Args[0] 8276 idx := x.Args[1] 8277 mem := x.Args[2] 8278 if !(x.Uses == 1 && clobber(x)) { 8279 break 8280 } 8281 b = x.Block 8282 v0 := b.NewValue0(v.Line, OpS390XMOVBZloadidx, v.Type) 8283 v.reset(OpCopy) 8284 v.AddArg(v0) 8285 v0.AuxInt = off 8286 v0.Aux = sym 8287 v0.AddArg(ptr) 8288 v0.AddArg(idx) 8289 v0.AddArg(mem) 8290 return true 8291 } 8292 return false 8293 } 8294 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8295 b := v.Block 8296 _ = b 8297 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8298 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8299 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8300 for { 8301 off1 := v.AuxInt 8302 sym1 := v.Aux 8303 v_0 := v.Args[0] 8304 if v_0.Op != OpS390XMOVDaddr { 8305 break 8306 } 8307 off2 := v_0.AuxInt 8308 sym2 := v_0.Aux 8309 base := v_0.Args[0] 8310 mem := v.Args[1] 8311 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8312 break 8313 } 8314 v.reset(OpS390XMOVBload) 8315 v.AuxInt = off1 + off2 8316 v.Aux = mergeSym(sym1, sym2) 8317 v.AddArg(base) 8318 v.AddArg(mem) 8319 return true 8320 } 8321 return false 8322 } 8323 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8324 b := v.Block 8325 _ = b 8326 // match: (MOVBreg x:(MOVBload _ _)) 8327 // cond: 8328 // result: x 8329 for { 8330 x := v.Args[0] 8331 if x.Op != OpS390XMOVBload { 8332 break 8333 } 8334 v.reset(OpCopy) 8335 v.Type = x.Type 8336 v.AddArg(x) 8337 return true 8338 } 8339 // match: (MOVBreg x:(Arg <t>)) 8340 // cond: is8BitInt(t) && isSigned(t) 8341 // result: x 8342 for { 8343 x := v.Args[0] 8344 if x.Op != OpArg { 8345 break 8346 } 8347 t := x.Type 8348 if !(is8BitInt(t) && isSigned(t)) { 8349 break 8350 } 8351 v.reset(OpCopy) 8352 v.Type = x.Type 8353 v.AddArg(x) 8354 return true 8355 } 8356 // match: (MOVBreg x:(MOVBreg _)) 8357 // cond: 8358 // result: x 8359 for { 8360 x := v.Args[0] 8361 if x.Op != OpS390XMOVBreg { 8362 break 8363 } 8364 v.reset(OpCopy) 8365 v.Type = x.Type 8366 v.AddArg(x) 8367 return true 8368 } 8369 // match: (MOVBreg (MOVDconst [c])) 8370 // cond: 8371 // result: (MOVDconst [int64(int8(c))]) 8372 for { 8373 v_0 := v.Args[0] 8374 if v_0.Op != OpS390XMOVDconst { 8375 break 8376 } 8377 c := v_0.AuxInt 8378 v.reset(OpS390XMOVDconst) 8379 v.AuxInt = int64(int8(c)) 8380 return true 8381 } 8382 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8383 // cond: x.Uses == 1 && clobber(x) 8384 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8385 for { 8386 x := v.Args[0] 8387 if x.Op != OpS390XMOVBZload { 8388 break 8389 } 8390 off := x.AuxInt 8391 sym := x.Aux 8392 ptr := x.Args[0] 8393 mem := x.Args[1] 8394 if !(x.Uses == 1 && clobber(x)) { 8395 break 8396 } 8397 b = x.Block 8398 v0 := b.NewValue0(v.Line, OpS390XMOVBload, v.Type) 8399 v.reset(OpCopy) 8400 v.AddArg(v0) 8401 v0.AuxInt = off 8402 v0.Aux = sym 8403 v0.AddArg(ptr) 8404 v0.AddArg(mem) 8405 return true 8406 } 8407 return false 8408 } 8409 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8410 b := v.Block 8411 _ = b 8412 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8413 // cond: 8414 // result: (MOVBstore [off] {sym} ptr x mem) 8415 for { 8416 off := v.AuxInt 8417 sym := v.Aux 8418 ptr := v.Args[0] 8419 v_1 := v.Args[1] 8420 if v_1.Op != OpS390XMOVBreg { 8421 break 8422 } 8423 x := v_1.Args[0] 8424 mem := v.Args[2] 8425 v.reset(OpS390XMOVBstore) 8426 v.AuxInt = off 8427 v.Aux = sym 8428 v.AddArg(ptr) 8429 v.AddArg(x) 8430 v.AddArg(mem) 8431 return true 8432 } 8433 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8434 // cond: 8435 // result: (MOVBstore [off] {sym} ptr x mem) 8436 for { 8437 off := v.AuxInt 8438 sym := v.Aux 8439 ptr := v.Args[0] 8440 v_1 := v.Args[1] 8441 if v_1.Op != OpS390XMOVBZreg { 8442 break 8443 } 8444 x := v_1.Args[0] 8445 mem := v.Args[2] 8446 v.reset(OpS390XMOVBstore) 8447 v.AuxInt = off 8448 v.Aux = sym 8449 v.AddArg(ptr) 8450 v.AddArg(x) 8451 v.AddArg(mem) 8452 return true 8453 } 8454 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8455 // cond: is32Bit(off1+off2) 8456 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8457 for { 8458 off1 := v.AuxInt 8459 sym := v.Aux 8460 v_0 := v.Args[0] 8461 if v_0.Op != OpS390XADDconst { 8462 break 8463 } 8464 off2 := v_0.AuxInt 8465 ptr := v_0.Args[0] 8466 val := v.Args[1] 8467 mem := v.Args[2] 8468 if !(is32Bit(off1 + off2)) { 8469 break 8470 } 8471 v.reset(OpS390XMOVBstore) 8472 v.AuxInt = off1 + off2 8473 v.Aux = sym 8474 v.AddArg(ptr) 8475 v.AddArg(val) 8476 v.AddArg(mem) 8477 return true 8478 } 8479 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8480 // cond: validOff(off) && ptr.Op != OpSB 8481 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8482 for { 8483 off := v.AuxInt 8484 sym := v.Aux 8485 ptr := v.Args[0] 8486 v_1 := v.Args[1] 8487 if v_1.Op != OpS390XMOVDconst { 8488 break 8489 } 8490 c := v_1.AuxInt 8491 mem := v.Args[2] 8492 if !(validOff(off) && ptr.Op != OpSB) { 8493 break 8494 } 8495 v.reset(OpS390XMOVBstoreconst) 8496 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8497 v.Aux = sym 8498 v.AddArg(ptr) 8499 v.AddArg(mem) 8500 return true 8501 } 8502 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8503 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8504 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8505 for { 8506 off1 := v.AuxInt 8507 sym1 := v.Aux 8508 v_0 := v.Args[0] 8509 if v_0.Op != OpS390XMOVDaddr { 8510 break 8511 } 8512 off2 := v_0.AuxInt 8513 sym2 := v_0.Aux 8514 base := v_0.Args[0] 8515 val := v.Args[1] 8516 mem := v.Args[2] 8517 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8518 break 8519 } 8520 v.reset(OpS390XMOVBstore) 8521 v.AuxInt = off1 + off2 8522 v.Aux = mergeSym(sym1, sym2) 8523 v.AddArg(base) 8524 v.AddArg(val) 8525 v.AddArg(mem) 8526 return true 8527 } 8528 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8529 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8530 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8531 for { 8532 off1 := v.AuxInt 8533 sym1 := v.Aux 8534 v_0 := v.Args[0] 8535 if v_0.Op != OpS390XMOVDaddridx { 8536 break 8537 } 8538 off2 := v_0.AuxInt 8539 sym2 := v_0.Aux 8540 ptr := v_0.Args[0] 8541 idx := v_0.Args[1] 8542 val := v.Args[1] 8543 mem := v.Args[2] 8544 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8545 break 8546 } 8547 v.reset(OpS390XMOVBstoreidx) 8548 v.AuxInt = off1 + off2 8549 v.Aux = mergeSym(sym1, sym2) 8550 v.AddArg(ptr) 8551 v.AddArg(idx) 8552 v.AddArg(val) 8553 v.AddArg(mem) 8554 return true 8555 } 8556 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8557 // cond: ptr.Op != OpSB 8558 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8559 for { 8560 off := v.AuxInt 8561 sym := v.Aux 8562 v_0 := v.Args[0] 8563 if v_0.Op != OpS390XADD { 8564 break 8565 } 8566 ptr := v_0.Args[0] 8567 idx := v_0.Args[1] 8568 val := v.Args[1] 8569 mem := v.Args[2] 8570 if !(ptr.Op != OpSB) { 8571 break 8572 } 8573 v.reset(OpS390XMOVBstoreidx) 8574 v.AuxInt = off 8575 v.Aux = sym 8576 v.AddArg(ptr) 8577 v.AddArg(idx) 8578 v.AddArg(val) 8579 v.AddArg(mem) 8580 return true 8581 } 8582 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8583 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8584 // result: (MOVHstore [i-1] {s} p w mem) 8585 for { 8586 i := v.AuxInt 8587 s := v.Aux 8588 p := v.Args[0] 8589 w := v.Args[1] 8590 x := v.Args[2] 8591 if x.Op != OpS390XMOVBstore { 8592 break 8593 } 8594 if x.AuxInt != i-1 { 8595 break 8596 } 8597 if x.Aux != s { 8598 break 8599 } 8600 if p != x.Args[0] { 8601 break 8602 } 8603 x_1 := x.Args[1] 8604 if x_1.Op != OpS390XSRDconst { 8605 break 8606 } 8607 if x_1.AuxInt != 8 { 8608 break 8609 } 8610 if w != x_1.Args[0] { 8611 break 8612 } 8613 mem := x.Args[2] 8614 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8615 break 8616 } 8617 v.reset(OpS390XMOVHstore) 8618 v.AuxInt = i - 1 8619 v.Aux = s 8620 v.AddArg(p) 8621 v.AddArg(w) 8622 v.AddArg(mem) 8623 return true 8624 } 8625 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8626 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8627 // result: (MOVHstore [i-1] {s} p w0 mem) 8628 for { 8629 i := v.AuxInt 8630 s := v.Aux 8631 p := v.Args[0] 8632 w0 := v.Args[1] 8633 if w0.Op != OpS390XSRDconst { 8634 break 8635 } 8636 j := w0.AuxInt 8637 w := w0.Args[0] 8638 x := v.Args[2] 8639 if x.Op != OpS390XMOVBstore { 8640 break 8641 } 8642 if x.AuxInt != i-1 { 8643 break 8644 } 8645 if x.Aux != s { 8646 break 8647 } 8648 if p != x.Args[0] { 8649 break 8650 } 8651 x_1 := x.Args[1] 8652 if x_1.Op != OpS390XSRDconst { 8653 break 8654 } 8655 if x_1.AuxInt != j+8 { 8656 break 8657 } 8658 if w != x_1.Args[0] { 8659 break 8660 } 8661 mem := x.Args[2] 8662 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8663 break 8664 } 8665 v.reset(OpS390XMOVHstore) 8666 v.AuxInt = i - 1 8667 v.Aux = s 8668 v.AddArg(p) 8669 v.AddArg(w0) 8670 v.AddArg(mem) 8671 return true 8672 } 8673 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8674 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8675 // result: (MOVHstore [i-1] {s} p w mem) 8676 for { 8677 i := v.AuxInt 8678 s := v.Aux 8679 p := v.Args[0] 8680 w := v.Args[1] 8681 x := v.Args[2] 8682 if x.Op != OpS390XMOVBstore { 8683 break 8684 } 8685 if x.AuxInt != i-1 { 8686 break 8687 } 8688 if x.Aux != s { 8689 break 8690 } 8691 if p != x.Args[0] { 8692 break 8693 } 8694 x_1 := x.Args[1] 8695 if x_1.Op != OpS390XSRWconst { 8696 break 8697 } 8698 if x_1.AuxInt != 8 { 8699 break 8700 } 8701 if w != x_1.Args[0] { 8702 break 8703 } 8704 mem := x.Args[2] 8705 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8706 break 8707 } 8708 v.reset(OpS390XMOVHstore) 8709 v.AuxInt = i - 1 8710 v.Aux = s 8711 v.AddArg(p) 8712 v.AddArg(w) 8713 v.AddArg(mem) 8714 return true 8715 } 8716 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8717 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8718 // result: (MOVHstore [i-1] {s} p w0 mem) 8719 for { 8720 i := v.AuxInt 8721 s := v.Aux 8722 p := v.Args[0] 8723 w0 := v.Args[1] 8724 if w0.Op != OpS390XSRWconst { 8725 break 8726 } 8727 j := w0.AuxInt 8728 w := w0.Args[0] 8729 x := v.Args[2] 8730 if x.Op != OpS390XMOVBstore { 8731 break 8732 } 8733 if x.AuxInt != i-1 { 8734 break 8735 } 8736 if x.Aux != s { 8737 break 8738 } 8739 if p != x.Args[0] { 8740 break 8741 } 8742 x_1 := x.Args[1] 8743 if x_1.Op != OpS390XSRWconst { 8744 break 8745 } 8746 if x_1.AuxInt != j+8 { 8747 break 8748 } 8749 if w != x_1.Args[0] { 8750 break 8751 } 8752 mem := x.Args[2] 8753 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8754 break 8755 } 8756 v.reset(OpS390XMOVHstore) 8757 v.AuxInt = i - 1 8758 v.Aux = s 8759 v.AddArg(p) 8760 v.AddArg(w0) 8761 v.AddArg(mem) 8762 return true 8763 } 8764 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8765 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8766 // result: (MOVHBRstore [i-1] {s} p w mem) 8767 for { 8768 i := v.AuxInt 8769 s := v.Aux 8770 p := v.Args[0] 8771 v_1 := v.Args[1] 8772 if v_1.Op != OpS390XSRDconst { 8773 break 8774 } 8775 if v_1.AuxInt != 8 { 8776 break 8777 } 8778 w := v_1.Args[0] 8779 x := v.Args[2] 8780 if x.Op != OpS390XMOVBstore { 8781 break 8782 } 8783 if x.AuxInt != i-1 { 8784 break 8785 } 8786 if x.Aux != s { 8787 break 8788 } 8789 if p != x.Args[0] { 8790 break 8791 } 8792 if w != x.Args[1] { 8793 break 8794 } 8795 mem := x.Args[2] 8796 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8797 break 8798 } 8799 v.reset(OpS390XMOVHBRstore) 8800 v.AuxInt = i - 1 8801 v.Aux = s 8802 v.AddArg(p) 8803 v.AddArg(w) 8804 v.AddArg(mem) 8805 return true 8806 } 8807 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8808 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8809 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8810 for { 8811 i := v.AuxInt 8812 s := v.Aux 8813 p := v.Args[0] 8814 v_1 := v.Args[1] 8815 if v_1.Op != OpS390XSRDconst { 8816 break 8817 } 8818 j := v_1.AuxInt 8819 w := v_1.Args[0] 8820 x := v.Args[2] 8821 if x.Op != OpS390XMOVBstore { 8822 break 8823 } 8824 if x.AuxInt != i-1 { 8825 break 8826 } 8827 if x.Aux != s { 8828 break 8829 } 8830 if p != x.Args[0] { 8831 break 8832 } 8833 w0 := x.Args[1] 8834 if w0.Op != OpS390XSRDconst { 8835 break 8836 } 8837 if w0.AuxInt != j-8 { 8838 break 8839 } 8840 if w != w0.Args[0] { 8841 break 8842 } 8843 mem := x.Args[2] 8844 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8845 break 8846 } 8847 v.reset(OpS390XMOVHBRstore) 8848 v.AuxInt = i - 1 8849 v.Aux = s 8850 v.AddArg(p) 8851 v.AddArg(w0) 8852 v.AddArg(mem) 8853 return true 8854 } 8855 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8856 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8857 // result: (MOVHBRstore [i-1] {s} p w mem) 8858 for { 8859 i := v.AuxInt 8860 s := v.Aux 8861 p := v.Args[0] 8862 v_1 := v.Args[1] 8863 if v_1.Op != OpS390XSRWconst { 8864 break 8865 } 8866 if v_1.AuxInt != 8 { 8867 break 8868 } 8869 w := v_1.Args[0] 8870 x := v.Args[2] 8871 if x.Op != OpS390XMOVBstore { 8872 break 8873 } 8874 if x.AuxInt != i-1 { 8875 break 8876 } 8877 if x.Aux != s { 8878 break 8879 } 8880 if p != x.Args[0] { 8881 break 8882 } 8883 if w != x.Args[1] { 8884 break 8885 } 8886 mem := x.Args[2] 8887 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8888 break 8889 } 8890 v.reset(OpS390XMOVHBRstore) 8891 v.AuxInt = i - 1 8892 v.Aux = s 8893 v.AddArg(p) 8894 v.AddArg(w) 8895 v.AddArg(mem) 8896 return true 8897 } 8898 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 8899 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8900 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8901 for { 8902 i := v.AuxInt 8903 s := v.Aux 8904 p := v.Args[0] 8905 v_1 := v.Args[1] 8906 if v_1.Op != OpS390XSRWconst { 8907 break 8908 } 8909 j := v_1.AuxInt 8910 w := v_1.Args[0] 8911 x := v.Args[2] 8912 if x.Op != OpS390XMOVBstore { 8913 break 8914 } 8915 if x.AuxInt != i-1 { 8916 break 8917 } 8918 if x.Aux != s { 8919 break 8920 } 8921 if p != x.Args[0] { 8922 break 8923 } 8924 w0 := x.Args[1] 8925 if w0.Op != OpS390XSRWconst { 8926 break 8927 } 8928 if w0.AuxInt != j-8 { 8929 break 8930 } 8931 if w != w0.Args[0] { 8932 break 8933 } 8934 mem := x.Args[2] 8935 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8936 break 8937 } 8938 v.reset(OpS390XMOVHBRstore) 8939 v.AuxInt = i - 1 8940 v.Aux = s 8941 v.AddArg(p) 8942 v.AddArg(w0) 8943 v.AddArg(mem) 8944 return true 8945 } 8946 return false 8947 } 8948 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 8949 b := v.Block 8950 _ = b 8951 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 8952 // cond: ValAndOff(sc).canAdd(off) 8953 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 8954 for { 8955 sc := v.AuxInt 8956 s := v.Aux 8957 v_0 := v.Args[0] 8958 if v_0.Op != OpS390XADDconst { 8959 break 8960 } 8961 off := v_0.AuxInt 8962 ptr := v_0.Args[0] 8963 mem := v.Args[1] 8964 if !(ValAndOff(sc).canAdd(off)) { 8965 break 8966 } 8967 v.reset(OpS390XMOVBstoreconst) 8968 v.AuxInt = ValAndOff(sc).add(off) 8969 v.Aux = s 8970 v.AddArg(ptr) 8971 v.AddArg(mem) 8972 return true 8973 } 8974 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 8975 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 8976 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 8977 for { 8978 sc := v.AuxInt 8979 sym1 := v.Aux 8980 v_0 := v.Args[0] 8981 if v_0.Op != OpS390XMOVDaddr { 8982 break 8983 } 8984 off := v_0.AuxInt 8985 sym2 := v_0.Aux 8986 ptr := v_0.Args[0] 8987 mem := v.Args[1] 8988 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 8989 break 8990 } 8991 v.reset(OpS390XMOVBstoreconst) 8992 v.AuxInt = ValAndOff(sc).add(off) 8993 v.Aux = mergeSym(sym1, sym2) 8994 v.AddArg(ptr) 8995 v.AddArg(mem) 8996 return true 8997 } 8998 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 8999 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9000 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9001 for { 9002 c := v.AuxInt 9003 s := v.Aux 9004 p := v.Args[0] 9005 x := v.Args[1] 9006 if x.Op != OpS390XMOVBstoreconst { 9007 break 9008 } 9009 a := x.AuxInt 9010 if x.Aux != s { 9011 break 9012 } 9013 if p != x.Args[0] { 9014 break 9015 } 9016 mem := x.Args[1] 9017 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9018 break 9019 } 9020 v.reset(OpS390XMOVHstoreconst) 9021 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9022 v.Aux = s 9023 v.AddArg(p) 9024 v.AddArg(mem) 9025 return true 9026 } 9027 return false 9028 } 9029 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9030 b := v.Block 9031 _ = b 9032 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9033 // cond: 9034 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9035 for { 9036 c := v.AuxInt 9037 sym := v.Aux 9038 v_0 := v.Args[0] 9039 if v_0.Op != OpS390XADDconst { 9040 break 9041 } 9042 d := v_0.AuxInt 9043 ptr := v_0.Args[0] 9044 idx := v.Args[1] 9045 val := v.Args[2] 9046 mem := v.Args[3] 9047 v.reset(OpS390XMOVBstoreidx) 9048 v.AuxInt = c + d 9049 v.Aux = sym 9050 v.AddArg(ptr) 9051 v.AddArg(idx) 9052 v.AddArg(val) 9053 v.AddArg(mem) 9054 return true 9055 } 9056 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9057 // cond: 9058 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9059 for { 9060 c := v.AuxInt 9061 sym := v.Aux 9062 ptr := v.Args[0] 9063 v_1 := v.Args[1] 9064 if v_1.Op != OpS390XADDconst { 9065 break 9066 } 9067 d := v_1.AuxInt 9068 idx := v_1.Args[0] 9069 val := v.Args[2] 9070 mem := v.Args[3] 9071 v.reset(OpS390XMOVBstoreidx) 9072 v.AuxInt = c + d 9073 v.Aux = sym 9074 v.AddArg(ptr) 9075 v.AddArg(idx) 9076 v.AddArg(val) 9077 v.AddArg(mem) 9078 return true 9079 } 9080 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9081 // cond: x.Uses == 1 && clobber(x) 9082 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9083 for { 9084 i := v.AuxInt 9085 s := v.Aux 9086 p := v.Args[0] 9087 idx := v.Args[1] 9088 w := v.Args[2] 9089 x := v.Args[3] 9090 if x.Op != OpS390XMOVBstoreidx { 9091 break 9092 } 9093 if x.AuxInt != i-1 { 9094 break 9095 } 9096 if x.Aux != s { 9097 break 9098 } 9099 if p != x.Args[0] { 9100 break 9101 } 9102 if idx != x.Args[1] { 9103 break 9104 } 9105 x_2 := x.Args[2] 9106 if x_2.Op != OpS390XSRDconst { 9107 break 9108 } 9109 if x_2.AuxInt != 8 { 9110 break 9111 } 9112 if w != x_2.Args[0] { 9113 break 9114 } 9115 mem := x.Args[3] 9116 if !(x.Uses == 1 && clobber(x)) { 9117 break 9118 } 9119 v.reset(OpS390XMOVHstoreidx) 9120 v.AuxInt = i - 1 9121 v.Aux = s 9122 v.AddArg(p) 9123 v.AddArg(idx) 9124 v.AddArg(w) 9125 v.AddArg(mem) 9126 return true 9127 } 9128 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9129 // cond: x.Uses == 1 && clobber(x) 9130 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9131 for { 9132 i := v.AuxInt 9133 s := v.Aux 9134 p := v.Args[0] 9135 idx := v.Args[1] 9136 w0 := v.Args[2] 9137 if w0.Op != OpS390XSRDconst { 9138 break 9139 } 9140 j := w0.AuxInt 9141 w := w0.Args[0] 9142 x := v.Args[3] 9143 if x.Op != OpS390XMOVBstoreidx { 9144 break 9145 } 9146 if x.AuxInt != i-1 { 9147 break 9148 } 9149 if x.Aux != s { 9150 break 9151 } 9152 if p != x.Args[0] { 9153 break 9154 } 9155 if idx != x.Args[1] { 9156 break 9157 } 9158 x_2 := x.Args[2] 9159 if x_2.Op != OpS390XSRDconst { 9160 break 9161 } 9162 if x_2.AuxInt != j+8 { 9163 break 9164 } 9165 if w != x_2.Args[0] { 9166 break 9167 } 9168 mem := x.Args[3] 9169 if !(x.Uses == 1 && clobber(x)) { 9170 break 9171 } 9172 v.reset(OpS390XMOVHstoreidx) 9173 v.AuxInt = i - 1 9174 v.Aux = s 9175 v.AddArg(p) 9176 v.AddArg(idx) 9177 v.AddArg(w0) 9178 v.AddArg(mem) 9179 return true 9180 } 9181 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9182 // cond: x.Uses == 1 && clobber(x) 9183 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9184 for { 9185 i := v.AuxInt 9186 s := v.Aux 9187 p := v.Args[0] 9188 idx := v.Args[1] 9189 w := v.Args[2] 9190 x := v.Args[3] 9191 if x.Op != OpS390XMOVBstoreidx { 9192 break 9193 } 9194 if x.AuxInt != i-1 { 9195 break 9196 } 9197 if x.Aux != s { 9198 break 9199 } 9200 if p != x.Args[0] { 9201 break 9202 } 9203 if idx != x.Args[1] { 9204 break 9205 } 9206 x_2 := x.Args[2] 9207 if x_2.Op != OpS390XSRWconst { 9208 break 9209 } 9210 if x_2.AuxInt != 8 { 9211 break 9212 } 9213 if w != x_2.Args[0] { 9214 break 9215 } 9216 mem := x.Args[3] 9217 if !(x.Uses == 1 && clobber(x)) { 9218 break 9219 } 9220 v.reset(OpS390XMOVHstoreidx) 9221 v.AuxInt = i - 1 9222 v.Aux = s 9223 v.AddArg(p) 9224 v.AddArg(idx) 9225 v.AddArg(w) 9226 v.AddArg(mem) 9227 return true 9228 } 9229 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9230 // cond: x.Uses == 1 && clobber(x) 9231 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9232 for { 9233 i := v.AuxInt 9234 s := v.Aux 9235 p := v.Args[0] 9236 idx := v.Args[1] 9237 w0 := v.Args[2] 9238 if w0.Op != OpS390XSRWconst { 9239 break 9240 } 9241 j := w0.AuxInt 9242 w := w0.Args[0] 9243 x := v.Args[3] 9244 if x.Op != OpS390XMOVBstoreidx { 9245 break 9246 } 9247 if x.AuxInt != i-1 { 9248 break 9249 } 9250 if x.Aux != s { 9251 break 9252 } 9253 if p != x.Args[0] { 9254 break 9255 } 9256 if idx != x.Args[1] { 9257 break 9258 } 9259 x_2 := x.Args[2] 9260 if x_2.Op != OpS390XSRWconst { 9261 break 9262 } 9263 if x_2.AuxInt != j+8 { 9264 break 9265 } 9266 if w != x_2.Args[0] { 9267 break 9268 } 9269 mem := x.Args[3] 9270 if !(x.Uses == 1 && clobber(x)) { 9271 break 9272 } 9273 v.reset(OpS390XMOVHstoreidx) 9274 v.AuxInt = i - 1 9275 v.Aux = s 9276 v.AddArg(p) 9277 v.AddArg(idx) 9278 v.AddArg(w0) 9279 v.AddArg(mem) 9280 return true 9281 } 9282 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9283 // cond: x.Uses == 1 && clobber(x) 9284 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9285 for { 9286 i := v.AuxInt 9287 s := v.Aux 9288 p := v.Args[0] 9289 idx := v.Args[1] 9290 v_2 := v.Args[2] 9291 if v_2.Op != OpS390XSRDconst { 9292 break 9293 } 9294 if v_2.AuxInt != 8 { 9295 break 9296 } 9297 w := v_2.Args[0] 9298 x := v.Args[3] 9299 if x.Op != OpS390XMOVBstoreidx { 9300 break 9301 } 9302 if x.AuxInt != i-1 { 9303 break 9304 } 9305 if x.Aux != s { 9306 break 9307 } 9308 if p != x.Args[0] { 9309 break 9310 } 9311 if idx != x.Args[1] { 9312 break 9313 } 9314 if w != x.Args[2] { 9315 break 9316 } 9317 mem := x.Args[3] 9318 if !(x.Uses == 1 && clobber(x)) { 9319 break 9320 } 9321 v.reset(OpS390XMOVHBRstoreidx) 9322 v.AuxInt = i - 1 9323 v.Aux = s 9324 v.AddArg(p) 9325 v.AddArg(idx) 9326 v.AddArg(w) 9327 v.AddArg(mem) 9328 return true 9329 } 9330 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9331 // cond: x.Uses == 1 && clobber(x) 9332 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9333 for { 9334 i := v.AuxInt 9335 s := v.Aux 9336 p := v.Args[0] 9337 idx := v.Args[1] 9338 v_2 := v.Args[2] 9339 if v_2.Op != OpS390XSRDconst { 9340 break 9341 } 9342 j := v_2.AuxInt 9343 w := v_2.Args[0] 9344 x := v.Args[3] 9345 if x.Op != OpS390XMOVBstoreidx { 9346 break 9347 } 9348 if x.AuxInt != i-1 { 9349 break 9350 } 9351 if x.Aux != s { 9352 break 9353 } 9354 if p != x.Args[0] { 9355 break 9356 } 9357 if idx != x.Args[1] { 9358 break 9359 } 9360 w0 := x.Args[2] 9361 if w0.Op != OpS390XSRDconst { 9362 break 9363 } 9364 if w0.AuxInt != j-8 { 9365 break 9366 } 9367 if w != w0.Args[0] { 9368 break 9369 } 9370 mem := x.Args[3] 9371 if !(x.Uses == 1 && clobber(x)) { 9372 break 9373 } 9374 v.reset(OpS390XMOVHBRstoreidx) 9375 v.AuxInt = i - 1 9376 v.Aux = s 9377 v.AddArg(p) 9378 v.AddArg(idx) 9379 v.AddArg(w0) 9380 v.AddArg(mem) 9381 return true 9382 } 9383 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9384 // cond: x.Uses == 1 && clobber(x) 9385 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9386 for { 9387 i := v.AuxInt 9388 s := v.Aux 9389 p := v.Args[0] 9390 idx := v.Args[1] 9391 v_2 := v.Args[2] 9392 if v_2.Op != OpS390XSRWconst { 9393 break 9394 } 9395 if v_2.AuxInt != 8 { 9396 break 9397 } 9398 w := v_2.Args[0] 9399 x := v.Args[3] 9400 if x.Op != OpS390XMOVBstoreidx { 9401 break 9402 } 9403 if x.AuxInt != i-1 { 9404 break 9405 } 9406 if x.Aux != s { 9407 break 9408 } 9409 if p != x.Args[0] { 9410 break 9411 } 9412 if idx != x.Args[1] { 9413 break 9414 } 9415 if w != x.Args[2] { 9416 break 9417 } 9418 mem := x.Args[3] 9419 if !(x.Uses == 1 && clobber(x)) { 9420 break 9421 } 9422 v.reset(OpS390XMOVHBRstoreidx) 9423 v.AuxInt = i - 1 9424 v.Aux = s 9425 v.AddArg(p) 9426 v.AddArg(idx) 9427 v.AddArg(w) 9428 v.AddArg(mem) 9429 return true 9430 } 9431 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9432 // cond: x.Uses == 1 && clobber(x) 9433 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9434 for { 9435 i := v.AuxInt 9436 s := v.Aux 9437 p := v.Args[0] 9438 idx := v.Args[1] 9439 v_2 := v.Args[2] 9440 if v_2.Op != OpS390XSRWconst { 9441 break 9442 } 9443 j := v_2.AuxInt 9444 w := v_2.Args[0] 9445 x := v.Args[3] 9446 if x.Op != OpS390XMOVBstoreidx { 9447 break 9448 } 9449 if x.AuxInt != i-1 { 9450 break 9451 } 9452 if x.Aux != s { 9453 break 9454 } 9455 if p != x.Args[0] { 9456 break 9457 } 9458 if idx != x.Args[1] { 9459 break 9460 } 9461 w0 := x.Args[2] 9462 if w0.Op != OpS390XSRWconst { 9463 break 9464 } 9465 if w0.AuxInt != j-8 { 9466 break 9467 } 9468 if w != w0.Args[0] { 9469 break 9470 } 9471 mem := x.Args[3] 9472 if !(x.Uses == 1 && clobber(x)) { 9473 break 9474 } 9475 v.reset(OpS390XMOVHBRstoreidx) 9476 v.AuxInt = i - 1 9477 v.Aux = s 9478 v.AddArg(p) 9479 v.AddArg(idx) 9480 v.AddArg(w0) 9481 v.AddArg(mem) 9482 return true 9483 } 9484 return false 9485 } 9486 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9487 b := v.Block 9488 _ = b 9489 // match: (MOVDEQ x y (InvertFlags cmp)) 9490 // cond: 9491 // result: (MOVDEQ x y cmp) 9492 for { 9493 x := v.Args[0] 9494 y := v.Args[1] 9495 v_2 := v.Args[2] 9496 if v_2.Op != OpS390XInvertFlags { 9497 break 9498 } 9499 cmp := v_2.Args[0] 9500 v.reset(OpS390XMOVDEQ) 9501 v.AddArg(x) 9502 v.AddArg(y) 9503 v.AddArg(cmp) 9504 return true 9505 } 9506 // match: (MOVDEQ _ x (FlagEQ)) 9507 // cond: 9508 // result: x 9509 for { 9510 x := v.Args[1] 9511 v_2 := v.Args[2] 9512 if v_2.Op != OpS390XFlagEQ { 9513 break 9514 } 9515 v.reset(OpCopy) 9516 v.Type = x.Type 9517 v.AddArg(x) 9518 return true 9519 } 9520 // match: (MOVDEQ y _ (FlagLT)) 9521 // cond: 9522 // result: y 9523 for { 9524 y := v.Args[0] 9525 v_2 := v.Args[2] 9526 if v_2.Op != OpS390XFlagLT { 9527 break 9528 } 9529 v.reset(OpCopy) 9530 v.Type = y.Type 9531 v.AddArg(y) 9532 return true 9533 } 9534 // match: (MOVDEQ y _ (FlagGT)) 9535 // cond: 9536 // result: y 9537 for { 9538 y := v.Args[0] 9539 v_2 := v.Args[2] 9540 if v_2.Op != OpS390XFlagGT { 9541 break 9542 } 9543 v.reset(OpCopy) 9544 v.Type = y.Type 9545 v.AddArg(y) 9546 return true 9547 } 9548 return false 9549 } 9550 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9551 b := v.Block 9552 _ = b 9553 // match: (MOVDGE x y (InvertFlags cmp)) 9554 // cond: 9555 // result: (MOVDLE x y cmp) 9556 for { 9557 x := v.Args[0] 9558 y := v.Args[1] 9559 v_2 := v.Args[2] 9560 if v_2.Op != OpS390XInvertFlags { 9561 break 9562 } 9563 cmp := v_2.Args[0] 9564 v.reset(OpS390XMOVDLE) 9565 v.AddArg(x) 9566 v.AddArg(y) 9567 v.AddArg(cmp) 9568 return true 9569 } 9570 // match: (MOVDGE _ x (FlagEQ)) 9571 // cond: 9572 // result: x 9573 for { 9574 x := v.Args[1] 9575 v_2 := v.Args[2] 9576 if v_2.Op != OpS390XFlagEQ { 9577 break 9578 } 9579 v.reset(OpCopy) 9580 v.Type = x.Type 9581 v.AddArg(x) 9582 return true 9583 } 9584 // match: (MOVDGE y _ (FlagLT)) 9585 // cond: 9586 // result: y 9587 for { 9588 y := v.Args[0] 9589 v_2 := v.Args[2] 9590 if v_2.Op != OpS390XFlagLT { 9591 break 9592 } 9593 v.reset(OpCopy) 9594 v.Type = y.Type 9595 v.AddArg(y) 9596 return true 9597 } 9598 // match: (MOVDGE _ x (FlagGT)) 9599 // cond: 9600 // result: x 9601 for { 9602 x := v.Args[1] 9603 v_2 := v.Args[2] 9604 if v_2.Op != OpS390XFlagGT { 9605 break 9606 } 9607 v.reset(OpCopy) 9608 v.Type = x.Type 9609 v.AddArg(x) 9610 return true 9611 } 9612 return false 9613 } 9614 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9615 b := v.Block 9616 _ = b 9617 // match: (MOVDGT x y (InvertFlags cmp)) 9618 // cond: 9619 // result: (MOVDLT x y cmp) 9620 for { 9621 x := v.Args[0] 9622 y := v.Args[1] 9623 v_2 := v.Args[2] 9624 if v_2.Op != OpS390XInvertFlags { 9625 break 9626 } 9627 cmp := v_2.Args[0] 9628 v.reset(OpS390XMOVDLT) 9629 v.AddArg(x) 9630 v.AddArg(y) 9631 v.AddArg(cmp) 9632 return true 9633 } 9634 // match: (MOVDGT y _ (FlagEQ)) 9635 // cond: 9636 // result: y 9637 for { 9638 y := v.Args[0] 9639 v_2 := v.Args[2] 9640 if v_2.Op != OpS390XFlagEQ { 9641 break 9642 } 9643 v.reset(OpCopy) 9644 v.Type = y.Type 9645 v.AddArg(y) 9646 return true 9647 } 9648 // match: (MOVDGT y _ (FlagLT)) 9649 // cond: 9650 // result: y 9651 for { 9652 y := v.Args[0] 9653 v_2 := v.Args[2] 9654 if v_2.Op != OpS390XFlagLT { 9655 break 9656 } 9657 v.reset(OpCopy) 9658 v.Type = y.Type 9659 v.AddArg(y) 9660 return true 9661 } 9662 // match: (MOVDGT _ x (FlagGT)) 9663 // cond: 9664 // result: x 9665 for { 9666 x := v.Args[1] 9667 v_2 := v.Args[2] 9668 if v_2.Op != OpS390XFlagGT { 9669 break 9670 } 9671 v.reset(OpCopy) 9672 v.Type = x.Type 9673 v.AddArg(x) 9674 return true 9675 } 9676 return false 9677 } 9678 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9679 b := v.Block 9680 _ = b 9681 // match: (MOVDLE x y (InvertFlags cmp)) 9682 // cond: 9683 // result: (MOVDGE x y cmp) 9684 for { 9685 x := v.Args[0] 9686 y := v.Args[1] 9687 v_2 := v.Args[2] 9688 if v_2.Op != OpS390XInvertFlags { 9689 break 9690 } 9691 cmp := v_2.Args[0] 9692 v.reset(OpS390XMOVDGE) 9693 v.AddArg(x) 9694 v.AddArg(y) 9695 v.AddArg(cmp) 9696 return true 9697 } 9698 // match: (MOVDLE _ x (FlagEQ)) 9699 // cond: 9700 // result: x 9701 for { 9702 x := v.Args[1] 9703 v_2 := v.Args[2] 9704 if v_2.Op != OpS390XFlagEQ { 9705 break 9706 } 9707 v.reset(OpCopy) 9708 v.Type = x.Type 9709 v.AddArg(x) 9710 return true 9711 } 9712 // match: (MOVDLE _ x (FlagLT)) 9713 // cond: 9714 // result: x 9715 for { 9716 x := v.Args[1] 9717 v_2 := v.Args[2] 9718 if v_2.Op != OpS390XFlagLT { 9719 break 9720 } 9721 v.reset(OpCopy) 9722 v.Type = x.Type 9723 v.AddArg(x) 9724 return true 9725 } 9726 // match: (MOVDLE y _ (FlagGT)) 9727 // cond: 9728 // result: y 9729 for { 9730 y := v.Args[0] 9731 v_2 := v.Args[2] 9732 if v_2.Op != OpS390XFlagGT { 9733 break 9734 } 9735 v.reset(OpCopy) 9736 v.Type = y.Type 9737 v.AddArg(y) 9738 return true 9739 } 9740 return false 9741 } 9742 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9743 b := v.Block 9744 _ = b 9745 // match: (MOVDLT x y (InvertFlags cmp)) 9746 // cond: 9747 // result: (MOVDGT x y cmp) 9748 for { 9749 x := v.Args[0] 9750 y := v.Args[1] 9751 v_2 := v.Args[2] 9752 if v_2.Op != OpS390XInvertFlags { 9753 break 9754 } 9755 cmp := v_2.Args[0] 9756 v.reset(OpS390XMOVDGT) 9757 v.AddArg(x) 9758 v.AddArg(y) 9759 v.AddArg(cmp) 9760 return true 9761 } 9762 // match: (MOVDLT y _ (FlagEQ)) 9763 // cond: 9764 // result: y 9765 for { 9766 y := v.Args[0] 9767 v_2 := v.Args[2] 9768 if v_2.Op != OpS390XFlagEQ { 9769 break 9770 } 9771 v.reset(OpCopy) 9772 v.Type = y.Type 9773 v.AddArg(y) 9774 return true 9775 } 9776 // match: (MOVDLT _ x (FlagLT)) 9777 // cond: 9778 // result: x 9779 for { 9780 x := v.Args[1] 9781 v_2 := v.Args[2] 9782 if v_2.Op != OpS390XFlagLT { 9783 break 9784 } 9785 v.reset(OpCopy) 9786 v.Type = x.Type 9787 v.AddArg(x) 9788 return true 9789 } 9790 // match: (MOVDLT y _ (FlagGT)) 9791 // cond: 9792 // result: y 9793 for { 9794 y := v.Args[0] 9795 v_2 := v.Args[2] 9796 if v_2.Op != OpS390XFlagGT { 9797 break 9798 } 9799 v.reset(OpCopy) 9800 v.Type = y.Type 9801 v.AddArg(y) 9802 return true 9803 } 9804 return false 9805 } 9806 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9807 b := v.Block 9808 _ = b 9809 // match: (MOVDNE x y (InvertFlags cmp)) 9810 // cond: 9811 // result: (MOVDNE x y cmp) 9812 for { 9813 x := v.Args[0] 9814 y := v.Args[1] 9815 v_2 := v.Args[2] 9816 if v_2.Op != OpS390XInvertFlags { 9817 break 9818 } 9819 cmp := v_2.Args[0] 9820 v.reset(OpS390XMOVDNE) 9821 v.AddArg(x) 9822 v.AddArg(y) 9823 v.AddArg(cmp) 9824 return true 9825 } 9826 // match: (MOVDNE _ y (FlagEQ)) 9827 // cond: 9828 // result: y 9829 for { 9830 y := v.Args[1] 9831 v_2 := v.Args[2] 9832 if v_2.Op != OpS390XFlagEQ { 9833 break 9834 } 9835 v.reset(OpCopy) 9836 v.Type = y.Type 9837 v.AddArg(y) 9838 return true 9839 } 9840 // match: (MOVDNE x _ (FlagLT)) 9841 // cond: 9842 // result: x 9843 for { 9844 x := v.Args[0] 9845 v_2 := v.Args[2] 9846 if v_2.Op != OpS390XFlagLT { 9847 break 9848 } 9849 v.reset(OpCopy) 9850 v.Type = x.Type 9851 v.AddArg(x) 9852 return true 9853 } 9854 // match: (MOVDNE x _ (FlagGT)) 9855 // cond: 9856 // result: x 9857 for { 9858 x := v.Args[0] 9859 v_2 := v.Args[2] 9860 if v_2.Op != OpS390XFlagGT { 9861 break 9862 } 9863 v.reset(OpCopy) 9864 v.Type = x.Type 9865 v.AddArg(x) 9866 return true 9867 } 9868 return false 9869 } 9870 func rewriteValueS390X_OpS390XMOVDaddr(v *Value, config *Config) bool { 9871 b := v.Block 9872 _ = b 9873 // match: (MOVDaddr [c] {s} (ADDconst [d] x)) 9874 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 9875 // result: (MOVDaddr [c+d] {s} x) 9876 for { 9877 c := v.AuxInt 9878 s := v.Aux 9879 v_0 := v.Args[0] 9880 if v_0.Op != OpS390XADDconst { 9881 break 9882 } 9883 d := v_0.AuxInt 9884 x := v_0.Args[0] 9885 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 9886 break 9887 } 9888 v.reset(OpS390XMOVDaddr) 9889 v.AuxInt = c + d 9890 v.Aux = s 9891 v.AddArg(x) 9892 return true 9893 } 9894 // match: (MOVDaddr [c] {s} (ADDconst [d] x)) 9895 // cond: x.Op != OpSB && is32Bit(c+d) 9896 // result: (MOVDaddr [c+d] {s} x) 9897 for { 9898 c := v.AuxInt 9899 s := v.Aux 9900 v_0 := v.Args[0] 9901 if v_0.Op != OpS390XADDconst { 9902 break 9903 } 9904 d := v_0.AuxInt 9905 x := v_0.Args[0] 9906 if !(x.Op != OpSB && is32Bit(c+d)) { 9907 break 9908 } 9909 v.reset(OpS390XMOVDaddr) 9910 v.AuxInt = c + d 9911 v.Aux = s 9912 v.AddArg(x) 9913 return true 9914 } 9915 // match: (MOVDaddr [c] {s} (ADD x y)) 9916 // cond: x.Op != OpSB && y.Op != OpSB 9917 // result: (MOVDaddridx [c] {s} x y) 9918 for { 9919 c := v.AuxInt 9920 s := v.Aux 9921 v_0 := v.Args[0] 9922 if v_0.Op != OpS390XADD { 9923 break 9924 } 9925 x := v_0.Args[0] 9926 y := v_0.Args[1] 9927 if !(x.Op != OpSB && y.Op != OpSB) { 9928 break 9929 } 9930 v.reset(OpS390XMOVDaddridx) 9931 v.AuxInt = c 9932 v.Aux = s 9933 v.AddArg(x) 9934 v.AddArg(y) 9935 return true 9936 } 9937 // match: (MOVDaddr [off1] {sym1} (MOVDaddr [off2] {sym2} x)) 9938 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9939 // result: (MOVDaddr [off1+off2] {mergeSym(sym1,sym2)} x) 9940 for { 9941 off1 := v.AuxInt 9942 sym1 := v.Aux 9943 v_0 := v.Args[0] 9944 if v_0.Op != OpS390XMOVDaddr { 9945 break 9946 } 9947 off2 := v_0.AuxInt 9948 sym2 := v_0.Aux 9949 x := v_0.Args[0] 9950 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9951 break 9952 } 9953 v.reset(OpS390XMOVDaddr) 9954 v.AuxInt = off1 + off2 9955 v.Aux = mergeSym(sym1, sym2) 9956 v.AddArg(x) 9957 return true 9958 } 9959 // match: (MOVDaddr [off1] {sym1} (MOVDaddridx [off2] {sym2} x y)) 9960 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9961 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 9962 for { 9963 off1 := v.AuxInt 9964 sym1 := v.Aux 9965 v_0 := v.Args[0] 9966 if v_0.Op != OpS390XMOVDaddridx { 9967 break 9968 } 9969 off2 := v_0.AuxInt 9970 sym2 := v_0.Aux 9971 x := v_0.Args[0] 9972 y := v_0.Args[1] 9973 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9974 break 9975 } 9976 v.reset(OpS390XMOVDaddridx) 9977 v.AuxInt = off1 + off2 9978 v.Aux = mergeSym(sym1, sym2) 9979 v.AddArg(x) 9980 v.AddArg(y) 9981 return true 9982 } 9983 return false 9984 } 9985 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9986 b := v.Block 9987 _ = b 9988 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9989 // cond: is32Bit(c+d) && x.Op != OpSB 9990 // result: (MOVDaddridx [c+d] {s} x y) 9991 for { 9992 c := v.AuxInt 9993 s := v.Aux 9994 v_0 := v.Args[0] 9995 if v_0.Op != OpS390XADDconst { 9996 break 9997 } 9998 d := v_0.AuxInt 9999 x := v_0.Args[0] 10000 y := v.Args[1] 10001 if !(is32Bit(c+d) && x.Op != OpSB) { 10002 break 10003 } 10004 v.reset(OpS390XMOVDaddridx) 10005 v.AuxInt = c + d 10006 v.Aux = s 10007 v.AddArg(x) 10008 v.AddArg(y) 10009 return true 10010 } 10011 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 10012 // cond: is32Bit(c+d) && y.Op != OpSB 10013 // result: (MOVDaddridx [c+d] {s} x y) 10014 for { 10015 c := v.AuxInt 10016 s := v.Aux 10017 x := v.Args[0] 10018 v_1 := v.Args[1] 10019 if v_1.Op != OpS390XADDconst { 10020 break 10021 } 10022 d := v_1.AuxInt 10023 y := v_1.Args[0] 10024 if !(is32Bit(c+d) && y.Op != OpSB) { 10025 break 10026 } 10027 v.reset(OpS390XMOVDaddridx) 10028 v.AuxInt = c + d 10029 v.Aux = s 10030 v.AddArg(x) 10031 v.AddArg(y) 10032 return true 10033 } 10034 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 10035 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 10036 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10037 for { 10038 off1 := v.AuxInt 10039 sym1 := v.Aux 10040 v_0 := v.Args[0] 10041 if v_0.Op != OpS390XMOVDaddr { 10042 break 10043 } 10044 off2 := v_0.AuxInt 10045 sym2 := v_0.Aux 10046 x := v_0.Args[0] 10047 y := v.Args[1] 10048 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 10049 break 10050 } 10051 v.reset(OpS390XMOVDaddridx) 10052 v.AuxInt = off1 + off2 10053 v.Aux = mergeSym(sym1, sym2) 10054 v.AddArg(x) 10055 v.AddArg(y) 10056 return true 10057 } 10058 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 10059 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 10060 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10061 for { 10062 off1 := v.AuxInt 10063 sym1 := v.Aux 10064 x := v.Args[0] 10065 v_1 := v.Args[1] 10066 if v_1.Op != OpS390XMOVDaddr { 10067 break 10068 } 10069 off2 := v_1.AuxInt 10070 sym2 := v_1.Aux 10071 y := v_1.Args[0] 10072 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 10073 break 10074 } 10075 v.reset(OpS390XMOVDaddridx) 10076 v.AuxInt = off1 + off2 10077 v.Aux = mergeSym(sym1, sym2) 10078 v.AddArg(x) 10079 v.AddArg(y) 10080 return true 10081 } 10082 return false 10083 } 10084 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 10085 b := v.Block 10086 _ = b 10087 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 10088 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10089 // result: x 10090 for { 10091 off := v.AuxInt 10092 sym := v.Aux 10093 ptr := v.Args[0] 10094 v_1 := v.Args[1] 10095 if v_1.Op != OpS390XMOVDstore { 10096 break 10097 } 10098 off2 := v_1.AuxInt 10099 sym2 := v_1.Aux 10100 ptr2 := v_1.Args[0] 10101 x := v_1.Args[1] 10102 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10103 break 10104 } 10105 v.reset(OpCopy) 10106 v.Type = x.Type 10107 v.AddArg(x) 10108 return true 10109 } 10110 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10111 // cond: is32Bit(off1+off2) 10112 // result: (MOVDload [off1+off2] {sym} ptr mem) 10113 for { 10114 off1 := v.AuxInt 10115 sym := v.Aux 10116 v_0 := v.Args[0] 10117 if v_0.Op != OpS390XADDconst { 10118 break 10119 } 10120 off2 := v_0.AuxInt 10121 ptr := v_0.Args[0] 10122 mem := v.Args[1] 10123 if !(is32Bit(off1 + off2)) { 10124 break 10125 } 10126 v.reset(OpS390XMOVDload) 10127 v.AuxInt = off1 + off2 10128 v.Aux = sym 10129 v.AddArg(ptr) 10130 v.AddArg(mem) 10131 return true 10132 } 10133 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10134 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10135 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10136 for { 10137 off1 := v.AuxInt 10138 sym1 := v.Aux 10139 v_0 := v.Args[0] 10140 if v_0.Op != OpS390XMOVDaddr { 10141 break 10142 } 10143 off2 := v_0.AuxInt 10144 sym2 := v_0.Aux 10145 base := v_0.Args[0] 10146 mem := v.Args[1] 10147 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10148 break 10149 } 10150 v.reset(OpS390XMOVDload) 10151 v.AuxInt = off1 + off2 10152 v.Aux = mergeSym(sym1, sym2) 10153 v.AddArg(base) 10154 v.AddArg(mem) 10155 return true 10156 } 10157 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10158 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10159 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10160 for { 10161 off1 := v.AuxInt 10162 sym1 := v.Aux 10163 v_0 := v.Args[0] 10164 if v_0.Op != OpS390XMOVDaddridx { 10165 break 10166 } 10167 off2 := v_0.AuxInt 10168 sym2 := v_0.Aux 10169 ptr := v_0.Args[0] 10170 idx := v_0.Args[1] 10171 mem := v.Args[1] 10172 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10173 break 10174 } 10175 v.reset(OpS390XMOVDloadidx) 10176 v.AuxInt = off1 + off2 10177 v.Aux = mergeSym(sym1, sym2) 10178 v.AddArg(ptr) 10179 v.AddArg(idx) 10180 v.AddArg(mem) 10181 return true 10182 } 10183 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10184 // cond: ptr.Op != OpSB 10185 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10186 for { 10187 off := v.AuxInt 10188 sym := v.Aux 10189 v_0 := v.Args[0] 10190 if v_0.Op != OpS390XADD { 10191 break 10192 } 10193 ptr := v_0.Args[0] 10194 idx := v_0.Args[1] 10195 mem := v.Args[1] 10196 if !(ptr.Op != OpSB) { 10197 break 10198 } 10199 v.reset(OpS390XMOVDloadidx) 10200 v.AuxInt = off 10201 v.Aux = sym 10202 v.AddArg(ptr) 10203 v.AddArg(idx) 10204 v.AddArg(mem) 10205 return true 10206 } 10207 return false 10208 } 10209 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10210 b := v.Block 10211 _ = b 10212 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10213 // cond: 10214 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10215 for { 10216 c := v.AuxInt 10217 sym := v.Aux 10218 v_0 := v.Args[0] 10219 if v_0.Op != OpS390XADDconst { 10220 break 10221 } 10222 d := v_0.AuxInt 10223 ptr := v_0.Args[0] 10224 idx := v.Args[1] 10225 mem := v.Args[2] 10226 v.reset(OpS390XMOVDloadidx) 10227 v.AuxInt = c + d 10228 v.Aux = sym 10229 v.AddArg(ptr) 10230 v.AddArg(idx) 10231 v.AddArg(mem) 10232 return true 10233 } 10234 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10235 // cond: 10236 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10237 for { 10238 c := v.AuxInt 10239 sym := v.Aux 10240 ptr := v.Args[0] 10241 v_1 := v.Args[1] 10242 if v_1.Op != OpS390XADDconst { 10243 break 10244 } 10245 d := v_1.AuxInt 10246 idx := v_1.Args[0] 10247 mem := v.Args[2] 10248 v.reset(OpS390XMOVDloadidx) 10249 v.AuxInt = c + d 10250 v.Aux = sym 10251 v.AddArg(ptr) 10252 v.AddArg(idx) 10253 v.AddArg(mem) 10254 return true 10255 } 10256 return false 10257 } 10258 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10259 b := v.Block 10260 _ = b 10261 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10262 // cond: is32Bit(off1+off2) 10263 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10264 for { 10265 off1 := v.AuxInt 10266 sym := v.Aux 10267 v_0 := v.Args[0] 10268 if v_0.Op != OpS390XADDconst { 10269 break 10270 } 10271 off2 := v_0.AuxInt 10272 ptr := v_0.Args[0] 10273 val := v.Args[1] 10274 mem := v.Args[2] 10275 if !(is32Bit(off1 + off2)) { 10276 break 10277 } 10278 v.reset(OpS390XMOVDstore) 10279 v.AuxInt = off1 + off2 10280 v.Aux = sym 10281 v.AddArg(ptr) 10282 v.AddArg(val) 10283 v.AddArg(mem) 10284 return true 10285 } 10286 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10287 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10288 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10289 for { 10290 off := v.AuxInt 10291 sym := v.Aux 10292 ptr := v.Args[0] 10293 v_1 := v.Args[1] 10294 if v_1.Op != OpS390XMOVDconst { 10295 break 10296 } 10297 c := v_1.AuxInt 10298 mem := v.Args[2] 10299 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10300 break 10301 } 10302 v.reset(OpS390XMOVDstoreconst) 10303 v.AuxInt = makeValAndOff(c, off) 10304 v.Aux = sym 10305 v.AddArg(ptr) 10306 v.AddArg(mem) 10307 return true 10308 } 10309 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10310 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10311 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10312 for { 10313 off1 := v.AuxInt 10314 sym1 := v.Aux 10315 v_0 := v.Args[0] 10316 if v_0.Op != OpS390XMOVDaddr { 10317 break 10318 } 10319 off2 := v_0.AuxInt 10320 sym2 := v_0.Aux 10321 base := v_0.Args[0] 10322 val := v.Args[1] 10323 mem := v.Args[2] 10324 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10325 break 10326 } 10327 v.reset(OpS390XMOVDstore) 10328 v.AuxInt = off1 + off2 10329 v.Aux = mergeSym(sym1, sym2) 10330 v.AddArg(base) 10331 v.AddArg(val) 10332 v.AddArg(mem) 10333 return true 10334 } 10335 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 10336 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10337 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 10338 for { 10339 off1 := v.AuxInt 10340 sym1 := v.Aux 10341 v_0 := v.Args[0] 10342 if v_0.Op != OpS390XMOVDaddridx { 10343 break 10344 } 10345 off2 := v_0.AuxInt 10346 sym2 := v_0.Aux 10347 ptr := v_0.Args[0] 10348 idx := v_0.Args[1] 10349 val := v.Args[1] 10350 mem := v.Args[2] 10351 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10352 break 10353 } 10354 v.reset(OpS390XMOVDstoreidx) 10355 v.AuxInt = off1 + off2 10356 v.Aux = mergeSym(sym1, sym2) 10357 v.AddArg(ptr) 10358 v.AddArg(idx) 10359 v.AddArg(val) 10360 v.AddArg(mem) 10361 return true 10362 } 10363 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 10364 // cond: ptr.Op != OpSB 10365 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 10366 for { 10367 off := v.AuxInt 10368 sym := v.Aux 10369 v_0 := v.Args[0] 10370 if v_0.Op != OpS390XADD { 10371 break 10372 } 10373 ptr := v_0.Args[0] 10374 idx := v_0.Args[1] 10375 val := v.Args[1] 10376 mem := v.Args[2] 10377 if !(ptr.Op != OpSB) { 10378 break 10379 } 10380 v.reset(OpS390XMOVDstoreidx) 10381 v.AuxInt = off 10382 v.Aux = sym 10383 v.AddArg(ptr) 10384 v.AddArg(idx) 10385 v.AddArg(val) 10386 v.AddArg(mem) 10387 return true 10388 } 10389 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 10390 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 10391 // result: (STMG2 [i-8] {s} p w0 w1 mem) 10392 for { 10393 i := v.AuxInt 10394 s := v.Aux 10395 p := v.Args[0] 10396 w1 := v.Args[1] 10397 x := v.Args[2] 10398 if x.Op != OpS390XMOVDstore { 10399 break 10400 } 10401 if x.AuxInt != i-8 { 10402 break 10403 } 10404 if x.Aux != s { 10405 break 10406 } 10407 if p != x.Args[0] { 10408 break 10409 } 10410 w0 := x.Args[1] 10411 mem := x.Args[2] 10412 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 10413 break 10414 } 10415 v.reset(OpS390XSTMG2) 10416 v.AuxInt = i - 8 10417 v.Aux = s 10418 v.AddArg(p) 10419 v.AddArg(w0) 10420 v.AddArg(w1) 10421 v.AddArg(mem) 10422 return true 10423 } 10424 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 10425 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 10426 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 10427 for { 10428 i := v.AuxInt 10429 s := v.Aux 10430 p := v.Args[0] 10431 w2 := v.Args[1] 10432 x := v.Args[2] 10433 if x.Op != OpS390XSTMG2 { 10434 break 10435 } 10436 if x.AuxInt != i-16 { 10437 break 10438 } 10439 if x.Aux != s { 10440 break 10441 } 10442 if p != x.Args[0] { 10443 break 10444 } 10445 w0 := x.Args[1] 10446 w1 := x.Args[2] 10447 mem := x.Args[3] 10448 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 10449 break 10450 } 10451 v.reset(OpS390XSTMG3) 10452 v.AuxInt = i - 16 10453 v.Aux = s 10454 v.AddArg(p) 10455 v.AddArg(w0) 10456 v.AddArg(w1) 10457 v.AddArg(w2) 10458 v.AddArg(mem) 10459 return true 10460 } 10461 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 10462 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 10463 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 10464 for { 10465 i := v.AuxInt 10466 s := v.Aux 10467 p := v.Args[0] 10468 w3 := v.Args[1] 10469 x := v.Args[2] 10470 if x.Op != OpS390XSTMG3 { 10471 break 10472 } 10473 if x.AuxInt != i-24 { 10474 break 10475 } 10476 if x.Aux != s { 10477 break 10478 } 10479 if p != x.Args[0] { 10480 break 10481 } 10482 w0 := x.Args[1] 10483 w1 := x.Args[2] 10484 w2 := x.Args[3] 10485 mem := x.Args[4] 10486 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 10487 break 10488 } 10489 v.reset(OpS390XSTMG4) 10490 v.AuxInt = i - 24 10491 v.Aux = s 10492 v.AddArg(p) 10493 v.AddArg(w0) 10494 v.AddArg(w1) 10495 v.AddArg(w2) 10496 v.AddArg(w3) 10497 v.AddArg(mem) 10498 return true 10499 } 10500 return false 10501 } 10502 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 10503 b := v.Block 10504 _ = b 10505 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 10506 // cond: ValAndOff(sc).canAdd(off) 10507 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10508 for { 10509 sc := v.AuxInt 10510 s := v.Aux 10511 v_0 := v.Args[0] 10512 if v_0.Op != OpS390XADDconst { 10513 break 10514 } 10515 off := v_0.AuxInt 10516 ptr := v_0.Args[0] 10517 mem := v.Args[1] 10518 if !(ValAndOff(sc).canAdd(off)) { 10519 break 10520 } 10521 v.reset(OpS390XMOVDstoreconst) 10522 v.AuxInt = ValAndOff(sc).add(off) 10523 v.Aux = s 10524 v.AddArg(ptr) 10525 v.AddArg(mem) 10526 return true 10527 } 10528 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 10529 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 10530 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10531 for { 10532 sc := v.AuxInt 10533 sym1 := v.Aux 10534 v_0 := v.Args[0] 10535 if v_0.Op != OpS390XMOVDaddr { 10536 break 10537 } 10538 off := v_0.AuxInt 10539 sym2 := v_0.Aux 10540 ptr := v_0.Args[0] 10541 mem := v.Args[1] 10542 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 10543 break 10544 } 10545 v.reset(OpS390XMOVDstoreconst) 10546 v.AuxInt = ValAndOff(sc).add(off) 10547 v.Aux = mergeSym(sym1, sym2) 10548 v.AddArg(ptr) 10549 v.AddArg(mem) 10550 return true 10551 } 10552 return false 10553 } 10554 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 10555 b := v.Block 10556 _ = b 10557 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 10558 // cond: 10559 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10560 for { 10561 c := v.AuxInt 10562 sym := v.Aux 10563 v_0 := v.Args[0] 10564 if v_0.Op != OpS390XADDconst { 10565 break 10566 } 10567 d := v_0.AuxInt 10568 ptr := v_0.Args[0] 10569 idx := v.Args[1] 10570 val := v.Args[2] 10571 mem := v.Args[3] 10572 v.reset(OpS390XMOVDstoreidx) 10573 v.AuxInt = c + d 10574 v.Aux = sym 10575 v.AddArg(ptr) 10576 v.AddArg(idx) 10577 v.AddArg(val) 10578 v.AddArg(mem) 10579 return true 10580 } 10581 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 10582 // cond: 10583 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10584 for { 10585 c := v.AuxInt 10586 sym := v.Aux 10587 ptr := v.Args[0] 10588 v_1 := v.Args[1] 10589 if v_1.Op != OpS390XADDconst { 10590 break 10591 } 10592 d := v_1.AuxInt 10593 idx := v_1.Args[0] 10594 val := v.Args[2] 10595 mem := v.Args[3] 10596 v.reset(OpS390XMOVDstoreidx) 10597 v.AuxInt = c + d 10598 v.Aux = sym 10599 v.AddArg(ptr) 10600 v.AddArg(idx) 10601 v.AddArg(val) 10602 v.AddArg(mem) 10603 return true 10604 } 10605 return false 10606 } 10607 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 10608 b := v.Block 10609 _ = b 10610 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10611 // cond: x.Uses == 1 && clobber(x) 10612 // result: (MOVWBRstore [i-2] {s} p w mem) 10613 for { 10614 i := v.AuxInt 10615 s := v.Aux 10616 p := v.Args[0] 10617 v_1 := v.Args[1] 10618 if v_1.Op != OpS390XSRDconst { 10619 break 10620 } 10621 if v_1.AuxInt != 16 { 10622 break 10623 } 10624 w := v_1.Args[0] 10625 x := v.Args[2] 10626 if x.Op != OpS390XMOVHBRstore { 10627 break 10628 } 10629 if x.AuxInt != i-2 { 10630 break 10631 } 10632 if x.Aux != s { 10633 break 10634 } 10635 if p != x.Args[0] { 10636 break 10637 } 10638 if w != x.Args[1] { 10639 break 10640 } 10641 mem := x.Args[2] 10642 if !(x.Uses == 1 && clobber(x)) { 10643 break 10644 } 10645 v.reset(OpS390XMOVWBRstore) 10646 v.AuxInt = i - 2 10647 v.Aux = s 10648 v.AddArg(p) 10649 v.AddArg(w) 10650 v.AddArg(mem) 10651 return true 10652 } 10653 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 10654 // cond: x.Uses == 1 && clobber(x) 10655 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10656 for { 10657 i := v.AuxInt 10658 s := v.Aux 10659 p := v.Args[0] 10660 v_1 := v.Args[1] 10661 if v_1.Op != OpS390XSRDconst { 10662 break 10663 } 10664 j := v_1.AuxInt 10665 w := v_1.Args[0] 10666 x := v.Args[2] 10667 if x.Op != OpS390XMOVHBRstore { 10668 break 10669 } 10670 if x.AuxInt != i-2 { 10671 break 10672 } 10673 if x.Aux != s { 10674 break 10675 } 10676 if p != x.Args[0] { 10677 break 10678 } 10679 w0 := x.Args[1] 10680 if w0.Op != OpS390XSRDconst { 10681 break 10682 } 10683 if w0.AuxInt != j-16 { 10684 break 10685 } 10686 if w != w0.Args[0] { 10687 break 10688 } 10689 mem := x.Args[2] 10690 if !(x.Uses == 1 && clobber(x)) { 10691 break 10692 } 10693 v.reset(OpS390XMOVWBRstore) 10694 v.AuxInt = i - 2 10695 v.Aux = s 10696 v.AddArg(p) 10697 v.AddArg(w0) 10698 v.AddArg(mem) 10699 return true 10700 } 10701 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10702 // cond: x.Uses == 1 && clobber(x) 10703 // result: (MOVWBRstore [i-2] {s} p w mem) 10704 for { 10705 i := v.AuxInt 10706 s := v.Aux 10707 p := v.Args[0] 10708 v_1 := v.Args[1] 10709 if v_1.Op != OpS390XSRWconst { 10710 break 10711 } 10712 if v_1.AuxInt != 16 { 10713 break 10714 } 10715 w := v_1.Args[0] 10716 x := v.Args[2] 10717 if x.Op != OpS390XMOVHBRstore { 10718 break 10719 } 10720 if x.AuxInt != i-2 { 10721 break 10722 } 10723 if x.Aux != s { 10724 break 10725 } 10726 if p != x.Args[0] { 10727 break 10728 } 10729 if w != x.Args[1] { 10730 break 10731 } 10732 mem := x.Args[2] 10733 if !(x.Uses == 1 && clobber(x)) { 10734 break 10735 } 10736 v.reset(OpS390XMOVWBRstore) 10737 v.AuxInt = i - 2 10738 v.Aux = s 10739 v.AddArg(p) 10740 v.AddArg(w) 10741 v.AddArg(mem) 10742 return true 10743 } 10744 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 10745 // cond: x.Uses == 1 && clobber(x) 10746 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10747 for { 10748 i := v.AuxInt 10749 s := v.Aux 10750 p := v.Args[0] 10751 v_1 := v.Args[1] 10752 if v_1.Op != OpS390XSRWconst { 10753 break 10754 } 10755 j := v_1.AuxInt 10756 w := v_1.Args[0] 10757 x := v.Args[2] 10758 if x.Op != OpS390XMOVHBRstore { 10759 break 10760 } 10761 if x.AuxInt != i-2 { 10762 break 10763 } 10764 if x.Aux != s { 10765 break 10766 } 10767 if p != x.Args[0] { 10768 break 10769 } 10770 w0 := x.Args[1] 10771 if w0.Op != OpS390XSRWconst { 10772 break 10773 } 10774 if w0.AuxInt != j-16 { 10775 break 10776 } 10777 if w != w0.Args[0] { 10778 break 10779 } 10780 mem := x.Args[2] 10781 if !(x.Uses == 1 && clobber(x)) { 10782 break 10783 } 10784 v.reset(OpS390XMOVWBRstore) 10785 v.AuxInt = i - 2 10786 v.Aux = s 10787 v.AddArg(p) 10788 v.AddArg(w0) 10789 v.AddArg(mem) 10790 return true 10791 } 10792 return false 10793 } 10794 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 10795 b := v.Block 10796 _ = b 10797 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10798 // cond: x.Uses == 1 && clobber(x) 10799 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10800 for { 10801 i := v.AuxInt 10802 s := v.Aux 10803 p := v.Args[0] 10804 idx := v.Args[1] 10805 v_2 := v.Args[2] 10806 if v_2.Op != OpS390XSRDconst { 10807 break 10808 } 10809 if v_2.AuxInt != 16 { 10810 break 10811 } 10812 w := v_2.Args[0] 10813 x := v.Args[3] 10814 if x.Op != OpS390XMOVHBRstoreidx { 10815 break 10816 } 10817 if x.AuxInt != i-2 { 10818 break 10819 } 10820 if x.Aux != s { 10821 break 10822 } 10823 if p != x.Args[0] { 10824 break 10825 } 10826 if idx != x.Args[1] { 10827 break 10828 } 10829 if w != x.Args[2] { 10830 break 10831 } 10832 mem := x.Args[3] 10833 if !(x.Uses == 1 && clobber(x)) { 10834 break 10835 } 10836 v.reset(OpS390XMOVWBRstoreidx) 10837 v.AuxInt = i - 2 10838 v.Aux = s 10839 v.AddArg(p) 10840 v.AddArg(idx) 10841 v.AddArg(w) 10842 v.AddArg(mem) 10843 return true 10844 } 10845 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 10846 // cond: x.Uses == 1 && clobber(x) 10847 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10848 for { 10849 i := v.AuxInt 10850 s := v.Aux 10851 p := v.Args[0] 10852 idx := v.Args[1] 10853 v_2 := v.Args[2] 10854 if v_2.Op != OpS390XSRDconst { 10855 break 10856 } 10857 j := v_2.AuxInt 10858 w := v_2.Args[0] 10859 x := v.Args[3] 10860 if x.Op != OpS390XMOVHBRstoreidx { 10861 break 10862 } 10863 if x.AuxInt != i-2 { 10864 break 10865 } 10866 if x.Aux != s { 10867 break 10868 } 10869 if p != x.Args[0] { 10870 break 10871 } 10872 if idx != x.Args[1] { 10873 break 10874 } 10875 w0 := x.Args[2] 10876 if w0.Op != OpS390XSRDconst { 10877 break 10878 } 10879 if w0.AuxInt != j-16 { 10880 break 10881 } 10882 if w != w0.Args[0] { 10883 break 10884 } 10885 mem := x.Args[3] 10886 if !(x.Uses == 1 && clobber(x)) { 10887 break 10888 } 10889 v.reset(OpS390XMOVWBRstoreidx) 10890 v.AuxInt = i - 2 10891 v.Aux = s 10892 v.AddArg(p) 10893 v.AddArg(idx) 10894 v.AddArg(w0) 10895 v.AddArg(mem) 10896 return true 10897 } 10898 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10899 // cond: x.Uses == 1 && clobber(x) 10900 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10901 for { 10902 i := v.AuxInt 10903 s := v.Aux 10904 p := v.Args[0] 10905 idx := v.Args[1] 10906 v_2 := v.Args[2] 10907 if v_2.Op != OpS390XSRWconst { 10908 break 10909 } 10910 if v_2.AuxInt != 16 { 10911 break 10912 } 10913 w := v_2.Args[0] 10914 x := v.Args[3] 10915 if x.Op != OpS390XMOVHBRstoreidx { 10916 break 10917 } 10918 if x.AuxInt != i-2 { 10919 break 10920 } 10921 if x.Aux != s { 10922 break 10923 } 10924 if p != x.Args[0] { 10925 break 10926 } 10927 if idx != x.Args[1] { 10928 break 10929 } 10930 if w != x.Args[2] { 10931 break 10932 } 10933 mem := x.Args[3] 10934 if !(x.Uses == 1 && clobber(x)) { 10935 break 10936 } 10937 v.reset(OpS390XMOVWBRstoreidx) 10938 v.AuxInt = i - 2 10939 v.Aux = s 10940 v.AddArg(p) 10941 v.AddArg(idx) 10942 v.AddArg(w) 10943 v.AddArg(mem) 10944 return true 10945 } 10946 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 10947 // cond: x.Uses == 1 && clobber(x) 10948 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10949 for { 10950 i := v.AuxInt 10951 s := v.Aux 10952 p := v.Args[0] 10953 idx := v.Args[1] 10954 v_2 := v.Args[2] 10955 if v_2.Op != OpS390XSRWconst { 10956 break 10957 } 10958 j := v_2.AuxInt 10959 w := v_2.Args[0] 10960 x := v.Args[3] 10961 if x.Op != OpS390XMOVHBRstoreidx { 10962 break 10963 } 10964 if x.AuxInt != i-2 { 10965 break 10966 } 10967 if x.Aux != s { 10968 break 10969 } 10970 if p != x.Args[0] { 10971 break 10972 } 10973 if idx != x.Args[1] { 10974 break 10975 } 10976 w0 := x.Args[2] 10977 if w0.Op != OpS390XSRWconst { 10978 break 10979 } 10980 if w0.AuxInt != j-16 { 10981 break 10982 } 10983 if w != w0.Args[0] { 10984 break 10985 } 10986 mem := x.Args[3] 10987 if !(x.Uses == 1 && clobber(x)) { 10988 break 10989 } 10990 v.reset(OpS390XMOVWBRstoreidx) 10991 v.AuxInt = i - 2 10992 v.Aux = s 10993 v.AddArg(p) 10994 v.AddArg(idx) 10995 v.AddArg(w0) 10996 v.AddArg(mem) 10997 return true 10998 } 10999 return false 11000 } 11001 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 11002 b := v.Block 11003 _ = b 11004 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 11005 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 11006 // result: x 11007 for { 11008 off := v.AuxInt 11009 sym := v.Aux 11010 ptr := v.Args[0] 11011 v_1 := v.Args[1] 11012 if v_1.Op != OpS390XMOVHstore { 11013 break 11014 } 11015 off2 := v_1.AuxInt 11016 sym2 := v_1.Aux 11017 ptr2 := v_1.Args[0] 11018 x := v_1.Args[1] 11019 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 11020 break 11021 } 11022 v.reset(OpCopy) 11023 v.Type = x.Type 11024 v.AddArg(x) 11025 return true 11026 } 11027 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 11028 // cond: is32Bit(off1+off2) 11029 // result: (MOVHZload [off1+off2] {sym} ptr mem) 11030 for { 11031 off1 := v.AuxInt 11032 sym := v.Aux 11033 v_0 := v.Args[0] 11034 if v_0.Op != OpS390XADDconst { 11035 break 11036 } 11037 off2 := v_0.AuxInt 11038 ptr := v_0.Args[0] 11039 mem := v.Args[1] 11040 if !(is32Bit(off1 + off2)) { 11041 break 11042 } 11043 v.reset(OpS390XMOVHZload) 11044 v.AuxInt = off1 + off2 11045 v.Aux = sym 11046 v.AddArg(ptr) 11047 v.AddArg(mem) 11048 return true 11049 } 11050 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11051 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11052 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11053 for { 11054 off1 := v.AuxInt 11055 sym1 := v.Aux 11056 v_0 := v.Args[0] 11057 if v_0.Op != OpS390XMOVDaddr { 11058 break 11059 } 11060 off2 := v_0.AuxInt 11061 sym2 := v_0.Aux 11062 base := v_0.Args[0] 11063 mem := v.Args[1] 11064 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11065 break 11066 } 11067 v.reset(OpS390XMOVHZload) 11068 v.AuxInt = off1 + off2 11069 v.Aux = mergeSym(sym1, sym2) 11070 v.AddArg(base) 11071 v.AddArg(mem) 11072 return true 11073 } 11074 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 11075 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11076 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 11077 for { 11078 off1 := v.AuxInt 11079 sym1 := v.Aux 11080 v_0 := v.Args[0] 11081 if v_0.Op != OpS390XMOVDaddridx { 11082 break 11083 } 11084 off2 := v_0.AuxInt 11085 sym2 := v_0.Aux 11086 ptr := v_0.Args[0] 11087 idx := v_0.Args[1] 11088 mem := v.Args[1] 11089 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11090 break 11091 } 11092 v.reset(OpS390XMOVHZloadidx) 11093 v.AuxInt = off1 + off2 11094 v.Aux = mergeSym(sym1, sym2) 11095 v.AddArg(ptr) 11096 v.AddArg(idx) 11097 v.AddArg(mem) 11098 return true 11099 } 11100 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11101 // cond: ptr.Op != OpSB 11102 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11103 for { 11104 off := v.AuxInt 11105 sym := v.Aux 11106 v_0 := v.Args[0] 11107 if v_0.Op != OpS390XADD { 11108 break 11109 } 11110 ptr := v_0.Args[0] 11111 idx := v_0.Args[1] 11112 mem := v.Args[1] 11113 if !(ptr.Op != OpSB) { 11114 break 11115 } 11116 v.reset(OpS390XMOVHZloadidx) 11117 v.AuxInt = off 11118 v.Aux = sym 11119 v.AddArg(ptr) 11120 v.AddArg(idx) 11121 v.AddArg(mem) 11122 return true 11123 } 11124 return false 11125 } 11126 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11127 b := v.Block 11128 _ = b 11129 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11130 // cond: 11131 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11132 for { 11133 c := v.AuxInt 11134 sym := v.Aux 11135 v_0 := v.Args[0] 11136 if v_0.Op != OpS390XADDconst { 11137 break 11138 } 11139 d := v_0.AuxInt 11140 ptr := v_0.Args[0] 11141 idx := v.Args[1] 11142 mem := v.Args[2] 11143 v.reset(OpS390XMOVHZloadidx) 11144 v.AuxInt = c + d 11145 v.Aux = sym 11146 v.AddArg(ptr) 11147 v.AddArg(idx) 11148 v.AddArg(mem) 11149 return true 11150 } 11151 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11152 // cond: 11153 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11154 for { 11155 c := v.AuxInt 11156 sym := v.Aux 11157 ptr := v.Args[0] 11158 v_1 := v.Args[1] 11159 if v_1.Op != OpS390XADDconst { 11160 break 11161 } 11162 d := v_1.AuxInt 11163 idx := v_1.Args[0] 11164 mem := v.Args[2] 11165 v.reset(OpS390XMOVHZloadidx) 11166 v.AuxInt = c + d 11167 v.Aux = sym 11168 v.AddArg(ptr) 11169 v.AddArg(idx) 11170 v.AddArg(mem) 11171 return true 11172 } 11173 return false 11174 } 11175 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11176 b := v.Block 11177 _ = b 11178 // match: (MOVHZreg x:(MOVBZload _ _)) 11179 // cond: 11180 // result: x 11181 for { 11182 x := v.Args[0] 11183 if x.Op != OpS390XMOVBZload { 11184 break 11185 } 11186 v.reset(OpCopy) 11187 v.Type = x.Type 11188 v.AddArg(x) 11189 return true 11190 } 11191 // match: (MOVHZreg x:(MOVHZload _ _)) 11192 // cond: 11193 // result: x 11194 for { 11195 x := v.Args[0] 11196 if x.Op != OpS390XMOVHZload { 11197 break 11198 } 11199 v.reset(OpCopy) 11200 v.Type = x.Type 11201 v.AddArg(x) 11202 return true 11203 } 11204 // match: (MOVHZreg x:(Arg <t>)) 11205 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11206 // result: x 11207 for { 11208 x := v.Args[0] 11209 if x.Op != OpArg { 11210 break 11211 } 11212 t := x.Type 11213 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11214 break 11215 } 11216 v.reset(OpCopy) 11217 v.Type = x.Type 11218 v.AddArg(x) 11219 return true 11220 } 11221 // match: (MOVHZreg x:(MOVBZreg _)) 11222 // cond: 11223 // result: x 11224 for { 11225 x := v.Args[0] 11226 if x.Op != OpS390XMOVBZreg { 11227 break 11228 } 11229 v.reset(OpCopy) 11230 v.Type = x.Type 11231 v.AddArg(x) 11232 return true 11233 } 11234 // match: (MOVHZreg x:(MOVHZreg _)) 11235 // cond: 11236 // result: x 11237 for { 11238 x := v.Args[0] 11239 if x.Op != OpS390XMOVHZreg { 11240 break 11241 } 11242 v.reset(OpCopy) 11243 v.Type = x.Type 11244 v.AddArg(x) 11245 return true 11246 } 11247 // match: (MOVHZreg (MOVDconst [c])) 11248 // cond: 11249 // result: (MOVDconst [int64(uint16(c))]) 11250 for { 11251 v_0 := v.Args[0] 11252 if v_0.Op != OpS390XMOVDconst { 11253 break 11254 } 11255 c := v_0.AuxInt 11256 v.reset(OpS390XMOVDconst) 11257 v.AuxInt = int64(uint16(c)) 11258 return true 11259 } 11260 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11261 // cond: x.Uses == 1 && clobber(x) 11262 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11263 for { 11264 x := v.Args[0] 11265 if x.Op != OpS390XMOVHZload { 11266 break 11267 } 11268 off := x.AuxInt 11269 sym := x.Aux 11270 ptr := x.Args[0] 11271 mem := x.Args[1] 11272 if !(x.Uses == 1 && clobber(x)) { 11273 break 11274 } 11275 b = x.Block 11276 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, v.Type) 11277 v.reset(OpCopy) 11278 v.AddArg(v0) 11279 v0.AuxInt = off 11280 v0.Aux = sym 11281 v0.AddArg(ptr) 11282 v0.AddArg(mem) 11283 return true 11284 } 11285 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11286 // cond: x.Uses == 1 && clobber(x) 11287 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11288 for { 11289 x := v.Args[0] 11290 if x.Op != OpS390XMOVHZloadidx { 11291 break 11292 } 11293 off := x.AuxInt 11294 sym := x.Aux 11295 ptr := x.Args[0] 11296 idx := x.Args[1] 11297 mem := x.Args[2] 11298 if !(x.Uses == 1 && clobber(x)) { 11299 break 11300 } 11301 b = x.Block 11302 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 11303 v.reset(OpCopy) 11304 v.AddArg(v0) 11305 v0.AuxInt = off 11306 v0.Aux = sym 11307 v0.AddArg(ptr) 11308 v0.AddArg(idx) 11309 v0.AddArg(mem) 11310 return true 11311 } 11312 return false 11313 } 11314 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11315 b := v.Block 11316 _ = b 11317 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11318 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11319 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11320 for { 11321 off1 := v.AuxInt 11322 sym1 := v.Aux 11323 v_0 := v.Args[0] 11324 if v_0.Op != OpS390XMOVDaddr { 11325 break 11326 } 11327 off2 := v_0.AuxInt 11328 sym2 := v_0.Aux 11329 base := v_0.Args[0] 11330 mem := v.Args[1] 11331 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11332 break 11333 } 11334 v.reset(OpS390XMOVHload) 11335 v.AuxInt = off1 + off2 11336 v.Aux = mergeSym(sym1, sym2) 11337 v.AddArg(base) 11338 v.AddArg(mem) 11339 return true 11340 } 11341 return false 11342 } 11343 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 11344 b := v.Block 11345 _ = b 11346 // match: (MOVHreg x:(MOVBload _ _)) 11347 // cond: 11348 // result: x 11349 for { 11350 x := v.Args[0] 11351 if x.Op != OpS390XMOVBload { 11352 break 11353 } 11354 v.reset(OpCopy) 11355 v.Type = x.Type 11356 v.AddArg(x) 11357 return true 11358 } 11359 // match: (MOVHreg x:(MOVBZload _ _)) 11360 // cond: 11361 // result: x 11362 for { 11363 x := v.Args[0] 11364 if x.Op != OpS390XMOVBZload { 11365 break 11366 } 11367 v.reset(OpCopy) 11368 v.Type = x.Type 11369 v.AddArg(x) 11370 return true 11371 } 11372 // match: (MOVHreg x:(MOVHload _ _)) 11373 // cond: 11374 // result: x 11375 for { 11376 x := v.Args[0] 11377 if x.Op != OpS390XMOVHload { 11378 break 11379 } 11380 v.reset(OpCopy) 11381 v.Type = x.Type 11382 v.AddArg(x) 11383 return true 11384 } 11385 // match: (MOVHreg x:(Arg <t>)) 11386 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 11387 // result: x 11388 for { 11389 x := v.Args[0] 11390 if x.Op != OpArg { 11391 break 11392 } 11393 t := x.Type 11394 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 11395 break 11396 } 11397 v.reset(OpCopy) 11398 v.Type = x.Type 11399 v.AddArg(x) 11400 return true 11401 } 11402 // match: (MOVHreg x:(MOVBreg _)) 11403 // cond: 11404 // result: x 11405 for { 11406 x := v.Args[0] 11407 if x.Op != OpS390XMOVBreg { 11408 break 11409 } 11410 v.reset(OpCopy) 11411 v.Type = x.Type 11412 v.AddArg(x) 11413 return true 11414 } 11415 // match: (MOVHreg x:(MOVBZreg _)) 11416 // cond: 11417 // result: x 11418 for { 11419 x := v.Args[0] 11420 if x.Op != OpS390XMOVBZreg { 11421 break 11422 } 11423 v.reset(OpCopy) 11424 v.Type = x.Type 11425 v.AddArg(x) 11426 return true 11427 } 11428 // match: (MOVHreg x:(MOVHreg _)) 11429 // cond: 11430 // result: x 11431 for { 11432 x := v.Args[0] 11433 if x.Op != OpS390XMOVHreg { 11434 break 11435 } 11436 v.reset(OpCopy) 11437 v.Type = x.Type 11438 v.AddArg(x) 11439 return true 11440 } 11441 // match: (MOVHreg (MOVDconst [c])) 11442 // cond: 11443 // result: (MOVDconst [int64(int16(c))]) 11444 for { 11445 v_0 := v.Args[0] 11446 if v_0.Op != OpS390XMOVDconst { 11447 break 11448 } 11449 c := v_0.AuxInt 11450 v.reset(OpS390XMOVDconst) 11451 v.AuxInt = int64(int16(c)) 11452 return true 11453 } 11454 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 11455 // cond: x.Uses == 1 && clobber(x) 11456 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 11457 for { 11458 x := v.Args[0] 11459 if x.Op != OpS390XMOVHZload { 11460 break 11461 } 11462 off := x.AuxInt 11463 sym := x.Aux 11464 ptr := x.Args[0] 11465 mem := x.Args[1] 11466 if !(x.Uses == 1 && clobber(x)) { 11467 break 11468 } 11469 b = x.Block 11470 v0 := b.NewValue0(v.Line, OpS390XMOVHload, v.Type) 11471 v.reset(OpCopy) 11472 v.AddArg(v0) 11473 v0.AuxInt = off 11474 v0.Aux = sym 11475 v0.AddArg(ptr) 11476 v0.AddArg(mem) 11477 return true 11478 } 11479 return false 11480 } 11481 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 11482 b := v.Block 11483 _ = b 11484 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 11485 // cond: 11486 // result: (MOVHstore [off] {sym} ptr x mem) 11487 for { 11488 off := v.AuxInt 11489 sym := v.Aux 11490 ptr := v.Args[0] 11491 v_1 := v.Args[1] 11492 if v_1.Op != OpS390XMOVHreg { 11493 break 11494 } 11495 x := v_1.Args[0] 11496 mem := v.Args[2] 11497 v.reset(OpS390XMOVHstore) 11498 v.AuxInt = off 11499 v.Aux = sym 11500 v.AddArg(ptr) 11501 v.AddArg(x) 11502 v.AddArg(mem) 11503 return true 11504 } 11505 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 11506 // cond: 11507 // result: (MOVHstore [off] {sym} ptr x mem) 11508 for { 11509 off := v.AuxInt 11510 sym := v.Aux 11511 ptr := v.Args[0] 11512 v_1 := v.Args[1] 11513 if v_1.Op != OpS390XMOVHZreg { 11514 break 11515 } 11516 x := v_1.Args[0] 11517 mem := v.Args[2] 11518 v.reset(OpS390XMOVHstore) 11519 v.AuxInt = off 11520 v.Aux = sym 11521 v.AddArg(ptr) 11522 v.AddArg(x) 11523 v.AddArg(mem) 11524 return true 11525 } 11526 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 11527 // cond: is32Bit(off1+off2) 11528 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 11529 for { 11530 off1 := v.AuxInt 11531 sym := v.Aux 11532 v_0 := v.Args[0] 11533 if v_0.Op != OpS390XADDconst { 11534 break 11535 } 11536 off2 := v_0.AuxInt 11537 ptr := v_0.Args[0] 11538 val := v.Args[1] 11539 mem := v.Args[2] 11540 if !(is32Bit(off1 + off2)) { 11541 break 11542 } 11543 v.reset(OpS390XMOVHstore) 11544 v.AuxInt = off1 + off2 11545 v.Aux = sym 11546 v.AddArg(ptr) 11547 v.AddArg(val) 11548 v.AddArg(mem) 11549 return true 11550 } 11551 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 11552 // cond: validOff(off) && ptr.Op != OpSB 11553 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 11554 for { 11555 off := v.AuxInt 11556 sym := v.Aux 11557 ptr := v.Args[0] 11558 v_1 := v.Args[1] 11559 if v_1.Op != OpS390XMOVDconst { 11560 break 11561 } 11562 c := v_1.AuxInt 11563 mem := v.Args[2] 11564 if !(validOff(off) && ptr.Op != OpSB) { 11565 break 11566 } 11567 v.reset(OpS390XMOVHstoreconst) 11568 v.AuxInt = makeValAndOff(int64(int16(c)), off) 11569 v.Aux = sym 11570 v.AddArg(ptr) 11571 v.AddArg(mem) 11572 return true 11573 } 11574 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 11575 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11576 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 11577 for { 11578 off1 := v.AuxInt 11579 sym1 := v.Aux 11580 v_0 := v.Args[0] 11581 if v_0.Op != OpS390XMOVDaddr { 11582 break 11583 } 11584 off2 := v_0.AuxInt 11585 sym2 := v_0.Aux 11586 base := v_0.Args[0] 11587 val := v.Args[1] 11588 mem := v.Args[2] 11589 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11590 break 11591 } 11592 v.reset(OpS390XMOVHstore) 11593 v.AuxInt = off1 + off2 11594 v.Aux = mergeSym(sym1, sym2) 11595 v.AddArg(base) 11596 v.AddArg(val) 11597 v.AddArg(mem) 11598 return true 11599 } 11600 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11601 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11602 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11603 for { 11604 off1 := v.AuxInt 11605 sym1 := v.Aux 11606 v_0 := v.Args[0] 11607 if v_0.Op != OpS390XMOVDaddridx { 11608 break 11609 } 11610 off2 := v_0.AuxInt 11611 sym2 := v_0.Aux 11612 ptr := v_0.Args[0] 11613 idx := v_0.Args[1] 11614 val := v.Args[1] 11615 mem := v.Args[2] 11616 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11617 break 11618 } 11619 v.reset(OpS390XMOVHstoreidx) 11620 v.AuxInt = off1 + off2 11621 v.Aux = mergeSym(sym1, sym2) 11622 v.AddArg(ptr) 11623 v.AddArg(idx) 11624 v.AddArg(val) 11625 v.AddArg(mem) 11626 return true 11627 } 11628 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 11629 // cond: ptr.Op != OpSB 11630 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 11631 for { 11632 off := v.AuxInt 11633 sym := v.Aux 11634 v_0 := v.Args[0] 11635 if v_0.Op != OpS390XADD { 11636 break 11637 } 11638 ptr := v_0.Args[0] 11639 idx := v_0.Args[1] 11640 val := v.Args[1] 11641 mem := v.Args[2] 11642 if !(ptr.Op != OpSB) { 11643 break 11644 } 11645 v.reset(OpS390XMOVHstoreidx) 11646 v.AuxInt = off 11647 v.Aux = sym 11648 v.AddArg(ptr) 11649 v.AddArg(idx) 11650 v.AddArg(val) 11651 v.AddArg(mem) 11652 return true 11653 } 11654 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 11655 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11656 // result: (MOVWstore [i-2] {s} p w mem) 11657 for { 11658 i := v.AuxInt 11659 s := v.Aux 11660 p := v.Args[0] 11661 w := v.Args[1] 11662 x := v.Args[2] 11663 if x.Op != OpS390XMOVHstore { 11664 break 11665 } 11666 if x.AuxInt != i-2 { 11667 break 11668 } 11669 if x.Aux != s { 11670 break 11671 } 11672 if p != x.Args[0] { 11673 break 11674 } 11675 x_1 := x.Args[1] 11676 if x_1.Op != OpS390XSRDconst { 11677 break 11678 } 11679 if x_1.AuxInt != 16 { 11680 break 11681 } 11682 if w != x_1.Args[0] { 11683 break 11684 } 11685 mem := x.Args[2] 11686 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11687 break 11688 } 11689 v.reset(OpS390XMOVWstore) 11690 v.AuxInt = i - 2 11691 v.Aux = s 11692 v.AddArg(p) 11693 v.AddArg(w) 11694 v.AddArg(mem) 11695 return true 11696 } 11697 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 11698 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11699 // result: (MOVWstore [i-2] {s} p w0 mem) 11700 for { 11701 i := v.AuxInt 11702 s := v.Aux 11703 p := v.Args[0] 11704 w0 := v.Args[1] 11705 if w0.Op != OpS390XSRDconst { 11706 break 11707 } 11708 j := w0.AuxInt 11709 w := w0.Args[0] 11710 x := v.Args[2] 11711 if x.Op != OpS390XMOVHstore { 11712 break 11713 } 11714 if x.AuxInt != i-2 { 11715 break 11716 } 11717 if x.Aux != s { 11718 break 11719 } 11720 if p != x.Args[0] { 11721 break 11722 } 11723 x_1 := x.Args[1] 11724 if x_1.Op != OpS390XSRDconst { 11725 break 11726 } 11727 if x_1.AuxInt != j+16 { 11728 break 11729 } 11730 if w != x_1.Args[0] { 11731 break 11732 } 11733 mem := x.Args[2] 11734 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11735 break 11736 } 11737 v.reset(OpS390XMOVWstore) 11738 v.AuxInt = i - 2 11739 v.Aux = s 11740 v.AddArg(p) 11741 v.AddArg(w0) 11742 v.AddArg(mem) 11743 return true 11744 } 11745 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 11746 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11747 // result: (MOVWstore [i-2] {s} p w mem) 11748 for { 11749 i := v.AuxInt 11750 s := v.Aux 11751 p := v.Args[0] 11752 w := v.Args[1] 11753 x := v.Args[2] 11754 if x.Op != OpS390XMOVHstore { 11755 break 11756 } 11757 if x.AuxInt != i-2 { 11758 break 11759 } 11760 if x.Aux != s { 11761 break 11762 } 11763 if p != x.Args[0] { 11764 break 11765 } 11766 x_1 := x.Args[1] 11767 if x_1.Op != OpS390XSRWconst { 11768 break 11769 } 11770 if x_1.AuxInt != 16 { 11771 break 11772 } 11773 if w != x_1.Args[0] { 11774 break 11775 } 11776 mem := x.Args[2] 11777 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11778 break 11779 } 11780 v.reset(OpS390XMOVWstore) 11781 v.AuxInt = i - 2 11782 v.Aux = s 11783 v.AddArg(p) 11784 v.AddArg(w) 11785 v.AddArg(mem) 11786 return true 11787 } 11788 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 11789 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11790 // result: (MOVWstore [i-2] {s} p w0 mem) 11791 for { 11792 i := v.AuxInt 11793 s := v.Aux 11794 p := v.Args[0] 11795 w0 := v.Args[1] 11796 if w0.Op != OpS390XSRWconst { 11797 break 11798 } 11799 j := w0.AuxInt 11800 w := w0.Args[0] 11801 x := v.Args[2] 11802 if x.Op != OpS390XMOVHstore { 11803 break 11804 } 11805 if x.AuxInt != i-2 { 11806 break 11807 } 11808 if x.Aux != s { 11809 break 11810 } 11811 if p != x.Args[0] { 11812 break 11813 } 11814 x_1 := x.Args[1] 11815 if x_1.Op != OpS390XSRWconst { 11816 break 11817 } 11818 if x_1.AuxInt != j+16 { 11819 break 11820 } 11821 if w != x_1.Args[0] { 11822 break 11823 } 11824 mem := x.Args[2] 11825 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11826 break 11827 } 11828 v.reset(OpS390XMOVWstore) 11829 v.AuxInt = i - 2 11830 v.Aux = s 11831 v.AddArg(p) 11832 v.AddArg(w0) 11833 v.AddArg(mem) 11834 return true 11835 } 11836 return false 11837 } 11838 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 11839 b := v.Block 11840 _ = b 11841 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11842 // cond: ValAndOff(sc).canAdd(off) 11843 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11844 for { 11845 sc := v.AuxInt 11846 s := v.Aux 11847 v_0 := v.Args[0] 11848 if v_0.Op != OpS390XADDconst { 11849 break 11850 } 11851 off := v_0.AuxInt 11852 ptr := v_0.Args[0] 11853 mem := v.Args[1] 11854 if !(ValAndOff(sc).canAdd(off)) { 11855 break 11856 } 11857 v.reset(OpS390XMOVHstoreconst) 11858 v.AuxInt = ValAndOff(sc).add(off) 11859 v.Aux = s 11860 v.AddArg(ptr) 11861 v.AddArg(mem) 11862 return true 11863 } 11864 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11865 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11866 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11867 for { 11868 sc := v.AuxInt 11869 sym1 := v.Aux 11870 v_0 := v.Args[0] 11871 if v_0.Op != OpS390XMOVDaddr { 11872 break 11873 } 11874 off := v_0.AuxInt 11875 sym2 := v_0.Aux 11876 ptr := v_0.Args[0] 11877 mem := v.Args[1] 11878 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11879 break 11880 } 11881 v.reset(OpS390XMOVHstoreconst) 11882 v.AuxInt = ValAndOff(sc).add(off) 11883 v.Aux = mergeSym(sym1, sym2) 11884 v.AddArg(ptr) 11885 v.AddArg(mem) 11886 return true 11887 } 11888 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 11889 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 11890 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 11891 for { 11892 c := v.AuxInt 11893 s := v.Aux 11894 p := v.Args[0] 11895 x := v.Args[1] 11896 if x.Op != OpS390XMOVHstoreconst { 11897 break 11898 } 11899 a := x.AuxInt 11900 if x.Aux != s { 11901 break 11902 } 11903 if p != x.Args[0] { 11904 break 11905 } 11906 mem := x.Args[1] 11907 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 11908 break 11909 } 11910 v.reset(OpS390XMOVWstoreconst) 11911 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 11912 v.Aux = s 11913 v.AddArg(p) 11914 v.AddArg(mem) 11915 return true 11916 } 11917 return false 11918 } 11919 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 11920 b := v.Block 11921 _ = b 11922 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11923 // cond: 11924 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11925 for { 11926 c := v.AuxInt 11927 sym := v.Aux 11928 v_0 := v.Args[0] 11929 if v_0.Op != OpS390XADDconst { 11930 break 11931 } 11932 d := v_0.AuxInt 11933 ptr := v_0.Args[0] 11934 idx := v.Args[1] 11935 val := v.Args[2] 11936 mem := v.Args[3] 11937 v.reset(OpS390XMOVHstoreidx) 11938 v.AuxInt = c + d 11939 v.Aux = sym 11940 v.AddArg(ptr) 11941 v.AddArg(idx) 11942 v.AddArg(val) 11943 v.AddArg(mem) 11944 return true 11945 } 11946 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11947 // cond: 11948 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11949 for { 11950 c := v.AuxInt 11951 sym := v.Aux 11952 ptr := v.Args[0] 11953 v_1 := v.Args[1] 11954 if v_1.Op != OpS390XADDconst { 11955 break 11956 } 11957 d := v_1.AuxInt 11958 idx := v_1.Args[0] 11959 val := v.Args[2] 11960 mem := v.Args[3] 11961 v.reset(OpS390XMOVHstoreidx) 11962 v.AuxInt = c + d 11963 v.Aux = sym 11964 v.AddArg(ptr) 11965 v.AddArg(idx) 11966 v.AddArg(val) 11967 v.AddArg(mem) 11968 return true 11969 } 11970 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 11971 // cond: x.Uses == 1 && clobber(x) 11972 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 11973 for { 11974 i := v.AuxInt 11975 s := v.Aux 11976 p := v.Args[0] 11977 idx := v.Args[1] 11978 w := v.Args[2] 11979 x := v.Args[3] 11980 if x.Op != OpS390XMOVHstoreidx { 11981 break 11982 } 11983 if x.AuxInt != i-2 { 11984 break 11985 } 11986 if x.Aux != s { 11987 break 11988 } 11989 if p != x.Args[0] { 11990 break 11991 } 11992 if idx != x.Args[1] { 11993 break 11994 } 11995 x_2 := x.Args[2] 11996 if x_2.Op != OpS390XSRDconst { 11997 break 11998 } 11999 if x_2.AuxInt != 16 { 12000 break 12001 } 12002 if w != x_2.Args[0] { 12003 break 12004 } 12005 mem := x.Args[3] 12006 if !(x.Uses == 1 && clobber(x)) { 12007 break 12008 } 12009 v.reset(OpS390XMOVWstoreidx) 12010 v.AuxInt = i - 2 12011 v.Aux = s 12012 v.AddArg(p) 12013 v.AddArg(idx) 12014 v.AddArg(w) 12015 v.AddArg(mem) 12016 return true 12017 } 12018 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 12019 // cond: x.Uses == 1 && clobber(x) 12020 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12021 for { 12022 i := v.AuxInt 12023 s := v.Aux 12024 p := v.Args[0] 12025 idx := v.Args[1] 12026 w0 := v.Args[2] 12027 if w0.Op != OpS390XSRDconst { 12028 break 12029 } 12030 j := w0.AuxInt 12031 w := w0.Args[0] 12032 x := v.Args[3] 12033 if x.Op != OpS390XMOVHstoreidx { 12034 break 12035 } 12036 if x.AuxInt != i-2 { 12037 break 12038 } 12039 if x.Aux != s { 12040 break 12041 } 12042 if p != x.Args[0] { 12043 break 12044 } 12045 if idx != x.Args[1] { 12046 break 12047 } 12048 x_2 := x.Args[2] 12049 if x_2.Op != OpS390XSRDconst { 12050 break 12051 } 12052 if x_2.AuxInt != j+16 { 12053 break 12054 } 12055 if w != x_2.Args[0] { 12056 break 12057 } 12058 mem := x.Args[3] 12059 if !(x.Uses == 1 && clobber(x)) { 12060 break 12061 } 12062 v.reset(OpS390XMOVWstoreidx) 12063 v.AuxInt = i - 2 12064 v.Aux = s 12065 v.AddArg(p) 12066 v.AddArg(idx) 12067 v.AddArg(w0) 12068 v.AddArg(mem) 12069 return true 12070 } 12071 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12072 // cond: x.Uses == 1 && clobber(x) 12073 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12074 for { 12075 i := v.AuxInt 12076 s := v.Aux 12077 p := v.Args[0] 12078 idx := v.Args[1] 12079 w := v.Args[2] 12080 x := v.Args[3] 12081 if x.Op != OpS390XMOVHstoreidx { 12082 break 12083 } 12084 if x.AuxInt != i-2 { 12085 break 12086 } 12087 if x.Aux != s { 12088 break 12089 } 12090 if p != x.Args[0] { 12091 break 12092 } 12093 if idx != x.Args[1] { 12094 break 12095 } 12096 x_2 := x.Args[2] 12097 if x_2.Op != OpS390XSRWconst { 12098 break 12099 } 12100 if x_2.AuxInt != 16 { 12101 break 12102 } 12103 if w != x_2.Args[0] { 12104 break 12105 } 12106 mem := x.Args[3] 12107 if !(x.Uses == 1 && clobber(x)) { 12108 break 12109 } 12110 v.reset(OpS390XMOVWstoreidx) 12111 v.AuxInt = i - 2 12112 v.Aux = s 12113 v.AddArg(p) 12114 v.AddArg(idx) 12115 v.AddArg(w) 12116 v.AddArg(mem) 12117 return true 12118 } 12119 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12120 // cond: x.Uses == 1 && clobber(x) 12121 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12122 for { 12123 i := v.AuxInt 12124 s := v.Aux 12125 p := v.Args[0] 12126 idx := v.Args[1] 12127 w0 := v.Args[2] 12128 if w0.Op != OpS390XSRWconst { 12129 break 12130 } 12131 j := w0.AuxInt 12132 w := w0.Args[0] 12133 x := v.Args[3] 12134 if x.Op != OpS390XMOVHstoreidx { 12135 break 12136 } 12137 if x.AuxInt != i-2 { 12138 break 12139 } 12140 if x.Aux != s { 12141 break 12142 } 12143 if p != x.Args[0] { 12144 break 12145 } 12146 if idx != x.Args[1] { 12147 break 12148 } 12149 x_2 := x.Args[2] 12150 if x_2.Op != OpS390XSRWconst { 12151 break 12152 } 12153 if x_2.AuxInt != j+16 { 12154 break 12155 } 12156 if w != x_2.Args[0] { 12157 break 12158 } 12159 mem := x.Args[3] 12160 if !(x.Uses == 1 && clobber(x)) { 12161 break 12162 } 12163 v.reset(OpS390XMOVWstoreidx) 12164 v.AuxInt = i - 2 12165 v.Aux = s 12166 v.AddArg(p) 12167 v.AddArg(idx) 12168 v.AddArg(w0) 12169 v.AddArg(mem) 12170 return true 12171 } 12172 return false 12173 } 12174 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12175 b := v.Block 12176 _ = b 12177 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12178 // cond: x.Uses == 1 && clobber(x) 12179 // result: (MOVDBRstore [i-4] {s} p w mem) 12180 for { 12181 i := v.AuxInt 12182 s := v.Aux 12183 p := v.Args[0] 12184 v_1 := v.Args[1] 12185 if v_1.Op != OpS390XSRDconst { 12186 break 12187 } 12188 if v_1.AuxInt != 32 { 12189 break 12190 } 12191 w := v_1.Args[0] 12192 x := v.Args[2] 12193 if x.Op != OpS390XMOVWBRstore { 12194 break 12195 } 12196 if x.AuxInt != i-4 { 12197 break 12198 } 12199 if x.Aux != s { 12200 break 12201 } 12202 if p != x.Args[0] { 12203 break 12204 } 12205 if w != x.Args[1] { 12206 break 12207 } 12208 mem := x.Args[2] 12209 if !(x.Uses == 1 && clobber(x)) { 12210 break 12211 } 12212 v.reset(OpS390XMOVDBRstore) 12213 v.AuxInt = i - 4 12214 v.Aux = s 12215 v.AddArg(p) 12216 v.AddArg(w) 12217 v.AddArg(mem) 12218 return true 12219 } 12220 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12221 // cond: x.Uses == 1 && clobber(x) 12222 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12223 for { 12224 i := v.AuxInt 12225 s := v.Aux 12226 p := v.Args[0] 12227 v_1 := v.Args[1] 12228 if v_1.Op != OpS390XSRDconst { 12229 break 12230 } 12231 j := v_1.AuxInt 12232 w := v_1.Args[0] 12233 x := v.Args[2] 12234 if x.Op != OpS390XMOVWBRstore { 12235 break 12236 } 12237 if x.AuxInt != i-4 { 12238 break 12239 } 12240 if x.Aux != s { 12241 break 12242 } 12243 if p != x.Args[0] { 12244 break 12245 } 12246 w0 := x.Args[1] 12247 if w0.Op != OpS390XSRDconst { 12248 break 12249 } 12250 if w0.AuxInt != j-32 { 12251 break 12252 } 12253 if w != w0.Args[0] { 12254 break 12255 } 12256 mem := x.Args[2] 12257 if !(x.Uses == 1 && clobber(x)) { 12258 break 12259 } 12260 v.reset(OpS390XMOVDBRstore) 12261 v.AuxInt = i - 4 12262 v.Aux = s 12263 v.AddArg(p) 12264 v.AddArg(w0) 12265 v.AddArg(mem) 12266 return true 12267 } 12268 return false 12269 } 12270 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12271 b := v.Block 12272 _ = b 12273 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12274 // cond: x.Uses == 1 && clobber(x) 12275 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12276 for { 12277 i := v.AuxInt 12278 s := v.Aux 12279 p := v.Args[0] 12280 idx := v.Args[1] 12281 v_2 := v.Args[2] 12282 if v_2.Op != OpS390XSRDconst { 12283 break 12284 } 12285 if v_2.AuxInt != 32 { 12286 break 12287 } 12288 w := v_2.Args[0] 12289 x := v.Args[3] 12290 if x.Op != OpS390XMOVWBRstoreidx { 12291 break 12292 } 12293 if x.AuxInt != i-4 { 12294 break 12295 } 12296 if x.Aux != s { 12297 break 12298 } 12299 if p != x.Args[0] { 12300 break 12301 } 12302 if idx != x.Args[1] { 12303 break 12304 } 12305 if w != x.Args[2] { 12306 break 12307 } 12308 mem := x.Args[3] 12309 if !(x.Uses == 1 && clobber(x)) { 12310 break 12311 } 12312 v.reset(OpS390XMOVDBRstoreidx) 12313 v.AuxInt = i - 4 12314 v.Aux = s 12315 v.AddArg(p) 12316 v.AddArg(idx) 12317 v.AddArg(w) 12318 v.AddArg(mem) 12319 return true 12320 } 12321 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 12322 // cond: x.Uses == 1 && clobber(x) 12323 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 12324 for { 12325 i := v.AuxInt 12326 s := v.Aux 12327 p := v.Args[0] 12328 idx := v.Args[1] 12329 v_2 := v.Args[2] 12330 if v_2.Op != OpS390XSRDconst { 12331 break 12332 } 12333 j := v_2.AuxInt 12334 w := v_2.Args[0] 12335 x := v.Args[3] 12336 if x.Op != OpS390XMOVWBRstoreidx { 12337 break 12338 } 12339 if x.AuxInt != i-4 { 12340 break 12341 } 12342 if x.Aux != s { 12343 break 12344 } 12345 if p != x.Args[0] { 12346 break 12347 } 12348 if idx != x.Args[1] { 12349 break 12350 } 12351 w0 := x.Args[2] 12352 if w0.Op != OpS390XSRDconst { 12353 break 12354 } 12355 if w0.AuxInt != j-32 { 12356 break 12357 } 12358 if w != w0.Args[0] { 12359 break 12360 } 12361 mem := x.Args[3] 12362 if !(x.Uses == 1 && clobber(x)) { 12363 break 12364 } 12365 v.reset(OpS390XMOVDBRstoreidx) 12366 v.AuxInt = i - 4 12367 v.Aux = s 12368 v.AddArg(p) 12369 v.AddArg(idx) 12370 v.AddArg(w0) 12371 v.AddArg(mem) 12372 return true 12373 } 12374 return false 12375 } 12376 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 12377 b := v.Block 12378 _ = b 12379 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 12380 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 12381 // result: x 12382 for { 12383 off := v.AuxInt 12384 sym := v.Aux 12385 ptr := v.Args[0] 12386 v_1 := v.Args[1] 12387 if v_1.Op != OpS390XMOVWstore { 12388 break 12389 } 12390 off2 := v_1.AuxInt 12391 sym2 := v_1.Aux 12392 ptr2 := v_1.Args[0] 12393 x := v_1.Args[1] 12394 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 12395 break 12396 } 12397 v.reset(OpCopy) 12398 v.Type = x.Type 12399 v.AddArg(x) 12400 return true 12401 } 12402 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 12403 // cond: is32Bit(off1+off2) 12404 // result: (MOVWZload [off1+off2] {sym} ptr mem) 12405 for { 12406 off1 := v.AuxInt 12407 sym := v.Aux 12408 v_0 := v.Args[0] 12409 if v_0.Op != OpS390XADDconst { 12410 break 12411 } 12412 off2 := v_0.AuxInt 12413 ptr := v_0.Args[0] 12414 mem := v.Args[1] 12415 if !(is32Bit(off1 + off2)) { 12416 break 12417 } 12418 v.reset(OpS390XMOVWZload) 12419 v.AuxInt = off1 + off2 12420 v.Aux = sym 12421 v.AddArg(ptr) 12422 v.AddArg(mem) 12423 return true 12424 } 12425 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12426 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12427 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12428 for { 12429 off1 := v.AuxInt 12430 sym1 := v.Aux 12431 v_0 := v.Args[0] 12432 if v_0.Op != OpS390XMOVDaddr { 12433 break 12434 } 12435 off2 := v_0.AuxInt 12436 sym2 := v_0.Aux 12437 base := v_0.Args[0] 12438 mem := v.Args[1] 12439 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12440 break 12441 } 12442 v.reset(OpS390XMOVWZload) 12443 v.AuxInt = off1 + off2 12444 v.Aux = mergeSym(sym1, sym2) 12445 v.AddArg(base) 12446 v.AddArg(mem) 12447 return true 12448 } 12449 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 12450 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12451 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 12452 for { 12453 off1 := v.AuxInt 12454 sym1 := v.Aux 12455 v_0 := v.Args[0] 12456 if v_0.Op != OpS390XMOVDaddridx { 12457 break 12458 } 12459 off2 := v_0.AuxInt 12460 sym2 := v_0.Aux 12461 ptr := v_0.Args[0] 12462 idx := v_0.Args[1] 12463 mem := v.Args[1] 12464 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12465 break 12466 } 12467 v.reset(OpS390XMOVWZloadidx) 12468 v.AuxInt = off1 + off2 12469 v.Aux = mergeSym(sym1, sym2) 12470 v.AddArg(ptr) 12471 v.AddArg(idx) 12472 v.AddArg(mem) 12473 return true 12474 } 12475 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 12476 // cond: ptr.Op != OpSB 12477 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 12478 for { 12479 off := v.AuxInt 12480 sym := v.Aux 12481 v_0 := v.Args[0] 12482 if v_0.Op != OpS390XADD { 12483 break 12484 } 12485 ptr := v_0.Args[0] 12486 idx := v_0.Args[1] 12487 mem := v.Args[1] 12488 if !(ptr.Op != OpSB) { 12489 break 12490 } 12491 v.reset(OpS390XMOVWZloadidx) 12492 v.AuxInt = off 12493 v.Aux = sym 12494 v.AddArg(ptr) 12495 v.AddArg(idx) 12496 v.AddArg(mem) 12497 return true 12498 } 12499 return false 12500 } 12501 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 12502 b := v.Block 12503 _ = b 12504 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 12505 // cond: 12506 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12507 for { 12508 c := v.AuxInt 12509 sym := v.Aux 12510 v_0 := v.Args[0] 12511 if v_0.Op != OpS390XADDconst { 12512 break 12513 } 12514 d := v_0.AuxInt 12515 ptr := v_0.Args[0] 12516 idx := v.Args[1] 12517 mem := v.Args[2] 12518 v.reset(OpS390XMOVWZloadidx) 12519 v.AuxInt = c + d 12520 v.Aux = sym 12521 v.AddArg(ptr) 12522 v.AddArg(idx) 12523 v.AddArg(mem) 12524 return true 12525 } 12526 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 12527 // cond: 12528 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12529 for { 12530 c := v.AuxInt 12531 sym := v.Aux 12532 ptr := v.Args[0] 12533 v_1 := v.Args[1] 12534 if v_1.Op != OpS390XADDconst { 12535 break 12536 } 12537 d := v_1.AuxInt 12538 idx := v_1.Args[0] 12539 mem := v.Args[2] 12540 v.reset(OpS390XMOVWZloadidx) 12541 v.AuxInt = c + d 12542 v.Aux = sym 12543 v.AddArg(ptr) 12544 v.AddArg(idx) 12545 v.AddArg(mem) 12546 return true 12547 } 12548 return false 12549 } 12550 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 12551 b := v.Block 12552 _ = b 12553 // match: (MOVWZreg x:(MOVBZload _ _)) 12554 // cond: 12555 // result: x 12556 for { 12557 x := v.Args[0] 12558 if x.Op != OpS390XMOVBZload { 12559 break 12560 } 12561 v.reset(OpCopy) 12562 v.Type = x.Type 12563 v.AddArg(x) 12564 return true 12565 } 12566 // match: (MOVWZreg x:(MOVHZload _ _)) 12567 // cond: 12568 // result: x 12569 for { 12570 x := v.Args[0] 12571 if x.Op != OpS390XMOVHZload { 12572 break 12573 } 12574 v.reset(OpCopy) 12575 v.Type = x.Type 12576 v.AddArg(x) 12577 return true 12578 } 12579 // match: (MOVWZreg x:(MOVWZload _ _)) 12580 // cond: 12581 // result: x 12582 for { 12583 x := v.Args[0] 12584 if x.Op != OpS390XMOVWZload { 12585 break 12586 } 12587 v.reset(OpCopy) 12588 v.Type = x.Type 12589 v.AddArg(x) 12590 return true 12591 } 12592 // match: (MOVWZreg x:(Arg <t>)) 12593 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 12594 // result: x 12595 for { 12596 x := v.Args[0] 12597 if x.Op != OpArg { 12598 break 12599 } 12600 t := x.Type 12601 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 12602 break 12603 } 12604 v.reset(OpCopy) 12605 v.Type = x.Type 12606 v.AddArg(x) 12607 return true 12608 } 12609 // match: (MOVWZreg x:(MOVBZreg _)) 12610 // cond: 12611 // result: x 12612 for { 12613 x := v.Args[0] 12614 if x.Op != OpS390XMOVBZreg { 12615 break 12616 } 12617 v.reset(OpCopy) 12618 v.Type = x.Type 12619 v.AddArg(x) 12620 return true 12621 } 12622 // match: (MOVWZreg x:(MOVHZreg _)) 12623 // cond: 12624 // result: x 12625 for { 12626 x := v.Args[0] 12627 if x.Op != OpS390XMOVHZreg { 12628 break 12629 } 12630 v.reset(OpCopy) 12631 v.Type = x.Type 12632 v.AddArg(x) 12633 return true 12634 } 12635 // match: (MOVWZreg x:(MOVWZreg _)) 12636 // cond: 12637 // result: x 12638 for { 12639 x := v.Args[0] 12640 if x.Op != OpS390XMOVWZreg { 12641 break 12642 } 12643 v.reset(OpCopy) 12644 v.Type = x.Type 12645 v.AddArg(x) 12646 return true 12647 } 12648 // match: (MOVWZreg (MOVDconst [c])) 12649 // cond: 12650 // result: (MOVDconst [int64(uint32(c))]) 12651 for { 12652 v_0 := v.Args[0] 12653 if v_0.Op != OpS390XMOVDconst { 12654 break 12655 } 12656 c := v_0.AuxInt 12657 v.reset(OpS390XMOVDconst) 12658 v.AuxInt = int64(uint32(c)) 12659 return true 12660 } 12661 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 12662 // cond: x.Uses == 1 && clobber(x) 12663 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 12664 for { 12665 x := v.Args[0] 12666 if x.Op != OpS390XMOVWZload { 12667 break 12668 } 12669 off := x.AuxInt 12670 sym := x.Aux 12671 ptr := x.Args[0] 12672 mem := x.Args[1] 12673 if !(x.Uses == 1 && clobber(x)) { 12674 break 12675 } 12676 b = x.Block 12677 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, v.Type) 12678 v.reset(OpCopy) 12679 v.AddArg(v0) 12680 v0.AuxInt = off 12681 v0.Aux = sym 12682 v0.AddArg(ptr) 12683 v0.AddArg(mem) 12684 return true 12685 } 12686 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 12687 // cond: x.Uses == 1 && clobber(x) 12688 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 12689 for { 12690 x := v.Args[0] 12691 if x.Op != OpS390XMOVWZloadidx { 12692 break 12693 } 12694 off := x.AuxInt 12695 sym := x.Aux 12696 ptr := x.Args[0] 12697 idx := x.Args[1] 12698 mem := x.Args[2] 12699 if !(x.Uses == 1 && clobber(x)) { 12700 break 12701 } 12702 b = x.Block 12703 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 12704 v.reset(OpCopy) 12705 v.AddArg(v0) 12706 v0.AuxInt = off 12707 v0.Aux = sym 12708 v0.AddArg(ptr) 12709 v0.AddArg(idx) 12710 v0.AddArg(mem) 12711 return true 12712 } 12713 return false 12714 } 12715 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 12716 b := v.Block 12717 _ = b 12718 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12719 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12720 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12721 for { 12722 off1 := v.AuxInt 12723 sym1 := v.Aux 12724 v_0 := v.Args[0] 12725 if v_0.Op != OpS390XMOVDaddr { 12726 break 12727 } 12728 off2 := v_0.AuxInt 12729 sym2 := v_0.Aux 12730 base := v_0.Args[0] 12731 mem := v.Args[1] 12732 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12733 break 12734 } 12735 v.reset(OpS390XMOVWload) 12736 v.AuxInt = off1 + off2 12737 v.Aux = mergeSym(sym1, sym2) 12738 v.AddArg(base) 12739 v.AddArg(mem) 12740 return true 12741 } 12742 return false 12743 } 12744 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 12745 b := v.Block 12746 _ = b 12747 // match: (MOVWreg x:(MOVBload _ _)) 12748 // cond: 12749 // result: x 12750 for { 12751 x := v.Args[0] 12752 if x.Op != OpS390XMOVBload { 12753 break 12754 } 12755 v.reset(OpCopy) 12756 v.Type = x.Type 12757 v.AddArg(x) 12758 return true 12759 } 12760 // match: (MOVWreg x:(MOVBZload _ _)) 12761 // cond: 12762 // result: x 12763 for { 12764 x := v.Args[0] 12765 if x.Op != OpS390XMOVBZload { 12766 break 12767 } 12768 v.reset(OpCopy) 12769 v.Type = x.Type 12770 v.AddArg(x) 12771 return true 12772 } 12773 // match: (MOVWreg x:(MOVHload _ _)) 12774 // cond: 12775 // result: x 12776 for { 12777 x := v.Args[0] 12778 if x.Op != OpS390XMOVHload { 12779 break 12780 } 12781 v.reset(OpCopy) 12782 v.Type = x.Type 12783 v.AddArg(x) 12784 return true 12785 } 12786 // match: (MOVWreg x:(MOVHZload _ _)) 12787 // cond: 12788 // result: x 12789 for { 12790 x := v.Args[0] 12791 if x.Op != OpS390XMOVHZload { 12792 break 12793 } 12794 v.reset(OpCopy) 12795 v.Type = x.Type 12796 v.AddArg(x) 12797 return true 12798 } 12799 // match: (MOVWreg x:(MOVWload _ _)) 12800 // cond: 12801 // result: x 12802 for { 12803 x := v.Args[0] 12804 if x.Op != OpS390XMOVWload { 12805 break 12806 } 12807 v.reset(OpCopy) 12808 v.Type = x.Type 12809 v.AddArg(x) 12810 return true 12811 } 12812 // match: (MOVWreg x:(Arg <t>)) 12813 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 12814 // result: x 12815 for { 12816 x := v.Args[0] 12817 if x.Op != OpArg { 12818 break 12819 } 12820 t := x.Type 12821 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 12822 break 12823 } 12824 v.reset(OpCopy) 12825 v.Type = x.Type 12826 v.AddArg(x) 12827 return true 12828 } 12829 // match: (MOVWreg x:(MOVBreg _)) 12830 // cond: 12831 // result: x 12832 for { 12833 x := v.Args[0] 12834 if x.Op != OpS390XMOVBreg { 12835 break 12836 } 12837 v.reset(OpCopy) 12838 v.Type = x.Type 12839 v.AddArg(x) 12840 return true 12841 } 12842 // match: (MOVWreg x:(MOVBZreg _)) 12843 // cond: 12844 // result: x 12845 for { 12846 x := v.Args[0] 12847 if x.Op != OpS390XMOVBZreg { 12848 break 12849 } 12850 v.reset(OpCopy) 12851 v.Type = x.Type 12852 v.AddArg(x) 12853 return true 12854 } 12855 // match: (MOVWreg x:(MOVHreg _)) 12856 // cond: 12857 // result: x 12858 for { 12859 x := v.Args[0] 12860 if x.Op != OpS390XMOVHreg { 12861 break 12862 } 12863 v.reset(OpCopy) 12864 v.Type = x.Type 12865 v.AddArg(x) 12866 return true 12867 } 12868 // match: (MOVWreg x:(MOVHreg _)) 12869 // cond: 12870 // result: x 12871 for { 12872 x := v.Args[0] 12873 if x.Op != OpS390XMOVHreg { 12874 break 12875 } 12876 v.reset(OpCopy) 12877 v.Type = x.Type 12878 v.AddArg(x) 12879 return true 12880 } 12881 // match: (MOVWreg x:(MOVWreg _)) 12882 // cond: 12883 // result: x 12884 for { 12885 x := v.Args[0] 12886 if x.Op != OpS390XMOVWreg { 12887 break 12888 } 12889 v.reset(OpCopy) 12890 v.Type = x.Type 12891 v.AddArg(x) 12892 return true 12893 } 12894 // match: (MOVWreg (MOVDconst [c])) 12895 // cond: 12896 // result: (MOVDconst [int64(int32(c))]) 12897 for { 12898 v_0 := v.Args[0] 12899 if v_0.Op != OpS390XMOVDconst { 12900 break 12901 } 12902 c := v_0.AuxInt 12903 v.reset(OpS390XMOVDconst) 12904 v.AuxInt = int64(int32(c)) 12905 return true 12906 } 12907 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 12908 // cond: x.Uses == 1 && clobber(x) 12909 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 12910 for { 12911 x := v.Args[0] 12912 if x.Op != OpS390XMOVWZload { 12913 break 12914 } 12915 off := x.AuxInt 12916 sym := x.Aux 12917 ptr := x.Args[0] 12918 mem := x.Args[1] 12919 if !(x.Uses == 1 && clobber(x)) { 12920 break 12921 } 12922 b = x.Block 12923 v0 := b.NewValue0(v.Line, OpS390XMOVWload, v.Type) 12924 v.reset(OpCopy) 12925 v.AddArg(v0) 12926 v0.AuxInt = off 12927 v0.Aux = sym 12928 v0.AddArg(ptr) 12929 v0.AddArg(mem) 12930 return true 12931 } 12932 return false 12933 } 12934 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 12935 b := v.Block 12936 _ = b 12937 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 12938 // cond: 12939 // result: (MOVWstore [off] {sym} ptr x mem) 12940 for { 12941 off := v.AuxInt 12942 sym := v.Aux 12943 ptr := v.Args[0] 12944 v_1 := v.Args[1] 12945 if v_1.Op != OpS390XMOVWreg { 12946 break 12947 } 12948 x := v_1.Args[0] 12949 mem := v.Args[2] 12950 v.reset(OpS390XMOVWstore) 12951 v.AuxInt = off 12952 v.Aux = sym 12953 v.AddArg(ptr) 12954 v.AddArg(x) 12955 v.AddArg(mem) 12956 return true 12957 } 12958 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 12959 // cond: 12960 // result: (MOVWstore [off] {sym} ptr x mem) 12961 for { 12962 off := v.AuxInt 12963 sym := v.Aux 12964 ptr := v.Args[0] 12965 v_1 := v.Args[1] 12966 if v_1.Op != OpS390XMOVWZreg { 12967 break 12968 } 12969 x := v_1.Args[0] 12970 mem := v.Args[2] 12971 v.reset(OpS390XMOVWstore) 12972 v.AuxInt = off 12973 v.Aux = sym 12974 v.AddArg(ptr) 12975 v.AddArg(x) 12976 v.AddArg(mem) 12977 return true 12978 } 12979 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 12980 // cond: is32Bit(off1+off2) 12981 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 12982 for { 12983 off1 := v.AuxInt 12984 sym := v.Aux 12985 v_0 := v.Args[0] 12986 if v_0.Op != OpS390XADDconst { 12987 break 12988 } 12989 off2 := v_0.AuxInt 12990 ptr := v_0.Args[0] 12991 val := v.Args[1] 12992 mem := v.Args[2] 12993 if !(is32Bit(off1 + off2)) { 12994 break 12995 } 12996 v.reset(OpS390XMOVWstore) 12997 v.AuxInt = off1 + off2 12998 v.Aux = sym 12999 v.AddArg(ptr) 13000 v.AddArg(val) 13001 v.AddArg(mem) 13002 return true 13003 } 13004 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 13005 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 13006 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 13007 for { 13008 off := v.AuxInt 13009 sym := v.Aux 13010 ptr := v.Args[0] 13011 v_1 := v.Args[1] 13012 if v_1.Op != OpS390XMOVDconst { 13013 break 13014 } 13015 c := v_1.AuxInt 13016 mem := v.Args[2] 13017 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 13018 break 13019 } 13020 v.reset(OpS390XMOVWstoreconst) 13021 v.AuxInt = makeValAndOff(int64(int32(c)), off) 13022 v.Aux = sym 13023 v.AddArg(ptr) 13024 v.AddArg(mem) 13025 return true 13026 } 13027 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 13028 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13029 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 13030 for { 13031 off1 := v.AuxInt 13032 sym1 := v.Aux 13033 v_0 := v.Args[0] 13034 if v_0.Op != OpS390XMOVDaddr { 13035 break 13036 } 13037 off2 := v_0.AuxInt 13038 sym2 := v_0.Aux 13039 base := v_0.Args[0] 13040 val := v.Args[1] 13041 mem := v.Args[2] 13042 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13043 break 13044 } 13045 v.reset(OpS390XMOVWstore) 13046 v.AuxInt = off1 + off2 13047 v.Aux = mergeSym(sym1, sym2) 13048 v.AddArg(base) 13049 v.AddArg(val) 13050 v.AddArg(mem) 13051 return true 13052 } 13053 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13054 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13055 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13056 for { 13057 off1 := v.AuxInt 13058 sym1 := v.Aux 13059 v_0 := v.Args[0] 13060 if v_0.Op != OpS390XMOVDaddridx { 13061 break 13062 } 13063 off2 := v_0.AuxInt 13064 sym2 := v_0.Aux 13065 ptr := v_0.Args[0] 13066 idx := v_0.Args[1] 13067 val := v.Args[1] 13068 mem := v.Args[2] 13069 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13070 break 13071 } 13072 v.reset(OpS390XMOVWstoreidx) 13073 v.AuxInt = off1 + off2 13074 v.Aux = mergeSym(sym1, sym2) 13075 v.AddArg(ptr) 13076 v.AddArg(idx) 13077 v.AddArg(val) 13078 v.AddArg(mem) 13079 return true 13080 } 13081 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13082 // cond: ptr.Op != OpSB 13083 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13084 for { 13085 off := v.AuxInt 13086 sym := v.Aux 13087 v_0 := v.Args[0] 13088 if v_0.Op != OpS390XADD { 13089 break 13090 } 13091 ptr := v_0.Args[0] 13092 idx := v_0.Args[1] 13093 val := v.Args[1] 13094 mem := v.Args[2] 13095 if !(ptr.Op != OpSB) { 13096 break 13097 } 13098 v.reset(OpS390XMOVWstoreidx) 13099 v.AuxInt = off 13100 v.Aux = sym 13101 v.AddArg(ptr) 13102 v.AddArg(idx) 13103 v.AddArg(val) 13104 v.AddArg(mem) 13105 return true 13106 } 13107 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13108 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13109 // result: (MOVDstore [i-4] {s} p w mem) 13110 for { 13111 i := v.AuxInt 13112 s := v.Aux 13113 p := v.Args[0] 13114 v_1 := v.Args[1] 13115 if v_1.Op != OpS390XSRDconst { 13116 break 13117 } 13118 if v_1.AuxInt != 32 { 13119 break 13120 } 13121 w := v_1.Args[0] 13122 x := v.Args[2] 13123 if x.Op != OpS390XMOVWstore { 13124 break 13125 } 13126 if x.AuxInt != i-4 { 13127 break 13128 } 13129 if x.Aux != s { 13130 break 13131 } 13132 if p != x.Args[0] { 13133 break 13134 } 13135 if w != x.Args[1] { 13136 break 13137 } 13138 mem := x.Args[2] 13139 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13140 break 13141 } 13142 v.reset(OpS390XMOVDstore) 13143 v.AuxInt = i - 4 13144 v.Aux = s 13145 v.AddArg(p) 13146 v.AddArg(w) 13147 v.AddArg(mem) 13148 return true 13149 } 13150 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13151 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13152 // result: (MOVDstore [i-4] {s} p w0 mem) 13153 for { 13154 i := v.AuxInt 13155 s := v.Aux 13156 p := v.Args[0] 13157 w0 := v.Args[1] 13158 if w0.Op != OpS390XSRDconst { 13159 break 13160 } 13161 j := w0.AuxInt 13162 w := w0.Args[0] 13163 x := v.Args[2] 13164 if x.Op != OpS390XMOVWstore { 13165 break 13166 } 13167 if x.AuxInt != i-4 { 13168 break 13169 } 13170 if x.Aux != s { 13171 break 13172 } 13173 if p != x.Args[0] { 13174 break 13175 } 13176 x_1 := x.Args[1] 13177 if x_1.Op != OpS390XSRDconst { 13178 break 13179 } 13180 if x_1.AuxInt != j+32 { 13181 break 13182 } 13183 if w != x_1.Args[0] { 13184 break 13185 } 13186 mem := x.Args[2] 13187 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13188 break 13189 } 13190 v.reset(OpS390XMOVDstore) 13191 v.AuxInt = i - 4 13192 v.Aux = s 13193 v.AddArg(p) 13194 v.AddArg(w0) 13195 v.AddArg(mem) 13196 return true 13197 } 13198 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13199 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13200 // result: (STM2 [i-4] {s} p w0 w1 mem) 13201 for { 13202 i := v.AuxInt 13203 s := v.Aux 13204 p := v.Args[0] 13205 w1 := v.Args[1] 13206 x := v.Args[2] 13207 if x.Op != OpS390XMOVWstore { 13208 break 13209 } 13210 if x.AuxInt != i-4 { 13211 break 13212 } 13213 if x.Aux != s { 13214 break 13215 } 13216 if p != x.Args[0] { 13217 break 13218 } 13219 w0 := x.Args[1] 13220 mem := x.Args[2] 13221 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13222 break 13223 } 13224 v.reset(OpS390XSTM2) 13225 v.AuxInt = i - 4 13226 v.Aux = s 13227 v.AddArg(p) 13228 v.AddArg(w0) 13229 v.AddArg(w1) 13230 v.AddArg(mem) 13231 return true 13232 } 13233 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13234 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13235 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13236 for { 13237 i := v.AuxInt 13238 s := v.Aux 13239 p := v.Args[0] 13240 w2 := v.Args[1] 13241 x := v.Args[2] 13242 if x.Op != OpS390XSTM2 { 13243 break 13244 } 13245 if x.AuxInt != i-8 { 13246 break 13247 } 13248 if x.Aux != s { 13249 break 13250 } 13251 if p != x.Args[0] { 13252 break 13253 } 13254 w0 := x.Args[1] 13255 w1 := x.Args[2] 13256 mem := x.Args[3] 13257 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13258 break 13259 } 13260 v.reset(OpS390XSTM3) 13261 v.AuxInt = i - 8 13262 v.Aux = s 13263 v.AddArg(p) 13264 v.AddArg(w0) 13265 v.AddArg(w1) 13266 v.AddArg(w2) 13267 v.AddArg(mem) 13268 return true 13269 } 13270 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13271 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13272 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13273 for { 13274 i := v.AuxInt 13275 s := v.Aux 13276 p := v.Args[0] 13277 w3 := v.Args[1] 13278 x := v.Args[2] 13279 if x.Op != OpS390XSTM3 { 13280 break 13281 } 13282 if x.AuxInt != i-12 { 13283 break 13284 } 13285 if x.Aux != s { 13286 break 13287 } 13288 if p != x.Args[0] { 13289 break 13290 } 13291 w0 := x.Args[1] 13292 w1 := x.Args[2] 13293 w2 := x.Args[3] 13294 mem := x.Args[4] 13295 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13296 break 13297 } 13298 v.reset(OpS390XSTM4) 13299 v.AuxInt = i - 12 13300 v.Aux = s 13301 v.AddArg(p) 13302 v.AddArg(w0) 13303 v.AddArg(w1) 13304 v.AddArg(w2) 13305 v.AddArg(w3) 13306 v.AddArg(mem) 13307 return true 13308 } 13309 return false 13310 } 13311 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13312 b := v.Block 13313 _ = b 13314 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13315 // cond: ValAndOff(sc).canAdd(off) 13316 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13317 for { 13318 sc := v.AuxInt 13319 s := v.Aux 13320 v_0 := v.Args[0] 13321 if v_0.Op != OpS390XADDconst { 13322 break 13323 } 13324 off := v_0.AuxInt 13325 ptr := v_0.Args[0] 13326 mem := v.Args[1] 13327 if !(ValAndOff(sc).canAdd(off)) { 13328 break 13329 } 13330 v.reset(OpS390XMOVWstoreconst) 13331 v.AuxInt = ValAndOff(sc).add(off) 13332 v.Aux = s 13333 v.AddArg(ptr) 13334 v.AddArg(mem) 13335 return true 13336 } 13337 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 13338 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 13339 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 13340 for { 13341 sc := v.AuxInt 13342 sym1 := v.Aux 13343 v_0 := v.Args[0] 13344 if v_0.Op != OpS390XMOVDaddr { 13345 break 13346 } 13347 off := v_0.AuxInt 13348 sym2 := v_0.Aux 13349 ptr := v_0.Args[0] 13350 mem := v.Args[1] 13351 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 13352 break 13353 } 13354 v.reset(OpS390XMOVWstoreconst) 13355 v.AuxInt = ValAndOff(sc).add(off) 13356 v.Aux = mergeSym(sym1, sym2) 13357 v.AddArg(ptr) 13358 v.AddArg(mem) 13359 return true 13360 } 13361 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 13362 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 13363 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 13364 for { 13365 c := v.AuxInt 13366 s := v.Aux 13367 p := v.Args[0] 13368 x := v.Args[1] 13369 if x.Op != OpS390XMOVWstoreconst { 13370 break 13371 } 13372 a := x.AuxInt 13373 if x.Aux != s { 13374 break 13375 } 13376 if p != x.Args[0] { 13377 break 13378 } 13379 mem := x.Args[1] 13380 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 13381 break 13382 } 13383 v.reset(OpS390XMOVDstore) 13384 v.AuxInt = ValAndOff(a).Off() 13385 v.Aux = s 13386 v.AddArg(p) 13387 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 13388 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 13389 v.AddArg(v0) 13390 v.AddArg(mem) 13391 return true 13392 } 13393 return false 13394 } 13395 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 13396 b := v.Block 13397 _ = b 13398 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 13399 // cond: 13400 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13401 for { 13402 c := v.AuxInt 13403 sym := v.Aux 13404 v_0 := v.Args[0] 13405 if v_0.Op != OpS390XADDconst { 13406 break 13407 } 13408 d := v_0.AuxInt 13409 ptr := v_0.Args[0] 13410 idx := v.Args[1] 13411 val := v.Args[2] 13412 mem := v.Args[3] 13413 v.reset(OpS390XMOVWstoreidx) 13414 v.AuxInt = c + d 13415 v.Aux = sym 13416 v.AddArg(ptr) 13417 v.AddArg(idx) 13418 v.AddArg(val) 13419 v.AddArg(mem) 13420 return true 13421 } 13422 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 13423 // cond: 13424 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13425 for { 13426 c := v.AuxInt 13427 sym := v.Aux 13428 ptr := v.Args[0] 13429 v_1 := v.Args[1] 13430 if v_1.Op != OpS390XADDconst { 13431 break 13432 } 13433 d := v_1.AuxInt 13434 idx := v_1.Args[0] 13435 val := v.Args[2] 13436 mem := v.Args[3] 13437 v.reset(OpS390XMOVWstoreidx) 13438 v.AuxInt = c + d 13439 v.Aux = sym 13440 v.AddArg(ptr) 13441 v.AddArg(idx) 13442 v.AddArg(val) 13443 v.AddArg(mem) 13444 return true 13445 } 13446 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 13447 // cond: x.Uses == 1 && clobber(x) 13448 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 13449 for { 13450 i := v.AuxInt 13451 s := v.Aux 13452 p := v.Args[0] 13453 idx := v.Args[1] 13454 w := v.Args[2] 13455 x := v.Args[3] 13456 if x.Op != OpS390XMOVWstoreidx { 13457 break 13458 } 13459 if x.AuxInt != i-4 { 13460 break 13461 } 13462 if x.Aux != s { 13463 break 13464 } 13465 if p != x.Args[0] { 13466 break 13467 } 13468 if idx != x.Args[1] { 13469 break 13470 } 13471 x_2 := x.Args[2] 13472 if x_2.Op != OpS390XSRDconst { 13473 break 13474 } 13475 if x_2.AuxInt != 32 { 13476 break 13477 } 13478 if w != x_2.Args[0] { 13479 break 13480 } 13481 mem := x.Args[3] 13482 if !(x.Uses == 1 && clobber(x)) { 13483 break 13484 } 13485 v.reset(OpS390XMOVDstoreidx) 13486 v.AuxInt = i - 4 13487 v.Aux = s 13488 v.AddArg(p) 13489 v.AddArg(idx) 13490 v.AddArg(w) 13491 v.AddArg(mem) 13492 return true 13493 } 13494 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 13495 // cond: x.Uses == 1 && clobber(x) 13496 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 13497 for { 13498 i := v.AuxInt 13499 s := v.Aux 13500 p := v.Args[0] 13501 idx := v.Args[1] 13502 w0 := v.Args[2] 13503 if w0.Op != OpS390XSRDconst { 13504 break 13505 } 13506 j := w0.AuxInt 13507 w := w0.Args[0] 13508 x := v.Args[3] 13509 if x.Op != OpS390XMOVWstoreidx { 13510 break 13511 } 13512 if x.AuxInt != i-4 { 13513 break 13514 } 13515 if x.Aux != s { 13516 break 13517 } 13518 if p != x.Args[0] { 13519 break 13520 } 13521 if idx != x.Args[1] { 13522 break 13523 } 13524 x_2 := x.Args[2] 13525 if x_2.Op != OpS390XSRDconst { 13526 break 13527 } 13528 if x_2.AuxInt != j+32 { 13529 break 13530 } 13531 if w != x_2.Args[0] { 13532 break 13533 } 13534 mem := x.Args[3] 13535 if !(x.Uses == 1 && clobber(x)) { 13536 break 13537 } 13538 v.reset(OpS390XMOVDstoreidx) 13539 v.AuxInt = i - 4 13540 v.Aux = s 13541 v.AddArg(p) 13542 v.AddArg(idx) 13543 v.AddArg(w0) 13544 v.AddArg(mem) 13545 return true 13546 } 13547 return false 13548 } 13549 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 13550 b := v.Block 13551 _ = b 13552 // match: (MULLD x (MOVDconst [c])) 13553 // cond: is32Bit(c) 13554 // result: (MULLDconst [c] x) 13555 for { 13556 x := v.Args[0] 13557 v_1 := v.Args[1] 13558 if v_1.Op != OpS390XMOVDconst { 13559 break 13560 } 13561 c := v_1.AuxInt 13562 if !(is32Bit(c)) { 13563 break 13564 } 13565 v.reset(OpS390XMULLDconst) 13566 v.AuxInt = c 13567 v.AddArg(x) 13568 return true 13569 } 13570 // match: (MULLD (MOVDconst [c]) x) 13571 // cond: is32Bit(c) 13572 // result: (MULLDconst [c] x) 13573 for { 13574 v_0 := v.Args[0] 13575 if v_0.Op != OpS390XMOVDconst { 13576 break 13577 } 13578 c := v_0.AuxInt 13579 x := v.Args[1] 13580 if !(is32Bit(c)) { 13581 break 13582 } 13583 v.reset(OpS390XMULLDconst) 13584 v.AuxInt = c 13585 v.AddArg(x) 13586 return true 13587 } 13588 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 13589 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13590 // result: (MULLDload <t> [off] {sym} x ptr mem) 13591 for { 13592 t := v.Type 13593 x := v.Args[0] 13594 g := v.Args[1] 13595 if g.Op != OpS390XMOVDload { 13596 break 13597 } 13598 off := g.AuxInt 13599 sym := g.Aux 13600 ptr := g.Args[0] 13601 mem := g.Args[1] 13602 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13603 break 13604 } 13605 v.reset(OpS390XMULLDload) 13606 v.Type = t 13607 v.AuxInt = off 13608 v.Aux = sym 13609 v.AddArg(x) 13610 v.AddArg(ptr) 13611 v.AddArg(mem) 13612 return true 13613 } 13614 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 13615 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13616 // result: (MULLDload <t> [off] {sym} x ptr mem) 13617 for { 13618 t := v.Type 13619 g := v.Args[0] 13620 if g.Op != OpS390XMOVDload { 13621 break 13622 } 13623 off := g.AuxInt 13624 sym := g.Aux 13625 ptr := g.Args[0] 13626 mem := g.Args[1] 13627 x := v.Args[1] 13628 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13629 break 13630 } 13631 v.reset(OpS390XMULLDload) 13632 v.Type = t 13633 v.AuxInt = off 13634 v.Aux = sym 13635 v.AddArg(x) 13636 v.AddArg(ptr) 13637 v.AddArg(mem) 13638 return true 13639 } 13640 return false 13641 } 13642 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 13643 b := v.Block 13644 _ = b 13645 // match: (MULLDconst [-1] x) 13646 // cond: 13647 // result: (NEG x) 13648 for { 13649 if v.AuxInt != -1 { 13650 break 13651 } 13652 x := v.Args[0] 13653 v.reset(OpS390XNEG) 13654 v.AddArg(x) 13655 return true 13656 } 13657 // match: (MULLDconst [0] _) 13658 // cond: 13659 // result: (MOVDconst [0]) 13660 for { 13661 if v.AuxInt != 0 { 13662 break 13663 } 13664 v.reset(OpS390XMOVDconst) 13665 v.AuxInt = 0 13666 return true 13667 } 13668 // match: (MULLDconst [1] x) 13669 // cond: 13670 // result: x 13671 for { 13672 if v.AuxInt != 1 { 13673 break 13674 } 13675 x := v.Args[0] 13676 v.reset(OpCopy) 13677 v.Type = x.Type 13678 v.AddArg(x) 13679 return true 13680 } 13681 // match: (MULLDconst [c] x) 13682 // cond: isPowerOfTwo(c) 13683 // result: (SLDconst [log2(c)] x) 13684 for { 13685 c := v.AuxInt 13686 x := v.Args[0] 13687 if !(isPowerOfTwo(c)) { 13688 break 13689 } 13690 v.reset(OpS390XSLDconst) 13691 v.AuxInt = log2(c) 13692 v.AddArg(x) 13693 return true 13694 } 13695 // match: (MULLDconst [c] x) 13696 // cond: isPowerOfTwo(c+1) && c >= 15 13697 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 13698 for { 13699 c := v.AuxInt 13700 x := v.Args[0] 13701 if !(isPowerOfTwo(c+1) && c >= 15) { 13702 break 13703 } 13704 v.reset(OpS390XSUB) 13705 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13706 v0.AuxInt = log2(c + 1) 13707 v0.AddArg(x) 13708 v.AddArg(v0) 13709 v.AddArg(x) 13710 return true 13711 } 13712 // match: (MULLDconst [c] x) 13713 // cond: isPowerOfTwo(c-1) && c >= 17 13714 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 13715 for { 13716 c := v.AuxInt 13717 x := v.Args[0] 13718 if !(isPowerOfTwo(c-1) && c >= 17) { 13719 break 13720 } 13721 v.reset(OpS390XADD) 13722 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13723 v0.AuxInt = log2(c - 1) 13724 v0.AddArg(x) 13725 v.AddArg(v0) 13726 v.AddArg(x) 13727 return true 13728 } 13729 // match: (MULLDconst [c] (MOVDconst [d])) 13730 // cond: 13731 // result: (MOVDconst [c*d]) 13732 for { 13733 c := v.AuxInt 13734 v_0 := v.Args[0] 13735 if v_0.Op != OpS390XMOVDconst { 13736 break 13737 } 13738 d := v_0.AuxInt 13739 v.reset(OpS390XMOVDconst) 13740 v.AuxInt = c * d 13741 return true 13742 } 13743 return false 13744 } 13745 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 13746 b := v.Block 13747 _ = b 13748 // match: (MULLW x (MOVDconst [c])) 13749 // cond: 13750 // result: (MULLWconst [c] x) 13751 for { 13752 x := v.Args[0] 13753 v_1 := v.Args[1] 13754 if v_1.Op != OpS390XMOVDconst { 13755 break 13756 } 13757 c := v_1.AuxInt 13758 v.reset(OpS390XMULLWconst) 13759 v.AuxInt = c 13760 v.AddArg(x) 13761 return true 13762 } 13763 // match: (MULLW (MOVDconst [c]) x) 13764 // cond: 13765 // result: (MULLWconst [c] x) 13766 for { 13767 v_0 := v.Args[0] 13768 if v_0.Op != OpS390XMOVDconst { 13769 break 13770 } 13771 c := v_0.AuxInt 13772 x := v.Args[1] 13773 v.reset(OpS390XMULLWconst) 13774 v.AuxInt = c 13775 v.AddArg(x) 13776 return true 13777 } 13778 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 13779 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13780 // result: (MULLWload <t> [off] {sym} x ptr mem) 13781 for { 13782 t := v.Type 13783 x := v.Args[0] 13784 g := v.Args[1] 13785 if g.Op != OpS390XMOVWload { 13786 break 13787 } 13788 off := g.AuxInt 13789 sym := g.Aux 13790 ptr := g.Args[0] 13791 mem := g.Args[1] 13792 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13793 break 13794 } 13795 v.reset(OpS390XMULLWload) 13796 v.Type = t 13797 v.AuxInt = off 13798 v.Aux = sym 13799 v.AddArg(x) 13800 v.AddArg(ptr) 13801 v.AddArg(mem) 13802 return true 13803 } 13804 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 13805 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13806 // result: (MULLWload <t> [off] {sym} x ptr mem) 13807 for { 13808 t := v.Type 13809 g := v.Args[0] 13810 if g.Op != OpS390XMOVWload { 13811 break 13812 } 13813 off := g.AuxInt 13814 sym := g.Aux 13815 ptr := g.Args[0] 13816 mem := g.Args[1] 13817 x := v.Args[1] 13818 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13819 break 13820 } 13821 v.reset(OpS390XMULLWload) 13822 v.Type = t 13823 v.AuxInt = off 13824 v.Aux = sym 13825 v.AddArg(x) 13826 v.AddArg(ptr) 13827 v.AddArg(mem) 13828 return true 13829 } 13830 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 13831 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13832 // result: (MULLWload <t> [off] {sym} x ptr mem) 13833 for { 13834 t := v.Type 13835 x := v.Args[0] 13836 g := v.Args[1] 13837 if g.Op != OpS390XMOVWZload { 13838 break 13839 } 13840 off := g.AuxInt 13841 sym := g.Aux 13842 ptr := g.Args[0] 13843 mem := g.Args[1] 13844 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13845 break 13846 } 13847 v.reset(OpS390XMULLWload) 13848 v.Type = t 13849 v.AuxInt = off 13850 v.Aux = sym 13851 v.AddArg(x) 13852 v.AddArg(ptr) 13853 v.AddArg(mem) 13854 return true 13855 } 13856 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 13857 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13858 // result: (MULLWload <t> [off] {sym} x ptr mem) 13859 for { 13860 t := v.Type 13861 g := v.Args[0] 13862 if g.Op != OpS390XMOVWZload { 13863 break 13864 } 13865 off := g.AuxInt 13866 sym := g.Aux 13867 ptr := g.Args[0] 13868 mem := g.Args[1] 13869 x := v.Args[1] 13870 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13871 break 13872 } 13873 v.reset(OpS390XMULLWload) 13874 v.Type = t 13875 v.AuxInt = off 13876 v.Aux = sym 13877 v.AddArg(x) 13878 v.AddArg(ptr) 13879 v.AddArg(mem) 13880 return true 13881 } 13882 return false 13883 } 13884 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 13885 b := v.Block 13886 _ = b 13887 // match: (MULLWconst [-1] x) 13888 // cond: 13889 // result: (NEGW x) 13890 for { 13891 if v.AuxInt != -1 { 13892 break 13893 } 13894 x := v.Args[0] 13895 v.reset(OpS390XNEGW) 13896 v.AddArg(x) 13897 return true 13898 } 13899 // match: (MULLWconst [0] _) 13900 // cond: 13901 // result: (MOVDconst [0]) 13902 for { 13903 if v.AuxInt != 0 { 13904 break 13905 } 13906 v.reset(OpS390XMOVDconst) 13907 v.AuxInt = 0 13908 return true 13909 } 13910 // match: (MULLWconst [1] x) 13911 // cond: 13912 // result: x 13913 for { 13914 if v.AuxInt != 1 { 13915 break 13916 } 13917 x := v.Args[0] 13918 v.reset(OpCopy) 13919 v.Type = x.Type 13920 v.AddArg(x) 13921 return true 13922 } 13923 // match: (MULLWconst [c] x) 13924 // cond: isPowerOfTwo(c) 13925 // result: (SLWconst [log2(c)] x) 13926 for { 13927 c := v.AuxInt 13928 x := v.Args[0] 13929 if !(isPowerOfTwo(c)) { 13930 break 13931 } 13932 v.reset(OpS390XSLWconst) 13933 v.AuxInt = log2(c) 13934 v.AddArg(x) 13935 return true 13936 } 13937 // match: (MULLWconst [c] x) 13938 // cond: isPowerOfTwo(c+1) && c >= 15 13939 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 13940 for { 13941 c := v.AuxInt 13942 x := v.Args[0] 13943 if !(isPowerOfTwo(c+1) && c >= 15) { 13944 break 13945 } 13946 v.reset(OpS390XSUBW) 13947 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13948 v0.AuxInt = log2(c + 1) 13949 v0.AddArg(x) 13950 v.AddArg(v0) 13951 v.AddArg(x) 13952 return true 13953 } 13954 // match: (MULLWconst [c] x) 13955 // cond: isPowerOfTwo(c-1) && c >= 17 13956 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 13957 for { 13958 c := v.AuxInt 13959 x := v.Args[0] 13960 if !(isPowerOfTwo(c-1) && c >= 17) { 13961 break 13962 } 13963 v.reset(OpS390XADDW) 13964 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13965 v0.AuxInt = log2(c - 1) 13966 v0.AddArg(x) 13967 v.AddArg(v0) 13968 v.AddArg(x) 13969 return true 13970 } 13971 // match: (MULLWconst [c] (MOVDconst [d])) 13972 // cond: 13973 // result: (MOVDconst [int64(int32(c*d))]) 13974 for { 13975 c := v.AuxInt 13976 v_0 := v.Args[0] 13977 if v_0.Op != OpS390XMOVDconst { 13978 break 13979 } 13980 d := v_0.AuxInt 13981 v.reset(OpS390XMOVDconst) 13982 v.AuxInt = int64(int32(c * d)) 13983 return true 13984 } 13985 return false 13986 } 13987 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 13988 b := v.Block 13989 _ = b 13990 // match: (NEG (MOVDconst [c])) 13991 // cond: 13992 // result: (MOVDconst [-c]) 13993 for { 13994 v_0 := v.Args[0] 13995 if v_0.Op != OpS390XMOVDconst { 13996 break 13997 } 13998 c := v_0.AuxInt 13999 v.reset(OpS390XMOVDconst) 14000 v.AuxInt = -c 14001 return true 14002 } 14003 return false 14004 } 14005 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 14006 b := v.Block 14007 _ = b 14008 // match: (NEGW (MOVDconst [c])) 14009 // cond: 14010 // result: (MOVDconst [int64(int32(-c))]) 14011 for { 14012 v_0 := v.Args[0] 14013 if v_0.Op != OpS390XMOVDconst { 14014 break 14015 } 14016 c := v_0.AuxInt 14017 v.reset(OpS390XMOVDconst) 14018 v.AuxInt = int64(int32(-c)) 14019 return true 14020 } 14021 return false 14022 } 14023 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 14024 b := v.Block 14025 _ = b 14026 // match: (NOT x) 14027 // cond: true 14028 // result: (XOR (MOVDconst [-1]) x) 14029 for { 14030 x := v.Args[0] 14031 if !(true) { 14032 break 14033 } 14034 v.reset(OpS390XXOR) 14035 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 14036 v0.AuxInt = -1 14037 v.AddArg(v0) 14038 v.AddArg(x) 14039 return true 14040 } 14041 return false 14042 } 14043 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 14044 b := v.Block 14045 _ = b 14046 // match: (NOTW x) 14047 // cond: true 14048 // result: (XORWconst [-1] x) 14049 for { 14050 x := v.Args[0] 14051 if !(true) { 14052 break 14053 } 14054 v.reset(OpS390XXORWconst) 14055 v.AuxInt = -1 14056 v.AddArg(x) 14057 return true 14058 } 14059 return false 14060 } 14061 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14062 b := v.Block 14063 _ = b 14064 // match: (OR x (MOVDconst [c])) 14065 // cond: isU32Bit(c) 14066 // result: (ORconst [c] x) 14067 for { 14068 x := v.Args[0] 14069 v_1 := v.Args[1] 14070 if v_1.Op != OpS390XMOVDconst { 14071 break 14072 } 14073 c := v_1.AuxInt 14074 if !(isU32Bit(c)) { 14075 break 14076 } 14077 v.reset(OpS390XORconst) 14078 v.AuxInt = c 14079 v.AddArg(x) 14080 return true 14081 } 14082 // match: (OR (MOVDconst [c]) x) 14083 // cond: isU32Bit(c) 14084 // result: (ORconst [c] x) 14085 for { 14086 v_0 := v.Args[0] 14087 if v_0.Op != OpS390XMOVDconst { 14088 break 14089 } 14090 c := v_0.AuxInt 14091 x := v.Args[1] 14092 if !(isU32Bit(c)) { 14093 break 14094 } 14095 v.reset(OpS390XORconst) 14096 v.AuxInt = c 14097 v.AddArg(x) 14098 return true 14099 } 14100 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14101 // cond: 14102 // result: (MOVDconst [c|d]) 14103 for { 14104 v_0 := v.Args[0] 14105 if v_0.Op != OpS390XMOVDconst { 14106 break 14107 } 14108 c := v_0.AuxInt 14109 v_1 := v.Args[1] 14110 if v_1.Op != OpS390XMOVDconst { 14111 break 14112 } 14113 d := v_1.AuxInt 14114 v.reset(OpS390XMOVDconst) 14115 v.AuxInt = c | d 14116 return true 14117 } 14118 // match: (OR x x) 14119 // cond: 14120 // result: x 14121 for { 14122 x := v.Args[0] 14123 if x != v.Args[1] { 14124 break 14125 } 14126 v.reset(OpCopy) 14127 v.Type = x.Type 14128 v.AddArg(x) 14129 return true 14130 } 14131 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14132 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14133 // result: (ORload <t> [off] {sym} x ptr mem) 14134 for { 14135 t := v.Type 14136 x := v.Args[0] 14137 g := v.Args[1] 14138 if g.Op != OpS390XMOVDload { 14139 break 14140 } 14141 off := g.AuxInt 14142 sym := g.Aux 14143 ptr := g.Args[0] 14144 mem := g.Args[1] 14145 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14146 break 14147 } 14148 v.reset(OpS390XORload) 14149 v.Type = t 14150 v.AuxInt = off 14151 v.Aux = sym 14152 v.AddArg(x) 14153 v.AddArg(ptr) 14154 v.AddArg(mem) 14155 return true 14156 } 14157 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14158 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14159 // result: (ORload <t> [off] {sym} x ptr mem) 14160 for { 14161 t := v.Type 14162 g := v.Args[0] 14163 if g.Op != OpS390XMOVDload { 14164 break 14165 } 14166 off := g.AuxInt 14167 sym := g.Aux 14168 ptr := g.Args[0] 14169 mem := g.Args[1] 14170 x := v.Args[1] 14171 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14172 break 14173 } 14174 v.reset(OpS390XORload) 14175 v.Type = t 14176 v.AuxInt = off 14177 v.Aux = sym 14178 v.AddArg(x) 14179 v.AddArg(ptr) 14180 v.AddArg(mem) 14181 return true 14182 } 14183 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14184 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14185 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14186 for { 14187 o0 := v.Args[0] 14188 if o0.Op != OpS390XOR { 14189 break 14190 } 14191 o1 := o0.Args[0] 14192 if o1.Op != OpS390XOR { 14193 break 14194 } 14195 o2 := o1.Args[0] 14196 if o2.Op != OpS390XOR { 14197 break 14198 } 14199 o3 := o2.Args[0] 14200 if o3.Op != OpS390XOR { 14201 break 14202 } 14203 o4 := o3.Args[0] 14204 if o4.Op != OpS390XOR { 14205 break 14206 } 14207 o5 := o4.Args[0] 14208 if o5.Op != OpS390XOR { 14209 break 14210 } 14211 x0 := o5.Args[0] 14212 if x0.Op != OpS390XMOVBZload { 14213 break 14214 } 14215 i := x0.AuxInt 14216 s := x0.Aux 14217 p := x0.Args[0] 14218 mem := x0.Args[1] 14219 s0 := o5.Args[1] 14220 if s0.Op != OpS390XSLDconst { 14221 break 14222 } 14223 if s0.AuxInt != 8 { 14224 break 14225 } 14226 x1 := s0.Args[0] 14227 if x1.Op != OpS390XMOVBZload { 14228 break 14229 } 14230 if x1.AuxInt != i+1 { 14231 break 14232 } 14233 if x1.Aux != s { 14234 break 14235 } 14236 if p != x1.Args[0] { 14237 break 14238 } 14239 if mem != x1.Args[1] { 14240 break 14241 } 14242 s1 := o4.Args[1] 14243 if s1.Op != OpS390XSLDconst { 14244 break 14245 } 14246 if s1.AuxInt != 16 { 14247 break 14248 } 14249 x2 := s1.Args[0] 14250 if x2.Op != OpS390XMOVBZload { 14251 break 14252 } 14253 if x2.AuxInt != i+2 { 14254 break 14255 } 14256 if x2.Aux != s { 14257 break 14258 } 14259 if p != x2.Args[0] { 14260 break 14261 } 14262 if mem != x2.Args[1] { 14263 break 14264 } 14265 s2 := o3.Args[1] 14266 if s2.Op != OpS390XSLDconst { 14267 break 14268 } 14269 if s2.AuxInt != 24 { 14270 break 14271 } 14272 x3 := s2.Args[0] 14273 if x3.Op != OpS390XMOVBZload { 14274 break 14275 } 14276 if x3.AuxInt != i+3 { 14277 break 14278 } 14279 if x3.Aux != s { 14280 break 14281 } 14282 if p != x3.Args[0] { 14283 break 14284 } 14285 if mem != x3.Args[1] { 14286 break 14287 } 14288 s3 := o2.Args[1] 14289 if s3.Op != OpS390XSLDconst { 14290 break 14291 } 14292 if s3.AuxInt != 32 { 14293 break 14294 } 14295 x4 := s3.Args[0] 14296 if x4.Op != OpS390XMOVBZload { 14297 break 14298 } 14299 if x4.AuxInt != i+4 { 14300 break 14301 } 14302 if x4.Aux != s { 14303 break 14304 } 14305 if p != x4.Args[0] { 14306 break 14307 } 14308 if mem != x4.Args[1] { 14309 break 14310 } 14311 s4 := o1.Args[1] 14312 if s4.Op != OpS390XSLDconst { 14313 break 14314 } 14315 if s4.AuxInt != 40 { 14316 break 14317 } 14318 x5 := s4.Args[0] 14319 if x5.Op != OpS390XMOVBZload { 14320 break 14321 } 14322 if x5.AuxInt != i+5 { 14323 break 14324 } 14325 if x5.Aux != s { 14326 break 14327 } 14328 if p != x5.Args[0] { 14329 break 14330 } 14331 if mem != x5.Args[1] { 14332 break 14333 } 14334 s5 := o0.Args[1] 14335 if s5.Op != OpS390XSLDconst { 14336 break 14337 } 14338 if s5.AuxInt != 48 { 14339 break 14340 } 14341 x6 := s5.Args[0] 14342 if x6.Op != OpS390XMOVBZload { 14343 break 14344 } 14345 if x6.AuxInt != i+6 { 14346 break 14347 } 14348 if x6.Aux != s { 14349 break 14350 } 14351 if p != x6.Args[0] { 14352 break 14353 } 14354 if mem != x6.Args[1] { 14355 break 14356 } 14357 s6 := v.Args[1] 14358 if s6.Op != OpS390XSLDconst { 14359 break 14360 } 14361 if s6.AuxInt != 56 { 14362 break 14363 } 14364 x7 := s6.Args[0] 14365 if x7.Op != OpS390XMOVBZload { 14366 break 14367 } 14368 if x7.AuxInt != i+7 { 14369 break 14370 } 14371 if x7.Aux != s { 14372 break 14373 } 14374 if p != x7.Args[0] { 14375 break 14376 } 14377 if mem != x7.Args[1] { 14378 break 14379 } 14380 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14381 break 14382 } 14383 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14384 v0 := b.NewValue0(v.Line, OpS390XMOVDBRload, config.fe.TypeUInt64()) 14385 v.reset(OpCopy) 14386 v.AddArg(v0) 14387 v0.AuxInt = i 14388 v0.Aux = s 14389 v0.AddArg(p) 14390 v0.AddArg(mem) 14391 return true 14392 } 14393 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 14394 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14395 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 14396 for { 14397 o0 := v.Args[0] 14398 if o0.Op != OpS390XOR { 14399 break 14400 } 14401 o1 := o0.Args[0] 14402 if o1.Op != OpS390XOR { 14403 break 14404 } 14405 o2 := o1.Args[0] 14406 if o2.Op != OpS390XOR { 14407 break 14408 } 14409 o3 := o2.Args[0] 14410 if o3.Op != OpS390XOR { 14411 break 14412 } 14413 o4 := o3.Args[0] 14414 if o4.Op != OpS390XOR { 14415 break 14416 } 14417 o5 := o4.Args[0] 14418 if o5.Op != OpS390XOR { 14419 break 14420 } 14421 x0 := o5.Args[0] 14422 if x0.Op != OpS390XMOVBZloadidx { 14423 break 14424 } 14425 i := x0.AuxInt 14426 s := x0.Aux 14427 p := x0.Args[0] 14428 idx := x0.Args[1] 14429 mem := x0.Args[2] 14430 s0 := o5.Args[1] 14431 if s0.Op != OpS390XSLDconst { 14432 break 14433 } 14434 if s0.AuxInt != 8 { 14435 break 14436 } 14437 x1 := s0.Args[0] 14438 if x1.Op != OpS390XMOVBZloadidx { 14439 break 14440 } 14441 if x1.AuxInt != i+1 { 14442 break 14443 } 14444 if x1.Aux != s { 14445 break 14446 } 14447 if p != x1.Args[0] { 14448 break 14449 } 14450 if idx != x1.Args[1] { 14451 break 14452 } 14453 if mem != x1.Args[2] { 14454 break 14455 } 14456 s1 := o4.Args[1] 14457 if s1.Op != OpS390XSLDconst { 14458 break 14459 } 14460 if s1.AuxInt != 16 { 14461 break 14462 } 14463 x2 := s1.Args[0] 14464 if x2.Op != OpS390XMOVBZloadidx { 14465 break 14466 } 14467 if x2.AuxInt != i+2 { 14468 break 14469 } 14470 if x2.Aux != s { 14471 break 14472 } 14473 if p != x2.Args[0] { 14474 break 14475 } 14476 if idx != x2.Args[1] { 14477 break 14478 } 14479 if mem != x2.Args[2] { 14480 break 14481 } 14482 s2 := o3.Args[1] 14483 if s2.Op != OpS390XSLDconst { 14484 break 14485 } 14486 if s2.AuxInt != 24 { 14487 break 14488 } 14489 x3 := s2.Args[0] 14490 if x3.Op != OpS390XMOVBZloadidx { 14491 break 14492 } 14493 if x3.AuxInt != i+3 { 14494 break 14495 } 14496 if x3.Aux != s { 14497 break 14498 } 14499 if p != x3.Args[0] { 14500 break 14501 } 14502 if idx != x3.Args[1] { 14503 break 14504 } 14505 if mem != x3.Args[2] { 14506 break 14507 } 14508 s3 := o2.Args[1] 14509 if s3.Op != OpS390XSLDconst { 14510 break 14511 } 14512 if s3.AuxInt != 32 { 14513 break 14514 } 14515 x4 := s3.Args[0] 14516 if x4.Op != OpS390XMOVBZloadidx { 14517 break 14518 } 14519 if x4.AuxInt != i+4 { 14520 break 14521 } 14522 if x4.Aux != s { 14523 break 14524 } 14525 if p != x4.Args[0] { 14526 break 14527 } 14528 if idx != x4.Args[1] { 14529 break 14530 } 14531 if mem != x4.Args[2] { 14532 break 14533 } 14534 s4 := o1.Args[1] 14535 if s4.Op != OpS390XSLDconst { 14536 break 14537 } 14538 if s4.AuxInt != 40 { 14539 break 14540 } 14541 x5 := s4.Args[0] 14542 if x5.Op != OpS390XMOVBZloadidx { 14543 break 14544 } 14545 if x5.AuxInt != i+5 { 14546 break 14547 } 14548 if x5.Aux != s { 14549 break 14550 } 14551 if p != x5.Args[0] { 14552 break 14553 } 14554 if idx != x5.Args[1] { 14555 break 14556 } 14557 if mem != x5.Args[2] { 14558 break 14559 } 14560 s5 := o0.Args[1] 14561 if s5.Op != OpS390XSLDconst { 14562 break 14563 } 14564 if s5.AuxInt != 48 { 14565 break 14566 } 14567 x6 := s5.Args[0] 14568 if x6.Op != OpS390XMOVBZloadidx { 14569 break 14570 } 14571 if x6.AuxInt != i+6 { 14572 break 14573 } 14574 if x6.Aux != s { 14575 break 14576 } 14577 if p != x6.Args[0] { 14578 break 14579 } 14580 if idx != x6.Args[1] { 14581 break 14582 } 14583 if mem != x6.Args[2] { 14584 break 14585 } 14586 s6 := v.Args[1] 14587 if s6.Op != OpS390XSLDconst { 14588 break 14589 } 14590 if s6.AuxInt != 56 { 14591 break 14592 } 14593 x7 := s6.Args[0] 14594 if x7.Op != OpS390XMOVBZloadidx { 14595 break 14596 } 14597 if x7.AuxInt != i+7 { 14598 break 14599 } 14600 if x7.Aux != s { 14601 break 14602 } 14603 if p != x7.Args[0] { 14604 break 14605 } 14606 if idx != x7.Args[1] { 14607 break 14608 } 14609 if mem != x7.Args[2] { 14610 break 14611 } 14612 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14613 break 14614 } 14615 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14616 v0 := b.NewValue0(v.Line, OpS390XMOVDBRloadidx, v.Type) 14617 v.reset(OpCopy) 14618 v.AddArg(v0) 14619 v0.AuxInt = i 14620 v0.Aux = s 14621 v0.AddArg(p) 14622 v0.AddArg(idx) 14623 v0.AddArg(mem) 14624 return true 14625 } 14626 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 14627 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14628 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 14629 for { 14630 o0 := v.Args[0] 14631 if o0.Op != OpS390XOR { 14632 break 14633 } 14634 o1 := o0.Args[0] 14635 if o1.Op != OpS390XOR { 14636 break 14637 } 14638 o2 := o1.Args[0] 14639 if o2.Op != OpS390XOR { 14640 break 14641 } 14642 o3 := o2.Args[0] 14643 if o3.Op != OpS390XOR { 14644 break 14645 } 14646 o4 := o3.Args[0] 14647 if o4.Op != OpS390XOR { 14648 break 14649 } 14650 o5 := o4.Args[0] 14651 if o5.Op != OpS390XOR { 14652 break 14653 } 14654 x0 := o5.Args[0] 14655 if x0.Op != OpS390XMOVBZload { 14656 break 14657 } 14658 i := x0.AuxInt 14659 s := x0.Aux 14660 p := x0.Args[0] 14661 mem := x0.Args[1] 14662 s0 := o5.Args[1] 14663 if s0.Op != OpS390XSLDconst { 14664 break 14665 } 14666 if s0.AuxInt != 8 { 14667 break 14668 } 14669 x1 := s0.Args[0] 14670 if x1.Op != OpS390XMOVBZload { 14671 break 14672 } 14673 if x1.AuxInt != i-1 { 14674 break 14675 } 14676 if x1.Aux != s { 14677 break 14678 } 14679 if p != x1.Args[0] { 14680 break 14681 } 14682 if mem != x1.Args[1] { 14683 break 14684 } 14685 s1 := o4.Args[1] 14686 if s1.Op != OpS390XSLDconst { 14687 break 14688 } 14689 if s1.AuxInt != 16 { 14690 break 14691 } 14692 x2 := s1.Args[0] 14693 if x2.Op != OpS390XMOVBZload { 14694 break 14695 } 14696 if x2.AuxInt != i-2 { 14697 break 14698 } 14699 if x2.Aux != s { 14700 break 14701 } 14702 if p != x2.Args[0] { 14703 break 14704 } 14705 if mem != x2.Args[1] { 14706 break 14707 } 14708 s2 := o3.Args[1] 14709 if s2.Op != OpS390XSLDconst { 14710 break 14711 } 14712 if s2.AuxInt != 24 { 14713 break 14714 } 14715 x3 := s2.Args[0] 14716 if x3.Op != OpS390XMOVBZload { 14717 break 14718 } 14719 if x3.AuxInt != i-3 { 14720 break 14721 } 14722 if x3.Aux != s { 14723 break 14724 } 14725 if p != x3.Args[0] { 14726 break 14727 } 14728 if mem != x3.Args[1] { 14729 break 14730 } 14731 s3 := o2.Args[1] 14732 if s3.Op != OpS390XSLDconst { 14733 break 14734 } 14735 if s3.AuxInt != 32 { 14736 break 14737 } 14738 x4 := s3.Args[0] 14739 if x4.Op != OpS390XMOVBZload { 14740 break 14741 } 14742 if x4.AuxInt != i-4 { 14743 break 14744 } 14745 if x4.Aux != s { 14746 break 14747 } 14748 if p != x4.Args[0] { 14749 break 14750 } 14751 if mem != x4.Args[1] { 14752 break 14753 } 14754 s4 := o1.Args[1] 14755 if s4.Op != OpS390XSLDconst { 14756 break 14757 } 14758 if s4.AuxInt != 40 { 14759 break 14760 } 14761 x5 := s4.Args[0] 14762 if x5.Op != OpS390XMOVBZload { 14763 break 14764 } 14765 if x5.AuxInt != i-5 { 14766 break 14767 } 14768 if x5.Aux != s { 14769 break 14770 } 14771 if p != x5.Args[0] { 14772 break 14773 } 14774 if mem != x5.Args[1] { 14775 break 14776 } 14777 s5 := o0.Args[1] 14778 if s5.Op != OpS390XSLDconst { 14779 break 14780 } 14781 if s5.AuxInt != 48 { 14782 break 14783 } 14784 x6 := s5.Args[0] 14785 if x6.Op != OpS390XMOVBZload { 14786 break 14787 } 14788 if x6.AuxInt != i-6 { 14789 break 14790 } 14791 if x6.Aux != s { 14792 break 14793 } 14794 if p != x6.Args[0] { 14795 break 14796 } 14797 if mem != x6.Args[1] { 14798 break 14799 } 14800 s6 := v.Args[1] 14801 if s6.Op != OpS390XSLDconst { 14802 break 14803 } 14804 if s6.AuxInt != 56 { 14805 break 14806 } 14807 x7 := s6.Args[0] 14808 if x7.Op != OpS390XMOVBZload { 14809 break 14810 } 14811 if x7.AuxInt != i-7 { 14812 break 14813 } 14814 if x7.Aux != s { 14815 break 14816 } 14817 if p != x7.Args[0] { 14818 break 14819 } 14820 if mem != x7.Args[1] { 14821 break 14822 } 14823 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14824 break 14825 } 14826 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14827 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 14828 v.reset(OpCopy) 14829 v.AddArg(v0) 14830 v0.AuxInt = i - 7 14831 v0.Aux = s 14832 v0.AddArg(p) 14833 v0.AddArg(mem) 14834 return true 14835 } 14836 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 14837 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14838 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 14839 for { 14840 o0 := v.Args[0] 14841 if o0.Op != OpS390XOR { 14842 break 14843 } 14844 o1 := o0.Args[0] 14845 if o1.Op != OpS390XOR { 14846 break 14847 } 14848 o2 := o1.Args[0] 14849 if o2.Op != OpS390XOR { 14850 break 14851 } 14852 o3 := o2.Args[0] 14853 if o3.Op != OpS390XOR { 14854 break 14855 } 14856 o4 := o3.Args[0] 14857 if o4.Op != OpS390XOR { 14858 break 14859 } 14860 o5 := o4.Args[0] 14861 if o5.Op != OpS390XOR { 14862 break 14863 } 14864 x0 := o5.Args[0] 14865 if x0.Op != OpS390XMOVBZloadidx { 14866 break 14867 } 14868 i := x0.AuxInt 14869 s := x0.Aux 14870 p := x0.Args[0] 14871 idx := x0.Args[1] 14872 mem := x0.Args[2] 14873 s0 := o5.Args[1] 14874 if s0.Op != OpS390XSLDconst { 14875 break 14876 } 14877 if s0.AuxInt != 8 { 14878 break 14879 } 14880 x1 := s0.Args[0] 14881 if x1.Op != OpS390XMOVBZloadidx { 14882 break 14883 } 14884 if x1.AuxInt != i-1 { 14885 break 14886 } 14887 if x1.Aux != s { 14888 break 14889 } 14890 if p != x1.Args[0] { 14891 break 14892 } 14893 if idx != x1.Args[1] { 14894 break 14895 } 14896 if mem != x1.Args[2] { 14897 break 14898 } 14899 s1 := o4.Args[1] 14900 if s1.Op != OpS390XSLDconst { 14901 break 14902 } 14903 if s1.AuxInt != 16 { 14904 break 14905 } 14906 x2 := s1.Args[0] 14907 if x2.Op != OpS390XMOVBZloadidx { 14908 break 14909 } 14910 if x2.AuxInt != i-2 { 14911 break 14912 } 14913 if x2.Aux != s { 14914 break 14915 } 14916 if p != x2.Args[0] { 14917 break 14918 } 14919 if idx != x2.Args[1] { 14920 break 14921 } 14922 if mem != x2.Args[2] { 14923 break 14924 } 14925 s2 := o3.Args[1] 14926 if s2.Op != OpS390XSLDconst { 14927 break 14928 } 14929 if s2.AuxInt != 24 { 14930 break 14931 } 14932 x3 := s2.Args[0] 14933 if x3.Op != OpS390XMOVBZloadidx { 14934 break 14935 } 14936 if x3.AuxInt != i-3 { 14937 break 14938 } 14939 if x3.Aux != s { 14940 break 14941 } 14942 if p != x3.Args[0] { 14943 break 14944 } 14945 if idx != x3.Args[1] { 14946 break 14947 } 14948 if mem != x3.Args[2] { 14949 break 14950 } 14951 s3 := o2.Args[1] 14952 if s3.Op != OpS390XSLDconst { 14953 break 14954 } 14955 if s3.AuxInt != 32 { 14956 break 14957 } 14958 x4 := s3.Args[0] 14959 if x4.Op != OpS390XMOVBZloadidx { 14960 break 14961 } 14962 if x4.AuxInt != i-4 { 14963 break 14964 } 14965 if x4.Aux != s { 14966 break 14967 } 14968 if p != x4.Args[0] { 14969 break 14970 } 14971 if idx != x4.Args[1] { 14972 break 14973 } 14974 if mem != x4.Args[2] { 14975 break 14976 } 14977 s4 := o1.Args[1] 14978 if s4.Op != OpS390XSLDconst { 14979 break 14980 } 14981 if s4.AuxInt != 40 { 14982 break 14983 } 14984 x5 := s4.Args[0] 14985 if x5.Op != OpS390XMOVBZloadidx { 14986 break 14987 } 14988 if x5.AuxInt != i-5 { 14989 break 14990 } 14991 if x5.Aux != s { 14992 break 14993 } 14994 if p != x5.Args[0] { 14995 break 14996 } 14997 if idx != x5.Args[1] { 14998 break 14999 } 15000 if mem != x5.Args[2] { 15001 break 15002 } 15003 s5 := o0.Args[1] 15004 if s5.Op != OpS390XSLDconst { 15005 break 15006 } 15007 if s5.AuxInt != 48 { 15008 break 15009 } 15010 x6 := s5.Args[0] 15011 if x6.Op != OpS390XMOVBZloadidx { 15012 break 15013 } 15014 if x6.AuxInt != i-6 { 15015 break 15016 } 15017 if x6.Aux != s { 15018 break 15019 } 15020 if p != x6.Args[0] { 15021 break 15022 } 15023 if idx != x6.Args[1] { 15024 break 15025 } 15026 if mem != x6.Args[2] { 15027 break 15028 } 15029 s6 := v.Args[1] 15030 if s6.Op != OpS390XSLDconst { 15031 break 15032 } 15033 if s6.AuxInt != 56 { 15034 break 15035 } 15036 x7 := s6.Args[0] 15037 if x7.Op != OpS390XMOVBZloadidx { 15038 break 15039 } 15040 if x7.AuxInt != i-7 { 15041 break 15042 } 15043 if x7.Aux != s { 15044 break 15045 } 15046 if p != x7.Args[0] { 15047 break 15048 } 15049 if idx != x7.Args[1] { 15050 break 15051 } 15052 if mem != x7.Args[2] { 15053 break 15054 } 15055 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15056 break 15057 } 15058 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15059 v0 := b.NewValue0(v.Line, OpS390XMOVDloadidx, v.Type) 15060 v.reset(OpCopy) 15061 v.AddArg(v0) 15062 v0.AuxInt = i - 7 15063 v0.Aux = s 15064 v0.AddArg(p) 15065 v0.AddArg(idx) 15066 v0.AddArg(mem) 15067 return true 15068 } 15069 return false 15070 } 15071 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15072 b := v.Block 15073 _ = b 15074 // match: (ORW x (MOVDconst [c])) 15075 // cond: 15076 // result: (ORWconst [c] x) 15077 for { 15078 x := v.Args[0] 15079 v_1 := v.Args[1] 15080 if v_1.Op != OpS390XMOVDconst { 15081 break 15082 } 15083 c := v_1.AuxInt 15084 v.reset(OpS390XORWconst) 15085 v.AuxInt = c 15086 v.AddArg(x) 15087 return true 15088 } 15089 // match: (ORW (MOVDconst [c]) x) 15090 // cond: 15091 // result: (ORWconst [c] x) 15092 for { 15093 v_0 := v.Args[0] 15094 if v_0.Op != OpS390XMOVDconst { 15095 break 15096 } 15097 c := v_0.AuxInt 15098 x := v.Args[1] 15099 v.reset(OpS390XORWconst) 15100 v.AuxInt = c 15101 v.AddArg(x) 15102 return true 15103 } 15104 // match: (ORW x x) 15105 // cond: 15106 // result: x 15107 for { 15108 x := v.Args[0] 15109 if x != v.Args[1] { 15110 break 15111 } 15112 v.reset(OpCopy) 15113 v.Type = x.Type 15114 v.AddArg(x) 15115 return true 15116 } 15117 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15118 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15119 // result: (ORWload <t> [off] {sym} x ptr mem) 15120 for { 15121 t := v.Type 15122 x := v.Args[0] 15123 g := v.Args[1] 15124 if g.Op != OpS390XMOVWload { 15125 break 15126 } 15127 off := g.AuxInt 15128 sym := g.Aux 15129 ptr := g.Args[0] 15130 mem := g.Args[1] 15131 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15132 break 15133 } 15134 v.reset(OpS390XORWload) 15135 v.Type = t 15136 v.AuxInt = off 15137 v.Aux = sym 15138 v.AddArg(x) 15139 v.AddArg(ptr) 15140 v.AddArg(mem) 15141 return true 15142 } 15143 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15144 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15145 // result: (ORWload <t> [off] {sym} x ptr mem) 15146 for { 15147 t := v.Type 15148 g := v.Args[0] 15149 if g.Op != OpS390XMOVWload { 15150 break 15151 } 15152 off := g.AuxInt 15153 sym := g.Aux 15154 ptr := g.Args[0] 15155 mem := g.Args[1] 15156 x := v.Args[1] 15157 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15158 break 15159 } 15160 v.reset(OpS390XORWload) 15161 v.Type = t 15162 v.AuxInt = off 15163 v.Aux = sym 15164 v.AddArg(x) 15165 v.AddArg(ptr) 15166 v.AddArg(mem) 15167 return true 15168 } 15169 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15170 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15171 // result: (ORWload <t> [off] {sym} x ptr mem) 15172 for { 15173 t := v.Type 15174 x := v.Args[0] 15175 g := v.Args[1] 15176 if g.Op != OpS390XMOVWZload { 15177 break 15178 } 15179 off := g.AuxInt 15180 sym := g.Aux 15181 ptr := g.Args[0] 15182 mem := g.Args[1] 15183 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15184 break 15185 } 15186 v.reset(OpS390XORWload) 15187 v.Type = t 15188 v.AuxInt = off 15189 v.Aux = sym 15190 v.AddArg(x) 15191 v.AddArg(ptr) 15192 v.AddArg(mem) 15193 return true 15194 } 15195 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15196 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15197 // result: (ORWload <t> [off] {sym} x ptr mem) 15198 for { 15199 t := v.Type 15200 g := v.Args[0] 15201 if g.Op != OpS390XMOVWZload { 15202 break 15203 } 15204 off := g.AuxInt 15205 sym := g.Aux 15206 ptr := g.Args[0] 15207 mem := g.Args[1] 15208 x := v.Args[1] 15209 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15210 break 15211 } 15212 v.reset(OpS390XORWload) 15213 v.Type = t 15214 v.AuxInt = off 15215 v.Aux = sym 15216 v.AddArg(x) 15217 v.AddArg(ptr) 15218 v.AddArg(mem) 15219 return true 15220 } 15221 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 15222 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15223 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 15224 for { 15225 x0 := v.Args[0] 15226 if x0.Op != OpS390XMOVBZload { 15227 break 15228 } 15229 i := x0.AuxInt 15230 s := x0.Aux 15231 p := x0.Args[0] 15232 mem := x0.Args[1] 15233 s0 := v.Args[1] 15234 if s0.Op != OpS390XSLWconst { 15235 break 15236 } 15237 if s0.AuxInt != 8 { 15238 break 15239 } 15240 x1 := s0.Args[0] 15241 if x1.Op != OpS390XMOVBZload { 15242 break 15243 } 15244 if x1.AuxInt != i+1 { 15245 break 15246 } 15247 if x1.Aux != s { 15248 break 15249 } 15250 if p != x1.Args[0] { 15251 break 15252 } 15253 if mem != x1.Args[1] { 15254 break 15255 } 15256 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15257 break 15258 } 15259 b = mergePoint(b, x0, x1) 15260 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15261 v.reset(OpCopy) 15262 v.AddArg(v0) 15263 v1 := b.NewValue0(v.Line, OpS390XMOVHBRload, config.fe.TypeUInt16()) 15264 v1.AuxInt = i 15265 v1.Aux = s 15266 v1.AddArg(p) 15267 v1.AddArg(mem) 15268 v0.AddArg(v1) 15269 return true 15270 } 15271 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 15272 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15273 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 15274 for { 15275 o0 := v.Args[0] 15276 if o0.Op != OpS390XORW { 15277 break 15278 } 15279 z0 := o0.Args[0] 15280 if z0.Op != OpS390XMOVHZreg { 15281 break 15282 } 15283 x0 := z0.Args[0] 15284 if x0.Op != OpS390XMOVHBRload { 15285 break 15286 } 15287 i := x0.AuxInt 15288 s := x0.Aux 15289 p := x0.Args[0] 15290 mem := x0.Args[1] 15291 s0 := o0.Args[1] 15292 if s0.Op != OpS390XSLWconst { 15293 break 15294 } 15295 if s0.AuxInt != 16 { 15296 break 15297 } 15298 x1 := s0.Args[0] 15299 if x1.Op != OpS390XMOVBZload { 15300 break 15301 } 15302 if x1.AuxInt != i+2 { 15303 break 15304 } 15305 if x1.Aux != s { 15306 break 15307 } 15308 if p != x1.Args[0] { 15309 break 15310 } 15311 if mem != x1.Args[1] { 15312 break 15313 } 15314 s1 := v.Args[1] 15315 if s1.Op != OpS390XSLWconst { 15316 break 15317 } 15318 if s1.AuxInt != 24 { 15319 break 15320 } 15321 x2 := s1.Args[0] 15322 if x2.Op != OpS390XMOVBZload { 15323 break 15324 } 15325 if x2.AuxInt != i+3 { 15326 break 15327 } 15328 if x2.Aux != s { 15329 break 15330 } 15331 if p != x2.Args[0] { 15332 break 15333 } 15334 if mem != x2.Args[1] { 15335 break 15336 } 15337 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15338 break 15339 } 15340 b = mergePoint(b, x0, x1, x2) 15341 v0 := b.NewValue0(v.Line, OpS390XMOVWBRload, config.fe.TypeUInt32()) 15342 v.reset(OpCopy) 15343 v.AddArg(v0) 15344 v0.AuxInt = i 15345 v0.Aux = s 15346 v0.AddArg(p) 15347 v0.AddArg(mem) 15348 return true 15349 } 15350 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 15351 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15352 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 15353 for { 15354 x0 := v.Args[0] 15355 if x0.Op != OpS390XMOVBZloadidx { 15356 break 15357 } 15358 i := x0.AuxInt 15359 s := x0.Aux 15360 p := x0.Args[0] 15361 idx := x0.Args[1] 15362 mem := x0.Args[2] 15363 s0 := v.Args[1] 15364 if s0.Op != OpS390XSLWconst { 15365 break 15366 } 15367 if s0.AuxInt != 8 { 15368 break 15369 } 15370 x1 := s0.Args[0] 15371 if x1.Op != OpS390XMOVBZloadidx { 15372 break 15373 } 15374 if x1.AuxInt != i+1 { 15375 break 15376 } 15377 if x1.Aux != s { 15378 break 15379 } 15380 if p != x1.Args[0] { 15381 break 15382 } 15383 if idx != x1.Args[1] { 15384 break 15385 } 15386 if mem != x1.Args[2] { 15387 break 15388 } 15389 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15390 break 15391 } 15392 b = mergePoint(b, x0, x1) 15393 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15394 v.reset(OpCopy) 15395 v.AddArg(v0) 15396 v1 := b.NewValue0(v.Line, OpS390XMOVHBRloadidx, v.Type) 15397 v1.AuxInt = i 15398 v1.Aux = s 15399 v1.AddArg(p) 15400 v1.AddArg(idx) 15401 v1.AddArg(mem) 15402 v0.AddArg(v1) 15403 return true 15404 } 15405 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 15406 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15407 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 15408 for { 15409 o0 := v.Args[0] 15410 if o0.Op != OpS390XORW { 15411 break 15412 } 15413 z0 := o0.Args[0] 15414 if z0.Op != OpS390XMOVHZreg { 15415 break 15416 } 15417 x0 := z0.Args[0] 15418 if x0.Op != OpS390XMOVHBRloadidx { 15419 break 15420 } 15421 i := x0.AuxInt 15422 s := x0.Aux 15423 p := x0.Args[0] 15424 idx := x0.Args[1] 15425 mem := x0.Args[2] 15426 s0 := o0.Args[1] 15427 if s0.Op != OpS390XSLWconst { 15428 break 15429 } 15430 if s0.AuxInt != 16 { 15431 break 15432 } 15433 x1 := s0.Args[0] 15434 if x1.Op != OpS390XMOVBZloadidx { 15435 break 15436 } 15437 if x1.AuxInt != i+2 { 15438 break 15439 } 15440 if x1.Aux != s { 15441 break 15442 } 15443 if p != x1.Args[0] { 15444 break 15445 } 15446 if idx != x1.Args[1] { 15447 break 15448 } 15449 if mem != x1.Args[2] { 15450 break 15451 } 15452 s1 := v.Args[1] 15453 if s1.Op != OpS390XSLWconst { 15454 break 15455 } 15456 if s1.AuxInt != 24 { 15457 break 15458 } 15459 x2 := s1.Args[0] 15460 if x2.Op != OpS390XMOVBZloadidx { 15461 break 15462 } 15463 if x2.AuxInt != i+3 { 15464 break 15465 } 15466 if x2.Aux != s { 15467 break 15468 } 15469 if p != x2.Args[0] { 15470 break 15471 } 15472 if idx != x2.Args[1] { 15473 break 15474 } 15475 if mem != x2.Args[2] { 15476 break 15477 } 15478 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15479 break 15480 } 15481 b = mergePoint(b, x0, x1, x2) 15482 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 15483 v.reset(OpCopy) 15484 v.AddArg(v0) 15485 v1 := b.NewValue0(v.Line, OpS390XMOVWBRloadidx, v.Type) 15486 v1.AuxInt = i 15487 v1.Aux = s 15488 v1.AddArg(p) 15489 v1.AddArg(idx) 15490 v1.AddArg(mem) 15491 v0.AddArg(v1) 15492 return true 15493 } 15494 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 15495 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15496 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 15497 for { 15498 x0 := v.Args[0] 15499 if x0.Op != OpS390XMOVBZload { 15500 break 15501 } 15502 i := x0.AuxInt 15503 s := x0.Aux 15504 p := x0.Args[0] 15505 mem := x0.Args[1] 15506 s0 := v.Args[1] 15507 if s0.Op != OpS390XSLWconst { 15508 break 15509 } 15510 if s0.AuxInt != 8 { 15511 break 15512 } 15513 x1 := s0.Args[0] 15514 if x1.Op != OpS390XMOVBZload { 15515 break 15516 } 15517 if x1.AuxInt != i-1 { 15518 break 15519 } 15520 if x1.Aux != s { 15521 break 15522 } 15523 if p != x1.Args[0] { 15524 break 15525 } 15526 if mem != x1.Args[1] { 15527 break 15528 } 15529 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15530 break 15531 } 15532 b = mergePoint(b, x0, x1) 15533 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 15534 v.reset(OpCopy) 15535 v.AddArg(v0) 15536 v0.AuxInt = i - 1 15537 v0.Aux = s 15538 v0.AddArg(p) 15539 v0.AddArg(mem) 15540 return true 15541 } 15542 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 15543 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15544 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 15545 for { 15546 o0 := v.Args[0] 15547 if o0.Op != OpS390XORW { 15548 break 15549 } 15550 x0 := o0.Args[0] 15551 if x0.Op != OpS390XMOVHZload { 15552 break 15553 } 15554 i := x0.AuxInt 15555 s := x0.Aux 15556 p := x0.Args[0] 15557 mem := x0.Args[1] 15558 s0 := o0.Args[1] 15559 if s0.Op != OpS390XSLWconst { 15560 break 15561 } 15562 if s0.AuxInt != 16 { 15563 break 15564 } 15565 x1 := s0.Args[0] 15566 if x1.Op != OpS390XMOVBZload { 15567 break 15568 } 15569 if x1.AuxInt != i-1 { 15570 break 15571 } 15572 if x1.Aux != s { 15573 break 15574 } 15575 if p != x1.Args[0] { 15576 break 15577 } 15578 if mem != x1.Args[1] { 15579 break 15580 } 15581 s1 := v.Args[1] 15582 if s1.Op != OpS390XSLWconst { 15583 break 15584 } 15585 if s1.AuxInt != 24 { 15586 break 15587 } 15588 x2 := s1.Args[0] 15589 if x2.Op != OpS390XMOVBZload { 15590 break 15591 } 15592 if x2.AuxInt != i-2 { 15593 break 15594 } 15595 if x2.Aux != s { 15596 break 15597 } 15598 if p != x2.Args[0] { 15599 break 15600 } 15601 if mem != x2.Args[1] { 15602 break 15603 } 15604 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15605 break 15606 } 15607 b = mergePoint(b, x0, x1, x2) 15608 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 15609 v.reset(OpCopy) 15610 v.AddArg(v0) 15611 v0.AuxInt = i - 2 15612 v0.Aux = s 15613 v0.AddArg(p) 15614 v0.AddArg(mem) 15615 return true 15616 } 15617 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 15618 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15619 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 15620 for { 15621 x0 := v.Args[0] 15622 if x0.Op != OpS390XMOVBZloadidx { 15623 break 15624 } 15625 i := x0.AuxInt 15626 s := x0.Aux 15627 p := x0.Args[0] 15628 idx := x0.Args[1] 15629 mem := x0.Args[2] 15630 s0 := v.Args[1] 15631 if s0.Op != OpS390XSLWconst { 15632 break 15633 } 15634 if s0.AuxInt != 8 { 15635 break 15636 } 15637 x1 := s0.Args[0] 15638 if x1.Op != OpS390XMOVBZloadidx { 15639 break 15640 } 15641 if x1.AuxInt != i-1 { 15642 break 15643 } 15644 if x1.Aux != s { 15645 break 15646 } 15647 if p != x1.Args[0] { 15648 break 15649 } 15650 if idx != x1.Args[1] { 15651 break 15652 } 15653 if mem != x1.Args[2] { 15654 break 15655 } 15656 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15657 break 15658 } 15659 b = mergePoint(b, x0, x1) 15660 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 15661 v.reset(OpCopy) 15662 v.AddArg(v0) 15663 v0.AuxInt = i - 1 15664 v0.Aux = s 15665 v0.AddArg(p) 15666 v0.AddArg(idx) 15667 v0.AddArg(mem) 15668 return true 15669 } 15670 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 15671 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15672 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 15673 for { 15674 o0 := v.Args[0] 15675 if o0.Op != OpS390XORW { 15676 break 15677 } 15678 x0 := o0.Args[0] 15679 if x0.Op != OpS390XMOVHZloadidx { 15680 break 15681 } 15682 i := x0.AuxInt 15683 s := x0.Aux 15684 p := x0.Args[0] 15685 idx := x0.Args[1] 15686 mem := x0.Args[2] 15687 s0 := o0.Args[1] 15688 if s0.Op != OpS390XSLWconst { 15689 break 15690 } 15691 if s0.AuxInt != 16 { 15692 break 15693 } 15694 x1 := s0.Args[0] 15695 if x1.Op != OpS390XMOVBZloadidx { 15696 break 15697 } 15698 if x1.AuxInt != i-1 { 15699 break 15700 } 15701 if x1.Aux != s { 15702 break 15703 } 15704 if p != x1.Args[0] { 15705 break 15706 } 15707 if idx != x1.Args[1] { 15708 break 15709 } 15710 if mem != x1.Args[2] { 15711 break 15712 } 15713 s1 := v.Args[1] 15714 if s1.Op != OpS390XSLWconst { 15715 break 15716 } 15717 if s1.AuxInt != 24 { 15718 break 15719 } 15720 x2 := s1.Args[0] 15721 if x2.Op != OpS390XMOVBZloadidx { 15722 break 15723 } 15724 if x2.AuxInt != i-2 { 15725 break 15726 } 15727 if x2.Aux != s { 15728 break 15729 } 15730 if p != x2.Args[0] { 15731 break 15732 } 15733 if idx != x2.Args[1] { 15734 break 15735 } 15736 if mem != x2.Args[2] { 15737 break 15738 } 15739 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15740 break 15741 } 15742 b = mergePoint(b, x0, x1, x2) 15743 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 15744 v.reset(OpCopy) 15745 v.AddArg(v0) 15746 v0.AuxInt = i - 2 15747 v0.Aux = s 15748 v0.AddArg(p) 15749 v0.AddArg(idx) 15750 v0.AddArg(mem) 15751 return true 15752 } 15753 return false 15754 } 15755 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 15756 b := v.Block 15757 _ = b 15758 // match: (ORWconst [c] x) 15759 // cond: int32(c)==0 15760 // result: x 15761 for { 15762 c := v.AuxInt 15763 x := v.Args[0] 15764 if !(int32(c) == 0) { 15765 break 15766 } 15767 v.reset(OpCopy) 15768 v.Type = x.Type 15769 v.AddArg(x) 15770 return true 15771 } 15772 // match: (ORWconst [c] _) 15773 // cond: int32(c)==-1 15774 // result: (MOVDconst [-1]) 15775 for { 15776 c := v.AuxInt 15777 if !(int32(c) == -1) { 15778 break 15779 } 15780 v.reset(OpS390XMOVDconst) 15781 v.AuxInt = -1 15782 return true 15783 } 15784 // match: (ORWconst [c] (MOVDconst [d])) 15785 // cond: 15786 // result: (MOVDconst [c|d]) 15787 for { 15788 c := v.AuxInt 15789 v_0 := v.Args[0] 15790 if v_0.Op != OpS390XMOVDconst { 15791 break 15792 } 15793 d := v_0.AuxInt 15794 v.reset(OpS390XMOVDconst) 15795 v.AuxInt = c | d 15796 return true 15797 } 15798 return false 15799 } 15800 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 15801 b := v.Block 15802 _ = b 15803 // match: (ORconst [0] x) 15804 // cond: 15805 // result: x 15806 for { 15807 if v.AuxInt != 0 { 15808 break 15809 } 15810 x := v.Args[0] 15811 v.reset(OpCopy) 15812 v.Type = x.Type 15813 v.AddArg(x) 15814 return true 15815 } 15816 // match: (ORconst [-1] _) 15817 // cond: 15818 // result: (MOVDconst [-1]) 15819 for { 15820 if v.AuxInt != -1 { 15821 break 15822 } 15823 v.reset(OpS390XMOVDconst) 15824 v.AuxInt = -1 15825 return true 15826 } 15827 // match: (ORconst [c] (MOVDconst [d])) 15828 // cond: 15829 // result: (MOVDconst [c|d]) 15830 for { 15831 c := v.AuxInt 15832 v_0 := v.Args[0] 15833 if v_0.Op != OpS390XMOVDconst { 15834 break 15835 } 15836 d := v_0.AuxInt 15837 v.reset(OpS390XMOVDconst) 15838 v.AuxInt = c | d 15839 return true 15840 } 15841 return false 15842 } 15843 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 15844 b := v.Block 15845 _ = b 15846 // match: (SLD x (MOVDconst [c])) 15847 // cond: 15848 // result: (SLDconst [c&63] x) 15849 for { 15850 x := v.Args[0] 15851 v_1 := v.Args[1] 15852 if v_1.Op != OpS390XMOVDconst { 15853 break 15854 } 15855 c := v_1.AuxInt 15856 v.reset(OpS390XSLDconst) 15857 v.AuxInt = c & 63 15858 v.AddArg(x) 15859 return true 15860 } 15861 // match: (SLD x (ANDconst [63] y)) 15862 // cond: 15863 // result: (SLD x y) 15864 for { 15865 x := v.Args[0] 15866 v_1 := v.Args[1] 15867 if v_1.Op != OpS390XANDconst { 15868 break 15869 } 15870 if v_1.AuxInt != 63 { 15871 break 15872 } 15873 y := v_1.Args[0] 15874 v.reset(OpS390XSLD) 15875 v.AddArg(x) 15876 v.AddArg(y) 15877 return true 15878 } 15879 return false 15880 } 15881 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 15882 b := v.Block 15883 _ = b 15884 // match: (SLW x (MOVDconst [c])) 15885 // cond: 15886 // result: (SLWconst [c&63] x) 15887 for { 15888 x := v.Args[0] 15889 v_1 := v.Args[1] 15890 if v_1.Op != OpS390XMOVDconst { 15891 break 15892 } 15893 c := v_1.AuxInt 15894 v.reset(OpS390XSLWconst) 15895 v.AuxInt = c & 63 15896 v.AddArg(x) 15897 return true 15898 } 15899 // match: (SLW x (ANDWconst [63] y)) 15900 // cond: 15901 // result: (SLW x y) 15902 for { 15903 x := v.Args[0] 15904 v_1 := v.Args[1] 15905 if v_1.Op != OpS390XANDWconst { 15906 break 15907 } 15908 if v_1.AuxInt != 63 { 15909 break 15910 } 15911 y := v_1.Args[0] 15912 v.reset(OpS390XSLW) 15913 v.AddArg(x) 15914 v.AddArg(y) 15915 return true 15916 } 15917 return false 15918 } 15919 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 15920 b := v.Block 15921 _ = b 15922 // match: (SRAD x (MOVDconst [c])) 15923 // cond: 15924 // result: (SRADconst [c&63] x) 15925 for { 15926 x := v.Args[0] 15927 v_1 := v.Args[1] 15928 if v_1.Op != OpS390XMOVDconst { 15929 break 15930 } 15931 c := v_1.AuxInt 15932 v.reset(OpS390XSRADconst) 15933 v.AuxInt = c & 63 15934 v.AddArg(x) 15935 return true 15936 } 15937 // match: (SRAD x (ANDconst [63] y)) 15938 // cond: 15939 // result: (SRAD x y) 15940 for { 15941 x := v.Args[0] 15942 v_1 := v.Args[1] 15943 if v_1.Op != OpS390XANDconst { 15944 break 15945 } 15946 if v_1.AuxInt != 63 { 15947 break 15948 } 15949 y := v_1.Args[0] 15950 v.reset(OpS390XSRAD) 15951 v.AddArg(x) 15952 v.AddArg(y) 15953 return true 15954 } 15955 return false 15956 } 15957 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 15958 b := v.Block 15959 _ = b 15960 // match: (SRADconst [c] (MOVDconst [d])) 15961 // cond: 15962 // result: (MOVDconst [d>>uint64(c)]) 15963 for { 15964 c := v.AuxInt 15965 v_0 := v.Args[0] 15966 if v_0.Op != OpS390XMOVDconst { 15967 break 15968 } 15969 d := v_0.AuxInt 15970 v.reset(OpS390XMOVDconst) 15971 v.AuxInt = d >> uint64(c) 15972 return true 15973 } 15974 return false 15975 } 15976 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 15977 b := v.Block 15978 _ = b 15979 // match: (SRAW x (MOVDconst [c])) 15980 // cond: 15981 // result: (SRAWconst [c&63] x) 15982 for { 15983 x := v.Args[0] 15984 v_1 := v.Args[1] 15985 if v_1.Op != OpS390XMOVDconst { 15986 break 15987 } 15988 c := v_1.AuxInt 15989 v.reset(OpS390XSRAWconst) 15990 v.AuxInt = c & 63 15991 v.AddArg(x) 15992 return true 15993 } 15994 // match: (SRAW x (ANDWconst [63] y)) 15995 // cond: 15996 // result: (SRAW x y) 15997 for { 15998 x := v.Args[0] 15999 v_1 := v.Args[1] 16000 if v_1.Op != OpS390XANDWconst { 16001 break 16002 } 16003 if v_1.AuxInt != 63 { 16004 break 16005 } 16006 y := v_1.Args[0] 16007 v.reset(OpS390XSRAW) 16008 v.AddArg(x) 16009 v.AddArg(y) 16010 return true 16011 } 16012 return false 16013 } 16014 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 16015 b := v.Block 16016 _ = b 16017 // match: (SRAWconst [c] (MOVDconst [d])) 16018 // cond: 16019 // result: (MOVDconst [d>>uint64(c)]) 16020 for { 16021 c := v.AuxInt 16022 v_0 := v.Args[0] 16023 if v_0.Op != OpS390XMOVDconst { 16024 break 16025 } 16026 d := v_0.AuxInt 16027 v.reset(OpS390XMOVDconst) 16028 v.AuxInt = d >> uint64(c) 16029 return true 16030 } 16031 return false 16032 } 16033 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 16034 b := v.Block 16035 _ = b 16036 // match: (SRD x (MOVDconst [c])) 16037 // cond: 16038 // result: (SRDconst [c&63] x) 16039 for { 16040 x := v.Args[0] 16041 v_1 := v.Args[1] 16042 if v_1.Op != OpS390XMOVDconst { 16043 break 16044 } 16045 c := v_1.AuxInt 16046 v.reset(OpS390XSRDconst) 16047 v.AuxInt = c & 63 16048 v.AddArg(x) 16049 return true 16050 } 16051 // match: (SRD x (ANDconst [63] y)) 16052 // cond: 16053 // result: (SRD x y) 16054 for { 16055 x := v.Args[0] 16056 v_1 := v.Args[1] 16057 if v_1.Op != OpS390XANDconst { 16058 break 16059 } 16060 if v_1.AuxInt != 63 { 16061 break 16062 } 16063 y := v_1.Args[0] 16064 v.reset(OpS390XSRD) 16065 v.AddArg(x) 16066 v.AddArg(y) 16067 return true 16068 } 16069 return false 16070 } 16071 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16072 b := v.Block 16073 _ = b 16074 // match: (SRW x (MOVDconst [c])) 16075 // cond: 16076 // result: (SRWconst [c&63] x) 16077 for { 16078 x := v.Args[0] 16079 v_1 := v.Args[1] 16080 if v_1.Op != OpS390XMOVDconst { 16081 break 16082 } 16083 c := v_1.AuxInt 16084 v.reset(OpS390XSRWconst) 16085 v.AuxInt = c & 63 16086 v.AddArg(x) 16087 return true 16088 } 16089 // match: (SRW x (ANDWconst [63] y)) 16090 // cond: 16091 // result: (SRW x y) 16092 for { 16093 x := v.Args[0] 16094 v_1 := v.Args[1] 16095 if v_1.Op != OpS390XANDWconst { 16096 break 16097 } 16098 if v_1.AuxInt != 63 { 16099 break 16100 } 16101 y := v_1.Args[0] 16102 v.reset(OpS390XSRW) 16103 v.AddArg(x) 16104 v.AddArg(y) 16105 return true 16106 } 16107 return false 16108 } 16109 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16110 b := v.Block 16111 _ = b 16112 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16113 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16114 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16115 for { 16116 i := v.AuxInt 16117 s := v.Aux 16118 p := v.Args[0] 16119 w2 := v.Args[1] 16120 w3 := v.Args[2] 16121 x := v.Args[3] 16122 if x.Op != OpS390XSTM2 { 16123 break 16124 } 16125 if x.AuxInt != i-8 { 16126 break 16127 } 16128 if x.Aux != s { 16129 break 16130 } 16131 if p != x.Args[0] { 16132 break 16133 } 16134 w0 := x.Args[1] 16135 w1 := x.Args[2] 16136 mem := x.Args[3] 16137 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16138 break 16139 } 16140 v.reset(OpS390XSTM4) 16141 v.AuxInt = i - 8 16142 v.Aux = s 16143 v.AddArg(p) 16144 v.AddArg(w0) 16145 v.AddArg(w1) 16146 v.AddArg(w2) 16147 v.AddArg(w3) 16148 v.AddArg(mem) 16149 return true 16150 } 16151 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16152 // cond: 16153 // result: (MOVDstore [i] {s} p x mem) 16154 for { 16155 i := v.AuxInt 16156 s := v.Aux 16157 p := v.Args[0] 16158 v_1 := v.Args[1] 16159 if v_1.Op != OpS390XSRDconst { 16160 break 16161 } 16162 if v_1.AuxInt != 32 { 16163 break 16164 } 16165 x := v_1.Args[0] 16166 if x != v.Args[2] { 16167 break 16168 } 16169 mem := v.Args[3] 16170 v.reset(OpS390XMOVDstore) 16171 v.AuxInt = i 16172 v.Aux = s 16173 v.AddArg(p) 16174 v.AddArg(x) 16175 v.AddArg(mem) 16176 return true 16177 } 16178 return false 16179 } 16180 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16181 b := v.Block 16182 _ = b 16183 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 16184 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 16185 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 16186 for { 16187 i := v.AuxInt 16188 s := v.Aux 16189 p := v.Args[0] 16190 w2 := v.Args[1] 16191 w3 := v.Args[2] 16192 x := v.Args[3] 16193 if x.Op != OpS390XSTMG2 { 16194 break 16195 } 16196 if x.AuxInt != i-16 { 16197 break 16198 } 16199 if x.Aux != s { 16200 break 16201 } 16202 if p != x.Args[0] { 16203 break 16204 } 16205 w0 := x.Args[1] 16206 w1 := x.Args[2] 16207 mem := x.Args[3] 16208 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 16209 break 16210 } 16211 v.reset(OpS390XSTMG4) 16212 v.AuxInt = i - 16 16213 v.Aux = s 16214 v.AddArg(p) 16215 v.AddArg(w0) 16216 v.AddArg(w1) 16217 v.AddArg(w2) 16218 v.AddArg(w3) 16219 v.AddArg(mem) 16220 return true 16221 } 16222 return false 16223 } 16224 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 16225 b := v.Block 16226 _ = b 16227 // match: (SUB x (MOVDconst [c])) 16228 // cond: is32Bit(c) 16229 // result: (SUBconst x [c]) 16230 for { 16231 x := v.Args[0] 16232 v_1 := v.Args[1] 16233 if v_1.Op != OpS390XMOVDconst { 16234 break 16235 } 16236 c := v_1.AuxInt 16237 if !(is32Bit(c)) { 16238 break 16239 } 16240 v.reset(OpS390XSUBconst) 16241 v.AuxInt = c 16242 v.AddArg(x) 16243 return true 16244 } 16245 // match: (SUB (MOVDconst [c]) x) 16246 // cond: is32Bit(c) 16247 // result: (NEG (SUBconst <v.Type> x [c])) 16248 for { 16249 v_0 := v.Args[0] 16250 if v_0.Op != OpS390XMOVDconst { 16251 break 16252 } 16253 c := v_0.AuxInt 16254 x := v.Args[1] 16255 if !(is32Bit(c)) { 16256 break 16257 } 16258 v.reset(OpS390XNEG) 16259 v0 := b.NewValue0(v.Line, OpS390XSUBconst, v.Type) 16260 v0.AuxInt = c 16261 v0.AddArg(x) 16262 v.AddArg(v0) 16263 return true 16264 } 16265 // match: (SUB x x) 16266 // cond: 16267 // result: (MOVDconst [0]) 16268 for { 16269 x := v.Args[0] 16270 if x != v.Args[1] { 16271 break 16272 } 16273 v.reset(OpS390XMOVDconst) 16274 v.AuxInt = 0 16275 return true 16276 } 16277 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 16278 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16279 // result: (SUBload <t> [off] {sym} x ptr mem) 16280 for { 16281 t := v.Type 16282 x := v.Args[0] 16283 g := v.Args[1] 16284 if g.Op != OpS390XMOVDload { 16285 break 16286 } 16287 off := g.AuxInt 16288 sym := g.Aux 16289 ptr := g.Args[0] 16290 mem := g.Args[1] 16291 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16292 break 16293 } 16294 v.reset(OpS390XSUBload) 16295 v.Type = t 16296 v.AuxInt = off 16297 v.Aux = sym 16298 v.AddArg(x) 16299 v.AddArg(ptr) 16300 v.AddArg(mem) 16301 return true 16302 } 16303 return false 16304 } 16305 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 16306 b := v.Block 16307 _ = b 16308 // match: (SUBEWcarrymask (FlagEQ)) 16309 // cond: 16310 // result: (MOVDconst [-1]) 16311 for { 16312 v_0 := v.Args[0] 16313 if v_0.Op != OpS390XFlagEQ { 16314 break 16315 } 16316 v.reset(OpS390XMOVDconst) 16317 v.AuxInt = -1 16318 return true 16319 } 16320 // match: (SUBEWcarrymask (FlagLT)) 16321 // cond: 16322 // result: (MOVDconst [-1]) 16323 for { 16324 v_0 := v.Args[0] 16325 if v_0.Op != OpS390XFlagLT { 16326 break 16327 } 16328 v.reset(OpS390XMOVDconst) 16329 v.AuxInt = -1 16330 return true 16331 } 16332 // match: (SUBEWcarrymask (FlagGT)) 16333 // cond: 16334 // result: (MOVDconst [0]) 16335 for { 16336 v_0 := v.Args[0] 16337 if v_0.Op != OpS390XFlagGT { 16338 break 16339 } 16340 v.reset(OpS390XMOVDconst) 16341 v.AuxInt = 0 16342 return true 16343 } 16344 return false 16345 } 16346 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 16347 b := v.Block 16348 _ = b 16349 // match: (SUBEcarrymask (FlagEQ)) 16350 // cond: 16351 // result: (MOVDconst [-1]) 16352 for { 16353 v_0 := v.Args[0] 16354 if v_0.Op != OpS390XFlagEQ { 16355 break 16356 } 16357 v.reset(OpS390XMOVDconst) 16358 v.AuxInt = -1 16359 return true 16360 } 16361 // match: (SUBEcarrymask (FlagLT)) 16362 // cond: 16363 // result: (MOVDconst [-1]) 16364 for { 16365 v_0 := v.Args[0] 16366 if v_0.Op != OpS390XFlagLT { 16367 break 16368 } 16369 v.reset(OpS390XMOVDconst) 16370 v.AuxInt = -1 16371 return true 16372 } 16373 // match: (SUBEcarrymask (FlagGT)) 16374 // cond: 16375 // result: (MOVDconst [0]) 16376 for { 16377 v_0 := v.Args[0] 16378 if v_0.Op != OpS390XFlagGT { 16379 break 16380 } 16381 v.reset(OpS390XMOVDconst) 16382 v.AuxInt = 0 16383 return true 16384 } 16385 return false 16386 } 16387 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 16388 b := v.Block 16389 _ = b 16390 // match: (SUBW x (MOVDconst [c])) 16391 // cond: 16392 // result: (SUBWconst x [c]) 16393 for { 16394 x := v.Args[0] 16395 v_1 := v.Args[1] 16396 if v_1.Op != OpS390XMOVDconst { 16397 break 16398 } 16399 c := v_1.AuxInt 16400 v.reset(OpS390XSUBWconst) 16401 v.AuxInt = c 16402 v.AddArg(x) 16403 return true 16404 } 16405 // match: (SUBW (MOVDconst [c]) x) 16406 // cond: 16407 // result: (NEGW (SUBWconst <v.Type> x [c])) 16408 for { 16409 v_0 := v.Args[0] 16410 if v_0.Op != OpS390XMOVDconst { 16411 break 16412 } 16413 c := v_0.AuxInt 16414 x := v.Args[1] 16415 v.reset(OpS390XNEGW) 16416 v0 := b.NewValue0(v.Line, OpS390XSUBWconst, v.Type) 16417 v0.AuxInt = c 16418 v0.AddArg(x) 16419 v.AddArg(v0) 16420 return true 16421 } 16422 // match: (SUBW x x) 16423 // cond: 16424 // result: (MOVDconst [0]) 16425 for { 16426 x := v.Args[0] 16427 if x != v.Args[1] { 16428 break 16429 } 16430 v.reset(OpS390XMOVDconst) 16431 v.AuxInt = 0 16432 return true 16433 } 16434 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 16435 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16436 // result: (SUBWload <t> [off] {sym} x ptr mem) 16437 for { 16438 t := v.Type 16439 x := v.Args[0] 16440 g := v.Args[1] 16441 if g.Op != OpS390XMOVWload { 16442 break 16443 } 16444 off := g.AuxInt 16445 sym := g.Aux 16446 ptr := g.Args[0] 16447 mem := g.Args[1] 16448 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16449 break 16450 } 16451 v.reset(OpS390XSUBWload) 16452 v.Type = t 16453 v.AuxInt = off 16454 v.Aux = sym 16455 v.AddArg(x) 16456 v.AddArg(ptr) 16457 v.AddArg(mem) 16458 return true 16459 } 16460 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16461 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16462 // result: (SUBWload <t> [off] {sym} x ptr mem) 16463 for { 16464 t := v.Type 16465 x := v.Args[0] 16466 g := v.Args[1] 16467 if g.Op != OpS390XMOVWZload { 16468 break 16469 } 16470 off := g.AuxInt 16471 sym := g.Aux 16472 ptr := g.Args[0] 16473 mem := g.Args[1] 16474 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16475 break 16476 } 16477 v.reset(OpS390XSUBWload) 16478 v.Type = t 16479 v.AuxInt = off 16480 v.Aux = sym 16481 v.AddArg(x) 16482 v.AddArg(ptr) 16483 v.AddArg(mem) 16484 return true 16485 } 16486 return false 16487 } 16488 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 16489 b := v.Block 16490 _ = b 16491 // match: (SUBWconst [c] x) 16492 // cond: int32(c) == 0 16493 // result: x 16494 for { 16495 c := v.AuxInt 16496 x := v.Args[0] 16497 if !(int32(c) == 0) { 16498 break 16499 } 16500 v.reset(OpCopy) 16501 v.Type = x.Type 16502 v.AddArg(x) 16503 return true 16504 } 16505 // match: (SUBWconst [c] x) 16506 // cond: 16507 // result: (ADDWconst [int64(int32(-c))] x) 16508 for { 16509 c := v.AuxInt 16510 x := v.Args[0] 16511 v.reset(OpS390XADDWconst) 16512 v.AuxInt = int64(int32(-c)) 16513 v.AddArg(x) 16514 return true 16515 } 16516 } 16517 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 16518 b := v.Block 16519 _ = b 16520 // match: (SUBconst [0] x) 16521 // cond: 16522 // result: x 16523 for { 16524 if v.AuxInt != 0 { 16525 break 16526 } 16527 x := v.Args[0] 16528 v.reset(OpCopy) 16529 v.Type = x.Type 16530 v.AddArg(x) 16531 return true 16532 } 16533 // match: (SUBconst [c] x) 16534 // cond: c != -(1<<31) 16535 // result: (ADDconst [-c] x) 16536 for { 16537 c := v.AuxInt 16538 x := v.Args[0] 16539 if !(c != -(1 << 31)) { 16540 break 16541 } 16542 v.reset(OpS390XADDconst) 16543 v.AuxInt = -c 16544 v.AddArg(x) 16545 return true 16546 } 16547 // match: (SUBconst (MOVDconst [d]) [c]) 16548 // cond: 16549 // result: (MOVDconst [d-c]) 16550 for { 16551 c := v.AuxInt 16552 v_0 := v.Args[0] 16553 if v_0.Op != OpS390XMOVDconst { 16554 break 16555 } 16556 d := v_0.AuxInt 16557 v.reset(OpS390XMOVDconst) 16558 v.AuxInt = d - c 16559 return true 16560 } 16561 // match: (SUBconst (SUBconst x [d]) [c]) 16562 // cond: is32Bit(-c-d) 16563 // result: (ADDconst [-c-d] x) 16564 for { 16565 c := v.AuxInt 16566 v_0 := v.Args[0] 16567 if v_0.Op != OpS390XSUBconst { 16568 break 16569 } 16570 d := v_0.AuxInt 16571 x := v_0.Args[0] 16572 if !(is32Bit(-c - d)) { 16573 break 16574 } 16575 v.reset(OpS390XADDconst) 16576 v.AuxInt = -c - d 16577 v.AddArg(x) 16578 return true 16579 } 16580 return false 16581 } 16582 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 16583 b := v.Block 16584 _ = b 16585 // match: (XOR x (MOVDconst [c])) 16586 // cond: isU32Bit(c) 16587 // result: (XORconst [c] x) 16588 for { 16589 x := v.Args[0] 16590 v_1 := v.Args[1] 16591 if v_1.Op != OpS390XMOVDconst { 16592 break 16593 } 16594 c := v_1.AuxInt 16595 if !(isU32Bit(c)) { 16596 break 16597 } 16598 v.reset(OpS390XXORconst) 16599 v.AuxInt = c 16600 v.AddArg(x) 16601 return true 16602 } 16603 // match: (XOR (MOVDconst [c]) x) 16604 // cond: isU32Bit(c) 16605 // result: (XORconst [c] x) 16606 for { 16607 v_0 := v.Args[0] 16608 if v_0.Op != OpS390XMOVDconst { 16609 break 16610 } 16611 c := v_0.AuxInt 16612 x := v.Args[1] 16613 if !(isU32Bit(c)) { 16614 break 16615 } 16616 v.reset(OpS390XXORconst) 16617 v.AuxInt = c 16618 v.AddArg(x) 16619 return true 16620 } 16621 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 16622 // cond: 16623 // result: (MOVDconst [c^d]) 16624 for { 16625 v_0 := v.Args[0] 16626 if v_0.Op != OpS390XMOVDconst { 16627 break 16628 } 16629 c := v_0.AuxInt 16630 v_1 := v.Args[1] 16631 if v_1.Op != OpS390XMOVDconst { 16632 break 16633 } 16634 d := v_1.AuxInt 16635 v.reset(OpS390XMOVDconst) 16636 v.AuxInt = c ^ d 16637 return true 16638 } 16639 // match: (XOR x x) 16640 // cond: 16641 // result: (MOVDconst [0]) 16642 for { 16643 x := v.Args[0] 16644 if x != v.Args[1] { 16645 break 16646 } 16647 v.reset(OpS390XMOVDconst) 16648 v.AuxInt = 0 16649 return true 16650 } 16651 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 16652 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16653 // result: (XORload <t> [off] {sym} x ptr mem) 16654 for { 16655 t := v.Type 16656 x := v.Args[0] 16657 g := v.Args[1] 16658 if g.Op != OpS390XMOVDload { 16659 break 16660 } 16661 off := g.AuxInt 16662 sym := g.Aux 16663 ptr := g.Args[0] 16664 mem := g.Args[1] 16665 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16666 break 16667 } 16668 v.reset(OpS390XXORload) 16669 v.Type = t 16670 v.AuxInt = off 16671 v.Aux = sym 16672 v.AddArg(x) 16673 v.AddArg(ptr) 16674 v.AddArg(mem) 16675 return true 16676 } 16677 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 16678 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16679 // result: (XORload <t> [off] {sym} x ptr mem) 16680 for { 16681 t := v.Type 16682 g := v.Args[0] 16683 if g.Op != OpS390XMOVDload { 16684 break 16685 } 16686 off := g.AuxInt 16687 sym := g.Aux 16688 ptr := g.Args[0] 16689 mem := g.Args[1] 16690 x := v.Args[1] 16691 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16692 break 16693 } 16694 v.reset(OpS390XXORload) 16695 v.Type = t 16696 v.AuxInt = off 16697 v.Aux = sym 16698 v.AddArg(x) 16699 v.AddArg(ptr) 16700 v.AddArg(mem) 16701 return true 16702 } 16703 return false 16704 } 16705 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 16706 b := v.Block 16707 _ = b 16708 // match: (XORW x (MOVDconst [c])) 16709 // cond: 16710 // result: (XORWconst [c] x) 16711 for { 16712 x := v.Args[0] 16713 v_1 := v.Args[1] 16714 if v_1.Op != OpS390XMOVDconst { 16715 break 16716 } 16717 c := v_1.AuxInt 16718 v.reset(OpS390XXORWconst) 16719 v.AuxInt = c 16720 v.AddArg(x) 16721 return true 16722 } 16723 // match: (XORW (MOVDconst [c]) x) 16724 // cond: 16725 // result: (XORWconst [c] x) 16726 for { 16727 v_0 := v.Args[0] 16728 if v_0.Op != OpS390XMOVDconst { 16729 break 16730 } 16731 c := v_0.AuxInt 16732 x := v.Args[1] 16733 v.reset(OpS390XXORWconst) 16734 v.AuxInt = c 16735 v.AddArg(x) 16736 return true 16737 } 16738 // match: (XORW x x) 16739 // cond: 16740 // result: (MOVDconst [0]) 16741 for { 16742 x := v.Args[0] 16743 if x != v.Args[1] { 16744 break 16745 } 16746 v.reset(OpS390XMOVDconst) 16747 v.AuxInt = 0 16748 return true 16749 } 16750 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 16751 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16752 // result: (XORWload <t> [off] {sym} x ptr mem) 16753 for { 16754 t := v.Type 16755 x := v.Args[0] 16756 g := v.Args[1] 16757 if g.Op != OpS390XMOVWload { 16758 break 16759 } 16760 off := g.AuxInt 16761 sym := g.Aux 16762 ptr := g.Args[0] 16763 mem := g.Args[1] 16764 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16765 break 16766 } 16767 v.reset(OpS390XXORWload) 16768 v.Type = t 16769 v.AuxInt = off 16770 v.Aux = sym 16771 v.AddArg(x) 16772 v.AddArg(ptr) 16773 v.AddArg(mem) 16774 return true 16775 } 16776 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 16777 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16778 // result: (XORWload <t> [off] {sym} x ptr mem) 16779 for { 16780 t := v.Type 16781 g := v.Args[0] 16782 if g.Op != OpS390XMOVWload { 16783 break 16784 } 16785 off := g.AuxInt 16786 sym := g.Aux 16787 ptr := g.Args[0] 16788 mem := g.Args[1] 16789 x := v.Args[1] 16790 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16791 break 16792 } 16793 v.reset(OpS390XXORWload) 16794 v.Type = t 16795 v.AuxInt = off 16796 v.Aux = sym 16797 v.AddArg(x) 16798 v.AddArg(ptr) 16799 v.AddArg(mem) 16800 return true 16801 } 16802 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16803 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16804 // result: (XORWload <t> [off] {sym} x ptr mem) 16805 for { 16806 t := v.Type 16807 x := v.Args[0] 16808 g := v.Args[1] 16809 if g.Op != OpS390XMOVWZload { 16810 break 16811 } 16812 off := g.AuxInt 16813 sym := g.Aux 16814 ptr := g.Args[0] 16815 mem := g.Args[1] 16816 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16817 break 16818 } 16819 v.reset(OpS390XXORWload) 16820 v.Type = t 16821 v.AuxInt = off 16822 v.Aux = sym 16823 v.AddArg(x) 16824 v.AddArg(ptr) 16825 v.AddArg(mem) 16826 return true 16827 } 16828 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 16829 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16830 // result: (XORWload <t> [off] {sym} x ptr mem) 16831 for { 16832 t := v.Type 16833 g := v.Args[0] 16834 if g.Op != OpS390XMOVWZload { 16835 break 16836 } 16837 off := g.AuxInt 16838 sym := g.Aux 16839 ptr := g.Args[0] 16840 mem := g.Args[1] 16841 x := v.Args[1] 16842 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16843 break 16844 } 16845 v.reset(OpS390XXORWload) 16846 v.Type = t 16847 v.AuxInt = off 16848 v.Aux = sym 16849 v.AddArg(x) 16850 v.AddArg(ptr) 16851 v.AddArg(mem) 16852 return true 16853 } 16854 return false 16855 } 16856 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 16857 b := v.Block 16858 _ = b 16859 // match: (XORWconst [c] x) 16860 // cond: int32(c)==0 16861 // result: x 16862 for { 16863 c := v.AuxInt 16864 x := v.Args[0] 16865 if !(int32(c) == 0) { 16866 break 16867 } 16868 v.reset(OpCopy) 16869 v.Type = x.Type 16870 v.AddArg(x) 16871 return true 16872 } 16873 // match: (XORWconst [c] (MOVDconst [d])) 16874 // cond: 16875 // result: (MOVDconst [c^d]) 16876 for { 16877 c := v.AuxInt 16878 v_0 := v.Args[0] 16879 if v_0.Op != OpS390XMOVDconst { 16880 break 16881 } 16882 d := v_0.AuxInt 16883 v.reset(OpS390XMOVDconst) 16884 v.AuxInt = c ^ d 16885 return true 16886 } 16887 return false 16888 } 16889 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 16890 b := v.Block 16891 _ = b 16892 // match: (XORconst [0] x) 16893 // cond: 16894 // result: x 16895 for { 16896 if v.AuxInt != 0 { 16897 break 16898 } 16899 x := v.Args[0] 16900 v.reset(OpCopy) 16901 v.Type = x.Type 16902 v.AddArg(x) 16903 return true 16904 } 16905 // match: (XORconst [c] (MOVDconst [d])) 16906 // cond: 16907 // result: (MOVDconst [c^d]) 16908 for { 16909 c := v.AuxInt 16910 v_0 := v.Args[0] 16911 if v_0.Op != OpS390XMOVDconst { 16912 break 16913 } 16914 d := v_0.AuxInt 16915 v.reset(OpS390XMOVDconst) 16916 v.AuxInt = c ^ d 16917 return true 16918 } 16919 return false 16920 } 16921 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 16922 b := v.Block 16923 _ = b 16924 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 16925 // cond: 16926 // result: (ADDW val (Select0 <t> tuple)) 16927 for { 16928 t := v.Type 16929 v_0 := v.Args[0] 16930 if v_0.Op != OpS390XAddTupleFirst32 { 16931 break 16932 } 16933 tuple := v_0.Args[0] 16934 val := v_0.Args[1] 16935 v.reset(OpS390XADDW) 16936 v.AddArg(val) 16937 v0 := b.NewValue0(v.Line, OpSelect0, t) 16938 v0.AddArg(tuple) 16939 v.AddArg(v0) 16940 return true 16941 } 16942 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 16943 // cond: 16944 // result: (ADD val (Select0 <t> tuple)) 16945 for { 16946 t := v.Type 16947 v_0 := v.Args[0] 16948 if v_0.Op != OpS390XAddTupleFirst64 { 16949 break 16950 } 16951 tuple := v_0.Args[0] 16952 val := v_0.Args[1] 16953 v.reset(OpS390XADD) 16954 v.AddArg(val) 16955 v0 := b.NewValue0(v.Line, OpSelect0, t) 16956 v0.AddArg(tuple) 16957 v.AddArg(v0) 16958 return true 16959 } 16960 return false 16961 } 16962 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 16963 b := v.Block 16964 _ = b 16965 // match: (Select1 (AddTupleFirst32 tuple _ )) 16966 // cond: 16967 // result: (Select1 tuple) 16968 for { 16969 v_0 := v.Args[0] 16970 if v_0.Op != OpS390XAddTupleFirst32 { 16971 break 16972 } 16973 tuple := v_0.Args[0] 16974 v.reset(OpSelect1) 16975 v.AddArg(tuple) 16976 return true 16977 } 16978 // match: (Select1 (AddTupleFirst64 tuple _ )) 16979 // cond: 16980 // result: (Select1 tuple) 16981 for { 16982 v_0 := v.Args[0] 16983 if v_0.Op != OpS390XAddTupleFirst64 { 16984 break 16985 } 16986 tuple := v_0.Args[0] 16987 v.reset(OpSelect1) 16988 v.AddArg(tuple) 16989 return true 16990 } 16991 return false 16992 } 16993 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 16994 b := v.Block 16995 _ = b 16996 // match: (SignExt16to32 x) 16997 // cond: 16998 // result: (MOVHreg x) 16999 for { 17000 x := v.Args[0] 17001 v.reset(OpS390XMOVHreg) 17002 v.AddArg(x) 17003 return true 17004 } 17005 } 17006 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 17007 b := v.Block 17008 _ = b 17009 // match: (SignExt16to64 x) 17010 // cond: 17011 // result: (MOVHreg x) 17012 for { 17013 x := v.Args[0] 17014 v.reset(OpS390XMOVHreg) 17015 v.AddArg(x) 17016 return true 17017 } 17018 } 17019 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 17020 b := v.Block 17021 _ = b 17022 // match: (SignExt32to64 x) 17023 // cond: 17024 // result: (MOVWreg x) 17025 for { 17026 x := v.Args[0] 17027 v.reset(OpS390XMOVWreg) 17028 v.AddArg(x) 17029 return true 17030 } 17031 } 17032 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 17033 b := v.Block 17034 _ = b 17035 // match: (SignExt8to16 x) 17036 // cond: 17037 // result: (MOVBreg x) 17038 for { 17039 x := v.Args[0] 17040 v.reset(OpS390XMOVBreg) 17041 v.AddArg(x) 17042 return true 17043 } 17044 } 17045 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17046 b := v.Block 17047 _ = b 17048 // match: (SignExt8to32 x) 17049 // cond: 17050 // result: (MOVBreg x) 17051 for { 17052 x := v.Args[0] 17053 v.reset(OpS390XMOVBreg) 17054 v.AddArg(x) 17055 return true 17056 } 17057 } 17058 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17059 b := v.Block 17060 _ = b 17061 // match: (SignExt8to64 x) 17062 // cond: 17063 // result: (MOVBreg x) 17064 for { 17065 x := v.Args[0] 17066 v.reset(OpS390XMOVBreg) 17067 v.AddArg(x) 17068 return true 17069 } 17070 } 17071 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17072 b := v.Block 17073 _ = b 17074 // match: (Slicemask <t> x) 17075 // cond: 17076 // result: (XOR (MOVDconst [-1]) (SRADconst <t> (SUBconst <t> x [1]) [63])) 17077 for { 17078 t := v.Type 17079 x := v.Args[0] 17080 v.reset(OpS390XXOR) 17081 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 17082 v0.AuxInt = -1 17083 v.AddArg(v0) 17084 v1 := b.NewValue0(v.Line, OpS390XSRADconst, t) 17085 v1.AuxInt = 63 17086 v2 := b.NewValue0(v.Line, OpS390XSUBconst, t) 17087 v2.AuxInt = 1 17088 v2.AddArg(x) 17089 v1.AddArg(v2) 17090 v.AddArg(v1) 17091 return true 17092 } 17093 } 17094 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 17095 b := v.Block 17096 _ = b 17097 // match: (Sqrt x) 17098 // cond: 17099 // result: (FSQRT x) 17100 for { 17101 x := v.Args[0] 17102 v.reset(OpS390XFSQRT) 17103 v.AddArg(x) 17104 return true 17105 } 17106 } 17107 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 17108 b := v.Block 17109 _ = b 17110 // match: (StaticCall [argwid] {target} mem) 17111 // cond: 17112 // result: (CALLstatic [argwid] {target} mem) 17113 for { 17114 argwid := v.AuxInt 17115 target := v.Aux 17116 mem := v.Args[0] 17117 v.reset(OpS390XCALLstatic) 17118 v.AuxInt = argwid 17119 v.Aux = target 17120 v.AddArg(mem) 17121 return true 17122 } 17123 } 17124 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 17125 b := v.Block 17126 _ = b 17127 // match: (Store [8] ptr val mem) 17128 // cond: is64BitFloat(val.Type) 17129 // result: (FMOVDstore ptr val mem) 17130 for { 17131 if v.AuxInt != 8 { 17132 break 17133 } 17134 ptr := v.Args[0] 17135 val := v.Args[1] 17136 mem := v.Args[2] 17137 if !(is64BitFloat(val.Type)) { 17138 break 17139 } 17140 v.reset(OpS390XFMOVDstore) 17141 v.AddArg(ptr) 17142 v.AddArg(val) 17143 v.AddArg(mem) 17144 return true 17145 } 17146 // match: (Store [4] ptr val mem) 17147 // cond: is32BitFloat(val.Type) 17148 // result: (FMOVSstore ptr val mem) 17149 for { 17150 if v.AuxInt != 4 { 17151 break 17152 } 17153 ptr := v.Args[0] 17154 val := v.Args[1] 17155 mem := v.Args[2] 17156 if !(is32BitFloat(val.Type)) { 17157 break 17158 } 17159 v.reset(OpS390XFMOVSstore) 17160 v.AddArg(ptr) 17161 v.AddArg(val) 17162 v.AddArg(mem) 17163 return true 17164 } 17165 // match: (Store [8] ptr val mem) 17166 // cond: 17167 // result: (MOVDstore ptr val mem) 17168 for { 17169 if v.AuxInt != 8 { 17170 break 17171 } 17172 ptr := v.Args[0] 17173 val := v.Args[1] 17174 mem := v.Args[2] 17175 v.reset(OpS390XMOVDstore) 17176 v.AddArg(ptr) 17177 v.AddArg(val) 17178 v.AddArg(mem) 17179 return true 17180 } 17181 // match: (Store [4] ptr val mem) 17182 // cond: 17183 // result: (MOVWstore ptr val mem) 17184 for { 17185 if v.AuxInt != 4 { 17186 break 17187 } 17188 ptr := v.Args[0] 17189 val := v.Args[1] 17190 mem := v.Args[2] 17191 v.reset(OpS390XMOVWstore) 17192 v.AddArg(ptr) 17193 v.AddArg(val) 17194 v.AddArg(mem) 17195 return true 17196 } 17197 // match: (Store [2] ptr val mem) 17198 // cond: 17199 // result: (MOVHstore ptr val mem) 17200 for { 17201 if v.AuxInt != 2 { 17202 break 17203 } 17204 ptr := v.Args[0] 17205 val := v.Args[1] 17206 mem := v.Args[2] 17207 v.reset(OpS390XMOVHstore) 17208 v.AddArg(ptr) 17209 v.AddArg(val) 17210 v.AddArg(mem) 17211 return true 17212 } 17213 // match: (Store [1] ptr val mem) 17214 // cond: 17215 // result: (MOVBstore ptr val mem) 17216 for { 17217 if v.AuxInt != 1 { 17218 break 17219 } 17220 ptr := v.Args[0] 17221 val := v.Args[1] 17222 mem := v.Args[2] 17223 v.reset(OpS390XMOVBstore) 17224 v.AddArg(ptr) 17225 v.AddArg(val) 17226 v.AddArg(mem) 17227 return true 17228 } 17229 return false 17230 } 17231 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 17232 b := v.Block 17233 _ = b 17234 // match: (Sub16 x y) 17235 // cond: 17236 // result: (SUBW x y) 17237 for { 17238 x := v.Args[0] 17239 y := v.Args[1] 17240 v.reset(OpS390XSUBW) 17241 v.AddArg(x) 17242 v.AddArg(y) 17243 return true 17244 } 17245 } 17246 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 17247 b := v.Block 17248 _ = b 17249 // match: (Sub32 x y) 17250 // cond: 17251 // result: (SUBW x y) 17252 for { 17253 x := v.Args[0] 17254 y := v.Args[1] 17255 v.reset(OpS390XSUBW) 17256 v.AddArg(x) 17257 v.AddArg(y) 17258 return true 17259 } 17260 } 17261 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 17262 b := v.Block 17263 _ = b 17264 // match: (Sub32F x y) 17265 // cond: 17266 // result: (FSUBS x y) 17267 for { 17268 x := v.Args[0] 17269 y := v.Args[1] 17270 v.reset(OpS390XFSUBS) 17271 v.AddArg(x) 17272 v.AddArg(y) 17273 return true 17274 } 17275 } 17276 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 17277 b := v.Block 17278 _ = b 17279 // match: (Sub64 x y) 17280 // cond: 17281 // result: (SUB x y) 17282 for { 17283 x := v.Args[0] 17284 y := v.Args[1] 17285 v.reset(OpS390XSUB) 17286 v.AddArg(x) 17287 v.AddArg(y) 17288 return true 17289 } 17290 } 17291 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 17292 b := v.Block 17293 _ = b 17294 // match: (Sub64F x y) 17295 // cond: 17296 // result: (FSUB x y) 17297 for { 17298 x := v.Args[0] 17299 y := v.Args[1] 17300 v.reset(OpS390XFSUB) 17301 v.AddArg(x) 17302 v.AddArg(y) 17303 return true 17304 } 17305 } 17306 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 17307 b := v.Block 17308 _ = b 17309 // match: (Sub8 x y) 17310 // cond: 17311 // result: (SUBW x y) 17312 for { 17313 x := v.Args[0] 17314 y := v.Args[1] 17315 v.reset(OpS390XSUBW) 17316 v.AddArg(x) 17317 v.AddArg(y) 17318 return true 17319 } 17320 } 17321 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 17322 b := v.Block 17323 _ = b 17324 // match: (SubPtr x y) 17325 // cond: 17326 // result: (SUB x y) 17327 for { 17328 x := v.Args[0] 17329 y := v.Args[1] 17330 v.reset(OpS390XSUB) 17331 v.AddArg(x) 17332 v.AddArg(y) 17333 return true 17334 } 17335 } 17336 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 17337 b := v.Block 17338 _ = b 17339 // match: (Trunc16to8 x) 17340 // cond: 17341 // result: x 17342 for { 17343 x := v.Args[0] 17344 v.reset(OpCopy) 17345 v.Type = x.Type 17346 v.AddArg(x) 17347 return true 17348 } 17349 } 17350 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 17351 b := v.Block 17352 _ = b 17353 // match: (Trunc32to16 x) 17354 // cond: 17355 // result: x 17356 for { 17357 x := v.Args[0] 17358 v.reset(OpCopy) 17359 v.Type = x.Type 17360 v.AddArg(x) 17361 return true 17362 } 17363 } 17364 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 17365 b := v.Block 17366 _ = b 17367 // match: (Trunc32to8 x) 17368 // cond: 17369 // result: x 17370 for { 17371 x := v.Args[0] 17372 v.reset(OpCopy) 17373 v.Type = x.Type 17374 v.AddArg(x) 17375 return true 17376 } 17377 } 17378 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 17379 b := v.Block 17380 _ = b 17381 // match: (Trunc64to16 x) 17382 // cond: 17383 // result: x 17384 for { 17385 x := v.Args[0] 17386 v.reset(OpCopy) 17387 v.Type = x.Type 17388 v.AddArg(x) 17389 return true 17390 } 17391 } 17392 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 17393 b := v.Block 17394 _ = b 17395 // match: (Trunc64to32 x) 17396 // cond: 17397 // result: x 17398 for { 17399 x := v.Args[0] 17400 v.reset(OpCopy) 17401 v.Type = x.Type 17402 v.AddArg(x) 17403 return true 17404 } 17405 } 17406 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 17407 b := v.Block 17408 _ = b 17409 // match: (Trunc64to8 x) 17410 // cond: 17411 // result: x 17412 for { 17413 x := v.Args[0] 17414 v.reset(OpCopy) 17415 v.Type = x.Type 17416 v.AddArg(x) 17417 return true 17418 } 17419 } 17420 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 17421 b := v.Block 17422 _ = b 17423 // match: (Xor16 x y) 17424 // cond: 17425 // result: (XORW x y) 17426 for { 17427 x := v.Args[0] 17428 y := v.Args[1] 17429 v.reset(OpS390XXORW) 17430 v.AddArg(x) 17431 v.AddArg(y) 17432 return true 17433 } 17434 } 17435 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 17436 b := v.Block 17437 _ = b 17438 // match: (Xor32 x y) 17439 // cond: 17440 // result: (XORW x y) 17441 for { 17442 x := v.Args[0] 17443 y := v.Args[1] 17444 v.reset(OpS390XXORW) 17445 v.AddArg(x) 17446 v.AddArg(y) 17447 return true 17448 } 17449 } 17450 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 17451 b := v.Block 17452 _ = b 17453 // match: (Xor64 x y) 17454 // cond: 17455 // result: (XOR x y) 17456 for { 17457 x := v.Args[0] 17458 y := v.Args[1] 17459 v.reset(OpS390XXOR) 17460 v.AddArg(x) 17461 v.AddArg(y) 17462 return true 17463 } 17464 } 17465 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 17466 b := v.Block 17467 _ = b 17468 // match: (Xor8 x y) 17469 // cond: 17470 // result: (XORW x y) 17471 for { 17472 x := v.Args[0] 17473 y := v.Args[1] 17474 v.reset(OpS390XXORW) 17475 v.AddArg(x) 17476 v.AddArg(y) 17477 return true 17478 } 17479 } 17480 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 17481 b := v.Block 17482 _ = b 17483 // match: (Zero [s] _ mem) 17484 // cond: SizeAndAlign(s).Size() == 0 17485 // result: mem 17486 for { 17487 s := v.AuxInt 17488 mem := v.Args[1] 17489 if !(SizeAndAlign(s).Size() == 0) { 17490 break 17491 } 17492 v.reset(OpCopy) 17493 v.Type = mem.Type 17494 v.AddArg(mem) 17495 return true 17496 } 17497 // match: (Zero [s] destptr mem) 17498 // cond: SizeAndAlign(s).Size() == 1 17499 // result: (MOVBstoreconst [0] destptr mem) 17500 for { 17501 s := v.AuxInt 17502 destptr := v.Args[0] 17503 mem := v.Args[1] 17504 if !(SizeAndAlign(s).Size() == 1) { 17505 break 17506 } 17507 v.reset(OpS390XMOVBstoreconst) 17508 v.AuxInt = 0 17509 v.AddArg(destptr) 17510 v.AddArg(mem) 17511 return true 17512 } 17513 // match: (Zero [s] destptr mem) 17514 // cond: SizeAndAlign(s).Size() == 2 17515 // result: (MOVHstoreconst [0] destptr mem) 17516 for { 17517 s := v.AuxInt 17518 destptr := v.Args[0] 17519 mem := v.Args[1] 17520 if !(SizeAndAlign(s).Size() == 2) { 17521 break 17522 } 17523 v.reset(OpS390XMOVHstoreconst) 17524 v.AuxInt = 0 17525 v.AddArg(destptr) 17526 v.AddArg(mem) 17527 return true 17528 } 17529 // match: (Zero [s] destptr mem) 17530 // cond: SizeAndAlign(s).Size() == 4 17531 // result: (MOVWstoreconst [0] destptr mem) 17532 for { 17533 s := v.AuxInt 17534 destptr := v.Args[0] 17535 mem := v.Args[1] 17536 if !(SizeAndAlign(s).Size() == 4) { 17537 break 17538 } 17539 v.reset(OpS390XMOVWstoreconst) 17540 v.AuxInt = 0 17541 v.AddArg(destptr) 17542 v.AddArg(mem) 17543 return true 17544 } 17545 // match: (Zero [s] destptr mem) 17546 // cond: SizeAndAlign(s).Size() == 8 17547 // result: (MOVDstoreconst [0] destptr mem) 17548 for { 17549 s := v.AuxInt 17550 destptr := v.Args[0] 17551 mem := v.Args[1] 17552 if !(SizeAndAlign(s).Size() == 8) { 17553 break 17554 } 17555 v.reset(OpS390XMOVDstoreconst) 17556 v.AuxInt = 0 17557 v.AddArg(destptr) 17558 v.AddArg(mem) 17559 return true 17560 } 17561 // match: (Zero [s] destptr mem) 17562 // cond: SizeAndAlign(s).Size() == 3 17563 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 17564 for { 17565 s := v.AuxInt 17566 destptr := v.Args[0] 17567 mem := v.Args[1] 17568 if !(SizeAndAlign(s).Size() == 3) { 17569 break 17570 } 17571 v.reset(OpS390XMOVBstoreconst) 17572 v.AuxInt = makeValAndOff(0, 2) 17573 v.AddArg(destptr) 17574 v0 := b.NewValue0(v.Line, OpS390XMOVHstoreconst, TypeMem) 17575 v0.AuxInt = 0 17576 v0.AddArg(destptr) 17577 v0.AddArg(mem) 17578 v.AddArg(v0) 17579 return true 17580 } 17581 // match: (Zero [s] destptr mem) 17582 // cond: SizeAndAlign(s).Size() == 5 17583 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17584 for { 17585 s := v.AuxInt 17586 destptr := v.Args[0] 17587 mem := v.Args[1] 17588 if !(SizeAndAlign(s).Size() == 5) { 17589 break 17590 } 17591 v.reset(OpS390XMOVBstoreconst) 17592 v.AuxInt = makeValAndOff(0, 4) 17593 v.AddArg(destptr) 17594 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17595 v0.AuxInt = 0 17596 v0.AddArg(destptr) 17597 v0.AddArg(mem) 17598 v.AddArg(v0) 17599 return true 17600 } 17601 // match: (Zero [s] destptr mem) 17602 // cond: SizeAndAlign(s).Size() == 6 17603 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17604 for { 17605 s := v.AuxInt 17606 destptr := v.Args[0] 17607 mem := v.Args[1] 17608 if !(SizeAndAlign(s).Size() == 6) { 17609 break 17610 } 17611 v.reset(OpS390XMOVHstoreconst) 17612 v.AuxInt = makeValAndOff(0, 4) 17613 v.AddArg(destptr) 17614 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17615 v0.AuxInt = 0 17616 v0.AddArg(destptr) 17617 v0.AddArg(mem) 17618 v.AddArg(v0) 17619 return true 17620 } 17621 // match: (Zero [s] destptr mem) 17622 // cond: SizeAndAlign(s).Size() == 7 17623 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 17624 for { 17625 s := v.AuxInt 17626 destptr := v.Args[0] 17627 mem := v.Args[1] 17628 if !(SizeAndAlign(s).Size() == 7) { 17629 break 17630 } 17631 v.reset(OpS390XMOVWstoreconst) 17632 v.AuxInt = makeValAndOff(0, 3) 17633 v.AddArg(destptr) 17634 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17635 v0.AuxInt = 0 17636 v0.AddArg(destptr) 17637 v0.AddArg(mem) 17638 v.AddArg(v0) 17639 return true 17640 } 17641 // match: (Zero [s] destptr mem) 17642 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 17643 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 17644 for { 17645 s := v.AuxInt 17646 destptr := v.Args[0] 17647 mem := v.Args[1] 17648 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 17649 break 17650 } 17651 v.reset(OpS390XCLEAR) 17652 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 17653 v.AddArg(destptr) 17654 v.AddArg(mem) 17655 return true 17656 } 17657 // match: (Zero [s] destptr mem) 17658 // cond: SizeAndAlign(s).Size() > 1024 17659 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 17660 for { 17661 s := v.AuxInt 17662 destptr := v.Args[0] 17663 mem := v.Args[1] 17664 if !(SizeAndAlign(s).Size() > 1024) { 17665 break 17666 } 17667 v.reset(OpS390XLoweredZero) 17668 v.AuxInt = SizeAndAlign(s).Size() % 256 17669 v.AddArg(destptr) 17670 v0 := b.NewValue0(v.Line, OpS390XADDconst, destptr.Type) 17671 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 17672 v0.AddArg(destptr) 17673 v.AddArg(v0) 17674 v.AddArg(mem) 17675 return true 17676 } 17677 return false 17678 } 17679 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 17680 b := v.Block 17681 _ = b 17682 // match: (ZeroExt16to32 x) 17683 // cond: 17684 // result: (MOVHZreg x) 17685 for { 17686 x := v.Args[0] 17687 v.reset(OpS390XMOVHZreg) 17688 v.AddArg(x) 17689 return true 17690 } 17691 } 17692 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 17693 b := v.Block 17694 _ = b 17695 // match: (ZeroExt16to64 x) 17696 // cond: 17697 // result: (MOVHZreg x) 17698 for { 17699 x := v.Args[0] 17700 v.reset(OpS390XMOVHZreg) 17701 v.AddArg(x) 17702 return true 17703 } 17704 } 17705 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 17706 b := v.Block 17707 _ = b 17708 // match: (ZeroExt32to64 x) 17709 // cond: 17710 // result: (MOVWZreg x) 17711 for { 17712 x := v.Args[0] 17713 v.reset(OpS390XMOVWZreg) 17714 v.AddArg(x) 17715 return true 17716 } 17717 } 17718 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 17719 b := v.Block 17720 _ = b 17721 // match: (ZeroExt8to16 x) 17722 // cond: 17723 // result: (MOVBZreg x) 17724 for { 17725 x := v.Args[0] 17726 v.reset(OpS390XMOVBZreg) 17727 v.AddArg(x) 17728 return true 17729 } 17730 } 17731 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 17732 b := v.Block 17733 _ = b 17734 // match: (ZeroExt8to32 x) 17735 // cond: 17736 // result: (MOVBZreg x) 17737 for { 17738 x := v.Args[0] 17739 v.reset(OpS390XMOVBZreg) 17740 v.AddArg(x) 17741 return true 17742 } 17743 } 17744 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 17745 b := v.Block 17746 _ = b 17747 // match: (ZeroExt8to64 x) 17748 // cond: 17749 // result: (MOVBZreg x) 17750 for { 17751 x := v.Args[0] 17752 v.reset(OpS390XMOVBZreg) 17753 v.AddArg(x) 17754 return true 17755 } 17756 } 17757 func rewriteBlockS390X(b *Block, config *Config) bool { 17758 switch b.Kind { 17759 case BlockS390XEQ: 17760 // match: (EQ (InvertFlags cmp) yes no) 17761 // cond: 17762 // result: (EQ cmp yes no) 17763 for { 17764 v := b.Control 17765 if v.Op != OpS390XInvertFlags { 17766 break 17767 } 17768 cmp := v.Args[0] 17769 yes := b.Succs[0] 17770 no := b.Succs[1] 17771 b.Kind = BlockS390XEQ 17772 b.SetControl(cmp) 17773 _ = yes 17774 _ = no 17775 return true 17776 } 17777 // match: (EQ (FlagEQ) yes no) 17778 // cond: 17779 // result: (First nil yes no) 17780 for { 17781 v := b.Control 17782 if v.Op != OpS390XFlagEQ { 17783 break 17784 } 17785 yes := b.Succs[0] 17786 no := b.Succs[1] 17787 b.Kind = BlockFirst 17788 b.SetControl(nil) 17789 _ = yes 17790 _ = no 17791 return true 17792 } 17793 // match: (EQ (FlagLT) yes no) 17794 // cond: 17795 // result: (First nil no yes) 17796 for { 17797 v := b.Control 17798 if v.Op != OpS390XFlagLT { 17799 break 17800 } 17801 yes := b.Succs[0] 17802 no := b.Succs[1] 17803 b.Kind = BlockFirst 17804 b.SetControl(nil) 17805 b.swapSuccessors() 17806 _ = no 17807 _ = yes 17808 return true 17809 } 17810 // match: (EQ (FlagGT) yes no) 17811 // cond: 17812 // result: (First nil no yes) 17813 for { 17814 v := b.Control 17815 if v.Op != OpS390XFlagGT { 17816 break 17817 } 17818 yes := b.Succs[0] 17819 no := b.Succs[1] 17820 b.Kind = BlockFirst 17821 b.SetControl(nil) 17822 b.swapSuccessors() 17823 _ = no 17824 _ = yes 17825 return true 17826 } 17827 case BlockS390XGE: 17828 // match: (GE (InvertFlags cmp) yes no) 17829 // cond: 17830 // result: (LE cmp yes no) 17831 for { 17832 v := b.Control 17833 if v.Op != OpS390XInvertFlags { 17834 break 17835 } 17836 cmp := v.Args[0] 17837 yes := b.Succs[0] 17838 no := b.Succs[1] 17839 b.Kind = BlockS390XLE 17840 b.SetControl(cmp) 17841 _ = yes 17842 _ = no 17843 return true 17844 } 17845 // match: (GE (FlagEQ) yes no) 17846 // cond: 17847 // result: (First nil yes no) 17848 for { 17849 v := b.Control 17850 if v.Op != OpS390XFlagEQ { 17851 break 17852 } 17853 yes := b.Succs[0] 17854 no := b.Succs[1] 17855 b.Kind = BlockFirst 17856 b.SetControl(nil) 17857 _ = yes 17858 _ = no 17859 return true 17860 } 17861 // match: (GE (FlagLT) yes no) 17862 // cond: 17863 // result: (First nil no yes) 17864 for { 17865 v := b.Control 17866 if v.Op != OpS390XFlagLT { 17867 break 17868 } 17869 yes := b.Succs[0] 17870 no := b.Succs[1] 17871 b.Kind = BlockFirst 17872 b.SetControl(nil) 17873 b.swapSuccessors() 17874 _ = no 17875 _ = yes 17876 return true 17877 } 17878 // match: (GE (FlagGT) yes no) 17879 // cond: 17880 // result: (First nil yes no) 17881 for { 17882 v := b.Control 17883 if v.Op != OpS390XFlagGT { 17884 break 17885 } 17886 yes := b.Succs[0] 17887 no := b.Succs[1] 17888 b.Kind = BlockFirst 17889 b.SetControl(nil) 17890 _ = yes 17891 _ = no 17892 return true 17893 } 17894 case BlockS390XGT: 17895 // match: (GT (InvertFlags cmp) yes no) 17896 // cond: 17897 // result: (LT cmp yes no) 17898 for { 17899 v := b.Control 17900 if v.Op != OpS390XInvertFlags { 17901 break 17902 } 17903 cmp := v.Args[0] 17904 yes := b.Succs[0] 17905 no := b.Succs[1] 17906 b.Kind = BlockS390XLT 17907 b.SetControl(cmp) 17908 _ = yes 17909 _ = no 17910 return true 17911 } 17912 // match: (GT (FlagEQ) yes no) 17913 // cond: 17914 // result: (First nil no yes) 17915 for { 17916 v := b.Control 17917 if v.Op != OpS390XFlagEQ { 17918 break 17919 } 17920 yes := b.Succs[0] 17921 no := b.Succs[1] 17922 b.Kind = BlockFirst 17923 b.SetControl(nil) 17924 b.swapSuccessors() 17925 _ = no 17926 _ = yes 17927 return true 17928 } 17929 // match: (GT (FlagLT) yes no) 17930 // cond: 17931 // result: (First nil no yes) 17932 for { 17933 v := b.Control 17934 if v.Op != OpS390XFlagLT { 17935 break 17936 } 17937 yes := b.Succs[0] 17938 no := b.Succs[1] 17939 b.Kind = BlockFirst 17940 b.SetControl(nil) 17941 b.swapSuccessors() 17942 _ = no 17943 _ = yes 17944 return true 17945 } 17946 // match: (GT (FlagGT) yes no) 17947 // cond: 17948 // result: (First nil yes no) 17949 for { 17950 v := b.Control 17951 if v.Op != OpS390XFlagGT { 17952 break 17953 } 17954 yes := b.Succs[0] 17955 no := b.Succs[1] 17956 b.Kind = BlockFirst 17957 b.SetControl(nil) 17958 _ = yes 17959 _ = no 17960 return true 17961 } 17962 case BlockIf: 17963 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17964 // cond: 17965 // result: (LT cmp yes no) 17966 for { 17967 v := b.Control 17968 if v.Op != OpS390XMOVDLT { 17969 break 17970 } 17971 v_0 := v.Args[0] 17972 if v_0.Op != OpS390XMOVDconst { 17973 break 17974 } 17975 if v_0.AuxInt != 0 { 17976 break 17977 } 17978 v_1 := v.Args[1] 17979 if v_1.Op != OpS390XMOVDconst { 17980 break 17981 } 17982 if v_1.AuxInt != 1 { 17983 break 17984 } 17985 cmp := v.Args[2] 17986 yes := b.Succs[0] 17987 no := b.Succs[1] 17988 b.Kind = BlockS390XLT 17989 b.SetControl(cmp) 17990 _ = yes 17991 _ = no 17992 return true 17993 } 17994 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17995 // cond: 17996 // result: (LE cmp yes no) 17997 for { 17998 v := b.Control 17999 if v.Op != OpS390XMOVDLE { 18000 break 18001 } 18002 v_0 := v.Args[0] 18003 if v_0.Op != OpS390XMOVDconst { 18004 break 18005 } 18006 if v_0.AuxInt != 0 { 18007 break 18008 } 18009 v_1 := v.Args[1] 18010 if v_1.Op != OpS390XMOVDconst { 18011 break 18012 } 18013 if v_1.AuxInt != 1 { 18014 break 18015 } 18016 cmp := v.Args[2] 18017 yes := b.Succs[0] 18018 no := b.Succs[1] 18019 b.Kind = BlockS390XLE 18020 b.SetControl(cmp) 18021 _ = yes 18022 _ = no 18023 return true 18024 } 18025 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18026 // cond: 18027 // result: (GT cmp yes no) 18028 for { 18029 v := b.Control 18030 if v.Op != OpS390XMOVDGT { 18031 break 18032 } 18033 v_0 := v.Args[0] 18034 if v_0.Op != OpS390XMOVDconst { 18035 break 18036 } 18037 if v_0.AuxInt != 0 { 18038 break 18039 } 18040 v_1 := v.Args[1] 18041 if v_1.Op != OpS390XMOVDconst { 18042 break 18043 } 18044 if v_1.AuxInt != 1 { 18045 break 18046 } 18047 cmp := v.Args[2] 18048 yes := b.Succs[0] 18049 no := b.Succs[1] 18050 b.Kind = BlockS390XGT 18051 b.SetControl(cmp) 18052 _ = yes 18053 _ = no 18054 return true 18055 } 18056 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18057 // cond: 18058 // result: (GE cmp yes no) 18059 for { 18060 v := b.Control 18061 if v.Op != OpS390XMOVDGE { 18062 break 18063 } 18064 v_0 := v.Args[0] 18065 if v_0.Op != OpS390XMOVDconst { 18066 break 18067 } 18068 if v_0.AuxInt != 0 { 18069 break 18070 } 18071 v_1 := v.Args[1] 18072 if v_1.Op != OpS390XMOVDconst { 18073 break 18074 } 18075 if v_1.AuxInt != 1 { 18076 break 18077 } 18078 cmp := v.Args[2] 18079 yes := b.Succs[0] 18080 no := b.Succs[1] 18081 b.Kind = BlockS390XGE 18082 b.SetControl(cmp) 18083 _ = yes 18084 _ = no 18085 return true 18086 } 18087 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18088 // cond: 18089 // result: (EQ cmp yes no) 18090 for { 18091 v := b.Control 18092 if v.Op != OpS390XMOVDEQ { 18093 break 18094 } 18095 v_0 := v.Args[0] 18096 if v_0.Op != OpS390XMOVDconst { 18097 break 18098 } 18099 if v_0.AuxInt != 0 { 18100 break 18101 } 18102 v_1 := v.Args[1] 18103 if v_1.Op != OpS390XMOVDconst { 18104 break 18105 } 18106 if v_1.AuxInt != 1 { 18107 break 18108 } 18109 cmp := v.Args[2] 18110 yes := b.Succs[0] 18111 no := b.Succs[1] 18112 b.Kind = BlockS390XEQ 18113 b.SetControl(cmp) 18114 _ = yes 18115 _ = no 18116 return true 18117 } 18118 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18119 // cond: 18120 // result: (NE cmp yes no) 18121 for { 18122 v := b.Control 18123 if v.Op != OpS390XMOVDNE { 18124 break 18125 } 18126 v_0 := v.Args[0] 18127 if v_0.Op != OpS390XMOVDconst { 18128 break 18129 } 18130 if v_0.AuxInt != 0 { 18131 break 18132 } 18133 v_1 := v.Args[1] 18134 if v_1.Op != OpS390XMOVDconst { 18135 break 18136 } 18137 if v_1.AuxInt != 1 { 18138 break 18139 } 18140 cmp := v.Args[2] 18141 yes := b.Succs[0] 18142 no := b.Succs[1] 18143 b.Kind = BlockS390XNE 18144 b.SetControl(cmp) 18145 _ = yes 18146 _ = no 18147 return true 18148 } 18149 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18150 // cond: 18151 // result: (GTF cmp yes no) 18152 for { 18153 v := b.Control 18154 if v.Op != OpS390XMOVDGTnoinv { 18155 break 18156 } 18157 v_0 := v.Args[0] 18158 if v_0.Op != OpS390XMOVDconst { 18159 break 18160 } 18161 if v_0.AuxInt != 0 { 18162 break 18163 } 18164 v_1 := v.Args[1] 18165 if v_1.Op != OpS390XMOVDconst { 18166 break 18167 } 18168 if v_1.AuxInt != 1 { 18169 break 18170 } 18171 cmp := v.Args[2] 18172 yes := b.Succs[0] 18173 no := b.Succs[1] 18174 b.Kind = BlockS390XGTF 18175 b.SetControl(cmp) 18176 _ = yes 18177 _ = no 18178 return true 18179 } 18180 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18181 // cond: 18182 // result: (GEF cmp yes no) 18183 for { 18184 v := b.Control 18185 if v.Op != OpS390XMOVDGEnoinv { 18186 break 18187 } 18188 v_0 := v.Args[0] 18189 if v_0.Op != OpS390XMOVDconst { 18190 break 18191 } 18192 if v_0.AuxInt != 0 { 18193 break 18194 } 18195 v_1 := v.Args[1] 18196 if v_1.Op != OpS390XMOVDconst { 18197 break 18198 } 18199 if v_1.AuxInt != 1 { 18200 break 18201 } 18202 cmp := v.Args[2] 18203 yes := b.Succs[0] 18204 no := b.Succs[1] 18205 b.Kind = BlockS390XGEF 18206 b.SetControl(cmp) 18207 _ = yes 18208 _ = no 18209 return true 18210 } 18211 // match: (If cond yes no) 18212 // cond: 18213 // result: (NE (CMPWconst [0] (MOVBZreg cond)) yes no) 18214 for { 18215 v := b.Control 18216 _ = v 18217 cond := b.Control 18218 yes := b.Succs[0] 18219 no := b.Succs[1] 18220 b.Kind = BlockS390XNE 18221 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 18222 v0.AuxInt = 0 18223 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 18224 v1.AddArg(cond) 18225 v0.AddArg(v1) 18226 b.SetControl(v0) 18227 _ = yes 18228 _ = no 18229 return true 18230 } 18231 case BlockS390XLE: 18232 // match: (LE (InvertFlags cmp) yes no) 18233 // cond: 18234 // result: (GE cmp yes no) 18235 for { 18236 v := b.Control 18237 if v.Op != OpS390XInvertFlags { 18238 break 18239 } 18240 cmp := v.Args[0] 18241 yes := b.Succs[0] 18242 no := b.Succs[1] 18243 b.Kind = BlockS390XGE 18244 b.SetControl(cmp) 18245 _ = yes 18246 _ = no 18247 return true 18248 } 18249 // match: (LE (FlagEQ) yes no) 18250 // cond: 18251 // result: (First nil yes no) 18252 for { 18253 v := b.Control 18254 if v.Op != OpS390XFlagEQ { 18255 break 18256 } 18257 yes := b.Succs[0] 18258 no := b.Succs[1] 18259 b.Kind = BlockFirst 18260 b.SetControl(nil) 18261 _ = yes 18262 _ = no 18263 return true 18264 } 18265 // match: (LE (FlagLT) yes no) 18266 // cond: 18267 // result: (First nil yes no) 18268 for { 18269 v := b.Control 18270 if v.Op != OpS390XFlagLT { 18271 break 18272 } 18273 yes := b.Succs[0] 18274 no := b.Succs[1] 18275 b.Kind = BlockFirst 18276 b.SetControl(nil) 18277 _ = yes 18278 _ = no 18279 return true 18280 } 18281 // match: (LE (FlagGT) yes no) 18282 // cond: 18283 // result: (First nil no yes) 18284 for { 18285 v := b.Control 18286 if v.Op != OpS390XFlagGT { 18287 break 18288 } 18289 yes := b.Succs[0] 18290 no := b.Succs[1] 18291 b.Kind = BlockFirst 18292 b.SetControl(nil) 18293 b.swapSuccessors() 18294 _ = no 18295 _ = yes 18296 return true 18297 } 18298 case BlockS390XLT: 18299 // match: (LT (InvertFlags cmp) yes no) 18300 // cond: 18301 // result: (GT cmp yes no) 18302 for { 18303 v := b.Control 18304 if v.Op != OpS390XInvertFlags { 18305 break 18306 } 18307 cmp := v.Args[0] 18308 yes := b.Succs[0] 18309 no := b.Succs[1] 18310 b.Kind = BlockS390XGT 18311 b.SetControl(cmp) 18312 _ = yes 18313 _ = no 18314 return true 18315 } 18316 // match: (LT (FlagEQ) yes no) 18317 // cond: 18318 // result: (First nil no yes) 18319 for { 18320 v := b.Control 18321 if v.Op != OpS390XFlagEQ { 18322 break 18323 } 18324 yes := b.Succs[0] 18325 no := b.Succs[1] 18326 b.Kind = BlockFirst 18327 b.SetControl(nil) 18328 b.swapSuccessors() 18329 _ = no 18330 _ = yes 18331 return true 18332 } 18333 // match: (LT (FlagLT) yes no) 18334 // cond: 18335 // result: (First nil yes no) 18336 for { 18337 v := b.Control 18338 if v.Op != OpS390XFlagLT { 18339 break 18340 } 18341 yes := b.Succs[0] 18342 no := b.Succs[1] 18343 b.Kind = BlockFirst 18344 b.SetControl(nil) 18345 _ = yes 18346 _ = no 18347 return true 18348 } 18349 // match: (LT (FlagGT) yes no) 18350 // cond: 18351 // result: (First nil no yes) 18352 for { 18353 v := b.Control 18354 if v.Op != OpS390XFlagGT { 18355 break 18356 } 18357 yes := b.Succs[0] 18358 no := b.Succs[1] 18359 b.Kind = BlockFirst 18360 b.SetControl(nil) 18361 b.swapSuccessors() 18362 _ = no 18363 _ = yes 18364 return true 18365 } 18366 case BlockS390XNE: 18367 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18368 // cond: 18369 // result: (LT cmp yes no) 18370 for { 18371 v := b.Control 18372 if v.Op != OpS390XCMPWconst { 18373 break 18374 } 18375 if v.AuxInt != 0 { 18376 break 18377 } 18378 v_0 := v.Args[0] 18379 if v_0.Op != OpS390XMOVDLT { 18380 break 18381 } 18382 v_0_0 := v_0.Args[0] 18383 if v_0_0.Op != OpS390XMOVDconst { 18384 break 18385 } 18386 if v_0_0.AuxInt != 0 { 18387 break 18388 } 18389 v_0_1 := v_0.Args[1] 18390 if v_0_1.Op != OpS390XMOVDconst { 18391 break 18392 } 18393 if v_0_1.AuxInt != 1 { 18394 break 18395 } 18396 cmp := v_0.Args[2] 18397 yes := b.Succs[0] 18398 no := b.Succs[1] 18399 b.Kind = BlockS390XLT 18400 b.SetControl(cmp) 18401 _ = yes 18402 _ = no 18403 return true 18404 } 18405 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18406 // cond: 18407 // result: (LE cmp yes no) 18408 for { 18409 v := b.Control 18410 if v.Op != OpS390XCMPWconst { 18411 break 18412 } 18413 if v.AuxInt != 0 { 18414 break 18415 } 18416 v_0 := v.Args[0] 18417 if v_0.Op != OpS390XMOVDLE { 18418 break 18419 } 18420 v_0_0 := v_0.Args[0] 18421 if v_0_0.Op != OpS390XMOVDconst { 18422 break 18423 } 18424 if v_0_0.AuxInt != 0 { 18425 break 18426 } 18427 v_0_1 := v_0.Args[1] 18428 if v_0_1.Op != OpS390XMOVDconst { 18429 break 18430 } 18431 if v_0_1.AuxInt != 1 { 18432 break 18433 } 18434 cmp := v_0.Args[2] 18435 yes := b.Succs[0] 18436 no := b.Succs[1] 18437 b.Kind = BlockS390XLE 18438 b.SetControl(cmp) 18439 _ = yes 18440 _ = no 18441 return true 18442 } 18443 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18444 // cond: 18445 // result: (GT cmp yes no) 18446 for { 18447 v := b.Control 18448 if v.Op != OpS390XCMPWconst { 18449 break 18450 } 18451 if v.AuxInt != 0 { 18452 break 18453 } 18454 v_0 := v.Args[0] 18455 if v_0.Op != OpS390XMOVDGT { 18456 break 18457 } 18458 v_0_0 := v_0.Args[0] 18459 if v_0_0.Op != OpS390XMOVDconst { 18460 break 18461 } 18462 if v_0_0.AuxInt != 0 { 18463 break 18464 } 18465 v_0_1 := v_0.Args[1] 18466 if v_0_1.Op != OpS390XMOVDconst { 18467 break 18468 } 18469 if v_0_1.AuxInt != 1 { 18470 break 18471 } 18472 cmp := v_0.Args[2] 18473 yes := b.Succs[0] 18474 no := b.Succs[1] 18475 b.Kind = BlockS390XGT 18476 b.SetControl(cmp) 18477 _ = yes 18478 _ = no 18479 return true 18480 } 18481 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18482 // cond: 18483 // result: (GE cmp yes no) 18484 for { 18485 v := b.Control 18486 if v.Op != OpS390XCMPWconst { 18487 break 18488 } 18489 if v.AuxInt != 0 { 18490 break 18491 } 18492 v_0 := v.Args[0] 18493 if v_0.Op != OpS390XMOVDGE { 18494 break 18495 } 18496 v_0_0 := v_0.Args[0] 18497 if v_0_0.Op != OpS390XMOVDconst { 18498 break 18499 } 18500 if v_0_0.AuxInt != 0 { 18501 break 18502 } 18503 v_0_1 := v_0.Args[1] 18504 if v_0_1.Op != OpS390XMOVDconst { 18505 break 18506 } 18507 if v_0_1.AuxInt != 1 { 18508 break 18509 } 18510 cmp := v_0.Args[2] 18511 yes := b.Succs[0] 18512 no := b.Succs[1] 18513 b.Kind = BlockS390XGE 18514 b.SetControl(cmp) 18515 _ = yes 18516 _ = no 18517 return true 18518 } 18519 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18520 // cond: 18521 // result: (EQ cmp yes no) 18522 for { 18523 v := b.Control 18524 if v.Op != OpS390XCMPWconst { 18525 break 18526 } 18527 if v.AuxInt != 0 { 18528 break 18529 } 18530 v_0 := v.Args[0] 18531 if v_0.Op != OpS390XMOVDEQ { 18532 break 18533 } 18534 v_0_0 := v_0.Args[0] 18535 if v_0_0.Op != OpS390XMOVDconst { 18536 break 18537 } 18538 if v_0_0.AuxInt != 0 { 18539 break 18540 } 18541 v_0_1 := v_0.Args[1] 18542 if v_0_1.Op != OpS390XMOVDconst { 18543 break 18544 } 18545 if v_0_1.AuxInt != 1 { 18546 break 18547 } 18548 cmp := v_0.Args[2] 18549 yes := b.Succs[0] 18550 no := b.Succs[1] 18551 b.Kind = BlockS390XEQ 18552 b.SetControl(cmp) 18553 _ = yes 18554 _ = no 18555 return true 18556 } 18557 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18558 // cond: 18559 // result: (NE cmp yes no) 18560 for { 18561 v := b.Control 18562 if v.Op != OpS390XCMPWconst { 18563 break 18564 } 18565 if v.AuxInt != 0 { 18566 break 18567 } 18568 v_0 := v.Args[0] 18569 if v_0.Op != OpS390XMOVDNE { 18570 break 18571 } 18572 v_0_0 := v_0.Args[0] 18573 if v_0_0.Op != OpS390XMOVDconst { 18574 break 18575 } 18576 if v_0_0.AuxInt != 0 { 18577 break 18578 } 18579 v_0_1 := v_0.Args[1] 18580 if v_0_1.Op != OpS390XMOVDconst { 18581 break 18582 } 18583 if v_0_1.AuxInt != 1 { 18584 break 18585 } 18586 cmp := v_0.Args[2] 18587 yes := b.Succs[0] 18588 no := b.Succs[1] 18589 b.Kind = BlockS390XNE 18590 b.SetControl(cmp) 18591 _ = yes 18592 _ = no 18593 return true 18594 } 18595 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18596 // cond: 18597 // result: (GTF cmp yes no) 18598 for { 18599 v := b.Control 18600 if v.Op != OpS390XCMPWconst { 18601 break 18602 } 18603 if v.AuxInt != 0 { 18604 break 18605 } 18606 v_0 := v.Args[0] 18607 if v_0.Op != OpS390XMOVDGTnoinv { 18608 break 18609 } 18610 v_0_0 := v_0.Args[0] 18611 if v_0_0.Op != OpS390XMOVDconst { 18612 break 18613 } 18614 if v_0_0.AuxInt != 0 { 18615 break 18616 } 18617 v_0_1 := v_0.Args[1] 18618 if v_0_1.Op != OpS390XMOVDconst { 18619 break 18620 } 18621 if v_0_1.AuxInt != 1 { 18622 break 18623 } 18624 cmp := v_0.Args[2] 18625 yes := b.Succs[0] 18626 no := b.Succs[1] 18627 b.Kind = BlockS390XGTF 18628 b.SetControl(cmp) 18629 _ = yes 18630 _ = no 18631 return true 18632 } 18633 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18634 // cond: 18635 // result: (GEF cmp yes no) 18636 for { 18637 v := b.Control 18638 if v.Op != OpS390XCMPWconst { 18639 break 18640 } 18641 if v.AuxInt != 0 { 18642 break 18643 } 18644 v_0 := v.Args[0] 18645 if v_0.Op != OpS390XMOVDGEnoinv { 18646 break 18647 } 18648 v_0_0 := v_0.Args[0] 18649 if v_0_0.Op != OpS390XMOVDconst { 18650 break 18651 } 18652 if v_0_0.AuxInt != 0 { 18653 break 18654 } 18655 v_0_1 := v_0.Args[1] 18656 if v_0_1.Op != OpS390XMOVDconst { 18657 break 18658 } 18659 if v_0_1.AuxInt != 1 { 18660 break 18661 } 18662 cmp := v_0.Args[2] 18663 yes := b.Succs[0] 18664 no := b.Succs[1] 18665 b.Kind = BlockS390XGEF 18666 b.SetControl(cmp) 18667 _ = yes 18668 _ = no 18669 return true 18670 } 18671 // match: (NE (InvertFlags cmp) yes no) 18672 // cond: 18673 // result: (NE cmp yes no) 18674 for { 18675 v := b.Control 18676 if v.Op != OpS390XInvertFlags { 18677 break 18678 } 18679 cmp := v.Args[0] 18680 yes := b.Succs[0] 18681 no := b.Succs[1] 18682 b.Kind = BlockS390XNE 18683 b.SetControl(cmp) 18684 _ = yes 18685 _ = no 18686 return true 18687 } 18688 // match: (NE (FlagEQ) yes no) 18689 // cond: 18690 // result: (First nil no yes) 18691 for { 18692 v := b.Control 18693 if v.Op != OpS390XFlagEQ { 18694 break 18695 } 18696 yes := b.Succs[0] 18697 no := b.Succs[1] 18698 b.Kind = BlockFirst 18699 b.SetControl(nil) 18700 b.swapSuccessors() 18701 _ = no 18702 _ = yes 18703 return true 18704 } 18705 // match: (NE (FlagLT) yes no) 18706 // cond: 18707 // result: (First nil yes no) 18708 for { 18709 v := b.Control 18710 if v.Op != OpS390XFlagLT { 18711 break 18712 } 18713 yes := b.Succs[0] 18714 no := b.Succs[1] 18715 b.Kind = BlockFirst 18716 b.SetControl(nil) 18717 _ = yes 18718 _ = no 18719 return true 18720 } 18721 // match: (NE (FlagGT) yes no) 18722 // cond: 18723 // result: (First nil yes no) 18724 for { 18725 v := b.Control 18726 if v.Op != OpS390XFlagGT { 18727 break 18728 } 18729 yes := b.Succs[0] 18730 no := b.Succs[1] 18731 b.Kind = BlockFirst 18732 b.SetControl(nil) 18733 _ = yes 18734 _ = no 18735 return true 18736 } 18737 } 18738 return false 18739 }