github.com/decomp/exp@v0.0.0-20210624183419-6d058f5e1da6/disasm/x86/register.go (about) 1 package x86 2 3 import ( 4 "fmt" 5 6 "golang.org/x/arch/x86/x86asm" 7 ) 8 9 // A Register is a single register. 10 type Register x86asm.Reg 11 12 // String returns the string representation of reg. 13 func (reg Register) String() string { 14 r := x86asm.Reg(reg) 15 // Pretty-print pseudo-registers. 16 m := map[x86asm.Reg]string{ 17 X86asm_DX_AX: "DX:AX", 18 X86asm_EDX_EAX: "EDX:EAX", 19 X86asm_RDX_RAX: "RDX:RAX", 20 } 21 if s, ok := m[r]; ok { 22 return s 23 } 24 return r.String() 25 } 26 27 // Set sets reg to the register represented by s. 28 func (reg *Register) Set(s string) error { 29 *reg = Register(parseReg(s)) 30 return nil 31 } 32 33 // UnmarshalText unmarshals the text into reg. 34 func (reg *Register) UnmarshalText(text []byte) error { 35 return reg.Set(string(text)) 36 } 37 38 // MarshalText returns the textual representation of reg. 39 func (reg Register) MarshalText() ([]byte, error) { 40 return []byte(reg.String()), nil 41 } 42 43 // parseReg returns the x86 register corresponding to the given string. 44 func parseReg(s string) x86asm.Reg { 45 m := map[string]x86asm.Reg{ 46 // 8-bit 47 "AL": x86asm.AL, 48 "CL": x86asm.CL, 49 "DL": x86asm.DL, 50 "BL": x86asm.BL, 51 "AH": x86asm.AH, 52 "CH": x86asm.CH, 53 "DH": x86asm.DH, 54 "BH": x86asm.BH, 55 "SPB": x86asm.SPB, 56 "BPB": x86asm.BPB, 57 "SIB": x86asm.SIB, 58 "DIB": x86asm.DIB, 59 "R8B": x86asm.R8B, 60 "R9B": x86asm.R9B, 61 "R10B": x86asm.R10B, 62 "R11B": x86asm.R11B, 63 "R12B": x86asm.R12B, 64 "R13B": x86asm.R13B, 65 "R14B": x86asm.R14B, 66 "R15B": x86asm.R15B, 67 // 16-bit 68 "AX": x86asm.AX, 69 "CX": x86asm.CX, 70 "DX": x86asm.DX, 71 "BX": x86asm.BX, 72 "SP": x86asm.SP, 73 "BP": x86asm.BP, 74 "SI": x86asm.SI, 75 "DI": x86asm.DI, 76 "R8W": x86asm.R8W, 77 "R9W": x86asm.R9W, 78 "R10W": x86asm.R10W, 79 "R11W": x86asm.R11W, 80 "R12W": x86asm.R12W, 81 "R13W": x86asm.R13W, 82 "R14W": x86asm.R14W, 83 "R15W": x86asm.R15W, 84 // 32-bit 85 "EAX": x86asm.EAX, 86 "ECX": x86asm.ECX, 87 "EDX": x86asm.EDX, 88 "EBX": x86asm.EBX, 89 "ESP": x86asm.ESP, 90 "EBP": x86asm.EBP, 91 "ESI": x86asm.ESI, 92 "EDI": x86asm.EDI, 93 "R8L": x86asm.R8L, 94 "R9L": x86asm.R9L, 95 "R10L": x86asm.R10L, 96 "R11L": x86asm.R11L, 97 "R12L": x86asm.R12L, 98 "R13L": x86asm.R13L, 99 "R14L": x86asm.R14L, 100 "R15L": x86asm.R15L, 101 // 64-bit 102 "RAX": x86asm.RAX, 103 "RCX": x86asm.RCX, 104 "RDX": x86asm.RDX, 105 "RBX": x86asm.RBX, 106 "RSP": x86asm.RSP, 107 "RBP": x86asm.RBP, 108 "RSI": x86asm.RSI, 109 "RDI": x86asm.RDI, 110 "R8": x86asm.R8, 111 "R9": x86asm.R9, 112 "R10": x86asm.R10, 113 "R11": x86asm.R11, 114 "R12": x86asm.R12, 115 "R13": x86asm.R13, 116 "R14": x86asm.R14, 117 "R15": x86asm.R15, 118 // Instruction pointers. 119 "IP": x86asm.IP, 120 "EIP": x86asm.EIP, 121 "RIP": x86asm.RIP, 122 // 387 floating point registers. 123 "F0": x86asm.F0, 124 "F1": x86asm.F1, 125 "F2": x86asm.F2, 126 "F3": x86asm.F3, 127 "F4": x86asm.F4, 128 "F5": x86asm.F5, 129 "F6": x86asm.F6, 130 "F7": x86asm.F7, 131 // MMX registers. 132 "M0": x86asm.M0, 133 "M1": x86asm.M1, 134 "M2": x86asm.M2, 135 "M3": x86asm.M3, 136 "M4": x86asm.M4, 137 "M5": x86asm.M5, 138 "M6": x86asm.M6, 139 "M7": x86asm.M7, 140 // XMM registers. 141 "X0": x86asm.X0, 142 "X1": x86asm.X1, 143 "X2": x86asm.X2, 144 "X3": x86asm.X3, 145 "X4": x86asm.X4, 146 "X5": x86asm.X5, 147 "X6": x86asm.X6, 148 "X7": x86asm.X7, 149 "X8": x86asm.X8, 150 "X9": x86asm.X9, 151 "X10": x86asm.X10, 152 "X11": x86asm.X11, 153 "X12": x86asm.X12, 154 "X13": x86asm.X13, 155 "X14": x86asm.X14, 156 "X15": x86asm.X15, 157 // Segment registers. 158 "ES": x86asm.ES, 159 "CS": x86asm.CS, 160 "SS": x86asm.SS, 161 "DS": x86asm.DS, 162 "FS": x86asm.FS, 163 "GS": x86asm.GS, 164 // System registers. 165 "GDTR": x86asm.GDTR, 166 "IDTR": x86asm.IDTR, 167 "LDTR": x86asm.LDTR, 168 "MSW": x86asm.MSW, 169 "TASK": x86asm.TASK, 170 // Control registers. 171 "CR0": x86asm.CR0, 172 "CR1": x86asm.CR1, 173 "CR2": x86asm.CR2, 174 "CR3": x86asm.CR3, 175 "CR4": x86asm.CR4, 176 "CR5": x86asm.CR5, 177 "CR6": x86asm.CR6, 178 "CR7": x86asm.CR7, 179 "CR8": x86asm.CR8, 180 "CR9": x86asm.CR9, 181 "CR10": x86asm.CR10, 182 "CR11": x86asm.CR11, 183 "CR12": x86asm.CR12, 184 "CR13": x86asm.CR13, 185 "CR14": x86asm.CR14, 186 "CR15": x86asm.CR15, 187 // Debug registers. 188 "DR0": x86asm.DR0, 189 "DR1": x86asm.DR1, 190 "DR2": x86asm.DR2, 191 "DR3": x86asm.DR3, 192 "DR4": x86asm.DR4, 193 "DR5": x86asm.DR5, 194 "DR6": x86asm.DR6, 195 "DR7": x86asm.DR7, 196 "DR8": x86asm.DR8, 197 "DR9": x86asm.DR9, 198 "DR10": x86asm.DR10, 199 "DR11": x86asm.DR11, 200 "DR12": x86asm.DR12, 201 "DR13": x86asm.DR13, 202 "DR14": x86asm.DR14, 203 "DR15": x86asm.DR15, 204 // Task registers. 205 "TR0": x86asm.TR0, 206 "TR1": x86asm.TR1, 207 "TR2": x86asm.TR2, 208 "TR3": x86asm.TR3, 209 "TR4": x86asm.TR4, 210 "TR5": x86asm.TR5, 211 "TR6": x86asm.TR6, 212 "TR7": x86asm.TR7, 213 // PSEUDO-registers. 214 "DX:AX": X86asm_DX_AX, 215 "EDX:EAX": X86asm_EDX_EAX, 216 "RDX:RAX": X86asm_RDX_RAX, 217 } 218 if reg, ok := m[s]; ok { 219 return reg 220 } 221 panic(fmt.Errorf("support for register %q not yet implemented", s)) 222 } 223 224 // Registers. 225 var ( 226 // 8-bit 227 AL = NewReg(x86asm.AL, nil) 228 CL = NewReg(x86asm.CL, nil) 229 DL = NewReg(x86asm.DL, nil) 230 BL = NewReg(x86asm.BL, nil) 231 AH = NewReg(x86asm.AH, nil) 232 CH = NewReg(x86asm.CH, nil) 233 DH = NewReg(x86asm.DH, nil) 234 BH = NewReg(x86asm.BH, nil) 235 SPB = NewReg(x86asm.SPB, nil) 236 BPB = NewReg(x86asm.BPB, nil) 237 SIB = NewReg(x86asm.SIB, nil) 238 DIB = NewReg(x86asm.DIB, nil) 239 R8B = NewReg(x86asm.R8B, nil) 240 R9B = NewReg(x86asm.R9B, nil) 241 R10B = NewReg(x86asm.R10B, nil) 242 R11B = NewReg(x86asm.R11B, nil) 243 R12B = NewReg(x86asm.R12B, nil) 244 R13B = NewReg(x86asm.R13B, nil) 245 R14B = NewReg(x86asm.R14B, nil) 246 R15B = NewReg(x86asm.R15B, nil) 247 // 16-bit 248 AX = NewReg(x86asm.AX, nil) 249 CX = NewReg(x86asm.CX, nil) 250 DX = NewReg(x86asm.DX, nil) 251 BX = NewReg(x86asm.BX, nil) 252 SP = NewReg(x86asm.SP, nil) 253 BP = NewReg(x86asm.BP, nil) 254 SI = NewReg(x86asm.SI, nil) 255 DI = NewReg(x86asm.DI, nil) 256 R8W = NewReg(x86asm.R8W, nil) 257 R9W = NewReg(x86asm.R9W, nil) 258 R10W = NewReg(x86asm.R10W, nil) 259 R11W = NewReg(x86asm.R11W, nil) 260 R12W = NewReg(x86asm.R12W, nil) 261 R13W = NewReg(x86asm.R13W, nil) 262 R14W = NewReg(x86asm.R14W, nil) 263 R15W = NewReg(x86asm.R15W, nil) 264 // 32-bit 265 EAX = NewReg(x86asm.EAX, nil) 266 ECX = NewReg(x86asm.ECX, nil) 267 EDX = NewReg(x86asm.EDX, nil) 268 EBX = NewReg(x86asm.EBX, nil) 269 ESP = NewReg(x86asm.ESP, nil) 270 EBP = NewReg(x86asm.EBP, nil) 271 ESI = NewReg(x86asm.ESI, nil) 272 EDI = NewReg(x86asm.EDI, nil) 273 R8L = NewReg(x86asm.R8L, nil) 274 R9L = NewReg(x86asm.R9L, nil) 275 R10L = NewReg(x86asm.R10L, nil) 276 R11L = NewReg(x86asm.R11L, nil) 277 R12L = NewReg(x86asm.R12L, nil) 278 R13L = NewReg(x86asm.R13L, nil) 279 R14L = NewReg(x86asm.R14L, nil) 280 R15L = NewReg(x86asm.R15L, nil) 281 // 64-bit 282 RAX = NewReg(x86asm.RAX, nil) 283 RCX = NewReg(x86asm.RCX, nil) 284 RDX = NewReg(x86asm.RDX, nil) 285 RBX = NewReg(x86asm.RBX, nil) 286 RSP = NewReg(x86asm.RSP, nil) 287 RBP = NewReg(x86asm.RBP, nil) 288 RSI = NewReg(x86asm.RSI, nil) 289 RDI = NewReg(x86asm.RDI, nil) 290 R8 = NewReg(x86asm.R8, nil) 291 R9 = NewReg(x86asm.R9, nil) 292 R10 = NewReg(x86asm.R10, nil) 293 R11 = NewReg(x86asm.R11, nil) 294 R12 = NewReg(x86asm.R12, nil) 295 R13 = NewReg(x86asm.R13, nil) 296 R14 = NewReg(x86asm.R14, nil) 297 R15 = NewReg(x86asm.R15, nil) 298 // Instruction pointers. 299 IP = NewReg(x86asm.IP, nil) 300 EIP = NewReg(x86asm.EIP, nil) 301 RIP = NewReg(x86asm.RIP, nil) 302 // 387 floating point registers. 303 F0 = NewReg(x86asm.F0, nil) 304 F1 = NewReg(x86asm.F1, nil) 305 F2 = NewReg(x86asm.F2, nil) 306 F3 = NewReg(x86asm.F3, nil) 307 F4 = NewReg(x86asm.F4, nil) 308 F5 = NewReg(x86asm.F5, nil) 309 F6 = NewReg(x86asm.F6, nil) 310 F7 = NewReg(x86asm.F7, nil) 311 // MMX registers. 312 M0 = NewReg(x86asm.M0, nil) 313 M1 = NewReg(x86asm.M1, nil) 314 M2 = NewReg(x86asm.M2, nil) 315 M3 = NewReg(x86asm.M3, nil) 316 M4 = NewReg(x86asm.M4, nil) 317 M5 = NewReg(x86asm.M5, nil) 318 M6 = NewReg(x86asm.M6, nil) 319 M7 = NewReg(x86asm.M7, nil) 320 // XMM registers. 321 X0 = NewReg(x86asm.X0, nil) 322 X1 = NewReg(x86asm.X1, nil) 323 X2 = NewReg(x86asm.X2, nil) 324 X3 = NewReg(x86asm.X3, nil) 325 X4 = NewReg(x86asm.X4, nil) 326 X5 = NewReg(x86asm.X5, nil) 327 X6 = NewReg(x86asm.X6, nil) 328 X7 = NewReg(x86asm.X7, nil) 329 X8 = NewReg(x86asm.X8, nil) 330 X9 = NewReg(x86asm.X9, nil) 331 X10 = NewReg(x86asm.X10, nil) 332 X11 = NewReg(x86asm.X11, nil) 333 X12 = NewReg(x86asm.X12, nil) 334 X13 = NewReg(x86asm.X13, nil) 335 X14 = NewReg(x86asm.X14, nil) 336 X15 = NewReg(x86asm.X15, nil) 337 // Segment registers. 338 ES = NewReg(x86asm.ES, nil) 339 CS = NewReg(x86asm.CS, nil) 340 SS = NewReg(x86asm.SS, nil) 341 DS = NewReg(x86asm.DS, nil) 342 FS = NewReg(x86asm.FS, nil) 343 GS = NewReg(x86asm.GS, nil) 344 // System registers. 345 GDTR = NewReg(x86asm.GDTR, nil) 346 IDTR = NewReg(x86asm.IDTR, nil) 347 LDTR = NewReg(x86asm.LDTR, nil) 348 MSW = NewReg(x86asm.MSW, nil) 349 TASK = NewReg(x86asm.TASK, nil) 350 // Control registers. 351 CR0 = NewReg(x86asm.CR0, nil) 352 CR1 = NewReg(x86asm.CR1, nil) 353 CR2 = NewReg(x86asm.CR2, nil) 354 CR3 = NewReg(x86asm.CR3, nil) 355 CR4 = NewReg(x86asm.CR4, nil) 356 CR5 = NewReg(x86asm.CR5, nil) 357 CR6 = NewReg(x86asm.CR6, nil) 358 CR7 = NewReg(x86asm.CR7, nil) 359 CR8 = NewReg(x86asm.CR8, nil) 360 CR9 = NewReg(x86asm.CR9, nil) 361 CR10 = NewReg(x86asm.CR10, nil) 362 CR11 = NewReg(x86asm.CR11, nil) 363 CR12 = NewReg(x86asm.CR12, nil) 364 CR13 = NewReg(x86asm.CR13, nil) 365 CR14 = NewReg(x86asm.CR14, nil) 366 CR15 = NewReg(x86asm.CR15, nil) 367 // Debug registers. 368 DR0 = NewReg(x86asm.DR0, nil) 369 DR1 = NewReg(x86asm.DR1, nil) 370 DR2 = NewReg(x86asm.DR2, nil) 371 DR3 = NewReg(x86asm.DR3, nil) 372 DR4 = NewReg(x86asm.DR4, nil) 373 DR5 = NewReg(x86asm.DR5, nil) 374 DR6 = NewReg(x86asm.DR6, nil) 375 DR7 = NewReg(x86asm.DR7, nil) 376 DR8 = NewReg(x86asm.DR8, nil) 377 DR9 = NewReg(x86asm.DR9, nil) 378 DR10 = NewReg(x86asm.DR10, nil) 379 DR11 = NewReg(x86asm.DR11, nil) 380 DR12 = NewReg(x86asm.DR12, nil) 381 DR13 = NewReg(x86asm.DR13, nil) 382 DR14 = NewReg(x86asm.DR14, nil) 383 DR15 = NewReg(x86asm.DR15, nil) 384 // Task registers. 385 TR0 = NewReg(x86asm.TR0, nil) 386 TR1 = NewReg(x86asm.TR1, nil) 387 TR2 = NewReg(x86asm.TR2, nil) 388 TR3 = NewReg(x86asm.TR3, nil) 389 TR4 = NewReg(x86asm.TR4, nil) 390 TR5 = NewReg(x86asm.TR5, nil) 391 TR6 = NewReg(x86asm.TR6, nil) 392 TR7 = NewReg(x86asm.TR7, nil) 393 // PSEUDO-registers. 394 DX_AX = NewReg(X86asm_DX_AX, nil) 395 EDX_EAX = NewReg(X86asm_EDX_EAX, nil) 396 RDX_RAX = NewReg(X86asm_RDX_RAX, nil) 397 ) 398 399 // PSEUDO-registers. 400 const ( 401 FirstReg = x86asm.AL 402 // CL 403 // ... 404 // TR7 405 406 // EDX:EAX (used in idiv) 407 X86asm_DX_AX = x86asm.TR7 + 1 408 X86asm_EDX_EAX = X86asm_DX_AX + 1 409 X86asm_RDX_RAX = X86asm_EDX_EAX + 1 410 411 LastReg = X86asm_RDX_RAX 412 )