github.com/euank/go@v0.0.0-20160829210321-495514729181/src/cmd/compile/internal/ssa/rewriteMIPS64.go (about) 1 // autogenerated from gen/MIPS64.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueMIPS64(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueMIPS64_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueMIPS64_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueMIPS64_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueMIPS64_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueMIPS64_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueMIPS64_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueMIPS64_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueMIPS64_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueMIPS64_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueMIPS64_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueMIPS64_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueMIPS64_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueMIPS64_OpAndB(v, config) 37 case OpAvg64u: 38 return rewriteValueMIPS64_OpAvg64u(v, config) 39 case OpClosureCall: 40 return rewriteValueMIPS64_OpClosureCall(v, config) 41 case OpCom16: 42 return rewriteValueMIPS64_OpCom16(v, config) 43 case OpCom32: 44 return rewriteValueMIPS64_OpCom32(v, config) 45 case OpCom64: 46 return rewriteValueMIPS64_OpCom64(v, config) 47 case OpCom8: 48 return rewriteValueMIPS64_OpCom8(v, config) 49 case OpConst16: 50 return rewriteValueMIPS64_OpConst16(v, config) 51 case OpConst32: 52 return rewriteValueMIPS64_OpConst32(v, config) 53 case OpConst32F: 54 return rewriteValueMIPS64_OpConst32F(v, config) 55 case OpConst64: 56 return rewriteValueMIPS64_OpConst64(v, config) 57 case OpConst64F: 58 return rewriteValueMIPS64_OpConst64F(v, config) 59 case OpConst8: 60 return rewriteValueMIPS64_OpConst8(v, config) 61 case OpConstBool: 62 return rewriteValueMIPS64_OpConstBool(v, config) 63 case OpConstNil: 64 return rewriteValueMIPS64_OpConstNil(v, config) 65 case OpConvert: 66 return rewriteValueMIPS64_OpConvert(v, config) 67 case OpCvt32Fto32: 68 return rewriteValueMIPS64_OpCvt32Fto32(v, config) 69 case OpCvt32Fto64: 70 return rewriteValueMIPS64_OpCvt32Fto64(v, config) 71 case OpCvt32Fto64F: 72 return rewriteValueMIPS64_OpCvt32Fto64F(v, config) 73 case OpCvt32to32F: 74 return rewriteValueMIPS64_OpCvt32to32F(v, config) 75 case OpCvt32to64F: 76 return rewriteValueMIPS64_OpCvt32to64F(v, config) 77 case OpCvt64Fto32: 78 return rewriteValueMIPS64_OpCvt64Fto32(v, config) 79 case OpCvt64Fto32F: 80 return rewriteValueMIPS64_OpCvt64Fto32F(v, config) 81 case OpCvt64Fto64: 82 return rewriteValueMIPS64_OpCvt64Fto64(v, config) 83 case OpCvt64to32F: 84 return rewriteValueMIPS64_OpCvt64to32F(v, config) 85 case OpCvt64to64F: 86 return rewriteValueMIPS64_OpCvt64to64F(v, config) 87 case OpDeferCall: 88 return rewriteValueMIPS64_OpDeferCall(v, config) 89 case OpDiv16: 90 return rewriteValueMIPS64_OpDiv16(v, config) 91 case OpDiv16u: 92 return rewriteValueMIPS64_OpDiv16u(v, config) 93 case OpDiv32: 94 return rewriteValueMIPS64_OpDiv32(v, config) 95 case OpDiv32F: 96 return rewriteValueMIPS64_OpDiv32F(v, config) 97 case OpDiv32u: 98 return rewriteValueMIPS64_OpDiv32u(v, config) 99 case OpDiv64: 100 return rewriteValueMIPS64_OpDiv64(v, config) 101 case OpDiv64F: 102 return rewriteValueMIPS64_OpDiv64F(v, config) 103 case OpDiv64u: 104 return rewriteValueMIPS64_OpDiv64u(v, config) 105 case OpDiv8: 106 return rewriteValueMIPS64_OpDiv8(v, config) 107 case OpDiv8u: 108 return rewriteValueMIPS64_OpDiv8u(v, config) 109 case OpEq16: 110 return rewriteValueMIPS64_OpEq16(v, config) 111 case OpEq32: 112 return rewriteValueMIPS64_OpEq32(v, config) 113 case OpEq32F: 114 return rewriteValueMIPS64_OpEq32F(v, config) 115 case OpEq64: 116 return rewriteValueMIPS64_OpEq64(v, config) 117 case OpEq64F: 118 return rewriteValueMIPS64_OpEq64F(v, config) 119 case OpEq8: 120 return rewriteValueMIPS64_OpEq8(v, config) 121 case OpEqB: 122 return rewriteValueMIPS64_OpEqB(v, config) 123 case OpEqPtr: 124 return rewriteValueMIPS64_OpEqPtr(v, config) 125 case OpGeq16: 126 return rewriteValueMIPS64_OpGeq16(v, config) 127 case OpGeq16U: 128 return rewriteValueMIPS64_OpGeq16U(v, config) 129 case OpGeq32: 130 return rewriteValueMIPS64_OpGeq32(v, config) 131 case OpGeq32F: 132 return rewriteValueMIPS64_OpGeq32F(v, config) 133 case OpGeq32U: 134 return rewriteValueMIPS64_OpGeq32U(v, config) 135 case OpGeq64: 136 return rewriteValueMIPS64_OpGeq64(v, config) 137 case OpGeq64F: 138 return rewriteValueMIPS64_OpGeq64F(v, config) 139 case OpGeq64U: 140 return rewriteValueMIPS64_OpGeq64U(v, config) 141 case OpGeq8: 142 return rewriteValueMIPS64_OpGeq8(v, config) 143 case OpGeq8U: 144 return rewriteValueMIPS64_OpGeq8U(v, config) 145 case OpGetClosurePtr: 146 return rewriteValueMIPS64_OpGetClosurePtr(v, config) 147 case OpGoCall: 148 return rewriteValueMIPS64_OpGoCall(v, config) 149 case OpGreater16: 150 return rewriteValueMIPS64_OpGreater16(v, config) 151 case OpGreater16U: 152 return rewriteValueMIPS64_OpGreater16U(v, config) 153 case OpGreater32: 154 return rewriteValueMIPS64_OpGreater32(v, config) 155 case OpGreater32F: 156 return rewriteValueMIPS64_OpGreater32F(v, config) 157 case OpGreater32U: 158 return rewriteValueMIPS64_OpGreater32U(v, config) 159 case OpGreater64: 160 return rewriteValueMIPS64_OpGreater64(v, config) 161 case OpGreater64F: 162 return rewriteValueMIPS64_OpGreater64F(v, config) 163 case OpGreater64U: 164 return rewriteValueMIPS64_OpGreater64U(v, config) 165 case OpGreater8: 166 return rewriteValueMIPS64_OpGreater8(v, config) 167 case OpGreater8U: 168 return rewriteValueMIPS64_OpGreater8U(v, config) 169 case OpHmul16: 170 return rewriteValueMIPS64_OpHmul16(v, config) 171 case OpHmul16u: 172 return rewriteValueMIPS64_OpHmul16u(v, config) 173 case OpHmul32: 174 return rewriteValueMIPS64_OpHmul32(v, config) 175 case OpHmul32u: 176 return rewriteValueMIPS64_OpHmul32u(v, config) 177 case OpHmul64: 178 return rewriteValueMIPS64_OpHmul64(v, config) 179 case OpHmul64u: 180 return rewriteValueMIPS64_OpHmul64u(v, config) 181 case OpHmul8: 182 return rewriteValueMIPS64_OpHmul8(v, config) 183 case OpHmul8u: 184 return rewriteValueMIPS64_OpHmul8u(v, config) 185 case OpInterCall: 186 return rewriteValueMIPS64_OpInterCall(v, config) 187 case OpIsInBounds: 188 return rewriteValueMIPS64_OpIsInBounds(v, config) 189 case OpIsNonNil: 190 return rewriteValueMIPS64_OpIsNonNil(v, config) 191 case OpIsSliceInBounds: 192 return rewriteValueMIPS64_OpIsSliceInBounds(v, config) 193 case OpLeq16: 194 return rewriteValueMIPS64_OpLeq16(v, config) 195 case OpLeq16U: 196 return rewriteValueMIPS64_OpLeq16U(v, config) 197 case OpLeq32: 198 return rewriteValueMIPS64_OpLeq32(v, config) 199 case OpLeq32F: 200 return rewriteValueMIPS64_OpLeq32F(v, config) 201 case OpLeq32U: 202 return rewriteValueMIPS64_OpLeq32U(v, config) 203 case OpLeq64: 204 return rewriteValueMIPS64_OpLeq64(v, config) 205 case OpLeq64F: 206 return rewriteValueMIPS64_OpLeq64F(v, config) 207 case OpLeq64U: 208 return rewriteValueMIPS64_OpLeq64U(v, config) 209 case OpLeq8: 210 return rewriteValueMIPS64_OpLeq8(v, config) 211 case OpLeq8U: 212 return rewriteValueMIPS64_OpLeq8U(v, config) 213 case OpLess16: 214 return rewriteValueMIPS64_OpLess16(v, config) 215 case OpLess16U: 216 return rewriteValueMIPS64_OpLess16U(v, config) 217 case OpLess32: 218 return rewriteValueMIPS64_OpLess32(v, config) 219 case OpLess32F: 220 return rewriteValueMIPS64_OpLess32F(v, config) 221 case OpLess32U: 222 return rewriteValueMIPS64_OpLess32U(v, config) 223 case OpLess64: 224 return rewriteValueMIPS64_OpLess64(v, config) 225 case OpLess64F: 226 return rewriteValueMIPS64_OpLess64F(v, config) 227 case OpLess64U: 228 return rewriteValueMIPS64_OpLess64U(v, config) 229 case OpLess8: 230 return rewriteValueMIPS64_OpLess8(v, config) 231 case OpLess8U: 232 return rewriteValueMIPS64_OpLess8U(v, config) 233 case OpLoad: 234 return rewriteValueMIPS64_OpLoad(v, config) 235 case OpLsh16x16: 236 return rewriteValueMIPS64_OpLsh16x16(v, config) 237 case OpLsh16x32: 238 return rewriteValueMIPS64_OpLsh16x32(v, config) 239 case OpLsh16x64: 240 return rewriteValueMIPS64_OpLsh16x64(v, config) 241 case OpLsh16x8: 242 return rewriteValueMIPS64_OpLsh16x8(v, config) 243 case OpLsh32x16: 244 return rewriteValueMIPS64_OpLsh32x16(v, config) 245 case OpLsh32x32: 246 return rewriteValueMIPS64_OpLsh32x32(v, config) 247 case OpLsh32x64: 248 return rewriteValueMIPS64_OpLsh32x64(v, config) 249 case OpLsh32x8: 250 return rewriteValueMIPS64_OpLsh32x8(v, config) 251 case OpLsh64x16: 252 return rewriteValueMIPS64_OpLsh64x16(v, config) 253 case OpLsh64x32: 254 return rewriteValueMIPS64_OpLsh64x32(v, config) 255 case OpLsh64x64: 256 return rewriteValueMIPS64_OpLsh64x64(v, config) 257 case OpLsh64x8: 258 return rewriteValueMIPS64_OpLsh64x8(v, config) 259 case OpLsh8x16: 260 return rewriteValueMIPS64_OpLsh8x16(v, config) 261 case OpLsh8x32: 262 return rewriteValueMIPS64_OpLsh8x32(v, config) 263 case OpLsh8x64: 264 return rewriteValueMIPS64_OpLsh8x64(v, config) 265 case OpLsh8x8: 266 return rewriteValueMIPS64_OpLsh8x8(v, config) 267 case OpMIPS64ADDV: 268 return rewriteValueMIPS64_OpMIPS64ADDV(v, config) 269 case OpMIPS64ADDVconst: 270 return rewriteValueMIPS64_OpMIPS64ADDVconst(v, config) 271 case OpMIPS64AND: 272 return rewriteValueMIPS64_OpMIPS64AND(v, config) 273 case OpMIPS64ANDconst: 274 return rewriteValueMIPS64_OpMIPS64ANDconst(v, config) 275 case OpMIPS64MOVBUload: 276 return rewriteValueMIPS64_OpMIPS64MOVBUload(v, config) 277 case OpMIPS64MOVBUreg: 278 return rewriteValueMIPS64_OpMIPS64MOVBUreg(v, config) 279 case OpMIPS64MOVBload: 280 return rewriteValueMIPS64_OpMIPS64MOVBload(v, config) 281 case OpMIPS64MOVBreg: 282 return rewriteValueMIPS64_OpMIPS64MOVBreg(v, config) 283 case OpMIPS64MOVBstore: 284 return rewriteValueMIPS64_OpMIPS64MOVBstore(v, config) 285 case OpMIPS64MOVBstorezero: 286 return rewriteValueMIPS64_OpMIPS64MOVBstorezero(v, config) 287 case OpMIPS64MOVDload: 288 return rewriteValueMIPS64_OpMIPS64MOVDload(v, config) 289 case OpMIPS64MOVDstore: 290 return rewriteValueMIPS64_OpMIPS64MOVDstore(v, config) 291 case OpMIPS64MOVFload: 292 return rewriteValueMIPS64_OpMIPS64MOVFload(v, config) 293 case OpMIPS64MOVFstore: 294 return rewriteValueMIPS64_OpMIPS64MOVFstore(v, config) 295 case OpMIPS64MOVHUload: 296 return rewriteValueMIPS64_OpMIPS64MOVHUload(v, config) 297 case OpMIPS64MOVHUreg: 298 return rewriteValueMIPS64_OpMIPS64MOVHUreg(v, config) 299 case OpMIPS64MOVHload: 300 return rewriteValueMIPS64_OpMIPS64MOVHload(v, config) 301 case OpMIPS64MOVHreg: 302 return rewriteValueMIPS64_OpMIPS64MOVHreg(v, config) 303 case OpMIPS64MOVHstore: 304 return rewriteValueMIPS64_OpMIPS64MOVHstore(v, config) 305 case OpMIPS64MOVHstorezero: 306 return rewriteValueMIPS64_OpMIPS64MOVHstorezero(v, config) 307 case OpMIPS64MOVVload: 308 return rewriteValueMIPS64_OpMIPS64MOVVload(v, config) 309 case OpMIPS64MOVVreg: 310 return rewriteValueMIPS64_OpMIPS64MOVVreg(v, config) 311 case OpMIPS64MOVVstore: 312 return rewriteValueMIPS64_OpMIPS64MOVVstore(v, config) 313 case OpMIPS64MOVVstorezero: 314 return rewriteValueMIPS64_OpMIPS64MOVVstorezero(v, config) 315 case OpMIPS64MOVWUload: 316 return rewriteValueMIPS64_OpMIPS64MOVWUload(v, config) 317 case OpMIPS64MOVWUreg: 318 return rewriteValueMIPS64_OpMIPS64MOVWUreg(v, config) 319 case OpMIPS64MOVWload: 320 return rewriteValueMIPS64_OpMIPS64MOVWload(v, config) 321 case OpMIPS64MOVWreg: 322 return rewriteValueMIPS64_OpMIPS64MOVWreg(v, config) 323 case OpMIPS64MOVWstore: 324 return rewriteValueMIPS64_OpMIPS64MOVWstore(v, config) 325 case OpMIPS64MOVWstorezero: 326 return rewriteValueMIPS64_OpMIPS64MOVWstorezero(v, config) 327 case OpMIPS64NEGV: 328 return rewriteValueMIPS64_OpMIPS64NEGV(v, config) 329 case OpMIPS64NOR: 330 return rewriteValueMIPS64_OpMIPS64NOR(v, config) 331 case OpMIPS64NORconst: 332 return rewriteValueMIPS64_OpMIPS64NORconst(v, config) 333 case OpMIPS64OR: 334 return rewriteValueMIPS64_OpMIPS64OR(v, config) 335 case OpMIPS64ORconst: 336 return rewriteValueMIPS64_OpMIPS64ORconst(v, config) 337 case OpMIPS64SGT: 338 return rewriteValueMIPS64_OpMIPS64SGT(v, config) 339 case OpMIPS64SGTU: 340 return rewriteValueMIPS64_OpMIPS64SGTU(v, config) 341 case OpMIPS64SGTUconst: 342 return rewriteValueMIPS64_OpMIPS64SGTUconst(v, config) 343 case OpMIPS64SGTconst: 344 return rewriteValueMIPS64_OpMIPS64SGTconst(v, config) 345 case OpMIPS64SLLV: 346 return rewriteValueMIPS64_OpMIPS64SLLV(v, config) 347 case OpMIPS64SLLVconst: 348 return rewriteValueMIPS64_OpMIPS64SLLVconst(v, config) 349 case OpMIPS64SRAV: 350 return rewriteValueMIPS64_OpMIPS64SRAV(v, config) 351 case OpMIPS64SRAVconst: 352 return rewriteValueMIPS64_OpMIPS64SRAVconst(v, config) 353 case OpMIPS64SRLV: 354 return rewriteValueMIPS64_OpMIPS64SRLV(v, config) 355 case OpMIPS64SRLVconst: 356 return rewriteValueMIPS64_OpMIPS64SRLVconst(v, config) 357 case OpMIPS64SUBV: 358 return rewriteValueMIPS64_OpMIPS64SUBV(v, config) 359 case OpMIPS64SUBVconst: 360 return rewriteValueMIPS64_OpMIPS64SUBVconst(v, config) 361 case OpMIPS64XOR: 362 return rewriteValueMIPS64_OpMIPS64XOR(v, config) 363 case OpMIPS64XORconst: 364 return rewriteValueMIPS64_OpMIPS64XORconst(v, config) 365 case OpMod16: 366 return rewriteValueMIPS64_OpMod16(v, config) 367 case OpMod16u: 368 return rewriteValueMIPS64_OpMod16u(v, config) 369 case OpMod32: 370 return rewriteValueMIPS64_OpMod32(v, config) 371 case OpMod32u: 372 return rewriteValueMIPS64_OpMod32u(v, config) 373 case OpMod64: 374 return rewriteValueMIPS64_OpMod64(v, config) 375 case OpMod64u: 376 return rewriteValueMIPS64_OpMod64u(v, config) 377 case OpMod8: 378 return rewriteValueMIPS64_OpMod8(v, config) 379 case OpMod8u: 380 return rewriteValueMIPS64_OpMod8u(v, config) 381 case OpMove: 382 return rewriteValueMIPS64_OpMove(v, config) 383 case OpMul16: 384 return rewriteValueMIPS64_OpMul16(v, config) 385 case OpMul32: 386 return rewriteValueMIPS64_OpMul32(v, config) 387 case OpMul32F: 388 return rewriteValueMIPS64_OpMul32F(v, config) 389 case OpMul64: 390 return rewriteValueMIPS64_OpMul64(v, config) 391 case OpMul64F: 392 return rewriteValueMIPS64_OpMul64F(v, config) 393 case OpMul8: 394 return rewriteValueMIPS64_OpMul8(v, config) 395 case OpNeg16: 396 return rewriteValueMIPS64_OpNeg16(v, config) 397 case OpNeg32: 398 return rewriteValueMIPS64_OpNeg32(v, config) 399 case OpNeg32F: 400 return rewriteValueMIPS64_OpNeg32F(v, config) 401 case OpNeg64: 402 return rewriteValueMIPS64_OpNeg64(v, config) 403 case OpNeg64F: 404 return rewriteValueMIPS64_OpNeg64F(v, config) 405 case OpNeg8: 406 return rewriteValueMIPS64_OpNeg8(v, config) 407 case OpNeq16: 408 return rewriteValueMIPS64_OpNeq16(v, config) 409 case OpNeq32: 410 return rewriteValueMIPS64_OpNeq32(v, config) 411 case OpNeq32F: 412 return rewriteValueMIPS64_OpNeq32F(v, config) 413 case OpNeq64: 414 return rewriteValueMIPS64_OpNeq64(v, config) 415 case OpNeq64F: 416 return rewriteValueMIPS64_OpNeq64F(v, config) 417 case OpNeq8: 418 return rewriteValueMIPS64_OpNeq8(v, config) 419 case OpNeqB: 420 return rewriteValueMIPS64_OpNeqB(v, config) 421 case OpNeqPtr: 422 return rewriteValueMIPS64_OpNeqPtr(v, config) 423 case OpNilCheck: 424 return rewriteValueMIPS64_OpNilCheck(v, config) 425 case OpNot: 426 return rewriteValueMIPS64_OpNot(v, config) 427 case OpOffPtr: 428 return rewriteValueMIPS64_OpOffPtr(v, config) 429 case OpOr16: 430 return rewriteValueMIPS64_OpOr16(v, config) 431 case OpOr32: 432 return rewriteValueMIPS64_OpOr32(v, config) 433 case OpOr64: 434 return rewriteValueMIPS64_OpOr64(v, config) 435 case OpOr8: 436 return rewriteValueMIPS64_OpOr8(v, config) 437 case OpOrB: 438 return rewriteValueMIPS64_OpOrB(v, config) 439 case OpRsh16Ux16: 440 return rewriteValueMIPS64_OpRsh16Ux16(v, config) 441 case OpRsh16Ux32: 442 return rewriteValueMIPS64_OpRsh16Ux32(v, config) 443 case OpRsh16Ux64: 444 return rewriteValueMIPS64_OpRsh16Ux64(v, config) 445 case OpRsh16Ux8: 446 return rewriteValueMIPS64_OpRsh16Ux8(v, config) 447 case OpRsh16x16: 448 return rewriteValueMIPS64_OpRsh16x16(v, config) 449 case OpRsh16x32: 450 return rewriteValueMIPS64_OpRsh16x32(v, config) 451 case OpRsh16x64: 452 return rewriteValueMIPS64_OpRsh16x64(v, config) 453 case OpRsh16x8: 454 return rewriteValueMIPS64_OpRsh16x8(v, config) 455 case OpRsh32Ux16: 456 return rewriteValueMIPS64_OpRsh32Ux16(v, config) 457 case OpRsh32Ux32: 458 return rewriteValueMIPS64_OpRsh32Ux32(v, config) 459 case OpRsh32Ux64: 460 return rewriteValueMIPS64_OpRsh32Ux64(v, config) 461 case OpRsh32Ux8: 462 return rewriteValueMIPS64_OpRsh32Ux8(v, config) 463 case OpRsh32x16: 464 return rewriteValueMIPS64_OpRsh32x16(v, config) 465 case OpRsh32x32: 466 return rewriteValueMIPS64_OpRsh32x32(v, config) 467 case OpRsh32x64: 468 return rewriteValueMIPS64_OpRsh32x64(v, config) 469 case OpRsh32x8: 470 return rewriteValueMIPS64_OpRsh32x8(v, config) 471 case OpRsh64Ux16: 472 return rewriteValueMIPS64_OpRsh64Ux16(v, config) 473 case OpRsh64Ux32: 474 return rewriteValueMIPS64_OpRsh64Ux32(v, config) 475 case OpRsh64Ux64: 476 return rewriteValueMIPS64_OpRsh64Ux64(v, config) 477 case OpRsh64Ux8: 478 return rewriteValueMIPS64_OpRsh64Ux8(v, config) 479 case OpRsh64x16: 480 return rewriteValueMIPS64_OpRsh64x16(v, config) 481 case OpRsh64x32: 482 return rewriteValueMIPS64_OpRsh64x32(v, config) 483 case OpRsh64x64: 484 return rewriteValueMIPS64_OpRsh64x64(v, config) 485 case OpRsh64x8: 486 return rewriteValueMIPS64_OpRsh64x8(v, config) 487 case OpRsh8Ux16: 488 return rewriteValueMIPS64_OpRsh8Ux16(v, config) 489 case OpRsh8Ux32: 490 return rewriteValueMIPS64_OpRsh8Ux32(v, config) 491 case OpRsh8Ux64: 492 return rewriteValueMIPS64_OpRsh8Ux64(v, config) 493 case OpRsh8Ux8: 494 return rewriteValueMIPS64_OpRsh8Ux8(v, config) 495 case OpRsh8x16: 496 return rewriteValueMIPS64_OpRsh8x16(v, config) 497 case OpRsh8x32: 498 return rewriteValueMIPS64_OpRsh8x32(v, config) 499 case OpRsh8x64: 500 return rewriteValueMIPS64_OpRsh8x64(v, config) 501 case OpRsh8x8: 502 return rewriteValueMIPS64_OpRsh8x8(v, config) 503 case OpSelect0: 504 return rewriteValueMIPS64_OpSelect0(v, config) 505 case OpSelect1: 506 return rewriteValueMIPS64_OpSelect1(v, config) 507 case OpSignExt16to32: 508 return rewriteValueMIPS64_OpSignExt16to32(v, config) 509 case OpSignExt16to64: 510 return rewriteValueMIPS64_OpSignExt16to64(v, config) 511 case OpSignExt32to64: 512 return rewriteValueMIPS64_OpSignExt32to64(v, config) 513 case OpSignExt8to16: 514 return rewriteValueMIPS64_OpSignExt8to16(v, config) 515 case OpSignExt8to32: 516 return rewriteValueMIPS64_OpSignExt8to32(v, config) 517 case OpSignExt8to64: 518 return rewriteValueMIPS64_OpSignExt8to64(v, config) 519 case OpStaticCall: 520 return rewriteValueMIPS64_OpStaticCall(v, config) 521 case OpStore: 522 return rewriteValueMIPS64_OpStore(v, config) 523 case OpSub16: 524 return rewriteValueMIPS64_OpSub16(v, config) 525 case OpSub32: 526 return rewriteValueMIPS64_OpSub32(v, config) 527 case OpSub32F: 528 return rewriteValueMIPS64_OpSub32F(v, config) 529 case OpSub64: 530 return rewriteValueMIPS64_OpSub64(v, config) 531 case OpSub64F: 532 return rewriteValueMIPS64_OpSub64F(v, config) 533 case OpSub8: 534 return rewriteValueMIPS64_OpSub8(v, config) 535 case OpSubPtr: 536 return rewriteValueMIPS64_OpSubPtr(v, config) 537 case OpTrunc16to8: 538 return rewriteValueMIPS64_OpTrunc16to8(v, config) 539 case OpTrunc32to16: 540 return rewriteValueMIPS64_OpTrunc32to16(v, config) 541 case OpTrunc32to8: 542 return rewriteValueMIPS64_OpTrunc32to8(v, config) 543 case OpTrunc64to16: 544 return rewriteValueMIPS64_OpTrunc64to16(v, config) 545 case OpTrunc64to32: 546 return rewriteValueMIPS64_OpTrunc64to32(v, config) 547 case OpTrunc64to8: 548 return rewriteValueMIPS64_OpTrunc64to8(v, config) 549 case OpXor16: 550 return rewriteValueMIPS64_OpXor16(v, config) 551 case OpXor32: 552 return rewriteValueMIPS64_OpXor32(v, config) 553 case OpXor64: 554 return rewriteValueMIPS64_OpXor64(v, config) 555 case OpXor8: 556 return rewriteValueMIPS64_OpXor8(v, config) 557 case OpZero: 558 return rewriteValueMIPS64_OpZero(v, config) 559 case OpZeroExt16to32: 560 return rewriteValueMIPS64_OpZeroExt16to32(v, config) 561 case OpZeroExt16to64: 562 return rewriteValueMIPS64_OpZeroExt16to64(v, config) 563 case OpZeroExt32to64: 564 return rewriteValueMIPS64_OpZeroExt32to64(v, config) 565 case OpZeroExt8to16: 566 return rewriteValueMIPS64_OpZeroExt8to16(v, config) 567 case OpZeroExt8to32: 568 return rewriteValueMIPS64_OpZeroExt8to32(v, config) 569 case OpZeroExt8to64: 570 return rewriteValueMIPS64_OpZeroExt8to64(v, config) 571 } 572 return false 573 } 574 func rewriteValueMIPS64_OpAdd16(v *Value, config *Config) bool { 575 b := v.Block 576 _ = b 577 // match: (Add16 x y) 578 // cond: 579 // result: (ADDV x y) 580 for { 581 x := v.Args[0] 582 y := v.Args[1] 583 v.reset(OpMIPS64ADDV) 584 v.AddArg(x) 585 v.AddArg(y) 586 return true 587 } 588 } 589 func rewriteValueMIPS64_OpAdd32(v *Value, config *Config) bool { 590 b := v.Block 591 _ = b 592 // match: (Add32 x y) 593 // cond: 594 // result: (ADDV x y) 595 for { 596 x := v.Args[0] 597 y := v.Args[1] 598 v.reset(OpMIPS64ADDV) 599 v.AddArg(x) 600 v.AddArg(y) 601 return true 602 } 603 } 604 func rewriteValueMIPS64_OpAdd32F(v *Value, config *Config) bool { 605 b := v.Block 606 _ = b 607 // match: (Add32F x y) 608 // cond: 609 // result: (ADDF x y) 610 for { 611 x := v.Args[0] 612 y := v.Args[1] 613 v.reset(OpMIPS64ADDF) 614 v.AddArg(x) 615 v.AddArg(y) 616 return true 617 } 618 } 619 func rewriteValueMIPS64_OpAdd64(v *Value, config *Config) bool { 620 b := v.Block 621 _ = b 622 // match: (Add64 x y) 623 // cond: 624 // result: (ADDV x y) 625 for { 626 x := v.Args[0] 627 y := v.Args[1] 628 v.reset(OpMIPS64ADDV) 629 v.AddArg(x) 630 v.AddArg(y) 631 return true 632 } 633 } 634 func rewriteValueMIPS64_OpAdd64F(v *Value, config *Config) bool { 635 b := v.Block 636 _ = b 637 // match: (Add64F x y) 638 // cond: 639 // result: (ADDD x y) 640 for { 641 x := v.Args[0] 642 y := v.Args[1] 643 v.reset(OpMIPS64ADDD) 644 v.AddArg(x) 645 v.AddArg(y) 646 return true 647 } 648 } 649 func rewriteValueMIPS64_OpAdd8(v *Value, config *Config) bool { 650 b := v.Block 651 _ = b 652 // match: (Add8 x y) 653 // cond: 654 // result: (ADDV x y) 655 for { 656 x := v.Args[0] 657 y := v.Args[1] 658 v.reset(OpMIPS64ADDV) 659 v.AddArg(x) 660 v.AddArg(y) 661 return true 662 } 663 } 664 func rewriteValueMIPS64_OpAddPtr(v *Value, config *Config) bool { 665 b := v.Block 666 _ = b 667 // match: (AddPtr x y) 668 // cond: 669 // result: (ADDV x y) 670 for { 671 x := v.Args[0] 672 y := v.Args[1] 673 v.reset(OpMIPS64ADDV) 674 v.AddArg(x) 675 v.AddArg(y) 676 return true 677 } 678 } 679 func rewriteValueMIPS64_OpAddr(v *Value, config *Config) bool { 680 b := v.Block 681 _ = b 682 // match: (Addr {sym} base) 683 // cond: 684 // result: (MOVVaddr {sym} base) 685 for { 686 sym := v.Aux 687 base := v.Args[0] 688 v.reset(OpMIPS64MOVVaddr) 689 v.Aux = sym 690 v.AddArg(base) 691 return true 692 } 693 } 694 func rewriteValueMIPS64_OpAnd16(v *Value, config *Config) bool { 695 b := v.Block 696 _ = b 697 // match: (And16 x y) 698 // cond: 699 // result: (AND x y) 700 for { 701 x := v.Args[0] 702 y := v.Args[1] 703 v.reset(OpMIPS64AND) 704 v.AddArg(x) 705 v.AddArg(y) 706 return true 707 } 708 } 709 func rewriteValueMIPS64_OpAnd32(v *Value, config *Config) bool { 710 b := v.Block 711 _ = b 712 // match: (And32 x y) 713 // cond: 714 // result: (AND x y) 715 for { 716 x := v.Args[0] 717 y := v.Args[1] 718 v.reset(OpMIPS64AND) 719 v.AddArg(x) 720 v.AddArg(y) 721 return true 722 } 723 } 724 func rewriteValueMIPS64_OpAnd64(v *Value, config *Config) bool { 725 b := v.Block 726 _ = b 727 // match: (And64 x y) 728 // cond: 729 // result: (AND x y) 730 for { 731 x := v.Args[0] 732 y := v.Args[1] 733 v.reset(OpMIPS64AND) 734 v.AddArg(x) 735 v.AddArg(y) 736 return true 737 } 738 } 739 func rewriteValueMIPS64_OpAnd8(v *Value, config *Config) bool { 740 b := v.Block 741 _ = b 742 // match: (And8 x y) 743 // cond: 744 // result: (AND x y) 745 for { 746 x := v.Args[0] 747 y := v.Args[1] 748 v.reset(OpMIPS64AND) 749 v.AddArg(x) 750 v.AddArg(y) 751 return true 752 } 753 } 754 func rewriteValueMIPS64_OpAndB(v *Value, config *Config) bool { 755 b := v.Block 756 _ = b 757 // match: (AndB x y) 758 // cond: 759 // result: (AND x y) 760 for { 761 x := v.Args[0] 762 y := v.Args[1] 763 v.reset(OpMIPS64AND) 764 v.AddArg(x) 765 v.AddArg(y) 766 return true 767 } 768 } 769 func rewriteValueMIPS64_OpAvg64u(v *Value, config *Config) bool { 770 b := v.Block 771 _ = b 772 // match: (Avg64u <t> x y) 773 // cond: 774 // result: (ADDV (ADDV <t> (SRLVconst <t> x [1]) (SRLVconst <t> y [1])) (AND <t> (AND <t> x y) (MOVVconst [1]))) 775 for { 776 t := v.Type 777 x := v.Args[0] 778 y := v.Args[1] 779 v.reset(OpMIPS64ADDV) 780 v0 := b.NewValue0(v.Line, OpMIPS64ADDV, t) 781 v1 := b.NewValue0(v.Line, OpMIPS64SRLVconst, t) 782 v1.AuxInt = 1 783 v1.AddArg(x) 784 v0.AddArg(v1) 785 v2 := b.NewValue0(v.Line, OpMIPS64SRLVconst, t) 786 v2.AuxInt = 1 787 v2.AddArg(y) 788 v0.AddArg(v2) 789 v.AddArg(v0) 790 v3 := b.NewValue0(v.Line, OpMIPS64AND, t) 791 v4 := b.NewValue0(v.Line, OpMIPS64AND, t) 792 v4.AddArg(x) 793 v4.AddArg(y) 794 v3.AddArg(v4) 795 v5 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 796 v5.AuxInt = 1 797 v3.AddArg(v5) 798 v.AddArg(v3) 799 return true 800 } 801 } 802 func rewriteValueMIPS64_OpClosureCall(v *Value, config *Config) bool { 803 b := v.Block 804 _ = b 805 // match: (ClosureCall [argwid] entry closure mem) 806 // cond: 807 // result: (CALLclosure [argwid] entry closure mem) 808 for { 809 argwid := v.AuxInt 810 entry := v.Args[0] 811 closure := v.Args[1] 812 mem := v.Args[2] 813 v.reset(OpMIPS64CALLclosure) 814 v.AuxInt = argwid 815 v.AddArg(entry) 816 v.AddArg(closure) 817 v.AddArg(mem) 818 return true 819 } 820 } 821 func rewriteValueMIPS64_OpCom16(v *Value, config *Config) bool { 822 b := v.Block 823 _ = b 824 // match: (Com16 x) 825 // cond: 826 // result: (NOR (MOVVconst [0]) x) 827 for { 828 x := v.Args[0] 829 v.reset(OpMIPS64NOR) 830 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 831 v0.AuxInt = 0 832 v.AddArg(v0) 833 v.AddArg(x) 834 return true 835 } 836 } 837 func rewriteValueMIPS64_OpCom32(v *Value, config *Config) bool { 838 b := v.Block 839 _ = b 840 // match: (Com32 x) 841 // cond: 842 // result: (NOR (MOVVconst [0]) x) 843 for { 844 x := v.Args[0] 845 v.reset(OpMIPS64NOR) 846 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 847 v0.AuxInt = 0 848 v.AddArg(v0) 849 v.AddArg(x) 850 return true 851 } 852 } 853 func rewriteValueMIPS64_OpCom64(v *Value, config *Config) bool { 854 b := v.Block 855 _ = b 856 // match: (Com64 x) 857 // cond: 858 // result: (NOR (MOVVconst [0]) x) 859 for { 860 x := v.Args[0] 861 v.reset(OpMIPS64NOR) 862 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 863 v0.AuxInt = 0 864 v.AddArg(v0) 865 v.AddArg(x) 866 return true 867 } 868 } 869 func rewriteValueMIPS64_OpCom8(v *Value, config *Config) bool { 870 b := v.Block 871 _ = b 872 // match: (Com8 x) 873 // cond: 874 // result: (NOR (MOVVconst [0]) x) 875 for { 876 x := v.Args[0] 877 v.reset(OpMIPS64NOR) 878 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 879 v0.AuxInt = 0 880 v.AddArg(v0) 881 v.AddArg(x) 882 return true 883 } 884 } 885 func rewriteValueMIPS64_OpConst16(v *Value, config *Config) bool { 886 b := v.Block 887 _ = b 888 // match: (Const16 [val]) 889 // cond: 890 // result: (MOVVconst [val]) 891 for { 892 val := v.AuxInt 893 v.reset(OpMIPS64MOVVconst) 894 v.AuxInt = val 895 return true 896 } 897 } 898 func rewriteValueMIPS64_OpConst32(v *Value, config *Config) bool { 899 b := v.Block 900 _ = b 901 // match: (Const32 [val]) 902 // cond: 903 // result: (MOVVconst [val]) 904 for { 905 val := v.AuxInt 906 v.reset(OpMIPS64MOVVconst) 907 v.AuxInt = val 908 return true 909 } 910 } 911 func rewriteValueMIPS64_OpConst32F(v *Value, config *Config) bool { 912 b := v.Block 913 _ = b 914 // match: (Const32F [val]) 915 // cond: 916 // result: (MOVFconst [val]) 917 for { 918 val := v.AuxInt 919 v.reset(OpMIPS64MOVFconst) 920 v.AuxInt = val 921 return true 922 } 923 } 924 func rewriteValueMIPS64_OpConst64(v *Value, config *Config) bool { 925 b := v.Block 926 _ = b 927 // match: (Const64 [val]) 928 // cond: 929 // result: (MOVVconst [val]) 930 for { 931 val := v.AuxInt 932 v.reset(OpMIPS64MOVVconst) 933 v.AuxInt = val 934 return true 935 } 936 } 937 func rewriteValueMIPS64_OpConst64F(v *Value, config *Config) bool { 938 b := v.Block 939 _ = b 940 // match: (Const64F [val]) 941 // cond: 942 // result: (MOVDconst [val]) 943 for { 944 val := v.AuxInt 945 v.reset(OpMIPS64MOVDconst) 946 v.AuxInt = val 947 return true 948 } 949 } 950 func rewriteValueMIPS64_OpConst8(v *Value, config *Config) bool { 951 b := v.Block 952 _ = b 953 // match: (Const8 [val]) 954 // cond: 955 // result: (MOVVconst [val]) 956 for { 957 val := v.AuxInt 958 v.reset(OpMIPS64MOVVconst) 959 v.AuxInt = val 960 return true 961 } 962 } 963 func rewriteValueMIPS64_OpConstBool(v *Value, config *Config) bool { 964 b := v.Block 965 _ = b 966 // match: (ConstBool [b]) 967 // cond: 968 // result: (MOVVconst [b]) 969 for { 970 b := v.AuxInt 971 v.reset(OpMIPS64MOVVconst) 972 v.AuxInt = b 973 return true 974 } 975 } 976 func rewriteValueMIPS64_OpConstNil(v *Value, config *Config) bool { 977 b := v.Block 978 _ = b 979 // match: (ConstNil) 980 // cond: 981 // result: (MOVVconst [0]) 982 for { 983 v.reset(OpMIPS64MOVVconst) 984 v.AuxInt = 0 985 return true 986 } 987 } 988 func rewriteValueMIPS64_OpConvert(v *Value, config *Config) bool { 989 b := v.Block 990 _ = b 991 // match: (Convert x mem) 992 // cond: 993 // result: (MOVVconvert x mem) 994 for { 995 x := v.Args[0] 996 mem := v.Args[1] 997 v.reset(OpMIPS64MOVVconvert) 998 v.AddArg(x) 999 v.AddArg(mem) 1000 return true 1001 } 1002 } 1003 func rewriteValueMIPS64_OpCvt32Fto32(v *Value, config *Config) bool { 1004 b := v.Block 1005 _ = b 1006 // match: (Cvt32Fto32 x) 1007 // cond: 1008 // result: (TRUNCFW x) 1009 for { 1010 x := v.Args[0] 1011 v.reset(OpMIPS64TRUNCFW) 1012 v.AddArg(x) 1013 return true 1014 } 1015 } 1016 func rewriteValueMIPS64_OpCvt32Fto64(v *Value, config *Config) bool { 1017 b := v.Block 1018 _ = b 1019 // match: (Cvt32Fto64 x) 1020 // cond: 1021 // result: (TRUNCFV x) 1022 for { 1023 x := v.Args[0] 1024 v.reset(OpMIPS64TRUNCFV) 1025 v.AddArg(x) 1026 return true 1027 } 1028 } 1029 func rewriteValueMIPS64_OpCvt32Fto64F(v *Value, config *Config) bool { 1030 b := v.Block 1031 _ = b 1032 // match: (Cvt32Fto64F x) 1033 // cond: 1034 // result: (MOVFD x) 1035 for { 1036 x := v.Args[0] 1037 v.reset(OpMIPS64MOVFD) 1038 v.AddArg(x) 1039 return true 1040 } 1041 } 1042 func rewriteValueMIPS64_OpCvt32to32F(v *Value, config *Config) bool { 1043 b := v.Block 1044 _ = b 1045 // match: (Cvt32to32F x) 1046 // cond: 1047 // result: (MOVWF x) 1048 for { 1049 x := v.Args[0] 1050 v.reset(OpMIPS64MOVWF) 1051 v.AddArg(x) 1052 return true 1053 } 1054 } 1055 func rewriteValueMIPS64_OpCvt32to64F(v *Value, config *Config) bool { 1056 b := v.Block 1057 _ = b 1058 // match: (Cvt32to64F x) 1059 // cond: 1060 // result: (MOVWD x) 1061 for { 1062 x := v.Args[0] 1063 v.reset(OpMIPS64MOVWD) 1064 v.AddArg(x) 1065 return true 1066 } 1067 } 1068 func rewriteValueMIPS64_OpCvt64Fto32(v *Value, config *Config) bool { 1069 b := v.Block 1070 _ = b 1071 // match: (Cvt64Fto32 x) 1072 // cond: 1073 // result: (TRUNCDW x) 1074 for { 1075 x := v.Args[0] 1076 v.reset(OpMIPS64TRUNCDW) 1077 v.AddArg(x) 1078 return true 1079 } 1080 } 1081 func rewriteValueMIPS64_OpCvt64Fto32F(v *Value, config *Config) bool { 1082 b := v.Block 1083 _ = b 1084 // match: (Cvt64Fto32F x) 1085 // cond: 1086 // result: (MOVDF x) 1087 for { 1088 x := v.Args[0] 1089 v.reset(OpMIPS64MOVDF) 1090 v.AddArg(x) 1091 return true 1092 } 1093 } 1094 func rewriteValueMIPS64_OpCvt64Fto64(v *Value, config *Config) bool { 1095 b := v.Block 1096 _ = b 1097 // match: (Cvt64Fto64 x) 1098 // cond: 1099 // result: (TRUNCDV x) 1100 for { 1101 x := v.Args[0] 1102 v.reset(OpMIPS64TRUNCDV) 1103 v.AddArg(x) 1104 return true 1105 } 1106 } 1107 func rewriteValueMIPS64_OpCvt64to32F(v *Value, config *Config) bool { 1108 b := v.Block 1109 _ = b 1110 // match: (Cvt64to32F x) 1111 // cond: 1112 // result: (MOVVF x) 1113 for { 1114 x := v.Args[0] 1115 v.reset(OpMIPS64MOVVF) 1116 v.AddArg(x) 1117 return true 1118 } 1119 } 1120 func rewriteValueMIPS64_OpCvt64to64F(v *Value, config *Config) bool { 1121 b := v.Block 1122 _ = b 1123 // match: (Cvt64to64F x) 1124 // cond: 1125 // result: (MOVVD x) 1126 for { 1127 x := v.Args[0] 1128 v.reset(OpMIPS64MOVVD) 1129 v.AddArg(x) 1130 return true 1131 } 1132 } 1133 func rewriteValueMIPS64_OpDeferCall(v *Value, config *Config) bool { 1134 b := v.Block 1135 _ = b 1136 // match: (DeferCall [argwid] mem) 1137 // cond: 1138 // result: (CALLdefer [argwid] mem) 1139 for { 1140 argwid := v.AuxInt 1141 mem := v.Args[0] 1142 v.reset(OpMIPS64CALLdefer) 1143 v.AuxInt = argwid 1144 v.AddArg(mem) 1145 return true 1146 } 1147 } 1148 func rewriteValueMIPS64_OpDiv16(v *Value, config *Config) bool { 1149 b := v.Block 1150 _ = b 1151 // match: (Div16 x y) 1152 // cond: 1153 // result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y))) 1154 for { 1155 x := v.Args[0] 1156 y := v.Args[1] 1157 v.reset(OpSelect1) 1158 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1159 v1 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1160 v1.AddArg(x) 1161 v0.AddArg(v1) 1162 v2 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1163 v2.AddArg(y) 1164 v0.AddArg(v2) 1165 v.AddArg(v0) 1166 return true 1167 } 1168 } 1169 func rewriteValueMIPS64_OpDiv16u(v *Value, config *Config) bool { 1170 b := v.Block 1171 _ = b 1172 // match: (Div16u x y) 1173 // cond: 1174 // result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) 1175 for { 1176 x := v.Args[0] 1177 y := v.Args[1] 1178 v.reset(OpSelect1) 1179 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 1180 v1 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1181 v1.AddArg(x) 1182 v0.AddArg(v1) 1183 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1184 v2.AddArg(y) 1185 v0.AddArg(v2) 1186 v.AddArg(v0) 1187 return true 1188 } 1189 } 1190 func rewriteValueMIPS64_OpDiv32(v *Value, config *Config) bool { 1191 b := v.Block 1192 _ = b 1193 // match: (Div32 x y) 1194 // cond: 1195 // result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y))) 1196 for { 1197 x := v.Args[0] 1198 y := v.Args[1] 1199 v.reset(OpSelect1) 1200 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1201 v1 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1202 v1.AddArg(x) 1203 v0.AddArg(v1) 1204 v2 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1205 v2.AddArg(y) 1206 v0.AddArg(v2) 1207 v.AddArg(v0) 1208 return true 1209 } 1210 } 1211 func rewriteValueMIPS64_OpDiv32F(v *Value, config *Config) bool { 1212 b := v.Block 1213 _ = b 1214 // match: (Div32F x y) 1215 // cond: 1216 // result: (DIVF x y) 1217 for { 1218 x := v.Args[0] 1219 y := v.Args[1] 1220 v.reset(OpMIPS64DIVF) 1221 v.AddArg(x) 1222 v.AddArg(y) 1223 return true 1224 } 1225 } 1226 func rewriteValueMIPS64_OpDiv32u(v *Value, config *Config) bool { 1227 b := v.Block 1228 _ = b 1229 // match: (Div32u x y) 1230 // cond: 1231 // result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) 1232 for { 1233 x := v.Args[0] 1234 y := v.Args[1] 1235 v.reset(OpSelect1) 1236 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 1237 v1 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1238 v1.AddArg(x) 1239 v0.AddArg(v1) 1240 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1241 v2.AddArg(y) 1242 v0.AddArg(v2) 1243 v.AddArg(v0) 1244 return true 1245 } 1246 } 1247 func rewriteValueMIPS64_OpDiv64(v *Value, config *Config) bool { 1248 b := v.Block 1249 _ = b 1250 // match: (Div64 x y) 1251 // cond: 1252 // result: (Select1 (DIVV x y)) 1253 for { 1254 x := v.Args[0] 1255 y := v.Args[1] 1256 v.reset(OpSelect1) 1257 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1258 v0.AddArg(x) 1259 v0.AddArg(y) 1260 v.AddArg(v0) 1261 return true 1262 } 1263 } 1264 func rewriteValueMIPS64_OpDiv64F(v *Value, config *Config) bool { 1265 b := v.Block 1266 _ = b 1267 // match: (Div64F x y) 1268 // cond: 1269 // result: (DIVD x y) 1270 for { 1271 x := v.Args[0] 1272 y := v.Args[1] 1273 v.reset(OpMIPS64DIVD) 1274 v.AddArg(x) 1275 v.AddArg(y) 1276 return true 1277 } 1278 } 1279 func rewriteValueMIPS64_OpDiv64u(v *Value, config *Config) bool { 1280 b := v.Block 1281 _ = b 1282 // match: (Div64u x y) 1283 // cond: 1284 // result: (Select1 (DIVVU x y)) 1285 for { 1286 x := v.Args[0] 1287 y := v.Args[1] 1288 v.reset(OpSelect1) 1289 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 1290 v0.AddArg(x) 1291 v0.AddArg(y) 1292 v.AddArg(v0) 1293 return true 1294 } 1295 } 1296 func rewriteValueMIPS64_OpDiv8(v *Value, config *Config) bool { 1297 b := v.Block 1298 _ = b 1299 // match: (Div8 x y) 1300 // cond: 1301 // result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y))) 1302 for { 1303 x := v.Args[0] 1304 y := v.Args[1] 1305 v.reset(OpSelect1) 1306 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1307 v1 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1308 v1.AddArg(x) 1309 v0.AddArg(v1) 1310 v2 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1311 v2.AddArg(y) 1312 v0.AddArg(v2) 1313 v.AddArg(v0) 1314 return true 1315 } 1316 } 1317 func rewriteValueMIPS64_OpDiv8u(v *Value, config *Config) bool { 1318 b := v.Block 1319 _ = b 1320 // match: (Div8u x y) 1321 // cond: 1322 // result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) 1323 for { 1324 x := v.Args[0] 1325 y := v.Args[1] 1326 v.reset(OpSelect1) 1327 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 1328 v1 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1329 v1.AddArg(x) 1330 v0.AddArg(v1) 1331 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1332 v2.AddArg(y) 1333 v0.AddArg(v2) 1334 v.AddArg(v0) 1335 return true 1336 } 1337 } 1338 func rewriteValueMIPS64_OpEq16(v *Value, config *Config) bool { 1339 b := v.Block 1340 _ = b 1341 // match: (Eq16 x y) 1342 // cond: 1343 // result: (SGTU (MOVVconst [1]) (XOR (ZeroExt16to64 x) (ZeroExt16to64 y))) 1344 for { 1345 x := v.Args[0] 1346 y := v.Args[1] 1347 v.reset(OpMIPS64SGTU) 1348 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1349 v0.AuxInt = 1 1350 v.AddArg(v0) 1351 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 1352 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1353 v2.AddArg(x) 1354 v1.AddArg(v2) 1355 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1356 v3.AddArg(y) 1357 v1.AddArg(v3) 1358 v.AddArg(v1) 1359 return true 1360 } 1361 } 1362 func rewriteValueMIPS64_OpEq32(v *Value, config *Config) bool { 1363 b := v.Block 1364 _ = b 1365 // match: (Eq32 x y) 1366 // cond: 1367 // result: (SGTU (MOVVconst [1]) (XOR (ZeroExt32to64 x) (ZeroExt32to64 y))) 1368 for { 1369 x := v.Args[0] 1370 y := v.Args[1] 1371 v.reset(OpMIPS64SGTU) 1372 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1373 v0.AuxInt = 1 1374 v.AddArg(v0) 1375 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 1376 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1377 v2.AddArg(x) 1378 v1.AddArg(v2) 1379 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1380 v3.AddArg(y) 1381 v1.AddArg(v3) 1382 v.AddArg(v1) 1383 return true 1384 } 1385 } 1386 func rewriteValueMIPS64_OpEq32F(v *Value, config *Config) bool { 1387 b := v.Block 1388 _ = b 1389 // match: (Eq32F x y) 1390 // cond: 1391 // result: (FPFlagTrue (CMPEQF x y)) 1392 for { 1393 x := v.Args[0] 1394 y := v.Args[1] 1395 v.reset(OpMIPS64FPFlagTrue) 1396 v0 := b.NewValue0(v.Line, OpMIPS64CMPEQF, TypeFlags) 1397 v0.AddArg(x) 1398 v0.AddArg(y) 1399 v.AddArg(v0) 1400 return true 1401 } 1402 } 1403 func rewriteValueMIPS64_OpEq64(v *Value, config *Config) bool { 1404 b := v.Block 1405 _ = b 1406 // match: (Eq64 x y) 1407 // cond: 1408 // result: (SGTU (MOVVconst [1]) (XOR x y)) 1409 for { 1410 x := v.Args[0] 1411 y := v.Args[1] 1412 v.reset(OpMIPS64SGTU) 1413 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1414 v0.AuxInt = 1 1415 v.AddArg(v0) 1416 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 1417 v1.AddArg(x) 1418 v1.AddArg(y) 1419 v.AddArg(v1) 1420 return true 1421 } 1422 } 1423 func rewriteValueMIPS64_OpEq64F(v *Value, config *Config) bool { 1424 b := v.Block 1425 _ = b 1426 // match: (Eq64F x y) 1427 // cond: 1428 // result: (FPFlagTrue (CMPEQD x y)) 1429 for { 1430 x := v.Args[0] 1431 y := v.Args[1] 1432 v.reset(OpMIPS64FPFlagTrue) 1433 v0 := b.NewValue0(v.Line, OpMIPS64CMPEQD, TypeFlags) 1434 v0.AddArg(x) 1435 v0.AddArg(y) 1436 v.AddArg(v0) 1437 return true 1438 } 1439 } 1440 func rewriteValueMIPS64_OpEq8(v *Value, config *Config) bool { 1441 b := v.Block 1442 _ = b 1443 // match: (Eq8 x y) 1444 // cond: 1445 // result: (SGTU (MOVVconst [1]) (XOR (ZeroExt8to64 x) (ZeroExt8to64 y))) 1446 for { 1447 x := v.Args[0] 1448 y := v.Args[1] 1449 v.reset(OpMIPS64SGTU) 1450 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1451 v0.AuxInt = 1 1452 v.AddArg(v0) 1453 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 1454 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1455 v2.AddArg(x) 1456 v1.AddArg(v2) 1457 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1458 v3.AddArg(y) 1459 v1.AddArg(v3) 1460 v.AddArg(v1) 1461 return true 1462 } 1463 } 1464 func rewriteValueMIPS64_OpEqB(v *Value, config *Config) bool { 1465 b := v.Block 1466 _ = b 1467 // match: (EqB x y) 1468 // cond: 1469 // result: (XOR (MOVVconst [1]) (XOR <config.fe.TypeBool()> x y)) 1470 for { 1471 x := v.Args[0] 1472 y := v.Args[1] 1473 v.reset(OpMIPS64XOR) 1474 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1475 v0.AuxInt = 1 1476 v.AddArg(v0) 1477 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeBool()) 1478 v1.AddArg(x) 1479 v1.AddArg(y) 1480 v.AddArg(v1) 1481 return true 1482 } 1483 } 1484 func rewriteValueMIPS64_OpEqPtr(v *Value, config *Config) bool { 1485 b := v.Block 1486 _ = b 1487 // match: (EqPtr x y) 1488 // cond: 1489 // result: (SGTU (MOVVconst [1]) (XOR x y)) 1490 for { 1491 x := v.Args[0] 1492 y := v.Args[1] 1493 v.reset(OpMIPS64SGTU) 1494 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1495 v0.AuxInt = 1 1496 v.AddArg(v0) 1497 v1 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 1498 v1.AddArg(x) 1499 v1.AddArg(y) 1500 v.AddArg(v1) 1501 return true 1502 } 1503 } 1504 func rewriteValueMIPS64_OpGeq16(v *Value, config *Config) bool { 1505 b := v.Block 1506 _ = b 1507 // match: (Geq16 x y) 1508 // cond: 1509 // result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 y) (SignExt16to64 x))) 1510 for { 1511 x := v.Args[0] 1512 y := v.Args[1] 1513 v.reset(OpMIPS64XOR) 1514 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1515 v0.AuxInt = 1 1516 v.AddArg(v0) 1517 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 1518 v2 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1519 v2.AddArg(y) 1520 v1.AddArg(v2) 1521 v3 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1522 v3.AddArg(x) 1523 v1.AddArg(v3) 1524 v.AddArg(v1) 1525 return true 1526 } 1527 } 1528 func rewriteValueMIPS64_OpGeq16U(v *Value, config *Config) bool { 1529 b := v.Block 1530 _ = b 1531 // match: (Geq16U x y) 1532 // cond: 1533 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x))) 1534 for { 1535 x := v.Args[0] 1536 y := v.Args[1] 1537 v.reset(OpMIPS64XOR) 1538 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1539 v0.AuxInt = 1 1540 v.AddArg(v0) 1541 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 1542 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1543 v2.AddArg(y) 1544 v1.AddArg(v2) 1545 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1546 v3.AddArg(x) 1547 v1.AddArg(v3) 1548 v.AddArg(v1) 1549 return true 1550 } 1551 } 1552 func rewriteValueMIPS64_OpGeq32(v *Value, config *Config) bool { 1553 b := v.Block 1554 _ = b 1555 // match: (Geq32 x y) 1556 // cond: 1557 // result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 y) (SignExt32to64 x))) 1558 for { 1559 x := v.Args[0] 1560 y := v.Args[1] 1561 v.reset(OpMIPS64XOR) 1562 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1563 v0.AuxInt = 1 1564 v.AddArg(v0) 1565 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 1566 v2 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1567 v2.AddArg(y) 1568 v1.AddArg(v2) 1569 v3 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1570 v3.AddArg(x) 1571 v1.AddArg(v3) 1572 v.AddArg(v1) 1573 return true 1574 } 1575 } 1576 func rewriteValueMIPS64_OpGeq32F(v *Value, config *Config) bool { 1577 b := v.Block 1578 _ = b 1579 // match: (Geq32F x y) 1580 // cond: 1581 // result: (FPFlagTrue (CMPGEF x y)) 1582 for { 1583 x := v.Args[0] 1584 y := v.Args[1] 1585 v.reset(OpMIPS64FPFlagTrue) 1586 v0 := b.NewValue0(v.Line, OpMIPS64CMPGEF, TypeFlags) 1587 v0.AddArg(x) 1588 v0.AddArg(y) 1589 v.AddArg(v0) 1590 return true 1591 } 1592 } 1593 func rewriteValueMIPS64_OpGeq32U(v *Value, config *Config) bool { 1594 b := v.Block 1595 _ = b 1596 // match: (Geq32U x y) 1597 // cond: 1598 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x))) 1599 for { 1600 x := v.Args[0] 1601 y := v.Args[1] 1602 v.reset(OpMIPS64XOR) 1603 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1604 v0.AuxInt = 1 1605 v.AddArg(v0) 1606 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 1607 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1608 v2.AddArg(y) 1609 v1.AddArg(v2) 1610 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1611 v3.AddArg(x) 1612 v1.AddArg(v3) 1613 v.AddArg(v1) 1614 return true 1615 } 1616 } 1617 func rewriteValueMIPS64_OpGeq64(v *Value, config *Config) bool { 1618 b := v.Block 1619 _ = b 1620 // match: (Geq64 x y) 1621 // cond: 1622 // result: (XOR (MOVVconst [1]) (SGT y x)) 1623 for { 1624 x := v.Args[0] 1625 y := v.Args[1] 1626 v.reset(OpMIPS64XOR) 1627 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1628 v0.AuxInt = 1 1629 v.AddArg(v0) 1630 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 1631 v1.AddArg(y) 1632 v1.AddArg(x) 1633 v.AddArg(v1) 1634 return true 1635 } 1636 } 1637 func rewriteValueMIPS64_OpGeq64F(v *Value, config *Config) bool { 1638 b := v.Block 1639 _ = b 1640 // match: (Geq64F x y) 1641 // cond: 1642 // result: (FPFlagTrue (CMPGED x y)) 1643 for { 1644 x := v.Args[0] 1645 y := v.Args[1] 1646 v.reset(OpMIPS64FPFlagTrue) 1647 v0 := b.NewValue0(v.Line, OpMIPS64CMPGED, TypeFlags) 1648 v0.AddArg(x) 1649 v0.AddArg(y) 1650 v.AddArg(v0) 1651 return true 1652 } 1653 } 1654 func rewriteValueMIPS64_OpGeq64U(v *Value, config *Config) bool { 1655 b := v.Block 1656 _ = b 1657 // match: (Geq64U x y) 1658 // cond: 1659 // result: (XOR (MOVVconst [1]) (SGTU y x)) 1660 for { 1661 x := v.Args[0] 1662 y := v.Args[1] 1663 v.reset(OpMIPS64XOR) 1664 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1665 v0.AuxInt = 1 1666 v.AddArg(v0) 1667 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 1668 v1.AddArg(y) 1669 v1.AddArg(x) 1670 v.AddArg(v1) 1671 return true 1672 } 1673 } 1674 func rewriteValueMIPS64_OpGeq8(v *Value, config *Config) bool { 1675 b := v.Block 1676 _ = b 1677 // match: (Geq8 x y) 1678 // cond: 1679 // result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 y) (SignExt8to64 x))) 1680 for { 1681 x := v.Args[0] 1682 y := v.Args[1] 1683 v.reset(OpMIPS64XOR) 1684 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1685 v0.AuxInt = 1 1686 v.AddArg(v0) 1687 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 1688 v2 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1689 v2.AddArg(y) 1690 v1.AddArg(v2) 1691 v3 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1692 v3.AddArg(x) 1693 v1.AddArg(v3) 1694 v.AddArg(v1) 1695 return true 1696 } 1697 } 1698 func rewriteValueMIPS64_OpGeq8U(v *Value, config *Config) bool { 1699 b := v.Block 1700 _ = b 1701 // match: (Geq8U x y) 1702 // cond: 1703 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x))) 1704 for { 1705 x := v.Args[0] 1706 y := v.Args[1] 1707 v.reset(OpMIPS64XOR) 1708 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 1709 v0.AuxInt = 1 1710 v.AddArg(v0) 1711 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 1712 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1713 v2.AddArg(y) 1714 v1.AddArg(v2) 1715 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1716 v3.AddArg(x) 1717 v1.AddArg(v3) 1718 v.AddArg(v1) 1719 return true 1720 } 1721 } 1722 func rewriteValueMIPS64_OpGetClosurePtr(v *Value, config *Config) bool { 1723 b := v.Block 1724 _ = b 1725 // match: (GetClosurePtr) 1726 // cond: 1727 // result: (LoweredGetClosurePtr) 1728 for { 1729 v.reset(OpMIPS64LoweredGetClosurePtr) 1730 return true 1731 } 1732 } 1733 func rewriteValueMIPS64_OpGoCall(v *Value, config *Config) bool { 1734 b := v.Block 1735 _ = b 1736 // match: (GoCall [argwid] mem) 1737 // cond: 1738 // result: (CALLgo [argwid] mem) 1739 for { 1740 argwid := v.AuxInt 1741 mem := v.Args[0] 1742 v.reset(OpMIPS64CALLgo) 1743 v.AuxInt = argwid 1744 v.AddArg(mem) 1745 return true 1746 } 1747 } 1748 func rewriteValueMIPS64_OpGreater16(v *Value, config *Config) bool { 1749 b := v.Block 1750 _ = b 1751 // match: (Greater16 x y) 1752 // cond: 1753 // result: (SGT (SignExt16to64 x) (SignExt16to64 y)) 1754 for { 1755 x := v.Args[0] 1756 y := v.Args[1] 1757 v.reset(OpMIPS64SGT) 1758 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1759 v0.AddArg(x) 1760 v.AddArg(v0) 1761 v1 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1762 v1.AddArg(y) 1763 v.AddArg(v1) 1764 return true 1765 } 1766 } 1767 func rewriteValueMIPS64_OpGreater16U(v *Value, config *Config) bool { 1768 b := v.Block 1769 _ = b 1770 // match: (Greater16U x y) 1771 // cond: 1772 // result: (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y)) 1773 for { 1774 x := v.Args[0] 1775 y := v.Args[1] 1776 v.reset(OpMIPS64SGTU) 1777 v0 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1778 v0.AddArg(x) 1779 v.AddArg(v0) 1780 v1 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1781 v1.AddArg(y) 1782 v.AddArg(v1) 1783 return true 1784 } 1785 } 1786 func rewriteValueMIPS64_OpGreater32(v *Value, config *Config) bool { 1787 b := v.Block 1788 _ = b 1789 // match: (Greater32 x y) 1790 // cond: 1791 // result: (SGT (SignExt32to64 x) (SignExt32to64 y)) 1792 for { 1793 x := v.Args[0] 1794 y := v.Args[1] 1795 v.reset(OpMIPS64SGT) 1796 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1797 v0.AddArg(x) 1798 v.AddArg(v0) 1799 v1 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1800 v1.AddArg(y) 1801 v.AddArg(v1) 1802 return true 1803 } 1804 } 1805 func rewriteValueMIPS64_OpGreater32F(v *Value, config *Config) bool { 1806 b := v.Block 1807 _ = b 1808 // match: (Greater32F x y) 1809 // cond: 1810 // result: (FPFlagTrue (CMPGTF x y)) 1811 for { 1812 x := v.Args[0] 1813 y := v.Args[1] 1814 v.reset(OpMIPS64FPFlagTrue) 1815 v0 := b.NewValue0(v.Line, OpMIPS64CMPGTF, TypeFlags) 1816 v0.AddArg(x) 1817 v0.AddArg(y) 1818 v.AddArg(v0) 1819 return true 1820 } 1821 } 1822 func rewriteValueMIPS64_OpGreater32U(v *Value, config *Config) bool { 1823 b := v.Block 1824 _ = b 1825 // match: (Greater32U x y) 1826 // cond: 1827 // result: (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y)) 1828 for { 1829 x := v.Args[0] 1830 y := v.Args[1] 1831 v.reset(OpMIPS64SGTU) 1832 v0 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1833 v0.AddArg(x) 1834 v.AddArg(v0) 1835 v1 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 1836 v1.AddArg(y) 1837 v.AddArg(v1) 1838 return true 1839 } 1840 } 1841 func rewriteValueMIPS64_OpGreater64(v *Value, config *Config) bool { 1842 b := v.Block 1843 _ = b 1844 // match: (Greater64 x y) 1845 // cond: 1846 // result: (SGT x y) 1847 for { 1848 x := v.Args[0] 1849 y := v.Args[1] 1850 v.reset(OpMIPS64SGT) 1851 v.AddArg(x) 1852 v.AddArg(y) 1853 return true 1854 } 1855 } 1856 func rewriteValueMIPS64_OpGreater64F(v *Value, config *Config) bool { 1857 b := v.Block 1858 _ = b 1859 // match: (Greater64F x y) 1860 // cond: 1861 // result: (FPFlagTrue (CMPGTD x y)) 1862 for { 1863 x := v.Args[0] 1864 y := v.Args[1] 1865 v.reset(OpMIPS64FPFlagTrue) 1866 v0 := b.NewValue0(v.Line, OpMIPS64CMPGTD, TypeFlags) 1867 v0.AddArg(x) 1868 v0.AddArg(y) 1869 v.AddArg(v0) 1870 return true 1871 } 1872 } 1873 func rewriteValueMIPS64_OpGreater64U(v *Value, config *Config) bool { 1874 b := v.Block 1875 _ = b 1876 // match: (Greater64U x y) 1877 // cond: 1878 // result: (SGTU x y) 1879 for { 1880 x := v.Args[0] 1881 y := v.Args[1] 1882 v.reset(OpMIPS64SGTU) 1883 v.AddArg(x) 1884 v.AddArg(y) 1885 return true 1886 } 1887 } 1888 func rewriteValueMIPS64_OpGreater8(v *Value, config *Config) bool { 1889 b := v.Block 1890 _ = b 1891 // match: (Greater8 x y) 1892 // cond: 1893 // result: (SGT (SignExt8to64 x) (SignExt8to64 y)) 1894 for { 1895 x := v.Args[0] 1896 y := v.Args[1] 1897 v.reset(OpMIPS64SGT) 1898 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1899 v0.AddArg(x) 1900 v.AddArg(v0) 1901 v1 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 1902 v1.AddArg(y) 1903 v.AddArg(v1) 1904 return true 1905 } 1906 } 1907 func rewriteValueMIPS64_OpGreater8U(v *Value, config *Config) bool { 1908 b := v.Block 1909 _ = b 1910 // match: (Greater8U x y) 1911 // cond: 1912 // result: (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y)) 1913 for { 1914 x := v.Args[0] 1915 y := v.Args[1] 1916 v.reset(OpMIPS64SGTU) 1917 v0 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1918 v0.AddArg(x) 1919 v.AddArg(v0) 1920 v1 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 1921 v1.AddArg(y) 1922 v.AddArg(v1) 1923 return true 1924 } 1925 } 1926 func rewriteValueMIPS64_OpHmul16(v *Value, config *Config) bool { 1927 b := v.Block 1928 _ = b 1929 // match: (Hmul16 x y) 1930 // cond: 1931 // result: (SRAVconst (Select1 <config.fe.TypeInt32()> (MULV (SignExt16to64 x) (SignExt16to64 y))) [16]) 1932 for { 1933 x := v.Args[0] 1934 y := v.Args[1] 1935 v.reset(OpMIPS64SRAVconst) 1936 v.AuxInt = 16 1937 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeInt32()) 1938 v1 := b.NewValue0(v.Line, OpMIPS64MULV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1939 v2 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1940 v2.AddArg(x) 1941 v1.AddArg(v2) 1942 v3 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 1943 v3.AddArg(y) 1944 v1.AddArg(v3) 1945 v0.AddArg(v1) 1946 v.AddArg(v0) 1947 return true 1948 } 1949 } 1950 func rewriteValueMIPS64_OpHmul16u(v *Value, config *Config) bool { 1951 b := v.Block 1952 _ = b 1953 // match: (Hmul16u x y) 1954 // cond: 1955 // result: (SRLVconst (Select1 <config.fe.TypeUInt32()> (MULVU (ZeroExt16to64 x) (ZeroExt16to64 y))) [16]) 1956 for { 1957 x := v.Args[0] 1958 y := v.Args[1] 1959 v.reset(OpMIPS64SRLVconst) 1960 v.AuxInt = 16 1961 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeUInt32()) 1962 v1 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 1963 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1964 v2.AddArg(x) 1965 v1.AddArg(v2) 1966 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 1967 v3.AddArg(y) 1968 v1.AddArg(v3) 1969 v0.AddArg(v1) 1970 v.AddArg(v0) 1971 return true 1972 } 1973 } 1974 func rewriteValueMIPS64_OpHmul32(v *Value, config *Config) bool { 1975 b := v.Block 1976 _ = b 1977 // match: (Hmul32 x y) 1978 // cond: 1979 // result: (SRAVconst (Select1 <config.fe.TypeInt64()> (MULV (SignExt32to64 x) (SignExt32to64 y))) [32]) 1980 for { 1981 x := v.Args[0] 1982 y := v.Args[1] 1983 v.reset(OpMIPS64SRAVconst) 1984 v.AuxInt = 32 1985 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeInt64()) 1986 v1 := b.NewValue0(v.Line, OpMIPS64MULV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 1987 v2 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1988 v2.AddArg(x) 1989 v1.AddArg(v2) 1990 v3 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 1991 v3.AddArg(y) 1992 v1.AddArg(v3) 1993 v0.AddArg(v1) 1994 v.AddArg(v0) 1995 return true 1996 } 1997 } 1998 func rewriteValueMIPS64_OpHmul32u(v *Value, config *Config) bool { 1999 b := v.Block 2000 _ = b 2001 // match: (Hmul32u x y) 2002 // cond: 2003 // result: (SRLVconst (Select1 <config.fe.TypeUInt64()> (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32]) 2004 for { 2005 x := v.Args[0] 2006 y := v.Args[1] 2007 v.reset(OpMIPS64SRLVconst) 2008 v.AuxInt = 32 2009 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeUInt64()) 2010 v1 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 2011 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2012 v2.AddArg(x) 2013 v1.AddArg(v2) 2014 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2015 v3.AddArg(y) 2016 v1.AddArg(v3) 2017 v0.AddArg(v1) 2018 v.AddArg(v0) 2019 return true 2020 } 2021 } 2022 func rewriteValueMIPS64_OpHmul64(v *Value, config *Config) bool { 2023 b := v.Block 2024 _ = b 2025 // match: (Hmul64 x y) 2026 // cond: 2027 // result: (Select0 (MULV x y)) 2028 for { 2029 x := v.Args[0] 2030 y := v.Args[1] 2031 v.reset(OpSelect0) 2032 v0 := b.NewValue0(v.Line, OpMIPS64MULV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 2033 v0.AddArg(x) 2034 v0.AddArg(y) 2035 v.AddArg(v0) 2036 return true 2037 } 2038 } 2039 func rewriteValueMIPS64_OpHmul64u(v *Value, config *Config) bool { 2040 b := v.Block 2041 _ = b 2042 // match: (Hmul64u x y) 2043 // cond: 2044 // result: (Select0 (MULVU x y)) 2045 for { 2046 x := v.Args[0] 2047 y := v.Args[1] 2048 v.reset(OpSelect0) 2049 v0 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 2050 v0.AddArg(x) 2051 v0.AddArg(y) 2052 v.AddArg(v0) 2053 return true 2054 } 2055 } 2056 func rewriteValueMIPS64_OpHmul8(v *Value, config *Config) bool { 2057 b := v.Block 2058 _ = b 2059 // match: (Hmul8 x y) 2060 // cond: 2061 // result: (SRAVconst (Select1 <config.fe.TypeInt16()> (MULV (SignExt8to64 x) (SignExt8to64 y))) [8]) 2062 for { 2063 x := v.Args[0] 2064 y := v.Args[1] 2065 v.reset(OpMIPS64SRAVconst) 2066 v.AuxInt = 8 2067 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeInt16()) 2068 v1 := b.NewValue0(v.Line, OpMIPS64MULV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 2069 v2 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2070 v2.AddArg(x) 2071 v1.AddArg(v2) 2072 v3 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2073 v3.AddArg(y) 2074 v1.AddArg(v3) 2075 v0.AddArg(v1) 2076 v.AddArg(v0) 2077 return true 2078 } 2079 } 2080 func rewriteValueMIPS64_OpHmul8u(v *Value, config *Config) bool { 2081 b := v.Block 2082 _ = b 2083 // match: (Hmul8u x y) 2084 // cond: 2085 // result: (SRLVconst (Select1 <config.fe.TypeUInt16()> (MULVU (ZeroExt8to64 x) (ZeroExt8to64 y))) [8]) 2086 for { 2087 x := v.Args[0] 2088 y := v.Args[1] 2089 v.reset(OpMIPS64SRLVconst) 2090 v.AuxInt = 8 2091 v0 := b.NewValue0(v.Line, OpSelect1, config.fe.TypeUInt16()) 2092 v1 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 2093 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2094 v2.AddArg(x) 2095 v1.AddArg(v2) 2096 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2097 v3.AddArg(y) 2098 v1.AddArg(v3) 2099 v0.AddArg(v1) 2100 v.AddArg(v0) 2101 return true 2102 } 2103 } 2104 func rewriteValueMIPS64_OpInterCall(v *Value, config *Config) bool { 2105 b := v.Block 2106 _ = b 2107 // match: (InterCall [argwid] entry mem) 2108 // cond: 2109 // result: (CALLinter [argwid] entry mem) 2110 for { 2111 argwid := v.AuxInt 2112 entry := v.Args[0] 2113 mem := v.Args[1] 2114 v.reset(OpMIPS64CALLinter) 2115 v.AuxInt = argwid 2116 v.AddArg(entry) 2117 v.AddArg(mem) 2118 return true 2119 } 2120 } 2121 func rewriteValueMIPS64_OpIsInBounds(v *Value, config *Config) bool { 2122 b := v.Block 2123 _ = b 2124 // match: (IsInBounds idx len) 2125 // cond: 2126 // result: (SGTU len idx) 2127 for { 2128 idx := v.Args[0] 2129 len := v.Args[1] 2130 v.reset(OpMIPS64SGTU) 2131 v.AddArg(len) 2132 v.AddArg(idx) 2133 return true 2134 } 2135 } 2136 func rewriteValueMIPS64_OpIsNonNil(v *Value, config *Config) bool { 2137 b := v.Block 2138 _ = b 2139 // match: (IsNonNil ptr) 2140 // cond: 2141 // result: (SGTU ptr (MOVVconst [0])) 2142 for { 2143 ptr := v.Args[0] 2144 v.reset(OpMIPS64SGTU) 2145 v.AddArg(ptr) 2146 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2147 v0.AuxInt = 0 2148 v.AddArg(v0) 2149 return true 2150 } 2151 } 2152 func rewriteValueMIPS64_OpIsSliceInBounds(v *Value, config *Config) bool { 2153 b := v.Block 2154 _ = b 2155 // match: (IsSliceInBounds idx len) 2156 // cond: 2157 // result: (XOR (MOVVconst [1]) (SGTU idx len)) 2158 for { 2159 idx := v.Args[0] 2160 len := v.Args[1] 2161 v.reset(OpMIPS64XOR) 2162 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2163 v0.AuxInt = 1 2164 v.AddArg(v0) 2165 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2166 v1.AddArg(idx) 2167 v1.AddArg(len) 2168 v.AddArg(v1) 2169 return true 2170 } 2171 } 2172 func rewriteValueMIPS64_OpLeq16(v *Value, config *Config) bool { 2173 b := v.Block 2174 _ = b 2175 // match: (Leq16 x y) 2176 // cond: 2177 // result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 x) (SignExt16to64 y))) 2178 for { 2179 x := v.Args[0] 2180 y := v.Args[1] 2181 v.reset(OpMIPS64XOR) 2182 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2183 v0.AuxInt = 1 2184 v.AddArg(v0) 2185 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 2186 v2 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 2187 v2.AddArg(x) 2188 v1.AddArg(v2) 2189 v3 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 2190 v3.AddArg(y) 2191 v1.AddArg(v3) 2192 v.AddArg(v1) 2193 return true 2194 } 2195 } 2196 func rewriteValueMIPS64_OpLeq16U(v *Value, config *Config) bool { 2197 b := v.Block 2198 _ = b 2199 // match: (Leq16U x y) 2200 // cond: 2201 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y))) 2202 for { 2203 x := v.Args[0] 2204 y := v.Args[1] 2205 v.reset(OpMIPS64XOR) 2206 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2207 v0.AuxInt = 1 2208 v.AddArg(v0) 2209 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2210 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2211 v2.AddArg(x) 2212 v1.AddArg(v2) 2213 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2214 v3.AddArg(y) 2215 v1.AddArg(v3) 2216 v.AddArg(v1) 2217 return true 2218 } 2219 } 2220 func rewriteValueMIPS64_OpLeq32(v *Value, config *Config) bool { 2221 b := v.Block 2222 _ = b 2223 // match: (Leq32 x y) 2224 // cond: 2225 // result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 x) (SignExt32to64 y))) 2226 for { 2227 x := v.Args[0] 2228 y := v.Args[1] 2229 v.reset(OpMIPS64XOR) 2230 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2231 v0.AuxInt = 1 2232 v.AddArg(v0) 2233 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 2234 v2 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 2235 v2.AddArg(x) 2236 v1.AddArg(v2) 2237 v3 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 2238 v3.AddArg(y) 2239 v1.AddArg(v3) 2240 v.AddArg(v1) 2241 return true 2242 } 2243 } 2244 func rewriteValueMIPS64_OpLeq32F(v *Value, config *Config) bool { 2245 b := v.Block 2246 _ = b 2247 // match: (Leq32F x y) 2248 // cond: 2249 // result: (FPFlagTrue (CMPGEF y x)) 2250 for { 2251 x := v.Args[0] 2252 y := v.Args[1] 2253 v.reset(OpMIPS64FPFlagTrue) 2254 v0 := b.NewValue0(v.Line, OpMIPS64CMPGEF, TypeFlags) 2255 v0.AddArg(y) 2256 v0.AddArg(x) 2257 v.AddArg(v0) 2258 return true 2259 } 2260 } 2261 func rewriteValueMIPS64_OpLeq32U(v *Value, config *Config) bool { 2262 b := v.Block 2263 _ = b 2264 // match: (Leq32U x y) 2265 // cond: 2266 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y))) 2267 for { 2268 x := v.Args[0] 2269 y := v.Args[1] 2270 v.reset(OpMIPS64XOR) 2271 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2272 v0.AuxInt = 1 2273 v.AddArg(v0) 2274 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2275 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2276 v2.AddArg(x) 2277 v1.AddArg(v2) 2278 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2279 v3.AddArg(y) 2280 v1.AddArg(v3) 2281 v.AddArg(v1) 2282 return true 2283 } 2284 } 2285 func rewriteValueMIPS64_OpLeq64(v *Value, config *Config) bool { 2286 b := v.Block 2287 _ = b 2288 // match: (Leq64 x y) 2289 // cond: 2290 // result: (XOR (MOVVconst [1]) (SGT x y)) 2291 for { 2292 x := v.Args[0] 2293 y := v.Args[1] 2294 v.reset(OpMIPS64XOR) 2295 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2296 v0.AuxInt = 1 2297 v.AddArg(v0) 2298 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 2299 v1.AddArg(x) 2300 v1.AddArg(y) 2301 v.AddArg(v1) 2302 return true 2303 } 2304 } 2305 func rewriteValueMIPS64_OpLeq64F(v *Value, config *Config) bool { 2306 b := v.Block 2307 _ = b 2308 // match: (Leq64F x y) 2309 // cond: 2310 // result: (FPFlagTrue (CMPGED y x)) 2311 for { 2312 x := v.Args[0] 2313 y := v.Args[1] 2314 v.reset(OpMIPS64FPFlagTrue) 2315 v0 := b.NewValue0(v.Line, OpMIPS64CMPGED, TypeFlags) 2316 v0.AddArg(y) 2317 v0.AddArg(x) 2318 v.AddArg(v0) 2319 return true 2320 } 2321 } 2322 func rewriteValueMIPS64_OpLeq64U(v *Value, config *Config) bool { 2323 b := v.Block 2324 _ = b 2325 // match: (Leq64U x y) 2326 // cond: 2327 // result: (XOR (MOVVconst [1]) (SGTU x y)) 2328 for { 2329 x := v.Args[0] 2330 y := v.Args[1] 2331 v.reset(OpMIPS64XOR) 2332 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2333 v0.AuxInt = 1 2334 v.AddArg(v0) 2335 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2336 v1.AddArg(x) 2337 v1.AddArg(y) 2338 v.AddArg(v1) 2339 return true 2340 } 2341 } 2342 func rewriteValueMIPS64_OpLeq8(v *Value, config *Config) bool { 2343 b := v.Block 2344 _ = b 2345 // match: (Leq8 x y) 2346 // cond: 2347 // result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 x) (SignExt8to64 y))) 2348 for { 2349 x := v.Args[0] 2350 y := v.Args[1] 2351 v.reset(OpMIPS64XOR) 2352 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2353 v0.AuxInt = 1 2354 v.AddArg(v0) 2355 v1 := b.NewValue0(v.Line, OpMIPS64SGT, config.fe.TypeBool()) 2356 v2 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2357 v2.AddArg(x) 2358 v1.AddArg(v2) 2359 v3 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2360 v3.AddArg(y) 2361 v1.AddArg(v3) 2362 v.AddArg(v1) 2363 return true 2364 } 2365 } 2366 func rewriteValueMIPS64_OpLeq8U(v *Value, config *Config) bool { 2367 b := v.Block 2368 _ = b 2369 // match: (Leq8U x y) 2370 // cond: 2371 // result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y))) 2372 for { 2373 x := v.Args[0] 2374 y := v.Args[1] 2375 v.reset(OpMIPS64XOR) 2376 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 2377 v0.AuxInt = 1 2378 v.AddArg(v0) 2379 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2380 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2381 v2.AddArg(x) 2382 v1.AddArg(v2) 2383 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2384 v3.AddArg(y) 2385 v1.AddArg(v3) 2386 v.AddArg(v1) 2387 return true 2388 } 2389 } 2390 func rewriteValueMIPS64_OpLess16(v *Value, config *Config) bool { 2391 b := v.Block 2392 _ = b 2393 // match: (Less16 x y) 2394 // cond: 2395 // result: (SGT (SignExt16to64 y) (SignExt16to64 x)) 2396 for { 2397 x := v.Args[0] 2398 y := v.Args[1] 2399 v.reset(OpMIPS64SGT) 2400 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 2401 v0.AddArg(y) 2402 v.AddArg(v0) 2403 v1 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 2404 v1.AddArg(x) 2405 v.AddArg(v1) 2406 return true 2407 } 2408 } 2409 func rewriteValueMIPS64_OpLess16U(v *Value, config *Config) bool { 2410 b := v.Block 2411 _ = b 2412 // match: (Less16U x y) 2413 // cond: 2414 // result: (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x)) 2415 for { 2416 x := v.Args[0] 2417 y := v.Args[1] 2418 v.reset(OpMIPS64SGTU) 2419 v0 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2420 v0.AddArg(y) 2421 v.AddArg(v0) 2422 v1 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2423 v1.AddArg(x) 2424 v.AddArg(v1) 2425 return true 2426 } 2427 } 2428 func rewriteValueMIPS64_OpLess32(v *Value, config *Config) bool { 2429 b := v.Block 2430 _ = b 2431 // match: (Less32 x y) 2432 // cond: 2433 // result: (SGT (SignExt32to64 y) (SignExt32to64 x)) 2434 for { 2435 x := v.Args[0] 2436 y := v.Args[1] 2437 v.reset(OpMIPS64SGT) 2438 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 2439 v0.AddArg(y) 2440 v.AddArg(v0) 2441 v1 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 2442 v1.AddArg(x) 2443 v.AddArg(v1) 2444 return true 2445 } 2446 } 2447 func rewriteValueMIPS64_OpLess32F(v *Value, config *Config) bool { 2448 b := v.Block 2449 _ = b 2450 // match: (Less32F x y) 2451 // cond: 2452 // result: (FPFlagTrue (CMPGTF y x)) 2453 for { 2454 x := v.Args[0] 2455 y := v.Args[1] 2456 v.reset(OpMIPS64FPFlagTrue) 2457 v0 := b.NewValue0(v.Line, OpMIPS64CMPGTF, TypeFlags) 2458 v0.AddArg(y) 2459 v0.AddArg(x) 2460 v.AddArg(v0) 2461 return true 2462 } 2463 } 2464 func rewriteValueMIPS64_OpLess32U(v *Value, config *Config) bool { 2465 b := v.Block 2466 _ = b 2467 // match: (Less32U x y) 2468 // cond: 2469 // result: (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x)) 2470 for { 2471 x := v.Args[0] 2472 y := v.Args[1] 2473 v.reset(OpMIPS64SGTU) 2474 v0 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2475 v0.AddArg(y) 2476 v.AddArg(v0) 2477 v1 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2478 v1.AddArg(x) 2479 v.AddArg(v1) 2480 return true 2481 } 2482 } 2483 func rewriteValueMIPS64_OpLess64(v *Value, config *Config) bool { 2484 b := v.Block 2485 _ = b 2486 // match: (Less64 x y) 2487 // cond: 2488 // result: (SGT y x) 2489 for { 2490 x := v.Args[0] 2491 y := v.Args[1] 2492 v.reset(OpMIPS64SGT) 2493 v.AddArg(y) 2494 v.AddArg(x) 2495 return true 2496 } 2497 } 2498 func rewriteValueMIPS64_OpLess64F(v *Value, config *Config) bool { 2499 b := v.Block 2500 _ = b 2501 // match: (Less64F x y) 2502 // cond: 2503 // result: (FPFlagTrue (CMPGTD y x)) 2504 for { 2505 x := v.Args[0] 2506 y := v.Args[1] 2507 v.reset(OpMIPS64FPFlagTrue) 2508 v0 := b.NewValue0(v.Line, OpMIPS64CMPGTD, TypeFlags) 2509 v0.AddArg(y) 2510 v0.AddArg(x) 2511 v.AddArg(v0) 2512 return true 2513 } 2514 } 2515 func rewriteValueMIPS64_OpLess64U(v *Value, config *Config) bool { 2516 b := v.Block 2517 _ = b 2518 // match: (Less64U x y) 2519 // cond: 2520 // result: (SGTU y x) 2521 for { 2522 x := v.Args[0] 2523 y := v.Args[1] 2524 v.reset(OpMIPS64SGTU) 2525 v.AddArg(y) 2526 v.AddArg(x) 2527 return true 2528 } 2529 } 2530 func rewriteValueMIPS64_OpLess8(v *Value, config *Config) bool { 2531 b := v.Block 2532 _ = b 2533 // match: (Less8 x y) 2534 // cond: 2535 // result: (SGT (SignExt8to64 y) (SignExt8to64 x)) 2536 for { 2537 x := v.Args[0] 2538 y := v.Args[1] 2539 v.reset(OpMIPS64SGT) 2540 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2541 v0.AddArg(y) 2542 v.AddArg(v0) 2543 v1 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 2544 v1.AddArg(x) 2545 v.AddArg(v1) 2546 return true 2547 } 2548 } 2549 func rewriteValueMIPS64_OpLess8U(v *Value, config *Config) bool { 2550 b := v.Block 2551 _ = b 2552 // match: (Less8U x y) 2553 // cond: 2554 // result: (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x)) 2555 for { 2556 x := v.Args[0] 2557 y := v.Args[1] 2558 v.reset(OpMIPS64SGTU) 2559 v0 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2560 v0.AddArg(y) 2561 v.AddArg(v0) 2562 v1 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2563 v1.AddArg(x) 2564 v.AddArg(v1) 2565 return true 2566 } 2567 } 2568 func rewriteValueMIPS64_OpLoad(v *Value, config *Config) bool { 2569 b := v.Block 2570 _ = b 2571 // match: (Load <t> ptr mem) 2572 // cond: t.IsBoolean() 2573 // result: (MOVBUload ptr mem) 2574 for { 2575 t := v.Type 2576 ptr := v.Args[0] 2577 mem := v.Args[1] 2578 if !(t.IsBoolean()) { 2579 break 2580 } 2581 v.reset(OpMIPS64MOVBUload) 2582 v.AddArg(ptr) 2583 v.AddArg(mem) 2584 return true 2585 } 2586 // match: (Load <t> ptr mem) 2587 // cond: (is8BitInt(t) && isSigned(t)) 2588 // result: (MOVBload ptr mem) 2589 for { 2590 t := v.Type 2591 ptr := v.Args[0] 2592 mem := v.Args[1] 2593 if !(is8BitInt(t) && isSigned(t)) { 2594 break 2595 } 2596 v.reset(OpMIPS64MOVBload) 2597 v.AddArg(ptr) 2598 v.AddArg(mem) 2599 return true 2600 } 2601 // match: (Load <t> ptr mem) 2602 // cond: (is8BitInt(t) && !isSigned(t)) 2603 // result: (MOVBUload ptr mem) 2604 for { 2605 t := v.Type 2606 ptr := v.Args[0] 2607 mem := v.Args[1] 2608 if !(is8BitInt(t) && !isSigned(t)) { 2609 break 2610 } 2611 v.reset(OpMIPS64MOVBUload) 2612 v.AddArg(ptr) 2613 v.AddArg(mem) 2614 return true 2615 } 2616 // match: (Load <t> ptr mem) 2617 // cond: (is16BitInt(t) && isSigned(t)) 2618 // result: (MOVHload ptr mem) 2619 for { 2620 t := v.Type 2621 ptr := v.Args[0] 2622 mem := v.Args[1] 2623 if !(is16BitInt(t) && isSigned(t)) { 2624 break 2625 } 2626 v.reset(OpMIPS64MOVHload) 2627 v.AddArg(ptr) 2628 v.AddArg(mem) 2629 return true 2630 } 2631 // match: (Load <t> ptr mem) 2632 // cond: (is16BitInt(t) && !isSigned(t)) 2633 // result: (MOVHUload ptr mem) 2634 for { 2635 t := v.Type 2636 ptr := v.Args[0] 2637 mem := v.Args[1] 2638 if !(is16BitInt(t) && !isSigned(t)) { 2639 break 2640 } 2641 v.reset(OpMIPS64MOVHUload) 2642 v.AddArg(ptr) 2643 v.AddArg(mem) 2644 return true 2645 } 2646 // match: (Load <t> ptr mem) 2647 // cond: (is32BitInt(t) && isSigned(t)) 2648 // result: (MOVWload ptr mem) 2649 for { 2650 t := v.Type 2651 ptr := v.Args[0] 2652 mem := v.Args[1] 2653 if !(is32BitInt(t) && isSigned(t)) { 2654 break 2655 } 2656 v.reset(OpMIPS64MOVWload) 2657 v.AddArg(ptr) 2658 v.AddArg(mem) 2659 return true 2660 } 2661 // match: (Load <t> ptr mem) 2662 // cond: (is32BitInt(t) && !isSigned(t)) 2663 // result: (MOVWUload ptr mem) 2664 for { 2665 t := v.Type 2666 ptr := v.Args[0] 2667 mem := v.Args[1] 2668 if !(is32BitInt(t) && !isSigned(t)) { 2669 break 2670 } 2671 v.reset(OpMIPS64MOVWUload) 2672 v.AddArg(ptr) 2673 v.AddArg(mem) 2674 return true 2675 } 2676 // match: (Load <t> ptr mem) 2677 // cond: (is64BitInt(t) || isPtr(t)) 2678 // result: (MOVVload ptr mem) 2679 for { 2680 t := v.Type 2681 ptr := v.Args[0] 2682 mem := v.Args[1] 2683 if !(is64BitInt(t) || isPtr(t)) { 2684 break 2685 } 2686 v.reset(OpMIPS64MOVVload) 2687 v.AddArg(ptr) 2688 v.AddArg(mem) 2689 return true 2690 } 2691 // match: (Load <t> ptr mem) 2692 // cond: is32BitFloat(t) 2693 // result: (MOVFload ptr mem) 2694 for { 2695 t := v.Type 2696 ptr := v.Args[0] 2697 mem := v.Args[1] 2698 if !(is32BitFloat(t)) { 2699 break 2700 } 2701 v.reset(OpMIPS64MOVFload) 2702 v.AddArg(ptr) 2703 v.AddArg(mem) 2704 return true 2705 } 2706 // match: (Load <t> ptr mem) 2707 // cond: is64BitFloat(t) 2708 // result: (MOVDload ptr mem) 2709 for { 2710 t := v.Type 2711 ptr := v.Args[0] 2712 mem := v.Args[1] 2713 if !(is64BitFloat(t)) { 2714 break 2715 } 2716 v.reset(OpMIPS64MOVDload) 2717 v.AddArg(ptr) 2718 v.AddArg(mem) 2719 return true 2720 } 2721 return false 2722 } 2723 func rewriteValueMIPS64_OpLsh16x16(v *Value, config *Config) bool { 2724 b := v.Block 2725 _ = b 2726 // match: (Lsh16x16 <t> x y) 2727 // cond: 2728 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y))) 2729 for { 2730 t := v.Type 2731 x := v.Args[0] 2732 y := v.Args[1] 2733 v.reset(OpMIPS64AND) 2734 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2735 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2736 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2737 v2.AuxInt = 64 2738 v1.AddArg(v2) 2739 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2740 v3.AddArg(y) 2741 v1.AddArg(v3) 2742 v0.AddArg(v1) 2743 v.AddArg(v0) 2744 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2745 v4.AddArg(x) 2746 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2747 v5.AddArg(y) 2748 v4.AddArg(v5) 2749 v.AddArg(v4) 2750 return true 2751 } 2752 } 2753 func rewriteValueMIPS64_OpLsh16x32(v *Value, config *Config) bool { 2754 b := v.Block 2755 _ = b 2756 // match: (Lsh16x32 <t> x y) 2757 // cond: 2758 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y))) 2759 for { 2760 t := v.Type 2761 x := v.Args[0] 2762 y := v.Args[1] 2763 v.reset(OpMIPS64AND) 2764 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2765 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2766 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2767 v2.AuxInt = 64 2768 v1.AddArg(v2) 2769 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2770 v3.AddArg(y) 2771 v1.AddArg(v3) 2772 v0.AddArg(v1) 2773 v.AddArg(v0) 2774 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2775 v4.AddArg(x) 2776 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2777 v5.AddArg(y) 2778 v4.AddArg(v5) 2779 v.AddArg(v4) 2780 return true 2781 } 2782 } 2783 func rewriteValueMIPS64_OpLsh16x64(v *Value, config *Config) bool { 2784 b := v.Block 2785 _ = b 2786 // match: (Lsh16x64 <t> x y) 2787 // cond: 2788 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SLLV <t> x y)) 2789 for { 2790 t := v.Type 2791 x := v.Args[0] 2792 y := v.Args[1] 2793 v.reset(OpMIPS64AND) 2794 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2795 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2796 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2797 v2.AuxInt = 64 2798 v1.AddArg(v2) 2799 v1.AddArg(y) 2800 v0.AddArg(v1) 2801 v.AddArg(v0) 2802 v3 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2803 v3.AddArg(x) 2804 v3.AddArg(y) 2805 v.AddArg(v3) 2806 return true 2807 } 2808 } 2809 func rewriteValueMIPS64_OpLsh16x8(v *Value, config *Config) bool { 2810 b := v.Block 2811 _ = b 2812 // match: (Lsh16x8 <t> x y) 2813 // cond: 2814 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y))) 2815 for { 2816 t := v.Type 2817 x := v.Args[0] 2818 y := v.Args[1] 2819 v.reset(OpMIPS64AND) 2820 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2821 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2822 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2823 v2.AuxInt = 64 2824 v1.AddArg(v2) 2825 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2826 v3.AddArg(y) 2827 v1.AddArg(v3) 2828 v0.AddArg(v1) 2829 v.AddArg(v0) 2830 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2831 v4.AddArg(x) 2832 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2833 v5.AddArg(y) 2834 v4.AddArg(v5) 2835 v.AddArg(v4) 2836 return true 2837 } 2838 } 2839 func rewriteValueMIPS64_OpLsh32x16(v *Value, config *Config) bool { 2840 b := v.Block 2841 _ = b 2842 // match: (Lsh32x16 <t> x y) 2843 // cond: 2844 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y))) 2845 for { 2846 t := v.Type 2847 x := v.Args[0] 2848 y := v.Args[1] 2849 v.reset(OpMIPS64AND) 2850 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2851 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2852 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2853 v2.AuxInt = 64 2854 v1.AddArg(v2) 2855 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2856 v3.AddArg(y) 2857 v1.AddArg(v3) 2858 v0.AddArg(v1) 2859 v.AddArg(v0) 2860 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2861 v4.AddArg(x) 2862 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2863 v5.AddArg(y) 2864 v4.AddArg(v5) 2865 v.AddArg(v4) 2866 return true 2867 } 2868 } 2869 func rewriteValueMIPS64_OpLsh32x32(v *Value, config *Config) bool { 2870 b := v.Block 2871 _ = b 2872 // match: (Lsh32x32 <t> x y) 2873 // cond: 2874 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y))) 2875 for { 2876 t := v.Type 2877 x := v.Args[0] 2878 y := v.Args[1] 2879 v.reset(OpMIPS64AND) 2880 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2881 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2882 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2883 v2.AuxInt = 64 2884 v1.AddArg(v2) 2885 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2886 v3.AddArg(y) 2887 v1.AddArg(v3) 2888 v0.AddArg(v1) 2889 v.AddArg(v0) 2890 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2891 v4.AddArg(x) 2892 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 2893 v5.AddArg(y) 2894 v4.AddArg(v5) 2895 v.AddArg(v4) 2896 return true 2897 } 2898 } 2899 func rewriteValueMIPS64_OpLsh32x64(v *Value, config *Config) bool { 2900 b := v.Block 2901 _ = b 2902 // match: (Lsh32x64 <t> x y) 2903 // cond: 2904 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SLLV <t> x y)) 2905 for { 2906 t := v.Type 2907 x := v.Args[0] 2908 y := v.Args[1] 2909 v.reset(OpMIPS64AND) 2910 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2911 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2912 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2913 v2.AuxInt = 64 2914 v1.AddArg(v2) 2915 v1.AddArg(y) 2916 v0.AddArg(v1) 2917 v.AddArg(v0) 2918 v3 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2919 v3.AddArg(x) 2920 v3.AddArg(y) 2921 v.AddArg(v3) 2922 return true 2923 } 2924 } 2925 func rewriteValueMIPS64_OpLsh32x8(v *Value, config *Config) bool { 2926 b := v.Block 2927 _ = b 2928 // match: (Lsh32x8 <t> x y) 2929 // cond: 2930 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y))) 2931 for { 2932 t := v.Type 2933 x := v.Args[0] 2934 y := v.Args[1] 2935 v.reset(OpMIPS64AND) 2936 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2937 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2938 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2939 v2.AuxInt = 64 2940 v1.AddArg(v2) 2941 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2942 v3.AddArg(y) 2943 v1.AddArg(v3) 2944 v0.AddArg(v1) 2945 v.AddArg(v0) 2946 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2947 v4.AddArg(x) 2948 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 2949 v5.AddArg(y) 2950 v4.AddArg(v5) 2951 v.AddArg(v4) 2952 return true 2953 } 2954 } 2955 func rewriteValueMIPS64_OpLsh64x16(v *Value, config *Config) bool { 2956 b := v.Block 2957 _ = b 2958 // match: (Lsh64x16 <t> x y) 2959 // cond: 2960 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y))) 2961 for { 2962 t := v.Type 2963 x := v.Args[0] 2964 y := v.Args[1] 2965 v.reset(OpMIPS64AND) 2966 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2967 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2968 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2969 v2.AuxInt = 64 2970 v1.AddArg(v2) 2971 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2972 v3.AddArg(y) 2973 v1.AddArg(v3) 2974 v0.AddArg(v1) 2975 v.AddArg(v0) 2976 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 2977 v4.AddArg(x) 2978 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 2979 v5.AddArg(y) 2980 v4.AddArg(v5) 2981 v.AddArg(v4) 2982 return true 2983 } 2984 } 2985 func rewriteValueMIPS64_OpLsh64x32(v *Value, config *Config) bool { 2986 b := v.Block 2987 _ = b 2988 // match: (Lsh64x32 <t> x y) 2989 // cond: 2990 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y))) 2991 for { 2992 t := v.Type 2993 x := v.Args[0] 2994 y := v.Args[1] 2995 v.reset(OpMIPS64AND) 2996 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 2997 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 2998 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 2999 v2.AuxInt = 64 3000 v1.AddArg(v2) 3001 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 3002 v3.AddArg(y) 3003 v1.AddArg(v3) 3004 v0.AddArg(v1) 3005 v.AddArg(v0) 3006 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3007 v4.AddArg(x) 3008 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 3009 v5.AddArg(y) 3010 v4.AddArg(v5) 3011 v.AddArg(v4) 3012 return true 3013 } 3014 } 3015 func rewriteValueMIPS64_OpLsh64x64(v *Value, config *Config) bool { 3016 b := v.Block 3017 _ = b 3018 // match: (Lsh64x64 <t> x y) 3019 // cond: 3020 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SLLV <t> x y)) 3021 for { 3022 t := v.Type 3023 x := v.Args[0] 3024 y := v.Args[1] 3025 v.reset(OpMIPS64AND) 3026 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3027 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3028 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3029 v2.AuxInt = 64 3030 v1.AddArg(v2) 3031 v1.AddArg(y) 3032 v0.AddArg(v1) 3033 v.AddArg(v0) 3034 v3 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3035 v3.AddArg(x) 3036 v3.AddArg(y) 3037 v.AddArg(v3) 3038 return true 3039 } 3040 } 3041 func rewriteValueMIPS64_OpLsh64x8(v *Value, config *Config) bool { 3042 b := v.Block 3043 _ = b 3044 // match: (Lsh64x8 <t> x y) 3045 // cond: 3046 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y))) 3047 for { 3048 t := v.Type 3049 x := v.Args[0] 3050 y := v.Args[1] 3051 v.reset(OpMIPS64AND) 3052 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3053 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3054 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3055 v2.AuxInt = 64 3056 v1.AddArg(v2) 3057 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 3058 v3.AddArg(y) 3059 v1.AddArg(v3) 3060 v0.AddArg(v1) 3061 v.AddArg(v0) 3062 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3063 v4.AddArg(x) 3064 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 3065 v5.AddArg(y) 3066 v4.AddArg(v5) 3067 v.AddArg(v4) 3068 return true 3069 } 3070 } 3071 func rewriteValueMIPS64_OpLsh8x16(v *Value, config *Config) bool { 3072 b := v.Block 3073 _ = b 3074 // match: (Lsh8x16 <t> x y) 3075 // cond: 3076 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y))) 3077 for { 3078 t := v.Type 3079 x := v.Args[0] 3080 y := v.Args[1] 3081 v.reset(OpMIPS64AND) 3082 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3083 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3084 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3085 v2.AuxInt = 64 3086 v1.AddArg(v2) 3087 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 3088 v3.AddArg(y) 3089 v1.AddArg(v3) 3090 v0.AddArg(v1) 3091 v.AddArg(v0) 3092 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3093 v4.AddArg(x) 3094 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 3095 v5.AddArg(y) 3096 v4.AddArg(v5) 3097 v.AddArg(v4) 3098 return true 3099 } 3100 } 3101 func rewriteValueMIPS64_OpLsh8x32(v *Value, config *Config) bool { 3102 b := v.Block 3103 _ = b 3104 // match: (Lsh8x32 <t> x y) 3105 // cond: 3106 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y))) 3107 for { 3108 t := v.Type 3109 x := v.Args[0] 3110 y := v.Args[1] 3111 v.reset(OpMIPS64AND) 3112 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3113 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3114 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3115 v2.AuxInt = 64 3116 v1.AddArg(v2) 3117 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 3118 v3.AddArg(y) 3119 v1.AddArg(v3) 3120 v0.AddArg(v1) 3121 v.AddArg(v0) 3122 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3123 v4.AddArg(x) 3124 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 3125 v5.AddArg(y) 3126 v4.AddArg(v5) 3127 v.AddArg(v4) 3128 return true 3129 } 3130 } 3131 func rewriteValueMIPS64_OpLsh8x64(v *Value, config *Config) bool { 3132 b := v.Block 3133 _ = b 3134 // match: (Lsh8x64 <t> x y) 3135 // cond: 3136 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SLLV <t> x y)) 3137 for { 3138 t := v.Type 3139 x := v.Args[0] 3140 y := v.Args[1] 3141 v.reset(OpMIPS64AND) 3142 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3143 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3144 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3145 v2.AuxInt = 64 3146 v1.AddArg(v2) 3147 v1.AddArg(y) 3148 v0.AddArg(v1) 3149 v.AddArg(v0) 3150 v3 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3151 v3.AddArg(x) 3152 v3.AddArg(y) 3153 v.AddArg(v3) 3154 return true 3155 } 3156 } 3157 func rewriteValueMIPS64_OpLsh8x8(v *Value, config *Config) bool { 3158 b := v.Block 3159 _ = b 3160 // match: (Lsh8x8 <t> x y) 3161 // cond: 3162 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y))) 3163 for { 3164 t := v.Type 3165 x := v.Args[0] 3166 y := v.Args[1] 3167 v.reset(OpMIPS64AND) 3168 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 3169 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 3170 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 3171 v2.AuxInt = 64 3172 v1.AddArg(v2) 3173 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 3174 v3.AddArg(y) 3175 v1.AddArg(v3) 3176 v0.AddArg(v1) 3177 v.AddArg(v0) 3178 v4 := b.NewValue0(v.Line, OpMIPS64SLLV, t) 3179 v4.AddArg(x) 3180 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 3181 v5.AddArg(y) 3182 v4.AddArg(v5) 3183 v.AddArg(v4) 3184 return true 3185 } 3186 } 3187 func rewriteValueMIPS64_OpMIPS64ADDV(v *Value, config *Config) bool { 3188 b := v.Block 3189 _ = b 3190 // match: (ADDV (MOVVconst [c]) x) 3191 // cond: is32Bit(c) 3192 // result: (ADDVconst [c] x) 3193 for { 3194 v_0 := v.Args[0] 3195 if v_0.Op != OpMIPS64MOVVconst { 3196 break 3197 } 3198 c := v_0.AuxInt 3199 x := v.Args[1] 3200 if !(is32Bit(c)) { 3201 break 3202 } 3203 v.reset(OpMIPS64ADDVconst) 3204 v.AuxInt = c 3205 v.AddArg(x) 3206 return true 3207 } 3208 // match: (ADDV x (MOVVconst [c])) 3209 // cond: is32Bit(c) 3210 // result: (ADDVconst [c] x) 3211 for { 3212 x := v.Args[0] 3213 v_1 := v.Args[1] 3214 if v_1.Op != OpMIPS64MOVVconst { 3215 break 3216 } 3217 c := v_1.AuxInt 3218 if !(is32Bit(c)) { 3219 break 3220 } 3221 v.reset(OpMIPS64ADDVconst) 3222 v.AuxInt = c 3223 v.AddArg(x) 3224 return true 3225 } 3226 // match: (ADDV x (NEGV y)) 3227 // cond: 3228 // result: (SUBV x y) 3229 for { 3230 x := v.Args[0] 3231 v_1 := v.Args[1] 3232 if v_1.Op != OpMIPS64NEGV { 3233 break 3234 } 3235 y := v_1.Args[0] 3236 v.reset(OpMIPS64SUBV) 3237 v.AddArg(x) 3238 v.AddArg(y) 3239 return true 3240 } 3241 // match: (ADDV (NEGV y) x) 3242 // cond: 3243 // result: (SUBV x y) 3244 for { 3245 v_0 := v.Args[0] 3246 if v_0.Op != OpMIPS64NEGV { 3247 break 3248 } 3249 y := v_0.Args[0] 3250 x := v.Args[1] 3251 v.reset(OpMIPS64SUBV) 3252 v.AddArg(x) 3253 v.AddArg(y) 3254 return true 3255 } 3256 return false 3257 } 3258 func rewriteValueMIPS64_OpMIPS64ADDVconst(v *Value, config *Config) bool { 3259 b := v.Block 3260 _ = b 3261 // match: (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) 3262 // cond: 3263 // result: (MOVVaddr [off1+off2] {sym} ptr) 3264 for { 3265 off1 := v.AuxInt 3266 v_0 := v.Args[0] 3267 if v_0.Op != OpMIPS64MOVVaddr { 3268 break 3269 } 3270 off2 := v_0.AuxInt 3271 sym := v_0.Aux 3272 ptr := v_0.Args[0] 3273 v.reset(OpMIPS64MOVVaddr) 3274 v.AuxInt = off1 + off2 3275 v.Aux = sym 3276 v.AddArg(ptr) 3277 return true 3278 } 3279 // match: (ADDVconst [0] x) 3280 // cond: 3281 // result: x 3282 for { 3283 if v.AuxInt != 0 { 3284 break 3285 } 3286 x := v.Args[0] 3287 v.reset(OpCopy) 3288 v.Type = x.Type 3289 v.AddArg(x) 3290 return true 3291 } 3292 // match: (ADDVconst [c] (MOVVconst [d])) 3293 // cond: 3294 // result: (MOVVconst [c+d]) 3295 for { 3296 c := v.AuxInt 3297 v_0 := v.Args[0] 3298 if v_0.Op != OpMIPS64MOVVconst { 3299 break 3300 } 3301 d := v_0.AuxInt 3302 v.reset(OpMIPS64MOVVconst) 3303 v.AuxInt = c + d 3304 return true 3305 } 3306 // match: (ADDVconst [c] (ADDVconst [d] x)) 3307 // cond: is32Bit(c+d) 3308 // result: (ADDVconst [c+d] x) 3309 for { 3310 c := v.AuxInt 3311 v_0 := v.Args[0] 3312 if v_0.Op != OpMIPS64ADDVconst { 3313 break 3314 } 3315 d := v_0.AuxInt 3316 x := v_0.Args[0] 3317 if !(is32Bit(c + d)) { 3318 break 3319 } 3320 v.reset(OpMIPS64ADDVconst) 3321 v.AuxInt = c + d 3322 v.AddArg(x) 3323 return true 3324 } 3325 // match: (ADDVconst [c] (SUBVconst [d] x)) 3326 // cond: is32Bit(c-d) 3327 // result: (ADDVconst [c-d] x) 3328 for { 3329 c := v.AuxInt 3330 v_0 := v.Args[0] 3331 if v_0.Op != OpMIPS64SUBVconst { 3332 break 3333 } 3334 d := v_0.AuxInt 3335 x := v_0.Args[0] 3336 if !(is32Bit(c - d)) { 3337 break 3338 } 3339 v.reset(OpMIPS64ADDVconst) 3340 v.AuxInt = c - d 3341 v.AddArg(x) 3342 return true 3343 } 3344 return false 3345 } 3346 func rewriteValueMIPS64_OpMIPS64AND(v *Value, config *Config) bool { 3347 b := v.Block 3348 _ = b 3349 // match: (AND (MOVVconst [c]) x) 3350 // cond: is32Bit(c) 3351 // result: (ANDconst [c] x) 3352 for { 3353 v_0 := v.Args[0] 3354 if v_0.Op != OpMIPS64MOVVconst { 3355 break 3356 } 3357 c := v_0.AuxInt 3358 x := v.Args[1] 3359 if !(is32Bit(c)) { 3360 break 3361 } 3362 v.reset(OpMIPS64ANDconst) 3363 v.AuxInt = c 3364 v.AddArg(x) 3365 return true 3366 } 3367 // match: (AND x (MOVVconst [c])) 3368 // cond: is32Bit(c) 3369 // result: (ANDconst [c] x) 3370 for { 3371 x := v.Args[0] 3372 v_1 := v.Args[1] 3373 if v_1.Op != OpMIPS64MOVVconst { 3374 break 3375 } 3376 c := v_1.AuxInt 3377 if !(is32Bit(c)) { 3378 break 3379 } 3380 v.reset(OpMIPS64ANDconst) 3381 v.AuxInt = c 3382 v.AddArg(x) 3383 return true 3384 } 3385 // match: (AND x x) 3386 // cond: 3387 // result: x 3388 for { 3389 x := v.Args[0] 3390 if x != v.Args[1] { 3391 break 3392 } 3393 v.reset(OpCopy) 3394 v.Type = x.Type 3395 v.AddArg(x) 3396 return true 3397 } 3398 return false 3399 } 3400 func rewriteValueMIPS64_OpMIPS64ANDconst(v *Value, config *Config) bool { 3401 b := v.Block 3402 _ = b 3403 // match: (ANDconst [0] _) 3404 // cond: 3405 // result: (MOVVconst [0]) 3406 for { 3407 if v.AuxInt != 0 { 3408 break 3409 } 3410 v.reset(OpMIPS64MOVVconst) 3411 v.AuxInt = 0 3412 return true 3413 } 3414 // match: (ANDconst [-1] x) 3415 // cond: 3416 // result: x 3417 for { 3418 if v.AuxInt != -1 { 3419 break 3420 } 3421 x := v.Args[0] 3422 v.reset(OpCopy) 3423 v.Type = x.Type 3424 v.AddArg(x) 3425 return true 3426 } 3427 // match: (ANDconst [c] (MOVVconst [d])) 3428 // cond: 3429 // result: (MOVVconst [c&d]) 3430 for { 3431 c := v.AuxInt 3432 v_0 := v.Args[0] 3433 if v_0.Op != OpMIPS64MOVVconst { 3434 break 3435 } 3436 d := v_0.AuxInt 3437 v.reset(OpMIPS64MOVVconst) 3438 v.AuxInt = c & d 3439 return true 3440 } 3441 // match: (ANDconst [c] (ANDconst [d] x)) 3442 // cond: 3443 // result: (ANDconst [c&d] x) 3444 for { 3445 c := v.AuxInt 3446 v_0 := v.Args[0] 3447 if v_0.Op != OpMIPS64ANDconst { 3448 break 3449 } 3450 d := v_0.AuxInt 3451 x := v_0.Args[0] 3452 v.reset(OpMIPS64ANDconst) 3453 v.AuxInt = c & d 3454 v.AddArg(x) 3455 return true 3456 } 3457 return false 3458 } 3459 func rewriteValueMIPS64_OpMIPS64MOVBUload(v *Value, config *Config) bool { 3460 b := v.Block 3461 _ = b 3462 // match: (MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem) 3463 // cond: is32Bit(off1+off2) 3464 // result: (MOVBUload [off1+off2] {sym} ptr mem) 3465 for { 3466 off1 := v.AuxInt 3467 sym := v.Aux 3468 v_0 := v.Args[0] 3469 if v_0.Op != OpMIPS64ADDVconst { 3470 break 3471 } 3472 off2 := v_0.AuxInt 3473 ptr := v_0.Args[0] 3474 mem := v.Args[1] 3475 if !(is32Bit(off1 + off2)) { 3476 break 3477 } 3478 v.reset(OpMIPS64MOVBUload) 3479 v.AuxInt = off1 + off2 3480 v.Aux = sym 3481 v.AddArg(ptr) 3482 v.AddArg(mem) 3483 return true 3484 } 3485 // match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 3486 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3487 // result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 3488 for { 3489 off1 := v.AuxInt 3490 sym1 := v.Aux 3491 v_0 := v.Args[0] 3492 if v_0.Op != OpMIPS64MOVVaddr { 3493 break 3494 } 3495 off2 := v_0.AuxInt 3496 sym2 := v_0.Aux 3497 ptr := v_0.Args[0] 3498 mem := v.Args[1] 3499 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3500 break 3501 } 3502 v.reset(OpMIPS64MOVBUload) 3503 v.AuxInt = off1 + off2 3504 v.Aux = mergeSym(sym1, sym2) 3505 v.AddArg(ptr) 3506 v.AddArg(mem) 3507 return true 3508 } 3509 return false 3510 } 3511 func rewriteValueMIPS64_OpMIPS64MOVBUreg(v *Value, config *Config) bool { 3512 b := v.Block 3513 _ = b 3514 // match: (MOVBUreg x:(MOVBUload _ _)) 3515 // cond: 3516 // result: (MOVVreg x) 3517 for { 3518 x := v.Args[0] 3519 if x.Op != OpMIPS64MOVBUload { 3520 break 3521 } 3522 v.reset(OpMIPS64MOVVreg) 3523 v.AddArg(x) 3524 return true 3525 } 3526 // match: (MOVBUreg x:(MOVBUreg _)) 3527 // cond: 3528 // result: (MOVVreg x) 3529 for { 3530 x := v.Args[0] 3531 if x.Op != OpMIPS64MOVBUreg { 3532 break 3533 } 3534 v.reset(OpMIPS64MOVVreg) 3535 v.AddArg(x) 3536 return true 3537 } 3538 // match: (MOVBUreg (MOVVconst [c])) 3539 // cond: 3540 // result: (MOVVconst [int64(uint8(c))]) 3541 for { 3542 v_0 := v.Args[0] 3543 if v_0.Op != OpMIPS64MOVVconst { 3544 break 3545 } 3546 c := v_0.AuxInt 3547 v.reset(OpMIPS64MOVVconst) 3548 v.AuxInt = int64(uint8(c)) 3549 return true 3550 } 3551 return false 3552 } 3553 func rewriteValueMIPS64_OpMIPS64MOVBload(v *Value, config *Config) bool { 3554 b := v.Block 3555 _ = b 3556 // match: (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) 3557 // cond: is32Bit(off1+off2) 3558 // result: (MOVBload [off1+off2] {sym} ptr mem) 3559 for { 3560 off1 := v.AuxInt 3561 sym := v.Aux 3562 v_0 := v.Args[0] 3563 if v_0.Op != OpMIPS64ADDVconst { 3564 break 3565 } 3566 off2 := v_0.AuxInt 3567 ptr := v_0.Args[0] 3568 mem := v.Args[1] 3569 if !(is32Bit(off1 + off2)) { 3570 break 3571 } 3572 v.reset(OpMIPS64MOVBload) 3573 v.AuxInt = off1 + off2 3574 v.Aux = sym 3575 v.AddArg(ptr) 3576 v.AddArg(mem) 3577 return true 3578 } 3579 // match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 3580 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3581 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 3582 for { 3583 off1 := v.AuxInt 3584 sym1 := v.Aux 3585 v_0 := v.Args[0] 3586 if v_0.Op != OpMIPS64MOVVaddr { 3587 break 3588 } 3589 off2 := v_0.AuxInt 3590 sym2 := v_0.Aux 3591 ptr := v_0.Args[0] 3592 mem := v.Args[1] 3593 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3594 break 3595 } 3596 v.reset(OpMIPS64MOVBload) 3597 v.AuxInt = off1 + off2 3598 v.Aux = mergeSym(sym1, sym2) 3599 v.AddArg(ptr) 3600 v.AddArg(mem) 3601 return true 3602 } 3603 return false 3604 } 3605 func rewriteValueMIPS64_OpMIPS64MOVBreg(v *Value, config *Config) bool { 3606 b := v.Block 3607 _ = b 3608 // match: (MOVBreg x:(MOVBload _ _)) 3609 // cond: 3610 // result: (MOVVreg x) 3611 for { 3612 x := v.Args[0] 3613 if x.Op != OpMIPS64MOVBload { 3614 break 3615 } 3616 v.reset(OpMIPS64MOVVreg) 3617 v.AddArg(x) 3618 return true 3619 } 3620 // match: (MOVBreg x:(MOVBreg _)) 3621 // cond: 3622 // result: (MOVVreg x) 3623 for { 3624 x := v.Args[0] 3625 if x.Op != OpMIPS64MOVBreg { 3626 break 3627 } 3628 v.reset(OpMIPS64MOVVreg) 3629 v.AddArg(x) 3630 return true 3631 } 3632 // match: (MOVBreg (MOVVconst [c])) 3633 // cond: 3634 // result: (MOVVconst [int64(int8(c))]) 3635 for { 3636 v_0 := v.Args[0] 3637 if v_0.Op != OpMIPS64MOVVconst { 3638 break 3639 } 3640 c := v_0.AuxInt 3641 v.reset(OpMIPS64MOVVconst) 3642 v.AuxInt = int64(int8(c)) 3643 return true 3644 } 3645 return false 3646 } 3647 func rewriteValueMIPS64_OpMIPS64MOVBstore(v *Value, config *Config) bool { 3648 b := v.Block 3649 _ = b 3650 // match: (MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 3651 // cond: is32Bit(off1+off2) 3652 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 3653 for { 3654 off1 := v.AuxInt 3655 sym := v.Aux 3656 v_0 := v.Args[0] 3657 if v_0.Op != OpMIPS64ADDVconst { 3658 break 3659 } 3660 off2 := v_0.AuxInt 3661 ptr := v_0.Args[0] 3662 val := v.Args[1] 3663 mem := v.Args[2] 3664 if !(is32Bit(off1 + off2)) { 3665 break 3666 } 3667 v.reset(OpMIPS64MOVBstore) 3668 v.AuxInt = off1 + off2 3669 v.Aux = sym 3670 v.AddArg(ptr) 3671 v.AddArg(val) 3672 v.AddArg(mem) 3673 return true 3674 } 3675 // match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 3676 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3677 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 3678 for { 3679 off1 := v.AuxInt 3680 sym1 := v.Aux 3681 v_0 := v.Args[0] 3682 if v_0.Op != OpMIPS64MOVVaddr { 3683 break 3684 } 3685 off2 := v_0.AuxInt 3686 sym2 := v_0.Aux 3687 ptr := v_0.Args[0] 3688 val := v.Args[1] 3689 mem := v.Args[2] 3690 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3691 break 3692 } 3693 v.reset(OpMIPS64MOVBstore) 3694 v.AuxInt = off1 + off2 3695 v.Aux = mergeSym(sym1, sym2) 3696 v.AddArg(ptr) 3697 v.AddArg(val) 3698 v.AddArg(mem) 3699 return true 3700 } 3701 // match: (MOVBstore [off] {sym} ptr (MOVVconst [0]) mem) 3702 // cond: 3703 // result: (MOVBstorezero [off] {sym} ptr mem) 3704 for { 3705 off := v.AuxInt 3706 sym := v.Aux 3707 ptr := v.Args[0] 3708 v_1 := v.Args[1] 3709 if v_1.Op != OpMIPS64MOVVconst { 3710 break 3711 } 3712 if v_1.AuxInt != 0 { 3713 break 3714 } 3715 mem := v.Args[2] 3716 v.reset(OpMIPS64MOVBstorezero) 3717 v.AuxInt = off 3718 v.Aux = sym 3719 v.AddArg(ptr) 3720 v.AddArg(mem) 3721 return true 3722 } 3723 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 3724 // cond: 3725 // result: (MOVBstore [off] {sym} ptr x mem) 3726 for { 3727 off := v.AuxInt 3728 sym := v.Aux 3729 ptr := v.Args[0] 3730 v_1 := v.Args[1] 3731 if v_1.Op != OpMIPS64MOVBreg { 3732 break 3733 } 3734 x := v_1.Args[0] 3735 mem := v.Args[2] 3736 v.reset(OpMIPS64MOVBstore) 3737 v.AuxInt = off 3738 v.Aux = sym 3739 v.AddArg(ptr) 3740 v.AddArg(x) 3741 v.AddArg(mem) 3742 return true 3743 } 3744 // match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) 3745 // cond: 3746 // result: (MOVBstore [off] {sym} ptr x mem) 3747 for { 3748 off := v.AuxInt 3749 sym := v.Aux 3750 ptr := v.Args[0] 3751 v_1 := v.Args[1] 3752 if v_1.Op != OpMIPS64MOVBUreg { 3753 break 3754 } 3755 x := v_1.Args[0] 3756 mem := v.Args[2] 3757 v.reset(OpMIPS64MOVBstore) 3758 v.AuxInt = off 3759 v.Aux = sym 3760 v.AddArg(ptr) 3761 v.AddArg(x) 3762 v.AddArg(mem) 3763 return true 3764 } 3765 // match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem) 3766 // cond: 3767 // result: (MOVBstore [off] {sym} ptr x mem) 3768 for { 3769 off := v.AuxInt 3770 sym := v.Aux 3771 ptr := v.Args[0] 3772 v_1 := v.Args[1] 3773 if v_1.Op != OpMIPS64MOVHreg { 3774 break 3775 } 3776 x := v_1.Args[0] 3777 mem := v.Args[2] 3778 v.reset(OpMIPS64MOVBstore) 3779 v.AuxInt = off 3780 v.Aux = sym 3781 v.AddArg(ptr) 3782 v.AddArg(x) 3783 v.AddArg(mem) 3784 return true 3785 } 3786 // match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) 3787 // cond: 3788 // result: (MOVBstore [off] {sym} ptr x mem) 3789 for { 3790 off := v.AuxInt 3791 sym := v.Aux 3792 ptr := v.Args[0] 3793 v_1 := v.Args[1] 3794 if v_1.Op != OpMIPS64MOVHUreg { 3795 break 3796 } 3797 x := v_1.Args[0] 3798 mem := v.Args[2] 3799 v.reset(OpMIPS64MOVBstore) 3800 v.AuxInt = off 3801 v.Aux = sym 3802 v.AddArg(ptr) 3803 v.AddArg(x) 3804 v.AddArg(mem) 3805 return true 3806 } 3807 // match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem) 3808 // cond: 3809 // result: (MOVBstore [off] {sym} ptr x mem) 3810 for { 3811 off := v.AuxInt 3812 sym := v.Aux 3813 ptr := v.Args[0] 3814 v_1 := v.Args[1] 3815 if v_1.Op != OpMIPS64MOVWreg { 3816 break 3817 } 3818 x := v_1.Args[0] 3819 mem := v.Args[2] 3820 v.reset(OpMIPS64MOVBstore) 3821 v.AuxInt = off 3822 v.Aux = sym 3823 v.AddArg(ptr) 3824 v.AddArg(x) 3825 v.AddArg(mem) 3826 return true 3827 } 3828 // match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem) 3829 // cond: 3830 // result: (MOVBstore [off] {sym} ptr x mem) 3831 for { 3832 off := v.AuxInt 3833 sym := v.Aux 3834 ptr := v.Args[0] 3835 v_1 := v.Args[1] 3836 if v_1.Op != OpMIPS64MOVWUreg { 3837 break 3838 } 3839 x := v_1.Args[0] 3840 mem := v.Args[2] 3841 v.reset(OpMIPS64MOVBstore) 3842 v.AuxInt = off 3843 v.Aux = sym 3844 v.AddArg(ptr) 3845 v.AddArg(x) 3846 v.AddArg(mem) 3847 return true 3848 } 3849 return false 3850 } 3851 func rewriteValueMIPS64_OpMIPS64MOVBstorezero(v *Value, config *Config) bool { 3852 b := v.Block 3853 _ = b 3854 // match: (MOVBstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) 3855 // cond: is32Bit(off1+off2) 3856 // result: (MOVBstorezero [off1+off2] {sym} ptr mem) 3857 for { 3858 off1 := v.AuxInt 3859 sym := v.Aux 3860 v_0 := v.Args[0] 3861 if v_0.Op != OpMIPS64ADDVconst { 3862 break 3863 } 3864 off2 := v_0.AuxInt 3865 ptr := v_0.Args[0] 3866 mem := v.Args[1] 3867 if !(is32Bit(off1 + off2)) { 3868 break 3869 } 3870 v.reset(OpMIPS64MOVBstorezero) 3871 v.AuxInt = off1 + off2 3872 v.Aux = sym 3873 v.AddArg(ptr) 3874 v.AddArg(mem) 3875 return true 3876 } 3877 // match: (MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 3878 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3879 // result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 3880 for { 3881 off1 := v.AuxInt 3882 sym1 := v.Aux 3883 v_0 := v.Args[0] 3884 if v_0.Op != OpMIPS64MOVVaddr { 3885 break 3886 } 3887 off2 := v_0.AuxInt 3888 sym2 := v_0.Aux 3889 ptr := v_0.Args[0] 3890 mem := v.Args[1] 3891 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3892 break 3893 } 3894 v.reset(OpMIPS64MOVBstorezero) 3895 v.AuxInt = off1 + off2 3896 v.Aux = mergeSym(sym1, sym2) 3897 v.AddArg(ptr) 3898 v.AddArg(mem) 3899 return true 3900 } 3901 return false 3902 } 3903 func rewriteValueMIPS64_OpMIPS64MOVDload(v *Value, config *Config) bool { 3904 b := v.Block 3905 _ = b 3906 // match: (MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem) 3907 // cond: is32Bit(off1+off2) 3908 // result: (MOVDload [off1+off2] {sym} ptr mem) 3909 for { 3910 off1 := v.AuxInt 3911 sym := v.Aux 3912 v_0 := v.Args[0] 3913 if v_0.Op != OpMIPS64ADDVconst { 3914 break 3915 } 3916 off2 := v_0.AuxInt 3917 ptr := v_0.Args[0] 3918 mem := v.Args[1] 3919 if !(is32Bit(off1 + off2)) { 3920 break 3921 } 3922 v.reset(OpMIPS64MOVDload) 3923 v.AuxInt = off1 + off2 3924 v.Aux = sym 3925 v.AddArg(ptr) 3926 v.AddArg(mem) 3927 return true 3928 } 3929 // match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 3930 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3931 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 3932 for { 3933 off1 := v.AuxInt 3934 sym1 := v.Aux 3935 v_0 := v.Args[0] 3936 if v_0.Op != OpMIPS64MOVVaddr { 3937 break 3938 } 3939 off2 := v_0.AuxInt 3940 sym2 := v_0.Aux 3941 ptr := v_0.Args[0] 3942 mem := v.Args[1] 3943 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3944 break 3945 } 3946 v.reset(OpMIPS64MOVDload) 3947 v.AuxInt = off1 + off2 3948 v.Aux = mergeSym(sym1, sym2) 3949 v.AddArg(ptr) 3950 v.AddArg(mem) 3951 return true 3952 } 3953 return false 3954 } 3955 func rewriteValueMIPS64_OpMIPS64MOVDstore(v *Value, config *Config) bool { 3956 b := v.Block 3957 _ = b 3958 // match: (MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 3959 // cond: is32Bit(off1+off2) 3960 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 3961 for { 3962 off1 := v.AuxInt 3963 sym := v.Aux 3964 v_0 := v.Args[0] 3965 if v_0.Op != OpMIPS64ADDVconst { 3966 break 3967 } 3968 off2 := v_0.AuxInt 3969 ptr := v_0.Args[0] 3970 val := v.Args[1] 3971 mem := v.Args[2] 3972 if !(is32Bit(off1 + off2)) { 3973 break 3974 } 3975 v.reset(OpMIPS64MOVDstore) 3976 v.AuxInt = off1 + off2 3977 v.Aux = sym 3978 v.AddArg(ptr) 3979 v.AddArg(val) 3980 v.AddArg(mem) 3981 return true 3982 } 3983 // match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 3984 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 3985 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 3986 for { 3987 off1 := v.AuxInt 3988 sym1 := v.Aux 3989 v_0 := v.Args[0] 3990 if v_0.Op != OpMIPS64MOVVaddr { 3991 break 3992 } 3993 off2 := v_0.AuxInt 3994 sym2 := v_0.Aux 3995 ptr := v_0.Args[0] 3996 val := v.Args[1] 3997 mem := v.Args[2] 3998 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 3999 break 4000 } 4001 v.reset(OpMIPS64MOVDstore) 4002 v.AuxInt = off1 + off2 4003 v.Aux = mergeSym(sym1, sym2) 4004 v.AddArg(ptr) 4005 v.AddArg(val) 4006 v.AddArg(mem) 4007 return true 4008 } 4009 return false 4010 } 4011 func rewriteValueMIPS64_OpMIPS64MOVFload(v *Value, config *Config) bool { 4012 b := v.Block 4013 _ = b 4014 // match: (MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem) 4015 // cond: is32Bit(off1+off2) 4016 // result: (MOVFload [off1+off2] {sym} ptr mem) 4017 for { 4018 off1 := v.AuxInt 4019 sym := v.Aux 4020 v_0 := v.Args[0] 4021 if v_0.Op != OpMIPS64ADDVconst { 4022 break 4023 } 4024 off2 := v_0.AuxInt 4025 ptr := v_0.Args[0] 4026 mem := v.Args[1] 4027 if !(is32Bit(off1 + off2)) { 4028 break 4029 } 4030 v.reset(OpMIPS64MOVFload) 4031 v.AuxInt = off1 + off2 4032 v.Aux = sym 4033 v.AddArg(ptr) 4034 v.AddArg(mem) 4035 return true 4036 } 4037 // match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4038 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4039 // result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4040 for { 4041 off1 := v.AuxInt 4042 sym1 := v.Aux 4043 v_0 := v.Args[0] 4044 if v_0.Op != OpMIPS64MOVVaddr { 4045 break 4046 } 4047 off2 := v_0.AuxInt 4048 sym2 := v_0.Aux 4049 ptr := v_0.Args[0] 4050 mem := v.Args[1] 4051 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4052 break 4053 } 4054 v.reset(OpMIPS64MOVFload) 4055 v.AuxInt = off1 + off2 4056 v.Aux = mergeSym(sym1, sym2) 4057 v.AddArg(ptr) 4058 v.AddArg(mem) 4059 return true 4060 } 4061 return false 4062 } 4063 func rewriteValueMIPS64_OpMIPS64MOVFstore(v *Value, config *Config) bool { 4064 b := v.Block 4065 _ = b 4066 // match: (MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 4067 // cond: is32Bit(off1+off2) 4068 // result: (MOVFstore [off1+off2] {sym} ptr val mem) 4069 for { 4070 off1 := v.AuxInt 4071 sym := v.Aux 4072 v_0 := v.Args[0] 4073 if v_0.Op != OpMIPS64ADDVconst { 4074 break 4075 } 4076 off2 := v_0.AuxInt 4077 ptr := v_0.Args[0] 4078 val := v.Args[1] 4079 mem := v.Args[2] 4080 if !(is32Bit(off1 + off2)) { 4081 break 4082 } 4083 v.reset(OpMIPS64MOVFstore) 4084 v.AuxInt = off1 + off2 4085 v.Aux = sym 4086 v.AddArg(ptr) 4087 v.AddArg(val) 4088 v.AddArg(mem) 4089 return true 4090 } 4091 // match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 4092 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4093 // result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 4094 for { 4095 off1 := v.AuxInt 4096 sym1 := v.Aux 4097 v_0 := v.Args[0] 4098 if v_0.Op != OpMIPS64MOVVaddr { 4099 break 4100 } 4101 off2 := v_0.AuxInt 4102 sym2 := v_0.Aux 4103 ptr := v_0.Args[0] 4104 val := v.Args[1] 4105 mem := v.Args[2] 4106 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4107 break 4108 } 4109 v.reset(OpMIPS64MOVFstore) 4110 v.AuxInt = off1 + off2 4111 v.Aux = mergeSym(sym1, sym2) 4112 v.AddArg(ptr) 4113 v.AddArg(val) 4114 v.AddArg(mem) 4115 return true 4116 } 4117 return false 4118 } 4119 func rewriteValueMIPS64_OpMIPS64MOVHUload(v *Value, config *Config) bool { 4120 b := v.Block 4121 _ = b 4122 // match: (MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem) 4123 // cond: is32Bit(off1+off2) 4124 // result: (MOVHUload [off1+off2] {sym} ptr mem) 4125 for { 4126 off1 := v.AuxInt 4127 sym := v.Aux 4128 v_0 := v.Args[0] 4129 if v_0.Op != OpMIPS64ADDVconst { 4130 break 4131 } 4132 off2 := v_0.AuxInt 4133 ptr := v_0.Args[0] 4134 mem := v.Args[1] 4135 if !(is32Bit(off1 + off2)) { 4136 break 4137 } 4138 v.reset(OpMIPS64MOVHUload) 4139 v.AuxInt = off1 + off2 4140 v.Aux = sym 4141 v.AddArg(ptr) 4142 v.AddArg(mem) 4143 return true 4144 } 4145 // match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4146 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4147 // result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4148 for { 4149 off1 := v.AuxInt 4150 sym1 := v.Aux 4151 v_0 := v.Args[0] 4152 if v_0.Op != OpMIPS64MOVVaddr { 4153 break 4154 } 4155 off2 := v_0.AuxInt 4156 sym2 := v_0.Aux 4157 ptr := v_0.Args[0] 4158 mem := v.Args[1] 4159 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4160 break 4161 } 4162 v.reset(OpMIPS64MOVHUload) 4163 v.AuxInt = off1 + off2 4164 v.Aux = mergeSym(sym1, sym2) 4165 v.AddArg(ptr) 4166 v.AddArg(mem) 4167 return true 4168 } 4169 return false 4170 } 4171 func rewriteValueMIPS64_OpMIPS64MOVHUreg(v *Value, config *Config) bool { 4172 b := v.Block 4173 _ = b 4174 // match: (MOVHUreg x:(MOVBUload _ _)) 4175 // cond: 4176 // result: (MOVVreg x) 4177 for { 4178 x := v.Args[0] 4179 if x.Op != OpMIPS64MOVBUload { 4180 break 4181 } 4182 v.reset(OpMIPS64MOVVreg) 4183 v.AddArg(x) 4184 return true 4185 } 4186 // match: (MOVHUreg x:(MOVHUload _ _)) 4187 // cond: 4188 // result: (MOVVreg x) 4189 for { 4190 x := v.Args[0] 4191 if x.Op != OpMIPS64MOVHUload { 4192 break 4193 } 4194 v.reset(OpMIPS64MOVVreg) 4195 v.AddArg(x) 4196 return true 4197 } 4198 // match: (MOVHUreg x:(MOVBUreg _)) 4199 // cond: 4200 // result: (MOVVreg x) 4201 for { 4202 x := v.Args[0] 4203 if x.Op != OpMIPS64MOVBUreg { 4204 break 4205 } 4206 v.reset(OpMIPS64MOVVreg) 4207 v.AddArg(x) 4208 return true 4209 } 4210 // match: (MOVHUreg x:(MOVHUreg _)) 4211 // cond: 4212 // result: (MOVVreg x) 4213 for { 4214 x := v.Args[0] 4215 if x.Op != OpMIPS64MOVHUreg { 4216 break 4217 } 4218 v.reset(OpMIPS64MOVVreg) 4219 v.AddArg(x) 4220 return true 4221 } 4222 // match: (MOVHUreg (MOVVconst [c])) 4223 // cond: 4224 // result: (MOVVconst [int64(uint16(c))]) 4225 for { 4226 v_0 := v.Args[0] 4227 if v_0.Op != OpMIPS64MOVVconst { 4228 break 4229 } 4230 c := v_0.AuxInt 4231 v.reset(OpMIPS64MOVVconst) 4232 v.AuxInt = int64(uint16(c)) 4233 return true 4234 } 4235 return false 4236 } 4237 func rewriteValueMIPS64_OpMIPS64MOVHload(v *Value, config *Config) bool { 4238 b := v.Block 4239 _ = b 4240 // match: (MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem) 4241 // cond: is32Bit(off1+off2) 4242 // result: (MOVHload [off1+off2] {sym} ptr mem) 4243 for { 4244 off1 := v.AuxInt 4245 sym := v.Aux 4246 v_0 := v.Args[0] 4247 if v_0.Op != OpMIPS64ADDVconst { 4248 break 4249 } 4250 off2 := v_0.AuxInt 4251 ptr := v_0.Args[0] 4252 mem := v.Args[1] 4253 if !(is32Bit(off1 + off2)) { 4254 break 4255 } 4256 v.reset(OpMIPS64MOVHload) 4257 v.AuxInt = off1 + off2 4258 v.Aux = sym 4259 v.AddArg(ptr) 4260 v.AddArg(mem) 4261 return true 4262 } 4263 // match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4264 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4265 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4266 for { 4267 off1 := v.AuxInt 4268 sym1 := v.Aux 4269 v_0 := v.Args[0] 4270 if v_0.Op != OpMIPS64MOVVaddr { 4271 break 4272 } 4273 off2 := v_0.AuxInt 4274 sym2 := v_0.Aux 4275 ptr := v_0.Args[0] 4276 mem := v.Args[1] 4277 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4278 break 4279 } 4280 v.reset(OpMIPS64MOVHload) 4281 v.AuxInt = off1 + off2 4282 v.Aux = mergeSym(sym1, sym2) 4283 v.AddArg(ptr) 4284 v.AddArg(mem) 4285 return true 4286 } 4287 return false 4288 } 4289 func rewriteValueMIPS64_OpMIPS64MOVHreg(v *Value, config *Config) bool { 4290 b := v.Block 4291 _ = b 4292 // match: (MOVHreg x:(MOVBload _ _)) 4293 // cond: 4294 // result: (MOVVreg x) 4295 for { 4296 x := v.Args[0] 4297 if x.Op != OpMIPS64MOVBload { 4298 break 4299 } 4300 v.reset(OpMIPS64MOVVreg) 4301 v.AddArg(x) 4302 return true 4303 } 4304 // match: (MOVHreg x:(MOVBUload _ _)) 4305 // cond: 4306 // result: (MOVVreg x) 4307 for { 4308 x := v.Args[0] 4309 if x.Op != OpMIPS64MOVBUload { 4310 break 4311 } 4312 v.reset(OpMIPS64MOVVreg) 4313 v.AddArg(x) 4314 return true 4315 } 4316 // match: (MOVHreg x:(MOVHload _ _)) 4317 // cond: 4318 // result: (MOVVreg x) 4319 for { 4320 x := v.Args[0] 4321 if x.Op != OpMIPS64MOVHload { 4322 break 4323 } 4324 v.reset(OpMIPS64MOVVreg) 4325 v.AddArg(x) 4326 return true 4327 } 4328 // match: (MOVHreg x:(MOVBreg _)) 4329 // cond: 4330 // result: (MOVVreg x) 4331 for { 4332 x := v.Args[0] 4333 if x.Op != OpMIPS64MOVBreg { 4334 break 4335 } 4336 v.reset(OpMIPS64MOVVreg) 4337 v.AddArg(x) 4338 return true 4339 } 4340 // match: (MOVHreg x:(MOVBUreg _)) 4341 // cond: 4342 // result: (MOVVreg x) 4343 for { 4344 x := v.Args[0] 4345 if x.Op != OpMIPS64MOVBUreg { 4346 break 4347 } 4348 v.reset(OpMIPS64MOVVreg) 4349 v.AddArg(x) 4350 return true 4351 } 4352 // match: (MOVHreg x:(MOVHreg _)) 4353 // cond: 4354 // result: (MOVVreg x) 4355 for { 4356 x := v.Args[0] 4357 if x.Op != OpMIPS64MOVHreg { 4358 break 4359 } 4360 v.reset(OpMIPS64MOVVreg) 4361 v.AddArg(x) 4362 return true 4363 } 4364 // match: (MOVHreg (MOVVconst [c])) 4365 // cond: 4366 // result: (MOVVconst [int64(int16(c))]) 4367 for { 4368 v_0 := v.Args[0] 4369 if v_0.Op != OpMIPS64MOVVconst { 4370 break 4371 } 4372 c := v_0.AuxInt 4373 v.reset(OpMIPS64MOVVconst) 4374 v.AuxInt = int64(int16(c)) 4375 return true 4376 } 4377 return false 4378 } 4379 func rewriteValueMIPS64_OpMIPS64MOVHstore(v *Value, config *Config) bool { 4380 b := v.Block 4381 _ = b 4382 // match: (MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 4383 // cond: is32Bit(off1+off2) 4384 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 4385 for { 4386 off1 := v.AuxInt 4387 sym := v.Aux 4388 v_0 := v.Args[0] 4389 if v_0.Op != OpMIPS64ADDVconst { 4390 break 4391 } 4392 off2 := v_0.AuxInt 4393 ptr := v_0.Args[0] 4394 val := v.Args[1] 4395 mem := v.Args[2] 4396 if !(is32Bit(off1 + off2)) { 4397 break 4398 } 4399 v.reset(OpMIPS64MOVHstore) 4400 v.AuxInt = off1 + off2 4401 v.Aux = sym 4402 v.AddArg(ptr) 4403 v.AddArg(val) 4404 v.AddArg(mem) 4405 return true 4406 } 4407 // match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 4408 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4409 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 4410 for { 4411 off1 := v.AuxInt 4412 sym1 := v.Aux 4413 v_0 := v.Args[0] 4414 if v_0.Op != OpMIPS64MOVVaddr { 4415 break 4416 } 4417 off2 := v_0.AuxInt 4418 sym2 := v_0.Aux 4419 ptr := v_0.Args[0] 4420 val := v.Args[1] 4421 mem := v.Args[2] 4422 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4423 break 4424 } 4425 v.reset(OpMIPS64MOVHstore) 4426 v.AuxInt = off1 + off2 4427 v.Aux = mergeSym(sym1, sym2) 4428 v.AddArg(ptr) 4429 v.AddArg(val) 4430 v.AddArg(mem) 4431 return true 4432 } 4433 // match: (MOVHstore [off] {sym} ptr (MOVVconst [0]) mem) 4434 // cond: 4435 // result: (MOVHstorezero [off] {sym} ptr mem) 4436 for { 4437 off := v.AuxInt 4438 sym := v.Aux 4439 ptr := v.Args[0] 4440 v_1 := v.Args[1] 4441 if v_1.Op != OpMIPS64MOVVconst { 4442 break 4443 } 4444 if v_1.AuxInt != 0 { 4445 break 4446 } 4447 mem := v.Args[2] 4448 v.reset(OpMIPS64MOVHstorezero) 4449 v.AuxInt = off 4450 v.Aux = sym 4451 v.AddArg(ptr) 4452 v.AddArg(mem) 4453 return true 4454 } 4455 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 4456 // cond: 4457 // result: (MOVHstore [off] {sym} ptr x mem) 4458 for { 4459 off := v.AuxInt 4460 sym := v.Aux 4461 ptr := v.Args[0] 4462 v_1 := v.Args[1] 4463 if v_1.Op != OpMIPS64MOVHreg { 4464 break 4465 } 4466 x := v_1.Args[0] 4467 mem := v.Args[2] 4468 v.reset(OpMIPS64MOVHstore) 4469 v.AuxInt = off 4470 v.Aux = sym 4471 v.AddArg(ptr) 4472 v.AddArg(x) 4473 v.AddArg(mem) 4474 return true 4475 } 4476 // match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) 4477 // cond: 4478 // result: (MOVHstore [off] {sym} ptr x mem) 4479 for { 4480 off := v.AuxInt 4481 sym := v.Aux 4482 ptr := v.Args[0] 4483 v_1 := v.Args[1] 4484 if v_1.Op != OpMIPS64MOVHUreg { 4485 break 4486 } 4487 x := v_1.Args[0] 4488 mem := v.Args[2] 4489 v.reset(OpMIPS64MOVHstore) 4490 v.AuxInt = off 4491 v.Aux = sym 4492 v.AddArg(ptr) 4493 v.AddArg(x) 4494 v.AddArg(mem) 4495 return true 4496 } 4497 // match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem) 4498 // cond: 4499 // result: (MOVHstore [off] {sym} ptr x mem) 4500 for { 4501 off := v.AuxInt 4502 sym := v.Aux 4503 ptr := v.Args[0] 4504 v_1 := v.Args[1] 4505 if v_1.Op != OpMIPS64MOVWreg { 4506 break 4507 } 4508 x := v_1.Args[0] 4509 mem := v.Args[2] 4510 v.reset(OpMIPS64MOVHstore) 4511 v.AuxInt = off 4512 v.Aux = sym 4513 v.AddArg(ptr) 4514 v.AddArg(x) 4515 v.AddArg(mem) 4516 return true 4517 } 4518 // match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem) 4519 // cond: 4520 // result: (MOVHstore [off] {sym} ptr x mem) 4521 for { 4522 off := v.AuxInt 4523 sym := v.Aux 4524 ptr := v.Args[0] 4525 v_1 := v.Args[1] 4526 if v_1.Op != OpMIPS64MOVWUreg { 4527 break 4528 } 4529 x := v_1.Args[0] 4530 mem := v.Args[2] 4531 v.reset(OpMIPS64MOVHstore) 4532 v.AuxInt = off 4533 v.Aux = sym 4534 v.AddArg(ptr) 4535 v.AddArg(x) 4536 v.AddArg(mem) 4537 return true 4538 } 4539 return false 4540 } 4541 func rewriteValueMIPS64_OpMIPS64MOVHstorezero(v *Value, config *Config) bool { 4542 b := v.Block 4543 _ = b 4544 // match: (MOVHstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) 4545 // cond: is32Bit(off1+off2) 4546 // result: (MOVHstorezero [off1+off2] {sym} ptr mem) 4547 for { 4548 off1 := v.AuxInt 4549 sym := v.Aux 4550 v_0 := v.Args[0] 4551 if v_0.Op != OpMIPS64ADDVconst { 4552 break 4553 } 4554 off2 := v_0.AuxInt 4555 ptr := v_0.Args[0] 4556 mem := v.Args[1] 4557 if !(is32Bit(off1 + off2)) { 4558 break 4559 } 4560 v.reset(OpMIPS64MOVHstorezero) 4561 v.AuxInt = off1 + off2 4562 v.Aux = sym 4563 v.AddArg(ptr) 4564 v.AddArg(mem) 4565 return true 4566 } 4567 // match: (MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4568 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4569 // result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4570 for { 4571 off1 := v.AuxInt 4572 sym1 := v.Aux 4573 v_0 := v.Args[0] 4574 if v_0.Op != OpMIPS64MOVVaddr { 4575 break 4576 } 4577 off2 := v_0.AuxInt 4578 sym2 := v_0.Aux 4579 ptr := v_0.Args[0] 4580 mem := v.Args[1] 4581 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4582 break 4583 } 4584 v.reset(OpMIPS64MOVHstorezero) 4585 v.AuxInt = off1 + off2 4586 v.Aux = mergeSym(sym1, sym2) 4587 v.AddArg(ptr) 4588 v.AddArg(mem) 4589 return true 4590 } 4591 return false 4592 } 4593 func rewriteValueMIPS64_OpMIPS64MOVVload(v *Value, config *Config) bool { 4594 b := v.Block 4595 _ = b 4596 // match: (MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem) 4597 // cond: is32Bit(off1+off2) 4598 // result: (MOVVload [off1+off2] {sym} ptr mem) 4599 for { 4600 off1 := v.AuxInt 4601 sym := v.Aux 4602 v_0 := v.Args[0] 4603 if v_0.Op != OpMIPS64ADDVconst { 4604 break 4605 } 4606 off2 := v_0.AuxInt 4607 ptr := v_0.Args[0] 4608 mem := v.Args[1] 4609 if !(is32Bit(off1 + off2)) { 4610 break 4611 } 4612 v.reset(OpMIPS64MOVVload) 4613 v.AuxInt = off1 + off2 4614 v.Aux = sym 4615 v.AddArg(ptr) 4616 v.AddArg(mem) 4617 return true 4618 } 4619 // match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4620 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4621 // result: (MOVVload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4622 for { 4623 off1 := v.AuxInt 4624 sym1 := v.Aux 4625 v_0 := v.Args[0] 4626 if v_0.Op != OpMIPS64MOVVaddr { 4627 break 4628 } 4629 off2 := v_0.AuxInt 4630 sym2 := v_0.Aux 4631 ptr := v_0.Args[0] 4632 mem := v.Args[1] 4633 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4634 break 4635 } 4636 v.reset(OpMIPS64MOVVload) 4637 v.AuxInt = off1 + off2 4638 v.Aux = mergeSym(sym1, sym2) 4639 v.AddArg(ptr) 4640 v.AddArg(mem) 4641 return true 4642 } 4643 return false 4644 } 4645 func rewriteValueMIPS64_OpMIPS64MOVVreg(v *Value, config *Config) bool { 4646 b := v.Block 4647 _ = b 4648 // match: (MOVVreg x) 4649 // cond: x.Uses == 1 4650 // result: (MOVVnop x) 4651 for { 4652 x := v.Args[0] 4653 if !(x.Uses == 1) { 4654 break 4655 } 4656 v.reset(OpMIPS64MOVVnop) 4657 v.AddArg(x) 4658 return true 4659 } 4660 // match: (MOVVreg (MOVVconst [c])) 4661 // cond: 4662 // result: (MOVVconst [c]) 4663 for { 4664 v_0 := v.Args[0] 4665 if v_0.Op != OpMIPS64MOVVconst { 4666 break 4667 } 4668 c := v_0.AuxInt 4669 v.reset(OpMIPS64MOVVconst) 4670 v.AuxInt = c 4671 return true 4672 } 4673 return false 4674 } 4675 func rewriteValueMIPS64_OpMIPS64MOVVstore(v *Value, config *Config) bool { 4676 b := v.Block 4677 _ = b 4678 // match: (MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 4679 // cond: is32Bit(off1+off2) 4680 // result: (MOVVstore [off1+off2] {sym} ptr val mem) 4681 for { 4682 off1 := v.AuxInt 4683 sym := v.Aux 4684 v_0 := v.Args[0] 4685 if v_0.Op != OpMIPS64ADDVconst { 4686 break 4687 } 4688 off2 := v_0.AuxInt 4689 ptr := v_0.Args[0] 4690 val := v.Args[1] 4691 mem := v.Args[2] 4692 if !(is32Bit(off1 + off2)) { 4693 break 4694 } 4695 v.reset(OpMIPS64MOVVstore) 4696 v.AuxInt = off1 + off2 4697 v.Aux = sym 4698 v.AddArg(ptr) 4699 v.AddArg(val) 4700 v.AddArg(mem) 4701 return true 4702 } 4703 // match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 4704 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4705 // result: (MOVVstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 4706 for { 4707 off1 := v.AuxInt 4708 sym1 := v.Aux 4709 v_0 := v.Args[0] 4710 if v_0.Op != OpMIPS64MOVVaddr { 4711 break 4712 } 4713 off2 := v_0.AuxInt 4714 sym2 := v_0.Aux 4715 ptr := v_0.Args[0] 4716 val := v.Args[1] 4717 mem := v.Args[2] 4718 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4719 break 4720 } 4721 v.reset(OpMIPS64MOVVstore) 4722 v.AuxInt = off1 + off2 4723 v.Aux = mergeSym(sym1, sym2) 4724 v.AddArg(ptr) 4725 v.AddArg(val) 4726 v.AddArg(mem) 4727 return true 4728 } 4729 // match: (MOVVstore [off] {sym} ptr (MOVVconst [0]) mem) 4730 // cond: 4731 // result: (MOVVstorezero [off] {sym} ptr mem) 4732 for { 4733 off := v.AuxInt 4734 sym := v.Aux 4735 ptr := v.Args[0] 4736 v_1 := v.Args[1] 4737 if v_1.Op != OpMIPS64MOVVconst { 4738 break 4739 } 4740 if v_1.AuxInt != 0 { 4741 break 4742 } 4743 mem := v.Args[2] 4744 v.reset(OpMIPS64MOVVstorezero) 4745 v.AuxInt = off 4746 v.Aux = sym 4747 v.AddArg(ptr) 4748 v.AddArg(mem) 4749 return true 4750 } 4751 return false 4752 } 4753 func rewriteValueMIPS64_OpMIPS64MOVVstorezero(v *Value, config *Config) bool { 4754 b := v.Block 4755 _ = b 4756 // match: (MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) 4757 // cond: is32Bit(off1+off2) 4758 // result: (MOVVstorezero [off1+off2] {sym} ptr mem) 4759 for { 4760 off1 := v.AuxInt 4761 sym := v.Aux 4762 v_0 := v.Args[0] 4763 if v_0.Op != OpMIPS64ADDVconst { 4764 break 4765 } 4766 off2 := v_0.AuxInt 4767 ptr := v_0.Args[0] 4768 mem := v.Args[1] 4769 if !(is32Bit(off1 + off2)) { 4770 break 4771 } 4772 v.reset(OpMIPS64MOVVstorezero) 4773 v.AuxInt = off1 + off2 4774 v.Aux = sym 4775 v.AddArg(ptr) 4776 v.AddArg(mem) 4777 return true 4778 } 4779 // match: (MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4780 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4781 // result: (MOVVstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4782 for { 4783 off1 := v.AuxInt 4784 sym1 := v.Aux 4785 v_0 := v.Args[0] 4786 if v_0.Op != OpMIPS64MOVVaddr { 4787 break 4788 } 4789 off2 := v_0.AuxInt 4790 sym2 := v_0.Aux 4791 ptr := v_0.Args[0] 4792 mem := v.Args[1] 4793 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4794 break 4795 } 4796 v.reset(OpMIPS64MOVVstorezero) 4797 v.AuxInt = off1 + off2 4798 v.Aux = mergeSym(sym1, sym2) 4799 v.AddArg(ptr) 4800 v.AddArg(mem) 4801 return true 4802 } 4803 return false 4804 } 4805 func rewriteValueMIPS64_OpMIPS64MOVWUload(v *Value, config *Config) bool { 4806 b := v.Block 4807 _ = b 4808 // match: (MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem) 4809 // cond: is32Bit(off1+off2) 4810 // result: (MOVWUload [off1+off2] {sym} ptr mem) 4811 for { 4812 off1 := v.AuxInt 4813 sym := v.Aux 4814 v_0 := v.Args[0] 4815 if v_0.Op != OpMIPS64ADDVconst { 4816 break 4817 } 4818 off2 := v_0.AuxInt 4819 ptr := v_0.Args[0] 4820 mem := v.Args[1] 4821 if !(is32Bit(off1 + off2)) { 4822 break 4823 } 4824 v.reset(OpMIPS64MOVWUload) 4825 v.AuxInt = off1 + off2 4826 v.Aux = sym 4827 v.AddArg(ptr) 4828 v.AddArg(mem) 4829 return true 4830 } 4831 // match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4832 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4833 // result: (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4834 for { 4835 off1 := v.AuxInt 4836 sym1 := v.Aux 4837 v_0 := v.Args[0] 4838 if v_0.Op != OpMIPS64MOVVaddr { 4839 break 4840 } 4841 off2 := v_0.AuxInt 4842 sym2 := v_0.Aux 4843 ptr := v_0.Args[0] 4844 mem := v.Args[1] 4845 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4846 break 4847 } 4848 v.reset(OpMIPS64MOVWUload) 4849 v.AuxInt = off1 + off2 4850 v.Aux = mergeSym(sym1, sym2) 4851 v.AddArg(ptr) 4852 v.AddArg(mem) 4853 return true 4854 } 4855 return false 4856 } 4857 func rewriteValueMIPS64_OpMIPS64MOVWUreg(v *Value, config *Config) bool { 4858 b := v.Block 4859 _ = b 4860 // match: (MOVWUreg x:(MOVBUload _ _)) 4861 // cond: 4862 // result: (MOVVreg x) 4863 for { 4864 x := v.Args[0] 4865 if x.Op != OpMIPS64MOVBUload { 4866 break 4867 } 4868 v.reset(OpMIPS64MOVVreg) 4869 v.AddArg(x) 4870 return true 4871 } 4872 // match: (MOVWUreg x:(MOVHUload _ _)) 4873 // cond: 4874 // result: (MOVVreg x) 4875 for { 4876 x := v.Args[0] 4877 if x.Op != OpMIPS64MOVHUload { 4878 break 4879 } 4880 v.reset(OpMIPS64MOVVreg) 4881 v.AddArg(x) 4882 return true 4883 } 4884 // match: (MOVWUreg x:(MOVWUload _ _)) 4885 // cond: 4886 // result: (MOVVreg x) 4887 for { 4888 x := v.Args[0] 4889 if x.Op != OpMIPS64MOVWUload { 4890 break 4891 } 4892 v.reset(OpMIPS64MOVVreg) 4893 v.AddArg(x) 4894 return true 4895 } 4896 // match: (MOVWUreg x:(MOVBUreg _)) 4897 // cond: 4898 // result: (MOVVreg x) 4899 for { 4900 x := v.Args[0] 4901 if x.Op != OpMIPS64MOVBUreg { 4902 break 4903 } 4904 v.reset(OpMIPS64MOVVreg) 4905 v.AddArg(x) 4906 return true 4907 } 4908 // match: (MOVWUreg x:(MOVHUreg _)) 4909 // cond: 4910 // result: (MOVVreg x) 4911 for { 4912 x := v.Args[0] 4913 if x.Op != OpMIPS64MOVHUreg { 4914 break 4915 } 4916 v.reset(OpMIPS64MOVVreg) 4917 v.AddArg(x) 4918 return true 4919 } 4920 // match: (MOVWUreg x:(MOVWUreg _)) 4921 // cond: 4922 // result: (MOVVreg x) 4923 for { 4924 x := v.Args[0] 4925 if x.Op != OpMIPS64MOVWUreg { 4926 break 4927 } 4928 v.reset(OpMIPS64MOVVreg) 4929 v.AddArg(x) 4930 return true 4931 } 4932 // match: (MOVWUreg (MOVVconst [c])) 4933 // cond: 4934 // result: (MOVVconst [int64(uint32(c))]) 4935 for { 4936 v_0 := v.Args[0] 4937 if v_0.Op != OpMIPS64MOVVconst { 4938 break 4939 } 4940 c := v_0.AuxInt 4941 v.reset(OpMIPS64MOVVconst) 4942 v.AuxInt = int64(uint32(c)) 4943 return true 4944 } 4945 return false 4946 } 4947 func rewriteValueMIPS64_OpMIPS64MOVWload(v *Value, config *Config) bool { 4948 b := v.Block 4949 _ = b 4950 // match: (MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem) 4951 // cond: is32Bit(off1+off2) 4952 // result: (MOVWload [off1+off2] {sym} ptr mem) 4953 for { 4954 off1 := v.AuxInt 4955 sym := v.Aux 4956 v_0 := v.Args[0] 4957 if v_0.Op != OpMIPS64ADDVconst { 4958 break 4959 } 4960 off2 := v_0.AuxInt 4961 ptr := v_0.Args[0] 4962 mem := v.Args[1] 4963 if !(is32Bit(off1 + off2)) { 4964 break 4965 } 4966 v.reset(OpMIPS64MOVWload) 4967 v.AuxInt = off1 + off2 4968 v.Aux = sym 4969 v.AddArg(ptr) 4970 v.AddArg(mem) 4971 return true 4972 } 4973 // match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 4974 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 4975 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 4976 for { 4977 off1 := v.AuxInt 4978 sym1 := v.Aux 4979 v_0 := v.Args[0] 4980 if v_0.Op != OpMIPS64MOVVaddr { 4981 break 4982 } 4983 off2 := v_0.AuxInt 4984 sym2 := v_0.Aux 4985 ptr := v_0.Args[0] 4986 mem := v.Args[1] 4987 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 4988 break 4989 } 4990 v.reset(OpMIPS64MOVWload) 4991 v.AuxInt = off1 + off2 4992 v.Aux = mergeSym(sym1, sym2) 4993 v.AddArg(ptr) 4994 v.AddArg(mem) 4995 return true 4996 } 4997 return false 4998 } 4999 func rewriteValueMIPS64_OpMIPS64MOVWreg(v *Value, config *Config) bool { 5000 b := v.Block 5001 _ = b 5002 // match: (MOVWreg x:(MOVBload _ _)) 5003 // cond: 5004 // result: (MOVVreg x) 5005 for { 5006 x := v.Args[0] 5007 if x.Op != OpMIPS64MOVBload { 5008 break 5009 } 5010 v.reset(OpMIPS64MOVVreg) 5011 v.AddArg(x) 5012 return true 5013 } 5014 // match: (MOVWreg x:(MOVBUload _ _)) 5015 // cond: 5016 // result: (MOVVreg x) 5017 for { 5018 x := v.Args[0] 5019 if x.Op != OpMIPS64MOVBUload { 5020 break 5021 } 5022 v.reset(OpMIPS64MOVVreg) 5023 v.AddArg(x) 5024 return true 5025 } 5026 // match: (MOVWreg x:(MOVHload _ _)) 5027 // cond: 5028 // result: (MOVVreg x) 5029 for { 5030 x := v.Args[0] 5031 if x.Op != OpMIPS64MOVHload { 5032 break 5033 } 5034 v.reset(OpMIPS64MOVVreg) 5035 v.AddArg(x) 5036 return true 5037 } 5038 // match: (MOVWreg x:(MOVHUload _ _)) 5039 // cond: 5040 // result: (MOVVreg x) 5041 for { 5042 x := v.Args[0] 5043 if x.Op != OpMIPS64MOVHUload { 5044 break 5045 } 5046 v.reset(OpMIPS64MOVVreg) 5047 v.AddArg(x) 5048 return true 5049 } 5050 // match: (MOVWreg x:(MOVWload _ _)) 5051 // cond: 5052 // result: (MOVVreg x) 5053 for { 5054 x := v.Args[0] 5055 if x.Op != OpMIPS64MOVWload { 5056 break 5057 } 5058 v.reset(OpMIPS64MOVVreg) 5059 v.AddArg(x) 5060 return true 5061 } 5062 // match: (MOVWreg x:(MOVBreg _)) 5063 // cond: 5064 // result: (MOVVreg x) 5065 for { 5066 x := v.Args[0] 5067 if x.Op != OpMIPS64MOVBreg { 5068 break 5069 } 5070 v.reset(OpMIPS64MOVVreg) 5071 v.AddArg(x) 5072 return true 5073 } 5074 // match: (MOVWreg x:(MOVBUreg _)) 5075 // cond: 5076 // result: (MOVVreg x) 5077 for { 5078 x := v.Args[0] 5079 if x.Op != OpMIPS64MOVBUreg { 5080 break 5081 } 5082 v.reset(OpMIPS64MOVVreg) 5083 v.AddArg(x) 5084 return true 5085 } 5086 // match: (MOVWreg x:(MOVHreg _)) 5087 // cond: 5088 // result: (MOVVreg x) 5089 for { 5090 x := v.Args[0] 5091 if x.Op != OpMIPS64MOVHreg { 5092 break 5093 } 5094 v.reset(OpMIPS64MOVVreg) 5095 v.AddArg(x) 5096 return true 5097 } 5098 // match: (MOVWreg x:(MOVHreg _)) 5099 // cond: 5100 // result: (MOVVreg x) 5101 for { 5102 x := v.Args[0] 5103 if x.Op != OpMIPS64MOVHreg { 5104 break 5105 } 5106 v.reset(OpMIPS64MOVVreg) 5107 v.AddArg(x) 5108 return true 5109 } 5110 // match: (MOVWreg x:(MOVWreg _)) 5111 // cond: 5112 // result: (MOVVreg x) 5113 for { 5114 x := v.Args[0] 5115 if x.Op != OpMIPS64MOVWreg { 5116 break 5117 } 5118 v.reset(OpMIPS64MOVVreg) 5119 v.AddArg(x) 5120 return true 5121 } 5122 // match: (MOVWreg (MOVVconst [c])) 5123 // cond: 5124 // result: (MOVVconst [int64(int32(c))]) 5125 for { 5126 v_0 := v.Args[0] 5127 if v_0.Op != OpMIPS64MOVVconst { 5128 break 5129 } 5130 c := v_0.AuxInt 5131 v.reset(OpMIPS64MOVVconst) 5132 v.AuxInt = int64(int32(c)) 5133 return true 5134 } 5135 return false 5136 } 5137 func rewriteValueMIPS64_OpMIPS64MOVWstore(v *Value, config *Config) bool { 5138 b := v.Block 5139 _ = b 5140 // match: (MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem) 5141 // cond: is32Bit(off1+off2) 5142 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 5143 for { 5144 off1 := v.AuxInt 5145 sym := v.Aux 5146 v_0 := v.Args[0] 5147 if v_0.Op != OpMIPS64ADDVconst { 5148 break 5149 } 5150 off2 := v_0.AuxInt 5151 ptr := v_0.Args[0] 5152 val := v.Args[1] 5153 mem := v.Args[2] 5154 if !(is32Bit(off1 + off2)) { 5155 break 5156 } 5157 v.reset(OpMIPS64MOVWstore) 5158 v.AuxInt = off1 + off2 5159 v.Aux = sym 5160 v.AddArg(ptr) 5161 v.AddArg(val) 5162 v.AddArg(mem) 5163 return true 5164 } 5165 // match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) 5166 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 5167 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 5168 for { 5169 off1 := v.AuxInt 5170 sym1 := v.Aux 5171 v_0 := v.Args[0] 5172 if v_0.Op != OpMIPS64MOVVaddr { 5173 break 5174 } 5175 off2 := v_0.AuxInt 5176 sym2 := v_0.Aux 5177 ptr := v_0.Args[0] 5178 val := v.Args[1] 5179 mem := v.Args[2] 5180 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 5181 break 5182 } 5183 v.reset(OpMIPS64MOVWstore) 5184 v.AuxInt = off1 + off2 5185 v.Aux = mergeSym(sym1, sym2) 5186 v.AddArg(ptr) 5187 v.AddArg(val) 5188 v.AddArg(mem) 5189 return true 5190 } 5191 // match: (MOVWstore [off] {sym} ptr (MOVVconst [0]) mem) 5192 // cond: 5193 // result: (MOVWstorezero [off] {sym} ptr mem) 5194 for { 5195 off := v.AuxInt 5196 sym := v.Aux 5197 ptr := v.Args[0] 5198 v_1 := v.Args[1] 5199 if v_1.Op != OpMIPS64MOVVconst { 5200 break 5201 } 5202 if v_1.AuxInt != 0 { 5203 break 5204 } 5205 mem := v.Args[2] 5206 v.reset(OpMIPS64MOVWstorezero) 5207 v.AuxInt = off 5208 v.Aux = sym 5209 v.AddArg(ptr) 5210 v.AddArg(mem) 5211 return true 5212 } 5213 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 5214 // cond: 5215 // result: (MOVWstore [off] {sym} ptr x mem) 5216 for { 5217 off := v.AuxInt 5218 sym := v.Aux 5219 ptr := v.Args[0] 5220 v_1 := v.Args[1] 5221 if v_1.Op != OpMIPS64MOVWreg { 5222 break 5223 } 5224 x := v_1.Args[0] 5225 mem := v.Args[2] 5226 v.reset(OpMIPS64MOVWstore) 5227 v.AuxInt = off 5228 v.Aux = sym 5229 v.AddArg(ptr) 5230 v.AddArg(x) 5231 v.AddArg(mem) 5232 return true 5233 } 5234 // match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem) 5235 // cond: 5236 // result: (MOVWstore [off] {sym} ptr x mem) 5237 for { 5238 off := v.AuxInt 5239 sym := v.Aux 5240 ptr := v.Args[0] 5241 v_1 := v.Args[1] 5242 if v_1.Op != OpMIPS64MOVWUreg { 5243 break 5244 } 5245 x := v_1.Args[0] 5246 mem := v.Args[2] 5247 v.reset(OpMIPS64MOVWstore) 5248 v.AuxInt = off 5249 v.Aux = sym 5250 v.AddArg(ptr) 5251 v.AddArg(x) 5252 v.AddArg(mem) 5253 return true 5254 } 5255 return false 5256 } 5257 func rewriteValueMIPS64_OpMIPS64MOVWstorezero(v *Value, config *Config) bool { 5258 b := v.Block 5259 _ = b 5260 // match: (MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) 5261 // cond: is32Bit(off1+off2) 5262 // result: (MOVWstorezero [off1+off2] {sym} ptr mem) 5263 for { 5264 off1 := v.AuxInt 5265 sym := v.Aux 5266 v_0 := v.Args[0] 5267 if v_0.Op != OpMIPS64ADDVconst { 5268 break 5269 } 5270 off2 := v_0.AuxInt 5271 ptr := v_0.Args[0] 5272 mem := v.Args[1] 5273 if !(is32Bit(off1 + off2)) { 5274 break 5275 } 5276 v.reset(OpMIPS64MOVWstorezero) 5277 v.AuxInt = off1 + off2 5278 v.Aux = sym 5279 v.AddArg(ptr) 5280 v.AddArg(mem) 5281 return true 5282 } 5283 // match: (MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) 5284 // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) 5285 // result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 5286 for { 5287 off1 := v.AuxInt 5288 sym1 := v.Aux 5289 v_0 := v.Args[0] 5290 if v_0.Op != OpMIPS64MOVVaddr { 5291 break 5292 } 5293 off2 := v_0.AuxInt 5294 sym2 := v_0.Aux 5295 ptr := v_0.Args[0] 5296 mem := v.Args[1] 5297 if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) { 5298 break 5299 } 5300 v.reset(OpMIPS64MOVWstorezero) 5301 v.AuxInt = off1 + off2 5302 v.Aux = mergeSym(sym1, sym2) 5303 v.AddArg(ptr) 5304 v.AddArg(mem) 5305 return true 5306 } 5307 return false 5308 } 5309 func rewriteValueMIPS64_OpMIPS64NEGV(v *Value, config *Config) bool { 5310 b := v.Block 5311 _ = b 5312 // match: (NEGV (MOVVconst [c])) 5313 // cond: 5314 // result: (MOVVconst [-c]) 5315 for { 5316 v_0 := v.Args[0] 5317 if v_0.Op != OpMIPS64MOVVconst { 5318 break 5319 } 5320 c := v_0.AuxInt 5321 v.reset(OpMIPS64MOVVconst) 5322 v.AuxInt = -c 5323 return true 5324 } 5325 return false 5326 } 5327 func rewriteValueMIPS64_OpMIPS64NOR(v *Value, config *Config) bool { 5328 b := v.Block 5329 _ = b 5330 // match: (NOR (MOVVconst [c]) x) 5331 // cond: is32Bit(c) 5332 // result: (NORconst [c] x) 5333 for { 5334 v_0 := v.Args[0] 5335 if v_0.Op != OpMIPS64MOVVconst { 5336 break 5337 } 5338 c := v_0.AuxInt 5339 x := v.Args[1] 5340 if !(is32Bit(c)) { 5341 break 5342 } 5343 v.reset(OpMIPS64NORconst) 5344 v.AuxInt = c 5345 v.AddArg(x) 5346 return true 5347 } 5348 // match: (NOR x (MOVVconst [c])) 5349 // cond: is32Bit(c) 5350 // result: (NORconst [c] x) 5351 for { 5352 x := v.Args[0] 5353 v_1 := v.Args[1] 5354 if v_1.Op != OpMIPS64MOVVconst { 5355 break 5356 } 5357 c := v_1.AuxInt 5358 if !(is32Bit(c)) { 5359 break 5360 } 5361 v.reset(OpMIPS64NORconst) 5362 v.AuxInt = c 5363 v.AddArg(x) 5364 return true 5365 } 5366 return false 5367 } 5368 func rewriteValueMIPS64_OpMIPS64NORconst(v *Value, config *Config) bool { 5369 b := v.Block 5370 _ = b 5371 // match: (NORconst [c] (MOVVconst [d])) 5372 // cond: 5373 // result: (MOVVconst [^(c|d)]) 5374 for { 5375 c := v.AuxInt 5376 v_0 := v.Args[0] 5377 if v_0.Op != OpMIPS64MOVVconst { 5378 break 5379 } 5380 d := v_0.AuxInt 5381 v.reset(OpMIPS64MOVVconst) 5382 v.AuxInt = ^(c | d) 5383 return true 5384 } 5385 return false 5386 } 5387 func rewriteValueMIPS64_OpMIPS64OR(v *Value, config *Config) bool { 5388 b := v.Block 5389 _ = b 5390 // match: (OR (MOVVconst [c]) x) 5391 // cond: is32Bit(c) 5392 // result: (ORconst [c] x) 5393 for { 5394 v_0 := v.Args[0] 5395 if v_0.Op != OpMIPS64MOVVconst { 5396 break 5397 } 5398 c := v_0.AuxInt 5399 x := v.Args[1] 5400 if !(is32Bit(c)) { 5401 break 5402 } 5403 v.reset(OpMIPS64ORconst) 5404 v.AuxInt = c 5405 v.AddArg(x) 5406 return true 5407 } 5408 // match: (OR x (MOVVconst [c])) 5409 // cond: is32Bit(c) 5410 // result: (ORconst [c] x) 5411 for { 5412 x := v.Args[0] 5413 v_1 := v.Args[1] 5414 if v_1.Op != OpMIPS64MOVVconst { 5415 break 5416 } 5417 c := v_1.AuxInt 5418 if !(is32Bit(c)) { 5419 break 5420 } 5421 v.reset(OpMIPS64ORconst) 5422 v.AuxInt = c 5423 v.AddArg(x) 5424 return true 5425 } 5426 // match: (OR x x) 5427 // cond: 5428 // result: x 5429 for { 5430 x := v.Args[0] 5431 if x != v.Args[1] { 5432 break 5433 } 5434 v.reset(OpCopy) 5435 v.Type = x.Type 5436 v.AddArg(x) 5437 return true 5438 } 5439 return false 5440 } 5441 func rewriteValueMIPS64_OpMIPS64ORconst(v *Value, config *Config) bool { 5442 b := v.Block 5443 _ = b 5444 // match: (ORconst [0] x) 5445 // cond: 5446 // result: x 5447 for { 5448 if v.AuxInt != 0 { 5449 break 5450 } 5451 x := v.Args[0] 5452 v.reset(OpCopy) 5453 v.Type = x.Type 5454 v.AddArg(x) 5455 return true 5456 } 5457 // match: (ORconst [-1] _) 5458 // cond: 5459 // result: (MOVVconst [-1]) 5460 for { 5461 if v.AuxInt != -1 { 5462 break 5463 } 5464 v.reset(OpMIPS64MOVVconst) 5465 v.AuxInt = -1 5466 return true 5467 } 5468 // match: (ORconst [c] (MOVVconst [d])) 5469 // cond: 5470 // result: (MOVVconst [c|d]) 5471 for { 5472 c := v.AuxInt 5473 v_0 := v.Args[0] 5474 if v_0.Op != OpMIPS64MOVVconst { 5475 break 5476 } 5477 d := v_0.AuxInt 5478 v.reset(OpMIPS64MOVVconst) 5479 v.AuxInt = c | d 5480 return true 5481 } 5482 // match: (ORconst [c] (ORconst [d] x)) 5483 // cond: is32Bit(c|d) 5484 // result: (ORconst [c|d] x) 5485 for { 5486 c := v.AuxInt 5487 v_0 := v.Args[0] 5488 if v_0.Op != OpMIPS64ORconst { 5489 break 5490 } 5491 d := v_0.AuxInt 5492 x := v_0.Args[0] 5493 if !(is32Bit(c | d)) { 5494 break 5495 } 5496 v.reset(OpMIPS64ORconst) 5497 v.AuxInt = c | d 5498 v.AddArg(x) 5499 return true 5500 } 5501 return false 5502 } 5503 func rewriteValueMIPS64_OpMIPS64SGT(v *Value, config *Config) bool { 5504 b := v.Block 5505 _ = b 5506 // match: (SGT (MOVVconst [c]) x) 5507 // cond: is32Bit(c) 5508 // result: (SGTconst [c] x) 5509 for { 5510 v_0 := v.Args[0] 5511 if v_0.Op != OpMIPS64MOVVconst { 5512 break 5513 } 5514 c := v_0.AuxInt 5515 x := v.Args[1] 5516 if !(is32Bit(c)) { 5517 break 5518 } 5519 v.reset(OpMIPS64SGTconst) 5520 v.AuxInt = c 5521 v.AddArg(x) 5522 return true 5523 } 5524 return false 5525 } 5526 func rewriteValueMIPS64_OpMIPS64SGTU(v *Value, config *Config) bool { 5527 b := v.Block 5528 _ = b 5529 // match: (SGTU (MOVVconst [c]) x) 5530 // cond: is32Bit(c) 5531 // result: (SGTUconst [c] x) 5532 for { 5533 v_0 := v.Args[0] 5534 if v_0.Op != OpMIPS64MOVVconst { 5535 break 5536 } 5537 c := v_0.AuxInt 5538 x := v.Args[1] 5539 if !(is32Bit(c)) { 5540 break 5541 } 5542 v.reset(OpMIPS64SGTUconst) 5543 v.AuxInt = c 5544 v.AddArg(x) 5545 return true 5546 } 5547 return false 5548 } 5549 func rewriteValueMIPS64_OpMIPS64SGTUconst(v *Value, config *Config) bool { 5550 b := v.Block 5551 _ = b 5552 // match: (SGTUconst [c] (MOVVconst [d])) 5553 // cond: uint64(c)>uint64(d) 5554 // result: (MOVVconst [1]) 5555 for { 5556 c := v.AuxInt 5557 v_0 := v.Args[0] 5558 if v_0.Op != OpMIPS64MOVVconst { 5559 break 5560 } 5561 d := v_0.AuxInt 5562 if !(uint64(c) > uint64(d)) { 5563 break 5564 } 5565 v.reset(OpMIPS64MOVVconst) 5566 v.AuxInt = 1 5567 return true 5568 } 5569 // match: (SGTUconst [c] (MOVVconst [d])) 5570 // cond: uint64(c)<=uint64(d) 5571 // result: (MOVVconst [0]) 5572 for { 5573 c := v.AuxInt 5574 v_0 := v.Args[0] 5575 if v_0.Op != OpMIPS64MOVVconst { 5576 break 5577 } 5578 d := v_0.AuxInt 5579 if !(uint64(c) <= uint64(d)) { 5580 break 5581 } 5582 v.reset(OpMIPS64MOVVconst) 5583 v.AuxInt = 0 5584 return true 5585 } 5586 // match: (SGTUconst [c] (MOVBUreg _)) 5587 // cond: 0xff < uint64(c) 5588 // result: (MOVVconst [1]) 5589 for { 5590 c := v.AuxInt 5591 v_0 := v.Args[0] 5592 if v_0.Op != OpMIPS64MOVBUreg { 5593 break 5594 } 5595 if !(0xff < uint64(c)) { 5596 break 5597 } 5598 v.reset(OpMIPS64MOVVconst) 5599 v.AuxInt = 1 5600 return true 5601 } 5602 // match: (SGTUconst [c] (MOVHUreg _)) 5603 // cond: 0xffff < uint64(c) 5604 // result: (MOVVconst [1]) 5605 for { 5606 c := v.AuxInt 5607 v_0 := v.Args[0] 5608 if v_0.Op != OpMIPS64MOVHUreg { 5609 break 5610 } 5611 if !(0xffff < uint64(c)) { 5612 break 5613 } 5614 v.reset(OpMIPS64MOVVconst) 5615 v.AuxInt = 1 5616 return true 5617 } 5618 // match: (SGTUconst [c] (ANDconst [m] _)) 5619 // cond: uint64(m) < uint64(c) 5620 // result: (MOVVconst [1]) 5621 for { 5622 c := v.AuxInt 5623 v_0 := v.Args[0] 5624 if v_0.Op != OpMIPS64ANDconst { 5625 break 5626 } 5627 m := v_0.AuxInt 5628 if !(uint64(m) < uint64(c)) { 5629 break 5630 } 5631 v.reset(OpMIPS64MOVVconst) 5632 v.AuxInt = 1 5633 return true 5634 } 5635 // match: (SGTUconst [c] (SRLVconst _ [d])) 5636 // cond: 0 < d && d <= 63 && 1<<uint64(64-d) <= uint64(c) 5637 // result: (MOVVconst [1]) 5638 for { 5639 c := v.AuxInt 5640 v_0 := v.Args[0] 5641 if v_0.Op != OpMIPS64SRLVconst { 5642 break 5643 } 5644 d := v_0.AuxInt 5645 if !(0 < d && d <= 63 && 1<<uint64(64-d) <= uint64(c)) { 5646 break 5647 } 5648 v.reset(OpMIPS64MOVVconst) 5649 v.AuxInt = 1 5650 return true 5651 } 5652 return false 5653 } 5654 func rewriteValueMIPS64_OpMIPS64SGTconst(v *Value, config *Config) bool { 5655 b := v.Block 5656 _ = b 5657 // match: (SGTconst [c] (MOVVconst [d])) 5658 // cond: int64(c)>int64(d) 5659 // result: (MOVVconst [1]) 5660 for { 5661 c := v.AuxInt 5662 v_0 := v.Args[0] 5663 if v_0.Op != OpMIPS64MOVVconst { 5664 break 5665 } 5666 d := v_0.AuxInt 5667 if !(int64(c) > int64(d)) { 5668 break 5669 } 5670 v.reset(OpMIPS64MOVVconst) 5671 v.AuxInt = 1 5672 return true 5673 } 5674 // match: (SGTconst [c] (MOVVconst [d])) 5675 // cond: int64(c)<=int64(d) 5676 // result: (MOVVconst [0]) 5677 for { 5678 c := v.AuxInt 5679 v_0 := v.Args[0] 5680 if v_0.Op != OpMIPS64MOVVconst { 5681 break 5682 } 5683 d := v_0.AuxInt 5684 if !(int64(c) <= int64(d)) { 5685 break 5686 } 5687 v.reset(OpMIPS64MOVVconst) 5688 v.AuxInt = 0 5689 return true 5690 } 5691 // match: (SGTconst [c] (MOVBreg _)) 5692 // cond: 0x7f < int64(c) 5693 // result: (MOVVconst [1]) 5694 for { 5695 c := v.AuxInt 5696 v_0 := v.Args[0] 5697 if v_0.Op != OpMIPS64MOVBreg { 5698 break 5699 } 5700 if !(0x7f < int64(c)) { 5701 break 5702 } 5703 v.reset(OpMIPS64MOVVconst) 5704 v.AuxInt = 1 5705 return true 5706 } 5707 // match: (SGTconst [c] (MOVBreg _)) 5708 // cond: int64(c) <= -0x80 5709 // result: (MOVVconst [0]) 5710 for { 5711 c := v.AuxInt 5712 v_0 := v.Args[0] 5713 if v_0.Op != OpMIPS64MOVBreg { 5714 break 5715 } 5716 if !(int64(c) <= -0x80) { 5717 break 5718 } 5719 v.reset(OpMIPS64MOVVconst) 5720 v.AuxInt = 0 5721 return true 5722 } 5723 // match: (SGTconst [c] (MOVBUreg _)) 5724 // cond: 0xff < int64(c) 5725 // result: (MOVVconst [1]) 5726 for { 5727 c := v.AuxInt 5728 v_0 := v.Args[0] 5729 if v_0.Op != OpMIPS64MOVBUreg { 5730 break 5731 } 5732 if !(0xff < int64(c)) { 5733 break 5734 } 5735 v.reset(OpMIPS64MOVVconst) 5736 v.AuxInt = 1 5737 return true 5738 } 5739 // match: (SGTconst [c] (MOVBUreg _)) 5740 // cond: int64(c) < 0 5741 // result: (MOVVconst [0]) 5742 for { 5743 c := v.AuxInt 5744 v_0 := v.Args[0] 5745 if v_0.Op != OpMIPS64MOVBUreg { 5746 break 5747 } 5748 if !(int64(c) < 0) { 5749 break 5750 } 5751 v.reset(OpMIPS64MOVVconst) 5752 v.AuxInt = 0 5753 return true 5754 } 5755 // match: (SGTconst [c] (MOVHreg _)) 5756 // cond: 0x7fff < int64(c) 5757 // result: (MOVVconst [1]) 5758 for { 5759 c := v.AuxInt 5760 v_0 := v.Args[0] 5761 if v_0.Op != OpMIPS64MOVHreg { 5762 break 5763 } 5764 if !(0x7fff < int64(c)) { 5765 break 5766 } 5767 v.reset(OpMIPS64MOVVconst) 5768 v.AuxInt = 1 5769 return true 5770 } 5771 // match: (SGTconst [c] (MOVHreg _)) 5772 // cond: int64(c) <= -0x8000 5773 // result: (MOVVconst [0]) 5774 for { 5775 c := v.AuxInt 5776 v_0 := v.Args[0] 5777 if v_0.Op != OpMIPS64MOVHreg { 5778 break 5779 } 5780 if !(int64(c) <= -0x8000) { 5781 break 5782 } 5783 v.reset(OpMIPS64MOVVconst) 5784 v.AuxInt = 0 5785 return true 5786 } 5787 // match: (SGTconst [c] (MOVHUreg _)) 5788 // cond: 0xffff < int64(c) 5789 // result: (MOVVconst [1]) 5790 for { 5791 c := v.AuxInt 5792 v_0 := v.Args[0] 5793 if v_0.Op != OpMIPS64MOVHUreg { 5794 break 5795 } 5796 if !(0xffff < int64(c)) { 5797 break 5798 } 5799 v.reset(OpMIPS64MOVVconst) 5800 v.AuxInt = 1 5801 return true 5802 } 5803 // match: (SGTconst [c] (MOVHUreg _)) 5804 // cond: int64(c) < 0 5805 // result: (MOVVconst [0]) 5806 for { 5807 c := v.AuxInt 5808 v_0 := v.Args[0] 5809 if v_0.Op != OpMIPS64MOVHUreg { 5810 break 5811 } 5812 if !(int64(c) < 0) { 5813 break 5814 } 5815 v.reset(OpMIPS64MOVVconst) 5816 v.AuxInt = 0 5817 return true 5818 } 5819 // match: (SGTconst [c] (MOVWUreg _)) 5820 // cond: int64(c) < 0 5821 // result: (MOVVconst [0]) 5822 for { 5823 c := v.AuxInt 5824 v_0 := v.Args[0] 5825 if v_0.Op != OpMIPS64MOVWUreg { 5826 break 5827 } 5828 if !(int64(c) < 0) { 5829 break 5830 } 5831 v.reset(OpMIPS64MOVVconst) 5832 v.AuxInt = 0 5833 return true 5834 } 5835 // match: (SGTconst [c] (ANDconst [m] _)) 5836 // cond: 0 <= m && m < c 5837 // result: (MOVVconst [1]) 5838 for { 5839 c := v.AuxInt 5840 v_0 := v.Args[0] 5841 if v_0.Op != OpMIPS64ANDconst { 5842 break 5843 } 5844 m := v_0.AuxInt 5845 if !(0 <= m && m < c) { 5846 break 5847 } 5848 v.reset(OpMIPS64MOVVconst) 5849 v.AuxInt = 1 5850 return true 5851 } 5852 // match: (SGTconst [c] (SRLVconst _ [d])) 5853 // cond: 0 <= c && 0 < d && d <= 63 && 1<<uint64(64-d) <= c 5854 // result: (MOVVconst [1]) 5855 for { 5856 c := v.AuxInt 5857 v_0 := v.Args[0] 5858 if v_0.Op != OpMIPS64SRLVconst { 5859 break 5860 } 5861 d := v_0.AuxInt 5862 if !(0 <= c && 0 < d && d <= 63 && 1<<uint64(64-d) <= c) { 5863 break 5864 } 5865 v.reset(OpMIPS64MOVVconst) 5866 v.AuxInt = 1 5867 return true 5868 } 5869 return false 5870 } 5871 func rewriteValueMIPS64_OpMIPS64SLLV(v *Value, config *Config) bool { 5872 b := v.Block 5873 _ = b 5874 // match: (SLLV _ (MOVVconst [c])) 5875 // cond: uint64(c)>=64 5876 // result: (MOVVconst [0]) 5877 for { 5878 v_1 := v.Args[1] 5879 if v_1.Op != OpMIPS64MOVVconst { 5880 break 5881 } 5882 c := v_1.AuxInt 5883 if !(uint64(c) >= 64) { 5884 break 5885 } 5886 v.reset(OpMIPS64MOVVconst) 5887 v.AuxInt = 0 5888 return true 5889 } 5890 // match: (SLLV x (MOVVconst [c])) 5891 // cond: 5892 // result: (SLLVconst x [c]) 5893 for { 5894 x := v.Args[0] 5895 v_1 := v.Args[1] 5896 if v_1.Op != OpMIPS64MOVVconst { 5897 break 5898 } 5899 c := v_1.AuxInt 5900 v.reset(OpMIPS64SLLVconst) 5901 v.AuxInt = c 5902 v.AddArg(x) 5903 return true 5904 } 5905 return false 5906 } 5907 func rewriteValueMIPS64_OpMIPS64SLLVconst(v *Value, config *Config) bool { 5908 b := v.Block 5909 _ = b 5910 // match: (SLLVconst [c] (MOVVconst [d])) 5911 // cond: 5912 // result: (MOVVconst [int64(d)<<uint64(c)]) 5913 for { 5914 c := v.AuxInt 5915 v_0 := v.Args[0] 5916 if v_0.Op != OpMIPS64MOVVconst { 5917 break 5918 } 5919 d := v_0.AuxInt 5920 v.reset(OpMIPS64MOVVconst) 5921 v.AuxInt = int64(d) << uint64(c) 5922 return true 5923 } 5924 return false 5925 } 5926 func rewriteValueMIPS64_OpMIPS64SRAV(v *Value, config *Config) bool { 5927 b := v.Block 5928 _ = b 5929 // match: (SRAV x (MOVVconst [c])) 5930 // cond: uint64(c)>=64 5931 // result: (SRAVconst x [63]) 5932 for { 5933 x := v.Args[0] 5934 v_1 := v.Args[1] 5935 if v_1.Op != OpMIPS64MOVVconst { 5936 break 5937 } 5938 c := v_1.AuxInt 5939 if !(uint64(c) >= 64) { 5940 break 5941 } 5942 v.reset(OpMIPS64SRAVconst) 5943 v.AuxInt = 63 5944 v.AddArg(x) 5945 return true 5946 } 5947 // match: (SRAV x (MOVVconst [c])) 5948 // cond: 5949 // result: (SRAVconst x [c]) 5950 for { 5951 x := v.Args[0] 5952 v_1 := v.Args[1] 5953 if v_1.Op != OpMIPS64MOVVconst { 5954 break 5955 } 5956 c := v_1.AuxInt 5957 v.reset(OpMIPS64SRAVconst) 5958 v.AuxInt = c 5959 v.AddArg(x) 5960 return true 5961 } 5962 return false 5963 } 5964 func rewriteValueMIPS64_OpMIPS64SRAVconst(v *Value, config *Config) bool { 5965 b := v.Block 5966 _ = b 5967 // match: (SRAVconst [c] (MOVVconst [d])) 5968 // cond: 5969 // result: (MOVVconst [int64(d)>>uint64(c)]) 5970 for { 5971 c := v.AuxInt 5972 v_0 := v.Args[0] 5973 if v_0.Op != OpMIPS64MOVVconst { 5974 break 5975 } 5976 d := v_0.AuxInt 5977 v.reset(OpMIPS64MOVVconst) 5978 v.AuxInt = int64(d) >> uint64(c) 5979 return true 5980 } 5981 return false 5982 } 5983 func rewriteValueMIPS64_OpMIPS64SRLV(v *Value, config *Config) bool { 5984 b := v.Block 5985 _ = b 5986 // match: (SRLV _ (MOVVconst [c])) 5987 // cond: uint64(c)>=64 5988 // result: (MOVVconst [0]) 5989 for { 5990 v_1 := v.Args[1] 5991 if v_1.Op != OpMIPS64MOVVconst { 5992 break 5993 } 5994 c := v_1.AuxInt 5995 if !(uint64(c) >= 64) { 5996 break 5997 } 5998 v.reset(OpMIPS64MOVVconst) 5999 v.AuxInt = 0 6000 return true 6001 } 6002 // match: (SRLV x (MOVVconst [c])) 6003 // cond: 6004 // result: (SRLVconst x [c]) 6005 for { 6006 x := v.Args[0] 6007 v_1 := v.Args[1] 6008 if v_1.Op != OpMIPS64MOVVconst { 6009 break 6010 } 6011 c := v_1.AuxInt 6012 v.reset(OpMIPS64SRLVconst) 6013 v.AuxInt = c 6014 v.AddArg(x) 6015 return true 6016 } 6017 return false 6018 } 6019 func rewriteValueMIPS64_OpMIPS64SRLVconst(v *Value, config *Config) bool { 6020 b := v.Block 6021 _ = b 6022 // match: (SRLVconst [c] (MOVVconst [d])) 6023 // cond: 6024 // result: (MOVVconst [int64(uint64(d)>>uint64(c))]) 6025 for { 6026 c := v.AuxInt 6027 v_0 := v.Args[0] 6028 if v_0.Op != OpMIPS64MOVVconst { 6029 break 6030 } 6031 d := v_0.AuxInt 6032 v.reset(OpMIPS64MOVVconst) 6033 v.AuxInt = int64(uint64(d) >> uint64(c)) 6034 return true 6035 } 6036 return false 6037 } 6038 func rewriteValueMIPS64_OpMIPS64SUBV(v *Value, config *Config) bool { 6039 b := v.Block 6040 _ = b 6041 // match: (SUBV x (MOVVconst [c])) 6042 // cond: is32Bit(c) 6043 // result: (SUBVconst [c] x) 6044 for { 6045 x := v.Args[0] 6046 v_1 := v.Args[1] 6047 if v_1.Op != OpMIPS64MOVVconst { 6048 break 6049 } 6050 c := v_1.AuxInt 6051 if !(is32Bit(c)) { 6052 break 6053 } 6054 v.reset(OpMIPS64SUBVconst) 6055 v.AuxInt = c 6056 v.AddArg(x) 6057 return true 6058 } 6059 // match: (SUBV x x) 6060 // cond: 6061 // result: (MOVVconst [0]) 6062 for { 6063 x := v.Args[0] 6064 if x != v.Args[1] { 6065 break 6066 } 6067 v.reset(OpMIPS64MOVVconst) 6068 v.AuxInt = 0 6069 return true 6070 } 6071 // match: (SUBV (MOVVconst [0]) x) 6072 // cond: 6073 // result: (NEGV x) 6074 for { 6075 v_0 := v.Args[0] 6076 if v_0.Op != OpMIPS64MOVVconst { 6077 break 6078 } 6079 if v_0.AuxInt != 0 { 6080 break 6081 } 6082 x := v.Args[1] 6083 v.reset(OpMIPS64NEGV) 6084 v.AddArg(x) 6085 return true 6086 } 6087 return false 6088 } 6089 func rewriteValueMIPS64_OpMIPS64SUBVconst(v *Value, config *Config) bool { 6090 b := v.Block 6091 _ = b 6092 // match: (SUBVconst [0] x) 6093 // cond: 6094 // result: x 6095 for { 6096 if v.AuxInt != 0 { 6097 break 6098 } 6099 x := v.Args[0] 6100 v.reset(OpCopy) 6101 v.Type = x.Type 6102 v.AddArg(x) 6103 return true 6104 } 6105 // match: (SUBVconst [c] (MOVVconst [d])) 6106 // cond: 6107 // result: (MOVVconst [d-c]) 6108 for { 6109 c := v.AuxInt 6110 v_0 := v.Args[0] 6111 if v_0.Op != OpMIPS64MOVVconst { 6112 break 6113 } 6114 d := v_0.AuxInt 6115 v.reset(OpMIPS64MOVVconst) 6116 v.AuxInt = d - c 6117 return true 6118 } 6119 // match: (SUBVconst [c] (SUBVconst [d] x)) 6120 // cond: is32Bit(-c-d) 6121 // result: (ADDVconst [-c-d] x) 6122 for { 6123 c := v.AuxInt 6124 v_0 := v.Args[0] 6125 if v_0.Op != OpMIPS64SUBVconst { 6126 break 6127 } 6128 d := v_0.AuxInt 6129 x := v_0.Args[0] 6130 if !(is32Bit(-c - d)) { 6131 break 6132 } 6133 v.reset(OpMIPS64ADDVconst) 6134 v.AuxInt = -c - d 6135 v.AddArg(x) 6136 return true 6137 } 6138 // match: (SUBVconst [c] (ADDVconst [d] x)) 6139 // cond: is32Bit(-c+d) 6140 // result: (ADDVconst [-c+d] x) 6141 for { 6142 c := v.AuxInt 6143 v_0 := v.Args[0] 6144 if v_0.Op != OpMIPS64ADDVconst { 6145 break 6146 } 6147 d := v_0.AuxInt 6148 x := v_0.Args[0] 6149 if !(is32Bit(-c + d)) { 6150 break 6151 } 6152 v.reset(OpMIPS64ADDVconst) 6153 v.AuxInt = -c + d 6154 v.AddArg(x) 6155 return true 6156 } 6157 return false 6158 } 6159 func rewriteValueMIPS64_OpMIPS64XOR(v *Value, config *Config) bool { 6160 b := v.Block 6161 _ = b 6162 // match: (XOR (MOVVconst [c]) x) 6163 // cond: is32Bit(c) 6164 // result: (XORconst [c] x) 6165 for { 6166 v_0 := v.Args[0] 6167 if v_0.Op != OpMIPS64MOVVconst { 6168 break 6169 } 6170 c := v_0.AuxInt 6171 x := v.Args[1] 6172 if !(is32Bit(c)) { 6173 break 6174 } 6175 v.reset(OpMIPS64XORconst) 6176 v.AuxInt = c 6177 v.AddArg(x) 6178 return true 6179 } 6180 // match: (XOR x (MOVVconst [c])) 6181 // cond: is32Bit(c) 6182 // result: (XORconst [c] x) 6183 for { 6184 x := v.Args[0] 6185 v_1 := v.Args[1] 6186 if v_1.Op != OpMIPS64MOVVconst { 6187 break 6188 } 6189 c := v_1.AuxInt 6190 if !(is32Bit(c)) { 6191 break 6192 } 6193 v.reset(OpMIPS64XORconst) 6194 v.AuxInt = c 6195 v.AddArg(x) 6196 return true 6197 } 6198 // match: (XOR x x) 6199 // cond: 6200 // result: (MOVVconst [0]) 6201 for { 6202 x := v.Args[0] 6203 if x != v.Args[1] { 6204 break 6205 } 6206 v.reset(OpMIPS64MOVVconst) 6207 v.AuxInt = 0 6208 return true 6209 } 6210 return false 6211 } 6212 func rewriteValueMIPS64_OpMIPS64XORconst(v *Value, config *Config) bool { 6213 b := v.Block 6214 _ = b 6215 // match: (XORconst [0] x) 6216 // cond: 6217 // result: x 6218 for { 6219 if v.AuxInt != 0 { 6220 break 6221 } 6222 x := v.Args[0] 6223 v.reset(OpCopy) 6224 v.Type = x.Type 6225 v.AddArg(x) 6226 return true 6227 } 6228 // match: (XORconst [-1] x) 6229 // cond: 6230 // result: (NORconst [0] x) 6231 for { 6232 if v.AuxInt != -1 { 6233 break 6234 } 6235 x := v.Args[0] 6236 v.reset(OpMIPS64NORconst) 6237 v.AuxInt = 0 6238 v.AddArg(x) 6239 return true 6240 } 6241 // match: (XORconst [c] (MOVVconst [d])) 6242 // cond: 6243 // result: (MOVVconst [c^d]) 6244 for { 6245 c := v.AuxInt 6246 v_0 := v.Args[0] 6247 if v_0.Op != OpMIPS64MOVVconst { 6248 break 6249 } 6250 d := v_0.AuxInt 6251 v.reset(OpMIPS64MOVVconst) 6252 v.AuxInt = c ^ d 6253 return true 6254 } 6255 // match: (XORconst [c] (XORconst [d] x)) 6256 // cond: is32Bit(c^d) 6257 // result: (XORconst [c^d] x) 6258 for { 6259 c := v.AuxInt 6260 v_0 := v.Args[0] 6261 if v_0.Op != OpMIPS64XORconst { 6262 break 6263 } 6264 d := v_0.AuxInt 6265 x := v_0.Args[0] 6266 if !(is32Bit(c ^ d)) { 6267 break 6268 } 6269 v.reset(OpMIPS64XORconst) 6270 v.AuxInt = c ^ d 6271 v.AddArg(x) 6272 return true 6273 } 6274 return false 6275 } 6276 func rewriteValueMIPS64_OpMod16(v *Value, config *Config) bool { 6277 b := v.Block 6278 _ = b 6279 // match: (Mod16 x y) 6280 // cond: 6281 // result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y))) 6282 for { 6283 x := v.Args[0] 6284 y := v.Args[1] 6285 v.reset(OpSelect0) 6286 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 6287 v1 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 6288 v1.AddArg(x) 6289 v0.AddArg(v1) 6290 v2 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 6291 v2.AddArg(y) 6292 v0.AddArg(v2) 6293 v.AddArg(v0) 6294 return true 6295 } 6296 } 6297 func rewriteValueMIPS64_OpMod16u(v *Value, config *Config) bool { 6298 b := v.Block 6299 _ = b 6300 // match: (Mod16u x y) 6301 // cond: 6302 // result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) 6303 for { 6304 x := v.Args[0] 6305 y := v.Args[1] 6306 v.reset(OpSelect0) 6307 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6308 v1 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 6309 v1.AddArg(x) 6310 v0.AddArg(v1) 6311 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 6312 v2.AddArg(y) 6313 v0.AddArg(v2) 6314 v.AddArg(v0) 6315 return true 6316 } 6317 } 6318 func rewriteValueMIPS64_OpMod32(v *Value, config *Config) bool { 6319 b := v.Block 6320 _ = b 6321 // match: (Mod32 x y) 6322 // cond: 6323 // result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y))) 6324 for { 6325 x := v.Args[0] 6326 y := v.Args[1] 6327 v.reset(OpSelect0) 6328 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 6329 v1 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 6330 v1.AddArg(x) 6331 v0.AddArg(v1) 6332 v2 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 6333 v2.AddArg(y) 6334 v0.AddArg(v2) 6335 v.AddArg(v0) 6336 return true 6337 } 6338 } 6339 func rewriteValueMIPS64_OpMod32u(v *Value, config *Config) bool { 6340 b := v.Block 6341 _ = b 6342 // match: (Mod32u x y) 6343 // cond: 6344 // result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) 6345 for { 6346 x := v.Args[0] 6347 y := v.Args[1] 6348 v.reset(OpSelect0) 6349 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6350 v1 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 6351 v1.AddArg(x) 6352 v0.AddArg(v1) 6353 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 6354 v2.AddArg(y) 6355 v0.AddArg(v2) 6356 v.AddArg(v0) 6357 return true 6358 } 6359 } 6360 func rewriteValueMIPS64_OpMod64(v *Value, config *Config) bool { 6361 b := v.Block 6362 _ = b 6363 // match: (Mod64 x y) 6364 // cond: 6365 // result: (Select0 (DIVV x y)) 6366 for { 6367 x := v.Args[0] 6368 y := v.Args[1] 6369 v.reset(OpSelect0) 6370 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 6371 v0.AddArg(x) 6372 v0.AddArg(y) 6373 v.AddArg(v0) 6374 return true 6375 } 6376 } 6377 func rewriteValueMIPS64_OpMod64u(v *Value, config *Config) bool { 6378 b := v.Block 6379 _ = b 6380 // match: (Mod64u x y) 6381 // cond: 6382 // result: (Select0 (DIVVU x y)) 6383 for { 6384 x := v.Args[0] 6385 y := v.Args[1] 6386 v.reset(OpSelect0) 6387 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6388 v0.AddArg(x) 6389 v0.AddArg(y) 6390 v.AddArg(v0) 6391 return true 6392 } 6393 } 6394 func rewriteValueMIPS64_OpMod8(v *Value, config *Config) bool { 6395 b := v.Block 6396 _ = b 6397 // match: (Mod8 x y) 6398 // cond: 6399 // result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y))) 6400 for { 6401 x := v.Args[0] 6402 y := v.Args[1] 6403 v.reset(OpSelect0) 6404 v0 := b.NewValue0(v.Line, OpMIPS64DIVV, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64())) 6405 v1 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 6406 v1.AddArg(x) 6407 v0.AddArg(v1) 6408 v2 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 6409 v2.AddArg(y) 6410 v0.AddArg(v2) 6411 v.AddArg(v0) 6412 return true 6413 } 6414 } 6415 func rewriteValueMIPS64_OpMod8u(v *Value, config *Config) bool { 6416 b := v.Block 6417 _ = b 6418 // match: (Mod8u x y) 6419 // cond: 6420 // result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) 6421 for { 6422 x := v.Args[0] 6423 y := v.Args[1] 6424 v.reset(OpSelect0) 6425 v0 := b.NewValue0(v.Line, OpMIPS64DIVVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6426 v1 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 6427 v1.AddArg(x) 6428 v0.AddArg(v1) 6429 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 6430 v2.AddArg(y) 6431 v0.AddArg(v2) 6432 v.AddArg(v0) 6433 return true 6434 } 6435 } 6436 func rewriteValueMIPS64_OpMove(v *Value, config *Config) bool { 6437 b := v.Block 6438 _ = b 6439 // match: (Move [s] _ _ mem) 6440 // cond: SizeAndAlign(s).Size() == 0 6441 // result: mem 6442 for { 6443 s := v.AuxInt 6444 mem := v.Args[2] 6445 if !(SizeAndAlign(s).Size() == 0) { 6446 break 6447 } 6448 v.reset(OpCopy) 6449 v.Type = mem.Type 6450 v.AddArg(mem) 6451 return true 6452 } 6453 // match: (Move [s] dst src mem) 6454 // cond: SizeAndAlign(s).Size() == 1 6455 // result: (MOVBstore dst (MOVBload src mem) mem) 6456 for { 6457 s := v.AuxInt 6458 dst := v.Args[0] 6459 src := v.Args[1] 6460 mem := v.Args[2] 6461 if !(SizeAndAlign(s).Size() == 1) { 6462 break 6463 } 6464 v.reset(OpMIPS64MOVBstore) 6465 v.AddArg(dst) 6466 v0 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6467 v0.AddArg(src) 6468 v0.AddArg(mem) 6469 v.AddArg(v0) 6470 v.AddArg(mem) 6471 return true 6472 } 6473 // match: (Move [s] dst src mem) 6474 // cond: SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 6475 // result: (MOVHstore dst (MOVHload src mem) mem) 6476 for { 6477 s := v.AuxInt 6478 dst := v.Args[0] 6479 src := v.Args[1] 6480 mem := v.Args[2] 6481 if !(SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0) { 6482 break 6483 } 6484 v.reset(OpMIPS64MOVHstore) 6485 v.AddArg(dst) 6486 v0 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6487 v0.AddArg(src) 6488 v0.AddArg(mem) 6489 v.AddArg(v0) 6490 v.AddArg(mem) 6491 return true 6492 } 6493 // match: (Move [s] dst src mem) 6494 // cond: SizeAndAlign(s).Size() == 2 6495 // result: (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)) 6496 for { 6497 s := v.AuxInt 6498 dst := v.Args[0] 6499 src := v.Args[1] 6500 mem := v.Args[2] 6501 if !(SizeAndAlign(s).Size() == 2) { 6502 break 6503 } 6504 v.reset(OpMIPS64MOVBstore) 6505 v.AuxInt = 1 6506 v.AddArg(dst) 6507 v0 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6508 v0.AuxInt = 1 6509 v0.AddArg(src) 6510 v0.AddArg(mem) 6511 v.AddArg(v0) 6512 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6513 v1.AddArg(dst) 6514 v2 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6515 v2.AddArg(src) 6516 v2.AddArg(mem) 6517 v1.AddArg(v2) 6518 v1.AddArg(mem) 6519 v.AddArg(v1) 6520 return true 6521 } 6522 // match: (Move [s] dst src mem) 6523 // cond: SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 6524 // result: (MOVWstore dst (MOVWload src mem) mem) 6525 for { 6526 s := v.AuxInt 6527 dst := v.Args[0] 6528 src := v.Args[1] 6529 mem := v.Args[2] 6530 if !(SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0) { 6531 break 6532 } 6533 v.reset(OpMIPS64MOVWstore) 6534 v.AddArg(dst) 6535 v0 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6536 v0.AddArg(src) 6537 v0.AddArg(mem) 6538 v.AddArg(v0) 6539 v.AddArg(mem) 6540 return true 6541 } 6542 // match: (Move [s] dst src mem) 6543 // cond: SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 6544 // result: (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)) 6545 for { 6546 s := v.AuxInt 6547 dst := v.Args[0] 6548 src := v.Args[1] 6549 mem := v.Args[2] 6550 if !(SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0) { 6551 break 6552 } 6553 v.reset(OpMIPS64MOVHstore) 6554 v.AuxInt = 2 6555 v.AddArg(dst) 6556 v0 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6557 v0.AuxInt = 2 6558 v0.AddArg(src) 6559 v0.AddArg(mem) 6560 v.AddArg(v0) 6561 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6562 v1.AddArg(dst) 6563 v2 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6564 v2.AddArg(src) 6565 v2.AddArg(mem) 6566 v1.AddArg(v2) 6567 v1.AddArg(mem) 6568 v.AddArg(v1) 6569 return true 6570 } 6571 // match: (Move [s] dst src mem) 6572 // cond: SizeAndAlign(s).Size() == 4 6573 // result: (MOVBstore [3] dst (MOVBload [3] src mem) (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)))) 6574 for { 6575 s := v.AuxInt 6576 dst := v.Args[0] 6577 src := v.Args[1] 6578 mem := v.Args[2] 6579 if !(SizeAndAlign(s).Size() == 4) { 6580 break 6581 } 6582 v.reset(OpMIPS64MOVBstore) 6583 v.AuxInt = 3 6584 v.AddArg(dst) 6585 v0 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6586 v0.AuxInt = 3 6587 v0.AddArg(src) 6588 v0.AddArg(mem) 6589 v.AddArg(v0) 6590 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6591 v1.AuxInt = 2 6592 v1.AddArg(dst) 6593 v2 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6594 v2.AuxInt = 2 6595 v2.AddArg(src) 6596 v2.AddArg(mem) 6597 v1.AddArg(v2) 6598 v3 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6599 v3.AuxInt = 1 6600 v3.AddArg(dst) 6601 v4 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6602 v4.AuxInt = 1 6603 v4.AddArg(src) 6604 v4.AddArg(mem) 6605 v3.AddArg(v4) 6606 v5 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6607 v5.AddArg(dst) 6608 v6 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6609 v6.AddArg(src) 6610 v6.AddArg(mem) 6611 v5.AddArg(v6) 6612 v5.AddArg(mem) 6613 v3.AddArg(v5) 6614 v1.AddArg(v3) 6615 v.AddArg(v1) 6616 return true 6617 } 6618 // match: (Move [s] dst src mem) 6619 // cond: SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%8 == 0 6620 // result: (MOVVstore dst (MOVVload src mem) mem) 6621 for { 6622 s := v.AuxInt 6623 dst := v.Args[0] 6624 src := v.Args[1] 6625 mem := v.Args[2] 6626 if !(SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%8 == 0) { 6627 break 6628 } 6629 v.reset(OpMIPS64MOVVstore) 6630 v.AddArg(dst) 6631 v0 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6632 v0.AddArg(src) 6633 v0.AddArg(mem) 6634 v.AddArg(v0) 6635 v.AddArg(mem) 6636 return true 6637 } 6638 // match: (Move [s] dst src mem) 6639 // cond: SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%4 == 0 6640 // result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)) 6641 for { 6642 s := v.AuxInt 6643 dst := v.Args[0] 6644 src := v.Args[1] 6645 mem := v.Args[2] 6646 if !(SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%4 == 0) { 6647 break 6648 } 6649 v.reset(OpMIPS64MOVWstore) 6650 v.AuxInt = 4 6651 v.AddArg(dst) 6652 v0 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6653 v0.AuxInt = 4 6654 v0.AddArg(src) 6655 v0.AddArg(mem) 6656 v.AddArg(v0) 6657 v1 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 6658 v1.AddArg(dst) 6659 v2 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6660 v2.AddArg(src) 6661 v2.AddArg(mem) 6662 v1.AddArg(v2) 6663 v1.AddArg(mem) 6664 v.AddArg(v1) 6665 return true 6666 } 6667 // match: (Move [s] dst src mem) 6668 // cond: SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%2 == 0 6669 // result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))) 6670 for { 6671 s := v.AuxInt 6672 dst := v.Args[0] 6673 src := v.Args[1] 6674 mem := v.Args[2] 6675 if !(SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%2 == 0) { 6676 break 6677 } 6678 v.reset(OpMIPS64MOVHstore) 6679 v.AuxInt = 6 6680 v.AddArg(dst) 6681 v0 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6682 v0.AuxInt = 6 6683 v0.AddArg(src) 6684 v0.AddArg(mem) 6685 v.AddArg(v0) 6686 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6687 v1.AuxInt = 4 6688 v1.AddArg(dst) 6689 v2 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6690 v2.AuxInt = 4 6691 v2.AddArg(src) 6692 v2.AddArg(mem) 6693 v1.AddArg(v2) 6694 v3 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6695 v3.AuxInt = 2 6696 v3.AddArg(dst) 6697 v4 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6698 v4.AuxInt = 2 6699 v4.AddArg(src) 6700 v4.AddArg(mem) 6701 v3.AddArg(v4) 6702 v5 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6703 v5.AddArg(dst) 6704 v6 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6705 v6.AddArg(src) 6706 v6.AddArg(mem) 6707 v5.AddArg(v6) 6708 v5.AddArg(mem) 6709 v3.AddArg(v5) 6710 v1.AddArg(v3) 6711 v.AddArg(v1) 6712 return true 6713 } 6714 // match: (Move [s] dst src mem) 6715 // cond: SizeAndAlign(s).Size() == 3 6716 // result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))) 6717 for { 6718 s := v.AuxInt 6719 dst := v.Args[0] 6720 src := v.Args[1] 6721 mem := v.Args[2] 6722 if !(SizeAndAlign(s).Size() == 3) { 6723 break 6724 } 6725 v.reset(OpMIPS64MOVBstore) 6726 v.AuxInt = 2 6727 v.AddArg(dst) 6728 v0 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6729 v0.AuxInt = 2 6730 v0.AddArg(src) 6731 v0.AddArg(mem) 6732 v.AddArg(v0) 6733 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6734 v1.AuxInt = 1 6735 v1.AddArg(dst) 6736 v2 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6737 v2.AuxInt = 1 6738 v2.AddArg(src) 6739 v2.AddArg(mem) 6740 v1.AddArg(v2) 6741 v3 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 6742 v3.AddArg(dst) 6743 v4 := b.NewValue0(v.Line, OpMIPS64MOVBload, config.fe.TypeInt8()) 6744 v4.AddArg(src) 6745 v4.AddArg(mem) 6746 v3.AddArg(v4) 6747 v3.AddArg(mem) 6748 v1.AddArg(v3) 6749 v.AddArg(v1) 6750 return true 6751 } 6752 // match: (Move [s] dst src mem) 6753 // cond: SizeAndAlign(s).Size() == 6 && SizeAndAlign(s).Align()%2 == 0 6754 // result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))) 6755 for { 6756 s := v.AuxInt 6757 dst := v.Args[0] 6758 src := v.Args[1] 6759 mem := v.Args[2] 6760 if !(SizeAndAlign(s).Size() == 6 && SizeAndAlign(s).Align()%2 == 0) { 6761 break 6762 } 6763 v.reset(OpMIPS64MOVHstore) 6764 v.AuxInt = 4 6765 v.AddArg(dst) 6766 v0 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6767 v0.AuxInt = 4 6768 v0.AddArg(src) 6769 v0.AddArg(mem) 6770 v.AddArg(v0) 6771 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6772 v1.AuxInt = 2 6773 v1.AddArg(dst) 6774 v2 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6775 v2.AuxInt = 2 6776 v2.AddArg(src) 6777 v2.AddArg(mem) 6778 v1.AddArg(v2) 6779 v3 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 6780 v3.AddArg(dst) 6781 v4 := b.NewValue0(v.Line, OpMIPS64MOVHload, config.fe.TypeInt16()) 6782 v4.AddArg(src) 6783 v4.AddArg(mem) 6784 v3.AddArg(v4) 6785 v3.AddArg(mem) 6786 v1.AddArg(v3) 6787 v.AddArg(v1) 6788 return true 6789 } 6790 // match: (Move [s] dst src mem) 6791 // cond: SizeAndAlign(s).Size() == 12 && SizeAndAlign(s).Align()%4 == 0 6792 // result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))) 6793 for { 6794 s := v.AuxInt 6795 dst := v.Args[0] 6796 src := v.Args[1] 6797 mem := v.Args[2] 6798 if !(SizeAndAlign(s).Size() == 12 && SizeAndAlign(s).Align()%4 == 0) { 6799 break 6800 } 6801 v.reset(OpMIPS64MOVWstore) 6802 v.AuxInt = 8 6803 v.AddArg(dst) 6804 v0 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6805 v0.AuxInt = 8 6806 v0.AddArg(src) 6807 v0.AddArg(mem) 6808 v.AddArg(v0) 6809 v1 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 6810 v1.AuxInt = 4 6811 v1.AddArg(dst) 6812 v2 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6813 v2.AuxInt = 4 6814 v2.AddArg(src) 6815 v2.AddArg(mem) 6816 v1.AddArg(v2) 6817 v3 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 6818 v3.AddArg(dst) 6819 v4 := b.NewValue0(v.Line, OpMIPS64MOVWload, config.fe.TypeInt32()) 6820 v4.AddArg(src) 6821 v4.AddArg(mem) 6822 v3.AddArg(v4) 6823 v3.AddArg(mem) 6824 v1.AddArg(v3) 6825 v.AddArg(v1) 6826 return true 6827 } 6828 // match: (Move [s] dst src mem) 6829 // cond: SizeAndAlign(s).Size() == 16 && SizeAndAlign(s).Align()%8 == 0 6830 // result: (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem)) 6831 for { 6832 s := v.AuxInt 6833 dst := v.Args[0] 6834 src := v.Args[1] 6835 mem := v.Args[2] 6836 if !(SizeAndAlign(s).Size() == 16 && SizeAndAlign(s).Align()%8 == 0) { 6837 break 6838 } 6839 v.reset(OpMIPS64MOVVstore) 6840 v.AuxInt = 8 6841 v.AddArg(dst) 6842 v0 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6843 v0.AuxInt = 8 6844 v0.AddArg(src) 6845 v0.AddArg(mem) 6846 v.AddArg(v0) 6847 v1 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 6848 v1.AddArg(dst) 6849 v2 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6850 v2.AddArg(src) 6851 v2.AddArg(mem) 6852 v1.AddArg(v2) 6853 v1.AddArg(mem) 6854 v.AddArg(v1) 6855 return true 6856 } 6857 // match: (Move [s] dst src mem) 6858 // cond: SizeAndAlign(s).Size() == 24 && SizeAndAlign(s).Align()%8 == 0 6859 // result: (MOVVstore [16] dst (MOVVload [16] src mem) (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem))) 6860 for { 6861 s := v.AuxInt 6862 dst := v.Args[0] 6863 src := v.Args[1] 6864 mem := v.Args[2] 6865 if !(SizeAndAlign(s).Size() == 24 && SizeAndAlign(s).Align()%8 == 0) { 6866 break 6867 } 6868 v.reset(OpMIPS64MOVVstore) 6869 v.AuxInt = 16 6870 v.AddArg(dst) 6871 v0 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6872 v0.AuxInt = 16 6873 v0.AddArg(src) 6874 v0.AddArg(mem) 6875 v.AddArg(v0) 6876 v1 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 6877 v1.AuxInt = 8 6878 v1.AddArg(dst) 6879 v2 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6880 v2.AuxInt = 8 6881 v2.AddArg(src) 6882 v2.AddArg(mem) 6883 v1.AddArg(v2) 6884 v3 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 6885 v3.AddArg(dst) 6886 v4 := b.NewValue0(v.Line, OpMIPS64MOVVload, config.fe.TypeUInt64()) 6887 v4.AddArg(src) 6888 v4.AddArg(mem) 6889 v3.AddArg(v4) 6890 v3.AddArg(mem) 6891 v1.AddArg(v3) 6892 v.AddArg(v1) 6893 return true 6894 } 6895 // match: (Move [s] dst src mem) 6896 // cond: SizeAndAlign(s).Size() > 24 || SizeAndAlign(s).Align()%8 != 0 6897 // result: (LoweredMove [SizeAndAlign(s).Align()] dst src (ADDVconst <src.Type> src [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) mem) 6898 for { 6899 s := v.AuxInt 6900 dst := v.Args[0] 6901 src := v.Args[1] 6902 mem := v.Args[2] 6903 if !(SizeAndAlign(s).Size() > 24 || SizeAndAlign(s).Align()%8 != 0) { 6904 break 6905 } 6906 v.reset(OpMIPS64LoweredMove) 6907 v.AuxInt = SizeAndAlign(s).Align() 6908 v.AddArg(dst) 6909 v.AddArg(src) 6910 v0 := b.NewValue0(v.Line, OpMIPS64ADDVconst, src.Type) 6911 v0.AuxInt = SizeAndAlign(s).Size() - moveSize(SizeAndAlign(s).Align(), config) 6912 v0.AddArg(src) 6913 v.AddArg(v0) 6914 v.AddArg(mem) 6915 return true 6916 } 6917 return false 6918 } 6919 func rewriteValueMIPS64_OpMul16(v *Value, config *Config) bool { 6920 b := v.Block 6921 _ = b 6922 // match: (Mul16 x y) 6923 // cond: 6924 // result: (Select1 (MULVU x y)) 6925 for { 6926 x := v.Args[0] 6927 y := v.Args[1] 6928 v.reset(OpSelect1) 6929 v0 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6930 v0.AddArg(x) 6931 v0.AddArg(y) 6932 v.AddArg(v0) 6933 return true 6934 } 6935 } 6936 func rewriteValueMIPS64_OpMul32(v *Value, config *Config) bool { 6937 b := v.Block 6938 _ = b 6939 // match: (Mul32 x y) 6940 // cond: 6941 // result: (Select1 (MULVU x y)) 6942 for { 6943 x := v.Args[0] 6944 y := v.Args[1] 6945 v.reset(OpSelect1) 6946 v0 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6947 v0.AddArg(x) 6948 v0.AddArg(y) 6949 v.AddArg(v0) 6950 return true 6951 } 6952 } 6953 func rewriteValueMIPS64_OpMul32F(v *Value, config *Config) bool { 6954 b := v.Block 6955 _ = b 6956 // match: (Mul32F x y) 6957 // cond: 6958 // result: (MULF x y) 6959 for { 6960 x := v.Args[0] 6961 y := v.Args[1] 6962 v.reset(OpMIPS64MULF) 6963 v.AddArg(x) 6964 v.AddArg(y) 6965 return true 6966 } 6967 } 6968 func rewriteValueMIPS64_OpMul64(v *Value, config *Config) bool { 6969 b := v.Block 6970 _ = b 6971 // match: (Mul64 x y) 6972 // cond: 6973 // result: (Select1 (MULVU x y)) 6974 for { 6975 x := v.Args[0] 6976 y := v.Args[1] 6977 v.reset(OpSelect1) 6978 v0 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 6979 v0.AddArg(x) 6980 v0.AddArg(y) 6981 v.AddArg(v0) 6982 return true 6983 } 6984 } 6985 func rewriteValueMIPS64_OpMul64F(v *Value, config *Config) bool { 6986 b := v.Block 6987 _ = b 6988 // match: (Mul64F x y) 6989 // cond: 6990 // result: (MULD x y) 6991 for { 6992 x := v.Args[0] 6993 y := v.Args[1] 6994 v.reset(OpMIPS64MULD) 6995 v.AddArg(x) 6996 v.AddArg(y) 6997 return true 6998 } 6999 } 7000 func rewriteValueMIPS64_OpMul8(v *Value, config *Config) bool { 7001 b := v.Block 7002 _ = b 7003 // match: (Mul8 x y) 7004 // cond: 7005 // result: (Select1 (MULVU x y)) 7006 for { 7007 x := v.Args[0] 7008 y := v.Args[1] 7009 v.reset(OpSelect1) 7010 v0 := b.NewValue0(v.Line, OpMIPS64MULVU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64())) 7011 v0.AddArg(x) 7012 v0.AddArg(y) 7013 v.AddArg(v0) 7014 return true 7015 } 7016 } 7017 func rewriteValueMIPS64_OpNeg16(v *Value, config *Config) bool { 7018 b := v.Block 7019 _ = b 7020 // match: (Neg16 x) 7021 // cond: 7022 // result: (NEGV x) 7023 for { 7024 x := v.Args[0] 7025 v.reset(OpMIPS64NEGV) 7026 v.AddArg(x) 7027 return true 7028 } 7029 } 7030 func rewriteValueMIPS64_OpNeg32(v *Value, config *Config) bool { 7031 b := v.Block 7032 _ = b 7033 // match: (Neg32 x) 7034 // cond: 7035 // result: (NEGV x) 7036 for { 7037 x := v.Args[0] 7038 v.reset(OpMIPS64NEGV) 7039 v.AddArg(x) 7040 return true 7041 } 7042 } 7043 func rewriteValueMIPS64_OpNeg32F(v *Value, config *Config) bool { 7044 b := v.Block 7045 _ = b 7046 // match: (Neg32F x) 7047 // cond: 7048 // result: (NEGF x) 7049 for { 7050 x := v.Args[0] 7051 v.reset(OpMIPS64NEGF) 7052 v.AddArg(x) 7053 return true 7054 } 7055 } 7056 func rewriteValueMIPS64_OpNeg64(v *Value, config *Config) bool { 7057 b := v.Block 7058 _ = b 7059 // match: (Neg64 x) 7060 // cond: 7061 // result: (NEGV x) 7062 for { 7063 x := v.Args[0] 7064 v.reset(OpMIPS64NEGV) 7065 v.AddArg(x) 7066 return true 7067 } 7068 } 7069 func rewriteValueMIPS64_OpNeg64F(v *Value, config *Config) bool { 7070 b := v.Block 7071 _ = b 7072 // match: (Neg64F x) 7073 // cond: 7074 // result: (NEGD x) 7075 for { 7076 x := v.Args[0] 7077 v.reset(OpMIPS64NEGD) 7078 v.AddArg(x) 7079 return true 7080 } 7081 } 7082 func rewriteValueMIPS64_OpNeg8(v *Value, config *Config) bool { 7083 b := v.Block 7084 _ = b 7085 // match: (Neg8 x) 7086 // cond: 7087 // result: (NEGV x) 7088 for { 7089 x := v.Args[0] 7090 v.reset(OpMIPS64NEGV) 7091 v.AddArg(x) 7092 return true 7093 } 7094 } 7095 func rewriteValueMIPS64_OpNeq16(v *Value, config *Config) bool { 7096 b := v.Block 7097 _ = b 7098 // match: (Neq16 x y) 7099 // cond: 7100 // result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to64 y)) (MOVVconst [0])) 7101 for { 7102 x := v.Args[0] 7103 y := v.Args[1] 7104 v.reset(OpMIPS64SGTU) 7105 v0 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 7106 v1 := b.NewValue0(v.Line, OpZeroExt16to32, config.fe.TypeUInt32()) 7107 v1.AddArg(x) 7108 v0.AddArg(v1) 7109 v2 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7110 v2.AddArg(y) 7111 v0.AddArg(v2) 7112 v.AddArg(v0) 7113 v3 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7114 v3.AuxInt = 0 7115 v.AddArg(v3) 7116 return true 7117 } 7118 } 7119 func rewriteValueMIPS64_OpNeq32(v *Value, config *Config) bool { 7120 b := v.Block 7121 _ = b 7122 // match: (Neq32 x y) 7123 // cond: 7124 // result: (SGTU (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)) (MOVVconst [0])) 7125 for { 7126 x := v.Args[0] 7127 y := v.Args[1] 7128 v.reset(OpMIPS64SGTU) 7129 v0 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 7130 v1 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7131 v1.AddArg(x) 7132 v0.AddArg(v1) 7133 v2 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7134 v2.AddArg(y) 7135 v0.AddArg(v2) 7136 v.AddArg(v0) 7137 v3 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7138 v3.AuxInt = 0 7139 v.AddArg(v3) 7140 return true 7141 } 7142 } 7143 func rewriteValueMIPS64_OpNeq32F(v *Value, config *Config) bool { 7144 b := v.Block 7145 _ = b 7146 // match: (Neq32F x y) 7147 // cond: 7148 // result: (FPFlagFalse (CMPEQF x y)) 7149 for { 7150 x := v.Args[0] 7151 y := v.Args[1] 7152 v.reset(OpMIPS64FPFlagFalse) 7153 v0 := b.NewValue0(v.Line, OpMIPS64CMPEQF, TypeFlags) 7154 v0.AddArg(x) 7155 v0.AddArg(y) 7156 v.AddArg(v0) 7157 return true 7158 } 7159 } 7160 func rewriteValueMIPS64_OpNeq64(v *Value, config *Config) bool { 7161 b := v.Block 7162 _ = b 7163 // match: (Neq64 x y) 7164 // cond: 7165 // result: (SGTU (XOR x y) (MOVVconst [0])) 7166 for { 7167 x := v.Args[0] 7168 y := v.Args[1] 7169 v.reset(OpMIPS64SGTU) 7170 v0 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 7171 v0.AddArg(x) 7172 v0.AddArg(y) 7173 v.AddArg(v0) 7174 v1 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7175 v1.AuxInt = 0 7176 v.AddArg(v1) 7177 return true 7178 } 7179 } 7180 func rewriteValueMIPS64_OpNeq64F(v *Value, config *Config) bool { 7181 b := v.Block 7182 _ = b 7183 // match: (Neq64F x y) 7184 // cond: 7185 // result: (FPFlagFalse (CMPEQD x y)) 7186 for { 7187 x := v.Args[0] 7188 y := v.Args[1] 7189 v.reset(OpMIPS64FPFlagFalse) 7190 v0 := b.NewValue0(v.Line, OpMIPS64CMPEQD, TypeFlags) 7191 v0.AddArg(x) 7192 v0.AddArg(y) 7193 v.AddArg(v0) 7194 return true 7195 } 7196 } 7197 func rewriteValueMIPS64_OpNeq8(v *Value, config *Config) bool { 7198 b := v.Block 7199 _ = b 7200 // match: (Neq8 x y) 7201 // cond: 7202 // result: (SGTU (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)) (MOVVconst [0])) 7203 for { 7204 x := v.Args[0] 7205 y := v.Args[1] 7206 v.reset(OpMIPS64SGTU) 7207 v0 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 7208 v1 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7209 v1.AddArg(x) 7210 v0.AddArg(v1) 7211 v2 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7212 v2.AddArg(y) 7213 v0.AddArg(v2) 7214 v.AddArg(v0) 7215 v3 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7216 v3.AuxInt = 0 7217 v.AddArg(v3) 7218 return true 7219 } 7220 } 7221 func rewriteValueMIPS64_OpNeqB(v *Value, config *Config) bool { 7222 b := v.Block 7223 _ = b 7224 // match: (NeqB x y) 7225 // cond: 7226 // result: (XOR x y) 7227 for { 7228 x := v.Args[0] 7229 y := v.Args[1] 7230 v.reset(OpMIPS64XOR) 7231 v.AddArg(x) 7232 v.AddArg(y) 7233 return true 7234 } 7235 } 7236 func rewriteValueMIPS64_OpNeqPtr(v *Value, config *Config) bool { 7237 b := v.Block 7238 _ = b 7239 // match: (NeqPtr x y) 7240 // cond: 7241 // result: (SGTU (XOR x y) (MOVVconst [0])) 7242 for { 7243 x := v.Args[0] 7244 y := v.Args[1] 7245 v.reset(OpMIPS64SGTU) 7246 v0 := b.NewValue0(v.Line, OpMIPS64XOR, config.fe.TypeUInt64()) 7247 v0.AddArg(x) 7248 v0.AddArg(y) 7249 v.AddArg(v0) 7250 v1 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7251 v1.AuxInt = 0 7252 v.AddArg(v1) 7253 return true 7254 } 7255 } 7256 func rewriteValueMIPS64_OpNilCheck(v *Value, config *Config) bool { 7257 b := v.Block 7258 _ = b 7259 // match: (NilCheck ptr mem) 7260 // cond: 7261 // result: (LoweredNilCheck ptr mem) 7262 for { 7263 ptr := v.Args[0] 7264 mem := v.Args[1] 7265 v.reset(OpMIPS64LoweredNilCheck) 7266 v.AddArg(ptr) 7267 v.AddArg(mem) 7268 return true 7269 } 7270 } 7271 func rewriteValueMIPS64_OpNot(v *Value, config *Config) bool { 7272 b := v.Block 7273 _ = b 7274 // match: (Not x) 7275 // cond: 7276 // result: (XOR (MOVVconst [1]) x) 7277 for { 7278 x := v.Args[0] 7279 v.reset(OpMIPS64XOR) 7280 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 7281 v0.AuxInt = 1 7282 v.AddArg(v0) 7283 v.AddArg(x) 7284 return true 7285 } 7286 } 7287 func rewriteValueMIPS64_OpOffPtr(v *Value, config *Config) bool { 7288 b := v.Block 7289 _ = b 7290 // match: (OffPtr [off] ptr:(SP)) 7291 // cond: 7292 // result: (MOVVaddr [off] ptr) 7293 for { 7294 off := v.AuxInt 7295 ptr := v.Args[0] 7296 if ptr.Op != OpSP { 7297 break 7298 } 7299 v.reset(OpMIPS64MOVVaddr) 7300 v.AuxInt = off 7301 v.AddArg(ptr) 7302 return true 7303 } 7304 // match: (OffPtr [off] ptr) 7305 // cond: 7306 // result: (ADDVconst [off] ptr) 7307 for { 7308 off := v.AuxInt 7309 ptr := v.Args[0] 7310 v.reset(OpMIPS64ADDVconst) 7311 v.AuxInt = off 7312 v.AddArg(ptr) 7313 return true 7314 } 7315 } 7316 func rewriteValueMIPS64_OpOr16(v *Value, config *Config) bool { 7317 b := v.Block 7318 _ = b 7319 // match: (Or16 x y) 7320 // cond: 7321 // result: (OR x y) 7322 for { 7323 x := v.Args[0] 7324 y := v.Args[1] 7325 v.reset(OpMIPS64OR) 7326 v.AddArg(x) 7327 v.AddArg(y) 7328 return true 7329 } 7330 } 7331 func rewriteValueMIPS64_OpOr32(v *Value, config *Config) bool { 7332 b := v.Block 7333 _ = b 7334 // match: (Or32 x y) 7335 // cond: 7336 // result: (OR x y) 7337 for { 7338 x := v.Args[0] 7339 y := v.Args[1] 7340 v.reset(OpMIPS64OR) 7341 v.AddArg(x) 7342 v.AddArg(y) 7343 return true 7344 } 7345 } 7346 func rewriteValueMIPS64_OpOr64(v *Value, config *Config) bool { 7347 b := v.Block 7348 _ = b 7349 // match: (Or64 x y) 7350 // cond: 7351 // result: (OR x y) 7352 for { 7353 x := v.Args[0] 7354 y := v.Args[1] 7355 v.reset(OpMIPS64OR) 7356 v.AddArg(x) 7357 v.AddArg(y) 7358 return true 7359 } 7360 } 7361 func rewriteValueMIPS64_OpOr8(v *Value, config *Config) bool { 7362 b := v.Block 7363 _ = b 7364 // match: (Or8 x y) 7365 // cond: 7366 // result: (OR x y) 7367 for { 7368 x := v.Args[0] 7369 y := v.Args[1] 7370 v.reset(OpMIPS64OR) 7371 v.AddArg(x) 7372 v.AddArg(y) 7373 return true 7374 } 7375 } 7376 func rewriteValueMIPS64_OpOrB(v *Value, config *Config) bool { 7377 b := v.Block 7378 _ = b 7379 // match: (OrB x y) 7380 // cond: 7381 // result: (OR x y) 7382 for { 7383 x := v.Args[0] 7384 y := v.Args[1] 7385 v.reset(OpMIPS64OR) 7386 v.AddArg(x) 7387 v.AddArg(y) 7388 return true 7389 } 7390 } 7391 func rewriteValueMIPS64_OpRsh16Ux16(v *Value, config *Config) bool { 7392 b := v.Block 7393 _ = b 7394 // match: (Rsh16Ux16 <t> x y) 7395 // cond: 7396 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt16to64 y))) 7397 for { 7398 t := v.Type 7399 x := v.Args[0] 7400 y := v.Args[1] 7401 v.reset(OpMIPS64AND) 7402 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7403 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7404 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7405 v2.AuxInt = 64 7406 v1.AddArg(v2) 7407 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7408 v3.AddArg(y) 7409 v1.AddArg(v3) 7410 v0.AddArg(v1) 7411 v.AddArg(v0) 7412 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7413 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7414 v5.AddArg(x) 7415 v4.AddArg(v5) 7416 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7417 v6.AddArg(y) 7418 v4.AddArg(v6) 7419 v.AddArg(v4) 7420 return true 7421 } 7422 } 7423 func rewriteValueMIPS64_OpRsh16Ux32(v *Value, config *Config) bool { 7424 b := v.Block 7425 _ = b 7426 // match: (Rsh16Ux32 <t> x y) 7427 // cond: 7428 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt32to64 y))) 7429 for { 7430 t := v.Type 7431 x := v.Args[0] 7432 y := v.Args[1] 7433 v.reset(OpMIPS64AND) 7434 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7435 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7436 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7437 v2.AuxInt = 64 7438 v1.AddArg(v2) 7439 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7440 v3.AddArg(y) 7441 v1.AddArg(v3) 7442 v0.AddArg(v1) 7443 v.AddArg(v0) 7444 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7445 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7446 v5.AddArg(x) 7447 v4.AddArg(v5) 7448 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7449 v6.AddArg(y) 7450 v4.AddArg(v6) 7451 v.AddArg(v4) 7452 return true 7453 } 7454 } 7455 func rewriteValueMIPS64_OpRsh16Ux64(v *Value, config *Config) bool { 7456 b := v.Block 7457 _ = b 7458 // match: (Rsh16Ux64 <t> x y) 7459 // cond: 7460 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SRLV <t> (ZeroExt16to64 x) y)) 7461 for { 7462 t := v.Type 7463 x := v.Args[0] 7464 y := v.Args[1] 7465 v.reset(OpMIPS64AND) 7466 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7467 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7468 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7469 v2.AuxInt = 64 7470 v1.AddArg(v2) 7471 v1.AddArg(y) 7472 v0.AddArg(v1) 7473 v.AddArg(v0) 7474 v3 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7475 v4 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7476 v4.AddArg(x) 7477 v3.AddArg(v4) 7478 v3.AddArg(y) 7479 v.AddArg(v3) 7480 return true 7481 } 7482 } 7483 func rewriteValueMIPS64_OpRsh16Ux8(v *Value, config *Config) bool { 7484 b := v.Block 7485 _ = b 7486 // match: (Rsh16Ux8 <t> x y) 7487 // cond: 7488 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt8to64 y))) 7489 for { 7490 t := v.Type 7491 x := v.Args[0] 7492 y := v.Args[1] 7493 v.reset(OpMIPS64AND) 7494 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7495 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7496 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7497 v2.AuxInt = 64 7498 v1.AddArg(v2) 7499 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7500 v3.AddArg(y) 7501 v1.AddArg(v3) 7502 v0.AddArg(v1) 7503 v.AddArg(v0) 7504 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7505 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7506 v5.AddArg(x) 7507 v4.AddArg(v5) 7508 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7509 v6.AddArg(y) 7510 v4.AddArg(v6) 7511 v.AddArg(v4) 7512 return true 7513 } 7514 } 7515 func rewriteValueMIPS64_OpRsh16x16(v *Value, config *Config) bool { 7516 b := v.Block 7517 _ = b 7518 // match: (Rsh16x16 <t> x y) 7519 // cond: 7520 // result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt16to64 y))) 7521 for { 7522 t := v.Type 7523 x := v.Args[0] 7524 y := v.Args[1] 7525 v.reset(OpMIPS64SRAV) 7526 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 7527 v0.AddArg(x) 7528 v.AddArg(v0) 7529 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7530 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7531 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7532 v4 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7533 v4.AddArg(y) 7534 v3.AddArg(v4) 7535 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7536 v5.AuxInt = 63 7537 v3.AddArg(v5) 7538 v2.AddArg(v3) 7539 v1.AddArg(v2) 7540 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7541 v6.AddArg(y) 7542 v1.AddArg(v6) 7543 v.AddArg(v1) 7544 return true 7545 } 7546 } 7547 func rewriteValueMIPS64_OpRsh16x32(v *Value, config *Config) bool { 7548 b := v.Block 7549 _ = b 7550 // match: (Rsh16x32 <t> x y) 7551 // cond: 7552 // result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt32to64 y))) 7553 for { 7554 t := v.Type 7555 x := v.Args[0] 7556 y := v.Args[1] 7557 v.reset(OpMIPS64SRAV) 7558 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 7559 v0.AddArg(x) 7560 v.AddArg(v0) 7561 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7562 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7563 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7564 v4 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7565 v4.AddArg(y) 7566 v3.AddArg(v4) 7567 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7568 v5.AuxInt = 63 7569 v3.AddArg(v5) 7570 v2.AddArg(v3) 7571 v1.AddArg(v2) 7572 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7573 v6.AddArg(y) 7574 v1.AddArg(v6) 7575 v.AddArg(v1) 7576 return true 7577 } 7578 } 7579 func rewriteValueMIPS64_OpRsh16x64(v *Value, config *Config) bool { 7580 b := v.Block 7581 _ = b 7582 // match: (Rsh16x64 <t> x y) 7583 // cond: 7584 // result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <config.fe.TypeUInt64()> [63]))) y)) 7585 for { 7586 t := v.Type 7587 x := v.Args[0] 7588 y := v.Args[1] 7589 v.reset(OpMIPS64SRAV) 7590 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 7591 v0.AddArg(x) 7592 v.AddArg(v0) 7593 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7594 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7595 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7596 v3.AddArg(y) 7597 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7598 v4.AuxInt = 63 7599 v3.AddArg(v4) 7600 v2.AddArg(v3) 7601 v1.AddArg(v2) 7602 v1.AddArg(y) 7603 v.AddArg(v1) 7604 return true 7605 } 7606 } 7607 func rewriteValueMIPS64_OpRsh16x8(v *Value, config *Config) bool { 7608 b := v.Block 7609 _ = b 7610 // match: (Rsh16x8 <t> x y) 7611 // cond: 7612 // result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt8to64 y))) 7613 for { 7614 t := v.Type 7615 x := v.Args[0] 7616 y := v.Args[1] 7617 v.reset(OpMIPS64SRAV) 7618 v0 := b.NewValue0(v.Line, OpSignExt16to64, config.fe.TypeInt64()) 7619 v0.AddArg(x) 7620 v.AddArg(v0) 7621 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7622 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7623 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7624 v4 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7625 v4.AddArg(y) 7626 v3.AddArg(v4) 7627 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7628 v5.AuxInt = 63 7629 v3.AddArg(v5) 7630 v2.AddArg(v3) 7631 v1.AddArg(v2) 7632 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7633 v6.AddArg(y) 7634 v1.AddArg(v6) 7635 v.AddArg(v1) 7636 return true 7637 } 7638 } 7639 func rewriteValueMIPS64_OpRsh32Ux16(v *Value, config *Config) bool { 7640 b := v.Block 7641 _ = b 7642 // match: (Rsh32Ux16 <t> x y) 7643 // cond: 7644 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt16to64 y))) 7645 for { 7646 t := v.Type 7647 x := v.Args[0] 7648 y := v.Args[1] 7649 v.reset(OpMIPS64AND) 7650 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7651 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7652 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7653 v2.AuxInt = 64 7654 v1.AddArg(v2) 7655 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7656 v3.AddArg(y) 7657 v1.AddArg(v3) 7658 v0.AddArg(v1) 7659 v.AddArg(v0) 7660 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7661 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7662 v5.AddArg(x) 7663 v4.AddArg(v5) 7664 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7665 v6.AddArg(y) 7666 v4.AddArg(v6) 7667 v.AddArg(v4) 7668 return true 7669 } 7670 } 7671 func rewriteValueMIPS64_OpRsh32Ux32(v *Value, config *Config) bool { 7672 b := v.Block 7673 _ = b 7674 // match: (Rsh32Ux32 <t> x y) 7675 // cond: 7676 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt32to64 y))) 7677 for { 7678 t := v.Type 7679 x := v.Args[0] 7680 y := v.Args[1] 7681 v.reset(OpMIPS64AND) 7682 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7683 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7684 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7685 v2.AuxInt = 64 7686 v1.AddArg(v2) 7687 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7688 v3.AddArg(y) 7689 v1.AddArg(v3) 7690 v0.AddArg(v1) 7691 v.AddArg(v0) 7692 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7693 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7694 v5.AddArg(x) 7695 v4.AddArg(v5) 7696 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7697 v6.AddArg(y) 7698 v4.AddArg(v6) 7699 v.AddArg(v4) 7700 return true 7701 } 7702 } 7703 func rewriteValueMIPS64_OpRsh32Ux64(v *Value, config *Config) bool { 7704 b := v.Block 7705 _ = b 7706 // match: (Rsh32Ux64 <t> x y) 7707 // cond: 7708 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SRLV <t> (ZeroExt32to64 x) y)) 7709 for { 7710 t := v.Type 7711 x := v.Args[0] 7712 y := v.Args[1] 7713 v.reset(OpMIPS64AND) 7714 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7715 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7716 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7717 v2.AuxInt = 64 7718 v1.AddArg(v2) 7719 v1.AddArg(y) 7720 v0.AddArg(v1) 7721 v.AddArg(v0) 7722 v3 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7723 v4 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7724 v4.AddArg(x) 7725 v3.AddArg(v4) 7726 v3.AddArg(y) 7727 v.AddArg(v3) 7728 return true 7729 } 7730 } 7731 func rewriteValueMIPS64_OpRsh32Ux8(v *Value, config *Config) bool { 7732 b := v.Block 7733 _ = b 7734 // match: (Rsh32Ux8 <t> x y) 7735 // cond: 7736 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt8to64 y))) 7737 for { 7738 t := v.Type 7739 x := v.Args[0] 7740 y := v.Args[1] 7741 v.reset(OpMIPS64AND) 7742 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7743 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7744 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7745 v2.AuxInt = 64 7746 v1.AddArg(v2) 7747 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7748 v3.AddArg(y) 7749 v1.AddArg(v3) 7750 v0.AddArg(v1) 7751 v.AddArg(v0) 7752 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7753 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7754 v5.AddArg(x) 7755 v4.AddArg(v5) 7756 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7757 v6.AddArg(y) 7758 v4.AddArg(v6) 7759 v.AddArg(v4) 7760 return true 7761 } 7762 } 7763 func rewriteValueMIPS64_OpRsh32x16(v *Value, config *Config) bool { 7764 b := v.Block 7765 _ = b 7766 // match: (Rsh32x16 <t> x y) 7767 // cond: 7768 // result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt16to64 y))) 7769 for { 7770 t := v.Type 7771 x := v.Args[0] 7772 y := v.Args[1] 7773 v.reset(OpMIPS64SRAV) 7774 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 7775 v0.AddArg(x) 7776 v.AddArg(v0) 7777 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7778 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7779 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7780 v4 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7781 v4.AddArg(y) 7782 v3.AddArg(v4) 7783 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7784 v5.AuxInt = 63 7785 v3.AddArg(v5) 7786 v2.AddArg(v3) 7787 v1.AddArg(v2) 7788 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7789 v6.AddArg(y) 7790 v1.AddArg(v6) 7791 v.AddArg(v1) 7792 return true 7793 } 7794 } 7795 func rewriteValueMIPS64_OpRsh32x32(v *Value, config *Config) bool { 7796 b := v.Block 7797 _ = b 7798 // match: (Rsh32x32 <t> x y) 7799 // cond: 7800 // result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt32to64 y))) 7801 for { 7802 t := v.Type 7803 x := v.Args[0] 7804 y := v.Args[1] 7805 v.reset(OpMIPS64SRAV) 7806 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 7807 v0.AddArg(x) 7808 v.AddArg(v0) 7809 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7810 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7811 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7812 v4 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7813 v4.AddArg(y) 7814 v3.AddArg(v4) 7815 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7816 v5.AuxInt = 63 7817 v3.AddArg(v5) 7818 v2.AddArg(v3) 7819 v1.AddArg(v2) 7820 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7821 v6.AddArg(y) 7822 v1.AddArg(v6) 7823 v.AddArg(v1) 7824 return true 7825 } 7826 } 7827 func rewriteValueMIPS64_OpRsh32x64(v *Value, config *Config) bool { 7828 b := v.Block 7829 _ = b 7830 // match: (Rsh32x64 <t> x y) 7831 // cond: 7832 // result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <config.fe.TypeUInt64()> [63]))) y)) 7833 for { 7834 t := v.Type 7835 x := v.Args[0] 7836 y := v.Args[1] 7837 v.reset(OpMIPS64SRAV) 7838 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 7839 v0.AddArg(x) 7840 v.AddArg(v0) 7841 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7842 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7843 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7844 v3.AddArg(y) 7845 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7846 v4.AuxInt = 63 7847 v3.AddArg(v4) 7848 v2.AddArg(v3) 7849 v1.AddArg(v2) 7850 v1.AddArg(y) 7851 v.AddArg(v1) 7852 return true 7853 } 7854 } 7855 func rewriteValueMIPS64_OpRsh32x8(v *Value, config *Config) bool { 7856 b := v.Block 7857 _ = b 7858 // match: (Rsh32x8 <t> x y) 7859 // cond: 7860 // result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt8to64 y))) 7861 for { 7862 t := v.Type 7863 x := v.Args[0] 7864 y := v.Args[1] 7865 v.reset(OpMIPS64SRAV) 7866 v0 := b.NewValue0(v.Line, OpSignExt32to64, config.fe.TypeInt64()) 7867 v0.AddArg(x) 7868 v.AddArg(v0) 7869 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 7870 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7871 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7872 v4 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7873 v4.AddArg(y) 7874 v3.AddArg(v4) 7875 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7876 v5.AuxInt = 63 7877 v3.AddArg(v5) 7878 v2.AddArg(v3) 7879 v1.AddArg(v2) 7880 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7881 v6.AddArg(y) 7882 v1.AddArg(v6) 7883 v.AddArg(v1) 7884 return true 7885 } 7886 } 7887 func rewriteValueMIPS64_OpRsh64Ux16(v *Value, config *Config) bool { 7888 b := v.Block 7889 _ = b 7890 // match: (Rsh64Ux16 <t> x y) 7891 // cond: 7892 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SRLV <t> x (ZeroExt16to64 y))) 7893 for { 7894 t := v.Type 7895 x := v.Args[0] 7896 y := v.Args[1] 7897 v.reset(OpMIPS64AND) 7898 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7899 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7900 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7901 v2.AuxInt = 64 7902 v1.AddArg(v2) 7903 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7904 v3.AddArg(y) 7905 v1.AddArg(v3) 7906 v0.AddArg(v1) 7907 v.AddArg(v0) 7908 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7909 v4.AddArg(x) 7910 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 7911 v5.AddArg(y) 7912 v4.AddArg(v5) 7913 v.AddArg(v4) 7914 return true 7915 } 7916 } 7917 func rewriteValueMIPS64_OpRsh64Ux32(v *Value, config *Config) bool { 7918 b := v.Block 7919 _ = b 7920 // match: (Rsh64Ux32 <t> x y) 7921 // cond: 7922 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SRLV <t> x (ZeroExt32to64 y))) 7923 for { 7924 t := v.Type 7925 x := v.Args[0] 7926 y := v.Args[1] 7927 v.reset(OpMIPS64AND) 7928 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7929 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7930 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7931 v2.AuxInt = 64 7932 v1.AddArg(v2) 7933 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7934 v3.AddArg(y) 7935 v1.AddArg(v3) 7936 v0.AddArg(v1) 7937 v.AddArg(v0) 7938 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7939 v4.AddArg(x) 7940 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 7941 v5.AddArg(y) 7942 v4.AddArg(v5) 7943 v.AddArg(v4) 7944 return true 7945 } 7946 } 7947 func rewriteValueMIPS64_OpRsh64Ux64(v *Value, config *Config) bool { 7948 b := v.Block 7949 _ = b 7950 // match: (Rsh64Ux64 <t> x y) 7951 // cond: 7952 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SRLV <t> x y)) 7953 for { 7954 t := v.Type 7955 x := v.Args[0] 7956 y := v.Args[1] 7957 v.reset(OpMIPS64AND) 7958 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7959 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7960 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7961 v2.AuxInt = 64 7962 v1.AddArg(v2) 7963 v1.AddArg(y) 7964 v0.AddArg(v1) 7965 v.AddArg(v0) 7966 v3 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7967 v3.AddArg(x) 7968 v3.AddArg(y) 7969 v.AddArg(v3) 7970 return true 7971 } 7972 } 7973 func rewriteValueMIPS64_OpRsh64Ux8(v *Value, config *Config) bool { 7974 b := v.Block 7975 _ = b 7976 // match: (Rsh64Ux8 <t> x y) 7977 // cond: 7978 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SRLV <t> x (ZeroExt8to64 y))) 7979 for { 7980 t := v.Type 7981 x := v.Args[0] 7982 y := v.Args[1] 7983 v.reset(OpMIPS64AND) 7984 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 7985 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 7986 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 7987 v2.AuxInt = 64 7988 v1.AddArg(v2) 7989 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7990 v3.AddArg(y) 7991 v1.AddArg(v3) 7992 v0.AddArg(v1) 7993 v.AddArg(v0) 7994 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 7995 v4.AddArg(x) 7996 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 7997 v5.AddArg(y) 7998 v4.AddArg(v5) 7999 v.AddArg(v4) 8000 return true 8001 } 8002 } 8003 func rewriteValueMIPS64_OpRsh64x16(v *Value, config *Config) bool { 8004 b := v.Block 8005 _ = b 8006 // match: (Rsh64x16 <t> x y) 8007 // cond: 8008 // result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt16to64 y))) 8009 for { 8010 t := v.Type 8011 x := v.Args[0] 8012 y := v.Args[1] 8013 v.reset(OpMIPS64SRAV) 8014 v.AddArg(x) 8015 v0 := b.NewValue0(v.Line, OpMIPS64OR, t) 8016 v1 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8017 v2 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8018 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8019 v3.AddArg(y) 8020 v2.AddArg(v3) 8021 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8022 v4.AuxInt = 63 8023 v2.AddArg(v4) 8024 v1.AddArg(v2) 8025 v0.AddArg(v1) 8026 v5 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8027 v5.AddArg(y) 8028 v0.AddArg(v5) 8029 v.AddArg(v0) 8030 return true 8031 } 8032 } 8033 func rewriteValueMIPS64_OpRsh64x32(v *Value, config *Config) bool { 8034 b := v.Block 8035 _ = b 8036 // match: (Rsh64x32 <t> x y) 8037 // cond: 8038 // result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt32to64 y))) 8039 for { 8040 t := v.Type 8041 x := v.Args[0] 8042 y := v.Args[1] 8043 v.reset(OpMIPS64SRAV) 8044 v.AddArg(x) 8045 v0 := b.NewValue0(v.Line, OpMIPS64OR, t) 8046 v1 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8047 v2 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8048 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8049 v3.AddArg(y) 8050 v2.AddArg(v3) 8051 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8052 v4.AuxInt = 63 8053 v2.AddArg(v4) 8054 v1.AddArg(v2) 8055 v0.AddArg(v1) 8056 v5 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8057 v5.AddArg(y) 8058 v0.AddArg(v5) 8059 v.AddArg(v0) 8060 return true 8061 } 8062 } 8063 func rewriteValueMIPS64_OpRsh64x64(v *Value, config *Config) bool { 8064 b := v.Block 8065 _ = b 8066 // match: (Rsh64x64 <t> x y) 8067 // cond: 8068 // result: (SRAV x (OR <t> (NEGV <t> (SGTU y (Const64 <config.fe.TypeUInt64()> [63]))) y)) 8069 for { 8070 t := v.Type 8071 x := v.Args[0] 8072 y := v.Args[1] 8073 v.reset(OpMIPS64SRAV) 8074 v.AddArg(x) 8075 v0 := b.NewValue0(v.Line, OpMIPS64OR, t) 8076 v1 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8077 v2 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8078 v2.AddArg(y) 8079 v3 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8080 v3.AuxInt = 63 8081 v2.AddArg(v3) 8082 v1.AddArg(v2) 8083 v0.AddArg(v1) 8084 v0.AddArg(y) 8085 v.AddArg(v0) 8086 return true 8087 } 8088 } 8089 func rewriteValueMIPS64_OpRsh64x8(v *Value, config *Config) bool { 8090 b := v.Block 8091 _ = b 8092 // match: (Rsh64x8 <t> x y) 8093 // cond: 8094 // result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt8to64 y))) 8095 for { 8096 t := v.Type 8097 x := v.Args[0] 8098 y := v.Args[1] 8099 v.reset(OpMIPS64SRAV) 8100 v.AddArg(x) 8101 v0 := b.NewValue0(v.Line, OpMIPS64OR, t) 8102 v1 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8103 v2 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8104 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8105 v3.AddArg(y) 8106 v2.AddArg(v3) 8107 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8108 v4.AuxInt = 63 8109 v2.AddArg(v4) 8110 v1.AddArg(v2) 8111 v0.AddArg(v1) 8112 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8113 v5.AddArg(y) 8114 v0.AddArg(v5) 8115 v.AddArg(v0) 8116 return true 8117 } 8118 } 8119 func rewriteValueMIPS64_OpRsh8Ux16(v *Value, config *Config) bool { 8120 b := v.Block 8121 _ = b 8122 // match: (Rsh8Ux16 <t> x y) 8123 // cond: 8124 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt16to64 y))) 8125 for { 8126 t := v.Type 8127 x := v.Args[0] 8128 y := v.Args[1] 8129 v.reset(OpMIPS64AND) 8130 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8131 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8132 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8133 v2.AuxInt = 64 8134 v1.AddArg(v2) 8135 v3 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8136 v3.AddArg(y) 8137 v1.AddArg(v3) 8138 v0.AddArg(v1) 8139 v.AddArg(v0) 8140 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 8141 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8142 v5.AddArg(x) 8143 v4.AddArg(v5) 8144 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8145 v6.AddArg(y) 8146 v4.AddArg(v6) 8147 v.AddArg(v4) 8148 return true 8149 } 8150 } 8151 func rewriteValueMIPS64_OpRsh8Ux32(v *Value, config *Config) bool { 8152 b := v.Block 8153 _ = b 8154 // match: (Rsh8Ux32 <t> x y) 8155 // cond: 8156 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt32to64 y))) 8157 for { 8158 t := v.Type 8159 x := v.Args[0] 8160 y := v.Args[1] 8161 v.reset(OpMIPS64AND) 8162 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8163 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8164 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8165 v2.AuxInt = 64 8166 v1.AddArg(v2) 8167 v3 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8168 v3.AddArg(y) 8169 v1.AddArg(v3) 8170 v0.AddArg(v1) 8171 v.AddArg(v0) 8172 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 8173 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8174 v5.AddArg(x) 8175 v4.AddArg(v5) 8176 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8177 v6.AddArg(y) 8178 v4.AddArg(v6) 8179 v.AddArg(v4) 8180 return true 8181 } 8182 } 8183 func rewriteValueMIPS64_OpRsh8Ux64(v *Value, config *Config) bool { 8184 b := v.Block 8185 _ = b 8186 // match: (Rsh8Ux64 <t> x y) 8187 // cond: 8188 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) y)) (SRLV <t> (ZeroExt8to64 x) y)) 8189 for { 8190 t := v.Type 8191 x := v.Args[0] 8192 y := v.Args[1] 8193 v.reset(OpMIPS64AND) 8194 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8195 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8196 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8197 v2.AuxInt = 64 8198 v1.AddArg(v2) 8199 v1.AddArg(y) 8200 v0.AddArg(v1) 8201 v.AddArg(v0) 8202 v3 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 8203 v4 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8204 v4.AddArg(x) 8205 v3.AddArg(v4) 8206 v3.AddArg(y) 8207 v.AddArg(v3) 8208 return true 8209 } 8210 } 8211 func rewriteValueMIPS64_OpRsh8Ux8(v *Value, config *Config) bool { 8212 b := v.Block 8213 _ = b 8214 // match: (Rsh8Ux8 <t> x y) 8215 // cond: 8216 // result: (AND (NEGV <t> (SGTU (Const64 <config.fe.TypeUInt64()> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt8to64 y))) 8217 for { 8218 t := v.Type 8219 x := v.Args[0] 8220 y := v.Args[1] 8221 v.reset(OpMIPS64AND) 8222 v0 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8223 v1 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8224 v2 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8225 v2.AuxInt = 64 8226 v1.AddArg(v2) 8227 v3 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8228 v3.AddArg(y) 8229 v1.AddArg(v3) 8230 v0.AddArg(v1) 8231 v.AddArg(v0) 8232 v4 := b.NewValue0(v.Line, OpMIPS64SRLV, t) 8233 v5 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8234 v5.AddArg(x) 8235 v4.AddArg(v5) 8236 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8237 v6.AddArg(y) 8238 v4.AddArg(v6) 8239 v.AddArg(v4) 8240 return true 8241 } 8242 } 8243 func rewriteValueMIPS64_OpRsh8x16(v *Value, config *Config) bool { 8244 b := v.Block 8245 _ = b 8246 // match: (Rsh8x16 <t> x y) 8247 // cond: 8248 // result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt16to64 y))) 8249 for { 8250 t := v.Type 8251 x := v.Args[0] 8252 y := v.Args[1] 8253 v.reset(OpMIPS64SRAV) 8254 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 8255 v0.AddArg(x) 8256 v.AddArg(v0) 8257 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 8258 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8259 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8260 v4 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8261 v4.AddArg(y) 8262 v3.AddArg(v4) 8263 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8264 v5.AuxInt = 63 8265 v3.AddArg(v5) 8266 v2.AddArg(v3) 8267 v1.AddArg(v2) 8268 v6 := b.NewValue0(v.Line, OpZeroExt16to64, config.fe.TypeUInt64()) 8269 v6.AddArg(y) 8270 v1.AddArg(v6) 8271 v.AddArg(v1) 8272 return true 8273 } 8274 } 8275 func rewriteValueMIPS64_OpRsh8x32(v *Value, config *Config) bool { 8276 b := v.Block 8277 _ = b 8278 // match: (Rsh8x32 <t> x y) 8279 // cond: 8280 // result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt32to64 y))) 8281 for { 8282 t := v.Type 8283 x := v.Args[0] 8284 y := v.Args[1] 8285 v.reset(OpMIPS64SRAV) 8286 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 8287 v0.AddArg(x) 8288 v.AddArg(v0) 8289 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 8290 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8291 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8292 v4 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8293 v4.AddArg(y) 8294 v3.AddArg(v4) 8295 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8296 v5.AuxInt = 63 8297 v3.AddArg(v5) 8298 v2.AddArg(v3) 8299 v1.AddArg(v2) 8300 v6 := b.NewValue0(v.Line, OpZeroExt32to64, config.fe.TypeUInt64()) 8301 v6.AddArg(y) 8302 v1.AddArg(v6) 8303 v.AddArg(v1) 8304 return true 8305 } 8306 } 8307 func rewriteValueMIPS64_OpRsh8x64(v *Value, config *Config) bool { 8308 b := v.Block 8309 _ = b 8310 // match: (Rsh8x64 <t> x y) 8311 // cond: 8312 // result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (Const64 <config.fe.TypeUInt64()> [63]))) y)) 8313 for { 8314 t := v.Type 8315 x := v.Args[0] 8316 y := v.Args[1] 8317 v.reset(OpMIPS64SRAV) 8318 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 8319 v0.AddArg(x) 8320 v.AddArg(v0) 8321 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 8322 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8323 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8324 v3.AddArg(y) 8325 v4 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8326 v4.AuxInt = 63 8327 v3.AddArg(v4) 8328 v2.AddArg(v3) 8329 v1.AddArg(v2) 8330 v1.AddArg(y) 8331 v.AddArg(v1) 8332 return true 8333 } 8334 } 8335 func rewriteValueMIPS64_OpRsh8x8(v *Value, config *Config) bool { 8336 b := v.Block 8337 _ = b 8338 // match: (Rsh8x8 <t> x y) 8339 // cond: 8340 // result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (Const64 <config.fe.TypeUInt64()> [63]))) (ZeroExt8to64 y))) 8341 for { 8342 t := v.Type 8343 x := v.Args[0] 8344 y := v.Args[1] 8345 v.reset(OpMIPS64SRAV) 8346 v0 := b.NewValue0(v.Line, OpSignExt8to64, config.fe.TypeInt64()) 8347 v0.AddArg(x) 8348 v.AddArg(v0) 8349 v1 := b.NewValue0(v.Line, OpMIPS64OR, t) 8350 v2 := b.NewValue0(v.Line, OpMIPS64NEGV, t) 8351 v3 := b.NewValue0(v.Line, OpMIPS64SGTU, config.fe.TypeBool()) 8352 v4 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8353 v4.AddArg(y) 8354 v3.AddArg(v4) 8355 v5 := b.NewValue0(v.Line, OpConst64, config.fe.TypeUInt64()) 8356 v5.AuxInt = 63 8357 v3.AddArg(v5) 8358 v2.AddArg(v3) 8359 v1.AddArg(v2) 8360 v6 := b.NewValue0(v.Line, OpZeroExt8to64, config.fe.TypeUInt64()) 8361 v6.AddArg(y) 8362 v1.AddArg(v6) 8363 v.AddArg(v1) 8364 return true 8365 } 8366 } 8367 func rewriteValueMIPS64_OpSelect0(v *Value, config *Config) bool { 8368 b := v.Block 8369 _ = b 8370 // match: (Select0 (DIVVU _ (MOVVconst [1]))) 8371 // cond: 8372 // result: (MOVVconst [0]) 8373 for { 8374 v_0 := v.Args[0] 8375 if v_0.Op != OpMIPS64DIVVU { 8376 break 8377 } 8378 v_0_1 := v_0.Args[1] 8379 if v_0_1.Op != OpMIPS64MOVVconst { 8380 break 8381 } 8382 if v_0_1.AuxInt != 1 { 8383 break 8384 } 8385 v.reset(OpMIPS64MOVVconst) 8386 v.AuxInt = 0 8387 return true 8388 } 8389 // match: (Select0 (DIVVU x (MOVVconst [c]))) 8390 // cond: isPowerOfTwo(c) 8391 // result: (ANDconst [c-1] x) 8392 for { 8393 v_0 := v.Args[0] 8394 if v_0.Op != OpMIPS64DIVVU { 8395 break 8396 } 8397 x := v_0.Args[0] 8398 v_0_1 := v_0.Args[1] 8399 if v_0_1.Op != OpMIPS64MOVVconst { 8400 break 8401 } 8402 c := v_0_1.AuxInt 8403 if !(isPowerOfTwo(c)) { 8404 break 8405 } 8406 v.reset(OpMIPS64ANDconst) 8407 v.AuxInt = c - 1 8408 v.AddArg(x) 8409 return true 8410 } 8411 // match: (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) 8412 // cond: 8413 // result: (MOVVconst [int64(c)%int64(d)]) 8414 for { 8415 v_0 := v.Args[0] 8416 if v_0.Op != OpMIPS64DIVV { 8417 break 8418 } 8419 v_0_0 := v_0.Args[0] 8420 if v_0_0.Op != OpMIPS64MOVVconst { 8421 break 8422 } 8423 c := v_0_0.AuxInt 8424 v_0_1 := v_0.Args[1] 8425 if v_0_1.Op != OpMIPS64MOVVconst { 8426 break 8427 } 8428 d := v_0_1.AuxInt 8429 v.reset(OpMIPS64MOVVconst) 8430 v.AuxInt = int64(c) % int64(d) 8431 return true 8432 } 8433 // match: (Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) 8434 // cond: 8435 // result: (MOVVconst [int64(uint64(c)%uint64(d))]) 8436 for { 8437 v_0 := v.Args[0] 8438 if v_0.Op != OpMIPS64DIVVU { 8439 break 8440 } 8441 v_0_0 := v_0.Args[0] 8442 if v_0_0.Op != OpMIPS64MOVVconst { 8443 break 8444 } 8445 c := v_0_0.AuxInt 8446 v_0_1 := v_0.Args[1] 8447 if v_0_1.Op != OpMIPS64MOVVconst { 8448 break 8449 } 8450 d := v_0_1.AuxInt 8451 v.reset(OpMIPS64MOVVconst) 8452 v.AuxInt = int64(uint64(c) % uint64(d)) 8453 return true 8454 } 8455 return false 8456 } 8457 func rewriteValueMIPS64_OpSelect1(v *Value, config *Config) bool { 8458 b := v.Block 8459 _ = b 8460 // match: (Select1 (MULVU x (MOVVconst [-1]))) 8461 // cond: 8462 // result: (NEGV x) 8463 for { 8464 v_0 := v.Args[0] 8465 if v_0.Op != OpMIPS64MULVU { 8466 break 8467 } 8468 x := v_0.Args[0] 8469 v_0_1 := v_0.Args[1] 8470 if v_0_1.Op != OpMIPS64MOVVconst { 8471 break 8472 } 8473 if v_0_1.AuxInt != -1 { 8474 break 8475 } 8476 v.reset(OpMIPS64NEGV) 8477 v.AddArg(x) 8478 return true 8479 } 8480 // match: (Select1 (MULVU _ (MOVVconst [0]))) 8481 // cond: 8482 // result: (MOVVconst [0]) 8483 for { 8484 v_0 := v.Args[0] 8485 if v_0.Op != OpMIPS64MULVU { 8486 break 8487 } 8488 v_0_1 := v_0.Args[1] 8489 if v_0_1.Op != OpMIPS64MOVVconst { 8490 break 8491 } 8492 if v_0_1.AuxInt != 0 { 8493 break 8494 } 8495 v.reset(OpMIPS64MOVVconst) 8496 v.AuxInt = 0 8497 return true 8498 } 8499 // match: (Select1 (MULVU x (MOVVconst [1]))) 8500 // cond: 8501 // result: x 8502 for { 8503 v_0 := v.Args[0] 8504 if v_0.Op != OpMIPS64MULVU { 8505 break 8506 } 8507 x := v_0.Args[0] 8508 v_0_1 := v_0.Args[1] 8509 if v_0_1.Op != OpMIPS64MOVVconst { 8510 break 8511 } 8512 if v_0_1.AuxInt != 1 { 8513 break 8514 } 8515 v.reset(OpCopy) 8516 v.Type = x.Type 8517 v.AddArg(x) 8518 return true 8519 } 8520 // match: (Select1 (MULVU x (MOVVconst [c]))) 8521 // cond: isPowerOfTwo(c) 8522 // result: (SLLVconst [log2(c)] x) 8523 for { 8524 v_0 := v.Args[0] 8525 if v_0.Op != OpMIPS64MULVU { 8526 break 8527 } 8528 x := v_0.Args[0] 8529 v_0_1 := v_0.Args[1] 8530 if v_0_1.Op != OpMIPS64MOVVconst { 8531 break 8532 } 8533 c := v_0_1.AuxInt 8534 if !(isPowerOfTwo(c)) { 8535 break 8536 } 8537 v.reset(OpMIPS64SLLVconst) 8538 v.AuxInt = log2(c) 8539 v.AddArg(x) 8540 return true 8541 } 8542 // match: (Select1 (MULVU (MOVVconst [-1]) x)) 8543 // cond: 8544 // result: (NEGV x) 8545 for { 8546 v_0 := v.Args[0] 8547 if v_0.Op != OpMIPS64MULVU { 8548 break 8549 } 8550 v_0_0 := v_0.Args[0] 8551 if v_0_0.Op != OpMIPS64MOVVconst { 8552 break 8553 } 8554 if v_0_0.AuxInt != -1 { 8555 break 8556 } 8557 x := v_0.Args[1] 8558 v.reset(OpMIPS64NEGV) 8559 v.AddArg(x) 8560 return true 8561 } 8562 // match: (Select1 (MULVU (MOVVconst [0]) _)) 8563 // cond: 8564 // result: (MOVVconst [0]) 8565 for { 8566 v_0 := v.Args[0] 8567 if v_0.Op != OpMIPS64MULVU { 8568 break 8569 } 8570 v_0_0 := v_0.Args[0] 8571 if v_0_0.Op != OpMIPS64MOVVconst { 8572 break 8573 } 8574 if v_0_0.AuxInt != 0 { 8575 break 8576 } 8577 v.reset(OpMIPS64MOVVconst) 8578 v.AuxInt = 0 8579 return true 8580 } 8581 // match: (Select1 (MULVU (MOVVconst [1]) x)) 8582 // cond: 8583 // result: x 8584 for { 8585 v_0 := v.Args[0] 8586 if v_0.Op != OpMIPS64MULVU { 8587 break 8588 } 8589 v_0_0 := v_0.Args[0] 8590 if v_0_0.Op != OpMIPS64MOVVconst { 8591 break 8592 } 8593 if v_0_0.AuxInt != 1 { 8594 break 8595 } 8596 x := v_0.Args[1] 8597 v.reset(OpCopy) 8598 v.Type = x.Type 8599 v.AddArg(x) 8600 return true 8601 } 8602 // match: (Select1 (MULVU (MOVVconst [c]) x)) 8603 // cond: isPowerOfTwo(c) 8604 // result: (SLLVconst [log2(c)] x) 8605 for { 8606 v_0 := v.Args[0] 8607 if v_0.Op != OpMIPS64MULVU { 8608 break 8609 } 8610 v_0_0 := v_0.Args[0] 8611 if v_0_0.Op != OpMIPS64MOVVconst { 8612 break 8613 } 8614 c := v_0_0.AuxInt 8615 x := v_0.Args[1] 8616 if !(isPowerOfTwo(c)) { 8617 break 8618 } 8619 v.reset(OpMIPS64SLLVconst) 8620 v.AuxInt = log2(c) 8621 v.AddArg(x) 8622 return true 8623 } 8624 // match: (Select1 (DIVVU x (MOVVconst [1]))) 8625 // cond: 8626 // result: x 8627 for { 8628 v_0 := v.Args[0] 8629 if v_0.Op != OpMIPS64DIVVU { 8630 break 8631 } 8632 x := v_0.Args[0] 8633 v_0_1 := v_0.Args[1] 8634 if v_0_1.Op != OpMIPS64MOVVconst { 8635 break 8636 } 8637 if v_0_1.AuxInt != 1 { 8638 break 8639 } 8640 v.reset(OpCopy) 8641 v.Type = x.Type 8642 v.AddArg(x) 8643 return true 8644 } 8645 // match: (Select1 (DIVVU x (MOVVconst [c]))) 8646 // cond: isPowerOfTwo(c) 8647 // result: (SRLVconst [log2(c)] x) 8648 for { 8649 v_0 := v.Args[0] 8650 if v_0.Op != OpMIPS64DIVVU { 8651 break 8652 } 8653 x := v_0.Args[0] 8654 v_0_1 := v_0.Args[1] 8655 if v_0_1.Op != OpMIPS64MOVVconst { 8656 break 8657 } 8658 c := v_0_1.AuxInt 8659 if !(isPowerOfTwo(c)) { 8660 break 8661 } 8662 v.reset(OpMIPS64SRLVconst) 8663 v.AuxInt = log2(c) 8664 v.AddArg(x) 8665 return true 8666 } 8667 // match: (Select1 (MULVU (MOVVconst [c]) (MOVVconst [d]))) 8668 // cond: 8669 // result: (MOVVconst [c*d]) 8670 for { 8671 v_0 := v.Args[0] 8672 if v_0.Op != OpMIPS64MULVU { 8673 break 8674 } 8675 v_0_0 := v_0.Args[0] 8676 if v_0_0.Op != OpMIPS64MOVVconst { 8677 break 8678 } 8679 c := v_0_0.AuxInt 8680 v_0_1 := v_0.Args[1] 8681 if v_0_1.Op != OpMIPS64MOVVconst { 8682 break 8683 } 8684 d := v_0_1.AuxInt 8685 v.reset(OpMIPS64MOVVconst) 8686 v.AuxInt = c * d 8687 return true 8688 } 8689 // match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) 8690 // cond: 8691 // result: (MOVVconst [int64(c)/int64(d)]) 8692 for { 8693 v_0 := v.Args[0] 8694 if v_0.Op != OpMIPS64DIVV { 8695 break 8696 } 8697 v_0_0 := v_0.Args[0] 8698 if v_0_0.Op != OpMIPS64MOVVconst { 8699 break 8700 } 8701 c := v_0_0.AuxInt 8702 v_0_1 := v_0.Args[1] 8703 if v_0_1.Op != OpMIPS64MOVVconst { 8704 break 8705 } 8706 d := v_0_1.AuxInt 8707 v.reset(OpMIPS64MOVVconst) 8708 v.AuxInt = int64(c) / int64(d) 8709 return true 8710 } 8711 // match: (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) 8712 // cond: 8713 // result: (MOVVconst [int64(uint64(c)/uint64(d))]) 8714 for { 8715 v_0 := v.Args[0] 8716 if v_0.Op != OpMIPS64DIVVU { 8717 break 8718 } 8719 v_0_0 := v_0.Args[0] 8720 if v_0_0.Op != OpMIPS64MOVVconst { 8721 break 8722 } 8723 c := v_0_0.AuxInt 8724 v_0_1 := v_0.Args[1] 8725 if v_0_1.Op != OpMIPS64MOVVconst { 8726 break 8727 } 8728 d := v_0_1.AuxInt 8729 v.reset(OpMIPS64MOVVconst) 8730 v.AuxInt = int64(uint64(c) / uint64(d)) 8731 return true 8732 } 8733 return false 8734 } 8735 func rewriteValueMIPS64_OpSignExt16to32(v *Value, config *Config) bool { 8736 b := v.Block 8737 _ = b 8738 // match: (SignExt16to32 x) 8739 // cond: 8740 // result: (MOVHreg x) 8741 for { 8742 x := v.Args[0] 8743 v.reset(OpMIPS64MOVHreg) 8744 v.AddArg(x) 8745 return true 8746 } 8747 } 8748 func rewriteValueMIPS64_OpSignExt16to64(v *Value, config *Config) bool { 8749 b := v.Block 8750 _ = b 8751 // match: (SignExt16to64 x) 8752 // cond: 8753 // result: (MOVHreg x) 8754 for { 8755 x := v.Args[0] 8756 v.reset(OpMIPS64MOVHreg) 8757 v.AddArg(x) 8758 return true 8759 } 8760 } 8761 func rewriteValueMIPS64_OpSignExt32to64(v *Value, config *Config) bool { 8762 b := v.Block 8763 _ = b 8764 // match: (SignExt32to64 x) 8765 // cond: 8766 // result: (MOVWreg x) 8767 for { 8768 x := v.Args[0] 8769 v.reset(OpMIPS64MOVWreg) 8770 v.AddArg(x) 8771 return true 8772 } 8773 } 8774 func rewriteValueMIPS64_OpSignExt8to16(v *Value, config *Config) bool { 8775 b := v.Block 8776 _ = b 8777 // match: (SignExt8to16 x) 8778 // cond: 8779 // result: (MOVBreg x) 8780 for { 8781 x := v.Args[0] 8782 v.reset(OpMIPS64MOVBreg) 8783 v.AddArg(x) 8784 return true 8785 } 8786 } 8787 func rewriteValueMIPS64_OpSignExt8to32(v *Value, config *Config) bool { 8788 b := v.Block 8789 _ = b 8790 // match: (SignExt8to32 x) 8791 // cond: 8792 // result: (MOVBreg x) 8793 for { 8794 x := v.Args[0] 8795 v.reset(OpMIPS64MOVBreg) 8796 v.AddArg(x) 8797 return true 8798 } 8799 } 8800 func rewriteValueMIPS64_OpSignExt8to64(v *Value, config *Config) bool { 8801 b := v.Block 8802 _ = b 8803 // match: (SignExt8to64 x) 8804 // cond: 8805 // result: (MOVBreg x) 8806 for { 8807 x := v.Args[0] 8808 v.reset(OpMIPS64MOVBreg) 8809 v.AddArg(x) 8810 return true 8811 } 8812 } 8813 func rewriteValueMIPS64_OpStaticCall(v *Value, config *Config) bool { 8814 b := v.Block 8815 _ = b 8816 // match: (StaticCall [argwid] {target} mem) 8817 // cond: 8818 // result: (CALLstatic [argwid] {target} mem) 8819 for { 8820 argwid := v.AuxInt 8821 target := v.Aux 8822 mem := v.Args[0] 8823 v.reset(OpMIPS64CALLstatic) 8824 v.AuxInt = argwid 8825 v.Aux = target 8826 v.AddArg(mem) 8827 return true 8828 } 8829 } 8830 func rewriteValueMIPS64_OpStore(v *Value, config *Config) bool { 8831 b := v.Block 8832 _ = b 8833 // match: (Store [1] ptr val mem) 8834 // cond: 8835 // result: (MOVBstore ptr val mem) 8836 for { 8837 if v.AuxInt != 1 { 8838 break 8839 } 8840 ptr := v.Args[0] 8841 val := v.Args[1] 8842 mem := v.Args[2] 8843 v.reset(OpMIPS64MOVBstore) 8844 v.AddArg(ptr) 8845 v.AddArg(val) 8846 v.AddArg(mem) 8847 return true 8848 } 8849 // match: (Store [2] ptr val mem) 8850 // cond: 8851 // result: (MOVHstore ptr val mem) 8852 for { 8853 if v.AuxInt != 2 { 8854 break 8855 } 8856 ptr := v.Args[0] 8857 val := v.Args[1] 8858 mem := v.Args[2] 8859 v.reset(OpMIPS64MOVHstore) 8860 v.AddArg(ptr) 8861 v.AddArg(val) 8862 v.AddArg(mem) 8863 return true 8864 } 8865 // match: (Store [4] ptr val mem) 8866 // cond: !is32BitFloat(val.Type) 8867 // result: (MOVWstore ptr val mem) 8868 for { 8869 if v.AuxInt != 4 { 8870 break 8871 } 8872 ptr := v.Args[0] 8873 val := v.Args[1] 8874 mem := v.Args[2] 8875 if !(!is32BitFloat(val.Type)) { 8876 break 8877 } 8878 v.reset(OpMIPS64MOVWstore) 8879 v.AddArg(ptr) 8880 v.AddArg(val) 8881 v.AddArg(mem) 8882 return true 8883 } 8884 // match: (Store [8] ptr val mem) 8885 // cond: !is64BitFloat(val.Type) 8886 // result: (MOVVstore ptr val mem) 8887 for { 8888 if v.AuxInt != 8 { 8889 break 8890 } 8891 ptr := v.Args[0] 8892 val := v.Args[1] 8893 mem := v.Args[2] 8894 if !(!is64BitFloat(val.Type)) { 8895 break 8896 } 8897 v.reset(OpMIPS64MOVVstore) 8898 v.AddArg(ptr) 8899 v.AddArg(val) 8900 v.AddArg(mem) 8901 return true 8902 } 8903 // match: (Store [4] ptr val mem) 8904 // cond: is32BitFloat(val.Type) 8905 // result: (MOVFstore ptr val mem) 8906 for { 8907 if v.AuxInt != 4 { 8908 break 8909 } 8910 ptr := v.Args[0] 8911 val := v.Args[1] 8912 mem := v.Args[2] 8913 if !(is32BitFloat(val.Type)) { 8914 break 8915 } 8916 v.reset(OpMIPS64MOVFstore) 8917 v.AddArg(ptr) 8918 v.AddArg(val) 8919 v.AddArg(mem) 8920 return true 8921 } 8922 // match: (Store [8] ptr val mem) 8923 // cond: is64BitFloat(val.Type) 8924 // result: (MOVDstore ptr val mem) 8925 for { 8926 if v.AuxInt != 8 { 8927 break 8928 } 8929 ptr := v.Args[0] 8930 val := v.Args[1] 8931 mem := v.Args[2] 8932 if !(is64BitFloat(val.Type)) { 8933 break 8934 } 8935 v.reset(OpMIPS64MOVDstore) 8936 v.AddArg(ptr) 8937 v.AddArg(val) 8938 v.AddArg(mem) 8939 return true 8940 } 8941 return false 8942 } 8943 func rewriteValueMIPS64_OpSub16(v *Value, config *Config) bool { 8944 b := v.Block 8945 _ = b 8946 // match: (Sub16 x y) 8947 // cond: 8948 // result: (SUBV x y) 8949 for { 8950 x := v.Args[0] 8951 y := v.Args[1] 8952 v.reset(OpMIPS64SUBV) 8953 v.AddArg(x) 8954 v.AddArg(y) 8955 return true 8956 } 8957 } 8958 func rewriteValueMIPS64_OpSub32(v *Value, config *Config) bool { 8959 b := v.Block 8960 _ = b 8961 // match: (Sub32 x y) 8962 // cond: 8963 // result: (SUBV x y) 8964 for { 8965 x := v.Args[0] 8966 y := v.Args[1] 8967 v.reset(OpMIPS64SUBV) 8968 v.AddArg(x) 8969 v.AddArg(y) 8970 return true 8971 } 8972 } 8973 func rewriteValueMIPS64_OpSub32F(v *Value, config *Config) bool { 8974 b := v.Block 8975 _ = b 8976 // match: (Sub32F x y) 8977 // cond: 8978 // result: (SUBF x y) 8979 for { 8980 x := v.Args[0] 8981 y := v.Args[1] 8982 v.reset(OpMIPS64SUBF) 8983 v.AddArg(x) 8984 v.AddArg(y) 8985 return true 8986 } 8987 } 8988 func rewriteValueMIPS64_OpSub64(v *Value, config *Config) bool { 8989 b := v.Block 8990 _ = b 8991 // match: (Sub64 x y) 8992 // cond: 8993 // result: (SUBV x y) 8994 for { 8995 x := v.Args[0] 8996 y := v.Args[1] 8997 v.reset(OpMIPS64SUBV) 8998 v.AddArg(x) 8999 v.AddArg(y) 9000 return true 9001 } 9002 } 9003 func rewriteValueMIPS64_OpSub64F(v *Value, config *Config) bool { 9004 b := v.Block 9005 _ = b 9006 // match: (Sub64F x y) 9007 // cond: 9008 // result: (SUBD x y) 9009 for { 9010 x := v.Args[0] 9011 y := v.Args[1] 9012 v.reset(OpMIPS64SUBD) 9013 v.AddArg(x) 9014 v.AddArg(y) 9015 return true 9016 } 9017 } 9018 func rewriteValueMIPS64_OpSub8(v *Value, config *Config) bool { 9019 b := v.Block 9020 _ = b 9021 // match: (Sub8 x y) 9022 // cond: 9023 // result: (SUBV x y) 9024 for { 9025 x := v.Args[0] 9026 y := v.Args[1] 9027 v.reset(OpMIPS64SUBV) 9028 v.AddArg(x) 9029 v.AddArg(y) 9030 return true 9031 } 9032 } 9033 func rewriteValueMIPS64_OpSubPtr(v *Value, config *Config) bool { 9034 b := v.Block 9035 _ = b 9036 // match: (SubPtr x y) 9037 // cond: 9038 // result: (SUBV x y) 9039 for { 9040 x := v.Args[0] 9041 y := v.Args[1] 9042 v.reset(OpMIPS64SUBV) 9043 v.AddArg(x) 9044 v.AddArg(y) 9045 return true 9046 } 9047 } 9048 func rewriteValueMIPS64_OpTrunc16to8(v *Value, config *Config) bool { 9049 b := v.Block 9050 _ = b 9051 // match: (Trunc16to8 x) 9052 // cond: 9053 // result: x 9054 for { 9055 x := v.Args[0] 9056 v.reset(OpCopy) 9057 v.Type = x.Type 9058 v.AddArg(x) 9059 return true 9060 } 9061 } 9062 func rewriteValueMIPS64_OpTrunc32to16(v *Value, config *Config) bool { 9063 b := v.Block 9064 _ = b 9065 // match: (Trunc32to16 x) 9066 // cond: 9067 // result: x 9068 for { 9069 x := v.Args[0] 9070 v.reset(OpCopy) 9071 v.Type = x.Type 9072 v.AddArg(x) 9073 return true 9074 } 9075 } 9076 func rewriteValueMIPS64_OpTrunc32to8(v *Value, config *Config) bool { 9077 b := v.Block 9078 _ = b 9079 // match: (Trunc32to8 x) 9080 // cond: 9081 // result: x 9082 for { 9083 x := v.Args[0] 9084 v.reset(OpCopy) 9085 v.Type = x.Type 9086 v.AddArg(x) 9087 return true 9088 } 9089 } 9090 func rewriteValueMIPS64_OpTrunc64to16(v *Value, config *Config) bool { 9091 b := v.Block 9092 _ = b 9093 // match: (Trunc64to16 x) 9094 // cond: 9095 // result: x 9096 for { 9097 x := v.Args[0] 9098 v.reset(OpCopy) 9099 v.Type = x.Type 9100 v.AddArg(x) 9101 return true 9102 } 9103 } 9104 func rewriteValueMIPS64_OpTrunc64to32(v *Value, config *Config) bool { 9105 b := v.Block 9106 _ = b 9107 // match: (Trunc64to32 x) 9108 // cond: 9109 // result: x 9110 for { 9111 x := v.Args[0] 9112 v.reset(OpCopy) 9113 v.Type = x.Type 9114 v.AddArg(x) 9115 return true 9116 } 9117 } 9118 func rewriteValueMIPS64_OpTrunc64to8(v *Value, config *Config) bool { 9119 b := v.Block 9120 _ = b 9121 // match: (Trunc64to8 x) 9122 // cond: 9123 // result: x 9124 for { 9125 x := v.Args[0] 9126 v.reset(OpCopy) 9127 v.Type = x.Type 9128 v.AddArg(x) 9129 return true 9130 } 9131 } 9132 func rewriteValueMIPS64_OpXor16(v *Value, config *Config) bool { 9133 b := v.Block 9134 _ = b 9135 // match: (Xor16 x y) 9136 // cond: 9137 // result: (XOR x y) 9138 for { 9139 x := v.Args[0] 9140 y := v.Args[1] 9141 v.reset(OpMIPS64XOR) 9142 v.AddArg(x) 9143 v.AddArg(y) 9144 return true 9145 } 9146 } 9147 func rewriteValueMIPS64_OpXor32(v *Value, config *Config) bool { 9148 b := v.Block 9149 _ = b 9150 // match: (Xor32 x y) 9151 // cond: 9152 // result: (XOR x y) 9153 for { 9154 x := v.Args[0] 9155 y := v.Args[1] 9156 v.reset(OpMIPS64XOR) 9157 v.AddArg(x) 9158 v.AddArg(y) 9159 return true 9160 } 9161 } 9162 func rewriteValueMIPS64_OpXor64(v *Value, config *Config) bool { 9163 b := v.Block 9164 _ = b 9165 // match: (Xor64 x y) 9166 // cond: 9167 // result: (XOR x y) 9168 for { 9169 x := v.Args[0] 9170 y := v.Args[1] 9171 v.reset(OpMIPS64XOR) 9172 v.AddArg(x) 9173 v.AddArg(y) 9174 return true 9175 } 9176 } 9177 func rewriteValueMIPS64_OpXor8(v *Value, config *Config) bool { 9178 b := v.Block 9179 _ = b 9180 // match: (Xor8 x y) 9181 // cond: 9182 // result: (XOR x y) 9183 for { 9184 x := v.Args[0] 9185 y := v.Args[1] 9186 v.reset(OpMIPS64XOR) 9187 v.AddArg(x) 9188 v.AddArg(y) 9189 return true 9190 } 9191 } 9192 func rewriteValueMIPS64_OpZero(v *Value, config *Config) bool { 9193 b := v.Block 9194 _ = b 9195 // match: (Zero [s] _ mem) 9196 // cond: SizeAndAlign(s).Size() == 0 9197 // result: mem 9198 for { 9199 s := v.AuxInt 9200 mem := v.Args[1] 9201 if !(SizeAndAlign(s).Size() == 0) { 9202 break 9203 } 9204 v.reset(OpCopy) 9205 v.Type = mem.Type 9206 v.AddArg(mem) 9207 return true 9208 } 9209 // match: (Zero [s] ptr mem) 9210 // cond: SizeAndAlign(s).Size() == 1 9211 // result: (MOVBstore ptr (MOVVconst [0]) mem) 9212 for { 9213 s := v.AuxInt 9214 ptr := v.Args[0] 9215 mem := v.Args[1] 9216 if !(SizeAndAlign(s).Size() == 1) { 9217 break 9218 } 9219 v.reset(OpMIPS64MOVBstore) 9220 v.AddArg(ptr) 9221 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9222 v0.AuxInt = 0 9223 v.AddArg(v0) 9224 v.AddArg(mem) 9225 return true 9226 } 9227 // match: (Zero [s] ptr mem) 9228 // cond: SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 9229 // result: (MOVHstore ptr (MOVVconst [0]) mem) 9230 for { 9231 s := v.AuxInt 9232 ptr := v.Args[0] 9233 mem := v.Args[1] 9234 if !(SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0) { 9235 break 9236 } 9237 v.reset(OpMIPS64MOVHstore) 9238 v.AddArg(ptr) 9239 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9240 v0.AuxInt = 0 9241 v.AddArg(v0) 9242 v.AddArg(mem) 9243 return true 9244 } 9245 // match: (Zero [s] ptr mem) 9246 // cond: SizeAndAlign(s).Size() == 2 9247 // result: (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem)) 9248 for { 9249 s := v.AuxInt 9250 ptr := v.Args[0] 9251 mem := v.Args[1] 9252 if !(SizeAndAlign(s).Size() == 2) { 9253 break 9254 } 9255 v.reset(OpMIPS64MOVBstore) 9256 v.AuxInt = 1 9257 v.AddArg(ptr) 9258 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9259 v0.AuxInt = 0 9260 v.AddArg(v0) 9261 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9262 v1.AuxInt = 0 9263 v1.AddArg(ptr) 9264 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9265 v2.AuxInt = 0 9266 v1.AddArg(v2) 9267 v1.AddArg(mem) 9268 v.AddArg(v1) 9269 return true 9270 } 9271 // match: (Zero [s] ptr mem) 9272 // cond: SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 9273 // result: (MOVWstore ptr (MOVVconst [0]) mem) 9274 for { 9275 s := v.AuxInt 9276 ptr := v.Args[0] 9277 mem := v.Args[1] 9278 if !(SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0) { 9279 break 9280 } 9281 v.reset(OpMIPS64MOVWstore) 9282 v.AddArg(ptr) 9283 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9284 v0.AuxInt = 0 9285 v.AddArg(v0) 9286 v.AddArg(mem) 9287 return true 9288 } 9289 // match: (Zero [s] ptr mem) 9290 // cond: SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 9291 // result: (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem)) 9292 for { 9293 s := v.AuxInt 9294 ptr := v.Args[0] 9295 mem := v.Args[1] 9296 if !(SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0) { 9297 break 9298 } 9299 v.reset(OpMIPS64MOVHstore) 9300 v.AuxInt = 2 9301 v.AddArg(ptr) 9302 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9303 v0.AuxInt = 0 9304 v.AddArg(v0) 9305 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9306 v1.AuxInt = 0 9307 v1.AddArg(ptr) 9308 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9309 v2.AuxInt = 0 9310 v1.AddArg(v2) 9311 v1.AddArg(mem) 9312 v.AddArg(v1) 9313 return true 9314 } 9315 // match: (Zero [s] ptr mem) 9316 // cond: SizeAndAlign(s).Size() == 4 9317 // result: (MOVBstore [3] ptr (MOVVconst [0]) (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem)))) 9318 for { 9319 s := v.AuxInt 9320 ptr := v.Args[0] 9321 mem := v.Args[1] 9322 if !(SizeAndAlign(s).Size() == 4) { 9323 break 9324 } 9325 v.reset(OpMIPS64MOVBstore) 9326 v.AuxInt = 3 9327 v.AddArg(ptr) 9328 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9329 v0.AuxInt = 0 9330 v.AddArg(v0) 9331 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9332 v1.AuxInt = 2 9333 v1.AddArg(ptr) 9334 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9335 v2.AuxInt = 0 9336 v1.AddArg(v2) 9337 v3 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9338 v3.AuxInt = 1 9339 v3.AddArg(ptr) 9340 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9341 v4.AuxInt = 0 9342 v3.AddArg(v4) 9343 v5 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9344 v5.AuxInt = 0 9345 v5.AddArg(ptr) 9346 v6 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9347 v6.AuxInt = 0 9348 v5.AddArg(v6) 9349 v5.AddArg(mem) 9350 v3.AddArg(v5) 9351 v1.AddArg(v3) 9352 v.AddArg(v1) 9353 return true 9354 } 9355 // match: (Zero [s] ptr mem) 9356 // cond: SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%8 == 0 9357 // result: (MOVVstore ptr (MOVVconst [0]) mem) 9358 for { 9359 s := v.AuxInt 9360 ptr := v.Args[0] 9361 mem := v.Args[1] 9362 if !(SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%8 == 0) { 9363 break 9364 } 9365 v.reset(OpMIPS64MOVVstore) 9366 v.AddArg(ptr) 9367 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9368 v0.AuxInt = 0 9369 v.AddArg(v0) 9370 v.AddArg(mem) 9371 return true 9372 } 9373 // match: (Zero [s] ptr mem) 9374 // cond: SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%4 == 0 9375 // result: (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem)) 9376 for { 9377 s := v.AuxInt 9378 ptr := v.Args[0] 9379 mem := v.Args[1] 9380 if !(SizeAndAlign(s).Size() == 8 && SizeAndAlign(s).Align()%4 == 0) { 9381 break 9382 } 9383 v.reset(OpMIPS64MOVWstore) 9384 v.AuxInt = 4 9385 v.AddArg(ptr) 9386 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9387 v0.AuxInt = 0 9388 v.AddArg(v0) 9389 v1 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 9390 v1.AuxInt = 0 9391 v1.AddArg(ptr) 9392 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9393 v2.AuxInt = 0 9394 v1.AddArg(v2) 9395 v1.AddArg(mem) 9396 v.AddArg(v1) 9397 return true 9398 } 9399 // match: (Zero [s] ptr mem) 9400 // cond: SizeAndAlign(s).Size() == 4 9401 // result: (MOVHstore [6] ptr (MOVVconst [0]) (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem)))) 9402 for { 9403 s := v.AuxInt 9404 ptr := v.Args[0] 9405 mem := v.Args[1] 9406 if !(SizeAndAlign(s).Size() == 4) { 9407 break 9408 } 9409 v.reset(OpMIPS64MOVHstore) 9410 v.AuxInt = 6 9411 v.AddArg(ptr) 9412 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9413 v0.AuxInt = 0 9414 v.AddArg(v0) 9415 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9416 v1.AuxInt = 4 9417 v1.AddArg(ptr) 9418 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9419 v2.AuxInt = 0 9420 v1.AddArg(v2) 9421 v3 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9422 v3.AuxInt = 2 9423 v3.AddArg(ptr) 9424 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9425 v4.AuxInt = 0 9426 v3.AddArg(v4) 9427 v5 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9428 v5.AuxInt = 0 9429 v5.AddArg(ptr) 9430 v6 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9431 v6.AuxInt = 0 9432 v5.AddArg(v6) 9433 v5.AddArg(mem) 9434 v3.AddArg(v5) 9435 v1.AddArg(v3) 9436 v.AddArg(v1) 9437 return true 9438 } 9439 // match: (Zero [s] ptr mem) 9440 // cond: SizeAndAlign(s).Size() == 3 9441 // result: (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))) 9442 for { 9443 s := v.AuxInt 9444 ptr := v.Args[0] 9445 mem := v.Args[1] 9446 if !(SizeAndAlign(s).Size() == 3) { 9447 break 9448 } 9449 v.reset(OpMIPS64MOVBstore) 9450 v.AuxInt = 2 9451 v.AddArg(ptr) 9452 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9453 v0.AuxInt = 0 9454 v.AddArg(v0) 9455 v1 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9456 v1.AuxInt = 1 9457 v1.AddArg(ptr) 9458 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9459 v2.AuxInt = 0 9460 v1.AddArg(v2) 9461 v3 := b.NewValue0(v.Line, OpMIPS64MOVBstore, TypeMem) 9462 v3.AuxInt = 0 9463 v3.AddArg(ptr) 9464 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9465 v4.AuxInt = 0 9466 v3.AddArg(v4) 9467 v3.AddArg(mem) 9468 v1.AddArg(v3) 9469 v.AddArg(v1) 9470 return true 9471 } 9472 // match: (Zero [s] ptr mem) 9473 // cond: SizeAndAlign(s).Size() == 6 && SizeAndAlign(s).Align()%2 == 0 9474 // result: (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))) 9475 for { 9476 s := v.AuxInt 9477 ptr := v.Args[0] 9478 mem := v.Args[1] 9479 if !(SizeAndAlign(s).Size() == 6 && SizeAndAlign(s).Align()%2 == 0) { 9480 break 9481 } 9482 v.reset(OpMIPS64MOVHstore) 9483 v.AuxInt = 4 9484 v.AddArg(ptr) 9485 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9486 v0.AuxInt = 0 9487 v.AddArg(v0) 9488 v1 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9489 v1.AuxInt = 2 9490 v1.AddArg(ptr) 9491 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9492 v2.AuxInt = 0 9493 v1.AddArg(v2) 9494 v3 := b.NewValue0(v.Line, OpMIPS64MOVHstore, TypeMem) 9495 v3.AuxInt = 0 9496 v3.AddArg(ptr) 9497 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9498 v4.AuxInt = 0 9499 v3.AddArg(v4) 9500 v3.AddArg(mem) 9501 v1.AddArg(v3) 9502 v.AddArg(v1) 9503 return true 9504 } 9505 // match: (Zero [s] ptr mem) 9506 // cond: SizeAndAlign(s).Size() == 12 && SizeAndAlign(s).Align()%4 == 0 9507 // result: (MOVWstore [8] ptr (MOVVconst [0]) (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem))) 9508 for { 9509 s := v.AuxInt 9510 ptr := v.Args[0] 9511 mem := v.Args[1] 9512 if !(SizeAndAlign(s).Size() == 12 && SizeAndAlign(s).Align()%4 == 0) { 9513 break 9514 } 9515 v.reset(OpMIPS64MOVWstore) 9516 v.AuxInt = 8 9517 v.AddArg(ptr) 9518 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9519 v0.AuxInt = 0 9520 v.AddArg(v0) 9521 v1 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 9522 v1.AuxInt = 4 9523 v1.AddArg(ptr) 9524 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9525 v2.AuxInt = 0 9526 v1.AddArg(v2) 9527 v3 := b.NewValue0(v.Line, OpMIPS64MOVWstore, TypeMem) 9528 v3.AuxInt = 0 9529 v3.AddArg(ptr) 9530 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9531 v4.AuxInt = 0 9532 v3.AddArg(v4) 9533 v3.AddArg(mem) 9534 v1.AddArg(v3) 9535 v.AddArg(v1) 9536 return true 9537 } 9538 // match: (Zero [s] ptr mem) 9539 // cond: SizeAndAlign(s).Size() == 16 && SizeAndAlign(s).Align()%8 == 0 9540 // result: (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem)) 9541 for { 9542 s := v.AuxInt 9543 ptr := v.Args[0] 9544 mem := v.Args[1] 9545 if !(SizeAndAlign(s).Size() == 16 && SizeAndAlign(s).Align()%8 == 0) { 9546 break 9547 } 9548 v.reset(OpMIPS64MOVVstore) 9549 v.AuxInt = 8 9550 v.AddArg(ptr) 9551 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9552 v0.AuxInt = 0 9553 v.AddArg(v0) 9554 v1 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 9555 v1.AuxInt = 0 9556 v1.AddArg(ptr) 9557 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9558 v2.AuxInt = 0 9559 v1.AddArg(v2) 9560 v1.AddArg(mem) 9561 v.AddArg(v1) 9562 return true 9563 } 9564 // match: (Zero [s] ptr mem) 9565 // cond: SizeAndAlign(s).Size() == 24 && SizeAndAlign(s).Align()%8 == 0 9566 // result: (MOVVstore [16] ptr (MOVVconst [0]) (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem))) 9567 for { 9568 s := v.AuxInt 9569 ptr := v.Args[0] 9570 mem := v.Args[1] 9571 if !(SizeAndAlign(s).Size() == 24 && SizeAndAlign(s).Align()%8 == 0) { 9572 break 9573 } 9574 v.reset(OpMIPS64MOVVstore) 9575 v.AuxInt = 16 9576 v.AddArg(ptr) 9577 v0 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9578 v0.AuxInt = 0 9579 v.AddArg(v0) 9580 v1 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 9581 v1.AuxInt = 8 9582 v1.AddArg(ptr) 9583 v2 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9584 v2.AuxInt = 0 9585 v1.AddArg(v2) 9586 v3 := b.NewValue0(v.Line, OpMIPS64MOVVstore, TypeMem) 9587 v3.AuxInt = 0 9588 v3.AddArg(ptr) 9589 v4 := b.NewValue0(v.Line, OpMIPS64MOVVconst, config.fe.TypeUInt64()) 9590 v4.AuxInt = 0 9591 v3.AddArg(v4) 9592 v3.AddArg(mem) 9593 v1.AddArg(v3) 9594 v.AddArg(v1) 9595 return true 9596 } 9597 // match: (Zero [s] ptr mem) 9598 // cond: SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 && SizeAndAlign(s).Align()%8 == 0 && !config.noDuffDevice 9599 // result: (DUFFZERO [8 * (128 - int64(SizeAndAlign(s).Size()/8))] ptr mem) 9600 for { 9601 s := v.AuxInt 9602 ptr := v.Args[0] 9603 mem := v.Args[1] 9604 if !(SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 && SizeAndAlign(s).Align()%8 == 0 && !config.noDuffDevice) { 9605 break 9606 } 9607 v.reset(OpMIPS64DUFFZERO) 9608 v.AuxInt = 8 * (128 - int64(SizeAndAlign(s).Size()/8)) 9609 v.AddArg(ptr) 9610 v.AddArg(mem) 9611 return true 9612 } 9613 // match: (Zero [s] ptr mem) 9614 // cond: (SizeAndAlign(s).Size() > 8*128 || config.noDuffDevice) || SizeAndAlign(s).Align()%8 != 0 9615 // result: (LoweredZero [SizeAndAlign(s).Align()] ptr (ADDVconst <ptr.Type> ptr [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) mem) 9616 for { 9617 s := v.AuxInt 9618 ptr := v.Args[0] 9619 mem := v.Args[1] 9620 if !((SizeAndAlign(s).Size() > 8*128 || config.noDuffDevice) || SizeAndAlign(s).Align()%8 != 0) { 9621 break 9622 } 9623 v.reset(OpMIPS64LoweredZero) 9624 v.AuxInt = SizeAndAlign(s).Align() 9625 v.AddArg(ptr) 9626 v0 := b.NewValue0(v.Line, OpMIPS64ADDVconst, ptr.Type) 9627 v0.AuxInt = SizeAndAlign(s).Size() - moveSize(SizeAndAlign(s).Align(), config) 9628 v0.AddArg(ptr) 9629 v.AddArg(v0) 9630 v.AddArg(mem) 9631 return true 9632 } 9633 return false 9634 } 9635 func rewriteValueMIPS64_OpZeroExt16to32(v *Value, config *Config) bool { 9636 b := v.Block 9637 _ = b 9638 // match: (ZeroExt16to32 x) 9639 // cond: 9640 // result: (MOVHUreg x) 9641 for { 9642 x := v.Args[0] 9643 v.reset(OpMIPS64MOVHUreg) 9644 v.AddArg(x) 9645 return true 9646 } 9647 } 9648 func rewriteValueMIPS64_OpZeroExt16to64(v *Value, config *Config) bool { 9649 b := v.Block 9650 _ = b 9651 // match: (ZeroExt16to64 x) 9652 // cond: 9653 // result: (MOVHUreg x) 9654 for { 9655 x := v.Args[0] 9656 v.reset(OpMIPS64MOVHUreg) 9657 v.AddArg(x) 9658 return true 9659 } 9660 } 9661 func rewriteValueMIPS64_OpZeroExt32to64(v *Value, config *Config) bool { 9662 b := v.Block 9663 _ = b 9664 // match: (ZeroExt32to64 x) 9665 // cond: 9666 // result: (MOVWUreg x) 9667 for { 9668 x := v.Args[0] 9669 v.reset(OpMIPS64MOVWUreg) 9670 v.AddArg(x) 9671 return true 9672 } 9673 } 9674 func rewriteValueMIPS64_OpZeroExt8to16(v *Value, config *Config) bool { 9675 b := v.Block 9676 _ = b 9677 // match: (ZeroExt8to16 x) 9678 // cond: 9679 // result: (MOVBUreg x) 9680 for { 9681 x := v.Args[0] 9682 v.reset(OpMIPS64MOVBUreg) 9683 v.AddArg(x) 9684 return true 9685 } 9686 } 9687 func rewriteValueMIPS64_OpZeroExt8to32(v *Value, config *Config) bool { 9688 b := v.Block 9689 _ = b 9690 // match: (ZeroExt8to32 x) 9691 // cond: 9692 // result: (MOVBUreg x) 9693 for { 9694 x := v.Args[0] 9695 v.reset(OpMIPS64MOVBUreg) 9696 v.AddArg(x) 9697 return true 9698 } 9699 } 9700 func rewriteValueMIPS64_OpZeroExt8to64(v *Value, config *Config) bool { 9701 b := v.Block 9702 _ = b 9703 // match: (ZeroExt8to64 x) 9704 // cond: 9705 // result: (MOVBUreg x) 9706 for { 9707 x := v.Args[0] 9708 v.reset(OpMIPS64MOVBUreg) 9709 v.AddArg(x) 9710 return true 9711 } 9712 } 9713 func rewriteBlockMIPS64(b *Block) bool { 9714 switch b.Kind { 9715 case BlockMIPS64EQ: 9716 // match: (EQ (FPFlagTrue cmp) yes no) 9717 // cond: 9718 // result: (FPF cmp yes no) 9719 for { 9720 v := b.Control 9721 if v.Op != OpMIPS64FPFlagTrue { 9722 break 9723 } 9724 cmp := v.Args[0] 9725 yes := b.Succs[0] 9726 no := b.Succs[1] 9727 b.Kind = BlockMIPS64FPF 9728 b.SetControl(cmp) 9729 _ = yes 9730 _ = no 9731 return true 9732 } 9733 // match: (EQ (FPFlagFalse cmp) yes no) 9734 // cond: 9735 // result: (FPT cmp yes no) 9736 for { 9737 v := b.Control 9738 if v.Op != OpMIPS64FPFlagFalse { 9739 break 9740 } 9741 cmp := v.Args[0] 9742 yes := b.Succs[0] 9743 no := b.Succs[1] 9744 b.Kind = BlockMIPS64FPT 9745 b.SetControl(cmp) 9746 _ = yes 9747 _ = no 9748 return true 9749 } 9750 // match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no) 9751 // cond: 9752 // result: (NE cmp yes no) 9753 for { 9754 v := b.Control 9755 if v.Op != OpMIPS64XORconst { 9756 break 9757 } 9758 if v.AuxInt != 1 { 9759 break 9760 } 9761 cmp := v.Args[0] 9762 if cmp.Op != OpMIPS64SGT { 9763 break 9764 } 9765 yes := b.Succs[0] 9766 no := b.Succs[1] 9767 b.Kind = BlockMIPS64NE 9768 b.SetControl(cmp) 9769 _ = yes 9770 _ = no 9771 return true 9772 } 9773 // match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no) 9774 // cond: 9775 // result: (NE cmp yes no) 9776 for { 9777 v := b.Control 9778 if v.Op != OpMIPS64XORconst { 9779 break 9780 } 9781 if v.AuxInt != 1 { 9782 break 9783 } 9784 cmp := v.Args[0] 9785 if cmp.Op != OpMIPS64SGTU { 9786 break 9787 } 9788 yes := b.Succs[0] 9789 no := b.Succs[1] 9790 b.Kind = BlockMIPS64NE 9791 b.SetControl(cmp) 9792 _ = yes 9793 _ = no 9794 return true 9795 } 9796 // match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no) 9797 // cond: 9798 // result: (NE cmp yes no) 9799 for { 9800 v := b.Control 9801 if v.Op != OpMIPS64XORconst { 9802 break 9803 } 9804 if v.AuxInt != 1 { 9805 break 9806 } 9807 cmp := v.Args[0] 9808 if cmp.Op != OpMIPS64SGTconst { 9809 break 9810 } 9811 yes := b.Succs[0] 9812 no := b.Succs[1] 9813 b.Kind = BlockMIPS64NE 9814 b.SetControl(cmp) 9815 _ = yes 9816 _ = no 9817 return true 9818 } 9819 // match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no) 9820 // cond: 9821 // result: (NE cmp yes no) 9822 for { 9823 v := b.Control 9824 if v.Op != OpMIPS64XORconst { 9825 break 9826 } 9827 if v.AuxInt != 1 { 9828 break 9829 } 9830 cmp := v.Args[0] 9831 if cmp.Op != OpMIPS64SGTUconst { 9832 break 9833 } 9834 yes := b.Succs[0] 9835 no := b.Succs[1] 9836 b.Kind = BlockMIPS64NE 9837 b.SetControl(cmp) 9838 _ = yes 9839 _ = no 9840 return true 9841 } 9842 // match: (EQ (SGTUconst [1] x) yes no) 9843 // cond: 9844 // result: (NE x yes no) 9845 for { 9846 v := b.Control 9847 if v.Op != OpMIPS64SGTUconst { 9848 break 9849 } 9850 if v.AuxInt != 1 { 9851 break 9852 } 9853 x := v.Args[0] 9854 yes := b.Succs[0] 9855 no := b.Succs[1] 9856 b.Kind = BlockMIPS64NE 9857 b.SetControl(x) 9858 _ = yes 9859 _ = no 9860 return true 9861 } 9862 // match: (EQ (SGTU x (MOVVconst [0])) yes no) 9863 // cond: 9864 // result: (EQ x yes no) 9865 for { 9866 v := b.Control 9867 if v.Op != OpMIPS64SGTU { 9868 break 9869 } 9870 x := v.Args[0] 9871 v_1 := v.Args[1] 9872 if v_1.Op != OpMIPS64MOVVconst { 9873 break 9874 } 9875 if v_1.AuxInt != 0 { 9876 break 9877 } 9878 yes := b.Succs[0] 9879 no := b.Succs[1] 9880 b.Kind = BlockMIPS64EQ 9881 b.SetControl(x) 9882 _ = yes 9883 _ = no 9884 return true 9885 } 9886 // match: (EQ (SGTconst [0] x) yes no) 9887 // cond: 9888 // result: (GEZ x yes no) 9889 for { 9890 v := b.Control 9891 if v.Op != OpMIPS64SGTconst { 9892 break 9893 } 9894 if v.AuxInt != 0 { 9895 break 9896 } 9897 x := v.Args[0] 9898 yes := b.Succs[0] 9899 no := b.Succs[1] 9900 b.Kind = BlockMIPS64GEZ 9901 b.SetControl(x) 9902 _ = yes 9903 _ = no 9904 return true 9905 } 9906 // match: (EQ (SGT x (MOVVconst [0])) yes no) 9907 // cond: 9908 // result: (LEZ x yes no) 9909 for { 9910 v := b.Control 9911 if v.Op != OpMIPS64SGT { 9912 break 9913 } 9914 x := v.Args[0] 9915 v_1 := v.Args[1] 9916 if v_1.Op != OpMIPS64MOVVconst { 9917 break 9918 } 9919 if v_1.AuxInt != 0 { 9920 break 9921 } 9922 yes := b.Succs[0] 9923 no := b.Succs[1] 9924 b.Kind = BlockMIPS64LEZ 9925 b.SetControl(x) 9926 _ = yes 9927 _ = no 9928 return true 9929 } 9930 // match: (EQ (MOVVconst [0]) yes no) 9931 // cond: 9932 // result: (First nil yes no) 9933 for { 9934 v := b.Control 9935 if v.Op != OpMIPS64MOVVconst { 9936 break 9937 } 9938 if v.AuxInt != 0 { 9939 break 9940 } 9941 yes := b.Succs[0] 9942 no := b.Succs[1] 9943 b.Kind = BlockFirst 9944 b.SetControl(nil) 9945 _ = yes 9946 _ = no 9947 return true 9948 } 9949 // match: (EQ (MOVVconst [c]) yes no) 9950 // cond: c != 0 9951 // result: (First nil no yes) 9952 for { 9953 v := b.Control 9954 if v.Op != OpMIPS64MOVVconst { 9955 break 9956 } 9957 c := v.AuxInt 9958 yes := b.Succs[0] 9959 no := b.Succs[1] 9960 if !(c != 0) { 9961 break 9962 } 9963 b.Kind = BlockFirst 9964 b.SetControl(nil) 9965 b.swapSuccessors() 9966 _ = no 9967 _ = yes 9968 return true 9969 } 9970 case BlockMIPS64GEZ: 9971 // match: (GEZ (MOVVconst [c]) yes no) 9972 // cond: c >= 0 9973 // result: (First nil yes no) 9974 for { 9975 v := b.Control 9976 if v.Op != OpMIPS64MOVVconst { 9977 break 9978 } 9979 c := v.AuxInt 9980 yes := b.Succs[0] 9981 no := b.Succs[1] 9982 if !(c >= 0) { 9983 break 9984 } 9985 b.Kind = BlockFirst 9986 b.SetControl(nil) 9987 _ = yes 9988 _ = no 9989 return true 9990 } 9991 // match: (GEZ (MOVVconst [c]) yes no) 9992 // cond: c < 0 9993 // result: (First nil no yes) 9994 for { 9995 v := b.Control 9996 if v.Op != OpMIPS64MOVVconst { 9997 break 9998 } 9999 c := v.AuxInt 10000 yes := b.Succs[0] 10001 no := b.Succs[1] 10002 if !(c < 0) { 10003 break 10004 } 10005 b.Kind = BlockFirst 10006 b.SetControl(nil) 10007 b.swapSuccessors() 10008 _ = no 10009 _ = yes 10010 return true 10011 } 10012 case BlockMIPS64GTZ: 10013 // match: (GTZ (MOVVconst [c]) yes no) 10014 // cond: c > 0 10015 // result: (First nil yes no) 10016 for { 10017 v := b.Control 10018 if v.Op != OpMIPS64MOVVconst { 10019 break 10020 } 10021 c := v.AuxInt 10022 yes := b.Succs[0] 10023 no := b.Succs[1] 10024 if !(c > 0) { 10025 break 10026 } 10027 b.Kind = BlockFirst 10028 b.SetControl(nil) 10029 _ = yes 10030 _ = no 10031 return true 10032 } 10033 // match: (GTZ (MOVVconst [c]) yes no) 10034 // cond: c <= 0 10035 // result: (First nil no yes) 10036 for { 10037 v := b.Control 10038 if v.Op != OpMIPS64MOVVconst { 10039 break 10040 } 10041 c := v.AuxInt 10042 yes := b.Succs[0] 10043 no := b.Succs[1] 10044 if !(c <= 0) { 10045 break 10046 } 10047 b.Kind = BlockFirst 10048 b.SetControl(nil) 10049 b.swapSuccessors() 10050 _ = no 10051 _ = yes 10052 return true 10053 } 10054 case BlockIf: 10055 // match: (If cond yes no) 10056 // cond: 10057 // result: (NE cond yes no) 10058 for { 10059 v := b.Control 10060 _ = v 10061 cond := b.Control 10062 yes := b.Succs[0] 10063 no := b.Succs[1] 10064 b.Kind = BlockMIPS64NE 10065 b.SetControl(cond) 10066 _ = yes 10067 _ = no 10068 return true 10069 } 10070 case BlockMIPS64LEZ: 10071 // match: (LEZ (MOVVconst [c]) yes no) 10072 // cond: c <= 0 10073 // result: (First nil yes no) 10074 for { 10075 v := b.Control 10076 if v.Op != OpMIPS64MOVVconst { 10077 break 10078 } 10079 c := v.AuxInt 10080 yes := b.Succs[0] 10081 no := b.Succs[1] 10082 if !(c <= 0) { 10083 break 10084 } 10085 b.Kind = BlockFirst 10086 b.SetControl(nil) 10087 _ = yes 10088 _ = no 10089 return true 10090 } 10091 // match: (LEZ (MOVVconst [c]) yes no) 10092 // cond: c > 0 10093 // result: (First nil no yes) 10094 for { 10095 v := b.Control 10096 if v.Op != OpMIPS64MOVVconst { 10097 break 10098 } 10099 c := v.AuxInt 10100 yes := b.Succs[0] 10101 no := b.Succs[1] 10102 if !(c > 0) { 10103 break 10104 } 10105 b.Kind = BlockFirst 10106 b.SetControl(nil) 10107 b.swapSuccessors() 10108 _ = no 10109 _ = yes 10110 return true 10111 } 10112 case BlockMIPS64LTZ: 10113 // match: (LTZ (MOVVconst [c]) yes no) 10114 // cond: c < 0 10115 // result: (First nil yes no) 10116 for { 10117 v := b.Control 10118 if v.Op != OpMIPS64MOVVconst { 10119 break 10120 } 10121 c := v.AuxInt 10122 yes := b.Succs[0] 10123 no := b.Succs[1] 10124 if !(c < 0) { 10125 break 10126 } 10127 b.Kind = BlockFirst 10128 b.SetControl(nil) 10129 _ = yes 10130 _ = no 10131 return true 10132 } 10133 // match: (LTZ (MOVVconst [c]) yes no) 10134 // cond: c >= 0 10135 // result: (First nil no yes) 10136 for { 10137 v := b.Control 10138 if v.Op != OpMIPS64MOVVconst { 10139 break 10140 } 10141 c := v.AuxInt 10142 yes := b.Succs[0] 10143 no := b.Succs[1] 10144 if !(c >= 0) { 10145 break 10146 } 10147 b.Kind = BlockFirst 10148 b.SetControl(nil) 10149 b.swapSuccessors() 10150 _ = no 10151 _ = yes 10152 return true 10153 } 10154 case BlockMIPS64NE: 10155 // match: (NE (FPFlagTrue cmp) yes no) 10156 // cond: 10157 // result: (FPT cmp yes no) 10158 for { 10159 v := b.Control 10160 if v.Op != OpMIPS64FPFlagTrue { 10161 break 10162 } 10163 cmp := v.Args[0] 10164 yes := b.Succs[0] 10165 no := b.Succs[1] 10166 b.Kind = BlockMIPS64FPT 10167 b.SetControl(cmp) 10168 _ = yes 10169 _ = no 10170 return true 10171 } 10172 // match: (NE (FPFlagFalse cmp) yes no) 10173 // cond: 10174 // result: (FPF cmp yes no) 10175 for { 10176 v := b.Control 10177 if v.Op != OpMIPS64FPFlagFalse { 10178 break 10179 } 10180 cmp := v.Args[0] 10181 yes := b.Succs[0] 10182 no := b.Succs[1] 10183 b.Kind = BlockMIPS64FPF 10184 b.SetControl(cmp) 10185 _ = yes 10186 _ = no 10187 return true 10188 } 10189 // match: (NE (XORconst [1] cmp:(SGT _ _)) yes no) 10190 // cond: 10191 // result: (EQ cmp yes no) 10192 for { 10193 v := b.Control 10194 if v.Op != OpMIPS64XORconst { 10195 break 10196 } 10197 if v.AuxInt != 1 { 10198 break 10199 } 10200 cmp := v.Args[0] 10201 if cmp.Op != OpMIPS64SGT { 10202 break 10203 } 10204 yes := b.Succs[0] 10205 no := b.Succs[1] 10206 b.Kind = BlockMIPS64EQ 10207 b.SetControl(cmp) 10208 _ = yes 10209 _ = no 10210 return true 10211 } 10212 // match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no) 10213 // cond: 10214 // result: (EQ cmp yes no) 10215 for { 10216 v := b.Control 10217 if v.Op != OpMIPS64XORconst { 10218 break 10219 } 10220 if v.AuxInt != 1 { 10221 break 10222 } 10223 cmp := v.Args[0] 10224 if cmp.Op != OpMIPS64SGTU { 10225 break 10226 } 10227 yes := b.Succs[0] 10228 no := b.Succs[1] 10229 b.Kind = BlockMIPS64EQ 10230 b.SetControl(cmp) 10231 _ = yes 10232 _ = no 10233 return true 10234 } 10235 // match: (NE (XORconst [1] cmp:(SGTconst _)) yes no) 10236 // cond: 10237 // result: (EQ cmp yes no) 10238 for { 10239 v := b.Control 10240 if v.Op != OpMIPS64XORconst { 10241 break 10242 } 10243 if v.AuxInt != 1 { 10244 break 10245 } 10246 cmp := v.Args[0] 10247 if cmp.Op != OpMIPS64SGTconst { 10248 break 10249 } 10250 yes := b.Succs[0] 10251 no := b.Succs[1] 10252 b.Kind = BlockMIPS64EQ 10253 b.SetControl(cmp) 10254 _ = yes 10255 _ = no 10256 return true 10257 } 10258 // match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no) 10259 // cond: 10260 // result: (EQ cmp yes no) 10261 for { 10262 v := b.Control 10263 if v.Op != OpMIPS64XORconst { 10264 break 10265 } 10266 if v.AuxInt != 1 { 10267 break 10268 } 10269 cmp := v.Args[0] 10270 if cmp.Op != OpMIPS64SGTUconst { 10271 break 10272 } 10273 yes := b.Succs[0] 10274 no := b.Succs[1] 10275 b.Kind = BlockMIPS64EQ 10276 b.SetControl(cmp) 10277 _ = yes 10278 _ = no 10279 return true 10280 } 10281 // match: (NE (SGTUconst [1] x) yes no) 10282 // cond: 10283 // result: (EQ x yes no) 10284 for { 10285 v := b.Control 10286 if v.Op != OpMIPS64SGTUconst { 10287 break 10288 } 10289 if v.AuxInt != 1 { 10290 break 10291 } 10292 x := v.Args[0] 10293 yes := b.Succs[0] 10294 no := b.Succs[1] 10295 b.Kind = BlockMIPS64EQ 10296 b.SetControl(x) 10297 _ = yes 10298 _ = no 10299 return true 10300 } 10301 // match: (NE (SGTU x (MOVVconst [0])) yes no) 10302 // cond: 10303 // result: (NE x yes no) 10304 for { 10305 v := b.Control 10306 if v.Op != OpMIPS64SGTU { 10307 break 10308 } 10309 x := v.Args[0] 10310 v_1 := v.Args[1] 10311 if v_1.Op != OpMIPS64MOVVconst { 10312 break 10313 } 10314 if v_1.AuxInt != 0 { 10315 break 10316 } 10317 yes := b.Succs[0] 10318 no := b.Succs[1] 10319 b.Kind = BlockMIPS64NE 10320 b.SetControl(x) 10321 _ = yes 10322 _ = no 10323 return true 10324 } 10325 // match: (NE (SGTconst [0] x) yes no) 10326 // cond: 10327 // result: (LTZ x yes no) 10328 for { 10329 v := b.Control 10330 if v.Op != OpMIPS64SGTconst { 10331 break 10332 } 10333 if v.AuxInt != 0 { 10334 break 10335 } 10336 x := v.Args[0] 10337 yes := b.Succs[0] 10338 no := b.Succs[1] 10339 b.Kind = BlockMIPS64LTZ 10340 b.SetControl(x) 10341 _ = yes 10342 _ = no 10343 return true 10344 } 10345 // match: (NE (SGT x (MOVVconst [0])) yes no) 10346 // cond: 10347 // result: (GTZ x yes no) 10348 for { 10349 v := b.Control 10350 if v.Op != OpMIPS64SGT { 10351 break 10352 } 10353 x := v.Args[0] 10354 v_1 := v.Args[1] 10355 if v_1.Op != OpMIPS64MOVVconst { 10356 break 10357 } 10358 if v_1.AuxInt != 0 { 10359 break 10360 } 10361 yes := b.Succs[0] 10362 no := b.Succs[1] 10363 b.Kind = BlockMIPS64GTZ 10364 b.SetControl(x) 10365 _ = yes 10366 _ = no 10367 return true 10368 } 10369 // match: (NE (MOVVconst [0]) yes no) 10370 // cond: 10371 // result: (First nil no yes) 10372 for { 10373 v := b.Control 10374 if v.Op != OpMIPS64MOVVconst { 10375 break 10376 } 10377 if v.AuxInt != 0 { 10378 break 10379 } 10380 yes := b.Succs[0] 10381 no := b.Succs[1] 10382 b.Kind = BlockFirst 10383 b.SetControl(nil) 10384 b.swapSuccessors() 10385 _ = no 10386 _ = yes 10387 return true 10388 } 10389 // match: (NE (MOVVconst [c]) yes no) 10390 // cond: c != 0 10391 // result: (First nil yes no) 10392 for { 10393 v := b.Control 10394 if v.Op != OpMIPS64MOVVconst { 10395 break 10396 } 10397 c := v.AuxInt 10398 yes := b.Succs[0] 10399 no := b.Succs[1] 10400 if !(c != 0) { 10401 break 10402 } 10403 b.Kind = BlockFirst 10404 b.SetControl(nil) 10405 _ = yes 10406 _ = no 10407 return true 10408 } 10409 } 10410 return false 10411 }