github.com/freddyisaac/sicortex-golang@v0.0.0-20231019035217-e03519e66f60/src/cmd/compile/internal/ssa/rewriteS390X.go (about) 1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLrot32: 272 return rewriteValueS390X_OpLrot32(v, config) 273 case OpLrot64: 274 return rewriteValueS390X_OpLrot64(v, config) 275 case OpLsh16x16: 276 return rewriteValueS390X_OpLsh16x16(v, config) 277 case OpLsh16x32: 278 return rewriteValueS390X_OpLsh16x32(v, config) 279 case OpLsh16x64: 280 return rewriteValueS390X_OpLsh16x64(v, config) 281 case OpLsh16x8: 282 return rewriteValueS390X_OpLsh16x8(v, config) 283 case OpLsh32x16: 284 return rewriteValueS390X_OpLsh32x16(v, config) 285 case OpLsh32x32: 286 return rewriteValueS390X_OpLsh32x32(v, config) 287 case OpLsh32x64: 288 return rewriteValueS390X_OpLsh32x64(v, config) 289 case OpLsh32x8: 290 return rewriteValueS390X_OpLsh32x8(v, config) 291 case OpLsh64x16: 292 return rewriteValueS390X_OpLsh64x16(v, config) 293 case OpLsh64x32: 294 return rewriteValueS390X_OpLsh64x32(v, config) 295 case OpLsh64x64: 296 return rewriteValueS390X_OpLsh64x64(v, config) 297 case OpLsh64x8: 298 return rewriteValueS390X_OpLsh64x8(v, config) 299 case OpLsh8x16: 300 return rewriteValueS390X_OpLsh8x16(v, config) 301 case OpLsh8x32: 302 return rewriteValueS390X_OpLsh8x32(v, config) 303 case OpLsh8x64: 304 return rewriteValueS390X_OpLsh8x64(v, config) 305 case OpLsh8x8: 306 return rewriteValueS390X_OpLsh8x8(v, config) 307 case OpMod16: 308 return rewriteValueS390X_OpMod16(v, config) 309 case OpMod16u: 310 return rewriteValueS390X_OpMod16u(v, config) 311 case OpMod32: 312 return rewriteValueS390X_OpMod32(v, config) 313 case OpMod32u: 314 return rewriteValueS390X_OpMod32u(v, config) 315 case OpMod64: 316 return rewriteValueS390X_OpMod64(v, config) 317 case OpMod64u: 318 return rewriteValueS390X_OpMod64u(v, config) 319 case OpMod8: 320 return rewriteValueS390X_OpMod8(v, config) 321 case OpMod8u: 322 return rewriteValueS390X_OpMod8u(v, config) 323 case OpMove: 324 return rewriteValueS390X_OpMove(v, config) 325 case OpMul16: 326 return rewriteValueS390X_OpMul16(v, config) 327 case OpMul32: 328 return rewriteValueS390X_OpMul32(v, config) 329 case OpMul32F: 330 return rewriteValueS390X_OpMul32F(v, config) 331 case OpMul64: 332 return rewriteValueS390X_OpMul64(v, config) 333 case OpMul64F: 334 return rewriteValueS390X_OpMul64F(v, config) 335 case OpMul8: 336 return rewriteValueS390X_OpMul8(v, config) 337 case OpNeg16: 338 return rewriteValueS390X_OpNeg16(v, config) 339 case OpNeg32: 340 return rewriteValueS390X_OpNeg32(v, config) 341 case OpNeg32F: 342 return rewriteValueS390X_OpNeg32F(v, config) 343 case OpNeg64: 344 return rewriteValueS390X_OpNeg64(v, config) 345 case OpNeg64F: 346 return rewriteValueS390X_OpNeg64F(v, config) 347 case OpNeg8: 348 return rewriteValueS390X_OpNeg8(v, config) 349 case OpNeq16: 350 return rewriteValueS390X_OpNeq16(v, config) 351 case OpNeq32: 352 return rewriteValueS390X_OpNeq32(v, config) 353 case OpNeq32F: 354 return rewriteValueS390X_OpNeq32F(v, config) 355 case OpNeq64: 356 return rewriteValueS390X_OpNeq64(v, config) 357 case OpNeq64F: 358 return rewriteValueS390X_OpNeq64F(v, config) 359 case OpNeq8: 360 return rewriteValueS390X_OpNeq8(v, config) 361 case OpNeqB: 362 return rewriteValueS390X_OpNeqB(v, config) 363 case OpNeqPtr: 364 return rewriteValueS390X_OpNeqPtr(v, config) 365 case OpNilCheck: 366 return rewriteValueS390X_OpNilCheck(v, config) 367 case OpNot: 368 return rewriteValueS390X_OpNot(v, config) 369 case OpOffPtr: 370 return rewriteValueS390X_OpOffPtr(v, config) 371 case OpOr16: 372 return rewriteValueS390X_OpOr16(v, config) 373 case OpOr32: 374 return rewriteValueS390X_OpOr32(v, config) 375 case OpOr64: 376 return rewriteValueS390X_OpOr64(v, config) 377 case OpOr8: 378 return rewriteValueS390X_OpOr8(v, config) 379 case OpOrB: 380 return rewriteValueS390X_OpOrB(v, config) 381 case OpRsh16Ux16: 382 return rewriteValueS390X_OpRsh16Ux16(v, config) 383 case OpRsh16Ux32: 384 return rewriteValueS390X_OpRsh16Ux32(v, config) 385 case OpRsh16Ux64: 386 return rewriteValueS390X_OpRsh16Ux64(v, config) 387 case OpRsh16Ux8: 388 return rewriteValueS390X_OpRsh16Ux8(v, config) 389 case OpRsh16x16: 390 return rewriteValueS390X_OpRsh16x16(v, config) 391 case OpRsh16x32: 392 return rewriteValueS390X_OpRsh16x32(v, config) 393 case OpRsh16x64: 394 return rewriteValueS390X_OpRsh16x64(v, config) 395 case OpRsh16x8: 396 return rewriteValueS390X_OpRsh16x8(v, config) 397 case OpRsh32Ux16: 398 return rewriteValueS390X_OpRsh32Ux16(v, config) 399 case OpRsh32Ux32: 400 return rewriteValueS390X_OpRsh32Ux32(v, config) 401 case OpRsh32Ux64: 402 return rewriteValueS390X_OpRsh32Ux64(v, config) 403 case OpRsh32Ux8: 404 return rewriteValueS390X_OpRsh32Ux8(v, config) 405 case OpRsh32x16: 406 return rewriteValueS390X_OpRsh32x16(v, config) 407 case OpRsh32x32: 408 return rewriteValueS390X_OpRsh32x32(v, config) 409 case OpRsh32x64: 410 return rewriteValueS390X_OpRsh32x64(v, config) 411 case OpRsh32x8: 412 return rewriteValueS390X_OpRsh32x8(v, config) 413 case OpRsh64Ux16: 414 return rewriteValueS390X_OpRsh64Ux16(v, config) 415 case OpRsh64Ux32: 416 return rewriteValueS390X_OpRsh64Ux32(v, config) 417 case OpRsh64Ux64: 418 return rewriteValueS390X_OpRsh64Ux64(v, config) 419 case OpRsh64Ux8: 420 return rewriteValueS390X_OpRsh64Ux8(v, config) 421 case OpRsh64x16: 422 return rewriteValueS390X_OpRsh64x16(v, config) 423 case OpRsh64x32: 424 return rewriteValueS390X_OpRsh64x32(v, config) 425 case OpRsh64x64: 426 return rewriteValueS390X_OpRsh64x64(v, config) 427 case OpRsh64x8: 428 return rewriteValueS390X_OpRsh64x8(v, config) 429 case OpRsh8Ux16: 430 return rewriteValueS390X_OpRsh8Ux16(v, config) 431 case OpRsh8Ux32: 432 return rewriteValueS390X_OpRsh8Ux32(v, config) 433 case OpRsh8Ux64: 434 return rewriteValueS390X_OpRsh8Ux64(v, config) 435 case OpRsh8Ux8: 436 return rewriteValueS390X_OpRsh8Ux8(v, config) 437 case OpRsh8x16: 438 return rewriteValueS390X_OpRsh8x16(v, config) 439 case OpRsh8x32: 440 return rewriteValueS390X_OpRsh8x32(v, config) 441 case OpRsh8x64: 442 return rewriteValueS390X_OpRsh8x64(v, config) 443 case OpRsh8x8: 444 return rewriteValueS390X_OpRsh8x8(v, config) 445 case OpS390XADD: 446 return rewriteValueS390X_OpS390XADD(v, config) 447 case OpS390XADDW: 448 return rewriteValueS390X_OpS390XADDW(v, config) 449 case OpS390XADDWconst: 450 return rewriteValueS390X_OpS390XADDWconst(v, config) 451 case OpS390XADDconst: 452 return rewriteValueS390X_OpS390XADDconst(v, config) 453 case OpS390XAND: 454 return rewriteValueS390X_OpS390XAND(v, config) 455 case OpS390XANDW: 456 return rewriteValueS390X_OpS390XANDW(v, config) 457 case OpS390XANDWconst: 458 return rewriteValueS390X_OpS390XANDWconst(v, config) 459 case OpS390XANDconst: 460 return rewriteValueS390X_OpS390XANDconst(v, config) 461 case OpS390XCMP: 462 return rewriteValueS390X_OpS390XCMP(v, config) 463 case OpS390XCMPU: 464 return rewriteValueS390X_OpS390XCMPU(v, config) 465 case OpS390XCMPUconst: 466 return rewriteValueS390X_OpS390XCMPUconst(v, config) 467 case OpS390XCMPW: 468 return rewriteValueS390X_OpS390XCMPW(v, config) 469 case OpS390XCMPWU: 470 return rewriteValueS390X_OpS390XCMPWU(v, config) 471 case OpS390XCMPWUconst: 472 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 473 case OpS390XCMPWconst: 474 return rewriteValueS390X_OpS390XCMPWconst(v, config) 475 case OpS390XCMPconst: 476 return rewriteValueS390X_OpS390XCMPconst(v, config) 477 case OpS390XFMOVDload: 478 return rewriteValueS390X_OpS390XFMOVDload(v, config) 479 case OpS390XFMOVDloadidx: 480 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 481 case OpS390XFMOVDstore: 482 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 483 case OpS390XFMOVDstoreidx: 484 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 485 case OpS390XFMOVSload: 486 return rewriteValueS390X_OpS390XFMOVSload(v, config) 487 case OpS390XFMOVSloadidx: 488 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 489 case OpS390XFMOVSstore: 490 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 491 case OpS390XFMOVSstoreidx: 492 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 493 case OpS390XMOVBZload: 494 return rewriteValueS390X_OpS390XMOVBZload(v, config) 495 case OpS390XMOVBZloadidx: 496 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 497 case OpS390XMOVBZreg: 498 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 499 case OpS390XMOVBload: 500 return rewriteValueS390X_OpS390XMOVBload(v, config) 501 case OpS390XMOVBreg: 502 return rewriteValueS390X_OpS390XMOVBreg(v, config) 503 case OpS390XMOVBstore: 504 return rewriteValueS390X_OpS390XMOVBstore(v, config) 505 case OpS390XMOVBstoreconst: 506 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 507 case OpS390XMOVBstoreidx: 508 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 509 case OpS390XMOVDEQ: 510 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 511 case OpS390XMOVDGE: 512 return rewriteValueS390X_OpS390XMOVDGE(v, config) 513 case OpS390XMOVDGT: 514 return rewriteValueS390X_OpS390XMOVDGT(v, config) 515 case OpS390XMOVDLE: 516 return rewriteValueS390X_OpS390XMOVDLE(v, config) 517 case OpS390XMOVDLT: 518 return rewriteValueS390X_OpS390XMOVDLT(v, config) 519 case OpS390XMOVDNE: 520 return rewriteValueS390X_OpS390XMOVDNE(v, config) 521 case OpS390XMOVDaddridx: 522 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 523 case OpS390XMOVDload: 524 return rewriteValueS390X_OpS390XMOVDload(v, config) 525 case OpS390XMOVDloadidx: 526 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 527 case OpS390XMOVDnop: 528 return rewriteValueS390X_OpS390XMOVDnop(v, config) 529 case OpS390XMOVDreg: 530 return rewriteValueS390X_OpS390XMOVDreg(v, config) 531 case OpS390XMOVDstore: 532 return rewriteValueS390X_OpS390XMOVDstore(v, config) 533 case OpS390XMOVDstoreconst: 534 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 535 case OpS390XMOVDstoreidx: 536 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 537 case OpS390XMOVHBRstore: 538 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 539 case OpS390XMOVHBRstoreidx: 540 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 541 case OpS390XMOVHZload: 542 return rewriteValueS390X_OpS390XMOVHZload(v, config) 543 case OpS390XMOVHZloadidx: 544 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 545 case OpS390XMOVHZreg: 546 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 547 case OpS390XMOVHload: 548 return rewriteValueS390X_OpS390XMOVHload(v, config) 549 case OpS390XMOVHreg: 550 return rewriteValueS390X_OpS390XMOVHreg(v, config) 551 case OpS390XMOVHstore: 552 return rewriteValueS390X_OpS390XMOVHstore(v, config) 553 case OpS390XMOVHstoreconst: 554 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 555 case OpS390XMOVHstoreidx: 556 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 557 case OpS390XMOVWBRstore: 558 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 559 case OpS390XMOVWBRstoreidx: 560 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 561 case OpS390XMOVWZload: 562 return rewriteValueS390X_OpS390XMOVWZload(v, config) 563 case OpS390XMOVWZloadidx: 564 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 565 case OpS390XMOVWZreg: 566 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 567 case OpS390XMOVWload: 568 return rewriteValueS390X_OpS390XMOVWload(v, config) 569 case OpS390XMOVWreg: 570 return rewriteValueS390X_OpS390XMOVWreg(v, config) 571 case OpS390XMOVWstore: 572 return rewriteValueS390X_OpS390XMOVWstore(v, config) 573 case OpS390XMOVWstoreconst: 574 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 575 case OpS390XMOVWstoreidx: 576 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 577 case OpS390XMULLD: 578 return rewriteValueS390X_OpS390XMULLD(v, config) 579 case OpS390XMULLDconst: 580 return rewriteValueS390X_OpS390XMULLDconst(v, config) 581 case OpS390XMULLW: 582 return rewriteValueS390X_OpS390XMULLW(v, config) 583 case OpS390XMULLWconst: 584 return rewriteValueS390X_OpS390XMULLWconst(v, config) 585 case OpS390XNEG: 586 return rewriteValueS390X_OpS390XNEG(v, config) 587 case OpS390XNEGW: 588 return rewriteValueS390X_OpS390XNEGW(v, config) 589 case OpS390XNOT: 590 return rewriteValueS390X_OpS390XNOT(v, config) 591 case OpS390XNOTW: 592 return rewriteValueS390X_OpS390XNOTW(v, config) 593 case OpS390XOR: 594 return rewriteValueS390X_OpS390XOR(v, config) 595 case OpS390XORW: 596 return rewriteValueS390X_OpS390XORW(v, config) 597 case OpS390XORWconst: 598 return rewriteValueS390X_OpS390XORWconst(v, config) 599 case OpS390XORconst: 600 return rewriteValueS390X_OpS390XORconst(v, config) 601 case OpS390XSLD: 602 return rewriteValueS390X_OpS390XSLD(v, config) 603 case OpS390XSLW: 604 return rewriteValueS390X_OpS390XSLW(v, config) 605 case OpS390XSRAD: 606 return rewriteValueS390X_OpS390XSRAD(v, config) 607 case OpS390XSRADconst: 608 return rewriteValueS390X_OpS390XSRADconst(v, config) 609 case OpS390XSRAW: 610 return rewriteValueS390X_OpS390XSRAW(v, config) 611 case OpS390XSRAWconst: 612 return rewriteValueS390X_OpS390XSRAWconst(v, config) 613 case OpS390XSRD: 614 return rewriteValueS390X_OpS390XSRD(v, config) 615 case OpS390XSRW: 616 return rewriteValueS390X_OpS390XSRW(v, config) 617 case OpS390XSTM2: 618 return rewriteValueS390X_OpS390XSTM2(v, config) 619 case OpS390XSTMG2: 620 return rewriteValueS390X_OpS390XSTMG2(v, config) 621 case OpS390XSUB: 622 return rewriteValueS390X_OpS390XSUB(v, config) 623 case OpS390XSUBEWcarrymask: 624 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 625 case OpS390XSUBEcarrymask: 626 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 627 case OpS390XSUBW: 628 return rewriteValueS390X_OpS390XSUBW(v, config) 629 case OpS390XSUBWconst: 630 return rewriteValueS390X_OpS390XSUBWconst(v, config) 631 case OpS390XSUBconst: 632 return rewriteValueS390X_OpS390XSUBconst(v, config) 633 case OpS390XXOR: 634 return rewriteValueS390X_OpS390XXOR(v, config) 635 case OpS390XXORW: 636 return rewriteValueS390X_OpS390XXORW(v, config) 637 case OpS390XXORWconst: 638 return rewriteValueS390X_OpS390XXORWconst(v, config) 639 case OpS390XXORconst: 640 return rewriteValueS390X_OpS390XXORconst(v, config) 641 case OpSelect0: 642 return rewriteValueS390X_OpSelect0(v, config) 643 case OpSelect1: 644 return rewriteValueS390X_OpSelect1(v, config) 645 case OpSignExt16to32: 646 return rewriteValueS390X_OpSignExt16to32(v, config) 647 case OpSignExt16to64: 648 return rewriteValueS390X_OpSignExt16to64(v, config) 649 case OpSignExt32to64: 650 return rewriteValueS390X_OpSignExt32to64(v, config) 651 case OpSignExt8to16: 652 return rewriteValueS390X_OpSignExt8to16(v, config) 653 case OpSignExt8to32: 654 return rewriteValueS390X_OpSignExt8to32(v, config) 655 case OpSignExt8to64: 656 return rewriteValueS390X_OpSignExt8to64(v, config) 657 case OpSlicemask: 658 return rewriteValueS390X_OpSlicemask(v, config) 659 case OpSqrt: 660 return rewriteValueS390X_OpSqrt(v, config) 661 case OpStaticCall: 662 return rewriteValueS390X_OpStaticCall(v, config) 663 case OpStore: 664 return rewriteValueS390X_OpStore(v, config) 665 case OpSub16: 666 return rewriteValueS390X_OpSub16(v, config) 667 case OpSub32: 668 return rewriteValueS390X_OpSub32(v, config) 669 case OpSub32F: 670 return rewriteValueS390X_OpSub32F(v, config) 671 case OpSub64: 672 return rewriteValueS390X_OpSub64(v, config) 673 case OpSub64F: 674 return rewriteValueS390X_OpSub64F(v, config) 675 case OpSub8: 676 return rewriteValueS390X_OpSub8(v, config) 677 case OpSubPtr: 678 return rewriteValueS390X_OpSubPtr(v, config) 679 case OpTrunc16to8: 680 return rewriteValueS390X_OpTrunc16to8(v, config) 681 case OpTrunc32to16: 682 return rewriteValueS390X_OpTrunc32to16(v, config) 683 case OpTrunc32to8: 684 return rewriteValueS390X_OpTrunc32to8(v, config) 685 case OpTrunc64to16: 686 return rewriteValueS390X_OpTrunc64to16(v, config) 687 case OpTrunc64to32: 688 return rewriteValueS390X_OpTrunc64to32(v, config) 689 case OpTrunc64to8: 690 return rewriteValueS390X_OpTrunc64to8(v, config) 691 case OpXor16: 692 return rewriteValueS390X_OpXor16(v, config) 693 case OpXor32: 694 return rewriteValueS390X_OpXor32(v, config) 695 case OpXor64: 696 return rewriteValueS390X_OpXor64(v, config) 697 case OpXor8: 698 return rewriteValueS390X_OpXor8(v, config) 699 case OpZero: 700 return rewriteValueS390X_OpZero(v, config) 701 case OpZeroExt16to32: 702 return rewriteValueS390X_OpZeroExt16to32(v, config) 703 case OpZeroExt16to64: 704 return rewriteValueS390X_OpZeroExt16to64(v, config) 705 case OpZeroExt32to64: 706 return rewriteValueS390X_OpZeroExt32to64(v, config) 707 case OpZeroExt8to16: 708 return rewriteValueS390X_OpZeroExt8to16(v, config) 709 case OpZeroExt8to32: 710 return rewriteValueS390X_OpZeroExt8to32(v, config) 711 case OpZeroExt8to64: 712 return rewriteValueS390X_OpZeroExt8to64(v, config) 713 } 714 return false 715 } 716 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 717 b := v.Block 718 _ = b 719 // match: (Add16 x y) 720 // cond: 721 // result: (ADDW x y) 722 for { 723 x := v.Args[0] 724 y := v.Args[1] 725 v.reset(OpS390XADDW) 726 v.AddArg(x) 727 v.AddArg(y) 728 return true 729 } 730 } 731 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 732 b := v.Block 733 _ = b 734 // match: (Add32 x y) 735 // cond: 736 // result: (ADDW x y) 737 for { 738 x := v.Args[0] 739 y := v.Args[1] 740 v.reset(OpS390XADDW) 741 v.AddArg(x) 742 v.AddArg(y) 743 return true 744 } 745 } 746 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 747 b := v.Block 748 _ = b 749 // match: (Add32F x y) 750 // cond: 751 // result: (FADDS x y) 752 for { 753 x := v.Args[0] 754 y := v.Args[1] 755 v.reset(OpS390XFADDS) 756 v.AddArg(x) 757 v.AddArg(y) 758 return true 759 } 760 } 761 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 762 b := v.Block 763 _ = b 764 // match: (Add64 x y) 765 // cond: 766 // result: (ADD x y) 767 for { 768 x := v.Args[0] 769 y := v.Args[1] 770 v.reset(OpS390XADD) 771 v.AddArg(x) 772 v.AddArg(y) 773 return true 774 } 775 } 776 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 777 b := v.Block 778 _ = b 779 // match: (Add64F x y) 780 // cond: 781 // result: (FADD x y) 782 for { 783 x := v.Args[0] 784 y := v.Args[1] 785 v.reset(OpS390XFADD) 786 v.AddArg(x) 787 v.AddArg(y) 788 return true 789 } 790 } 791 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 792 b := v.Block 793 _ = b 794 // match: (Add8 x y) 795 // cond: 796 // result: (ADDW x y) 797 for { 798 x := v.Args[0] 799 y := v.Args[1] 800 v.reset(OpS390XADDW) 801 v.AddArg(x) 802 v.AddArg(y) 803 return true 804 } 805 } 806 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 807 b := v.Block 808 _ = b 809 // match: (AddPtr x y) 810 // cond: 811 // result: (ADD x y) 812 for { 813 x := v.Args[0] 814 y := v.Args[1] 815 v.reset(OpS390XADD) 816 v.AddArg(x) 817 v.AddArg(y) 818 return true 819 } 820 } 821 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 822 b := v.Block 823 _ = b 824 // match: (Addr {sym} base) 825 // cond: 826 // result: (MOVDaddr {sym} base) 827 for { 828 sym := v.Aux 829 base := v.Args[0] 830 v.reset(OpS390XMOVDaddr) 831 v.Aux = sym 832 v.AddArg(base) 833 return true 834 } 835 } 836 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 837 b := v.Block 838 _ = b 839 // match: (And16 x y) 840 // cond: 841 // result: (ANDW x y) 842 for { 843 x := v.Args[0] 844 y := v.Args[1] 845 v.reset(OpS390XANDW) 846 v.AddArg(x) 847 v.AddArg(y) 848 return true 849 } 850 } 851 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 852 b := v.Block 853 _ = b 854 // match: (And32 x y) 855 // cond: 856 // result: (ANDW x y) 857 for { 858 x := v.Args[0] 859 y := v.Args[1] 860 v.reset(OpS390XANDW) 861 v.AddArg(x) 862 v.AddArg(y) 863 return true 864 } 865 } 866 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 867 b := v.Block 868 _ = b 869 // match: (And64 x y) 870 // cond: 871 // result: (AND x y) 872 for { 873 x := v.Args[0] 874 y := v.Args[1] 875 v.reset(OpS390XAND) 876 v.AddArg(x) 877 v.AddArg(y) 878 return true 879 } 880 } 881 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 882 b := v.Block 883 _ = b 884 // match: (And8 x y) 885 // cond: 886 // result: (ANDW x y) 887 for { 888 x := v.Args[0] 889 y := v.Args[1] 890 v.reset(OpS390XANDW) 891 v.AddArg(x) 892 v.AddArg(y) 893 return true 894 } 895 } 896 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 897 b := v.Block 898 _ = b 899 // match: (AndB x y) 900 // cond: 901 // result: (ANDW x y) 902 for { 903 x := v.Args[0] 904 y := v.Args[1] 905 v.reset(OpS390XANDW) 906 v.AddArg(x) 907 v.AddArg(y) 908 return true 909 } 910 } 911 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 912 b := v.Block 913 _ = b 914 // match: (AtomicAdd32 ptr val mem) 915 // cond: 916 // result: (AddTupleFirst32 (LAA ptr val mem) val) 917 for { 918 ptr := v.Args[0] 919 val := v.Args[1] 920 mem := v.Args[2] 921 v.reset(OpS390XAddTupleFirst32) 922 v0 := b.NewValue0(v.Line, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 923 v0.AddArg(ptr) 924 v0.AddArg(val) 925 v0.AddArg(mem) 926 v.AddArg(v0) 927 v.AddArg(val) 928 return true 929 } 930 } 931 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 932 b := v.Block 933 _ = b 934 // match: (AtomicAdd64 ptr val mem) 935 // cond: 936 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 937 for { 938 ptr := v.Args[0] 939 val := v.Args[1] 940 mem := v.Args[2] 941 v.reset(OpS390XAddTupleFirst64) 942 v0 := b.NewValue0(v.Line, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 943 v0.AddArg(ptr) 944 v0.AddArg(val) 945 v0.AddArg(mem) 946 v.AddArg(v0) 947 v.AddArg(val) 948 return true 949 } 950 } 951 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 952 b := v.Block 953 _ = b 954 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 955 // cond: 956 // result: (LoweredAtomicCas32 ptr old new_ mem) 957 for { 958 ptr := v.Args[0] 959 old := v.Args[1] 960 new_ := v.Args[2] 961 mem := v.Args[3] 962 v.reset(OpS390XLoweredAtomicCas32) 963 v.AddArg(ptr) 964 v.AddArg(old) 965 v.AddArg(new_) 966 v.AddArg(mem) 967 return true 968 } 969 } 970 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 971 b := v.Block 972 _ = b 973 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 974 // cond: 975 // result: (LoweredAtomicCas64 ptr old new_ mem) 976 for { 977 ptr := v.Args[0] 978 old := v.Args[1] 979 new_ := v.Args[2] 980 mem := v.Args[3] 981 v.reset(OpS390XLoweredAtomicCas64) 982 v.AddArg(ptr) 983 v.AddArg(old) 984 v.AddArg(new_) 985 v.AddArg(mem) 986 return true 987 } 988 } 989 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 990 b := v.Block 991 _ = b 992 // match: (AtomicExchange32 ptr val mem) 993 // cond: 994 // result: (LoweredAtomicExchange32 ptr val mem) 995 for { 996 ptr := v.Args[0] 997 val := v.Args[1] 998 mem := v.Args[2] 999 v.reset(OpS390XLoweredAtomicExchange32) 1000 v.AddArg(ptr) 1001 v.AddArg(val) 1002 v.AddArg(mem) 1003 return true 1004 } 1005 } 1006 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1007 b := v.Block 1008 _ = b 1009 // match: (AtomicExchange64 ptr val mem) 1010 // cond: 1011 // result: (LoweredAtomicExchange64 ptr val mem) 1012 for { 1013 ptr := v.Args[0] 1014 val := v.Args[1] 1015 mem := v.Args[2] 1016 v.reset(OpS390XLoweredAtomicExchange64) 1017 v.AddArg(ptr) 1018 v.AddArg(val) 1019 v.AddArg(mem) 1020 return true 1021 } 1022 } 1023 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1024 b := v.Block 1025 _ = b 1026 // match: (AtomicLoad32 ptr mem) 1027 // cond: 1028 // result: (MOVWZatomicload ptr mem) 1029 for { 1030 ptr := v.Args[0] 1031 mem := v.Args[1] 1032 v.reset(OpS390XMOVWZatomicload) 1033 v.AddArg(ptr) 1034 v.AddArg(mem) 1035 return true 1036 } 1037 } 1038 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1039 b := v.Block 1040 _ = b 1041 // match: (AtomicLoad64 ptr mem) 1042 // cond: 1043 // result: (MOVDatomicload ptr mem) 1044 for { 1045 ptr := v.Args[0] 1046 mem := v.Args[1] 1047 v.reset(OpS390XMOVDatomicload) 1048 v.AddArg(ptr) 1049 v.AddArg(mem) 1050 return true 1051 } 1052 } 1053 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1054 b := v.Block 1055 _ = b 1056 // match: (AtomicLoadPtr ptr mem) 1057 // cond: 1058 // result: (MOVDatomicload ptr mem) 1059 for { 1060 ptr := v.Args[0] 1061 mem := v.Args[1] 1062 v.reset(OpS390XMOVDatomicload) 1063 v.AddArg(ptr) 1064 v.AddArg(mem) 1065 return true 1066 } 1067 } 1068 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1069 b := v.Block 1070 _ = b 1071 // match: (AtomicStore32 ptr val mem) 1072 // cond: 1073 // result: (MOVWatomicstore ptr val mem) 1074 for { 1075 ptr := v.Args[0] 1076 val := v.Args[1] 1077 mem := v.Args[2] 1078 v.reset(OpS390XMOVWatomicstore) 1079 v.AddArg(ptr) 1080 v.AddArg(val) 1081 v.AddArg(mem) 1082 return true 1083 } 1084 } 1085 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1086 b := v.Block 1087 _ = b 1088 // match: (AtomicStore64 ptr val mem) 1089 // cond: 1090 // result: (MOVDatomicstore ptr val mem) 1091 for { 1092 ptr := v.Args[0] 1093 val := v.Args[1] 1094 mem := v.Args[2] 1095 v.reset(OpS390XMOVDatomicstore) 1096 v.AddArg(ptr) 1097 v.AddArg(val) 1098 v.AddArg(mem) 1099 return true 1100 } 1101 } 1102 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1103 b := v.Block 1104 _ = b 1105 // match: (AtomicStorePtrNoWB ptr val mem) 1106 // cond: 1107 // result: (MOVDatomicstore ptr val mem) 1108 for { 1109 ptr := v.Args[0] 1110 val := v.Args[1] 1111 mem := v.Args[2] 1112 v.reset(OpS390XMOVDatomicstore) 1113 v.AddArg(ptr) 1114 v.AddArg(val) 1115 v.AddArg(mem) 1116 return true 1117 } 1118 } 1119 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1120 b := v.Block 1121 _ = b 1122 // match: (Avg64u <t> x y) 1123 // cond: 1124 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1125 for { 1126 t := v.Type 1127 x := v.Args[0] 1128 y := v.Args[1] 1129 v.reset(OpS390XADD) 1130 v0 := b.NewValue0(v.Line, OpS390XADD, t) 1131 v1 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1132 v1.AuxInt = 1 1133 v1.AddArg(x) 1134 v0.AddArg(v1) 1135 v2 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1136 v2.AuxInt = 1 1137 v2.AddArg(y) 1138 v0.AddArg(v2) 1139 v.AddArg(v0) 1140 v3 := b.NewValue0(v.Line, OpS390XANDconst, t) 1141 v3.AuxInt = 1 1142 v4 := b.NewValue0(v.Line, OpS390XAND, t) 1143 v4.AddArg(x) 1144 v4.AddArg(y) 1145 v3.AddArg(v4) 1146 v.AddArg(v3) 1147 return true 1148 } 1149 } 1150 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1151 b := v.Block 1152 _ = b 1153 // match: (Bswap32 x) 1154 // cond: 1155 // result: (MOVWBR x) 1156 for { 1157 x := v.Args[0] 1158 v.reset(OpS390XMOVWBR) 1159 v.AddArg(x) 1160 return true 1161 } 1162 } 1163 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1164 b := v.Block 1165 _ = b 1166 // match: (Bswap64 x) 1167 // cond: 1168 // result: (MOVDBR x) 1169 for { 1170 x := v.Args[0] 1171 v.reset(OpS390XMOVDBR) 1172 v.AddArg(x) 1173 return true 1174 } 1175 } 1176 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1177 b := v.Block 1178 _ = b 1179 // match: (ClosureCall [argwid] entry closure mem) 1180 // cond: 1181 // result: (CALLclosure [argwid] entry closure mem) 1182 for { 1183 argwid := v.AuxInt 1184 entry := v.Args[0] 1185 closure := v.Args[1] 1186 mem := v.Args[2] 1187 v.reset(OpS390XCALLclosure) 1188 v.AuxInt = argwid 1189 v.AddArg(entry) 1190 v.AddArg(closure) 1191 v.AddArg(mem) 1192 return true 1193 } 1194 } 1195 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1196 b := v.Block 1197 _ = b 1198 // match: (Com16 x) 1199 // cond: 1200 // result: (NOTW x) 1201 for { 1202 x := v.Args[0] 1203 v.reset(OpS390XNOTW) 1204 v.AddArg(x) 1205 return true 1206 } 1207 } 1208 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1209 b := v.Block 1210 _ = b 1211 // match: (Com32 x) 1212 // cond: 1213 // result: (NOTW x) 1214 for { 1215 x := v.Args[0] 1216 v.reset(OpS390XNOTW) 1217 v.AddArg(x) 1218 return true 1219 } 1220 } 1221 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1222 b := v.Block 1223 _ = b 1224 // match: (Com64 x) 1225 // cond: 1226 // result: (NOT x) 1227 for { 1228 x := v.Args[0] 1229 v.reset(OpS390XNOT) 1230 v.AddArg(x) 1231 return true 1232 } 1233 } 1234 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1235 b := v.Block 1236 _ = b 1237 // match: (Com8 x) 1238 // cond: 1239 // result: (NOTW x) 1240 for { 1241 x := v.Args[0] 1242 v.reset(OpS390XNOTW) 1243 v.AddArg(x) 1244 return true 1245 } 1246 } 1247 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1248 b := v.Block 1249 _ = b 1250 // match: (Const16 [val]) 1251 // cond: 1252 // result: (MOVDconst [val]) 1253 for { 1254 val := v.AuxInt 1255 v.reset(OpS390XMOVDconst) 1256 v.AuxInt = val 1257 return true 1258 } 1259 } 1260 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1261 b := v.Block 1262 _ = b 1263 // match: (Const32 [val]) 1264 // cond: 1265 // result: (MOVDconst [val]) 1266 for { 1267 val := v.AuxInt 1268 v.reset(OpS390XMOVDconst) 1269 v.AuxInt = val 1270 return true 1271 } 1272 } 1273 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1274 b := v.Block 1275 _ = b 1276 // match: (Const32F [val]) 1277 // cond: 1278 // result: (FMOVSconst [val]) 1279 for { 1280 val := v.AuxInt 1281 v.reset(OpS390XFMOVSconst) 1282 v.AuxInt = val 1283 return true 1284 } 1285 } 1286 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1287 b := v.Block 1288 _ = b 1289 // match: (Const64 [val]) 1290 // cond: 1291 // result: (MOVDconst [val]) 1292 for { 1293 val := v.AuxInt 1294 v.reset(OpS390XMOVDconst) 1295 v.AuxInt = val 1296 return true 1297 } 1298 } 1299 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1300 b := v.Block 1301 _ = b 1302 // match: (Const64F [val]) 1303 // cond: 1304 // result: (FMOVDconst [val]) 1305 for { 1306 val := v.AuxInt 1307 v.reset(OpS390XFMOVDconst) 1308 v.AuxInt = val 1309 return true 1310 } 1311 } 1312 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1313 b := v.Block 1314 _ = b 1315 // match: (Const8 [val]) 1316 // cond: 1317 // result: (MOVDconst [val]) 1318 for { 1319 val := v.AuxInt 1320 v.reset(OpS390XMOVDconst) 1321 v.AuxInt = val 1322 return true 1323 } 1324 } 1325 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1326 b := v.Block 1327 _ = b 1328 // match: (ConstBool [b]) 1329 // cond: 1330 // result: (MOVDconst [b]) 1331 for { 1332 b := v.AuxInt 1333 v.reset(OpS390XMOVDconst) 1334 v.AuxInt = b 1335 return true 1336 } 1337 } 1338 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1339 b := v.Block 1340 _ = b 1341 // match: (ConstNil) 1342 // cond: 1343 // result: (MOVDconst [0]) 1344 for { 1345 v.reset(OpS390XMOVDconst) 1346 v.AuxInt = 0 1347 return true 1348 } 1349 } 1350 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1351 b := v.Block 1352 _ = b 1353 // match: (Convert <t> x mem) 1354 // cond: 1355 // result: (MOVDconvert <t> x mem) 1356 for { 1357 t := v.Type 1358 x := v.Args[0] 1359 mem := v.Args[1] 1360 v.reset(OpS390XMOVDconvert) 1361 v.Type = t 1362 v.AddArg(x) 1363 v.AddArg(mem) 1364 return true 1365 } 1366 } 1367 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1368 b := v.Block 1369 _ = b 1370 // match: (Ctz32 <t> x) 1371 // cond: 1372 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1373 for { 1374 t := v.Type 1375 x := v.Args[0] 1376 v.reset(OpS390XSUB) 1377 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1378 v0.AuxInt = 64 1379 v.AddArg(v0) 1380 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1381 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1382 v3 := b.NewValue0(v.Line, OpS390XANDW, t) 1383 v4 := b.NewValue0(v.Line, OpS390XSUBWconst, t) 1384 v4.AuxInt = 1 1385 v4.AddArg(x) 1386 v3.AddArg(v4) 1387 v5 := b.NewValue0(v.Line, OpS390XNOTW, t) 1388 v5.AddArg(x) 1389 v3.AddArg(v5) 1390 v2.AddArg(v3) 1391 v1.AddArg(v2) 1392 v.AddArg(v1) 1393 return true 1394 } 1395 } 1396 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1397 b := v.Block 1398 _ = b 1399 // match: (Ctz64 <t> x) 1400 // cond: 1401 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1402 for { 1403 t := v.Type 1404 x := v.Args[0] 1405 v.reset(OpS390XSUB) 1406 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1407 v0.AuxInt = 64 1408 v.AddArg(v0) 1409 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1410 v2 := b.NewValue0(v.Line, OpS390XAND, t) 1411 v3 := b.NewValue0(v.Line, OpS390XSUBconst, t) 1412 v3.AuxInt = 1 1413 v3.AddArg(x) 1414 v2.AddArg(v3) 1415 v4 := b.NewValue0(v.Line, OpS390XNOT, t) 1416 v4.AddArg(x) 1417 v2.AddArg(v4) 1418 v1.AddArg(v2) 1419 v.AddArg(v1) 1420 return true 1421 } 1422 } 1423 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1424 b := v.Block 1425 _ = b 1426 // match: (Cvt32Fto32 x) 1427 // cond: 1428 // result: (CFEBRA x) 1429 for { 1430 x := v.Args[0] 1431 v.reset(OpS390XCFEBRA) 1432 v.AddArg(x) 1433 return true 1434 } 1435 } 1436 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1437 b := v.Block 1438 _ = b 1439 // match: (Cvt32Fto64 x) 1440 // cond: 1441 // result: (CGEBRA x) 1442 for { 1443 x := v.Args[0] 1444 v.reset(OpS390XCGEBRA) 1445 v.AddArg(x) 1446 return true 1447 } 1448 } 1449 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1450 b := v.Block 1451 _ = b 1452 // match: (Cvt32Fto64F x) 1453 // cond: 1454 // result: (LDEBR x) 1455 for { 1456 x := v.Args[0] 1457 v.reset(OpS390XLDEBR) 1458 v.AddArg(x) 1459 return true 1460 } 1461 } 1462 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1463 b := v.Block 1464 _ = b 1465 // match: (Cvt32to32F x) 1466 // cond: 1467 // result: (CEFBRA x) 1468 for { 1469 x := v.Args[0] 1470 v.reset(OpS390XCEFBRA) 1471 v.AddArg(x) 1472 return true 1473 } 1474 } 1475 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1476 b := v.Block 1477 _ = b 1478 // match: (Cvt32to64F x) 1479 // cond: 1480 // result: (CDFBRA x) 1481 for { 1482 x := v.Args[0] 1483 v.reset(OpS390XCDFBRA) 1484 v.AddArg(x) 1485 return true 1486 } 1487 } 1488 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1489 b := v.Block 1490 _ = b 1491 // match: (Cvt64Fto32 x) 1492 // cond: 1493 // result: (CFDBRA x) 1494 for { 1495 x := v.Args[0] 1496 v.reset(OpS390XCFDBRA) 1497 v.AddArg(x) 1498 return true 1499 } 1500 } 1501 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1502 b := v.Block 1503 _ = b 1504 // match: (Cvt64Fto32F x) 1505 // cond: 1506 // result: (LEDBR x) 1507 for { 1508 x := v.Args[0] 1509 v.reset(OpS390XLEDBR) 1510 v.AddArg(x) 1511 return true 1512 } 1513 } 1514 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1515 b := v.Block 1516 _ = b 1517 // match: (Cvt64Fto64 x) 1518 // cond: 1519 // result: (CGDBRA x) 1520 for { 1521 x := v.Args[0] 1522 v.reset(OpS390XCGDBRA) 1523 v.AddArg(x) 1524 return true 1525 } 1526 } 1527 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1528 b := v.Block 1529 _ = b 1530 // match: (Cvt64to32F x) 1531 // cond: 1532 // result: (CEGBRA x) 1533 for { 1534 x := v.Args[0] 1535 v.reset(OpS390XCEGBRA) 1536 v.AddArg(x) 1537 return true 1538 } 1539 } 1540 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1541 b := v.Block 1542 _ = b 1543 // match: (Cvt64to64F x) 1544 // cond: 1545 // result: (CDGBRA x) 1546 for { 1547 x := v.Args[0] 1548 v.reset(OpS390XCDGBRA) 1549 v.AddArg(x) 1550 return true 1551 } 1552 } 1553 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1554 b := v.Block 1555 _ = b 1556 // match: (DeferCall [argwid] mem) 1557 // cond: 1558 // result: (CALLdefer [argwid] mem) 1559 for { 1560 argwid := v.AuxInt 1561 mem := v.Args[0] 1562 v.reset(OpS390XCALLdefer) 1563 v.AuxInt = argwid 1564 v.AddArg(mem) 1565 return true 1566 } 1567 } 1568 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1569 b := v.Block 1570 _ = b 1571 // match: (Div16 x y) 1572 // cond: 1573 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1574 for { 1575 x := v.Args[0] 1576 y := v.Args[1] 1577 v.reset(OpS390XDIVW) 1578 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1579 v0.AddArg(x) 1580 v.AddArg(v0) 1581 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1582 v1.AddArg(y) 1583 v.AddArg(v1) 1584 return true 1585 } 1586 } 1587 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1588 b := v.Block 1589 _ = b 1590 // match: (Div16u x y) 1591 // cond: 1592 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1593 for { 1594 x := v.Args[0] 1595 y := v.Args[1] 1596 v.reset(OpS390XDIVWU) 1597 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1598 v0.AddArg(x) 1599 v.AddArg(v0) 1600 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1601 v1.AddArg(y) 1602 v.AddArg(v1) 1603 return true 1604 } 1605 } 1606 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1607 b := v.Block 1608 _ = b 1609 // match: (Div32 x y) 1610 // cond: 1611 // result: (DIVW (MOVWreg x) y) 1612 for { 1613 x := v.Args[0] 1614 y := v.Args[1] 1615 v.reset(OpS390XDIVW) 1616 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 1617 v0.AddArg(x) 1618 v.AddArg(v0) 1619 v.AddArg(y) 1620 return true 1621 } 1622 } 1623 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1624 b := v.Block 1625 _ = b 1626 // match: (Div32F x y) 1627 // cond: 1628 // result: (FDIVS x y) 1629 for { 1630 x := v.Args[0] 1631 y := v.Args[1] 1632 v.reset(OpS390XFDIVS) 1633 v.AddArg(x) 1634 v.AddArg(y) 1635 return true 1636 } 1637 } 1638 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1639 b := v.Block 1640 _ = b 1641 // match: (Div32u x y) 1642 // cond: 1643 // result: (DIVWU (MOVWZreg x) y) 1644 for { 1645 x := v.Args[0] 1646 y := v.Args[1] 1647 v.reset(OpS390XDIVWU) 1648 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1649 v0.AddArg(x) 1650 v.AddArg(v0) 1651 v.AddArg(y) 1652 return true 1653 } 1654 } 1655 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1656 b := v.Block 1657 _ = b 1658 // match: (Div64 x y) 1659 // cond: 1660 // result: (DIVD x y) 1661 for { 1662 x := v.Args[0] 1663 y := v.Args[1] 1664 v.reset(OpS390XDIVD) 1665 v.AddArg(x) 1666 v.AddArg(y) 1667 return true 1668 } 1669 } 1670 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1671 b := v.Block 1672 _ = b 1673 // match: (Div64F x y) 1674 // cond: 1675 // result: (FDIV x y) 1676 for { 1677 x := v.Args[0] 1678 y := v.Args[1] 1679 v.reset(OpS390XFDIV) 1680 v.AddArg(x) 1681 v.AddArg(y) 1682 return true 1683 } 1684 } 1685 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1686 b := v.Block 1687 _ = b 1688 // match: (Div64u x y) 1689 // cond: 1690 // result: (DIVDU x y) 1691 for { 1692 x := v.Args[0] 1693 y := v.Args[1] 1694 v.reset(OpS390XDIVDU) 1695 v.AddArg(x) 1696 v.AddArg(y) 1697 return true 1698 } 1699 } 1700 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1701 b := v.Block 1702 _ = b 1703 // match: (Div8 x y) 1704 // cond: 1705 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1706 for { 1707 x := v.Args[0] 1708 y := v.Args[1] 1709 v.reset(OpS390XDIVW) 1710 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1711 v0.AddArg(x) 1712 v.AddArg(v0) 1713 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1714 v1.AddArg(y) 1715 v.AddArg(v1) 1716 return true 1717 } 1718 } 1719 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1720 b := v.Block 1721 _ = b 1722 // match: (Div8u x y) 1723 // cond: 1724 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1725 for { 1726 x := v.Args[0] 1727 y := v.Args[1] 1728 v.reset(OpS390XDIVWU) 1729 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1730 v0.AddArg(x) 1731 v.AddArg(v0) 1732 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1733 v1.AddArg(y) 1734 v.AddArg(v1) 1735 return true 1736 } 1737 } 1738 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1739 b := v.Block 1740 _ = b 1741 // match: (Eq16 x y) 1742 // cond: 1743 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1744 for { 1745 x := v.Args[0] 1746 y := v.Args[1] 1747 v.reset(OpS390XMOVDEQ) 1748 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1749 v0.AuxInt = 0 1750 v.AddArg(v0) 1751 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1752 v1.AuxInt = 1 1753 v.AddArg(v1) 1754 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1755 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1756 v3.AddArg(x) 1757 v2.AddArg(v3) 1758 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1759 v4.AddArg(y) 1760 v2.AddArg(v4) 1761 v.AddArg(v2) 1762 return true 1763 } 1764 } 1765 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1766 b := v.Block 1767 _ = b 1768 // match: (Eq32 x y) 1769 // cond: 1770 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1771 for { 1772 x := v.Args[0] 1773 y := v.Args[1] 1774 v.reset(OpS390XMOVDEQ) 1775 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1776 v0.AuxInt = 0 1777 v.AddArg(v0) 1778 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1779 v1.AuxInt = 1 1780 v.AddArg(v1) 1781 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 1782 v2.AddArg(x) 1783 v2.AddArg(y) 1784 v.AddArg(v2) 1785 return true 1786 } 1787 } 1788 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1789 b := v.Block 1790 _ = b 1791 // match: (Eq32F x y) 1792 // cond: 1793 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1794 for { 1795 x := v.Args[0] 1796 y := v.Args[1] 1797 v.reset(OpS390XMOVDEQ) 1798 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1799 v0.AuxInt = 0 1800 v.AddArg(v0) 1801 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1802 v1.AuxInt = 1 1803 v.AddArg(v1) 1804 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 1805 v2.AddArg(x) 1806 v2.AddArg(y) 1807 v.AddArg(v2) 1808 return true 1809 } 1810 } 1811 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1812 b := v.Block 1813 _ = b 1814 // match: (Eq64 x y) 1815 // cond: 1816 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1817 for { 1818 x := v.Args[0] 1819 y := v.Args[1] 1820 v.reset(OpS390XMOVDEQ) 1821 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1822 v0.AuxInt = 0 1823 v.AddArg(v0) 1824 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1825 v1.AuxInt = 1 1826 v.AddArg(v1) 1827 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1828 v2.AddArg(x) 1829 v2.AddArg(y) 1830 v.AddArg(v2) 1831 return true 1832 } 1833 } 1834 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1835 b := v.Block 1836 _ = b 1837 // match: (Eq64F x y) 1838 // cond: 1839 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1840 for { 1841 x := v.Args[0] 1842 y := v.Args[1] 1843 v.reset(OpS390XMOVDEQ) 1844 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1845 v0.AuxInt = 0 1846 v.AddArg(v0) 1847 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1848 v1.AuxInt = 1 1849 v.AddArg(v1) 1850 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 1851 v2.AddArg(x) 1852 v2.AddArg(y) 1853 v.AddArg(v2) 1854 return true 1855 } 1856 } 1857 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1858 b := v.Block 1859 _ = b 1860 // match: (Eq8 x y) 1861 // cond: 1862 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1863 for { 1864 x := v.Args[0] 1865 y := v.Args[1] 1866 v.reset(OpS390XMOVDEQ) 1867 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1868 v0.AuxInt = 0 1869 v.AddArg(v0) 1870 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1871 v1.AuxInt = 1 1872 v.AddArg(v1) 1873 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1874 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1875 v3.AddArg(x) 1876 v2.AddArg(v3) 1877 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1878 v4.AddArg(y) 1879 v2.AddArg(v4) 1880 v.AddArg(v2) 1881 return true 1882 } 1883 } 1884 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1885 b := v.Block 1886 _ = b 1887 // match: (EqB x y) 1888 // cond: 1889 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1890 for { 1891 x := v.Args[0] 1892 y := v.Args[1] 1893 v.reset(OpS390XMOVDEQ) 1894 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1895 v0.AuxInt = 0 1896 v.AddArg(v0) 1897 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1898 v1.AuxInt = 1 1899 v.AddArg(v1) 1900 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1901 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1902 v3.AddArg(x) 1903 v2.AddArg(v3) 1904 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1905 v4.AddArg(y) 1906 v2.AddArg(v4) 1907 v.AddArg(v2) 1908 return true 1909 } 1910 } 1911 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1912 b := v.Block 1913 _ = b 1914 // match: (EqPtr x y) 1915 // cond: 1916 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1917 for { 1918 x := v.Args[0] 1919 y := v.Args[1] 1920 v.reset(OpS390XMOVDEQ) 1921 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1922 v0.AuxInt = 0 1923 v.AddArg(v0) 1924 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1925 v1.AuxInt = 1 1926 v.AddArg(v1) 1927 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1928 v2.AddArg(x) 1929 v2.AddArg(y) 1930 v.AddArg(v2) 1931 return true 1932 } 1933 } 1934 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1935 b := v.Block 1936 _ = b 1937 // match: (Geq16 x y) 1938 // cond: 1939 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1940 for { 1941 x := v.Args[0] 1942 y := v.Args[1] 1943 v.reset(OpS390XMOVDGE) 1944 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1945 v0.AuxInt = 0 1946 v.AddArg(v0) 1947 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1948 v1.AuxInt = 1 1949 v.AddArg(v1) 1950 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1951 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1952 v3.AddArg(x) 1953 v2.AddArg(v3) 1954 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1955 v4.AddArg(y) 1956 v2.AddArg(v4) 1957 v.AddArg(v2) 1958 return true 1959 } 1960 } 1961 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1962 b := v.Block 1963 _ = b 1964 // match: (Geq16U x y) 1965 // cond: 1966 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1967 for { 1968 x := v.Args[0] 1969 y := v.Args[1] 1970 v.reset(OpS390XMOVDGE) 1971 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1972 v0.AuxInt = 0 1973 v.AddArg(v0) 1974 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1975 v1.AuxInt = 1 1976 v.AddArg(v1) 1977 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 1978 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1979 v3.AddArg(x) 1980 v2.AddArg(v3) 1981 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1982 v4.AddArg(y) 1983 v2.AddArg(v4) 1984 v.AddArg(v2) 1985 return true 1986 } 1987 } 1988 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1989 b := v.Block 1990 _ = b 1991 // match: (Geq32 x y) 1992 // cond: 1993 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1994 for { 1995 x := v.Args[0] 1996 y := v.Args[1] 1997 v.reset(OpS390XMOVDGE) 1998 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1999 v0.AuxInt = 0 2000 v.AddArg(v0) 2001 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2002 v1.AuxInt = 1 2003 v.AddArg(v1) 2004 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2005 v2.AddArg(x) 2006 v2.AddArg(y) 2007 v.AddArg(v2) 2008 return true 2009 } 2010 } 2011 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2012 b := v.Block 2013 _ = b 2014 // match: (Geq32F x y) 2015 // cond: 2016 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2017 for { 2018 x := v.Args[0] 2019 y := v.Args[1] 2020 v.reset(OpS390XMOVDGEnoinv) 2021 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2022 v0.AuxInt = 0 2023 v.AddArg(v0) 2024 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2025 v1.AuxInt = 1 2026 v.AddArg(v1) 2027 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2028 v2.AddArg(x) 2029 v2.AddArg(y) 2030 v.AddArg(v2) 2031 return true 2032 } 2033 } 2034 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2035 b := v.Block 2036 _ = b 2037 // match: (Geq32U x y) 2038 // cond: 2039 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2040 for { 2041 x := v.Args[0] 2042 y := v.Args[1] 2043 v.reset(OpS390XMOVDGE) 2044 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2045 v0.AuxInt = 0 2046 v.AddArg(v0) 2047 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2048 v1.AuxInt = 1 2049 v.AddArg(v1) 2050 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2051 v2.AddArg(x) 2052 v2.AddArg(y) 2053 v.AddArg(v2) 2054 return true 2055 } 2056 } 2057 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2058 b := v.Block 2059 _ = b 2060 // match: (Geq64 x y) 2061 // cond: 2062 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2063 for { 2064 x := v.Args[0] 2065 y := v.Args[1] 2066 v.reset(OpS390XMOVDGE) 2067 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2068 v0.AuxInt = 0 2069 v.AddArg(v0) 2070 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2071 v1.AuxInt = 1 2072 v.AddArg(v1) 2073 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2074 v2.AddArg(x) 2075 v2.AddArg(y) 2076 v.AddArg(v2) 2077 return true 2078 } 2079 } 2080 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2081 b := v.Block 2082 _ = b 2083 // match: (Geq64F x y) 2084 // cond: 2085 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2086 for { 2087 x := v.Args[0] 2088 y := v.Args[1] 2089 v.reset(OpS390XMOVDGEnoinv) 2090 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2091 v0.AuxInt = 0 2092 v.AddArg(v0) 2093 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2094 v1.AuxInt = 1 2095 v.AddArg(v1) 2096 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2097 v2.AddArg(x) 2098 v2.AddArg(y) 2099 v.AddArg(v2) 2100 return true 2101 } 2102 } 2103 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2104 b := v.Block 2105 _ = b 2106 // match: (Geq64U x y) 2107 // cond: 2108 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2109 for { 2110 x := v.Args[0] 2111 y := v.Args[1] 2112 v.reset(OpS390XMOVDGE) 2113 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2114 v0.AuxInt = 0 2115 v.AddArg(v0) 2116 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2117 v1.AuxInt = 1 2118 v.AddArg(v1) 2119 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2120 v2.AddArg(x) 2121 v2.AddArg(y) 2122 v.AddArg(v2) 2123 return true 2124 } 2125 } 2126 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2127 b := v.Block 2128 _ = b 2129 // match: (Geq8 x y) 2130 // cond: 2131 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2132 for { 2133 x := v.Args[0] 2134 y := v.Args[1] 2135 v.reset(OpS390XMOVDGE) 2136 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2137 v0.AuxInt = 0 2138 v.AddArg(v0) 2139 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2140 v1.AuxInt = 1 2141 v.AddArg(v1) 2142 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2143 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2144 v3.AddArg(x) 2145 v2.AddArg(v3) 2146 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2147 v4.AddArg(y) 2148 v2.AddArg(v4) 2149 v.AddArg(v2) 2150 return true 2151 } 2152 } 2153 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2154 b := v.Block 2155 _ = b 2156 // match: (Geq8U x y) 2157 // cond: 2158 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2159 for { 2160 x := v.Args[0] 2161 y := v.Args[1] 2162 v.reset(OpS390XMOVDGE) 2163 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2164 v0.AuxInt = 0 2165 v.AddArg(v0) 2166 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2167 v1.AuxInt = 1 2168 v.AddArg(v1) 2169 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2170 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2171 v3.AddArg(x) 2172 v2.AddArg(v3) 2173 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2174 v4.AddArg(y) 2175 v2.AddArg(v4) 2176 v.AddArg(v2) 2177 return true 2178 } 2179 } 2180 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2181 b := v.Block 2182 _ = b 2183 // match: (GetClosurePtr) 2184 // cond: 2185 // result: (LoweredGetClosurePtr) 2186 for { 2187 v.reset(OpS390XLoweredGetClosurePtr) 2188 return true 2189 } 2190 } 2191 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2192 b := v.Block 2193 _ = b 2194 // match: (GetG mem) 2195 // cond: 2196 // result: (LoweredGetG mem) 2197 for { 2198 mem := v.Args[0] 2199 v.reset(OpS390XLoweredGetG) 2200 v.AddArg(mem) 2201 return true 2202 } 2203 } 2204 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2205 b := v.Block 2206 _ = b 2207 // match: (GoCall [argwid] mem) 2208 // cond: 2209 // result: (CALLgo [argwid] mem) 2210 for { 2211 argwid := v.AuxInt 2212 mem := v.Args[0] 2213 v.reset(OpS390XCALLgo) 2214 v.AuxInt = argwid 2215 v.AddArg(mem) 2216 return true 2217 } 2218 } 2219 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2220 b := v.Block 2221 _ = b 2222 // match: (Greater16 x y) 2223 // cond: 2224 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2225 for { 2226 x := v.Args[0] 2227 y := v.Args[1] 2228 v.reset(OpS390XMOVDGT) 2229 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2230 v0.AuxInt = 0 2231 v.AddArg(v0) 2232 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2233 v1.AuxInt = 1 2234 v.AddArg(v1) 2235 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2236 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2237 v3.AddArg(x) 2238 v2.AddArg(v3) 2239 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2240 v4.AddArg(y) 2241 v2.AddArg(v4) 2242 v.AddArg(v2) 2243 return true 2244 } 2245 } 2246 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2247 b := v.Block 2248 _ = b 2249 // match: (Greater16U x y) 2250 // cond: 2251 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2252 for { 2253 x := v.Args[0] 2254 y := v.Args[1] 2255 v.reset(OpS390XMOVDGT) 2256 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2257 v0.AuxInt = 0 2258 v.AddArg(v0) 2259 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2260 v1.AuxInt = 1 2261 v.AddArg(v1) 2262 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2263 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2264 v3.AddArg(x) 2265 v2.AddArg(v3) 2266 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2267 v4.AddArg(y) 2268 v2.AddArg(v4) 2269 v.AddArg(v2) 2270 return true 2271 } 2272 } 2273 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2274 b := v.Block 2275 _ = b 2276 // match: (Greater32 x y) 2277 // cond: 2278 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2279 for { 2280 x := v.Args[0] 2281 y := v.Args[1] 2282 v.reset(OpS390XMOVDGT) 2283 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2284 v0.AuxInt = 0 2285 v.AddArg(v0) 2286 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2287 v1.AuxInt = 1 2288 v.AddArg(v1) 2289 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2290 v2.AddArg(x) 2291 v2.AddArg(y) 2292 v.AddArg(v2) 2293 return true 2294 } 2295 } 2296 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2297 b := v.Block 2298 _ = b 2299 // match: (Greater32F x y) 2300 // cond: 2301 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2302 for { 2303 x := v.Args[0] 2304 y := v.Args[1] 2305 v.reset(OpS390XMOVDGTnoinv) 2306 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2307 v0.AuxInt = 0 2308 v.AddArg(v0) 2309 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2310 v1.AuxInt = 1 2311 v.AddArg(v1) 2312 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2313 v2.AddArg(x) 2314 v2.AddArg(y) 2315 v.AddArg(v2) 2316 return true 2317 } 2318 } 2319 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2320 b := v.Block 2321 _ = b 2322 // match: (Greater32U x y) 2323 // cond: 2324 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2325 for { 2326 x := v.Args[0] 2327 y := v.Args[1] 2328 v.reset(OpS390XMOVDGT) 2329 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2330 v0.AuxInt = 0 2331 v.AddArg(v0) 2332 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2333 v1.AuxInt = 1 2334 v.AddArg(v1) 2335 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2336 v2.AddArg(x) 2337 v2.AddArg(y) 2338 v.AddArg(v2) 2339 return true 2340 } 2341 } 2342 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2343 b := v.Block 2344 _ = b 2345 // match: (Greater64 x y) 2346 // cond: 2347 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2348 for { 2349 x := v.Args[0] 2350 y := v.Args[1] 2351 v.reset(OpS390XMOVDGT) 2352 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2353 v0.AuxInt = 0 2354 v.AddArg(v0) 2355 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2356 v1.AuxInt = 1 2357 v.AddArg(v1) 2358 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2359 v2.AddArg(x) 2360 v2.AddArg(y) 2361 v.AddArg(v2) 2362 return true 2363 } 2364 } 2365 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2366 b := v.Block 2367 _ = b 2368 // match: (Greater64F x y) 2369 // cond: 2370 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2371 for { 2372 x := v.Args[0] 2373 y := v.Args[1] 2374 v.reset(OpS390XMOVDGTnoinv) 2375 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2376 v0.AuxInt = 0 2377 v.AddArg(v0) 2378 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2379 v1.AuxInt = 1 2380 v.AddArg(v1) 2381 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2382 v2.AddArg(x) 2383 v2.AddArg(y) 2384 v.AddArg(v2) 2385 return true 2386 } 2387 } 2388 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2389 b := v.Block 2390 _ = b 2391 // match: (Greater64U x y) 2392 // cond: 2393 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2394 for { 2395 x := v.Args[0] 2396 y := v.Args[1] 2397 v.reset(OpS390XMOVDGT) 2398 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2399 v0.AuxInt = 0 2400 v.AddArg(v0) 2401 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2402 v1.AuxInt = 1 2403 v.AddArg(v1) 2404 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2405 v2.AddArg(x) 2406 v2.AddArg(y) 2407 v.AddArg(v2) 2408 return true 2409 } 2410 } 2411 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2412 b := v.Block 2413 _ = b 2414 // match: (Greater8 x y) 2415 // cond: 2416 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2417 for { 2418 x := v.Args[0] 2419 y := v.Args[1] 2420 v.reset(OpS390XMOVDGT) 2421 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2422 v0.AuxInt = 0 2423 v.AddArg(v0) 2424 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2425 v1.AuxInt = 1 2426 v.AddArg(v1) 2427 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2428 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2429 v3.AddArg(x) 2430 v2.AddArg(v3) 2431 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2432 v4.AddArg(y) 2433 v2.AddArg(v4) 2434 v.AddArg(v2) 2435 return true 2436 } 2437 } 2438 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2439 b := v.Block 2440 _ = b 2441 // match: (Greater8U x y) 2442 // cond: 2443 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2444 for { 2445 x := v.Args[0] 2446 y := v.Args[1] 2447 v.reset(OpS390XMOVDGT) 2448 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2449 v0.AuxInt = 0 2450 v.AddArg(v0) 2451 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2452 v1.AuxInt = 1 2453 v.AddArg(v1) 2454 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2455 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2456 v3.AddArg(x) 2457 v2.AddArg(v3) 2458 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2459 v4.AddArg(y) 2460 v2.AddArg(v4) 2461 v.AddArg(v2) 2462 return true 2463 } 2464 } 2465 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2466 b := v.Block 2467 _ = b 2468 // match: (Hmul16 x y) 2469 // cond: 2470 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2471 for { 2472 x := v.Args[0] 2473 y := v.Args[1] 2474 v.reset(OpS390XSRDconst) 2475 v.AuxInt = 16 2476 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2477 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2478 v1.AddArg(x) 2479 v0.AddArg(v1) 2480 v2 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2481 v2.AddArg(y) 2482 v0.AddArg(v2) 2483 v.AddArg(v0) 2484 return true 2485 } 2486 } 2487 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2488 b := v.Block 2489 _ = b 2490 // match: (Hmul16u x y) 2491 // cond: 2492 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2493 for { 2494 x := v.Args[0] 2495 y := v.Args[1] 2496 v.reset(OpS390XSRDconst) 2497 v.AuxInt = 16 2498 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2499 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2500 v1.AddArg(x) 2501 v0.AddArg(v1) 2502 v2 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2503 v2.AddArg(y) 2504 v0.AddArg(v2) 2505 v.AddArg(v0) 2506 return true 2507 } 2508 } 2509 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2510 b := v.Block 2511 _ = b 2512 // match: (Hmul32 x y) 2513 // cond: 2514 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2515 for { 2516 x := v.Args[0] 2517 y := v.Args[1] 2518 v.reset(OpS390XSRDconst) 2519 v.AuxInt = 32 2520 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2521 v1 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2522 v1.AddArg(x) 2523 v0.AddArg(v1) 2524 v2 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2525 v2.AddArg(y) 2526 v0.AddArg(v2) 2527 v.AddArg(v0) 2528 return true 2529 } 2530 } 2531 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2532 b := v.Block 2533 _ = b 2534 // match: (Hmul32u x y) 2535 // cond: 2536 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2537 for { 2538 x := v.Args[0] 2539 y := v.Args[1] 2540 v.reset(OpS390XSRDconst) 2541 v.AuxInt = 32 2542 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2543 v1 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2544 v1.AddArg(x) 2545 v0.AddArg(v1) 2546 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2547 v2.AddArg(y) 2548 v0.AddArg(v2) 2549 v.AddArg(v0) 2550 return true 2551 } 2552 } 2553 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2554 b := v.Block 2555 _ = b 2556 // match: (Hmul64 x y) 2557 // cond: 2558 // result: (MULHD x y) 2559 for { 2560 x := v.Args[0] 2561 y := v.Args[1] 2562 v.reset(OpS390XMULHD) 2563 v.AddArg(x) 2564 v.AddArg(y) 2565 return true 2566 } 2567 } 2568 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2569 b := v.Block 2570 _ = b 2571 // match: (Hmul64u x y) 2572 // cond: 2573 // result: (MULHDU x y) 2574 for { 2575 x := v.Args[0] 2576 y := v.Args[1] 2577 v.reset(OpS390XMULHDU) 2578 v.AddArg(x) 2579 v.AddArg(y) 2580 return true 2581 } 2582 } 2583 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2584 b := v.Block 2585 _ = b 2586 // match: (Hmul8 x y) 2587 // cond: 2588 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2589 for { 2590 x := v.Args[0] 2591 y := v.Args[1] 2592 v.reset(OpS390XSRDconst) 2593 v.AuxInt = 8 2594 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2595 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2596 v1.AddArg(x) 2597 v0.AddArg(v1) 2598 v2 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2599 v2.AddArg(y) 2600 v0.AddArg(v2) 2601 v.AddArg(v0) 2602 return true 2603 } 2604 } 2605 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2606 b := v.Block 2607 _ = b 2608 // match: (Hmul8u x y) 2609 // cond: 2610 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2611 for { 2612 x := v.Args[0] 2613 y := v.Args[1] 2614 v.reset(OpS390XSRDconst) 2615 v.AuxInt = 8 2616 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2617 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2618 v1.AddArg(x) 2619 v0.AddArg(v1) 2620 v2 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2621 v2.AddArg(y) 2622 v0.AddArg(v2) 2623 v.AddArg(v0) 2624 return true 2625 } 2626 } 2627 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2628 b := v.Block 2629 _ = b 2630 // match: (ITab (Load ptr mem)) 2631 // cond: 2632 // result: (MOVDload ptr mem) 2633 for { 2634 v_0 := v.Args[0] 2635 if v_0.Op != OpLoad { 2636 break 2637 } 2638 ptr := v_0.Args[0] 2639 mem := v_0.Args[1] 2640 v.reset(OpS390XMOVDload) 2641 v.AddArg(ptr) 2642 v.AddArg(mem) 2643 return true 2644 } 2645 return false 2646 } 2647 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2648 b := v.Block 2649 _ = b 2650 // match: (InterCall [argwid] entry mem) 2651 // cond: 2652 // result: (CALLinter [argwid] entry mem) 2653 for { 2654 argwid := v.AuxInt 2655 entry := v.Args[0] 2656 mem := v.Args[1] 2657 v.reset(OpS390XCALLinter) 2658 v.AuxInt = argwid 2659 v.AddArg(entry) 2660 v.AddArg(mem) 2661 return true 2662 } 2663 } 2664 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2665 b := v.Block 2666 _ = b 2667 // match: (IsInBounds idx len) 2668 // cond: 2669 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2670 for { 2671 idx := v.Args[0] 2672 len := v.Args[1] 2673 v.reset(OpS390XMOVDLT) 2674 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2675 v0.AuxInt = 0 2676 v.AddArg(v0) 2677 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2678 v1.AuxInt = 1 2679 v.AddArg(v1) 2680 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2681 v2.AddArg(idx) 2682 v2.AddArg(len) 2683 v.AddArg(v2) 2684 return true 2685 } 2686 } 2687 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2688 b := v.Block 2689 _ = b 2690 // match: (IsNonNil p) 2691 // cond: 2692 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2693 for { 2694 p := v.Args[0] 2695 v.reset(OpS390XMOVDNE) 2696 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2697 v0.AuxInt = 0 2698 v.AddArg(v0) 2699 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2700 v1.AuxInt = 1 2701 v.AddArg(v1) 2702 v2 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 2703 v2.AuxInt = 0 2704 v2.AddArg(p) 2705 v.AddArg(v2) 2706 return true 2707 } 2708 } 2709 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2710 b := v.Block 2711 _ = b 2712 // match: (IsSliceInBounds idx len) 2713 // cond: 2714 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2715 for { 2716 idx := v.Args[0] 2717 len := v.Args[1] 2718 v.reset(OpS390XMOVDLE) 2719 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2720 v0.AuxInt = 0 2721 v.AddArg(v0) 2722 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2723 v1.AuxInt = 1 2724 v.AddArg(v1) 2725 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2726 v2.AddArg(idx) 2727 v2.AddArg(len) 2728 v.AddArg(v2) 2729 return true 2730 } 2731 } 2732 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2733 b := v.Block 2734 _ = b 2735 // match: (Leq16 x y) 2736 // cond: 2737 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2738 for { 2739 x := v.Args[0] 2740 y := v.Args[1] 2741 v.reset(OpS390XMOVDLE) 2742 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2743 v0.AuxInt = 0 2744 v.AddArg(v0) 2745 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2746 v1.AuxInt = 1 2747 v.AddArg(v1) 2748 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2749 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2750 v3.AddArg(x) 2751 v2.AddArg(v3) 2752 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2753 v4.AddArg(y) 2754 v2.AddArg(v4) 2755 v.AddArg(v2) 2756 return true 2757 } 2758 } 2759 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2760 b := v.Block 2761 _ = b 2762 // match: (Leq16U x y) 2763 // cond: 2764 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2765 for { 2766 x := v.Args[0] 2767 y := v.Args[1] 2768 v.reset(OpS390XMOVDLE) 2769 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2770 v0.AuxInt = 0 2771 v.AddArg(v0) 2772 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2773 v1.AuxInt = 1 2774 v.AddArg(v1) 2775 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2776 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2777 v3.AddArg(x) 2778 v2.AddArg(v3) 2779 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2780 v4.AddArg(y) 2781 v2.AddArg(v4) 2782 v.AddArg(v2) 2783 return true 2784 } 2785 } 2786 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2787 b := v.Block 2788 _ = b 2789 // match: (Leq32 x y) 2790 // cond: 2791 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2792 for { 2793 x := v.Args[0] 2794 y := v.Args[1] 2795 v.reset(OpS390XMOVDLE) 2796 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2797 v0.AuxInt = 0 2798 v.AddArg(v0) 2799 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2800 v1.AuxInt = 1 2801 v.AddArg(v1) 2802 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2803 v2.AddArg(x) 2804 v2.AddArg(y) 2805 v.AddArg(v2) 2806 return true 2807 } 2808 } 2809 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2810 b := v.Block 2811 _ = b 2812 // match: (Leq32F x y) 2813 // cond: 2814 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2815 for { 2816 x := v.Args[0] 2817 y := v.Args[1] 2818 v.reset(OpS390XMOVDGEnoinv) 2819 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2820 v0.AuxInt = 0 2821 v.AddArg(v0) 2822 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2823 v1.AuxInt = 1 2824 v.AddArg(v1) 2825 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2826 v2.AddArg(y) 2827 v2.AddArg(x) 2828 v.AddArg(v2) 2829 return true 2830 } 2831 } 2832 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2833 b := v.Block 2834 _ = b 2835 // match: (Leq32U x y) 2836 // cond: 2837 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2838 for { 2839 x := v.Args[0] 2840 y := v.Args[1] 2841 v.reset(OpS390XMOVDLE) 2842 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2843 v0.AuxInt = 0 2844 v.AddArg(v0) 2845 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2846 v1.AuxInt = 1 2847 v.AddArg(v1) 2848 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2849 v2.AddArg(x) 2850 v2.AddArg(y) 2851 v.AddArg(v2) 2852 return true 2853 } 2854 } 2855 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2856 b := v.Block 2857 _ = b 2858 // match: (Leq64 x y) 2859 // cond: 2860 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2861 for { 2862 x := v.Args[0] 2863 y := v.Args[1] 2864 v.reset(OpS390XMOVDLE) 2865 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2866 v0.AuxInt = 0 2867 v.AddArg(v0) 2868 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2869 v1.AuxInt = 1 2870 v.AddArg(v1) 2871 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2872 v2.AddArg(x) 2873 v2.AddArg(y) 2874 v.AddArg(v2) 2875 return true 2876 } 2877 } 2878 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2879 b := v.Block 2880 _ = b 2881 // match: (Leq64F x y) 2882 // cond: 2883 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2884 for { 2885 x := v.Args[0] 2886 y := v.Args[1] 2887 v.reset(OpS390XMOVDGEnoinv) 2888 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2889 v0.AuxInt = 0 2890 v.AddArg(v0) 2891 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2892 v1.AuxInt = 1 2893 v.AddArg(v1) 2894 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2895 v2.AddArg(y) 2896 v2.AddArg(x) 2897 v.AddArg(v2) 2898 return true 2899 } 2900 } 2901 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2902 b := v.Block 2903 _ = b 2904 // match: (Leq64U x y) 2905 // cond: 2906 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2907 for { 2908 x := v.Args[0] 2909 y := v.Args[1] 2910 v.reset(OpS390XMOVDLE) 2911 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2912 v0.AuxInt = 0 2913 v.AddArg(v0) 2914 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2915 v1.AuxInt = 1 2916 v.AddArg(v1) 2917 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2918 v2.AddArg(x) 2919 v2.AddArg(y) 2920 v.AddArg(v2) 2921 return true 2922 } 2923 } 2924 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2925 b := v.Block 2926 _ = b 2927 // match: (Leq8 x y) 2928 // cond: 2929 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2930 for { 2931 x := v.Args[0] 2932 y := v.Args[1] 2933 v.reset(OpS390XMOVDLE) 2934 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2935 v0.AuxInt = 0 2936 v.AddArg(v0) 2937 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2938 v1.AuxInt = 1 2939 v.AddArg(v1) 2940 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2941 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2942 v3.AddArg(x) 2943 v2.AddArg(v3) 2944 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2945 v4.AddArg(y) 2946 v2.AddArg(v4) 2947 v.AddArg(v2) 2948 return true 2949 } 2950 } 2951 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2952 b := v.Block 2953 _ = b 2954 // match: (Leq8U x y) 2955 // cond: 2956 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2957 for { 2958 x := v.Args[0] 2959 y := v.Args[1] 2960 v.reset(OpS390XMOVDLE) 2961 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2962 v0.AuxInt = 0 2963 v.AddArg(v0) 2964 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2965 v1.AuxInt = 1 2966 v.AddArg(v1) 2967 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2968 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2969 v3.AddArg(x) 2970 v2.AddArg(v3) 2971 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2972 v4.AddArg(y) 2973 v2.AddArg(v4) 2974 v.AddArg(v2) 2975 return true 2976 } 2977 } 2978 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2979 b := v.Block 2980 _ = b 2981 // match: (Less16 x y) 2982 // cond: 2983 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2984 for { 2985 x := v.Args[0] 2986 y := v.Args[1] 2987 v.reset(OpS390XMOVDLT) 2988 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2989 v0.AuxInt = 0 2990 v.AddArg(v0) 2991 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2992 v1.AuxInt = 1 2993 v.AddArg(v1) 2994 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2995 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2996 v3.AddArg(x) 2997 v2.AddArg(v3) 2998 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2999 v4.AddArg(y) 3000 v2.AddArg(v4) 3001 v.AddArg(v2) 3002 return true 3003 } 3004 } 3005 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3006 b := v.Block 3007 _ = b 3008 // match: (Less16U x y) 3009 // cond: 3010 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3011 for { 3012 x := v.Args[0] 3013 y := v.Args[1] 3014 v.reset(OpS390XMOVDLT) 3015 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3016 v0.AuxInt = 0 3017 v.AddArg(v0) 3018 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3019 v1.AuxInt = 1 3020 v.AddArg(v1) 3021 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3022 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3023 v3.AddArg(x) 3024 v2.AddArg(v3) 3025 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3026 v4.AddArg(y) 3027 v2.AddArg(v4) 3028 v.AddArg(v2) 3029 return true 3030 } 3031 } 3032 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3033 b := v.Block 3034 _ = b 3035 // match: (Less32 x y) 3036 // cond: 3037 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3038 for { 3039 x := v.Args[0] 3040 y := v.Args[1] 3041 v.reset(OpS390XMOVDLT) 3042 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3043 v0.AuxInt = 0 3044 v.AddArg(v0) 3045 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3046 v1.AuxInt = 1 3047 v.AddArg(v1) 3048 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 3049 v2.AddArg(x) 3050 v2.AddArg(y) 3051 v.AddArg(v2) 3052 return true 3053 } 3054 } 3055 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3056 b := v.Block 3057 _ = b 3058 // match: (Less32F x y) 3059 // cond: 3060 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3061 for { 3062 x := v.Args[0] 3063 y := v.Args[1] 3064 v.reset(OpS390XMOVDGTnoinv) 3065 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3066 v0.AuxInt = 0 3067 v.AddArg(v0) 3068 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3069 v1.AuxInt = 1 3070 v.AddArg(v1) 3071 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 3072 v2.AddArg(y) 3073 v2.AddArg(x) 3074 v.AddArg(v2) 3075 return true 3076 } 3077 } 3078 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3079 b := v.Block 3080 _ = b 3081 // match: (Less32U x y) 3082 // cond: 3083 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3084 for { 3085 x := v.Args[0] 3086 y := v.Args[1] 3087 v.reset(OpS390XMOVDLT) 3088 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3089 v0.AuxInt = 0 3090 v.AddArg(v0) 3091 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3092 v1.AuxInt = 1 3093 v.AddArg(v1) 3094 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 3095 v2.AddArg(x) 3096 v2.AddArg(y) 3097 v.AddArg(v2) 3098 return true 3099 } 3100 } 3101 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3102 b := v.Block 3103 _ = b 3104 // match: (Less64 x y) 3105 // cond: 3106 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3107 for { 3108 x := v.Args[0] 3109 y := v.Args[1] 3110 v.reset(OpS390XMOVDLT) 3111 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3112 v0.AuxInt = 0 3113 v.AddArg(v0) 3114 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3115 v1.AuxInt = 1 3116 v.AddArg(v1) 3117 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3118 v2.AddArg(x) 3119 v2.AddArg(y) 3120 v.AddArg(v2) 3121 return true 3122 } 3123 } 3124 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3125 b := v.Block 3126 _ = b 3127 // match: (Less64F x y) 3128 // cond: 3129 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3130 for { 3131 x := v.Args[0] 3132 y := v.Args[1] 3133 v.reset(OpS390XMOVDGTnoinv) 3134 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3135 v0.AuxInt = 0 3136 v.AddArg(v0) 3137 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3138 v1.AuxInt = 1 3139 v.AddArg(v1) 3140 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 3141 v2.AddArg(y) 3142 v2.AddArg(x) 3143 v.AddArg(v2) 3144 return true 3145 } 3146 } 3147 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3148 b := v.Block 3149 _ = b 3150 // match: (Less64U x y) 3151 // cond: 3152 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3153 for { 3154 x := v.Args[0] 3155 y := v.Args[1] 3156 v.reset(OpS390XMOVDLT) 3157 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3158 v0.AuxInt = 0 3159 v.AddArg(v0) 3160 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3161 v1.AuxInt = 1 3162 v.AddArg(v1) 3163 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3164 v2.AddArg(x) 3165 v2.AddArg(y) 3166 v.AddArg(v2) 3167 return true 3168 } 3169 } 3170 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3171 b := v.Block 3172 _ = b 3173 // match: (Less8 x y) 3174 // cond: 3175 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3176 for { 3177 x := v.Args[0] 3178 y := v.Args[1] 3179 v.reset(OpS390XMOVDLT) 3180 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3181 v0.AuxInt = 0 3182 v.AddArg(v0) 3183 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3184 v1.AuxInt = 1 3185 v.AddArg(v1) 3186 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3187 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3188 v3.AddArg(x) 3189 v2.AddArg(v3) 3190 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3191 v4.AddArg(y) 3192 v2.AddArg(v4) 3193 v.AddArg(v2) 3194 return true 3195 } 3196 } 3197 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3198 b := v.Block 3199 _ = b 3200 // match: (Less8U x y) 3201 // cond: 3202 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3203 for { 3204 x := v.Args[0] 3205 y := v.Args[1] 3206 v.reset(OpS390XMOVDLT) 3207 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3208 v0.AuxInt = 0 3209 v.AddArg(v0) 3210 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3211 v1.AuxInt = 1 3212 v.AddArg(v1) 3213 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3214 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3215 v3.AddArg(x) 3216 v2.AddArg(v3) 3217 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3218 v4.AddArg(y) 3219 v2.AddArg(v4) 3220 v.AddArg(v2) 3221 return true 3222 } 3223 } 3224 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3225 b := v.Block 3226 _ = b 3227 // match: (Load <t> ptr mem) 3228 // cond: (is64BitInt(t) || isPtr(t)) 3229 // result: (MOVDload ptr mem) 3230 for { 3231 t := v.Type 3232 ptr := v.Args[0] 3233 mem := v.Args[1] 3234 if !(is64BitInt(t) || isPtr(t)) { 3235 break 3236 } 3237 v.reset(OpS390XMOVDload) 3238 v.AddArg(ptr) 3239 v.AddArg(mem) 3240 return true 3241 } 3242 // match: (Load <t> ptr mem) 3243 // cond: is32BitInt(t) && isSigned(t) 3244 // result: (MOVWload ptr mem) 3245 for { 3246 t := v.Type 3247 ptr := v.Args[0] 3248 mem := v.Args[1] 3249 if !(is32BitInt(t) && isSigned(t)) { 3250 break 3251 } 3252 v.reset(OpS390XMOVWload) 3253 v.AddArg(ptr) 3254 v.AddArg(mem) 3255 return true 3256 } 3257 // match: (Load <t> ptr mem) 3258 // cond: is32BitInt(t) && !isSigned(t) 3259 // result: (MOVWZload ptr mem) 3260 for { 3261 t := v.Type 3262 ptr := v.Args[0] 3263 mem := v.Args[1] 3264 if !(is32BitInt(t) && !isSigned(t)) { 3265 break 3266 } 3267 v.reset(OpS390XMOVWZload) 3268 v.AddArg(ptr) 3269 v.AddArg(mem) 3270 return true 3271 } 3272 // match: (Load <t> ptr mem) 3273 // cond: is16BitInt(t) && isSigned(t) 3274 // result: (MOVHload ptr mem) 3275 for { 3276 t := v.Type 3277 ptr := v.Args[0] 3278 mem := v.Args[1] 3279 if !(is16BitInt(t) && isSigned(t)) { 3280 break 3281 } 3282 v.reset(OpS390XMOVHload) 3283 v.AddArg(ptr) 3284 v.AddArg(mem) 3285 return true 3286 } 3287 // match: (Load <t> ptr mem) 3288 // cond: is16BitInt(t) && !isSigned(t) 3289 // result: (MOVHZload ptr mem) 3290 for { 3291 t := v.Type 3292 ptr := v.Args[0] 3293 mem := v.Args[1] 3294 if !(is16BitInt(t) && !isSigned(t)) { 3295 break 3296 } 3297 v.reset(OpS390XMOVHZload) 3298 v.AddArg(ptr) 3299 v.AddArg(mem) 3300 return true 3301 } 3302 // match: (Load <t> ptr mem) 3303 // cond: is8BitInt(t) && isSigned(t) 3304 // result: (MOVBload ptr mem) 3305 for { 3306 t := v.Type 3307 ptr := v.Args[0] 3308 mem := v.Args[1] 3309 if !(is8BitInt(t) && isSigned(t)) { 3310 break 3311 } 3312 v.reset(OpS390XMOVBload) 3313 v.AddArg(ptr) 3314 v.AddArg(mem) 3315 return true 3316 } 3317 // match: (Load <t> ptr mem) 3318 // cond: (t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) 3319 // result: (MOVBZload ptr mem) 3320 for { 3321 t := v.Type 3322 ptr := v.Args[0] 3323 mem := v.Args[1] 3324 if !(t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) { 3325 break 3326 } 3327 v.reset(OpS390XMOVBZload) 3328 v.AddArg(ptr) 3329 v.AddArg(mem) 3330 return true 3331 } 3332 // match: (Load <t> ptr mem) 3333 // cond: is32BitFloat(t) 3334 // result: (FMOVSload ptr mem) 3335 for { 3336 t := v.Type 3337 ptr := v.Args[0] 3338 mem := v.Args[1] 3339 if !(is32BitFloat(t)) { 3340 break 3341 } 3342 v.reset(OpS390XFMOVSload) 3343 v.AddArg(ptr) 3344 v.AddArg(mem) 3345 return true 3346 } 3347 // match: (Load <t> ptr mem) 3348 // cond: is64BitFloat(t) 3349 // result: (FMOVDload ptr mem) 3350 for { 3351 t := v.Type 3352 ptr := v.Args[0] 3353 mem := v.Args[1] 3354 if !(is64BitFloat(t)) { 3355 break 3356 } 3357 v.reset(OpS390XFMOVDload) 3358 v.AddArg(ptr) 3359 v.AddArg(mem) 3360 return true 3361 } 3362 return false 3363 } 3364 func rewriteValueS390X_OpLrot32(v *Value, config *Config) bool { 3365 b := v.Block 3366 _ = b 3367 // match: (Lrot32 <t> x [c]) 3368 // cond: 3369 // result: (RLLconst <t> [c&31] x) 3370 for { 3371 t := v.Type 3372 c := v.AuxInt 3373 x := v.Args[0] 3374 v.reset(OpS390XRLLconst) 3375 v.Type = t 3376 v.AuxInt = c & 31 3377 v.AddArg(x) 3378 return true 3379 } 3380 } 3381 func rewriteValueS390X_OpLrot64(v *Value, config *Config) bool { 3382 b := v.Block 3383 _ = b 3384 // match: (Lrot64 <t> x [c]) 3385 // cond: 3386 // result: (RLLGconst <t> [c&63] x) 3387 for { 3388 t := v.Type 3389 c := v.AuxInt 3390 x := v.Args[0] 3391 v.reset(OpS390XRLLGconst) 3392 v.Type = t 3393 v.AuxInt = c & 63 3394 v.AddArg(x) 3395 return true 3396 } 3397 } 3398 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3399 b := v.Block 3400 _ = b 3401 // match: (Lsh16x16 <t> x y) 3402 // cond: 3403 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3404 for { 3405 t := v.Type 3406 x := v.Args[0] 3407 y := v.Args[1] 3408 v.reset(OpS390XANDW) 3409 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3410 v0.AddArg(x) 3411 v0.AddArg(y) 3412 v.AddArg(v0) 3413 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3414 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3415 v2.AuxInt = 31 3416 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3417 v3.AddArg(y) 3418 v2.AddArg(v3) 3419 v1.AddArg(v2) 3420 v.AddArg(v1) 3421 return true 3422 } 3423 } 3424 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3425 b := v.Block 3426 _ = b 3427 // match: (Lsh16x32 <t> x y) 3428 // cond: 3429 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3430 for { 3431 t := v.Type 3432 x := v.Args[0] 3433 y := v.Args[1] 3434 v.reset(OpS390XANDW) 3435 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3436 v0.AddArg(x) 3437 v0.AddArg(y) 3438 v.AddArg(v0) 3439 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3440 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3441 v2.AuxInt = 31 3442 v2.AddArg(y) 3443 v1.AddArg(v2) 3444 v.AddArg(v1) 3445 return true 3446 } 3447 } 3448 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3449 b := v.Block 3450 _ = b 3451 // match: (Lsh16x64 <t> x y) 3452 // cond: 3453 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3454 for { 3455 t := v.Type 3456 x := v.Args[0] 3457 y := v.Args[1] 3458 v.reset(OpS390XANDW) 3459 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3460 v0.AddArg(x) 3461 v0.AddArg(y) 3462 v.AddArg(v0) 3463 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3464 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3465 v2.AuxInt = 31 3466 v2.AddArg(y) 3467 v1.AddArg(v2) 3468 v.AddArg(v1) 3469 return true 3470 } 3471 } 3472 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3473 b := v.Block 3474 _ = b 3475 // match: (Lsh16x8 <t> x y) 3476 // cond: 3477 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3478 for { 3479 t := v.Type 3480 x := v.Args[0] 3481 y := v.Args[1] 3482 v.reset(OpS390XANDW) 3483 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3484 v0.AddArg(x) 3485 v0.AddArg(y) 3486 v.AddArg(v0) 3487 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3488 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3489 v2.AuxInt = 31 3490 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3491 v3.AddArg(y) 3492 v2.AddArg(v3) 3493 v1.AddArg(v2) 3494 v.AddArg(v1) 3495 return true 3496 } 3497 } 3498 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3499 b := v.Block 3500 _ = b 3501 // match: (Lsh32x16 <t> x y) 3502 // cond: 3503 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3504 for { 3505 t := v.Type 3506 x := v.Args[0] 3507 y := v.Args[1] 3508 v.reset(OpS390XANDW) 3509 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3510 v0.AddArg(x) 3511 v0.AddArg(y) 3512 v.AddArg(v0) 3513 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3514 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3515 v2.AuxInt = 31 3516 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3517 v3.AddArg(y) 3518 v2.AddArg(v3) 3519 v1.AddArg(v2) 3520 v.AddArg(v1) 3521 return true 3522 } 3523 } 3524 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3525 b := v.Block 3526 _ = b 3527 // match: (Lsh32x32 <t> x y) 3528 // cond: 3529 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3530 for { 3531 t := v.Type 3532 x := v.Args[0] 3533 y := v.Args[1] 3534 v.reset(OpS390XANDW) 3535 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3536 v0.AddArg(x) 3537 v0.AddArg(y) 3538 v.AddArg(v0) 3539 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3540 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3541 v2.AuxInt = 31 3542 v2.AddArg(y) 3543 v1.AddArg(v2) 3544 v.AddArg(v1) 3545 return true 3546 } 3547 } 3548 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3549 b := v.Block 3550 _ = b 3551 // match: (Lsh32x64 <t> x y) 3552 // cond: 3553 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3554 for { 3555 t := v.Type 3556 x := v.Args[0] 3557 y := v.Args[1] 3558 v.reset(OpS390XANDW) 3559 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3560 v0.AddArg(x) 3561 v0.AddArg(y) 3562 v.AddArg(v0) 3563 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3564 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3565 v2.AuxInt = 31 3566 v2.AddArg(y) 3567 v1.AddArg(v2) 3568 v.AddArg(v1) 3569 return true 3570 } 3571 } 3572 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3573 b := v.Block 3574 _ = b 3575 // match: (Lsh32x8 <t> x y) 3576 // cond: 3577 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3578 for { 3579 t := v.Type 3580 x := v.Args[0] 3581 y := v.Args[1] 3582 v.reset(OpS390XANDW) 3583 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3584 v0.AddArg(x) 3585 v0.AddArg(y) 3586 v.AddArg(v0) 3587 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3588 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3589 v2.AuxInt = 31 3590 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3591 v3.AddArg(y) 3592 v2.AddArg(v3) 3593 v1.AddArg(v2) 3594 v.AddArg(v1) 3595 return true 3596 } 3597 } 3598 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3599 b := v.Block 3600 _ = b 3601 // match: (Lsh64x16 <t> x y) 3602 // cond: 3603 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3604 for { 3605 t := v.Type 3606 x := v.Args[0] 3607 y := v.Args[1] 3608 v.reset(OpS390XAND) 3609 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3610 v0.AddArg(x) 3611 v0.AddArg(y) 3612 v.AddArg(v0) 3613 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3614 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3615 v2.AuxInt = 63 3616 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3617 v3.AddArg(y) 3618 v2.AddArg(v3) 3619 v1.AddArg(v2) 3620 v.AddArg(v1) 3621 return true 3622 } 3623 } 3624 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3625 b := v.Block 3626 _ = b 3627 // match: (Lsh64x32 <t> x y) 3628 // cond: 3629 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3630 for { 3631 t := v.Type 3632 x := v.Args[0] 3633 y := v.Args[1] 3634 v.reset(OpS390XAND) 3635 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3636 v0.AddArg(x) 3637 v0.AddArg(y) 3638 v.AddArg(v0) 3639 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3640 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3641 v2.AuxInt = 63 3642 v2.AddArg(y) 3643 v1.AddArg(v2) 3644 v.AddArg(v1) 3645 return true 3646 } 3647 } 3648 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3649 b := v.Block 3650 _ = b 3651 // match: (Lsh64x64 <t> x y) 3652 // cond: 3653 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3654 for { 3655 t := v.Type 3656 x := v.Args[0] 3657 y := v.Args[1] 3658 v.reset(OpS390XAND) 3659 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3660 v0.AddArg(x) 3661 v0.AddArg(y) 3662 v.AddArg(v0) 3663 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3664 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3665 v2.AuxInt = 63 3666 v2.AddArg(y) 3667 v1.AddArg(v2) 3668 v.AddArg(v1) 3669 return true 3670 } 3671 } 3672 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3673 b := v.Block 3674 _ = b 3675 // match: (Lsh64x8 <t> x y) 3676 // cond: 3677 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3678 for { 3679 t := v.Type 3680 x := v.Args[0] 3681 y := v.Args[1] 3682 v.reset(OpS390XAND) 3683 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3684 v0.AddArg(x) 3685 v0.AddArg(y) 3686 v.AddArg(v0) 3687 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3688 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3689 v2.AuxInt = 63 3690 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3691 v3.AddArg(y) 3692 v2.AddArg(v3) 3693 v1.AddArg(v2) 3694 v.AddArg(v1) 3695 return true 3696 } 3697 } 3698 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3699 b := v.Block 3700 _ = b 3701 // match: (Lsh8x16 <t> x y) 3702 // cond: 3703 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3704 for { 3705 t := v.Type 3706 x := v.Args[0] 3707 y := v.Args[1] 3708 v.reset(OpS390XANDW) 3709 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3710 v0.AddArg(x) 3711 v0.AddArg(y) 3712 v.AddArg(v0) 3713 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3714 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3715 v2.AuxInt = 31 3716 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3717 v3.AddArg(y) 3718 v2.AddArg(v3) 3719 v1.AddArg(v2) 3720 v.AddArg(v1) 3721 return true 3722 } 3723 } 3724 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3725 b := v.Block 3726 _ = b 3727 // match: (Lsh8x32 <t> x y) 3728 // cond: 3729 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3730 for { 3731 t := v.Type 3732 x := v.Args[0] 3733 y := v.Args[1] 3734 v.reset(OpS390XANDW) 3735 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3736 v0.AddArg(x) 3737 v0.AddArg(y) 3738 v.AddArg(v0) 3739 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3740 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3741 v2.AuxInt = 31 3742 v2.AddArg(y) 3743 v1.AddArg(v2) 3744 v.AddArg(v1) 3745 return true 3746 } 3747 } 3748 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3749 b := v.Block 3750 _ = b 3751 // match: (Lsh8x64 <t> x y) 3752 // cond: 3753 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3754 for { 3755 t := v.Type 3756 x := v.Args[0] 3757 y := v.Args[1] 3758 v.reset(OpS390XANDW) 3759 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3760 v0.AddArg(x) 3761 v0.AddArg(y) 3762 v.AddArg(v0) 3763 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3764 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3765 v2.AuxInt = 31 3766 v2.AddArg(y) 3767 v1.AddArg(v2) 3768 v.AddArg(v1) 3769 return true 3770 } 3771 } 3772 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3773 b := v.Block 3774 _ = b 3775 // match: (Lsh8x8 <t> x y) 3776 // cond: 3777 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3778 for { 3779 t := v.Type 3780 x := v.Args[0] 3781 y := v.Args[1] 3782 v.reset(OpS390XANDW) 3783 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3784 v0.AddArg(x) 3785 v0.AddArg(y) 3786 v.AddArg(v0) 3787 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3788 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3789 v2.AuxInt = 31 3790 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3791 v3.AddArg(y) 3792 v2.AddArg(v3) 3793 v1.AddArg(v2) 3794 v.AddArg(v1) 3795 return true 3796 } 3797 } 3798 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3799 b := v.Block 3800 _ = b 3801 // match: (Mod16 x y) 3802 // cond: 3803 // result: (MODW (MOVHreg x) (MOVHreg y)) 3804 for { 3805 x := v.Args[0] 3806 y := v.Args[1] 3807 v.reset(OpS390XMODW) 3808 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3809 v0.AddArg(x) 3810 v.AddArg(v0) 3811 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3812 v1.AddArg(y) 3813 v.AddArg(v1) 3814 return true 3815 } 3816 } 3817 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3818 b := v.Block 3819 _ = b 3820 // match: (Mod16u x y) 3821 // cond: 3822 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3823 for { 3824 x := v.Args[0] 3825 y := v.Args[1] 3826 v.reset(OpS390XMODWU) 3827 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3828 v0.AddArg(x) 3829 v.AddArg(v0) 3830 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3831 v1.AddArg(y) 3832 v.AddArg(v1) 3833 return true 3834 } 3835 } 3836 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3837 b := v.Block 3838 _ = b 3839 // match: (Mod32 x y) 3840 // cond: 3841 // result: (MODW (MOVWreg x) y) 3842 for { 3843 x := v.Args[0] 3844 y := v.Args[1] 3845 v.reset(OpS390XMODW) 3846 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 3847 v0.AddArg(x) 3848 v.AddArg(v0) 3849 v.AddArg(y) 3850 return true 3851 } 3852 } 3853 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3854 b := v.Block 3855 _ = b 3856 // match: (Mod32u x y) 3857 // cond: 3858 // result: (MODWU (MOVWZreg x) y) 3859 for { 3860 x := v.Args[0] 3861 y := v.Args[1] 3862 v.reset(OpS390XMODWU) 3863 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3864 v0.AddArg(x) 3865 v.AddArg(v0) 3866 v.AddArg(y) 3867 return true 3868 } 3869 } 3870 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3871 b := v.Block 3872 _ = b 3873 // match: (Mod64 x y) 3874 // cond: 3875 // result: (MODD x y) 3876 for { 3877 x := v.Args[0] 3878 y := v.Args[1] 3879 v.reset(OpS390XMODD) 3880 v.AddArg(x) 3881 v.AddArg(y) 3882 return true 3883 } 3884 } 3885 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3886 b := v.Block 3887 _ = b 3888 // match: (Mod64u x y) 3889 // cond: 3890 // result: (MODDU x y) 3891 for { 3892 x := v.Args[0] 3893 y := v.Args[1] 3894 v.reset(OpS390XMODDU) 3895 v.AddArg(x) 3896 v.AddArg(y) 3897 return true 3898 } 3899 } 3900 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3901 b := v.Block 3902 _ = b 3903 // match: (Mod8 x y) 3904 // cond: 3905 // result: (MODW (MOVBreg x) (MOVBreg y)) 3906 for { 3907 x := v.Args[0] 3908 y := v.Args[1] 3909 v.reset(OpS390XMODW) 3910 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3911 v0.AddArg(x) 3912 v.AddArg(v0) 3913 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3914 v1.AddArg(y) 3915 v.AddArg(v1) 3916 return true 3917 } 3918 } 3919 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3920 b := v.Block 3921 _ = b 3922 // match: (Mod8u x y) 3923 // cond: 3924 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3925 for { 3926 x := v.Args[0] 3927 y := v.Args[1] 3928 v.reset(OpS390XMODWU) 3929 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3930 v0.AddArg(x) 3931 v.AddArg(v0) 3932 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3933 v1.AddArg(y) 3934 v.AddArg(v1) 3935 return true 3936 } 3937 } 3938 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3939 b := v.Block 3940 _ = b 3941 // match: (Move [s] _ _ mem) 3942 // cond: SizeAndAlign(s).Size() == 0 3943 // result: mem 3944 for { 3945 s := v.AuxInt 3946 mem := v.Args[2] 3947 if !(SizeAndAlign(s).Size() == 0) { 3948 break 3949 } 3950 v.reset(OpCopy) 3951 v.Type = mem.Type 3952 v.AddArg(mem) 3953 return true 3954 } 3955 // match: (Move [s] dst src mem) 3956 // cond: SizeAndAlign(s).Size() == 1 3957 // result: (MOVBstore dst (MOVBZload src mem) mem) 3958 for { 3959 s := v.AuxInt 3960 dst := v.Args[0] 3961 src := v.Args[1] 3962 mem := v.Args[2] 3963 if !(SizeAndAlign(s).Size() == 1) { 3964 break 3965 } 3966 v.reset(OpS390XMOVBstore) 3967 v.AddArg(dst) 3968 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 3969 v0.AddArg(src) 3970 v0.AddArg(mem) 3971 v.AddArg(v0) 3972 v.AddArg(mem) 3973 return true 3974 } 3975 // match: (Move [s] dst src mem) 3976 // cond: SizeAndAlign(s).Size() == 2 3977 // result: (MOVHstore dst (MOVHZload src mem) mem) 3978 for { 3979 s := v.AuxInt 3980 dst := v.Args[0] 3981 src := v.Args[1] 3982 mem := v.Args[2] 3983 if !(SizeAndAlign(s).Size() == 2) { 3984 break 3985 } 3986 v.reset(OpS390XMOVHstore) 3987 v.AddArg(dst) 3988 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 3989 v0.AddArg(src) 3990 v0.AddArg(mem) 3991 v.AddArg(v0) 3992 v.AddArg(mem) 3993 return true 3994 } 3995 // match: (Move [s] dst src mem) 3996 // cond: SizeAndAlign(s).Size() == 4 3997 // result: (MOVWstore dst (MOVWZload src mem) mem) 3998 for { 3999 s := v.AuxInt 4000 dst := v.Args[0] 4001 src := v.Args[1] 4002 mem := v.Args[2] 4003 if !(SizeAndAlign(s).Size() == 4) { 4004 break 4005 } 4006 v.reset(OpS390XMOVWstore) 4007 v.AddArg(dst) 4008 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4009 v0.AddArg(src) 4010 v0.AddArg(mem) 4011 v.AddArg(v0) 4012 v.AddArg(mem) 4013 return true 4014 } 4015 // match: (Move [s] dst src mem) 4016 // cond: SizeAndAlign(s).Size() == 8 4017 // result: (MOVDstore dst (MOVDload src mem) mem) 4018 for { 4019 s := v.AuxInt 4020 dst := v.Args[0] 4021 src := v.Args[1] 4022 mem := v.Args[2] 4023 if !(SizeAndAlign(s).Size() == 8) { 4024 break 4025 } 4026 v.reset(OpS390XMOVDstore) 4027 v.AddArg(dst) 4028 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4029 v0.AddArg(src) 4030 v0.AddArg(mem) 4031 v.AddArg(v0) 4032 v.AddArg(mem) 4033 return true 4034 } 4035 // match: (Move [s] dst src mem) 4036 // cond: SizeAndAlign(s).Size() == 16 4037 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 4038 for { 4039 s := v.AuxInt 4040 dst := v.Args[0] 4041 src := v.Args[1] 4042 mem := v.Args[2] 4043 if !(SizeAndAlign(s).Size() == 16) { 4044 break 4045 } 4046 v.reset(OpS390XMOVDstore) 4047 v.AuxInt = 8 4048 v.AddArg(dst) 4049 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4050 v0.AuxInt = 8 4051 v0.AddArg(src) 4052 v0.AddArg(mem) 4053 v.AddArg(v0) 4054 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4055 v1.AddArg(dst) 4056 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4057 v2.AddArg(src) 4058 v2.AddArg(mem) 4059 v1.AddArg(v2) 4060 v1.AddArg(mem) 4061 v.AddArg(v1) 4062 return true 4063 } 4064 // match: (Move [s] dst src mem) 4065 // cond: SizeAndAlign(s).Size() == 24 4066 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4067 for { 4068 s := v.AuxInt 4069 dst := v.Args[0] 4070 src := v.Args[1] 4071 mem := v.Args[2] 4072 if !(SizeAndAlign(s).Size() == 24) { 4073 break 4074 } 4075 v.reset(OpS390XMOVDstore) 4076 v.AuxInt = 16 4077 v.AddArg(dst) 4078 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4079 v0.AuxInt = 16 4080 v0.AddArg(src) 4081 v0.AddArg(mem) 4082 v.AddArg(v0) 4083 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4084 v1.AuxInt = 8 4085 v1.AddArg(dst) 4086 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4087 v2.AuxInt = 8 4088 v2.AddArg(src) 4089 v2.AddArg(mem) 4090 v1.AddArg(v2) 4091 v3 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4092 v3.AddArg(dst) 4093 v4 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4094 v4.AddArg(src) 4095 v4.AddArg(mem) 4096 v3.AddArg(v4) 4097 v3.AddArg(mem) 4098 v1.AddArg(v3) 4099 v.AddArg(v1) 4100 return true 4101 } 4102 // match: (Move [s] dst src mem) 4103 // cond: SizeAndAlign(s).Size() == 3 4104 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4105 for { 4106 s := v.AuxInt 4107 dst := v.Args[0] 4108 src := v.Args[1] 4109 mem := v.Args[2] 4110 if !(SizeAndAlign(s).Size() == 3) { 4111 break 4112 } 4113 v.reset(OpS390XMOVBstore) 4114 v.AuxInt = 2 4115 v.AddArg(dst) 4116 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4117 v0.AuxInt = 2 4118 v0.AddArg(src) 4119 v0.AddArg(mem) 4120 v.AddArg(v0) 4121 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4122 v1.AddArg(dst) 4123 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4124 v2.AddArg(src) 4125 v2.AddArg(mem) 4126 v1.AddArg(v2) 4127 v1.AddArg(mem) 4128 v.AddArg(v1) 4129 return true 4130 } 4131 // match: (Move [s] dst src mem) 4132 // cond: SizeAndAlign(s).Size() == 5 4133 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4134 for { 4135 s := v.AuxInt 4136 dst := v.Args[0] 4137 src := v.Args[1] 4138 mem := v.Args[2] 4139 if !(SizeAndAlign(s).Size() == 5) { 4140 break 4141 } 4142 v.reset(OpS390XMOVBstore) 4143 v.AuxInt = 4 4144 v.AddArg(dst) 4145 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4146 v0.AuxInt = 4 4147 v0.AddArg(src) 4148 v0.AddArg(mem) 4149 v.AddArg(v0) 4150 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4151 v1.AddArg(dst) 4152 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4153 v2.AddArg(src) 4154 v2.AddArg(mem) 4155 v1.AddArg(v2) 4156 v1.AddArg(mem) 4157 v.AddArg(v1) 4158 return true 4159 } 4160 // match: (Move [s] dst src mem) 4161 // cond: SizeAndAlign(s).Size() == 6 4162 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4163 for { 4164 s := v.AuxInt 4165 dst := v.Args[0] 4166 src := v.Args[1] 4167 mem := v.Args[2] 4168 if !(SizeAndAlign(s).Size() == 6) { 4169 break 4170 } 4171 v.reset(OpS390XMOVHstore) 4172 v.AuxInt = 4 4173 v.AddArg(dst) 4174 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4175 v0.AuxInt = 4 4176 v0.AddArg(src) 4177 v0.AddArg(mem) 4178 v.AddArg(v0) 4179 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4180 v1.AddArg(dst) 4181 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4182 v2.AddArg(src) 4183 v2.AddArg(mem) 4184 v1.AddArg(v2) 4185 v1.AddArg(mem) 4186 v.AddArg(v1) 4187 return true 4188 } 4189 // match: (Move [s] dst src mem) 4190 // cond: SizeAndAlign(s).Size() == 7 4191 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4192 for { 4193 s := v.AuxInt 4194 dst := v.Args[0] 4195 src := v.Args[1] 4196 mem := v.Args[2] 4197 if !(SizeAndAlign(s).Size() == 7) { 4198 break 4199 } 4200 v.reset(OpS390XMOVBstore) 4201 v.AuxInt = 6 4202 v.AddArg(dst) 4203 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4204 v0.AuxInt = 6 4205 v0.AddArg(src) 4206 v0.AddArg(mem) 4207 v.AddArg(v0) 4208 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4209 v1.AuxInt = 4 4210 v1.AddArg(dst) 4211 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4212 v2.AuxInt = 4 4213 v2.AddArg(src) 4214 v2.AddArg(mem) 4215 v1.AddArg(v2) 4216 v3 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4217 v3.AddArg(dst) 4218 v4 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4219 v4.AddArg(src) 4220 v4.AddArg(mem) 4221 v3.AddArg(v4) 4222 v3.AddArg(mem) 4223 v1.AddArg(v3) 4224 v.AddArg(v1) 4225 return true 4226 } 4227 // match: (Move [s] dst src mem) 4228 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4229 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4230 for { 4231 s := v.AuxInt 4232 dst := v.Args[0] 4233 src := v.Args[1] 4234 mem := v.Args[2] 4235 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4236 break 4237 } 4238 v.reset(OpS390XMVC) 4239 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4240 v.AddArg(dst) 4241 v.AddArg(src) 4242 v.AddArg(mem) 4243 return true 4244 } 4245 // match: (Move [s] dst src mem) 4246 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4247 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4248 for { 4249 s := v.AuxInt 4250 dst := v.Args[0] 4251 src := v.Args[1] 4252 mem := v.Args[2] 4253 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4254 break 4255 } 4256 v.reset(OpS390XMVC) 4257 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4258 v.AddArg(dst) 4259 v.AddArg(src) 4260 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4261 v0.AuxInt = makeValAndOff(256, 0) 4262 v0.AddArg(dst) 4263 v0.AddArg(src) 4264 v0.AddArg(mem) 4265 v.AddArg(v0) 4266 return true 4267 } 4268 // match: (Move [s] dst src mem) 4269 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4270 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4271 for { 4272 s := v.AuxInt 4273 dst := v.Args[0] 4274 src := v.Args[1] 4275 mem := v.Args[2] 4276 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4277 break 4278 } 4279 v.reset(OpS390XMVC) 4280 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4281 v.AddArg(dst) 4282 v.AddArg(src) 4283 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4284 v0.AuxInt = makeValAndOff(256, 256) 4285 v0.AddArg(dst) 4286 v0.AddArg(src) 4287 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4288 v1.AuxInt = makeValAndOff(256, 0) 4289 v1.AddArg(dst) 4290 v1.AddArg(src) 4291 v1.AddArg(mem) 4292 v0.AddArg(v1) 4293 v.AddArg(v0) 4294 return true 4295 } 4296 // match: (Move [s] dst src mem) 4297 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4298 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4299 for { 4300 s := v.AuxInt 4301 dst := v.Args[0] 4302 src := v.Args[1] 4303 mem := v.Args[2] 4304 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4305 break 4306 } 4307 v.reset(OpS390XMVC) 4308 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4309 v.AddArg(dst) 4310 v.AddArg(src) 4311 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4312 v0.AuxInt = makeValAndOff(256, 512) 4313 v0.AddArg(dst) 4314 v0.AddArg(src) 4315 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4316 v1.AuxInt = makeValAndOff(256, 256) 4317 v1.AddArg(dst) 4318 v1.AddArg(src) 4319 v2 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4320 v2.AuxInt = makeValAndOff(256, 0) 4321 v2.AddArg(dst) 4322 v2.AddArg(src) 4323 v2.AddArg(mem) 4324 v1.AddArg(v2) 4325 v0.AddArg(v1) 4326 v.AddArg(v0) 4327 return true 4328 } 4329 // match: (Move [s] dst src mem) 4330 // cond: SizeAndAlign(s).Size() > 1024 4331 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4332 for { 4333 s := v.AuxInt 4334 dst := v.Args[0] 4335 src := v.Args[1] 4336 mem := v.Args[2] 4337 if !(SizeAndAlign(s).Size() > 1024) { 4338 break 4339 } 4340 v.reset(OpS390XLoweredMove) 4341 v.AuxInt = SizeAndAlign(s).Size() % 256 4342 v.AddArg(dst) 4343 v.AddArg(src) 4344 v0 := b.NewValue0(v.Line, OpS390XADDconst, src.Type) 4345 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4346 v0.AddArg(src) 4347 v.AddArg(v0) 4348 v.AddArg(mem) 4349 return true 4350 } 4351 return false 4352 } 4353 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4354 b := v.Block 4355 _ = b 4356 // match: (Mul16 x y) 4357 // cond: 4358 // result: (MULLW x y) 4359 for { 4360 x := v.Args[0] 4361 y := v.Args[1] 4362 v.reset(OpS390XMULLW) 4363 v.AddArg(x) 4364 v.AddArg(y) 4365 return true 4366 } 4367 } 4368 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4369 b := v.Block 4370 _ = b 4371 // match: (Mul32 x y) 4372 // cond: 4373 // result: (MULLW x y) 4374 for { 4375 x := v.Args[0] 4376 y := v.Args[1] 4377 v.reset(OpS390XMULLW) 4378 v.AddArg(x) 4379 v.AddArg(y) 4380 return true 4381 } 4382 } 4383 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4384 b := v.Block 4385 _ = b 4386 // match: (Mul32F x y) 4387 // cond: 4388 // result: (FMULS x y) 4389 for { 4390 x := v.Args[0] 4391 y := v.Args[1] 4392 v.reset(OpS390XFMULS) 4393 v.AddArg(x) 4394 v.AddArg(y) 4395 return true 4396 } 4397 } 4398 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4399 b := v.Block 4400 _ = b 4401 // match: (Mul64 x y) 4402 // cond: 4403 // result: (MULLD x y) 4404 for { 4405 x := v.Args[0] 4406 y := v.Args[1] 4407 v.reset(OpS390XMULLD) 4408 v.AddArg(x) 4409 v.AddArg(y) 4410 return true 4411 } 4412 } 4413 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4414 b := v.Block 4415 _ = b 4416 // match: (Mul64F x y) 4417 // cond: 4418 // result: (FMUL x y) 4419 for { 4420 x := v.Args[0] 4421 y := v.Args[1] 4422 v.reset(OpS390XFMUL) 4423 v.AddArg(x) 4424 v.AddArg(y) 4425 return true 4426 } 4427 } 4428 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4429 b := v.Block 4430 _ = b 4431 // match: (Mul8 x y) 4432 // cond: 4433 // result: (MULLW x y) 4434 for { 4435 x := v.Args[0] 4436 y := v.Args[1] 4437 v.reset(OpS390XMULLW) 4438 v.AddArg(x) 4439 v.AddArg(y) 4440 return true 4441 } 4442 } 4443 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4444 b := v.Block 4445 _ = b 4446 // match: (Neg16 x) 4447 // cond: 4448 // result: (NEGW (MOVHreg x)) 4449 for { 4450 x := v.Args[0] 4451 v.reset(OpS390XNEGW) 4452 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4453 v0.AddArg(x) 4454 v.AddArg(v0) 4455 return true 4456 } 4457 } 4458 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4459 b := v.Block 4460 _ = b 4461 // match: (Neg32 x) 4462 // cond: 4463 // result: (NEGW x) 4464 for { 4465 x := v.Args[0] 4466 v.reset(OpS390XNEGW) 4467 v.AddArg(x) 4468 return true 4469 } 4470 } 4471 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4472 b := v.Block 4473 _ = b 4474 // match: (Neg32F x) 4475 // cond: 4476 // result: (FNEGS x) 4477 for { 4478 x := v.Args[0] 4479 v.reset(OpS390XFNEGS) 4480 v.AddArg(x) 4481 return true 4482 } 4483 } 4484 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4485 b := v.Block 4486 _ = b 4487 // match: (Neg64 x) 4488 // cond: 4489 // result: (NEG x) 4490 for { 4491 x := v.Args[0] 4492 v.reset(OpS390XNEG) 4493 v.AddArg(x) 4494 return true 4495 } 4496 } 4497 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4498 b := v.Block 4499 _ = b 4500 // match: (Neg64F x) 4501 // cond: 4502 // result: (FNEG x) 4503 for { 4504 x := v.Args[0] 4505 v.reset(OpS390XFNEG) 4506 v.AddArg(x) 4507 return true 4508 } 4509 } 4510 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4511 b := v.Block 4512 _ = b 4513 // match: (Neg8 x) 4514 // cond: 4515 // result: (NEGW (MOVBreg x)) 4516 for { 4517 x := v.Args[0] 4518 v.reset(OpS390XNEGW) 4519 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4520 v0.AddArg(x) 4521 v.AddArg(v0) 4522 return true 4523 } 4524 } 4525 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4526 b := v.Block 4527 _ = b 4528 // match: (Neq16 x y) 4529 // cond: 4530 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4531 for { 4532 x := v.Args[0] 4533 y := v.Args[1] 4534 v.reset(OpS390XMOVDNE) 4535 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4536 v0.AuxInt = 0 4537 v.AddArg(v0) 4538 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4539 v1.AuxInt = 1 4540 v.AddArg(v1) 4541 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4542 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4543 v3.AddArg(x) 4544 v2.AddArg(v3) 4545 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4546 v4.AddArg(y) 4547 v2.AddArg(v4) 4548 v.AddArg(v2) 4549 return true 4550 } 4551 } 4552 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4553 b := v.Block 4554 _ = b 4555 // match: (Neq32 x y) 4556 // cond: 4557 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4558 for { 4559 x := v.Args[0] 4560 y := v.Args[1] 4561 v.reset(OpS390XMOVDNE) 4562 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4563 v0.AuxInt = 0 4564 v.AddArg(v0) 4565 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4566 v1.AuxInt = 1 4567 v.AddArg(v1) 4568 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 4569 v2.AddArg(x) 4570 v2.AddArg(y) 4571 v.AddArg(v2) 4572 return true 4573 } 4574 } 4575 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4576 b := v.Block 4577 _ = b 4578 // match: (Neq32F x y) 4579 // cond: 4580 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4581 for { 4582 x := v.Args[0] 4583 y := v.Args[1] 4584 v.reset(OpS390XMOVDNE) 4585 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4586 v0.AuxInt = 0 4587 v.AddArg(v0) 4588 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4589 v1.AuxInt = 1 4590 v.AddArg(v1) 4591 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 4592 v2.AddArg(x) 4593 v2.AddArg(y) 4594 v.AddArg(v2) 4595 return true 4596 } 4597 } 4598 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4599 b := v.Block 4600 _ = b 4601 // match: (Neq64 x y) 4602 // cond: 4603 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4604 for { 4605 x := v.Args[0] 4606 y := v.Args[1] 4607 v.reset(OpS390XMOVDNE) 4608 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4609 v0.AuxInt = 0 4610 v.AddArg(v0) 4611 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4612 v1.AuxInt = 1 4613 v.AddArg(v1) 4614 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4615 v2.AddArg(x) 4616 v2.AddArg(y) 4617 v.AddArg(v2) 4618 return true 4619 } 4620 } 4621 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4622 b := v.Block 4623 _ = b 4624 // match: (Neq64F x y) 4625 // cond: 4626 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4627 for { 4628 x := v.Args[0] 4629 y := v.Args[1] 4630 v.reset(OpS390XMOVDNE) 4631 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4632 v0.AuxInt = 0 4633 v.AddArg(v0) 4634 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4635 v1.AuxInt = 1 4636 v.AddArg(v1) 4637 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 4638 v2.AddArg(x) 4639 v2.AddArg(y) 4640 v.AddArg(v2) 4641 return true 4642 } 4643 } 4644 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4645 b := v.Block 4646 _ = b 4647 // match: (Neq8 x y) 4648 // cond: 4649 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4650 for { 4651 x := v.Args[0] 4652 y := v.Args[1] 4653 v.reset(OpS390XMOVDNE) 4654 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4655 v0.AuxInt = 0 4656 v.AddArg(v0) 4657 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4658 v1.AuxInt = 1 4659 v.AddArg(v1) 4660 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4661 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4662 v3.AddArg(x) 4663 v2.AddArg(v3) 4664 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4665 v4.AddArg(y) 4666 v2.AddArg(v4) 4667 v.AddArg(v2) 4668 return true 4669 } 4670 } 4671 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4672 b := v.Block 4673 _ = b 4674 // match: (NeqB x y) 4675 // cond: 4676 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4677 for { 4678 x := v.Args[0] 4679 y := v.Args[1] 4680 v.reset(OpS390XMOVDNE) 4681 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4682 v0.AuxInt = 0 4683 v.AddArg(v0) 4684 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4685 v1.AuxInt = 1 4686 v.AddArg(v1) 4687 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4688 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4689 v3.AddArg(x) 4690 v2.AddArg(v3) 4691 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4692 v4.AddArg(y) 4693 v2.AddArg(v4) 4694 v.AddArg(v2) 4695 return true 4696 } 4697 } 4698 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4699 b := v.Block 4700 _ = b 4701 // match: (NeqPtr x y) 4702 // cond: 4703 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4704 for { 4705 x := v.Args[0] 4706 y := v.Args[1] 4707 v.reset(OpS390XMOVDNE) 4708 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4709 v0.AuxInt = 0 4710 v.AddArg(v0) 4711 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4712 v1.AuxInt = 1 4713 v.AddArg(v1) 4714 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4715 v2.AddArg(x) 4716 v2.AddArg(y) 4717 v.AddArg(v2) 4718 return true 4719 } 4720 } 4721 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4722 b := v.Block 4723 _ = b 4724 // match: (NilCheck ptr mem) 4725 // cond: 4726 // result: (LoweredNilCheck ptr mem) 4727 for { 4728 ptr := v.Args[0] 4729 mem := v.Args[1] 4730 v.reset(OpS390XLoweredNilCheck) 4731 v.AddArg(ptr) 4732 v.AddArg(mem) 4733 return true 4734 } 4735 } 4736 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4737 b := v.Block 4738 _ = b 4739 // match: (Not x) 4740 // cond: 4741 // result: (XORWconst [1] x) 4742 for { 4743 x := v.Args[0] 4744 v.reset(OpS390XXORWconst) 4745 v.AuxInt = 1 4746 v.AddArg(x) 4747 return true 4748 } 4749 } 4750 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4751 b := v.Block 4752 _ = b 4753 // match: (OffPtr [off] ptr:(SP)) 4754 // cond: 4755 // result: (MOVDaddr [off] ptr) 4756 for { 4757 off := v.AuxInt 4758 ptr := v.Args[0] 4759 if ptr.Op != OpSP { 4760 break 4761 } 4762 v.reset(OpS390XMOVDaddr) 4763 v.AuxInt = off 4764 v.AddArg(ptr) 4765 return true 4766 } 4767 // match: (OffPtr [off] ptr) 4768 // cond: is32Bit(off) 4769 // result: (ADDconst [off] ptr) 4770 for { 4771 off := v.AuxInt 4772 ptr := v.Args[0] 4773 if !(is32Bit(off)) { 4774 break 4775 } 4776 v.reset(OpS390XADDconst) 4777 v.AuxInt = off 4778 v.AddArg(ptr) 4779 return true 4780 } 4781 // match: (OffPtr [off] ptr) 4782 // cond: 4783 // result: (ADD (MOVDconst [off]) ptr) 4784 for { 4785 off := v.AuxInt 4786 ptr := v.Args[0] 4787 v.reset(OpS390XADD) 4788 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4789 v0.AuxInt = off 4790 v.AddArg(v0) 4791 v.AddArg(ptr) 4792 return true 4793 } 4794 } 4795 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4796 b := v.Block 4797 _ = b 4798 // match: (Or16 x y) 4799 // cond: 4800 // result: (ORW x y) 4801 for { 4802 x := v.Args[0] 4803 y := v.Args[1] 4804 v.reset(OpS390XORW) 4805 v.AddArg(x) 4806 v.AddArg(y) 4807 return true 4808 } 4809 } 4810 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4811 b := v.Block 4812 _ = b 4813 // match: (Or32 x y) 4814 // cond: 4815 // result: (ORW x y) 4816 for { 4817 x := v.Args[0] 4818 y := v.Args[1] 4819 v.reset(OpS390XORW) 4820 v.AddArg(x) 4821 v.AddArg(y) 4822 return true 4823 } 4824 } 4825 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4826 b := v.Block 4827 _ = b 4828 // match: (Or64 x y) 4829 // cond: 4830 // result: (OR x y) 4831 for { 4832 x := v.Args[0] 4833 y := v.Args[1] 4834 v.reset(OpS390XOR) 4835 v.AddArg(x) 4836 v.AddArg(y) 4837 return true 4838 } 4839 } 4840 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4841 b := v.Block 4842 _ = b 4843 // match: (Or8 x y) 4844 // cond: 4845 // result: (ORW x y) 4846 for { 4847 x := v.Args[0] 4848 y := v.Args[1] 4849 v.reset(OpS390XORW) 4850 v.AddArg(x) 4851 v.AddArg(y) 4852 return true 4853 } 4854 } 4855 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4856 b := v.Block 4857 _ = b 4858 // match: (OrB x y) 4859 // cond: 4860 // result: (ORW x y) 4861 for { 4862 x := v.Args[0] 4863 y := v.Args[1] 4864 v.reset(OpS390XORW) 4865 v.AddArg(x) 4866 v.AddArg(y) 4867 return true 4868 } 4869 } 4870 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4871 b := v.Block 4872 _ = b 4873 // match: (Rsh16Ux16 <t> x y) 4874 // cond: 4875 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4876 for { 4877 t := v.Type 4878 x := v.Args[0] 4879 y := v.Args[1] 4880 v.reset(OpS390XANDW) 4881 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4882 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4883 v1.AddArg(x) 4884 v0.AddArg(v1) 4885 v0.AddArg(y) 4886 v.AddArg(v0) 4887 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4888 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4889 v3.AuxInt = 15 4890 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4891 v4.AddArg(y) 4892 v3.AddArg(v4) 4893 v2.AddArg(v3) 4894 v.AddArg(v2) 4895 return true 4896 } 4897 } 4898 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4899 b := v.Block 4900 _ = b 4901 // match: (Rsh16Ux32 <t> x y) 4902 // cond: 4903 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4904 for { 4905 t := v.Type 4906 x := v.Args[0] 4907 y := v.Args[1] 4908 v.reset(OpS390XANDW) 4909 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4910 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4911 v1.AddArg(x) 4912 v0.AddArg(v1) 4913 v0.AddArg(y) 4914 v.AddArg(v0) 4915 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4916 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4917 v3.AuxInt = 15 4918 v3.AddArg(y) 4919 v2.AddArg(v3) 4920 v.AddArg(v2) 4921 return true 4922 } 4923 } 4924 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4925 b := v.Block 4926 _ = b 4927 // match: (Rsh16Ux64 <t> x y) 4928 // cond: 4929 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4930 for { 4931 t := v.Type 4932 x := v.Args[0] 4933 y := v.Args[1] 4934 v.reset(OpS390XANDW) 4935 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4936 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4937 v1.AddArg(x) 4938 v0.AddArg(v1) 4939 v0.AddArg(y) 4940 v.AddArg(v0) 4941 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4942 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 4943 v3.AuxInt = 15 4944 v3.AddArg(y) 4945 v2.AddArg(v3) 4946 v.AddArg(v2) 4947 return true 4948 } 4949 } 4950 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4951 b := v.Block 4952 _ = b 4953 // match: (Rsh16Ux8 <t> x y) 4954 // cond: 4955 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4956 for { 4957 t := v.Type 4958 x := v.Args[0] 4959 y := v.Args[1] 4960 v.reset(OpS390XANDW) 4961 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4962 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4963 v1.AddArg(x) 4964 v0.AddArg(v1) 4965 v0.AddArg(y) 4966 v.AddArg(v0) 4967 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4968 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4969 v3.AuxInt = 15 4970 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4971 v4.AddArg(y) 4972 v3.AddArg(v4) 4973 v2.AddArg(v3) 4974 v.AddArg(v2) 4975 return true 4976 } 4977 } 4978 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4979 b := v.Block 4980 _ = b 4981 // match: (Rsh16x16 <t> x y) 4982 // cond: 4983 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4984 for { 4985 t := v.Type 4986 x := v.Args[0] 4987 y := v.Args[1] 4988 v.reset(OpS390XSRAW) 4989 v.Type = t 4990 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4991 v0.AddArg(x) 4992 v.AddArg(v0) 4993 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4994 v1.AddArg(y) 4995 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4996 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4997 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4998 v4.AuxInt = 15 4999 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5000 v5.AddArg(y) 5001 v4.AddArg(v5) 5002 v3.AddArg(v4) 5003 v2.AddArg(v3) 5004 v1.AddArg(v2) 5005 v.AddArg(v1) 5006 return true 5007 } 5008 } 5009 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 5010 b := v.Block 5011 _ = b 5012 // match: (Rsh16x32 <t> x y) 5013 // cond: 5014 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 5015 for { 5016 t := v.Type 5017 x := v.Args[0] 5018 y := v.Args[1] 5019 v.reset(OpS390XSRAW) 5020 v.Type = t 5021 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5022 v0.AddArg(x) 5023 v.AddArg(v0) 5024 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5025 v1.AddArg(y) 5026 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5027 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5028 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5029 v4.AuxInt = 15 5030 v4.AddArg(y) 5031 v3.AddArg(v4) 5032 v2.AddArg(v3) 5033 v1.AddArg(v2) 5034 v.AddArg(v1) 5035 return true 5036 } 5037 } 5038 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 5039 b := v.Block 5040 _ = b 5041 // match: (Rsh16x64 <t> x y) 5042 // cond: 5043 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 5044 for { 5045 t := v.Type 5046 x := v.Args[0] 5047 y := v.Args[1] 5048 v.reset(OpS390XSRAW) 5049 v.Type = t 5050 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5051 v0.AddArg(x) 5052 v.AddArg(v0) 5053 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5054 v1.AddArg(y) 5055 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5056 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5057 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5058 v4.AuxInt = 15 5059 v4.AddArg(y) 5060 v3.AddArg(v4) 5061 v2.AddArg(v3) 5062 v1.AddArg(v2) 5063 v.AddArg(v1) 5064 return true 5065 } 5066 } 5067 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5068 b := v.Block 5069 _ = b 5070 // match: (Rsh16x8 <t> x y) 5071 // cond: 5072 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5073 for { 5074 t := v.Type 5075 x := v.Args[0] 5076 y := v.Args[1] 5077 v.reset(OpS390XSRAW) 5078 v.Type = t 5079 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5080 v0.AddArg(x) 5081 v.AddArg(v0) 5082 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5083 v1.AddArg(y) 5084 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5085 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5086 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5087 v4.AuxInt = 15 5088 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5089 v5.AddArg(y) 5090 v4.AddArg(v5) 5091 v3.AddArg(v4) 5092 v2.AddArg(v3) 5093 v1.AddArg(v2) 5094 v.AddArg(v1) 5095 return true 5096 } 5097 } 5098 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5099 b := v.Block 5100 _ = b 5101 // match: (Rsh32Ux16 <t> x y) 5102 // cond: 5103 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5104 for { 5105 t := v.Type 5106 x := v.Args[0] 5107 y := v.Args[1] 5108 v.reset(OpS390XANDW) 5109 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5110 v0.AddArg(x) 5111 v0.AddArg(y) 5112 v.AddArg(v0) 5113 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5114 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5115 v2.AuxInt = 31 5116 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5117 v3.AddArg(y) 5118 v2.AddArg(v3) 5119 v1.AddArg(v2) 5120 v.AddArg(v1) 5121 return true 5122 } 5123 } 5124 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5125 b := v.Block 5126 _ = b 5127 // match: (Rsh32Ux32 <t> x y) 5128 // cond: 5129 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5130 for { 5131 t := v.Type 5132 x := v.Args[0] 5133 y := v.Args[1] 5134 v.reset(OpS390XANDW) 5135 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5136 v0.AddArg(x) 5137 v0.AddArg(y) 5138 v.AddArg(v0) 5139 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5140 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5141 v2.AuxInt = 31 5142 v2.AddArg(y) 5143 v1.AddArg(v2) 5144 v.AddArg(v1) 5145 return true 5146 } 5147 } 5148 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5149 b := v.Block 5150 _ = b 5151 // match: (Rsh32Ux64 <t> x y) 5152 // cond: 5153 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5154 for { 5155 t := v.Type 5156 x := v.Args[0] 5157 y := v.Args[1] 5158 v.reset(OpS390XANDW) 5159 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5160 v0.AddArg(x) 5161 v0.AddArg(y) 5162 v.AddArg(v0) 5163 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5164 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5165 v2.AuxInt = 31 5166 v2.AddArg(y) 5167 v1.AddArg(v2) 5168 v.AddArg(v1) 5169 return true 5170 } 5171 } 5172 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5173 b := v.Block 5174 _ = b 5175 // match: (Rsh32Ux8 <t> x y) 5176 // cond: 5177 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5178 for { 5179 t := v.Type 5180 x := v.Args[0] 5181 y := v.Args[1] 5182 v.reset(OpS390XANDW) 5183 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5184 v0.AddArg(x) 5185 v0.AddArg(y) 5186 v.AddArg(v0) 5187 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5188 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5189 v2.AuxInt = 31 5190 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5191 v3.AddArg(y) 5192 v2.AddArg(v3) 5193 v1.AddArg(v2) 5194 v.AddArg(v1) 5195 return true 5196 } 5197 } 5198 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5199 b := v.Block 5200 _ = b 5201 // match: (Rsh32x16 <t> x y) 5202 // cond: 5203 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5204 for { 5205 t := v.Type 5206 x := v.Args[0] 5207 y := v.Args[1] 5208 v.reset(OpS390XSRAW) 5209 v.Type = t 5210 v.AddArg(x) 5211 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5212 v0.AddArg(y) 5213 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5214 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5215 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5216 v3.AuxInt = 31 5217 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5218 v4.AddArg(y) 5219 v3.AddArg(v4) 5220 v2.AddArg(v3) 5221 v1.AddArg(v2) 5222 v0.AddArg(v1) 5223 v.AddArg(v0) 5224 return true 5225 } 5226 } 5227 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5228 b := v.Block 5229 _ = b 5230 // match: (Rsh32x32 <t> x y) 5231 // cond: 5232 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5233 for { 5234 t := v.Type 5235 x := v.Args[0] 5236 y := v.Args[1] 5237 v.reset(OpS390XSRAW) 5238 v.Type = t 5239 v.AddArg(x) 5240 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5241 v0.AddArg(y) 5242 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5243 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5244 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5245 v3.AuxInt = 31 5246 v3.AddArg(y) 5247 v2.AddArg(v3) 5248 v1.AddArg(v2) 5249 v0.AddArg(v1) 5250 v.AddArg(v0) 5251 return true 5252 } 5253 } 5254 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5255 b := v.Block 5256 _ = b 5257 // match: (Rsh32x64 <t> x y) 5258 // cond: 5259 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5260 for { 5261 t := v.Type 5262 x := v.Args[0] 5263 y := v.Args[1] 5264 v.reset(OpS390XSRAW) 5265 v.Type = t 5266 v.AddArg(x) 5267 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5268 v0.AddArg(y) 5269 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5270 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5271 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5272 v3.AuxInt = 31 5273 v3.AddArg(y) 5274 v2.AddArg(v3) 5275 v1.AddArg(v2) 5276 v0.AddArg(v1) 5277 v.AddArg(v0) 5278 return true 5279 } 5280 } 5281 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5282 b := v.Block 5283 _ = b 5284 // match: (Rsh32x8 <t> x y) 5285 // cond: 5286 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5287 for { 5288 t := v.Type 5289 x := v.Args[0] 5290 y := v.Args[1] 5291 v.reset(OpS390XSRAW) 5292 v.Type = t 5293 v.AddArg(x) 5294 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5295 v0.AddArg(y) 5296 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5297 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5298 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5299 v3.AuxInt = 31 5300 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5301 v4.AddArg(y) 5302 v3.AddArg(v4) 5303 v2.AddArg(v3) 5304 v1.AddArg(v2) 5305 v0.AddArg(v1) 5306 v.AddArg(v0) 5307 return true 5308 } 5309 } 5310 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5311 b := v.Block 5312 _ = b 5313 // match: (Rsh64Ux16 <t> x y) 5314 // cond: 5315 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5316 for { 5317 t := v.Type 5318 x := v.Args[0] 5319 y := v.Args[1] 5320 v.reset(OpS390XAND) 5321 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5322 v0.AddArg(x) 5323 v0.AddArg(y) 5324 v.AddArg(v0) 5325 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5326 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5327 v2.AuxInt = 63 5328 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5329 v3.AddArg(y) 5330 v2.AddArg(v3) 5331 v1.AddArg(v2) 5332 v.AddArg(v1) 5333 return true 5334 } 5335 } 5336 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5337 b := v.Block 5338 _ = b 5339 // match: (Rsh64Ux32 <t> x y) 5340 // cond: 5341 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5342 for { 5343 t := v.Type 5344 x := v.Args[0] 5345 y := v.Args[1] 5346 v.reset(OpS390XAND) 5347 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5348 v0.AddArg(x) 5349 v0.AddArg(y) 5350 v.AddArg(v0) 5351 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5352 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5353 v2.AuxInt = 63 5354 v2.AddArg(y) 5355 v1.AddArg(v2) 5356 v.AddArg(v1) 5357 return true 5358 } 5359 } 5360 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5361 b := v.Block 5362 _ = b 5363 // match: (Rsh64Ux64 <t> x y) 5364 // cond: 5365 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5366 for { 5367 t := v.Type 5368 x := v.Args[0] 5369 y := v.Args[1] 5370 v.reset(OpS390XAND) 5371 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5372 v0.AddArg(x) 5373 v0.AddArg(y) 5374 v.AddArg(v0) 5375 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5376 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5377 v2.AuxInt = 63 5378 v2.AddArg(y) 5379 v1.AddArg(v2) 5380 v.AddArg(v1) 5381 return true 5382 } 5383 } 5384 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5385 b := v.Block 5386 _ = b 5387 // match: (Rsh64Ux8 <t> x y) 5388 // cond: 5389 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5390 for { 5391 t := v.Type 5392 x := v.Args[0] 5393 y := v.Args[1] 5394 v.reset(OpS390XAND) 5395 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5396 v0.AddArg(x) 5397 v0.AddArg(y) 5398 v.AddArg(v0) 5399 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5400 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5401 v2.AuxInt = 63 5402 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5403 v3.AddArg(y) 5404 v2.AddArg(v3) 5405 v1.AddArg(v2) 5406 v.AddArg(v1) 5407 return true 5408 } 5409 } 5410 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5411 b := v.Block 5412 _ = b 5413 // match: (Rsh64x16 <t> x y) 5414 // cond: 5415 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5416 for { 5417 t := v.Type 5418 x := v.Args[0] 5419 y := v.Args[1] 5420 v.reset(OpS390XSRAD) 5421 v.Type = t 5422 v.AddArg(x) 5423 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5424 v0.AddArg(y) 5425 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5426 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5427 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5428 v3.AuxInt = 63 5429 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5430 v4.AddArg(y) 5431 v3.AddArg(v4) 5432 v2.AddArg(v3) 5433 v1.AddArg(v2) 5434 v0.AddArg(v1) 5435 v.AddArg(v0) 5436 return true 5437 } 5438 } 5439 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5440 b := v.Block 5441 _ = b 5442 // match: (Rsh64x32 <t> x y) 5443 // cond: 5444 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5445 for { 5446 t := v.Type 5447 x := v.Args[0] 5448 y := v.Args[1] 5449 v.reset(OpS390XSRAD) 5450 v.Type = t 5451 v.AddArg(x) 5452 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5453 v0.AddArg(y) 5454 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5455 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5456 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5457 v3.AuxInt = 63 5458 v3.AddArg(y) 5459 v2.AddArg(v3) 5460 v1.AddArg(v2) 5461 v0.AddArg(v1) 5462 v.AddArg(v0) 5463 return true 5464 } 5465 } 5466 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5467 b := v.Block 5468 _ = b 5469 // match: (Rsh64x64 <t> x y) 5470 // cond: 5471 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5472 for { 5473 t := v.Type 5474 x := v.Args[0] 5475 y := v.Args[1] 5476 v.reset(OpS390XSRAD) 5477 v.Type = t 5478 v.AddArg(x) 5479 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5480 v0.AddArg(y) 5481 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5482 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5483 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5484 v3.AuxInt = 63 5485 v3.AddArg(y) 5486 v2.AddArg(v3) 5487 v1.AddArg(v2) 5488 v0.AddArg(v1) 5489 v.AddArg(v0) 5490 return true 5491 } 5492 } 5493 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5494 b := v.Block 5495 _ = b 5496 // match: (Rsh64x8 <t> x y) 5497 // cond: 5498 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5499 for { 5500 t := v.Type 5501 x := v.Args[0] 5502 y := v.Args[1] 5503 v.reset(OpS390XSRAD) 5504 v.Type = t 5505 v.AddArg(x) 5506 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5507 v0.AddArg(y) 5508 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5509 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5510 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5511 v3.AuxInt = 63 5512 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5513 v4.AddArg(y) 5514 v3.AddArg(v4) 5515 v2.AddArg(v3) 5516 v1.AddArg(v2) 5517 v0.AddArg(v1) 5518 v.AddArg(v0) 5519 return true 5520 } 5521 } 5522 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5523 b := v.Block 5524 _ = b 5525 // match: (Rsh8Ux16 <t> x y) 5526 // cond: 5527 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5528 for { 5529 t := v.Type 5530 x := v.Args[0] 5531 y := v.Args[1] 5532 v.reset(OpS390XANDW) 5533 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5534 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5535 v1.AddArg(x) 5536 v0.AddArg(v1) 5537 v0.AddArg(y) 5538 v.AddArg(v0) 5539 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5540 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5541 v3.AuxInt = 7 5542 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5543 v4.AddArg(y) 5544 v3.AddArg(v4) 5545 v2.AddArg(v3) 5546 v.AddArg(v2) 5547 return true 5548 } 5549 } 5550 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5551 b := v.Block 5552 _ = b 5553 // match: (Rsh8Ux32 <t> x y) 5554 // cond: 5555 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5556 for { 5557 t := v.Type 5558 x := v.Args[0] 5559 y := v.Args[1] 5560 v.reset(OpS390XANDW) 5561 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5562 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5563 v1.AddArg(x) 5564 v0.AddArg(v1) 5565 v0.AddArg(y) 5566 v.AddArg(v0) 5567 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5568 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5569 v3.AuxInt = 7 5570 v3.AddArg(y) 5571 v2.AddArg(v3) 5572 v.AddArg(v2) 5573 return true 5574 } 5575 } 5576 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5577 b := v.Block 5578 _ = b 5579 // match: (Rsh8Ux64 <t> x y) 5580 // cond: 5581 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5582 for { 5583 t := v.Type 5584 x := v.Args[0] 5585 y := v.Args[1] 5586 v.reset(OpS390XANDW) 5587 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5588 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5589 v1.AddArg(x) 5590 v0.AddArg(v1) 5591 v0.AddArg(y) 5592 v.AddArg(v0) 5593 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5594 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5595 v3.AuxInt = 7 5596 v3.AddArg(y) 5597 v2.AddArg(v3) 5598 v.AddArg(v2) 5599 return true 5600 } 5601 } 5602 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5603 b := v.Block 5604 _ = b 5605 // match: (Rsh8Ux8 <t> x y) 5606 // cond: 5607 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5608 for { 5609 t := v.Type 5610 x := v.Args[0] 5611 y := v.Args[1] 5612 v.reset(OpS390XANDW) 5613 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5614 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5615 v1.AddArg(x) 5616 v0.AddArg(v1) 5617 v0.AddArg(y) 5618 v.AddArg(v0) 5619 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5620 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5621 v3.AuxInt = 7 5622 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5623 v4.AddArg(y) 5624 v3.AddArg(v4) 5625 v2.AddArg(v3) 5626 v.AddArg(v2) 5627 return true 5628 } 5629 } 5630 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5631 b := v.Block 5632 _ = b 5633 // match: (Rsh8x16 <t> x y) 5634 // cond: 5635 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5636 for { 5637 t := v.Type 5638 x := v.Args[0] 5639 y := v.Args[1] 5640 v.reset(OpS390XSRAW) 5641 v.Type = t 5642 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5643 v0.AddArg(x) 5644 v.AddArg(v0) 5645 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5646 v1.AddArg(y) 5647 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5648 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5649 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5650 v4.AuxInt = 7 5651 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5652 v5.AddArg(y) 5653 v4.AddArg(v5) 5654 v3.AddArg(v4) 5655 v2.AddArg(v3) 5656 v1.AddArg(v2) 5657 v.AddArg(v1) 5658 return true 5659 } 5660 } 5661 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5662 b := v.Block 5663 _ = b 5664 // match: (Rsh8x32 <t> x y) 5665 // cond: 5666 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5667 for { 5668 t := v.Type 5669 x := v.Args[0] 5670 y := v.Args[1] 5671 v.reset(OpS390XSRAW) 5672 v.Type = t 5673 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5674 v0.AddArg(x) 5675 v.AddArg(v0) 5676 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5677 v1.AddArg(y) 5678 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5679 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5680 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5681 v4.AuxInt = 7 5682 v4.AddArg(y) 5683 v3.AddArg(v4) 5684 v2.AddArg(v3) 5685 v1.AddArg(v2) 5686 v.AddArg(v1) 5687 return true 5688 } 5689 } 5690 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5691 b := v.Block 5692 _ = b 5693 // match: (Rsh8x64 <t> x y) 5694 // cond: 5695 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5696 for { 5697 t := v.Type 5698 x := v.Args[0] 5699 y := v.Args[1] 5700 v.reset(OpS390XSRAW) 5701 v.Type = t 5702 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5703 v0.AddArg(x) 5704 v.AddArg(v0) 5705 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5706 v1.AddArg(y) 5707 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5708 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5709 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5710 v4.AuxInt = 7 5711 v4.AddArg(y) 5712 v3.AddArg(v4) 5713 v2.AddArg(v3) 5714 v1.AddArg(v2) 5715 v.AddArg(v1) 5716 return true 5717 } 5718 } 5719 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5720 b := v.Block 5721 _ = b 5722 // match: (Rsh8x8 <t> x y) 5723 // cond: 5724 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5725 for { 5726 t := v.Type 5727 x := v.Args[0] 5728 y := v.Args[1] 5729 v.reset(OpS390XSRAW) 5730 v.Type = t 5731 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5732 v0.AddArg(x) 5733 v.AddArg(v0) 5734 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5735 v1.AddArg(y) 5736 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5737 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5738 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5739 v4.AuxInt = 7 5740 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5741 v5.AddArg(y) 5742 v4.AddArg(v5) 5743 v3.AddArg(v4) 5744 v2.AddArg(v3) 5745 v1.AddArg(v2) 5746 v.AddArg(v1) 5747 return true 5748 } 5749 } 5750 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5751 b := v.Block 5752 _ = b 5753 // match: (ADD x (MOVDconst [c])) 5754 // cond: is32Bit(c) 5755 // result: (ADDconst [c] x) 5756 for { 5757 x := v.Args[0] 5758 v_1 := v.Args[1] 5759 if v_1.Op != OpS390XMOVDconst { 5760 break 5761 } 5762 c := v_1.AuxInt 5763 if !(is32Bit(c)) { 5764 break 5765 } 5766 v.reset(OpS390XADDconst) 5767 v.AuxInt = c 5768 v.AddArg(x) 5769 return true 5770 } 5771 // match: (ADD (MOVDconst [c]) x) 5772 // cond: is32Bit(c) 5773 // result: (ADDconst [c] x) 5774 for { 5775 v_0 := v.Args[0] 5776 if v_0.Op != OpS390XMOVDconst { 5777 break 5778 } 5779 c := v_0.AuxInt 5780 x := v.Args[1] 5781 if !(is32Bit(c)) { 5782 break 5783 } 5784 v.reset(OpS390XADDconst) 5785 v.AuxInt = c 5786 v.AddArg(x) 5787 return true 5788 } 5789 // match: (ADD x (MOVDaddr [c] {s} y)) 5790 // cond: x.Op != OpSB && y.Op != OpSB 5791 // result: (MOVDaddridx [c] {s} x y) 5792 for { 5793 x := v.Args[0] 5794 v_1 := v.Args[1] 5795 if v_1.Op != OpS390XMOVDaddr { 5796 break 5797 } 5798 c := v_1.AuxInt 5799 s := v_1.Aux 5800 y := v_1.Args[0] 5801 if !(x.Op != OpSB && y.Op != OpSB) { 5802 break 5803 } 5804 v.reset(OpS390XMOVDaddridx) 5805 v.AuxInt = c 5806 v.Aux = s 5807 v.AddArg(x) 5808 v.AddArg(y) 5809 return true 5810 } 5811 // match: (ADD (MOVDaddr [c] {s} x) y) 5812 // cond: x.Op != OpSB && y.Op != OpSB 5813 // result: (MOVDaddridx [c] {s} x y) 5814 for { 5815 v_0 := v.Args[0] 5816 if v_0.Op != OpS390XMOVDaddr { 5817 break 5818 } 5819 c := v_0.AuxInt 5820 s := v_0.Aux 5821 x := v_0.Args[0] 5822 y := v.Args[1] 5823 if !(x.Op != OpSB && y.Op != OpSB) { 5824 break 5825 } 5826 v.reset(OpS390XMOVDaddridx) 5827 v.AuxInt = c 5828 v.Aux = s 5829 v.AddArg(x) 5830 v.AddArg(y) 5831 return true 5832 } 5833 // match: (ADD x (NEG y)) 5834 // cond: 5835 // result: (SUB x y) 5836 for { 5837 x := v.Args[0] 5838 v_1 := v.Args[1] 5839 if v_1.Op != OpS390XNEG { 5840 break 5841 } 5842 y := v_1.Args[0] 5843 v.reset(OpS390XSUB) 5844 v.AddArg(x) 5845 v.AddArg(y) 5846 return true 5847 } 5848 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5849 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5850 // result: (ADDload <t> [off] {sym} x ptr mem) 5851 for { 5852 t := v.Type 5853 x := v.Args[0] 5854 g := v.Args[1] 5855 if g.Op != OpS390XMOVDload { 5856 break 5857 } 5858 off := g.AuxInt 5859 sym := g.Aux 5860 ptr := g.Args[0] 5861 mem := g.Args[1] 5862 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5863 break 5864 } 5865 v.reset(OpS390XADDload) 5866 v.Type = t 5867 v.AuxInt = off 5868 v.Aux = sym 5869 v.AddArg(x) 5870 v.AddArg(ptr) 5871 v.AddArg(mem) 5872 return true 5873 } 5874 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5875 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5876 // result: (ADDload <t> [off] {sym} x ptr mem) 5877 for { 5878 t := v.Type 5879 g := v.Args[0] 5880 if g.Op != OpS390XMOVDload { 5881 break 5882 } 5883 off := g.AuxInt 5884 sym := g.Aux 5885 ptr := g.Args[0] 5886 mem := g.Args[1] 5887 x := v.Args[1] 5888 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5889 break 5890 } 5891 v.reset(OpS390XADDload) 5892 v.Type = t 5893 v.AuxInt = off 5894 v.Aux = sym 5895 v.AddArg(x) 5896 v.AddArg(ptr) 5897 v.AddArg(mem) 5898 return true 5899 } 5900 return false 5901 } 5902 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5903 b := v.Block 5904 _ = b 5905 // match: (ADDW x (MOVDconst [c])) 5906 // cond: 5907 // result: (ADDWconst [c] x) 5908 for { 5909 x := v.Args[0] 5910 v_1 := v.Args[1] 5911 if v_1.Op != OpS390XMOVDconst { 5912 break 5913 } 5914 c := v_1.AuxInt 5915 v.reset(OpS390XADDWconst) 5916 v.AuxInt = c 5917 v.AddArg(x) 5918 return true 5919 } 5920 // match: (ADDW (MOVDconst [c]) x) 5921 // cond: 5922 // result: (ADDWconst [c] x) 5923 for { 5924 v_0 := v.Args[0] 5925 if v_0.Op != OpS390XMOVDconst { 5926 break 5927 } 5928 c := v_0.AuxInt 5929 x := v.Args[1] 5930 v.reset(OpS390XADDWconst) 5931 v.AuxInt = c 5932 v.AddArg(x) 5933 return true 5934 } 5935 // match: (ADDW x (NEGW y)) 5936 // cond: 5937 // result: (SUBW x y) 5938 for { 5939 x := v.Args[0] 5940 v_1 := v.Args[1] 5941 if v_1.Op != OpS390XNEGW { 5942 break 5943 } 5944 y := v_1.Args[0] 5945 v.reset(OpS390XSUBW) 5946 v.AddArg(x) 5947 v.AddArg(y) 5948 return true 5949 } 5950 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 5951 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5952 // result: (ADDWload <t> [off] {sym} x ptr mem) 5953 for { 5954 t := v.Type 5955 x := v.Args[0] 5956 g := v.Args[1] 5957 if g.Op != OpS390XMOVWload { 5958 break 5959 } 5960 off := g.AuxInt 5961 sym := g.Aux 5962 ptr := g.Args[0] 5963 mem := g.Args[1] 5964 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5965 break 5966 } 5967 v.reset(OpS390XADDWload) 5968 v.Type = t 5969 v.AuxInt = off 5970 v.Aux = sym 5971 v.AddArg(x) 5972 v.AddArg(ptr) 5973 v.AddArg(mem) 5974 return true 5975 } 5976 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 5977 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5978 // result: (ADDWload <t> [off] {sym} x ptr mem) 5979 for { 5980 t := v.Type 5981 g := v.Args[0] 5982 if g.Op != OpS390XMOVWload { 5983 break 5984 } 5985 off := g.AuxInt 5986 sym := g.Aux 5987 ptr := g.Args[0] 5988 mem := g.Args[1] 5989 x := v.Args[1] 5990 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5991 break 5992 } 5993 v.reset(OpS390XADDWload) 5994 v.Type = t 5995 v.AuxInt = off 5996 v.Aux = sym 5997 v.AddArg(x) 5998 v.AddArg(ptr) 5999 v.AddArg(mem) 6000 return true 6001 } 6002 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6003 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6004 // result: (ADDWload <t> [off] {sym} x ptr mem) 6005 for { 6006 t := v.Type 6007 x := v.Args[0] 6008 g := v.Args[1] 6009 if g.Op != OpS390XMOVWZload { 6010 break 6011 } 6012 off := g.AuxInt 6013 sym := g.Aux 6014 ptr := g.Args[0] 6015 mem := g.Args[1] 6016 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6017 break 6018 } 6019 v.reset(OpS390XADDWload) 6020 v.Type = t 6021 v.AuxInt = off 6022 v.Aux = sym 6023 v.AddArg(x) 6024 v.AddArg(ptr) 6025 v.AddArg(mem) 6026 return true 6027 } 6028 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6029 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6030 // result: (ADDWload <t> [off] {sym} x ptr mem) 6031 for { 6032 t := v.Type 6033 g := v.Args[0] 6034 if g.Op != OpS390XMOVWZload { 6035 break 6036 } 6037 off := g.AuxInt 6038 sym := g.Aux 6039 ptr := g.Args[0] 6040 mem := g.Args[1] 6041 x := v.Args[1] 6042 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6043 break 6044 } 6045 v.reset(OpS390XADDWload) 6046 v.Type = t 6047 v.AuxInt = off 6048 v.Aux = sym 6049 v.AddArg(x) 6050 v.AddArg(ptr) 6051 v.AddArg(mem) 6052 return true 6053 } 6054 return false 6055 } 6056 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6057 b := v.Block 6058 _ = b 6059 // match: (ADDWconst [c] x) 6060 // cond: int32(c)==0 6061 // result: x 6062 for { 6063 c := v.AuxInt 6064 x := v.Args[0] 6065 if !(int32(c) == 0) { 6066 break 6067 } 6068 v.reset(OpCopy) 6069 v.Type = x.Type 6070 v.AddArg(x) 6071 return true 6072 } 6073 // match: (ADDWconst [c] (MOVDconst [d])) 6074 // cond: 6075 // result: (MOVDconst [int64(int32(c+d))]) 6076 for { 6077 c := v.AuxInt 6078 v_0 := v.Args[0] 6079 if v_0.Op != OpS390XMOVDconst { 6080 break 6081 } 6082 d := v_0.AuxInt 6083 v.reset(OpS390XMOVDconst) 6084 v.AuxInt = int64(int32(c + d)) 6085 return true 6086 } 6087 // match: (ADDWconst [c] (ADDWconst [d] x)) 6088 // cond: 6089 // result: (ADDWconst [int64(int32(c+d))] x) 6090 for { 6091 c := v.AuxInt 6092 v_0 := v.Args[0] 6093 if v_0.Op != OpS390XADDWconst { 6094 break 6095 } 6096 d := v_0.AuxInt 6097 x := v_0.Args[0] 6098 v.reset(OpS390XADDWconst) 6099 v.AuxInt = int64(int32(c + d)) 6100 v.AddArg(x) 6101 return true 6102 } 6103 return false 6104 } 6105 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6106 b := v.Block 6107 _ = b 6108 // match: (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) 6109 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6110 // result: (MOVDaddr [c+d] {s} x) 6111 for { 6112 c := v.AuxInt 6113 v_0 := v.Args[0] 6114 if v_0.Op != OpS390XMOVDaddr { 6115 break 6116 } 6117 d := v_0.AuxInt 6118 s := v_0.Aux 6119 x := v_0.Args[0] 6120 if x.Op != OpSB { 6121 break 6122 } 6123 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6124 break 6125 } 6126 v.reset(OpS390XMOVDaddr) 6127 v.AuxInt = c + d 6128 v.Aux = s 6129 v.AddArg(x) 6130 return true 6131 } 6132 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6133 // cond: x.Op != OpSB && is20Bit(c+d) 6134 // result: (MOVDaddr [c+d] {s} x) 6135 for { 6136 c := v.AuxInt 6137 v_0 := v.Args[0] 6138 if v_0.Op != OpS390XMOVDaddr { 6139 break 6140 } 6141 d := v_0.AuxInt 6142 s := v_0.Aux 6143 x := v_0.Args[0] 6144 if !(x.Op != OpSB && is20Bit(c+d)) { 6145 break 6146 } 6147 v.reset(OpS390XMOVDaddr) 6148 v.AuxInt = c + d 6149 v.Aux = s 6150 v.AddArg(x) 6151 return true 6152 } 6153 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6154 // cond: is20Bit(c+d) 6155 // result: (MOVDaddridx [c+d] {s} x y) 6156 for { 6157 c := v.AuxInt 6158 v_0 := v.Args[0] 6159 if v_0.Op != OpS390XMOVDaddridx { 6160 break 6161 } 6162 d := v_0.AuxInt 6163 s := v_0.Aux 6164 x := v_0.Args[0] 6165 y := v_0.Args[1] 6166 if !(is20Bit(c + d)) { 6167 break 6168 } 6169 v.reset(OpS390XMOVDaddridx) 6170 v.AuxInt = c + d 6171 v.Aux = s 6172 v.AddArg(x) 6173 v.AddArg(y) 6174 return true 6175 } 6176 // match: (ADDconst [0] x) 6177 // cond: 6178 // result: x 6179 for { 6180 if v.AuxInt != 0 { 6181 break 6182 } 6183 x := v.Args[0] 6184 v.reset(OpCopy) 6185 v.Type = x.Type 6186 v.AddArg(x) 6187 return true 6188 } 6189 // match: (ADDconst [c] (MOVDconst [d])) 6190 // cond: 6191 // result: (MOVDconst [c+d]) 6192 for { 6193 c := v.AuxInt 6194 v_0 := v.Args[0] 6195 if v_0.Op != OpS390XMOVDconst { 6196 break 6197 } 6198 d := v_0.AuxInt 6199 v.reset(OpS390XMOVDconst) 6200 v.AuxInt = c + d 6201 return true 6202 } 6203 // match: (ADDconst [c] (ADDconst [d] x)) 6204 // cond: is32Bit(c+d) 6205 // result: (ADDconst [c+d] x) 6206 for { 6207 c := v.AuxInt 6208 v_0 := v.Args[0] 6209 if v_0.Op != OpS390XADDconst { 6210 break 6211 } 6212 d := v_0.AuxInt 6213 x := v_0.Args[0] 6214 if !(is32Bit(c + d)) { 6215 break 6216 } 6217 v.reset(OpS390XADDconst) 6218 v.AuxInt = c + d 6219 v.AddArg(x) 6220 return true 6221 } 6222 return false 6223 } 6224 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6225 b := v.Block 6226 _ = b 6227 // match: (AND x (MOVDconst [c])) 6228 // cond: is32Bit(c) && c < 0 6229 // result: (ANDconst [c] x) 6230 for { 6231 x := v.Args[0] 6232 v_1 := v.Args[1] 6233 if v_1.Op != OpS390XMOVDconst { 6234 break 6235 } 6236 c := v_1.AuxInt 6237 if !(is32Bit(c) && c < 0) { 6238 break 6239 } 6240 v.reset(OpS390XANDconst) 6241 v.AuxInt = c 6242 v.AddArg(x) 6243 return true 6244 } 6245 // match: (AND (MOVDconst [c]) x) 6246 // cond: is32Bit(c) && c < 0 6247 // result: (ANDconst [c] x) 6248 for { 6249 v_0 := v.Args[0] 6250 if v_0.Op != OpS390XMOVDconst { 6251 break 6252 } 6253 c := v_0.AuxInt 6254 x := v.Args[1] 6255 if !(is32Bit(c) && c < 0) { 6256 break 6257 } 6258 v.reset(OpS390XANDconst) 6259 v.AuxInt = c 6260 v.AddArg(x) 6261 return true 6262 } 6263 // match: (AND (MOVDconst [0xFF]) x) 6264 // cond: 6265 // result: (MOVBZreg x) 6266 for { 6267 v_0 := v.Args[0] 6268 if v_0.Op != OpS390XMOVDconst { 6269 break 6270 } 6271 if v_0.AuxInt != 0xFF { 6272 break 6273 } 6274 x := v.Args[1] 6275 v.reset(OpS390XMOVBZreg) 6276 v.AddArg(x) 6277 return true 6278 } 6279 // match: (AND x (MOVDconst [0xFF])) 6280 // cond: 6281 // result: (MOVBZreg x) 6282 for { 6283 x := v.Args[0] 6284 v_1 := v.Args[1] 6285 if v_1.Op != OpS390XMOVDconst { 6286 break 6287 } 6288 if v_1.AuxInt != 0xFF { 6289 break 6290 } 6291 v.reset(OpS390XMOVBZreg) 6292 v.AddArg(x) 6293 return true 6294 } 6295 // match: (AND (MOVDconst [0xFFFF]) x) 6296 // cond: 6297 // result: (MOVHZreg x) 6298 for { 6299 v_0 := v.Args[0] 6300 if v_0.Op != OpS390XMOVDconst { 6301 break 6302 } 6303 if v_0.AuxInt != 0xFFFF { 6304 break 6305 } 6306 x := v.Args[1] 6307 v.reset(OpS390XMOVHZreg) 6308 v.AddArg(x) 6309 return true 6310 } 6311 // match: (AND x (MOVDconst [0xFFFF])) 6312 // cond: 6313 // result: (MOVHZreg x) 6314 for { 6315 x := v.Args[0] 6316 v_1 := v.Args[1] 6317 if v_1.Op != OpS390XMOVDconst { 6318 break 6319 } 6320 if v_1.AuxInt != 0xFFFF { 6321 break 6322 } 6323 v.reset(OpS390XMOVHZreg) 6324 v.AddArg(x) 6325 return true 6326 } 6327 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6328 // cond: 6329 // result: (MOVWZreg x) 6330 for { 6331 v_0 := v.Args[0] 6332 if v_0.Op != OpS390XMOVDconst { 6333 break 6334 } 6335 if v_0.AuxInt != 0xFFFFFFFF { 6336 break 6337 } 6338 x := v.Args[1] 6339 v.reset(OpS390XMOVWZreg) 6340 v.AddArg(x) 6341 return true 6342 } 6343 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6344 // cond: 6345 // result: (MOVWZreg x) 6346 for { 6347 x := v.Args[0] 6348 v_1 := v.Args[1] 6349 if v_1.Op != OpS390XMOVDconst { 6350 break 6351 } 6352 if v_1.AuxInt != 0xFFFFFFFF { 6353 break 6354 } 6355 v.reset(OpS390XMOVWZreg) 6356 v.AddArg(x) 6357 return true 6358 } 6359 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6360 // cond: 6361 // result: (MOVDconst [c&d]) 6362 for { 6363 v_0 := v.Args[0] 6364 if v_0.Op != OpS390XMOVDconst { 6365 break 6366 } 6367 c := v_0.AuxInt 6368 v_1 := v.Args[1] 6369 if v_1.Op != OpS390XMOVDconst { 6370 break 6371 } 6372 d := v_1.AuxInt 6373 v.reset(OpS390XMOVDconst) 6374 v.AuxInt = c & d 6375 return true 6376 } 6377 // match: (AND x x) 6378 // cond: 6379 // result: x 6380 for { 6381 x := v.Args[0] 6382 if x != v.Args[1] { 6383 break 6384 } 6385 v.reset(OpCopy) 6386 v.Type = x.Type 6387 v.AddArg(x) 6388 return true 6389 } 6390 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6391 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6392 // result: (ANDload <t> [off] {sym} x ptr mem) 6393 for { 6394 t := v.Type 6395 x := v.Args[0] 6396 g := v.Args[1] 6397 if g.Op != OpS390XMOVDload { 6398 break 6399 } 6400 off := g.AuxInt 6401 sym := g.Aux 6402 ptr := g.Args[0] 6403 mem := g.Args[1] 6404 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6405 break 6406 } 6407 v.reset(OpS390XANDload) 6408 v.Type = t 6409 v.AuxInt = off 6410 v.Aux = sym 6411 v.AddArg(x) 6412 v.AddArg(ptr) 6413 v.AddArg(mem) 6414 return true 6415 } 6416 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6417 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6418 // result: (ANDload <t> [off] {sym} x ptr mem) 6419 for { 6420 t := v.Type 6421 g := v.Args[0] 6422 if g.Op != OpS390XMOVDload { 6423 break 6424 } 6425 off := g.AuxInt 6426 sym := g.Aux 6427 ptr := g.Args[0] 6428 mem := g.Args[1] 6429 x := v.Args[1] 6430 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6431 break 6432 } 6433 v.reset(OpS390XANDload) 6434 v.Type = t 6435 v.AuxInt = off 6436 v.Aux = sym 6437 v.AddArg(x) 6438 v.AddArg(ptr) 6439 v.AddArg(mem) 6440 return true 6441 } 6442 return false 6443 } 6444 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6445 b := v.Block 6446 _ = b 6447 // match: (ANDW x (MOVDconst [c])) 6448 // cond: 6449 // result: (ANDWconst [c] x) 6450 for { 6451 x := v.Args[0] 6452 v_1 := v.Args[1] 6453 if v_1.Op != OpS390XMOVDconst { 6454 break 6455 } 6456 c := v_1.AuxInt 6457 v.reset(OpS390XANDWconst) 6458 v.AuxInt = c 6459 v.AddArg(x) 6460 return true 6461 } 6462 // match: (ANDW (MOVDconst [c]) x) 6463 // cond: 6464 // result: (ANDWconst [c] x) 6465 for { 6466 v_0 := v.Args[0] 6467 if v_0.Op != OpS390XMOVDconst { 6468 break 6469 } 6470 c := v_0.AuxInt 6471 x := v.Args[1] 6472 v.reset(OpS390XANDWconst) 6473 v.AuxInt = c 6474 v.AddArg(x) 6475 return true 6476 } 6477 // match: (ANDW x x) 6478 // cond: 6479 // result: x 6480 for { 6481 x := v.Args[0] 6482 if x != v.Args[1] { 6483 break 6484 } 6485 v.reset(OpCopy) 6486 v.Type = x.Type 6487 v.AddArg(x) 6488 return true 6489 } 6490 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6491 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6492 // result: (ANDWload <t> [off] {sym} x ptr mem) 6493 for { 6494 t := v.Type 6495 x := v.Args[0] 6496 g := v.Args[1] 6497 if g.Op != OpS390XMOVWload { 6498 break 6499 } 6500 off := g.AuxInt 6501 sym := g.Aux 6502 ptr := g.Args[0] 6503 mem := g.Args[1] 6504 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6505 break 6506 } 6507 v.reset(OpS390XANDWload) 6508 v.Type = t 6509 v.AuxInt = off 6510 v.Aux = sym 6511 v.AddArg(x) 6512 v.AddArg(ptr) 6513 v.AddArg(mem) 6514 return true 6515 } 6516 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6517 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6518 // result: (ANDWload <t> [off] {sym} x ptr mem) 6519 for { 6520 t := v.Type 6521 g := v.Args[0] 6522 if g.Op != OpS390XMOVWload { 6523 break 6524 } 6525 off := g.AuxInt 6526 sym := g.Aux 6527 ptr := g.Args[0] 6528 mem := g.Args[1] 6529 x := v.Args[1] 6530 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6531 break 6532 } 6533 v.reset(OpS390XANDWload) 6534 v.Type = t 6535 v.AuxInt = off 6536 v.Aux = sym 6537 v.AddArg(x) 6538 v.AddArg(ptr) 6539 v.AddArg(mem) 6540 return true 6541 } 6542 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6543 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6544 // result: (ANDWload <t> [off] {sym} x ptr mem) 6545 for { 6546 t := v.Type 6547 x := v.Args[0] 6548 g := v.Args[1] 6549 if g.Op != OpS390XMOVWZload { 6550 break 6551 } 6552 off := g.AuxInt 6553 sym := g.Aux 6554 ptr := g.Args[0] 6555 mem := g.Args[1] 6556 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6557 break 6558 } 6559 v.reset(OpS390XANDWload) 6560 v.Type = t 6561 v.AuxInt = off 6562 v.Aux = sym 6563 v.AddArg(x) 6564 v.AddArg(ptr) 6565 v.AddArg(mem) 6566 return true 6567 } 6568 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6569 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6570 // result: (ANDWload <t> [off] {sym} x ptr mem) 6571 for { 6572 t := v.Type 6573 g := v.Args[0] 6574 if g.Op != OpS390XMOVWZload { 6575 break 6576 } 6577 off := g.AuxInt 6578 sym := g.Aux 6579 ptr := g.Args[0] 6580 mem := g.Args[1] 6581 x := v.Args[1] 6582 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6583 break 6584 } 6585 v.reset(OpS390XANDWload) 6586 v.Type = t 6587 v.AuxInt = off 6588 v.Aux = sym 6589 v.AddArg(x) 6590 v.AddArg(ptr) 6591 v.AddArg(mem) 6592 return true 6593 } 6594 return false 6595 } 6596 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6597 b := v.Block 6598 _ = b 6599 // match: (ANDWconst [c] (ANDWconst [d] x)) 6600 // cond: 6601 // result: (ANDWconst [c & d] x) 6602 for { 6603 c := v.AuxInt 6604 v_0 := v.Args[0] 6605 if v_0.Op != OpS390XANDWconst { 6606 break 6607 } 6608 d := v_0.AuxInt 6609 x := v_0.Args[0] 6610 v.reset(OpS390XANDWconst) 6611 v.AuxInt = c & d 6612 v.AddArg(x) 6613 return true 6614 } 6615 // match: (ANDWconst [0xFF] x) 6616 // cond: 6617 // result: (MOVBZreg x) 6618 for { 6619 if v.AuxInt != 0xFF { 6620 break 6621 } 6622 x := v.Args[0] 6623 v.reset(OpS390XMOVBZreg) 6624 v.AddArg(x) 6625 return true 6626 } 6627 // match: (ANDWconst [0xFFFF] x) 6628 // cond: 6629 // result: (MOVHZreg x) 6630 for { 6631 if v.AuxInt != 0xFFFF { 6632 break 6633 } 6634 x := v.Args[0] 6635 v.reset(OpS390XMOVHZreg) 6636 v.AddArg(x) 6637 return true 6638 } 6639 // match: (ANDWconst [c] _) 6640 // cond: int32(c)==0 6641 // result: (MOVDconst [0]) 6642 for { 6643 c := v.AuxInt 6644 if !(int32(c) == 0) { 6645 break 6646 } 6647 v.reset(OpS390XMOVDconst) 6648 v.AuxInt = 0 6649 return true 6650 } 6651 // match: (ANDWconst [c] x) 6652 // cond: int32(c)==-1 6653 // result: x 6654 for { 6655 c := v.AuxInt 6656 x := v.Args[0] 6657 if !(int32(c) == -1) { 6658 break 6659 } 6660 v.reset(OpCopy) 6661 v.Type = x.Type 6662 v.AddArg(x) 6663 return true 6664 } 6665 // match: (ANDWconst [c] (MOVDconst [d])) 6666 // cond: 6667 // result: (MOVDconst [c&d]) 6668 for { 6669 c := v.AuxInt 6670 v_0 := v.Args[0] 6671 if v_0.Op != OpS390XMOVDconst { 6672 break 6673 } 6674 d := v_0.AuxInt 6675 v.reset(OpS390XMOVDconst) 6676 v.AuxInt = c & d 6677 return true 6678 } 6679 return false 6680 } 6681 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6682 b := v.Block 6683 _ = b 6684 // match: (ANDconst [c] (ANDconst [d] x)) 6685 // cond: 6686 // result: (ANDconst [c & d] x) 6687 for { 6688 c := v.AuxInt 6689 v_0 := v.Args[0] 6690 if v_0.Op != OpS390XANDconst { 6691 break 6692 } 6693 d := v_0.AuxInt 6694 x := v_0.Args[0] 6695 v.reset(OpS390XANDconst) 6696 v.AuxInt = c & d 6697 v.AddArg(x) 6698 return true 6699 } 6700 // match: (ANDconst [0] _) 6701 // cond: 6702 // result: (MOVDconst [0]) 6703 for { 6704 if v.AuxInt != 0 { 6705 break 6706 } 6707 v.reset(OpS390XMOVDconst) 6708 v.AuxInt = 0 6709 return true 6710 } 6711 // match: (ANDconst [-1] x) 6712 // cond: 6713 // result: x 6714 for { 6715 if v.AuxInt != -1 { 6716 break 6717 } 6718 x := v.Args[0] 6719 v.reset(OpCopy) 6720 v.Type = x.Type 6721 v.AddArg(x) 6722 return true 6723 } 6724 // match: (ANDconst [c] (MOVDconst [d])) 6725 // cond: 6726 // result: (MOVDconst [c&d]) 6727 for { 6728 c := v.AuxInt 6729 v_0 := v.Args[0] 6730 if v_0.Op != OpS390XMOVDconst { 6731 break 6732 } 6733 d := v_0.AuxInt 6734 v.reset(OpS390XMOVDconst) 6735 v.AuxInt = c & d 6736 return true 6737 } 6738 return false 6739 } 6740 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6741 b := v.Block 6742 _ = b 6743 // match: (CMP x (MOVDconst [c])) 6744 // cond: is32Bit(c) 6745 // result: (CMPconst x [c]) 6746 for { 6747 x := v.Args[0] 6748 v_1 := v.Args[1] 6749 if v_1.Op != OpS390XMOVDconst { 6750 break 6751 } 6752 c := v_1.AuxInt 6753 if !(is32Bit(c)) { 6754 break 6755 } 6756 v.reset(OpS390XCMPconst) 6757 v.AuxInt = c 6758 v.AddArg(x) 6759 return true 6760 } 6761 // match: (CMP (MOVDconst [c]) x) 6762 // cond: is32Bit(c) 6763 // result: (InvertFlags (CMPconst x [c])) 6764 for { 6765 v_0 := v.Args[0] 6766 if v_0.Op != OpS390XMOVDconst { 6767 break 6768 } 6769 c := v_0.AuxInt 6770 x := v.Args[1] 6771 if !(is32Bit(c)) { 6772 break 6773 } 6774 v.reset(OpS390XInvertFlags) 6775 v0 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 6776 v0.AuxInt = c 6777 v0.AddArg(x) 6778 v.AddArg(v0) 6779 return true 6780 } 6781 return false 6782 } 6783 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6784 b := v.Block 6785 _ = b 6786 // match: (CMPU x (MOVDconst [c])) 6787 // cond: isU32Bit(c) 6788 // result: (CMPUconst x [int64(uint32(c))]) 6789 for { 6790 x := v.Args[0] 6791 v_1 := v.Args[1] 6792 if v_1.Op != OpS390XMOVDconst { 6793 break 6794 } 6795 c := v_1.AuxInt 6796 if !(isU32Bit(c)) { 6797 break 6798 } 6799 v.reset(OpS390XCMPUconst) 6800 v.AuxInt = int64(uint32(c)) 6801 v.AddArg(x) 6802 return true 6803 } 6804 // match: (CMPU (MOVDconst [c]) x) 6805 // cond: isU32Bit(c) 6806 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6807 for { 6808 v_0 := v.Args[0] 6809 if v_0.Op != OpS390XMOVDconst { 6810 break 6811 } 6812 c := v_0.AuxInt 6813 x := v.Args[1] 6814 if !(isU32Bit(c)) { 6815 break 6816 } 6817 v.reset(OpS390XInvertFlags) 6818 v0 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 6819 v0.AuxInt = int64(uint32(c)) 6820 v0.AddArg(x) 6821 v.AddArg(v0) 6822 return true 6823 } 6824 return false 6825 } 6826 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6827 b := v.Block 6828 _ = b 6829 // match: (CMPUconst (MOVDconst [x]) [y]) 6830 // cond: uint64(x)==uint64(y) 6831 // result: (FlagEQ) 6832 for { 6833 y := v.AuxInt 6834 v_0 := v.Args[0] 6835 if v_0.Op != OpS390XMOVDconst { 6836 break 6837 } 6838 x := v_0.AuxInt 6839 if !(uint64(x) == uint64(y)) { 6840 break 6841 } 6842 v.reset(OpS390XFlagEQ) 6843 return true 6844 } 6845 // match: (CMPUconst (MOVDconst [x]) [y]) 6846 // cond: uint64(x)<uint64(y) 6847 // result: (FlagLT) 6848 for { 6849 y := v.AuxInt 6850 v_0 := v.Args[0] 6851 if v_0.Op != OpS390XMOVDconst { 6852 break 6853 } 6854 x := v_0.AuxInt 6855 if !(uint64(x) < uint64(y)) { 6856 break 6857 } 6858 v.reset(OpS390XFlagLT) 6859 return true 6860 } 6861 // match: (CMPUconst (MOVDconst [x]) [y]) 6862 // cond: uint64(x)>uint64(y) 6863 // result: (FlagGT) 6864 for { 6865 y := v.AuxInt 6866 v_0 := v.Args[0] 6867 if v_0.Op != OpS390XMOVDconst { 6868 break 6869 } 6870 x := v_0.AuxInt 6871 if !(uint64(x) > uint64(y)) { 6872 break 6873 } 6874 v.reset(OpS390XFlagGT) 6875 return true 6876 } 6877 return false 6878 } 6879 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6880 b := v.Block 6881 _ = b 6882 // match: (CMPW x (MOVDconst [c])) 6883 // cond: 6884 // result: (CMPWconst x [c]) 6885 for { 6886 x := v.Args[0] 6887 v_1 := v.Args[1] 6888 if v_1.Op != OpS390XMOVDconst { 6889 break 6890 } 6891 c := v_1.AuxInt 6892 v.reset(OpS390XCMPWconst) 6893 v.AuxInt = c 6894 v.AddArg(x) 6895 return true 6896 } 6897 // match: (CMPW (MOVDconst [c]) x) 6898 // cond: 6899 // result: (InvertFlags (CMPWconst x [c])) 6900 for { 6901 v_0 := v.Args[0] 6902 if v_0.Op != OpS390XMOVDconst { 6903 break 6904 } 6905 c := v_0.AuxInt 6906 x := v.Args[1] 6907 v.reset(OpS390XInvertFlags) 6908 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 6909 v0.AuxInt = c 6910 v0.AddArg(x) 6911 v.AddArg(v0) 6912 return true 6913 } 6914 return false 6915 } 6916 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6917 b := v.Block 6918 _ = b 6919 // match: (CMPWU x (MOVDconst [c])) 6920 // cond: 6921 // result: (CMPWUconst x [int64(uint32(c))]) 6922 for { 6923 x := v.Args[0] 6924 v_1 := v.Args[1] 6925 if v_1.Op != OpS390XMOVDconst { 6926 break 6927 } 6928 c := v_1.AuxInt 6929 v.reset(OpS390XCMPWUconst) 6930 v.AuxInt = int64(uint32(c)) 6931 v.AddArg(x) 6932 return true 6933 } 6934 // match: (CMPWU (MOVDconst [c]) x) 6935 // cond: 6936 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6937 for { 6938 v_0 := v.Args[0] 6939 if v_0.Op != OpS390XMOVDconst { 6940 break 6941 } 6942 c := v_0.AuxInt 6943 x := v.Args[1] 6944 v.reset(OpS390XInvertFlags) 6945 v0 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 6946 v0.AuxInt = int64(uint32(c)) 6947 v0.AddArg(x) 6948 v.AddArg(v0) 6949 return true 6950 } 6951 return false 6952 } 6953 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 6954 b := v.Block 6955 _ = b 6956 // match: (CMPWUconst (MOVDconst [x]) [y]) 6957 // cond: uint32(x)==uint32(y) 6958 // result: (FlagEQ) 6959 for { 6960 y := v.AuxInt 6961 v_0 := v.Args[0] 6962 if v_0.Op != OpS390XMOVDconst { 6963 break 6964 } 6965 x := v_0.AuxInt 6966 if !(uint32(x) == uint32(y)) { 6967 break 6968 } 6969 v.reset(OpS390XFlagEQ) 6970 return true 6971 } 6972 // match: (CMPWUconst (MOVDconst [x]) [y]) 6973 // cond: uint32(x)<uint32(y) 6974 // result: (FlagLT) 6975 for { 6976 y := v.AuxInt 6977 v_0 := v.Args[0] 6978 if v_0.Op != OpS390XMOVDconst { 6979 break 6980 } 6981 x := v_0.AuxInt 6982 if !(uint32(x) < uint32(y)) { 6983 break 6984 } 6985 v.reset(OpS390XFlagLT) 6986 return true 6987 } 6988 // match: (CMPWUconst (MOVDconst [x]) [y]) 6989 // cond: uint32(x)>uint32(y) 6990 // result: (FlagGT) 6991 for { 6992 y := v.AuxInt 6993 v_0 := v.Args[0] 6994 if v_0.Op != OpS390XMOVDconst { 6995 break 6996 } 6997 x := v_0.AuxInt 6998 if !(uint32(x) > uint32(y)) { 6999 break 7000 } 7001 v.reset(OpS390XFlagGT) 7002 return true 7003 } 7004 return false 7005 } 7006 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 7007 b := v.Block 7008 _ = b 7009 // match: (CMPWconst (MOVDconst [x]) [y]) 7010 // cond: int32(x)==int32(y) 7011 // result: (FlagEQ) 7012 for { 7013 y := v.AuxInt 7014 v_0 := v.Args[0] 7015 if v_0.Op != OpS390XMOVDconst { 7016 break 7017 } 7018 x := v_0.AuxInt 7019 if !(int32(x) == int32(y)) { 7020 break 7021 } 7022 v.reset(OpS390XFlagEQ) 7023 return true 7024 } 7025 // match: (CMPWconst (MOVDconst [x]) [y]) 7026 // cond: int32(x)<int32(y) 7027 // result: (FlagLT) 7028 for { 7029 y := v.AuxInt 7030 v_0 := v.Args[0] 7031 if v_0.Op != OpS390XMOVDconst { 7032 break 7033 } 7034 x := v_0.AuxInt 7035 if !(int32(x) < int32(y)) { 7036 break 7037 } 7038 v.reset(OpS390XFlagLT) 7039 return true 7040 } 7041 // match: (CMPWconst (MOVDconst [x]) [y]) 7042 // cond: int32(x)>int32(y) 7043 // result: (FlagGT) 7044 for { 7045 y := v.AuxInt 7046 v_0 := v.Args[0] 7047 if v_0.Op != OpS390XMOVDconst { 7048 break 7049 } 7050 x := v_0.AuxInt 7051 if !(int32(x) > int32(y)) { 7052 break 7053 } 7054 v.reset(OpS390XFlagGT) 7055 return true 7056 } 7057 // match: (CMPWconst (SRWconst _ [c]) [n]) 7058 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7059 // result: (FlagLT) 7060 for { 7061 n := v.AuxInt 7062 v_0 := v.Args[0] 7063 if v_0.Op != OpS390XSRWconst { 7064 break 7065 } 7066 c := v_0.AuxInt 7067 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7068 break 7069 } 7070 v.reset(OpS390XFlagLT) 7071 return true 7072 } 7073 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7074 // cond: 0 <= int32(m) && int32(m) < int32(n) 7075 // result: (FlagLT) 7076 for { 7077 n := v.AuxInt 7078 v_0 := v.Args[0] 7079 if v_0.Op != OpS390XANDWconst { 7080 break 7081 } 7082 m := v_0.AuxInt 7083 if !(0 <= int32(m) && int32(m) < int32(n)) { 7084 break 7085 } 7086 v.reset(OpS390XFlagLT) 7087 return true 7088 } 7089 return false 7090 } 7091 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7092 b := v.Block 7093 _ = b 7094 // match: (CMPconst (MOVDconst [x]) [y]) 7095 // cond: x==y 7096 // result: (FlagEQ) 7097 for { 7098 y := v.AuxInt 7099 v_0 := v.Args[0] 7100 if v_0.Op != OpS390XMOVDconst { 7101 break 7102 } 7103 x := v_0.AuxInt 7104 if !(x == y) { 7105 break 7106 } 7107 v.reset(OpS390XFlagEQ) 7108 return true 7109 } 7110 // match: (CMPconst (MOVDconst [x]) [y]) 7111 // cond: x<y 7112 // result: (FlagLT) 7113 for { 7114 y := v.AuxInt 7115 v_0 := v.Args[0] 7116 if v_0.Op != OpS390XMOVDconst { 7117 break 7118 } 7119 x := v_0.AuxInt 7120 if !(x < y) { 7121 break 7122 } 7123 v.reset(OpS390XFlagLT) 7124 return true 7125 } 7126 // match: (CMPconst (MOVDconst [x]) [y]) 7127 // cond: x>y 7128 // result: (FlagGT) 7129 for { 7130 y := v.AuxInt 7131 v_0 := v.Args[0] 7132 if v_0.Op != OpS390XMOVDconst { 7133 break 7134 } 7135 x := v_0.AuxInt 7136 if !(x > y) { 7137 break 7138 } 7139 v.reset(OpS390XFlagGT) 7140 return true 7141 } 7142 // match: (CMPconst (MOVBZreg _) [c]) 7143 // cond: 0xFF < c 7144 // result: (FlagLT) 7145 for { 7146 c := v.AuxInt 7147 v_0 := v.Args[0] 7148 if v_0.Op != OpS390XMOVBZreg { 7149 break 7150 } 7151 if !(0xFF < c) { 7152 break 7153 } 7154 v.reset(OpS390XFlagLT) 7155 return true 7156 } 7157 // match: (CMPconst (MOVHZreg _) [c]) 7158 // cond: 0xFFFF < c 7159 // result: (FlagLT) 7160 for { 7161 c := v.AuxInt 7162 v_0 := v.Args[0] 7163 if v_0.Op != OpS390XMOVHZreg { 7164 break 7165 } 7166 if !(0xFFFF < c) { 7167 break 7168 } 7169 v.reset(OpS390XFlagLT) 7170 return true 7171 } 7172 // match: (CMPconst (MOVWZreg _) [c]) 7173 // cond: 0xFFFFFFFF < c 7174 // result: (FlagLT) 7175 for { 7176 c := v.AuxInt 7177 v_0 := v.Args[0] 7178 if v_0.Op != OpS390XMOVWZreg { 7179 break 7180 } 7181 if !(0xFFFFFFFF < c) { 7182 break 7183 } 7184 v.reset(OpS390XFlagLT) 7185 return true 7186 } 7187 // match: (CMPconst (SRDconst _ [c]) [n]) 7188 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7189 // result: (FlagLT) 7190 for { 7191 n := v.AuxInt 7192 v_0 := v.Args[0] 7193 if v_0.Op != OpS390XSRDconst { 7194 break 7195 } 7196 c := v_0.AuxInt 7197 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7198 break 7199 } 7200 v.reset(OpS390XFlagLT) 7201 return true 7202 } 7203 // match: (CMPconst (ANDconst _ [m]) [n]) 7204 // cond: 0 <= m && m < n 7205 // result: (FlagLT) 7206 for { 7207 n := v.AuxInt 7208 v_0 := v.Args[0] 7209 if v_0.Op != OpS390XANDconst { 7210 break 7211 } 7212 m := v_0.AuxInt 7213 if !(0 <= m && m < n) { 7214 break 7215 } 7216 v.reset(OpS390XFlagLT) 7217 return true 7218 } 7219 return false 7220 } 7221 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7222 b := v.Block 7223 _ = b 7224 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7225 // cond: is20Bit(off1+off2) 7226 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7227 for { 7228 off1 := v.AuxInt 7229 sym := v.Aux 7230 v_0 := v.Args[0] 7231 if v_0.Op != OpS390XADDconst { 7232 break 7233 } 7234 off2 := v_0.AuxInt 7235 ptr := v_0.Args[0] 7236 mem := v.Args[1] 7237 if !(is20Bit(off1 + off2)) { 7238 break 7239 } 7240 v.reset(OpS390XFMOVDload) 7241 v.AuxInt = off1 + off2 7242 v.Aux = sym 7243 v.AddArg(ptr) 7244 v.AddArg(mem) 7245 return true 7246 } 7247 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7248 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7249 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7250 for { 7251 off1 := v.AuxInt 7252 sym1 := v.Aux 7253 v_0 := v.Args[0] 7254 if v_0.Op != OpS390XMOVDaddr { 7255 break 7256 } 7257 off2 := v_0.AuxInt 7258 sym2 := v_0.Aux 7259 base := v_0.Args[0] 7260 mem := v.Args[1] 7261 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7262 break 7263 } 7264 v.reset(OpS390XFMOVDload) 7265 v.AuxInt = off1 + off2 7266 v.Aux = mergeSym(sym1, sym2) 7267 v.AddArg(base) 7268 v.AddArg(mem) 7269 return true 7270 } 7271 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7272 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7273 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7274 for { 7275 off1 := v.AuxInt 7276 sym1 := v.Aux 7277 v_0 := v.Args[0] 7278 if v_0.Op != OpS390XMOVDaddridx { 7279 break 7280 } 7281 off2 := v_0.AuxInt 7282 sym2 := v_0.Aux 7283 ptr := v_0.Args[0] 7284 idx := v_0.Args[1] 7285 mem := v.Args[1] 7286 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7287 break 7288 } 7289 v.reset(OpS390XFMOVDloadidx) 7290 v.AuxInt = off1 + off2 7291 v.Aux = mergeSym(sym1, sym2) 7292 v.AddArg(ptr) 7293 v.AddArg(idx) 7294 v.AddArg(mem) 7295 return true 7296 } 7297 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7298 // cond: ptr.Op != OpSB 7299 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7300 for { 7301 off := v.AuxInt 7302 sym := v.Aux 7303 v_0 := v.Args[0] 7304 if v_0.Op != OpS390XADD { 7305 break 7306 } 7307 ptr := v_0.Args[0] 7308 idx := v_0.Args[1] 7309 mem := v.Args[1] 7310 if !(ptr.Op != OpSB) { 7311 break 7312 } 7313 v.reset(OpS390XFMOVDloadidx) 7314 v.AuxInt = off 7315 v.Aux = sym 7316 v.AddArg(ptr) 7317 v.AddArg(idx) 7318 v.AddArg(mem) 7319 return true 7320 } 7321 return false 7322 } 7323 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7324 b := v.Block 7325 _ = b 7326 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7327 // cond: 7328 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7329 for { 7330 c := v.AuxInt 7331 sym := v.Aux 7332 v_0 := v.Args[0] 7333 if v_0.Op != OpS390XADDconst { 7334 break 7335 } 7336 d := v_0.AuxInt 7337 ptr := v_0.Args[0] 7338 idx := v.Args[1] 7339 mem := v.Args[2] 7340 v.reset(OpS390XFMOVDloadidx) 7341 v.AuxInt = c + d 7342 v.Aux = sym 7343 v.AddArg(ptr) 7344 v.AddArg(idx) 7345 v.AddArg(mem) 7346 return true 7347 } 7348 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7349 // cond: 7350 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7351 for { 7352 c := v.AuxInt 7353 sym := v.Aux 7354 ptr := v.Args[0] 7355 v_1 := v.Args[1] 7356 if v_1.Op != OpS390XADDconst { 7357 break 7358 } 7359 d := v_1.AuxInt 7360 idx := v_1.Args[0] 7361 mem := v.Args[2] 7362 v.reset(OpS390XFMOVDloadidx) 7363 v.AuxInt = c + d 7364 v.Aux = sym 7365 v.AddArg(ptr) 7366 v.AddArg(idx) 7367 v.AddArg(mem) 7368 return true 7369 } 7370 return false 7371 } 7372 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7373 b := v.Block 7374 _ = b 7375 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7376 // cond: is20Bit(off1+off2) 7377 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7378 for { 7379 off1 := v.AuxInt 7380 sym := v.Aux 7381 v_0 := v.Args[0] 7382 if v_0.Op != OpS390XADDconst { 7383 break 7384 } 7385 off2 := v_0.AuxInt 7386 ptr := v_0.Args[0] 7387 val := v.Args[1] 7388 mem := v.Args[2] 7389 if !(is20Bit(off1 + off2)) { 7390 break 7391 } 7392 v.reset(OpS390XFMOVDstore) 7393 v.AuxInt = off1 + off2 7394 v.Aux = sym 7395 v.AddArg(ptr) 7396 v.AddArg(val) 7397 v.AddArg(mem) 7398 return true 7399 } 7400 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7401 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7402 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7403 for { 7404 off1 := v.AuxInt 7405 sym1 := v.Aux 7406 v_0 := v.Args[0] 7407 if v_0.Op != OpS390XMOVDaddr { 7408 break 7409 } 7410 off2 := v_0.AuxInt 7411 sym2 := v_0.Aux 7412 base := v_0.Args[0] 7413 val := v.Args[1] 7414 mem := v.Args[2] 7415 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7416 break 7417 } 7418 v.reset(OpS390XFMOVDstore) 7419 v.AuxInt = off1 + off2 7420 v.Aux = mergeSym(sym1, sym2) 7421 v.AddArg(base) 7422 v.AddArg(val) 7423 v.AddArg(mem) 7424 return true 7425 } 7426 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7427 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7428 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7429 for { 7430 off1 := v.AuxInt 7431 sym1 := v.Aux 7432 v_0 := v.Args[0] 7433 if v_0.Op != OpS390XMOVDaddridx { 7434 break 7435 } 7436 off2 := v_0.AuxInt 7437 sym2 := v_0.Aux 7438 ptr := v_0.Args[0] 7439 idx := v_0.Args[1] 7440 val := v.Args[1] 7441 mem := v.Args[2] 7442 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7443 break 7444 } 7445 v.reset(OpS390XFMOVDstoreidx) 7446 v.AuxInt = off1 + off2 7447 v.Aux = mergeSym(sym1, sym2) 7448 v.AddArg(ptr) 7449 v.AddArg(idx) 7450 v.AddArg(val) 7451 v.AddArg(mem) 7452 return true 7453 } 7454 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7455 // cond: ptr.Op != OpSB 7456 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7457 for { 7458 off := v.AuxInt 7459 sym := v.Aux 7460 v_0 := v.Args[0] 7461 if v_0.Op != OpS390XADD { 7462 break 7463 } 7464 ptr := v_0.Args[0] 7465 idx := v_0.Args[1] 7466 val := v.Args[1] 7467 mem := v.Args[2] 7468 if !(ptr.Op != OpSB) { 7469 break 7470 } 7471 v.reset(OpS390XFMOVDstoreidx) 7472 v.AuxInt = off 7473 v.Aux = sym 7474 v.AddArg(ptr) 7475 v.AddArg(idx) 7476 v.AddArg(val) 7477 v.AddArg(mem) 7478 return true 7479 } 7480 return false 7481 } 7482 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7483 b := v.Block 7484 _ = b 7485 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7486 // cond: 7487 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7488 for { 7489 c := v.AuxInt 7490 sym := v.Aux 7491 v_0 := v.Args[0] 7492 if v_0.Op != OpS390XADDconst { 7493 break 7494 } 7495 d := v_0.AuxInt 7496 ptr := v_0.Args[0] 7497 idx := v.Args[1] 7498 val := v.Args[2] 7499 mem := v.Args[3] 7500 v.reset(OpS390XFMOVDstoreidx) 7501 v.AuxInt = c + d 7502 v.Aux = sym 7503 v.AddArg(ptr) 7504 v.AddArg(idx) 7505 v.AddArg(val) 7506 v.AddArg(mem) 7507 return true 7508 } 7509 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7510 // cond: 7511 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7512 for { 7513 c := v.AuxInt 7514 sym := v.Aux 7515 ptr := v.Args[0] 7516 v_1 := v.Args[1] 7517 if v_1.Op != OpS390XADDconst { 7518 break 7519 } 7520 d := v_1.AuxInt 7521 idx := v_1.Args[0] 7522 val := v.Args[2] 7523 mem := v.Args[3] 7524 v.reset(OpS390XFMOVDstoreidx) 7525 v.AuxInt = c + d 7526 v.Aux = sym 7527 v.AddArg(ptr) 7528 v.AddArg(idx) 7529 v.AddArg(val) 7530 v.AddArg(mem) 7531 return true 7532 } 7533 return false 7534 } 7535 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7536 b := v.Block 7537 _ = b 7538 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7539 // cond: is20Bit(off1+off2) 7540 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7541 for { 7542 off1 := v.AuxInt 7543 sym := v.Aux 7544 v_0 := v.Args[0] 7545 if v_0.Op != OpS390XADDconst { 7546 break 7547 } 7548 off2 := v_0.AuxInt 7549 ptr := v_0.Args[0] 7550 mem := v.Args[1] 7551 if !(is20Bit(off1 + off2)) { 7552 break 7553 } 7554 v.reset(OpS390XFMOVSload) 7555 v.AuxInt = off1 + off2 7556 v.Aux = sym 7557 v.AddArg(ptr) 7558 v.AddArg(mem) 7559 return true 7560 } 7561 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7562 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7563 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7564 for { 7565 off1 := v.AuxInt 7566 sym1 := v.Aux 7567 v_0 := v.Args[0] 7568 if v_0.Op != OpS390XMOVDaddr { 7569 break 7570 } 7571 off2 := v_0.AuxInt 7572 sym2 := v_0.Aux 7573 base := v_0.Args[0] 7574 mem := v.Args[1] 7575 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7576 break 7577 } 7578 v.reset(OpS390XFMOVSload) 7579 v.AuxInt = off1 + off2 7580 v.Aux = mergeSym(sym1, sym2) 7581 v.AddArg(base) 7582 v.AddArg(mem) 7583 return true 7584 } 7585 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7586 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7587 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7588 for { 7589 off1 := v.AuxInt 7590 sym1 := v.Aux 7591 v_0 := v.Args[0] 7592 if v_0.Op != OpS390XMOVDaddridx { 7593 break 7594 } 7595 off2 := v_0.AuxInt 7596 sym2 := v_0.Aux 7597 ptr := v_0.Args[0] 7598 idx := v_0.Args[1] 7599 mem := v.Args[1] 7600 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7601 break 7602 } 7603 v.reset(OpS390XFMOVSloadidx) 7604 v.AuxInt = off1 + off2 7605 v.Aux = mergeSym(sym1, sym2) 7606 v.AddArg(ptr) 7607 v.AddArg(idx) 7608 v.AddArg(mem) 7609 return true 7610 } 7611 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7612 // cond: ptr.Op != OpSB 7613 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7614 for { 7615 off := v.AuxInt 7616 sym := v.Aux 7617 v_0 := v.Args[0] 7618 if v_0.Op != OpS390XADD { 7619 break 7620 } 7621 ptr := v_0.Args[0] 7622 idx := v_0.Args[1] 7623 mem := v.Args[1] 7624 if !(ptr.Op != OpSB) { 7625 break 7626 } 7627 v.reset(OpS390XFMOVSloadidx) 7628 v.AuxInt = off 7629 v.Aux = sym 7630 v.AddArg(ptr) 7631 v.AddArg(idx) 7632 v.AddArg(mem) 7633 return true 7634 } 7635 return false 7636 } 7637 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7638 b := v.Block 7639 _ = b 7640 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7641 // cond: 7642 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7643 for { 7644 c := v.AuxInt 7645 sym := v.Aux 7646 v_0 := v.Args[0] 7647 if v_0.Op != OpS390XADDconst { 7648 break 7649 } 7650 d := v_0.AuxInt 7651 ptr := v_0.Args[0] 7652 idx := v.Args[1] 7653 mem := v.Args[2] 7654 v.reset(OpS390XFMOVSloadidx) 7655 v.AuxInt = c + d 7656 v.Aux = sym 7657 v.AddArg(ptr) 7658 v.AddArg(idx) 7659 v.AddArg(mem) 7660 return true 7661 } 7662 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7663 // cond: 7664 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7665 for { 7666 c := v.AuxInt 7667 sym := v.Aux 7668 ptr := v.Args[0] 7669 v_1 := v.Args[1] 7670 if v_1.Op != OpS390XADDconst { 7671 break 7672 } 7673 d := v_1.AuxInt 7674 idx := v_1.Args[0] 7675 mem := v.Args[2] 7676 v.reset(OpS390XFMOVSloadidx) 7677 v.AuxInt = c + d 7678 v.Aux = sym 7679 v.AddArg(ptr) 7680 v.AddArg(idx) 7681 v.AddArg(mem) 7682 return true 7683 } 7684 return false 7685 } 7686 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7687 b := v.Block 7688 _ = b 7689 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7690 // cond: is20Bit(off1+off2) 7691 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7692 for { 7693 off1 := v.AuxInt 7694 sym := v.Aux 7695 v_0 := v.Args[0] 7696 if v_0.Op != OpS390XADDconst { 7697 break 7698 } 7699 off2 := v_0.AuxInt 7700 ptr := v_0.Args[0] 7701 val := v.Args[1] 7702 mem := v.Args[2] 7703 if !(is20Bit(off1 + off2)) { 7704 break 7705 } 7706 v.reset(OpS390XFMOVSstore) 7707 v.AuxInt = off1 + off2 7708 v.Aux = sym 7709 v.AddArg(ptr) 7710 v.AddArg(val) 7711 v.AddArg(mem) 7712 return true 7713 } 7714 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7715 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7716 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7717 for { 7718 off1 := v.AuxInt 7719 sym1 := v.Aux 7720 v_0 := v.Args[0] 7721 if v_0.Op != OpS390XMOVDaddr { 7722 break 7723 } 7724 off2 := v_0.AuxInt 7725 sym2 := v_0.Aux 7726 base := v_0.Args[0] 7727 val := v.Args[1] 7728 mem := v.Args[2] 7729 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7730 break 7731 } 7732 v.reset(OpS390XFMOVSstore) 7733 v.AuxInt = off1 + off2 7734 v.Aux = mergeSym(sym1, sym2) 7735 v.AddArg(base) 7736 v.AddArg(val) 7737 v.AddArg(mem) 7738 return true 7739 } 7740 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7741 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7742 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7743 for { 7744 off1 := v.AuxInt 7745 sym1 := v.Aux 7746 v_0 := v.Args[0] 7747 if v_0.Op != OpS390XMOVDaddridx { 7748 break 7749 } 7750 off2 := v_0.AuxInt 7751 sym2 := v_0.Aux 7752 ptr := v_0.Args[0] 7753 idx := v_0.Args[1] 7754 val := v.Args[1] 7755 mem := v.Args[2] 7756 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7757 break 7758 } 7759 v.reset(OpS390XFMOVSstoreidx) 7760 v.AuxInt = off1 + off2 7761 v.Aux = mergeSym(sym1, sym2) 7762 v.AddArg(ptr) 7763 v.AddArg(idx) 7764 v.AddArg(val) 7765 v.AddArg(mem) 7766 return true 7767 } 7768 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7769 // cond: ptr.Op != OpSB 7770 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7771 for { 7772 off := v.AuxInt 7773 sym := v.Aux 7774 v_0 := v.Args[0] 7775 if v_0.Op != OpS390XADD { 7776 break 7777 } 7778 ptr := v_0.Args[0] 7779 idx := v_0.Args[1] 7780 val := v.Args[1] 7781 mem := v.Args[2] 7782 if !(ptr.Op != OpSB) { 7783 break 7784 } 7785 v.reset(OpS390XFMOVSstoreidx) 7786 v.AuxInt = off 7787 v.Aux = sym 7788 v.AddArg(ptr) 7789 v.AddArg(idx) 7790 v.AddArg(val) 7791 v.AddArg(mem) 7792 return true 7793 } 7794 return false 7795 } 7796 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7797 b := v.Block 7798 _ = b 7799 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7800 // cond: 7801 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7802 for { 7803 c := v.AuxInt 7804 sym := v.Aux 7805 v_0 := v.Args[0] 7806 if v_0.Op != OpS390XADDconst { 7807 break 7808 } 7809 d := v_0.AuxInt 7810 ptr := v_0.Args[0] 7811 idx := v.Args[1] 7812 val := v.Args[2] 7813 mem := v.Args[3] 7814 v.reset(OpS390XFMOVSstoreidx) 7815 v.AuxInt = c + d 7816 v.Aux = sym 7817 v.AddArg(ptr) 7818 v.AddArg(idx) 7819 v.AddArg(val) 7820 v.AddArg(mem) 7821 return true 7822 } 7823 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7824 // cond: 7825 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7826 for { 7827 c := v.AuxInt 7828 sym := v.Aux 7829 ptr := v.Args[0] 7830 v_1 := v.Args[1] 7831 if v_1.Op != OpS390XADDconst { 7832 break 7833 } 7834 d := v_1.AuxInt 7835 idx := v_1.Args[0] 7836 val := v.Args[2] 7837 mem := v.Args[3] 7838 v.reset(OpS390XFMOVSstoreidx) 7839 v.AuxInt = c + d 7840 v.Aux = sym 7841 v.AddArg(ptr) 7842 v.AddArg(idx) 7843 v.AddArg(val) 7844 v.AddArg(mem) 7845 return true 7846 } 7847 return false 7848 } 7849 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7850 b := v.Block 7851 _ = b 7852 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7853 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7854 // result: (MOVBZreg x) 7855 for { 7856 off := v.AuxInt 7857 sym := v.Aux 7858 ptr := v.Args[0] 7859 v_1 := v.Args[1] 7860 if v_1.Op != OpS390XMOVBstore { 7861 break 7862 } 7863 off2 := v_1.AuxInt 7864 sym2 := v_1.Aux 7865 ptr2 := v_1.Args[0] 7866 x := v_1.Args[1] 7867 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7868 break 7869 } 7870 v.reset(OpS390XMOVBZreg) 7871 v.AddArg(x) 7872 return true 7873 } 7874 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7875 // cond: is20Bit(off1+off2) 7876 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7877 for { 7878 off1 := v.AuxInt 7879 sym := v.Aux 7880 v_0 := v.Args[0] 7881 if v_0.Op != OpS390XADDconst { 7882 break 7883 } 7884 off2 := v_0.AuxInt 7885 ptr := v_0.Args[0] 7886 mem := v.Args[1] 7887 if !(is20Bit(off1 + off2)) { 7888 break 7889 } 7890 v.reset(OpS390XMOVBZload) 7891 v.AuxInt = off1 + off2 7892 v.Aux = sym 7893 v.AddArg(ptr) 7894 v.AddArg(mem) 7895 return true 7896 } 7897 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7898 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7899 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7900 for { 7901 off1 := v.AuxInt 7902 sym1 := v.Aux 7903 v_0 := v.Args[0] 7904 if v_0.Op != OpS390XMOVDaddr { 7905 break 7906 } 7907 off2 := v_0.AuxInt 7908 sym2 := v_0.Aux 7909 base := v_0.Args[0] 7910 mem := v.Args[1] 7911 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7912 break 7913 } 7914 v.reset(OpS390XMOVBZload) 7915 v.AuxInt = off1 + off2 7916 v.Aux = mergeSym(sym1, sym2) 7917 v.AddArg(base) 7918 v.AddArg(mem) 7919 return true 7920 } 7921 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7922 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7923 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7924 for { 7925 off1 := v.AuxInt 7926 sym1 := v.Aux 7927 v_0 := v.Args[0] 7928 if v_0.Op != OpS390XMOVDaddridx { 7929 break 7930 } 7931 off2 := v_0.AuxInt 7932 sym2 := v_0.Aux 7933 ptr := v_0.Args[0] 7934 idx := v_0.Args[1] 7935 mem := v.Args[1] 7936 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7937 break 7938 } 7939 v.reset(OpS390XMOVBZloadidx) 7940 v.AuxInt = off1 + off2 7941 v.Aux = mergeSym(sym1, sym2) 7942 v.AddArg(ptr) 7943 v.AddArg(idx) 7944 v.AddArg(mem) 7945 return true 7946 } 7947 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 7948 // cond: ptr.Op != OpSB 7949 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 7950 for { 7951 off := v.AuxInt 7952 sym := v.Aux 7953 v_0 := v.Args[0] 7954 if v_0.Op != OpS390XADD { 7955 break 7956 } 7957 ptr := v_0.Args[0] 7958 idx := v_0.Args[1] 7959 mem := v.Args[1] 7960 if !(ptr.Op != OpSB) { 7961 break 7962 } 7963 v.reset(OpS390XMOVBZloadidx) 7964 v.AuxInt = off 7965 v.Aux = sym 7966 v.AddArg(ptr) 7967 v.AddArg(idx) 7968 v.AddArg(mem) 7969 return true 7970 } 7971 return false 7972 } 7973 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 7974 b := v.Block 7975 _ = b 7976 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7977 // cond: 7978 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7979 for { 7980 c := v.AuxInt 7981 sym := v.Aux 7982 v_0 := v.Args[0] 7983 if v_0.Op != OpS390XADDconst { 7984 break 7985 } 7986 d := v_0.AuxInt 7987 ptr := v_0.Args[0] 7988 idx := v.Args[1] 7989 mem := v.Args[2] 7990 v.reset(OpS390XMOVBZloadidx) 7991 v.AuxInt = c + d 7992 v.Aux = sym 7993 v.AddArg(ptr) 7994 v.AddArg(idx) 7995 v.AddArg(mem) 7996 return true 7997 } 7998 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7999 // cond: 8000 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 8001 for { 8002 c := v.AuxInt 8003 sym := v.Aux 8004 ptr := v.Args[0] 8005 v_1 := v.Args[1] 8006 if v_1.Op != OpS390XADDconst { 8007 break 8008 } 8009 d := v_1.AuxInt 8010 idx := v_1.Args[0] 8011 mem := v.Args[2] 8012 v.reset(OpS390XMOVBZloadidx) 8013 v.AuxInt = c + d 8014 v.Aux = sym 8015 v.AddArg(ptr) 8016 v.AddArg(idx) 8017 v.AddArg(mem) 8018 return true 8019 } 8020 return false 8021 } 8022 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 8023 b := v.Block 8024 _ = b 8025 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 8026 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8027 // result: (MOVDreg x) 8028 for { 8029 x := v.Args[0] 8030 if x.Op != OpS390XMOVDLT { 8031 break 8032 } 8033 x_0 := x.Args[0] 8034 if x_0.Op != OpS390XMOVDconst { 8035 break 8036 } 8037 c := x_0.AuxInt 8038 x_1 := x.Args[1] 8039 if x_1.Op != OpS390XMOVDconst { 8040 break 8041 } 8042 d := x_1.AuxInt 8043 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8044 break 8045 } 8046 v.reset(OpS390XMOVDreg) 8047 v.AddArg(x) 8048 return true 8049 } 8050 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8051 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8052 // result: (MOVDreg x) 8053 for { 8054 x := v.Args[0] 8055 if x.Op != OpS390XMOVDLE { 8056 break 8057 } 8058 x_0 := x.Args[0] 8059 if x_0.Op != OpS390XMOVDconst { 8060 break 8061 } 8062 c := x_0.AuxInt 8063 x_1 := x.Args[1] 8064 if x_1.Op != OpS390XMOVDconst { 8065 break 8066 } 8067 d := x_1.AuxInt 8068 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8069 break 8070 } 8071 v.reset(OpS390XMOVDreg) 8072 v.AddArg(x) 8073 return true 8074 } 8075 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8076 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8077 // result: (MOVDreg x) 8078 for { 8079 x := v.Args[0] 8080 if x.Op != OpS390XMOVDGT { 8081 break 8082 } 8083 x_0 := x.Args[0] 8084 if x_0.Op != OpS390XMOVDconst { 8085 break 8086 } 8087 c := x_0.AuxInt 8088 x_1 := x.Args[1] 8089 if x_1.Op != OpS390XMOVDconst { 8090 break 8091 } 8092 d := x_1.AuxInt 8093 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8094 break 8095 } 8096 v.reset(OpS390XMOVDreg) 8097 v.AddArg(x) 8098 return true 8099 } 8100 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8101 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8102 // result: (MOVDreg x) 8103 for { 8104 x := v.Args[0] 8105 if x.Op != OpS390XMOVDGE { 8106 break 8107 } 8108 x_0 := x.Args[0] 8109 if x_0.Op != OpS390XMOVDconst { 8110 break 8111 } 8112 c := x_0.AuxInt 8113 x_1 := x.Args[1] 8114 if x_1.Op != OpS390XMOVDconst { 8115 break 8116 } 8117 d := x_1.AuxInt 8118 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8119 break 8120 } 8121 v.reset(OpS390XMOVDreg) 8122 v.AddArg(x) 8123 return true 8124 } 8125 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8126 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8127 // result: (MOVDreg x) 8128 for { 8129 x := v.Args[0] 8130 if x.Op != OpS390XMOVDEQ { 8131 break 8132 } 8133 x_0 := x.Args[0] 8134 if x_0.Op != OpS390XMOVDconst { 8135 break 8136 } 8137 c := x_0.AuxInt 8138 x_1 := x.Args[1] 8139 if x_1.Op != OpS390XMOVDconst { 8140 break 8141 } 8142 d := x_1.AuxInt 8143 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8144 break 8145 } 8146 v.reset(OpS390XMOVDreg) 8147 v.AddArg(x) 8148 return true 8149 } 8150 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8151 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8152 // result: (MOVDreg x) 8153 for { 8154 x := v.Args[0] 8155 if x.Op != OpS390XMOVDNE { 8156 break 8157 } 8158 x_0 := x.Args[0] 8159 if x_0.Op != OpS390XMOVDconst { 8160 break 8161 } 8162 c := x_0.AuxInt 8163 x_1 := x.Args[1] 8164 if x_1.Op != OpS390XMOVDconst { 8165 break 8166 } 8167 d := x_1.AuxInt 8168 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8169 break 8170 } 8171 v.reset(OpS390XMOVDreg) 8172 v.AddArg(x) 8173 return true 8174 } 8175 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8176 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8177 // result: (MOVDreg x) 8178 for { 8179 x := v.Args[0] 8180 if x.Op != OpS390XMOVDGTnoinv { 8181 break 8182 } 8183 x_0 := x.Args[0] 8184 if x_0.Op != OpS390XMOVDconst { 8185 break 8186 } 8187 c := x_0.AuxInt 8188 x_1 := x.Args[1] 8189 if x_1.Op != OpS390XMOVDconst { 8190 break 8191 } 8192 d := x_1.AuxInt 8193 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8194 break 8195 } 8196 v.reset(OpS390XMOVDreg) 8197 v.AddArg(x) 8198 return true 8199 } 8200 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8201 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8202 // result: (MOVDreg x) 8203 for { 8204 x := v.Args[0] 8205 if x.Op != OpS390XMOVDGEnoinv { 8206 break 8207 } 8208 x_0 := x.Args[0] 8209 if x_0.Op != OpS390XMOVDconst { 8210 break 8211 } 8212 c := x_0.AuxInt 8213 x_1 := x.Args[1] 8214 if x_1.Op != OpS390XMOVDconst { 8215 break 8216 } 8217 d := x_1.AuxInt 8218 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8219 break 8220 } 8221 v.reset(OpS390XMOVDreg) 8222 v.AddArg(x) 8223 return true 8224 } 8225 // match: (MOVBZreg x:(MOVBZload _ _)) 8226 // cond: 8227 // result: (MOVDreg x) 8228 for { 8229 x := v.Args[0] 8230 if x.Op != OpS390XMOVBZload { 8231 break 8232 } 8233 v.reset(OpS390XMOVDreg) 8234 v.AddArg(x) 8235 return true 8236 } 8237 // match: (MOVBZreg x:(Arg <t>)) 8238 // cond: is8BitInt(t) && !isSigned(t) 8239 // result: (MOVDreg x) 8240 for { 8241 x := v.Args[0] 8242 if x.Op != OpArg { 8243 break 8244 } 8245 t := x.Type 8246 if !(is8BitInt(t) && !isSigned(t)) { 8247 break 8248 } 8249 v.reset(OpS390XMOVDreg) 8250 v.AddArg(x) 8251 return true 8252 } 8253 // match: (MOVBZreg x:(MOVBZreg _)) 8254 // cond: 8255 // result: (MOVDreg x) 8256 for { 8257 x := v.Args[0] 8258 if x.Op != OpS390XMOVBZreg { 8259 break 8260 } 8261 v.reset(OpS390XMOVDreg) 8262 v.AddArg(x) 8263 return true 8264 } 8265 // match: (MOVBZreg (MOVDconst [c])) 8266 // cond: 8267 // result: (MOVDconst [int64(uint8(c))]) 8268 for { 8269 v_0 := v.Args[0] 8270 if v_0.Op != OpS390XMOVDconst { 8271 break 8272 } 8273 c := v_0.AuxInt 8274 v.reset(OpS390XMOVDconst) 8275 v.AuxInt = int64(uint8(c)) 8276 return true 8277 } 8278 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8279 // cond: x.Uses == 1 && clobber(x) 8280 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8281 for { 8282 x := v.Args[0] 8283 if x.Op != OpS390XMOVBZload { 8284 break 8285 } 8286 off := x.AuxInt 8287 sym := x.Aux 8288 ptr := x.Args[0] 8289 mem := x.Args[1] 8290 if !(x.Uses == 1 && clobber(x)) { 8291 break 8292 } 8293 b = x.Block 8294 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, v.Type) 8295 v.reset(OpCopy) 8296 v.AddArg(v0) 8297 v0.AuxInt = off 8298 v0.Aux = sym 8299 v0.AddArg(ptr) 8300 v0.AddArg(mem) 8301 return true 8302 } 8303 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8304 // cond: x.Uses == 1 && clobber(x) 8305 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8306 for { 8307 x := v.Args[0] 8308 if x.Op != OpS390XMOVBZloadidx { 8309 break 8310 } 8311 off := x.AuxInt 8312 sym := x.Aux 8313 ptr := x.Args[0] 8314 idx := x.Args[1] 8315 mem := x.Args[2] 8316 if !(x.Uses == 1 && clobber(x)) { 8317 break 8318 } 8319 b = x.Block 8320 v0 := b.NewValue0(v.Line, OpS390XMOVBZloadidx, v.Type) 8321 v.reset(OpCopy) 8322 v.AddArg(v0) 8323 v0.AuxInt = off 8324 v0.Aux = sym 8325 v0.AddArg(ptr) 8326 v0.AddArg(idx) 8327 v0.AddArg(mem) 8328 return true 8329 } 8330 return false 8331 } 8332 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8333 b := v.Block 8334 _ = b 8335 // match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) 8336 // cond: is20Bit(off1+off2) 8337 // result: (MOVBload [off1+off2] {sym} ptr mem) 8338 for { 8339 off1 := v.AuxInt 8340 sym := v.Aux 8341 v_0 := v.Args[0] 8342 if v_0.Op != OpS390XADDconst { 8343 break 8344 } 8345 off2 := v_0.AuxInt 8346 ptr := v_0.Args[0] 8347 mem := v.Args[1] 8348 if !(is20Bit(off1 + off2)) { 8349 break 8350 } 8351 v.reset(OpS390XMOVBload) 8352 v.AuxInt = off1 + off2 8353 v.Aux = sym 8354 v.AddArg(ptr) 8355 v.AddArg(mem) 8356 return true 8357 } 8358 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8359 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8360 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8361 for { 8362 off1 := v.AuxInt 8363 sym1 := v.Aux 8364 v_0 := v.Args[0] 8365 if v_0.Op != OpS390XMOVDaddr { 8366 break 8367 } 8368 off2 := v_0.AuxInt 8369 sym2 := v_0.Aux 8370 base := v_0.Args[0] 8371 mem := v.Args[1] 8372 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8373 break 8374 } 8375 v.reset(OpS390XMOVBload) 8376 v.AuxInt = off1 + off2 8377 v.Aux = mergeSym(sym1, sym2) 8378 v.AddArg(base) 8379 v.AddArg(mem) 8380 return true 8381 } 8382 return false 8383 } 8384 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8385 b := v.Block 8386 _ = b 8387 // match: (MOVBreg x:(MOVBload _ _)) 8388 // cond: 8389 // result: (MOVDreg x) 8390 for { 8391 x := v.Args[0] 8392 if x.Op != OpS390XMOVBload { 8393 break 8394 } 8395 v.reset(OpS390XMOVDreg) 8396 v.AddArg(x) 8397 return true 8398 } 8399 // match: (MOVBreg x:(Arg <t>)) 8400 // cond: is8BitInt(t) && isSigned(t) 8401 // result: (MOVDreg x) 8402 for { 8403 x := v.Args[0] 8404 if x.Op != OpArg { 8405 break 8406 } 8407 t := x.Type 8408 if !(is8BitInt(t) && isSigned(t)) { 8409 break 8410 } 8411 v.reset(OpS390XMOVDreg) 8412 v.AddArg(x) 8413 return true 8414 } 8415 // match: (MOVBreg x:(MOVBreg _)) 8416 // cond: 8417 // result: (MOVDreg x) 8418 for { 8419 x := v.Args[0] 8420 if x.Op != OpS390XMOVBreg { 8421 break 8422 } 8423 v.reset(OpS390XMOVDreg) 8424 v.AddArg(x) 8425 return true 8426 } 8427 // match: (MOVBreg (MOVDconst [c])) 8428 // cond: 8429 // result: (MOVDconst [int64(int8(c))]) 8430 for { 8431 v_0 := v.Args[0] 8432 if v_0.Op != OpS390XMOVDconst { 8433 break 8434 } 8435 c := v_0.AuxInt 8436 v.reset(OpS390XMOVDconst) 8437 v.AuxInt = int64(int8(c)) 8438 return true 8439 } 8440 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8441 // cond: x.Uses == 1 && clobber(x) 8442 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8443 for { 8444 x := v.Args[0] 8445 if x.Op != OpS390XMOVBZload { 8446 break 8447 } 8448 off := x.AuxInt 8449 sym := x.Aux 8450 ptr := x.Args[0] 8451 mem := x.Args[1] 8452 if !(x.Uses == 1 && clobber(x)) { 8453 break 8454 } 8455 b = x.Block 8456 v0 := b.NewValue0(v.Line, OpS390XMOVBload, v.Type) 8457 v.reset(OpCopy) 8458 v.AddArg(v0) 8459 v0.AuxInt = off 8460 v0.Aux = sym 8461 v0.AddArg(ptr) 8462 v0.AddArg(mem) 8463 return true 8464 } 8465 return false 8466 } 8467 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8468 b := v.Block 8469 _ = b 8470 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8471 // cond: 8472 // result: (MOVBstore [off] {sym} ptr x mem) 8473 for { 8474 off := v.AuxInt 8475 sym := v.Aux 8476 ptr := v.Args[0] 8477 v_1 := v.Args[1] 8478 if v_1.Op != OpS390XMOVBreg { 8479 break 8480 } 8481 x := v_1.Args[0] 8482 mem := v.Args[2] 8483 v.reset(OpS390XMOVBstore) 8484 v.AuxInt = off 8485 v.Aux = sym 8486 v.AddArg(ptr) 8487 v.AddArg(x) 8488 v.AddArg(mem) 8489 return true 8490 } 8491 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8492 // cond: 8493 // result: (MOVBstore [off] {sym} ptr x mem) 8494 for { 8495 off := v.AuxInt 8496 sym := v.Aux 8497 ptr := v.Args[0] 8498 v_1 := v.Args[1] 8499 if v_1.Op != OpS390XMOVBZreg { 8500 break 8501 } 8502 x := v_1.Args[0] 8503 mem := v.Args[2] 8504 v.reset(OpS390XMOVBstore) 8505 v.AuxInt = off 8506 v.Aux = sym 8507 v.AddArg(ptr) 8508 v.AddArg(x) 8509 v.AddArg(mem) 8510 return true 8511 } 8512 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8513 // cond: is20Bit(off1+off2) 8514 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8515 for { 8516 off1 := v.AuxInt 8517 sym := v.Aux 8518 v_0 := v.Args[0] 8519 if v_0.Op != OpS390XADDconst { 8520 break 8521 } 8522 off2 := v_0.AuxInt 8523 ptr := v_0.Args[0] 8524 val := v.Args[1] 8525 mem := v.Args[2] 8526 if !(is20Bit(off1 + off2)) { 8527 break 8528 } 8529 v.reset(OpS390XMOVBstore) 8530 v.AuxInt = off1 + off2 8531 v.Aux = sym 8532 v.AddArg(ptr) 8533 v.AddArg(val) 8534 v.AddArg(mem) 8535 return true 8536 } 8537 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8538 // cond: validOff(off) && ptr.Op != OpSB 8539 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8540 for { 8541 off := v.AuxInt 8542 sym := v.Aux 8543 ptr := v.Args[0] 8544 v_1 := v.Args[1] 8545 if v_1.Op != OpS390XMOVDconst { 8546 break 8547 } 8548 c := v_1.AuxInt 8549 mem := v.Args[2] 8550 if !(validOff(off) && ptr.Op != OpSB) { 8551 break 8552 } 8553 v.reset(OpS390XMOVBstoreconst) 8554 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8555 v.Aux = sym 8556 v.AddArg(ptr) 8557 v.AddArg(mem) 8558 return true 8559 } 8560 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8561 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8562 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8563 for { 8564 off1 := v.AuxInt 8565 sym1 := v.Aux 8566 v_0 := v.Args[0] 8567 if v_0.Op != OpS390XMOVDaddr { 8568 break 8569 } 8570 off2 := v_0.AuxInt 8571 sym2 := v_0.Aux 8572 base := v_0.Args[0] 8573 val := v.Args[1] 8574 mem := v.Args[2] 8575 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8576 break 8577 } 8578 v.reset(OpS390XMOVBstore) 8579 v.AuxInt = off1 + off2 8580 v.Aux = mergeSym(sym1, sym2) 8581 v.AddArg(base) 8582 v.AddArg(val) 8583 v.AddArg(mem) 8584 return true 8585 } 8586 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8587 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8588 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8589 for { 8590 off1 := v.AuxInt 8591 sym1 := v.Aux 8592 v_0 := v.Args[0] 8593 if v_0.Op != OpS390XMOVDaddridx { 8594 break 8595 } 8596 off2 := v_0.AuxInt 8597 sym2 := v_0.Aux 8598 ptr := v_0.Args[0] 8599 idx := v_0.Args[1] 8600 val := v.Args[1] 8601 mem := v.Args[2] 8602 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8603 break 8604 } 8605 v.reset(OpS390XMOVBstoreidx) 8606 v.AuxInt = off1 + off2 8607 v.Aux = mergeSym(sym1, sym2) 8608 v.AddArg(ptr) 8609 v.AddArg(idx) 8610 v.AddArg(val) 8611 v.AddArg(mem) 8612 return true 8613 } 8614 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8615 // cond: ptr.Op != OpSB 8616 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8617 for { 8618 off := v.AuxInt 8619 sym := v.Aux 8620 v_0 := v.Args[0] 8621 if v_0.Op != OpS390XADD { 8622 break 8623 } 8624 ptr := v_0.Args[0] 8625 idx := v_0.Args[1] 8626 val := v.Args[1] 8627 mem := v.Args[2] 8628 if !(ptr.Op != OpSB) { 8629 break 8630 } 8631 v.reset(OpS390XMOVBstoreidx) 8632 v.AuxInt = off 8633 v.Aux = sym 8634 v.AddArg(ptr) 8635 v.AddArg(idx) 8636 v.AddArg(val) 8637 v.AddArg(mem) 8638 return true 8639 } 8640 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8641 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8642 // result: (MOVHstore [i-1] {s} p w mem) 8643 for { 8644 i := v.AuxInt 8645 s := v.Aux 8646 p := v.Args[0] 8647 w := v.Args[1] 8648 x := v.Args[2] 8649 if x.Op != OpS390XMOVBstore { 8650 break 8651 } 8652 if x.AuxInt != i-1 { 8653 break 8654 } 8655 if x.Aux != s { 8656 break 8657 } 8658 if p != x.Args[0] { 8659 break 8660 } 8661 x_1 := x.Args[1] 8662 if x_1.Op != OpS390XSRDconst { 8663 break 8664 } 8665 if x_1.AuxInt != 8 { 8666 break 8667 } 8668 if w != x_1.Args[0] { 8669 break 8670 } 8671 mem := x.Args[2] 8672 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8673 break 8674 } 8675 v.reset(OpS390XMOVHstore) 8676 v.AuxInt = i - 1 8677 v.Aux = s 8678 v.AddArg(p) 8679 v.AddArg(w) 8680 v.AddArg(mem) 8681 return true 8682 } 8683 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8684 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8685 // result: (MOVHstore [i-1] {s} p w0 mem) 8686 for { 8687 i := v.AuxInt 8688 s := v.Aux 8689 p := v.Args[0] 8690 w0 := v.Args[1] 8691 if w0.Op != OpS390XSRDconst { 8692 break 8693 } 8694 j := w0.AuxInt 8695 w := w0.Args[0] 8696 x := v.Args[2] 8697 if x.Op != OpS390XMOVBstore { 8698 break 8699 } 8700 if x.AuxInt != i-1 { 8701 break 8702 } 8703 if x.Aux != s { 8704 break 8705 } 8706 if p != x.Args[0] { 8707 break 8708 } 8709 x_1 := x.Args[1] 8710 if x_1.Op != OpS390XSRDconst { 8711 break 8712 } 8713 if x_1.AuxInt != j+8 { 8714 break 8715 } 8716 if w != x_1.Args[0] { 8717 break 8718 } 8719 mem := x.Args[2] 8720 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8721 break 8722 } 8723 v.reset(OpS390XMOVHstore) 8724 v.AuxInt = i - 1 8725 v.Aux = s 8726 v.AddArg(p) 8727 v.AddArg(w0) 8728 v.AddArg(mem) 8729 return true 8730 } 8731 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8732 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8733 // result: (MOVHstore [i-1] {s} p w mem) 8734 for { 8735 i := v.AuxInt 8736 s := v.Aux 8737 p := v.Args[0] 8738 w := v.Args[1] 8739 x := v.Args[2] 8740 if x.Op != OpS390XMOVBstore { 8741 break 8742 } 8743 if x.AuxInt != i-1 { 8744 break 8745 } 8746 if x.Aux != s { 8747 break 8748 } 8749 if p != x.Args[0] { 8750 break 8751 } 8752 x_1 := x.Args[1] 8753 if x_1.Op != OpS390XSRWconst { 8754 break 8755 } 8756 if x_1.AuxInt != 8 { 8757 break 8758 } 8759 if w != x_1.Args[0] { 8760 break 8761 } 8762 mem := x.Args[2] 8763 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8764 break 8765 } 8766 v.reset(OpS390XMOVHstore) 8767 v.AuxInt = i - 1 8768 v.Aux = s 8769 v.AddArg(p) 8770 v.AddArg(w) 8771 v.AddArg(mem) 8772 return true 8773 } 8774 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8775 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8776 // result: (MOVHstore [i-1] {s} p w0 mem) 8777 for { 8778 i := v.AuxInt 8779 s := v.Aux 8780 p := v.Args[0] 8781 w0 := v.Args[1] 8782 if w0.Op != OpS390XSRWconst { 8783 break 8784 } 8785 j := w0.AuxInt 8786 w := w0.Args[0] 8787 x := v.Args[2] 8788 if x.Op != OpS390XMOVBstore { 8789 break 8790 } 8791 if x.AuxInt != i-1 { 8792 break 8793 } 8794 if x.Aux != s { 8795 break 8796 } 8797 if p != x.Args[0] { 8798 break 8799 } 8800 x_1 := x.Args[1] 8801 if x_1.Op != OpS390XSRWconst { 8802 break 8803 } 8804 if x_1.AuxInt != j+8 { 8805 break 8806 } 8807 if w != x_1.Args[0] { 8808 break 8809 } 8810 mem := x.Args[2] 8811 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8812 break 8813 } 8814 v.reset(OpS390XMOVHstore) 8815 v.AuxInt = i - 1 8816 v.Aux = s 8817 v.AddArg(p) 8818 v.AddArg(w0) 8819 v.AddArg(mem) 8820 return true 8821 } 8822 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8823 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8824 // result: (MOVHBRstore [i-1] {s} p w mem) 8825 for { 8826 i := v.AuxInt 8827 s := v.Aux 8828 p := v.Args[0] 8829 v_1 := v.Args[1] 8830 if v_1.Op != OpS390XSRDconst { 8831 break 8832 } 8833 if v_1.AuxInt != 8 { 8834 break 8835 } 8836 w := v_1.Args[0] 8837 x := v.Args[2] 8838 if x.Op != OpS390XMOVBstore { 8839 break 8840 } 8841 if x.AuxInt != i-1 { 8842 break 8843 } 8844 if x.Aux != s { 8845 break 8846 } 8847 if p != x.Args[0] { 8848 break 8849 } 8850 if w != x.Args[1] { 8851 break 8852 } 8853 mem := x.Args[2] 8854 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8855 break 8856 } 8857 v.reset(OpS390XMOVHBRstore) 8858 v.AuxInt = i - 1 8859 v.Aux = s 8860 v.AddArg(p) 8861 v.AddArg(w) 8862 v.AddArg(mem) 8863 return true 8864 } 8865 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8866 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8867 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8868 for { 8869 i := v.AuxInt 8870 s := v.Aux 8871 p := v.Args[0] 8872 v_1 := v.Args[1] 8873 if v_1.Op != OpS390XSRDconst { 8874 break 8875 } 8876 j := v_1.AuxInt 8877 w := v_1.Args[0] 8878 x := v.Args[2] 8879 if x.Op != OpS390XMOVBstore { 8880 break 8881 } 8882 if x.AuxInt != i-1 { 8883 break 8884 } 8885 if x.Aux != s { 8886 break 8887 } 8888 if p != x.Args[0] { 8889 break 8890 } 8891 w0 := x.Args[1] 8892 if w0.Op != OpS390XSRDconst { 8893 break 8894 } 8895 if w0.AuxInt != j-8 { 8896 break 8897 } 8898 if w != w0.Args[0] { 8899 break 8900 } 8901 mem := x.Args[2] 8902 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8903 break 8904 } 8905 v.reset(OpS390XMOVHBRstore) 8906 v.AuxInt = i - 1 8907 v.Aux = s 8908 v.AddArg(p) 8909 v.AddArg(w0) 8910 v.AddArg(mem) 8911 return true 8912 } 8913 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8914 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8915 // result: (MOVHBRstore [i-1] {s} p w mem) 8916 for { 8917 i := v.AuxInt 8918 s := v.Aux 8919 p := v.Args[0] 8920 v_1 := v.Args[1] 8921 if v_1.Op != OpS390XSRWconst { 8922 break 8923 } 8924 if v_1.AuxInt != 8 { 8925 break 8926 } 8927 w := v_1.Args[0] 8928 x := v.Args[2] 8929 if x.Op != OpS390XMOVBstore { 8930 break 8931 } 8932 if x.AuxInt != i-1 { 8933 break 8934 } 8935 if x.Aux != s { 8936 break 8937 } 8938 if p != x.Args[0] { 8939 break 8940 } 8941 if w != x.Args[1] { 8942 break 8943 } 8944 mem := x.Args[2] 8945 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8946 break 8947 } 8948 v.reset(OpS390XMOVHBRstore) 8949 v.AuxInt = i - 1 8950 v.Aux = s 8951 v.AddArg(p) 8952 v.AddArg(w) 8953 v.AddArg(mem) 8954 return true 8955 } 8956 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 8957 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8958 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8959 for { 8960 i := v.AuxInt 8961 s := v.Aux 8962 p := v.Args[0] 8963 v_1 := v.Args[1] 8964 if v_1.Op != OpS390XSRWconst { 8965 break 8966 } 8967 j := v_1.AuxInt 8968 w := v_1.Args[0] 8969 x := v.Args[2] 8970 if x.Op != OpS390XMOVBstore { 8971 break 8972 } 8973 if x.AuxInt != i-1 { 8974 break 8975 } 8976 if x.Aux != s { 8977 break 8978 } 8979 if p != x.Args[0] { 8980 break 8981 } 8982 w0 := x.Args[1] 8983 if w0.Op != OpS390XSRWconst { 8984 break 8985 } 8986 if w0.AuxInt != j-8 { 8987 break 8988 } 8989 if w != w0.Args[0] { 8990 break 8991 } 8992 mem := x.Args[2] 8993 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8994 break 8995 } 8996 v.reset(OpS390XMOVHBRstore) 8997 v.AuxInt = i - 1 8998 v.Aux = s 8999 v.AddArg(p) 9000 v.AddArg(w0) 9001 v.AddArg(mem) 9002 return true 9003 } 9004 return false 9005 } 9006 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 9007 b := v.Block 9008 _ = b 9009 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 9010 // cond: ValAndOff(sc).canAdd(off) 9011 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 9012 for { 9013 sc := v.AuxInt 9014 s := v.Aux 9015 v_0 := v.Args[0] 9016 if v_0.Op != OpS390XADDconst { 9017 break 9018 } 9019 off := v_0.AuxInt 9020 ptr := v_0.Args[0] 9021 mem := v.Args[1] 9022 if !(ValAndOff(sc).canAdd(off)) { 9023 break 9024 } 9025 v.reset(OpS390XMOVBstoreconst) 9026 v.AuxInt = ValAndOff(sc).add(off) 9027 v.Aux = s 9028 v.AddArg(ptr) 9029 v.AddArg(mem) 9030 return true 9031 } 9032 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 9033 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 9034 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 9035 for { 9036 sc := v.AuxInt 9037 sym1 := v.Aux 9038 v_0 := v.Args[0] 9039 if v_0.Op != OpS390XMOVDaddr { 9040 break 9041 } 9042 off := v_0.AuxInt 9043 sym2 := v_0.Aux 9044 ptr := v_0.Args[0] 9045 mem := v.Args[1] 9046 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 9047 break 9048 } 9049 v.reset(OpS390XMOVBstoreconst) 9050 v.AuxInt = ValAndOff(sc).add(off) 9051 v.Aux = mergeSym(sym1, sym2) 9052 v.AddArg(ptr) 9053 v.AddArg(mem) 9054 return true 9055 } 9056 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 9057 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9058 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9059 for { 9060 c := v.AuxInt 9061 s := v.Aux 9062 p := v.Args[0] 9063 x := v.Args[1] 9064 if x.Op != OpS390XMOVBstoreconst { 9065 break 9066 } 9067 a := x.AuxInt 9068 if x.Aux != s { 9069 break 9070 } 9071 if p != x.Args[0] { 9072 break 9073 } 9074 mem := x.Args[1] 9075 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9076 break 9077 } 9078 v.reset(OpS390XMOVHstoreconst) 9079 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9080 v.Aux = s 9081 v.AddArg(p) 9082 v.AddArg(mem) 9083 return true 9084 } 9085 return false 9086 } 9087 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9088 b := v.Block 9089 _ = b 9090 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9091 // cond: 9092 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9093 for { 9094 c := v.AuxInt 9095 sym := v.Aux 9096 v_0 := v.Args[0] 9097 if v_0.Op != OpS390XADDconst { 9098 break 9099 } 9100 d := v_0.AuxInt 9101 ptr := v_0.Args[0] 9102 idx := v.Args[1] 9103 val := v.Args[2] 9104 mem := v.Args[3] 9105 v.reset(OpS390XMOVBstoreidx) 9106 v.AuxInt = c + d 9107 v.Aux = sym 9108 v.AddArg(ptr) 9109 v.AddArg(idx) 9110 v.AddArg(val) 9111 v.AddArg(mem) 9112 return true 9113 } 9114 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9115 // cond: 9116 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9117 for { 9118 c := v.AuxInt 9119 sym := v.Aux 9120 ptr := v.Args[0] 9121 v_1 := v.Args[1] 9122 if v_1.Op != OpS390XADDconst { 9123 break 9124 } 9125 d := v_1.AuxInt 9126 idx := v_1.Args[0] 9127 val := v.Args[2] 9128 mem := v.Args[3] 9129 v.reset(OpS390XMOVBstoreidx) 9130 v.AuxInt = c + d 9131 v.Aux = sym 9132 v.AddArg(ptr) 9133 v.AddArg(idx) 9134 v.AddArg(val) 9135 v.AddArg(mem) 9136 return true 9137 } 9138 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9139 // cond: x.Uses == 1 && clobber(x) 9140 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9141 for { 9142 i := v.AuxInt 9143 s := v.Aux 9144 p := v.Args[0] 9145 idx := v.Args[1] 9146 w := v.Args[2] 9147 x := v.Args[3] 9148 if x.Op != OpS390XMOVBstoreidx { 9149 break 9150 } 9151 if x.AuxInt != i-1 { 9152 break 9153 } 9154 if x.Aux != s { 9155 break 9156 } 9157 if p != x.Args[0] { 9158 break 9159 } 9160 if idx != x.Args[1] { 9161 break 9162 } 9163 x_2 := x.Args[2] 9164 if x_2.Op != OpS390XSRDconst { 9165 break 9166 } 9167 if x_2.AuxInt != 8 { 9168 break 9169 } 9170 if w != x_2.Args[0] { 9171 break 9172 } 9173 mem := x.Args[3] 9174 if !(x.Uses == 1 && clobber(x)) { 9175 break 9176 } 9177 v.reset(OpS390XMOVHstoreidx) 9178 v.AuxInt = i - 1 9179 v.Aux = s 9180 v.AddArg(p) 9181 v.AddArg(idx) 9182 v.AddArg(w) 9183 v.AddArg(mem) 9184 return true 9185 } 9186 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9187 // cond: x.Uses == 1 && clobber(x) 9188 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9189 for { 9190 i := v.AuxInt 9191 s := v.Aux 9192 p := v.Args[0] 9193 idx := v.Args[1] 9194 w0 := v.Args[2] 9195 if w0.Op != OpS390XSRDconst { 9196 break 9197 } 9198 j := w0.AuxInt 9199 w := w0.Args[0] 9200 x := v.Args[3] 9201 if x.Op != OpS390XMOVBstoreidx { 9202 break 9203 } 9204 if x.AuxInt != i-1 { 9205 break 9206 } 9207 if x.Aux != s { 9208 break 9209 } 9210 if p != x.Args[0] { 9211 break 9212 } 9213 if idx != x.Args[1] { 9214 break 9215 } 9216 x_2 := x.Args[2] 9217 if x_2.Op != OpS390XSRDconst { 9218 break 9219 } 9220 if x_2.AuxInt != j+8 { 9221 break 9222 } 9223 if w != x_2.Args[0] { 9224 break 9225 } 9226 mem := x.Args[3] 9227 if !(x.Uses == 1 && clobber(x)) { 9228 break 9229 } 9230 v.reset(OpS390XMOVHstoreidx) 9231 v.AuxInt = i - 1 9232 v.Aux = s 9233 v.AddArg(p) 9234 v.AddArg(idx) 9235 v.AddArg(w0) 9236 v.AddArg(mem) 9237 return true 9238 } 9239 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9240 // cond: x.Uses == 1 && clobber(x) 9241 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9242 for { 9243 i := v.AuxInt 9244 s := v.Aux 9245 p := v.Args[0] 9246 idx := v.Args[1] 9247 w := v.Args[2] 9248 x := v.Args[3] 9249 if x.Op != OpS390XMOVBstoreidx { 9250 break 9251 } 9252 if x.AuxInt != i-1 { 9253 break 9254 } 9255 if x.Aux != s { 9256 break 9257 } 9258 if p != x.Args[0] { 9259 break 9260 } 9261 if idx != x.Args[1] { 9262 break 9263 } 9264 x_2 := x.Args[2] 9265 if x_2.Op != OpS390XSRWconst { 9266 break 9267 } 9268 if x_2.AuxInt != 8 { 9269 break 9270 } 9271 if w != x_2.Args[0] { 9272 break 9273 } 9274 mem := x.Args[3] 9275 if !(x.Uses == 1 && clobber(x)) { 9276 break 9277 } 9278 v.reset(OpS390XMOVHstoreidx) 9279 v.AuxInt = i - 1 9280 v.Aux = s 9281 v.AddArg(p) 9282 v.AddArg(idx) 9283 v.AddArg(w) 9284 v.AddArg(mem) 9285 return true 9286 } 9287 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9288 // cond: x.Uses == 1 && clobber(x) 9289 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9290 for { 9291 i := v.AuxInt 9292 s := v.Aux 9293 p := v.Args[0] 9294 idx := v.Args[1] 9295 w0 := v.Args[2] 9296 if w0.Op != OpS390XSRWconst { 9297 break 9298 } 9299 j := w0.AuxInt 9300 w := w0.Args[0] 9301 x := v.Args[3] 9302 if x.Op != OpS390XMOVBstoreidx { 9303 break 9304 } 9305 if x.AuxInt != i-1 { 9306 break 9307 } 9308 if x.Aux != s { 9309 break 9310 } 9311 if p != x.Args[0] { 9312 break 9313 } 9314 if idx != x.Args[1] { 9315 break 9316 } 9317 x_2 := x.Args[2] 9318 if x_2.Op != OpS390XSRWconst { 9319 break 9320 } 9321 if x_2.AuxInt != j+8 { 9322 break 9323 } 9324 if w != x_2.Args[0] { 9325 break 9326 } 9327 mem := x.Args[3] 9328 if !(x.Uses == 1 && clobber(x)) { 9329 break 9330 } 9331 v.reset(OpS390XMOVHstoreidx) 9332 v.AuxInt = i - 1 9333 v.Aux = s 9334 v.AddArg(p) 9335 v.AddArg(idx) 9336 v.AddArg(w0) 9337 v.AddArg(mem) 9338 return true 9339 } 9340 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9341 // cond: x.Uses == 1 && clobber(x) 9342 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9343 for { 9344 i := v.AuxInt 9345 s := v.Aux 9346 p := v.Args[0] 9347 idx := v.Args[1] 9348 v_2 := v.Args[2] 9349 if v_2.Op != OpS390XSRDconst { 9350 break 9351 } 9352 if v_2.AuxInt != 8 { 9353 break 9354 } 9355 w := v_2.Args[0] 9356 x := v.Args[3] 9357 if x.Op != OpS390XMOVBstoreidx { 9358 break 9359 } 9360 if x.AuxInt != i-1 { 9361 break 9362 } 9363 if x.Aux != s { 9364 break 9365 } 9366 if p != x.Args[0] { 9367 break 9368 } 9369 if idx != x.Args[1] { 9370 break 9371 } 9372 if w != x.Args[2] { 9373 break 9374 } 9375 mem := x.Args[3] 9376 if !(x.Uses == 1 && clobber(x)) { 9377 break 9378 } 9379 v.reset(OpS390XMOVHBRstoreidx) 9380 v.AuxInt = i - 1 9381 v.Aux = s 9382 v.AddArg(p) 9383 v.AddArg(idx) 9384 v.AddArg(w) 9385 v.AddArg(mem) 9386 return true 9387 } 9388 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9389 // cond: x.Uses == 1 && clobber(x) 9390 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9391 for { 9392 i := v.AuxInt 9393 s := v.Aux 9394 p := v.Args[0] 9395 idx := v.Args[1] 9396 v_2 := v.Args[2] 9397 if v_2.Op != OpS390XSRDconst { 9398 break 9399 } 9400 j := v_2.AuxInt 9401 w := v_2.Args[0] 9402 x := v.Args[3] 9403 if x.Op != OpS390XMOVBstoreidx { 9404 break 9405 } 9406 if x.AuxInt != i-1 { 9407 break 9408 } 9409 if x.Aux != s { 9410 break 9411 } 9412 if p != x.Args[0] { 9413 break 9414 } 9415 if idx != x.Args[1] { 9416 break 9417 } 9418 w0 := x.Args[2] 9419 if w0.Op != OpS390XSRDconst { 9420 break 9421 } 9422 if w0.AuxInt != j-8 { 9423 break 9424 } 9425 if w != w0.Args[0] { 9426 break 9427 } 9428 mem := x.Args[3] 9429 if !(x.Uses == 1 && clobber(x)) { 9430 break 9431 } 9432 v.reset(OpS390XMOVHBRstoreidx) 9433 v.AuxInt = i - 1 9434 v.Aux = s 9435 v.AddArg(p) 9436 v.AddArg(idx) 9437 v.AddArg(w0) 9438 v.AddArg(mem) 9439 return true 9440 } 9441 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9442 // cond: x.Uses == 1 && clobber(x) 9443 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9444 for { 9445 i := v.AuxInt 9446 s := v.Aux 9447 p := v.Args[0] 9448 idx := v.Args[1] 9449 v_2 := v.Args[2] 9450 if v_2.Op != OpS390XSRWconst { 9451 break 9452 } 9453 if v_2.AuxInt != 8 { 9454 break 9455 } 9456 w := v_2.Args[0] 9457 x := v.Args[3] 9458 if x.Op != OpS390XMOVBstoreidx { 9459 break 9460 } 9461 if x.AuxInt != i-1 { 9462 break 9463 } 9464 if x.Aux != s { 9465 break 9466 } 9467 if p != x.Args[0] { 9468 break 9469 } 9470 if idx != x.Args[1] { 9471 break 9472 } 9473 if w != x.Args[2] { 9474 break 9475 } 9476 mem := x.Args[3] 9477 if !(x.Uses == 1 && clobber(x)) { 9478 break 9479 } 9480 v.reset(OpS390XMOVHBRstoreidx) 9481 v.AuxInt = i - 1 9482 v.Aux = s 9483 v.AddArg(p) 9484 v.AddArg(idx) 9485 v.AddArg(w) 9486 v.AddArg(mem) 9487 return true 9488 } 9489 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9490 // cond: x.Uses == 1 && clobber(x) 9491 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9492 for { 9493 i := v.AuxInt 9494 s := v.Aux 9495 p := v.Args[0] 9496 idx := v.Args[1] 9497 v_2 := v.Args[2] 9498 if v_2.Op != OpS390XSRWconst { 9499 break 9500 } 9501 j := v_2.AuxInt 9502 w := v_2.Args[0] 9503 x := v.Args[3] 9504 if x.Op != OpS390XMOVBstoreidx { 9505 break 9506 } 9507 if x.AuxInt != i-1 { 9508 break 9509 } 9510 if x.Aux != s { 9511 break 9512 } 9513 if p != x.Args[0] { 9514 break 9515 } 9516 if idx != x.Args[1] { 9517 break 9518 } 9519 w0 := x.Args[2] 9520 if w0.Op != OpS390XSRWconst { 9521 break 9522 } 9523 if w0.AuxInt != j-8 { 9524 break 9525 } 9526 if w != w0.Args[0] { 9527 break 9528 } 9529 mem := x.Args[3] 9530 if !(x.Uses == 1 && clobber(x)) { 9531 break 9532 } 9533 v.reset(OpS390XMOVHBRstoreidx) 9534 v.AuxInt = i - 1 9535 v.Aux = s 9536 v.AddArg(p) 9537 v.AddArg(idx) 9538 v.AddArg(w0) 9539 v.AddArg(mem) 9540 return true 9541 } 9542 return false 9543 } 9544 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9545 b := v.Block 9546 _ = b 9547 // match: (MOVDEQ x y (InvertFlags cmp)) 9548 // cond: 9549 // result: (MOVDEQ x y cmp) 9550 for { 9551 x := v.Args[0] 9552 y := v.Args[1] 9553 v_2 := v.Args[2] 9554 if v_2.Op != OpS390XInvertFlags { 9555 break 9556 } 9557 cmp := v_2.Args[0] 9558 v.reset(OpS390XMOVDEQ) 9559 v.AddArg(x) 9560 v.AddArg(y) 9561 v.AddArg(cmp) 9562 return true 9563 } 9564 // match: (MOVDEQ _ x (FlagEQ)) 9565 // cond: 9566 // result: x 9567 for { 9568 x := v.Args[1] 9569 v_2 := v.Args[2] 9570 if v_2.Op != OpS390XFlagEQ { 9571 break 9572 } 9573 v.reset(OpCopy) 9574 v.Type = x.Type 9575 v.AddArg(x) 9576 return true 9577 } 9578 // match: (MOVDEQ y _ (FlagLT)) 9579 // cond: 9580 // result: y 9581 for { 9582 y := v.Args[0] 9583 v_2 := v.Args[2] 9584 if v_2.Op != OpS390XFlagLT { 9585 break 9586 } 9587 v.reset(OpCopy) 9588 v.Type = y.Type 9589 v.AddArg(y) 9590 return true 9591 } 9592 // match: (MOVDEQ y _ (FlagGT)) 9593 // cond: 9594 // result: y 9595 for { 9596 y := v.Args[0] 9597 v_2 := v.Args[2] 9598 if v_2.Op != OpS390XFlagGT { 9599 break 9600 } 9601 v.reset(OpCopy) 9602 v.Type = y.Type 9603 v.AddArg(y) 9604 return true 9605 } 9606 return false 9607 } 9608 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9609 b := v.Block 9610 _ = b 9611 // match: (MOVDGE x y (InvertFlags cmp)) 9612 // cond: 9613 // result: (MOVDLE x y cmp) 9614 for { 9615 x := v.Args[0] 9616 y := v.Args[1] 9617 v_2 := v.Args[2] 9618 if v_2.Op != OpS390XInvertFlags { 9619 break 9620 } 9621 cmp := v_2.Args[0] 9622 v.reset(OpS390XMOVDLE) 9623 v.AddArg(x) 9624 v.AddArg(y) 9625 v.AddArg(cmp) 9626 return true 9627 } 9628 // match: (MOVDGE _ x (FlagEQ)) 9629 // cond: 9630 // result: x 9631 for { 9632 x := v.Args[1] 9633 v_2 := v.Args[2] 9634 if v_2.Op != OpS390XFlagEQ { 9635 break 9636 } 9637 v.reset(OpCopy) 9638 v.Type = x.Type 9639 v.AddArg(x) 9640 return true 9641 } 9642 // match: (MOVDGE y _ (FlagLT)) 9643 // cond: 9644 // result: y 9645 for { 9646 y := v.Args[0] 9647 v_2 := v.Args[2] 9648 if v_2.Op != OpS390XFlagLT { 9649 break 9650 } 9651 v.reset(OpCopy) 9652 v.Type = y.Type 9653 v.AddArg(y) 9654 return true 9655 } 9656 // match: (MOVDGE _ x (FlagGT)) 9657 // cond: 9658 // result: x 9659 for { 9660 x := v.Args[1] 9661 v_2 := v.Args[2] 9662 if v_2.Op != OpS390XFlagGT { 9663 break 9664 } 9665 v.reset(OpCopy) 9666 v.Type = x.Type 9667 v.AddArg(x) 9668 return true 9669 } 9670 return false 9671 } 9672 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9673 b := v.Block 9674 _ = b 9675 // match: (MOVDGT x y (InvertFlags cmp)) 9676 // cond: 9677 // result: (MOVDLT x y cmp) 9678 for { 9679 x := v.Args[0] 9680 y := v.Args[1] 9681 v_2 := v.Args[2] 9682 if v_2.Op != OpS390XInvertFlags { 9683 break 9684 } 9685 cmp := v_2.Args[0] 9686 v.reset(OpS390XMOVDLT) 9687 v.AddArg(x) 9688 v.AddArg(y) 9689 v.AddArg(cmp) 9690 return true 9691 } 9692 // match: (MOVDGT y _ (FlagEQ)) 9693 // cond: 9694 // result: y 9695 for { 9696 y := v.Args[0] 9697 v_2 := v.Args[2] 9698 if v_2.Op != OpS390XFlagEQ { 9699 break 9700 } 9701 v.reset(OpCopy) 9702 v.Type = y.Type 9703 v.AddArg(y) 9704 return true 9705 } 9706 // match: (MOVDGT y _ (FlagLT)) 9707 // cond: 9708 // result: y 9709 for { 9710 y := v.Args[0] 9711 v_2 := v.Args[2] 9712 if v_2.Op != OpS390XFlagLT { 9713 break 9714 } 9715 v.reset(OpCopy) 9716 v.Type = y.Type 9717 v.AddArg(y) 9718 return true 9719 } 9720 // match: (MOVDGT _ x (FlagGT)) 9721 // cond: 9722 // result: x 9723 for { 9724 x := v.Args[1] 9725 v_2 := v.Args[2] 9726 if v_2.Op != OpS390XFlagGT { 9727 break 9728 } 9729 v.reset(OpCopy) 9730 v.Type = x.Type 9731 v.AddArg(x) 9732 return true 9733 } 9734 return false 9735 } 9736 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9737 b := v.Block 9738 _ = b 9739 // match: (MOVDLE x y (InvertFlags cmp)) 9740 // cond: 9741 // result: (MOVDGE x y cmp) 9742 for { 9743 x := v.Args[0] 9744 y := v.Args[1] 9745 v_2 := v.Args[2] 9746 if v_2.Op != OpS390XInvertFlags { 9747 break 9748 } 9749 cmp := v_2.Args[0] 9750 v.reset(OpS390XMOVDGE) 9751 v.AddArg(x) 9752 v.AddArg(y) 9753 v.AddArg(cmp) 9754 return true 9755 } 9756 // match: (MOVDLE _ x (FlagEQ)) 9757 // cond: 9758 // result: x 9759 for { 9760 x := v.Args[1] 9761 v_2 := v.Args[2] 9762 if v_2.Op != OpS390XFlagEQ { 9763 break 9764 } 9765 v.reset(OpCopy) 9766 v.Type = x.Type 9767 v.AddArg(x) 9768 return true 9769 } 9770 // match: (MOVDLE _ x (FlagLT)) 9771 // cond: 9772 // result: x 9773 for { 9774 x := v.Args[1] 9775 v_2 := v.Args[2] 9776 if v_2.Op != OpS390XFlagLT { 9777 break 9778 } 9779 v.reset(OpCopy) 9780 v.Type = x.Type 9781 v.AddArg(x) 9782 return true 9783 } 9784 // match: (MOVDLE y _ (FlagGT)) 9785 // cond: 9786 // result: y 9787 for { 9788 y := v.Args[0] 9789 v_2 := v.Args[2] 9790 if v_2.Op != OpS390XFlagGT { 9791 break 9792 } 9793 v.reset(OpCopy) 9794 v.Type = y.Type 9795 v.AddArg(y) 9796 return true 9797 } 9798 return false 9799 } 9800 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9801 b := v.Block 9802 _ = b 9803 // match: (MOVDLT x y (InvertFlags cmp)) 9804 // cond: 9805 // result: (MOVDGT x y cmp) 9806 for { 9807 x := v.Args[0] 9808 y := v.Args[1] 9809 v_2 := v.Args[2] 9810 if v_2.Op != OpS390XInvertFlags { 9811 break 9812 } 9813 cmp := v_2.Args[0] 9814 v.reset(OpS390XMOVDGT) 9815 v.AddArg(x) 9816 v.AddArg(y) 9817 v.AddArg(cmp) 9818 return true 9819 } 9820 // match: (MOVDLT y _ (FlagEQ)) 9821 // cond: 9822 // result: y 9823 for { 9824 y := v.Args[0] 9825 v_2 := v.Args[2] 9826 if v_2.Op != OpS390XFlagEQ { 9827 break 9828 } 9829 v.reset(OpCopy) 9830 v.Type = y.Type 9831 v.AddArg(y) 9832 return true 9833 } 9834 // match: (MOVDLT _ x (FlagLT)) 9835 // cond: 9836 // result: x 9837 for { 9838 x := v.Args[1] 9839 v_2 := v.Args[2] 9840 if v_2.Op != OpS390XFlagLT { 9841 break 9842 } 9843 v.reset(OpCopy) 9844 v.Type = x.Type 9845 v.AddArg(x) 9846 return true 9847 } 9848 // match: (MOVDLT y _ (FlagGT)) 9849 // cond: 9850 // result: y 9851 for { 9852 y := v.Args[0] 9853 v_2 := v.Args[2] 9854 if v_2.Op != OpS390XFlagGT { 9855 break 9856 } 9857 v.reset(OpCopy) 9858 v.Type = y.Type 9859 v.AddArg(y) 9860 return true 9861 } 9862 return false 9863 } 9864 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9865 b := v.Block 9866 _ = b 9867 // match: (MOVDNE x y (InvertFlags cmp)) 9868 // cond: 9869 // result: (MOVDNE x y cmp) 9870 for { 9871 x := v.Args[0] 9872 y := v.Args[1] 9873 v_2 := v.Args[2] 9874 if v_2.Op != OpS390XInvertFlags { 9875 break 9876 } 9877 cmp := v_2.Args[0] 9878 v.reset(OpS390XMOVDNE) 9879 v.AddArg(x) 9880 v.AddArg(y) 9881 v.AddArg(cmp) 9882 return true 9883 } 9884 // match: (MOVDNE y _ (FlagEQ)) 9885 // cond: 9886 // result: y 9887 for { 9888 y := v.Args[0] 9889 v_2 := v.Args[2] 9890 if v_2.Op != OpS390XFlagEQ { 9891 break 9892 } 9893 v.reset(OpCopy) 9894 v.Type = y.Type 9895 v.AddArg(y) 9896 return true 9897 } 9898 // match: (MOVDNE _ x (FlagLT)) 9899 // cond: 9900 // result: x 9901 for { 9902 x := v.Args[1] 9903 v_2 := v.Args[2] 9904 if v_2.Op != OpS390XFlagLT { 9905 break 9906 } 9907 v.reset(OpCopy) 9908 v.Type = x.Type 9909 v.AddArg(x) 9910 return true 9911 } 9912 // match: (MOVDNE _ x (FlagGT)) 9913 // cond: 9914 // result: x 9915 for { 9916 x := v.Args[1] 9917 v_2 := v.Args[2] 9918 if v_2.Op != OpS390XFlagGT { 9919 break 9920 } 9921 v.reset(OpCopy) 9922 v.Type = x.Type 9923 v.AddArg(x) 9924 return true 9925 } 9926 return false 9927 } 9928 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9929 b := v.Block 9930 _ = b 9931 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9932 // cond: is20Bit(c+d) && x.Op != OpSB 9933 // result: (MOVDaddridx [c+d] {s} x y) 9934 for { 9935 c := v.AuxInt 9936 s := v.Aux 9937 v_0 := v.Args[0] 9938 if v_0.Op != OpS390XADDconst { 9939 break 9940 } 9941 d := v_0.AuxInt 9942 x := v_0.Args[0] 9943 y := v.Args[1] 9944 if !(is20Bit(c+d) && x.Op != OpSB) { 9945 break 9946 } 9947 v.reset(OpS390XMOVDaddridx) 9948 v.AuxInt = c + d 9949 v.Aux = s 9950 v.AddArg(x) 9951 v.AddArg(y) 9952 return true 9953 } 9954 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 9955 // cond: is20Bit(c+d) && y.Op != OpSB 9956 // result: (MOVDaddridx [c+d] {s} x y) 9957 for { 9958 c := v.AuxInt 9959 s := v.Aux 9960 x := v.Args[0] 9961 v_1 := v.Args[1] 9962 if v_1.Op != OpS390XADDconst { 9963 break 9964 } 9965 d := v_1.AuxInt 9966 y := v_1.Args[0] 9967 if !(is20Bit(c+d) && y.Op != OpSB) { 9968 break 9969 } 9970 v.reset(OpS390XMOVDaddridx) 9971 v.AuxInt = c + d 9972 v.Aux = s 9973 v.AddArg(x) 9974 v.AddArg(y) 9975 return true 9976 } 9977 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 9978 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 9979 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 9980 for { 9981 off1 := v.AuxInt 9982 sym1 := v.Aux 9983 v_0 := v.Args[0] 9984 if v_0.Op != OpS390XMOVDaddr { 9985 break 9986 } 9987 off2 := v_0.AuxInt 9988 sym2 := v_0.Aux 9989 x := v_0.Args[0] 9990 y := v.Args[1] 9991 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 9992 break 9993 } 9994 v.reset(OpS390XMOVDaddridx) 9995 v.AuxInt = off1 + off2 9996 v.Aux = mergeSym(sym1, sym2) 9997 v.AddArg(x) 9998 v.AddArg(y) 9999 return true 10000 } 10001 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 10002 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 10003 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10004 for { 10005 off1 := v.AuxInt 10006 sym1 := v.Aux 10007 x := v.Args[0] 10008 v_1 := v.Args[1] 10009 if v_1.Op != OpS390XMOVDaddr { 10010 break 10011 } 10012 off2 := v_1.AuxInt 10013 sym2 := v_1.Aux 10014 y := v_1.Args[0] 10015 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 10016 break 10017 } 10018 v.reset(OpS390XMOVDaddridx) 10019 v.AuxInt = off1 + off2 10020 v.Aux = mergeSym(sym1, sym2) 10021 v.AddArg(x) 10022 v.AddArg(y) 10023 return true 10024 } 10025 return false 10026 } 10027 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 10028 b := v.Block 10029 _ = b 10030 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 10031 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10032 // result: (MOVDreg x) 10033 for { 10034 off := v.AuxInt 10035 sym := v.Aux 10036 ptr := v.Args[0] 10037 v_1 := v.Args[1] 10038 if v_1.Op != OpS390XMOVDstore { 10039 break 10040 } 10041 off2 := v_1.AuxInt 10042 sym2 := v_1.Aux 10043 ptr2 := v_1.Args[0] 10044 x := v_1.Args[1] 10045 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10046 break 10047 } 10048 v.reset(OpS390XMOVDreg) 10049 v.AddArg(x) 10050 return true 10051 } 10052 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10053 // cond: is20Bit(off1+off2) 10054 // result: (MOVDload [off1+off2] {sym} ptr mem) 10055 for { 10056 off1 := v.AuxInt 10057 sym := v.Aux 10058 v_0 := v.Args[0] 10059 if v_0.Op != OpS390XADDconst { 10060 break 10061 } 10062 off2 := v_0.AuxInt 10063 ptr := v_0.Args[0] 10064 mem := v.Args[1] 10065 if !(is20Bit(off1 + off2)) { 10066 break 10067 } 10068 v.reset(OpS390XMOVDload) 10069 v.AuxInt = off1 + off2 10070 v.Aux = sym 10071 v.AddArg(ptr) 10072 v.AddArg(mem) 10073 return true 10074 } 10075 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10076 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10077 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10078 for { 10079 off1 := v.AuxInt 10080 sym1 := v.Aux 10081 v_0 := v.Args[0] 10082 if v_0.Op != OpS390XMOVDaddr { 10083 break 10084 } 10085 off2 := v_0.AuxInt 10086 sym2 := v_0.Aux 10087 base := v_0.Args[0] 10088 mem := v.Args[1] 10089 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10090 break 10091 } 10092 v.reset(OpS390XMOVDload) 10093 v.AuxInt = off1 + off2 10094 v.Aux = mergeSym(sym1, sym2) 10095 v.AddArg(base) 10096 v.AddArg(mem) 10097 return true 10098 } 10099 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10100 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10101 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10102 for { 10103 off1 := v.AuxInt 10104 sym1 := v.Aux 10105 v_0 := v.Args[0] 10106 if v_0.Op != OpS390XMOVDaddridx { 10107 break 10108 } 10109 off2 := v_0.AuxInt 10110 sym2 := v_0.Aux 10111 ptr := v_0.Args[0] 10112 idx := v_0.Args[1] 10113 mem := v.Args[1] 10114 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10115 break 10116 } 10117 v.reset(OpS390XMOVDloadidx) 10118 v.AuxInt = off1 + off2 10119 v.Aux = mergeSym(sym1, sym2) 10120 v.AddArg(ptr) 10121 v.AddArg(idx) 10122 v.AddArg(mem) 10123 return true 10124 } 10125 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10126 // cond: ptr.Op != OpSB 10127 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10128 for { 10129 off := v.AuxInt 10130 sym := v.Aux 10131 v_0 := v.Args[0] 10132 if v_0.Op != OpS390XADD { 10133 break 10134 } 10135 ptr := v_0.Args[0] 10136 idx := v_0.Args[1] 10137 mem := v.Args[1] 10138 if !(ptr.Op != OpSB) { 10139 break 10140 } 10141 v.reset(OpS390XMOVDloadidx) 10142 v.AuxInt = off 10143 v.Aux = sym 10144 v.AddArg(ptr) 10145 v.AddArg(idx) 10146 v.AddArg(mem) 10147 return true 10148 } 10149 return false 10150 } 10151 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10152 b := v.Block 10153 _ = b 10154 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10155 // cond: 10156 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10157 for { 10158 c := v.AuxInt 10159 sym := v.Aux 10160 v_0 := v.Args[0] 10161 if v_0.Op != OpS390XADDconst { 10162 break 10163 } 10164 d := v_0.AuxInt 10165 ptr := v_0.Args[0] 10166 idx := v.Args[1] 10167 mem := v.Args[2] 10168 v.reset(OpS390XMOVDloadidx) 10169 v.AuxInt = c + d 10170 v.Aux = sym 10171 v.AddArg(ptr) 10172 v.AddArg(idx) 10173 v.AddArg(mem) 10174 return true 10175 } 10176 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10177 // cond: 10178 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10179 for { 10180 c := v.AuxInt 10181 sym := v.Aux 10182 ptr := v.Args[0] 10183 v_1 := v.Args[1] 10184 if v_1.Op != OpS390XADDconst { 10185 break 10186 } 10187 d := v_1.AuxInt 10188 idx := v_1.Args[0] 10189 mem := v.Args[2] 10190 v.reset(OpS390XMOVDloadidx) 10191 v.AuxInt = c + d 10192 v.Aux = sym 10193 v.AddArg(ptr) 10194 v.AddArg(idx) 10195 v.AddArg(mem) 10196 return true 10197 } 10198 return false 10199 } 10200 func rewriteValueS390X_OpS390XMOVDnop(v *Value, config *Config) bool { 10201 b := v.Block 10202 _ = b 10203 // match: (MOVDnop <t> x) 10204 // cond: t.Compare(x.Type) == CMPeq 10205 // result: x 10206 for { 10207 t := v.Type 10208 x := v.Args[0] 10209 if !(t.Compare(x.Type) == CMPeq) { 10210 break 10211 } 10212 v.reset(OpCopy) 10213 v.Type = x.Type 10214 v.AddArg(x) 10215 return true 10216 } 10217 // match: (MOVDnop (MOVDconst [c])) 10218 // cond: 10219 // result: (MOVDconst [c]) 10220 for { 10221 v_0 := v.Args[0] 10222 if v_0.Op != OpS390XMOVDconst { 10223 break 10224 } 10225 c := v_0.AuxInt 10226 v.reset(OpS390XMOVDconst) 10227 v.AuxInt = c 10228 return true 10229 } 10230 return false 10231 } 10232 func rewriteValueS390X_OpS390XMOVDreg(v *Value, config *Config) bool { 10233 b := v.Block 10234 _ = b 10235 // match: (MOVDreg <t> x) 10236 // cond: t.Compare(x.Type) == CMPeq 10237 // result: x 10238 for { 10239 t := v.Type 10240 x := v.Args[0] 10241 if !(t.Compare(x.Type) == CMPeq) { 10242 break 10243 } 10244 v.reset(OpCopy) 10245 v.Type = x.Type 10246 v.AddArg(x) 10247 return true 10248 } 10249 // match: (MOVDreg (MOVDconst [c])) 10250 // cond: 10251 // result: (MOVDconst [c]) 10252 for { 10253 v_0 := v.Args[0] 10254 if v_0.Op != OpS390XMOVDconst { 10255 break 10256 } 10257 c := v_0.AuxInt 10258 v.reset(OpS390XMOVDconst) 10259 v.AuxInt = c 10260 return true 10261 } 10262 // match: (MOVDreg x) 10263 // cond: x.Uses == 1 10264 // result: (MOVDnop x) 10265 for { 10266 x := v.Args[0] 10267 if !(x.Uses == 1) { 10268 break 10269 } 10270 v.reset(OpS390XMOVDnop) 10271 v.AddArg(x) 10272 return true 10273 } 10274 return false 10275 } 10276 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10277 b := v.Block 10278 _ = b 10279 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10280 // cond: is20Bit(off1+off2) 10281 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10282 for { 10283 off1 := v.AuxInt 10284 sym := v.Aux 10285 v_0 := v.Args[0] 10286 if v_0.Op != OpS390XADDconst { 10287 break 10288 } 10289 off2 := v_0.AuxInt 10290 ptr := v_0.Args[0] 10291 val := v.Args[1] 10292 mem := v.Args[2] 10293 if !(is20Bit(off1 + off2)) { 10294 break 10295 } 10296 v.reset(OpS390XMOVDstore) 10297 v.AuxInt = off1 + off2 10298 v.Aux = sym 10299 v.AddArg(ptr) 10300 v.AddArg(val) 10301 v.AddArg(mem) 10302 return true 10303 } 10304 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10305 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10306 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10307 for { 10308 off := v.AuxInt 10309 sym := v.Aux 10310 ptr := v.Args[0] 10311 v_1 := v.Args[1] 10312 if v_1.Op != OpS390XMOVDconst { 10313 break 10314 } 10315 c := v_1.AuxInt 10316 mem := v.Args[2] 10317 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10318 break 10319 } 10320 v.reset(OpS390XMOVDstoreconst) 10321 v.AuxInt = makeValAndOff(c, off) 10322 v.Aux = sym 10323 v.AddArg(ptr) 10324 v.AddArg(mem) 10325 return true 10326 } 10327 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10328 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10329 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10330 for { 10331 off1 := v.AuxInt 10332 sym1 := v.Aux 10333 v_0 := v.Args[0] 10334 if v_0.Op != OpS390XMOVDaddr { 10335 break 10336 } 10337 off2 := v_0.AuxInt 10338 sym2 := v_0.Aux 10339 base := v_0.Args[0] 10340 val := v.Args[1] 10341 mem := v.Args[2] 10342 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10343 break 10344 } 10345 v.reset(OpS390XMOVDstore) 10346 v.AuxInt = off1 + off2 10347 v.Aux = mergeSym(sym1, sym2) 10348 v.AddArg(base) 10349 v.AddArg(val) 10350 v.AddArg(mem) 10351 return true 10352 } 10353 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 10354 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10355 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 10356 for { 10357 off1 := v.AuxInt 10358 sym1 := v.Aux 10359 v_0 := v.Args[0] 10360 if v_0.Op != OpS390XMOVDaddridx { 10361 break 10362 } 10363 off2 := v_0.AuxInt 10364 sym2 := v_0.Aux 10365 ptr := v_0.Args[0] 10366 idx := v_0.Args[1] 10367 val := v.Args[1] 10368 mem := v.Args[2] 10369 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10370 break 10371 } 10372 v.reset(OpS390XMOVDstoreidx) 10373 v.AuxInt = off1 + off2 10374 v.Aux = mergeSym(sym1, sym2) 10375 v.AddArg(ptr) 10376 v.AddArg(idx) 10377 v.AddArg(val) 10378 v.AddArg(mem) 10379 return true 10380 } 10381 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 10382 // cond: ptr.Op != OpSB 10383 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 10384 for { 10385 off := v.AuxInt 10386 sym := v.Aux 10387 v_0 := v.Args[0] 10388 if v_0.Op != OpS390XADD { 10389 break 10390 } 10391 ptr := v_0.Args[0] 10392 idx := v_0.Args[1] 10393 val := v.Args[1] 10394 mem := v.Args[2] 10395 if !(ptr.Op != OpSB) { 10396 break 10397 } 10398 v.reset(OpS390XMOVDstoreidx) 10399 v.AuxInt = off 10400 v.Aux = sym 10401 v.AddArg(ptr) 10402 v.AddArg(idx) 10403 v.AddArg(val) 10404 v.AddArg(mem) 10405 return true 10406 } 10407 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 10408 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 10409 // result: (STMG2 [i-8] {s} p w0 w1 mem) 10410 for { 10411 i := v.AuxInt 10412 s := v.Aux 10413 p := v.Args[0] 10414 w1 := v.Args[1] 10415 x := v.Args[2] 10416 if x.Op != OpS390XMOVDstore { 10417 break 10418 } 10419 if x.AuxInt != i-8 { 10420 break 10421 } 10422 if x.Aux != s { 10423 break 10424 } 10425 if p != x.Args[0] { 10426 break 10427 } 10428 w0 := x.Args[1] 10429 mem := x.Args[2] 10430 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 10431 break 10432 } 10433 v.reset(OpS390XSTMG2) 10434 v.AuxInt = i - 8 10435 v.Aux = s 10436 v.AddArg(p) 10437 v.AddArg(w0) 10438 v.AddArg(w1) 10439 v.AddArg(mem) 10440 return true 10441 } 10442 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 10443 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 10444 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 10445 for { 10446 i := v.AuxInt 10447 s := v.Aux 10448 p := v.Args[0] 10449 w2 := v.Args[1] 10450 x := v.Args[2] 10451 if x.Op != OpS390XSTMG2 { 10452 break 10453 } 10454 if x.AuxInt != i-16 { 10455 break 10456 } 10457 if x.Aux != s { 10458 break 10459 } 10460 if p != x.Args[0] { 10461 break 10462 } 10463 w0 := x.Args[1] 10464 w1 := x.Args[2] 10465 mem := x.Args[3] 10466 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 10467 break 10468 } 10469 v.reset(OpS390XSTMG3) 10470 v.AuxInt = i - 16 10471 v.Aux = s 10472 v.AddArg(p) 10473 v.AddArg(w0) 10474 v.AddArg(w1) 10475 v.AddArg(w2) 10476 v.AddArg(mem) 10477 return true 10478 } 10479 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 10480 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 10481 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 10482 for { 10483 i := v.AuxInt 10484 s := v.Aux 10485 p := v.Args[0] 10486 w3 := v.Args[1] 10487 x := v.Args[2] 10488 if x.Op != OpS390XSTMG3 { 10489 break 10490 } 10491 if x.AuxInt != i-24 { 10492 break 10493 } 10494 if x.Aux != s { 10495 break 10496 } 10497 if p != x.Args[0] { 10498 break 10499 } 10500 w0 := x.Args[1] 10501 w1 := x.Args[2] 10502 w2 := x.Args[3] 10503 mem := x.Args[4] 10504 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 10505 break 10506 } 10507 v.reset(OpS390XSTMG4) 10508 v.AuxInt = i - 24 10509 v.Aux = s 10510 v.AddArg(p) 10511 v.AddArg(w0) 10512 v.AddArg(w1) 10513 v.AddArg(w2) 10514 v.AddArg(w3) 10515 v.AddArg(mem) 10516 return true 10517 } 10518 return false 10519 } 10520 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 10521 b := v.Block 10522 _ = b 10523 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 10524 // cond: ValAndOff(sc).canAdd(off) 10525 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10526 for { 10527 sc := v.AuxInt 10528 s := v.Aux 10529 v_0 := v.Args[0] 10530 if v_0.Op != OpS390XADDconst { 10531 break 10532 } 10533 off := v_0.AuxInt 10534 ptr := v_0.Args[0] 10535 mem := v.Args[1] 10536 if !(ValAndOff(sc).canAdd(off)) { 10537 break 10538 } 10539 v.reset(OpS390XMOVDstoreconst) 10540 v.AuxInt = ValAndOff(sc).add(off) 10541 v.Aux = s 10542 v.AddArg(ptr) 10543 v.AddArg(mem) 10544 return true 10545 } 10546 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 10547 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 10548 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10549 for { 10550 sc := v.AuxInt 10551 sym1 := v.Aux 10552 v_0 := v.Args[0] 10553 if v_0.Op != OpS390XMOVDaddr { 10554 break 10555 } 10556 off := v_0.AuxInt 10557 sym2 := v_0.Aux 10558 ptr := v_0.Args[0] 10559 mem := v.Args[1] 10560 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 10561 break 10562 } 10563 v.reset(OpS390XMOVDstoreconst) 10564 v.AuxInt = ValAndOff(sc).add(off) 10565 v.Aux = mergeSym(sym1, sym2) 10566 v.AddArg(ptr) 10567 v.AddArg(mem) 10568 return true 10569 } 10570 return false 10571 } 10572 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 10573 b := v.Block 10574 _ = b 10575 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 10576 // cond: 10577 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10578 for { 10579 c := v.AuxInt 10580 sym := v.Aux 10581 v_0 := v.Args[0] 10582 if v_0.Op != OpS390XADDconst { 10583 break 10584 } 10585 d := v_0.AuxInt 10586 ptr := v_0.Args[0] 10587 idx := v.Args[1] 10588 val := v.Args[2] 10589 mem := v.Args[3] 10590 v.reset(OpS390XMOVDstoreidx) 10591 v.AuxInt = c + d 10592 v.Aux = sym 10593 v.AddArg(ptr) 10594 v.AddArg(idx) 10595 v.AddArg(val) 10596 v.AddArg(mem) 10597 return true 10598 } 10599 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 10600 // cond: 10601 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10602 for { 10603 c := v.AuxInt 10604 sym := v.Aux 10605 ptr := v.Args[0] 10606 v_1 := v.Args[1] 10607 if v_1.Op != OpS390XADDconst { 10608 break 10609 } 10610 d := v_1.AuxInt 10611 idx := v_1.Args[0] 10612 val := v.Args[2] 10613 mem := v.Args[3] 10614 v.reset(OpS390XMOVDstoreidx) 10615 v.AuxInt = c + d 10616 v.Aux = sym 10617 v.AddArg(ptr) 10618 v.AddArg(idx) 10619 v.AddArg(val) 10620 v.AddArg(mem) 10621 return true 10622 } 10623 return false 10624 } 10625 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 10626 b := v.Block 10627 _ = b 10628 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10629 // cond: x.Uses == 1 && clobber(x) 10630 // result: (MOVWBRstore [i-2] {s} p w mem) 10631 for { 10632 i := v.AuxInt 10633 s := v.Aux 10634 p := v.Args[0] 10635 v_1 := v.Args[1] 10636 if v_1.Op != OpS390XSRDconst { 10637 break 10638 } 10639 if v_1.AuxInt != 16 { 10640 break 10641 } 10642 w := v_1.Args[0] 10643 x := v.Args[2] 10644 if x.Op != OpS390XMOVHBRstore { 10645 break 10646 } 10647 if x.AuxInt != i-2 { 10648 break 10649 } 10650 if x.Aux != s { 10651 break 10652 } 10653 if p != x.Args[0] { 10654 break 10655 } 10656 if w != x.Args[1] { 10657 break 10658 } 10659 mem := x.Args[2] 10660 if !(x.Uses == 1 && clobber(x)) { 10661 break 10662 } 10663 v.reset(OpS390XMOVWBRstore) 10664 v.AuxInt = i - 2 10665 v.Aux = s 10666 v.AddArg(p) 10667 v.AddArg(w) 10668 v.AddArg(mem) 10669 return true 10670 } 10671 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 10672 // cond: x.Uses == 1 && clobber(x) 10673 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10674 for { 10675 i := v.AuxInt 10676 s := v.Aux 10677 p := v.Args[0] 10678 v_1 := v.Args[1] 10679 if v_1.Op != OpS390XSRDconst { 10680 break 10681 } 10682 j := v_1.AuxInt 10683 w := v_1.Args[0] 10684 x := v.Args[2] 10685 if x.Op != OpS390XMOVHBRstore { 10686 break 10687 } 10688 if x.AuxInt != i-2 { 10689 break 10690 } 10691 if x.Aux != s { 10692 break 10693 } 10694 if p != x.Args[0] { 10695 break 10696 } 10697 w0 := x.Args[1] 10698 if w0.Op != OpS390XSRDconst { 10699 break 10700 } 10701 if w0.AuxInt != j-16 { 10702 break 10703 } 10704 if w != w0.Args[0] { 10705 break 10706 } 10707 mem := x.Args[2] 10708 if !(x.Uses == 1 && clobber(x)) { 10709 break 10710 } 10711 v.reset(OpS390XMOVWBRstore) 10712 v.AuxInt = i - 2 10713 v.Aux = s 10714 v.AddArg(p) 10715 v.AddArg(w0) 10716 v.AddArg(mem) 10717 return true 10718 } 10719 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10720 // cond: x.Uses == 1 && clobber(x) 10721 // result: (MOVWBRstore [i-2] {s} p w mem) 10722 for { 10723 i := v.AuxInt 10724 s := v.Aux 10725 p := v.Args[0] 10726 v_1 := v.Args[1] 10727 if v_1.Op != OpS390XSRWconst { 10728 break 10729 } 10730 if v_1.AuxInt != 16 { 10731 break 10732 } 10733 w := v_1.Args[0] 10734 x := v.Args[2] 10735 if x.Op != OpS390XMOVHBRstore { 10736 break 10737 } 10738 if x.AuxInt != i-2 { 10739 break 10740 } 10741 if x.Aux != s { 10742 break 10743 } 10744 if p != x.Args[0] { 10745 break 10746 } 10747 if w != x.Args[1] { 10748 break 10749 } 10750 mem := x.Args[2] 10751 if !(x.Uses == 1 && clobber(x)) { 10752 break 10753 } 10754 v.reset(OpS390XMOVWBRstore) 10755 v.AuxInt = i - 2 10756 v.Aux = s 10757 v.AddArg(p) 10758 v.AddArg(w) 10759 v.AddArg(mem) 10760 return true 10761 } 10762 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 10763 // cond: x.Uses == 1 && clobber(x) 10764 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10765 for { 10766 i := v.AuxInt 10767 s := v.Aux 10768 p := v.Args[0] 10769 v_1 := v.Args[1] 10770 if v_1.Op != OpS390XSRWconst { 10771 break 10772 } 10773 j := v_1.AuxInt 10774 w := v_1.Args[0] 10775 x := v.Args[2] 10776 if x.Op != OpS390XMOVHBRstore { 10777 break 10778 } 10779 if x.AuxInt != i-2 { 10780 break 10781 } 10782 if x.Aux != s { 10783 break 10784 } 10785 if p != x.Args[0] { 10786 break 10787 } 10788 w0 := x.Args[1] 10789 if w0.Op != OpS390XSRWconst { 10790 break 10791 } 10792 if w0.AuxInt != j-16 { 10793 break 10794 } 10795 if w != w0.Args[0] { 10796 break 10797 } 10798 mem := x.Args[2] 10799 if !(x.Uses == 1 && clobber(x)) { 10800 break 10801 } 10802 v.reset(OpS390XMOVWBRstore) 10803 v.AuxInt = i - 2 10804 v.Aux = s 10805 v.AddArg(p) 10806 v.AddArg(w0) 10807 v.AddArg(mem) 10808 return true 10809 } 10810 return false 10811 } 10812 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 10813 b := v.Block 10814 _ = b 10815 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10816 // cond: x.Uses == 1 && clobber(x) 10817 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10818 for { 10819 i := v.AuxInt 10820 s := v.Aux 10821 p := v.Args[0] 10822 idx := v.Args[1] 10823 v_2 := v.Args[2] 10824 if v_2.Op != OpS390XSRDconst { 10825 break 10826 } 10827 if v_2.AuxInt != 16 { 10828 break 10829 } 10830 w := v_2.Args[0] 10831 x := v.Args[3] 10832 if x.Op != OpS390XMOVHBRstoreidx { 10833 break 10834 } 10835 if x.AuxInt != i-2 { 10836 break 10837 } 10838 if x.Aux != s { 10839 break 10840 } 10841 if p != x.Args[0] { 10842 break 10843 } 10844 if idx != x.Args[1] { 10845 break 10846 } 10847 if w != x.Args[2] { 10848 break 10849 } 10850 mem := x.Args[3] 10851 if !(x.Uses == 1 && clobber(x)) { 10852 break 10853 } 10854 v.reset(OpS390XMOVWBRstoreidx) 10855 v.AuxInt = i - 2 10856 v.Aux = s 10857 v.AddArg(p) 10858 v.AddArg(idx) 10859 v.AddArg(w) 10860 v.AddArg(mem) 10861 return true 10862 } 10863 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 10864 // cond: x.Uses == 1 && clobber(x) 10865 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10866 for { 10867 i := v.AuxInt 10868 s := v.Aux 10869 p := v.Args[0] 10870 idx := v.Args[1] 10871 v_2 := v.Args[2] 10872 if v_2.Op != OpS390XSRDconst { 10873 break 10874 } 10875 j := v_2.AuxInt 10876 w := v_2.Args[0] 10877 x := v.Args[3] 10878 if x.Op != OpS390XMOVHBRstoreidx { 10879 break 10880 } 10881 if x.AuxInt != i-2 { 10882 break 10883 } 10884 if x.Aux != s { 10885 break 10886 } 10887 if p != x.Args[0] { 10888 break 10889 } 10890 if idx != x.Args[1] { 10891 break 10892 } 10893 w0 := x.Args[2] 10894 if w0.Op != OpS390XSRDconst { 10895 break 10896 } 10897 if w0.AuxInt != j-16 { 10898 break 10899 } 10900 if w != w0.Args[0] { 10901 break 10902 } 10903 mem := x.Args[3] 10904 if !(x.Uses == 1 && clobber(x)) { 10905 break 10906 } 10907 v.reset(OpS390XMOVWBRstoreidx) 10908 v.AuxInt = i - 2 10909 v.Aux = s 10910 v.AddArg(p) 10911 v.AddArg(idx) 10912 v.AddArg(w0) 10913 v.AddArg(mem) 10914 return true 10915 } 10916 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10917 // cond: x.Uses == 1 && clobber(x) 10918 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10919 for { 10920 i := v.AuxInt 10921 s := v.Aux 10922 p := v.Args[0] 10923 idx := v.Args[1] 10924 v_2 := v.Args[2] 10925 if v_2.Op != OpS390XSRWconst { 10926 break 10927 } 10928 if v_2.AuxInt != 16 { 10929 break 10930 } 10931 w := v_2.Args[0] 10932 x := v.Args[3] 10933 if x.Op != OpS390XMOVHBRstoreidx { 10934 break 10935 } 10936 if x.AuxInt != i-2 { 10937 break 10938 } 10939 if x.Aux != s { 10940 break 10941 } 10942 if p != x.Args[0] { 10943 break 10944 } 10945 if idx != x.Args[1] { 10946 break 10947 } 10948 if w != x.Args[2] { 10949 break 10950 } 10951 mem := x.Args[3] 10952 if !(x.Uses == 1 && clobber(x)) { 10953 break 10954 } 10955 v.reset(OpS390XMOVWBRstoreidx) 10956 v.AuxInt = i - 2 10957 v.Aux = s 10958 v.AddArg(p) 10959 v.AddArg(idx) 10960 v.AddArg(w) 10961 v.AddArg(mem) 10962 return true 10963 } 10964 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 10965 // cond: x.Uses == 1 && clobber(x) 10966 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10967 for { 10968 i := v.AuxInt 10969 s := v.Aux 10970 p := v.Args[0] 10971 idx := v.Args[1] 10972 v_2 := v.Args[2] 10973 if v_2.Op != OpS390XSRWconst { 10974 break 10975 } 10976 j := v_2.AuxInt 10977 w := v_2.Args[0] 10978 x := v.Args[3] 10979 if x.Op != OpS390XMOVHBRstoreidx { 10980 break 10981 } 10982 if x.AuxInt != i-2 { 10983 break 10984 } 10985 if x.Aux != s { 10986 break 10987 } 10988 if p != x.Args[0] { 10989 break 10990 } 10991 if idx != x.Args[1] { 10992 break 10993 } 10994 w0 := x.Args[2] 10995 if w0.Op != OpS390XSRWconst { 10996 break 10997 } 10998 if w0.AuxInt != j-16 { 10999 break 11000 } 11001 if w != w0.Args[0] { 11002 break 11003 } 11004 mem := x.Args[3] 11005 if !(x.Uses == 1 && clobber(x)) { 11006 break 11007 } 11008 v.reset(OpS390XMOVWBRstoreidx) 11009 v.AuxInt = i - 2 11010 v.Aux = s 11011 v.AddArg(p) 11012 v.AddArg(idx) 11013 v.AddArg(w0) 11014 v.AddArg(mem) 11015 return true 11016 } 11017 return false 11018 } 11019 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 11020 b := v.Block 11021 _ = b 11022 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 11023 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 11024 // result: (MOVHZreg x) 11025 for { 11026 off := v.AuxInt 11027 sym := v.Aux 11028 ptr := v.Args[0] 11029 v_1 := v.Args[1] 11030 if v_1.Op != OpS390XMOVHstore { 11031 break 11032 } 11033 off2 := v_1.AuxInt 11034 sym2 := v_1.Aux 11035 ptr2 := v_1.Args[0] 11036 x := v_1.Args[1] 11037 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 11038 break 11039 } 11040 v.reset(OpS390XMOVHZreg) 11041 v.AddArg(x) 11042 return true 11043 } 11044 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 11045 // cond: is20Bit(off1+off2) 11046 // result: (MOVHZload [off1+off2] {sym} ptr mem) 11047 for { 11048 off1 := v.AuxInt 11049 sym := v.Aux 11050 v_0 := v.Args[0] 11051 if v_0.Op != OpS390XADDconst { 11052 break 11053 } 11054 off2 := v_0.AuxInt 11055 ptr := v_0.Args[0] 11056 mem := v.Args[1] 11057 if !(is20Bit(off1 + off2)) { 11058 break 11059 } 11060 v.reset(OpS390XMOVHZload) 11061 v.AuxInt = off1 + off2 11062 v.Aux = sym 11063 v.AddArg(ptr) 11064 v.AddArg(mem) 11065 return true 11066 } 11067 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11068 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11069 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11070 for { 11071 off1 := v.AuxInt 11072 sym1 := v.Aux 11073 v_0 := v.Args[0] 11074 if v_0.Op != OpS390XMOVDaddr { 11075 break 11076 } 11077 off2 := v_0.AuxInt 11078 sym2 := v_0.Aux 11079 base := v_0.Args[0] 11080 mem := v.Args[1] 11081 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11082 break 11083 } 11084 v.reset(OpS390XMOVHZload) 11085 v.AuxInt = off1 + off2 11086 v.Aux = mergeSym(sym1, sym2) 11087 v.AddArg(base) 11088 v.AddArg(mem) 11089 return true 11090 } 11091 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 11092 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11093 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 11094 for { 11095 off1 := v.AuxInt 11096 sym1 := v.Aux 11097 v_0 := v.Args[0] 11098 if v_0.Op != OpS390XMOVDaddridx { 11099 break 11100 } 11101 off2 := v_0.AuxInt 11102 sym2 := v_0.Aux 11103 ptr := v_0.Args[0] 11104 idx := v_0.Args[1] 11105 mem := v.Args[1] 11106 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11107 break 11108 } 11109 v.reset(OpS390XMOVHZloadidx) 11110 v.AuxInt = off1 + off2 11111 v.Aux = mergeSym(sym1, sym2) 11112 v.AddArg(ptr) 11113 v.AddArg(idx) 11114 v.AddArg(mem) 11115 return true 11116 } 11117 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11118 // cond: ptr.Op != OpSB 11119 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11120 for { 11121 off := v.AuxInt 11122 sym := v.Aux 11123 v_0 := v.Args[0] 11124 if v_0.Op != OpS390XADD { 11125 break 11126 } 11127 ptr := v_0.Args[0] 11128 idx := v_0.Args[1] 11129 mem := v.Args[1] 11130 if !(ptr.Op != OpSB) { 11131 break 11132 } 11133 v.reset(OpS390XMOVHZloadidx) 11134 v.AuxInt = off 11135 v.Aux = sym 11136 v.AddArg(ptr) 11137 v.AddArg(idx) 11138 v.AddArg(mem) 11139 return true 11140 } 11141 return false 11142 } 11143 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11144 b := v.Block 11145 _ = b 11146 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11147 // cond: 11148 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11149 for { 11150 c := v.AuxInt 11151 sym := v.Aux 11152 v_0 := v.Args[0] 11153 if v_0.Op != OpS390XADDconst { 11154 break 11155 } 11156 d := v_0.AuxInt 11157 ptr := v_0.Args[0] 11158 idx := v.Args[1] 11159 mem := v.Args[2] 11160 v.reset(OpS390XMOVHZloadidx) 11161 v.AuxInt = c + d 11162 v.Aux = sym 11163 v.AddArg(ptr) 11164 v.AddArg(idx) 11165 v.AddArg(mem) 11166 return true 11167 } 11168 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11169 // cond: 11170 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11171 for { 11172 c := v.AuxInt 11173 sym := v.Aux 11174 ptr := v.Args[0] 11175 v_1 := v.Args[1] 11176 if v_1.Op != OpS390XADDconst { 11177 break 11178 } 11179 d := v_1.AuxInt 11180 idx := v_1.Args[0] 11181 mem := v.Args[2] 11182 v.reset(OpS390XMOVHZloadidx) 11183 v.AuxInt = c + d 11184 v.Aux = sym 11185 v.AddArg(ptr) 11186 v.AddArg(idx) 11187 v.AddArg(mem) 11188 return true 11189 } 11190 return false 11191 } 11192 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11193 b := v.Block 11194 _ = b 11195 // match: (MOVHZreg x:(MOVBZload _ _)) 11196 // cond: 11197 // result: (MOVDreg x) 11198 for { 11199 x := v.Args[0] 11200 if x.Op != OpS390XMOVBZload { 11201 break 11202 } 11203 v.reset(OpS390XMOVDreg) 11204 v.AddArg(x) 11205 return true 11206 } 11207 // match: (MOVHZreg x:(MOVHZload _ _)) 11208 // cond: 11209 // result: (MOVDreg x) 11210 for { 11211 x := v.Args[0] 11212 if x.Op != OpS390XMOVHZload { 11213 break 11214 } 11215 v.reset(OpS390XMOVDreg) 11216 v.AddArg(x) 11217 return true 11218 } 11219 // match: (MOVHZreg x:(Arg <t>)) 11220 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11221 // result: (MOVDreg x) 11222 for { 11223 x := v.Args[0] 11224 if x.Op != OpArg { 11225 break 11226 } 11227 t := x.Type 11228 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11229 break 11230 } 11231 v.reset(OpS390XMOVDreg) 11232 v.AddArg(x) 11233 return true 11234 } 11235 // match: (MOVHZreg x:(MOVBZreg _)) 11236 // cond: 11237 // result: (MOVDreg x) 11238 for { 11239 x := v.Args[0] 11240 if x.Op != OpS390XMOVBZreg { 11241 break 11242 } 11243 v.reset(OpS390XMOVDreg) 11244 v.AddArg(x) 11245 return true 11246 } 11247 // match: (MOVHZreg x:(MOVHZreg _)) 11248 // cond: 11249 // result: (MOVDreg x) 11250 for { 11251 x := v.Args[0] 11252 if x.Op != OpS390XMOVHZreg { 11253 break 11254 } 11255 v.reset(OpS390XMOVDreg) 11256 v.AddArg(x) 11257 return true 11258 } 11259 // match: (MOVHZreg (MOVDconst [c])) 11260 // cond: 11261 // result: (MOVDconst [int64(uint16(c))]) 11262 for { 11263 v_0 := v.Args[0] 11264 if v_0.Op != OpS390XMOVDconst { 11265 break 11266 } 11267 c := v_0.AuxInt 11268 v.reset(OpS390XMOVDconst) 11269 v.AuxInt = int64(uint16(c)) 11270 return true 11271 } 11272 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11273 // cond: x.Uses == 1 && clobber(x) 11274 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11275 for { 11276 x := v.Args[0] 11277 if x.Op != OpS390XMOVHZload { 11278 break 11279 } 11280 off := x.AuxInt 11281 sym := x.Aux 11282 ptr := x.Args[0] 11283 mem := x.Args[1] 11284 if !(x.Uses == 1 && clobber(x)) { 11285 break 11286 } 11287 b = x.Block 11288 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, v.Type) 11289 v.reset(OpCopy) 11290 v.AddArg(v0) 11291 v0.AuxInt = off 11292 v0.Aux = sym 11293 v0.AddArg(ptr) 11294 v0.AddArg(mem) 11295 return true 11296 } 11297 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11298 // cond: x.Uses == 1 && clobber(x) 11299 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11300 for { 11301 x := v.Args[0] 11302 if x.Op != OpS390XMOVHZloadidx { 11303 break 11304 } 11305 off := x.AuxInt 11306 sym := x.Aux 11307 ptr := x.Args[0] 11308 idx := x.Args[1] 11309 mem := x.Args[2] 11310 if !(x.Uses == 1 && clobber(x)) { 11311 break 11312 } 11313 b = x.Block 11314 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 11315 v.reset(OpCopy) 11316 v.AddArg(v0) 11317 v0.AuxInt = off 11318 v0.Aux = sym 11319 v0.AddArg(ptr) 11320 v0.AddArg(idx) 11321 v0.AddArg(mem) 11322 return true 11323 } 11324 return false 11325 } 11326 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11327 b := v.Block 11328 _ = b 11329 // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 11330 // cond: is20Bit(off1+off2) 11331 // result: (MOVHload [off1+off2] {sym} ptr mem) 11332 for { 11333 off1 := v.AuxInt 11334 sym := v.Aux 11335 v_0 := v.Args[0] 11336 if v_0.Op != OpS390XADDconst { 11337 break 11338 } 11339 off2 := v_0.AuxInt 11340 ptr := v_0.Args[0] 11341 mem := v.Args[1] 11342 if !(is20Bit(off1 + off2)) { 11343 break 11344 } 11345 v.reset(OpS390XMOVHload) 11346 v.AuxInt = off1 + off2 11347 v.Aux = sym 11348 v.AddArg(ptr) 11349 v.AddArg(mem) 11350 return true 11351 } 11352 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11353 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11354 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11355 for { 11356 off1 := v.AuxInt 11357 sym1 := v.Aux 11358 v_0 := v.Args[0] 11359 if v_0.Op != OpS390XMOVDaddr { 11360 break 11361 } 11362 off2 := v_0.AuxInt 11363 sym2 := v_0.Aux 11364 base := v_0.Args[0] 11365 mem := v.Args[1] 11366 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11367 break 11368 } 11369 v.reset(OpS390XMOVHload) 11370 v.AuxInt = off1 + off2 11371 v.Aux = mergeSym(sym1, sym2) 11372 v.AddArg(base) 11373 v.AddArg(mem) 11374 return true 11375 } 11376 return false 11377 } 11378 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 11379 b := v.Block 11380 _ = b 11381 // match: (MOVHreg x:(MOVBload _ _)) 11382 // cond: 11383 // result: (MOVDreg x) 11384 for { 11385 x := v.Args[0] 11386 if x.Op != OpS390XMOVBload { 11387 break 11388 } 11389 v.reset(OpS390XMOVDreg) 11390 v.AddArg(x) 11391 return true 11392 } 11393 // match: (MOVHreg x:(MOVBZload _ _)) 11394 // cond: 11395 // result: (MOVDreg x) 11396 for { 11397 x := v.Args[0] 11398 if x.Op != OpS390XMOVBZload { 11399 break 11400 } 11401 v.reset(OpS390XMOVDreg) 11402 v.AddArg(x) 11403 return true 11404 } 11405 // match: (MOVHreg x:(MOVHload _ _)) 11406 // cond: 11407 // result: (MOVDreg x) 11408 for { 11409 x := v.Args[0] 11410 if x.Op != OpS390XMOVHload { 11411 break 11412 } 11413 v.reset(OpS390XMOVDreg) 11414 v.AddArg(x) 11415 return true 11416 } 11417 // match: (MOVHreg x:(Arg <t>)) 11418 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 11419 // result: (MOVDreg x) 11420 for { 11421 x := v.Args[0] 11422 if x.Op != OpArg { 11423 break 11424 } 11425 t := x.Type 11426 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 11427 break 11428 } 11429 v.reset(OpS390XMOVDreg) 11430 v.AddArg(x) 11431 return true 11432 } 11433 // match: (MOVHreg x:(MOVBreg _)) 11434 // cond: 11435 // result: (MOVDreg x) 11436 for { 11437 x := v.Args[0] 11438 if x.Op != OpS390XMOVBreg { 11439 break 11440 } 11441 v.reset(OpS390XMOVDreg) 11442 v.AddArg(x) 11443 return true 11444 } 11445 // match: (MOVHreg x:(MOVBZreg _)) 11446 // cond: 11447 // result: (MOVDreg x) 11448 for { 11449 x := v.Args[0] 11450 if x.Op != OpS390XMOVBZreg { 11451 break 11452 } 11453 v.reset(OpS390XMOVDreg) 11454 v.AddArg(x) 11455 return true 11456 } 11457 // match: (MOVHreg x:(MOVHreg _)) 11458 // cond: 11459 // result: (MOVDreg x) 11460 for { 11461 x := v.Args[0] 11462 if x.Op != OpS390XMOVHreg { 11463 break 11464 } 11465 v.reset(OpS390XMOVDreg) 11466 v.AddArg(x) 11467 return true 11468 } 11469 // match: (MOVHreg (MOVDconst [c])) 11470 // cond: 11471 // result: (MOVDconst [int64(int16(c))]) 11472 for { 11473 v_0 := v.Args[0] 11474 if v_0.Op != OpS390XMOVDconst { 11475 break 11476 } 11477 c := v_0.AuxInt 11478 v.reset(OpS390XMOVDconst) 11479 v.AuxInt = int64(int16(c)) 11480 return true 11481 } 11482 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 11483 // cond: x.Uses == 1 && clobber(x) 11484 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 11485 for { 11486 x := v.Args[0] 11487 if x.Op != OpS390XMOVHZload { 11488 break 11489 } 11490 off := x.AuxInt 11491 sym := x.Aux 11492 ptr := x.Args[0] 11493 mem := x.Args[1] 11494 if !(x.Uses == 1 && clobber(x)) { 11495 break 11496 } 11497 b = x.Block 11498 v0 := b.NewValue0(v.Line, OpS390XMOVHload, v.Type) 11499 v.reset(OpCopy) 11500 v.AddArg(v0) 11501 v0.AuxInt = off 11502 v0.Aux = sym 11503 v0.AddArg(ptr) 11504 v0.AddArg(mem) 11505 return true 11506 } 11507 return false 11508 } 11509 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 11510 b := v.Block 11511 _ = b 11512 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 11513 // cond: 11514 // result: (MOVHstore [off] {sym} ptr x mem) 11515 for { 11516 off := v.AuxInt 11517 sym := v.Aux 11518 ptr := v.Args[0] 11519 v_1 := v.Args[1] 11520 if v_1.Op != OpS390XMOVHreg { 11521 break 11522 } 11523 x := v_1.Args[0] 11524 mem := v.Args[2] 11525 v.reset(OpS390XMOVHstore) 11526 v.AuxInt = off 11527 v.Aux = sym 11528 v.AddArg(ptr) 11529 v.AddArg(x) 11530 v.AddArg(mem) 11531 return true 11532 } 11533 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 11534 // cond: 11535 // result: (MOVHstore [off] {sym} ptr x mem) 11536 for { 11537 off := v.AuxInt 11538 sym := v.Aux 11539 ptr := v.Args[0] 11540 v_1 := v.Args[1] 11541 if v_1.Op != OpS390XMOVHZreg { 11542 break 11543 } 11544 x := v_1.Args[0] 11545 mem := v.Args[2] 11546 v.reset(OpS390XMOVHstore) 11547 v.AuxInt = off 11548 v.Aux = sym 11549 v.AddArg(ptr) 11550 v.AddArg(x) 11551 v.AddArg(mem) 11552 return true 11553 } 11554 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 11555 // cond: is20Bit(off1+off2) 11556 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 11557 for { 11558 off1 := v.AuxInt 11559 sym := v.Aux 11560 v_0 := v.Args[0] 11561 if v_0.Op != OpS390XADDconst { 11562 break 11563 } 11564 off2 := v_0.AuxInt 11565 ptr := v_0.Args[0] 11566 val := v.Args[1] 11567 mem := v.Args[2] 11568 if !(is20Bit(off1 + off2)) { 11569 break 11570 } 11571 v.reset(OpS390XMOVHstore) 11572 v.AuxInt = off1 + off2 11573 v.Aux = sym 11574 v.AddArg(ptr) 11575 v.AddArg(val) 11576 v.AddArg(mem) 11577 return true 11578 } 11579 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 11580 // cond: validOff(off) && ptr.Op != OpSB 11581 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 11582 for { 11583 off := v.AuxInt 11584 sym := v.Aux 11585 ptr := v.Args[0] 11586 v_1 := v.Args[1] 11587 if v_1.Op != OpS390XMOVDconst { 11588 break 11589 } 11590 c := v_1.AuxInt 11591 mem := v.Args[2] 11592 if !(validOff(off) && ptr.Op != OpSB) { 11593 break 11594 } 11595 v.reset(OpS390XMOVHstoreconst) 11596 v.AuxInt = makeValAndOff(int64(int16(c)), off) 11597 v.Aux = sym 11598 v.AddArg(ptr) 11599 v.AddArg(mem) 11600 return true 11601 } 11602 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 11603 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11604 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 11605 for { 11606 off1 := v.AuxInt 11607 sym1 := v.Aux 11608 v_0 := v.Args[0] 11609 if v_0.Op != OpS390XMOVDaddr { 11610 break 11611 } 11612 off2 := v_0.AuxInt 11613 sym2 := v_0.Aux 11614 base := v_0.Args[0] 11615 val := v.Args[1] 11616 mem := v.Args[2] 11617 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11618 break 11619 } 11620 v.reset(OpS390XMOVHstore) 11621 v.AuxInt = off1 + off2 11622 v.Aux = mergeSym(sym1, sym2) 11623 v.AddArg(base) 11624 v.AddArg(val) 11625 v.AddArg(mem) 11626 return true 11627 } 11628 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11629 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11630 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11631 for { 11632 off1 := v.AuxInt 11633 sym1 := v.Aux 11634 v_0 := v.Args[0] 11635 if v_0.Op != OpS390XMOVDaddridx { 11636 break 11637 } 11638 off2 := v_0.AuxInt 11639 sym2 := v_0.Aux 11640 ptr := v_0.Args[0] 11641 idx := v_0.Args[1] 11642 val := v.Args[1] 11643 mem := v.Args[2] 11644 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11645 break 11646 } 11647 v.reset(OpS390XMOVHstoreidx) 11648 v.AuxInt = off1 + off2 11649 v.Aux = mergeSym(sym1, sym2) 11650 v.AddArg(ptr) 11651 v.AddArg(idx) 11652 v.AddArg(val) 11653 v.AddArg(mem) 11654 return true 11655 } 11656 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 11657 // cond: ptr.Op != OpSB 11658 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 11659 for { 11660 off := v.AuxInt 11661 sym := v.Aux 11662 v_0 := v.Args[0] 11663 if v_0.Op != OpS390XADD { 11664 break 11665 } 11666 ptr := v_0.Args[0] 11667 idx := v_0.Args[1] 11668 val := v.Args[1] 11669 mem := v.Args[2] 11670 if !(ptr.Op != OpSB) { 11671 break 11672 } 11673 v.reset(OpS390XMOVHstoreidx) 11674 v.AuxInt = off 11675 v.Aux = sym 11676 v.AddArg(ptr) 11677 v.AddArg(idx) 11678 v.AddArg(val) 11679 v.AddArg(mem) 11680 return true 11681 } 11682 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 11683 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11684 // result: (MOVWstore [i-2] {s} p w mem) 11685 for { 11686 i := v.AuxInt 11687 s := v.Aux 11688 p := v.Args[0] 11689 w := v.Args[1] 11690 x := v.Args[2] 11691 if x.Op != OpS390XMOVHstore { 11692 break 11693 } 11694 if x.AuxInt != i-2 { 11695 break 11696 } 11697 if x.Aux != s { 11698 break 11699 } 11700 if p != x.Args[0] { 11701 break 11702 } 11703 x_1 := x.Args[1] 11704 if x_1.Op != OpS390XSRDconst { 11705 break 11706 } 11707 if x_1.AuxInt != 16 { 11708 break 11709 } 11710 if w != x_1.Args[0] { 11711 break 11712 } 11713 mem := x.Args[2] 11714 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11715 break 11716 } 11717 v.reset(OpS390XMOVWstore) 11718 v.AuxInt = i - 2 11719 v.Aux = s 11720 v.AddArg(p) 11721 v.AddArg(w) 11722 v.AddArg(mem) 11723 return true 11724 } 11725 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 11726 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11727 // result: (MOVWstore [i-2] {s} p w0 mem) 11728 for { 11729 i := v.AuxInt 11730 s := v.Aux 11731 p := v.Args[0] 11732 w0 := v.Args[1] 11733 if w0.Op != OpS390XSRDconst { 11734 break 11735 } 11736 j := w0.AuxInt 11737 w := w0.Args[0] 11738 x := v.Args[2] 11739 if x.Op != OpS390XMOVHstore { 11740 break 11741 } 11742 if x.AuxInt != i-2 { 11743 break 11744 } 11745 if x.Aux != s { 11746 break 11747 } 11748 if p != x.Args[0] { 11749 break 11750 } 11751 x_1 := x.Args[1] 11752 if x_1.Op != OpS390XSRDconst { 11753 break 11754 } 11755 if x_1.AuxInt != j+16 { 11756 break 11757 } 11758 if w != x_1.Args[0] { 11759 break 11760 } 11761 mem := x.Args[2] 11762 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11763 break 11764 } 11765 v.reset(OpS390XMOVWstore) 11766 v.AuxInt = i - 2 11767 v.Aux = s 11768 v.AddArg(p) 11769 v.AddArg(w0) 11770 v.AddArg(mem) 11771 return true 11772 } 11773 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 11774 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11775 // result: (MOVWstore [i-2] {s} p w mem) 11776 for { 11777 i := v.AuxInt 11778 s := v.Aux 11779 p := v.Args[0] 11780 w := v.Args[1] 11781 x := v.Args[2] 11782 if x.Op != OpS390XMOVHstore { 11783 break 11784 } 11785 if x.AuxInt != i-2 { 11786 break 11787 } 11788 if x.Aux != s { 11789 break 11790 } 11791 if p != x.Args[0] { 11792 break 11793 } 11794 x_1 := x.Args[1] 11795 if x_1.Op != OpS390XSRWconst { 11796 break 11797 } 11798 if x_1.AuxInt != 16 { 11799 break 11800 } 11801 if w != x_1.Args[0] { 11802 break 11803 } 11804 mem := x.Args[2] 11805 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11806 break 11807 } 11808 v.reset(OpS390XMOVWstore) 11809 v.AuxInt = i - 2 11810 v.Aux = s 11811 v.AddArg(p) 11812 v.AddArg(w) 11813 v.AddArg(mem) 11814 return true 11815 } 11816 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 11817 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11818 // result: (MOVWstore [i-2] {s} p w0 mem) 11819 for { 11820 i := v.AuxInt 11821 s := v.Aux 11822 p := v.Args[0] 11823 w0 := v.Args[1] 11824 if w0.Op != OpS390XSRWconst { 11825 break 11826 } 11827 j := w0.AuxInt 11828 w := w0.Args[0] 11829 x := v.Args[2] 11830 if x.Op != OpS390XMOVHstore { 11831 break 11832 } 11833 if x.AuxInt != i-2 { 11834 break 11835 } 11836 if x.Aux != s { 11837 break 11838 } 11839 if p != x.Args[0] { 11840 break 11841 } 11842 x_1 := x.Args[1] 11843 if x_1.Op != OpS390XSRWconst { 11844 break 11845 } 11846 if x_1.AuxInt != j+16 { 11847 break 11848 } 11849 if w != x_1.Args[0] { 11850 break 11851 } 11852 mem := x.Args[2] 11853 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11854 break 11855 } 11856 v.reset(OpS390XMOVWstore) 11857 v.AuxInt = i - 2 11858 v.Aux = s 11859 v.AddArg(p) 11860 v.AddArg(w0) 11861 v.AddArg(mem) 11862 return true 11863 } 11864 return false 11865 } 11866 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 11867 b := v.Block 11868 _ = b 11869 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11870 // cond: ValAndOff(sc).canAdd(off) 11871 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11872 for { 11873 sc := v.AuxInt 11874 s := v.Aux 11875 v_0 := v.Args[0] 11876 if v_0.Op != OpS390XADDconst { 11877 break 11878 } 11879 off := v_0.AuxInt 11880 ptr := v_0.Args[0] 11881 mem := v.Args[1] 11882 if !(ValAndOff(sc).canAdd(off)) { 11883 break 11884 } 11885 v.reset(OpS390XMOVHstoreconst) 11886 v.AuxInt = ValAndOff(sc).add(off) 11887 v.Aux = s 11888 v.AddArg(ptr) 11889 v.AddArg(mem) 11890 return true 11891 } 11892 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11893 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11894 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11895 for { 11896 sc := v.AuxInt 11897 sym1 := v.Aux 11898 v_0 := v.Args[0] 11899 if v_0.Op != OpS390XMOVDaddr { 11900 break 11901 } 11902 off := v_0.AuxInt 11903 sym2 := v_0.Aux 11904 ptr := v_0.Args[0] 11905 mem := v.Args[1] 11906 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11907 break 11908 } 11909 v.reset(OpS390XMOVHstoreconst) 11910 v.AuxInt = ValAndOff(sc).add(off) 11911 v.Aux = mergeSym(sym1, sym2) 11912 v.AddArg(ptr) 11913 v.AddArg(mem) 11914 return true 11915 } 11916 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 11917 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 11918 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 11919 for { 11920 c := v.AuxInt 11921 s := v.Aux 11922 p := v.Args[0] 11923 x := v.Args[1] 11924 if x.Op != OpS390XMOVHstoreconst { 11925 break 11926 } 11927 a := x.AuxInt 11928 if x.Aux != s { 11929 break 11930 } 11931 if p != x.Args[0] { 11932 break 11933 } 11934 mem := x.Args[1] 11935 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 11936 break 11937 } 11938 v.reset(OpS390XMOVWstoreconst) 11939 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 11940 v.Aux = s 11941 v.AddArg(p) 11942 v.AddArg(mem) 11943 return true 11944 } 11945 return false 11946 } 11947 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 11948 b := v.Block 11949 _ = b 11950 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11951 // cond: 11952 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11953 for { 11954 c := v.AuxInt 11955 sym := v.Aux 11956 v_0 := v.Args[0] 11957 if v_0.Op != OpS390XADDconst { 11958 break 11959 } 11960 d := v_0.AuxInt 11961 ptr := v_0.Args[0] 11962 idx := v.Args[1] 11963 val := v.Args[2] 11964 mem := v.Args[3] 11965 v.reset(OpS390XMOVHstoreidx) 11966 v.AuxInt = c + d 11967 v.Aux = sym 11968 v.AddArg(ptr) 11969 v.AddArg(idx) 11970 v.AddArg(val) 11971 v.AddArg(mem) 11972 return true 11973 } 11974 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11975 // cond: 11976 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11977 for { 11978 c := v.AuxInt 11979 sym := v.Aux 11980 ptr := v.Args[0] 11981 v_1 := v.Args[1] 11982 if v_1.Op != OpS390XADDconst { 11983 break 11984 } 11985 d := v_1.AuxInt 11986 idx := v_1.Args[0] 11987 val := v.Args[2] 11988 mem := v.Args[3] 11989 v.reset(OpS390XMOVHstoreidx) 11990 v.AuxInt = c + d 11991 v.Aux = sym 11992 v.AddArg(ptr) 11993 v.AddArg(idx) 11994 v.AddArg(val) 11995 v.AddArg(mem) 11996 return true 11997 } 11998 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 11999 // cond: x.Uses == 1 && clobber(x) 12000 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12001 for { 12002 i := v.AuxInt 12003 s := v.Aux 12004 p := v.Args[0] 12005 idx := v.Args[1] 12006 w := v.Args[2] 12007 x := v.Args[3] 12008 if x.Op != OpS390XMOVHstoreidx { 12009 break 12010 } 12011 if x.AuxInt != i-2 { 12012 break 12013 } 12014 if x.Aux != s { 12015 break 12016 } 12017 if p != x.Args[0] { 12018 break 12019 } 12020 if idx != x.Args[1] { 12021 break 12022 } 12023 x_2 := x.Args[2] 12024 if x_2.Op != OpS390XSRDconst { 12025 break 12026 } 12027 if x_2.AuxInt != 16 { 12028 break 12029 } 12030 if w != x_2.Args[0] { 12031 break 12032 } 12033 mem := x.Args[3] 12034 if !(x.Uses == 1 && clobber(x)) { 12035 break 12036 } 12037 v.reset(OpS390XMOVWstoreidx) 12038 v.AuxInt = i - 2 12039 v.Aux = s 12040 v.AddArg(p) 12041 v.AddArg(idx) 12042 v.AddArg(w) 12043 v.AddArg(mem) 12044 return true 12045 } 12046 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 12047 // cond: x.Uses == 1 && clobber(x) 12048 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12049 for { 12050 i := v.AuxInt 12051 s := v.Aux 12052 p := v.Args[0] 12053 idx := v.Args[1] 12054 w0 := v.Args[2] 12055 if w0.Op != OpS390XSRDconst { 12056 break 12057 } 12058 j := w0.AuxInt 12059 w := w0.Args[0] 12060 x := v.Args[3] 12061 if x.Op != OpS390XMOVHstoreidx { 12062 break 12063 } 12064 if x.AuxInt != i-2 { 12065 break 12066 } 12067 if x.Aux != s { 12068 break 12069 } 12070 if p != x.Args[0] { 12071 break 12072 } 12073 if idx != x.Args[1] { 12074 break 12075 } 12076 x_2 := x.Args[2] 12077 if x_2.Op != OpS390XSRDconst { 12078 break 12079 } 12080 if x_2.AuxInt != j+16 { 12081 break 12082 } 12083 if w != x_2.Args[0] { 12084 break 12085 } 12086 mem := x.Args[3] 12087 if !(x.Uses == 1 && clobber(x)) { 12088 break 12089 } 12090 v.reset(OpS390XMOVWstoreidx) 12091 v.AuxInt = i - 2 12092 v.Aux = s 12093 v.AddArg(p) 12094 v.AddArg(idx) 12095 v.AddArg(w0) 12096 v.AddArg(mem) 12097 return true 12098 } 12099 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12100 // cond: x.Uses == 1 && clobber(x) 12101 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12102 for { 12103 i := v.AuxInt 12104 s := v.Aux 12105 p := v.Args[0] 12106 idx := v.Args[1] 12107 w := v.Args[2] 12108 x := v.Args[3] 12109 if x.Op != OpS390XMOVHstoreidx { 12110 break 12111 } 12112 if x.AuxInt != i-2 { 12113 break 12114 } 12115 if x.Aux != s { 12116 break 12117 } 12118 if p != x.Args[0] { 12119 break 12120 } 12121 if idx != x.Args[1] { 12122 break 12123 } 12124 x_2 := x.Args[2] 12125 if x_2.Op != OpS390XSRWconst { 12126 break 12127 } 12128 if x_2.AuxInt != 16 { 12129 break 12130 } 12131 if w != x_2.Args[0] { 12132 break 12133 } 12134 mem := x.Args[3] 12135 if !(x.Uses == 1 && clobber(x)) { 12136 break 12137 } 12138 v.reset(OpS390XMOVWstoreidx) 12139 v.AuxInt = i - 2 12140 v.Aux = s 12141 v.AddArg(p) 12142 v.AddArg(idx) 12143 v.AddArg(w) 12144 v.AddArg(mem) 12145 return true 12146 } 12147 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12148 // cond: x.Uses == 1 && clobber(x) 12149 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12150 for { 12151 i := v.AuxInt 12152 s := v.Aux 12153 p := v.Args[0] 12154 idx := v.Args[1] 12155 w0 := v.Args[2] 12156 if w0.Op != OpS390XSRWconst { 12157 break 12158 } 12159 j := w0.AuxInt 12160 w := w0.Args[0] 12161 x := v.Args[3] 12162 if x.Op != OpS390XMOVHstoreidx { 12163 break 12164 } 12165 if x.AuxInt != i-2 { 12166 break 12167 } 12168 if x.Aux != s { 12169 break 12170 } 12171 if p != x.Args[0] { 12172 break 12173 } 12174 if idx != x.Args[1] { 12175 break 12176 } 12177 x_2 := x.Args[2] 12178 if x_2.Op != OpS390XSRWconst { 12179 break 12180 } 12181 if x_2.AuxInt != j+16 { 12182 break 12183 } 12184 if w != x_2.Args[0] { 12185 break 12186 } 12187 mem := x.Args[3] 12188 if !(x.Uses == 1 && clobber(x)) { 12189 break 12190 } 12191 v.reset(OpS390XMOVWstoreidx) 12192 v.AuxInt = i - 2 12193 v.Aux = s 12194 v.AddArg(p) 12195 v.AddArg(idx) 12196 v.AddArg(w0) 12197 v.AddArg(mem) 12198 return true 12199 } 12200 return false 12201 } 12202 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12203 b := v.Block 12204 _ = b 12205 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12206 // cond: x.Uses == 1 && clobber(x) 12207 // result: (MOVDBRstore [i-4] {s} p w mem) 12208 for { 12209 i := v.AuxInt 12210 s := v.Aux 12211 p := v.Args[0] 12212 v_1 := v.Args[1] 12213 if v_1.Op != OpS390XSRDconst { 12214 break 12215 } 12216 if v_1.AuxInt != 32 { 12217 break 12218 } 12219 w := v_1.Args[0] 12220 x := v.Args[2] 12221 if x.Op != OpS390XMOVWBRstore { 12222 break 12223 } 12224 if x.AuxInt != i-4 { 12225 break 12226 } 12227 if x.Aux != s { 12228 break 12229 } 12230 if p != x.Args[0] { 12231 break 12232 } 12233 if w != x.Args[1] { 12234 break 12235 } 12236 mem := x.Args[2] 12237 if !(x.Uses == 1 && clobber(x)) { 12238 break 12239 } 12240 v.reset(OpS390XMOVDBRstore) 12241 v.AuxInt = i - 4 12242 v.Aux = s 12243 v.AddArg(p) 12244 v.AddArg(w) 12245 v.AddArg(mem) 12246 return true 12247 } 12248 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12249 // cond: x.Uses == 1 && clobber(x) 12250 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12251 for { 12252 i := v.AuxInt 12253 s := v.Aux 12254 p := v.Args[0] 12255 v_1 := v.Args[1] 12256 if v_1.Op != OpS390XSRDconst { 12257 break 12258 } 12259 j := v_1.AuxInt 12260 w := v_1.Args[0] 12261 x := v.Args[2] 12262 if x.Op != OpS390XMOVWBRstore { 12263 break 12264 } 12265 if x.AuxInt != i-4 { 12266 break 12267 } 12268 if x.Aux != s { 12269 break 12270 } 12271 if p != x.Args[0] { 12272 break 12273 } 12274 w0 := x.Args[1] 12275 if w0.Op != OpS390XSRDconst { 12276 break 12277 } 12278 if w0.AuxInt != j-32 { 12279 break 12280 } 12281 if w != w0.Args[0] { 12282 break 12283 } 12284 mem := x.Args[2] 12285 if !(x.Uses == 1 && clobber(x)) { 12286 break 12287 } 12288 v.reset(OpS390XMOVDBRstore) 12289 v.AuxInt = i - 4 12290 v.Aux = s 12291 v.AddArg(p) 12292 v.AddArg(w0) 12293 v.AddArg(mem) 12294 return true 12295 } 12296 return false 12297 } 12298 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12299 b := v.Block 12300 _ = b 12301 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12302 // cond: x.Uses == 1 && clobber(x) 12303 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12304 for { 12305 i := v.AuxInt 12306 s := v.Aux 12307 p := v.Args[0] 12308 idx := v.Args[1] 12309 v_2 := v.Args[2] 12310 if v_2.Op != OpS390XSRDconst { 12311 break 12312 } 12313 if v_2.AuxInt != 32 { 12314 break 12315 } 12316 w := v_2.Args[0] 12317 x := v.Args[3] 12318 if x.Op != OpS390XMOVWBRstoreidx { 12319 break 12320 } 12321 if x.AuxInt != i-4 { 12322 break 12323 } 12324 if x.Aux != s { 12325 break 12326 } 12327 if p != x.Args[0] { 12328 break 12329 } 12330 if idx != x.Args[1] { 12331 break 12332 } 12333 if w != x.Args[2] { 12334 break 12335 } 12336 mem := x.Args[3] 12337 if !(x.Uses == 1 && clobber(x)) { 12338 break 12339 } 12340 v.reset(OpS390XMOVDBRstoreidx) 12341 v.AuxInt = i - 4 12342 v.Aux = s 12343 v.AddArg(p) 12344 v.AddArg(idx) 12345 v.AddArg(w) 12346 v.AddArg(mem) 12347 return true 12348 } 12349 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 12350 // cond: x.Uses == 1 && clobber(x) 12351 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 12352 for { 12353 i := v.AuxInt 12354 s := v.Aux 12355 p := v.Args[0] 12356 idx := v.Args[1] 12357 v_2 := v.Args[2] 12358 if v_2.Op != OpS390XSRDconst { 12359 break 12360 } 12361 j := v_2.AuxInt 12362 w := v_2.Args[0] 12363 x := v.Args[3] 12364 if x.Op != OpS390XMOVWBRstoreidx { 12365 break 12366 } 12367 if x.AuxInt != i-4 { 12368 break 12369 } 12370 if x.Aux != s { 12371 break 12372 } 12373 if p != x.Args[0] { 12374 break 12375 } 12376 if idx != x.Args[1] { 12377 break 12378 } 12379 w0 := x.Args[2] 12380 if w0.Op != OpS390XSRDconst { 12381 break 12382 } 12383 if w0.AuxInt != j-32 { 12384 break 12385 } 12386 if w != w0.Args[0] { 12387 break 12388 } 12389 mem := x.Args[3] 12390 if !(x.Uses == 1 && clobber(x)) { 12391 break 12392 } 12393 v.reset(OpS390XMOVDBRstoreidx) 12394 v.AuxInt = i - 4 12395 v.Aux = s 12396 v.AddArg(p) 12397 v.AddArg(idx) 12398 v.AddArg(w0) 12399 v.AddArg(mem) 12400 return true 12401 } 12402 return false 12403 } 12404 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 12405 b := v.Block 12406 _ = b 12407 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 12408 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 12409 // result: (MOVWZreg x) 12410 for { 12411 off := v.AuxInt 12412 sym := v.Aux 12413 ptr := v.Args[0] 12414 v_1 := v.Args[1] 12415 if v_1.Op != OpS390XMOVWstore { 12416 break 12417 } 12418 off2 := v_1.AuxInt 12419 sym2 := v_1.Aux 12420 ptr2 := v_1.Args[0] 12421 x := v_1.Args[1] 12422 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 12423 break 12424 } 12425 v.reset(OpS390XMOVWZreg) 12426 v.AddArg(x) 12427 return true 12428 } 12429 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 12430 // cond: is20Bit(off1+off2) 12431 // result: (MOVWZload [off1+off2] {sym} ptr mem) 12432 for { 12433 off1 := v.AuxInt 12434 sym := v.Aux 12435 v_0 := v.Args[0] 12436 if v_0.Op != OpS390XADDconst { 12437 break 12438 } 12439 off2 := v_0.AuxInt 12440 ptr := v_0.Args[0] 12441 mem := v.Args[1] 12442 if !(is20Bit(off1 + off2)) { 12443 break 12444 } 12445 v.reset(OpS390XMOVWZload) 12446 v.AuxInt = off1 + off2 12447 v.Aux = sym 12448 v.AddArg(ptr) 12449 v.AddArg(mem) 12450 return true 12451 } 12452 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12453 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12454 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12455 for { 12456 off1 := v.AuxInt 12457 sym1 := v.Aux 12458 v_0 := v.Args[0] 12459 if v_0.Op != OpS390XMOVDaddr { 12460 break 12461 } 12462 off2 := v_0.AuxInt 12463 sym2 := v_0.Aux 12464 base := v_0.Args[0] 12465 mem := v.Args[1] 12466 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12467 break 12468 } 12469 v.reset(OpS390XMOVWZload) 12470 v.AuxInt = off1 + off2 12471 v.Aux = mergeSym(sym1, sym2) 12472 v.AddArg(base) 12473 v.AddArg(mem) 12474 return true 12475 } 12476 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 12477 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12478 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 12479 for { 12480 off1 := v.AuxInt 12481 sym1 := v.Aux 12482 v_0 := v.Args[0] 12483 if v_0.Op != OpS390XMOVDaddridx { 12484 break 12485 } 12486 off2 := v_0.AuxInt 12487 sym2 := v_0.Aux 12488 ptr := v_0.Args[0] 12489 idx := v_0.Args[1] 12490 mem := v.Args[1] 12491 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12492 break 12493 } 12494 v.reset(OpS390XMOVWZloadidx) 12495 v.AuxInt = off1 + off2 12496 v.Aux = mergeSym(sym1, sym2) 12497 v.AddArg(ptr) 12498 v.AddArg(idx) 12499 v.AddArg(mem) 12500 return true 12501 } 12502 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 12503 // cond: ptr.Op != OpSB 12504 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 12505 for { 12506 off := v.AuxInt 12507 sym := v.Aux 12508 v_0 := v.Args[0] 12509 if v_0.Op != OpS390XADD { 12510 break 12511 } 12512 ptr := v_0.Args[0] 12513 idx := v_0.Args[1] 12514 mem := v.Args[1] 12515 if !(ptr.Op != OpSB) { 12516 break 12517 } 12518 v.reset(OpS390XMOVWZloadidx) 12519 v.AuxInt = off 12520 v.Aux = sym 12521 v.AddArg(ptr) 12522 v.AddArg(idx) 12523 v.AddArg(mem) 12524 return true 12525 } 12526 return false 12527 } 12528 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 12529 b := v.Block 12530 _ = b 12531 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 12532 // cond: 12533 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12534 for { 12535 c := v.AuxInt 12536 sym := v.Aux 12537 v_0 := v.Args[0] 12538 if v_0.Op != OpS390XADDconst { 12539 break 12540 } 12541 d := v_0.AuxInt 12542 ptr := v_0.Args[0] 12543 idx := v.Args[1] 12544 mem := v.Args[2] 12545 v.reset(OpS390XMOVWZloadidx) 12546 v.AuxInt = c + d 12547 v.Aux = sym 12548 v.AddArg(ptr) 12549 v.AddArg(idx) 12550 v.AddArg(mem) 12551 return true 12552 } 12553 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 12554 // cond: 12555 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12556 for { 12557 c := v.AuxInt 12558 sym := v.Aux 12559 ptr := v.Args[0] 12560 v_1 := v.Args[1] 12561 if v_1.Op != OpS390XADDconst { 12562 break 12563 } 12564 d := v_1.AuxInt 12565 idx := v_1.Args[0] 12566 mem := v.Args[2] 12567 v.reset(OpS390XMOVWZloadidx) 12568 v.AuxInt = c + d 12569 v.Aux = sym 12570 v.AddArg(ptr) 12571 v.AddArg(idx) 12572 v.AddArg(mem) 12573 return true 12574 } 12575 return false 12576 } 12577 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 12578 b := v.Block 12579 _ = b 12580 // match: (MOVWZreg x:(MOVBZload _ _)) 12581 // cond: 12582 // result: (MOVDreg x) 12583 for { 12584 x := v.Args[0] 12585 if x.Op != OpS390XMOVBZload { 12586 break 12587 } 12588 v.reset(OpS390XMOVDreg) 12589 v.AddArg(x) 12590 return true 12591 } 12592 // match: (MOVWZreg x:(MOVHZload _ _)) 12593 // cond: 12594 // result: (MOVDreg x) 12595 for { 12596 x := v.Args[0] 12597 if x.Op != OpS390XMOVHZload { 12598 break 12599 } 12600 v.reset(OpS390XMOVDreg) 12601 v.AddArg(x) 12602 return true 12603 } 12604 // match: (MOVWZreg x:(MOVWZload _ _)) 12605 // cond: 12606 // result: (MOVDreg x) 12607 for { 12608 x := v.Args[0] 12609 if x.Op != OpS390XMOVWZload { 12610 break 12611 } 12612 v.reset(OpS390XMOVDreg) 12613 v.AddArg(x) 12614 return true 12615 } 12616 // match: (MOVWZreg x:(Arg <t>)) 12617 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 12618 // result: (MOVDreg x) 12619 for { 12620 x := v.Args[0] 12621 if x.Op != OpArg { 12622 break 12623 } 12624 t := x.Type 12625 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 12626 break 12627 } 12628 v.reset(OpS390XMOVDreg) 12629 v.AddArg(x) 12630 return true 12631 } 12632 // match: (MOVWZreg x:(MOVBZreg _)) 12633 // cond: 12634 // result: (MOVDreg x) 12635 for { 12636 x := v.Args[0] 12637 if x.Op != OpS390XMOVBZreg { 12638 break 12639 } 12640 v.reset(OpS390XMOVDreg) 12641 v.AddArg(x) 12642 return true 12643 } 12644 // match: (MOVWZreg x:(MOVHZreg _)) 12645 // cond: 12646 // result: (MOVDreg x) 12647 for { 12648 x := v.Args[0] 12649 if x.Op != OpS390XMOVHZreg { 12650 break 12651 } 12652 v.reset(OpS390XMOVDreg) 12653 v.AddArg(x) 12654 return true 12655 } 12656 // match: (MOVWZreg x:(MOVWZreg _)) 12657 // cond: 12658 // result: (MOVDreg x) 12659 for { 12660 x := v.Args[0] 12661 if x.Op != OpS390XMOVWZreg { 12662 break 12663 } 12664 v.reset(OpS390XMOVDreg) 12665 v.AddArg(x) 12666 return true 12667 } 12668 // match: (MOVWZreg (MOVDconst [c])) 12669 // cond: 12670 // result: (MOVDconst [int64(uint32(c))]) 12671 for { 12672 v_0 := v.Args[0] 12673 if v_0.Op != OpS390XMOVDconst { 12674 break 12675 } 12676 c := v_0.AuxInt 12677 v.reset(OpS390XMOVDconst) 12678 v.AuxInt = int64(uint32(c)) 12679 return true 12680 } 12681 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 12682 // cond: x.Uses == 1 && clobber(x) 12683 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 12684 for { 12685 x := v.Args[0] 12686 if x.Op != OpS390XMOVWZload { 12687 break 12688 } 12689 off := x.AuxInt 12690 sym := x.Aux 12691 ptr := x.Args[0] 12692 mem := x.Args[1] 12693 if !(x.Uses == 1 && clobber(x)) { 12694 break 12695 } 12696 b = x.Block 12697 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, v.Type) 12698 v.reset(OpCopy) 12699 v.AddArg(v0) 12700 v0.AuxInt = off 12701 v0.Aux = sym 12702 v0.AddArg(ptr) 12703 v0.AddArg(mem) 12704 return true 12705 } 12706 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 12707 // cond: x.Uses == 1 && clobber(x) 12708 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 12709 for { 12710 x := v.Args[0] 12711 if x.Op != OpS390XMOVWZloadidx { 12712 break 12713 } 12714 off := x.AuxInt 12715 sym := x.Aux 12716 ptr := x.Args[0] 12717 idx := x.Args[1] 12718 mem := x.Args[2] 12719 if !(x.Uses == 1 && clobber(x)) { 12720 break 12721 } 12722 b = x.Block 12723 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 12724 v.reset(OpCopy) 12725 v.AddArg(v0) 12726 v0.AuxInt = off 12727 v0.Aux = sym 12728 v0.AddArg(ptr) 12729 v0.AddArg(idx) 12730 v0.AddArg(mem) 12731 return true 12732 } 12733 return false 12734 } 12735 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 12736 b := v.Block 12737 _ = b 12738 // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 12739 // cond: is20Bit(off1+off2) 12740 // result: (MOVWload [off1+off2] {sym} ptr mem) 12741 for { 12742 off1 := v.AuxInt 12743 sym := v.Aux 12744 v_0 := v.Args[0] 12745 if v_0.Op != OpS390XADDconst { 12746 break 12747 } 12748 off2 := v_0.AuxInt 12749 ptr := v_0.Args[0] 12750 mem := v.Args[1] 12751 if !(is20Bit(off1 + off2)) { 12752 break 12753 } 12754 v.reset(OpS390XMOVWload) 12755 v.AuxInt = off1 + off2 12756 v.Aux = sym 12757 v.AddArg(ptr) 12758 v.AddArg(mem) 12759 return true 12760 } 12761 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12762 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12763 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12764 for { 12765 off1 := v.AuxInt 12766 sym1 := v.Aux 12767 v_0 := v.Args[0] 12768 if v_0.Op != OpS390XMOVDaddr { 12769 break 12770 } 12771 off2 := v_0.AuxInt 12772 sym2 := v_0.Aux 12773 base := v_0.Args[0] 12774 mem := v.Args[1] 12775 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12776 break 12777 } 12778 v.reset(OpS390XMOVWload) 12779 v.AuxInt = off1 + off2 12780 v.Aux = mergeSym(sym1, sym2) 12781 v.AddArg(base) 12782 v.AddArg(mem) 12783 return true 12784 } 12785 return false 12786 } 12787 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 12788 b := v.Block 12789 _ = b 12790 // match: (MOVWreg x:(MOVBload _ _)) 12791 // cond: 12792 // result: (MOVDreg x) 12793 for { 12794 x := v.Args[0] 12795 if x.Op != OpS390XMOVBload { 12796 break 12797 } 12798 v.reset(OpS390XMOVDreg) 12799 v.AddArg(x) 12800 return true 12801 } 12802 // match: (MOVWreg x:(MOVBZload _ _)) 12803 // cond: 12804 // result: (MOVDreg x) 12805 for { 12806 x := v.Args[0] 12807 if x.Op != OpS390XMOVBZload { 12808 break 12809 } 12810 v.reset(OpS390XMOVDreg) 12811 v.AddArg(x) 12812 return true 12813 } 12814 // match: (MOVWreg x:(MOVHload _ _)) 12815 // cond: 12816 // result: (MOVDreg x) 12817 for { 12818 x := v.Args[0] 12819 if x.Op != OpS390XMOVHload { 12820 break 12821 } 12822 v.reset(OpS390XMOVDreg) 12823 v.AddArg(x) 12824 return true 12825 } 12826 // match: (MOVWreg x:(MOVHZload _ _)) 12827 // cond: 12828 // result: (MOVDreg x) 12829 for { 12830 x := v.Args[0] 12831 if x.Op != OpS390XMOVHZload { 12832 break 12833 } 12834 v.reset(OpS390XMOVDreg) 12835 v.AddArg(x) 12836 return true 12837 } 12838 // match: (MOVWreg x:(MOVWload _ _)) 12839 // cond: 12840 // result: (MOVDreg x) 12841 for { 12842 x := v.Args[0] 12843 if x.Op != OpS390XMOVWload { 12844 break 12845 } 12846 v.reset(OpS390XMOVDreg) 12847 v.AddArg(x) 12848 return true 12849 } 12850 // match: (MOVWreg x:(Arg <t>)) 12851 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 12852 // result: (MOVDreg x) 12853 for { 12854 x := v.Args[0] 12855 if x.Op != OpArg { 12856 break 12857 } 12858 t := x.Type 12859 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 12860 break 12861 } 12862 v.reset(OpS390XMOVDreg) 12863 v.AddArg(x) 12864 return true 12865 } 12866 // match: (MOVWreg x:(MOVBreg _)) 12867 // cond: 12868 // result: (MOVDreg x) 12869 for { 12870 x := v.Args[0] 12871 if x.Op != OpS390XMOVBreg { 12872 break 12873 } 12874 v.reset(OpS390XMOVDreg) 12875 v.AddArg(x) 12876 return true 12877 } 12878 // match: (MOVWreg x:(MOVBZreg _)) 12879 // cond: 12880 // result: (MOVDreg x) 12881 for { 12882 x := v.Args[0] 12883 if x.Op != OpS390XMOVBZreg { 12884 break 12885 } 12886 v.reset(OpS390XMOVDreg) 12887 v.AddArg(x) 12888 return true 12889 } 12890 // match: (MOVWreg x:(MOVHreg _)) 12891 // cond: 12892 // result: (MOVDreg x) 12893 for { 12894 x := v.Args[0] 12895 if x.Op != OpS390XMOVHreg { 12896 break 12897 } 12898 v.reset(OpS390XMOVDreg) 12899 v.AddArg(x) 12900 return true 12901 } 12902 // match: (MOVWreg x:(MOVHreg _)) 12903 // cond: 12904 // result: (MOVDreg x) 12905 for { 12906 x := v.Args[0] 12907 if x.Op != OpS390XMOVHreg { 12908 break 12909 } 12910 v.reset(OpS390XMOVDreg) 12911 v.AddArg(x) 12912 return true 12913 } 12914 // match: (MOVWreg x:(MOVWreg _)) 12915 // cond: 12916 // result: (MOVDreg x) 12917 for { 12918 x := v.Args[0] 12919 if x.Op != OpS390XMOVWreg { 12920 break 12921 } 12922 v.reset(OpS390XMOVDreg) 12923 v.AddArg(x) 12924 return true 12925 } 12926 // match: (MOVWreg (MOVDconst [c])) 12927 // cond: 12928 // result: (MOVDconst [int64(int32(c))]) 12929 for { 12930 v_0 := v.Args[0] 12931 if v_0.Op != OpS390XMOVDconst { 12932 break 12933 } 12934 c := v_0.AuxInt 12935 v.reset(OpS390XMOVDconst) 12936 v.AuxInt = int64(int32(c)) 12937 return true 12938 } 12939 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 12940 // cond: x.Uses == 1 && clobber(x) 12941 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 12942 for { 12943 x := v.Args[0] 12944 if x.Op != OpS390XMOVWZload { 12945 break 12946 } 12947 off := x.AuxInt 12948 sym := x.Aux 12949 ptr := x.Args[0] 12950 mem := x.Args[1] 12951 if !(x.Uses == 1 && clobber(x)) { 12952 break 12953 } 12954 b = x.Block 12955 v0 := b.NewValue0(v.Line, OpS390XMOVWload, v.Type) 12956 v.reset(OpCopy) 12957 v.AddArg(v0) 12958 v0.AuxInt = off 12959 v0.Aux = sym 12960 v0.AddArg(ptr) 12961 v0.AddArg(mem) 12962 return true 12963 } 12964 return false 12965 } 12966 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 12967 b := v.Block 12968 _ = b 12969 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 12970 // cond: 12971 // result: (MOVWstore [off] {sym} ptr x mem) 12972 for { 12973 off := v.AuxInt 12974 sym := v.Aux 12975 ptr := v.Args[0] 12976 v_1 := v.Args[1] 12977 if v_1.Op != OpS390XMOVWreg { 12978 break 12979 } 12980 x := v_1.Args[0] 12981 mem := v.Args[2] 12982 v.reset(OpS390XMOVWstore) 12983 v.AuxInt = off 12984 v.Aux = sym 12985 v.AddArg(ptr) 12986 v.AddArg(x) 12987 v.AddArg(mem) 12988 return true 12989 } 12990 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 12991 // cond: 12992 // result: (MOVWstore [off] {sym} ptr x mem) 12993 for { 12994 off := v.AuxInt 12995 sym := v.Aux 12996 ptr := v.Args[0] 12997 v_1 := v.Args[1] 12998 if v_1.Op != OpS390XMOVWZreg { 12999 break 13000 } 13001 x := v_1.Args[0] 13002 mem := v.Args[2] 13003 v.reset(OpS390XMOVWstore) 13004 v.AuxInt = off 13005 v.Aux = sym 13006 v.AddArg(ptr) 13007 v.AddArg(x) 13008 v.AddArg(mem) 13009 return true 13010 } 13011 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 13012 // cond: is20Bit(off1+off2) 13013 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 13014 for { 13015 off1 := v.AuxInt 13016 sym := v.Aux 13017 v_0 := v.Args[0] 13018 if v_0.Op != OpS390XADDconst { 13019 break 13020 } 13021 off2 := v_0.AuxInt 13022 ptr := v_0.Args[0] 13023 val := v.Args[1] 13024 mem := v.Args[2] 13025 if !(is20Bit(off1 + off2)) { 13026 break 13027 } 13028 v.reset(OpS390XMOVWstore) 13029 v.AuxInt = off1 + off2 13030 v.Aux = sym 13031 v.AddArg(ptr) 13032 v.AddArg(val) 13033 v.AddArg(mem) 13034 return true 13035 } 13036 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 13037 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 13038 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 13039 for { 13040 off := v.AuxInt 13041 sym := v.Aux 13042 ptr := v.Args[0] 13043 v_1 := v.Args[1] 13044 if v_1.Op != OpS390XMOVDconst { 13045 break 13046 } 13047 c := v_1.AuxInt 13048 mem := v.Args[2] 13049 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 13050 break 13051 } 13052 v.reset(OpS390XMOVWstoreconst) 13053 v.AuxInt = makeValAndOff(int64(int32(c)), off) 13054 v.Aux = sym 13055 v.AddArg(ptr) 13056 v.AddArg(mem) 13057 return true 13058 } 13059 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 13060 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13061 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 13062 for { 13063 off1 := v.AuxInt 13064 sym1 := v.Aux 13065 v_0 := v.Args[0] 13066 if v_0.Op != OpS390XMOVDaddr { 13067 break 13068 } 13069 off2 := v_0.AuxInt 13070 sym2 := v_0.Aux 13071 base := v_0.Args[0] 13072 val := v.Args[1] 13073 mem := v.Args[2] 13074 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13075 break 13076 } 13077 v.reset(OpS390XMOVWstore) 13078 v.AuxInt = off1 + off2 13079 v.Aux = mergeSym(sym1, sym2) 13080 v.AddArg(base) 13081 v.AddArg(val) 13082 v.AddArg(mem) 13083 return true 13084 } 13085 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13086 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13087 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13088 for { 13089 off1 := v.AuxInt 13090 sym1 := v.Aux 13091 v_0 := v.Args[0] 13092 if v_0.Op != OpS390XMOVDaddridx { 13093 break 13094 } 13095 off2 := v_0.AuxInt 13096 sym2 := v_0.Aux 13097 ptr := v_0.Args[0] 13098 idx := v_0.Args[1] 13099 val := v.Args[1] 13100 mem := v.Args[2] 13101 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13102 break 13103 } 13104 v.reset(OpS390XMOVWstoreidx) 13105 v.AuxInt = off1 + off2 13106 v.Aux = mergeSym(sym1, sym2) 13107 v.AddArg(ptr) 13108 v.AddArg(idx) 13109 v.AddArg(val) 13110 v.AddArg(mem) 13111 return true 13112 } 13113 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13114 // cond: ptr.Op != OpSB 13115 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13116 for { 13117 off := v.AuxInt 13118 sym := v.Aux 13119 v_0 := v.Args[0] 13120 if v_0.Op != OpS390XADD { 13121 break 13122 } 13123 ptr := v_0.Args[0] 13124 idx := v_0.Args[1] 13125 val := v.Args[1] 13126 mem := v.Args[2] 13127 if !(ptr.Op != OpSB) { 13128 break 13129 } 13130 v.reset(OpS390XMOVWstoreidx) 13131 v.AuxInt = off 13132 v.Aux = sym 13133 v.AddArg(ptr) 13134 v.AddArg(idx) 13135 v.AddArg(val) 13136 v.AddArg(mem) 13137 return true 13138 } 13139 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13140 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13141 // result: (MOVDstore [i-4] {s} p w mem) 13142 for { 13143 i := v.AuxInt 13144 s := v.Aux 13145 p := v.Args[0] 13146 v_1 := v.Args[1] 13147 if v_1.Op != OpS390XSRDconst { 13148 break 13149 } 13150 if v_1.AuxInt != 32 { 13151 break 13152 } 13153 w := v_1.Args[0] 13154 x := v.Args[2] 13155 if x.Op != OpS390XMOVWstore { 13156 break 13157 } 13158 if x.AuxInt != i-4 { 13159 break 13160 } 13161 if x.Aux != s { 13162 break 13163 } 13164 if p != x.Args[0] { 13165 break 13166 } 13167 if w != x.Args[1] { 13168 break 13169 } 13170 mem := x.Args[2] 13171 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13172 break 13173 } 13174 v.reset(OpS390XMOVDstore) 13175 v.AuxInt = i - 4 13176 v.Aux = s 13177 v.AddArg(p) 13178 v.AddArg(w) 13179 v.AddArg(mem) 13180 return true 13181 } 13182 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13183 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13184 // result: (MOVDstore [i-4] {s} p w0 mem) 13185 for { 13186 i := v.AuxInt 13187 s := v.Aux 13188 p := v.Args[0] 13189 w0 := v.Args[1] 13190 if w0.Op != OpS390XSRDconst { 13191 break 13192 } 13193 j := w0.AuxInt 13194 w := w0.Args[0] 13195 x := v.Args[2] 13196 if x.Op != OpS390XMOVWstore { 13197 break 13198 } 13199 if x.AuxInt != i-4 { 13200 break 13201 } 13202 if x.Aux != s { 13203 break 13204 } 13205 if p != x.Args[0] { 13206 break 13207 } 13208 x_1 := x.Args[1] 13209 if x_1.Op != OpS390XSRDconst { 13210 break 13211 } 13212 if x_1.AuxInt != j+32 { 13213 break 13214 } 13215 if w != x_1.Args[0] { 13216 break 13217 } 13218 mem := x.Args[2] 13219 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13220 break 13221 } 13222 v.reset(OpS390XMOVDstore) 13223 v.AuxInt = i - 4 13224 v.Aux = s 13225 v.AddArg(p) 13226 v.AddArg(w0) 13227 v.AddArg(mem) 13228 return true 13229 } 13230 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13231 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13232 // result: (STM2 [i-4] {s} p w0 w1 mem) 13233 for { 13234 i := v.AuxInt 13235 s := v.Aux 13236 p := v.Args[0] 13237 w1 := v.Args[1] 13238 x := v.Args[2] 13239 if x.Op != OpS390XMOVWstore { 13240 break 13241 } 13242 if x.AuxInt != i-4 { 13243 break 13244 } 13245 if x.Aux != s { 13246 break 13247 } 13248 if p != x.Args[0] { 13249 break 13250 } 13251 w0 := x.Args[1] 13252 mem := x.Args[2] 13253 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13254 break 13255 } 13256 v.reset(OpS390XSTM2) 13257 v.AuxInt = i - 4 13258 v.Aux = s 13259 v.AddArg(p) 13260 v.AddArg(w0) 13261 v.AddArg(w1) 13262 v.AddArg(mem) 13263 return true 13264 } 13265 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13266 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13267 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13268 for { 13269 i := v.AuxInt 13270 s := v.Aux 13271 p := v.Args[0] 13272 w2 := v.Args[1] 13273 x := v.Args[2] 13274 if x.Op != OpS390XSTM2 { 13275 break 13276 } 13277 if x.AuxInt != i-8 { 13278 break 13279 } 13280 if x.Aux != s { 13281 break 13282 } 13283 if p != x.Args[0] { 13284 break 13285 } 13286 w0 := x.Args[1] 13287 w1 := x.Args[2] 13288 mem := x.Args[3] 13289 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13290 break 13291 } 13292 v.reset(OpS390XSTM3) 13293 v.AuxInt = i - 8 13294 v.Aux = s 13295 v.AddArg(p) 13296 v.AddArg(w0) 13297 v.AddArg(w1) 13298 v.AddArg(w2) 13299 v.AddArg(mem) 13300 return true 13301 } 13302 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13303 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13304 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13305 for { 13306 i := v.AuxInt 13307 s := v.Aux 13308 p := v.Args[0] 13309 w3 := v.Args[1] 13310 x := v.Args[2] 13311 if x.Op != OpS390XSTM3 { 13312 break 13313 } 13314 if x.AuxInt != i-12 { 13315 break 13316 } 13317 if x.Aux != s { 13318 break 13319 } 13320 if p != x.Args[0] { 13321 break 13322 } 13323 w0 := x.Args[1] 13324 w1 := x.Args[2] 13325 w2 := x.Args[3] 13326 mem := x.Args[4] 13327 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13328 break 13329 } 13330 v.reset(OpS390XSTM4) 13331 v.AuxInt = i - 12 13332 v.Aux = s 13333 v.AddArg(p) 13334 v.AddArg(w0) 13335 v.AddArg(w1) 13336 v.AddArg(w2) 13337 v.AddArg(w3) 13338 v.AddArg(mem) 13339 return true 13340 } 13341 return false 13342 } 13343 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13344 b := v.Block 13345 _ = b 13346 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13347 // cond: ValAndOff(sc).canAdd(off) 13348 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13349 for { 13350 sc := v.AuxInt 13351 s := v.Aux 13352 v_0 := v.Args[0] 13353 if v_0.Op != OpS390XADDconst { 13354 break 13355 } 13356 off := v_0.AuxInt 13357 ptr := v_0.Args[0] 13358 mem := v.Args[1] 13359 if !(ValAndOff(sc).canAdd(off)) { 13360 break 13361 } 13362 v.reset(OpS390XMOVWstoreconst) 13363 v.AuxInt = ValAndOff(sc).add(off) 13364 v.Aux = s 13365 v.AddArg(ptr) 13366 v.AddArg(mem) 13367 return true 13368 } 13369 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 13370 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 13371 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 13372 for { 13373 sc := v.AuxInt 13374 sym1 := v.Aux 13375 v_0 := v.Args[0] 13376 if v_0.Op != OpS390XMOVDaddr { 13377 break 13378 } 13379 off := v_0.AuxInt 13380 sym2 := v_0.Aux 13381 ptr := v_0.Args[0] 13382 mem := v.Args[1] 13383 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 13384 break 13385 } 13386 v.reset(OpS390XMOVWstoreconst) 13387 v.AuxInt = ValAndOff(sc).add(off) 13388 v.Aux = mergeSym(sym1, sym2) 13389 v.AddArg(ptr) 13390 v.AddArg(mem) 13391 return true 13392 } 13393 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 13394 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 13395 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 13396 for { 13397 c := v.AuxInt 13398 s := v.Aux 13399 p := v.Args[0] 13400 x := v.Args[1] 13401 if x.Op != OpS390XMOVWstoreconst { 13402 break 13403 } 13404 a := x.AuxInt 13405 if x.Aux != s { 13406 break 13407 } 13408 if p != x.Args[0] { 13409 break 13410 } 13411 mem := x.Args[1] 13412 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 13413 break 13414 } 13415 v.reset(OpS390XMOVDstore) 13416 v.AuxInt = ValAndOff(a).Off() 13417 v.Aux = s 13418 v.AddArg(p) 13419 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 13420 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 13421 v.AddArg(v0) 13422 v.AddArg(mem) 13423 return true 13424 } 13425 return false 13426 } 13427 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 13428 b := v.Block 13429 _ = b 13430 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 13431 // cond: 13432 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13433 for { 13434 c := v.AuxInt 13435 sym := v.Aux 13436 v_0 := v.Args[0] 13437 if v_0.Op != OpS390XADDconst { 13438 break 13439 } 13440 d := v_0.AuxInt 13441 ptr := v_0.Args[0] 13442 idx := v.Args[1] 13443 val := v.Args[2] 13444 mem := v.Args[3] 13445 v.reset(OpS390XMOVWstoreidx) 13446 v.AuxInt = c + d 13447 v.Aux = sym 13448 v.AddArg(ptr) 13449 v.AddArg(idx) 13450 v.AddArg(val) 13451 v.AddArg(mem) 13452 return true 13453 } 13454 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 13455 // cond: 13456 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13457 for { 13458 c := v.AuxInt 13459 sym := v.Aux 13460 ptr := v.Args[0] 13461 v_1 := v.Args[1] 13462 if v_1.Op != OpS390XADDconst { 13463 break 13464 } 13465 d := v_1.AuxInt 13466 idx := v_1.Args[0] 13467 val := v.Args[2] 13468 mem := v.Args[3] 13469 v.reset(OpS390XMOVWstoreidx) 13470 v.AuxInt = c + d 13471 v.Aux = sym 13472 v.AddArg(ptr) 13473 v.AddArg(idx) 13474 v.AddArg(val) 13475 v.AddArg(mem) 13476 return true 13477 } 13478 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 13479 // cond: x.Uses == 1 && clobber(x) 13480 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 13481 for { 13482 i := v.AuxInt 13483 s := v.Aux 13484 p := v.Args[0] 13485 idx := v.Args[1] 13486 w := v.Args[2] 13487 x := v.Args[3] 13488 if x.Op != OpS390XMOVWstoreidx { 13489 break 13490 } 13491 if x.AuxInt != i-4 { 13492 break 13493 } 13494 if x.Aux != s { 13495 break 13496 } 13497 if p != x.Args[0] { 13498 break 13499 } 13500 if idx != x.Args[1] { 13501 break 13502 } 13503 x_2 := x.Args[2] 13504 if x_2.Op != OpS390XSRDconst { 13505 break 13506 } 13507 if x_2.AuxInt != 32 { 13508 break 13509 } 13510 if w != x_2.Args[0] { 13511 break 13512 } 13513 mem := x.Args[3] 13514 if !(x.Uses == 1 && clobber(x)) { 13515 break 13516 } 13517 v.reset(OpS390XMOVDstoreidx) 13518 v.AuxInt = i - 4 13519 v.Aux = s 13520 v.AddArg(p) 13521 v.AddArg(idx) 13522 v.AddArg(w) 13523 v.AddArg(mem) 13524 return true 13525 } 13526 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 13527 // cond: x.Uses == 1 && clobber(x) 13528 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 13529 for { 13530 i := v.AuxInt 13531 s := v.Aux 13532 p := v.Args[0] 13533 idx := v.Args[1] 13534 w0 := v.Args[2] 13535 if w0.Op != OpS390XSRDconst { 13536 break 13537 } 13538 j := w0.AuxInt 13539 w := w0.Args[0] 13540 x := v.Args[3] 13541 if x.Op != OpS390XMOVWstoreidx { 13542 break 13543 } 13544 if x.AuxInt != i-4 { 13545 break 13546 } 13547 if x.Aux != s { 13548 break 13549 } 13550 if p != x.Args[0] { 13551 break 13552 } 13553 if idx != x.Args[1] { 13554 break 13555 } 13556 x_2 := x.Args[2] 13557 if x_2.Op != OpS390XSRDconst { 13558 break 13559 } 13560 if x_2.AuxInt != j+32 { 13561 break 13562 } 13563 if w != x_2.Args[0] { 13564 break 13565 } 13566 mem := x.Args[3] 13567 if !(x.Uses == 1 && clobber(x)) { 13568 break 13569 } 13570 v.reset(OpS390XMOVDstoreidx) 13571 v.AuxInt = i - 4 13572 v.Aux = s 13573 v.AddArg(p) 13574 v.AddArg(idx) 13575 v.AddArg(w0) 13576 v.AddArg(mem) 13577 return true 13578 } 13579 return false 13580 } 13581 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 13582 b := v.Block 13583 _ = b 13584 // match: (MULLD x (MOVDconst [c])) 13585 // cond: is32Bit(c) 13586 // result: (MULLDconst [c] x) 13587 for { 13588 x := v.Args[0] 13589 v_1 := v.Args[1] 13590 if v_1.Op != OpS390XMOVDconst { 13591 break 13592 } 13593 c := v_1.AuxInt 13594 if !(is32Bit(c)) { 13595 break 13596 } 13597 v.reset(OpS390XMULLDconst) 13598 v.AuxInt = c 13599 v.AddArg(x) 13600 return true 13601 } 13602 // match: (MULLD (MOVDconst [c]) x) 13603 // cond: is32Bit(c) 13604 // result: (MULLDconst [c] x) 13605 for { 13606 v_0 := v.Args[0] 13607 if v_0.Op != OpS390XMOVDconst { 13608 break 13609 } 13610 c := v_0.AuxInt 13611 x := v.Args[1] 13612 if !(is32Bit(c)) { 13613 break 13614 } 13615 v.reset(OpS390XMULLDconst) 13616 v.AuxInt = c 13617 v.AddArg(x) 13618 return true 13619 } 13620 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 13621 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13622 // result: (MULLDload <t> [off] {sym} x ptr mem) 13623 for { 13624 t := v.Type 13625 x := v.Args[0] 13626 g := v.Args[1] 13627 if g.Op != OpS390XMOVDload { 13628 break 13629 } 13630 off := g.AuxInt 13631 sym := g.Aux 13632 ptr := g.Args[0] 13633 mem := g.Args[1] 13634 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13635 break 13636 } 13637 v.reset(OpS390XMULLDload) 13638 v.Type = t 13639 v.AuxInt = off 13640 v.Aux = sym 13641 v.AddArg(x) 13642 v.AddArg(ptr) 13643 v.AddArg(mem) 13644 return true 13645 } 13646 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 13647 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13648 // result: (MULLDload <t> [off] {sym} x ptr mem) 13649 for { 13650 t := v.Type 13651 g := v.Args[0] 13652 if g.Op != OpS390XMOVDload { 13653 break 13654 } 13655 off := g.AuxInt 13656 sym := g.Aux 13657 ptr := g.Args[0] 13658 mem := g.Args[1] 13659 x := v.Args[1] 13660 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13661 break 13662 } 13663 v.reset(OpS390XMULLDload) 13664 v.Type = t 13665 v.AuxInt = off 13666 v.Aux = sym 13667 v.AddArg(x) 13668 v.AddArg(ptr) 13669 v.AddArg(mem) 13670 return true 13671 } 13672 return false 13673 } 13674 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 13675 b := v.Block 13676 _ = b 13677 // match: (MULLDconst [-1] x) 13678 // cond: 13679 // result: (NEG x) 13680 for { 13681 if v.AuxInt != -1 { 13682 break 13683 } 13684 x := v.Args[0] 13685 v.reset(OpS390XNEG) 13686 v.AddArg(x) 13687 return true 13688 } 13689 // match: (MULLDconst [0] _) 13690 // cond: 13691 // result: (MOVDconst [0]) 13692 for { 13693 if v.AuxInt != 0 { 13694 break 13695 } 13696 v.reset(OpS390XMOVDconst) 13697 v.AuxInt = 0 13698 return true 13699 } 13700 // match: (MULLDconst [1] x) 13701 // cond: 13702 // result: x 13703 for { 13704 if v.AuxInt != 1 { 13705 break 13706 } 13707 x := v.Args[0] 13708 v.reset(OpCopy) 13709 v.Type = x.Type 13710 v.AddArg(x) 13711 return true 13712 } 13713 // match: (MULLDconst [c] x) 13714 // cond: isPowerOfTwo(c) 13715 // result: (SLDconst [log2(c)] x) 13716 for { 13717 c := v.AuxInt 13718 x := v.Args[0] 13719 if !(isPowerOfTwo(c)) { 13720 break 13721 } 13722 v.reset(OpS390XSLDconst) 13723 v.AuxInt = log2(c) 13724 v.AddArg(x) 13725 return true 13726 } 13727 // match: (MULLDconst [c] x) 13728 // cond: isPowerOfTwo(c+1) && c >= 15 13729 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 13730 for { 13731 c := v.AuxInt 13732 x := v.Args[0] 13733 if !(isPowerOfTwo(c+1) && c >= 15) { 13734 break 13735 } 13736 v.reset(OpS390XSUB) 13737 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13738 v0.AuxInt = log2(c + 1) 13739 v0.AddArg(x) 13740 v.AddArg(v0) 13741 v.AddArg(x) 13742 return true 13743 } 13744 // match: (MULLDconst [c] x) 13745 // cond: isPowerOfTwo(c-1) && c >= 17 13746 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 13747 for { 13748 c := v.AuxInt 13749 x := v.Args[0] 13750 if !(isPowerOfTwo(c-1) && c >= 17) { 13751 break 13752 } 13753 v.reset(OpS390XADD) 13754 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13755 v0.AuxInt = log2(c - 1) 13756 v0.AddArg(x) 13757 v.AddArg(v0) 13758 v.AddArg(x) 13759 return true 13760 } 13761 // match: (MULLDconst [c] (MOVDconst [d])) 13762 // cond: 13763 // result: (MOVDconst [c*d]) 13764 for { 13765 c := v.AuxInt 13766 v_0 := v.Args[0] 13767 if v_0.Op != OpS390XMOVDconst { 13768 break 13769 } 13770 d := v_0.AuxInt 13771 v.reset(OpS390XMOVDconst) 13772 v.AuxInt = c * d 13773 return true 13774 } 13775 return false 13776 } 13777 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 13778 b := v.Block 13779 _ = b 13780 // match: (MULLW x (MOVDconst [c])) 13781 // cond: 13782 // result: (MULLWconst [c] x) 13783 for { 13784 x := v.Args[0] 13785 v_1 := v.Args[1] 13786 if v_1.Op != OpS390XMOVDconst { 13787 break 13788 } 13789 c := v_1.AuxInt 13790 v.reset(OpS390XMULLWconst) 13791 v.AuxInt = c 13792 v.AddArg(x) 13793 return true 13794 } 13795 // match: (MULLW (MOVDconst [c]) x) 13796 // cond: 13797 // result: (MULLWconst [c] x) 13798 for { 13799 v_0 := v.Args[0] 13800 if v_0.Op != OpS390XMOVDconst { 13801 break 13802 } 13803 c := v_0.AuxInt 13804 x := v.Args[1] 13805 v.reset(OpS390XMULLWconst) 13806 v.AuxInt = c 13807 v.AddArg(x) 13808 return true 13809 } 13810 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 13811 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13812 // result: (MULLWload <t> [off] {sym} x ptr mem) 13813 for { 13814 t := v.Type 13815 x := v.Args[0] 13816 g := v.Args[1] 13817 if g.Op != OpS390XMOVWload { 13818 break 13819 } 13820 off := g.AuxInt 13821 sym := g.Aux 13822 ptr := g.Args[0] 13823 mem := g.Args[1] 13824 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13825 break 13826 } 13827 v.reset(OpS390XMULLWload) 13828 v.Type = t 13829 v.AuxInt = off 13830 v.Aux = sym 13831 v.AddArg(x) 13832 v.AddArg(ptr) 13833 v.AddArg(mem) 13834 return true 13835 } 13836 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 13837 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13838 // result: (MULLWload <t> [off] {sym} x ptr mem) 13839 for { 13840 t := v.Type 13841 g := v.Args[0] 13842 if g.Op != OpS390XMOVWload { 13843 break 13844 } 13845 off := g.AuxInt 13846 sym := g.Aux 13847 ptr := g.Args[0] 13848 mem := g.Args[1] 13849 x := v.Args[1] 13850 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13851 break 13852 } 13853 v.reset(OpS390XMULLWload) 13854 v.Type = t 13855 v.AuxInt = off 13856 v.Aux = sym 13857 v.AddArg(x) 13858 v.AddArg(ptr) 13859 v.AddArg(mem) 13860 return true 13861 } 13862 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 13863 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13864 // result: (MULLWload <t> [off] {sym} x ptr mem) 13865 for { 13866 t := v.Type 13867 x := v.Args[0] 13868 g := v.Args[1] 13869 if g.Op != OpS390XMOVWZload { 13870 break 13871 } 13872 off := g.AuxInt 13873 sym := g.Aux 13874 ptr := g.Args[0] 13875 mem := g.Args[1] 13876 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13877 break 13878 } 13879 v.reset(OpS390XMULLWload) 13880 v.Type = t 13881 v.AuxInt = off 13882 v.Aux = sym 13883 v.AddArg(x) 13884 v.AddArg(ptr) 13885 v.AddArg(mem) 13886 return true 13887 } 13888 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 13889 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13890 // result: (MULLWload <t> [off] {sym} x ptr mem) 13891 for { 13892 t := v.Type 13893 g := v.Args[0] 13894 if g.Op != OpS390XMOVWZload { 13895 break 13896 } 13897 off := g.AuxInt 13898 sym := g.Aux 13899 ptr := g.Args[0] 13900 mem := g.Args[1] 13901 x := v.Args[1] 13902 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13903 break 13904 } 13905 v.reset(OpS390XMULLWload) 13906 v.Type = t 13907 v.AuxInt = off 13908 v.Aux = sym 13909 v.AddArg(x) 13910 v.AddArg(ptr) 13911 v.AddArg(mem) 13912 return true 13913 } 13914 return false 13915 } 13916 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 13917 b := v.Block 13918 _ = b 13919 // match: (MULLWconst [-1] x) 13920 // cond: 13921 // result: (NEGW x) 13922 for { 13923 if v.AuxInt != -1 { 13924 break 13925 } 13926 x := v.Args[0] 13927 v.reset(OpS390XNEGW) 13928 v.AddArg(x) 13929 return true 13930 } 13931 // match: (MULLWconst [0] _) 13932 // cond: 13933 // result: (MOVDconst [0]) 13934 for { 13935 if v.AuxInt != 0 { 13936 break 13937 } 13938 v.reset(OpS390XMOVDconst) 13939 v.AuxInt = 0 13940 return true 13941 } 13942 // match: (MULLWconst [1] x) 13943 // cond: 13944 // result: x 13945 for { 13946 if v.AuxInt != 1 { 13947 break 13948 } 13949 x := v.Args[0] 13950 v.reset(OpCopy) 13951 v.Type = x.Type 13952 v.AddArg(x) 13953 return true 13954 } 13955 // match: (MULLWconst [c] x) 13956 // cond: isPowerOfTwo(c) 13957 // result: (SLWconst [log2(c)] x) 13958 for { 13959 c := v.AuxInt 13960 x := v.Args[0] 13961 if !(isPowerOfTwo(c)) { 13962 break 13963 } 13964 v.reset(OpS390XSLWconst) 13965 v.AuxInt = log2(c) 13966 v.AddArg(x) 13967 return true 13968 } 13969 // match: (MULLWconst [c] x) 13970 // cond: isPowerOfTwo(c+1) && c >= 15 13971 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 13972 for { 13973 c := v.AuxInt 13974 x := v.Args[0] 13975 if !(isPowerOfTwo(c+1) && c >= 15) { 13976 break 13977 } 13978 v.reset(OpS390XSUBW) 13979 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13980 v0.AuxInt = log2(c + 1) 13981 v0.AddArg(x) 13982 v.AddArg(v0) 13983 v.AddArg(x) 13984 return true 13985 } 13986 // match: (MULLWconst [c] x) 13987 // cond: isPowerOfTwo(c-1) && c >= 17 13988 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 13989 for { 13990 c := v.AuxInt 13991 x := v.Args[0] 13992 if !(isPowerOfTwo(c-1) && c >= 17) { 13993 break 13994 } 13995 v.reset(OpS390XADDW) 13996 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13997 v0.AuxInt = log2(c - 1) 13998 v0.AddArg(x) 13999 v.AddArg(v0) 14000 v.AddArg(x) 14001 return true 14002 } 14003 // match: (MULLWconst [c] (MOVDconst [d])) 14004 // cond: 14005 // result: (MOVDconst [int64(int32(c*d))]) 14006 for { 14007 c := v.AuxInt 14008 v_0 := v.Args[0] 14009 if v_0.Op != OpS390XMOVDconst { 14010 break 14011 } 14012 d := v_0.AuxInt 14013 v.reset(OpS390XMOVDconst) 14014 v.AuxInt = int64(int32(c * d)) 14015 return true 14016 } 14017 return false 14018 } 14019 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 14020 b := v.Block 14021 _ = b 14022 // match: (NEG (MOVDconst [c])) 14023 // cond: 14024 // result: (MOVDconst [-c]) 14025 for { 14026 v_0 := v.Args[0] 14027 if v_0.Op != OpS390XMOVDconst { 14028 break 14029 } 14030 c := v_0.AuxInt 14031 v.reset(OpS390XMOVDconst) 14032 v.AuxInt = -c 14033 return true 14034 } 14035 return false 14036 } 14037 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 14038 b := v.Block 14039 _ = b 14040 // match: (NEGW (MOVDconst [c])) 14041 // cond: 14042 // result: (MOVDconst [int64(int32(-c))]) 14043 for { 14044 v_0 := v.Args[0] 14045 if v_0.Op != OpS390XMOVDconst { 14046 break 14047 } 14048 c := v_0.AuxInt 14049 v.reset(OpS390XMOVDconst) 14050 v.AuxInt = int64(int32(-c)) 14051 return true 14052 } 14053 return false 14054 } 14055 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 14056 b := v.Block 14057 _ = b 14058 // match: (NOT x) 14059 // cond: true 14060 // result: (XOR (MOVDconst [-1]) x) 14061 for { 14062 x := v.Args[0] 14063 if !(true) { 14064 break 14065 } 14066 v.reset(OpS390XXOR) 14067 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 14068 v0.AuxInt = -1 14069 v.AddArg(v0) 14070 v.AddArg(x) 14071 return true 14072 } 14073 return false 14074 } 14075 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 14076 b := v.Block 14077 _ = b 14078 // match: (NOTW x) 14079 // cond: true 14080 // result: (XORWconst [-1] x) 14081 for { 14082 x := v.Args[0] 14083 if !(true) { 14084 break 14085 } 14086 v.reset(OpS390XXORWconst) 14087 v.AuxInt = -1 14088 v.AddArg(x) 14089 return true 14090 } 14091 return false 14092 } 14093 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14094 b := v.Block 14095 _ = b 14096 // match: (OR x (MOVDconst [c])) 14097 // cond: isU32Bit(c) 14098 // result: (ORconst [c] x) 14099 for { 14100 x := v.Args[0] 14101 v_1 := v.Args[1] 14102 if v_1.Op != OpS390XMOVDconst { 14103 break 14104 } 14105 c := v_1.AuxInt 14106 if !(isU32Bit(c)) { 14107 break 14108 } 14109 v.reset(OpS390XORconst) 14110 v.AuxInt = c 14111 v.AddArg(x) 14112 return true 14113 } 14114 // match: (OR (MOVDconst [c]) x) 14115 // cond: isU32Bit(c) 14116 // result: (ORconst [c] x) 14117 for { 14118 v_0 := v.Args[0] 14119 if v_0.Op != OpS390XMOVDconst { 14120 break 14121 } 14122 c := v_0.AuxInt 14123 x := v.Args[1] 14124 if !(isU32Bit(c)) { 14125 break 14126 } 14127 v.reset(OpS390XORconst) 14128 v.AuxInt = c 14129 v.AddArg(x) 14130 return true 14131 } 14132 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14133 // cond: 14134 // result: (MOVDconst [c|d]) 14135 for { 14136 v_0 := v.Args[0] 14137 if v_0.Op != OpS390XMOVDconst { 14138 break 14139 } 14140 c := v_0.AuxInt 14141 v_1 := v.Args[1] 14142 if v_1.Op != OpS390XMOVDconst { 14143 break 14144 } 14145 d := v_1.AuxInt 14146 v.reset(OpS390XMOVDconst) 14147 v.AuxInt = c | d 14148 return true 14149 } 14150 // match: (OR x x) 14151 // cond: 14152 // result: x 14153 for { 14154 x := v.Args[0] 14155 if x != v.Args[1] { 14156 break 14157 } 14158 v.reset(OpCopy) 14159 v.Type = x.Type 14160 v.AddArg(x) 14161 return true 14162 } 14163 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14164 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14165 // result: (ORload <t> [off] {sym} x ptr mem) 14166 for { 14167 t := v.Type 14168 x := v.Args[0] 14169 g := v.Args[1] 14170 if g.Op != OpS390XMOVDload { 14171 break 14172 } 14173 off := g.AuxInt 14174 sym := g.Aux 14175 ptr := g.Args[0] 14176 mem := g.Args[1] 14177 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14178 break 14179 } 14180 v.reset(OpS390XORload) 14181 v.Type = t 14182 v.AuxInt = off 14183 v.Aux = sym 14184 v.AddArg(x) 14185 v.AddArg(ptr) 14186 v.AddArg(mem) 14187 return true 14188 } 14189 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14190 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14191 // result: (ORload <t> [off] {sym} x ptr mem) 14192 for { 14193 t := v.Type 14194 g := v.Args[0] 14195 if g.Op != OpS390XMOVDload { 14196 break 14197 } 14198 off := g.AuxInt 14199 sym := g.Aux 14200 ptr := g.Args[0] 14201 mem := g.Args[1] 14202 x := v.Args[1] 14203 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14204 break 14205 } 14206 v.reset(OpS390XORload) 14207 v.Type = t 14208 v.AuxInt = off 14209 v.Aux = sym 14210 v.AddArg(x) 14211 v.AddArg(ptr) 14212 v.AddArg(mem) 14213 return true 14214 } 14215 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14216 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14217 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14218 for { 14219 o0 := v.Args[0] 14220 if o0.Op != OpS390XOR { 14221 break 14222 } 14223 o1 := o0.Args[0] 14224 if o1.Op != OpS390XOR { 14225 break 14226 } 14227 o2 := o1.Args[0] 14228 if o2.Op != OpS390XOR { 14229 break 14230 } 14231 o3 := o2.Args[0] 14232 if o3.Op != OpS390XOR { 14233 break 14234 } 14235 o4 := o3.Args[0] 14236 if o4.Op != OpS390XOR { 14237 break 14238 } 14239 o5 := o4.Args[0] 14240 if o5.Op != OpS390XOR { 14241 break 14242 } 14243 x0 := o5.Args[0] 14244 if x0.Op != OpS390XMOVBZload { 14245 break 14246 } 14247 i := x0.AuxInt 14248 s := x0.Aux 14249 p := x0.Args[0] 14250 mem := x0.Args[1] 14251 s0 := o5.Args[1] 14252 if s0.Op != OpS390XSLDconst { 14253 break 14254 } 14255 if s0.AuxInt != 8 { 14256 break 14257 } 14258 x1 := s0.Args[0] 14259 if x1.Op != OpS390XMOVBZload { 14260 break 14261 } 14262 if x1.AuxInt != i+1 { 14263 break 14264 } 14265 if x1.Aux != s { 14266 break 14267 } 14268 if p != x1.Args[0] { 14269 break 14270 } 14271 if mem != x1.Args[1] { 14272 break 14273 } 14274 s1 := o4.Args[1] 14275 if s1.Op != OpS390XSLDconst { 14276 break 14277 } 14278 if s1.AuxInt != 16 { 14279 break 14280 } 14281 x2 := s1.Args[0] 14282 if x2.Op != OpS390XMOVBZload { 14283 break 14284 } 14285 if x2.AuxInt != i+2 { 14286 break 14287 } 14288 if x2.Aux != s { 14289 break 14290 } 14291 if p != x2.Args[0] { 14292 break 14293 } 14294 if mem != x2.Args[1] { 14295 break 14296 } 14297 s2 := o3.Args[1] 14298 if s2.Op != OpS390XSLDconst { 14299 break 14300 } 14301 if s2.AuxInt != 24 { 14302 break 14303 } 14304 x3 := s2.Args[0] 14305 if x3.Op != OpS390XMOVBZload { 14306 break 14307 } 14308 if x3.AuxInt != i+3 { 14309 break 14310 } 14311 if x3.Aux != s { 14312 break 14313 } 14314 if p != x3.Args[0] { 14315 break 14316 } 14317 if mem != x3.Args[1] { 14318 break 14319 } 14320 s3 := o2.Args[1] 14321 if s3.Op != OpS390XSLDconst { 14322 break 14323 } 14324 if s3.AuxInt != 32 { 14325 break 14326 } 14327 x4 := s3.Args[0] 14328 if x4.Op != OpS390XMOVBZload { 14329 break 14330 } 14331 if x4.AuxInt != i+4 { 14332 break 14333 } 14334 if x4.Aux != s { 14335 break 14336 } 14337 if p != x4.Args[0] { 14338 break 14339 } 14340 if mem != x4.Args[1] { 14341 break 14342 } 14343 s4 := o1.Args[1] 14344 if s4.Op != OpS390XSLDconst { 14345 break 14346 } 14347 if s4.AuxInt != 40 { 14348 break 14349 } 14350 x5 := s4.Args[0] 14351 if x5.Op != OpS390XMOVBZload { 14352 break 14353 } 14354 if x5.AuxInt != i+5 { 14355 break 14356 } 14357 if x5.Aux != s { 14358 break 14359 } 14360 if p != x5.Args[0] { 14361 break 14362 } 14363 if mem != x5.Args[1] { 14364 break 14365 } 14366 s5 := o0.Args[1] 14367 if s5.Op != OpS390XSLDconst { 14368 break 14369 } 14370 if s5.AuxInt != 48 { 14371 break 14372 } 14373 x6 := s5.Args[0] 14374 if x6.Op != OpS390XMOVBZload { 14375 break 14376 } 14377 if x6.AuxInt != i+6 { 14378 break 14379 } 14380 if x6.Aux != s { 14381 break 14382 } 14383 if p != x6.Args[0] { 14384 break 14385 } 14386 if mem != x6.Args[1] { 14387 break 14388 } 14389 s6 := v.Args[1] 14390 if s6.Op != OpS390XSLDconst { 14391 break 14392 } 14393 if s6.AuxInt != 56 { 14394 break 14395 } 14396 x7 := s6.Args[0] 14397 if x7.Op != OpS390XMOVBZload { 14398 break 14399 } 14400 if x7.AuxInt != i+7 { 14401 break 14402 } 14403 if x7.Aux != s { 14404 break 14405 } 14406 if p != x7.Args[0] { 14407 break 14408 } 14409 if mem != x7.Args[1] { 14410 break 14411 } 14412 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14413 break 14414 } 14415 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14416 v0 := b.NewValue0(v.Line, OpS390XMOVDBRload, config.fe.TypeUInt64()) 14417 v.reset(OpCopy) 14418 v.AddArg(v0) 14419 v0.AuxInt = i 14420 v0.Aux = s 14421 v0.AddArg(p) 14422 v0.AddArg(mem) 14423 return true 14424 } 14425 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 14426 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14427 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 14428 for { 14429 o0 := v.Args[0] 14430 if o0.Op != OpS390XOR { 14431 break 14432 } 14433 o1 := o0.Args[0] 14434 if o1.Op != OpS390XOR { 14435 break 14436 } 14437 o2 := o1.Args[0] 14438 if o2.Op != OpS390XOR { 14439 break 14440 } 14441 o3 := o2.Args[0] 14442 if o3.Op != OpS390XOR { 14443 break 14444 } 14445 o4 := o3.Args[0] 14446 if o4.Op != OpS390XOR { 14447 break 14448 } 14449 o5 := o4.Args[0] 14450 if o5.Op != OpS390XOR { 14451 break 14452 } 14453 x0 := o5.Args[0] 14454 if x0.Op != OpS390XMOVBZloadidx { 14455 break 14456 } 14457 i := x0.AuxInt 14458 s := x0.Aux 14459 p := x0.Args[0] 14460 idx := x0.Args[1] 14461 mem := x0.Args[2] 14462 s0 := o5.Args[1] 14463 if s0.Op != OpS390XSLDconst { 14464 break 14465 } 14466 if s0.AuxInt != 8 { 14467 break 14468 } 14469 x1 := s0.Args[0] 14470 if x1.Op != OpS390XMOVBZloadidx { 14471 break 14472 } 14473 if x1.AuxInt != i+1 { 14474 break 14475 } 14476 if x1.Aux != s { 14477 break 14478 } 14479 if p != x1.Args[0] { 14480 break 14481 } 14482 if idx != x1.Args[1] { 14483 break 14484 } 14485 if mem != x1.Args[2] { 14486 break 14487 } 14488 s1 := o4.Args[1] 14489 if s1.Op != OpS390XSLDconst { 14490 break 14491 } 14492 if s1.AuxInt != 16 { 14493 break 14494 } 14495 x2 := s1.Args[0] 14496 if x2.Op != OpS390XMOVBZloadidx { 14497 break 14498 } 14499 if x2.AuxInt != i+2 { 14500 break 14501 } 14502 if x2.Aux != s { 14503 break 14504 } 14505 if p != x2.Args[0] { 14506 break 14507 } 14508 if idx != x2.Args[1] { 14509 break 14510 } 14511 if mem != x2.Args[2] { 14512 break 14513 } 14514 s2 := o3.Args[1] 14515 if s2.Op != OpS390XSLDconst { 14516 break 14517 } 14518 if s2.AuxInt != 24 { 14519 break 14520 } 14521 x3 := s2.Args[0] 14522 if x3.Op != OpS390XMOVBZloadidx { 14523 break 14524 } 14525 if x3.AuxInt != i+3 { 14526 break 14527 } 14528 if x3.Aux != s { 14529 break 14530 } 14531 if p != x3.Args[0] { 14532 break 14533 } 14534 if idx != x3.Args[1] { 14535 break 14536 } 14537 if mem != x3.Args[2] { 14538 break 14539 } 14540 s3 := o2.Args[1] 14541 if s3.Op != OpS390XSLDconst { 14542 break 14543 } 14544 if s3.AuxInt != 32 { 14545 break 14546 } 14547 x4 := s3.Args[0] 14548 if x4.Op != OpS390XMOVBZloadidx { 14549 break 14550 } 14551 if x4.AuxInt != i+4 { 14552 break 14553 } 14554 if x4.Aux != s { 14555 break 14556 } 14557 if p != x4.Args[0] { 14558 break 14559 } 14560 if idx != x4.Args[1] { 14561 break 14562 } 14563 if mem != x4.Args[2] { 14564 break 14565 } 14566 s4 := o1.Args[1] 14567 if s4.Op != OpS390XSLDconst { 14568 break 14569 } 14570 if s4.AuxInt != 40 { 14571 break 14572 } 14573 x5 := s4.Args[0] 14574 if x5.Op != OpS390XMOVBZloadidx { 14575 break 14576 } 14577 if x5.AuxInt != i+5 { 14578 break 14579 } 14580 if x5.Aux != s { 14581 break 14582 } 14583 if p != x5.Args[0] { 14584 break 14585 } 14586 if idx != x5.Args[1] { 14587 break 14588 } 14589 if mem != x5.Args[2] { 14590 break 14591 } 14592 s5 := o0.Args[1] 14593 if s5.Op != OpS390XSLDconst { 14594 break 14595 } 14596 if s5.AuxInt != 48 { 14597 break 14598 } 14599 x6 := s5.Args[0] 14600 if x6.Op != OpS390XMOVBZloadidx { 14601 break 14602 } 14603 if x6.AuxInt != i+6 { 14604 break 14605 } 14606 if x6.Aux != s { 14607 break 14608 } 14609 if p != x6.Args[0] { 14610 break 14611 } 14612 if idx != x6.Args[1] { 14613 break 14614 } 14615 if mem != x6.Args[2] { 14616 break 14617 } 14618 s6 := v.Args[1] 14619 if s6.Op != OpS390XSLDconst { 14620 break 14621 } 14622 if s6.AuxInt != 56 { 14623 break 14624 } 14625 x7 := s6.Args[0] 14626 if x7.Op != OpS390XMOVBZloadidx { 14627 break 14628 } 14629 if x7.AuxInt != i+7 { 14630 break 14631 } 14632 if x7.Aux != s { 14633 break 14634 } 14635 if p != x7.Args[0] { 14636 break 14637 } 14638 if idx != x7.Args[1] { 14639 break 14640 } 14641 if mem != x7.Args[2] { 14642 break 14643 } 14644 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14645 break 14646 } 14647 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14648 v0 := b.NewValue0(v.Line, OpS390XMOVDBRloadidx, v.Type) 14649 v.reset(OpCopy) 14650 v.AddArg(v0) 14651 v0.AuxInt = i 14652 v0.Aux = s 14653 v0.AddArg(p) 14654 v0.AddArg(idx) 14655 v0.AddArg(mem) 14656 return true 14657 } 14658 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 14659 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14660 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 14661 for { 14662 o0 := v.Args[0] 14663 if o0.Op != OpS390XOR { 14664 break 14665 } 14666 o1 := o0.Args[0] 14667 if o1.Op != OpS390XOR { 14668 break 14669 } 14670 o2 := o1.Args[0] 14671 if o2.Op != OpS390XOR { 14672 break 14673 } 14674 o3 := o2.Args[0] 14675 if o3.Op != OpS390XOR { 14676 break 14677 } 14678 o4 := o3.Args[0] 14679 if o4.Op != OpS390XOR { 14680 break 14681 } 14682 o5 := o4.Args[0] 14683 if o5.Op != OpS390XOR { 14684 break 14685 } 14686 x0 := o5.Args[0] 14687 if x0.Op != OpS390XMOVBZload { 14688 break 14689 } 14690 i := x0.AuxInt 14691 s := x0.Aux 14692 p := x0.Args[0] 14693 mem := x0.Args[1] 14694 s0 := o5.Args[1] 14695 if s0.Op != OpS390XSLDconst { 14696 break 14697 } 14698 if s0.AuxInt != 8 { 14699 break 14700 } 14701 x1 := s0.Args[0] 14702 if x1.Op != OpS390XMOVBZload { 14703 break 14704 } 14705 if x1.AuxInt != i-1 { 14706 break 14707 } 14708 if x1.Aux != s { 14709 break 14710 } 14711 if p != x1.Args[0] { 14712 break 14713 } 14714 if mem != x1.Args[1] { 14715 break 14716 } 14717 s1 := o4.Args[1] 14718 if s1.Op != OpS390XSLDconst { 14719 break 14720 } 14721 if s1.AuxInt != 16 { 14722 break 14723 } 14724 x2 := s1.Args[0] 14725 if x2.Op != OpS390XMOVBZload { 14726 break 14727 } 14728 if x2.AuxInt != i-2 { 14729 break 14730 } 14731 if x2.Aux != s { 14732 break 14733 } 14734 if p != x2.Args[0] { 14735 break 14736 } 14737 if mem != x2.Args[1] { 14738 break 14739 } 14740 s2 := o3.Args[1] 14741 if s2.Op != OpS390XSLDconst { 14742 break 14743 } 14744 if s2.AuxInt != 24 { 14745 break 14746 } 14747 x3 := s2.Args[0] 14748 if x3.Op != OpS390XMOVBZload { 14749 break 14750 } 14751 if x3.AuxInt != i-3 { 14752 break 14753 } 14754 if x3.Aux != s { 14755 break 14756 } 14757 if p != x3.Args[0] { 14758 break 14759 } 14760 if mem != x3.Args[1] { 14761 break 14762 } 14763 s3 := o2.Args[1] 14764 if s3.Op != OpS390XSLDconst { 14765 break 14766 } 14767 if s3.AuxInt != 32 { 14768 break 14769 } 14770 x4 := s3.Args[0] 14771 if x4.Op != OpS390XMOVBZload { 14772 break 14773 } 14774 if x4.AuxInt != i-4 { 14775 break 14776 } 14777 if x4.Aux != s { 14778 break 14779 } 14780 if p != x4.Args[0] { 14781 break 14782 } 14783 if mem != x4.Args[1] { 14784 break 14785 } 14786 s4 := o1.Args[1] 14787 if s4.Op != OpS390XSLDconst { 14788 break 14789 } 14790 if s4.AuxInt != 40 { 14791 break 14792 } 14793 x5 := s4.Args[0] 14794 if x5.Op != OpS390XMOVBZload { 14795 break 14796 } 14797 if x5.AuxInt != i-5 { 14798 break 14799 } 14800 if x5.Aux != s { 14801 break 14802 } 14803 if p != x5.Args[0] { 14804 break 14805 } 14806 if mem != x5.Args[1] { 14807 break 14808 } 14809 s5 := o0.Args[1] 14810 if s5.Op != OpS390XSLDconst { 14811 break 14812 } 14813 if s5.AuxInt != 48 { 14814 break 14815 } 14816 x6 := s5.Args[0] 14817 if x6.Op != OpS390XMOVBZload { 14818 break 14819 } 14820 if x6.AuxInt != i-6 { 14821 break 14822 } 14823 if x6.Aux != s { 14824 break 14825 } 14826 if p != x6.Args[0] { 14827 break 14828 } 14829 if mem != x6.Args[1] { 14830 break 14831 } 14832 s6 := v.Args[1] 14833 if s6.Op != OpS390XSLDconst { 14834 break 14835 } 14836 if s6.AuxInt != 56 { 14837 break 14838 } 14839 x7 := s6.Args[0] 14840 if x7.Op != OpS390XMOVBZload { 14841 break 14842 } 14843 if x7.AuxInt != i-7 { 14844 break 14845 } 14846 if x7.Aux != s { 14847 break 14848 } 14849 if p != x7.Args[0] { 14850 break 14851 } 14852 if mem != x7.Args[1] { 14853 break 14854 } 14855 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14856 break 14857 } 14858 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14859 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 14860 v.reset(OpCopy) 14861 v.AddArg(v0) 14862 v0.AuxInt = i - 7 14863 v0.Aux = s 14864 v0.AddArg(p) 14865 v0.AddArg(mem) 14866 return true 14867 } 14868 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 14869 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14870 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 14871 for { 14872 o0 := v.Args[0] 14873 if o0.Op != OpS390XOR { 14874 break 14875 } 14876 o1 := o0.Args[0] 14877 if o1.Op != OpS390XOR { 14878 break 14879 } 14880 o2 := o1.Args[0] 14881 if o2.Op != OpS390XOR { 14882 break 14883 } 14884 o3 := o2.Args[0] 14885 if o3.Op != OpS390XOR { 14886 break 14887 } 14888 o4 := o3.Args[0] 14889 if o4.Op != OpS390XOR { 14890 break 14891 } 14892 o5 := o4.Args[0] 14893 if o5.Op != OpS390XOR { 14894 break 14895 } 14896 x0 := o5.Args[0] 14897 if x0.Op != OpS390XMOVBZloadidx { 14898 break 14899 } 14900 i := x0.AuxInt 14901 s := x0.Aux 14902 p := x0.Args[0] 14903 idx := x0.Args[1] 14904 mem := x0.Args[2] 14905 s0 := o5.Args[1] 14906 if s0.Op != OpS390XSLDconst { 14907 break 14908 } 14909 if s0.AuxInt != 8 { 14910 break 14911 } 14912 x1 := s0.Args[0] 14913 if x1.Op != OpS390XMOVBZloadidx { 14914 break 14915 } 14916 if x1.AuxInt != i-1 { 14917 break 14918 } 14919 if x1.Aux != s { 14920 break 14921 } 14922 if p != x1.Args[0] { 14923 break 14924 } 14925 if idx != x1.Args[1] { 14926 break 14927 } 14928 if mem != x1.Args[2] { 14929 break 14930 } 14931 s1 := o4.Args[1] 14932 if s1.Op != OpS390XSLDconst { 14933 break 14934 } 14935 if s1.AuxInt != 16 { 14936 break 14937 } 14938 x2 := s1.Args[0] 14939 if x2.Op != OpS390XMOVBZloadidx { 14940 break 14941 } 14942 if x2.AuxInt != i-2 { 14943 break 14944 } 14945 if x2.Aux != s { 14946 break 14947 } 14948 if p != x2.Args[0] { 14949 break 14950 } 14951 if idx != x2.Args[1] { 14952 break 14953 } 14954 if mem != x2.Args[2] { 14955 break 14956 } 14957 s2 := o3.Args[1] 14958 if s2.Op != OpS390XSLDconst { 14959 break 14960 } 14961 if s2.AuxInt != 24 { 14962 break 14963 } 14964 x3 := s2.Args[0] 14965 if x3.Op != OpS390XMOVBZloadidx { 14966 break 14967 } 14968 if x3.AuxInt != i-3 { 14969 break 14970 } 14971 if x3.Aux != s { 14972 break 14973 } 14974 if p != x3.Args[0] { 14975 break 14976 } 14977 if idx != x3.Args[1] { 14978 break 14979 } 14980 if mem != x3.Args[2] { 14981 break 14982 } 14983 s3 := o2.Args[1] 14984 if s3.Op != OpS390XSLDconst { 14985 break 14986 } 14987 if s3.AuxInt != 32 { 14988 break 14989 } 14990 x4 := s3.Args[0] 14991 if x4.Op != OpS390XMOVBZloadidx { 14992 break 14993 } 14994 if x4.AuxInt != i-4 { 14995 break 14996 } 14997 if x4.Aux != s { 14998 break 14999 } 15000 if p != x4.Args[0] { 15001 break 15002 } 15003 if idx != x4.Args[1] { 15004 break 15005 } 15006 if mem != x4.Args[2] { 15007 break 15008 } 15009 s4 := o1.Args[1] 15010 if s4.Op != OpS390XSLDconst { 15011 break 15012 } 15013 if s4.AuxInt != 40 { 15014 break 15015 } 15016 x5 := s4.Args[0] 15017 if x5.Op != OpS390XMOVBZloadidx { 15018 break 15019 } 15020 if x5.AuxInt != i-5 { 15021 break 15022 } 15023 if x5.Aux != s { 15024 break 15025 } 15026 if p != x5.Args[0] { 15027 break 15028 } 15029 if idx != x5.Args[1] { 15030 break 15031 } 15032 if mem != x5.Args[2] { 15033 break 15034 } 15035 s5 := o0.Args[1] 15036 if s5.Op != OpS390XSLDconst { 15037 break 15038 } 15039 if s5.AuxInt != 48 { 15040 break 15041 } 15042 x6 := s5.Args[0] 15043 if x6.Op != OpS390XMOVBZloadidx { 15044 break 15045 } 15046 if x6.AuxInt != i-6 { 15047 break 15048 } 15049 if x6.Aux != s { 15050 break 15051 } 15052 if p != x6.Args[0] { 15053 break 15054 } 15055 if idx != x6.Args[1] { 15056 break 15057 } 15058 if mem != x6.Args[2] { 15059 break 15060 } 15061 s6 := v.Args[1] 15062 if s6.Op != OpS390XSLDconst { 15063 break 15064 } 15065 if s6.AuxInt != 56 { 15066 break 15067 } 15068 x7 := s6.Args[0] 15069 if x7.Op != OpS390XMOVBZloadidx { 15070 break 15071 } 15072 if x7.AuxInt != i-7 { 15073 break 15074 } 15075 if x7.Aux != s { 15076 break 15077 } 15078 if p != x7.Args[0] { 15079 break 15080 } 15081 if idx != x7.Args[1] { 15082 break 15083 } 15084 if mem != x7.Args[2] { 15085 break 15086 } 15087 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15088 break 15089 } 15090 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15091 v0 := b.NewValue0(v.Line, OpS390XMOVDloadidx, v.Type) 15092 v.reset(OpCopy) 15093 v.AddArg(v0) 15094 v0.AuxInt = i - 7 15095 v0.Aux = s 15096 v0.AddArg(p) 15097 v0.AddArg(idx) 15098 v0.AddArg(mem) 15099 return true 15100 } 15101 return false 15102 } 15103 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15104 b := v.Block 15105 _ = b 15106 // match: (ORW x (MOVDconst [c])) 15107 // cond: 15108 // result: (ORWconst [c] x) 15109 for { 15110 x := v.Args[0] 15111 v_1 := v.Args[1] 15112 if v_1.Op != OpS390XMOVDconst { 15113 break 15114 } 15115 c := v_1.AuxInt 15116 v.reset(OpS390XORWconst) 15117 v.AuxInt = c 15118 v.AddArg(x) 15119 return true 15120 } 15121 // match: (ORW (MOVDconst [c]) x) 15122 // cond: 15123 // result: (ORWconst [c] x) 15124 for { 15125 v_0 := v.Args[0] 15126 if v_0.Op != OpS390XMOVDconst { 15127 break 15128 } 15129 c := v_0.AuxInt 15130 x := v.Args[1] 15131 v.reset(OpS390XORWconst) 15132 v.AuxInt = c 15133 v.AddArg(x) 15134 return true 15135 } 15136 // match: (ORW x x) 15137 // cond: 15138 // result: x 15139 for { 15140 x := v.Args[0] 15141 if x != v.Args[1] { 15142 break 15143 } 15144 v.reset(OpCopy) 15145 v.Type = x.Type 15146 v.AddArg(x) 15147 return true 15148 } 15149 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15150 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15151 // result: (ORWload <t> [off] {sym} x ptr mem) 15152 for { 15153 t := v.Type 15154 x := v.Args[0] 15155 g := v.Args[1] 15156 if g.Op != OpS390XMOVWload { 15157 break 15158 } 15159 off := g.AuxInt 15160 sym := g.Aux 15161 ptr := g.Args[0] 15162 mem := g.Args[1] 15163 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15164 break 15165 } 15166 v.reset(OpS390XORWload) 15167 v.Type = t 15168 v.AuxInt = off 15169 v.Aux = sym 15170 v.AddArg(x) 15171 v.AddArg(ptr) 15172 v.AddArg(mem) 15173 return true 15174 } 15175 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15176 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15177 // result: (ORWload <t> [off] {sym} x ptr mem) 15178 for { 15179 t := v.Type 15180 g := v.Args[0] 15181 if g.Op != OpS390XMOVWload { 15182 break 15183 } 15184 off := g.AuxInt 15185 sym := g.Aux 15186 ptr := g.Args[0] 15187 mem := g.Args[1] 15188 x := v.Args[1] 15189 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15190 break 15191 } 15192 v.reset(OpS390XORWload) 15193 v.Type = t 15194 v.AuxInt = off 15195 v.Aux = sym 15196 v.AddArg(x) 15197 v.AddArg(ptr) 15198 v.AddArg(mem) 15199 return true 15200 } 15201 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15202 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15203 // result: (ORWload <t> [off] {sym} x ptr mem) 15204 for { 15205 t := v.Type 15206 x := v.Args[0] 15207 g := v.Args[1] 15208 if g.Op != OpS390XMOVWZload { 15209 break 15210 } 15211 off := g.AuxInt 15212 sym := g.Aux 15213 ptr := g.Args[0] 15214 mem := g.Args[1] 15215 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15216 break 15217 } 15218 v.reset(OpS390XORWload) 15219 v.Type = t 15220 v.AuxInt = off 15221 v.Aux = sym 15222 v.AddArg(x) 15223 v.AddArg(ptr) 15224 v.AddArg(mem) 15225 return true 15226 } 15227 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15228 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15229 // result: (ORWload <t> [off] {sym} x ptr mem) 15230 for { 15231 t := v.Type 15232 g := v.Args[0] 15233 if g.Op != OpS390XMOVWZload { 15234 break 15235 } 15236 off := g.AuxInt 15237 sym := g.Aux 15238 ptr := g.Args[0] 15239 mem := g.Args[1] 15240 x := v.Args[1] 15241 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15242 break 15243 } 15244 v.reset(OpS390XORWload) 15245 v.Type = t 15246 v.AuxInt = off 15247 v.Aux = sym 15248 v.AddArg(x) 15249 v.AddArg(ptr) 15250 v.AddArg(mem) 15251 return true 15252 } 15253 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 15254 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15255 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 15256 for { 15257 x0 := v.Args[0] 15258 if x0.Op != OpS390XMOVBZload { 15259 break 15260 } 15261 i := x0.AuxInt 15262 s := x0.Aux 15263 p := x0.Args[0] 15264 mem := x0.Args[1] 15265 s0 := v.Args[1] 15266 if s0.Op != OpS390XSLWconst { 15267 break 15268 } 15269 if s0.AuxInt != 8 { 15270 break 15271 } 15272 x1 := s0.Args[0] 15273 if x1.Op != OpS390XMOVBZload { 15274 break 15275 } 15276 if x1.AuxInt != i+1 { 15277 break 15278 } 15279 if x1.Aux != s { 15280 break 15281 } 15282 if p != x1.Args[0] { 15283 break 15284 } 15285 if mem != x1.Args[1] { 15286 break 15287 } 15288 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15289 break 15290 } 15291 b = mergePoint(b, x0, x1) 15292 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15293 v.reset(OpCopy) 15294 v.AddArg(v0) 15295 v1 := b.NewValue0(v.Line, OpS390XMOVHBRload, config.fe.TypeUInt16()) 15296 v1.AuxInt = i 15297 v1.Aux = s 15298 v1.AddArg(p) 15299 v1.AddArg(mem) 15300 v0.AddArg(v1) 15301 return true 15302 } 15303 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 15304 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15305 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 15306 for { 15307 o0 := v.Args[0] 15308 if o0.Op != OpS390XORW { 15309 break 15310 } 15311 z0 := o0.Args[0] 15312 if z0.Op != OpS390XMOVHZreg { 15313 break 15314 } 15315 x0 := z0.Args[0] 15316 if x0.Op != OpS390XMOVHBRload { 15317 break 15318 } 15319 i := x0.AuxInt 15320 s := x0.Aux 15321 p := x0.Args[0] 15322 mem := x0.Args[1] 15323 s0 := o0.Args[1] 15324 if s0.Op != OpS390XSLWconst { 15325 break 15326 } 15327 if s0.AuxInt != 16 { 15328 break 15329 } 15330 x1 := s0.Args[0] 15331 if x1.Op != OpS390XMOVBZload { 15332 break 15333 } 15334 if x1.AuxInt != i+2 { 15335 break 15336 } 15337 if x1.Aux != s { 15338 break 15339 } 15340 if p != x1.Args[0] { 15341 break 15342 } 15343 if mem != x1.Args[1] { 15344 break 15345 } 15346 s1 := v.Args[1] 15347 if s1.Op != OpS390XSLWconst { 15348 break 15349 } 15350 if s1.AuxInt != 24 { 15351 break 15352 } 15353 x2 := s1.Args[0] 15354 if x2.Op != OpS390XMOVBZload { 15355 break 15356 } 15357 if x2.AuxInt != i+3 { 15358 break 15359 } 15360 if x2.Aux != s { 15361 break 15362 } 15363 if p != x2.Args[0] { 15364 break 15365 } 15366 if mem != x2.Args[1] { 15367 break 15368 } 15369 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15370 break 15371 } 15372 b = mergePoint(b, x0, x1, x2) 15373 v0 := b.NewValue0(v.Line, OpS390XMOVWBRload, config.fe.TypeUInt32()) 15374 v.reset(OpCopy) 15375 v.AddArg(v0) 15376 v0.AuxInt = i 15377 v0.Aux = s 15378 v0.AddArg(p) 15379 v0.AddArg(mem) 15380 return true 15381 } 15382 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 15383 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15384 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 15385 for { 15386 x0 := v.Args[0] 15387 if x0.Op != OpS390XMOVBZloadidx { 15388 break 15389 } 15390 i := x0.AuxInt 15391 s := x0.Aux 15392 p := x0.Args[0] 15393 idx := x0.Args[1] 15394 mem := x0.Args[2] 15395 s0 := v.Args[1] 15396 if s0.Op != OpS390XSLWconst { 15397 break 15398 } 15399 if s0.AuxInt != 8 { 15400 break 15401 } 15402 x1 := s0.Args[0] 15403 if x1.Op != OpS390XMOVBZloadidx { 15404 break 15405 } 15406 if x1.AuxInt != i+1 { 15407 break 15408 } 15409 if x1.Aux != s { 15410 break 15411 } 15412 if p != x1.Args[0] { 15413 break 15414 } 15415 if idx != x1.Args[1] { 15416 break 15417 } 15418 if mem != x1.Args[2] { 15419 break 15420 } 15421 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15422 break 15423 } 15424 b = mergePoint(b, x0, x1) 15425 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15426 v.reset(OpCopy) 15427 v.AddArg(v0) 15428 v1 := b.NewValue0(v.Line, OpS390XMOVHBRloadidx, v.Type) 15429 v1.AuxInt = i 15430 v1.Aux = s 15431 v1.AddArg(p) 15432 v1.AddArg(idx) 15433 v1.AddArg(mem) 15434 v0.AddArg(v1) 15435 return true 15436 } 15437 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 15438 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15439 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 15440 for { 15441 o0 := v.Args[0] 15442 if o0.Op != OpS390XORW { 15443 break 15444 } 15445 z0 := o0.Args[0] 15446 if z0.Op != OpS390XMOVHZreg { 15447 break 15448 } 15449 x0 := z0.Args[0] 15450 if x0.Op != OpS390XMOVHBRloadidx { 15451 break 15452 } 15453 i := x0.AuxInt 15454 s := x0.Aux 15455 p := x0.Args[0] 15456 idx := x0.Args[1] 15457 mem := x0.Args[2] 15458 s0 := o0.Args[1] 15459 if s0.Op != OpS390XSLWconst { 15460 break 15461 } 15462 if s0.AuxInt != 16 { 15463 break 15464 } 15465 x1 := s0.Args[0] 15466 if x1.Op != OpS390XMOVBZloadidx { 15467 break 15468 } 15469 if x1.AuxInt != i+2 { 15470 break 15471 } 15472 if x1.Aux != s { 15473 break 15474 } 15475 if p != x1.Args[0] { 15476 break 15477 } 15478 if idx != x1.Args[1] { 15479 break 15480 } 15481 if mem != x1.Args[2] { 15482 break 15483 } 15484 s1 := v.Args[1] 15485 if s1.Op != OpS390XSLWconst { 15486 break 15487 } 15488 if s1.AuxInt != 24 { 15489 break 15490 } 15491 x2 := s1.Args[0] 15492 if x2.Op != OpS390XMOVBZloadidx { 15493 break 15494 } 15495 if x2.AuxInt != i+3 { 15496 break 15497 } 15498 if x2.Aux != s { 15499 break 15500 } 15501 if p != x2.Args[0] { 15502 break 15503 } 15504 if idx != x2.Args[1] { 15505 break 15506 } 15507 if mem != x2.Args[2] { 15508 break 15509 } 15510 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15511 break 15512 } 15513 b = mergePoint(b, x0, x1, x2) 15514 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 15515 v.reset(OpCopy) 15516 v.AddArg(v0) 15517 v1 := b.NewValue0(v.Line, OpS390XMOVWBRloadidx, v.Type) 15518 v1.AuxInt = i 15519 v1.Aux = s 15520 v1.AddArg(p) 15521 v1.AddArg(idx) 15522 v1.AddArg(mem) 15523 v0.AddArg(v1) 15524 return true 15525 } 15526 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 15527 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15528 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 15529 for { 15530 x0 := v.Args[0] 15531 if x0.Op != OpS390XMOVBZload { 15532 break 15533 } 15534 i := x0.AuxInt 15535 s := x0.Aux 15536 p := x0.Args[0] 15537 mem := x0.Args[1] 15538 s0 := v.Args[1] 15539 if s0.Op != OpS390XSLWconst { 15540 break 15541 } 15542 if s0.AuxInt != 8 { 15543 break 15544 } 15545 x1 := s0.Args[0] 15546 if x1.Op != OpS390XMOVBZload { 15547 break 15548 } 15549 if x1.AuxInt != i-1 { 15550 break 15551 } 15552 if x1.Aux != s { 15553 break 15554 } 15555 if p != x1.Args[0] { 15556 break 15557 } 15558 if mem != x1.Args[1] { 15559 break 15560 } 15561 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15562 break 15563 } 15564 b = mergePoint(b, x0, x1) 15565 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 15566 v.reset(OpCopy) 15567 v.AddArg(v0) 15568 v0.AuxInt = i - 1 15569 v0.Aux = s 15570 v0.AddArg(p) 15571 v0.AddArg(mem) 15572 return true 15573 } 15574 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 15575 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15576 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 15577 for { 15578 o0 := v.Args[0] 15579 if o0.Op != OpS390XORW { 15580 break 15581 } 15582 x0 := o0.Args[0] 15583 if x0.Op != OpS390XMOVHZload { 15584 break 15585 } 15586 i := x0.AuxInt 15587 s := x0.Aux 15588 p := x0.Args[0] 15589 mem := x0.Args[1] 15590 s0 := o0.Args[1] 15591 if s0.Op != OpS390XSLWconst { 15592 break 15593 } 15594 if s0.AuxInt != 16 { 15595 break 15596 } 15597 x1 := s0.Args[0] 15598 if x1.Op != OpS390XMOVBZload { 15599 break 15600 } 15601 if x1.AuxInt != i-1 { 15602 break 15603 } 15604 if x1.Aux != s { 15605 break 15606 } 15607 if p != x1.Args[0] { 15608 break 15609 } 15610 if mem != x1.Args[1] { 15611 break 15612 } 15613 s1 := v.Args[1] 15614 if s1.Op != OpS390XSLWconst { 15615 break 15616 } 15617 if s1.AuxInt != 24 { 15618 break 15619 } 15620 x2 := s1.Args[0] 15621 if x2.Op != OpS390XMOVBZload { 15622 break 15623 } 15624 if x2.AuxInt != i-2 { 15625 break 15626 } 15627 if x2.Aux != s { 15628 break 15629 } 15630 if p != x2.Args[0] { 15631 break 15632 } 15633 if mem != x2.Args[1] { 15634 break 15635 } 15636 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15637 break 15638 } 15639 b = mergePoint(b, x0, x1, x2) 15640 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 15641 v.reset(OpCopy) 15642 v.AddArg(v0) 15643 v0.AuxInt = i - 2 15644 v0.Aux = s 15645 v0.AddArg(p) 15646 v0.AddArg(mem) 15647 return true 15648 } 15649 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 15650 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15651 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 15652 for { 15653 x0 := v.Args[0] 15654 if x0.Op != OpS390XMOVBZloadidx { 15655 break 15656 } 15657 i := x0.AuxInt 15658 s := x0.Aux 15659 p := x0.Args[0] 15660 idx := x0.Args[1] 15661 mem := x0.Args[2] 15662 s0 := v.Args[1] 15663 if s0.Op != OpS390XSLWconst { 15664 break 15665 } 15666 if s0.AuxInt != 8 { 15667 break 15668 } 15669 x1 := s0.Args[0] 15670 if x1.Op != OpS390XMOVBZloadidx { 15671 break 15672 } 15673 if x1.AuxInt != i-1 { 15674 break 15675 } 15676 if x1.Aux != s { 15677 break 15678 } 15679 if p != x1.Args[0] { 15680 break 15681 } 15682 if idx != x1.Args[1] { 15683 break 15684 } 15685 if mem != x1.Args[2] { 15686 break 15687 } 15688 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15689 break 15690 } 15691 b = mergePoint(b, x0, x1) 15692 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 15693 v.reset(OpCopy) 15694 v.AddArg(v0) 15695 v0.AuxInt = i - 1 15696 v0.Aux = s 15697 v0.AddArg(p) 15698 v0.AddArg(idx) 15699 v0.AddArg(mem) 15700 return true 15701 } 15702 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 15703 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15704 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 15705 for { 15706 o0 := v.Args[0] 15707 if o0.Op != OpS390XORW { 15708 break 15709 } 15710 x0 := o0.Args[0] 15711 if x0.Op != OpS390XMOVHZloadidx { 15712 break 15713 } 15714 i := x0.AuxInt 15715 s := x0.Aux 15716 p := x0.Args[0] 15717 idx := x0.Args[1] 15718 mem := x0.Args[2] 15719 s0 := o0.Args[1] 15720 if s0.Op != OpS390XSLWconst { 15721 break 15722 } 15723 if s0.AuxInt != 16 { 15724 break 15725 } 15726 x1 := s0.Args[0] 15727 if x1.Op != OpS390XMOVBZloadidx { 15728 break 15729 } 15730 if x1.AuxInt != i-1 { 15731 break 15732 } 15733 if x1.Aux != s { 15734 break 15735 } 15736 if p != x1.Args[0] { 15737 break 15738 } 15739 if idx != x1.Args[1] { 15740 break 15741 } 15742 if mem != x1.Args[2] { 15743 break 15744 } 15745 s1 := v.Args[1] 15746 if s1.Op != OpS390XSLWconst { 15747 break 15748 } 15749 if s1.AuxInt != 24 { 15750 break 15751 } 15752 x2 := s1.Args[0] 15753 if x2.Op != OpS390XMOVBZloadidx { 15754 break 15755 } 15756 if x2.AuxInt != i-2 { 15757 break 15758 } 15759 if x2.Aux != s { 15760 break 15761 } 15762 if p != x2.Args[0] { 15763 break 15764 } 15765 if idx != x2.Args[1] { 15766 break 15767 } 15768 if mem != x2.Args[2] { 15769 break 15770 } 15771 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15772 break 15773 } 15774 b = mergePoint(b, x0, x1, x2) 15775 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 15776 v.reset(OpCopy) 15777 v.AddArg(v0) 15778 v0.AuxInt = i - 2 15779 v0.Aux = s 15780 v0.AddArg(p) 15781 v0.AddArg(idx) 15782 v0.AddArg(mem) 15783 return true 15784 } 15785 return false 15786 } 15787 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 15788 b := v.Block 15789 _ = b 15790 // match: (ORWconst [c] x) 15791 // cond: int32(c)==0 15792 // result: x 15793 for { 15794 c := v.AuxInt 15795 x := v.Args[0] 15796 if !(int32(c) == 0) { 15797 break 15798 } 15799 v.reset(OpCopy) 15800 v.Type = x.Type 15801 v.AddArg(x) 15802 return true 15803 } 15804 // match: (ORWconst [c] _) 15805 // cond: int32(c)==-1 15806 // result: (MOVDconst [-1]) 15807 for { 15808 c := v.AuxInt 15809 if !(int32(c) == -1) { 15810 break 15811 } 15812 v.reset(OpS390XMOVDconst) 15813 v.AuxInt = -1 15814 return true 15815 } 15816 // match: (ORWconst [c] (MOVDconst [d])) 15817 // cond: 15818 // result: (MOVDconst [c|d]) 15819 for { 15820 c := v.AuxInt 15821 v_0 := v.Args[0] 15822 if v_0.Op != OpS390XMOVDconst { 15823 break 15824 } 15825 d := v_0.AuxInt 15826 v.reset(OpS390XMOVDconst) 15827 v.AuxInt = c | d 15828 return true 15829 } 15830 return false 15831 } 15832 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 15833 b := v.Block 15834 _ = b 15835 // match: (ORconst [0] x) 15836 // cond: 15837 // result: x 15838 for { 15839 if v.AuxInt != 0 { 15840 break 15841 } 15842 x := v.Args[0] 15843 v.reset(OpCopy) 15844 v.Type = x.Type 15845 v.AddArg(x) 15846 return true 15847 } 15848 // match: (ORconst [-1] _) 15849 // cond: 15850 // result: (MOVDconst [-1]) 15851 for { 15852 if v.AuxInt != -1 { 15853 break 15854 } 15855 v.reset(OpS390XMOVDconst) 15856 v.AuxInt = -1 15857 return true 15858 } 15859 // match: (ORconst [c] (MOVDconst [d])) 15860 // cond: 15861 // result: (MOVDconst [c|d]) 15862 for { 15863 c := v.AuxInt 15864 v_0 := v.Args[0] 15865 if v_0.Op != OpS390XMOVDconst { 15866 break 15867 } 15868 d := v_0.AuxInt 15869 v.reset(OpS390XMOVDconst) 15870 v.AuxInt = c | d 15871 return true 15872 } 15873 return false 15874 } 15875 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 15876 b := v.Block 15877 _ = b 15878 // match: (SLD x (MOVDconst [c])) 15879 // cond: 15880 // result: (SLDconst [c&63] x) 15881 for { 15882 x := v.Args[0] 15883 v_1 := v.Args[1] 15884 if v_1.Op != OpS390XMOVDconst { 15885 break 15886 } 15887 c := v_1.AuxInt 15888 v.reset(OpS390XSLDconst) 15889 v.AuxInt = c & 63 15890 v.AddArg(x) 15891 return true 15892 } 15893 // match: (SLD x (ANDconst [63] y)) 15894 // cond: 15895 // result: (SLD x y) 15896 for { 15897 x := v.Args[0] 15898 v_1 := v.Args[1] 15899 if v_1.Op != OpS390XANDconst { 15900 break 15901 } 15902 if v_1.AuxInt != 63 { 15903 break 15904 } 15905 y := v_1.Args[0] 15906 v.reset(OpS390XSLD) 15907 v.AddArg(x) 15908 v.AddArg(y) 15909 return true 15910 } 15911 return false 15912 } 15913 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 15914 b := v.Block 15915 _ = b 15916 // match: (SLW x (MOVDconst [c])) 15917 // cond: 15918 // result: (SLWconst [c&63] x) 15919 for { 15920 x := v.Args[0] 15921 v_1 := v.Args[1] 15922 if v_1.Op != OpS390XMOVDconst { 15923 break 15924 } 15925 c := v_1.AuxInt 15926 v.reset(OpS390XSLWconst) 15927 v.AuxInt = c & 63 15928 v.AddArg(x) 15929 return true 15930 } 15931 // match: (SLW x (ANDWconst [63] y)) 15932 // cond: 15933 // result: (SLW x y) 15934 for { 15935 x := v.Args[0] 15936 v_1 := v.Args[1] 15937 if v_1.Op != OpS390XANDWconst { 15938 break 15939 } 15940 if v_1.AuxInt != 63 { 15941 break 15942 } 15943 y := v_1.Args[0] 15944 v.reset(OpS390XSLW) 15945 v.AddArg(x) 15946 v.AddArg(y) 15947 return true 15948 } 15949 return false 15950 } 15951 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 15952 b := v.Block 15953 _ = b 15954 // match: (SRAD x (MOVDconst [c])) 15955 // cond: 15956 // result: (SRADconst [c&63] x) 15957 for { 15958 x := v.Args[0] 15959 v_1 := v.Args[1] 15960 if v_1.Op != OpS390XMOVDconst { 15961 break 15962 } 15963 c := v_1.AuxInt 15964 v.reset(OpS390XSRADconst) 15965 v.AuxInt = c & 63 15966 v.AddArg(x) 15967 return true 15968 } 15969 // match: (SRAD x (ANDconst [63] y)) 15970 // cond: 15971 // result: (SRAD x y) 15972 for { 15973 x := v.Args[0] 15974 v_1 := v.Args[1] 15975 if v_1.Op != OpS390XANDconst { 15976 break 15977 } 15978 if v_1.AuxInt != 63 { 15979 break 15980 } 15981 y := v_1.Args[0] 15982 v.reset(OpS390XSRAD) 15983 v.AddArg(x) 15984 v.AddArg(y) 15985 return true 15986 } 15987 return false 15988 } 15989 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 15990 b := v.Block 15991 _ = b 15992 // match: (SRADconst [c] (MOVDconst [d])) 15993 // cond: 15994 // result: (MOVDconst [d>>uint64(c)]) 15995 for { 15996 c := v.AuxInt 15997 v_0 := v.Args[0] 15998 if v_0.Op != OpS390XMOVDconst { 15999 break 16000 } 16001 d := v_0.AuxInt 16002 v.reset(OpS390XMOVDconst) 16003 v.AuxInt = d >> uint64(c) 16004 return true 16005 } 16006 return false 16007 } 16008 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 16009 b := v.Block 16010 _ = b 16011 // match: (SRAW x (MOVDconst [c])) 16012 // cond: 16013 // result: (SRAWconst [c&63] x) 16014 for { 16015 x := v.Args[0] 16016 v_1 := v.Args[1] 16017 if v_1.Op != OpS390XMOVDconst { 16018 break 16019 } 16020 c := v_1.AuxInt 16021 v.reset(OpS390XSRAWconst) 16022 v.AuxInt = c & 63 16023 v.AddArg(x) 16024 return true 16025 } 16026 // match: (SRAW x (ANDWconst [63] y)) 16027 // cond: 16028 // result: (SRAW x y) 16029 for { 16030 x := v.Args[0] 16031 v_1 := v.Args[1] 16032 if v_1.Op != OpS390XANDWconst { 16033 break 16034 } 16035 if v_1.AuxInt != 63 { 16036 break 16037 } 16038 y := v_1.Args[0] 16039 v.reset(OpS390XSRAW) 16040 v.AddArg(x) 16041 v.AddArg(y) 16042 return true 16043 } 16044 return false 16045 } 16046 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 16047 b := v.Block 16048 _ = b 16049 // match: (SRAWconst [c] (MOVDconst [d])) 16050 // cond: 16051 // result: (MOVDconst [d>>uint64(c)]) 16052 for { 16053 c := v.AuxInt 16054 v_0 := v.Args[0] 16055 if v_0.Op != OpS390XMOVDconst { 16056 break 16057 } 16058 d := v_0.AuxInt 16059 v.reset(OpS390XMOVDconst) 16060 v.AuxInt = d >> uint64(c) 16061 return true 16062 } 16063 return false 16064 } 16065 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 16066 b := v.Block 16067 _ = b 16068 // match: (SRD x (MOVDconst [c])) 16069 // cond: 16070 // result: (SRDconst [c&63] x) 16071 for { 16072 x := v.Args[0] 16073 v_1 := v.Args[1] 16074 if v_1.Op != OpS390XMOVDconst { 16075 break 16076 } 16077 c := v_1.AuxInt 16078 v.reset(OpS390XSRDconst) 16079 v.AuxInt = c & 63 16080 v.AddArg(x) 16081 return true 16082 } 16083 // match: (SRD x (ANDconst [63] y)) 16084 // cond: 16085 // result: (SRD x y) 16086 for { 16087 x := v.Args[0] 16088 v_1 := v.Args[1] 16089 if v_1.Op != OpS390XANDconst { 16090 break 16091 } 16092 if v_1.AuxInt != 63 { 16093 break 16094 } 16095 y := v_1.Args[0] 16096 v.reset(OpS390XSRD) 16097 v.AddArg(x) 16098 v.AddArg(y) 16099 return true 16100 } 16101 return false 16102 } 16103 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16104 b := v.Block 16105 _ = b 16106 // match: (SRW x (MOVDconst [c])) 16107 // cond: 16108 // result: (SRWconst [c&63] x) 16109 for { 16110 x := v.Args[0] 16111 v_1 := v.Args[1] 16112 if v_1.Op != OpS390XMOVDconst { 16113 break 16114 } 16115 c := v_1.AuxInt 16116 v.reset(OpS390XSRWconst) 16117 v.AuxInt = c & 63 16118 v.AddArg(x) 16119 return true 16120 } 16121 // match: (SRW x (ANDWconst [63] y)) 16122 // cond: 16123 // result: (SRW x y) 16124 for { 16125 x := v.Args[0] 16126 v_1 := v.Args[1] 16127 if v_1.Op != OpS390XANDWconst { 16128 break 16129 } 16130 if v_1.AuxInt != 63 { 16131 break 16132 } 16133 y := v_1.Args[0] 16134 v.reset(OpS390XSRW) 16135 v.AddArg(x) 16136 v.AddArg(y) 16137 return true 16138 } 16139 return false 16140 } 16141 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16142 b := v.Block 16143 _ = b 16144 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16145 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16146 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16147 for { 16148 i := v.AuxInt 16149 s := v.Aux 16150 p := v.Args[0] 16151 w2 := v.Args[1] 16152 w3 := v.Args[2] 16153 x := v.Args[3] 16154 if x.Op != OpS390XSTM2 { 16155 break 16156 } 16157 if x.AuxInt != i-8 { 16158 break 16159 } 16160 if x.Aux != s { 16161 break 16162 } 16163 if p != x.Args[0] { 16164 break 16165 } 16166 w0 := x.Args[1] 16167 w1 := x.Args[2] 16168 mem := x.Args[3] 16169 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16170 break 16171 } 16172 v.reset(OpS390XSTM4) 16173 v.AuxInt = i - 8 16174 v.Aux = s 16175 v.AddArg(p) 16176 v.AddArg(w0) 16177 v.AddArg(w1) 16178 v.AddArg(w2) 16179 v.AddArg(w3) 16180 v.AddArg(mem) 16181 return true 16182 } 16183 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16184 // cond: 16185 // result: (MOVDstore [i] {s} p x mem) 16186 for { 16187 i := v.AuxInt 16188 s := v.Aux 16189 p := v.Args[0] 16190 v_1 := v.Args[1] 16191 if v_1.Op != OpS390XSRDconst { 16192 break 16193 } 16194 if v_1.AuxInt != 32 { 16195 break 16196 } 16197 x := v_1.Args[0] 16198 if x != v.Args[2] { 16199 break 16200 } 16201 mem := v.Args[3] 16202 v.reset(OpS390XMOVDstore) 16203 v.AuxInt = i 16204 v.Aux = s 16205 v.AddArg(p) 16206 v.AddArg(x) 16207 v.AddArg(mem) 16208 return true 16209 } 16210 return false 16211 } 16212 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16213 b := v.Block 16214 _ = b 16215 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 16216 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 16217 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 16218 for { 16219 i := v.AuxInt 16220 s := v.Aux 16221 p := v.Args[0] 16222 w2 := v.Args[1] 16223 w3 := v.Args[2] 16224 x := v.Args[3] 16225 if x.Op != OpS390XSTMG2 { 16226 break 16227 } 16228 if x.AuxInt != i-16 { 16229 break 16230 } 16231 if x.Aux != s { 16232 break 16233 } 16234 if p != x.Args[0] { 16235 break 16236 } 16237 w0 := x.Args[1] 16238 w1 := x.Args[2] 16239 mem := x.Args[3] 16240 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 16241 break 16242 } 16243 v.reset(OpS390XSTMG4) 16244 v.AuxInt = i - 16 16245 v.Aux = s 16246 v.AddArg(p) 16247 v.AddArg(w0) 16248 v.AddArg(w1) 16249 v.AddArg(w2) 16250 v.AddArg(w3) 16251 v.AddArg(mem) 16252 return true 16253 } 16254 return false 16255 } 16256 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 16257 b := v.Block 16258 _ = b 16259 // match: (SUB x (MOVDconst [c])) 16260 // cond: is32Bit(c) 16261 // result: (SUBconst x [c]) 16262 for { 16263 x := v.Args[0] 16264 v_1 := v.Args[1] 16265 if v_1.Op != OpS390XMOVDconst { 16266 break 16267 } 16268 c := v_1.AuxInt 16269 if !(is32Bit(c)) { 16270 break 16271 } 16272 v.reset(OpS390XSUBconst) 16273 v.AuxInt = c 16274 v.AddArg(x) 16275 return true 16276 } 16277 // match: (SUB (MOVDconst [c]) x) 16278 // cond: is32Bit(c) 16279 // result: (NEG (SUBconst <v.Type> x [c])) 16280 for { 16281 v_0 := v.Args[0] 16282 if v_0.Op != OpS390XMOVDconst { 16283 break 16284 } 16285 c := v_0.AuxInt 16286 x := v.Args[1] 16287 if !(is32Bit(c)) { 16288 break 16289 } 16290 v.reset(OpS390XNEG) 16291 v0 := b.NewValue0(v.Line, OpS390XSUBconst, v.Type) 16292 v0.AuxInt = c 16293 v0.AddArg(x) 16294 v.AddArg(v0) 16295 return true 16296 } 16297 // match: (SUB x x) 16298 // cond: 16299 // result: (MOVDconst [0]) 16300 for { 16301 x := v.Args[0] 16302 if x != v.Args[1] { 16303 break 16304 } 16305 v.reset(OpS390XMOVDconst) 16306 v.AuxInt = 0 16307 return true 16308 } 16309 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 16310 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16311 // result: (SUBload <t> [off] {sym} x ptr mem) 16312 for { 16313 t := v.Type 16314 x := v.Args[0] 16315 g := v.Args[1] 16316 if g.Op != OpS390XMOVDload { 16317 break 16318 } 16319 off := g.AuxInt 16320 sym := g.Aux 16321 ptr := g.Args[0] 16322 mem := g.Args[1] 16323 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16324 break 16325 } 16326 v.reset(OpS390XSUBload) 16327 v.Type = t 16328 v.AuxInt = off 16329 v.Aux = sym 16330 v.AddArg(x) 16331 v.AddArg(ptr) 16332 v.AddArg(mem) 16333 return true 16334 } 16335 return false 16336 } 16337 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 16338 b := v.Block 16339 _ = b 16340 // match: (SUBEWcarrymask (FlagEQ)) 16341 // cond: 16342 // result: (MOVDconst [-1]) 16343 for { 16344 v_0 := v.Args[0] 16345 if v_0.Op != OpS390XFlagEQ { 16346 break 16347 } 16348 v.reset(OpS390XMOVDconst) 16349 v.AuxInt = -1 16350 return true 16351 } 16352 // match: (SUBEWcarrymask (FlagLT)) 16353 // cond: 16354 // result: (MOVDconst [-1]) 16355 for { 16356 v_0 := v.Args[0] 16357 if v_0.Op != OpS390XFlagLT { 16358 break 16359 } 16360 v.reset(OpS390XMOVDconst) 16361 v.AuxInt = -1 16362 return true 16363 } 16364 // match: (SUBEWcarrymask (FlagGT)) 16365 // cond: 16366 // result: (MOVDconst [0]) 16367 for { 16368 v_0 := v.Args[0] 16369 if v_0.Op != OpS390XFlagGT { 16370 break 16371 } 16372 v.reset(OpS390XMOVDconst) 16373 v.AuxInt = 0 16374 return true 16375 } 16376 return false 16377 } 16378 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 16379 b := v.Block 16380 _ = b 16381 // match: (SUBEcarrymask (FlagEQ)) 16382 // cond: 16383 // result: (MOVDconst [-1]) 16384 for { 16385 v_0 := v.Args[0] 16386 if v_0.Op != OpS390XFlagEQ { 16387 break 16388 } 16389 v.reset(OpS390XMOVDconst) 16390 v.AuxInt = -1 16391 return true 16392 } 16393 // match: (SUBEcarrymask (FlagLT)) 16394 // cond: 16395 // result: (MOVDconst [-1]) 16396 for { 16397 v_0 := v.Args[0] 16398 if v_0.Op != OpS390XFlagLT { 16399 break 16400 } 16401 v.reset(OpS390XMOVDconst) 16402 v.AuxInt = -1 16403 return true 16404 } 16405 // match: (SUBEcarrymask (FlagGT)) 16406 // cond: 16407 // result: (MOVDconst [0]) 16408 for { 16409 v_0 := v.Args[0] 16410 if v_0.Op != OpS390XFlagGT { 16411 break 16412 } 16413 v.reset(OpS390XMOVDconst) 16414 v.AuxInt = 0 16415 return true 16416 } 16417 return false 16418 } 16419 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 16420 b := v.Block 16421 _ = b 16422 // match: (SUBW x (MOVDconst [c])) 16423 // cond: 16424 // result: (SUBWconst x [c]) 16425 for { 16426 x := v.Args[0] 16427 v_1 := v.Args[1] 16428 if v_1.Op != OpS390XMOVDconst { 16429 break 16430 } 16431 c := v_1.AuxInt 16432 v.reset(OpS390XSUBWconst) 16433 v.AuxInt = c 16434 v.AddArg(x) 16435 return true 16436 } 16437 // match: (SUBW (MOVDconst [c]) x) 16438 // cond: 16439 // result: (NEGW (SUBWconst <v.Type> x [c])) 16440 for { 16441 v_0 := v.Args[0] 16442 if v_0.Op != OpS390XMOVDconst { 16443 break 16444 } 16445 c := v_0.AuxInt 16446 x := v.Args[1] 16447 v.reset(OpS390XNEGW) 16448 v0 := b.NewValue0(v.Line, OpS390XSUBWconst, v.Type) 16449 v0.AuxInt = c 16450 v0.AddArg(x) 16451 v.AddArg(v0) 16452 return true 16453 } 16454 // match: (SUBW x x) 16455 // cond: 16456 // result: (MOVDconst [0]) 16457 for { 16458 x := v.Args[0] 16459 if x != v.Args[1] { 16460 break 16461 } 16462 v.reset(OpS390XMOVDconst) 16463 v.AuxInt = 0 16464 return true 16465 } 16466 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 16467 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16468 // result: (SUBWload <t> [off] {sym} x ptr mem) 16469 for { 16470 t := v.Type 16471 x := v.Args[0] 16472 g := v.Args[1] 16473 if g.Op != OpS390XMOVWload { 16474 break 16475 } 16476 off := g.AuxInt 16477 sym := g.Aux 16478 ptr := g.Args[0] 16479 mem := g.Args[1] 16480 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16481 break 16482 } 16483 v.reset(OpS390XSUBWload) 16484 v.Type = t 16485 v.AuxInt = off 16486 v.Aux = sym 16487 v.AddArg(x) 16488 v.AddArg(ptr) 16489 v.AddArg(mem) 16490 return true 16491 } 16492 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16493 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16494 // result: (SUBWload <t> [off] {sym} x ptr mem) 16495 for { 16496 t := v.Type 16497 x := v.Args[0] 16498 g := v.Args[1] 16499 if g.Op != OpS390XMOVWZload { 16500 break 16501 } 16502 off := g.AuxInt 16503 sym := g.Aux 16504 ptr := g.Args[0] 16505 mem := g.Args[1] 16506 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16507 break 16508 } 16509 v.reset(OpS390XSUBWload) 16510 v.Type = t 16511 v.AuxInt = off 16512 v.Aux = sym 16513 v.AddArg(x) 16514 v.AddArg(ptr) 16515 v.AddArg(mem) 16516 return true 16517 } 16518 return false 16519 } 16520 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 16521 b := v.Block 16522 _ = b 16523 // match: (SUBWconst [c] x) 16524 // cond: int32(c) == 0 16525 // result: x 16526 for { 16527 c := v.AuxInt 16528 x := v.Args[0] 16529 if !(int32(c) == 0) { 16530 break 16531 } 16532 v.reset(OpCopy) 16533 v.Type = x.Type 16534 v.AddArg(x) 16535 return true 16536 } 16537 // match: (SUBWconst [c] x) 16538 // cond: 16539 // result: (ADDWconst [int64(int32(-c))] x) 16540 for { 16541 c := v.AuxInt 16542 x := v.Args[0] 16543 v.reset(OpS390XADDWconst) 16544 v.AuxInt = int64(int32(-c)) 16545 v.AddArg(x) 16546 return true 16547 } 16548 } 16549 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 16550 b := v.Block 16551 _ = b 16552 // match: (SUBconst [0] x) 16553 // cond: 16554 // result: x 16555 for { 16556 if v.AuxInt != 0 { 16557 break 16558 } 16559 x := v.Args[0] 16560 v.reset(OpCopy) 16561 v.Type = x.Type 16562 v.AddArg(x) 16563 return true 16564 } 16565 // match: (SUBconst [c] x) 16566 // cond: c != -(1<<31) 16567 // result: (ADDconst [-c] x) 16568 for { 16569 c := v.AuxInt 16570 x := v.Args[0] 16571 if !(c != -(1 << 31)) { 16572 break 16573 } 16574 v.reset(OpS390XADDconst) 16575 v.AuxInt = -c 16576 v.AddArg(x) 16577 return true 16578 } 16579 // match: (SUBconst (MOVDconst [d]) [c]) 16580 // cond: 16581 // result: (MOVDconst [d-c]) 16582 for { 16583 c := v.AuxInt 16584 v_0 := v.Args[0] 16585 if v_0.Op != OpS390XMOVDconst { 16586 break 16587 } 16588 d := v_0.AuxInt 16589 v.reset(OpS390XMOVDconst) 16590 v.AuxInt = d - c 16591 return true 16592 } 16593 // match: (SUBconst (SUBconst x [d]) [c]) 16594 // cond: is32Bit(-c-d) 16595 // result: (ADDconst [-c-d] x) 16596 for { 16597 c := v.AuxInt 16598 v_0 := v.Args[0] 16599 if v_0.Op != OpS390XSUBconst { 16600 break 16601 } 16602 d := v_0.AuxInt 16603 x := v_0.Args[0] 16604 if !(is32Bit(-c - d)) { 16605 break 16606 } 16607 v.reset(OpS390XADDconst) 16608 v.AuxInt = -c - d 16609 v.AddArg(x) 16610 return true 16611 } 16612 return false 16613 } 16614 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 16615 b := v.Block 16616 _ = b 16617 // match: (XOR x (MOVDconst [c])) 16618 // cond: isU32Bit(c) 16619 // result: (XORconst [c] x) 16620 for { 16621 x := v.Args[0] 16622 v_1 := v.Args[1] 16623 if v_1.Op != OpS390XMOVDconst { 16624 break 16625 } 16626 c := v_1.AuxInt 16627 if !(isU32Bit(c)) { 16628 break 16629 } 16630 v.reset(OpS390XXORconst) 16631 v.AuxInt = c 16632 v.AddArg(x) 16633 return true 16634 } 16635 // match: (XOR (MOVDconst [c]) x) 16636 // cond: isU32Bit(c) 16637 // result: (XORconst [c] x) 16638 for { 16639 v_0 := v.Args[0] 16640 if v_0.Op != OpS390XMOVDconst { 16641 break 16642 } 16643 c := v_0.AuxInt 16644 x := v.Args[1] 16645 if !(isU32Bit(c)) { 16646 break 16647 } 16648 v.reset(OpS390XXORconst) 16649 v.AuxInt = c 16650 v.AddArg(x) 16651 return true 16652 } 16653 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 16654 // cond: 16655 // result: (MOVDconst [c^d]) 16656 for { 16657 v_0 := v.Args[0] 16658 if v_0.Op != OpS390XMOVDconst { 16659 break 16660 } 16661 c := v_0.AuxInt 16662 v_1 := v.Args[1] 16663 if v_1.Op != OpS390XMOVDconst { 16664 break 16665 } 16666 d := v_1.AuxInt 16667 v.reset(OpS390XMOVDconst) 16668 v.AuxInt = c ^ d 16669 return true 16670 } 16671 // match: (XOR x x) 16672 // cond: 16673 // result: (MOVDconst [0]) 16674 for { 16675 x := v.Args[0] 16676 if x != v.Args[1] { 16677 break 16678 } 16679 v.reset(OpS390XMOVDconst) 16680 v.AuxInt = 0 16681 return true 16682 } 16683 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 16684 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16685 // result: (XORload <t> [off] {sym} x ptr mem) 16686 for { 16687 t := v.Type 16688 x := v.Args[0] 16689 g := v.Args[1] 16690 if g.Op != OpS390XMOVDload { 16691 break 16692 } 16693 off := g.AuxInt 16694 sym := g.Aux 16695 ptr := g.Args[0] 16696 mem := g.Args[1] 16697 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16698 break 16699 } 16700 v.reset(OpS390XXORload) 16701 v.Type = t 16702 v.AuxInt = off 16703 v.Aux = sym 16704 v.AddArg(x) 16705 v.AddArg(ptr) 16706 v.AddArg(mem) 16707 return true 16708 } 16709 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 16710 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16711 // result: (XORload <t> [off] {sym} x ptr mem) 16712 for { 16713 t := v.Type 16714 g := v.Args[0] 16715 if g.Op != OpS390XMOVDload { 16716 break 16717 } 16718 off := g.AuxInt 16719 sym := g.Aux 16720 ptr := g.Args[0] 16721 mem := g.Args[1] 16722 x := v.Args[1] 16723 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16724 break 16725 } 16726 v.reset(OpS390XXORload) 16727 v.Type = t 16728 v.AuxInt = off 16729 v.Aux = sym 16730 v.AddArg(x) 16731 v.AddArg(ptr) 16732 v.AddArg(mem) 16733 return true 16734 } 16735 return false 16736 } 16737 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 16738 b := v.Block 16739 _ = b 16740 // match: (XORW x (MOVDconst [c])) 16741 // cond: 16742 // result: (XORWconst [c] x) 16743 for { 16744 x := v.Args[0] 16745 v_1 := v.Args[1] 16746 if v_1.Op != OpS390XMOVDconst { 16747 break 16748 } 16749 c := v_1.AuxInt 16750 v.reset(OpS390XXORWconst) 16751 v.AuxInt = c 16752 v.AddArg(x) 16753 return true 16754 } 16755 // match: (XORW (MOVDconst [c]) x) 16756 // cond: 16757 // result: (XORWconst [c] x) 16758 for { 16759 v_0 := v.Args[0] 16760 if v_0.Op != OpS390XMOVDconst { 16761 break 16762 } 16763 c := v_0.AuxInt 16764 x := v.Args[1] 16765 v.reset(OpS390XXORWconst) 16766 v.AuxInt = c 16767 v.AddArg(x) 16768 return true 16769 } 16770 // match: (XORW x x) 16771 // cond: 16772 // result: (MOVDconst [0]) 16773 for { 16774 x := v.Args[0] 16775 if x != v.Args[1] { 16776 break 16777 } 16778 v.reset(OpS390XMOVDconst) 16779 v.AuxInt = 0 16780 return true 16781 } 16782 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 16783 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16784 // result: (XORWload <t> [off] {sym} x ptr mem) 16785 for { 16786 t := v.Type 16787 x := v.Args[0] 16788 g := v.Args[1] 16789 if g.Op != OpS390XMOVWload { 16790 break 16791 } 16792 off := g.AuxInt 16793 sym := g.Aux 16794 ptr := g.Args[0] 16795 mem := g.Args[1] 16796 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16797 break 16798 } 16799 v.reset(OpS390XXORWload) 16800 v.Type = t 16801 v.AuxInt = off 16802 v.Aux = sym 16803 v.AddArg(x) 16804 v.AddArg(ptr) 16805 v.AddArg(mem) 16806 return true 16807 } 16808 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 16809 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16810 // result: (XORWload <t> [off] {sym} x ptr mem) 16811 for { 16812 t := v.Type 16813 g := v.Args[0] 16814 if g.Op != OpS390XMOVWload { 16815 break 16816 } 16817 off := g.AuxInt 16818 sym := g.Aux 16819 ptr := g.Args[0] 16820 mem := g.Args[1] 16821 x := v.Args[1] 16822 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16823 break 16824 } 16825 v.reset(OpS390XXORWload) 16826 v.Type = t 16827 v.AuxInt = off 16828 v.Aux = sym 16829 v.AddArg(x) 16830 v.AddArg(ptr) 16831 v.AddArg(mem) 16832 return true 16833 } 16834 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16835 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16836 // result: (XORWload <t> [off] {sym} x ptr mem) 16837 for { 16838 t := v.Type 16839 x := v.Args[0] 16840 g := v.Args[1] 16841 if g.Op != OpS390XMOVWZload { 16842 break 16843 } 16844 off := g.AuxInt 16845 sym := g.Aux 16846 ptr := g.Args[0] 16847 mem := g.Args[1] 16848 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16849 break 16850 } 16851 v.reset(OpS390XXORWload) 16852 v.Type = t 16853 v.AuxInt = off 16854 v.Aux = sym 16855 v.AddArg(x) 16856 v.AddArg(ptr) 16857 v.AddArg(mem) 16858 return true 16859 } 16860 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 16861 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16862 // result: (XORWload <t> [off] {sym} x ptr mem) 16863 for { 16864 t := v.Type 16865 g := v.Args[0] 16866 if g.Op != OpS390XMOVWZload { 16867 break 16868 } 16869 off := g.AuxInt 16870 sym := g.Aux 16871 ptr := g.Args[0] 16872 mem := g.Args[1] 16873 x := v.Args[1] 16874 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16875 break 16876 } 16877 v.reset(OpS390XXORWload) 16878 v.Type = t 16879 v.AuxInt = off 16880 v.Aux = sym 16881 v.AddArg(x) 16882 v.AddArg(ptr) 16883 v.AddArg(mem) 16884 return true 16885 } 16886 return false 16887 } 16888 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 16889 b := v.Block 16890 _ = b 16891 // match: (XORWconst [c] x) 16892 // cond: int32(c)==0 16893 // result: x 16894 for { 16895 c := v.AuxInt 16896 x := v.Args[0] 16897 if !(int32(c) == 0) { 16898 break 16899 } 16900 v.reset(OpCopy) 16901 v.Type = x.Type 16902 v.AddArg(x) 16903 return true 16904 } 16905 // match: (XORWconst [c] (MOVDconst [d])) 16906 // cond: 16907 // result: (MOVDconst [c^d]) 16908 for { 16909 c := v.AuxInt 16910 v_0 := v.Args[0] 16911 if v_0.Op != OpS390XMOVDconst { 16912 break 16913 } 16914 d := v_0.AuxInt 16915 v.reset(OpS390XMOVDconst) 16916 v.AuxInt = c ^ d 16917 return true 16918 } 16919 return false 16920 } 16921 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 16922 b := v.Block 16923 _ = b 16924 // match: (XORconst [0] x) 16925 // cond: 16926 // result: x 16927 for { 16928 if v.AuxInt != 0 { 16929 break 16930 } 16931 x := v.Args[0] 16932 v.reset(OpCopy) 16933 v.Type = x.Type 16934 v.AddArg(x) 16935 return true 16936 } 16937 // match: (XORconst [c] (MOVDconst [d])) 16938 // cond: 16939 // result: (MOVDconst [c^d]) 16940 for { 16941 c := v.AuxInt 16942 v_0 := v.Args[0] 16943 if v_0.Op != OpS390XMOVDconst { 16944 break 16945 } 16946 d := v_0.AuxInt 16947 v.reset(OpS390XMOVDconst) 16948 v.AuxInt = c ^ d 16949 return true 16950 } 16951 return false 16952 } 16953 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 16954 b := v.Block 16955 _ = b 16956 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 16957 // cond: 16958 // result: (ADDW val (Select0 <t> tuple)) 16959 for { 16960 t := v.Type 16961 v_0 := v.Args[0] 16962 if v_0.Op != OpS390XAddTupleFirst32 { 16963 break 16964 } 16965 tuple := v_0.Args[0] 16966 val := v_0.Args[1] 16967 v.reset(OpS390XADDW) 16968 v.AddArg(val) 16969 v0 := b.NewValue0(v.Line, OpSelect0, t) 16970 v0.AddArg(tuple) 16971 v.AddArg(v0) 16972 return true 16973 } 16974 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 16975 // cond: 16976 // result: (ADD val (Select0 <t> tuple)) 16977 for { 16978 t := v.Type 16979 v_0 := v.Args[0] 16980 if v_0.Op != OpS390XAddTupleFirst64 { 16981 break 16982 } 16983 tuple := v_0.Args[0] 16984 val := v_0.Args[1] 16985 v.reset(OpS390XADD) 16986 v.AddArg(val) 16987 v0 := b.NewValue0(v.Line, OpSelect0, t) 16988 v0.AddArg(tuple) 16989 v.AddArg(v0) 16990 return true 16991 } 16992 return false 16993 } 16994 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 16995 b := v.Block 16996 _ = b 16997 // match: (Select1 (AddTupleFirst32 tuple _ )) 16998 // cond: 16999 // result: (Select1 tuple) 17000 for { 17001 v_0 := v.Args[0] 17002 if v_0.Op != OpS390XAddTupleFirst32 { 17003 break 17004 } 17005 tuple := v_0.Args[0] 17006 v.reset(OpSelect1) 17007 v.AddArg(tuple) 17008 return true 17009 } 17010 // match: (Select1 (AddTupleFirst64 tuple _ )) 17011 // cond: 17012 // result: (Select1 tuple) 17013 for { 17014 v_0 := v.Args[0] 17015 if v_0.Op != OpS390XAddTupleFirst64 { 17016 break 17017 } 17018 tuple := v_0.Args[0] 17019 v.reset(OpSelect1) 17020 v.AddArg(tuple) 17021 return true 17022 } 17023 return false 17024 } 17025 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 17026 b := v.Block 17027 _ = b 17028 // match: (SignExt16to32 x) 17029 // cond: 17030 // result: (MOVHreg x) 17031 for { 17032 x := v.Args[0] 17033 v.reset(OpS390XMOVHreg) 17034 v.AddArg(x) 17035 return true 17036 } 17037 } 17038 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 17039 b := v.Block 17040 _ = b 17041 // match: (SignExt16to64 x) 17042 // cond: 17043 // result: (MOVHreg x) 17044 for { 17045 x := v.Args[0] 17046 v.reset(OpS390XMOVHreg) 17047 v.AddArg(x) 17048 return true 17049 } 17050 } 17051 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 17052 b := v.Block 17053 _ = b 17054 // match: (SignExt32to64 x) 17055 // cond: 17056 // result: (MOVWreg x) 17057 for { 17058 x := v.Args[0] 17059 v.reset(OpS390XMOVWreg) 17060 v.AddArg(x) 17061 return true 17062 } 17063 } 17064 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 17065 b := v.Block 17066 _ = b 17067 // match: (SignExt8to16 x) 17068 // cond: 17069 // result: (MOVBreg x) 17070 for { 17071 x := v.Args[0] 17072 v.reset(OpS390XMOVBreg) 17073 v.AddArg(x) 17074 return true 17075 } 17076 } 17077 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17078 b := v.Block 17079 _ = b 17080 // match: (SignExt8to32 x) 17081 // cond: 17082 // result: (MOVBreg x) 17083 for { 17084 x := v.Args[0] 17085 v.reset(OpS390XMOVBreg) 17086 v.AddArg(x) 17087 return true 17088 } 17089 } 17090 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17091 b := v.Block 17092 _ = b 17093 // match: (SignExt8to64 x) 17094 // cond: 17095 // result: (MOVBreg x) 17096 for { 17097 x := v.Args[0] 17098 v.reset(OpS390XMOVBreg) 17099 v.AddArg(x) 17100 return true 17101 } 17102 } 17103 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17104 b := v.Block 17105 _ = b 17106 // match: (Slicemask <t> x) 17107 // cond: 17108 // result: (XOR (MOVDconst [-1]) (SRADconst <t> (SUBconst <t> x [1]) [63])) 17109 for { 17110 t := v.Type 17111 x := v.Args[0] 17112 v.reset(OpS390XXOR) 17113 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 17114 v0.AuxInt = -1 17115 v.AddArg(v0) 17116 v1 := b.NewValue0(v.Line, OpS390XSRADconst, t) 17117 v1.AuxInt = 63 17118 v2 := b.NewValue0(v.Line, OpS390XSUBconst, t) 17119 v2.AuxInt = 1 17120 v2.AddArg(x) 17121 v1.AddArg(v2) 17122 v.AddArg(v1) 17123 return true 17124 } 17125 } 17126 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 17127 b := v.Block 17128 _ = b 17129 // match: (Sqrt x) 17130 // cond: 17131 // result: (FSQRT x) 17132 for { 17133 x := v.Args[0] 17134 v.reset(OpS390XFSQRT) 17135 v.AddArg(x) 17136 return true 17137 } 17138 } 17139 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 17140 b := v.Block 17141 _ = b 17142 // match: (StaticCall [argwid] {target} mem) 17143 // cond: 17144 // result: (CALLstatic [argwid] {target} mem) 17145 for { 17146 argwid := v.AuxInt 17147 target := v.Aux 17148 mem := v.Args[0] 17149 v.reset(OpS390XCALLstatic) 17150 v.AuxInt = argwid 17151 v.Aux = target 17152 v.AddArg(mem) 17153 return true 17154 } 17155 } 17156 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 17157 b := v.Block 17158 _ = b 17159 // match: (Store [8] ptr val mem) 17160 // cond: is64BitFloat(val.Type) 17161 // result: (FMOVDstore ptr val mem) 17162 for { 17163 if v.AuxInt != 8 { 17164 break 17165 } 17166 ptr := v.Args[0] 17167 val := v.Args[1] 17168 mem := v.Args[2] 17169 if !(is64BitFloat(val.Type)) { 17170 break 17171 } 17172 v.reset(OpS390XFMOVDstore) 17173 v.AddArg(ptr) 17174 v.AddArg(val) 17175 v.AddArg(mem) 17176 return true 17177 } 17178 // match: (Store [4] ptr val mem) 17179 // cond: is32BitFloat(val.Type) 17180 // result: (FMOVSstore ptr val mem) 17181 for { 17182 if v.AuxInt != 4 { 17183 break 17184 } 17185 ptr := v.Args[0] 17186 val := v.Args[1] 17187 mem := v.Args[2] 17188 if !(is32BitFloat(val.Type)) { 17189 break 17190 } 17191 v.reset(OpS390XFMOVSstore) 17192 v.AddArg(ptr) 17193 v.AddArg(val) 17194 v.AddArg(mem) 17195 return true 17196 } 17197 // match: (Store [8] ptr val mem) 17198 // cond: 17199 // result: (MOVDstore ptr val mem) 17200 for { 17201 if v.AuxInt != 8 { 17202 break 17203 } 17204 ptr := v.Args[0] 17205 val := v.Args[1] 17206 mem := v.Args[2] 17207 v.reset(OpS390XMOVDstore) 17208 v.AddArg(ptr) 17209 v.AddArg(val) 17210 v.AddArg(mem) 17211 return true 17212 } 17213 // match: (Store [4] ptr val mem) 17214 // cond: 17215 // result: (MOVWstore ptr val mem) 17216 for { 17217 if v.AuxInt != 4 { 17218 break 17219 } 17220 ptr := v.Args[0] 17221 val := v.Args[1] 17222 mem := v.Args[2] 17223 v.reset(OpS390XMOVWstore) 17224 v.AddArg(ptr) 17225 v.AddArg(val) 17226 v.AddArg(mem) 17227 return true 17228 } 17229 // match: (Store [2] ptr val mem) 17230 // cond: 17231 // result: (MOVHstore ptr val mem) 17232 for { 17233 if v.AuxInt != 2 { 17234 break 17235 } 17236 ptr := v.Args[0] 17237 val := v.Args[1] 17238 mem := v.Args[2] 17239 v.reset(OpS390XMOVHstore) 17240 v.AddArg(ptr) 17241 v.AddArg(val) 17242 v.AddArg(mem) 17243 return true 17244 } 17245 // match: (Store [1] ptr val mem) 17246 // cond: 17247 // result: (MOVBstore ptr val mem) 17248 for { 17249 if v.AuxInt != 1 { 17250 break 17251 } 17252 ptr := v.Args[0] 17253 val := v.Args[1] 17254 mem := v.Args[2] 17255 v.reset(OpS390XMOVBstore) 17256 v.AddArg(ptr) 17257 v.AddArg(val) 17258 v.AddArg(mem) 17259 return true 17260 } 17261 return false 17262 } 17263 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 17264 b := v.Block 17265 _ = b 17266 // match: (Sub16 x y) 17267 // cond: 17268 // result: (SUBW x y) 17269 for { 17270 x := v.Args[0] 17271 y := v.Args[1] 17272 v.reset(OpS390XSUBW) 17273 v.AddArg(x) 17274 v.AddArg(y) 17275 return true 17276 } 17277 } 17278 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 17279 b := v.Block 17280 _ = b 17281 // match: (Sub32 x y) 17282 // cond: 17283 // result: (SUBW x y) 17284 for { 17285 x := v.Args[0] 17286 y := v.Args[1] 17287 v.reset(OpS390XSUBW) 17288 v.AddArg(x) 17289 v.AddArg(y) 17290 return true 17291 } 17292 } 17293 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 17294 b := v.Block 17295 _ = b 17296 // match: (Sub32F x y) 17297 // cond: 17298 // result: (FSUBS x y) 17299 for { 17300 x := v.Args[0] 17301 y := v.Args[1] 17302 v.reset(OpS390XFSUBS) 17303 v.AddArg(x) 17304 v.AddArg(y) 17305 return true 17306 } 17307 } 17308 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 17309 b := v.Block 17310 _ = b 17311 // match: (Sub64 x y) 17312 // cond: 17313 // result: (SUB x y) 17314 for { 17315 x := v.Args[0] 17316 y := v.Args[1] 17317 v.reset(OpS390XSUB) 17318 v.AddArg(x) 17319 v.AddArg(y) 17320 return true 17321 } 17322 } 17323 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 17324 b := v.Block 17325 _ = b 17326 // match: (Sub64F x y) 17327 // cond: 17328 // result: (FSUB x y) 17329 for { 17330 x := v.Args[0] 17331 y := v.Args[1] 17332 v.reset(OpS390XFSUB) 17333 v.AddArg(x) 17334 v.AddArg(y) 17335 return true 17336 } 17337 } 17338 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 17339 b := v.Block 17340 _ = b 17341 // match: (Sub8 x y) 17342 // cond: 17343 // result: (SUBW x y) 17344 for { 17345 x := v.Args[0] 17346 y := v.Args[1] 17347 v.reset(OpS390XSUBW) 17348 v.AddArg(x) 17349 v.AddArg(y) 17350 return true 17351 } 17352 } 17353 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 17354 b := v.Block 17355 _ = b 17356 // match: (SubPtr x y) 17357 // cond: 17358 // result: (SUB x y) 17359 for { 17360 x := v.Args[0] 17361 y := v.Args[1] 17362 v.reset(OpS390XSUB) 17363 v.AddArg(x) 17364 v.AddArg(y) 17365 return true 17366 } 17367 } 17368 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 17369 b := v.Block 17370 _ = b 17371 // match: (Trunc16to8 x) 17372 // cond: 17373 // result: x 17374 for { 17375 x := v.Args[0] 17376 v.reset(OpCopy) 17377 v.Type = x.Type 17378 v.AddArg(x) 17379 return true 17380 } 17381 } 17382 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 17383 b := v.Block 17384 _ = b 17385 // match: (Trunc32to16 x) 17386 // cond: 17387 // result: x 17388 for { 17389 x := v.Args[0] 17390 v.reset(OpCopy) 17391 v.Type = x.Type 17392 v.AddArg(x) 17393 return true 17394 } 17395 } 17396 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 17397 b := v.Block 17398 _ = b 17399 // match: (Trunc32to8 x) 17400 // cond: 17401 // result: x 17402 for { 17403 x := v.Args[0] 17404 v.reset(OpCopy) 17405 v.Type = x.Type 17406 v.AddArg(x) 17407 return true 17408 } 17409 } 17410 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 17411 b := v.Block 17412 _ = b 17413 // match: (Trunc64to16 x) 17414 // cond: 17415 // result: x 17416 for { 17417 x := v.Args[0] 17418 v.reset(OpCopy) 17419 v.Type = x.Type 17420 v.AddArg(x) 17421 return true 17422 } 17423 } 17424 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 17425 b := v.Block 17426 _ = b 17427 // match: (Trunc64to32 x) 17428 // cond: 17429 // result: x 17430 for { 17431 x := v.Args[0] 17432 v.reset(OpCopy) 17433 v.Type = x.Type 17434 v.AddArg(x) 17435 return true 17436 } 17437 } 17438 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 17439 b := v.Block 17440 _ = b 17441 // match: (Trunc64to8 x) 17442 // cond: 17443 // result: x 17444 for { 17445 x := v.Args[0] 17446 v.reset(OpCopy) 17447 v.Type = x.Type 17448 v.AddArg(x) 17449 return true 17450 } 17451 } 17452 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 17453 b := v.Block 17454 _ = b 17455 // match: (Xor16 x y) 17456 // cond: 17457 // result: (XORW x y) 17458 for { 17459 x := v.Args[0] 17460 y := v.Args[1] 17461 v.reset(OpS390XXORW) 17462 v.AddArg(x) 17463 v.AddArg(y) 17464 return true 17465 } 17466 } 17467 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 17468 b := v.Block 17469 _ = b 17470 // match: (Xor32 x y) 17471 // cond: 17472 // result: (XORW x y) 17473 for { 17474 x := v.Args[0] 17475 y := v.Args[1] 17476 v.reset(OpS390XXORW) 17477 v.AddArg(x) 17478 v.AddArg(y) 17479 return true 17480 } 17481 } 17482 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 17483 b := v.Block 17484 _ = b 17485 // match: (Xor64 x y) 17486 // cond: 17487 // result: (XOR x y) 17488 for { 17489 x := v.Args[0] 17490 y := v.Args[1] 17491 v.reset(OpS390XXOR) 17492 v.AddArg(x) 17493 v.AddArg(y) 17494 return true 17495 } 17496 } 17497 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 17498 b := v.Block 17499 _ = b 17500 // match: (Xor8 x y) 17501 // cond: 17502 // result: (XORW x y) 17503 for { 17504 x := v.Args[0] 17505 y := v.Args[1] 17506 v.reset(OpS390XXORW) 17507 v.AddArg(x) 17508 v.AddArg(y) 17509 return true 17510 } 17511 } 17512 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 17513 b := v.Block 17514 _ = b 17515 // match: (Zero [s] _ mem) 17516 // cond: SizeAndAlign(s).Size() == 0 17517 // result: mem 17518 for { 17519 s := v.AuxInt 17520 mem := v.Args[1] 17521 if !(SizeAndAlign(s).Size() == 0) { 17522 break 17523 } 17524 v.reset(OpCopy) 17525 v.Type = mem.Type 17526 v.AddArg(mem) 17527 return true 17528 } 17529 // match: (Zero [s] destptr mem) 17530 // cond: SizeAndAlign(s).Size() == 1 17531 // result: (MOVBstoreconst [0] destptr mem) 17532 for { 17533 s := v.AuxInt 17534 destptr := v.Args[0] 17535 mem := v.Args[1] 17536 if !(SizeAndAlign(s).Size() == 1) { 17537 break 17538 } 17539 v.reset(OpS390XMOVBstoreconst) 17540 v.AuxInt = 0 17541 v.AddArg(destptr) 17542 v.AddArg(mem) 17543 return true 17544 } 17545 // match: (Zero [s] destptr mem) 17546 // cond: SizeAndAlign(s).Size() == 2 17547 // result: (MOVHstoreconst [0] destptr mem) 17548 for { 17549 s := v.AuxInt 17550 destptr := v.Args[0] 17551 mem := v.Args[1] 17552 if !(SizeAndAlign(s).Size() == 2) { 17553 break 17554 } 17555 v.reset(OpS390XMOVHstoreconst) 17556 v.AuxInt = 0 17557 v.AddArg(destptr) 17558 v.AddArg(mem) 17559 return true 17560 } 17561 // match: (Zero [s] destptr mem) 17562 // cond: SizeAndAlign(s).Size() == 4 17563 // result: (MOVWstoreconst [0] destptr mem) 17564 for { 17565 s := v.AuxInt 17566 destptr := v.Args[0] 17567 mem := v.Args[1] 17568 if !(SizeAndAlign(s).Size() == 4) { 17569 break 17570 } 17571 v.reset(OpS390XMOVWstoreconst) 17572 v.AuxInt = 0 17573 v.AddArg(destptr) 17574 v.AddArg(mem) 17575 return true 17576 } 17577 // match: (Zero [s] destptr mem) 17578 // cond: SizeAndAlign(s).Size() == 8 17579 // result: (MOVDstoreconst [0] destptr mem) 17580 for { 17581 s := v.AuxInt 17582 destptr := v.Args[0] 17583 mem := v.Args[1] 17584 if !(SizeAndAlign(s).Size() == 8) { 17585 break 17586 } 17587 v.reset(OpS390XMOVDstoreconst) 17588 v.AuxInt = 0 17589 v.AddArg(destptr) 17590 v.AddArg(mem) 17591 return true 17592 } 17593 // match: (Zero [s] destptr mem) 17594 // cond: SizeAndAlign(s).Size() == 3 17595 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 17596 for { 17597 s := v.AuxInt 17598 destptr := v.Args[0] 17599 mem := v.Args[1] 17600 if !(SizeAndAlign(s).Size() == 3) { 17601 break 17602 } 17603 v.reset(OpS390XMOVBstoreconst) 17604 v.AuxInt = makeValAndOff(0, 2) 17605 v.AddArg(destptr) 17606 v0 := b.NewValue0(v.Line, OpS390XMOVHstoreconst, TypeMem) 17607 v0.AuxInt = 0 17608 v0.AddArg(destptr) 17609 v0.AddArg(mem) 17610 v.AddArg(v0) 17611 return true 17612 } 17613 // match: (Zero [s] destptr mem) 17614 // cond: SizeAndAlign(s).Size() == 5 17615 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17616 for { 17617 s := v.AuxInt 17618 destptr := v.Args[0] 17619 mem := v.Args[1] 17620 if !(SizeAndAlign(s).Size() == 5) { 17621 break 17622 } 17623 v.reset(OpS390XMOVBstoreconst) 17624 v.AuxInt = makeValAndOff(0, 4) 17625 v.AddArg(destptr) 17626 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17627 v0.AuxInt = 0 17628 v0.AddArg(destptr) 17629 v0.AddArg(mem) 17630 v.AddArg(v0) 17631 return true 17632 } 17633 // match: (Zero [s] destptr mem) 17634 // cond: SizeAndAlign(s).Size() == 6 17635 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17636 for { 17637 s := v.AuxInt 17638 destptr := v.Args[0] 17639 mem := v.Args[1] 17640 if !(SizeAndAlign(s).Size() == 6) { 17641 break 17642 } 17643 v.reset(OpS390XMOVHstoreconst) 17644 v.AuxInt = makeValAndOff(0, 4) 17645 v.AddArg(destptr) 17646 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17647 v0.AuxInt = 0 17648 v0.AddArg(destptr) 17649 v0.AddArg(mem) 17650 v.AddArg(v0) 17651 return true 17652 } 17653 // match: (Zero [s] destptr mem) 17654 // cond: SizeAndAlign(s).Size() == 7 17655 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 17656 for { 17657 s := v.AuxInt 17658 destptr := v.Args[0] 17659 mem := v.Args[1] 17660 if !(SizeAndAlign(s).Size() == 7) { 17661 break 17662 } 17663 v.reset(OpS390XMOVWstoreconst) 17664 v.AuxInt = makeValAndOff(0, 3) 17665 v.AddArg(destptr) 17666 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17667 v0.AuxInt = 0 17668 v0.AddArg(destptr) 17669 v0.AddArg(mem) 17670 v.AddArg(v0) 17671 return true 17672 } 17673 // match: (Zero [s] destptr mem) 17674 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 17675 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 17676 for { 17677 s := v.AuxInt 17678 destptr := v.Args[0] 17679 mem := v.Args[1] 17680 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 17681 break 17682 } 17683 v.reset(OpS390XCLEAR) 17684 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 17685 v.AddArg(destptr) 17686 v.AddArg(mem) 17687 return true 17688 } 17689 // match: (Zero [s] destptr mem) 17690 // cond: SizeAndAlign(s).Size() > 1024 17691 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 17692 for { 17693 s := v.AuxInt 17694 destptr := v.Args[0] 17695 mem := v.Args[1] 17696 if !(SizeAndAlign(s).Size() > 1024) { 17697 break 17698 } 17699 v.reset(OpS390XLoweredZero) 17700 v.AuxInt = SizeAndAlign(s).Size() % 256 17701 v.AddArg(destptr) 17702 v0 := b.NewValue0(v.Line, OpS390XADDconst, destptr.Type) 17703 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 17704 v0.AddArg(destptr) 17705 v.AddArg(v0) 17706 v.AddArg(mem) 17707 return true 17708 } 17709 return false 17710 } 17711 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 17712 b := v.Block 17713 _ = b 17714 // match: (ZeroExt16to32 x) 17715 // cond: 17716 // result: (MOVHZreg x) 17717 for { 17718 x := v.Args[0] 17719 v.reset(OpS390XMOVHZreg) 17720 v.AddArg(x) 17721 return true 17722 } 17723 } 17724 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 17725 b := v.Block 17726 _ = b 17727 // match: (ZeroExt16to64 x) 17728 // cond: 17729 // result: (MOVHZreg x) 17730 for { 17731 x := v.Args[0] 17732 v.reset(OpS390XMOVHZreg) 17733 v.AddArg(x) 17734 return true 17735 } 17736 } 17737 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 17738 b := v.Block 17739 _ = b 17740 // match: (ZeroExt32to64 x) 17741 // cond: 17742 // result: (MOVWZreg x) 17743 for { 17744 x := v.Args[0] 17745 v.reset(OpS390XMOVWZreg) 17746 v.AddArg(x) 17747 return true 17748 } 17749 } 17750 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 17751 b := v.Block 17752 _ = b 17753 // match: (ZeroExt8to16 x) 17754 // cond: 17755 // result: (MOVBZreg x) 17756 for { 17757 x := v.Args[0] 17758 v.reset(OpS390XMOVBZreg) 17759 v.AddArg(x) 17760 return true 17761 } 17762 } 17763 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 17764 b := v.Block 17765 _ = b 17766 // match: (ZeroExt8to32 x) 17767 // cond: 17768 // result: (MOVBZreg x) 17769 for { 17770 x := v.Args[0] 17771 v.reset(OpS390XMOVBZreg) 17772 v.AddArg(x) 17773 return true 17774 } 17775 } 17776 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 17777 b := v.Block 17778 _ = b 17779 // match: (ZeroExt8to64 x) 17780 // cond: 17781 // result: (MOVBZreg x) 17782 for { 17783 x := v.Args[0] 17784 v.reset(OpS390XMOVBZreg) 17785 v.AddArg(x) 17786 return true 17787 } 17788 } 17789 func rewriteBlockS390X(b *Block, config *Config) bool { 17790 switch b.Kind { 17791 case BlockS390XEQ: 17792 // match: (EQ (InvertFlags cmp) yes no) 17793 // cond: 17794 // result: (EQ cmp yes no) 17795 for { 17796 v := b.Control 17797 if v.Op != OpS390XInvertFlags { 17798 break 17799 } 17800 cmp := v.Args[0] 17801 yes := b.Succs[0] 17802 no := b.Succs[1] 17803 b.Kind = BlockS390XEQ 17804 b.SetControl(cmp) 17805 _ = yes 17806 _ = no 17807 return true 17808 } 17809 // match: (EQ (FlagEQ) yes no) 17810 // cond: 17811 // result: (First nil yes no) 17812 for { 17813 v := b.Control 17814 if v.Op != OpS390XFlagEQ { 17815 break 17816 } 17817 yes := b.Succs[0] 17818 no := b.Succs[1] 17819 b.Kind = BlockFirst 17820 b.SetControl(nil) 17821 _ = yes 17822 _ = no 17823 return true 17824 } 17825 // match: (EQ (FlagLT) yes no) 17826 // cond: 17827 // result: (First nil no yes) 17828 for { 17829 v := b.Control 17830 if v.Op != OpS390XFlagLT { 17831 break 17832 } 17833 yes := b.Succs[0] 17834 no := b.Succs[1] 17835 b.Kind = BlockFirst 17836 b.SetControl(nil) 17837 b.swapSuccessors() 17838 _ = no 17839 _ = yes 17840 return true 17841 } 17842 // match: (EQ (FlagGT) yes no) 17843 // cond: 17844 // result: (First nil no yes) 17845 for { 17846 v := b.Control 17847 if v.Op != OpS390XFlagGT { 17848 break 17849 } 17850 yes := b.Succs[0] 17851 no := b.Succs[1] 17852 b.Kind = BlockFirst 17853 b.SetControl(nil) 17854 b.swapSuccessors() 17855 _ = no 17856 _ = yes 17857 return true 17858 } 17859 case BlockS390XGE: 17860 // match: (GE (InvertFlags cmp) yes no) 17861 // cond: 17862 // result: (LE cmp yes no) 17863 for { 17864 v := b.Control 17865 if v.Op != OpS390XInvertFlags { 17866 break 17867 } 17868 cmp := v.Args[0] 17869 yes := b.Succs[0] 17870 no := b.Succs[1] 17871 b.Kind = BlockS390XLE 17872 b.SetControl(cmp) 17873 _ = yes 17874 _ = no 17875 return true 17876 } 17877 // match: (GE (FlagEQ) yes no) 17878 // cond: 17879 // result: (First nil yes no) 17880 for { 17881 v := b.Control 17882 if v.Op != OpS390XFlagEQ { 17883 break 17884 } 17885 yes := b.Succs[0] 17886 no := b.Succs[1] 17887 b.Kind = BlockFirst 17888 b.SetControl(nil) 17889 _ = yes 17890 _ = no 17891 return true 17892 } 17893 // match: (GE (FlagLT) yes no) 17894 // cond: 17895 // result: (First nil no yes) 17896 for { 17897 v := b.Control 17898 if v.Op != OpS390XFlagLT { 17899 break 17900 } 17901 yes := b.Succs[0] 17902 no := b.Succs[1] 17903 b.Kind = BlockFirst 17904 b.SetControl(nil) 17905 b.swapSuccessors() 17906 _ = no 17907 _ = yes 17908 return true 17909 } 17910 // match: (GE (FlagGT) yes no) 17911 // cond: 17912 // result: (First nil yes no) 17913 for { 17914 v := b.Control 17915 if v.Op != OpS390XFlagGT { 17916 break 17917 } 17918 yes := b.Succs[0] 17919 no := b.Succs[1] 17920 b.Kind = BlockFirst 17921 b.SetControl(nil) 17922 _ = yes 17923 _ = no 17924 return true 17925 } 17926 case BlockS390XGT: 17927 // match: (GT (InvertFlags cmp) yes no) 17928 // cond: 17929 // result: (LT cmp yes no) 17930 for { 17931 v := b.Control 17932 if v.Op != OpS390XInvertFlags { 17933 break 17934 } 17935 cmp := v.Args[0] 17936 yes := b.Succs[0] 17937 no := b.Succs[1] 17938 b.Kind = BlockS390XLT 17939 b.SetControl(cmp) 17940 _ = yes 17941 _ = no 17942 return true 17943 } 17944 // match: (GT (FlagEQ) yes no) 17945 // cond: 17946 // result: (First nil no yes) 17947 for { 17948 v := b.Control 17949 if v.Op != OpS390XFlagEQ { 17950 break 17951 } 17952 yes := b.Succs[0] 17953 no := b.Succs[1] 17954 b.Kind = BlockFirst 17955 b.SetControl(nil) 17956 b.swapSuccessors() 17957 _ = no 17958 _ = yes 17959 return true 17960 } 17961 // match: (GT (FlagLT) yes no) 17962 // cond: 17963 // result: (First nil no yes) 17964 for { 17965 v := b.Control 17966 if v.Op != OpS390XFlagLT { 17967 break 17968 } 17969 yes := b.Succs[0] 17970 no := b.Succs[1] 17971 b.Kind = BlockFirst 17972 b.SetControl(nil) 17973 b.swapSuccessors() 17974 _ = no 17975 _ = yes 17976 return true 17977 } 17978 // match: (GT (FlagGT) yes no) 17979 // cond: 17980 // result: (First nil yes no) 17981 for { 17982 v := b.Control 17983 if v.Op != OpS390XFlagGT { 17984 break 17985 } 17986 yes := b.Succs[0] 17987 no := b.Succs[1] 17988 b.Kind = BlockFirst 17989 b.SetControl(nil) 17990 _ = yes 17991 _ = no 17992 return true 17993 } 17994 case BlockIf: 17995 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17996 // cond: 17997 // result: (LT cmp yes no) 17998 for { 17999 v := b.Control 18000 if v.Op != OpS390XMOVDLT { 18001 break 18002 } 18003 v_0 := v.Args[0] 18004 if v_0.Op != OpS390XMOVDconst { 18005 break 18006 } 18007 if v_0.AuxInt != 0 { 18008 break 18009 } 18010 v_1 := v.Args[1] 18011 if v_1.Op != OpS390XMOVDconst { 18012 break 18013 } 18014 if v_1.AuxInt != 1 { 18015 break 18016 } 18017 cmp := v.Args[2] 18018 yes := b.Succs[0] 18019 no := b.Succs[1] 18020 b.Kind = BlockS390XLT 18021 b.SetControl(cmp) 18022 _ = yes 18023 _ = no 18024 return true 18025 } 18026 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18027 // cond: 18028 // result: (LE cmp yes no) 18029 for { 18030 v := b.Control 18031 if v.Op != OpS390XMOVDLE { 18032 break 18033 } 18034 v_0 := v.Args[0] 18035 if v_0.Op != OpS390XMOVDconst { 18036 break 18037 } 18038 if v_0.AuxInt != 0 { 18039 break 18040 } 18041 v_1 := v.Args[1] 18042 if v_1.Op != OpS390XMOVDconst { 18043 break 18044 } 18045 if v_1.AuxInt != 1 { 18046 break 18047 } 18048 cmp := v.Args[2] 18049 yes := b.Succs[0] 18050 no := b.Succs[1] 18051 b.Kind = BlockS390XLE 18052 b.SetControl(cmp) 18053 _ = yes 18054 _ = no 18055 return true 18056 } 18057 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18058 // cond: 18059 // result: (GT cmp yes no) 18060 for { 18061 v := b.Control 18062 if v.Op != OpS390XMOVDGT { 18063 break 18064 } 18065 v_0 := v.Args[0] 18066 if v_0.Op != OpS390XMOVDconst { 18067 break 18068 } 18069 if v_0.AuxInt != 0 { 18070 break 18071 } 18072 v_1 := v.Args[1] 18073 if v_1.Op != OpS390XMOVDconst { 18074 break 18075 } 18076 if v_1.AuxInt != 1 { 18077 break 18078 } 18079 cmp := v.Args[2] 18080 yes := b.Succs[0] 18081 no := b.Succs[1] 18082 b.Kind = BlockS390XGT 18083 b.SetControl(cmp) 18084 _ = yes 18085 _ = no 18086 return true 18087 } 18088 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18089 // cond: 18090 // result: (GE cmp yes no) 18091 for { 18092 v := b.Control 18093 if v.Op != OpS390XMOVDGE { 18094 break 18095 } 18096 v_0 := v.Args[0] 18097 if v_0.Op != OpS390XMOVDconst { 18098 break 18099 } 18100 if v_0.AuxInt != 0 { 18101 break 18102 } 18103 v_1 := v.Args[1] 18104 if v_1.Op != OpS390XMOVDconst { 18105 break 18106 } 18107 if v_1.AuxInt != 1 { 18108 break 18109 } 18110 cmp := v.Args[2] 18111 yes := b.Succs[0] 18112 no := b.Succs[1] 18113 b.Kind = BlockS390XGE 18114 b.SetControl(cmp) 18115 _ = yes 18116 _ = no 18117 return true 18118 } 18119 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18120 // cond: 18121 // result: (EQ cmp yes no) 18122 for { 18123 v := b.Control 18124 if v.Op != OpS390XMOVDEQ { 18125 break 18126 } 18127 v_0 := v.Args[0] 18128 if v_0.Op != OpS390XMOVDconst { 18129 break 18130 } 18131 if v_0.AuxInt != 0 { 18132 break 18133 } 18134 v_1 := v.Args[1] 18135 if v_1.Op != OpS390XMOVDconst { 18136 break 18137 } 18138 if v_1.AuxInt != 1 { 18139 break 18140 } 18141 cmp := v.Args[2] 18142 yes := b.Succs[0] 18143 no := b.Succs[1] 18144 b.Kind = BlockS390XEQ 18145 b.SetControl(cmp) 18146 _ = yes 18147 _ = no 18148 return true 18149 } 18150 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18151 // cond: 18152 // result: (NE cmp yes no) 18153 for { 18154 v := b.Control 18155 if v.Op != OpS390XMOVDNE { 18156 break 18157 } 18158 v_0 := v.Args[0] 18159 if v_0.Op != OpS390XMOVDconst { 18160 break 18161 } 18162 if v_0.AuxInt != 0 { 18163 break 18164 } 18165 v_1 := v.Args[1] 18166 if v_1.Op != OpS390XMOVDconst { 18167 break 18168 } 18169 if v_1.AuxInt != 1 { 18170 break 18171 } 18172 cmp := v.Args[2] 18173 yes := b.Succs[0] 18174 no := b.Succs[1] 18175 b.Kind = BlockS390XNE 18176 b.SetControl(cmp) 18177 _ = yes 18178 _ = no 18179 return true 18180 } 18181 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18182 // cond: 18183 // result: (GTF cmp yes no) 18184 for { 18185 v := b.Control 18186 if v.Op != OpS390XMOVDGTnoinv { 18187 break 18188 } 18189 v_0 := v.Args[0] 18190 if v_0.Op != OpS390XMOVDconst { 18191 break 18192 } 18193 if v_0.AuxInt != 0 { 18194 break 18195 } 18196 v_1 := v.Args[1] 18197 if v_1.Op != OpS390XMOVDconst { 18198 break 18199 } 18200 if v_1.AuxInt != 1 { 18201 break 18202 } 18203 cmp := v.Args[2] 18204 yes := b.Succs[0] 18205 no := b.Succs[1] 18206 b.Kind = BlockS390XGTF 18207 b.SetControl(cmp) 18208 _ = yes 18209 _ = no 18210 return true 18211 } 18212 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18213 // cond: 18214 // result: (GEF cmp yes no) 18215 for { 18216 v := b.Control 18217 if v.Op != OpS390XMOVDGEnoinv { 18218 break 18219 } 18220 v_0 := v.Args[0] 18221 if v_0.Op != OpS390XMOVDconst { 18222 break 18223 } 18224 if v_0.AuxInt != 0 { 18225 break 18226 } 18227 v_1 := v.Args[1] 18228 if v_1.Op != OpS390XMOVDconst { 18229 break 18230 } 18231 if v_1.AuxInt != 1 { 18232 break 18233 } 18234 cmp := v.Args[2] 18235 yes := b.Succs[0] 18236 no := b.Succs[1] 18237 b.Kind = BlockS390XGEF 18238 b.SetControl(cmp) 18239 _ = yes 18240 _ = no 18241 return true 18242 } 18243 // match: (If cond yes no) 18244 // cond: 18245 // result: (NE (CMPWconst [0] (MOVBZreg <config.fe.TypeBool()> cond)) yes no) 18246 for { 18247 v := b.Control 18248 _ = v 18249 cond := b.Control 18250 yes := b.Succs[0] 18251 no := b.Succs[1] 18252 b.Kind = BlockS390XNE 18253 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 18254 v0.AuxInt = 0 18255 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeBool()) 18256 v1.AddArg(cond) 18257 v0.AddArg(v1) 18258 b.SetControl(v0) 18259 _ = yes 18260 _ = no 18261 return true 18262 } 18263 case BlockS390XLE: 18264 // match: (LE (InvertFlags cmp) yes no) 18265 // cond: 18266 // result: (GE cmp yes no) 18267 for { 18268 v := b.Control 18269 if v.Op != OpS390XInvertFlags { 18270 break 18271 } 18272 cmp := v.Args[0] 18273 yes := b.Succs[0] 18274 no := b.Succs[1] 18275 b.Kind = BlockS390XGE 18276 b.SetControl(cmp) 18277 _ = yes 18278 _ = no 18279 return true 18280 } 18281 // match: (LE (FlagEQ) yes no) 18282 // cond: 18283 // result: (First nil yes no) 18284 for { 18285 v := b.Control 18286 if v.Op != OpS390XFlagEQ { 18287 break 18288 } 18289 yes := b.Succs[0] 18290 no := b.Succs[1] 18291 b.Kind = BlockFirst 18292 b.SetControl(nil) 18293 _ = yes 18294 _ = no 18295 return true 18296 } 18297 // match: (LE (FlagLT) yes no) 18298 // cond: 18299 // result: (First nil yes no) 18300 for { 18301 v := b.Control 18302 if v.Op != OpS390XFlagLT { 18303 break 18304 } 18305 yes := b.Succs[0] 18306 no := b.Succs[1] 18307 b.Kind = BlockFirst 18308 b.SetControl(nil) 18309 _ = yes 18310 _ = no 18311 return true 18312 } 18313 // match: (LE (FlagGT) yes no) 18314 // cond: 18315 // result: (First nil no yes) 18316 for { 18317 v := b.Control 18318 if v.Op != OpS390XFlagGT { 18319 break 18320 } 18321 yes := b.Succs[0] 18322 no := b.Succs[1] 18323 b.Kind = BlockFirst 18324 b.SetControl(nil) 18325 b.swapSuccessors() 18326 _ = no 18327 _ = yes 18328 return true 18329 } 18330 case BlockS390XLT: 18331 // match: (LT (InvertFlags cmp) yes no) 18332 // cond: 18333 // result: (GT cmp yes no) 18334 for { 18335 v := b.Control 18336 if v.Op != OpS390XInvertFlags { 18337 break 18338 } 18339 cmp := v.Args[0] 18340 yes := b.Succs[0] 18341 no := b.Succs[1] 18342 b.Kind = BlockS390XGT 18343 b.SetControl(cmp) 18344 _ = yes 18345 _ = no 18346 return true 18347 } 18348 // match: (LT (FlagEQ) yes no) 18349 // cond: 18350 // result: (First nil no yes) 18351 for { 18352 v := b.Control 18353 if v.Op != OpS390XFlagEQ { 18354 break 18355 } 18356 yes := b.Succs[0] 18357 no := b.Succs[1] 18358 b.Kind = BlockFirst 18359 b.SetControl(nil) 18360 b.swapSuccessors() 18361 _ = no 18362 _ = yes 18363 return true 18364 } 18365 // match: (LT (FlagLT) yes no) 18366 // cond: 18367 // result: (First nil yes no) 18368 for { 18369 v := b.Control 18370 if v.Op != OpS390XFlagLT { 18371 break 18372 } 18373 yes := b.Succs[0] 18374 no := b.Succs[1] 18375 b.Kind = BlockFirst 18376 b.SetControl(nil) 18377 _ = yes 18378 _ = no 18379 return true 18380 } 18381 // match: (LT (FlagGT) yes no) 18382 // cond: 18383 // result: (First nil no yes) 18384 for { 18385 v := b.Control 18386 if v.Op != OpS390XFlagGT { 18387 break 18388 } 18389 yes := b.Succs[0] 18390 no := b.Succs[1] 18391 b.Kind = BlockFirst 18392 b.SetControl(nil) 18393 b.swapSuccessors() 18394 _ = no 18395 _ = yes 18396 return true 18397 } 18398 case BlockS390XNE: 18399 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18400 // cond: 18401 // result: (LT cmp yes no) 18402 for { 18403 v := b.Control 18404 if v.Op != OpS390XCMPWconst { 18405 break 18406 } 18407 if v.AuxInt != 0 { 18408 break 18409 } 18410 v_0 := v.Args[0] 18411 if v_0.Op != OpS390XMOVDLT { 18412 break 18413 } 18414 v_0_0 := v_0.Args[0] 18415 if v_0_0.Op != OpS390XMOVDconst { 18416 break 18417 } 18418 if v_0_0.AuxInt != 0 { 18419 break 18420 } 18421 v_0_1 := v_0.Args[1] 18422 if v_0_1.Op != OpS390XMOVDconst { 18423 break 18424 } 18425 if v_0_1.AuxInt != 1 { 18426 break 18427 } 18428 cmp := v_0.Args[2] 18429 yes := b.Succs[0] 18430 no := b.Succs[1] 18431 b.Kind = BlockS390XLT 18432 b.SetControl(cmp) 18433 _ = yes 18434 _ = no 18435 return true 18436 } 18437 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18438 // cond: 18439 // result: (LE cmp yes no) 18440 for { 18441 v := b.Control 18442 if v.Op != OpS390XCMPWconst { 18443 break 18444 } 18445 if v.AuxInt != 0 { 18446 break 18447 } 18448 v_0 := v.Args[0] 18449 if v_0.Op != OpS390XMOVDLE { 18450 break 18451 } 18452 v_0_0 := v_0.Args[0] 18453 if v_0_0.Op != OpS390XMOVDconst { 18454 break 18455 } 18456 if v_0_0.AuxInt != 0 { 18457 break 18458 } 18459 v_0_1 := v_0.Args[1] 18460 if v_0_1.Op != OpS390XMOVDconst { 18461 break 18462 } 18463 if v_0_1.AuxInt != 1 { 18464 break 18465 } 18466 cmp := v_0.Args[2] 18467 yes := b.Succs[0] 18468 no := b.Succs[1] 18469 b.Kind = BlockS390XLE 18470 b.SetControl(cmp) 18471 _ = yes 18472 _ = no 18473 return true 18474 } 18475 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18476 // cond: 18477 // result: (GT cmp yes no) 18478 for { 18479 v := b.Control 18480 if v.Op != OpS390XCMPWconst { 18481 break 18482 } 18483 if v.AuxInt != 0 { 18484 break 18485 } 18486 v_0 := v.Args[0] 18487 if v_0.Op != OpS390XMOVDGT { 18488 break 18489 } 18490 v_0_0 := v_0.Args[0] 18491 if v_0_0.Op != OpS390XMOVDconst { 18492 break 18493 } 18494 if v_0_0.AuxInt != 0 { 18495 break 18496 } 18497 v_0_1 := v_0.Args[1] 18498 if v_0_1.Op != OpS390XMOVDconst { 18499 break 18500 } 18501 if v_0_1.AuxInt != 1 { 18502 break 18503 } 18504 cmp := v_0.Args[2] 18505 yes := b.Succs[0] 18506 no := b.Succs[1] 18507 b.Kind = BlockS390XGT 18508 b.SetControl(cmp) 18509 _ = yes 18510 _ = no 18511 return true 18512 } 18513 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18514 // cond: 18515 // result: (GE cmp yes no) 18516 for { 18517 v := b.Control 18518 if v.Op != OpS390XCMPWconst { 18519 break 18520 } 18521 if v.AuxInt != 0 { 18522 break 18523 } 18524 v_0 := v.Args[0] 18525 if v_0.Op != OpS390XMOVDGE { 18526 break 18527 } 18528 v_0_0 := v_0.Args[0] 18529 if v_0_0.Op != OpS390XMOVDconst { 18530 break 18531 } 18532 if v_0_0.AuxInt != 0 { 18533 break 18534 } 18535 v_0_1 := v_0.Args[1] 18536 if v_0_1.Op != OpS390XMOVDconst { 18537 break 18538 } 18539 if v_0_1.AuxInt != 1 { 18540 break 18541 } 18542 cmp := v_0.Args[2] 18543 yes := b.Succs[0] 18544 no := b.Succs[1] 18545 b.Kind = BlockS390XGE 18546 b.SetControl(cmp) 18547 _ = yes 18548 _ = no 18549 return true 18550 } 18551 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18552 // cond: 18553 // result: (EQ cmp yes no) 18554 for { 18555 v := b.Control 18556 if v.Op != OpS390XCMPWconst { 18557 break 18558 } 18559 if v.AuxInt != 0 { 18560 break 18561 } 18562 v_0 := v.Args[0] 18563 if v_0.Op != OpS390XMOVDEQ { 18564 break 18565 } 18566 v_0_0 := v_0.Args[0] 18567 if v_0_0.Op != OpS390XMOVDconst { 18568 break 18569 } 18570 if v_0_0.AuxInt != 0 { 18571 break 18572 } 18573 v_0_1 := v_0.Args[1] 18574 if v_0_1.Op != OpS390XMOVDconst { 18575 break 18576 } 18577 if v_0_1.AuxInt != 1 { 18578 break 18579 } 18580 cmp := v_0.Args[2] 18581 yes := b.Succs[0] 18582 no := b.Succs[1] 18583 b.Kind = BlockS390XEQ 18584 b.SetControl(cmp) 18585 _ = yes 18586 _ = no 18587 return true 18588 } 18589 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18590 // cond: 18591 // result: (NE cmp yes no) 18592 for { 18593 v := b.Control 18594 if v.Op != OpS390XCMPWconst { 18595 break 18596 } 18597 if v.AuxInt != 0 { 18598 break 18599 } 18600 v_0 := v.Args[0] 18601 if v_0.Op != OpS390XMOVDNE { 18602 break 18603 } 18604 v_0_0 := v_0.Args[0] 18605 if v_0_0.Op != OpS390XMOVDconst { 18606 break 18607 } 18608 if v_0_0.AuxInt != 0 { 18609 break 18610 } 18611 v_0_1 := v_0.Args[1] 18612 if v_0_1.Op != OpS390XMOVDconst { 18613 break 18614 } 18615 if v_0_1.AuxInt != 1 { 18616 break 18617 } 18618 cmp := v_0.Args[2] 18619 yes := b.Succs[0] 18620 no := b.Succs[1] 18621 b.Kind = BlockS390XNE 18622 b.SetControl(cmp) 18623 _ = yes 18624 _ = no 18625 return true 18626 } 18627 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18628 // cond: 18629 // result: (GTF cmp yes no) 18630 for { 18631 v := b.Control 18632 if v.Op != OpS390XCMPWconst { 18633 break 18634 } 18635 if v.AuxInt != 0 { 18636 break 18637 } 18638 v_0 := v.Args[0] 18639 if v_0.Op != OpS390XMOVDGTnoinv { 18640 break 18641 } 18642 v_0_0 := v_0.Args[0] 18643 if v_0_0.Op != OpS390XMOVDconst { 18644 break 18645 } 18646 if v_0_0.AuxInt != 0 { 18647 break 18648 } 18649 v_0_1 := v_0.Args[1] 18650 if v_0_1.Op != OpS390XMOVDconst { 18651 break 18652 } 18653 if v_0_1.AuxInt != 1 { 18654 break 18655 } 18656 cmp := v_0.Args[2] 18657 yes := b.Succs[0] 18658 no := b.Succs[1] 18659 b.Kind = BlockS390XGTF 18660 b.SetControl(cmp) 18661 _ = yes 18662 _ = no 18663 return true 18664 } 18665 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18666 // cond: 18667 // result: (GEF cmp yes no) 18668 for { 18669 v := b.Control 18670 if v.Op != OpS390XCMPWconst { 18671 break 18672 } 18673 if v.AuxInt != 0 { 18674 break 18675 } 18676 v_0 := v.Args[0] 18677 if v_0.Op != OpS390XMOVDGEnoinv { 18678 break 18679 } 18680 v_0_0 := v_0.Args[0] 18681 if v_0_0.Op != OpS390XMOVDconst { 18682 break 18683 } 18684 if v_0_0.AuxInt != 0 { 18685 break 18686 } 18687 v_0_1 := v_0.Args[1] 18688 if v_0_1.Op != OpS390XMOVDconst { 18689 break 18690 } 18691 if v_0_1.AuxInt != 1 { 18692 break 18693 } 18694 cmp := v_0.Args[2] 18695 yes := b.Succs[0] 18696 no := b.Succs[1] 18697 b.Kind = BlockS390XGEF 18698 b.SetControl(cmp) 18699 _ = yes 18700 _ = no 18701 return true 18702 } 18703 // match: (NE (InvertFlags cmp) yes no) 18704 // cond: 18705 // result: (NE cmp yes no) 18706 for { 18707 v := b.Control 18708 if v.Op != OpS390XInvertFlags { 18709 break 18710 } 18711 cmp := v.Args[0] 18712 yes := b.Succs[0] 18713 no := b.Succs[1] 18714 b.Kind = BlockS390XNE 18715 b.SetControl(cmp) 18716 _ = yes 18717 _ = no 18718 return true 18719 } 18720 // match: (NE (FlagEQ) yes no) 18721 // cond: 18722 // result: (First nil no yes) 18723 for { 18724 v := b.Control 18725 if v.Op != OpS390XFlagEQ { 18726 break 18727 } 18728 yes := b.Succs[0] 18729 no := b.Succs[1] 18730 b.Kind = BlockFirst 18731 b.SetControl(nil) 18732 b.swapSuccessors() 18733 _ = no 18734 _ = yes 18735 return true 18736 } 18737 // match: (NE (FlagLT) yes no) 18738 // cond: 18739 // result: (First nil yes no) 18740 for { 18741 v := b.Control 18742 if v.Op != OpS390XFlagLT { 18743 break 18744 } 18745 yes := b.Succs[0] 18746 no := b.Succs[1] 18747 b.Kind = BlockFirst 18748 b.SetControl(nil) 18749 _ = yes 18750 _ = no 18751 return true 18752 } 18753 // match: (NE (FlagGT) yes no) 18754 // cond: 18755 // result: (First nil yes no) 18756 for { 18757 v := b.Control 18758 if v.Op != OpS390XFlagGT { 18759 break 18760 } 18761 yes := b.Succs[0] 18762 no := b.Succs[1] 18763 b.Kind = BlockFirst 18764 b.SetControl(nil) 18765 _ = yes 18766 _ = no 18767 return true 18768 } 18769 } 18770 return false 18771 }