github.com/gagliardetto/golang-go@v0.0.0-20201020153340-53909ea70814/cmd/compile/internal/ssa/rewrite386.go (about) 1 // Code generated from gen/386.rules; DO NOT EDIT. 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 import "github.com/gagliardetto/golang-go/cmd/compile/internal/types" 8 9 func rewriteValue386(v *Value) bool { 10 switch v.Op { 11 case Op386ADCL: 12 return rewriteValue386_Op386ADCL_0(v) 13 case Op386ADDL: 14 return rewriteValue386_Op386ADDL_0(v) || rewriteValue386_Op386ADDL_10(v) || rewriteValue386_Op386ADDL_20(v) 15 case Op386ADDLcarry: 16 return rewriteValue386_Op386ADDLcarry_0(v) 17 case Op386ADDLconst: 18 return rewriteValue386_Op386ADDLconst_0(v) 19 case Op386ADDLconstmodify: 20 return rewriteValue386_Op386ADDLconstmodify_0(v) 21 case Op386ADDLconstmodifyidx4: 22 return rewriteValue386_Op386ADDLconstmodifyidx4_0(v) 23 case Op386ADDLload: 24 return rewriteValue386_Op386ADDLload_0(v) 25 case Op386ADDLloadidx4: 26 return rewriteValue386_Op386ADDLloadidx4_0(v) 27 case Op386ADDLmodify: 28 return rewriteValue386_Op386ADDLmodify_0(v) 29 case Op386ADDLmodifyidx4: 30 return rewriteValue386_Op386ADDLmodifyidx4_0(v) 31 case Op386ADDSD: 32 return rewriteValue386_Op386ADDSD_0(v) 33 case Op386ADDSDload: 34 return rewriteValue386_Op386ADDSDload_0(v) 35 case Op386ADDSS: 36 return rewriteValue386_Op386ADDSS_0(v) 37 case Op386ADDSSload: 38 return rewriteValue386_Op386ADDSSload_0(v) 39 case Op386ANDL: 40 return rewriteValue386_Op386ANDL_0(v) 41 case Op386ANDLconst: 42 return rewriteValue386_Op386ANDLconst_0(v) 43 case Op386ANDLconstmodify: 44 return rewriteValue386_Op386ANDLconstmodify_0(v) 45 case Op386ANDLconstmodifyidx4: 46 return rewriteValue386_Op386ANDLconstmodifyidx4_0(v) 47 case Op386ANDLload: 48 return rewriteValue386_Op386ANDLload_0(v) 49 case Op386ANDLloadidx4: 50 return rewriteValue386_Op386ANDLloadidx4_0(v) 51 case Op386ANDLmodify: 52 return rewriteValue386_Op386ANDLmodify_0(v) 53 case Op386ANDLmodifyidx4: 54 return rewriteValue386_Op386ANDLmodifyidx4_0(v) 55 case Op386CMPB: 56 return rewriteValue386_Op386CMPB_0(v) 57 case Op386CMPBconst: 58 return rewriteValue386_Op386CMPBconst_0(v) 59 case Op386CMPBload: 60 return rewriteValue386_Op386CMPBload_0(v) 61 case Op386CMPL: 62 return rewriteValue386_Op386CMPL_0(v) 63 case Op386CMPLconst: 64 return rewriteValue386_Op386CMPLconst_0(v) || rewriteValue386_Op386CMPLconst_10(v) 65 case Op386CMPLload: 66 return rewriteValue386_Op386CMPLload_0(v) 67 case Op386CMPW: 68 return rewriteValue386_Op386CMPW_0(v) 69 case Op386CMPWconst: 70 return rewriteValue386_Op386CMPWconst_0(v) 71 case Op386CMPWload: 72 return rewriteValue386_Op386CMPWload_0(v) 73 case Op386DIVSD: 74 return rewriteValue386_Op386DIVSD_0(v) 75 case Op386DIVSDload: 76 return rewriteValue386_Op386DIVSDload_0(v) 77 case Op386DIVSS: 78 return rewriteValue386_Op386DIVSS_0(v) 79 case Op386DIVSSload: 80 return rewriteValue386_Op386DIVSSload_0(v) 81 case Op386LEAL: 82 return rewriteValue386_Op386LEAL_0(v) 83 case Op386LEAL1: 84 return rewriteValue386_Op386LEAL1_0(v) 85 case Op386LEAL2: 86 return rewriteValue386_Op386LEAL2_0(v) 87 case Op386LEAL4: 88 return rewriteValue386_Op386LEAL4_0(v) 89 case Op386LEAL8: 90 return rewriteValue386_Op386LEAL8_0(v) 91 case Op386MOVBLSX: 92 return rewriteValue386_Op386MOVBLSX_0(v) 93 case Op386MOVBLSXload: 94 return rewriteValue386_Op386MOVBLSXload_0(v) 95 case Op386MOVBLZX: 96 return rewriteValue386_Op386MOVBLZX_0(v) 97 case Op386MOVBload: 98 return rewriteValue386_Op386MOVBload_0(v) 99 case Op386MOVBloadidx1: 100 return rewriteValue386_Op386MOVBloadidx1_0(v) 101 case Op386MOVBstore: 102 return rewriteValue386_Op386MOVBstore_0(v) || rewriteValue386_Op386MOVBstore_10(v) 103 case Op386MOVBstoreconst: 104 return rewriteValue386_Op386MOVBstoreconst_0(v) 105 case Op386MOVBstoreconstidx1: 106 return rewriteValue386_Op386MOVBstoreconstidx1_0(v) 107 case Op386MOVBstoreidx1: 108 return rewriteValue386_Op386MOVBstoreidx1_0(v) || rewriteValue386_Op386MOVBstoreidx1_10(v) || rewriteValue386_Op386MOVBstoreidx1_20(v) 109 case Op386MOVLload: 110 return rewriteValue386_Op386MOVLload_0(v) 111 case Op386MOVLloadidx1: 112 return rewriteValue386_Op386MOVLloadidx1_0(v) 113 case Op386MOVLloadidx4: 114 return rewriteValue386_Op386MOVLloadidx4_0(v) 115 case Op386MOVLstore: 116 return rewriteValue386_Op386MOVLstore_0(v) || rewriteValue386_Op386MOVLstore_10(v) || rewriteValue386_Op386MOVLstore_20(v) 117 case Op386MOVLstoreconst: 118 return rewriteValue386_Op386MOVLstoreconst_0(v) 119 case Op386MOVLstoreconstidx1: 120 return rewriteValue386_Op386MOVLstoreconstidx1_0(v) 121 case Op386MOVLstoreconstidx4: 122 return rewriteValue386_Op386MOVLstoreconstidx4_0(v) 123 case Op386MOVLstoreidx1: 124 return rewriteValue386_Op386MOVLstoreidx1_0(v) 125 case Op386MOVLstoreidx4: 126 return rewriteValue386_Op386MOVLstoreidx4_0(v) || rewriteValue386_Op386MOVLstoreidx4_10(v) 127 case Op386MOVSDconst: 128 return rewriteValue386_Op386MOVSDconst_0(v) 129 case Op386MOVSDload: 130 return rewriteValue386_Op386MOVSDload_0(v) 131 case Op386MOVSDloadidx1: 132 return rewriteValue386_Op386MOVSDloadidx1_0(v) 133 case Op386MOVSDloadidx8: 134 return rewriteValue386_Op386MOVSDloadidx8_0(v) 135 case Op386MOVSDstore: 136 return rewriteValue386_Op386MOVSDstore_0(v) 137 case Op386MOVSDstoreidx1: 138 return rewriteValue386_Op386MOVSDstoreidx1_0(v) 139 case Op386MOVSDstoreidx8: 140 return rewriteValue386_Op386MOVSDstoreidx8_0(v) 141 case Op386MOVSSconst: 142 return rewriteValue386_Op386MOVSSconst_0(v) 143 case Op386MOVSSload: 144 return rewriteValue386_Op386MOVSSload_0(v) 145 case Op386MOVSSloadidx1: 146 return rewriteValue386_Op386MOVSSloadidx1_0(v) 147 case Op386MOVSSloadidx4: 148 return rewriteValue386_Op386MOVSSloadidx4_0(v) 149 case Op386MOVSSstore: 150 return rewriteValue386_Op386MOVSSstore_0(v) 151 case Op386MOVSSstoreidx1: 152 return rewriteValue386_Op386MOVSSstoreidx1_0(v) 153 case Op386MOVSSstoreidx4: 154 return rewriteValue386_Op386MOVSSstoreidx4_0(v) 155 case Op386MOVWLSX: 156 return rewriteValue386_Op386MOVWLSX_0(v) 157 case Op386MOVWLSXload: 158 return rewriteValue386_Op386MOVWLSXload_0(v) 159 case Op386MOVWLZX: 160 return rewriteValue386_Op386MOVWLZX_0(v) 161 case Op386MOVWload: 162 return rewriteValue386_Op386MOVWload_0(v) 163 case Op386MOVWloadidx1: 164 return rewriteValue386_Op386MOVWloadidx1_0(v) 165 case Op386MOVWloadidx2: 166 return rewriteValue386_Op386MOVWloadidx2_0(v) 167 case Op386MOVWstore: 168 return rewriteValue386_Op386MOVWstore_0(v) 169 case Op386MOVWstoreconst: 170 return rewriteValue386_Op386MOVWstoreconst_0(v) 171 case Op386MOVWstoreconstidx1: 172 return rewriteValue386_Op386MOVWstoreconstidx1_0(v) 173 case Op386MOVWstoreconstidx2: 174 return rewriteValue386_Op386MOVWstoreconstidx2_0(v) 175 case Op386MOVWstoreidx1: 176 return rewriteValue386_Op386MOVWstoreidx1_0(v) || rewriteValue386_Op386MOVWstoreidx1_10(v) 177 case Op386MOVWstoreidx2: 178 return rewriteValue386_Op386MOVWstoreidx2_0(v) 179 case Op386MULL: 180 return rewriteValue386_Op386MULL_0(v) 181 case Op386MULLconst: 182 return rewriteValue386_Op386MULLconst_0(v) || rewriteValue386_Op386MULLconst_10(v) || rewriteValue386_Op386MULLconst_20(v) || rewriteValue386_Op386MULLconst_30(v) 183 case Op386MULLload: 184 return rewriteValue386_Op386MULLload_0(v) 185 case Op386MULLloadidx4: 186 return rewriteValue386_Op386MULLloadidx4_0(v) 187 case Op386MULSD: 188 return rewriteValue386_Op386MULSD_0(v) 189 case Op386MULSDload: 190 return rewriteValue386_Op386MULSDload_0(v) 191 case Op386MULSS: 192 return rewriteValue386_Op386MULSS_0(v) 193 case Op386MULSSload: 194 return rewriteValue386_Op386MULSSload_0(v) 195 case Op386NEGL: 196 return rewriteValue386_Op386NEGL_0(v) 197 case Op386NOTL: 198 return rewriteValue386_Op386NOTL_0(v) 199 case Op386ORL: 200 return rewriteValue386_Op386ORL_0(v) || rewriteValue386_Op386ORL_10(v) || rewriteValue386_Op386ORL_20(v) || rewriteValue386_Op386ORL_30(v) || rewriteValue386_Op386ORL_40(v) || rewriteValue386_Op386ORL_50(v) 201 case Op386ORLconst: 202 return rewriteValue386_Op386ORLconst_0(v) 203 case Op386ORLconstmodify: 204 return rewriteValue386_Op386ORLconstmodify_0(v) 205 case Op386ORLconstmodifyidx4: 206 return rewriteValue386_Op386ORLconstmodifyidx4_0(v) 207 case Op386ORLload: 208 return rewriteValue386_Op386ORLload_0(v) 209 case Op386ORLloadidx4: 210 return rewriteValue386_Op386ORLloadidx4_0(v) 211 case Op386ORLmodify: 212 return rewriteValue386_Op386ORLmodify_0(v) 213 case Op386ORLmodifyidx4: 214 return rewriteValue386_Op386ORLmodifyidx4_0(v) 215 case Op386ROLBconst: 216 return rewriteValue386_Op386ROLBconst_0(v) 217 case Op386ROLLconst: 218 return rewriteValue386_Op386ROLLconst_0(v) 219 case Op386ROLWconst: 220 return rewriteValue386_Op386ROLWconst_0(v) 221 case Op386SARB: 222 return rewriteValue386_Op386SARB_0(v) 223 case Op386SARBconst: 224 return rewriteValue386_Op386SARBconst_0(v) 225 case Op386SARL: 226 return rewriteValue386_Op386SARL_0(v) 227 case Op386SARLconst: 228 return rewriteValue386_Op386SARLconst_0(v) 229 case Op386SARW: 230 return rewriteValue386_Op386SARW_0(v) 231 case Op386SARWconst: 232 return rewriteValue386_Op386SARWconst_0(v) 233 case Op386SBBL: 234 return rewriteValue386_Op386SBBL_0(v) 235 case Op386SBBLcarrymask: 236 return rewriteValue386_Op386SBBLcarrymask_0(v) 237 case Op386SETA: 238 return rewriteValue386_Op386SETA_0(v) 239 case Op386SETAE: 240 return rewriteValue386_Op386SETAE_0(v) 241 case Op386SETB: 242 return rewriteValue386_Op386SETB_0(v) 243 case Op386SETBE: 244 return rewriteValue386_Op386SETBE_0(v) 245 case Op386SETEQ: 246 return rewriteValue386_Op386SETEQ_0(v) 247 case Op386SETG: 248 return rewriteValue386_Op386SETG_0(v) 249 case Op386SETGE: 250 return rewriteValue386_Op386SETGE_0(v) 251 case Op386SETL: 252 return rewriteValue386_Op386SETL_0(v) 253 case Op386SETLE: 254 return rewriteValue386_Op386SETLE_0(v) 255 case Op386SETNE: 256 return rewriteValue386_Op386SETNE_0(v) 257 case Op386SHLL: 258 return rewriteValue386_Op386SHLL_0(v) 259 case Op386SHLLconst: 260 return rewriteValue386_Op386SHLLconst_0(v) 261 case Op386SHRB: 262 return rewriteValue386_Op386SHRB_0(v) 263 case Op386SHRBconst: 264 return rewriteValue386_Op386SHRBconst_0(v) 265 case Op386SHRL: 266 return rewriteValue386_Op386SHRL_0(v) 267 case Op386SHRLconst: 268 return rewriteValue386_Op386SHRLconst_0(v) 269 case Op386SHRW: 270 return rewriteValue386_Op386SHRW_0(v) 271 case Op386SHRWconst: 272 return rewriteValue386_Op386SHRWconst_0(v) 273 case Op386SUBL: 274 return rewriteValue386_Op386SUBL_0(v) 275 case Op386SUBLcarry: 276 return rewriteValue386_Op386SUBLcarry_0(v) 277 case Op386SUBLconst: 278 return rewriteValue386_Op386SUBLconst_0(v) 279 case Op386SUBLload: 280 return rewriteValue386_Op386SUBLload_0(v) 281 case Op386SUBLloadidx4: 282 return rewriteValue386_Op386SUBLloadidx4_0(v) 283 case Op386SUBLmodify: 284 return rewriteValue386_Op386SUBLmodify_0(v) 285 case Op386SUBLmodifyidx4: 286 return rewriteValue386_Op386SUBLmodifyidx4_0(v) 287 case Op386SUBSD: 288 return rewriteValue386_Op386SUBSD_0(v) 289 case Op386SUBSDload: 290 return rewriteValue386_Op386SUBSDload_0(v) 291 case Op386SUBSS: 292 return rewriteValue386_Op386SUBSS_0(v) 293 case Op386SUBSSload: 294 return rewriteValue386_Op386SUBSSload_0(v) 295 case Op386XORL: 296 return rewriteValue386_Op386XORL_0(v) || rewriteValue386_Op386XORL_10(v) 297 case Op386XORLconst: 298 return rewriteValue386_Op386XORLconst_0(v) 299 case Op386XORLconstmodify: 300 return rewriteValue386_Op386XORLconstmodify_0(v) 301 case Op386XORLconstmodifyidx4: 302 return rewriteValue386_Op386XORLconstmodifyidx4_0(v) 303 case Op386XORLload: 304 return rewriteValue386_Op386XORLload_0(v) 305 case Op386XORLloadidx4: 306 return rewriteValue386_Op386XORLloadidx4_0(v) 307 case Op386XORLmodify: 308 return rewriteValue386_Op386XORLmodify_0(v) 309 case Op386XORLmodifyidx4: 310 return rewriteValue386_Op386XORLmodifyidx4_0(v) 311 case OpAdd16: 312 return rewriteValue386_OpAdd16_0(v) 313 case OpAdd32: 314 return rewriteValue386_OpAdd32_0(v) 315 case OpAdd32F: 316 return rewriteValue386_OpAdd32F_0(v) 317 case OpAdd32carry: 318 return rewriteValue386_OpAdd32carry_0(v) 319 case OpAdd32withcarry: 320 return rewriteValue386_OpAdd32withcarry_0(v) 321 case OpAdd64F: 322 return rewriteValue386_OpAdd64F_0(v) 323 case OpAdd8: 324 return rewriteValue386_OpAdd8_0(v) 325 case OpAddPtr: 326 return rewriteValue386_OpAddPtr_0(v) 327 case OpAddr: 328 return rewriteValue386_OpAddr_0(v) 329 case OpAnd16: 330 return rewriteValue386_OpAnd16_0(v) 331 case OpAnd32: 332 return rewriteValue386_OpAnd32_0(v) 333 case OpAnd8: 334 return rewriteValue386_OpAnd8_0(v) 335 case OpAndB: 336 return rewriteValue386_OpAndB_0(v) 337 case OpAvg32u: 338 return rewriteValue386_OpAvg32u_0(v) 339 case OpBswap32: 340 return rewriteValue386_OpBswap32_0(v) 341 case OpClosureCall: 342 return rewriteValue386_OpClosureCall_0(v) 343 case OpCom16: 344 return rewriteValue386_OpCom16_0(v) 345 case OpCom32: 346 return rewriteValue386_OpCom32_0(v) 347 case OpCom8: 348 return rewriteValue386_OpCom8_0(v) 349 case OpConst16: 350 return rewriteValue386_OpConst16_0(v) 351 case OpConst32: 352 return rewriteValue386_OpConst32_0(v) 353 case OpConst32F: 354 return rewriteValue386_OpConst32F_0(v) 355 case OpConst64F: 356 return rewriteValue386_OpConst64F_0(v) 357 case OpConst8: 358 return rewriteValue386_OpConst8_0(v) 359 case OpConstBool: 360 return rewriteValue386_OpConstBool_0(v) 361 case OpConstNil: 362 return rewriteValue386_OpConstNil_0(v) 363 case OpCtz16: 364 return rewriteValue386_OpCtz16_0(v) 365 case OpCtz16NonZero: 366 return rewriteValue386_OpCtz16NonZero_0(v) 367 case OpCvt32Fto32: 368 return rewriteValue386_OpCvt32Fto32_0(v) 369 case OpCvt32Fto64F: 370 return rewriteValue386_OpCvt32Fto64F_0(v) 371 case OpCvt32to32F: 372 return rewriteValue386_OpCvt32to32F_0(v) 373 case OpCvt32to64F: 374 return rewriteValue386_OpCvt32to64F_0(v) 375 case OpCvt64Fto32: 376 return rewriteValue386_OpCvt64Fto32_0(v) 377 case OpCvt64Fto32F: 378 return rewriteValue386_OpCvt64Fto32F_0(v) 379 case OpDiv16: 380 return rewriteValue386_OpDiv16_0(v) 381 case OpDiv16u: 382 return rewriteValue386_OpDiv16u_0(v) 383 case OpDiv32: 384 return rewriteValue386_OpDiv32_0(v) 385 case OpDiv32F: 386 return rewriteValue386_OpDiv32F_0(v) 387 case OpDiv32u: 388 return rewriteValue386_OpDiv32u_0(v) 389 case OpDiv64F: 390 return rewriteValue386_OpDiv64F_0(v) 391 case OpDiv8: 392 return rewriteValue386_OpDiv8_0(v) 393 case OpDiv8u: 394 return rewriteValue386_OpDiv8u_0(v) 395 case OpEq16: 396 return rewriteValue386_OpEq16_0(v) 397 case OpEq32: 398 return rewriteValue386_OpEq32_0(v) 399 case OpEq32F: 400 return rewriteValue386_OpEq32F_0(v) 401 case OpEq64F: 402 return rewriteValue386_OpEq64F_0(v) 403 case OpEq8: 404 return rewriteValue386_OpEq8_0(v) 405 case OpEqB: 406 return rewriteValue386_OpEqB_0(v) 407 case OpEqPtr: 408 return rewriteValue386_OpEqPtr_0(v) 409 case OpGeq16: 410 return rewriteValue386_OpGeq16_0(v) 411 case OpGeq16U: 412 return rewriteValue386_OpGeq16U_0(v) 413 case OpGeq32: 414 return rewriteValue386_OpGeq32_0(v) 415 case OpGeq32F: 416 return rewriteValue386_OpGeq32F_0(v) 417 case OpGeq32U: 418 return rewriteValue386_OpGeq32U_0(v) 419 case OpGeq64F: 420 return rewriteValue386_OpGeq64F_0(v) 421 case OpGeq8: 422 return rewriteValue386_OpGeq8_0(v) 423 case OpGeq8U: 424 return rewriteValue386_OpGeq8U_0(v) 425 case OpGetCallerPC: 426 return rewriteValue386_OpGetCallerPC_0(v) 427 case OpGetCallerSP: 428 return rewriteValue386_OpGetCallerSP_0(v) 429 case OpGetClosurePtr: 430 return rewriteValue386_OpGetClosurePtr_0(v) 431 case OpGetG: 432 return rewriteValue386_OpGetG_0(v) 433 case OpGreater16: 434 return rewriteValue386_OpGreater16_0(v) 435 case OpGreater16U: 436 return rewriteValue386_OpGreater16U_0(v) 437 case OpGreater32: 438 return rewriteValue386_OpGreater32_0(v) 439 case OpGreater32F: 440 return rewriteValue386_OpGreater32F_0(v) 441 case OpGreater32U: 442 return rewriteValue386_OpGreater32U_0(v) 443 case OpGreater64F: 444 return rewriteValue386_OpGreater64F_0(v) 445 case OpGreater8: 446 return rewriteValue386_OpGreater8_0(v) 447 case OpGreater8U: 448 return rewriteValue386_OpGreater8U_0(v) 449 case OpHmul32: 450 return rewriteValue386_OpHmul32_0(v) 451 case OpHmul32u: 452 return rewriteValue386_OpHmul32u_0(v) 453 case OpInterCall: 454 return rewriteValue386_OpInterCall_0(v) 455 case OpIsInBounds: 456 return rewriteValue386_OpIsInBounds_0(v) 457 case OpIsNonNil: 458 return rewriteValue386_OpIsNonNil_0(v) 459 case OpIsSliceInBounds: 460 return rewriteValue386_OpIsSliceInBounds_0(v) 461 case OpLeq16: 462 return rewriteValue386_OpLeq16_0(v) 463 case OpLeq16U: 464 return rewriteValue386_OpLeq16U_0(v) 465 case OpLeq32: 466 return rewriteValue386_OpLeq32_0(v) 467 case OpLeq32F: 468 return rewriteValue386_OpLeq32F_0(v) 469 case OpLeq32U: 470 return rewriteValue386_OpLeq32U_0(v) 471 case OpLeq64F: 472 return rewriteValue386_OpLeq64F_0(v) 473 case OpLeq8: 474 return rewriteValue386_OpLeq8_0(v) 475 case OpLeq8U: 476 return rewriteValue386_OpLeq8U_0(v) 477 case OpLess16: 478 return rewriteValue386_OpLess16_0(v) 479 case OpLess16U: 480 return rewriteValue386_OpLess16U_0(v) 481 case OpLess32: 482 return rewriteValue386_OpLess32_0(v) 483 case OpLess32F: 484 return rewriteValue386_OpLess32F_0(v) 485 case OpLess32U: 486 return rewriteValue386_OpLess32U_0(v) 487 case OpLess64F: 488 return rewriteValue386_OpLess64F_0(v) 489 case OpLess8: 490 return rewriteValue386_OpLess8_0(v) 491 case OpLess8U: 492 return rewriteValue386_OpLess8U_0(v) 493 case OpLoad: 494 return rewriteValue386_OpLoad_0(v) 495 case OpLocalAddr: 496 return rewriteValue386_OpLocalAddr_0(v) 497 case OpLsh16x16: 498 return rewriteValue386_OpLsh16x16_0(v) 499 case OpLsh16x32: 500 return rewriteValue386_OpLsh16x32_0(v) 501 case OpLsh16x64: 502 return rewriteValue386_OpLsh16x64_0(v) 503 case OpLsh16x8: 504 return rewriteValue386_OpLsh16x8_0(v) 505 case OpLsh32x16: 506 return rewriteValue386_OpLsh32x16_0(v) 507 case OpLsh32x32: 508 return rewriteValue386_OpLsh32x32_0(v) 509 case OpLsh32x64: 510 return rewriteValue386_OpLsh32x64_0(v) 511 case OpLsh32x8: 512 return rewriteValue386_OpLsh32x8_0(v) 513 case OpLsh8x16: 514 return rewriteValue386_OpLsh8x16_0(v) 515 case OpLsh8x32: 516 return rewriteValue386_OpLsh8x32_0(v) 517 case OpLsh8x64: 518 return rewriteValue386_OpLsh8x64_0(v) 519 case OpLsh8x8: 520 return rewriteValue386_OpLsh8x8_0(v) 521 case OpMod16: 522 return rewriteValue386_OpMod16_0(v) 523 case OpMod16u: 524 return rewriteValue386_OpMod16u_0(v) 525 case OpMod32: 526 return rewriteValue386_OpMod32_0(v) 527 case OpMod32u: 528 return rewriteValue386_OpMod32u_0(v) 529 case OpMod8: 530 return rewriteValue386_OpMod8_0(v) 531 case OpMod8u: 532 return rewriteValue386_OpMod8u_0(v) 533 case OpMove: 534 return rewriteValue386_OpMove_0(v) || rewriteValue386_OpMove_10(v) 535 case OpMul16: 536 return rewriteValue386_OpMul16_0(v) 537 case OpMul32: 538 return rewriteValue386_OpMul32_0(v) 539 case OpMul32F: 540 return rewriteValue386_OpMul32F_0(v) 541 case OpMul32uhilo: 542 return rewriteValue386_OpMul32uhilo_0(v) 543 case OpMul64F: 544 return rewriteValue386_OpMul64F_0(v) 545 case OpMul8: 546 return rewriteValue386_OpMul8_0(v) 547 case OpNeg16: 548 return rewriteValue386_OpNeg16_0(v) 549 case OpNeg32: 550 return rewriteValue386_OpNeg32_0(v) 551 case OpNeg32F: 552 return rewriteValue386_OpNeg32F_0(v) 553 case OpNeg64F: 554 return rewriteValue386_OpNeg64F_0(v) 555 case OpNeg8: 556 return rewriteValue386_OpNeg8_0(v) 557 case OpNeq16: 558 return rewriteValue386_OpNeq16_0(v) 559 case OpNeq32: 560 return rewriteValue386_OpNeq32_0(v) 561 case OpNeq32F: 562 return rewriteValue386_OpNeq32F_0(v) 563 case OpNeq64F: 564 return rewriteValue386_OpNeq64F_0(v) 565 case OpNeq8: 566 return rewriteValue386_OpNeq8_0(v) 567 case OpNeqB: 568 return rewriteValue386_OpNeqB_0(v) 569 case OpNeqPtr: 570 return rewriteValue386_OpNeqPtr_0(v) 571 case OpNilCheck: 572 return rewriteValue386_OpNilCheck_0(v) 573 case OpNot: 574 return rewriteValue386_OpNot_0(v) 575 case OpOffPtr: 576 return rewriteValue386_OpOffPtr_0(v) 577 case OpOr16: 578 return rewriteValue386_OpOr16_0(v) 579 case OpOr32: 580 return rewriteValue386_OpOr32_0(v) 581 case OpOr8: 582 return rewriteValue386_OpOr8_0(v) 583 case OpOrB: 584 return rewriteValue386_OpOrB_0(v) 585 case OpPanicBounds: 586 return rewriteValue386_OpPanicBounds_0(v) 587 case OpPanicExtend: 588 return rewriteValue386_OpPanicExtend_0(v) 589 case OpRotateLeft16: 590 return rewriteValue386_OpRotateLeft16_0(v) 591 case OpRotateLeft32: 592 return rewriteValue386_OpRotateLeft32_0(v) 593 case OpRotateLeft8: 594 return rewriteValue386_OpRotateLeft8_0(v) 595 case OpRound32F: 596 return rewriteValue386_OpRound32F_0(v) 597 case OpRound64F: 598 return rewriteValue386_OpRound64F_0(v) 599 case OpRsh16Ux16: 600 return rewriteValue386_OpRsh16Ux16_0(v) 601 case OpRsh16Ux32: 602 return rewriteValue386_OpRsh16Ux32_0(v) 603 case OpRsh16Ux64: 604 return rewriteValue386_OpRsh16Ux64_0(v) 605 case OpRsh16Ux8: 606 return rewriteValue386_OpRsh16Ux8_0(v) 607 case OpRsh16x16: 608 return rewriteValue386_OpRsh16x16_0(v) 609 case OpRsh16x32: 610 return rewriteValue386_OpRsh16x32_0(v) 611 case OpRsh16x64: 612 return rewriteValue386_OpRsh16x64_0(v) 613 case OpRsh16x8: 614 return rewriteValue386_OpRsh16x8_0(v) 615 case OpRsh32Ux16: 616 return rewriteValue386_OpRsh32Ux16_0(v) 617 case OpRsh32Ux32: 618 return rewriteValue386_OpRsh32Ux32_0(v) 619 case OpRsh32Ux64: 620 return rewriteValue386_OpRsh32Ux64_0(v) 621 case OpRsh32Ux8: 622 return rewriteValue386_OpRsh32Ux8_0(v) 623 case OpRsh32x16: 624 return rewriteValue386_OpRsh32x16_0(v) 625 case OpRsh32x32: 626 return rewriteValue386_OpRsh32x32_0(v) 627 case OpRsh32x64: 628 return rewriteValue386_OpRsh32x64_0(v) 629 case OpRsh32x8: 630 return rewriteValue386_OpRsh32x8_0(v) 631 case OpRsh8Ux16: 632 return rewriteValue386_OpRsh8Ux16_0(v) 633 case OpRsh8Ux32: 634 return rewriteValue386_OpRsh8Ux32_0(v) 635 case OpRsh8Ux64: 636 return rewriteValue386_OpRsh8Ux64_0(v) 637 case OpRsh8Ux8: 638 return rewriteValue386_OpRsh8Ux8_0(v) 639 case OpRsh8x16: 640 return rewriteValue386_OpRsh8x16_0(v) 641 case OpRsh8x32: 642 return rewriteValue386_OpRsh8x32_0(v) 643 case OpRsh8x64: 644 return rewriteValue386_OpRsh8x64_0(v) 645 case OpRsh8x8: 646 return rewriteValue386_OpRsh8x8_0(v) 647 case OpSelect0: 648 return rewriteValue386_OpSelect0_0(v) 649 case OpSelect1: 650 return rewriteValue386_OpSelect1_0(v) 651 case OpSignExt16to32: 652 return rewriteValue386_OpSignExt16to32_0(v) 653 case OpSignExt8to16: 654 return rewriteValue386_OpSignExt8to16_0(v) 655 case OpSignExt8to32: 656 return rewriteValue386_OpSignExt8to32_0(v) 657 case OpSignmask: 658 return rewriteValue386_OpSignmask_0(v) 659 case OpSlicemask: 660 return rewriteValue386_OpSlicemask_0(v) 661 case OpSqrt: 662 return rewriteValue386_OpSqrt_0(v) 663 case OpStaticCall: 664 return rewriteValue386_OpStaticCall_0(v) 665 case OpStore: 666 return rewriteValue386_OpStore_0(v) 667 case OpSub16: 668 return rewriteValue386_OpSub16_0(v) 669 case OpSub32: 670 return rewriteValue386_OpSub32_0(v) 671 case OpSub32F: 672 return rewriteValue386_OpSub32F_0(v) 673 case OpSub32carry: 674 return rewriteValue386_OpSub32carry_0(v) 675 case OpSub32withcarry: 676 return rewriteValue386_OpSub32withcarry_0(v) 677 case OpSub64F: 678 return rewriteValue386_OpSub64F_0(v) 679 case OpSub8: 680 return rewriteValue386_OpSub8_0(v) 681 case OpSubPtr: 682 return rewriteValue386_OpSubPtr_0(v) 683 case OpTrunc16to8: 684 return rewriteValue386_OpTrunc16to8_0(v) 685 case OpTrunc32to16: 686 return rewriteValue386_OpTrunc32to16_0(v) 687 case OpTrunc32to8: 688 return rewriteValue386_OpTrunc32to8_0(v) 689 case OpWB: 690 return rewriteValue386_OpWB_0(v) 691 case OpXor16: 692 return rewriteValue386_OpXor16_0(v) 693 case OpXor32: 694 return rewriteValue386_OpXor32_0(v) 695 case OpXor8: 696 return rewriteValue386_OpXor8_0(v) 697 case OpZero: 698 return rewriteValue386_OpZero_0(v) || rewriteValue386_OpZero_10(v) 699 case OpZeroExt16to32: 700 return rewriteValue386_OpZeroExt16to32_0(v) 701 case OpZeroExt8to16: 702 return rewriteValue386_OpZeroExt8to16_0(v) 703 case OpZeroExt8to32: 704 return rewriteValue386_OpZeroExt8to32_0(v) 705 case OpZeromask: 706 return rewriteValue386_OpZeromask_0(v) 707 } 708 return false 709 } 710 func rewriteValue386_Op386ADCL_0(v *Value) bool { 711 // match: (ADCL x (MOVLconst [c]) f) 712 // result: (ADCLconst [c] x f) 713 for { 714 f := v.Args[2] 715 x := v.Args[0] 716 v_1 := v.Args[1] 717 if v_1.Op != Op386MOVLconst { 718 break 719 } 720 c := v_1.AuxInt 721 v.reset(Op386ADCLconst) 722 v.AuxInt = c 723 v.AddArg(x) 724 v.AddArg(f) 725 return true 726 } 727 // match: (ADCL (MOVLconst [c]) x f) 728 // result: (ADCLconst [c] x f) 729 for { 730 f := v.Args[2] 731 v_0 := v.Args[0] 732 if v_0.Op != Op386MOVLconst { 733 break 734 } 735 c := v_0.AuxInt 736 x := v.Args[1] 737 v.reset(Op386ADCLconst) 738 v.AuxInt = c 739 v.AddArg(x) 740 v.AddArg(f) 741 return true 742 } 743 // match: (ADCL (MOVLconst [c]) x f) 744 // result: (ADCLconst [c] x f) 745 for { 746 f := v.Args[2] 747 v_0 := v.Args[0] 748 if v_0.Op != Op386MOVLconst { 749 break 750 } 751 c := v_0.AuxInt 752 x := v.Args[1] 753 v.reset(Op386ADCLconst) 754 v.AuxInt = c 755 v.AddArg(x) 756 v.AddArg(f) 757 return true 758 } 759 // match: (ADCL x (MOVLconst [c]) f) 760 // result: (ADCLconst [c] x f) 761 for { 762 f := v.Args[2] 763 x := v.Args[0] 764 v_1 := v.Args[1] 765 if v_1.Op != Op386MOVLconst { 766 break 767 } 768 c := v_1.AuxInt 769 v.reset(Op386ADCLconst) 770 v.AuxInt = c 771 v.AddArg(x) 772 v.AddArg(f) 773 return true 774 } 775 return false 776 } 777 func rewriteValue386_Op386ADDL_0(v *Value) bool { 778 // match: (ADDL x (MOVLconst [c])) 779 // result: (ADDLconst [c] x) 780 for { 781 _ = v.Args[1] 782 x := v.Args[0] 783 v_1 := v.Args[1] 784 if v_1.Op != Op386MOVLconst { 785 break 786 } 787 c := v_1.AuxInt 788 v.reset(Op386ADDLconst) 789 v.AuxInt = c 790 v.AddArg(x) 791 return true 792 } 793 // match: (ADDL (MOVLconst [c]) x) 794 // result: (ADDLconst [c] x) 795 for { 796 x := v.Args[1] 797 v_0 := v.Args[0] 798 if v_0.Op != Op386MOVLconst { 799 break 800 } 801 c := v_0.AuxInt 802 v.reset(Op386ADDLconst) 803 v.AuxInt = c 804 v.AddArg(x) 805 return true 806 } 807 // match: (ADDL (SHLLconst [c] x) (SHRLconst [d] x)) 808 // cond: d == 32-c 809 // result: (ROLLconst [c] x) 810 for { 811 _ = v.Args[1] 812 v_0 := v.Args[0] 813 if v_0.Op != Op386SHLLconst { 814 break 815 } 816 c := v_0.AuxInt 817 x := v_0.Args[0] 818 v_1 := v.Args[1] 819 if v_1.Op != Op386SHRLconst { 820 break 821 } 822 d := v_1.AuxInt 823 if x != v_1.Args[0] || !(d == 32-c) { 824 break 825 } 826 v.reset(Op386ROLLconst) 827 v.AuxInt = c 828 v.AddArg(x) 829 return true 830 } 831 // match: (ADDL (SHRLconst [d] x) (SHLLconst [c] x)) 832 // cond: d == 32-c 833 // result: (ROLLconst [c] x) 834 for { 835 _ = v.Args[1] 836 v_0 := v.Args[0] 837 if v_0.Op != Op386SHRLconst { 838 break 839 } 840 d := v_0.AuxInt 841 x := v_0.Args[0] 842 v_1 := v.Args[1] 843 if v_1.Op != Op386SHLLconst { 844 break 845 } 846 c := v_1.AuxInt 847 if x != v_1.Args[0] || !(d == 32-c) { 848 break 849 } 850 v.reset(Op386ROLLconst) 851 v.AuxInt = c 852 v.AddArg(x) 853 return true 854 } 855 // match: (ADDL <t> (SHLLconst x [c]) (SHRWconst x [d])) 856 // cond: c < 16 && d == 16-c && t.Size() == 2 857 // result: (ROLWconst x [c]) 858 for { 859 t := v.Type 860 _ = v.Args[1] 861 v_0 := v.Args[0] 862 if v_0.Op != Op386SHLLconst { 863 break 864 } 865 c := v_0.AuxInt 866 x := v_0.Args[0] 867 v_1 := v.Args[1] 868 if v_1.Op != Op386SHRWconst { 869 break 870 } 871 d := v_1.AuxInt 872 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 873 break 874 } 875 v.reset(Op386ROLWconst) 876 v.AuxInt = c 877 v.AddArg(x) 878 return true 879 } 880 // match: (ADDL <t> (SHRWconst x [d]) (SHLLconst x [c])) 881 // cond: c < 16 && d == 16-c && t.Size() == 2 882 // result: (ROLWconst x [c]) 883 for { 884 t := v.Type 885 _ = v.Args[1] 886 v_0 := v.Args[0] 887 if v_0.Op != Op386SHRWconst { 888 break 889 } 890 d := v_0.AuxInt 891 x := v_0.Args[0] 892 v_1 := v.Args[1] 893 if v_1.Op != Op386SHLLconst { 894 break 895 } 896 c := v_1.AuxInt 897 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 898 break 899 } 900 v.reset(Op386ROLWconst) 901 v.AuxInt = c 902 v.AddArg(x) 903 return true 904 } 905 // match: (ADDL <t> (SHLLconst x [c]) (SHRBconst x [d])) 906 // cond: c < 8 && d == 8-c && t.Size() == 1 907 // result: (ROLBconst x [c]) 908 for { 909 t := v.Type 910 _ = v.Args[1] 911 v_0 := v.Args[0] 912 if v_0.Op != Op386SHLLconst { 913 break 914 } 915 c := v_0.AuxInt 916 x := v_0.Args[0] 917 v_1 := v.Args[1] 918 if v_1.Op != Op386SHRBconst { 919 break 920 } 921 d := v_1.AuxInt 922 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 923 break 924 } 925 v.reset(Op386ROLBconst) 926 v.AuxInt = c 927 v.AddArg(x) 928 return true 929 } 930 // match: (ADDL <t> (SHRBconst x [d]) (SHLLconst x [c])) 931 // cond: c < 8 && d == 8-c && t.Size() == 1 932 // result: (ROLBconst x [c]) 933 for { 934 t := v.Type 935 _ = v.Args[1] 936 v_0 := v.Args[0] 937 if v_0.Op != Op386SHRBconst { 938 break 939 } 940 d := v_0.AuxInt 941 x := v_0.Args[0] 942 v_1 := v.Args[1] 943 if v_1.Op != Op386SHLLconst { 944 break 945 } 946 c := v_1.AuxInt 947 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 948 break 949 } 950 v.reset(Op386ROLBconst) 951 v.AuxInt = c 952 v.AddArg(x) 953 return true 954 } 955 // match: (ADDL x (SHLLconst [3] y)) 956 // result: (LEAL8 x y) 957 for { 958 _ = v.Args[1] 959 x := v.Args[0] 960 v_1 := v.Args[1] 961 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 3 { 962 break 963 } 964 y := v_1.Args[0] 965 v.reset(Op386LEAL8) 966 v.AddArg(x) 967 v.AddArg(y) 968 return true 969 } 970 // match: (ADDL (SHLLconst [3] y) x) 971 // result: (LEAL8 x y) 972 for { 973 x := v.Args[1] 974 v_0 := v.Args[0] 975 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 3 { 976 break 977 } 978 y := v_0.Args[0] 979 v.reset(Op386LEAL8) 980 v.AddArg(x) 981 v.AddArg(y) 982 return true 983 } 984 return false 985 } 986 func rewriteValue386_Op386ADDL_10(v *Value) bool { 987 // match: (ADDL x (SHLLconst [2] y)) 988 // result: (LEAL4 x y) 989 for { 990 _ = v.Args[1] 991 x := v.Args[0] 992 v_1 := v.Args[1] 993 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 994 break 995 } 996 y := v_1.Args[0] 997 v.reset(Op386LEAL4) 998 v.AddArg(x) 999 v.AddArg(y) 1000 return true 1001 } 1002 // match: (ADDL (SHLLconst [2] y) x) 1003 // result: (LEAL4 x y) 1004 for { 1005 x := v.Args[1] 1006 v_0 := v.Args[0] 1007 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 2 { 1008 break 1009 } 1010 y := v_0.Args[0] 1011 v.reset(Op386LEAL4) 1012 v.AddArg(x) 1013 v.AddArg(y) 1014 return true 1015 } 1016 // match: (ADDL x (SHLLconst [1] y)) 1017 // result: (LEAL2 x y) 1018 for { 1019 _ = v.Args[1] 1020 x := v.Args[0] 1021 v_1 := v.Args[1] 1022 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 1023 break 1024 } 1025 y := v_1.Args[0] 1026 v.reset(Op386LEAL2) 1027 v.AddArg(x) 1028 v.AddArg(y) 1029 return true 1030 } 1031 // match: (ADDL (SHLLconst [1] y) x) 1032 // result: (LEAL2 x y) 1033 for { 1034 x := v.Args[1] 1035 v_0 := v.Args[0] 1036 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 1 { 1037 break 1038 } 1039 y := v_0.Args[0] 1040 v.reset(Op386LEAL2) 1041 v.AddArg(x) 1042 v.AddArg(y) 1043 return true 1044 } 1045 // match: (ADDL x (ADDL y y)) 1046 // result: (LEAL2 x y) 1047 for { 1048 _ = v.Args[1] 1049 x := v.Args[0] 1050 v_1 := v.Args[1] 1051 if v_1.Op != Op386ADDL { 1052 break 1053 } 1054 y := v_1.Args[1] 1055 if y != v_1.Args[0] { 1056 break 1057 } 1058 v.reset(Op386LEAL2) 1059 v.AddArg(x) 1060 v.AddArg(y) 1061 return true 1062 } 1063 // match: (ADDL (ADDL y y) x) 1064 // result: (LEAL2 x y) 1065 for { 1066 x := v.Args[1] 1067 v_0 := v.Args[0] 1068 if v_0.Op != Op386ADDL { 1069 break 1070 } 1071 y := v_0.Args[1] 1072 if y != v_0.Args[0] { 1073 break 1074 } 1075 v.reset(Op386LEAL2) 1076 v.AddArg(x) 1077 v.AddArg(y) 1078 return true 1079 } 1080 // match: (ADDL x (ADDL x y)) 1081 // result: (LEAL2 y x) 1082 for { 1083 _ = v.Args[1] 1084 x := v.Args[0] 1085 v_1 := v.Args[1] 1086 if v_1.Op != Op386ADDL { 1087 break 1088 } 1089 y := v_1.Args[1] 1090 if x != v_1.Args[0] { 1091 break 1092 } 1093 v.reset(Op386LEAL2) 1094 v.AddArg(y) 1095 v.AddArg(x) 1096 return true 1097 } 1098 // match: (ADDL x (ADDL y x)) 1099 // result: (LEAL2 y x) 1100 for { 1101 _ = v.Args[1] 1102 x := v.Args[0] 1103 v_1 := v.Args[1] 1104 if v_1.Op != Op386ADDL { 1105 break 1106 } 1107 _ = v_1.Args[1] 1108 y := v_1.Args[0] 1109 if x != v_1.Args[1] { 1110 break 1111 } 1112 v.reset(Op386LEAL2) 1113 v.AddArg(y) 1114 v.AddArg(x) 1115 return true 1116 } 1117 // match: (ADDL (ADDL x y) x) 1118 // result: (LEAL2 y x) 1119 for { 1120 x := v.Args[1] 1121 v_0 := v.Args[0] 1122 if v_0.Op != Op386ADDL { 1123 break 1124 } 1125 y := v_0.Args[1] 1126 if x != v_0.Args[0] { 1127 break 1128 } 1129 v.reset(Op386LEAL2) 1130 v.AddArg(y) 1131 v.AddArg(x) 1132 return true 1133 } 1134 // match: (ADDL (ADDL y x) x) 1135 // result: (LEAL2 y x) 1136 for { 1137 x := v.Args[1] 1138 v_0 := v.Args[0] 1139 if v_0.Op != Op386ADDL { 1140 break 1141 } 1142 _ = v_0.Args[1] 1143 y := v_0.Args[0] 1144 if x != v_0.Args[1] { 1145 break 1146 } 1147 v.reset(Op386LEAL2) 1148 v.AddArg(y) 1149 v.AddArg(x) 1150 return true 1151 } 1152 return false 1153 } 1154 func rewriteValue386_Op386ADDL_20(v *Value) bool { 1155 // match: (ADDL (ADDLconst [c] x) y) 1156 // result: (LEAL1 [c] x y) 1157 for { 1158 y := v.Args[1] 1159 v_0 := v.Args[0] 1160 if v_0.Op != Op386ADDLconst { 1161 break 1162 } 1163 c := v_0.AuxInt 1164 x := v_0.Args[0] 1165 v.reset(Op386LEAL1) 1166 v.AuxInt = c 1167 v.AddArg(x) 1168 v.AddArg(y) 1169 return true 1170 } 1171 // match: (ADDL y (ADDLconst [c] x)) 1172 // result: (LEAL1 [c] x y) 1173 for { 1174 _ = v.Args[1] 1175 y := v.Args[0] 1176 v_1 := v.Args[1] 1177 if v_1.Op != Op386ADDLconst { 1178 break 1179 } 1180 c := v_1.AuxInt 1181 x := v_1.Args[0] 1182 v.reset(Op386LEAL1) 1183 v.AuxInt = c 1184 v.AddArg(x) 1185 v.AddArg(y) 1186 return true 1187 } 1188 // match: (ADDL x (LEAL [c] {s} y)) 1189 // cond: x.Op != OpSB && y.Op != OpSB 1190 // result: (LEAL1 [c] {s} x y) 1191 for { 1192 _ = v.Args[1] 1193 x := v.Args[0] 1194 v_1 := v.Args[1] 1195 if v_1.Op != Op386LEAL { 1196 break 1197 } 1198 c := v_1.AuxInt 1199 s := v_1.Aux 1200 y := v_1.Args[0] 1201 if !(x.Op != OpSB && y.Op != OpSB) { 1202 break 1203 } 1204 v.reset(Op386LEAL1) 1205 v.AuxInt = c 1206 v.Aux = s 1207 v.AddArg(x) 1208 v.AddArg(y) 1209 return true 1210 } 1211 // match: (ADDL (LEAL [c] {s} y) x) 1212 // cond: x.Op != OpSB && y.Op != OpSB 1213 // result: (LEAL1 [c] {s} x y) 1214 for { 1215 x := v.Args[1] 1216 v_0 := v.Args[0] 1217 if v_0.Op != Op386LEAL { 1218 break 1219 } 1220 c := v_0.AuxInt 1221 s := v_0.Aux 1222 y := v_0.Args[0] 1223 if !(x.Op != OpSB && y.Op != OpSB) { 1224 break 1225 } 1226 v.reset(Op386LEAL1) 1227 v.AuxInt = c 1228 v.Aux = s 1229 v.AddArg(x) 1230 v.AddArg(y) 1231 return true 1232 } 1233 // match: (ADDL x l:(MOVLload [off] {sym} ptr mem)) 1234 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 1235 // result: (ADDLload x [off] {sym} ptr mem) 1236 for { 1237 _ = v.Args[1] 1238 x := v.Args[0] 1239 l := v.Args[1] 1240 if l.Op != Op386MOVLload { 1241 break 1242 } 1243 off := l.AuxInt 1244 sym := l.Aux 1245 mem := l.Args[1] 1246 ptr := l.Args[0] 1247 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 1248 break 1249 } 1250 v.reset(Op386ADDLload) 1251 v.AuxInt = off 1252 v.Aux = sym 1253 v.AddArg(x) 1254 v.AddArg(ptr) 1255 v.AddArg(mem) 1256 return true 1257 } 1258 // match: (ADDL l:(MOVLload [off] {sym} ptr mem) x) 1259 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 1260 // result: (ADDLload x [off] {sym} ptr mem) 1261 for { 1262 x := v.Args[1] 1263 l := v.Args[0] 1264 if l.Op != Op386MOVLload { 1265 break 1266 } 1267 off := l.AuxInt 1268 sym := l.Aux 1269 mem := l.Args[1] 1270 ptr := l.Args[0] 1271 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 1272 break 1273 } 1274 v.reset(Op386ADDLload) 1275 v.AuxInt = off 1276 v.Aux = sym 1277 v.AddArg(x) 1278 v.AddArg(ptr) 1279 v.AddArg(mem) 1280 return true 1281 } 1282 // match: (ADDL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 1283 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 1284 // result: (ADDLloadidx4 x [off] {sym} ptr idx mem) 1285 for { 1286 _ = v.Args[1] 1287 x := v.Args[0] 1288 l := v.Args[1] 1289 if l.Op != Op386MOVLloadidx4 { 1290 break 1291 } 1292 off := l.AuxInt 1293 sym := l.Aux 1294 mem := l.Args[2] 1295 ptr := l.Args[0] 1296 idx := l.Args[1] 1297 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 1298 break 1299 } 1300 v.reset(Op386ADDLloadidx4) 1301 v.AuxInt = off 1302 v.Aux = sym 1303 v.AddArg(x) 1304 v.AddArg(ptr) 1305 v.AddArg(idx) 1306 v.AddArg(mem) 1307 return true 1308 } 1309 // match: (ADDL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) 1310 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 1311 // result: (ADDLloadidx4 x [off] {sym} ptr idx mem) 1312 for { 1313 x := v.Args[1] 1314 l := v.Args[0] 1315 if l.Op != Op386MOVLloadidx4 { 1316 break 1317 } 1318 off := l.AuxInt 1319 sym := l.Aux 1320 mem := l.Args[2] 1321 ptr := l.Args[0] 1322 idx := l.Args[1] 1323 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 1324 break 1325 } 1326 v.reset(Op386ADDLloadidx4) 1327 v.AuxInt = off 1328 v.Aux = sym 1329 v.AddArg(x) 1330 v.AddArg(ptr) 1331 v.AddArg(idx) 1332 v.AddArg(mem) 1333 return true 1334 } 1335 // match: (ADDL x (NEGL y)) 1336 // result: (SUBL x y) 1337 for { 1338 _ = v.Args[1] 1339 x := v.Args[0] 1340 v_1 := v.Args[1] 1341 if v_1.Op != Op386NEGL { 1342 break 1343 } 1344 y := v_1.Args[0] 1345 v.reset(Op386SUBL) 1346 v.AddArg(x) 1347 v.AddArg(y) 1348 return true 1349 } 1350 // match: (ADDL (NEGL y) x) 1351 // result: (SUBL x y) 1352 for { 1353 x := v.Args[1] 1354 v_0 := v.Args[0] 1355 if v_0.Op != Op386NEGL { 1356 break 1357 } 1358 y := v_0.Args[0] 1359 v.reset(Op386SUBL) 1360 v.AddArg(x) 1361 v.AddArg(y) 1362 return true 1363 } 1364 return false 1365 } 1366 func rewriteValue386_Op386ADDLcarry_0(v *Value) bool { 1367 // match: (ADDLcarry x (MOVLconst [c])) 1368 // result: (ADDLconstcarry [c] x) 1369 for { 1370 _ = v.Args[1] 1371 x := v.Args[0] 1372 v_1 := v.Args[1] 1373 if v_1.Op != Op386MOVLconst { 1374 break 1375 } 1376 c := v_1.AuxInt 1377 v.reset(Op386ADDLconstcarry) 1378 v.AuxInt = c 1379 v.AddArg(x) 1380 return true 1381 } 1382 // match: (ADDLcarry (MOVLconst [c]) x) 1383 // result: (ADDLconstcarry [c] x) 1384 for { 1385 x := v.Args[1] 1386 v_0 := v.Args[0] 1387 if v_0.Op != Op386MOVLconst { 1388 break 1389 } 1390 c := v_0.AuxInt 1391 v.reset(Op386ADDLconstcarry) 1392 v.AuxInt = c 1393 v.AddArg(x) 1394 return true 1395 } 1396 return false 1397 } 1398 func rewriteValue386_Op386ADDLconst_0(v *Value) bool { 1399 // match: (ADDLconst [c] (ADDL x y)) 1400 // result: (LEAL1 [c] x y) 1401 for { 1402 c := v.AuxInt 1403 v_0 := v.Args[0] 1404 if v_0.Op != Op386ADDL { 1405 break 1406 } 1407 y := v_0.Args[1] 1408 x := v_0.Args[0] 1409 v.reset(Op386LEAL1) 1410 v.AuxInt = c 1411 v.AddArg(x) 1412 v.AddArg(y) 1413 return true 1414 } 1415 // match: (ADDLconst [c] (LEAL [d] {s} x)) 1416 // cond: is32Bit(c+d) 1417 // result: (LEAL [c+d] {s} x) 1418 for { 1419 c := v.AuxInt 1420 v_0 := v.Args[0] 1421 if v_0.Op != Op386LEAL { 1422 break 1423 } 1424 d := v_0.AuxInt 1425 s := v_0.Aux 1426 x := v_0.Args[0] 1427 if !(is32Bit(c + d)) { 1428 break 1429 } 1430 v.reset(Op386LEAL) 1431 v.AuxInt = c + d 1432 v.Aux = s 1433 v.AddArg(x) 1434 return true 1435 } 1436 // match: (ADDLconst [c] (LEAL1 [d] {s} x y)) 1437 // cond: is32Bit(c+d) 1438 // result: (LEAL1 [c+d] {s} x y) 1439 for { 1440 c := v.AuxInt 1441 v_0 := v.Args[0] 1442 if v_0.Op != Op386LEAL1 { 1443 break 1444 } 1445 d := v_0.AuxInt 1446 s := v_0.Aux 1447 y := v_0.Args[1] 1448 x := v_0.Args[0] 1449 if !(is32Bit(c + d)) { 1450 break 1451 } 1452 v.reset(Op386LEAL1) 1453 v.AuxInt = c + d 1454 v.Aux = s 1455 v.AddArg(x) 1456 v.AddArg(y) 1457 return true 1458 } 1459 // match: (ADDLconst [c] (LEAL2 [d] {s} x y)) 1460 // cond: is32Bit(c+d) 1461 // result: (LEAL2 [c+d] {s} x y) 1462 for { 1463 c := v.AuxInt 1464 v_0 := v.Args[0] 1465 if v_0.Op != Op386LEAL2 { 1466 break 1467 } 1468 d := v_0.AuxInt 1469 s := v_0.Aux 1470 y := v_0.Args[1] 1471 x := v_0.Args[0] 1472 if !(is32Bit(c + d)) { 1473 break 1474 } 1475 v.reset(Op386LEAL2) 1476 v.AuxInt = c + d 1477 v.Aux = s 1478 v.AddArg(x) 1479 v.AddArg(y) 1480 return true 1481 } 1482 // match: (ADDLconst [c] (LEAL4 [d] {s} x y)) 1483 // cond: is32Bit(c+d) 1484 // result: (LEAL4 [c+d] {s} x y) 1485 for { 1486 c := v.AuxInt 1487 v_0 := v.Args[0] 1488 if v_0.Op != Op386LEAL4 { 1489 break 1490 } 1491 d := v_0.AuxInt 1492 s := v_0.Aux 1493 y := v_0.Args[1] 1494 x := v_0.Args[0] 1495 if !(is32Bit(c + d)) { 1496 break 1497 } 1498 v.reset(Op386LEAL4) 1499 v.AuxInt = c + d 1500 v.Aux = s 1501 v.AddArg(x) 1502 v.AddArg(y) 1503 return true 1504 } 1505 // match: (ADDLconst [c] (LEAL8 [d] {s} x y)) 1506 // cond: is32Bit(c+d) 1507 // result: (LEAL8 [c+d] {s} x y) 1508 for { 1509 c := v.AuxInt 1510 v_0 := v.Args[0] 1511 if v_0.Op != Op386LEAL8 { 1512 break 1513 } 1514 d := v_0.AuxInt 1515 s := v_0.Aux 1516 y := v_0.Args[1] 1517 x := v_0.Args[0] 1518 if !(is32Bit(c + d)) { 1519 break 1520 } 1521 v.reset(Op386LEAL8) 1522 v.AuxInt = c + d 1523 v.Aux = s 1524 v.AddArg(x) 1525 v.AddArg(y) 1526 return true 1527 } 1528 // match: (ADDLconst [c] x) 1529 // cond: int32(c)==0 1530 // result: x 1531 for { 1532 c := v.AuxInt 1533 x := v.Args[0] 1534 if !(int32(c) == 0) { 1535 break 1536 } 1537 v.reset(OpCopy) 1538 v.Type = x.Type 1539 v.AddArg(x) 1540 return true 1541 } 1542 // match: (ADDLconst [c] (MOVLconst [d])) 1543 // result: (MOVLconst [int64(int32(c+d))]) 1544 for { 1545 c := v.AuxInt 1546 v_0 := v.Args[0] 1547 if v_0.Op != Op386MOVLconst { 1548 break 1549 } 1550 d := v_0.AuxInt 1551 v.reset(Op386MOVLconst) 1552 v.AuxInt = int64(int32(c + d)) 1553 return true 1554 } 1555 // match: (ADDLconst [c] (ADDLconst [d] x)) 1556 // result: (ADDLconst [int64(int32(c+d))] x) 1557 for { 1558 c := v.AuxInt 1559 v_0 := v.Args[0] 1560 if v_0.Op != Op386ADDLconst { 1561 break 1562 } 1563 d := v_0.AuxInt 1564 x := v_0.Args[0] 1565 v.reset(Op386ADDLconst) 1566 v.AuxInt = int64(int32(c + d)) 1567 v.AddArg(x) 1568 return true 1569 } 1570 return false 1571 } 1572 func rewriteValue386_Op386ADDLconstmodify_0(v *Value) bool { 1573 b := v.Block 1574 config := b.Func.Config 1575 // match: (ADDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) 1576 // cond: ValAndOff(valoff1).canAdd(off2) 1577 // result: (ADDLconstmodify [ValAndOff(valoff1).add(off2)] {sym} base mem) 1578 for { 1579 valoff1 := v.AuxInt 1580 sym := v.Aux 1581 mem := v.Args[1] 1582 v_0 := v.Args[0] 1583 if v_0.Op != Op386ADDLconst { 1584 break 1585 } 1586 off2 := v_0.AuxInt 1587 base := v_0.Args[0] 1588 if !(ValAndOff(valoff1).canAdd(off2)) { 1589 break 1590 } 1591 v.reset(Op386ADDLconstmodify) 1592 v.AuxInt = ValAndOff(valoff1).add(off2) 1593 v.Aux = sym 1594 v.AddArg(base) 1595 v.AddArg(mem) 1596 return true 1597 } 1598 // match: (ADDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) 1599 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1600 // result: (ADDLconstmodify [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base mem) 1601 for { 1602 valoff1 := v.AuxInt 1603 sym1 := v.Aux 1604 mem := v.Args[1] 1605 v_0 := v.Args[0] 1606 if v_0.Op != Op386LEAL { 1607 break 1608 } 1609 off2 := v_0.AuxInt 1610 sym2 := v_0.Aux 1611 base := v_0.Args[0] 1612 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 1613 break 1614 } 1615 v.reset(Op386ADDLconstmodify) 1616 v.AuxInt = ValAndOff(valoff1).add(off2) 1617 v.Aux = mergeSym(sym1, sym2) 1618 v.AddArg(base) 1619 v.AddArg(mem) 1620 return true 1621 } 1622 return false 1623 } 1624 func rewriteValue386_Op386ADDLconstmodifyidx4_0(v *Value) bool { 1625 b := v.Block 1626 config := b.Func.Config 1627 // match: (ADDLconstmodifyidx4 [valoff1] {sym} (ADDLconst [off2] base) idx mem) 1628 // cond: ValAndOff(valoff1).canAdd(off2) 1629 // result: (ADDLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {sym} base idx mem) 1630 for { 1631 valoff1 := v.AuxInt 1632 sym := v.Aux 1633 mem := v.Args[2] 1634 v_0 := v.Args[0] 1635 if v_0.Op != Op386ADDLconst { 1636 break 1637 } 1638 off2 := v_0.AuxInt 1639 base := v_0.Args[0] 1640 idx := v.Args[1] 1641 if !(ValAndOff(valoff1).canAdd(off2)) { 1642 break 1643 } 1644 v.reset(Op386ADDLconstmodifyidx4) 1645 v.AuxInt = ValAndOff(valoff1).add(off2) 1646 v.Aux = sym 1647 v.AddArg(base) 1648 v.AddArg(idx) 1649 v.AddArg(mem) 1650 return true 1651 } 1652 // match: (ADDLconstmodifyidx4 [valoff1] {sym} base (ADDLconst [off2] idx) mem) 1653 // cond: ValAndOff(valoff1).canAdd(off2*4) 1654 // result: (ADDLconstmodifyidx4 [ValAndOff(valoff1).add(off2*4)] {sym} base idx mem) 1655 for { 1656 valoff1 := v.AuxInt 1657 sym := v.Aux 1658 mem := v.Args[2] 1659 base := v.Args[0] 1660 v_1 := v.Args[1] 1661 if v_1.Op != Op386ADDLconst { 1662 break 1663 } 1664 off2 := v_1.AuxInt 1665 idx := v_1.Args[0] 1666 if !(ValAndOff(valoff1).canAdd(off2 * 4)) { 1667 break 1668 } 1669 v.reset(Op386ADDLconstmodifyidx4) 1670 v.AuxInt = ValAndOff(valoff1).add(off2 * 4) 1671 v.Aux = sym 1672 v.AddArg(base) 1673 v.AddArg(idx) 1674 v.AddArg(mem) 1675 return true 1676 } 1677 // match: (ADDLconstmodifyidx4 [valoff1] {sym1} (LEAL [off2] {sym2} base) idx mem) 1678 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1679 // result: (ADDLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base idx mem) 1680 for { 1681 valoff1 := v.AuxInt 1682 sym1 := v.Aux 1683 mem := v.Args[2] 1684 v_0 := v.Args[0] 1685 if v_0.Op != Op386LEAL { 1686 break 1687 } 1688 off2 := v_0.AuxInt 1689 sym2 := v_0.Aux 1690 base := v_0.Args[0] 1691 idx := v.Args[1] 1692 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 1693 break 1694 } 1695 v.reset(Op386ADDLconstmodifyidx4) 1696 v.AuxInt = ValAndOff(valoff1).add(off2) 1697 v.Aux = mergeSym(sym1, sym2) 1698 v.AddArg(base) 1699 v.AddArg(idx) 1700 v.AddArg(mem) 1701 return true 1702 } 1703 return false 1704 } 1705 func rewriteValue386_Op386ADDLload_0(v *Value) bool { 1706 b := v.Block 1707 config := b.Func.Config 1708 // match: (ADDLload [off1] {sym} val (ADDLconst [off2] base) mem) 1709 // cond: is32Bit(off1+off2) 1710 // result: (ADDLload [off1+off2] {sym} val base mem) 1711 for { 1712 off1 := v.AuxInt 1713 sym := v.Aux 1714 mem := v.Args[2] 1715 val := v.Args[0] 1716 v_1 := v.Args[1] 1717 if v_1.Op != Op386ADDLconst { 1718 break 1719 } 1720 off2 := v_1.AuxInt 1721 base := v_1.Args[0] 1722 if !(is32Bit(off1 + off2)) { 1723 break 1724 } 1725 v.reset(Op386ADDLload) 1726 v.AuxInt = off1 + off2 1727 v.Aux = sym 1728 v.AddArg(val) 1729 v.AddArg(base) 1730 v.AddArg(mem) 1731 return true 1732 } 1733 // match: (ADDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 1734 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1735 // result: (ADDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 1736 for { 1737 off1 := v.AuxInt 1738 sym1 := v.Aux 1739 mem := v.Args[2] 1740 val := v.Args[0] 1741 v_1 := v.Args[1] 1742 if v_1.Op != Op386LEAL { 1743 break 1744 } 1745 off2 := v_1.AuxInt 1746 sym2 := v_1.Aux 1747 base := v_1.Args[0] 1748 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 1749 break 1750 } 1751 v.reset(Op386ADDLload) 1752 v.AuxInt = off1 + off2 1753 v.Aux = mergeSym(sym1, sym2) 1754 v.AddArg(val) 1755 v.AddArg(base) 1756 v.AddArg(mem) 1757 return true 1758 } 1759 // match: (ADDLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 1760 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 1761 // result: (ADDLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 1762 for { 1763 off1 := v.AuxInt 1764 sym1 := v.Aux 1765 mem := v.Args[2] 1766 val := v.Args[0] 1767 v_1 := v.Args[1] 1768 if v_1.Op != Op386LEAL4 { 1769 break 1770 } 1771 off2 := v_1.AuxInt 1772 sym2 := v_1.Aux 1773 idx := v_1.Args[1] 1774 ptr := v_1.Args[0] 1775 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 1776 break 1777 } 1778 v.reset(Op386ADDLloadidx4) 1779 v.AuxInt = off1 + off2 1780 v.Aux = mergeSym(sym1, sym2) 1781 v.AddArg(val) 1782 v.AddArg(ptr) 1783 v.AddArg(idx) 1784 v.AddArg(mem) 1785 return true 1786 } 1787 return false 1788 } 1789 func rewriteValue386_Op386ADDLloadidx4_0(v *Value) bool { 1790 b := v.Block 1791 config := b.Func.Config 1792 // match: (ADDLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 1793 // cond: is32Bit(off1+off2) 1794 // result: (ADDLloadidx4 [off1+off2] {sym} val base idx mem) 1795 for { 1796 off1 := v.AuxInt 1797 sym := v.Aux 1798 mem := v.Args[3] 1799 val := v.Args[0] 1800 v_1 := v.Args[1] 1801 if v_1.Op != Op386ADDLconst { 1802 break 1803 } 1804 off2 := v_1.AuxInt 1805 base := v_1.Args[0] 1806 idx := v.Args[2] 1807 if !(is32Bit(off1 + off2)) { 1808 break 1809 } 1810 v.reset(Op386ADDLloadidx4) 1811 v.AuxInt = off1 + off2 1812 v.Aux = sym 1813 v.AddArg(val) 1814 v.AddArg(base) 1815 v.AddArg(idx) 1816 v.AddArg(mem) 1817 return true 1818 } 1819 // match: (ADDLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 1820 // cond: is32Bit(off1+off2*4) 1821 // result: (ADDLloadidx4 [off1+off2*4] {sym} val base idx mem) 1822 for { 1823 off1 := v.AuxInt 1824 sym := v.Aux 1825 mem := v.Args[3] 1826 val := v.Args[0] 1827 base := v.Args[1] 1828 v_2 := v.Args[2] 1829 if v_2.Op != Op386ADDLconst { 1830 break 1831 } 1832 off2 := v_2.AuxInt 1833 idx := v_2.Args[0] 1834 if !(is32Bit(off1 + off2*4)) { 1835 break 1836 } 1837 v.reset(Op386ADDLloadidx4) 1838 v.AuxInt = off1 + off2*4 1839 v.Aux = sym 1840 v.AddArg(val) 1841 v.AddArg(base) 1842 v.AddArg(idx) 1843 v.AddArg(mem) 1844 return true 1845 } 1846 // match: (ADDLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 1847 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1848 // result: (ADDLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 1849 for { 1850 off1 := v.AuxInt 1851 sym1 := v.Aux 1852 mem := v.Args[3] 1853 val := v.Args[0] 1854 v_1 := v.Args[1] 1855 if v_1.Op != Op386LEAL { 1856 break 1857 } 1858 off2 := v_1.AuxInt 1859 sym2 := v_1.Aux 1860 base := v_1.Args[0] 1861 idx := v.Args[2] 1862 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 1863 break 1864 } 1865 v.reset(Op386ADDLloadidx4) 1866 v.AuxInt = off1 + off2 1867 v.Aux = mergeSym(sym1, sym2) 1868 v.AddArg(val) 1869 v.AddArg(base) 1870 v.AddArg(idx) 1871 v.AddArg(mem) 1872 return true 1873 } 1874 return false 1875 } 1876 func rewriteValue386_Op386ADDLmodify_0(v *Value) bool { 1877 b := v.Block 1878 config := b.Func.Config 1879 // match: (ADDLmodify [off1] {sym} (ADDLconst [off2] base) val mem) 1880 // cond: is32Bit(off1+off2) 1881 // result: (ADDLmodify [off1+off2] {sym} base val mem) 1882 for { 1883 off1 := v.AuxInt 1884 sym := v.Aux 1885 mem := v.Args[2] 1886 v_0 := v.Args[0] 1887 if v_0.Op != Op386ADDLconst { 1888 break 1889 } 1890 off2 := v_0.AuxInt 1891 base := v_0.Args[0] 1892 val := v.Args[1] 1893 if !(is32Bit(off1 + off2)) { 1894 break 1895 } 1896 v.reset(Op386ADDLmodify) 1897 v.AuxInt = off1 + off2 1898 v.Aux = sym 1899 v.AddArg(base) 1900 v.AddArg(val) 1901 v.AddArg(mem) 1902 return true 1903 } 1904 // match: (ADDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 1905 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1906 // result: (ADDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) 1907 for { 1908 off1 := v.AuxInt 1909 sym1 := v.Aux 1910 mem := v.Args[2] 1911 v_0 := v.Args[0] 1912 if v_0.Op != Op386LEAL { 1913 break 1914 } 1915 off2 := v_0.AuxInt 1916 sym2 := v_0.Aux 1917 base := v_0.Args[0] 1918 val := v.Args[1] 1919 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 1920 break 1921 } 1922 v.reset(Op386ADDLmodify) 1923 v.AuxInt = off1 + off2 1924 v.Aux = mergeSym(sym1, sym2) 1925 v.AddArg(base) 1926 v.AddArg(val) 1927 v.AddArg(mem) 1928 return true 1929 } 1930 return false 1931 } 1932 func rewriteValue386_Op386ADDLmodifyidx4_0(v *Value) bool { 1933 b := v.Block 1934 config := b.Func.Config 1935 // match: (ADDLmodifyidx4 [off1] {sym} (ADDLconst [off2] base) idx val mem) 1936 // cond: is32Bit(off1+off2) 1937 // result: (ADDLmodifyidx4 [off1+off2] {sym} base idx val mem) 1938 for { 1939 off1 := v.AuxInt 1940 sym := v.Aux 1941 mem := v.Args[3] 1942 v_0 := v.Args[0] 1943 if v_0.Op != Op386ADDLconst { 1944 break 1945 } 1946 off2 := v_0.AuxInt 1947 base := v_0.Args[0] 1948 idx := v.Args[1] 1949 val := v.Args[2] 1950 if !(is32Bit(off1 + off2)) { 1951 break 1952 } 1953 v.reset(Op386ADDLmodifyidx4) 1954 v.AuxInt = off1 + off2 1955 v.Aux = sym 1956 v.AddArg(base) 1957 v.AddArg(idx) 1958 v.AddArg(val) 1959 v.AddArg(mem) 1960 return true 1961 } 1962 // match: (ADDLmodifyidx4 [off1] {sym} base (ADDLconst [off2] idx) val mem) 1963 // cond: is32Bit(off1+off2*4) 1964 // result: (ADDLmodifyidx4 [off1+off2*4] {sym} base idx val mem) 1965 for { 1966 off1 := v.AuxInt 1967 sym := v.Aux 1968 mem := v.Args[3] 1969 base := v.Args[0] 1970 v_1 := v.Args[1] 1971 if v_1.Op != Op386ADDLconst { 1972 break 1973 } 1974 off2 := v_1.AuxInt 1975 idx := v_1.Args[0] 1976 val := v.Args[2] 1977 if !(is32Bit(off1 + off2*4)) { 1978 break 1979 } 1980 v.reset(Op386ADDLmodifyidx4) 1981 v.AuxInt = off1 + off2*4 1982 v.Aux = sym 1983 v.AddArg(base) 1984 v.AddArg(idx) 1985 v.AddArg(val) 1986 v.AddArg(mem) 1987 return true 1988 } 1989 // match: (ADDLmodifyidx4 [off1] {sym1} (LEAL [off2] {sym2} base) idx val mem) 1990 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 1991 // result: (ADDLmodifyidx4 [off1+off2] {mergeSym(sym1,sym2)} base idx val mem) 1992 for { 1993 off1 := v.AuxInt 1994 sym1 := v.Aux 1995 mem := v.Args[3] 1996 v_0 := v.Args[0] 1997 if v_0.Op != Op386LEAL { 1998 break 1999 } 2000 off2 := v_0.AuxInt 2001 sym2 := v_0.Aux 2002 base := v_0.Args[0] 2003 idx := v.Args[1] 2004 val := v.Args[2] 2005 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2006 break 2007 } 2008 v.reset(Op386ADDLmodifyidx4) 2009 v.AuxInt = off1 + off2 2010 v.Aux = mergeSym(sym1, sym2) 2011 v.AddArg(base) 2012 v.AddArg(idx) 2013 v.AddArg(val) 2014 v.AddArg(mem) 2015 return true 2016 } 2017 // match: (ADDLmodifyidx4 [off] {sym} ptr idx (MOVLconst [c]) mem) 2018 // cond: validValAndOff(c,off) 2019 // result: (ADDLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 2020 for { 2021 off := v.AuxInt 2022 sym := v.Aux 2023 mem := v.Args[3] 2024 ptr := v.Args[0] 2025 idx := v.Args[1] 2026 v_2 := v.Args[2] 2027 if v_2.Op != Op386MOVLconst { 2028 break 2029 } 2030 c := v_2.AuxInt 2031 if !(validValAndOff(c, off)) { 2032 break 2033 } 2034 v.reset(Op386ADDLconstmodifyidx4) 2035 v.AuxInt = makeValAndOff(c, off) 2036 v.Aux = sym 2037 v.AddArg(ptr) 2038 v.AddArg(idx) 2039 v.AddArg(mem) 2040 return true 2041 } 2042 return false 2043 } 2044 func rewriteValue386_Op386ADDSD_0(v *Value) bool { 2045 b := v.Block 2046 config := b.Func.Config 2047 // match: (ADDSD x l:(MOVSDload [off] {sym} ptr mem)) 2048 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 2049 // result: (ADDSDload x [off] {sym} ptr mem) 2050 for { 2051 _ = v.Args[1] 2052 x := v.Args[0] 2053 l := v.Args[1] 2054 if l.Op != Op386MOVSDload { 2055 break 2056 } 2057 off := l.AuxInt 2058 sym := l.Aux 2059 mem := l.Args[1] 2060 ptr := l.Args[0] 2061 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 2062 break 2063 } 2064 v.reset(Op386ADDSDload) 2065 v.AuxInt = off 2066 v.Aux = sym 2067 v.AddArg(x) 2068 v.AddArg(ptr) 2069 v.AddArg(mem) 2070 return true 2071 } 2072 // match: (ADDSD l:(MOVSDload [off] {sym} ptr mem) x) 2073 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 2074 // result: (ADDSDload x [off] {sym} ptr mem) 2075 for { 2076 x := v.Args[1] 2077 l := v.Args[0] 2078 if l.Op != Op386MOVSDload { 2079 break 2080 } 2081 off := l.AuxInt 2082 sym := l.Aux 2083 mem := l.Args[1] 2084 ptr := l.Args[0] 2085 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 2086 break 2087 } 2088 v.reset(Op386ADDSDload) 2089 v.AuxInt = off 2090 v.Aux = sym 2091 v.AddArg(x) 2092 v.AddArg(ptr) 2093 v.AddArg(mem) 2094 return true 2095 } 2096 return false 2097 } 2098 func rewriteValue386_Op386ADDSDload_0(v *Value) bool { 2099 b := v.Block 2100 config := b.Func.Config 2101 // match: (ADDSDload [off1] {sym} val (ADDLconst [off2] base) mem) 2102 // cond: is32Bit(off1+off2) 2103 // result: (ADDSDload [off1+off2] {sym} val base mem) 2104 for { 2105 off1 := v.AuxInt 2106 sym := v.Aux 2107 mem := v.Args[2] 2108 val := v.Args[0] 2109 v_1 := v.Args[1] 2110 if v_1.Op != Op386ADDLconst { 2111 break 2112 } 2113 off2 := v_1.AuxInt 2114 base := v_1.Args[0] 2115 if !(is32Bit(off1 + off2)) { 2116 break 2117 } 2118 v.reset(Op386ADDSDload) 2119 v.AuxInt = off1 + off2 2120 v.Aux = sym 2121 v.AddArg(val) 2122 v.AddArg(base) 2123 v.AddArg(mem) 2124 return true 2125 } 2126 // match: (ADDSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 2127 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2128 // result: (ADDSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 2129 for { 2130 off1 := v.AuxInt 2131 sym1 := v.Aux 2132 mem := v.Args[2] 2133 val := v.Args[0] 2134 v_1 := v.Args[1] 2135 if v_1.Op != Op386LEAL { 2136 break 2137 } 2138 off2 := v_1.AuxInt 2139 sym2 := v_1.Aux 2140 base := v_1.Args[0] 2141 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2142 break 2143 } 2144 v.reset(Op386ADDSDload) 2145 v.AuxInt = off1 + off2 2146 v.Aux = mergeSym(sym1, sym2) 2147 v.AddArg(val) 2148 v.AddArg(base) 2149 v.AddArg(mem) 2150 return true 2151 } 2152 return false 2153 } 2154 func rewriteValue386_Op386ADDSS_0(v *Value) bool { 2155 b := v.Block 2156 config := b.Func.Config 2157 // match: (ADDSS x l:(MOVSSload [off] {sym} ptr mem)) 2158 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 2159 // result: (ADDSSload x [off] {sym} ptr mem) 2160 for { 2161 _ = v.Args[1] 2162 x := v.Args[0] 2163 l := v.Args[1] 2164 if l.Op != Op386MOVSSload { 2165 break 2166 } 2167 off := l.AuxInt 2168 sym := l.Aux 2169 mem := l.Args[1] 2170 ptr := l.Args[0] 2171 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 2172 break 2173 } 2174 v.reset(Op386ADDSSload) 2175 v.AuxInt = off 2176 v.Aux = sym 2177 v.AddArg(x) 2178 v.AddArg(ptr) 2179 v.AddArg(mem) 2180 return true 2181 } 2182 // match: (ADDSS l:(MOVSSload [off] {sym} ptr mem) x) 2183 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 2184 // result: (ADDSSload x [off] {sym} ptr mem) 2185 for { 2186 x := v.Args[1] 2187 l := v.Args[0] 2188 if l.Op != Op386MOVSSload { 2189 break 2190 } 2191 off := l.AuxInt 2192 sym := l.Aux 2193 mem := l.Args[1] 2194 ptr := l.Args[0] 2195 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 2196 break 2197 } 2198 v.reset(Op386ADDSSload) 2199 v.AuxInt = off 2200 v.Aux = sym 2201 v.AddArg(x) 2202 v.AddArg(ptr) 2203 v.AddArg(mem) 2204 return true 2205 } 2206 return false 2207 } 2208 func rewriteValue386_Op386ADDSSload_0(v *Value) bool { 2209 b := v.Block 2210 config := b.Func.Config 2211 // match: (ADDSSload [off1] {sym} val (ADDLconst [off2] base) mem) 2212 // cond: is32Bit(off1+off2) 2213 // result: (ADDSSload [off1+off2] {sym} val base mem) 2214 for { 2215 off1 := v.AuxInt 2216 sym := v.Aux 2217 mem := v.Args[2] 2218 val := v.Args[0] 2219 v_1 := v.Args[1] 2220 if v_1.Op != Op386ADDLconst { 2221 break 2222 } 2223 off2 := v_1.AuxInt 2224 base := v_1.Args[0] 2225 if !(is32Bit(off1 + off2)) { 2226 break 2227 } 2228 v.reset(Op386ADDSSload) 2229 v.AuxInt = off1 + off2 2230 v.Aux = sym 2231 v.AddArg(val) 2232 v.AddArg(base) 2233 v.AddArg(mem) 2234 return true 2235 } 2236 // match: (ADDSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 2237 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2238 // result: (ADDSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 2239 for { 2240 off1 := v.AuxInt 2241 sym1 := v.Aux 2242 mem := v.Args[2] 2243 val := v.Args[0] 2244 v_1 := v.Args[1] 2245 if v_1.Op != Op386LEAL { 2246 break 2247 } 2248 off2 := v_1.AuxInt 2249 sym2 := v_1.Aux 2250 base := v_1.Args[0] 2251 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2252 break 2253 } 2254 v.reset(Op386ADDSSload) 2255 v.AuxInt = off1 + off2 2256 v.Aux = mergeSym(sym1, sym2) 2257 v.AddArg(val) 2258 v.AddArg(base) 2259 v.AddArg(mem) 2260 return true 2261 } 2262 return false 2263 } 2264 func rewriteValue386_Op386ANDL_0(v *Value) bool { 2265 // match: (ANDL x (MOVLconst [c])) 2266 // result: (ANDLconst [c] x) 2267 for { 2268 _ = v.Args[1] 2269 x := v.Args[0] 2270 v_1 := v.Args[1] 2271 if v_1.Op != Op386MOVLconst { 2272 break 2273 } 2274 c := v_1.AuxInt 2275 v.reset(Op386ANDLconst) 2276 v.AuxInt = c 2277 v.AddArg(x) 2278 return true 2279 } 2280 // match: (ANDL (MOVLconst [c]) x) 2281 // result: (ANDLconst [c] x) 2282 for { 2283 x := v.Args[1] 2284 v_0 := v.Args[0] 2285 if v_0.Op != Op386MOVLconst { 2286 break 2287 } 2288 c := v_0.AuxInt 2289 v.reset(Op386ANDLconst) 2290 v.AuxInt = c 2291 v.AddArg(x) 2292 return true 2293 } 2294 // match: (ANDL x l:(MOVLload [off] {sym} ptr mem)) 2295 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 2296 // result: (ANDLload x [off] {sym} ptr mem) 2297 for { 2298 _ = v.Args[1] 2299 x := v.Args[0] 2300 l := v.Args[1] 2301 if l.Op != Op386MOVLload { 2302 break 2303 } 2304 off := l.AuxInt 2305 sym := l.Aux 2306 mem := l.Args[1] 2307 ptr := l.Args[0] 2308 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 2309 break 2310 } 2311 v.reset(Op386ANDLload) 2312 v.AuxInt = off 2313 v.Aux = sym 2314 v.AddArg(x) 2315 v.AddArg(ptr) 2316 v.AddArg(mem) 2317 return true 2318 } 2319 // match: (ANDL l:(MOVLload [off] {sym} ptr mem) x) 2320 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 2321 // result: (ANDLload x [off] {sym} ptr mem) 2322 for { 2323 x := v.Args[1] 2324 l := v.Args[0] 2325 if l.Op != Op386MOVLload { 2326 break 2327 } 2328 off := l.AuxInt 2329 sym := l.Aux 2330 mem := l.Args[1] 2331 ptr := l.Args[0] 2332 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 2333 break 2334 } 2335 v.reset(Op386ANDLload) 2336 v.AuxInt = off 2337 v.Aux = sym 2338 v.AddArg(x) 2339 v.AddArg(ptr) 2340 v.AddArg(mem) 2341 return true 2342 } 2343 // match: (ANDL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 2344 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 2345 // result: (ANDLloadidx4 x [off] {sym} ptr idx mem) 2346 for { 2347 _ = v.Args[1] 2348 x := v.Args[0] 2349 l := v.Args[1] 2350 if l.Op != Op386MOVLloadidx4 { 2351 break 2352 } 2353 off := l.AuxInt 2354 sym := l.Aux 2355 mem := l.Args[2] 2356 ptr := l.Args[0] 2357 idx := l.Args[1] 2358 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 2359 break 2360 } 2361 v.reset(Op386ANDLloadidx4) 2362 v.AuxInt = off 2363 v.Aux = sym 2364 v.AddArg(x) 2365 v.AddArg(ptr) 2366 v.AddArg(idx) 2367 v.AddArg(mem) 2368 return true 2369 } 2370 // match: (ANDL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) 2371 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 2372 // result: (ANDLloadidx4 x [off] {sym} ptr idx mem) 2373 for { 2374 x := v.Args[1] 2375 l := v.Args[0] 2376 if l.Op != Op386MOVLloadidx4 { 2377 break 2378 } 2379 off := l.AuxInt 2380 sym := l.Aux 2381 mem := l.Args[2] 2382 ptr := l.Args[0] 2383 idx := l.Args[1] 2384 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 2385 break 2386 } 2387 v.reset(Op386ANDLloadidx4) 2388 v.AuxInt = off 2389 v.Aux = sym 2390 v.AddArg(x) 2391 v.AddArg(ptr) 2392 v.AddArg(idx) 2393 v.AddArg(mem) 2394 return true 2395 } 2396 // match: (ANDL x x) 2397 // result: x 2398 for { 2399 x := v.Args[1] 2400 if x != v.Args[0] { 2401 break 2402 } 2403 v.reset(OpCopy) 2404 v.Type = x.Type 2405 v.AddArg(x) 2406 return true 2407 } 2408 return false 2409 } 2410 func rewriteValue386_Op386ANDLconst_0(v *Value) bool { 2411 // match: (ANDLconst [c] (ANDLconst [d] x)) 2412 // result: (ANDLconst [c & d] x) 2413 for { 2414 c := v.AuxInt 2415 v_0 := v.Args[0] 2416 if v_0.Op != Op386ANDLconst { 2417 break 2418 } 2419 d := v_0.AuxInt 2420 x := v_0.Args[0] 2421 v.reset(Op386ANDLconst) 2422 v.AuxInt = c & d 2423 v.AddArg(x) 2424 return true 2425 } 2426 // match: (ANDLconst [c] _) 2427 // cond: int32(c)==0 2428 // result: (MOVLconst [0]) 2429 for { 2430 c := v.AuxInt 2431 if !(int32(c) == 0) { 2432 break 2433 } 2434 v.reset(Op386MOVLconst) 2435 v.AuxInt = 0 2436 return true 2437 } 2438 // match: (ANDLconst [c] x) 2439 // cond: int32(c)==-1 2440 // result: x 2441 for { 2442 c := v.AuxInt 2443 x := v.Args[0] 2444 if !(int32(c) == -1) { 2445 break 2446 } 2447 v.reset(OpCopy) 2448 v.Type = x.Type 2449 v.AddArg(x) 2450 return true 2451 } 2452 // match: (ANDLconst [c] (MOVLconst [d])) 2453 // result: (MOVLconst [c&d]) 2454 for { 2455 c := v.AuxInt 2456 v_0 := v.Args[0] 2457 if v_0.Op != Op386MOVLconst { 2458 break 2459 } 2460 d := v_0.AuxInt 2461 v.reset(Op386MOVLconst) 2462 v.AuxInt = c & d 2463 return true 2464 } 2465 return false 2466 } 2467 func rewriteValue386_Op386ANDLconstmodify_0(v *Value) bool { 2468 b := v.Block 2469 config := b.Func.Config 2470 // match: (ANDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) 2471 // cond: ValAndOff(valoff1).canAdd(off2) 2472 // result: (ANDLconstmodify [ValAndOff(valoff1).add(off2)] {sym} base mem) 2473 for { 2474 valoff1 := v.AuxInt 2475 sym := v.Aux 2476 mem := v.Args[1] 2477 v_0 := v.Args[0] 2478 if v_0.Op != Op386ADDLconst { 2479 break 2480 } 2481 off2 := v_0.AuxInt 2482 base := v_0.Args[0] 2483 if !(ValAndOff(valoff1).canAdd(off2)) { 2484 break 2485 } 2486 v.reset(Op386ANDLconstmodify) 2487 v.AuxInt = ValAndOff(valoff1).add(off2) 2488 v.Aux = sym 2489 v.AddArg(base) 2490 v.AddArg(mem) 2491 return true 2492 } 2493 // match: (ANDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) 2494 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2495 // result: (ANDLconstmodify [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base mem) 2496 for { 2497 valoff1 := v.AuxInt 2498 sym1 := v.Aux 2499 mem := v.Args[1] 2500 v_0 := v.Args[0] 2501 if v_0.Op != Op386LEAL { 2502 break 2503 } 2504 off2 := v_0.AuxInt 2505 sym2 := v_0.Aux 2506 base := v_0.Args[0] 2507 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2508 break 2509 } 2510 v.reset(Op386ANDLconstmodify) 2511 v.AuxInt = ValAndOff(valoff1).add(off2) 2512 v.Aux = mergeSym(sym1, sym2) 2513 v.AddArg(base) 2514 v.AddArg(mem) 2515 return true 2516 } 2517 return false 2518 } 2519 func rewriteValue386_Op386ANDLconstmodifyidx4_0(v *Value) bool { 2520 b := v.Block 2521 config := b.Func.Config 2522 // match: (ANDLconstmodifyidx4 [valoff1] {sym} (ADDLconst [off2] base) idx mem) 2523 // cond: ValAndOff(valoff1).canAdd(off2) 2524 // result: (ANDLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {sym} base idx mem) 2525 for { 2526 valoff1 := v.AuxInt 2527 sym := v.Aux 2528 mem := v.Args[2] 2529 v_0 := v.Args[0] 2530 if v_0.Op != Op386ADDLconst { 2531 break 2532 } 2533 off2 := v_0.AuxInt 2534 base := v_0.Args[0] 2535 idx := v.Args[1] 2536 if !(ValAndOff(valoff1).canAdd(off2)) { 2537 break 2538 } 2539 v.reset(Op386ANDLconstmodifyidx4) 2540 v.AuxInt = ValAndOff(valoff1).add(off2) 2541 v.Aux = sym 2542 v.AddArg(base) 2543 v.AddArg(idx) 2544 v.AddArg(mem) 2545 return true 2546 } 2547 // match: (ANDLconstmodifyidx4 [valoff1] {sym} base (ADDLconst [off2] idx) mem) 2548 // cond: ValAndOff(valoff1).canAdd(off2*4) 2549 // result: (ANDLconstmodifyidx4 [ValAndOff(valoff1).add(off2*4)] {sym} base idx mem) 2550 for { 2551 valoff1 := v.AuxInt 2552 sym := v.Aux 2553 mem := v.Args[2] 2554 base := v.Args[0] 2555 v_1 := v.Args[1] 2556 if v_1.Op != Op386ADDLconst { 2557 break 2558 } 2559 off2 := v_1.AuxInt 2560 idx := v_1.Args[0] 2561 if !(ValAndOff(valoff1).canAdd(off2 * 4)) { 2562 break 2563 } 2564 v.reset(Op386ANDLconstmodifyidx4) 2565 v.AuxInt = ValAndOff(valoff1).add(off2 * 4) 2566 v.Aux = sym 2567 v.AddArg(base) 2568 v.AddArg(idx) 2569 v.AddArg(mem) 2570 return true 2571 } 2572 // match: (ANDLconstmodifyidx4 [valoff1] {sym1} (LEAL [off2] {sym2} base) idx mem) 2573 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2574 // result: (ANDLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base idx mem) 2575 for { 2576 valoff1 := v.AuxInt 2577 sym1 := v.Aux 2578 mem := v.Args[2] 2579 v_0 := v.Args[0] 2580 if v_0.Op != Op386LEAL { 2581 break 2582 } 2583 off2 := v_0.AuxInt 2584 sym2 := v_0.Aux 2585 base := v_0.Args[0] 2586 idx := v.Args[1] 2587 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2588 break 2589 } 2590 v.reset(Op386ANDLconstmodifyidx4) 2591 v.AuxInt = ValAndOff(valoff1).add(off2) 2592 v.Aux = mergeSym(sym1, sym2) 2593 v.AddArg(base) 2594 v.AddArg(idx) 2595 v.AddArg(mem) 2596 return true 2597 } 2598 return false 2599 } 2600 func rewriteValue386_Op386ANDLload_0(v *Value) bool { 2601 b := v.Block 2602 config := b.Func.Config 2603 // match: (ANDLload [off1] {sym} val (ADDLconst [off2] base) mem) 2604 // cond: is32Bit(off1+off2) 2605 // result: (ANDLload [off1+off2] {sym} val base mem) 2606 for { 2607 off1 := v.AuxInt 2608 sym := v.Aux 2609 mem := v.Args[2] 2610 val := v.Args[0] 2611 v_1 := v.Args[1] 2612 if v_1.Op != Op386ADDLconst { 2613 break 2614 } 2615 off2 := v_1.AuxInt 2616 base := v_1.Args[0] 2617 if !(is32Bit(off1 + off2)) { 2618 break 2619 } 2620 v.reset(Op386ANDLload) 2621 v.AuxInt = off1 + off2 2622 v.Aux = sym 2623 v.AddArg(val) 2624 v.AddArg(base) 2625 v.AddArg(mem) 2626 return true 2627 } 2628 // match: (ANDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 2629 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2630 // result: (ANDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 2631 for { 2632 off1 := v.AuxInt 2633 sym1 := v.Aux 2634 mem := v.Args[2] 2635 val := v.Args[0] 2636 v_1 := v.Args[1] 2637 if v_1.Op != Op386LEAL { 2638 break 2639 } 2640 off2 := v_1.AuxInt 2641 sym2 := v_1.Aux 2642 base := v_1.Args[0] 2643 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2644 break 2645 } 2646 v.reset(Op386ANDLload) 2647 v.AuxInt = off1 + off2 2648 v.Aux = mergeSym(sym1, sym2) 2649 v.AddArg(val) 2650 v.AddArg(base) 2651 v.AddArg(mem) 2652 return true 2653 } 2654 // match: (ANDLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 2655 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 2656 // result: (ANDLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 2657 for { 2658 off1 := v.AuxInt 2659 sym1 := v.Aux 2660 mem := v.Args[2] 2661 val := v.Args[0] 2662 v_1 := v.Args[1] 2663 if v_1.Op != Op386LEAL4 { 2664 break 2665 } 2666 off2 := v_1.AuxInt 2667 sym2 := v_1.Aux 2668 idx := v_1.Args[1] 2669 ptr := v_1.Args[0] 2670 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 2671 break 2672 } 2673 v.reset(Op386ANDLloadidx4) 2674 v.AuxInt = off1 + off2 2675 v.Aux = mergeSym(sym1, sym2) 2676 v.AddArg(val) 2677 v.AddArg(ptr) 2678 v.AddArg(idx) 2679 v.AddArg(mem) 2680 return true 2681 } 2682 return false 2683 } 2684 func rewriteValue386_Op386ANDLloadidx4_0(v *Value) bool { 2685 b := v.Block 2686 config := b.Func.Config 2687 // match: (ANDLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 2688 // cond: is32Bit(off1+off2) 2689 // result: (ANDLloadidx4 [off1+off2] {sym} val base idx mem) 2690 for { 2691 off1 := v.AuxInt 2692 sym := v.Aux 2693 mem := v.Args[3] 2694 val := v.Args[0] 2695 v_1 := v.Args[1] 2696 if v_1.Op != Op386ADDLconst { 2697 break 2698 } 2699 off2 := v_1.AuxInt 2700 base := v_1.Args[0] 2701 idx := v.Args[2] 2702 if !(is32Bit(off1 + off2)) { 2703 break 2704 } 2705 v.reset(Op386ANDLloadidx4) 2706 v.AuxInt = off1 + off2 2707 v.Aux = sym 2708 v.AddArg(val) 2709 v.AddArg(base) 2710 v.AddArg(idx) 2711 v.AddArg(mem) 2712 return true 2713 } 2714 // match: (ANDLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 2715 // cond: is32Bit(off1+off2*4) 2716 // result: (ANDLloadidx4 [off1+off2*4] {sym} val base idx mem) 2717 for { 2718 off1 := v.AuxInt 2719 sym := v.Aux 2720 mem := v.Args[3] 2721 val := v.Args[0] 2722 base := v.Args[1] 2723 v_2 := v.Args[2] 2724 if v_2.Op != Op386ADDLconst { 2725 break 2726 } 2727 off2 := v_2.AuxInt 2728 idx := v_2.Args[0] 2729 if !(is32Bit(off1 + off2*4)) { 2730 break 2731 } 2732 v.reset(Op386ANDLloadidx4) 2733 v.AuxInt = off1 + off2*4 2734 v.Aux = sym 2735 v.AddArg(val) 2736 v.AddArg(base) 2737 v.AddArg(idx) 2738 v.AddArg(mem) 2739 return true 2740 } 2741 // match: (ANDLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 2742 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2743 // result: (ANDLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 2744 for { 2745 off1 := v.AuxInt 2746 sym1 := v.Aux 2747 mem := v.Args[3] 2748 val := v.Args[0] 2749 v_1 := v.Args[1] 2750 if v_1.Op != Op386LEAL { 2751 break 2752 } 2753 off2 := v_1.AuxInt 2754 sym2 := v_1.Aux 2755 base := v_1.Args[0] 2756 idx := v.Args[2] 2757 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2758 break 2759 } 2760 v.reset(Op386ANDLloadidx4) 2761 v.AuxInt = off1 + off2 2762 v.Aux = mergeSym(sym1, sym2) 2763 v.AddArg(val) 2764 v.AddArg(base) 2765 v.AddArg(idx) 2766 v.AddArg(mem) 2767 return true 2768 } 2769 return false 2770 } 2771 func rewriteValue386_Op386ANDLmodify_0(v *Value) bool { 2772 b := v.Block 2773 config := b.Func.Config 2774 // match: (ANDLmodify [off1] {sym} (ADDLconst [off2] base) val mem) 2775 // cond: is32Bit(off1+off2) 2776 // result: (ANDLmodify [off1+off2] {sym} base val mem) 2777 for { 2778 off1 := v.AuxInt 2779 sym := v.Aux 2780 mem := v.Args[2] 2781 v_0 := v.Args[0] 2782 if v_0.Op != Op386ADDLconst { 2783 break 2784 } 2785 off2 := v_0.AuxInt 2786 base := v_0.Args[0] 2787 val := v.Args[1] 2788 if !(is32Bit(off1 + off2)) { 2789 break 2790 } 2791 v.reset(Op386ANDLmodify) 2792 v.AuxInt = off1 + off2 2793 v.Aux = sym 2794 v.AddArg(base) 2795 v.AddArg(val) 2796 v.AddArg(mem) 2797 return true 2798 } 2799 // match: (ANDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 2800 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2801 // result: (ANDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) 2802 for { 2803 off1 := v.AuxInt 2804 sym1 := v.Aux 2805 mem := v.Args[2] 2806 v_0 := v.Args[0] 2807 if v_0.Op != Op386LEAL { 2808 break 2809 } 2810 off2 := v_0.AuxInt 2811 sym2 := v_0.Aux 2812 base := v_0.Args[0] 2813 val := v.Args[1] 2814 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2815 break 2816 } 2817 v.reset(Op386ANDLmodify) 2818 v.AuxInt = off1 + off2 2819 v.Aux = mergeSym(sym1, sym2) 2820 v.AddArg(base) 2821 v.AddArg(val) 2822 v.AddArg(mem) 2823 return true 2824 } 2825 return false 2826 } 2827 func rewriteValue386_Op386ANDLmodifyidx4_0(v *Value) bool { 2828 b := v.Block 2829 config := b.Func.Config 2830 // match: (ANDLmodifyidx4 [off1] {sym} (ADDLconst [off2] base) idx val mem) 2831 // cond: is32Bit(off1+off2) 2832 // result: (ANDLmodifyidx4 [off1+off2] {sym} base idx val mem) 2833 for { 2834 off1 := v.AuxInt 2835 sym := v.Aux 2836 mem := v.Args[3] 2837 v_0 := v.Args[0] 2838 if v_0.Op != Op386ADDLconst { 2839 break 2840 } 2841 off2 := v_0.AuxInt 2842 base := v_0.Args[0] 2843 idx := v.Args[1] 2844 val := v.Args[2] 2845 if !(is32Bit(off1 + off2)) { 2846 break 2847 } 2848 v.reset(Op386ANDLmodifyidx4) 2849 v.AuxInt = off1 + off2 2850 v.Aux = sym 2851 v.AddArg(base) 2852 v.AddArg(idx) 2853 v.AddArg(val) 2854 v.AddArg(mem) 2855 return true 2856 } 2857 // match: (ANDLmodifyidx4 [off1] {sym} base (ADDLconst [off2] idx) val mem) 2858 // cond: is32Bit(off1+off2*4) 2859 // result: (ANDLmodifyidx4 [off1+off2*4] {sym} base idx val mem) 2860 for { 2861 off1 := v.AuxInt 2862 sym := v.Aux 2863 mem := v.Args[3] 2864 base := v.Args[0] 2865 v_1 := v.Args[1] 2866 if v_1.Op != Op386ADDLconst { 2867 break 2868 } 2869 off2 := v_1.AuxInt 2870 idx := v_1.Args[0] 2871 val := v.Args[2] 2872 if !(is32Bit(off1 + off2*4)) { 2873 break 2874 } 2875 v.reset(Op386ANDLmodifyidx4) 2876 v.AuxInt = off1 + off2*4 2877 v.Aux = sym 2878 v.AddArg(base) 2879 v.AddArg(idx) 2880 v.AddArg(val) 2881 v.AddArg(mem) 2882 return true 2883 } 2884 // match: (ANDLmodifyidx4 [off1] {sym1} (LEAL [off2] {sym2} base) idx val mem) 2885 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 2886 // result: (ANDLmodifyidx4 [off1+off2] {mergeSym(sym1,sym2)} base idx val mem) 2887 for { 2888 off1 := v.AuxInt 2889 sym1 := v.Aux 2890 mem := v.Args[3] 2891 v_0 := v.Args[0] 2892 if v_0.Op != Op386LEAL { 2893 break 2894 } 2895 off2 := v_0.AuxInt 2896 sym2 := v_0.Aux 2897 base := v_0.Args[0] 2898 idx := v.Args[1] 2899 val := v.Args[2] 2900 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 2901 break 2902 } 2903 v.reset(Op386ANDLmodifyidx4) 2904 v.AuxInt = off1 + off2 2905 v.Aux = mergeSym(sym1, sym2) 2906 v.AddArg(base) 2907 v.AddArg(idx) 2908 v.AddArg(val) 2909 v.AddArg(mem) 2910 return true 2911 } 2912 // match: (ANDLmodifyidx4 [off] {sym} ptr idx (MOVLconst [c]) mem) 2913 // cond: validValAndOff(c,off) 2914 // result: (ANDLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 2915 for { 2916 off := v.AuxInt 2917 sym := v.Aux 2918 mem := v.Args[3] 2919 ptr := v.Args[0] 2920 idx := v.Args[1] 2921 v_2 := v.Args[2] 2922 if v_2.Op != Op386MOVLconst { 2923 break 2924 } 2925 c := v_2.AuxInt 2926 if !(validValAndOff(c, off)) { 2927 break 2928 } 2929 v.reset(Op386ANDLconstmodifyidx4) 2930 v.AuxInt = makeValAndOff(c, off) 2931 v.Aux = sym 2932 v.AddArg(ptr) 2933 v.AddArg(idx) 2934 v.AddArg(mem) 2935 return true 2936 } 2937 return false 2938 } 2939 func rewriteValue386_Op386CMPB_0(v *Value) bool { 2940 b := v.Block 2941 // match: (CMPB x (MOVLconst [c])) 2942 // result: (CMPBconst x [int64(int8(c))]) 2943 for { 2944 _ = v.Args[1] 2945 x := v.Args[0] 2946 v_1 := v.Args[1] 2947 if v_1.Op != Op386MOVLconst { 2948 break 2949 } 2950 c := v_1.AuxInt 2951 v.reset(Op386CMPBconst) 2952 v.AuxInt = int64(int8(c)) 2953 v.AddArg(x) 2954 return true 2955 } 2956 // match: (CMPB (MOVLconst [c]) x) 2957 // result: (InvertFlags (CMPBconst x [int64(int8(c))])) 2958 for { 2959 x := v.Args[1] 2960 v_0 := v.Args[0] 2961 if v_0.Op != Op386MOVLconst { 2962 break 2963 } 2964 c := v_0.AuxInt 2965 v.reset(Op386InvertFlags) 2966 v0 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 2967 v0.AuxInt = int64(int8(c)) 2968 v0.AddArg(x) 2969 v.AddArg(v0) 2970 return true 2971 } 2972 // match: (CMPB l:(MOVBload {sym} [off] ptr mem) x) 2973 // cond: canMergeLoad(v, l) && clobber(l) 2974 // result: (CMPBload {sym} [off] ptr x mem) 2975 for { 2976 x := v.Args[1] 2977 l := v.Args[0] 2978 if l.Op != Op386MOVBload { 2979 break 2980 } 2981 off := l.AuxInt 2982 sym := l.Aux 2983 mem := l.Args[1] 2984 ptr := l.Args[0] 2985 if !(canMergeLoad(v, l) && clobber(l)) { 2986 break 2987 } 2988 v.reset(Op386CMPBload) 2989 v.AuxInt = off 2990 v.Aux = sym 2991 v.AddArg(ptr) 2992 v.AddArg(x) 2993 v.AddArg(mem) 2994 return true 2995 } 2996 // match: (CMPB x l:(MOVBload {sym} [off] ptr mem)) 2997 // cond: canMergeLoad(v, l) && clobber(l) 2998 // result: (InvertFlags (CMPBload {sym} [off] ptr x mem)) 2999 for { 3000 _ = v.Args[1] 3001 x := v.Args[0] 3002 l := v.Args[1] 3003 if l.Op != Op386MOVBload { 3004 break 3005 } 3006 off := l.AuxInt 3007 sym := l.Aux 3008 mem := l.Args[1] 3009 ptr := l.Args[0] 3010 if !(canMergeLoad(v, l) && clobber(l)) { 3011 break 3012 } 3013 v.reset(Op386InvertFlags) 3014 v0 := b.NewValue0(l.Pos, Op386CMPBload, types.TypeFlags) 3015 v0.AuxInt = off 3016 v0.Aux = sym 3017 v0.AddArg(ptr) 3018 v0.AddArg(x) 3019 v0.AddArg(mem) 3020 v.AddArg(v0) 3021 return true 3022 } 3023 return false 3024 } 3025 func rewriteValue386_Op386CMPBconst_0(v *Value) bool { 3026 b := v.Block 3027 // match: (CMPBconst (MOVLconst [x]) [y]) 3028 // cond: int8(x)==int8(y) 3029 // result: (FlagEQ) 3030 for { 3031 y := v.AuxInt 3032 v_0 := v.Args[0] 3033 if v_0.Op != Op386MOVLconst { 3034 break 3035 } 3036 x := v_0.AuxInt 3037 if !(int8(x) == int8(y)) { 3038 break 3039 } 3040 v.reset(Op386FlagEQ) 3041 return true 3042 } 3043 // match: (CMPBconst (MOVLconst [x]) [y]) 3044 // cond: int8(x)<int8(y) && uint8(x)<uint8(y) 3045 // result: (FlagLT_ULT) 3046 for { 3047 y := v.AuxInt 3048 v_0 := v.Args[0] 3049 if v_0.Op != Op386MOVLconst { 3050 break 3051 } 3052 x := v_0.AuxInt 3053 if !(int8(x) < int8(y) && uint8(x) < uint8(y)) { 3054 break 3055 } 3056 v.reset(Op386FlagLT_ULT) 3057 return true 3058 } 3059 // match: (CMPBconst (MOVLconst [x]) [y]) 3060 // cond: int8(x)<int8(y) && uint8(x)>uint8(y) 3061 // result: (FlagLT_UGT) 3062 for { 3063 y := v.AuxInt 3064 v_0 := v.Args[0] 3065 if v_0.Op != Op386MOVLconst { 3066 break 3067 } 3068 x := v_0.AuxInt 3069 if !(int8(x) < int8(y) && uint8(x) > uint8(y)) { 3070 break 3071 } 3072 v.reset(Op386FlagLT_UGT) 3073 return true 3074 } 3075 // match: (CMPBconst (MOVLconst [x]) [y]) 3076 // cond: int8(x)>int8(y) && uint8(x)<uint8(y) 3077 // result: (FlagGT_ULT) 3078 for { 3079 y := v.AuxInt 3080 v_0 := v.Args[0] 3081 if v_0.Op != Op386MOVLconst { 3082 break 3083 } 3084 x := v_0.AuxInt 3085 if !(int8(x) > int8(y) && uint8(x) < uint8(y)) { 3086 break 3087 } 3088 v.reset(Op386FlagGT_ULT) 3089 return true 3090 } 3091 // match: (CMPBconst (MOVLconst [x]) [y]) 3092 // cond: int8(x)>int8(y) && uint8(x)>uint8(y) 3093 // result: (FlagGT_UGT) 3094 for { 3095 y := v.AuxInt 3096 v_0 := v.Args[0] 3097 if v_0.Op != Op386MOVLconst { 3098 break 3099 } 3100 x := v_0.AuxInt 3101 if !(int8(x) > int8(y) && uint8(x) > uint8(y)) { 3102 break 3103 } 3104 v.reset(Op386FlagGT_UGT) 3105 return true 3106 } 3107 // match: (CMPBconst (ANDLconst _ [m]) [n]) 3108 // cond: 0 <= int8(m) && int8(m) < int8(n) 3109 // result: (FlagLT_ULT) 3110 for { 3111 n := v.AuxInt 3112 v_0 := v.Args[0] 3113 if v_0.Op != Op386ANDLconst { 3114 break 3115 } 3116 m := v_0.AuxInt 3117 if !(0 <= int8(m) && int8(m) < int8(n)) { 3118 break 3119 } 3120 v.reset(Op386FlagLT_ULT) 3121 return true 3122 } 3123 // match: (CMPBconst l:(ANDL x y) [0]) 3124 // cond: l.Uses==1 3125 // result: (TESTB x y) 3126 for { 3127 if v.AuxInt != 0 { 3128 break 3129 } 3130 l := v.Args[0] 3131 if l.Op != Op386ANDL { 3132 break 3133 } 3134 y := l.Args[1] 3135 x := l.Args[0] 3136 if !(l.Uses == 1) { 3137 break 3138 } 3139 v.reset(Op386TESTB) 3140 v.AddArg(x) 3141 v.AddArg(y) 3142 return true 3143 } 3144 // match: (CMPBconst l:(ANDLconst [c] x) [0]) 3145 // cond: l.Uses==1 3146 // result: (TESTBconst [int64(int8(c))] x) 3147 for { 3148 if v.AuxInt != 0 { 3149 break 3150 } 3151 l := v.Args[0] 3152 if l.Op != Op386ANDLconst { 3153 break 3154 } 3155 c := l.AuxInt 3156 x := l.Args[0] 3157 if !(l.Uses == 1) { 3158 break 3159 } 3160 v.reset(Op386TESTBconst) 3161 v.AuxInt = int64(int8(c)) 3162 v.AddArg(x) 3163 return true 3164 } 3165 // match: (CMPBconst x [0]) 3166 // result: (TESTB x x) 3167 for { 3168 if v.AuxInt != 0 { 3169 break 3170 } 3171 x := v.Args[0] 3172 v.reset(Op386TESTB) 3173 v.AddArg(x) 3174 v.AddArg(x) 3175 return true 3176 } 3177 // match: (CMPBconst l:(MOVBload {sym} [off] ptr mem) [c]) 3178 // cond: l.Uses == 1 && validValAndOff(c, off) && clobber(l) 3179 // result: @l.Block (CMPBconstload {sym} [makeValAndOff(c,off)] ptr mem) 3180 for { 3181 c := v.AuxInt 3182 l := v.Args[0] 3183 if l.Op != Op386MOVBload { 3184 break 3185 } 3186 off := l.AuxInt 3187 sym := l.Aux 3188 mem := l.Args[1] 3189 ptr := l.Args[0] 3190 if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) { 3191 break 3192 } 3193 b = l.Block 3194 v0 := b.NewValue0(l.Pos, Op386CMPBconstload, types.TypeFlags) 3195 v.reset(OpCopy) 3196 v.AddArg(v0) 3197 v0.AuxInt = makeValAndOff(c, off) 3198 v0.Aux = sym 3199 v0.AddArg(ptr) 3200 v0.AddArg(mem) 3201 return true 3202 } 3203 return false 3204 } 3205 func rewriteValue386_Op386CMPBload_0(v *Value) bool { 3206 // match: (CMPBload {sym} [off] ptr (MOVLconst [c]) mem) 3207 // cond: validValAndOff(int64(int8(c)),off) 3208 // result: (CMPBconstload {sym} [makeValAndOff(int64(int8(c)),off)] ptr mem) 3209 for { 3210 off := v.AuxInt 3211 sym := v.Aux 3212 mem := v.Args[2] 3213 ptr := v.Args[0] 3214 v_1 := v.Args[1] 3215 if v_1.Op != Op386MOVLconst { 3216 break 3217 } 3218 c := v_1.AuxInt 3219 if !(validValAndOff(int64(int8(c)), off)) { 3220 break 3221 } 3222 v.reset(Op386CMPBconstload) 3223 v.AuxInt = makeValAndOff(int64(int8(c)), off) 3224 v.Aux = sym 3225 v.AddArg(ptr) 3226 v.AddArg(mem) 3227 return true 3228 } 3229 return false 3230 } 3231 func rewriteValue386_Op386CMPL_0(v *Value) bool { 3232 b := v.Block 3233 // match: (CMPL x (MOVLconst [c])) 3234 // result: (CMPLconst x [c]) 3235 for { 3236 _ = v.Args[1] 3237 x := v.Args[0] 3238 v_1 := v.Args[1] 3239 if v_1.Op != Op386MOVLconst { 3240 break 3241 } 3242 c := v_1.AuxInt 3243 v.reset(Op386CMPLconst) 3244 v.AuxInt = c 3245 v.AddArg(x) 3246 return true 3247 } 3248 // match: (CMPL (MOVLconst [c]) x) 3249 // result: (InvertFlags (CMPLconst x [c])) 3250 for { 3251 x := v.Args[1] 3252 v_0 := v.Args[0] 3253 if v_0.Op != Op386MOVLconst { 3254 break 3255 } 3256 c := v_0.AuxInt 3257 v.reset(Op386InvertFlags) 3258 v0 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 3259 v0.AuxInt = c 3260 v0.AddArg(x) 3261 v.AddArg(v0) 3262 return true 3263 } 3264 // match: (CMPL l:(MOVLload {sym} [off] ptr mem) x) 3265 // cond: canMergeLoad(v, l) && clobber(l) 3266 // result: (CMPLload {sym} [off] ptr x mem) 3267 for { 3268 x := v.Args[1] 3269 l := v.Args[0] 3270 if l.Op != Op386MOVLload { 3271 break 3272 } 3273 off := l.AuxInt 3274 sym := l.Aux 3275 mem := l.Args[1] 3276 ptr := l.Args[0] 3277 if !(canMergeLoad(v, l) && clobber(l)) { 3278 break 3279 } 3280 v.reset(Op386CMPLload) 3281 v.AuxInt = off 3282 v.Aux = sym 3283 v.AddArg(ptr) 3284 v.AddArg(x) 3285 v.AddArg(mem) 3286 return true 3287 } 3288 // match: (CMPL x l:(MOVLload {sym} [off] ptr mem)) 3289 // cond: canMergeLoad(v, l) && clobber(l) 3290 // result: (InvertFlags (CMPLload {sym} [off] ptr x mem)) 3291 for { 3292 _ = v.Args[1] 3293 x := v.Args[0] 3294 l := v.Args[1] 3295 if l.Op != Op386MOVLload { 3296 break 3297 } 3298 off := l.AuxInt 3299 sym := l.Aux 3300 mem := l.Args[1] 3301 ptr := l.Args[0] 3302 if !(canMergeLoad(v, l) && clobber(l)) { 3303 break 3304 } 3305 v.reset(Op386InvertFlags) 3306 v0 := b.NewValue0(l.Pos, Op386CMPLload, types.TypeFlags) 3307 v0.AuxInt = off 3308 v0.Aux = sym 3309 v0.AddArg(ptr) 3310 v0.AddArg(x) 3311 v0.AddArg(mem) 3312 v.AddArg(v0) 3313 return true 3314 } 3315 return false 3316 } 3317 func rewriteValue386_Op386CMPLconst_0(v *Value) bool { 3318 // match: (CMPLconst (MOVLconst [x]) [y]) 3319 // cond: int32(x)==int32(y) 3320 // result: (FlagEQ) 3321 for { 3322 y := v.AuxInt 3323 v_0 := v.Args[0] 3324 if v_0.Op != Op386MOVLconst { 3325 break 3326 } 3327 x := v_0.AuxInt 3328 if !(int32(x) == int32(y)) { 3329 break 3330 } 3331 v.reset(Op386FlagEQ) 3332 return true 3333 } 3334 // match: (CMPLconst (MOVLconst [x]) [y]) 3335 // cond: int32(x)<int32(y) && uint32(x)<uint32(y) 3336 // result: (FlagLT_ULT) 3337 for { 3338 y := v.AuxInt 3339 v_0 := v.Args[0] 3340 if v_0.Op != Op386MOVLconst { 3341 break 3342 } 3343 x := v_0.AuxInt 3344 if !(int32(x) < int32(y) && uint32(x) < uint32(y)) { 3345 break 3346 } 3347 v.reset(Op386FlagLT_ULT) 3348 return true 3349 } 3350 // match: (CMPLconst (MOVLconst [x]) [y]) 3351 // cond: int32(x)<int32(y) && uint32(x)>uint32(y) 3352 // result: (FlagLT_UGT) 3353 for { 3354 y := v.AuxInt 3355 v_0 := v.Args[0] 3356 if v_0.Op != Op386MOVLconst { 3357 break 3358 } 3359 x := v_0.AuxInt 3360 if !(int32(x) < int32(y) && uint32(x) > uint32(y)) { 3361 break 3362 } 3363 v.reset(Op386FlagLT_UGT) 3364 return true 3365 } 3366 // match: (CMPLconst (MOVLconst [x]) [y]) 3367 // cond: int32(x)>int32(y) && uint32(x)<uint32(y) 3368 // result: (FlagGT_ULT) 3369 for { 3370 y := v.AuxInt 3371 v_0 := v.Args[0] 3372 if v_0.Op != Op386MOVLconst { 3373 break 3374 } 3375 x := v_0.AuxInt 3376 if !(int32(x) > int32(y) && uint32(x) < uint32(y)) { 3377 break 3378 } 3379 v.reset(Op386FlagGT_ULT) 3380 return true 3381 } 3382 // match: (CMPLconst (MOVLconst [x]) [y]) 3383 // cond: int32(x)>int32(y) && uint32(x)>uint32(y) 3384 // result: (FlagGT_UGT) 3385 for { 3386 y := v.AuxInt 3387 v_0 := v.Args[0] 3388 if v_0.Op != Op386MOVLconst { 3389 break 3390 } 3391 x := v_0.AuxInt 3392 if !(int32(x) > int32(y) && uint32(x) > uint32(y)) { 3393 break 3394 } 3395 v.reset(Op386FlagGT_UGT) 3396 return true 3397 } 3398 // match: (CMPLconst (SHRLconst _ [c]) [n]) 3399 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 3400 // result: (FlagLT_ULT) 3401 for { 3402 n := v.AuxInt 3403 v_0 := v.Args[0] 3404 if v_0.Op != Op386SHRLconst { 3405 break 3406 } 3407 c := v_0.AuxInt 3408 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 3409 break 3410 } 3411 v.reset(Op386FlagLT_ULT) 3412 return true 3413 } 3414 // match: (CMPLconst (ANDLconst _ [m]) [n]) 3415 // cond: 0 <= int32(m) && int32(m) < int32(n) 3416 // result: (FlagLT_ULT) 3417 for { 3418 n := v.AuxInt 3419 v_0 := v.Args[0] 3420 if v_0.Op != Op386ANDLconst { 3421 break 3422 } 3423 m := v_0.AuxInt 3424 if !(0 <= int32(m) && int32(m) < int32(n)) { 3425 break 3426 } 3427 v.reset(Op386FlagLT_ULT) 3428 return true 3429 } 3430 // match: (CMPLconst l:(ANDL x y) [0]) 3431 // cond: l.Uses==1 3432 // result: (TESTL x y) 3433 for { 3434 if v.AuxInt != 0 { 3435 break 3436 } 3437 l := v.Args[0] 3438 if l.Op != Op386ANDL { 3439 break 3440 } 3441 y := l.Args[1] 3442 x := l.Args[0] 3443 if !(l.Uses == 1) { 3444 break 3445 } 3446 v.reset(Op386TESTL) 3447 v.AddArg(x) 3448 v.AddArg(y) 3449 return true 3450 } 3451 // match: (CMPLconst l:(ANDLconst [c] x) [0]) 3452 // cond: l.Uses==1 3453 // result: (TESTLconst [c] x) 3454 for { 3455 if v.AuxInt != 0 { 3456 break 3457 } 3458 l := v.Args[0] 3459 if l.Op != Op386ANDLconst { 3460 break 3461 } 3462 c := l.AuxInt 3463 x := l.Args[0] 3464 if !(l.Uses == 1) { 3465 break 3466 } 3467 v.reset(Op386TESTLconst) 3468 v.AuxInt = c 3469 v.AddArg(x) 3470 return true 3471 } 3472 // match: (CMPLconst x [0]) 3473 // result: (TESTL x x) 3474 for { 3475 if v.AuxInt != 0 { 3476 break 3477 } 3478 x := v.Args[0] 3479 v.reset(Op386TESTL) 3480 v.AddArg(x) 3481 v.AddArg(x) 3482 return true 3483 } 3484 return false 3485 } 3486 func rewriteValue386_Op386CMPLconst_10(v *Value) bool { 3487 b := v.Block 3488 // match: (CMPLconst l:(MOVLload {sym} [off] ptr mem) [c]) 3489 // cond: l.Uses == 1 && validValAndOff(c, off) && clobber(l) 3490 // result: @l.Block (CMPLconstload {sym} [makeValAndOff(c,off)] ptr mem) 3491 for { 3492 c := v.AuxInt 3493 l := v.Args[0] 3494 if l.Op != Op386MOVLload { 3495 break 3496 } 3497 off := l.AuxInt 3498 sym := l.Aux 3499 mem := l.Args[1] 3500 ptr := l.Args[0] 3501 if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) { 3502 break 3503 } 3504 b = l.Block 3505 v0 := b.NewValue0(l.Pos, Op386CMPLconstload, types.TypeFlags) 3506 v.reset(OpCopy) 3507 v.AddArg(v0) 3508 v0.AuxInt = makeValAndOff(c, off) 3509 v0.Aux = sym 3510 v0.AddArg(ptr) 3511 v0.AddArg(mem) 3512 return true 3513 } 3514 return false 3515 } 3516 func rewriteValue386_Op386CMPLload_0(v *Value) bool { 3517 // match: (CMPLload {sym} [off] ptr (MOVLconst [c]) mem) 3518 // cond: validValAndOff(int64(int32(c)),off) 3519 // result: (CMPLconstload {sym} [makeValAndOff(int64(int32(c)),off)] ptr mem) 3520 for { 3521 off := v.AuxInt 3522 sym := v.Aux 3523 mem := v.Args[2] 3524 ptr := v.Args[0] 3525 v_1 := v.Args[1] 3526 if v_1.Op != Op386MOVLconst { 3527 break 3528 } 3529 c := v_1.AuxInt 3530 if !(validValAndOff(int64(int32(c)), off)) { 3531 break 3532 } 3533 v.reset(Op386CMPLconstload) 3534 v.AuxInt = makeValAndOff(int64(int32(c)), off) 3535 v.Aux = sym 3536 v.AddArg(ptr) 3537 v.AddArg(mem) 3538 return true 3539 } 3540 return false 3541 } 3542 func rewriteValue386_Op386CMPW_0(v *Value) bool { 3543 b := v.Block 3544 // match: (CMPW x (MOVLconst [c])) 3545 // result: (CMPWconst x [int64(int16(c))]) 3546 for { 3547 _ = v.Args[1] 3548 x := v.Args[0] 3549 v_1 := v.Args[1] 3550 if v_1.Op != Op386MOVLconst { 3551 break 3552 } 3553 c := v_1.AuxInt 3554 v.reset(Op386CMPWconst) 3555 v.AuxInt = int64(int16(c)) 3556 v.AddArg(x) 3557 return true 3558 } 3559 // match: (CMPW (MOVLconst [c]) x) 3560 // result: (InvertFlags (CMPWconst x [int64(int16(c))])) 3561 for { 3562 x := v.Args[1] 3563 v_0 := v.Args[0] 3564 if v_0.Op != Op386MOVLconst { 3565 break 3566 } 3567 c := v_0.AuxInt 3568 v.reset(Op386InvertFlags) 3569 v0 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 3570 v0.AuxInt = int64(int16(c)) 3571 v0.AddArg(x) 3572 v.AddArg(v0) 3573 return true 3574 } 3575 // match: (CMPW l:(MOVWload {sym} [off] ptr mem) x) 3576 // cond: canMergeLoad(v, l) && clobber(l) 3577 // result: (CMPWload {sym} [off] ptr x mem) 3578 for { 3579 x := v.Args[1] 3580 l := v.Args[0] 3581 if l.Op != Op386MOVWload { 3582 break 3583 } 3584 off := l.AuxInt 3585 sym := l.Aux 3586 mem := l.Args[1] 3587 ptr := l.Args[0] 3588 if !(canMergeLoad(v, l) && clobber(l)) { 3589 break 3590 } 3591 v.reset(Op386CMPWload) 3592 v.AuxInt = off 3593 v.Aux = sym 3594 v.AddArg(ptr) 3595 v.AddArg(x) 3596 v.AddArg(mem) 3597 return true 3598 } 3599 // match: (CMPW x l:(MOVWload {sym} [off] ptr mem)) 3600 // cond: canMergeLoad(v, l) && clobber(l) 3601 // result: (InvertFlags (CMPWload {sym} [off] ptr x mem)) 3602 for { 3603 _ = v.Args[1] 3604 x := v.Args[0] 3605 l := v.Args[1] 3606 if l.Op != Op386MOVWload { 3607 break 3608 } 3609 off := l.AuxInt 3610 sym := l.Aux 3611 mem := l.Args[1] 3612 ptr := l.Args[0] 3613 if !(canMergeLoad(v, l) && clobber(l)) { 3614 break 3615 } 3616 v.reset(Op386InvertFlags) 3617 v0 := b.NewValue0(l.Pos, Op386CMPWload, types.TypeFlags) 3618 v0.AuxInt = off 3619 v0.Aux = sym 3620 v0.AddArg(ptr) 3621 v0.AddArg(x) 3622 v0.AddArg(mem) 3623 v.AddArg(v0) 3624 return true 3625 } 3626 return false 3627 } 3628 func rewriteValue386_Op386CMPWconst_0(v *Value) bool { 3629 b := v.Block 3630 // match: (CMPWconst (MOVLconst [x]) [y]) 3631 // cond: int16(x)==int16(y) 3632 // result: (FlagEQ) 3633 for { 3634 y := v.AuxInt 3635 v_0 := v.Args[0] 3636 if v_0.Op != Op386MOVLconst { 3637 break 3638 } 3639 x := v_0.AuxInt 3640 if !(int16(x) == int16(y)) { 3641 break 3642 } 3643 v.reset(Op386FlagEQ) 3644 return true 3645 } 3646 // match: (CMPWconst (MOVLconst [x]) [y]) 3647 // cond: int16(x)<int16(y) && uint16(x)<uint16(y) 3648 // result: (FlagLT_ULT) 3649 for { 3650 y := v.AuxInt 3651 v_0 := v.Args[0] 3652 if v_0.Op != Op386MOVLconst { 3653 break 3654 } 3655 x := v_0.AuxInt 3656 if !(int16(x) < int16(y) && uint16(x) < uint16(y)) { 3657 break 3658 } 3659 v.reset(Op386FlagLT_ULT) 3660 return true 3661 } 3662 // match: (CMPWconst (MOVLconst [x]) [y]) 3663 // cond: int16(x)<int16(y) && uint16(x)>uint16(y) 3664 // result: (FlagLT_UGT) 3665 for { 3666 y := v.AuxInt 3667 v_0 := v.Args[0] 3668 if v_0.Op != Op386MOVLconst { 3669 break 3670 } 3671 x := v_0.AuxInt 3672 if !(int16(x) < int16(y) && uint16(x) > uint16(y)) { 3673 break 3674 } 3675 v.reset(Op386FlagLT_UGT) 3676 return true 3677 } 3678 // match: (CMPWconst (MOVLconst [x]) [y]) 3679 // cond: int16(x)>int16(y) && uint16(x)<uint16(y) 3680 // result: (FlagGT_ULT) 3681 for { 3682 y := v.AuxInt 3683 v_0 := v.Args[0] 3684 if v_0.Op != Op386MOVLconst { 3685 break 3686 } 3687 x := v_0.AuxInt 3688 if !(int16(x) > int16(y) && uint16(x) < uint16(y)) { 3689 break 3690 } 3691 v.reset(Op386FlagGT_ULT) 3692 return true 3693 } 3694 // match: (CMPWconst (MOVLconst [x]) [y]) 3695 // cond: int16(x)>int16(y) && uint16(x)>uint16(y) 3696 // result: (FlagGT_UGT) 3697 for { 3698 y := v.AuxInt 3699 v_0 := v.Args[0] 3700 if v_0.Op != Op386MOVLconst { 3701 break 3702 } 3703 x := v_0.AuxInt 3704 if !(int16(x) > int16(y) && uint16(x) > uint16(y)) { 3705 break 3706 } 3707 v.reset(Op386FlagGT_UGT) 3708 return true 3709 } 3710 // match: (CMPWconst (ANDLconst _ [m]) [n]) 3711 // cond: 0 <= int16(m) && int16(m) < int16(n) 3712 // result: (FlagLT_ULT) 3713 for { 3714 n := v.AuxInt 3715 v_0 := v.Args[0] 3716 if v_0.Op != Op386ANDLconst { 3717 break 3718 } 3719 m := v_0.AuxInt 3720 if !(0 <= int16(m) && int16(m) < int16(n)) { 3721 break 3722 } 3723 v.reset(Op386FlagLT_ULT) 3724 return true 3725 } 3726 // match: (CMPWconst l:(ANDL x y) [0]) 3727 // cond: l.Uses==1 3728 // result: (TESTW x y) 3729 for { 3730 if v.AuxInt != 0 { 3731 break 3732 } 3733 l := v.Args[0] 3734 if l.Op != Op386ANDL { 3735 break 3736 } 3737 y := l.Args[1] 3738 x := l.Args[0] 3739 if !(l.Uses == 1) { 3740 break 3741 } 3742 v.reset(Op386TESTW) 3743 v.AddArg(x) 3744 v.AddArg(y) 3745 return true 3746 } 3747 // match: (CMPWconst l:(ANDLconst [c] x) [0]) 3748 // cond: l.Uses==1 3749 // result: (TESTWconst [int64(int16(c))] x) 3750 for { 3751 if v.AuxInt != 0 { 3752 break 3753 } 3754 l := v.Args[0] 3755 if l.Op != Op386ANDLconst { 3756 break 3757 } 3758 c := l.AuxInt 3759 x := l.Args[0] 3760 if !(l.Uses == 1) { 3761 break 3762 } 3763 v.reset(Op386TESTWconst) 3764 v.AuxInt = int64(int16(c)) 3765 v.AddArg(x) 3766 return true 3767 } 3768 // match: (CMPWconst x [0]) 3769 // result: (TESTW x x) 3770 for { 3771 if v.AuxInt != 0 { 3772 break 3773 } 3774 x := v.Args[0] 3775 v.reset(Op386TESTW) 3776 v.AddArg(x) 3777 v.AddArg(x) 3778 return true 3779 } 3780 // match: (CMPWconst l:(MOVWload {sym} [off] ptr mem) [c]) 3781 // cond: l.Uses == 1 && validValAndOff(c, off) && clobber(l) 3782 // result: @l.Block (CMPWconstload {sym} [makeValAndOff(c,off)] ptr mem) 3783 for { 3784 c := v.AuxInt 3785 l := v.Args[0] 3786 if l.Op != Op386MOVWload { 3787 break 3788 } 3789 off := l.AuxInt 3790 sym := l.Aux 3791 mem := l.Args[1] 3792 ptr := l.Args[0] 3793 if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) { 3794 break 3795 } 3796 b = l.Block 3797 v0 := b.NewValue0(l.Pos, Op386CMPWconstload, types.TypeFlags) 3798 v.reset(OpCopy) 3799 v.AddArg(v0) 3800 v0.AuxInt = makeValAndOff(c, off) 3801 v0.Aux = sym 3802 v0.AddArg(ptr) 3803 v0.AddArg(mem) 3804 return true 3805 } 3806 return false 3807 } 3808 func rewriteValue386_Op386CMPWload_0(v *Value) bool { 3809 // match: (CMPWload {sym} [off] ptr (MOVLconst [c]) mem) 3810 // cond: validValAndOff(int64(int16(c)),off) 3811 // result: (CMPWconstload {sym} [makeValAndOff(int64(int16(c)),off)] ptr mem) 3812 for { 3813 off := v.AuxInt 3814 sym := v.Aux 3815 mem := v.Args[2] 3816 ptr := v.Args[0] 3817 v_1 := v.Args[1] 3818 if v_1.Op != Op386MOVLconst { 3819 break 3820 } 3821 c := v_1.AuxInt 3822 if !(validValAndOff(int64(int16(c)), off)) { 3823 break 3824 } 3825 v.reset(Op386CMPWconstload) 3826 v.AuxInt = makeValAndOff(int64(int16(c)), off) 3827 v.Aux = sym 3828 v.AddArg(ptr) 3829 v.AddArg(mem) 3830 return true 3831 } 3832 return false 3833 } 3834 func rewriteValue386_Op386DIVSD_0(v *Value) bool { 3835 b := v.Block 3836 config := b.Func.Config 3837 // match: (DIVSD x l:(MOVSDload [off] {sym} ptr mem)) 3838 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 3839 // result: (DIVSDload x [off] {sym} ptr mem) 3840 for { 3841 _ = v.Args[1] 3842 x := v.Args[0] 3843 l := v.Args[1] 3844 if l.Op != Op386MOVSDload { 3845 break 3846 } 3847 off := l.AuxInt 3848 sym := l.Aux 3849 mem := l.Args[1] 3850 ptr := l.Args[0] 3851 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 3852 break 3853 } 3854 v.reset(Op386DIVSDload) 3855 v.AuxInt = off 3856 v.Aux = sym 3857 v.AddArg(x) 3858 v.AddArg(ptr) 3859 v.AddArg(mem) 3860 return true 3861 } 3862 return false 3863 } 3864 func rewriteValue386_Op386DIVSDload_0(v *Value) bool { 3865 b := v.Block 3866 config := b.Func.Config 3867 // match: (DIVSDload [off1] {sym} val (ADDLconst [off2] base) mem) 3868 // cond: is32Bit(off1+off2) 3869 // result: (DIVSDload [off1+off2] {sym} val base mem) 3870 for { 3871 off1 := v.AuxInt 3872 sym := v.Aux 3873 mem := v.Args[2] 3874 val := v.Args[0] 3875 v_1 := v.Args[1] 3876 if v_1.Op != Op386ADDLconst { 3877 break 3878 } 3879 off2 := v_1.AuxInt 3880 base := v_1.Args[0] 3881 if !(is32Bit(off1 + off2)) { 3882 break 3883 } 3884 v.reset(Op386DIVSDload) 3885 v.AuxInt = off1 + off2 3886 v.Aux = sym 3887 v.AddArg(val) 3888 v.AddArg(base) 3889 v.AddArg(mem) 3890 return true 3891 } 3892 // match: (DIVSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 3893 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 3894 // result: (DIVSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 3895 for { 3896 off1 := v.AuxInt 3897 sym1 := v.Aux 3898 mem := v.Args[2] 3899 val := v.Args[0] 3900 v_1 := v.Args[1] 3901 if v_1.Op != Op386LEAL { 3902 break 3903 } 3904 off2 := v_1.AuxInt 3905 sym2 := v_1.Aux 3906 base := v_1.Args[0] 3907 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 3908 break 3909 } 3910 v.reset(Op386DIVSDload) 3911 v.AuxInt = off1 + off2 3912 v.Aux = mergeSym(sym1, sym2) 3913 v.AddArg(val) 3914 v.AddArg(base) 3915 v.AddArg(mem) 3916 return true 3917 } 3918 return false 3919 } 3920 func rewriteValue386_Op386DIVSS_0(v *Value) bool { 3921 b := v.Block 3922 config := b.Func.Config 3923 // match: (DIVSS x l:(MOVSSload [off] {sym} ptr mem)) 3924 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 3925 // result: (DIVSSload x [off] {sym} ptr mem) 3926 for { 3927 _ = v.Args[1] 3928 x := v.Args[0] 3929 l := v.Args[1] 3930 if l.Op != Op386MOVSSload { 3931 break 3932 } 3933 off := l.AuxInt 3934 sym := l.Aux 3935 mem := l.Args[1] 3936 ptr := l.Args[0] 3937 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 3938 break 3939 } 3940 v.reset(Op386DIVSSload) 3941 v.AuxInt = off 3942 v.Aux = sym 3943 v.AddArg(x) 3944 v.AddArg(ptr) 3945 v.AddArg(mem) 3946 return true 3947 } 3948 return false 3949 } 3950 func rewriteValue386_Op386DIVSSload_0(v *Value) bool { 3951 b := v.Block 3952 config := b.Func.Config 3953 // match: (DIVSSload [off1] {sym} val (ADDLconst [off2] base) mem) 3954 // cond: is32Bit(off1+off2) 3955 // result: (DIVSSload [off1+off2] {sym} val base mem) 3956 for { 3957 off1 := v.AuxInt 3958 sym := v.Aux 3959 mem := v.Args[2] 3960 val := v.Args[0] 3961 v_1 := v.Args[1] 3962 if v_1.Op != Op386ADDLconst { 3963 break 3964 } 3965 off2 := v_1.AuxInt 3966 base := v_1.Args[0] 3967 if !(is32Bit(off1 + off2)) { 3968 break 3969 } 3970 v.reset(Op386DIVSSload) 3971 v.AuxInt = off1 + off2 3972 v.Aux = sym 3973 v.AddArg(val) 3974 v.AddArg(base) 3975 v.AddArg(mem) 3976 return true 3977 } 3978 // match: (DIVSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 3979 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 3980 // result: (DIVSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 3981 for { 3982 off1 := v.AuxInt 3983 sym1 := v.Aux 3984 mem := v.Args[2] 3985 val := v.Args[0] 3986 v_1 := v.Args[1] 3987 if v_1.Op != Op386LEAL { 3988 break 3989 } 3990 off2 := v_1.AuxInt 3991 sym2 := v_1.Aux 3992 base := v_1.Args[0] 3993 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 3994 break 3995 } 3996 v.reset(Op386DIVSSload) 3997 v.AuxInt = off1 + off2 3998 v.Aux = mergeSym(sym1, sym2) 3999 v.AddArg(val) 4000 v.AddArg(base) 4001 v.AddArg(mem) 4002 return true 4003 } 4004 return false 4005 } 4006 func rewriteValue386_Op386LEAL_0(v *Value) bool { 4007 // match: (LEAL [c] {s} (ADDLconst [d] x)) 4008 // cond: is32Bit(c+d) 4009 // result: (LEAL [c+d] {s} x) 4010 for { 4011 c := v.AuxInt 4012 s := v.Aux 4013 v_0 := v.Args[0] 4014 if v_0.Op != Op386ADDLconst { 4015 break 4016 } 4017 d := v_0.AuxInt 4018 x := v_0.Args[0] 4019 if !(is32Bit(c + d)) { 4020 break 4021 } 4022 v.reset(Op386LEAL) 4023 v.AuxInt = c + d 4024 v.Aux = s 4025 v.AddArg(x) 4026 return true 4027 } 4028 // match: (LEAL [c] {s} (ADDL x y)) 4029 // cond: x.Op != OpSB && y.Op != OpSB 4030 // result: (LEAL1 [c] {s} x y) 4031 for { 4032 c := v.AuxInt 4033 s := v.Aux 4034 v_0 := v.Args[0] 4035 if v_0.Op != Op386ADDL { 4036 break 4037 } 4038 y := v_0.Args[1] 4039 x := v_0.Args[0] 4040 if !(x.Op != OpSB && y.Op != OpSB) { 4041 break 4042 } 4043 v.reset(Op386LEAL1) 4044 v.AuxInt = c 4045 v.Aux = s 4046 v.AddArg(x) 4047 v.AddArg(y) 4048 return true 4049 } 4050 // match: (LEAL [off1] {sym1} (LEAL [off2] {sym2} x)) 4051 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4052 // result: (LEAL [off1+off2] {mergeSym(sym1,sym2)} x) 4053 for { 4054 off1 := v.AuxInt 4055 sym1 := v.Aux 4056 v_0 := v.Args[0] 4057 if v_0.Op != Op386LEAL { 4058 break 4059 } 4060 off2 := v_0.AuxInt 4061 sym2 := v_0.Aux 4062 x := v_0.Args[0] 4063 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4064 break 4065 } 4066 v.reset(Op386LEAL) 4067 v.AuxInt = off1 + off2 4068 v.Aux = mergeSym(sym1, sym2) 4069 v.AddArg(x) 4070 return true 4071 } 4072 // match: (LEAL [off1] {sym1} (LEAL1 [off2] {sym2} x y)) 4073 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4074 // result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y) 4075 for { 4076 off1 := v.AuxInt 4077 sym1 := v.Aux 4078 v_0 := v.Args[0] 4079 if v_0.Op != Op386LEAL1 { 4080 break 4081 } 4082 off2 := v_0.AuxInt 4083 sym2 := v_0.Aux 4084 y := v_0.Args[1] 4085 x := v_0.Args[0] 4086 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4087 break 4088 } 4089 v.reset(Op386LEAL1) 4090 v.AuxInt = off1 + off2 4091 v.Aux = mergeSym(sym1, sym2) 4092 v.AddArg(x) 4093 v.AddArg(y) 4094 return true 4095 } 4096 // match: (LEAL [off1] {sym1} (LEAL2 [off2] {sym2} x y)) 4097 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4098 // result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y) 4099 for { 4100 off1 := v.AuxInt 4101 sym1 := v.Aux 4102 v_0 := v.Args[0] 4103 if v_0.Op != Op386LEAL2 { 4104 break 4105 } 4106 off2 := v_0.AuxInt 4107 sym2 := v_0.Aux 4108 y := v_0.Args[1] 4109 x := v_0.Args[0] 4110 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4111 break 4112 } 4113 v.reset(Op386LEAL2) 4114 v.AuxInt = off1 + off2 4115 v.Aux = mergeSym(sym1, sym2) 4116 v.AddArg(x) 4117 v.AddArg(y) 4118 return true 4119 } 4120 // match: (LEAL [off1] {sym1} (LEAL4 [off2] {sym2} x y)) 4121 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4122 // result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y) 4123 for { 4124 off1 := v.AuxInt 4125 sym1 := v.Aux 4126 v_0 := v.Args[0] 4127 if v_0.Op != Op386LEAL4 { 4128 break 4129 } 4130 off2 := v_0.AuxInt 4131 sym2 := v_0.Aux 4132 y := v_0.Args[1] 4133 x := v_0.Args[0] 4134 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4135 break 4136 } 4137 v.reset(Op386LEAL4) 4138 v.AuxInt = off1 + off2 4139 v.Aux = mergeSym(sym1, sym2) 4140 v.AddArg(x) 4141 v.AddArg(y) 4142 return true 4143 } 4144 // match: (LEAL [off1] {sym1} (LEAL8 [off2] {sym2} x y)) 4145 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4146 // result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y) 4147 for { 4148 off1 := v.AuxInt 4149 sym1 := v.Aux 4150 v_0 := v.Args[0] 4151 if v_0.Op != Op386LEAL8 { 4152 break 4153 } 4154 off2 := v_0.AuxInt 4155 sym2 := v_0.Aux 4156 y := v_0.Args[1] 4157 x := v_0.Args[0] 4158 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4159 break 4160 } 4161 v.reset(Op386LEAL8) 4162 v.AuxInt = off1 + off2 4163 v.Aux = mergeSym(sym1, sym2) 4164 v.AddArg(x) 4165 v.AddArg(y) 4166 return true 4167 } 4168 return false 4169 } 4170 func rewriteValue386_Op386LEAL1_0(v *Value) bool { 4171 // match: (LEAL1 [c] {s} (ADDLconst [d] x) y) 4172 // cond: is32Bit(c+d) && x.Op != OpSB 4173 // result: (LEAL1 [c+d] {s} x y) 4174 for { 4175 c := v.AuxInt 4176 s := v.Aux 4177 y := v.Args[1] 4178 v_0 := v.Args[0] 4179 if v_0.Op != Op386ADDLconst { 4180 break 4181 } 4182 d := v_0.AuxInt 4183 x := v_0.Args[0] 4184 if !(is32Bit(c+d) && x.Op != OpSB) { 4185 break 4186 } 4187 v.reset(Op386LEAL1) 4188 v.AuxInt = c + d 4189 v.Aux = s 4190 v.AddArg(x) 4191 v.AddArg(y) 4192 return true 4193 } 4194 // match: (LEAL1 [c] {s} y (ADDLconst [d] x)) 4195 // cond: is32Bit(c+d) && x.Op != OpSB 4196 // result: (LEAL1 [c+d] {s} x y) 4197 for { 4198 c := v.AuxInt 4199 s := v.Aux 4200 _ = v.Args[1] 4201 y := v.Args[0] 4202 v_1 := v.Args[1] 4203 if v_1.Op != Op386ADDLconst { 4204 break 4205 } 4206 d := v_1.AuxInt 4207 x := v_1.Args[0] 4208 if !(is32Bit(c+d) && x.Op != OpSB) { 4209 break 4210 } 4211 v.reset(Op386LEAL1) 4212 v.AuxInt = c + d 4213 v.Aux = s 4214 v.AddArg(x) 4215 v.AddArg(y) 4216 return true 4217 } 4218 // match: (LEAL1 [c] {s} x (SHLLconst [1] y)) 4219 // result: (LEAL2 [c] {s} x y) 4220 for { 4221 c := v.AuxInt 4222 s := v.Aux 4223 _ = v.Args[1] 4224 x := v.Args[0] 4225 v_1 := v.Args[1] 4226 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 4227 break 4228 } 4229 y := v_1.Args[0] 4230 v.reset(Op386LEAL2) 4231 v.AuxInt = c 4232 v.Aux = s 4233 v.AddArg(x) 4234 v.AddArg(y) 4235 return true 4236 } 4237 // match: (LEAL1 [c] {s} (SHLLconst [1] y) x) 4238 // result: (LEAL2 [c] {s} x y) 4239 for { 4240 c := v.AuxInt 4241 s := v.Aux 4242 x := v.Args[1] 4243 v_0 := v.Args[0] 4244 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 1 { 4245 break 4246 } 4247 y := v_0.Args[0] 4248 v.reset(Op386LEAL2) 4249 v.AuxInt = c 4250 v.Aux = s 4251 v.AddArg(x) 4252 v.AddArg(y) 4253 return true 4254 } 4255 // match: (LEAL1 [c] {s} x (SHLLconst [2] y)) 4256 // result: (LEAL4 [c] {s} x y) 4257 for { 4258 c := v.AuxInt 4259 s := v.Aux 4260 _ = v.Args[1] 4261 x := v.Args[0] 4262 v_1 := v.Args[1] 4263 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 4264 break 4265 } 4266 y := v_1.Args[0] 4267 v.reset(Op386LEAL4) 4268 v.AuxInt = c 4269 v.Aux = s 4270 v.AddArg(x) 4271 v.AddArg(y) 4272 return true 4273 } 4274 // match: (LEAL1 [c] {s} (SHLLconst [2] y) x) 4275 // result: (LEAL4 [c] {s} x y) 4276 for { 4277 c := v.AuxInt 4278 s := v.Aux 4279 x := v.Args[1] 4280 v_0 := v.Args[0] 4281 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 2 { 4282 break 4283 } 4284 y := v_0.Args[0] 4285 v.reset(Op386LEAL4) 4286 v.AuxInt = c 4287 v.Aux = s 4288 v.AddArg(x) 4289 v.AddArg(y) 4290 return true 4291 } 4292 // match: (LEAL1 [c] {s} x (SHLLconst [3] y)) 4293 // result: (LEAL8 [c] {s} x y) 4294 for { 4295 c := v.AuxInt 4296 s := v.Aux 4297 _ = v.Args[1] 4298 x := v.Args[0] 4299 v_1 := v.Args[1] 4300 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 3 { 4301 break 4302 } 4303 y := v_1.Args[0] 4304 v.reset(Op386LEAL8) 4305 v.AuxInt = c 4306 v.Aux = s 4307 v.AddArg(x) 4308 v.AddArg(y) 4309 return true 4310 } 4311 // match: (LEAL1 [c] {s} (SHLLconst [3] y) x) 4312 // result: (LEAL8 [c] {s} x y) 4313 for { 4314 c := v.AuxInt 4315 s := v.Aux 4316 x := v.Args[1] 4317 v_0 := v.Args[0] 4318 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 3 { 4319 break 4320 } 4321 y := v_0.Args[0] 4322 v.reset(Op386LEAL8) 4323 v.AuxInt = c 4324 v.Aux = s 4325 v.AddArg(x) 4326 v.AddArg(y) 4327 return true 4328 } 4329 // match: (LEAL1 [off1] {sym1} (LEAL [off2] {sym2} x) y) 4330 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 4331 // result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y) 4332 for { 4333 off1 := v.AuxInt 4334 sym1 := v.Aux 4335 y := v.Args[1] 4336 v_0 := v.Args[0] 4337 if v_0.Op != Op386LEAL { 4338 break 4339 } 4340 off2 := v_0.AuxInt 4341 sym2 := v_0.Aux 4342 x := v_0.Args[0] 4343 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 4344 break 4345 } 4346 v.reset(Op386LEAL1) 4347 v.AuxInt = off1 + off2 4348 v.Aux = mergeSym(sym1, sym2) 4349 v.AddArg(x) 4350 v.AddArg(y) 4351 return true 4352 } 4353 // match: (LEAL1 [off1] {sym1} y (LEAL [off2] {sym2} x)) 4354 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 4355 // result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y) 4356 for { 4357 off1 := v.AuxInt 4358 sym1 := v.Aux 4359 _ = v.Args[1] 4360 y := v.Args[0] 4361 v_1 := v.Args[1] 4362 if v_1.Op != Op386LEAL { 4363 break 4364 } 4365 off2 := v_1.AuxInt 4366 sym2 := v_1.Aux 4367 x := v_1.Args[0] 4368 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 4369 break 4370 } 4371 v.reset(Op386LEAL1) 4372 v.AuxInt = off1 + off2 4373 v.Aux = mergeSym(sym1, sym2) 4374 v.AddArg(x) 4375 v.AddArg(y) 4376 return true 4377 } 4378 return false 4379 } 4380 func rewriteValue386_Op386LEAL2_0(v *Value) bool { 4381 // match: (LEAL2 [c] {s} (ADDLconst [d] x) y) 4382 // cond: is32Bit(c+d) && x.Op != OpSB 4383 // result: (LEAL2 [c+d] {s} x y) 4384 for { 4385 c := v.AuxInt 4386 s := v.Aux 4387 y := v.Args[1] 4388 v_0 := v.Args[0] 4389 if v_0.Op != Op386ADDLconst { 4390 break 4391 } 4392 d := v_0.AuxInt 4393 x := v_0.Args[0] 4394 if !(is32Bit(c+d) && x.Op != OpSB) { 4395 break 4396 } 4397 v.reset(Op386LEAL2) 4398 v.AuxInt = c + d 4399 v.Aux = s 4400 v.AddArg(x) 4401 v.AddArg(y) 4402 return true 4403 } 4404 // match: (LEAL2 [c] {s} x (ADDLconst [d] y)) 4405 // cond: is32Bit(c+2*d) && y.Op != OpSB 4406 // result: (LEAL2 [c+2*d] {s} x y) 4407 for { 4408 c := v.AuxInt 4409 s := v.Aux 4410 _ = v.Args[1] 4411 x := v.Args[0] 4412 v_1 := v.Args[1] 4413 if v_1.Op != Op386ADDLconst { 4414 break 4415 } 4416 d := v_1.AuxInt 4417 y := v_1.Args[0] 4418 if !(is32Bit(c+2*d) && y.Op != OpSB) { 4419 break 4420 } 4421 v.reset(Op386LEAL2) 4422 v.AuxInt = c + 2*d 4423 v.Aux = s 4424 v.AddArg(x) 4425 v.AddArg(y) 4426 return true 4427 } 4428 // match: (LEAL2 [c] {s} x (SHLLconst [1] y)) 4429 // result: (LEAL4 [c] {s} x y) 4430 for { 4431 c := v.AuxInt 4432 s := v.Aux 4433 _ = v.Args[1] 4434 x := v.Args[0] 4435 v_1 := v.Args[1] 4436 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 4437 break 4438 } 4439 y := v_1.Args[0] 4440 v.reset(Op386LEAL4) 4441 v.AuxInt = c 4442 v.Aux = s 4443 v.AddArg(x) 4444 v.AddArg(y) 4445 return true 4446 } 4447 // match: (LEAL2 [c] {s} x (SHLLconst [2] y)) 4448 // result: (LEAL8 [c] {s} x y) 4449 for { 4450 c := v.AuxInt 4451 s := v.Aux 4452 _ = v.Args[1] 4453 x := v.Args[0] 4454 v_1 := v.Args[1] 4455 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 4456 break 4457 } 4458 y := v_1.Args[0] 4459 v.reset(Op386LEAL8) 4460 v.AuxInt = c 4461 v.Aux = s 4462 v.AddArg(x) 4463 v.AddArg(y) 4464 return true 4465 } 4466 // match: (LEAL2 [off1] {sym1} (LEAL [off2] {sym2} x) y) 4467 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 4468 // result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y) 4469 for { 4470 off1 := v.AuxInt 4471 sym1 := v.Aux 4472 y := v.Args[1] 4473 v_0 := v.Args[0] 4474 if v_0.Op != Op386LEAL { 4475 break 4476 } 4477 off2 := v_0.AuxInt 4478 sym2 := v_0.Aux 4479 x := v_0.Args[0] 4480 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 4481 break 4482 } 4483 v.reset(Op386LEAL2) 4484 v.AuxInt = off1 + off2 4485 v.Aux = mergeSym(sym1, sym2) 4486 v.AddArg(x) 4487 v.AddArg(y) 4488 return true 4489 } 4490 return false 4491 } 4492 func rewriteValue386_Op386LEAL4_0(v *Value) bool { 4493 // match: (LEAL4 [c] {s} (ADDLconst [d] x) y) 4494 // cond: is32Bit(c+d) && x.Op != OpSB 4495 // result: (LEAL4 [c+d] {s} x y) 4496 for { 4497 c := v.AuxInt 4498 s := v.Aux 4499 y := v.Args[1] 4500 v_0 := v.Args[0] 4501 if v_0.Op != Op386ADDLconst { 4502 break 4503 } 4504 d := v_0.AuxInt 4505 x := v_0.Args[0] 4506 if !(is32Bit(c+d) && x.Op != OpSB) { 4507 break 4508 } 4509 v.reset(Op386LEAL4) 4510 v.AuxInt = c + d 4511 v.Aux = s 4512 v.AddArg(x) 4513 v.AddArg(y) 4514 return true 4515 } 4516 // match: (LEAL4 [c] {s} x (ADDLconst [d] y)) 4517 // cond: is32Bit(c+4*d) && y.Op != OpSB 4518 // result: (LEAL4 [c+4*d] {s} x y) 4519 for { 4520 c := v.AuxInt 4521 s := v.Aux 4522 _ = v.Args[1] 4523 x := v.Args[0] 4524 v_1 := v.Args[1] 4525 if v_1.Op != Op386ADDLconst { 4526 break 4527 } 4528 d := v_1.AuxInt 4529 y := v_1.Args[0] 4530 if !(is32Bit(c+4*d) && y.Op != OpSB) { 4531 break 4532 } 4533 v.reset(Op386LEAL4) 4534 v.AuxInt = c + 4*d 4535 v.Aux = s 4536 v.AddArg(x) 4537 v.AddArg(y) 4538 return true 4539 } 4540 // match: (LEAL4 [c] {s} x (SHLLconst [1] y)) 4541 // result: (LEAL8 [c] {s} x y) 4542 for { 4543 c := v.AuxInt 4544 s := v.Aux 4545 _ = v.Args[1] 4546 x := v.Args[0] 4547 v_1 := v.Args[1] 4548 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 4549 break 4550 } 4551 y := v_1.Args[0] 4552 v.reset(Op386LEAL8) 4553 v.AuxInt = c 4554 v.Aux = s 4555 v.AddArg(x) 4556 v.AddArg(y) 4557 return true 4558 } 4559 // match: (LEAL4 [off1] {sym1} (LEAL [off2] {sym2} x) y) 4560 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 4561 // result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y) 4562 for { 4563 off1 := v.AuxInt 4564 sym1 := v.Aux 4565 y := v.Args[1] 4566 v_0 := v.Args[0] 4567 if v_0.Op != Op386LEAL { 4568 break 4569 } 4570 off2 := v_0.AuxInt 4571 sym2 := v_0.Aux 4572 x := v_0.Args[0] 4573 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 4574 break 4575 } 4576 v.reset(Op386LEAL4) 4577 v.AuxInt = off1 + off2 4578 v.Aux = mergeSym(sym1, sym2) 4579 v.AddArg(x) 4580 v.AddArg(y) 4581 return true 4582 } 4583 return false 4584 } 4585 func rewriteValue386_Op386LEAL8_0(v *Value) bool { 4586 // match: (LEAL8 [c] {s} (ADDLconst [d] x) y) 4587 // cond: is32Bit(c+d) && x.Op != OpSB 4588 // result: (LEAL8 [c+d] {s} x y) 4589 for { 4590 c := v.AuxInt 4591 s := v.Aux 4592 y := v.Args[1] 4593 v_0 := v.Args[0] 4594 if v_0.Op != Op386ADDLconst { 4595 break 4596 } 4597 d := v_0.AuxInt 4598 x := v_0.Args[0] 4599 if !(is32Bit(c+d) && x.Op != OpSB) { 4600 break 4601 } 4602 v.reset(Op386LEAL8) 4603 v.AuxInt = c + d 4604 v.Aux = s 4605 v.AddArg(x) 4606 v.AddArg(y) 4607 return true 4608 } 4609 // match: (LEAL8 [c] {s} x (ADDLconst [d] y)) 4610 // cond: is32Bit(c+8*d) && y.Op != OpSB 4611 // result: (LEAL8 [c+8*d] {s} x y) 4612 for { 4613 c := v.AuxInt 4614 s := v.Aux 4615 _ = v.Args[1] 4616 x := v.Args[0] 4617 v_1 := v.Args[1] 4618 if v_1.Op != Op386ADDLconst { 4619 break 4620 } 4621 d := v_1.AuxInt 4622 y := v_1.Args[0] 4623 if !(is32Bit(c+8*d) && y.Op != OpSB) { 4624 break 4625 } 4626 v.reset(Op386LEAL8) 4627 v.AuxInt = c + 8*d 4628 v.Aux = s 4629 v.AddArg(x) 4630 v.AddArg(y) 4631 return true 4632 } 4633 // match: (LEAL8 [off1] {sym1} (LEAL [off2] {sym2} x) y) 4634 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 4635 // result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y) 4636 for { 4637 off1 := v.AuxInt 4638 sym1 := v.Aux 4639 y := v.Args[1] 4640 v_0 := v.Args[0] 4641 if v_0.Op != Op386LEAL { 4642 break 4643 } 4644 off2 := v_0.AuxInt 4645 sym2 := v_0.Aux 4646 x := v_0.Args[0] 4647 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 4648 break 4649 } 4650 v.reset(Op386LEAL8) 4651 v.AuxInt = off1 + off2 4652 v.Aux = mergeSym(sym1, sym2) 4653 v.AddArg(x) 4654 v.AddArg(y) 4655 return true 4656 } 4657 return false 4658 } 4659 func rewriteValue386_Op386MOVBLSX_0(v *Value) bool { 4660 b := v.Block 4661 // match: (MOVBLSX x:(MOVBload [off] {sym} ptr mem)) 4662 // cond: x.Uses == 1 && clobber(x) 4663 // result: @x.Block (MOVBLSXload <v.Type> [off] {sym} ptr mem) 4664 for { 4665 x := v.Args[0] 4666 if x.Op != Op386MOVBload { 4667 break 4668 } 4669 off := x.AuxInt 4670 sym := x.Aux 4671 mem := x.Args[1] 4672 ptr := x.Args[0] 4673 if !(x.Uses == 1 && clobber(x)) { 4674 break 4675 } 4676 b = x.Block 4677 v0 := b.NewValue0(x.Pos, Op386MOVBLSXload, v.Type) 4678 v.reset(OpCopy) 4679 v.AddArg(v0) 4680 v0.AuxInt = off 4681 v0.Aux = sym 4682 v0.AddArg(ptr) 4683 v0.AddArg(mem) 4684 return true 4685 } 4686 // match: (MOVBLSX (ANDLconst [c] x)) 4687 // cond: c & 0x80 == 0 4688 // result: (ANDLconst [c & 0x7f] x) 4689 for { 4690 v_0 := v.Args[0] 4691 if v_0.Op != Op386ANDLconst { 4692 break 4693 } 4694 c := v_0.AuxInt 4695 x := v_0.Args[0] 4696 if !(c&0x80 == 0) { 4697 break 4698 } 4699 v.reset(Op386ANDLconst) 4700 v.AuxInt = c & 0x7f 4701 v.AddArg(x) 4702 return true 4703 } 4704 return false 4705 } 4706 func rewriteValue386_Op386MOVBLSXload_0(v *Value) bool { 4707 b := v.Block 4708 config := b.Func.Config 4709 // match: (MOVBLSXload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 4710 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 4711 // result: (MOVBLSX x) 4712 for { 4713 off := v.AuxInt 4714 sym := v.Aux 4715 _ = v.Args[1] 4716 ptr := v.Args[0] 4717 v_1 := v.Args[1] 4718 if v_1.Op != Op386MOVBstore { 4719 break 4720 } 4721 off2 := v_1.AuxInt 4722 sym2 := v_1.Aux 4723 _ = v_1.Args[2] 4724 ptr2 := v_1.Args[0] 4725 x := v_1.Args[1] 4726 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 4727 break 4728 } 4729 v.reset(Op386MOVBLSX) 4730 v.AddArg(x) 4731 return true 4732 } 4733 // match: (MOVBLSXload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 4734 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 4735 // result: (MOVBLSXload [off1+off2] {mergeSym(sym1,sym2)} base mem) 4736 for { 4737 off1 := v.AuxInt 4738 sym1 := v.Aux 4739 mem := v.Args[1] 4740 v_0 := v.Args[0] 4741 if v_0.Op != Op386LEAL { 4742 break 4743 } 4744 off2 := v_0.AuxInt 4745 sym2 := v_0.Aux 4746 base := v_0.Args[0] 4747 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 4748 break 4749 } 4750 v.reset(Op386MOVBLSXload) 4751 v.AuxInt = off1 + off2 4752 v.Aux = mergeSym(sym1, sym2) 4753 v.AddArg(base) 4754 v.AddArg(mem) 4755 return true 4756 } 4757 return false 4758 } 4759 func rewriteValue386_Op386MOVBLZX_0(v *Value) bool { 4760 b := v.Block 4761 // match: (MOVBLZX x:(MOVBload [off] {sym} ptr mem)) 4762 // cond: x.Uses == 1 && clobber(x) 4763 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 4764 for { 4765 x := v.Args[0] 4766 if x.Op != Op386MOVBload { 4767 break 4768 } 4769 off := x.AuxInt 4770 sym := x.Aux 4771 mem := x.Args[1] 4772 ptr := x.Args[0] 4773 if !(x.Uses == 1 && clobber(x)) { 4774 break 4775 } 4776 b = x.Block 4777 v0 := b.NewValue0(x.Pos, Op386MOVBload, v.Type) 4778 v.reset(OpCopy) 4779 v.AddArg(v0) 4780 v0.AuxInt = off 4781 v0.Aux = sym 4782 v0.AddArg(ptr) 4783 v0.AddArg(mem) 4784 return true 4785 } 4786 // match: (MOVBLZX x:(MOVBloadidx1 [off] {sym} ptr idx mem)) 4787 // cond: x.Uses == 1 && clobber(x) 4788 // result: @x.Block (MOVBloadidx1 <v.Type> [off] {sym} ptr idx mem) 4789 for { 4790 x := v.Args[0] 4791 if x.Op != Op386MOVBloadidx1 { 4792 break 4793 } 4794 off := x.AuxInt 4795 sym := x.Aux 4796 mem := x.Args[2] 4797 ptr := x.Args[0] 4798 idx := x.Args[1] 4799 if !(x.Uses == 1 && clobber(x)) { 4800 break 4801 } 4802 b = x.Block 4803 v0 := b.NewValue0(v.Pos, Op386MOVBloadidx1, v.Type) 4804 v.reset(OpCopy) 4805 v.AddArg(v0) 4806 v0.AuxInt = off 4807 v0.Aux = sym 4808 v0.AddArg(ptr) 4809 v0.AddArg(idx) 4810 v0.AddArg(mem) 4811 return true 4812 } 4813 // match: (MOVBLZX (ANDLconst [c] x)) 4814 // result: (ANDLconst [c & 0xff] x) 4815 for { 4816 v_0 := v.Args[0] 4817 if v_0.Op != Op386ANDLconst { 4818 break 4819 } 4820 c := v_0.AuxInt 4821 x := v_0.Args[0] 4822 v.reset(Op386ANDLconst) 4823 v.AuxInt = c & 0xff 4824 v.AddArg(x) 4825 return true 4826 } 4827 return false 4828 } 4829 func rewriteValue386_Op386MOVBload_0(v *Value) bool { 4830 b := v.Block 4831 config := b.Func.Config 4832 // match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 4833 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 4834 // result: (MOVBLZX x) 4835 for { 4836 off := v.AuxInt 4837 sym := v.Aux 4838 _ = v.Args[1] 4839 ptr := v.Args[0] 4840 v_1 := v.Args[1] 4841 if v_1.Op != Op386MOVBstore { 4842 break 4843 } 4844 off2 := v_1.AuxInt 4845 sym2 := v_1.Aux 4846 _ = v_1.Args[2] 4847 ptr2 := v_1.Args[0] 4848 x := v_1.Args[1] 4849 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 4850 break 4851 } 4852 v.reset(Op386MOVBLZX) 4853 v.AddArg(x) 4854 return true 4855 } 4856 // match: (MOVBload [off1] {sym} (ADDLconst [off2] ptr) mem) 4857 // cond: is32Bit(off1+off2) 4858 // result: (MOVBload [off1+off2] {sym} ptr mem) 4859 for { 4860 off1 := v.AuxInt 4861 sym := v.Aux 4862 mem := v.Args[1] 4863 v_0 := v.Args[0] 4864 if v_0.Op != Op386ADDLconst { 4865 break 4866 } 4867 off2 := v_0.AuxInt 4868 ptr := v_0.Args[0] 4869 if !(is32Bit(off1 + off2)) { 4870 break 4871 } 4872 v.reset(Op386MOVBload) 4873 v.AuxInt = off1 + off2 4874 v.Aux = sym 4875 v.AddArg(ptr) 4876 v.AddArg(mem) 4877 return true 4878 } 4879 // match: (MOVBload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 4880 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 4881 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 4882 for { 4883 off1 := v.AuxInt 4884 sym1 := v.Aux 4885 mem := v.Args[1] 4886 v_0 := v.Args[0] 4887 if v_0.Op != Op386LEAL { 4888 break 4889 } 4890 off2 := v_0.AuxInt 4891 sym2 := v_0.Aux 4892 base := v_0.Args[0] 4893 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 4894 break 4895 } 4896 v.reset(Op386MOVBload) 4897 v.AuxInt = off1 + off2 4898 v.Aux = mergeSym(sym1, sym2) 4899 v.AddArg(base) 4900 v.AddArg(mem) 4901 return true 4902 } 4903 // match: (MOVBload [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) mem) 4904 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 4905 // result: (MOVBloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 4906 for { 4907 off1 := v.AuxInt 4908 sym1 := v.Aux 4909 mem := v.Args[1] 4910 v_0 := v.Args[0] 4911 if v_0.Op != Op386LEAL1 { 4912 break 4913 } 4914 off2 := v_0.AuxInt 4915 sym2 := v_0.Aux 4916 idx := v_0.Args[1] 4917 ptr := v_0.Args[0] 4918 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 4919 break 4920 } 4921 v.reset(Op386MOVBloadidx1) 4922 v.AuxInt = off1 + off2 4923 v.Aux = mergeSym(sym1, sym2) 4924 v.AddArg(ptr) 4925 v.AddArg(idx) 4926 v.AddArg(mem) 4927 return true 4928 } 4929 // match: (MOVBload [off] {sym} (ADDL ptr idx) mem) 4930 // cond: ptr.Op != OpSB 4931 // result: (MOVBloadidx1 [off] {sym} ptr idx mem) 4932 for { 4933 off := v.AuxInt 4934 sym := v.Aux 4935 mem := v.Args[1] 4936 v_0 := v.Args[0] 4937 if v_0.Op != Op386ADDL { 4938 break 4939 } 4940 idx := v_0.Args[1] 4941 ptr := v_0.Args[0] 4942 if !(ptr.Op != OpSB) { 4943 break 4944 } 4945 v.reset(Op386MOVBloadidx1) 4946 v.AuxInt = off 4947 v.Aux = sym 4948 v.AddArg(ptr) 4949 v.AddArg(idx) 4950 v.AddArg(mem) 4951 return true 4952 } 4953 // match: (MOVBload [off] {sym} (SB) _) 4954 // cond: symIsRO(sym) 4955 // result: (MOVLconst [int64(read8(sym, off))]) 4956 for { 4957 off := v.AuxInt 4958 sym := v.Aux 4959 _ = v.Args[1] 4960 v_0 := v.Args[0] 4961 if v_0.Op != OpSB || !(symIsRO(sym)) { 4962 break 4963 } 4964 v.reset(Op386MOVLconst) 4965 v.AuxInt = int64(read8(sym, off)) 4966 return true 4967 } 4968 return false 4969 } 4970 func rewriteValue386_Op386MOVBloadidx1_0(v *Value) bool { 4971 // match: (MOVBloadidx1 [c] {sym} (ADDLconst [d] ptr) idx mem) 4972 // result: (MOVBloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 4973 for { 4974 c := v.AuxInt 4975 sym := v.Aux 4976 mem := v.Args[2] 4977 v_0 := v.Args[0] 4978 if v_0.Op != Op386ADDLconst { 4979 break 4980 } 4981 d := v_0.AuxInt 4982 ptr := v_0.Args[0] 4983 idx := v.Args[1] 4984 v.reset(Op386MOVBloadidx1) 4985 v.AuxInt = int64(int32(c + d)) 4986 v.Aux = sym 4987 v.AddArg(ptr) 4988 v.AddArg(idx) 4989 v.AddArg(mem) 4990 return true 4991 } 4992 // match: (MOVBloadidx1 [c] {sym} idx (ADDLconst [d] ptr) mem) 4993 // result: (MOVBloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 4994 for { 4995 c := v.AuxInt 4996 sym := v.Aux 4997 mem := v.Args[2] 4998 idx := v.Args[0] 4999 v_1 := v.Args[1] 5000 if v_1.Op != Op386ADDLconst { 5001 break 5002 } 5003 d := v_1.AuxInt 5004 ptr := v_1.Args[0] 5005 v.reset(Op386MOVBloadidx1) 5006 v.AuxInt = int64(int32(c + d)) 5007 v.Aux = sym 5008 v.AddArg(ptr) 5009 v.AddArg(idx) 5010 v.AddArg(mem) 5011 return true 5012 } 5013 // match: (MOVBloadidx1 [c] {sym} ptr (ADDLconst [d] idx) mem) 5014 // result: (MOVBloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 5015 for { 5016 c := v.AuxInt 5017 sym := v.Aux 5018 mem := v.Args[2] 5019 ptr := v.Args[0] 5020 v_1 := v.Args[1] 5021 if v_1.Op != Op386ADDLconst { 5022 break 5023 } 5024 d := v_1.AuxInt 5025 idx := v_1.Args[0] 5026 v.reset(Op386MOVBloadidx1) 5027 v.AuxInt = int64(int32(c + d)) 5028 v.Aux = sym 5029 v.AddArg(ptr) 5030 v.AddArg(idx) 5031 v.AddArg(mem) 5032 return true 5033 } 5034 // match: (MOVBloadidx1 [c] {sym} (ADDLconst [d] idx) ptr mem) 5035 // result: (MOVBloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 5036 for { 5037 c := v.AuxInt 5038 sym := v.Aux 5039 mem := v.Args[2] 5040 v_0 := v.Args[0] 5041 if v_0.Op != Op386ADDLconst { 5042 break 5043 } 5044 d := v_0.AuxInt 5045 idx := v_0.Args[0] 5046 ptr := v.Args[1] 5047 v.reset(Op386MOVBloadidx1) 5048 v.AuxInt = int64(int32(c + d)) 5049 v.Aux = sym 5050 v.AddArg(ptr) 5051 v.AddArg(idx) 5052 v.AddArg(mem) 5053 return true 5054 } 5055 return false 5056 } 5057 func rewriteValue386_Op386MOVBstore_0(v *Value) bool { 5058 b := v.Block 5059 config := b.Func.Config 5060 // match: (MOVBstore [off] {sym} ptr (MOVBLSX x) mem) 5061 // result: (MOVBstore [off] {sym} ptr x mem) 5062 for { 5063 off := v.AuxInt 5064 sym := v.Aux 5065 mem := v.Args[2] 5066 ptr := v.Args[0] 5067 v_1 := v.Args[1] 5068 if v_1.Op != Op386MOVBLSX { 5069 break 5070 } 5071 x := v_1.Args[0] 5072 v.reset(Op386MOVBstore) 5073 v.AuxInt = off 5074 v.Aux = sym 5075 v.AddArg(ptr) 5076 v.AddArg(x) 5077 v.AddArg(mem) 5078 return true 5079 } 5080 // match: (MOVBstore [off] {sym} ptr (MOVBLZX x) mem) 5081 // result: (MOVBstore [off] {sym} ptr x mem) 5082 for { 5083 off := v.AuxInt 5084 sym := v.Aux 5085 mem := v.Args[2] 5086 ptr := v.Args[0] 5087 v_1 := v.Args[1] 5088 if v_1.Op != Op386MOVBLZX { 5089 break 5090 } 5091 x := v_1.Args[0] 5092 v.reset(Op386MOVBstore) 5093 v.AuxInt = off 5094 v.Aux = sym 5095 v.AddArg(ptr) 5096 v.AddArg(x) 5097 v.AddArg(mem) 5098 return true 5099 } 5100 // match: (MOVBstore [off1] {sym} (ADDLconst [off2] ptr) val mem) 5101 // cond: is32Bit(off1+off2) 5102 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 5103 for { 5104 off1 := v.AuxInt 5105 sym := v.Aux 5106 mem := v.Args[2] 5107 v_0 := v.Args[0] 5108 if v_0.Op != Op386ADDLconst { 5109 break 5110 } 5111 off2 := v_0.AuxInt 5112 ptr := v_0.Args[0] 5113 val := v.Args[1] 5114 if !(is32Bit(off1 + off2)) { 5115 break 5116 } 5117 v.reset(Op386MOVBstore) 5118 v.AuxInt = off1 + off2 5119 v.Aux = sym 5120 v.AddArg(ptr) 5121 v.AddArg(val) 5122 v.AddArg(mem) 5123 return true 5124 } 5125 // match: (MOVBstore [off] {sym} ptr (MOVLconst [c]) mem) 5126 // cond: validOff(off) 5127 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 5128 for { 5129 off := v.AuxInt 5130 sym := v.Aux 5131 mem := v.Args[2] 5132 ptr := v.Args[0] 5133 v_1 := v.Args[1] 5134 if v_1.Op != Op386MOVLconst { 5135 break 5136 } 5137 c := v_1.AuxInt 5138 if !(validOff(off)) { 5139 break 5140 } 5141 v.reset(Op386MOVBstoreconst) 5142 v.AuxInt = makeValAndOff(int64(int8(c)), off) 5143 v.Aux = sym 5144 v.AddArg(ptr) 5145 v.AddArg(mem) 5146 return true 5147 } 5148 // match: (MOVBstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 5149 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 5150 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 5151 for { 5152 off1 := v.AuxInt 5153 sym1 := v.Aux 5154 mem := v.Args[2] 5155 v_0 := v.Args[0] 5156 if v_0.Op != Op386LEAL { 5157 break 5158 } 5159 off2 := v_0.AuxInt 5160 sym2 := v_0.Aux 5161 base := v_0.Args[0] 5162 val := v.Args[1] 5163 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 5164 break 5165 } 5166 v.reset(Op386MOVBstore) 5167 v.AuxInt = off1 + off2 5168 v.Aux = mergeSym(sym1, sym2) 5169 v.AddArg(base) 5170 v.AddArg(val) 5171 v.AddArg(mem) 5172 return true 5173 } 5174 // match: (MOVBstore [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) val mem) 5175 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 5176 // result: (MOVBstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 5177 for { 5178 off1 := v.AuxInt 5179 sym1 := v.Aux 5180 mem := v.Args[2] 5181 v_0 := v.Args[0] 5182 if v_0.Op != Op386LEAL1 { 5183 break 5184 } 5185 off2 := v_0.AuxInt 5186 sym2 := v_0.Aux 5187 idx := v_0.Args[1] 5188 ptr := v_0.Args[0] 5189 val := v.Args[1] 5190 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 5191 break 5192 } 5193 v.reset(Op386MOVBstoreidx1) 5194 v.AuxInt = off1 + off2 5195 v.Aux = mergeSym(sym1, sym2) 5196 v.AddArg(ptr) 5197 v.AddArg(idx) 5198 v.AddArg(val) 5199 v.AddArg(mem) 5200 return true 5201 } 5202 // match: (MOVBstore [off] {sym} (ADDL ptr idx) val mem) 5203 // cond: ptr.Op != OpSB 5204 // result: (MOVBstoreidx1 [off] {sym} ptr idx val mem) 5205 for { 5206 off := v.AuxInt 5207 sym := v.Aux 5208 mem := v.Args[2] 5209 v_0 := v.Args[0] 5210 if v_0.Op != Op386ADDL { 5211 break 5212 } 5213 idx := v_0.Args[1] 5214 ptr := v_0.Args[0] 5215 val := v.Args[1] 5216 if !(ptr.Op != OpSB) { 5217 break 5218 } 5219 v.reset(Op386MOVBstoreidx1) 5220 v.AuxInt = off 5221 v.Aux = sym 5222 v.AddArg(ptr) 5223 v.AddArg(idx) 5224 v.AddArg(val) 5225 v.AddArg(mem) 5226 return true 5227 } 5228 // match: (MOVBstore [i] {s} p (SHRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 5229 // cond: x.Uses == 1 && clobber(x) 5230 // result: (MOVWstore [i-1] {s} p w mem) 5231 for { 5232 i := v.AuxInt 5233 s := v.Aux 5234 _ = v.Args[2] 5235 p := v.Args[0] 5236 v_1 := v.Args[1] 5237 if v_1.Op != Op386SHRWconst || v_1.AuxInt != 8 { 5238 break 5239 } 5240 w := v_1.Args[0] 5241 x := v.Args[2] 5242 if x.Op != Op386MOVBstore || x.AuxInt != i-1 || x.Aux != s { 5243 break 5244 } 5245 mem := x.Args[2] 5246 if p != x.Args[0] || w != x.Args[1] || !(x.Uses == 1 && clobber(x)) { 5247 break 5248 } 5249 v.reset(Op386MOVWstore) 5250 v.AuxInt = i - 1 5251 v.Aux = s 5252 v.AddArg(p) 5253 v.AddArg(w) 5254 v.AddArg(mem) 5255 return true 5256 } 5257 // match: (MOVBstore [i] {s} p (SHRLconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 5258 // cond: x.Uses == 1 && clobber(x) 5259 // result: (MOVWstore [i-1] {s} p w mem) 5260 for { 5261 i := v.AuxInt 5262 s := v.Aux 5263 _ = v.Args[2] 5264 p := v.Args[0] 5265 v_1 := v.Args[1] 5266 if v_1.Op != Op386SHRLconst || v_1.AuxInt != 8 { 5267 break 5268 } 5269 w := v_1.Args[0] 5270 x := v.Args[2] 5271 if x.Op != Op386MOVBstore || x.AuxInt != i-1 || x.Aux != s { 5272 break 5273 } 5274 mem := x.Args[2] 5275 if p != x.Args[0] || w != x.Args[1] || !(x.Uses == 1 && clobber(x)) { 5276 break 5277 } 5278 v.reset(Op386MOVWstore) 5279 v.AuxInt = i - 1 5280 v.Aux = s 5281 v.AddArg(p) 5282 v.AddArg(w) 5283 v.AddArg(mem) 5284 return true 5285 } 5286 // match: (MOVBstore [i] {s} p w x:(MOVBstore {s} [i+1] p (SHRWconst [8] w) mem)) 5287 // cond: x.Uses == 1 && clobber(x) 5288 // result: (MOVWstore [i] {s} p w mem) 5289 for { 5290 i := v.AuxInt 5291 s := v.Aux 5292 _ = v.Args[2] 5293 p := v.Args[0] 5294 w := v.Args[1] 5295 x := v.Args[2] 5296 if x.Op != Op386MOVBstore || x.AuxInt != i+1 || x.Aux != s { 5297 break 5298 } 5299 mem := x.Args[2] 5300 if p != x.Args[0] { 5301 break 5302 } 5303 x_1 := x.Args[1] 5304 if x_1.Op != Op386SHRWconst || x_1.AuxInt != 8 || w != x_1.Args[0] || !(x.Uses == 1 && clobber(x)) { 5305 break 5306 } 5307 v.reset(Op386MOVWstore) 5308 v.AuxInt = i 5309 v.Aux = s 5310 v.AddArg(p) 5311 v.AddArg(w) 5312 v.AddArg(mem) 5313 return true 5314 } 5315 return false 5316 } 5317 func rewriteValue386_Op386MOVBstore_10(v *Value) bool { 5318 // match: (MOVBstore [i] {s} p w x:(MOVBstore {s} [i+1] p (SHRLconst [8] w) mem)) 5319 // cond: x.Uses == 1 && clobber(x) 5320 // result: (MOVWstore [i] {s} p w mem) 5321 for { 5322 i := v.AuxInt 5323 s := v.Aux 5324 _ = v.Args[2] 5325 p := v.Args[0] 5326 w := v.Args[1] 5327 x := v.Args[2] 5328 if x.Op != Op386MOVBstore || x.AuxInt != i+1 || x.Aux != s { 5329 break 5330 } 5331 mem := x.Args[2] 5332 if p != x.Args[0] { 5333 break 5334 } 5335 x_1 := x.Args[1] 5336 if x_1.Op != Op386SHRLconst || x_1.AuxInt != 8 || w != x_1.Args[0] || !(x.Uses == 1 && clobber(x)) { 5337 break 5338 } 5339 v.reset(Op386MOVWstore) 5340 v.AuxInt = i 5341 v.Aux = s 5342 v.AddArg(p) 5343 v.AddArg(w) 5344 v.AddArg(mem) 5345 return true 5346 } 5347 // match: (MOVBstore [i] {s} p (SHRLconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SHRLconst [j-8] w) mem)) 5348 // cond: x.Uses == 1 && clobber(x) 5349 // result: (MOVWstore [i-1] {s} p w0 mem) 5350 for { 5351 i := v.AuxInt 5352 s := v.Aux 5353 _ = v.Args[2] 5354 p := v.Args[0] 5355 v_1 := v.Args[1] 5356 if v_1.Op != Op386SHRLconst { 5357 break 5358 } 5359 j := v_1.AuxInt 5360 w := v_1.Args[0] 5361 x := v.Args[2] 5362 if x.Op != Op386MOVBstore || x.AuxInt != i-1 || x.Aux != s { 5363 break 5364 } 5365 mem := x.Args[2] 5366 if p != x.Args[0] { 5367 break 5368 } 5369 w0 := x.Args[1] 5370 if w0.Op != Op386SHRLconst || w0.AuxInt != j-8 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 5371 break 5372 } 5373 v.reset(Op386MOVWstore) 5374 v.AuxInt = i - 1 5375 v.Aux = s 5376 v.AddArg(p) 5377 v.AddArg(w0) 5378 v.AddArg(mem) 5379 return true 5380 } 5381 return false 5382 } 5383 func rewriteValue386_Op386MOVBstoreconst_0(v *Value) bool { 5384 b := v.Block 5385 config := b.Func.Config 5386 // match: (MOVBstoreconst [sc] {s} (ADDLconst [off] ptr) mem) 5387 // cond: ValAndOff(sc).canAdd(off) 5388 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 5389 for { 5390 sc := v.AuxInt 5391 s := v.Aux 5392 mem := v.Args[1] 5393 v_0 := v.Args[0] 5394 if v_0.Op != Op386ADDLconst { 5395 break 5396 } 5397 off := v_0.AuxInt 5398 ptr := v_0.Args[0] 5399 if !(ValAndOff(sc).canAdd(off)) { 5400 break 5401 } 5402 v.reset(Op386MOVBstoreconst) 5403 v.AuxInt = ValAndOff(sc).add(off) 5404 v.Aux = s 5405 v.AddArg(ptr) 5406 v.AddArg(mem) 5407 return true 5408 } 5409 // match: (MOVBstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem) 5410 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) 5411 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 5412 for { 5413 sc := v.AuxInt 5414 sym1 := v.Aux 5415 mem := v.Args[1] 5416 v_0 := v.Args[0] 5417 if v_0.Op != Op386LEAL { 5418 break 5419 } 5420 off := v_0.AuxInt 5421 sym2 := v_0.Aux 5422 ptr := v_0.Args[0] 5423 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { 5424 break 5425 } 5426 v.reset(Op386MOVBstoreconst) 5427 v.AuxInt = ValAndOff(sc).add(off) 5428 v.Aux = mergeSym(sym1, sym2) 5429 v.AddArg(ptr) 5430 v.AddArg(mem) 5431 return true 5432 } 5433 // match: (MOVBstoreconst [x] {sym1} (LEAL1 [off] {sym2} ptr idx) mem) 5434 // cond: canMergeSym(sym1, sym2) 5435 // result: (MOVBstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem) 5436 for { 5437 x := v.AuxInt 5438 sym1 := v.Aux 5439 mem := v.Args[1] 5440 v_0 := v.Args[0] 5441 if v_0.Op != Op386LEAL1 { 5442 break 5443 } 5444 off := v_0.AuxInt 5445 sym2 := v_0.Aux 5446 idx := v_0.Args[1] 5447 ptr := v_0.Args[0] 5448 if !(canMergeSym(sym1, sym2)) { 5449 break 5450 } 5451 v.reset(Op386MOVBstoreconstidx1) 5452 v.AuxInt = ValAndOff(x).add(off) 5453 v.Aux = mergeSym(sym1, sym2) 5454 v.AddArg(ptr) 5455 v.AddArg(idx) 5456 v.AddArg(mem) 5457 return true 5458 } 5459 // match: (MOVBstoreconst [x] {sym} (ADDL ptr idx) mem) 5460 // result: (MOVBstoreconstidx1 [x] {sym} ptr idx mem) 5461 for { 5462 x := v.AuxInt 5463 sym := v.Aux 5464 mem := v.Args[1] 5465 v_0 := v.Args[0] 5466 if v_0.Op != Op386ADDL { 5467 break 5468 } 5469 idx := v_0.Args[1] 5470 ptr := v_0.Args[0] 5471 v.reset(Op386MOVBstoreconstidx1) 5472 v.AuxInt = x 5473 v.Aux = sym 5474 v.AddArg(ptr) 5475 v.AddArg(idx) 5476 v.AddArg(mem) 5477 return true 5478 } 5479 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 5480 // cond: x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 5481 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(a).Val()&0xff | ValAndOff(c).Val()<<8, ValAndOff(a).Off())] {s} p mem) 5482 for { 5483 c := v.AuxInt 5484 s := v.Aux 5485 _ = v.Args[1] 5486 p := v.Args[0] 5487 x := v.Args[1] 5488 if x.Op != Op386MOVBstoreconst { 5489 break 5490 } 5491 a := x.AuxInt 5492 if x.Aux != s { 5493 break 5494 } 5495 mem := x.Args[1] 5496 if p != x.Args[0] || !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 5497 break 5498 } 5499 v.reset(Op386MOVWstoreconst) 5500 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xff|ValAndOff(c).Val()<<8, ValAndOff(a).Off()) 5501 v.Aux = s 5502 v.AddArg(p) 5503 v.AddArg(mem) 5504 return true 5505 } 5506 // match: (MOVBstoreconst [a] {s} p x:(MOVBstoreconst [c] {s} p mem)) 5507 // cond: x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 5508 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(a).Val()&0xff | ValAndOff(c).Val()<<8, ValAndOff(a).Off())] {s} p mem) 5509 for { 5510 a := v.AuxInt 5511 s := v.Aux 5512 _ = v.Args[1] 5513 p := v.Args[0] 5514 x := v.Args[1] 5515 if x.Op != Op386MOVBstoreconst { 5516 break 5517 } 5518 c := x.AuxInt 5519 if x.Aux != s { 5520 break 5521 } 5522 mem := x.Args[1] 5523 if p != x.Args[0] || !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 5524 break 5525 } 5526 v.reset(Op386MOVWstoreconst) 5527 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xff|ValAndOff(c).Val()<<8, ValAndOff(a).Off()) 5528 v.Aux = s 5529 v.AddArg(p) 5530 v.AddArg(mem) 5531 return true 5532 } 5533 return false 5534 } 5535 func rewriteValue386_Op386MOVBstoreconstidx1_0(v *Value) bool { 5536 // match: (MOVBstoreconstidx1 [x] {sym} (ADDLconst [c] ptr) idx mem) 5537 // result: (MOVBstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 5538 for { 5539 x := v.AuxInt 5540 sym := v.Aux 5541 mem := v.Args[2] 5542 v_0 := v.Args[0] 5543 if v_0.Op != Op386ADDLconst { 5544 break 5545 } 5546 c := v_0.AuxInt 5547 ptr := v_0.Args[0] 5548 idx := v.Args[1] 5549 v.reset(Op386MOVBstoreconstidx1) 5550 v.AuxInt = ValAndOff(x).add(c) 5551 v.Aux = sym 5552 v.AddArg(ptr) 5553 v.AddArg(idx) 5554 v.AddArg(mem) 5555 return true 5556 } 5557 // match: (MOVBstoreconstidx1 [x] {sym} ptr (ADDLconst [c] idx) mem) 5558 // result: (MOVBstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 5559 for { 5560 x := v.AuxInt 5561 sym := v.Aux 5562 mem := v.Args[2] 5563 ptr := v.Args[0] 5564 v_1 := v.Args[1] 5565 if v_1.Op != Op386ADDLconst { 5566 break 5567 } 5568 c := v_1.AuxInt 5569 idx := v_1.Args[0] 5570 v.reset(Op386MOVBstoreconstidx1) 5571 v.AuxInt = ValAndOff(x).add(c) 5572 v.Aux = sym 5573 v.AddArg(ptr) 5574 v.AddArg(idx) 5575 v.AddArg(mem) 5576 return true 5577 } 5578 // match: (MOVBstoreconstidx1 [c] {s} p i x:(MOVBstoreconstidx1 [a] {s} p i mem)) 5579 // cond: x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 5580 // result: (MOVWstoreconstidx1 [makeValAndOff(ValAndOff(a).Val()&0xff | ValAndOff(c).Val()<<8, ValAndOff(a).Off())] {s} p i mem) 5581 for { 5582 c := v.AuxInt 5583 s := v.Aux 5584 _ = v.Args[2] 5585 p := v.Args[0] 5586 i := v.Args[1] 5587 x := v.Args[2] 5588 if x.Op != Op386MOVBstoreconstidx1 { 5589 break 5590 } 5591 a := x.AuxInt 5592 if x.Aux != s { 5593 break 5594 } 5595 mem := x.Args[2] 5596 if p != x.Args[0] || i != x.Args[1] || !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 5597 break 5598 } 5599 v.reset(Op386MOVWstoreconstidx1) 5600 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xff|ValAndOff(c).Val()<<8, ValAndOff(a).Off()) 5601 v.Aux = s 5602 v.AddArg(p) 5603 v.AddArg(i) 5604 v.AddArg(mem) 5605 return true 5606 } 5607 return false 5608 } 5609 func rewriteValue386_Op386MOVBstoreidx1_0(v *Value) bool { 5610 // match: (MOVBstoreidx1 [c] {sym} (ADDLconst [d] ptr) idx val mem) 5611 // result: (MOVBstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 5612 for { 5613 c := v.AuxInt 5614 sym := v.Aux 5615 mem := v.Args[3] 5616 v_0 := v.Args[0] 5617 if v_0.Op != Op386ADDLconst { 5618 break 5619 } 5620 d := v_0.AuxInt 5621 ptr := v_0.Args[0] 5622 idx := v.Args[1] 5623 val := v.Args[2] 5624 v.reset(Op386MOVBstoreidx1) 5625 v.AuxInt = int64(int32(c + d)) 5626 v.Aux = sym 5627 v.AddArg(ptr) 5628 v.AddArg(idx) 5629 v.AddArg(val) 5630 v.AddArg(mem) 5631 return true 5632 } 5633 // match: (MOVBstoreidx1 [c] {sym} idx (ADDLconst [d] ptr) val mem) 5634 // result: (MOVBstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 5635 for { 5636 c := v.AuxInt 5637 sym := v.Aux 5638 mem := v.Args[3] 5639 idx := v.Args[0] 5640 v_1 := v.Args[1] 5641 if v_1.Op != Op386ADDLconst { 5642 break 5643 } 5644 d := v_1.AuxInt 5645 ptr := v_1.Args[0] 5646 val := v.Args[2] 5647 v.reset(Op386MOVBstoreidx1) 5648 v.AuxInt = int64(int32(c + d)) 5649 v.Aux = sym 5650 v.AddArg(ptr) 5651 v.AddArg(idx) 5652 v.AddArg(val) 5653 v.AddArg(mem) 5654 return true 5655 } 5656 // match: (MOVBstoreidx1 [c] {sym} ptr (ADDLconst [d] idx) val mem) 5657 // result: (MOVBstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 5658 for { 5659 c := v.AuxInt 5660 sym := v.Aux 5661 mem := v.Args[3] 5662 ptr := v.Args[0] 5663 v_1 := v.Args[1] 5664 if v_1.Op != Op386ADDLconst { 5665 break 5666 } 5667 d := v_1.AuxInt 5668 idx := v_1.Args[0] 5669 val := v.Args[2] 5670 v.reset(Op386MOVBstoreidx1) 5671 v.AuxInt = int64(int32(c + d)) 5672 v.Aux = sym 5673 v.AddArg(ptr) 5674 v.AddArg(idx) 5675 v.AddArg(val) 5676 v.AddArg(mem) 5677 return true 5678 } 5679 // match: (MOVBstoreidx1 [c] {sym} (ADDLconst [d] idx) ptr val mem) 5680 // result: (MOVBstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 5681 for { 5682 c := v.AuxInt 5683 sym := v.Aux 5684 mem := v.Args[3] 5685 v_0 := v.Args[0] 5686 if v_0.Op != Op386ADDLconst { 5687 break 5688 } 5689 d := v_0.AuxInt 5690 idx := v_0.Args[0] 5691 ptr := v.Args[1] 5692 val := v.Args[2] 5693 v.reset(Op386MOVBstoreidx1) 5694 v.AuxInt = int64(int32(c + d)) 5695 v.Aux = sym 5696 v.AddArg(ptr) 5697 v.AddArg(idx) 5698 v.AddArg(val) 5699 v.AddArg(mem) 5700 return true 5701 } 5702 // match: (MOVBstoreidx1 [i] {s} p idx (SHRLconst [8] w) x:(MOVBstoreidx1 [i-1] {s} p idx w mem)) 5703 // cond: x.Uses == 1 && clobber(x) 5704 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5705 for { 5706 i := v.AuxInt 5707 s := v.Aux 5708 _ = v.Args[3] 5709 p := v.Args[0] 5710 idx := v.Args[1] 5711 v_2 := v.Args[2] 5712 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 8 { 5713 break 5714 } 5715 w := v_2.Args[0] 5716 x := v.Args[3] 5717 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5718 break 5719 } 5720 mem := x.Args[3] 5721 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5722 break 5723 } 5724 v.reset(Op386MOVWstoreidx1) 5725 v.AuxInt = i - 1 5726 v.Aux = s 5727 v.AddArg(p) 5728 v.AddArg(idx) 5729 v.AddArg(w) 5730 v.AddArg(mem) 5731 return true 5732 } 5733 // match: (MOVBstoreidx1 [i] {s} p idx (SHRLconst [8] w) x:(MOVBstoreidx1 [i-1] {s} idx p w mem)) 5734 // cond: x.Uses == 1 && clobber(x) 5735 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5736 for { 5737 i := v.AuxInt 5738 s := v.Aux 5739 _ = v.Args[3] 5740 p := v.Args[0] 5741 idx := v.Args[1] 5742 v_2 := v.Args[2] 5743 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 8 { 5744 break 5745 } 5746 w := v_2.Args[0] 5747 x := v.Args[3] 5748 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5749 break 5750 } 5751 mem := x.Args[3] 5752 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5753 break 5754 } 5755 v.reset(Op386MOVWstoreidx1) 5756 v.AuxInt = i - 1 5757 v.Aux = s 5758 v.AddArg(p) 5759 v.AddArg(idx) 5760 v.AddArg(w) 5761 v.AddArg(mem) 5762 return true 5763 } 5764 // match: (MOVBstoreidx1 [i] {s} idx p (SHRLconst [8] w) x:(MOVBstoreidx1 [i-1] {s} p idx w mem)) 5765 // cond: x.Uses == 1 && clobber(x) 5766 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5767 for { 5768 i := v.AuxInt 5769 s := v.Aux 5770 _ = v.Args[3] 5771 idx := v.Args[0] 5772 p := v.Args[1] 5773 v_2 := v.Args[2] 5774 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 8 { 5775 break 5776 } 5777 w := v_2.Args[0] 5778 x := v.Args[3] 5779 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5780 break 5781 } 5782 mem := x.Args[3] 5783 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5784 break 5785 } 5786 v.reset(Op386MOVWstoreidx1) 5787 v.AuxInt = i - 1 5788 v.Aux = s 5789 v.AddArg(p) 5790 v.AddArg(idx) 5791 v.AddArg(w) 5792 v.AddArg(mem) 5793 return true 5794 } 5795 // match: (MOVBstoreidx1 [i] {s} idx p (SHRLconst [8] w) x:(MOVBstoreidx1 [i-1] {s} idx p w mem)) 5796 // cond: x.Uses == 1 && clobber(x) 5797 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5798 for { 5799 i := v.AuxInt 5800 s := v.Aux 5801 _ = v.Args[3] 5802 idx := v.Args[0] 5803 p := v.Args[1] 5804 v_2 := v.Args[2] 5805 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 8 { 5806 break 5807 } 5808 w := v_2.Args[0] 5809 x := v.Args[3] 5810 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5811 break 5812 } 5813 mem := x.Args[3] 5814 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5815 break 5816 } 5817 v.reset(Op386MOVWstoreidx1) 5818 v.AuxInt = i - 1 5819 v.Aux = s 5820 v.AddArg(p) 5821 v.AddArg(idx) 5822 v.AddArg(w) 5823 v.AddArg(mem) 5824 return true 5825 } 5826 // match: (MOVBstoreidx1 [i] {s} p idx (SHRWconst [8] w) x:(MOVBstoreidx1 [i-1] {s} p idx w mem)) 5827 // cond: x.Uses == 1 && clobber(x) 5828 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5829 for { 5830 i := v.AuxInt 5831 s := v.Aux 5832 _ = v.Args[3] 5833 p := v.Args[0] 5834 idx := v.Args[1] 5835 v_2 := v.Args[2] 5836 if v_2.Op != Op386SHRWconst || v_2.AuxInt != 8 { 5837 break 5838 } 5839 w := v_2.Args[0] 5840 x := v.Args[3] 5841 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5842 break 5843 } 5844 mem := x.Args[3] 5845 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5846 break 5847 } 5848 v.reset(Op386MOVWstoreidx1) 5849 v.AuxInt = i - 1 5850 v.Aux = s 5851 v.AddArg(p) 5852 v.AddArg(idx) 5853 v.AddArg(w) 5854 v.AddArg(mem) 5855 return true 5856 } 5857 // match: (MOVBstoreidx1 [i] {s} p idx (SHRWconst [8] w) x:(MOVBstoreidx1 [i-1] {s} idx p w mem)) 5858 // cond: x.Uses == 1 && clobber(x) 5859 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5860 for { 5861 i := v.AuxInt 5862 s := v.Aux 5863 _ = v.Args[3] 5864 p := v.Args[0] 5865 idx := v.Args[1] 5866 v_2 := v.Args[2] 5867 if v_2.Op != Op386SHRWconst || v_2.AuxInt != 8 { 5868 break 5869 } 5870 w := v_2.Args[0] 5871 x := v.Args[3] 5872 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5873 break 5874 } 5875 mem := x.Args[3] 5876 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5877 break 5878 } 5879 v.reset(Op386MOVWstoreidx1) 5880 v.AuxInt = i - 1 5881 v.Aux = s 5882 v.AddArg(p) 5883 v.AddArg(idx) 5884 v.AddArg(w) 5885 v.AddArg(mem) 5886 return true 5887 } 5888 return false 5889 } 5890 func rewriteValue386_Op386MOVBstoreidx1_10(v *Value) bool { 5891 // match: (MOVBstoreidx1 [i] {s} idx p (SHRWconst [8] w) x:(MOVBstoreidx1 [i-1] {s} p idx w mem)) 5892 // cond: x.Uses == 1 && clobber(x) 5893 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5894 for { 5895 i := v.AuxInt 5896 s := v.Aux 5897 _ = v.Args[3] 5898 idx := v.Args[0] 5899 p := v.Args[1] 5900 v_2 := v.Args[2] 5901 if v_2.Op != Op386SHRWconst || v_2.AuxInt != 8 { 5902 break 5903 } 5904 w := v_2.Args[0] 5905 x := v.Args[3] 5906 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5907 break 5908 } 5909 mem := x.Args[3] 5910 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5911 break 5912 } 5913 v.reset(Op386MOVWstoreidx1) 5914 v.AuxInt = i - 1 5915 v.Aux = s 5916 v.AddArg(p) 5917 v.AddArg(idx) 5918 v.AddArg(w) 5919 v.AddArg(mem) 5920 return true 5921 } 5922 // match: (MOVBstoreidx1 [i] {s} idx p (SHRWconst [8] w) x:(MOVBstoreidx1 [i-1] {s} idx p w mem)) 5923 // cond: x.Uses == 1 && clobber(x) 5924 // result: (MOVWstoreidx1 [i-1] {s} p idx w mem) 5925 for { 5926 i := v.AuxInt 5927 s := v.Aux 5928 _ = v.Args[3] 5929 idx := v.Args[0] 5930 p := v.Args[1] 5931 v_2 := v.Args[2] 5932 if v_2.Op != Op386SHRWconst || v_2.AuxInt != 8 { 5933 break 5934 } 5935 w := v_2.Args[0] 5936 x := v.Args[3] 5937 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 5938 break 5939 } 5940 mem := x.Args[3] 5941 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 5942 break 5943 } 5944 v.reset(Op386MOVWstoreidx1) 5945 v.AuxInt = i - 1 5946 v.Aux = s 5947 v.AddArg(p) 5948 v.AddArg(idx) 5949 v.AddArg(w) 5950 v.AddArg(mem) 5951 return true 5952 } 5953 // match: (MOVBstoreidx1 [i] {s} p idx w x:(MOVBstoreidx1 [i+1] {s} p idx (SHRLconst [8] w) mem)) 5954 // cond: x.Uses == 1 && clobber(x) 5955 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 5956 for { 5957 i := v.AuxInt 5958 s := v.Aux 5959 _ = v.Args[3] 5960 p := v.Args[0] 5961 idx := v.Args[1] 5962 w := v.Args[2] 5963 x := v.Args[3] 5964 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 5965 break 5966 } 5967 mem := x.Args[3] 5968 if p != x.Args[0] || idx != x.Args[1] { 5969 break 5970 } 5971 x_2 := x.Args[2] 5972 if x_2.Op != Op386SHRLconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 5973 break 5974 } 5975 v.reset(Op386MOVWstoreidx1) 5976 v.AuxInt = i 5977 v.Aux = s 5978 v.AddArg(p) 5979 v.AddArg(idx) 5980 v.AddArg(w) 5981 v.AddArg(mem) 5982 return true 5983 } 5984 // match: (MOVBstoreidx1 [i] {s} p idx w x:(MOVBstoreidx1 [i+1] {s} idx p (SHRLconst [8] w) mem)) 5985 // cond: x.Uses == 1 && clobber(x) 5986 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 5987 for { 5988 i := v.AuxInt 5989 s := v.Aux 5990 _ = v.Args[3] 5991 p := v.Args[0] 5992 idx := v.Args[1] 5993 w := v.Args[2] 5994 x := v.Args[3] 5995 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 5996 break 5997 } 5998 mem := x.Args[3] 5999 if idx != x.Args[0] || p != x.Args[1] { 6000 break 6001 } 6002 x_2 := x.Args[2] 6003 if x_2.Op != Op386SHRLconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6004 break 6005 } 6006 v.reset(Op386MOVWstoreidx1) 6007 v.AuxInt = i 6008 v.Aux = s 6009 v.AddArg(p) 6010 v.AddArg(idx) 6011 v.AddArg(w) 6012 v.AddArg(mem) 6013 return true 6014 } 6015 // match: (MOVBstoreidx1 [i] {s} idx p w x:(MOVBstoreidx1 [i+1] {s} p idx (SHRLconst [8] w) mem)) 6016 // cond: x.Uses == 1 && clobber(x) 6017 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6018 for { 6019 i := v.AuxInt 6020 s := v.Aux 6021 _ = v.Args[3] 6022 idx := v.Args[0] 6023 p := v.Args[1] 6024 w := v.Args[2] 6025 x := v.Args[3] 6026 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6027 break 6028 } 6029 mem := x.Args[3] 6030 if p != x.Args[0] || idx != x.Args[1] { 6031 break 6032 } 6033 x_2 := x.Args[2] 6034 if x_2.Op != Op386SHRLconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6035 break 6036 } 6037 v.reset(Op386MOVWstoreidx1) 6038 v.AuxInt = i 6039 v.Aux = s 6040 v.AddArg(p) 6041 v.AddArg(idx) 6042 v.AddArg(w) 6043 v.AddArg(mem) 6044 return true 6045 } 6046 // match: (MOVBstoreidx1 [i] {s} idx p w x:(MOVBstoreidx1 [i+1] {s} idx p (SHRLconst [8] w) mem)) 6047 // cond: x.Uses == 1 && clobber(x) 6048 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6049 for { 6050 i := v.AuxInt 6051 s := v.Aux 6052 _ = v.Args[3] 6053 idx := v.Args[0] 6054 p := v.Args[1] 6055 w := v.Args[2] 6056 x := v.Args[3] 6057 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6058 break 6059 } 6060 mem := x.Args[3] 6061 if idx != x.Args[0] || p != x.Args[1] { 6062 break 6063 } 6064 x_2 := x.Args[2] 6065 if x_2.Op != Op386SHRLconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6066 break 6067 } 6068 v.reset(Op386MOVWstoreidx1) 6069 v.AuxInt = i 6070 v.Aux = s 6071 v.AddArg(p) 6072 v.AddArg(idx) 6073 v.AddArg(w) 6074 v.AddArg(mem) 6075 return true 6076 } 6077 // match: (MOVBstoreidx1 [i] {s} p idx w x:(MOVBstoreidx1 [i+1] {s} p idx (SHRWconst [8] w) mem)) 6078 // cond: x.Uses == 1 && clobber(x) 6079 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6080 for { 6081 i := v.AuxInt 6082 s := v.Aux 6083 _ = v.Args[3] 6084 p := v.Args[0] 6085 idx := v.Args[1] 6086 w := v.Args[2] 6087 x := v.Args[3] 6088 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6089 break 6090 } 6091 mem := x.Args[3] 6092 if p != x.Args[0] || idx != x.Args[1] { 6093 break 6094 } 6095 x_2 := x.Args[2] 6096 if x_2.Op != Op386SHRWconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6097 break 6098 } 6099 v.reset(Op386MOVWstoreidx1) 6100 v.AuxInt = i 6101 v.Aux = s 6102 v.AddArg(p) 6103 v.AddArg(idx) 6104 v.AddArg(w) 6105 v.AddArg(mem) 6106 return true 6107 } 6108 // match: (MOVBstoreidx1 [i] {s} p idx w x:(MOVBstoreidx1 [i+1] {s} idx p (SHRWconst [8] w) mem)) 6109 // cond: x.Uses == 1 && clobber(x) 6110 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6111 for { 6112 i := v.AuxInt 6113 s := v.Aux 6114 _ = v.Args[3] 6115 p := v.Args[0] 6116 idx := v.Args[1] 6117 w := v.Args[2] 6118 x := v.Args[3] 6119 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6120 break 6121 } 6122 mem := x.Args[3] 6123 if idx != x.Args[0] || p != x.Args[1] { 6124 break 6125 } 6126 x_2 := x.Args[2] 6127 if x_2.Op != Op386SHRWconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6128 break 6129 } 6130 v.reset(Op386MOVWstoreidx1) 6131 v.AuxInt = i 6132 v.Aux = s 6133 v.AddArg(p) 6134 v.AddArg(idx) 6135 v.AddArg(w) 6136 v.AddArg(mem) 6137 return true 6138 } 6139 // match: (MOVBstoreidx1 [i] {s} idx p w x:(MOVBstoreidx1 [i+1] {s} p idx (SHRWconst [8] w) mem)) 6140 // cond: x.Uses == 1 && clobber(x) 6141 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6142 for { 6143 i := v.AuxInt 6144 s := v.Aux 6145 _ = v.Args[3] 6146 idx := v.Args[0] 6147 p := v.Args[1] 6148 w := v.Args[2] 6149 x := v.Args[3] 6150 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6151 break 6152 } 6153 mem := x.Args[3] 6154 if p != x.Args[0] || idx != x.Args[1] { 6155 break 6156 } 6157 x_2 := x.Args[2] 6158 if x_2.Op != Op386SHRWconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6159 break 6160 } 6161 v.reset(Op386MOVWstoreidx1) 6162 v.AuxInt = i 6163 v.Aux = s 6164 v.AddArg(p) 6165 v.AddArg(idx) 6166 v.AddArg(w) 6167 v.AddArg(mem) 6168 return true 6169 } 6170 // match: (MOVBstoreidx1 [i] {s} idx p w x:(MOVBstoreidx1 [i+1] {s} idx p (SHRWconst [8] w) mem)) 6171 // cond: x.Uses == 1 && clobber(x) 6172 // result: (MOVWstoreidx1 [i] {s} p idx w mem) 6173 for { 6174 i := v.AuxInt 6175 s := v.Aux 6176 _ = v.Args[3] 6177 idx := v.Args[0] 6178 p := v.Args[1] 6179 w := v.Args[2] 6180 x := v.Args[3] 6181 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i+1 || x.Aux != s { 6182 break 6183 } 6184 mem := x.Args[3] 6185 if idx != x.Args[0] || p != x.Args[1] { 6186 break 6187 } 6188 x_2 := x.Args[2] 6189 if x_2.Op != Op386SHRWconst || x_2.AuxInt != 8 || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) { 6190 break 6191 } 6192 v.reset(Op386MOVWstoreidx1) 6193 v.AuxInt = i 6194 v.Aux = s 6195 v.AddArg(p) 6196 v.AddArg(idx) 6197 v.AddArg(w) 6198 v.AddArg(mem) 6199 return true 6200 } 6201 return false 6202 } 6203 func rewriteValue386_Op386MOVBstoreidx1_20(v *Value) bool { 6204 // match: (MOVBstoreidx1 [i] {s} p idx (SHRLconst [j] w) x:(MOVBstoreidx1 [i-1] {s} p idx w0:(SHRLconst [j-8] w) mem)) 6205 // cond: x.Uses == 1 && clobber(x) 6206 // result: (MOVWstoreidx1 [i-1] {s} p idx w0 mem) 6207 for { 6208 i := v.AuxInt 6209 s := v.Aux 6210 _ = v.Args[3] 6211 p := v.Args[0] 6212 idx := v.Args[1] 6213 v_2 := v.Args[2] 6214 if v_2.Op != Op386SHRLconst { 6215 break 6216 } 6217 j := v_2.AuxInt 6218 w := v_2.Args[0] 6219 x := v.Args[3] 6220 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 6221 break 6222 } 6223 mem := x.Args[3] 6224 if p != x.Args[0] || idx != x.Args[1] { 6225 break 6226 } 6227 w0 := x.Args[2] 6228 if w0.Op != Op386SHRLconst || w0.AuxInt != j-8 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 6229 break 6230 } 6231 v.reset(Op386MOVWstoreidx1) 6232 v.AuxInt = i - 1 6233 v.Aux = s 6234 v.AddArg(p) 6235 v.AddArg(idx) 6236 v.AddArg(w0) 6237 v.AddArg(mem) 6238 return true 6239 } 6240 // match: (MOVBstoreidx1 [i] {s} p idx (SHRLconst [j] w) x:(MOVBstoreidx1 [i-1] {s} idx p w0:(SHRLconst [j-8] w) mem)) 6241 // cond: x.Uses == 1 && clobber(x) 6242 // result: (MOVWstoreidx1 [i-1] {s} p idx w0 mem) 6243 for { 6244 i := v.AuxInt 6245 s := v.Aux 6246 _ = v.Args[3] 6247 p := v.Args[0] 6248 idx := v.Args[1] 6249 v_2 := v.Args[2] 6250 if v_2.Op != Op386SHRLconst { 6251 break 6252 } 6253 j := v_2.AuxInt 6254 w := v_2.Args[0] 6255 x := v.Args[3] 6256 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 6257 break 6258 } 6259 mem := x.Args[3] 6260 if idx != x.Args[0] || p != x.Args[1] { 6261 break 6262 } 6263 w0 := x.Args[2] 6264 if w0.Op != Op386SHRLconst || w0.AuxInt != j-8 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 6265 break 6266 } 6267 v.reset(Op386MOVWstoreidx1) 6268 v.AuxInt = i - 1 6269 v.Aux = s 6270 v.AddArg(p) 6271 v.AddArg(idx) 6272 v.AddArg(w0) 6273 v.AddArg(mem) 6274 return true 6275 } 6276 // match: (MOVBstoreidx1 [i] {s} idx p (SHRLconst [j] w) x:(MOVBstoreidx1 [i-1] {s} p idx w0:(SHRLconst [j-8] w) mem)) 6277 // cond: x.Uses == 1 && clobber(x) 6278 // result: (MOVWstoreidx1 [i-1] {s} p idx w0 mem) 6279 for { 6280 i := v.AuxInt 6281 s := v.Aux 6282 _ = v.Args[3] 6283 idx := v.Args[0] 6284 p := v.Args[1] 6285 v_2 := v.Args[2] 6286 if v_2.Op != Op386SHRLconst { 6287 break 6288 } 6289 j := v_2.AuxInt 6290 w := v_2.Args[0] 6291 x := v.Args[3] 6292 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 6293 break 6294 } 6295 mem := x.Args[3] 6296 if p != x.Args[0] || idx != x.Args[1] { 6297 break 6298 } 6299 w0 := x.Args[2] 6300 if w0.Op != Op386SHRLconst || w0.AuxInt != j-8 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 6301 break 6302 } 6303 v.reset(Op386MOVWstoreidx1) 6304 v.AuxInt = i - 1 6305 v.Aux = s 6306 v.AddArg(p) 6307 v.AddArg(idx) 6308 v.AddArg(w0) 6309 v.AddArg(mem) 6310 return true 6311 } 6312 // match: (MOVBstoreidx1 [i] {s} idx p (SHRLconst [j] w) x:(MOVBstoreidx1 [i-1] {s} idx p w0:(SHRLconst [j-8] w) mem)) 6313 // cond: x.Uses == 1 && clobber(x) 6314 // result: (MOVWstoreidx1 [i-1] {s} p idx w0 mem) 6315 for { 6316 i := v.AuxInt 6317 s := v.Aux 6318 _ = v.Args[3] 6319 idx := v.Args[0] 6320 p := v.Args[1] 6321 v_2 := v.Args[2] 6322 if v_2.Op != Op386SHRLconst { 6323 break 6324 } 6325 j := v_2.AuxInt 6326 w := v_2.Args[0] 6327 x := v.Args[3] 6328 if x.Op != Op386MOVBstoreidx1 || x.AuxInt != i-1 || x.Aux != s { 6329 break 6330 } 6331 mem := x.Args[3] 6332 if idx != x.Args[0] || p != x.Args[1] { 6333 break 6334 } 6335 w0 := x.Args[2] 6336 if w0.Op != Op386SHRLconst || w0.AuxInt != j-8 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 6337 break 6338 } 6339 v.reset(Op386MOVWstoreidx1) 6340 v.AuxInt = i - 1 6341 v.Aux = s 6342 v.AddArg(p) 6343 v.AddArg(idx) 6344 v.AddArg(w0) 6345 v.AddArg(mem) 6346 return true 6347 } 6348 return false 6349 } 6350 func rewriteValue386_Op386MOVLload_0(v *Value) bool { 6351 b := v.Block 6352 config := b.Func.Config 6353 // match: (MOVLload [off] {sym} ptr (MOVLstore [off2] {sym2} ptr2 x _)) 6354 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 6355 // result: x 6356 for { 6357 off := v.AuxInt 6358 sym := v.Aux 6359 _ = v.Args[1] 6360 ptr := v.Args[0] 6361 v_1 := v.Args[1] 6362 if v_1.Op != Op386MOVLstore { 6363 break 6364 } 6365 off2 := v_1.AuxInt 6366 sym2 := v_1.Aux 6367 _ = v_1.Args[2] 6368 ptr2 := v_1.Args[0] 6369 x := v_1.Args[1] 6370 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 6371 break 6372 } 6373 v.reset(OpCopy) 6374 v.Type = x.Type 6375 v.AddArg(x) 6376 return true 6377 } 6378 // match: (MOVLload [off1] {sym} (ADDLconst [off2] ptr) mem) 6379 // cond: is32Bit(off1+off2) 6380 // result: (MOVLload [off1+off2] {sym} ptr mem) 6381 for { 6382 off1 := v.AuxInt 6383 sym := v.Aux 6384 mem := v.Args[1] 6385 v_0 := v.Args[0] 6386 if v_0.Op != Op386ADDLconst { 6387 break 6388 } 6389 off2 := v_0.AuxInt 6390 ptr := v_0.Args[0] 6391 if !(is32Bit(off1 + off2)) { 6392 break 6393 } 6394 v.reset(Op386MOVLload) 6395 v.AuxInt = off1 + off2 6396 v.Aux = sym 6397 v.AddArg(ptr) 6398 v.AddArg(mem) 6399 return true 6400 } 6401 // match: (MOVLload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 6402 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 6403 // result: (MOVLload [off1+off2] {mergeSym(sym1,sym2)} base mem) 6404 for { 6405 off1 := v.AuxInt 6406 sym1 := v.Aux 6407 mem := v.Args[1] 6408 v_0 := v.Args[0] 6409 if v_0.Op != Op386LEAL { 6410 break 6411 } 6412 off2 := v_0.AuxInt 6413 sym2 := v_0.Aux 6414 base := v_0.Args[0] 6415 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 6416 break 6417 } 6418 v.reset(Op386MOVLload) 6419 v.AuxInt = off1 + off2 6420 v.Aux = mergeSym(sym1, sym2) 6421 v.AddArg(base) 6422 v.AddArg(mem) 6423 return true 6424 } 6425 // match: (MOVLload [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) mem) 6426 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 6427 // result: (MOVLloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 6428 for { 6429 off1 := v.AuxInt 6430 sym1 := v.Aux 6431 mem := v.Args[1] 6432 v_0 := v.Args[0] 6433 if v_0.Op != Op386LEAL1 { 6434 break 6435 } 6436 off2 := v_0.AuxInt 6437 sym2 := v_0.Aux 6438 idx := v_0.Args[1] 6439 ptr := v_0.Args[0] 6440 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 6441 break 6442 } 6443 v.reset(Op386MOVLloadidx1) 6444 v.AuxInt = off1 + off2 6445 v.Aux = mergeSym(sym1, sym2) 6446 v.AddArg(ptr) 6447 v.AddArg(idx) 6448 v.AddArg(mem) 6449 return true 6450 } 6451 // match: (MOVLload [off1] {sym1} (LEAL4 [off2] {sym2} ptr idx) mem) 6452 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 6453 // result: (MOVLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 6454 for { 6455 off1 := v.AuxInt 6456 sym1 := v.Aux 6457 mem := v.Args[1] 6458 v_0 := v.Args[0] 6459 if v_0.Op != Op386LEAL4 { 6460 break 6461 } 6462 off2 := v_0.AuxInt 6463 sym2 := v_0.Aux 6464 idx := v_0.Args[1] 6465 ptr := v_0.Args[0] 6466 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 6467 break 6468 } 6469 v.reset(Op386MOVLloadidx4) 6470 v.AuxInt = off1 + off2 6471 v.Aux = mergeSym(sym1, sym2) 6472 v.AddArg(ptr) 6473 v.AddArg(idx) 6474 v.AddArg(mem) 6475 return true 6476 } 6477 // match: (MOVLload [off] {sym} (ADDL ptr idx) mem) 6478 // cond: ptr.Op != OpSB 6479 // result: (MOVLloadidx1 [off] {sym} ptr idx mem) 6480 for { 6481 off := v.AuxInt 6482 sym := v.Aux 6483 mem := v.Args[1] 6484 v_0 := v.Args[0] 6485 if v_0.Op != Op386ADDL { 6486 break 6487 } 6488 idx := v_0.Args[1] 6489 ptr := v_0.Args[0] 6490 if !(ptr.Op != OpSB) { 6491 break 6492 } 6493 v.reset(Op386MOVLloadidx1) 6494 v.AuxInt = off 6495 v.Aux = sym 6496 v.AddArg(ptr) 6497 v.AddArg(idx) 6498 v.AddArg(mem) 6499 return true 6500 } 6501 // match: (MOVLload [off] {sym} (SB) _) 6502 // cond: symIsRO(sym) 6503 // result: (MOVLconst [int64(int32(read32(sym, off, config.BigEndian)))]) 6504 for { 6505 off := v.AuxInt 6506 sym := v.Aux 6507 _ = v.Args[1] 6508 v_0 := v.Args[0] 6509 if v_0.Op != OpSB || !(symIsRO(sym)) { 6510 break 6511 } 6512 v.reset(Op386MOVLconst) 6513 v.AuxInt = int64(int32(read32(sym, off, config.BigEndian))) 6514 return true 6515 } 6516 return false 6517 } 6518 func rewriteValue386_Op386MOVLloadidx1_0(v *Value) bool { 6519 // match: (MOVLloadidx1 [c] {sym} ptr (SHLLconst [2] idx) mem) 6520 // result: (MOVLloadidx4 [c] {sym} ptr idx mem) 6521 for { 6522 c := v.AuxInt 6523 sym := v.Aux 6524 mem := v.Args[2] 6525 ptr := v.Args[0] 6526 v_1 := v.Args[1] 6527 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 6528 break 6529 } 6530 idx := v_1.Args[0] 6531 v.reset(Op386MOVLloadidx4) 6532 v.AuxInt = c 6533 v.Aux = sym 6534 v.AddArg(ptr) 6535 v.AddArg(idx) 6536 v.AddArg(mem) 6537 return true 6538 } 6539 // match: (MOVLloadidx1 [c] {sym} (SHLLconst [2] idx) ptr mem) 6540 // result: (MOVLloadidx4 [c] {sym} ptr idx mem) 6541 for { 6542 c := v.AuxInt 6543 sym := v.Aux 6544 mem := v.Args[2] 6545 v_0 := v.Args[0] 6546 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 2 { 6547 break 6548 } 6549 idx := v_0.Args[0] 6550 ptr := v.Args[1] 6551 v.reset(Op386MOVLloadidx4) 6552 v.AuxInt = c 6553 v.Aux = sym 6554 v.AddArg(ptr) 6555 v.AddArg(idx) 6556 v.AddArg(mem) 6557 return true 6558 } 6559 // match: (MOVLloadidx1 [c] {sym} (ADDLconst [d] ptr) idx mem) 6560 // result: (MOVLloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 6561 for { 6562 c := v.AuxInt 6563 sym := v.Aux 6564 mem := v.Args[2] 6565 v_0 := v.Args[0] 6566 if v_0.Op != Op386ADDLconst { 6567 break 6568 } 6569 d := v_0.AuxInt 6570 ptr := v_0.Args[0] 6571 idx := v.Args[1] 6572 v.reset(Op386MOVLloadidx1) 6573 v.AuxInt = int64(int32(c + d)) 6574 v.Aux = sym 6575 v.AddArg(ptr) 6576 v.AddArg(idx) 6577 v.AddArg(mem) 6578 return true 6579 } 6580 // match: (MOVLloadidx1 [c] {sym} idx (ADDLconst [d] ptr) mem) 6581 // result: (MOVLloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 6582 for { 6583 c := v.AuxInt 6584 sym := v.Aux 6585 mem := v.Args[2] 6586 idx := v.Args[0] 6587 v_1 := v.Args[1] 6588 if v_1.Op != Op386ADDLconst { 6589 break 6590 } 6591 d := v_1.AuxInt 6592 ptr := v_1.Args[0] 6593 v.reset(Op386MOVLloadidx1) 6594 v.AuxInt = int64(int32(c + d)) 6595 v.Aux = sym 6596 v.AddArg(ptr) 6597 v.AddArg(idx) 6598 v.AddArg(mem) 6599 return true 6600 } 6601 // match: (MOVLloadidx1 [c] {sym} ptr (ADDLconst [d] idx) mem) 6602 // result: (MOVLloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 6603 for { 6604 c := v.AuxInt 6605 sym := v.Aux 6606 mem := v.Args[2] 6607 ptr := v.Args[0] 6608 v_1 := v.Args[1] 6609 if v_1.Op != Op386ADDLconst { 6610 break 6611 } 6612 d := v_1.AuxInt 6613 idx := v_1.Args[0] 6614 v.reset(Op386MOVLloadidx1) 6615 v.AuxInt = int64(int32(c + d)) 6616 v.Aux = sym 6617 v.AddArg(ptr) 6618 v.AddArg(idx) 6619 v.AddArg(mem) 6620 return true 6621 } 6622 // match: (MOVLloadidx1 [c] {sym} (ADDLconst [d] idx) ptr mem) 6623 // result: (MOVLloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 6624 for { 6625 c := v.AuxInt 6626 sym := v.Aux 6627 mem := v.Args[2] 6628 v_0 := v.Args[0] 6629 if v_0.Op != Op386ADDLconst { 6630 break 6631 } 6632 d := v_0.AuxInt 6633 idx := v_0.Args[0] 6634 ptr := v.Args[1] 6635 v.reset(Op386MOVLloadidx1) 6636 v.AuxInt = int64(int32(c + d)) 6637 v.Aux = sym 6638 v.AddArg(ptr) 6639 v.AddArg(idx) 6640 v.AddArg(mem) 6641 return true 6642 } 6643 return false 6644 } 6645 func rewriteValue386_Op386MOVLloadidx4_0(v *Value) bool { 6646 // match: (MOVLloadidx4 [c] {sym} (ADDLconst [d] ptr) idx mem) 6647 // result: (MOVLloadidx4 [int64(int32(c+d))] {sym} ptr idx mem) 6648 for { 6649 c := v.AuxInt 6650 sym := v.Aux 6651 mem := v.Args[2] 6652 v_0 := v.Args[0] 6653 if v_0.Op != Op386ADDLconst { 6654 break 6655 } 6656 d := v_0.AuxInt 6657 ptr := v_0.Args[0] 6658 idx := v.Args[1] 6659 v.reset(Op386MOVLloadidx4) 6660 v.AuxInt = int64(int32(c + d)) 6661 v.Aux = sym 6662 v.AddArg(ptr) 6663 v.AddArg(idx) 6664 v.AddArg(mem) 6665 return true 6666 } 6667 // match: (MOVLloadidx4 [c] {sym} ptr (ADDLconst [d] idx) mem) 6668 // result: (MOVLloadidx4 [int64(int32(c+4*d))] {sym} ptr idx mem) 6669 for { 6670 c := v.AuxInt 6671 sym := v.Aux 6672 mem := v.Args[2] 6673 ptr := v.Args[0] 6674 v_1 := v.Args[1] 6675 if v_1.Op != Op386ADDLconst { 6676 break 6677 } 6678 d := v_1.AuxInt 6679 idx := v_1.Args[0] 6680 v.reset(Op386MOVLloadidx4) 6681 v.AuxInt = int64(int32(c + 4*d)) 6682 v.Aux = sym 6683 v.AddArg(ptr) 6684 v.AddArg(idx) 6685 v.AddArg(mem) 6686 return true 6687 } 6688 return false 6689 } 6690 func rewriteValue386_Op386MOVLstore_0(v *Value) bool { 6691 b := v.Block 6692 config := b.Func.Config 6693 // match: (MOVLstore [off1] {sym} (ADDLconst [off2] ptr) val mem) 6694 // cond: is32Bit(off1+off2) 6695 // result: (MOVLstore [off1+off2] {sym} ptr val mem) 6696 for { 6697 off1 := v.AuxInt 6698 sym := v.Aux 6699 mem := v.Args[2] 6700 v_0 := v.Args[0] 6701 if v_0.Op != Op386ADDLconst { 6702 break 6703 } 6704 off2 := v_0.AuxInt 6705 ptr := v_0.Args[0] 6706 val := v.Args[1] 6707 if !(is32Bit(off1 + off2)) { 6708 break 6709 } 6710 v.reset(Op386MOVLstore) 6711 v.AuxInt = off1 + off2 6712 v.Aux = sym 6713 v.AddArg(ptr) 6714 v.AddArg(val) 6715 v.AddArg(mem) 6716 return true 6717 } 6718 // match: (MOVLstore [off] {sym} ptr (MOVLconst [c]) mem) 6719 // cond: validOff(off) 6720 // result: (MOVLstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 6721 for { 6722 off := v.AuxInt 6723 sym := v.Aux 6724 mem := v.Args[2] 6725 ptr := v.Args[0] 6726 v_1 := v.Args[1] 6727 if v_1.Op != Op386MOVLconst { 6728 break 6729 } 6730 c := v_1.AuxInt 6731 if !(validOff(off)) { 6732 break 6733 } 6734 v.reset(Op386MOVLstoreconst) 6735 v.AuxInt = makeValAndOff(int64(int32(c)), off) 6736 v.Aux = sym 6737 v.AddArg(ptr) 6738 v.AddArg(mem) 6739 return true 6740 } 6741 // match: (MOVLstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 6742 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 6743 // result: (MOVLstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 6744 for { 6745 off1 := v.AuxInt 6746 sym1 := v.Aux 6747 mem := v.Args[2] 6748 v_0 := v.Args[0] 6749 if v_0.Op != Op386LEAL { 6750 break 6751 } 6752 off2 := v_0.AuxInt 6753 sym2 := v_0.Aux 6754 base := v_0.Args[0] 6755 val := v.Args[1] 6756 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 6757 break 6758 } 6759 v.reset(Op386MOVLstore) 6760 v.AuxInt = off1 + off2 6761 v.Aux = mergeSym(sym1, sym2) 6762 v.AddArg(base) 6763 v.AddArg(val) 6764 v.AddArg(mem) 6765 return true 6766 } 6767 // match: (MOVLstore [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) val mem) 6768 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 6769 // result: (MOVLstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 6770 for { 6771 off1 := v.AuxInt 6772 sym1 := v.Aux 6773 mem := v.Args[2] 6774 v_0 := v.Args[0] 6775 if v_0.Op != Op386LEAL1 { 6776 break 6777 } 6778 off2 := v_0.AuxInt 6779 sym2 := v_0.Aux 6780 idx := v_0.Args[1] 6781 ptr := v_0.Args[0] 6782 val := v.Args[1] 6783 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 6784 break 6785 } 6786 v.reset(Op386MOVLstoreidx1) 6787 v.AuxInt = off1 + off2 6788 v.Aux = mergeSym(sym1, sym2) 6789 v.AddArg(ptr) 6790 v.AddArg(idx) 6791 v.AddArg(val) 6792 v.AddArg(mem) 6793 return true 6794 } 6795 // match: (MOVLstore [off1] {sym1} (LEAL4 [off2] {sym2} ptr idx) val mem) 6796 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 6797 // result: (MOVLstoreidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 6798 for { 6799 off1 := v.AuxInt 6800 sym1 := v.Aux 6801 mem := v.Args[2] 6802 v_0 := v.Args[0] 6803 if v_0.Op != Op386LEAL4 { 6804 break 6805 } 6806 off2 := v_0.AuxInt 6807 sym2 := v_0.Aux 6808 idx := v_0.Args[1] 6809 ptr := v_0.Args[0] 6810 val := v.Args[1] 6811 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 6812 break 6813 } 6814 v.reset(Op386MOVLstoreidx4) 6815 v.AuxInt = off1 + off2 6816 v.Aux = mergeSym(sym1, sym2) 6817 v.AddArg(ptr) 6818 v.AddArg(idx) 6819 v.AddArg(val) 6820 v.AddArg(mem) 6821 return true 6822 } 6823 // match: (MOVLstore [off] {sym} (ADDL ptr idx) val mem) 6824 // cond: ptr.Op != OpSB 6825 // result: (MOVLstoreidx1 [off] {sym} ptr idx val mem) 6826 for { 6827 off := v.AuxInt 6828 sym := v.Aux 6829 mem := v.Args[2] 6830 v_0 := v.Args[0] 6831 if v_0.Op != Op386ADDL { 6832 break 6833 } 6834 idx := v_0.Args[1] 6835 ptr := v_0.Args[0] 6836 val := v.Args[1] 6837 if !(ptr.Op != OpSB) { 6838 break 6839 } 6840 v.reset(Op386MOVLstoreidx1) 6841 v.AuxInt = off 6842 v.Aux = sym 6843 v.AddArg(ptr) 6844 v.AddArg(idx) 6845 v.AddArg(val) 6846 v.AddArg(mem) 6847 return true 6848 } 6849 // match: (MOVLstore {sym} [off] ptr y:(ADDLload x [off] {sym} ptr mem) mem) 6850 // cond: y.Uses==1 && clobber(y) 6851 // result: (ADDLmodify [off] {sym} ptr x mem) 6852 for { 6853 off := v.AuxInt 6854 sym := v.Aux 6855 mem := v.Args[2] 6856 ptr := v.Args[0] 6857 y := v.Args[1] 6858 if y.Op != Op386ADDLload || y.AuxInt != off || y.Aux != sym { 6859 break 6860 } 6861 _ = y.Args[2] 6862 x := y.Args[0] 6863 if ptr != y.Args[1] || mem != y.Args[2] || !(y.Uses == 1 && clobber(y)) { 6864 break 6865 } 6866 v.reset(Op386ADDLmodify) 6867 v.AuxInt = off 6868 v.Aux = sym 6869 v.AddArg(ptr) 6870 v.AddArg(x) 6871 v.AddArg(mem) 6872 return true 6873 } 6874 // match: (MOVLstore {sym} [off] ptr y:(ANDLload x [off] {sym} ptr mem) mem) 6875 // cond: y.Uses==1 && clobber(y) 6876 // result: (ANDLmodify [off] {sym} ptr x mem) 6877 for { 6878 off := v.AuxInt 6879 sym := v.Aux 6880 mem := v.Args[2] 6881 ptr := v.Args[0] 6882 y := v.Args[1] 6883 if y.Op != Op386ANDLload || y.AuxInt != off || y.Aux != sym { 6884 break 6885 } 6886 _ = y.Args[2] 6887 x := y.Args[0] 6888 if ptr != y.Args[1] || mem != y.Args[2] || !(y.Uses == 1 && clobber(y)) { 6889 break 6890 } 6891 v.reset(Op386ANDLmodify) 6892 v.AuxInt = off 6893 v.Aux = sym 6894 v.AddArg(ptr) 6895 v.AddArg(x) 6896 v.AddArg(mem) 6897 return true 6898 } 6899 // match: (MOVLstore {sym} [off] ptr y:(ORLload x [off] {sym} ptr mem) mem) 6900 // cond: y.Uses==1 && clobber(y) 6901 // result: (ORLmodify [off] {sym} ptr x mem) 6902 for { 6903 off := v.AuxInt 6904 sym := v.Aux 6905 mem := v.Args[2] 6906 ptr := v.Args[0] 6907 y := v.Args[1] 6908 if y.Op != Op386ORLload || y.AuxInt != off || y.Aux != sym { 6909 break 6910 } 6911 _ = y.Args[2] 6912 x := y.Args[0] 6913 if ptr != y.Args[1] || mem != y.Args[2] || !(y.Uses == 1 && clobber(y)) { 6914 break 6915 } 6916 v.reset(Op386ORLmodify) 6917 v.AuxInt = off 6918 v.Aux = sym 6919 v.AddArg(ptr) 6920 v.AddArg(x) 6921 v.AddArg(mem) 6922 return true 6923 } 6924 // match: (MOVLstore {sym} [off] ptr y:(XORLload x [off] {sym} ptr mem) mem) 6925 // cond: y.Uses==1 && clobber(y) 6926 // result: (XORLmodify [off] {sym} ptr x mem) 6927 for { 6928 off := v.AuxInt 6929 sym := v.Aux 6930 mem := v.Args[2] 6931 ptr := v.Args[0] 6932 y := v.Args[1] 6933 if y.Op != Op386XORLload || y.AuxInt != off || y.Aux != sym { 6934 break 6935 } 6936 _ = y.Args[2] 6937 x := y.Args[0] 6938 if ptr != y.Args[1] || mem != y.Args[2] || !(y.Uses == 1 && clobber(y)) { 6939 break 6940 } 6941 v.reset(Op386XORLmodify) 6942 v.AuxInt = off 6943 v.Aux = sym 6944 v.AddArg(ptr) 6945 v.AddArg(x) 6946 v.AddArg(mem) 6947 return true 6948 } 6949 return false 6950 } 6951 func rewriteValue386_Op386MOVLstore_10(v *Value) bool { 6952 // match: (MOVLstore {sym} [off] ptr y:(ADDL l:(MOVLload [off] {sym} ptr mem) x) mem) 6953 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 6954 // result: (ADDLmodify [off] {sym} ptr x mem) 6955 for { 6956 off := v.AuxInt 6957 sym := v.Aux 6958 mem := v.Args[2] 6959 ptr := v.Args[0] 6960 y := v.Args[1] 6961 if y.Op != Op386ADDL { 6962 break 6963 } 6964 x := y.Args[1] 6965 l := y.Args[0] 6966 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 6967 break 6968 } 6969 _ = l.Args[1] 6970 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 6971 break 6972 } 6973 v.reset(Op386ADDLmodify) 6974 v.AuxInt = off 6975 v.Aux = sym 6976 v.AddArg(ptr) 6977 v.AddArg(x) 6978 v.AddArg(mem) 6979 return true 6980 } 6981 // match: (MOVLstore {sym} [off] ptr y:(ADDL x l:(MOVLload [off] {sym} ptr mem)) mem) 6982 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 6983 // result: (ADDLmodify [off] {sym} ptr x mem) 6984 for { 6985 off := v.AuxInt 6986 sym := v.Aux 6987 mem := v.Args[2] 6988 ptr := v.Args[0] 6989 y := v.Args[1] 6990 if y.Op != Op386ADDL { 6991 break 6992 } 6993 _ = y.Args[1] 6994 x := y.Args[0] 6995 l := y.Args[1] 6996 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 6997 break 6998 } 6999 _ = l.Args[1] 7000 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7001 break 7002 } 7003 v.reset(Op386ADDLmodify) 7004 v.AuxInt = off 7005 v.Aux = sym 7006 v.AddArg(ptr) 7007 v.AddArg(x) 7008 v.AddArg(mem) 7009 return true 7010 } 7011 // match: (MOVLstore {sym} [off] ptr y:(SUBL l:(MOVLload [off] {sym} ptr mem) x) mem) 7012 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7013 // result: (SUBLmodify [off] {sym} ptr x mem) 7014 for { 7015 off := v.AuxInt 7016 sym := v.Aux 7017 mem := v.Args[2] 7018 ptr := v.Args[0] 7019 y := v.Args[1] 7020 if y.Op != Op386SUBL { 7021 break 7022 } 7023 x := y.Args[1] 7024 l := y.Args[0] 7025 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7026 break 7027 } 7028 _ = l.Args[1] 7029 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7030 break 7031 } 7032 v.reset(Op386SUBLmodify) 7033 v.AuxInt = off 7034 v.Aux = sym 7035 v.AddArg(ptr) 7036 v.AddArg(x) 7037 v.AddArg(mem) 7038 return true 7039 } 7040 // match: (MOVLstore {sym} [off] ptr y:(ANDL l:(MOVLload [off] {sym} ptr mem) x) mem) 7041 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7042 // result: (ANDLmodify [off] {sym} ptr x mem) 7043 for { 7044 off := v.AuxInt 7045 sym := v.Aux 7046 mem := v.Args[2] 7047 ptr := v.Args[0] 7048 y := v.Args[1] 7049 if y.Op != Op386ANDL { 7050 break 7051 } 7052 x := y.Args[1] 7053 l := y.Args[0] 7054 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7055 break 7056 } 7057 _ = l.Args[1] 7058 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7059 break 7060 } 7061 v.reset(Op386ANDLmodify) 7062 v.AuxInt = off 7063 v.Aux = sym 7064 v.AddArg(ptr) 7065 v.AddArg(x) 7066 v.AddArg(mem) 7067 return true 7068 } 7069 // match: (MOVLstore {sym} [off] ptr y:(ANDL x l:(MOVLload [off] {sym} ptr mem)) mem) 7070 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7071 // result: (ANDLmodify [off] {sym} ptr x mem) 7072 for { 7073 off := v.AuxInt 7074 sym := v.Aux 7075 mem := v.Args[2] 7076 ptr := v.Args[0] 7077 y := v.Args[1] 7078 if y.Op != Op386ANDL { 7079 break 7080 } 7081 _ = y.Args[1] 7082 x := y.Args[0] 7083 l := y.Args[1] 7084 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7085 break 7086 } 7087 _ = l.Args[1] 7088 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7089 break 7090 } 7091 v.reset(Op386ANDLmodify) 7092 v.AuxInt = off 7093 v.Aux = sym 7094 v.AddArg(ptr) 7095 v.AddArg(x) 7096 v.AddArg(mem) 7097 return true 7098 } 7099 // match: (MOVLstore {sym} [off] ptr y:(ORL l:(MOVLload [off] {sym} ptr mem) x) mem) 7100 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7101 // result: (ORLmodify [off] {sym} ptr x mem) 7102 for { 7103 off := v.AuxInt 7104 sym := v.Aux 7105 mem := v.Args[2] 7106 ptr := v.Args[0] 7107 y := v.Args[1] 7108 if y.Op != Op386ORL { 7109 break 7110 } 7111 x := y.Args[1] 7112 l := y.Args[0] 7113 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7114 break 7115 } 7116 _ = l.Args[1] 7117 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7118 break 7119 } 7120 v.reset(Op386ORLmodify) 7121 v.AuxInt = off 7122 v.Aux = sym 7123 v.AddArg(ptr) 7124 v.AddArg(x) 7125 v.AddArg(mem) 7126 return true 7127 } 7128 // match: (MOVLstore {sym} [off] ptr y:(ORL x l:(MOVLload [off] {sym} ptr mem)) mem) 7129 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7130 // result: (ORLmodify [off] {sym} ptr x mem) 7131 for { 7132 off := v.AuxInt 7133 sym := v.Aux 7134 mem := v.Args[2] 7135 ptr := v.Args[0] 7136 y := v.Args[1] 7137 if y.Op != Op386ORL { 7138 break 7139 } 7140 _ = y.Args[1] 7141 x := y.Args[0] 7142 l := y.Args[1] 7143 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7144 break 7145 } 7146 _ = l.Args[1] 7147 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7148 break 7149 } 7150 v.reset(Op386ORLmodify) 7151 v.AuxInt = off 7152 v.Aux = sym 7153 v.AddArg(ptr) 7154 v.AddArg(x) 7155 v.AddArg(mem) 7156 return true 7157 } 7158 // match: (MOVLstore {sym} [off] ptr y:(XORL l:(MOVLload [off] {sym} ptr mem) x) mem) 7159 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7160 // result: (XORLmodify [off] {sym} ptr x mem) 7161 for { 7162 off := v.AuxInt 7163 sym := v.Aux 7164 mem := v.Args[2] 7165 ptr := v.Args[0] 7166 y := v.Args[1] 7167 if y.Op != Op386XORL { 7168 break 7169 } 7170 x := y.Args[1] 7171 l := y.Args[0] 7172 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7173 break 7174 } 7175 _ = l.Args[1] 7176 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7177 break 7178 } 7179 v.reset(Op386XORLmodify) 7180 v.AuxInt = off 7181 v.Aux = sym 7182 v.AddArg(ptr) 7183 v.AddArg(x) 7184 v.AddArg(mem) 7185 return true 7186 } 7187 // match: (MOVLstore {sym} [off] ptr y:(XORL x l:(MOVLload [off] {sym} ptr mem)) mem) 7188 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7189 // result: (XORLmodify [off] {sym} ptr x mem) 7190 for { 7191 off := v.AuxInt 7192 sym := v.Aux 7193 mem := v.Args[2] 7194 ptr := v.Args[0] 7195 y := v.Args[1] 7196 if y.Op != Op386XORL { 7197 break 7198 } 7199 _ = y.Args[1] 7200 x := y.Args[0] 7201 l := y.Args[1] 7202 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7203 break 7204 } 7205 _ = l.Args[1] 7206 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7207 break 7208 } 7209 v.reset(Op386XORLmodify) 7210 v.AuxInt = off 7211 v.Aux = sym 7212 v.AddArg(ptr) 7213 v.AddArg(x) 7214 v.AddArg(mem) 7215 return true 7216 } 7217 // match: (MOVLstore {sym} [off] ptr y:(ADDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) 7218 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 7219 // result: (ADDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) 7220 for { 7221 off := v.AuxInt 7222 sym := v.Aux 7223 mem := v.Args[2] 7224 ptr := v.Args[0] 7225 y := v.Args[1] 7226 if y.Op != Op386ADDLconst { 7227 break 7228 } 7229 c := y.AuxInt 7230 l := y.Args[0] 7231 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7232 break 7233 } 7234 _ = l.Args[1] 7235 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 7236 break 7237 } 7238 v.reset(Op386ADDLconstmodify) 7239 v.AuxInt = makeValAndOff(c, off) 7240 v.Aux = sym 7241 v.AddArg(ptr) 7242 v.AddArg(mem) 7243 return true 7244 } 7245 return false 7246 } 7247 func rewriteValue386_Op386MOVLstore_20(v *Value) bool { 7248 // match: (MOVLstore {sym} [off] ptr y:(ANDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) 7249 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 7250 // result: (ANDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) 7251 for { 7252 off := v.AuxInt 7253 sym := v.Aux 7254 mem := v.Args[2] 7255 ptr := v.Args[0] 7256 y := v.Args[1] 7257 if y.Op != Op386ANDLconst { 7258 break 7259 } 7260 c := y.AuxInt 7261 l := y.Args[0] 7262 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7263 break 7264 } 7265 _ = l.Args[1] 7266 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 7267 break 7268 } 7269 v.reset(Op386ANDLconstmodify) 7270 v.AuxInt = makeValAndOff(c, off) 7271 v.Aux = sym 7272 v.AddArg(ptr) 7273 v.AddArg(mem) 7274 return true 7275 } 7276 // match: (MOVLstore {sym} [off] ptr y:(ORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) 7277 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 7278 // result: (ORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) 7279 for { 7280 off := v.AuxInt 7281 sym := v.Aux 7282 mem := v.Args[2] 7283 ptr := v.Args[0] 7284 y := v.Args[1] 7285 if y.Op != Op386ORLconst { 7286 break 7287 } 7288 c := y.AuxInt 7289 l := y.Args[0] 7290 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7291 break 7292 } 7293 _ = l.Args[1] 7294 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 7295 break 7296 } 7297 v.reset(Op386ORLconstmodify) 7298 v.AuxInt = makeValAndOff(c, off) 7299 v.Aux = sym 7300 v.AddArg(ptr) 7301 v.AddArg(mem) 7302 return true 7303 } 7304 // match: (MOVLstore {sym} [off] ptr y:(XORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) 7305 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 7306 // result: (XORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) 7307 for { 7308 off := v.AuxInt 7309 sym := v.Aux 7310 mem := v.Args[2] 7311 ptr := v.Args[0] 7312 y := v.Args[1] 7313 if y.Op != Op386XORLconst { 7314 break 7315 } 7316 c := y.AuxInt 7317 l := y.Args[0] 7318 if l.Op != Op386MOVLload || l.AuxInt != off || l.Aux != sym { 7319 break 7320 } 7321 _ = l.Args[1] 7322 if ptr != l.Args[0] || mem != l.Args[1] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 7323 break 7324 } 7325 v.reset(Op386XORLconstmodify) 7326 v.AuxInt = makeValAndOff(c, off) 7327 v.Aux = sym 7328 v.AddArg(ptr) 7329 v.AddArg(mem) 7330 return true 7331 } 7332 return false 7333 } 7334 func rewriteValue386_Op386MOVLstoreconst_0(v *Value) bool { 7335 b := v.Block 7336 config := b.Func.Config 7337 // match: (MOVLstoreconst [sc] {s} (ADDLconst [off] ptr) mem) 7338 // cond: ValAndOff(sc).canAdd(off) 7339 // result: (MOVLstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 7340 for { 7341 sc := v.AuxInt 7342 s := v.Aux 7343 mem := v.Args[1] 7344 v_0 := v.Args[0] 7345 if v_0.Op != Op386ADDLconst { 7346 break 7347 } 7348 off := v_0.AuxInt 7349 ptr := v_0.Args[0] 7350 if !(ValAndOff(sc).canAdd(off)) { 7351 break 7352 } 7353 v.reset(Op386MOVLstoreconst) 7354 v.AuxInt = ValAndOff(sc).add(off) 7355 v.Aux = s 7356 v.AddArg(ptr) 7357 v.AddArg(mem) 7358 return true 7359 } 7360 // match: (MOVLstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem) 7361 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) 7362 // result: (MOVLstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 7363 for { 7364 sc := v.AuxInt 7365 sym1 := v.Aux 7366 mem := v.Args[1] 7367 v_0 := v.Args[0] 7368 if v_0.Op != Op386LEAL { 7369 break 7370 } 7371 off := v_0.AuxInt 7372 sym2 := v_0.Aux 7373 ptr := v_0.Args[0] 7374 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { 7375 break 7376 } 7377 v.reset(Op386MOVLstoreconst) 7378 v.AuxInt = ValAndOff(sc).add(off) 7379 v.Aux = mergeSym(sym1, sym2) 7380 v.AddArg(ptr) 7381 v.AddArg(mem) 7382 return true 7383 } 7384 // match: (MOVLstoreconst [x] {sym1} (LEAL1 [off] {sym2} ptr idx) mem) 7385 // cond: canMergeSym(sym1, sym2) 7386 // result: (MOVLstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem) 7387 for { 7388 x := v.AuxInt 7389 sym1 := v.Aux 7390 mem := v.Args[1] 7391 v_0 := v.Args[0] 7392 if v_0.Op != Op386LEAL1 { 7393 break 7394 } 7395 off := v_0.AuxInt 7396 sym2 := v_0.Aux 7397 idx := v_0.Args[1] 7398 ptr := v_0.Args[0] 7399 if !(canMergeSym(sym1, sym2)) { 7400 break 7401 } 7402 v.reset(Op386MOVLstoreconstidx1) 7403 v.AuxInt = ValAndOff(x).add(off) 7404 v.Aux = mergeSym(sym1, sym2) 7405 v.AddArg(ptr) 7406 v.AddArg(idx) 7407 v.AddArg(mem) 7408 return true 7409 } 7410 // match: (MOVLstoreconst [x] {sym1} (LEAL4 [off] {sym2} ptr idx) mem) 7411 // cond: canMergeSym(sym1, sym2) 7412 // result: (MOVLstoreconstidx4 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem) 7413 for { 7414 x := v.AuxInt 7415 sym1 := v.Aux 7416 mem := v.Args[1] 7417 v_0 := v.Args[0] 7418 if v_0.Op != Op386LEAL4 { 7419 break 7420 } 7421 off := v_0.AuxInt 7422 sym2 := v_0.Aux 7423 idx := v_0.Args[1] 7424 ptr := v_0.Args[0] 7425 if !(canMergeSym(sym1, sym2)) { 7426 break 7427 } 7428 v.reset(Op386MOVLstoreconstidx4) 7429 v.AuxInt = ValAndOff(x).add(off) 7430 v.Aux = mergeSym(sym1, sym2) 7431 v.AddArg(ptr) 7432 v.AddArg(idx) 7433 v.AddArg(mem) 7434 return true 7435 } 7436 // match: (MOVLstoreconst [x] {sym} (ADDL ptr idx) mem) 7437 // result: (MOVLstoreconstidx1 [x] {sym} ptr idx mem) 7438 for { 7439 x := v.AuxInt 7440 sym := v.Aux 7441 mem := v.Args[1] 7442 v_0 := v.Args[0] 7443 if v_0.Op != Op386ADDL { 7444 break 7445 } 7446 idx := v_0.Args[1] 7447 ptr := v_0.Args[0] 7448 v.reset(Op386MOVLstoreconstidx1) 7449 v.AuxInt = x 7450 v.Aux = sym 7451 v.AddArg(ptr) 7452 v.AddArg(idx) 7453 v.AddArg(mem) 7454 return true 7455 } 7456 return false 7457 } 7458 func rewriteValue386_Op386MOVLstoreconstidx1_0(v *Value) bool { 7459 // match: (MOVLstoreconstidx1 [c] {sym} ptr (SHLLconst [2] idx) mem) 7460 // result: (MOVLstoreconstidx4 [c] {sym} ptr idx mem) 7461 for { 7462 c := v.AuxInt 7463 sym := v.Aux 7464 mem := v.Args[2] 7465 ptr := v.Args[0] 7466 v_1 := v.Args[1] 7467 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 7468 break 7469 } 7470 idx := v_1.Args[0] 7471 v.reset(Op386MOVLstoreconstidx4) 7472 v.AuxInt = c 7473 v.Aux = sym 7474 v.AddArg(ptr) 7475 v.AddArg(idx) 7476 v.AddArg(mem) 7477 return true 7478 } 7479 // match: (MOVLstoreconstidx1 [x] {sym} (ADDLconst [c] ptr) idx mem) 7480 // result: (MOVLstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 7481 for { 7482 x := v.AuxInt 7483 sym := v.Aux 7484 mem := v.Args[2] 7485 v_0 := v.Args[0] 7486 if v_0.Op != Op386ADDLconst { 7487 break 7488 } 7489 c := v_0.AuxInt 7490 ptr := v_0.Args[0] 7491 idx := v.Args[1] 7492 v.reset(Op386MOVLstoreconstidx1) 7493 v.AuxInt = ValAndOff(x).add(c) 7494 v.Aux = sym 7495 v.AddArg(ptr) 7496 v.AddArg(idx) 7497 v.AddArg(mem) 7498 return true 7499 } 7500 // match: (MOVLstoreconstidx1 [x] {sym} ptr (ADDLconst [c] idx) mem) 7501 // result: (MOVLstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 7502 for { 7503 x := v.AuxInt 7504 sym := v.Aux 7505 mem := v.Args[2] 7506 ptr := v.Args[0] 7507 v_1 := v.Args[1] 7508 if v_1.Op != Op386ADDLconst { 7509 break 7510 } 7511 c := v_1.AuxInt 7512 idx := v_1.Args[0] 7513 v.reset(Op386MOVLstoreconstidx1) 7514 v.AuxInt = ValAndOff(x).add(c) 7515 v.Aux = sym 7516 v.AddArg(ptr) 7517 v.AddArg(idx) 7518 v.AddArg(mem) 7519 return true 7520 } 7521 return false 7522 } 7523 func rewriteValue386_Op386MOVLstoreconstidx4_0(v *Value) bool { 7524 // match: (MOVLstoreconstidx4 [x] {sym} (ADDLconst [c] ptr) idx mem) 7525 // result: (MOVLstoreconstidx4 [ValAndOff(x).add(c)] {sym} ptr idx mem) 7526 for { 7527 x := v.AuxInt 7528 sym := v.Aux 7529 mem := v.Args[2] 7530 v_0 := v.Args[0] 7531 if v_0.Op != Op386ADDLconst { 7532 break 7533 } 7534 c := v_0.AuxInt 7535 ptr := v_0.Args[0] 7536 idx := v.Args[1] 7537 v.reset(Op386MOVLstoreconstidx4) 7538 v.AuxInt = ValAndOff(x).add(c) 7539 v.Aux = sym 7540 v.AddArg(ptr) 7541 v.AddArg(idx) 7542 v.AddArg(mem) 7543 return true 7544 } 7545 // match: (MOVLstoreconstidx4 [x] {sym} ptr (ADDLconst [c] idx) mem) 7546 // result: (MOVLstoreconstidx4 [ValAndOff(x).add(4*c)] {sym} ptr idx mem) 7547 for { 7548 x := v.AuxInt 7549 sym := v.Aux 7550 mem := v.Args[2] 7551 ptr := v.Args[0] 7552 v_1 := v.Args[1] 7553 if v_1.Op != Op386ADDLconst { 7554 break 7555 } 7556 c := v_1.AuxInt 7557 idx := v_1.Args[0] 7558 v.reset(Op386MOVLstoreconstidx4) 7559 v.AuxInt = ValAndOff(x).add(4 * c) 7560 v.Aux = sym 7561 v.AddArg(ptr) 7562 v.AddArg(idx) 7563 v.AddArg(mem) 7564 return true 7565 } 7566 return false 7567 } 7568 func rewriteValue386_Op386MOVLstoreidx1_0(v *Value) bool { 7569 // match: (MOVLstoreidx1 [c] {sym} ptr (SHLLconst [2] idx) val mem) 7570 // result: (MOVLstoreidx4 [c] {sym} ptr idx val mem) 7571 for { 7572 c := v.AuxInt 7573 sym := v.Aux 7574 mem := v.Args[3] 7575 ptr := v.Args[0] 7576 v_1 := v.Args[1] 7577 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 2 { 7578 break 7579 } 7580 idx := v_1.Args[0] 7581 val := v.Args[2] 7582 v.reset(Op386MOVLstoreidx4) 7583 v.AuxInt = c 7584 v.Aux = sym 7585 v.AddArg(ptr) 7586 v.AddArg(idx) 7587 v.AddArg(val) 7588 v.AddArg(mem) 7589 return true 7590 } 7591 // match: (MOVLstoreidx1 [c] {sym} (SHLLconst [2] idx) ptr val mem) 7592 // result: (MOVLstoreidx4 [c] {sym} ptr idx val mem) 7593 for { 7594 c := v.AuxInt 7595 sym := v.Aux 7596 mem := v.Args[3] 7597 v_0 := v.Args[0] 7598 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 2 { 7599 break 7600 } 7601 idx := v_0.Args[0] 7602 ptr := v.Args[1] 7603 val := v.Args[2] 7604 v.reset(Op386MOVLstoreidx4) 7605 v.AuxInt = c 7606 v.Aux = sym 7607 v.AddArg(ptr) 7608 v.AddArg(idx) 7609 v.AddArg(val) 7610 v.AddArg(mem) 7611 return true 7612 } 7613 // match: (MOVLstoreidx1 [c] {sym} (ADDLconst [d] ptr) idx val mem) 7614 // result: (MOVLstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 7615 for { 7616 c := v.AuxInt 7617 sym := v.Aux 7618 mem := v.Args[3] 7619 v_0 := v.Args[0] 7620 if v_0.Op != Op386ADDLconst { 7621 break 7622 } 7623 d := v_0.AuxInt 7624 ptr := v_0.Args[0] 7625 idx := v.Args[1] 7626 val := v.Args[2] 7627 v.reset(Op386MOVLstoreidx1) 7628 v.AuxInt = int64(int32(c + d)) 7629 v.Aux = sym 7630 v.AddArg(ptr) 7631 v.AddArg(idx) 7632 v.AddArg(val) 7633 v.AddArg(mem) 7634 return true 7635 } 7636 // match: (MOVLstoreidx1 [c] {sym} idx (ADDLconst [d] ptr) val mem) 7637 // result: (MOVLstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 7638 for { 7639 c := v.AuxInt 7640 sym := v.Aux 7641 mem := v.Args[3] 7642 idx := v.Args[0] 7643 v_1 := v.Args[1] 7644 if v_1.Op != Op386ADDLconst { 7645 break 7646 } 7647 d := v_1.AuxInt 7648 ptr := v_1.Args[0] 7649 val := v.Args[2] 7650 v.reset(Op386MOVLstoreidx1) 7651 v.AuxInt = int64(int32(c + d)) 7652 v.Aux = sym 7653 v.AddArg(ptr) 7654 v.AddArg(idx) 7655 v.AddArg(val) 7656 v.AddArg(mem) 7657 return true 7658 } 7659 // match: (MOVLstoreidx1 [c] {sym} ptr (ADDLconst [d] idx) val mem) 7660 // result: (MOVLstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 7661 for { 7662 c := v.AuxInt 7663 sym := v.Aux 7664 mem := v.Args[3] 7665 ptr := v.Args[0] 7666 v_1 := v.Args[1] 7667 if v_1.Op != Op386ADDLconst { 7668 break 7669 } 7670 d := v_1.AuxInt 7671 idx := v_1.Args[0] 7672 val := v.Args[2] 7673 v.reset(Op386MOVLstoreidx1) 7674 v.AuxInt = int64(int32(c + d)) 7675 v.Aux = sym 7676 v.AddArg(ptr) 7677 v.AddArg(idx) 7678 v.AddArg(val) 7679 v.AddArg(mem) 7680 return true 7681 } 7682 // match: (MOVLstoreidx1 [c] {sym} (ADDLconst [d] idx) ptr val mem) 7683 // result: (MOVLstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 7684 for { 7685 c := v.AuxInt 7686 sym := v.Aux 7687 mem := v.Args[3] 7688 v_0 := v.Args[0] 7689 if v_0.Op != Op386ADDLconst { 7690 break 7691 } 7692 d := v_0.AuxInt 7693 idx := v_0.Args[0] 7694 ptr := v.Args[1] 7695 val := v.Args[2] 7696 v.reset(Op386MOVLstoreidx1) 7697 v.AuxInt = int64(int32(c + d)) 7698 v.Aux = sym 7699 v.AddArg(ptr) 7700 v.AddArg(idx) 7701 v.AddArg(val) 7702 v.AddArg(mem) 7703 return true 7704 } 7705 return false 7706 } 7707 func rewriteValue386_Op386MOVLstoreidx4_0(v *Value) bool { 7708 // match: (MOVLstoreidx4 [c] {sym} (ADDLconst [d] ptr) idx val mem) 7709 // result: (MOVLstoreidx4 [int64(int32(c+d))] {sym} ptr idx val mem) 7710 for { 7711 c := v.AuxInt 7712 sym := v.Aux 7713 mem := v.Args[3] 7714 v_0 := v.Args[0] 7715 if v_0.Op != Op386ADDLconst { 7716 break 7717 } 7718 d := v_0.AuxInt 7719 ptr := v_0.Args[0] 7720 idx := v.Args[1] 7721 val := v.Args[2] 7722 v.reset(Op386MOVLstoreidx4) 7723 v.AuxInt = int64(int32(c + d)) 7724 v.Aux = sym 7725 v.AddArg(ptr) 7726 v.AddArg(idx) 7727 v.AddArg(val) 7728 v.AddArg(mem) 7729 return true 7730 } 7731 // match: (MOVLstoreidx4 [c] {sym} ptr (ADDLconst [d] idx) val mem) 7732 // result: (MOVLstoreidx4 [int64(int32(c+4*d))] {sym} ptr idx val mem) 7733 for { 7734 c := v.AuxInt 7735 sym := v.Aux 7736 mem := v.Args[3] 7737 ptr := v.Args[0] 7738 v_1 := v.Args[1] 7739 if v_1.Op != Op386ADDLconst { 7740 break 7741 } 7742 d := v_1.AuxInt 7743 idx := v_1.Args[0] 7744 val := v.Args[2] 7745 v.reset(Op386MOVLstoreidx4) 7746 v.AuxInt = int64(int32(c + 4*d)) 7747 v.Aux = sym 7748 v.AddArg(ptr) 7749 v.AddArg(idx) 7750 v.AddArg(val) 7751 v.AddArg(mem) 7752 return true 7753 } 7754 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ADDLloadidx4 x [off] {sym} ptr idx mem) mem) 7755 // cond: y.Uses==1 && clobber(y) 7756 // result: (ADDLmodifyidx4 [off] {sym} ptr idx x mem) 7757 for { 7758 off := v.AuxInt 7759 sym := v.Aux 7760 mem := v.Args[3] 7761 ptr := v.Args[0] 7762 idx := v.Args[1] 7763 y := v.Args[2] 7764 if y.Op != Op386ADDLloadidx4 || y.AuxInt != off || y.Aux != sym { 7765 break 7766 } 7767 _ = y.Args[3] 7768 x := y.Args[0] 7769 if ptr != y.Args[1] || idx != y.Args[2] || mem != y.Args[3] || !(y.Uses == 1 && clobber(y)) { 7770 break 7771 } 7772 v.reset(Op386ADDLmodifyidx4) 7773 v.AuxInt = off 7774 v.Aux = sym 7775 v.AddArg(ptr) 7776 v.AddArg(idx) 7777 v.AddArg(x) 7778 v.AddArg(mem) 7779 return true 7780 } 7781 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ANDLloadidx4 x [off] {sym} ptr idx mem) mem) 7782 // cond: y.Uses==1 && clobber(y) 7783 // result: (ANDLmodifyidx4 [off] {sym} ptr idx x mem) 7784 for { 7785 off := v.AuxInt 7786 sym := v.Aux 7787 mem := v.Args[3] 7788 ptr := v.Args[0] 7789 idx := v.Args[1] 7790 y := v.Args[2] 7791 if y.Op != Op386ANDLloadidx4 || y.AuxInt != off || y.Aux != sym { 7792 break 7793 } 7794 _ = y.Args[3] 7795 x := y.Args[0] 7796 if ptr != y.Args[1] || idx != y.Args[2] || mem != y.Args[3] || !(y.Uses == 1 && clobber(y)) { 7797 break 7798 } 7799 v.reset(Op386ANDLmodifyidx4) 7800 v.AuxInt = off 7801 v.Aux = sym 7802 v.AddArg(ptr) 7803 v.AddArg(idx) 7804 v.AddArg(x) 7805 v.AddArg(mem) 7806 return true 7807 } 7808 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ORLloadidx4 x [off] {sym} ptr idx mem) mem) 7809 // cond: y.Uses==1 && clobber(y) 7810 // result: (ORLmodifyidx4 [off] {sym} ptr idx x mem) 7811 for { 7812 off := v.AuxInt 7813 sym := v.Aux 7814 mem := v.Args[3] 7815 ptr := v.Args[0] 7816 idx := v.Args[1] 7817 y := v.Args[2] 7818 if y.Op != Op386ORLloadidx4 || y.AuxInt != off || y.Aux != sym { 7819 break 7820 } 7821 _ = y.Args[3] 7822 x := y.Args[0] 7823 if ptr != y.Args[1] || idx != y.Args[2] || mem != y.Args[3] || !(y.Uses == 1 && clobber(y)) { 7824 break 7825 } 7826 v.reset(Op386ORLmodifyidx4) 7827 v.AuxInt = off 7828 v.Aux = sym 7829 v.AddArg(ptr) 7830 v.AddArg(idx) 7831 v.AddArg(x) 7832 v.AddArg(mem) 7833 return true 7834 } 7835 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(XORLloadidx4 x [off] {sym} ptr idx mem) mem) 7836 // cond: y.Uses==1 && clobber(y) 7837 // result: (XORLmodifyidx4 [off] {sym} ptr idx x mem) 7838 for { 7839 off := v.AuxInt 7840 sym := v.Aux 7841 mem := v.Args[3] 7842 ptr := v.Args[0] 7843 idx := v.Args[1] 7844 y := v.Args[2] 7845 if y.Op != Op386XORLloadidx4 || y.AuxInt != off || y.Aux != sym { 7846 break 7847 } 7848 _ = y.Args[3] 7849 x := y.Args[0] 7850 if ptr != y.Args[1] || idx != y.Args[2] || mem != y.Args[3] || !(y.Uses == 1 && clobber(y)) { 7851 break 7852 } 7853 v.reset(Op386XORLmodifyidx4) 7854 v.AuxInt = off 7855 v.Aux = sym 7856 v.AddArg(ptr) 7857 v.AddArg(idx) 7858 v.AddArg(x) 7859 v.AddArg(mem) 7860 return true 7861 } 7862 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ADDL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) mem) 7863 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7864 // result: (ADDLmodifyidx4 [off] {sym} ptr idx x mem) 7865 for { 7866 off := v.AuxInt 7867 sym := v.Aux 7868 mem := v.Args[3] 7869 ptr := v.Args[0] 7870 idx := v.Args[1] 7871 y := v.Args[2] 7872 if y.Op != Op386ADDL { 7873 break 7874 } 7875 x := y.Args[1] 7876 l := y.Args[0] 7877 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 7878 break 7879 } 7880 _ = l.Args[2] 7881 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7882 break 7883 } 7884 v.reset(Op386ADDLmodifyidx4) 7885 v.AuxInt = off 7886 v.Aux = sym 7887 v.AddArg(ptr) 7888 v.AddArg(idx) 7889 v.AddArg(x) 7890 v.AddArg(mem) 7891 return true 7892 } 7893 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ADDL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 7894 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7895 // result: (ADDLmodifyidx4 [off] {sym} ptr idx x mem) 7896 for { 7897 off := v.AuxInt 7898 sym := v.Aux 7899 mem := v.Args[3] 7900 ptr := v.Args[0] 7901 idx := v.Args[1] 7902 y := v.Args[2] 7903 if y.Op != Op386ADDL { 7904 break 7905 } 7906 _ = y.Args[1] 7907 x := y.Args[0] 7908 l := y.Args[1] 7909 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 7910 break 7911 } 7912 _ = l.Args[2] 7913 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7914 break 7915 } 7916 v.reset(Op386ADDLmodifyidx4) 7917 v.AuxInt = off 7918 v.Aux = sym 7919 v.AddArg(ptr) 7920 v.AddArg(idx) 7921 v.AddArg(x) 7922 v.AddArg(mem) 7923 return true 7924 } 7925 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(SUBL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) mem) 7926 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7927 // result: (SUBLmodifyidx4 [off] {sym} ptr idx x mem) 7928 for { 7929 off := v.AuxInt 7930 sym := v.Aux 7931 mem := v.Args[3] 7932 ptr := v.Args[0] 7933 idx := v.Args[1] 7934 y := v.Args[2] 7935 if y.Op != Op386SUBL { 7936 break 7937 } 7938 x := y.Args[1] 7939 l := y.Args[0] 7940 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 7941 break 7942 } 7943 _ = l.Args[2] 7944 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7945 break 7946 } 7947 v.reset(Op386SUBLmodifyidx4) 7948 v.AuxInt = off 7949 v.Aux = sym 7950 v.AddArg(ptr) 7951 v.AddArg(idx) 7952 v.AddArg(x) 7953 v.AddArg(mem) 7954 return true 7955 } 7956 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ANDL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) mem) 7957 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7958 // result: (ANDLmodifyidx4 [off] {sym} ptr idx x mem) 7959 for { 7960 off := v.AuxInt 7961 sym := v.Aux 7962 mem := v.Args[3] 7963 ptr := v.Args[0] 7964 idx := v.Args[1] 7965 y := v.Args[2] 7966 if y.Op != Op386ANDL { 7967 break 7968 } 7969 x := y.Args[1] 7970 l := y.Args[0] 7971 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 7972 break 7973 } 7974 _ = l.Args[2] 7975 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 7976 break 7977 } 7978 v.reset(Op386ANDLmodifyidx4) 7979 v.AuxInt = off 7980 v.Aux = sym 7981 v.AddArg(ptr) 7982 v.AddArg(idx) 7983 v.AddArg(x) 7984 v.AddArg(mem) 7985 return true 7986 } 7987 return false 7988 } 7989 func rewriteValue386_Op386MOVLstoreidx4_10(v *Value) bool { 7990 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ANDL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 7991 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 7992 // result: (ANDLmodifyidx4 [off] {sym} ptr idx x mem) 7993 for { 7994 off := v.AuxInt 7995 sym := v.Aux 7996 mem := v.Args[3] 7997 ptr := v.Args[0] 7998 idx := v.Args[1] 7999 y := v.Args[2] 8000 if y.Op != Op386ANDL { 8001 break 8002 } 8003 _ = y.Args[1] 8004 x := y.Args[0] 8005 l := y.Args[1] 8006 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8007 break 8008 } 8009 _ = l.Args[2] 8010 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 8011 break 8012 } 8013 v.reset(Op386ANDLmodifyidx4) 8014 v.AuxInt = off 8015 v.Aux = sym 8016 v.AddArg(ptr) 8017 v.AddArg(idx) 8018 v.AddArg(x) 8019 v.AddArg(mem) 8020 return true 8021 } 8022 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ORL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) mem) 8023 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 8024 // result: (ORLmodifyidx4 [off] {sym} ptr idx x mem) 8025 for { 8026 off := v.AuxInt 8027 sym := v.Aux 8028 mem := v.Args[3] 8029 ptr := v.Args[0] 8030 idx := v.Args[1] 8031 y := v.Args[2] 8032 if y.Op != Op386ORL { 8033 break 8034 } 8035 x := y.Args[1] 8036 l := y.Args[0] 8037 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8038 break 8039 } 8040 _ = l.Args[2] 8041 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 8042 break 8043 } 8044 v.reset(Op386ORLmodifyidx4) 8045 v.AuxInt = off 8046 v.Aux = sym 8047 v.AddArg(ptr) 8048 v.AddArg(idx) 8049 v.AddArg(x) 8050 v.AddArg(mem) 8051 return true 8052 } 8053 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ORL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8054 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 8055 // result: (ORLmodifyidx4 [off] {sym} ptr idx x mem) 8056 for { 8057 off := v.AuxInt 8058 sym := v.Aux 8059 mem := v.Args[3] 8060 ptr := v.Args[0] 8061 idx := v.Args[1] 8062 y := v.Args[2] 8063 if y.Op != Op386ORL { 8064 break 8065 } 8066 _ = y.Args[1] 8067 x := y.Args[0] 8068 l := y.Args[1] 8069 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8070 break 8071 } 8072 _ = l.Args[2] 8073 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 8074 break 8075 } 8076 v.reset(Op386ORLmodifyidx4) 8077 v.AuxInt = off 8078 v.Aux = sym 8079 v.AddArg(ptr) 8080 v.AddArg(idx) 8081 v.AddArg(x) 8082 v.AddArg(mem) 8083 return true 8084 } 8085 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(XORL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) mem) 8086 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 8087 // result: (XORLmodifyidx4 [off] {sym} ptr idx x mem) 8088 for { 8089 off := v.AuxInt 8090 sym := v.Aux 8091 mem := v.Args[3] 8092 ptr := v.Args[0] 8093 idx := v.Args[1] 8094 y := v.Args[2] 8095 if y.Op != Op386XORL { 8096 break 8097 } 8098 x := y.Args[1] 8099 l := y.Args[0] 8100 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8101 break 8102 } 8103 _ = l.Args[2] 8104 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 8105 break 8106 } 8107 v.reset(Op386XORLmodifyidx4) 8108 v.AuxInt = off 8109 v.Aux = sym 8110 v.AddArg(ptr) 8111 v.AddArg(idx) 8112 v.AddArg(x) 8113 v.AddArg(mem) 8114 return true 8115 } 8116 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(XORL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8117 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) 8118 // result: (XORLmodifyidx4 [off] {sym} ptr idx x mem) 8119 for { 8120 off := v.AuxInt 8121 sym := v.Aux 8122 mem := v.Args[3] 8123 ptr := v.Args[0] 8124 idx := v.Args[1] 8125 y := v.Args[2] 8126 if y.Op != Op386XORL { 8127 break 8128 } 8129 _ = y.Args[1] 8130 x := y.Args[0] 8131 l := y.Args[1] 8132 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8133 break 8134 } 8135 _ = l.Args[2] 8136 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) { 8137 break 8138 } 8139 v.reset(Op386XORLmodifyidx4) 8140 v.AuxInt = off 8141 v.Aux = sym 8142 v.AddArg(ptr) 8143 v.AddArg(idx) 8144 v.AddArg(x) 8145 v.AddArg(mem) 8146 return true 8147 } 8148 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ADDLconst [c] l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8149 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 8150 // result: (ADDLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 8151 for { 8152 off := v.AuxInt 8153 sym := v.Aux 8154 mem := v.Args[3] 8155 ptr := v.Args[0] 8156 idx := v.Args[1] 8157 y := v.Args[2] 8158 if y.Op != Op386ADDLconst { 8159 break 8160 } 8161 c := y.AuxInt 8162 l := y.Args[0] 8163 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8164 break 8165 } 8166 _ = l.Args[2] 8167 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 8168 break 8169 } 8170 v.reset(Op386ADDLconstmodifyidx4) 8171 v.AuxInt = makeValAndOff(c, off) 8172 v.Aux = sym 8173 v.AddArg(ptr) 8174 v.AddArg(idx) 8175 v.AddArg(mem) 8176 return true 8177 } 8178 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ANDLconst [c] l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8179 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 8180 // result: (ANDLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 8181 for { 8182 off := v.AuxInt 8183 sym := v.Aux 8184 mem := v.Args[3] 8185 ptr := v.Args[0] 8186 idx := v.Args[1] 8187 y := v.Args[2] 8188 if y.Op != Op386ANDLconst { 8189 break 8190 } 8191 c := y.AuxInt 8192 l := y.Args[0] 8193 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8194 break 8195 } 8196 _ = l.Args[2] 8197 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 8198 break 8199 } 8200 v.reset(Op386ANDLconstmodifyidx4) 8201 v.AuxInt = makeValAndOff(c, off) 8202 v.Aux = sym 8203 v.AddArg(ptr) 8204 v.AddArg(idx) 8205 v.AddArg(mem) 8206 return true 8207 } 8208 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(ORLconst [c] l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8209 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 8210 // result: (ORLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 8211 for { 8212 off := v.AuxInt 8213 sym := v.Aux 8214 mem := v.Args[3] 8215 ptr := v.Args[0] 8216 idx := v.Args[1] 8217 y := v.Args[2] 8218 if y.Op != Op386ORLconst { 8219 break 8220 } 8221 c := y.AuxInt 8222 l := y.Args[0] 8223 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8224 break 8225 } 8226 _ = l.Args[2] 8227 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 8228 break 8229 } 8230 v.reset(Op386ORLconstmodifyidx4) 8231 v.AuxInt = makeValAndOff(c, off) 8232 v.Aux = sym 8233 v.AddArg(ptr) 8234 v.AddArg(idx) 8235 v.AddArg(mem) 8236 return true 8237 } 8238 // match: (MOVLstoreidx4 {sym} [off] ptr idx y:(XORLconst [c] l:(MOVLloadidx4 [off] {sym} ptr idx mem)) mem) 8239 // cond: y.Uses==1 && l.Uses==1 && clobber(y) && clobber(l) && validValAndOff(c,off) 8240 // result: (XORLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 8241 for { 8242 off := v.AuxInt 8243 sym := v.Aux 8244 mem := v.Args[3] 8245 ptr := v.Args[0] 8246 idx := v.Args[1] 8247 y := v.Args[2] 8248 if y.Op != Op386XORLconst { 8249 break 8250 } 8251 c := y.AuxInt 8252 l := y.Args[0] 8253 if l.Op != Op386MOVLloadidx4 || l.AuxInt != off || l.Aux != sym { 8254 break 8255 } 8256 _ = l.Args[2] 8257 if ptr != l.Args[0] || idx != l.Args[1] || mem != l.Args[2] || !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) { 8258 break 8259 } 8260 v.reset(Op386XORLconstmodifyidx4) 8261 v.AuxInt = makeValAndOff(c, off) 8262 v.Aux = sym 8263 v.AddArg(ptr) 8264 v.AddArg(idx) 8265 v.AddArg(mem) 8266 return true 8267 } 8268 return false 8269 } 8270 func rewriteValue386_Op386MOVSDconst_0(v *Value) bool { 8271 b := v.Block 8272 config := b.Func.Config 8273 typ := &b.Func.Config.Types 8274 // match: (MOVSDconst [c]) 8275 // cond: config.ctxt.Flag_shared 8276 // result: (MOVSDconst2 (MOVSDconst1 [c])) 8277 for { 8278 c := v.AuxInt 8279 if !(config.ctxt.Flag_shared) { 8280 break 8281 } 8282 v.reset(Op386MOVSDconst2) 8283 v0 := b.NewValue0(v.Pos, Op386MOVSDconst1, typ.UInt32) 8284 v0.AuxInt = c 8285 v.AddArg(v0) 8286 return true 8287 } 8288 return false 8289 } 8290 func rewriteValue386_Op386MOVSDload_0(v *Value) bool { 8291 b := v.Block 8292 config := b.Func.Config 8293 // match: (MOVSDload [off1] {sym} (ADDLconst [off2] ptr) mem) 8294 // cond: is32Bit(off1+off2) 8295 // result: (MOVSDload [off1+off2] {sym} ptr mem) 8296 for { 8297 off1 := v.AuxInt 8298 sym := v.Aux 8299 mem := v.Args[1] 8300 v_0 := v.Args[0] 8301 if v_0.Op != Op386ADDLconst { 8302 break 8303 } 8304 off2 := v_0.AuxInt 8305 ptr := v_0.Args[0] 8306 if !(is32Bit(off1 + off2)) { 8307 break 8308 } 8309 v.reset(Op386MOVSDload) 8310 v.AuxInt = off1 + off2 8311 v.Aux = sym 8312 v.AddArg(ptr) 8313 v.AddArg(mem) 8314 return true 8315 } 8316 // match: (MOVSDload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 8317 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 8318 // result: (MOVSDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8319 for { 8320 off1 := v.AuxInt 8321 sym1 := v.Aux 8322 mem := v.Args[1] 8323 v_0 := v.Args[0] 8324 if v_0.Op != Op386LEAL { 8325 break 8326 } 8327 off2 := v_0.AuxInt 8328 sym2 := v_0.Aux 8329 base := v_0.Args[0] 8330 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 8331 break 8332 } 8333 v.reset(Op386MOVSDload) 8334 v.AuxInt = off1 + off2 8335 v.Aux = mergeSym(sym1, sym2) 8336 v.AddArg(base) 8337 v.AddArg(mem) 8338 return true 8339 } 8340 // match: (MOVSDload [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) mem) 8341 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8342 // result: (MOVSDloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 8343 for { 8344 off1 := v.AuxInt 8345 sym1 := v.Aux 8346 mem := v.Args[1] 8347 v_0 := v.Args[0] 8348 if v_0.Op != Op386LEAL1 { 8349 break 8350 } 8351 off2 := v_0.AuxInt 8352 sym2 := v_0.Aux 8353 idx := v_0.Args[1] 8354 ptr := v_0.Args[0] 8355 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8356 break 8357 } 8358 v.reset(Op386MOVSDloadidx1) 8359 v.AuxInt = off1 + off2 8360 v.Aux = mergeSym(sym1, sym2) 8361 v.AddArg(ptr) 8362 v.AddArg(idx) 8363 v.AddArg(mem) 8364 return true 8365 } 8366 // match: (MOVSDload [off1] {sym1} (LEAL8 [off2] {sym2} ptr idx) mem) 8367 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8368 // result: (MOVSDloadidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 8369 for { 8370 off1 := v.AuxInt 8371 sym1 := v.Aux 8372 mem := v.Args[1] 8373 v_0 := v.Args[0] 8374 if v_0.Op != Op386LEAL8 { 8375 break 8376 } 8377 off2 := v_0.AuxInt 8378 sym2 := v_0.Aux 8379 idx := v_0.Args[1] 8380 ptr := v_0.Args[0] 8381 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8382 break 8383 } 8384 v.reset(Op386MOVSDloadidx8) 8385 v.AuxInt = off1 + off2 8386 v.Aux = mergeSym(sym1, sym2) 8387 v.AddArg(ptr) 8388 v.AddArg(idx) 8389 v.AddArg(mem) 8390 return true 8391 } 8392 // match: (MOVSDload [off] {sym} (ADDL ptr idx) mem) 8393 // cond: ptr.Op != OpSB 8394 // result: (MOVSDloadidx1 [off] {sym} ptr idx mem) 8395 for { 8396 off := v.AuxInt 8397 sym := v.Aux 8398 mem := v.Args[1] 8399 v_0 := v.Args[0] 8400 if v_0.Op != Op386ADDL { 8401 break 8402 } 8403 idx := v_0.Args[1] 8404 ptr := v_0.Args[0] 8405 if !(ptr.Op != OpSB) { 8406 break 8407 } 8408 v.reset(Op386MOVSDloadidx1) 8409 v.AuxInt = off 8410 v.Aux = sym 8411 v.AddArg(ptr) 8412 v.AddArg(idx) 8413 v.AddArg(mem) 8414 return true 8415 } 8416 return false 8417 } 8418 func rewriteValue386_Op386MOVSDloadidx1_0(v *Value) bool { 8419 // match: (MOVSDloadidx1 [c] {sym} (ADDLconst [d] ptr) idx mem) 8420 // result: (MOVSDloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 8421 for { 8422 c := v.AuxInt 8423 sym := v.Aux 8424 mem := v.Args[2] 8425 v_0 := v.Args[0] 8426 if v_0.Op != Op386ADDLconst { 8427 break 8428 } 8429 d := v_0.AuxInt 8430 ptr := v_0.Args[0] 8431 idx := v.Args[1] 8432 v.reset(Op386MOVSDloadidx1) 8433 v.AuxInt = int64(int32(c + d)) 8434 v.Aux = sym 8435 v.AddArg(ptr) 8436 v.AddArg(idx) 8437 v.AddArg(mem) 8438 return true 8439 } 8440 // match: (MOVSDloadidx1 [c] {sym} ptr (ADDLconst [d] idx) mem) 8441 // result: (MOVSDloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 8442 for { 8443 c := v.AuxInt 8444 sym := v.Aux 8445 mem := v.Args[2] 8446 ptr := v.Args[0] 8447 v_1 := v.Args[1] 8448 if v_1.Op != Op386ADDLconst { 8449 break 8450 } 8451 d := v_1.AuxInt 8452 idx := v_1.Args[0] 8453 v.reset(Op386MOVSDloadidx1) 8454 v.AuxInt = int64(int32(c + d)) 8455 v.Aux = sym 8456 v.AddArg(ptr) 8457 v.AddArg(idx) 8458 v.AddArg(mem) 8459 return true 8460 } 8461 return false 8462 } 8463 func rewriteValue386_Op386MOVSDloadidx8_0(v *Value) bool { 8464 // match: (MOVSDloadidx8 [c] {sym} (ADDLconst [d] ptr) idx mem) 8465 // result: (MOVSDloadidx8 [int64(int32(c+d))] {sym} ptr idx mem) 8466 for { 8467 c := v.AuxInt 8468 sym := v.Aux 8469 mem := v.Args[2] 8470 v_0 := v.Args[0] 8471 if v_0.Op != Op386ADDLconst { 8472 break 8473 } 8474 d := v_0.AuxInt 8475 ptr := v_0.Args[0] 8476 idx := v.Args[1] 8477 v.reset(Op386MOVSDloadidx8) 8478 v.AuxInt = int64(int32(c + d)) 8479 v.Aux = sym 8480 v.AddArg(ptr) 8481 v.AddArg(idx) 8482 v.AddArg(mem) 8483 return true 8484 } 8485 // match: (MOVSDloadidx8 [c] {sym} ptr (ADDLconst [d] idx) mem) 8486 // result: (MOVSDloadidx8 [int64(int32(c+8*d))] {sym} ptr idx mem) 8487 for { 8488 c := v.AuxInt 8489 sym := v.Aux 8490 mem := v.Args[2] 8491 ptr := v.Args[0] 8492 v_1 := v.Args[1] 8493 if v_1.Op != Op386ADDLconst { 8494 break 8495 } 8496 d := v_1.AuxInt 8497 idx := v_1.Args[0] 8498 v.reset(Op386MOVSDloadidx8) 8499 v.AuxInt = int64(int32(c + 8*d)) 8500 v.Aux = sym 8501 v.AddArg(ptr) 8502 v.AddArg(idx) 8503 v.AddArg(mem) 8504 return true 8505 } 8506 return false 8507 } 8508 func rewriteValue386_Op386MOVSDstore_0(v *Value) bool { 8509 b := v.Block 8510 config := b.Func.Config 8511 // match: (MOVSDstore [off1] {sym} (ADDLconst [off2] ptr) val mem) 8512 // cond: is32Bit(off1+off2) 8513 // result: (MOVSDstore [off1+off2] {sym} ptr val mem) 8514 for { 8515 off1 := v.AuxInt 8516 sym := v.Aux 8517 mem := v.Args[2] 8518 v_0 := v.Args[0] 8519 if v_0.Op != Op386ADDLconst { 8520 break 8521 } 8522 off2 := v_0.AuxInt 8523 ptr := v_0.Args[0] 8524 val := v.Args[1] 8525 if !(is32Bit(off1 + off2)) { 8526 break 8527 } 8528 v.reset(Op386MOVSDstore) 8529 v.AuxInt = off1 + off2 8530 v.Aux = sym 8531 v.AddArg(ptr) 8532 v.AddArg(val) 8533 v.AddArg(mem) 8534 return true 8535 } 8536 // match: (MOVSDstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 8537 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 8538 // result: (MOVSDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8539 for { 8540 off1 := v.AuxInt 8541 sym1 := v.Aux 8542 mem := v.Args[2] 8543 v_0 := v.Args[0] 8544 if v_0.Op != Op386LEAL { 8545 break 8546 } 8547 off2 := v_0.AuxInt 8548 sym2 := v_0.Aux 8549 base := v_0.Args[0] 8550 val := v.Args[1] 8551 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 8552 break 8553 } 8554 v.reset(Op386MOVSDstore) 8555 v.AuxInt = off1 + off2 8556 v.Aux = mergeSym(sym1, sym2) 8557 v.AddArg(base) 8558 v.AddArg(val) 8559 v.AddArg(mem) 8560 return true 8561 } 8562 // match: (MOVSDstore [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) val mem) 8563 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8564 // result: (MOVSDstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8565 for { 8566 off1 := v.AuxInt 8567 sym1 := v.Aux 8568 mem := v.Args[2] 8569 v_0 := v.Args[0] 8570 if v_0.Op != Op386LEAL1 { 8571 break 8572 } 8573 off2 := v_0.AuxInt 8574 sym2 := v_0.Aux 8575 idx := v_0.Args[1] 8576 ptr := v_0.Args[0] 8577 val := v.Args[1] 8578 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8579 break 8580 } 8581 v.reset(Op386MOVSDstoreidx1) 8582 v.AuxInt = off1 + off2 8583 v.Aux = mergeSym(sym1, sym2) 8584 v.AddArg(ptr) 8585 v.AddArg(idx) 8586 v.AddArg(val) 8587 v.AddArg(mem) 8588 return true 8589 } 8590 // match: (MOVSDstore [off1] {sym1} (LEAL8 [off2] {sym2} ptr idx) val mem) 8591 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8592 // result: (MOVSDstoreidx8 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8593 for { 8594 off1 := v.AuxInt 8595 sym1 := v.Aux 8596 mem := v.Args[2] 8597 v_0 := v.Args[0] 8598 if v_0.Op != Op386LEAL8 { 8599 break 8600 } 8601 off2 := v_0.AuxInt 8602 sym2 := v_0.Aux 8603 idx := v_0.Args[1] 8604 ptr := v_0.Args[0] 8605 val := v.Args[1] 8606 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8607 break 8608 } 8609 v.reset(Op386MOVSDstoreidx8) 8610 v.AuxInt = off1 + off2 8611 v.Aux = mergeSym(sym1, sym2) 8612 v.AddArg(ptr) 8613 v.AddArg(idx) 8614 v.AddArg(val) 8615 v.AddArg(mem) 8616 return true 8617 } 8618 // match: (MOVSDstore [off] {sym} (ADDL ptr idx) val mem) 8619 // cond: ptr.Op != OpSB 8620 // result: (MOVSDstoreidx1 [off] {sym} ptr idx val mem) 8621 for { 8622 off := v.AuxInt 8623 sym := v.Aux 8624 mem := v.Args[2] 8625 v_0 := v.Args[0] 8626 if v_0.Op != Op386ADDL { 8627 break 8628 } 8629 idx := v_0.Args[1] 8630 ptr := v_0.Args[0] 8631 val := v.Args[1] 8632 if !(ptr.Op != OpSB) { 8633 break 8634 } 8635 v.reset(Op386MOVSDstoreidx1) 8636 v.AuxInt = off 8637 v.Aux = sym 8638 v.AddArg(ptr) 8639 v.AddArg(idx) 8640 v.AddArg(val) 8641 v.AddArg(mem) 8642 return true 8643 } 8644 return false 8645 } 8646 func rewriteValue386_Op386MOVSDstoreidx1_0(v *Value) bool { 8647 // match: (MOVSDstoreidx1 [c] {sym} (ADDLconst [d] ptr) idx val mem) 8648 // result: (MOVSDstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 8649 for { 8650 c := v.AuxInt 8651 sym := v.Aux 8652 mem := v.Args[3] 8653 v_0 := v.Args[0] 8654 if v_0.Op != Op386ADDLconst { 8655 break 8656 } 8657 d := v_0.AuxInt 8658 ptr := v_0.Args[0] 8659 idx := v.Args[1] 8660 val := v.Args[2] 8661 v.reset(Op386MOVSDstoreidx1) 8662 v.AuxInt = int64(int32(c + d)) 8663 v.Aux = sym 8664 v.AddArg(ptr) 8665 v.AddArg(idx) 8666 v.AddArg(val) 8667 v.AddArg(mem) 8668 return true 8669 } 8670 // match: (MOVSDstoreidx1 [c] {sym} ptr (ADDLconst [d] idx) val mem) 8671 // result: (MOVSDstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 8672 for { 8673 c := v.AuxInt 8674 sym := v.Aux 8675 mem := v.Args[3] 8676 ptr := v.Args[0] 8677 v_1 := v.Args[1] 8678 if v_1.Op != Op386ADDLconst { 8679 break 8680 } 8681 d := v_1.AuxInt 8682 idx := v_1.Args[0] 8683 val := v.Args[2] 8684 v.reset(Op386MOVSDstoreidx1) 8685 v.AuxInt = int64(int32(c + d)) 8686 v.Aux = sym 8687 v.AddArg(ptr) 8688 v.AddArg(idx) 8689 v.AddArg(val) 8690 v.AddArg(mem) 8691 return true 8692 } 8693 return false 8694 } 8695 func rewriteValue386_Op386MOVSDstoreidx8_0(v *Value) bool { 8696 // match: (MOVSDstoreidx8 [c] {sym} (ADDLconst [d] ptr) idx val mem) 8697 // result: (MOVSDstoreidx8 [int64(int32(c+d))] {sym} ptr idx val mem) 8698 for { 8699 c := v.AuxInt 8700 sym := v.Aux 8701 mem := v.Args[3] 8702 v_0 := v.Args[0] 8703 if v_0.Op != Op386ADDLconst { 8704 break 8705 } 8706 d := v_0.AuxInt 8707 ptr := v_0.Args[0] 8708 idx := v.Args[1] 8709 val := v.Args[2] 8710 v.reset(Op386MOVSDstoreidx8) 8711 v.AuxInt = int64(int32(c + d)) 8712 v.Aux = sym 8713 v.AddArg(ptr) 8714 v.AddArg(idx) 8715 v.AddArg(val) 8716 v.AddArg(mem) 8717 return true 8718 } 8719 // match: (MOVSDstoreidx8 [c] {sym} ptr (ADDLconst [d] idx) val mem) 8720 // result: (MOVSDstoreidx8 [int64(int32(c+8*d))] {sym} ptr idx val mem) 8721 for { 8722 c := v.AuxInt 8723 sym := v.Aux 8724 mem := v.Args[3] 8725 ptr := v.Args[0] 8726 v_1 := v.Args[1] 8727 if v_1.Op != Op386ADDLconst { 8728 break 8729 } 8730 d := v_1.AuxInt 8731 idx := v_1.Args[0] 8732 val := v.Args[2] 8733 v.reset(Op386MOVSDstoreidx8) 8734 v.AuxInt = int64(int32(c + 8*d)) 8735 v.Aux = sym 8736 v.AddArg(ptr) 8737 v.AddArg(idx) 8738 v.AddArg(val) 8739 v.AddArg(mem) 8740 return true 8741 } 8742 return false 8743 } 8744 func rewriteValue386_Op386MOVSSconst_0(v *Value) bool { 8745 b := v.Block 8746 config := b.Func.Config 8747 typ := &b.Func.Config.Types 8748 // match: (MOVSSconst [c]) 8749 // cond: config.ctxt.Flag_shared 8750 // result: (MOVSSconst2 (MOVSSconst1 [c])) 8751 for { 8752 c := v.AuxInt 8753 if !(config.ctxt.Flag_shared) { 8754 break 8755 } 8756 v.reset(Op386MOVSSconst2) 8757 v0 := b.NewValue0(v.Pos, Op386MOVSSconst1, typ.UInt32) 8758 v0.AuxInt = c 8759 v.AddArg(v0) 8760 return true 8761 } 8762 return false 8763 } 8764 func rewriteValue386_Op386MOVSSload_0(v *Value) bool { 8765 b := v.Block 8766 config := b.Func.Config 8767 // match: (MOVSSload [off1] {sym} (ADDLconst [off2] ptr) mem) 8768 // cond: is32Bit(off1+off2) 8769 // result: (MOVSSload [off1+off2] {sym} ptr mem) 8770 for { 8771 off1 := v.AuxInt 8772 sym := v.Aux 8773 mem := v.Args[1] 8774 v_0 := v.Args[0] 8775 if v_0.Op != Op386ADDLconst { 8776 break 8777 } 8778 off2 := v_0.AuxInt 8779 ptr := v_0.Args[0] 8780 if !(is32Bit(off1 + off2)) { 8781 break 8782 } 8783 v.reset(Op386MOVSSload) 8784 v.AuxInt = off1 + off2 8785 v.Aux = sym 8786 v.AddArg(ptr) 8787 v.AddArg(mem) 8788 return true 8789 } 8790 // match: (MOVSSload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 8791 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 8792 // result: (MOVSSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8793 for { 8794 off1 := v.AuxInt 8795 sym1 := v.Aux 8796 mem := v.Args[1] 8797 v_0 := v.Args[0] 8798 if v_0.Op != Op386LEAL { 8799 break 8800 } 8801 off2 := v_0.AuxInt 8802 sym2 := v_0.Aux 8803 base := v_0.Args[0] 8804 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 8805 break 8806 } 8807 v.reset(Op386MOVSSload) 8808 v.AuxInt = off1 + off2 8809 v.Aux = mergeSym(sym1, sym2) 8810 v.AddArg(base) 8811 v.AddArg(mem) 8812 return true 8813 } 8814 // match: (MOVSSload [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) mem) 8815 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8816 // result: (MOVSSloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 8817 for { 8818 off1 := v.AuxInt 8819 sym1 := v.Aux 8820 mem := v.Args[1] 8821 v_0 := v.Args[0] 8822 if v_0.Op != Op386LEAL1 { 8823 break 8824 } 8825 off2 := v_0.AuxInt 8826 sym2 := v_0.Aux 8827 idx := v_0.Args[1] 8828 ptr := v_0.Args[0] 8829 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8830 break 8831 } 8832 v.reset(Op386MOVSSloadidx1) 8833 v.AuxInt = off1 + off2 8834 v.Aux = mergeSym(sym1, sym2) 8835 v.AddArg(ptr) 8836 v.AddArg(idx) 8837 v.AddArg(mem) 8838 return true 8839 } 8840 // match: (MOVSSload [off1] {sym1} (LEAL4 [off2] {sym2} ptr idx) mem) 8841 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8842 // result: (MOVSSloadidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 8843 for { 8844 off1 := v.AuxInt 8845 sym1 := v.Aux 8846 mem := v.Args[1] 8847 v_0 := v.Args[0] 8848 if v_0.Op != Op386LEAL4 { 8849 break 8850 } 8851 off2 := v_0.AuxInt 8852 sym2 := v_0.Aux 8853 idx := v_0.Args[1] 8854 ptr := v_0.Args[0] 8855 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8856 break 8857 } 8858 v.reset(Op386MOVSSloadidx4) 8859 v.AuxInt = off1 + off2 8860 v.Aux = mergeSym(sym1, sym2) 8861 v.AddArg(ptr) 8862 v.AddArg(idx) 8863 v.AddArg(mem) 8864 return true 8865 } 8866 // match: (MOVSSload [off] {sym} (ADDL ptr idx) mem) 8867 // cond: ptr.Op != OpSB 8868 // result: (MOVSSloadidx1 [off] {sym} ptr idx mem) 8869 for { 8870 off := v.AuxInt 8871 sym := v.Aux 8872 mem := v.Args[1] 8873 v_0 := v.Args[0] 8874 if v_0.Op != Op386ADDL { 8875 break 8876 } 8877 idx := v_0.Args[1] 8878 ptr := v_0.Args[0] 8879 if !(ptr.Op != OpSB) { 8880 break 8881 } 8882 v.reset(Op386MOVSSloadidx1) 8883 v.AuxInt = off 8884 v.Aux = sym 8885 v.AddArg(ptr) 8886 v.AddArg(idx) 8887 v.AddArg(mem) 8888 return true 8889 } 8890 return false 8891 } 8892 func rewriteValue386_Op386MOVSSloadidx1_0(v *Value) bool { 8893 // match: (MOVSSloadidx1 [c] {sym} (ADDLconst [d] ptr) idx mem) 8894 // result: (MOVSSloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 8895 for { 8896 c := v.AuxInt 8897 sym := v.Aux 8898 mem := v.Args[2] 8899 v_0 := v.Args[0] 8900 if v_0.Op != Op386ADDLconst { 8901 break 8902 } 8903 d := v_0.AuxInt 8904 ptr := v_0.Args[0] 8905 idx := v.Args[1] 8906 v.reset(Op386MOVSSloadidx1) 8907 v.AuxInt = int64(int32(c + d)) 8908 v.Aux = sym 8909 v.AddArg(ptr) 8910 v.AddArg(idx) 8911 v.AddArg(mem) 8912 return true 8913 } 8914 // match: (MOVSSloadidx1 [c] {sym} ptr (ADDLconst [d] idx) mem) 8915 // result: (MOVSSloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 8916 for { 8917 c := v.AuxInt 8918 sym := v.Aux 8919 mem := v.Args[2] 8920 ptr := v.Args[0] 8921 v_1 := v.Args[1] 8922 if v_1.Op != Op386ADDLconst { 8923 break 8924 } 8925 d := v_1.AuxInt 8926 idx := v_1.Args[0] 8927 v.reset(Op386MOVSSloadidx1) 8928 v.AuxInt = int64(int32(c + d)) 8929 v.Aux = sym 8930 v.AddArg(ptr) 8931 v.AddArg(idx) 8932 v.AddArg(mem) 8933 return true 8934 } 8935 return false 8936 } 8937 func rewriteValue386_Op386MOVSSloadidx4_0(v *Value) bool { 8938 // match: (MOVSSloadidx4 [c] {sym} (ADDLconst [d] ptr) idx mem) 8939 // result: (MOVSSloadidx4 [int64(int32(c+d))] {sym} ptr idx mem) 8940 for { 8941 c := v.AuxInt 8942 sym := v.Aux 8943 mem := v.Args[2] 8944 v_0 := v.Args[0] 8945 if v_0.Op != Op386ADDLconst { 8946 break 8947 } 8948 d := v_0.AuxInt 8949 ptr := v_0.Args[0] 8950 idx := v.Args[1] 8951 v.reset(Op386MOVSSloadidx4) 8952 v.AuxInt = int64(int32(c + d)) 8953 v.Aux = sym 8954 v.AddArg(ptr) 8955 v.AddArg(idx) 8956 v.AddArg(mem) 8957 return true 8958 } 8959 // match: (MOVSSloadidx4 [c] {sym} ptr (ADDLconst [d] idx) mem) 8960 // result: (MOVSSloadidx4 [int64(int32(c+4*d))] {sym} ptr idx mem) 8961 for { 8962 c := v.AuxInt 8963 sym := v.Aux 8964 mem := v.Args[2] 8965 ptr := v.Args[0] 8966 v_1 := v.Args[1] 8967 if v_1.Op != Op386ADDLconst { 8968 break 8969 } 8970 d := v_1.AuxInt 8971 idx := v_1.Args[0] 8972 v.reset(Op386MOVSSloadidx4) 8973 v.AuxInt = int64(int32(c + 4*d)) 8974 v.Aux = sym 8975 v.AddArg(ptr) 8976 v.AddArg(idx) 8977 v.AddArg(mem) 8978 return true 8979 } 8980 return false 8981 } 8982 func rewriteValue386_Op386MOVSSstore_0(v *Value) bool { 8983 b := v.Block 8984 config := b.Func.Config 8985 // match: (MOVSSstore [off1] {sym} (ADDLconst [off2] ptr) val mem) 8986 // cond: is32Bit(off1+off2) 8987 // result: (MOVSSstore [off1+off2] {sym} ptr val mem) 8988 for { 8989 off1 := v.AuxInt 8990 sym := v.Aux 8991 mem := v.Args[2] 8992 v_0 := v.Args[0] 8993 if v_0.Op != Op386ADDLconst { 8994 break 8995 } 8996 off2 := v_0.AuxInt 8997 ptr := v_0.Args[0] 8998 val := v.Args[1] 8999 if !(is32Bit(off1 + off2)) { 9000 break 9001 } 9002 v.reset(Op386MOVSSstore) 9003 v.AuxInt = off1 + off2 9004 v.Aux = sym 9005 v.AddArg(ptr) 9006 v.AddArg(val) 9007 v.AddArg(mem) 9008 return true 9009 } 9010 // match: (MOVSSstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 9011 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 9012 // result: (MOVSSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 9013 for { 9014 off1 := v.AuxInt 9015 sym1 := v.Aux 9016 mem := v.Args[2] 9017 v_0 := v.Args[0] 9018 if v_0.Op != Op386LEAL { 9019 break 9020 } 9021 off2 := v_0.AuxInt 9022 sym2 := v_0.Aux 9023 base := v_0.Args[0] 9024 val := v.Args[1] 9025 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 9026 break 9027 } 9028 v.reset(Op386MOVSSstore) 9029 v.AuxInt = off1 + off2 9030 v.Aux = mergeSym(sym1, sym2) 9031 v.AddArg(base) 9032 v.AddArg(val) 9033 v.AddArg(mem) 9034 return true 9035 } 9036 // match: (MOVSSstore [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) val mem) 9037 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9038 // result: (MOVSSstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 9039 for { 9040 off1 := v.AuxInt 9041 sym1 := v.Aux 9042 mem := v.Args[2] 9043 v_0 := v.Args[0] 9044 if v_0.Op != Op386LEAL1 { 9045 break 9046 } 9047 off2 := v_0.AuxInt 9048 sym2 := v_0.Aux 9049 idx := v_0.Args[1] 9050 ptr := v_0.Args[0] 9051 val := v.Args[1] 9052 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9053 break 9054 } 9055 v.reset(Op386MOVSSstoreidx1) 9056 v.AuxInt = off1 + off2 9057 v.Aux = mergeSym(sym1, sym2) 9058 v.AddArg(ptr) 9059 v.AddArg(idx) 9060 v.AddArg(val) 9061 v.AddArg(mem) 9062 return true 9063 } 9064 // match: (MOVSSstore [off1] {sym1} (LEAL4 [off2] {sym2} ptr idx) val mem) 9065 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9066 // result: (MOVSSstoreidx4 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 9067 for { 9068 off1 := v.AuxInt 9069 sym1 := v.Aux 9070 mem := v.Args[2] 9071 v_0 := v.Args[0] 9072 if v_0.Op != Op386LEAL4 { 9073 break 9074 } 9075 off2 := v_0.AuxInt 9076 sym2 := v_0.Aux 9077 idx := v_0.Args[1] 9078 ptr := v_0.Args[0] 9079 val := v.Args[1] 9080 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9081 break 9082 } 9083 v.reset(Op386MOVSSstoreidx4) 9084 v.AuxInt = off1 + off2 9085 v.Aux = mergeSym(sym1, sym2) 9086 v.AddArg(ptr) 9087 v.AddArg(idx) 9088 v.AddArg(val) 9089 v.AddArg(mem) 9090 return true 9091 } 9092 // match: (MOVSSstore [off] {sym} (ADDL ptr idx) val mem) 9093 // cond: ptr.Op != OpSB 9094 // result: (MOVSSstoreidx1 [off] {sym} ptr idx val mem) 9095 for { 9096 off := v.AuxInt 9097 sym := v.Aux 9098 mem := v.Args[2] 9099 v_0 := v.Args[0] 9100 if v_0.Op != Op386ADDL { 9101 break 9102 } 9103 idx := v_0.Args[1] 9104 ptr := v_0.Args[0] 9105 val := v.Args[1] 9106 if !(ptr.Op != OpSB) { 9107 break 9108 } 9109 v.reset(Op386MOVSSstoreidx1) 9110 v.AuxInt = off 9111 v.Aux = sym 9112 v.AddArg(ptr) 9113 v.AddArg(idx) 9114 v.AddArg(val) 9115 v.AddArg(mem) 9116 return true 9117 } 9118 return false 9119 } 9120 func rewriteValue386_Op386MOVSSstoreidx1_0(v *Value) bool { 9121 // match: (MOVSSstoreidx1 [c] {sym} (ADDLconst [d] ptr) idx val mem) 9122 // result: (MOVSSstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 9123 for { 9124 c := v.AuxInt 9125 sym := v.Aux 9126 mem := v.Args[3] 9127 v_0 := v.Args[0] 9128 if v_0.Op != Op386ADDLconst { 9129 break 9130 } 9131 d := v_0.AuxInt 9132 ptr := v_0.Args[0] 9133 idx := v.Args[1] 9134 val := v.Args[2] 9135 v.reset(Op386MOVSSstoreidx1) 9136 v.AuxInt = int64(int32(c + d)) 9137 v.Aux = sym 9138 v.AddArg(ptr) 9139 v.AddArg(idx) 9140 v.AddArg(val) 9141 v.AddArg(mem) 9142 return true 9143 } 9144 // match: (MOVSSstoreidx1 [c] {sym} ptr (ADDLconst [d] idx) val mem) 9145 // result: (MOVSSstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 9146 for { 9147 c := v.AuxInt 9148 sym := v.Aux 9149 mem := v.Args[3] 9150 ptr := v.Args[0] 9151 v_1 := v.Args[1] 9152 if v_1.Op != Op386ADDLconst { 9153 break 9154 } 9155 d := v_1.AuxInt 9156 idx := v_1.Args[0] 9157 val := v.Args[2] 9158 v.reset(Op386MOVSSstoreidx1) 9159 v.AuxInt = int64(int32(c + d)) 9160 v.Aux = sym 9161 v.AddArg(ptr) 9162 v.AddArg(idx) 9163 v.AddArg(val) 9164 v.AddArg(mem) 9165 return true 9166 } 9167 return false 9168 } 9169 func rewriteValue386_Op386MOVSSstoreidx4_0(v *Value) bool { 9170 // match: (MOVSSstoreidx4 [c] {sym} (ADDLconst [d] ptr) idx val mem) 9171 // result: (MOVSSstoreidx4 [int64(int32(c+d))] {sym} ptr idx val mem) 9172 for { 9173 c := v.AuxInt 9174 sym := v.Aux 9175 mem := v.Args[3] 9176 v_0 := v.Args[0] 9177 if v_0.Op != Op386ADDLconst { 9178 break 9179 } 9180 d := v_0.AuxInt 9181 ptr := v_0.Args[0] 9182 idx := v.Args[1] 9183 val := v.Args[2] 9184 v.reset(Op386MOVSSstoreidx4) 9185 v.AuxInt = int64(int32(c + d)) 9186 v.Aux = sym 9187 v.AddArg(ptr) 9188 v.AddArg(idx) 9189 v.AddArg(val) 9190 v.AddArg(mem) 9191 return true 9192 } 9193 // match: (MOVSSstoreidx4 [c] {sym} ptr (ADDLconst [d] idx) val mem) 9194 // result: (MOVSSstoreidx4 [int64(int32(c+4*d))] {sym} ptr idx val mem) 9195 for { 9196 c := v.AuxInt 9197 sym := v.Aux 9198 mem := v.Args[3] 9199 ptr := v.Args[0] 9200 v_1 := v.Args[1] 9201 if v_1.Op != Op386ADDLconst { 9202 break 9203 } 9204 d := v_1.AuxInt 9205 idx := v_1.Args[0] 9206 val := v.Args[2] 9207 v.reset(Op386MOVSSstoreidx4) 9208 v.AuxInt = int64(int32(c + 4*d)) 9209 v.Aux = sym 9210 v.AddArg(ptr) 9211 v.AddArg(idx) 9212 v.AddArg(val) 9213 v.AddArg(mem) 9214 return true 9215 } 9216 return false 9217 } 9218 func rewriteValue386_Op386MOVWLSX_0(v *Value) bool { 9219 b := v.Block 9220 // match: (MOVWLSX x:(MOVWload [off] {sym} ptr mem)) 9221 // cond: x.Uses == 1 && clobber(x) 9222 // result: @x.Block (MOVWLSXload <v.Type> [off] {sym} ptr mem) 9223 for { 9224 x := v.Args[0] 9225 if x.Op != Op386MOVWload { 9226 break 9227 } 9228 off := x.AuxInt 9229 sym := x.Aux 9230 mem := x.Args[1] 9231 ptr := x.Args[0] 9232 if !(x.Uses == 1 && clobber(x)) { 9233 break 9234 } 9235 b = x.Block 9236 v0 := b.NewValue0(x.Pos, Op386MOVWLSXload, v.Type) 9237 v.reset(OpCopy) 9238 v.AddArg(v0) 9239 v0.AuxInt = off 9240 v0.Aux = sym 9241 v0.AddArg(ptr) 9242 v0.AddArg(mem) 9243 return true 9244 } 9245 // match: (MOVWLSX (ANDLconst [c] x)) 9246 // cond: c & 0x8000 == 0 9247 // result: (ANDLconst [c & 0x7fff] x) 9248 for { 9249 v_0 := v.Args[0] 9250 if v_0.Op != Op386ANDLconst { 9251 break 9252 } 9253 c := v_0.AuxInt 9254 x := v_0.Args[0] 9255 if !(c&0x8000 == 0) { 9256 break 9257 } 9258 v.reset(Op386ANDLconst) 9259 v.AuxInt = c & 0x7fff 9260 v.AddArg(x) 9261 return true 9262 } 9263 return false 9264 } 9265 func rewriteValue386_Op386MOVWLSXload_0(v *Value) bool { 9266 b := v.Block 9267 config := b.Func.Config 9268 // match: (MOVWLSXload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 9269 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 9270 // result: (MOVWLSX x) 9271 for { 9272 off := v.AuxInt 9273 sym := v.Aux 9274 _ = v.Args[1] 9275 ptr := v.Args[0] 9276 v_1 := v.Args[1] 9277 if v_1.Op != Op386MOVWstore { 9278 break 9279 } 9280 off2 := v_1.AuxInt 9281 sym2 := v_1.Aux 9282 _ = v_1.Args[2] 9283 ptr2 := v_1.Args[0] 9284 x := v_1.Args[1] 9285 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 9286 break 9287 } 9288 v.reset(Op386MOVWLSX) 9289 v.AddArg(x) 9290 return true 9291 } 9292 // match: (MOVWLSXload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 9293 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 9294 // result: (MOVWLSXload [off1+off2] {mergeSym(sym1,sym2)} base mem) 9295 for { 9296 off1 := v.AuxInt 9297 sym1 := v.Aux 9298 mem := v.Args[1] 9299 v_0 := v.Args[0] 9300 if v_0.Op != Op386LEAL { 9301 break 9302 } 9303 off2 := v_0.AuxInt 9304 sym2 := v_0.Aux 9305 base := v_0.Args[0] 9306 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 9307 break 9308 } 9309 v.reset(Op386MOVWLSXload) 9310 v.AuxInt = off1 + off2 9311 v.Aux = mergeSym(sym1, sym2) 9312 v.AddArg(base) 9313 v.AddArg(mem) 9314 return true 9315 } 9316 return false 9317 } 9318 func rewriteValue386_Op386MOVWLZX_0(v *Value) bool { 9319 b := v.Block 9320 // match: (MOVWLZX x:(MOVWload [off] {sym} ptr mem)) 9321 // cond: x.Uses == 1 && clobber(x) 9322 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 9323 for { 9324 x := v.Args[0] 9325 if x.Op != Op386MOVWload { 9326 break 9327 } 9328 off := x.AuxInt 9329 sym := x.Aux 9330 mem := x.Args[1] 9331 ptr := x.Args[0] 9332 if !(x.Uses == 1 && clobber(x)) { 9333 break 9334 } 9335 b = x.Block 9336 v0 := b.NewValue0(x.Pos, Op386MOVWload, v.Type) 9337 v.reset(OpCopy) 9338 v.AddArg(v0) 9339 v0.AuxInt = off 9340 v0.Aux = sym 9341 v0.AddArg(ptr) 9342 v0.AddArg(mem) 9343 return true 9344 } 9345 // match: (MOVWLZX x:(MOVWloadidx1 [off] {sym} ptr idx mem)) 9346 // cond: x.Uses == 1 && clobber(x) 9347 // result: @x.Block (MOVWloadidx1 <v.Type> [off] {sym} ptr idx mem) 9348 for { 9349 x := v.Args[0] 9350 if x.Op != Op386MOVWloadidx1 { 9351 break 9352 } 9353 off := x.AuxInt 9354 sym := x.Aux 9355 mem := x.Args[2] 9356 ptr := x.Args[0] 9357 idx := x.Args[1] 9358 if !(x.Uses == 1 && clobber(x)) { 9359 break 9360 } 9361 b = x.Block 9362 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 9363 v.reset(OpCopy) 9364 v.AddArg(v0) 9365 v0.AuxInt = off 9366 v0.Aux = sym 9367 v0.AddArg(ptr) 9368 v0.AddArg(idx) 9369 v0.AddArg(mem) 9370 return true 9371 } 9372 // match: (MOVWLZX x:(MOVWloadidx2 [off] {sym} ptr idx mem)) 9373 // cond: x.Uses == 1 && clobber(x) 9374 // result: @x.Block (MOVWloadidx2 <v.Type> [off] {sym} ptr idx mem) 9375 for { 9376 x := v.Args[0] 9377 if x.Op != Op386MOVWloadidx2 { 9378 break 9379 } 9380 off := x.AuxInt 9381 sym := x.Aux 9382 mem := x.Args[2] 9383 ptr := x.Args[0] 9384 idx := x.Args[1] 9385 if !(x.Uses == 1 && clobber(x)) { 9386 break 9387 } 9388 b = x.Block 9389 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx2, v.Type) 9390 v.reset(OpCopy) 9391 v.AddArg(v0) 9392 v0.AuxInt = off 9393 v0.Aux = sym 9394 v0.AddArg(ptr) 9395 v0.AddArg(idx) 9396 v0.AddArg(mem) 9397 return true 9398 } 9399 // match: (MOVWLZX (ANDLconst [c] x)) 9400 // result: (ANDLconst [c & 0xffff] x) 9401 for { 9402 v_0 := v.Args[0] 9403 if v_0.Op != Op386ANDLconst { 9404 break 9405 } 9406 c := v_0.AuxInt 9407 x := v_0.Args[0] 9408 v.reset(Op386ANDLconst) 9409 v.AuxInt = c & 0xffff 9410 v.AddArg(x) 9411 return true 9412 } 9413 return false 9414 } 9415 func rewriteValue386_Op386MOVWload_0(v *Value) bool { 9416 b := v.Block 9417 config := b.Func.Config 9418 // match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 9419 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 9420 // result: (MOVWLZX x) 9421 for { 9422 off := v.AuxInt 9423 sym := v.Aux 9424 _ = v.Args[1] 9425 ptr := v.Args[0] 9426 v_1 := v.Args[1] 9427 if v_1.Op != Op386MOVWstore { 9428 break 9429 } 9430 off2 := v_1.AuxInt 9431 sym2 := v_1.Aux 9432 _ = v_1.Args[2] 9433 ptr2 := v_1.Args[0] 9434 x := v_1.Args[1] 9435 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 9436 break 9437 } 9438 v.reset(Op386MOVWLZX) 9439 v.AddArg(x) 9440 return true 9441 } 9442 // match: (MOVWload [off1] {sym} (ADDLconst [off2] ptr) mem) 9443 // cond: is32Bit(off1+off2) 9444 // result: (MOVWload [off1+off2] {sym} ptr mem) 9445 for { 9446 off1 := v.AuxInt 9447 sym := v.Aux 9448 mem := v.Args[1] 9449 v_0 := v.Args[0] 9450 if v_0.Op != Op386ADDLconst { 9451 break 9452 } 9453 off2 := v_0.AuxInt 9454 ptr := v_0.Args[0] 9455 if !(is32Bit(off1 + off2)) { 9456 break 9457 } 9458 v.reset(Op386MOVWload) 9459 v.AuxInt = off1 + off2 9460 v.Aux = sym 9461 v.AddArg(ptr) 9462 v.AddArg(mem) 9463 return true 9464 } 9465 // match: (MOVWload [off1] {sym1} (LEAL [off2] {sym2} base) mem) 9466 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 9467 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 9468 for { 9469 off1 := v.AuxInt 9470 sym1 := v.Aux 9471 mem := v.Args[1] 9472 v_0 := v.Args[0] 9473 if v_0.Op != Op386LEAL { 9474 break 9475 } 9476 off2 := v_0.AuxInt 9477 sym2 := v_0.Aux 9478 base := v_0.Args[0] 9479 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 9480 break 9481 } 9482 v.reset(Op386MOVWload) 9483 v.AuxInt = off1 + off2 9484 v.Aux = mergeSym(sym1, sym2) 9485 v.AddArg(base) 9486 v.AddArg(mem) 9487 return true 9488 } 9489 // match: (MOVWload [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) mem) 9490 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9491 // result: (MOVWloadidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 9492 for { 9493 off1 := v.AuxInt 9494 sym1 := v.Aux 9495 mem := v.Args[1] 9496 v_0 := v.Args[0] 9497 if v_0.Op != Op386LEAL1 { 9498 break 9499 } 9500 off2 := v_0.AuxInt 9501 sym2 := v_0.Aux 9502 idx := v_0.Args[1] 9503 ptr := v_0.Args[0] 9504 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9505 break 9506 } 9507 v.reset(Op386MOVWloadidx1) 9508 v.AuxInt = off1 + off2 9509 v.Aux = mergeSym(sym1, sym2) 9510 v.AddArg(ptr) 9511 v.AddArg(idx) 9512 v.AddArg(mem) 9513 return true 9514 } 9515 // match: (MOVWload [off1] {sym1} (LEAL2 [off2] {sym2} ptr idx) mem) 9516 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9517 // result: (MOVWloadidx2 [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 9518 for { 9519 off1 := v.AuxInt 9520 sym1 := v.Aux 9521 mem := v.Args[1] 9522 v_0 := v.Args[0] 9523 if v_0.Op != Op386LEAL2 { 9524 break 9525 } 9526 off2 := v_0.AuxInt 9527 sym2 := v_0.Aux 9528 idx := v_0.Args[1] 9529 ptr := v_0.Args[0] 9530 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9531 break 9532 } 9533 v.reset(Op386MOVWloadidx2) 9534 v.AuxInt = off1 + off2 9535 v.Aux = mergeSym(sym1, sym2) 9536 v.AddArg(ptr) 9537 v.AddArg(idx) 9538 v.AddArg(mem) 9539 return true 9540 } 9541 // match: (MOVWload [off] {sym} (ADDL ptr idx) mem) 9542 // cond: ptr.Op != OpSB 9543 // result: (MOVWloadidx1 [off] {sym} ptr idx mem) 9544 for { 9545 off := v.AuxInt 9546 sym := v.Aux 9547 mem := v.Args[1] 9548 v_0 := v.Args[0] 9549 if v_0.Op != Op386ADDL { 9550 break 9551 } 9552 idx := v_0.Args[1] 9553 ptr := v_0.Args[0] 9554 if !(ptr.Op != OpSB) { 9555 break 9556 } 9557 v.reset(Op386MOVWloadidx1) 9558 v.AuxInt = off 9559 v.Aux = sym 9560 v.AddArg(ptr) 9561 v.AddArg(idx) 9562 v.AddArg(mem) 9563 return true 9564 } 9565 // match: (MOVWload [off] {sym} (SB) _) 9566 // cond: symIsRO(sym) 9567 // result: (MOVLconst [int64(read16(sym, off, config.BigEndian))]) 9568 for { 9569 off := v.AuxInt 9570 sym := v.Aux 9571 _ = v.Args[1] 9572 v_0 := v.Args[0] 9573 if v_0.Op != OpSB || !(symIsRO(sym)) { 9574 break 9575 } 9576 v.reset(Op386MOVLconst) 9577 v.AuxInt = int64(read16(sym, off, config.BigEndian)) 9578 return true 9579 } 9580 return false 9581 } 9582 func rewriteValue386_Op386MOVWloadidx1_0(v *Value) bool { 9583 // match: (MOVWloadidx1 [c] {sym} ptr (SHLLconst [1] idx) mem) 9584 // result: (MOVWloadidx2 [c] {sym} ptr idx mem) 9585 for { 9586 c := v.AuxInt 9587 sym := v.Aux 9588 mem := v.Args[2] 9589 ptr := v.Args[0] 9590 v_1 := v.Args[1] 9591 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 9592 break 9593 } 9594 idx := v_1.Args[0] 9595 v.reset(Op386MOVWloadidx2) 9596 v.AuxInt = c 9597 v.Aux = sym 9598 v.AddArg(ptr) 9599 v.AddArg(idx) 9600 v.AddArg(mem) 9601 return true 9602 } 9603 // match: (MOVWloadidx1 [c] {sym} (SHLLconst [1] idx) ptr mem) 9604 // result: (MOVWloadidx2 [c] {sym} ptr idx mem) 9605 for { 9606 c := v.AuxInt 9607 sym := v.Aux 9608 mem := v.Args[2] 9609 v_0 := v.Args[0] 9610 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 1 { 9611 break 9612 } 9613 idx := v_0.Args[0] 9614 ptr := v.Args[1] 9615 v.reset(Op386MOVWloadidx2) 9616 v.AuxInt = c 9617 v.Aux = sym 9618 v.AddArg(ptr) 9619 v.AddArg(idx) 9620 v.AddArg(mem) 9621 return true 9622 } 9623 // match: (MOVWloadidx1 [c] {sym} (ADDLconst [d] ptr) idx mem) 9624 // result: (MOVWloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 9625 for { 9626 c := v.AuxInt 9627 sym := v.Aux 9628 mem := v.Args[2] 9629 v_0 := v.Args[0] 9630 if v_0.Op != Op386ADDLconst { 9631 break 9632 } 9633 d := v_0.AuxInt 9634 ptr := v_0.Args[0] 9635 idx := v.Args[1] 9636 v.reset(Op386MOVWloadidx1) 9637 v.AuxInt = int64(int32(c + d)) 9638 v.Aux = sym 9639 v.AddArg(ptr) 9640 v.AddArg(idx) 9641 v.AddArg(mem) 9642 return true 9643 } 9644 // match: (MOVWloadidx1 [c] {sym} idx (ADDLconst [d] ptr) mem) 9645 // result: (MOVWloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 9646 for { 9647 c := v.AuxInt 9648 sym := v.Aux 9649 mem := v.Args[2] 9650 idx := v.Args[0] 9651 v_1 := v.Args[1] 9652 if v_1.Op != Op386ADDLconst { 9653 break 9654 } 9655 d := v_1.AuxInt 9656 ptr := v_1.Args[0] 9657 v.reset(Op386MOVWloadidx1) 9658 v.AuxInt = int64(int32(c + d)) 9659 v.Aux = sym 9660 v.AddArg(ptr) 9661 v.AddArg(idx) 9662 v.AddArg(mem) 9663 return true 9664 } 9665 // match: (MOVWloadidx1 [c] {sym} ptr (ADDLconst [d] idx) mem) 9666 // result: (MOVWloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 9667 for { 9668 c := v.AuxInt 9669 sym := v.Aux 9670 mem := v.Args[2] 9671 ptr := v.Args[0] 9672 v_1 := v.Args[1] 9673 if v_1.Op != Op386ADDLconst { 9674 break 9675 } 9676 d := v_1.AuxInt 9677 idx := v_1.Args[0] 9678 v.reset(Op386MOVWloadidx1) 9679 v.AuxInt = int64(int32(c + d)) 9680 v.Aux = sym 9681 v.AddArg(ptr) 9682 v.AddArg(idx) 9683 v.AddArg(mem) 9684 return true 9685 } 9686 // match: (MOVWloadidx1 [c] {sym} (ADDLconst [d] idx) ptr mem) 9687 // result: (MOVWloadidx1 [int64(int32(c+d))] {sym} ptr idx mem) 9688 for { 9689 c := v.AuxInt 9690 sym := v.Aux 9691 mem := v.Args[2] 9692 v_0 := v.Args[0] 9693 if v_0.Op != Op386ADDLconst { 9694 break 9695 } 9696 d := v_0.AuxInt 9697 idx := v_0.Args[0] 9698 ptr := v.Args[1] 9699 v.reset(Op386MOVWloadidx1) 9700 v.AuxInt = int64(int32(c + d)) 9701 v.Aux = sym 9702 v.AddArg(ptr) 9703 v.AddArg(idx) 9704 v.AddArg(mem) 9705 return true 9706 } 9707 return false 9708 } 9709 func rewriteValue386_Op386MOVWloadidx2_0(v *Value) bool { 9710 // match: (MOVWloadidx2 [c] {sym} (ADDLconst [d] ptr) idx mem) 9711 // result: (MOVWloadidx2 [int64(int32(c+d))] {sym} ptr idx mem) 9712 for { 9713 c := v.AuxInt 9714 sym := v.Aux 9715 mem := v.Args[2] 9716 v_0 := v.Args[0] 9717 if v_0.Op != Op386ADDLconst { 9718 break 9719 } 9720 d := v_0.AuxInt 9721 ptr := v_0.Args[0] 9722 idx := v.Args[1] 9723 v.reset(Op386MOVWloadidx2) 9724 v.AuxInt = int64(int32(c + d)) 9725 v.Aux = sym 9726 v.AddArg(ptr) 9727 v.AddArg(idx) 9728 v.AddArg(mem) 9729 return true 9730 } 9731 // match: (MOVWloadidx2 [c] {sym} ptr (ADDLconst [d] idx) mem) 9732 // result: (MOVWloadidx2 [int64(int32(c+2*d))] {sym} ptr idx mem) 9733 for { 9734 c := v.AuxInt 9735 sym := v.Aux 9736 mem := v.Args[2] 9737 ptr := v.Args[0] 9738 v_1 := v.Args[1] 9739 if v_1.Op != Op386ADDLconst { 9740 break 9741 } 9742 d := v_1.AuxInt 9743 idx := v_1.Args[0] 9744 v.reset(Op386MOVWloadidx2) 9745 v.AuxInt = int64(int32(c + 2*d)) 9746 v.Aux = sym 9747 v.AddArg(ptr) 9748 v.AddArg(idx) 9749 v.AddArg(mem) 9750 return true 9751 } 9752 return false 9753 } 9754 func rewriteValue386_Op386MOVWstore_0(v *Value) bool { 9755 b := v.Block 9756 config := b.Func.Config 9757 // match: (MOVWstore [off] {sym} ptr (MOVWLSX x) mem) 9758 // result: (MOVWstore [off] {sym} ptr x mem) 9759 for { 9760 off := v.AuxInt 9761 sym := v.Aux 9762 mem := v.Args[2] 9763 ptr := v.Args[0] 9764 v_1 := v.Args[1] 9765 if v_1.Op != Op386MOVWLSX { 9766 break 9767 } 9768 x := v_1.Args[0] 9769 v.reset(Op386MOVWstore) 9770 v.AuxInt = off 9771 v.Aux = sym 9772 v.AddArg(ptr) 9773 v.AddArg(x) 9774 v.AddArg(mem) 9775 return true 9776 } 9777 // match: (MOVWstore [off] {sym} ptr (MOVWLZX x) mem) 9778 // result: (MOVWstore [off] {sym} ptr x mem) 9779 for { 9780 off := v.AuxInt 9781 sym := v.Aux 9782 mem := v.Args[2] 9783 ptr := v.Args[0] 9784 v_1 := v.Args[1] 9785 if v_1.Op != Op386MOVWLZX { 9786 break 9787 } 9788 x := v_1.Args[0] 9789 v.reset(Op386MOVWstore) 9790 v.AuxInt = off 9791 v.Aux = sym 9792 v.AddArg(ptr) 9793 v.AddArg(x) 9794 v.AddArg(mem) 9795 return true 9796 } 9797 // match: (MOVWstore [off1] {sym} (ADDLconst [off2] ptr) val mem) 9798 // cond: is32Bit(off1+off2) 9799 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 9800 for { 9801 off1 := v.AuxInt 9802 sym := v.Aux 9803 mem := v.Args[2] 9804 v_0 := v.Args[0] 9805 if v_0.Op != Op386ADDLconst { 9806 break 9807 } 9808 off2 := v_0.AuxInt 9809 ptr := v_0.Args[0] 9810 val := v.Args[1] 9811 if !(is32Bit(off1 + off2)) { 9812 break 9813 } 9814 v.reset(Op386MOVWstore) 9815 v.AuxInt = off1 + off2 9816 v.Aux = sym 9817 v.AddArg(ptr) 9818 v.AddArg(val) 9819 v.AddArg(mem) 9820 return true 9821 } 9822 // match: (MOVWstore [off] {sym} ptr (MOVLconst [c]) mem) 9823 // cond: validOff(off) 9824 // result: (MOVWstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 9825 for { 9826 off := v.AuxInt 9827 sym := v.Aux 9828 mem := v.Args[2] 9829 ptr := v.Args[0] 9830 v_1 := v.Args[1] 9831 if v_1.Op != Op386MOVLconst { 9832 break 9833 } 9834 c := v_1.AuxInt 9835 if !(validOff(off)) { 9836 break 9837 } 9838 v.reset(Op386MOVWstoreconst) 9839 v.AuxInt = makeValAndOff(int64(int16(c)), off) 9840 v.Aux = sym 9841 v.AddArg(ptr) 9842 v.AddArg(mem) 9843 return true 9844 } 9845 // match: (MOVWstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 9846 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 9847 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 9848 for { 9849 off1 := v.AuxInt 9850 sym1 := v.Aux 9851 mem := v.Args[2] 9852 v_0 := v.Args[0] 9853 if v_0.Op != Op386LEAL { 9854 break 9855 } 9856 off2 := v_0.AuxInt 9857 sym2 := v_0.Aux 9858 base := v_0.Args[0] 9859 val := v.Args[1] 9860 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 9861 break 9862 } 9863 v.reset(Op386MOVWstore) 9864 v.AuxInt = off1 + off2 9865 v.Aux = mergeSym(sym1, sym2) 9866 v.AddArg(base) 9867 v.AddArg(val) 9868 v.AddArg(mem) 9869 return true 9870 } 9871 // match: (MOVWstore [off1] {sym1} (LEAL1 [off2] {sym2} ptr idx) val mem) 9872 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9873 // result: (MOVWstoreidx1 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 9874 for { 9875 off1 := v.AuxInt 9876 sym1 := v.Aux 9877 mem := v.Args[2] 9878 v_0 := v.Args[0] 9879 if v_0.Op != Op386LEAL1 { 9880 break 9881 } 9882 off2 := v_0.AuxInt 9883 sym2 := v_0.Aux 9884 idx := v_0.Args[1] 9885 ptr := v_0.Args[0] 9886 val := v.Args[1] 9887 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9888 break 9889 } 9890 v.reset(Op386MOVWstoreidx1) 9891 v.AuxInt = off1 + off2 9892 v.Aux = mergeSym(sym1, sym2) 9893 v.AddArg(ptr) 9894 v.AddArg(idx) 9895 v.AddArg(val) 9896 v.AddArg(mem) 9897 return true 9898 } 9899 // match: (MOVWstore [off1] {sym1} (LEAL2 [off2] {sym2} ptr idx) val mem) 9900 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 9901 // result: (MOVWstoreidx2 [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 9902 for { 9903 off1 := v.AuxInt 9904 sym1 := v.Aux 9905 mem := v.Args[2] 9906 v_0 := v.Args[0] 9907 if v_0.Op != Op386LEAL2 { 9908 break 9909 } 9910 off2 := v_0.AuxInt 9911 sym2 := v_0.Aux 9912 idx := v_0.Args[1] 9913 ptr := v_0.Args[0] 9914 val := v.Args[1] 9915 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 9916 break 9917 } 9918 v.reset(Op386MOVWstoreidx2) 9919 v.AuxInt = off1 + off2 9920 v.Aux = mergeSym(sym1, sym2) 9921 v.AddArg(ptr) 9922 v.AddArg(idx) 9923 v.AddArg(val) 9924 v.AddArg(mem) 9925 return true 9926 } 9927 // match: (MOVWstore [off] {sym} (ADDL ptr idx) val mem) 9928 // cond: ptr.Op != OpSB 9929 // result: (MOVWstoreidx1 [off] {sym} ptr idx val mem) 9930 for { 9931 off := v.AuxInt 9932 sym := v.Aux 9933 mem := v.Args[2] 9934 v_0 := v.Args[0] 9935 if v_0.Op != Op386ADDL { 9936 break 9937 } 9938 idx := v_0.Args[1] 9939 ptr := v_0.Args[0] 9940 val := v.Args[1] 9941 if !(ptr.Op != OpSB) { 9942 break 9943 } 9944 v.reset(Op386MOVWstoreidx1) 9945 v.AuxInt = off 9946 v.Aux = sym 9947 v.AddArg(ptr) 9948 v.AddArg(idx) 9949 v.AddArg(val) 9950 v.AddArg(mem) 9951 return true 9952 } 9953 // match: (MOVWstore [i] {s} p (SHRLconst [16] w) x:(MOVWstore [i-2] {s} p w mem)) 9954 // cond: x.Uses == 1 && clobber(x) 9955 // result: (MOVLstore [i-2] {s} p w mem) 9956 for { 9957 i := v.AuxInt 9958 s := v.Aux 9959 _ = v.Args[2] 9960 p := v.Args[0] 9961 v_1 := v.Args[1] 9962 if v_1.Op != Op386SHRLconst || v_1.AuxInt != 16 { 9963 break 9964 } 9965 w := v_1.Args[0] 9966 x := v.Args[2] 9967 if x.Op != Op386MOVWstore || x.AuxInt != i-2 || x.Aux != s { 9968 break 9969 } 9970 mem := x.Args[2] 9971 if p != x.Args[0] || w != x.Args[1] || !(x.Uses == 1 && clobber(x)) { 9972 break 9973 } 9974 v.reset(Op386MOVLstore) 9975 v.AuxInt = i - 2 9976 v.Aux = s 9977 v.AddArg(p) 9978 v.AddArg(w) 9979 v.AddArg(mem) 9980 return true 9981 } 9982 // match: (MOVWstore [i] {s} p (SHRLconst [j] w) x:(MOVWstore [i-2] {s} p w0:(SHRLconst [j-16] w) mem)) 9983 // cond: x.Uses == 1 && clobber(x) 9984 // result: (MOVLstore [i-2] {s} p w0 mem) 9985 for { 9986 i := v.AuxInt 9987 s := v.Aux 9988 _ = v.Args[2] 9989 p := v.Args[0] 9990 v_1 := v.Args[1] 9991 if v_1.Op != Op386SHRLconst { 9992 break 9993 } 9994 j := v_1.AuxInt 9995 w := v_1.Args[0] 9996 x := v.Args[2] 9997 if x.Op != Op386MOVWstore || x.AuxInt != i-2 || x.Aux != s { 9998 break 9999 } 10000 mem := x.Args[2] 10001 if p != x.Args[0] { 10002 break 10003 } 10004 w0 := x.Args[1] 10005 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10006 break 10007 } 10008 v.reset(Op386MOVLstore) 10009 v.AuxInt = i - 2 10010 v.Aux = s 10011 v.AddArg(p) 10012 v.AddArg(w0) 10013 v.AddArg(mem) 10014 return true 10015 } 10016 return false 10017 } 10018 func rewriteValue386_Op386MOVWstoreconst_0(v *Value) bool { 10019 b := v.Block 10020 config := b.Func.Config 10021 // match: (MOVWstoreconst [sc] {s} (ADDLconst [off] ptr) mem) 10022 // cond: ValAndOff(sc).canAdd(off) 10023 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10024 for { 10025 sc := v.AuxInt 10026 s := v.Aux 10027 mem := v.Args[1] 10028 v_0 := v.Args[0] 10029 if v_0.Op != Op386ADDLconst { 10030 break 10031 } 10032 off := v_0.AuxInt 10033 ptr := v_0.Args[0] 10034 if !(ValAndOff(sc).canAdd(off)) { 10035 break 10036 } 10037 v.reset(Op386MOVWstoreconst) 10038 v.AuxInt = ValAndOff(sc).add(off) 10039 v.Aux = s 10040 v.AddArg(ptr) 10041 v.AddArg(mem) 10042 return true 10043 } 10044 // match: (MOVWstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem) 10045 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) 10046 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10047 for { 10048 sc := v.AuxInt 10049 sym1 := v.Aux 10050 mem := v.Args[1] 10051 v_0 := v.Args[0] 10052 if v_0.Op != Op386LEAL { 10053 break 10054 } 10055 off := v_0.AuxInt 10056 sym2 := v_0.Aux 10057 ptr := v_0.Args[0] 10058 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { 10059 break 10060 } 10061 v.reset(Op386MOVWstoreconst) 10062 v.AuxInt = ValAndOff(sc).add(off) 10063 v.Aux = mergeSym(sym1, sym2) 10064 v.AddArg(ptr) 10065 v.AddArg(mem) 10066 return true 10067 } 10068 // match: (MOVWstoreconst [x] {sym1} (LEAL1 [off] {sym2} ptr idx) mem) 10069 // cond: canMergeSym(sym1, sym2) 10070 // result: (MOVWstoreconstidx1 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem) 10071 for { 10072 x := v.AuxInt 10073 sym1 := v.Aux 10074 mem := v.Args[1] 10075 v_0 := v.Args[0] 10076 if v_0.Op != Op386LEAL1 { 10077 break 10078 } 10079 off := v_0.AuxInt 10080 sym2 := v_0.Aux 10081 idx := v_0.Args[1] 10082 ptr := v_0.Args[0] 10083 if !(canMergeSym(sym1, sym2)) { 10084 break 10085 } 10086 v.reset(Op386MOVWstoreconstidx1) 10087 v.AuxInt = ValAndOff(x).add(off) 10088 v.Aux = mergeSym(sym1, sym2) 10089 v.AddArg(ptr) 10090 v.AddArg(idx) 10091 v.AddArg(mem) 10092 return true 10093 } 10094 // match: (MOVWstoreconst [x] {sym1} (LEAL2 [off] {sym2} ptr idx) mem) 10095 // cond: canMergeSym(sym1, sym2) 10096 // result: (MOVWstoreconstidx2 [ValAndOff(x).add(off)] {mergeSym(sym1,sym2)} ptr idx mem) 10097 for { 10098 x := v.AuxInt 10099 sym1 := v.Aux 10100 mem := v.Args[1] 10101 v_0 := v.Args[0] 10102 if v_0.Op != Op386LEAL2 { 10103 break 10104 } 10105 off := v_0.AuxInt 10106 sym2 := v_0.Aux 10107 idx := v_0.Args[1] 10108 ptr := v_0.Args[0] 10109 if !(canMergeSym(sym1, sym2)) { 10110 break 10111 } 10112 v.reset(Op386MOVWstoreconstidx2) 10113 v.AuxInt = ValAndOff(x).add(off) 10114 v.Aux = mergeSym(sym1, sym2) 10115 v.AddArg(ptr) 10116 v.AddArg(idx) 10117 v.AddArg(mem) 10118 return true 10119 } 10120 // match: (MOVWstoreconst [x] {sym} (ADDL ptr idx) mem) 10121 // result: (MOVWstoreconstidx1 [x] {sym} ptr idx mem) 10122 for { 10123 x := v.AuxInt 10124 sym := v.Aux 10125 mem := v.Args[1] 10126 v_0 := v.Args[0] 10127 if v_0.Op != Op386ADDL { 10128 break 10129 } 10130 idx := v_0.Args[1] 10131 ptr := v_0.Args[0] 10132 v.reset(Op386MOVWstoreconstidx1) 10133 v.AuxInt = x 10134 v.Aux = sym 10135 v.AddArg(ptr) 10136 v.AddArg(idx) 10137 v.AddArg(mem) 10138 return true 10139 } 10140 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 10141 // cond: x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 10142 // result: (MOVLstoreconst [makeValAndOff(ValAndOff(a).Val()&0xffff | ValAndOff(c).Val()<<16, ValAndOff(a).Off())] {s} p mem) 10143 for { 10144 c := v.AuxInt 10145 s := v.Aux 10146 _ = v.Args[1] 10147 p := v.Args[0] 10148 x := v.Args[1] 10149 if x.Op != Op386MOVWstoreconst { 10150 break 10151 } 10152 a := x.AuxInt 10153 if x.Aux != s { 10154 break 10155 } 10156 mem := x.Args[1] 10157 if p != x.Args[0] || !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 10158 break 10159 } 10160 v.reset(Op386MOVLstoreconst) 10161 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xffff|ValAndOff(c).Val()<<16, ValAndOff(a).Off()) 10162 v.Aux = s 10163 v.AddArg(p) 10164 v.AddArg(mem) 10165 return true 10166 } 10167 // match: (MOVWstoreconst [a] {s} p x:(MOVWstoreconst [c] {s} p mem)) 10168 // cond: x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 10169 // result: (MOVLstoreconst [makeValAndOff(ValAndOff(a).Val()&0xffff | ValAndOff(c).Val()<<16, ValAndOff(a).Off())] {s} p mem) 10170 for { 10171 a := v.AuxInt 10172 s := v.Aux 10173 _ = v.Args[1] 10174 p := v.Args[0] 10175 x := v.Args[1] 10176 if x.Op != Op386MOVWstoreconst { 10177 break 10178 } 10179 c := x.AuxInt 10180 if x.Aux != s { 10181 break 10182 } 10183 mem := x.Args[1] 10184 if p != x.Args[0] || !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 10185 break 10186 } 10187 v.reset(Op386MOVLstoreconst) 10188 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xffff|ValAndOff(c).Val()<<16, ValAndOff(a).Off()) 10189 v.Aux = s 10190 v.AddArg(p) 10191 v.AddArg(mem) 10192 return true 10193 } 10194 return false 10195 } 10196 func rewriteValue386_Op386MOVWstoreconstidx1_0(v *Value) bool { 10197 // match: (MOVWstoreconstidx1 [c] {sym} ptr (SHLLconst [1] idx) mem) 10198 // result: (MOVWstoreconstidx2 [c] {sym} ptr idx mem) 10199 for { 10200 c := v.AuxInt 10201 sym := v.Aux 10202 mem := v.Args[2] 10203 ptr := v.Args[0] 10204 v_1 := v.Args[1] 10205 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 10206 break 10207 } 10208 idx := v_1.Args[0] 10209 v.reset(Op386MOVWstoreconstidx2) 10210 v.AuxInt = c 10211 v.Aux = sym 10212 v.AddArg(ptr) 10213 v.AddArg(idx) 10214 v.AddArg(mem) 10215 return true 10216 } 10217 // match: (MOVWstoreconstidx1 [x] {sym} (ADDLconst [c] ptr) idx mem) 10218 // result: (MOVWstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 10219 for { 10220 x := v.AuxInt 10221 sym := v.Aux 10222 mem := v.Args[2] 10223 v_0 := v.Args[0] 10224 if v_0.Op != Op386ADDLconst { 10225 break 10226 } 10227 c := v_0.AuxInt 10228 ptr := v_0.Args[0] 10229 idx := v.Args[1] 10230 v.reset(Op386MOVWstoreconstidx1) 10231 v.AuxInt = ValAndOff(x).add(c) 10232 v.Aux = sym 10233 v.AddArg(ptr) 10234 v.AddArg(idx) 10235 v.AddArg(mem) 10236 return true 10237 } 10238 // match: (MOVWstoreconstidx1 [x] {sym} ptr (ADDLconst [c] idx) mem) 10239 // result: (MOVWstoreconstidx1 [ValAndOff(x).add(c)] {sym} ptr idx mem) 10240 for { 10241 x := v.AuxInt 10242 sym := v.Aux 10243 mem := v.Args[2] 10244 ptr := v.Args[0] 10245 v_1 := v.Args[1] 10246 if v_1.Op != Op386ADDLconst { 10247 break 10248 } 10249 c := v_1.AuxInt 10250 idx := v_1.Args[0] 10251 v.reset(Op386MOVWstoreconstidx1) 10252 v.AuxInt = ValAndOff(x).add(c) 10253 v.Aux = sym 10254 v.AddArg(ptr) 10255 v.AddArg(idx) 10256 v.AddArg(mem) 10257 return true 10258 } 10259 // match: (MOVWstoreconstidx1 [c] {s} p i x:(MOVWstoreconstidx1 [a] {s} p i mem)) 10260 // cond: x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 10261 // result: (MOVLstoreconstidx1 [makeValAndOff(ValAndOff(a).Val()&0xffff | ValAndOff(c).Val()<<16, ValAndOff(a).Off())] {s} p i mem) 10262 for { 10263 c := v.AuxInt 10264 s := v.Aux 10265 _ = v.Args[2] 10266 p := v.Args[0] 10267 i := v.Args[1] 10268 x := v.Args[2] 10269 if x.Op != Op386MOVWstoreconstidx1 { 10270 break 10271 } 10272 a := x.AuxInt 10273 if x.Aux != s { 10274 break 10275 } 10276 mem := x.Args[2] 10277 if p != x.Args[0] || i != x.Args[1] || !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 10278 break 10279 } 10280 v.reset(Op386MOVLstoreconstidx1) 10281 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xffff|ValAndOff(c).Val()<<16, ValAndOff(a).Off()) 10282 v.Aux = s 10283 v.AddArg(p) 10284 v.AddArg(i) 10285 v.AddArg(mem) 10286 return true 10287 } 10288 return false 10289 } 10290 func rewriteValue386_Op386MOVWstoreconstidx2_0(v *Value) bool { 10291 b := v.Block 10292 // match: (MOVWstoreconstidx2 [x] {sym} (ADDLconst [c] ptr) idx mem) 10293 // result: (MOVWstoreconstidx2 [ValAndOff(x).add(c)] {sym} ptr idx mem) 10294 for { 10295 x := v.AuxInt 10296 sym := v.Aux 10297 mem := v.Args[2] 10298 v_0 := v.Args[0] 10299 if v_0.Op != Op386ADDLconst { 10300 break 10301 } 10302 c := v_0.AuxInt 10303 ptr := v_0.Args[0] 10304 idx := v.Args[1] 10305 v.reset(Op386MOVWstoreconstidx2) 10306 v.AuxInt = ValAndOff(x).add(c) 10307 v.Aux = sym 10308 v.AddArg(ptr) 10309 v.AddArg(idx) 10310 v.AddArg(mem) 10311 return true 10312 } 10313 // match: (MOVWstoreconstidx2 [x] {sym} ptr (ADDLconst [c] idx) mem) 10314 // result: (MOVWstoreconstidx2 [ValAndOff(x).add(2*c)] {sym} ptr idx mem) 10315 for { 10316 x := v.AuxInt 10317 sym := v.Aux 10318 mem := v.Args[2] 10319 ptr := v.Args[0] 10320 v_1 := v.Args[1] 10321 if v_1.Op != Op386ADDLconst { 10322 break 10323 } 10324 c := v_1.AuxInt 10325 idx := v_1.Args[0] 10326 v.reset(Op386MOVWstoreconstidx2) 10327 v.AuxInt = ValAndOff(x).add(2 * c) 10328 v.Aux = sym 10329 v.AddArg(ptr) 10330 v.AddArg(idx) 10331 v.AddArg(mem) 10332 return true 10333 } 10334 // match: (MOVWstoreconstidx2 [c] {s} p i x:(MOVWstoreconstidx2 [a] {s} p i mem)) 10335 // cond: x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 10336 // result: (MOVLstoreconstidx1 [makeValAndOff(ValAndOff(a).Val()&0xffff | ValAndOff(c).Val()<<16, ValAndOff(a).Off())] {s} p (SHLLconst <i.Type> [1] i) mem) 10337 for { 10338 c := v.AuxInt 10339 s := v.Aux 10340 _ = v.Args[2] 10341 p := v.Args[0] 10342 i := v.Args[1] 10343 x := v.Args[2] 10344 if x.Op != Op386MOVWstoreconstidx2 { 10345 break 10346 } 10347 a := x.AuxInt 10348 if x.Aux != s { 10349 break 10350 } 10351 mem := x.Args[2] 10352 if p != x.Args[0] || i != x.Args[1] || !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 10353 break 10354 } 10355 v.reset(Op386MOVLstoreconstidx1) 10356 v.AuxInt = makeValAndOff(ValAndOff(a).Val()&0xffff|ValAndOff(c).Val()<<16, ValAndOff(a).Off()) 10357 v.Aux = s 10358 v.AddArg(p) 10359 v0 := b.NewValue0(v.Pos, Op386SHLLconst, i.Type) 10360 v0.AuxInt = 1 10361 v0.AddArg(i) 10362 v.AddArg(v0) 10363 v.AddArg(mem) 10364 return true 10365 } 10366 return false 10367 } 10368 func rewriteValue386_Op386MOVWstoreidx1_0(v *Value) bool { 10369 // match: (MOVWstoreidx1 [c] {sym} ptr (SHLLconst [1] idx) val mem) 10370 // result: (MOVWstoreidx2 [c] {sym} ptr idx val mem) 10371 for { 10372 c := v.AuxInt 10373 sym := v.Aux 10374 mem := v.Args[3] 10375 ptr := v.Args[0] 10376 v_1 := v.Args[1] 10377 if v_1.Op != Op386SHLLconst || v_1.AuxInt != 1 { 10378 break 10379 } 10380 idx := v_1.Args[0] 10381 val := v.Args[2] 10382 v.reset(Op386MOVWstoreidx2) 10383 v.AuxInt = c 10384 v.Aux = sym 10385 v.AddArg(ptr) 10386 v.AddArg(idx) 10387 v.AddArg(val) 10388 v.AddArg(mem) 10389 return true 10390 } 10391 // match: (MOVWstoreidx1 [c] {sym} (SHLLconst [1] idx) ptr val mem) 10392 // result: (MOVWstoreidx2 [c] {sym} ptr idx val mem) 10393 for { 10394 c := v.AuxInt 10395 sym := v.Aux 10396 mem := v.Args[3] 10397 v_0 := v.Args[0] 10398 if v_0.Op != Op386SHLLconst || v_0.AuxInt != 1 { 10399 break 10400 } 10401 idx := v_0.Args[0] 10402 ptr := v.Args[1] 10403 val := v.Args[2] 10404 v.reset(Op386MOVWstoreidx2) 10405 v.AuxInt = c 10406 v.Aux = sym 10407 v.AddArg(ptr) 10408 v.AddArg(idx) 10409 v.AddArg(val) 10410 v.AddArg(mem) 10411 return true 10412 } 10413 // match: (MOVWstoreidx1 [c] {sym} (ADDLconst [d] ptr) idx val mem) 10414 // result: (MOVWstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 10415 for { 10416 c := v.AuxInt 10417 sym := v.Aux 10418 mem := v.Args[3] 10419 v_0 := v.Args[0] 10420 if v_0.Op != Op386ADDLconst { 10421 break 10422 } 10423 d := v_0.AuxInt 10424 ptr := v_0.Args[0] 10425 idx := v.Args[1] 10426 val := v.Args[2] 10427 v.reset(Op386MOVWstoreidx1) 10428 v.AuxInt = int64(int32(c + d)) 10429 v.Aux = sym 10430 v.AddArg(ptr) 10431 v.AddArg(idx) 10432 v.AddArg(val) 10433 v.AddArg(mem) 10434 return true 10435 } 10436 // match: (MOVWstoreidx1 [c] {sym} idx (ADDLconst [d] ptr) val mem) 10437 // result: (MOVWstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 10438 for { 10439 c := v.AuxInt 10440 sym := v.Aux 10441 mem := v.Args[3] 10442 idx := v.Args[0] 10443 v_1 := v.Args[1] 10444 if v_1.Op != Op386ADDLconst { 10445 break 10446 } 10447 d := v_1.AuxInt 10448 ptr := v_1.Args[0] 10449 val := v.Args[2] 10450 v.reset(Op386MOVWstoreidx1) 10451 v.AuxInt = int64(int32(c + d)) 10452 v.Aux = sym 10453 v.AddArg(ptr) 10454 v.AddArg(idx) 10455 v.AddArg(val) 10456 v.AddArg(mem) 10457 return true 10458 } 10459 // match: (MOVWstoreidx1 [c] {sym} ptr (ADDLconst [d] idx) val mem) 10460 // result: (MOVWstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 10461 for { 10462 c := v.AuxInt 10463 sym := v.Aux 10464 mem := v.Args[3] 10465 ptr := v.Args[0] 10466 v_1 := v.Args[1] 10467 if v_1.Op != Op386ADDLconst { 10468 break 10469 } 10470 d := v_1.AuxInt 10471 idx := v_1.Args[0] 10472 val := v.Args[2] 10473 v.reset(Op386MOVWstoreidx1) 10474 v.AuxInt = int64(int32(c + d)) 10475 v.Aux = sym 10476 v.AddArg(ptr) 10477 v.AddArg(idx) 10478 v.AddArg(val) 10479 v.AddArg(mem) 10480 return true 10481 } 10482 // match: (MOVWstoreidx1 [c] {sym} (ADDLconst [d] idx) ptr val mem) 10483 // result: (MOVWstoreidx1 [int64(int32(c+d))] {sym} ptr idx val mem) 10484 for { 10485 c := v.AuxInt 10486 sym := v.Aux 10487 mem := v.Args[3] 10488 v_0 := v.Args[0] 10489 if v_0.Op != Op386ADDLconst { 10490 break 10491 } 10492 d := v_0.AuxInt 10493 idx := v_0.Args[0] 10494 ptr := v.Args[1] 10495 val := v.Args[2] 10496 v.reset(Op386MOVWstoreidx1) 10497 v.AuxInt = int64(int32(c + d)) 10498 v.Aux = sym 10499 v.AddArg(ptr) 10500 v.AddArg(idx) 10501 v.AddArg(val) 10502 v.AddArg(mem) 10503 return true 10504 } 10505 // match: (MOVWstoreidx1 [i] {s} p idx (SHRLconst [16] w) x:(MOVWstoreidx1 [i-2] {s} p idx w mem)) 10506 // cond: x.Uses == 1 && clobber(x) 10507 // result: (MOVLstoreidx1 [i-2] {s} p idx w mem) 10508 for { 10509 i := v.AuxInt 10510 s := v.Aux 10511 _ = v.Args[3] 10512 p := v.Args[0] 10513 idx := v.Args[1] 10514 v_2 := v.Args[2] 10515 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 16 { 10516 break 10517 } 10518 w := v_2.Args[0] 10519 x := v.Args[3] 10520 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10521 break 10522 } 10523 mem := x.Args[3] 10524 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 10525 break 10526 } 10527 v.reset(Op386MOVLstoreidx1) 10528 v.AuxInt = i - 2 10529 v.Aux = s 10530 v.AddArg(p) 10531 v.AddArg(idx) 10532 v.AddArg(w) 10533 v.AddArg(mem) 10534 return true 10535 } 10536 // match: (MOVWstoreidx1 [i] {s} p idx (SHRLconst [16] w) x:(MOVWstoreidx1 [i-2] {s} idx p w mem)) 10537 // cond: x.Uses == 1 && clobber(x) 10538 // result: (MOVLstoreidx1 [i-2] {s} p idx w mem) 10539 for { 10540 i := v.AuxInt 10541 s := v.Aux 10542 _ = v.Args[3] 10543 p := v.Args[0] 10544 idx := v.Args[1] 10545 v_2 := v.Args[2] 10546 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 16 { 10547 break 10548 } 10549 w := v_2.Args[0] 10550 x := v.Args[3] 10551 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10552 break 10553 } 10554 mem := x.Args[3] 10555 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 10556 break 10557 } 10558 v.reset(Op386MOVLstoreidx1) 10559 v.AuxInt = i - 2 10560 v.Aux = s 10561 v.AddArg(p) 10562 v.AddArg(idx) 10563 v.AddArg(w) 10564 v.AddArg(mem) 10565 return true 10566 } 10567 // match: (MOVWstoreidx1 [i] {s} idx p (SHRLconst [16] w) x:(MOVWstoreidx1 [i-2] {s} p idx w mem)) 10568 // cond: x.Uses == 1 && clobber(x) 10569 // result: (MOVLstoreidx1 [i-2] {s} p idx w mem) 10570 for { 10571 i := v.AuxInt 10572 s := v.Aux 10573 _ = v.Args[3] 10574 idx := v.Args[0] 10575 p := v.Args[1] 10576 v_2 := v.Args[2] 10577 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 16 { 10578 break 10579 } 10580 w := v_2.Args[0] 10581 x := v.Args[3] 10582 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10583 break 10584 } 10585 mem := x.Args[3] 10586 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 10587 break 10588 } 10589 v.reset(Op386MOVLstoreidx1) 10590 v.AuxInt = i - 2 10591 v.Aux = s 10592 v.AddArg(p) 10593 v.AddArg(idx) 10594 v.AddArg(w) 10595 v.AddArg(mem) 10596 return true 10597 } 10598 // match: (MOVWstoreidx1 [i] {s} idx p (SHRLconst [16] w) x:(MOVWstoreidx1 [i-2] {s} idx p w mem)) 10599 // cond: x.Uses == 1 && clobber(x) 10600 // result: (MOVLstoreidx1 [i-2] {s} p idx w mem) 10601 for { 10602 i := v.AuxInt 10603 s := v.Aux 10604 _ = v.Args[3] 10605 idx := v.Args[0] 10606 p := v.Args[1] 10607 v_2 := v.Args[2] 10608 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 16 { 10609 break 10610 } 10611 w := v_2.Args[0] 10612 x := v.Args[3] 10613 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10614 break 10615 } 10616 mem := x.Args[3] 10617 if idx != x.Args[0] || p != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 10618 break 10619 } 10620 v.reset(Op386MOVLstoreidx1) 10621 v.AuxInt = i - 2 10622 v.Aux = s 10623 v.AddArg(p) 10624 v.AddArg(idx) 10625 v.AddArg(w) 10626 v.AddArg(mem) 10627 return true 10628 } 10629 return false 10630 } 10631 func rewriteValue386_Op386MOVWstoreidx1_10(v *Value) bool { 10632 // match: (MOVWstoreidx1 [i] {s} p idx (SHRLconst [j] w) x:(MOVWstoreidx1 [i-2] {s} p idx w0:(SHRLconst [j-16] w) mem)) 10633 // cond: x.Uses == 1 && clobber(x) 10634 // result: (MOVLstoreidx1 [i-2] {s} p idx w0 mem) 10635 for { 10636 i := v.AuxInt 10637 s := v.Aux 10638 _ = v.Args[3] 10639 p := v.Args[0] 10640 idx := v.Args[1] 10641 v_2 := v.Args[2] 10642 if v_2.Op != Op386SHRLconst { 10643 break 10644 } 10645 j := v_2.AuxInt 10646 w := v_2.Args[0] 10647 x := v.Args[3] 10648 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10649 break 10650 } 10651 mem := x.Args[3] 10652 if p != x.Args[0] || idx != x.Args[1] { 10653 break 10654 } 10655 w0 := x.Args[2] 10656 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10657 break 10658 } 10659 v.reset(Op386MOVLstoreidx1) 10660 v.AuxInt = i - 2 10661 v.Aux = s 10662 v.AddArg(p) 10663 v.AddArg(idx) 10664 v.AddArg(w0) 10665 v.AddArg(mem) 10666 return true 10667 } 10668 // match: (MOVWstoreidx1 [i] {s} p idx (SHRLconst [j] w) x:(MOVWstoreidx1 [i-2] {s} idx p w0:(SHRLconst [j-16] w) mem)) 10669 // cond: x.Uses == 1 && clobber(x) 10670 // result: (MOVLstoreidx1 [i-2] {s} p idx w0 mem) 10671 for { 10672 i := v.AuxInt 10673 s := v.Aux 10674 _ = v.Args[3] 10675 p := v.Args[0] 10676 idx := v.Args[1] 10677 v_2 := v.Args[2] 10678 if v_2.Op != Op386SHRLconst { 10679 break 10680 } 10681 j := v_2.AuxInt 10682 w := v_2.Args[0] 10683 x := v.Args[3] 10684 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10685 break 10686 } 10687 mem := x.Args[3] 10688 if idx != x.Args[0] || p != x.Args[1] { 10689 break 10690 } 10691 w0 := x.Args[2] 10692 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10693 break 10694 } 10695 v.reset(Op386MOVLstoreidx1) 10696 v.AuxInt = i - 2 10697 v.Aux = s 10698 v.AddArg(p) 10699 v.AddArg(idx) 10700 v.AddArg(w0) 10701 v.AddArg(mem) 10702 return true 10703 } 10704 // match: (MOVWstoreidx1 [i] {s} idx p (SHRLconst [j] w) x:(MOVWstoreidx1 [i-2] {s} p idx w0:(SHRLconst [j-16] w) mem)) 10705 // cond: x.Uses == 1 && clobber(x) 10706 // result: (MOVLstoreidx1 [i-2] {s} p idx w0 mem) 10707 for { 10708 i := v.AuxInt 10709 s := v.Aux 10710 _ = v.Args[3] 10711 idx := v.Args[0] 10712 p := v.Args[1] 10713 v_2 := v.Args[2] 10714 if v_2.Op != Op386SHRLconst { 10715 break 10716 } 10717 j := v_2.AuxInt 10718 w := v_2.Args[0] 10719 x := v.Args[3] 10720 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10721 break 10722 } 10723 mem := x.Args[3] 10724 if p != x.Args[0] || idx != x.Args[1] { 10725 break 10726 } 10727 w0 := x.Args[2] 10728 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10729 break 10730 } 10731 v.reset(Op386MOVLstoreidx1) 10732 v.AuxInt = i - 2 10733 v.Aux = s 10734 v.AddArg(p) 10735 v.AddArg(idx) 10736 v.AddArg(w0) 10737 v.AddArg(mem) 10738 return true 10739 } 10740 // match: (MOVWstoreidx1 [i] {s} idx p (SHRLconst [j] w) x:(MOVWstoreidx1 [i-2] {s} idx p w0:(SHRLconst [j-16] w) mem)) 10741 // cond: x.Uses == 1 && clobber(x) 10742 // result: (MOVLstoreidx1 [i-2] {s} p idx w0 mem) 10743 for { 10744 i := v.AuxInt 10745 s := v.Aux 10746 _ = v.Args[3] 10747 idx := v.Args[0] 10748 p := v.Args[1] 10749 v_2 := v.Args[2] 10750 if v_2.Op != Op386SHRLconst { 10751 break 10752 } 10753 j := v_2.AuxInt 10754 w := v_2.Args[0] 10755 x := v.Args[3] 10756 if x.Op != Op386MOVWstoreidx1 || x.AuxInt != i-2 || x.Aux != s { 10757 break 10758 } 10759 mem := x.Args[3] 10760 if idx != x.Args[0] || p != x.Args[1] { 10761 break 10762 } 10763 w0 := x.Args[2] 10764 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10765 break 10766 } 10767 v.reset(Op386MOVLstoreidx1) 10768 v.AuxInt = i - 2 10769 v.Aux = s 10770 v.AddArg(p) 10771 v.AddArg(idx) 10772 v.AddArg(w0) 10773 v.AddArg(mem) 10774 return true 10775 } 10776 return false 10777 } 10778 func rewriteValue386_Op386MOVWstoreidx2_0(v *Value) bool { 10779 b := v.Block 10780 // match: (MOVWstoreidx2 [c] {sym} (ADDLconst [d] ptr) idx val mem) 10781 // result: (MOVWstoreidx2 [int64(int32(c+d))] {sym} ptr idx val mem) 10782 for { 10783 c := v.AuxInt 10784 sym := v.Aux 10785 mem := v.Args[3] 10786 v_0 := v.Args[0] 10787 if v_0.Op != Op386ADDLconst { 10788 break 10789 } 10790 d := v_0.AuxInt 10791 ptr := v_0.Args[0] 10792 idx := v.Args[1] 10793 val := v.Args[2] 10794 v.reset(Op386MOVWstoreidx2) 10795 v.AuxInt = int64(int32(c + d)) 10796 v.Aux = sym 10797 v.AddArg(ptr) 10798 v.AddArg(idx) 10799 v.AddArg(val) 10800 v.AddArg(mem) 10801 return true 10802 } 10803 // match: (MOVWstoreidx2 [c] {sym} ptr (ADDLconst [d] idx) val mem) 10804 // result: (MOVWstoreidx2 [int64(int32(c+2*d))] {sym} ptr idx val mem) 10805 for { 10806 c := v.AuxInt 10807 sym := v.Aux 10808 mem := v.Args[3] 10809 ptr := v.Args[0] 10810 v_1 := v.Args[1] 10811 if v_1.Op != Op386ADDLconst { 10812 break 10813 } 10814 d := v_1.AuxInt 10815 idx := v_1.Args[0] 10816 val := v.Args[2] 10817 v.reset(Op386MOVWstoreidx2) 10818 v.AuxInt = int64(int32(c + 2*d)) 10819 v.Aux = sym 10820 v.AddArg(ptr) 10821 v.AddArg(idx) 10822 v.AddArg(val) 10823 v.AddArg(mem) 10824 return true 10825 } 10826 // match: (MOVWstoreidx2 [i] {s} p idx (SHRLconst [16] w) x:(MOVWstoreidx2 [i-2] {s} p idx w mem)) 10827 // cond: x.Uses == 1 && clobber(x) 10828 // result: (MOVLstoreidx1 [i-2] {s} p (SHLLconst <idx.Type> [1] idx) w mem) 10829 for { 10830 i := v.AuxInt 10831 s := v.Aux 10832 _ = v.Args[3] 10833 p := v.Args[0] 10834 idx := v.Args[1] 10835 v_2 := v.Args[2] 10836 if v_2.Op != Op386SHRLconst || v_2.AuxInt != 16 { 10837 break 10838 } 10839 w := v_2.Args[0] 10840 x := v.Args[3] 10841 if x.Op != Op386MOVWstoreidx2 || x.AuxInt != i-2 || x.Aux != s { 10842 break 10843 } 10844 mem := x.Args[3] 10845 if p != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) { 10846 break 10847 } 10848 v.reset(Op386MOVLstoreidx1) 10849 v.AuxInt = i - 2 10850 v.Aux = s 10851 v.AddArg(p) 10852 v0 := b.NewValue0(v.Pos, Op386SHLLconst, idx.Type) 10853 v0.AuxInt = 1 10854 v0.AddArg(idx) 10855 v.AddArg(v0) 10856 v.AddArg(w) 10857 v.AddArg(mem) 10858 return true 10859 } 10860 // match: (MOVWstoreidx2 [i] {s} p idx (SHRLconst [j] w) x:(MOVWstoreidx2 [i-2] {s} p idx w0:(SHRLconst [j-16] w) mem)) 10861 // cond: x.Uses == 1 && clobber(x) 10862 // result: (MOVLstoreidx1 [i-2] {s} p (SHLLconst <idx.Type> [1] idx) w0 mem) 10863 for { 10864 i := v.AuxInt 10865 s := v.Aux 10866 _ = v.Args[3] 10867 p := v.Args[0] 10868 idx := v.Args[1] 10869 v_2 := v.Args[2] 10870 if v_2.Op != Op386SHRLconst { 10871 break 10872 } 10873 j := v_2.AuxInt 10874 w := v_2.Args[0] 10875 x := v.Args[3] 10876 if x.Op != Op386MOVWstoreidx2 || x.AuxInt != i-2 || x.Aux != s { 10877 break 10878 } 10879 mem := x.Args[3] 10880 if p != x.Args[0] || idx != x.Args[1] { 10881 break 10882 } 10883 w0 := x.Args[2] 10884 if w0.Op != Op386SHRLconst || w0.AuxInt != j-16 || w != w0.Args[0] || !(x.Uses == 1 && clobber(x)) { 10885 break 10886 } 10887 v.reset(Op386MOVLstoreidx1) 10888 v.AuxInt = i - 2 10889 v.Aux = s 10890 v.AddArg(p) 10891 v0 := b.NewValue0(v.Pos, Op386SHLLconst, idx.Type) 10892 v0.AuxInt = 1 10893 v0.AddArg(idx) 10894 v.AddArg(v0) 10895 v.AddArg(w0) 10896 v.AddArg(mem) 10897 return true 10898 } 10899 return false 10900 } 10901 func rewriteValue386_Op386MULL_0(v *Value) bool { 10902 // match: (MULL x (MOVLconst [c])) 10903 // result: (MULLconst [c] x) 10904 for { 10905 _ = v.Args[1] 10906 x := v.Args[0] 10907 v_1 := v.Args[1] 10908 if v_1.Op != Op386MOVLconst { 10909 break 10910 } 10911 c := v_1.AuxInt 10912 v.reset(Op386MULLconst) 10913 v.AuxInt = c 10914 v.AddArg(x) 10915 return true 10916 } 10917 // match: (MULL (MOVLconst [c]) x) 10918 // result: (MULLconst [c] x) 10919 for { 10920 x := v.Args[1] 10921 v_0 := v.Args[0] 10922 if v_0.Op != Op386MOVLconst { 10923 break 10924 } 10925 c := v_0.AuxInt 10926 v.reset(Op386MULLconst) 10927 v.AuxInt = c 10928 v.AddArg(x) 10929 return true 10930 } 10931 // match: (MULL x l:(MOVLload [off] {sym} ptr mem)) 10932 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 10933 // result: (MULLload x [off] {sym} ptr mem) 10934 for { 10935 _ = v.Args[1] 10936 x := v.Args[0] 10937 l := v.Args[1] 10938 if l.Op != Op386MOVLload { 10939 break 10940 } 10941 off := l.AuxInt 10942 sym := l.Aux 10943 mem := l.Args[1] 10944 ptr := l.Args[0] 10945 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 10946 break 10947 } 10948 v.reset(Op386MULLload) 10949 v.AuxInt = off 10950 v.Aux = sym 10951 v.AddArg(x) 10952 v.AddArg(ptr) 10953 v.AddArg(mem) 10954 return true 10955 } 10956 // match: (MULL l:(MOVLload [off] {sym} ptr mem) x) 10957 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 10958 // result: (MULLload x [off] {sym} ptr mem) 10959 for { 10960 x := v.Args[1] 10961 l := v.Args[0] 10962 if l.Op != Op386MOVLload { 10963 break 10964 } 10965 off := l.AuxInt 10966 sym := l.Aux 10967 mem := l.Args[1] 10968 ptr := l.Args[0] 10969 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 10970 break 10971 } 10972 v.reset(Op386MULLload) 10973 v.AuxInt = off 10974 v.Aux = sym 10975 v.AddArg(x) 10976 v.AddArg(ptr) 10977 v.AddArg(mem) 10978 return true 10979 } 10980 // match: (MULL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 10981 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 10982 // result: (MULLloadidx4 x [off] {sym} ptr idx mem) 10983 for { 10984 _ = v.Args[1] 10985 x := v.Args[0] 10986 l := v.Args[1] 10987 if l.Op != Op386MOVLloadidx4 { 10988 break 10989 } 10990 off := l.AuxInt 10991 sym := l.Aux 10992 mem := l.Args[2] 10993 ptr := l.Args[0] 10994 idx := l.Args[1] 10995 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 10996 break 10997 } 10998 v.reset(Op386MULLloadidx4) 10999 v.AuxInt = off 11000 v.Aux = sym 11001 v.AddArg(x) 11002 v.AddArg(ptr) 11003 v.AddArg(idx) 11004 v.AddArg(mem) 11005 return true 11006 } 11007 // match: (MULL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) 11008 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 11009 // result: (MULLloadidx4 x [off] {sym} ptr idx mem) 11010 for { 11011 x := v.Args[1] 11012 l := v.Args[0] 11013 if l.Op != Op386MOVLloadidx4 { 11014 break 11015 } 11016 off := l.AuxInt 11017 sym := l.Aux 11018 mem := l.Args[2] 11019 ptr := l.Args[0] 11020 idx := l.Args[1] 11021 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 11022 break 11023 } 11024 v.reset(Op386MULLloadidx4) 11025 v.AuxInt = off 11026 v.Aux = sym 11027 v.AddArg(x) 11028 v.AddArg(ptr) 11029 v.AddArg(idx) 11030 v.AddArg(mem) 11031 return true 11032 } 11033 return false 11034 } 11035 func rewriteValue386_Op386MULLconst_0(v *Value) bool { 11036 b := v.Block 11037 // match: (MULLconst [c] (MULLconst [d] x)) 11038 // result: (MULLconst [int64(int32(c * d))] x) 11039 for { 11040 c := v.AuxInt 11041 v_0 := v.Args[0] 11042 if v_0.Op != Op386MULLconst { 11043 break 11044 } 11045 d := v_0.AuxInt 11046 x := v_0.Args[0] 11047 v.reset(Op386MULLconst) 11048 v.AuxInt = int64(int32(c * d)) 11049 v.AddArg(x) 11050 return true 11051 } 11052 // match: (MULLconst [-9] x) 11053 // result: (NEGL (LEAL8 <v.Type> x x)) 11054 for { 11055 if v.AuxInt != -9 { 11056 break 11057 } 11058 x := v.Args[0] 11059 v.reset(Op386NEGL) 11060 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11061 v0.AddArg(x) 11062 v0.AddArg(x) 11063 v.AddArg(v0) 11064 return true 11065 } 11066 // match: (MULLconst [-5] x) 11067 // result: (NEGL (LEAL4 <v.Type> x x)) 11068 for { 11069 if v.AuxInt != -5 { 11070 break 11071 } 11072 x := v.Args[0] 11073 v.reset(Op386NEGL) 11074 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11075 v0.AddArg(x) 11076 v0.AddArg(x) 11077 v.AddArg(v0) 11078 return true 11079 } 11080 // match: (MULLconst [-3] x) 11081 // result: (NEGL (LEAL2 <v.Type> x x)) 11082 for { 11083 if v.AuxInt != -3 { 11084 break 11085 } 11086 x := v.Args[0] 11087 v.reset(Op386NEGL) 11088 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11089 v0.AddArg(x) 11090 v0.AddArg(x) 11091 v.AddArg(v0) 11092 return true 11093 } 11094 // match: (MULLconst [-1] x) 11095 // result: (NEGL x) 11096 for { 11097 if v.AuxInt != -1 { 11098 break 11099 } 11100 x := v.Args[0] 11101 v.reset(Op386NEGL) 11102 v.AddArg(x) 11103 return true 11104 } 11105 // match: (MULLconst [0] _) 11106 // result: (MOVLconst [0]) 11107 for { 11108 if v.AuxInt != 0 { 11109 break 11110 } 11111 v.reset(Op386MOVLconst) 11112 v.AuxInt = 0 11113 return true 11114 } 11115 // match: (MULLconst [1] x) 11116 // result: x 11117 for { 11118 if v.AuxInt != 1 { 11119 break 11120 } 11121 x := v.Args[0] 11122 v.reset(OpCopy) 11123 v.Type = x.Type 11124 v.AddArg(x) 11125 return true 11126 } 11127 // match: (MULLconst [3] x) 11128 // result: (LEAL2 x x) 11129 for { 11130 if v.AuxInt != 3 { 11131 break 11132 } 11133 x := v.Args[0] 11134 v.reset(Op386LEAL2) 11135 v.AddArg(x) 11136 v.AddArg(x) 11137 return true 11138 } 11139 // match: (MULLconst [5] x) 11140 // result: (LEAL4 x x) 11141 for { 11142 if v.AuxInt != 5 { 11143 break 11144 } 11145 x := v.Args[0] 11146 v.reset(Op386LEAL4) 11147 v.AddArg(x) 11148 v.AddArg(x) 11149 return true 11150 } 11151 // match: (MULLconst [7] x) 11152 // result: (LEAL2 x (LEAL2 <v.Type> x x)) 11153 for { 11154 if v.AuxInt != 7 { 11155 break 11156 } 11157 x := v.Args[0] 11158 v.reset(Op386LEAL2) 11159 v.AddArg(x) 11160 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11161 v0.AddArg(x) 11162 v0.AddArg(x) 11163 v.AddArg(v0) 11164 return true 11165 } 11166 return false 11167 } 11168 func rewriteValue386_Op386MULLconst_10(v *Value) bool { 11169 b := v.Block 11170 // match: (MULLconst [9] x) 11171 // result: (LEAL8 x x) 11172 for { 11173 if v.AuxInt != 9 { 11174 break 11175 } 11176 x := v.Args[0] 11177 v.reset(Op386LEAL8) 11178 v.AddArg(x) 11179 v.AddArg(x) 11180 return true 11181 } 11182 // match: (MULLconst [11] x) 11183 // result: (LEAL2 x (LEAL4 <v.Type> x x)) 11184 for { 11185 if v.AuxInt != 11 { 11186 break 11187 } 11188 x := v.Args[0] 11189 v.reset(Op386LEAL2) 11190 v.AddArg(x) 11191 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11192 v0.AddArg(x) 11193 v0.AddArg(x) 11194 v.AddArg(v0) 11195 return true 11196 } 11197 // match: (MULLconst [13] x) 11198 // result: (LEAL4 x (LEAL2 <v.Type> x x)) 11199 for { 11200 if v.AuxInt != 13 { 11201 break 11202 } 11203 x := v.Args[0] 11204 v.reset(Op386LEAL4) 11205 v.AddArg(x) 11206 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11207 v0.AddArg(x) 11208 v0.AddArg(x) 11209 v.AddArg(v0) 11210 return true 11211 } 11212 // match: (MULLconst [19] x) 11213 // result: (LEAL2 x (LEAL8 <v.Type> x x)) 11214 for { 11215 if v.AuxInt != 19 { 11216 break 11217 } 11218 x := v.Args[0] 11219 v.reset(Op386LEAL2) 11220 v.AddArg(x) 11221 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11222 v0.AddArg(x) 11223 v0.AddArg(x) 11224 v.AddArg(v0) 11225 return true 11226 } 11227 // match: (MULLconst [21] x) 11228 // result: (LEAL4 x (LEAL4 <v.Type> x x)) 11229 for { 11230 if v.AuxInt != 21 { 11231 break 11232 } 11233 x := v.Args[0] 11234 v.reset(Op386LEAL4) 11235 v.AddArg(x) 11236 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11237 v0.AddArg(x) 11238 v0.AddArg(x) 11239 v.AddArg(v0) 11240 return true 11241 } 11242 // match: (MULLconst [25] x) 11243 // result: (LEAL8 x (LEAL2 <v.Type> x x)) 11244 for { 11245 if v.AuxInt != 25 { 11246 break 11247 } 11248 x := v.Args[0] 11249 v.reset(Op386LEAL8) 11250 v.AddArg(x) 11251 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11252 v0.AddArg(x) 11253 v0.AddArg(x) 11254 v.AddArg(v0) 11255 return true 11256 } 11257 // match: (MULLconst [27] x) 11258 // result: (LEAL8 (LEAL2 <v.Type> x x) (LEAL2 <v.Type> x x)) 11259 for { 11260 if v.AuxInt != 27 { 11261 break 11262 } 11263 x := v.Args[0] 11264 v.reset(Op386LEAL8) 11265 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11266 v0.AddArg(x) 11267 v0.AddArg(x) 11268 v.AddArg(v0) 11269 v1 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11270 v1.AddArg(x) 11271 v1.AddArg(x) 11272 v.AddArg(v1) 11273 return true 11274 } 11275 // match: (MULLconst [37] x) 11276 // result: (LEAL4 x (LEAL8 <v.Type> x x)) 11277 for { 11278 if v.AuxInt != 37 { 11279 break 11280 } 11281 x := v.Args[0] 11282 v.reset(Op386LEAL4) 11283 v.AddArg(x) 11284 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11285 v0.AddArg(x) 11286 v0.AddArg(x) 11287 v.AddArg(v0) 11288 return true 11289 } 11290 // match: (MULLconst [41] x) 11291 // result: (LEAL8 x (LEAL4 <v.Type> x x)) 11292 for { 11293 if v.AuxInt != 41 { 11294 break 11295 } 11296 x := v.Args[0] 11297 v.reset(Op386LEAL8) 11298 v.AddArg(x) 11299 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11300 v0.AddArg(x) 11301 v0.AddArg(x) 11302 v.AddArg(v0) 11303 return true 11304 } 11305 // match: (MULLconst [45] x) 11306 // result: (LEAL8 (LEAL4 <v.Type> x x) (LEAL4 <v.Type> x x)) 11307 for { 11308 if v.AuxInt != 45 { 11309 break 11310 } 11311 x := v.Args[0] 11312 v.reset(Op386LEAL8) 11313 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11314 v0.AddArg(x) 11315 v0.AddArg(x) 11316 v.AddArg(v0) 11317 v1 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11318 v1.AddArg(x) 11319 v1.AddArg(x) 11320 v.AddArg(v1) 11321 return true 11322 } 11323 return false 11324 } 11325 func rewriteValue386_Op386MULLconst_20(v *Value) bool { 11326 b := v.Block 11327 // match: (MULLconst [73] x) 11328 // result: (LEAL8 x (LEAL8 <v.Type> x x)) 11329 for { 11330 if v.AuxInt != 73 { 11331 break 11332 } 11333 x := v.Args[0] 11334 v.reset(Op386LEAL8) 11335 v.AddArg(x) 11336 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11337 v0.AddArg(x) 11338 v0.AddArg(x) 11339 v.AddArg(v0) 11340 return true 11341 } 11342 // match: (MULLconst [81] x) 11343 // result: (LEAL8 (LEAL8 <v.Type> x x) (LEAL8 <v.Type> x x)) 11344 for { 11345 if v.AuxInt != 81 { 11346 break 11347 } 11348 x := v.Args[0] 11349 v.reset(Op386LEAL8) 11350 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11351 v0.AddArg(x) 11352 v0.AddArg(x) 11353 v.AddArg(v0) 11354 v1 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11355 v1.AddArg(x) 11356 v1.AddArg(x) 11357 v.AddArg(v1) 11358 return true 11359 } 11360 // match: (MULLconst [c] x) 11361 // cond: isPowerOfTwo(c+1) && c >= 15 11362 // result: (SUBL (SHLLconst <v.Type> [log2(c+1)] x) x) 11363 for { 11364 c := v.AuxInt 11365 x := v.Args[0] 11366 if !(isPowerOfTwo(c+1) && c >= 15) { 11367 break 11368 } 11369 v.reset(Op386SUBL) 11370 v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type) 11371 v0.AuxInt = log2(c + 1) 11372 v0.AddArg(x) 11373 v.AddArg(v0) 11374 v.AddArg(x) 11375 return true 11376 } 11377 // match: (MULLconst [c] x) 11378 // cond: isPowerOfTwo(c-1) && c >= 17 11379 // result: (LEAL1 (SHLLconst <v.Type> [log2(c-1)] x) x) 11380 for { 11381 c := v.AuxInt 11382 x := v.Args[0] 11383 if !(isPowerOfTwo(c-1) && c >= 17) { 11384 break 11385 } 11386 v.reset(Op386LEAL1) 11387 v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type) 11388 v0.AuxInt = log2(c - 1) 11389 v0.AddArg(x) 11390 v.AddArg(v0) 11391 v.AddArg(x) 11392 return true 11393 } 11394 // match: (MULLconst [c] x) 11395 // cond: isPowerOfTwo(c-2) && c >= 34 11396 // result: (LEAL2 (SHLLconst <v.Type> [log2(c-2)] x) x) 11397 for { 11398 c := v.AuxInt 11399 x := v.Args[0] 11400 if !(isPowerOfTwo(c-2) && c >= 34) { 11401 break 11402 } 11403 v.reset(Op386LEAL2) 11404 v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type) 11405 v0.AuxInt = log2(c - 2) 11406 v0.AddArg(x) 11407 v.AddArg(v0) 11408 v.AddArg(x) 11409 return true 11410 } 11411 // match: (MULLconst [c] x) 11412 // cond: isPowerOfTwo(c-4) && c >= 68 11413 // result: (LEAL4 (SHLLconst <v.Type> [log2(c-4)] x) x) 11414 for { 11415 c := v.AuxInt 11416 x := v.Args[0] 11417 if !(isPowerOfTwo(c-4) && c >= 68) { 11418 break 11419 } 11420 v.reset(Op386LEAL4) 11421 v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type) 11422 v0.AuxInt = log2(c - 4) 11423 v0.AddArg(x) 11424 v.AddArg(v0) 11425 v.AddArg(x) 11426 return true 11427 } 11428 // match: (MULLconst [c] x) 11429 // cond: isPowerOfTwo(c-8) && c >= 136 11430 // result: (LEAL8 (SHLLconst <v.Type> [log2(c-8)] x) x) 11431 for { 11432 c := v.AuxInt 11433 x := v.Args[0] 11434 if !(isPowerOfTwo(c-8) && c >= 136) { 11435 break 11436 } 11437 v.reset(Op386LEAL8) 11438 v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type) 11439 v0.AuxInt = log2(c - 8) 11440 v0.AddArg(x) 11441 v.AddArg(v0) 11442 v.AddArg(x) 11443 return true 11444 } 11445 // match: (MULLconst [c] x) 11446 // cond: c%3 == 0 && isPowerOfTwo(c/3) 11447 // result: (SHLLconst [log2(c/3)] (LEAL2 <v.Type> x x)) 11448 for { 11449 c := v.AuxInt 11450 x := v.Args[0] 11451 if !(c%3 == 0 && isPowerOfTwo(c/3)) { 11452 break 11453 } 11454 v.reset(Op386SHLLconst) 11455 v.AuxInt = log2(c / 3) 11456 v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type) 11457 v0.AddArg(x) 11458 v0.AddArg(x) 11459 v.AddArg(v0) 11460 return true 11461 } 11462 // match: (MULLconst [c] x) 11463 // cond: c%5 == 0 && isPowerOfTwo(c/5) 11464 // result: (SHLLconst [log2(c/5)] (LEAL4 <v.Type> x x)) 11465 for { 11466 c := v.AuxInt 11467 x := v.Args[0] 11468 if !(c%5 == 0 && isPowerOfTwo(c/5)) { 11469 break 11470 } 11471 v.reset(Op386SHLLconst) 11472 v.AuxInt = log2(c / 5) 11473 v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type) 11474 v0.AddArg(x) 11475 v0.AddArg(x) 11476 v.AddArg(v0) 11477 return true 11478 } 11479 // match: (MULLconst [c] x) 11480 // cond: c%9 == 0 && isPowerOfTwo(c/9) 11481 // result: (SHLLconst [log2(c/9)] (LEAL8 <v.Type> x x)) 11482 for { 11483 c := v.AuxInt 11484 x := v.Args[0] 11485 if !(c%9 == 0 && isPowerOfTwo(c/9)) { 11486 break 11487 } 11488 v.reset(Op386SHLLconst) 11489 v.AuxInt = log2(c / 9) 11490 v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type) 11491 v0.AddArg(x) 11492 v0.AddArg(x) 11493 v.AddArg(v0) 11494 return true 11495 } 11496 return false 11497 } 11498 func rewriteValue386_Op386MULLconst_30(v *Value) bool { 11499 // match: (MULLconst [c] (MOVLconst [d])) 11500 // result: (MOVLconst [int64(int32(c*d))]) 11501 for { 11502 c := v.AuxInt 11503 v_0 := v.Args[0] 11504 if v_0.Op != Op386MOVLconst { 11505 break 11506 } 11507 d := v_0.AuxInt 11508 v.reset(Op386MOVLconst) 11509 v.AuxInt = int64(int32(c * d)) 11510 return true 11511 } 11512 return false 11513 } 11514 func rewriteValue386_Op386MULLload_0(v *Value) bool { 11515 b := v.Block 11516 config := b.Func.Config 11517 // match: (MULLload [off1] {sym} val (ADDLconst [off2] base) mem) 11518 // cond: is32Bit(off1+off2) 11519 // result: (MULLload [off1+off2] {sym} val base mem) 11520 for { 11521 off1 := v.AuxInt 11522 sym := v.Aux 11523 mem := v.Args[2] 11524 val := v.Args[0] 11525 v_1 := v.Args[1] 11526 if v_1.Op != Op386ADDLconst { 11527 break 11528 } 11529 off2 := v_1.AuxInt 11530 base := v_1.Args[0] 11531 if !(is32Bit(off1 + off2)) { 11532 break 11533 } 11534 v.reset(Op386MULLload) 11535 v.AuxInt = off1 + off2 11536 v.Aux = sym 11537 v.AddArg(val) 11538 v.AddArg(base) 11539 v.AddArg(mem) 11540 return true 11541 } 11542 // match: (MULLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 11543 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 11544 // result: (MULLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 11545 for { 11546 off1 := v.AuxInt 11547 sym1 := v.Aux 11548 mem := v.Args[2] 11549 val := v.Args[0] 11550 v_1 := v.Args[1] 11551 if v_1.Op != Op386LEAL { 11552 break 11553 } 11554 off2 := v_1.AuxInt 11555 sym2 := v_1.Aux 11556 base := v_1.Args[0] 11557 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 11558 break 11559 } 11560 v.reset(Op386MULLload) 11561 v.AuxInt = off1 + off2 11562 v.Aux = mergeSym(sym1, sym2) 11563 v.AddArg(val) 11564 v.AddArg(base) 11565 v.AddArg(mem) 11566 return true 11567 } 11568 // match: (MULLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 11569 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11570 // result: (MULLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 11571 for { 11572 off1 := v.AuxInt 11573 sym1 := v.Aux 11574 mem := v.Args[2] 11575 val := v.Args[0] 11576 v_1 := v.Args[1] 11577 if v_1.Op != Op386LEAL4 { 11578 break 11579 } 11580 off2 := v_1.AuxInt 11581 sym2 := v_1.Aux 11582 idx := v_1.Args[1] 11583 ptr := v_1.Args[0] 11584 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11585 break 11586 } 11587 v.reset(Op386MULLloadidx4) 11588 v.AuxInt = off1 + off2 11589 v.Aux = mergeSym(sym1, sym2) 11590 v.AddArg(val) 11591 v.AddArg(ptr) 11592 v.AddArg(idx) 11593 v.AddArg(mem) 11594 return true 11595 } 11596 return false 11597 } 11598 func rewriteValue386_Op386MULLloadidx4_0(v *Value) bool { 11599 b := v.Block 11600 config := b.Func.Config 11601 // match: (MULLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 11602 // cond: is32Bit(off1+off2) 11603 // result: (MULLloadidx4 [off1+off2] {sym} val base idx mem) 11604 for { 11605 off1 := v.AuxInt 11606 sym := v.Aux 11607 mem := v.Args[3] 11608 val := v.Args[0] 11609 v_1 := v.Args[1] 11610 if v_1.Op != Op386ADDLconst { 11611 break 11612 } 11613 off2 := v_1.AuxInt 11614 base := v_1.Args[0] 11615 idx := v.Args[2] 11616 if !(is32Bit(off1 + off2)) { 11617 break 11618 } 11619 v.reset(Op386MULLloadidx4) 11620 v.AuxInt = off1 + off2 11621 v.Aux = sym 11622 v.AddArg(val) 11623 v.AddArg(base) 11624 v.AddArg(idx) 11625 v.AddArg(mem) 11626 return true 11627 } 11628 // match: (MULLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 11629 // cond: is32Bit(off1+off2*4) 11630 // result: (MULLloadidx4 [off1+off2*4] {sym} val base idx mem) 11631 for { 11632 off1 := v.AuxInt 11633 sym := v.Aux 11634 mem := v.Args[3] 11635 val := v.Args[0] 11636 base := v.Args[1] 11637 v_2 := v.Args[2] 11638 if v_2.Op != Op386ADDLconst { 11639 break 11640 } 11641 off2 := v_2.AuxInt 11642 idx := v_2.Args[0] 11643 if !(is32Bit(off1 + off2*4)) { 11644 break 11645 } 11646 v.reset(Op386MULLloadidx4) 11647 v.AuxInt = off1 + off2*4 11648 v.Aux = sym 11649 v.AddArg(val) 11650 v.AddArg(base) 11651 v.AddArg(idx) 11652 v.AddArg(mem) 11653 return true 11654 } 11655 // match: (MULLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 11656 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 11657 // result: (MULLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 11658 for { 11659 off1 := v.AuxInt 11660 sym1 := v.Aux 11661 mem := v.Args[3] 11662 val := v.Args[0] 11663 v_1 := v.Args[1] 11664 if v_1.Op != Op386LEAL { 11665 break 11666 } 11667 off2 := v_1.AuxInt 11668 sym2 := v_1.Aux 11669 base := v_1.Args[0] 11670 idx := v.Args[2] 11671 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 11672 break 11673 } 11674 v.reset(Op386MULLloadidx4) 11675 v.AuxInt = off1 + off2 11676 v.Aux = mergeSym(sym1, sym2) 11677 v.AddArg(val) 11678 v.AddArg(base) 11679 v.AddArg(idx) 11680 v.AddArg(mem) 11681 return true 11682 } 11683 return false 11684 } 11685 func rewriteValue386_Op386MULSD_0(v *Value) bool { 11686 b := v.Block 11687 config := b.Func.Config 11688 // match: (MULSD x l:(MOVSDload [off] {sym} ptr mem)) 11689 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 11690 // result: (MULSDload x [off] {sym} ptr mem) 11691 for { 11692 _ = v.Args[1] 11693 x := v.Args[0] 11694 l := v.Args[1] 11695 if l.Op != Op386MOVSDload { 11696 break 11697 } 11698 off := l.AuxInt 11699 sym := l.Aux 11700 mem := l.Args[1] 11701 ptr := l.Args[0] 11702 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 11703 break 11704 } 11705 v.reset(Op386MULSDload) 11706 v.AuxInt = off 11707 v.Aux = sym 11708 v.AddArg(x) 11709 v.AddArg(ptr) 11710 v.AddArg(mem) 11711 return true 11712 } 11713 // match: (MULSD l:(MOVSDload [off] {sym} ptr mem) x) 11714 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 11715 // result: (MULSDload x [off] {sym} ptr mem) 11716 for { 11717 x := v.Args[1] 11718 l := v.Args[0] 11719 if l.Op != Op386MOVSDload { 11720 break 11721 } 11722 off := l.AuxInt 11723 sym := l.Aux 11724 mem := l.Args[1] 11725 ptr := l.Args[0] 11726 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 11727 break 11728 } 11729 v.reset(Op386MULSDload) 11730 v.AuxInt = off 11731 v.Aux = sym 11732 v.AddArg(x) 11733 v.AddArg(ptr) 11734 v.AddArg(mem) 11735 return true 11736 } 11737 return false 11738 } 11739 func rewriteValue386_Op386MULSDload_0(v *Value) bool { 11740 b := v.Block 11741 config := b.Func.Config 11742 // match: (MULSDload [off1] {sym} val (ADDLconst [off2] base) mem) 11743 // cond: is32Bit(off1+off2) 11744 // result: (MULSDload [off1+off2] {sym} val base mem) 11745 for { 11746 off1 := v.AuxInt 11747 sym := v.Aux 11748 mem := v.Args[2] 11749 val := v.Args[0] 11750 v_1 := v.Args[1] 11751 if v_1.Op != Op386ADDLconst { 11752 break 11753 } 11754 off2 := v_1.AuxInt 11755 base := v_1.Args[0] 11756 if !(is32Bit(off1 + off2)) { 11757 break 11758 } 11759 v.reset(Op386MULSDload) 11760 v.AuxInt = off1 + off2 11761 v.Aux = sym 11762 v.AddArg(val) 11763 v.AddArg(base) 11764 v.AddArg(mem) 11765 return true 11766 } 11767 // match: (MULSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 11768 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 11769 // result: (MULSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 11770 for { 11771 off1 := v.AuxInt 11772 sym1 := v.Aux 11773 mem := v.Args[2] 11774 val := v.Args[0] 11775 v_1 := v.Args[1] 11776 if v_1.Op != Op386LEAL { 11777 break 11778 } 11779 off2 := v_1.AuxInt 11780 sym2 := v_1.Aux 11781 base := v_1.Args[0] 11782 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 11783 break 11784 } 11785 v.reset(Op386MULSDload) 11786 v.AuxInt = off1 + off2 11787 v.Aux = mergeSym(sym1, sym2) 11788 v.AddArg(val) 11789 v.AddArg(base) 11790 v.AddArg(mem) 11791 return true 11792 } 11793 return false 11794 } 11795 func rewriteValue386_Op386MULSS_0(v *Value) bool { 11796 b := v.Block 11797 config := b.Func.Config 11798 // match: (MULSS x l:(MOVSSload [off] {sym} ptr mem)) 11799 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 11800 // result: (MULSSload x [off] {sym} ptr mem) 11801 for { 11802 _ = v.Args[1] 11803 x := v.Args[0] 11804 l := v.Args[1] 11805 if l.Op != Op386MOVSSload { 11806 break 11807 } 11808 off := l.AuxInt 11809 sym := l.Aux 11810 mem := l.Args[1] 11811 ptr := l.Args[0] 11812 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 11813 break 11814 } 11815 v.reset(Op386MULSSload) 11816 v.AuxInt = off 11817 v.Aux = sym 11818 v.AddArg(x) 11819 v.AddArg(ptr) 11820 v.AddArg(mem) 11821 return true 11822 } 11823 // match: (MULSS l:(MOVSSload [off] {sym} ptr mem) x) 11824 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 11825 // result: (MULSSload x [off] {sym} ptr mem) 11826 for { 11827 x := v.Args[1] 11828 l := v.Args[0] 11829 if l.Op != Op386MOVSSload { 11830 break 11831 } 11832 off := l.AuxInt 11833 sym := l.Aux 11834 mem := l.Args[1] 11835 ptr := l.Args[0] 11836 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 11837 break 11838 } 11839 v.reset(Op386MULSSload) 11840 v.AuxInt = off 11841 v.Aux = sym 11842 v.AddArg(x) 11843 v.AddArg(ptr) 11844 v.AddArg(mem) 11845 return true 11846 } 11847 return false 11848 } 11849 func rewriteValue386_Op386MULSSload_0(v *Value) bool { 11850 b := v.Block 11851 config := b.Func.Config 11852 // match: (MULSSload [off1] {sym} val (ADDLconst [off2] base) mem) 11853 // cond: is32Bit(off1+off2) 11854 // result: (MULSSload [off1+off2] {sym} val base mem) 11855 for { 11856 off1 := v.AuxInt 11857 sym := v.Aux 11858 mem := v.Args[2] 11859 val := v.Args[0] 11860 v_1 := v.Args[1] 11861 if v_1.Op != Op386ADDLconst { 11862 break 11863 } 11864 off2 := v_1.AuxInt 11865 base := v_1.Args[0] 11866 if !(is32Bit(off1 + off2)) { 11867 break 11868 } 11869 v.reset(Op386MULSSload) 11870 v.AuxInt = off1 + off2 11871 v.Aux = sym 11872 v.AddArg(val) 11873 v.AddArg(base) 11874 v.AddArg(mem) 11875 return true 11876 } 11877 // match: (MULSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 11878 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 11879 // result: (MULSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 11880 for { 11881 off1 := v.AuxInt 11882 sym1 := v.Aux 11883 mem := v.Args[2] 11884 val := v.Args[0] 11885 v_1 := v.Args[1] 11886 if v_1.Op != Op386LEAL { 11887 break 11888 } 11889 off2 := v_1.AuxInt 11890 sym2 := v_1.Aux 11891 base := v_1.Args[0] 11892 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 11893 break 11894 } 11895 v.reset(Op386MULSSload) 11896 v.AuxInt = off1 + off2 11897 v.Aux = mergeSym(sym1, sym2) 11898 v.AddArg(val) 11899 v.AddArg(base) 11900 v.AddArg(mem) 11901 return true 11902 } 11903 return false 11904 } 11905 func rewriteValue386_Op386NEGL_0(v *Value) bool { 11906 // match: (NEGL (MOVLconst [c])) 11907 // result: (MOVLconst [int64(int32(-c))]) 11908 for { 11909 v_0 := v.Args[0] 11910 if v_0.Op != Op386MOVLconst { 11911 break 11912 } 11913 c := v_0.AuxInt 11914 v.reset(Op386MOVLconst) 11915 v.AuxInt = int64(int32(-c)) 11916 return true 11917 } 11918 return false 11919 } 11920 func rewriteValue386_Op386NOTL_0(v *Value) bool { 11921 // match: (NOTL (MOVLconst [c])) 11922 // result: (MOVLconst [^c]) 11923 for { 11924 v_0 := v.Args[0] 11925 if v_0.Op != Op386MOVLconst { 11926 break 11927 } 11928 c := v_0.AuxInt 11929 v.reset(Op386MOVLconst) 11930 v.AuxInt = ^c 11931 return true 11932 } 11933 return false 11934 } 11935 func rewriteValue386_Op386ORL_0(v *Value) bool { 11936 // match: (ORL x (MOVLconst [c])) 11937 // result: (ORLconst [c] x) 11938 for { 11939 _ = v.Args[1] 11940 x := v.Args[0] 11941 v_1 := v.Args[1] 11942 if v_1.Op != Op386MOVLconst { 11943 break 11944 } 11945 c := v_1.AuxInt 11946 v.reset(Op386ORLconst) 11947 v.AuxInt = c 11948 v.AddArg(x) 11949 return true 11950 } 11951 // match: (ORL (MOVLconst [c]) x) 11952 // result: (ORLconst [c] x) 11953 for { 11954 x := v.Args[1] 11955 v_0 := v.Args[0] 11956 if v_0.Op != Op386MOVLconst { 11957 break 11958 } 11959 c := v_0.AuxInt 11960 v.reset(Op386ORLconst) 11961 v.AuxInt = c 11962 v.AddArg(x) 11963 return true 11964 } 11965 // match: (ORL (SHLLconst [c] x) (SHRLconst [d] x)) 11966 // cond: d == 32-c 11967 // result: (ROLLconst [c] x) 11968 for { 11969 _ = v.Args[1] 11970 v_0 := v.Args[0] 11971 if v_0.Op != Op386SHLLconst { 11972 break 11973 } 11974 c := v_0.AuxInt 11975 x := v_0.Args[0] 11976 v_1 := v.Args[1] 11977 if v_1.Op != Op386SHRLconst { 11978 break 11979 } 11980 d := v_1.AuxInt 11981 if x != v_1.Args[0] || !(d == 32-c) { 11982 break 11983 } 11984 v.reset(Op386ROLLconst) 11985 v.AuxInt = c 11986 v.AddArg(x) 11987 return true 11988 } 11989 // match: (ORL (SHRLconst [d] x) (SHLLconst [c] x)) 11990 // cond: d == 32-c 11991 // result: (ROLLconst [c] x) 11992 for { 11993 _ = v.Args[1] 11994 v_0 := v.Args[0] 11995 if v_0.Op != Op386SHRLconst { 11996 break 11997 } 11998 d := v_0.AuxInt 11999 x := v_0.Args[0] 12000 v_1 := v.Args[1] 12001 if v_1.Op != Op386SHLLconst { 12002 break 12003 } 12004 c := v_1.AuxInt 12005 if x != v_1.Args[0] || !(d == 32-c) { 12006 break 12007 } 12008 v.reset(Op386ROLLconst) 12009 v.AuxInt = c 12010 v.AddArg(x) 12011 return true 12012 } 12013 // match: (ORL <t> (SHLLconst x [c]) (SHRWconst x [d])) 12014 // cond: c < 16 && d == 16-c && t.Size() == 2 12015 // result: (ROLWconst x [c]) 12016 for { 12017 t := v.Type 12018 _ = v.Args[1] 12019 v_0 := v.Args[0] 12020 if v_0.Op != Op386SHLLconst { 12021 break 12022 } 12023 c := v_0.AuxInt 12024 x := v_0.Args[0] 12025 v_1 := v.Args[1] 12026 if v_1.Op != Op386SHRWconst { 12027 break 12028 } 12029 d := v_1.AuxInt 12030 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 12031 break 12032 } 12033 v.reset(Op386ROLWconst) 12034 v.AuxInt = c 12035 v.AddArg(x) 12036 return true 12037 } 12038 // match: (ORL <t> (SHRWconst x [d]) (SHLLconst x [c])) 12039 // cond: c < 16 && d == 16-c && t.Size() == 2 12040 // result: (ROLWconst x [c]) 12041 for { 12042 t := v.Type 12043 _ = v.Args[1] 12044 v_0 := v.Args[0] 12045 if v_0.Op != Op386SHRWconst { 12046 break 12047 } 12048 d := v_0.AuxInt 12049 x := v_0.Args[0] 12050 v_1 := v.Args[1] 12051 if v_1.Op != Op386SHLLconst { 12052 break 12053 } 12054 c := v_1.AuxInt 12055 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 12056 break 12057 } 12058 v.reset(Op386ROLWconst) 12059 v.AuxInt = c 12060 v.AddArg(x) 12061 return true 12062 } 12063 // match: (ORL <t> (SHLLconst x [c]) (SHRBconst x [d])) 12064 // cond: c < 8 && d == 8-c && t.Size() == 1 12065 // result: (ROLBconst x [c]) 12066 for { 12067 t := v.Type 12068 _ = v.Args[1] 12069 v_0 := v.Args[0] 12070 if v_0.Op != Op386SHLLconst { 12071 break 12072 } 12073 c := v_0.AuxInt 12074 x := v_0.Args[0] 12075 v_1 := v.Args[1] 12076 if v_1.Op != Op386SHRBconst { 12077 break 12078 } 12079 d := v_1.AuxInt 12080 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 12081 break 12082 } 12083 v.reset(Op386ROLBconst) 12084 v.AuxInt = c 12085 v.AddArg(x) 12086 return true 12087 } 12088 // match: (ORL <t> (SHRBconst x [d]) (SHLLconst x [c])) 12089 // cond: c < 8 && d == 8-c && t.Size() == 1 12090 // result: (ROLBconst x [c]) 12091 for { 12092 t := v.Type 12093 _ = v.Args[1] 12094 v_0 := v.Args[0] 12095 if v_0.Op != Op386SHRBconst { 12096 break 12097 } 12098 d := v_0.AuxInt 12099 x := v_0.Args[0] 12100 v_1 := v.Args[1] 12101 if v_1.Op != Op386SHLLconst { 12102 break 12103 } 12104 c := v_1.AuxInt 12105 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 12106 break 12107 } 12108 v.reset(Op386ROLBconst) 12109 v.AuxInt = c 12110 v.AddArg(x) 12111 return true 12112 } 12113 // match: (ORL x l:(MOVLload [off] {sym} ptr mem)) 12114 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 12115 // result: (ORLload x [off] {sym} ptr mem) 12116 for { 12117 _ = v.Args[1] 12118 x := v.Args[0] 12119 l := v.Args[1] 12120 if l.Op != Op386MOVLload { 12121 break 12122 } 12123 off := l.AuxInt 12124 sym := l.Aux 12125 mem := l.Args[1] 12126 ptr := l.Args[0] 12127 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 12128 break 12129 } 12130 v.reset(Op386ORLload) 12131 v.AuxInt = off 12132 v.Aux = sym 12133 v.AddArg(x) 12134 v.AddArg(ptr) 12135 v.AddArg(mem) 12136 return true 12137 } 12138 // match: (ORL l:(MOVLload [off] {sym} ptr mem) x) 12139 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 12140 // result: (ORLload x [off] {sym} ptr mem) 12141 for { 12142 x := v.Args[1] 12143 l := v.Args[0] 12144 if l.Op != Op386MOVLload { 12145 break 12146 } 12147 off := l.AuxInt 12148 sym := l.Aux 12149 mem := l.Args[1] 12150 ptr := l.Args[0] 12151 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 12152 break 12153 } 12154 v.reset(Op386ORLload) 12155 v.AuxInt = off 12156 v.Aux = sym 12157 v.AddArg(x) 12158 v.AddArg(ptr) 12159 v.AddArg(mem) 12160 return true 12161 } 12162 return false 12163 } 12164 func rewriteValue386_Op386ORL_10(v *Value) bool { 12165 b := v.Block 12166 typ := &b.Func.Config.Types 12167 // match: (ORL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 12168 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 12169 // result: (ORLloadidx4 x [off] {sym} ptr idx mem) 12170 for { 12171 _ = v.Args[1] 12172 x := v.Args[0] 12173 l := v.Args[1] 12174 if l.Op != Op386MOVLloadidx4 { 12175 break 12176 } 12177 off := l.AuxInt 12178 sym := l.Aux 12179 mem := l.Args[2] 12180 ptr := l.Args[0] 12181 idx := l.Args[1] 12182 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 12183 break 12184 } 12185 v.reset(Op386ORLloadidx4) 12186 v.AuxInt = off 12187 v.Aux = sym 12188 v.AddArg(x) 12189 v.AddArg(ptr) 12190 v.AddArg(idx) 12191 v.AddArg(mem) 12192 return true 12193 } 12194 // match: (ORL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) 12195 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 12196 // result: (ORLloadidx4 x [off] {sym} ptr idx mem) 12197 for { 12198 x := v.Args[1] 12199 l := v.Args[0] 12200 if l.Op != Op386MOVLloadidx4 { 12201 break 12202 } 12203 off := l.AuxInt 12204 sym := l.Aux 12205 mem := l.Args[2] 12206 ptr := l.Args[0] 12207 idx := l.Args[1] 12208 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 12209 break 12210 } 12211 v.reset(Op386ORLloadidx4) 12212 v.AuxInt = off 12213 v.Aux = sym 12214 v.AddArg(x) 12215 v.AddArg(ptr) 12216 v.AddArg(idx) 12217 v.AddArg(mem) 12218 return true 12219 } 12220 // match: (ORL x x) 12221 // result: x 12222 for { 12223 x := v.Args[1] 12224 if x != v.Args[0] { 12225 break 12226 } 12227 v.reset(OpCopy) 12228 v.Type = x.Type 12229 v.AddArg(x) 12230 return true 12231 } 12232 // match: (ORL x0:(MOVBload [i0] {s} p mem) s0:(SHLLconst [8] x1:(MOVBload [i1] {s} p mem))) 12233 // cond: i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12234 // result: @mergePoint(b,x0,x1) (MOVWload [i0] {s} p mem) 12235 for { 12236 _ = v.Args[1] 12237 x0 := v.Args[0] 12238 if x0.Op != Op386MOVBload { 12239 break 12240 } 12241 i0 := x0.AuxInt 12242 s := x0.Aux 12243 mem := x0.Args[1] 12244 p := x0.Args[0] 12245 s0 := v.Args[1] 12246 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12247 break 12248 } 12249 x1 := s0.Args[0] 12250 if x1.Op != Op386MOVBload { 12251 break 12252 } 12253 i1 := x1.AuxInt 12254 if x1.Aux != s { 12255 break 12256 } 12257 _ = x1.Args[1] 12258 if p != x1.Args[0] || mem != x1.Args[1] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12259 break 12260 } 12261 b = mergePoint(b, x0, x1) 12262 v0 := b.NewValue0(x1.Pos, Op386MOVWload, typ.UInt16) 12263 v.reset(OpCopy) 12264 v.AddArg(v0) 12265 v0.AuxInt = i0 12266 v0.Aux = s 12267 v0.AddArg(p) 12268 v0.AddArg(mem) 12269 return true 12270 } 12271 // match: (ORL s0:(SHLLconst [8] x1:(MOVBload [i1] {s} p mem)) x0:(MOVBload [i0] {s} p mem)) 12272 // cond: i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12273 // result: @mergePoint(b,x0,x1) (MOVWload [i0] {s} p mem) 12274 for { 12275 _ = v.Args[1] 12276 s0 := v.Args[0] 12277 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12278 break 12279 } 12280 x1 := s0.Args[0] 12281 if x1.Op != Op386MOVBload { 12282 break 12283 } 12284 i1 := x1.AuxInt 12285 s := x1.Aux 12286 mem := x1.Args[1] 12287 p := x1.Args[0] 12288 x0 := v.Args[1] 12289 if x0.Op != Op386MOVBload { 12290 break 12291 } 12292 i0 := x0.AuxInt 12293 if x0.Aux != s { 12294 break 12295 } 12296 _ = x0.Args[1] 12297 if p != x0.Args[0] || mem != x0.Args[1] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12298 break 12299 } 12300 b = mergePoint(b, x0, x1) 12301 v0 := b.NewValue0(x0.Pos, Op386MOVWload, typ.UInt16) 12302 v.reset(OpCopy) 12303 v.AddArg(v0) 12304 v0.AuxInt = i0 12305 v0.Aux = s 12306 v0.AddArg(p) 12307 v0.AddArg(mem) 12308 return true 12309 } 12310 // match: (ORL o0:(ORL x0:(MOVWload [i0] {s} p mem) s0:(SHLLconst [16] x1:(MOVBload [i2] {s} p mem))) s1:(SHLLconst [24] x2:(MOVBload [i3] {s} p mem))) 12311 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12312 // result: @mergePoint(b,x0,x1,x2) (MOVLload [i0] {s} p mem) 12313 for { 12314 _ = v.Args[1] 12315 o0 := v.Args[0] 12316 if o0.Op != Op386ORL { 12317 break 12318 } 12319 _ = o0.Args[1] 12320 x0 := o0.Args[0] 12321 if x0.Op != Op386MOVWload { 12322 break 12323 } 12324 i0 := x0.AuxInt 12325 s := x0.Aux 12326 mem := x0.Args[1] 12327 p := x0.Args[0] 12328 s0 := o0.Args[1] 12329 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12330 break 12331 } 12332 x1 := s0.Args[0] 12333 if x1.Op != Op386MOVBload { 12334 break 12335 } 12336 i2 := x1.AuxInt 12337 if x1.Aux != s { 12338 break 12339 } 12340 _ = x1.Args[1] 12341 if p != x1.Args[0] || mem != x1.Args[1] { 12342 break 12343 } 12344 s1 := v.Args[1] 12345 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12346 break 12347 } 12348 x2 := s1.Args[0] 12349 if x2.Op != Op386MOVBload { 12350 break 12351 } 12352 i3 := x2.AuxInt 12353 if x2.Aux != s { 12354 break 12355 } 12356 _ = x2.Args[1] 12357 if p != x2.Args[0] || mem != x2.Args[1] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12358 break 12359 } 12360 b = mergePoint(b, x0, x1, x2) 12361 v0 := b.NewValue0(x2.Pos, Op386MOVLload, typ.UInt32) 12362 v.reset(OpCopy) 12363 v.AddArg(v0) 12364 v0.AuxInt = i0 12365 v0.Aux = s 12366 v0.AddArg(p) 12367 v0.AddArg(mem) 12368 return true 12369 } 12370 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBload [i2] {s} p mem)) x0:(MOVWload [i0] {s} p mem)) s1:(SHLLconst [24] x2:(MOVBload [i3] {s} p mem))) 12371 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12372 // result: @mergePoint(b,x0,x1,x2) (MOVLload [i0] {s} p mem) 12373 for { 12374 _ = v.Args[1] 12375 o0 := v.Args[0] 12376 if o0.Op != Op386ORL { 12377 break 12378 } 12379 _ = o0.Args[1] 12380 s0 := o0.Args[0] 12381 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12382 break 12383 } 12384 x1 := s0.Args[0] 12385 if x1.Op != Op386MOVBload { 12386 break 12387 } 12388 i2 := x1.AuxInt 12389 s := x1.Aux 12390 mem := x1.Args[1] 12391 p := x1.Args[0] 12392 x0 := o0.Args[1] 12393 if x0.Op != Op386MOVWload { 12394 break 12395 } 12396 i0 := x0.AuxInt 12397 if x0.Aux != s { 12398 break 12399 } 12400 _ = x0.Args[1] 12401 if p != x0.Args[0] || mem != x0.Args[1] { 12402 break 12403 } 12404 s1 := v.Args[1] 12405 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12406 break 12407 } 12408 x2 := s1.Args[0] 12409 if x2.Op != Op386MOVBload { 12410 break 12411 } 12412 i3 := x2.AuxInt 12413 if x2.Aux != s { 12414 break 12415 } 12416 _ = x2.Args[1] 12417 if p != x2.Args[0] || mem != x2.Args[1] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12418 break 12419 } 12420 b = mergePoint(b, x0, x1, x2) 12421 v0 := b.NewValue0(x2.Pos, Op386MOVLload, typ.UInt32) 12422 v.reset(OpCopy) 12423 v.AddArg(v0) 12424 v0.AuxInt = i0 12425 v0.Aux = s 12426 v0.AddArg(p) 12427 v0.AddArg(mem) 12428 return true 12429 } 12430 // match: (ORL s1:(SHLLconst [24] x2:(MOVBload [i3] {s} p mem)) o0:(ORL x0:(MOVWload [i0] {s} p mem) s0:(SHLLconst [16] x1:(MOVBload [i2] {s} p mem)))) 12431 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12432 // result: @mergePoint(b,x0,x1,x2) (MOVLload [i0] {s} p mem) 12433 for { 12434 _ = v.Args[1] 12435 s1 := v.Args[0] 12436 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12437 break 12438 } 12439 x2 := s1.Args[0] 12440 if x2.Op != Op386MOVBload { 12441 break 12442 } 12443 i3 := x2.AuxInt 12444 s := x2.Aux 12445 mem := x2.Args[1] 12446 p := x2.Args[0] 12447 o0 := v.Args[1] 12448 if o0.Op != Op386ORL { 12449 break 12450 } 12451 _ = o0.Args[1] 12452 x0 := o0.Args[0] 12453 if x0.Op != Op386MOVWload { 12454 break 12455 } 12456 i0 := x0.AuxInt 12457 if x0.Aux != s { 12458 break 12459 } 12460 _ = x0.Args[1] 12461 if p != x0.Args[0] || mem != x0.Args[1] { 12462 break 12463 } 12464 s0 := o0.Args[1] 12465 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12466 break 12467 } 12468 x1 := s0.Args[0] 12469 if x1.Op != Op386MOVBload { 12470 break 12471 } 12472 i2 := x1.AuxInt 12473 if x1.Aux != s { 12474 break 12475 } 12476 _ = x1.Args[1] 12477 if p != x1.Args[0] || mem != x1.Args[1] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12478 break 12479 } 12480 b = mergePoint(b, x0, x1, x2) 12481 v0 := b.NewValue0(x1.Pos, Op386MOVLload, typ.UInt32) 12482 v.reset(OpCopy) 12483 v.AddArg(v0) 12484 v0.AuxInt = i0 12485 v0.Aux = s 12486 v0.AddArg(p) 12487 v0.AddArg(mem) 12488 return true 12489 } 12490 // match: (ORL s1:(SHLLconst [24] x2:(MOVBload [i3] {s} p mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBload [i2] {s} p mem)) x0:(MOVWload [i0] {s} p mem))) 12491 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12492 // result: @mergePoint(b,x0,x1,x2) (MOVLload [i0] {s} p mem) 12493 for { 12494 _ = v.Args[1] 12495 s1 := v.Args[0] 12496 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12497 break 12498 } 12499 x2 := s1.Args[0] 12500 if x2.Op != Op386MOVBload { 12501 break 12502 } 12503 i3 := x2.AuxInt 12504 s := x2.Aux 12505 mem := x2.Args[1] 12506 p := x2.Args[0] 12507 o0 := v.Args[1] 12508 if o0.Op != Op386ORL { 12509 break 12510 } 12511 _ = o0.Args[1] 12512 s0 := o0.Args[0] 12513 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12514 break 12515 } 12516 x1 := s0.Args[0] 12517 if x1.Op != Op386MOVBload { 12518 break 12519 } 12520 i2 := x1.AuxInt 12521 if x1.Aux != s { 12522 break 12523 } 12524 _ = x1.Args[1] 12525 if p != x1.Args[0] || mem != x1.Args[1] { 12526 break 12527 } 12528 x0 := o0.Args[1] 12529 if x0.Op != Op386MOVWload { 12530 break 12531 } 12532 i0 := x0.AuxInt 12533 if x0.Aux != s { 12534 break 12535 } 12536 _ = x0.Args[1] 12537 if p != x0.Args[0] || mem != x0.Args[1] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12538 break 12539 } 12540 b = mergePoint(b, x0, x1, x2) 12541 v0 := b.NewValue0(x0.Pos, Op386MOVLload, typ.UInt32) 12542 v.reset(OpCopy) 12543 v.AddArg(v0) 12544 v0.AuxInt = i0 12545 v0.Aux = s 12546 v0.AddArg(p) 12547 v0.AddArg(mem) 12548 return true 12549 } 12550 // match: (ORL x0:(MOVBloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} p idx mem))) 12551 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12552 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12553 for { 12554 _ = v.Args[1] 12555 x0 := v.Args[0] 12556 if x0.Op != Op386MOVBloadidx1 { 12557 break 12558 } 12559 i0 := x0.AuxInt 12560 s := x0.Aux 12561 mem := x0.Args[2] 12562 p := x0.Args[0] 12563 idx := x0.Args[1] 12564 s0 := v.Args[1] 12565 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12566 break 12567 } 12568 x1 := s0.Args[0] 12569 if x1.Op != Op386MOVBloadidx1 { 12570 break 12571 } 12572 i1 := x1.AuxInt 12573 if x1.Aux != s { 12574 break 12575 } 12576 _ = x1.Args[2] 12577 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12578 break 12579 } 12580 b = mergePoint(b, x0, x1) 12581 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12582 v.reset(OpCopy) 12583 v.AddArg(v0) 12584 v0.AuxInt = i0 12585 v0.Aux = s 12586 v0.AddArg(p) 12587 v0.AddArg(idx) 12588 v0.AddArg(mem) 12589 return true 12590 } 12591 return false 12592 } 12593 func rewriteValue386_Op386ORL_20(v *Value) bool { 12594 b := v.Block 12595 // match: (ORL x0:(MOVBloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} p idx mem))) 12596 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12597 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12598 for { 12599 _ = v.Args[1] 12600 x0 := v.Args[0] 12601 if x0.Op != Op386MOVBloadidx1 { 12602 break 12603 } 12604 i0 := x0.AuxInt 12605 s := x0.Aux 12606 mem := x0.Args[2] 12607 idx := x0.Args[0] 12608 p := x0.Args[1] 12609 s0 := v.Args[1] 12610 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12611 break 12612 } 12613 x1 := s0.Args[0] 12614 if x1.Op != Op386MOVBloadidx1 { 12615 break 12616 } 12617 i1 := x1.AuxInt 12618 if x1.Aux != s { 12619 break 12620 } 12621 _ = x1.Args[2] 12622 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12623 break 12624 } 12625 b = mergePoint(b, x0, x1) 12626 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12627 v.reset(OpCopy) 12628 v.AddArg(v0) 12629 v0.AuxInt = i0 12630 v0.Aux = s 12631 v0.AddArg(p) 12632 v0.AddArg(idx) 12633 v0.AddArg(mem) 12634 return true 12635 } 12636 // match: (ORL x0:(MOVBloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} idx p mem))) 12637 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12638 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12639 for { 12640 _ = v.Args[1] 12641 x0 := v.Args[0] 12642 if x0.Op != Op386MOVBloadidx1 { 12643 break 12644 } 12645 i0 := x0.AuxInt 12646 s := x0.Aux 12647 mem := x0.Args[2] 12648 p := x0.Args[0] 12649 idx := x0.Args[1] 12650 s0 := v.Args[1] 12651 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12652 break 12653 } 12654 x1 := s0.Args[0] 12655 if x1.Op != Op386MOVBloadidx1 { 12656 break 12657 } 12658 i1 := x1.AuxInt 12659 if x1.Aux != s { 12660 break 12661 } 12662 _ = x1.Args[2] 12663 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12664 break 12665 } 12666 b = mergePoint(b, x0, x1) 12667 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12668 v.reset(OpCopy) 12669 v.AddArg(v0) 12670 v0.AuxInt = i0 12671 v0.Aux = s 12672 v0.AddArg(p) 12673 v0.AddArg(idx) 12674 v0.AddArg(mem) 12675 return true 12676 } 12677 // match: (ORL x0:(MOVBloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} idx p mem))) 12678 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12679 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12680 for { 12681 _ = v.Args[1] 12682 x0 := v.Args[0] 12683 if x0.Op != Op386MOVBloadidx1 { 12684 break 12685 } 12686 i0 := x0.AuxInt 12687 s := x0.Aux 12688 mem := x0.Args[2] 12689 idx := x0.Args[0] 12690 p := x0.Args[1] 12691 s0 := v.Args[1] 12692 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12693 break 12694 } 12695 x1 := s0.Args[0] 12696 if x1.Op != Op386MOVBloadidx1 { 12697 break 12698 } 12699 i1 := x1.AuxInt 12700 if x1.Aux != s { 12701 break 12702 } 12703 _ = x1.Args[2] 12704 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12705 break 12706 } 12707 b = mergePoint(b, x0, x1) 12708 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12709 v.reset(OpCopy) 12710 v.AddArg(v0) 12711 v0.AuxInt = i0 12712 v0.Aux = s 12713 v0.AddArg(p) 12714 v0.AddArg(idx) 12715 v0.AddArg(mem) 12716 return true 12717 } 12718 // match: (ORL s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} p idx mem)) x0:(MOVBloadidx1 [i0] {s} p idx mem)) 12719 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12720 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12721 for { 12722 _ = v.Args[1] 12723 s0 := v.Args[0] 12724 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12725 break 12726 } 12727 x1 := s0.Args[0] 12728 if x1.Op != Op386MOVBloadidx1 { 12729 break 12730 } 12731 i1 := x1.AuxInt 12732 s := x1.Aux 12733 mem := x1.Args[2] 12734 p := x1.Args[0] 12735 idx := x1.Args[1] 12736 x0 := v.Args[1] 12737 if x0.Op != Op386MOVBloadidx1 { 12738 break 12739 } 12740 i0 := x0.AuxInt 12741 if x0.Aux != s { 12742 break 12743 } 12744 _ = x0.Args[2] 12745 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12746 break 12747 } 12748 b = mergePoint(b, x0, x1) 12749 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12750 v.reset(OpCopy) 12751 v.AddArg(v0) 12752 v0.AuxInt = i0 12753 v0.Aux = s 12754 v0.AddArg(p) 12755 v0.AddArg(idx) 12756 v0.AddArg(mem) 12757 return true 12758 } 12759 // match: (ORL s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} idx p mem)) x0:(MOVBloadidx1 [i0] {s} p idx mem)) 12760 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12761 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12762 for { 12763 _ = v.Args[1] 12764 s0 := v.Args[0] 12765 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12766 break 12767 } 12768 x1 := s0.Args[0] 12769 if x1.Op != Op386MOVBloadidx1 { 12770 break 12771 } 12772 i1 := x1.AuxInt 12773 s := x1.Aux 12774 mem := x1.Args[2] 12775 idx := x1.Args[0] 12776 p := x1.Args[1] 12777 x0 := v.Args[1] 12778 if x0.Op != Op386MOVBloadidx1 { 12779 break 12780 } 12781 i0 := x0.AuxInt 12782 if x0.Aux != s { 12783 break 12784 } 12785 _ = x0.Args[2] 12786 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12787 break 12788 } 12789 b = mergePoint(b, x0, x1) 12790 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12791 v.reset(OpCopy) 12792 v.AddArg(v0) 12793 v0.AuxInt = i0 12794 v0.Aux = s 12795 v0.AddArg(p) 12796 v0.AddArg(idx) 12797 v0.AddArg(mem) 12798 return true 12799 } 12800 // match: (ORL s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} p idx mem)) x0:(MOVBloadidx1 [i0] {s} idx p mem)) 12801 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12802 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12803 for { 12804 _ = v.Args[1] 12805 s0 := v.Args[0] 12806 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12807 break 12808 } 12809 x1 := s0.Args[0] 12810 if x1.Op != Op386MOVBloadidx1 { 12811 break 12812 } 12813 i1 := x1.AuxInt 12814 s := x1.Aux 12815 mem := x1.Args[2] 12816 p := x1.Args[0] 12817 idx := x1.Args[1] 12818 x0 := v.Args[1] 12819 if x0.Op != Op386MOVBloadidx1 { 12820 break 12821 } 12822 i0 := x0.AuxInt 12823 if x0.Aux != s { 12824 break 12825 } 12826 _ = x0.Args[2] 12827 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12828 break 12829 } 12830 b = mergePoint(b, x0, x1) 12831 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12832 v.reset(OpCopy) 12833 v.AddArg(v0) 12834 v0.AuxInt = i0 12835 v0.Aux = s 12836 v0.AddArg(p) 12837 v0.AddArg(idx) 12838 v0.AddArg(mem) 12839 return true 12840 } 12841 // match: (ORL s0:(SHLLconst [8] x1:(MOVBloadidx1 [i1] {s} idx p mem)) x0:(MOVBloadidx1 [i0] {s} idx p mem)) 12842 // cond: i1==i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 12843 // result: @mergePoint(b,x0,x1) (MOVWloadidx1 <v.Type> [i0] {s} p idx mem) 12844 for { 12845 _ = v.Args[1] 12846 s0 := v.Args[0] 12847 if s0.Op != Op386SHLLconst || s0.AuxInt != 8 { 12848 break 12849 } 12850 x1 := s0.Args[0] 12851 if x1.Op != Op386MOVBloadidx1 { 12852 break 12853 } 12854 i1 := x1.AuxInt 12855 s := x1.Aux 12856 mem := x1.Args[2] 12857 idx := x1.Args[0] 12858 p := x1.Args[1] 12859 x0 := v.Args[1] 12860 if x0.Op != Op386MOVBloadidx1 { 12861 break 12862 } 12863 i0 := x0.AuxInt 12864 if x0.Aux != s { 12865 break 12866 } 12867 _ = x0.Args[2] 12868 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 12869 break 12870 } 12871 b = mergePoint(b, x0, x1) 12872 v0 := b.NewValue0(v.Pos, Op386MOVWloadidx1, v.Type) 12873 v.reset(OpCopy) 12874 v.AddArg(v0) 12875 v0.AuxInt = i0 12876 v0.Aux = s 12877 v0.AddArg(p) 12878 v0.AddArg(idx) 12879 v0.AddArg(mem) 12880 return true 12881 } 12882 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 12883 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12884 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 12885 for { 12886 _ = v.Args[1] 12887 o0 := v.Args[0] 12888 if o0.Op != Op386ORL { 12889 break 12890 } 12891 _ = o0.Args[1] 12892 x0 := o0.Args[0] 12893 if x0.Op != Op386MOVWloadidx1 { 12894 break 12895 } 12896 i0 := x0.AuxInt 12897 s := x0.Aux 12898 mem := x0.Args[2] 12899 p := x0.Args[0] 12900 idx := x0.Args[1] 12901 s0 := o0.Args[1] 12902 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12903 break 12904 } 12905 x1 := s0.Args[0] 12906 if x1.Op != Op386MOVBloadidx1 { 12907 break 12908 } 12909 i2 := x1.AuxInt 12910 if x1.Aux != s { 12911 break 12912 } 12913 _ = x1.Args[2] 12914 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 12915 break 12916 } 12917 s1 := v.Args[1] 12918 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12919 break 12920 } 12921 x2 := s1.Args[0] 12922 if x2.Op != Op386MOVBloadidx1 { 12923 break 12924 } 12925 i3 := x2.AuxInt 12926 if x2.Aux != s { 12927 break 12928 } 12929 _ = x2.Args[2] 12930 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12931 break 12932 } 12933 b = mergePoint(b, x0, x1, x2) 12934 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 12935 v.reset(OpCopy) 12936 v.AddArg(v0) 12937 v0.AuxInt = i0 12938 v0.Aux = s 12939 v0.AddArg(p) 12940 v0.AddArg(idx) 12941 v0.AddArg(mem) 12942 return true 12943 } 12944 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 12945 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 12946 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 12947 for { 12948 _ = v.Args[1] 12949 o0 := v.Args[0] 12950 if o0.Op != Op386ORL { 12951 break 12952 } 12953 _ = o0.Args[1] 12954 x0 := o0.Args[0] 12955 if x0.Op != Op386MOVWloadidx1 { 12956 break 12957 } 12958 i0 := x0.AuxInt 12959 s := x0.Aux 12960 mem := x0.Args[2] 12961 idx := x0.Args[0] 12962 p := x0.Args[1] 12963 s0 := o0.Args[1] 12964 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 12965 break 12966 } 12967 x1 := s0.Args[0] 12968 if x1.Op != Op386MOVBloadidx1 { 12969 break 12970 } 12971 i2 := x1.AuxInt 12972 if x1.Aux != s { 12973 break 12974 } 12975 _ = x1.Args[2] 12976 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 12977 break 12978 } 12979 s1 := v.Args[1] 12980 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 12981 break 12982 } 12983 x2 := s1.Args[0] 12984 if x2.Op != Op386MOVBloadidx1 { 12985 break 12986 } 12987 i3 := x2.AuxInt 12988 if x2.Aux != s { 12989 break 12990 } 12991 _ = x2.Args[2] 12992 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 12993 break 12994 } 12995 b = mergePoint(b, x0, x1, x2) 12996 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 12997 v.reset(OpCopy) 12998 v.AddArg(v0) 12999 v0.AuxInt = i0 13000 v0.Aux = s 13001 v0.AddArg(p) 13002 v0.AddArg(idx) 13003 v0.AddArg(mem) 13004 return true 13005 } 13006 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13007 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13008 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13009 for { 13010 _ = v.Args[1] 13011 o0 := v.Args[0] 13012 if o0.Op != Op386ORL { 13013 break 13014 } 13015 _ = o0.Args[1] 13016 x0 := o0.Args[0] 13017 if x0.Op != Op386MOVWloadidx1 { 13018 break 13019 } 13020 i0 := x0.AuxInt 13021 s := x0.Aux 13022 mem := x0.Args[2] 13023 p := x0.Args[0] 13024 idx := x0.Args[1] 13025 s0 := o0.Args[1] 13026 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13027 break 13028 } 13029 x1 := s0.Args[0] 13030 if x1.Op != Op386MOVBloadidx1 { 13031 break 13032 } 13033 i2 := x1.AuxInt 13034 if x1.Aux != s { 13035 break 13036 } 13037 _ = x1.Args[2] 13038 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 13039 break 13040 } 13041 s1 := v.Args[1] 13042 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13043 break 13044 } 13045 x2 := s1.Args[0] 13046 if x2.Op != Op386MOVBloadidx1 { 13047 break 13048 } 13049 i3 := x2.AuxInt 13050 if x2.Aux != s { 13051 break 13052 } 13053 _ = x2.Args[2] 13054 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13055 break 13056 } 13057 b = mergePoint(b, x0, x1, x2) 13058 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13059 v.reset(OpCopy) 13060 v.AddArg(v0) 13061 v0.AuxInt = i0 13062 v0.Aux = s 13063 v0.AddArg(p) 13064 v0.AddArg(idx) 13065 v0.AddArg(mem) 13066 return true 13067 } 13068 return false 13069 } 13070 func rewriteValue386_Op386ORL_30(v *Value) bool { 13071 b := v.Block 13072 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13073 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13074 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13075 for { 13076 _ = v.Args[1] 13077 o0 := v.Args[0] 13078 if o0.Op != Op386ORL { 13079 break 13080 } 13081 _ = o0.Args[1] 13082 x0 := o0.Args[0] 13083 if x0.Op != Op386MOVWloadidx1 { 13084 break 13085 } 13086 i0 := x0.AuxInt 13087 s := x0.Aux 13088 mem := x0.Args[2] 13089 idx := x0.Args[0] 13090 p := x0.Args[1] 13091 s0 := o0.Args[1] 13092 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13093 break 13094 } 13095 x1 := s0.Args[0] 13096 if x1.Op != Op386MOVBloadidx1 { 13097 break 13098 } 13099 i2 := x1.AuxInt 13100 if x1.Aux != s { 13101 break 13102 } 13103 _ = x1.Args[2] 13104 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 13105 break 13106 } 13107 s1 := v.Args[1] 13108 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13109 break 13110 } 13111 x2 := s1.Args[0] 13112 if x2.Op != Op386MOVBloadidx1 { 13113 break 13114 } 13115 i3 := x2.AuxInt 13116 if x2.Aux != s { 13117 break 13118 } 13119 _ = x2.Args[2] 13120 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13121 break 13122 } 13123 b = mergePoint(b, x0, x1, x2) 13124 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13125 v.reset(OpCopy) 13126 v.AddArg(v0) 13127 v0.AuxInt = i0 13128 v0.Aux = s 13129 v0.AddArg(p) 13130 v0.AddArg(idx) 13131 v0.AddArg(mem) 13132 return true 13133 } 13134 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13135 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13136 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13137 for { 13138 _ = v.Args[1] 13139 o0 := v.Args[0] 13140 if o0.Op != Op386ORL { 13141 break 13142 } 13143 _ = o0.Args[1] 13144 s0 := o0.Args[0] 13145 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13146 break 13147 } 13148 x1 := s0.Args[0] 13149 if x1.Op != Op386MOVBloadidx1 { 13150 break 13151 } 13152 i2 := x1.AuxInt 13153 s := x1.Aux 13154 mem := x1.Args[2] 13155 p := x1.Args[0] 13156 idx := x1.Args[1] 13157 x0 := o0.Args[1] 13158 if x0.Op != Op386MOVWloadidx1 { 13159 break 13160 } 13161 i0 := x0.AuxInt 13162 if x0.Aux != s { 13163 break 13164 } 13165 _ = x0.Args[2] 13166 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13167 break 13168 } 13169 s1 := v.Args[1] 13170 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13171 break 13172 } 13173 x2 := s1.Args[0] 13174 if x2.Op != Op386MOVBloadidx1 { 13175 break 13176 } 13177 i3 := x2.AuxInt 13178 if x2.Aux != s { 13179 break 13180 } 13181 _ = x2.Args[2] 13182 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13183 break 13184 } 13185 b = mergePoint(b, x0, x1, x2) 13186 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13187 v.reset(OpCopy) 13188 v.AddArg(v0) 13189 v0.AuxInt = i0 13190 v0.Aux = s 13191 v0.AddArg(p) 13192 v0.AddArg(idx) 13193 v0.AddArg(mem) 13194 return true 13195 } 13196 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13197 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13198 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13199 for { 13200 _ = v.Args[1] 13201 o0 := v.Args[0] 13202 if o0.Op != Op386ORL { 13203 break 13204 } 13205 _ = o0.Args[1] 13206 s0 := o0.Args[0] 13207 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13208 break 13209 } 13210 x1 := s0.Args[0] 13211 if x1.Op != Op386MOVBloadidx1 { 13212 break 13213 } 13214 i2 := x1.AuxInt 13215 s := x1.Aux 13216 mem := x1.Args[2] 13217 idx := x1.Args[0] 13218 p := x1.Args[1] 13219 x0 := o0.Args[1] 13220 if x0.Op != Op386MOVWloadidx1 { 13221 break 13222 } 13223 i0 := x0.AuxInt 13224 if x0.Aux != s { 13225 break 13226 } 13227 _ = x0.Args[2] 13228 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13229 break 13230 } 13231 s1 := v.Args[1] 13232 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13233 break 13234 } 13235 x2 := s1.Args[0] 13236 if x2.Op != Op386MOVBloadidx1 { 13237 break 13238 } 13239 i3 := x2.AuxInt 13240 if x2.Aux != s { 13241 break 13242 } 13243 _ = x2.Args[2] 13244 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13245 break 13246 } 13247 b = mergePoint(b, x0, x1, x2) 13248 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13249 v.reset(OpCopy) 13250 v.AddArg(v0) 13251 v0.AuxInt = i0 13252 v0.Aux = s 13253 v0.AddArg(p) 13254 v0.AddArg(idx) 13255 v0.AddArg(mem) 13256 return true 13257 } 13258 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13259 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13260 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13261 for { 13262 _ = v.Args[1] 13263 o0 := v.Args[0] 13264 if o0.Op != Op386ORL { 13265 break 13266 } 13267 _ = o0.Args[1] 13268 s0 := o0.Args[0] 13269 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13270 break 13271 } 13272 x1 := s0.Args[0] 13273 if x1.Op != Op386MOVBloadidx1 { 13274 break 13275 } 13276 i2 := x1.AuxInt 13277 s := x1.Aux 13278 mem := x1.Args[2] 13279 p := x1.Args[0] 13280 idx := x1.Args[1] 13281 x0 := o0.Args[1] 13282 if x0.Op != Op386MOVWloadidx1 { 13283 break 13284 } 13285 i0 := x0.AuxInt 13286 if x0.Aux != s { 13287 break 13288 } 13289 _ = x0.Args[2] 13290 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 13291 break 13292 } 13293 s1 := v.Args[1] 13294 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13295 break 13296 } 13297 x2 := s1.Args[0] 13298 if x2.Op != Op386MOVBloadidx1 { 13299 break 13300 } 13301 i3 := x2.AuxInt 13302 if x2.Aux != s { 13303 break 13304 } 13305 _ = x2.Args[2] 13306 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13307 break 13308 } 13309 b = mergePoint(b, x0, x1, x2) 13310 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13311 v.reset(OpCopy) 13312 v.AddArg(v0) 13313 v0.AuxInt = i0 13314 v0.Aux = s 13315 v0.AddArg(p) 13316 v0.AddArg(idx) 13317 v0.AddArg(mem) 13318 return true 13319 } 13320 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem))) 13321 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13322 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13323 for { 13324 _ = v.Args[1] 13325 o0 := v.Args[0] 13326 if o0.Op != Op386ORL { 13327 break 13328 } 13329 _ = o0.Args[1] 13330 s0 := o0.Args[0] 13331 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13332 break 13333 } 13334 x1 := s0.Args[0] 13335 if x1.Op != Op386MOVBloadidx1 { 13336 break 13337 } 13338 i2 := x1.AuxInt 13339 s := x1.Aux 13340 mem := x1.Args[2] 13341 idx := x1.Args[0] 13342 p := x1.Args[1] 13343 x0 := o0.Args[1] 13344 if x0.Op != Op386MOVWloadidx1 { 13345 break 13346 } 13347 i0 := x0.AuxInt 13348 if x0.Aux != s { 13349 break 13350 } 13351 _ = x0.Args[2] 13352 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 13353 break 13354 } 13355 s1 := v.Args[1] 13356 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13357 break 13358 } 13359 x2 := s1.Args[0] 13360 if x2.Op != Op386MOVBloadidx1 { 13361 break 13362 } 13363 i3 := x2.AuxInt 13364 if x2.Aux != s { 13365 break 13366 } 13367 _ = x2.Args[2] 13368 if p != x2.Args[0] || idx != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13369 break 13370 } 13371 b = mergePoint(b, x0, x1, x2) 13372 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13373 v.reset(OpCopy) 13374 v.AddArg(v0) 13375 v0.AuxInt = i0 13376 v0.Aux = s 13377 v0.AddArg(p) 13378 v0.AddArg(idx) 13379 v0.AddArg(mem) 13380 return true 13381 } 13382 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13383 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13384 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13385 for { 13386 _ = v.Args[1] 13387 o0 := v.Args[0] 13388 if o0.Op != Op386ORL { 13389 break 13390 } 13391 _ = o0.Args[1] 13392 x0 := o0.Args[0] 13393 if x0.Op != Op386MOVWloadidx1 { 13394 break 13395 } 13396 i0 := x0.AuxInt 13397 s := x0.Aux 13398 mem := x0.Args[2] 13399 p := x0.Args[0] 13400 idx := x0.Args[1] 13401 s0 := o0.Args[1] 13402 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13403 break 13404 } 13405 x1 := s0.Args[0] 13406 if x1.Op != Op386MOVBloadidx1 { 13407 break 13408 } 13409 i2 := x1.AuxInt 13410 if x1.Aux != s { 13411 break 13412 } 13413 _ = x1.Args[2] 13414 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 13415 break 13416 } 13417 s1 := v.Args[1] 13418 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13419 break 13420 } 13421 x2 := s1.Args[0] 13422 if x2.Op != Op386MOVBloadidx1 { 13423 break 13424 } 13425 i3 := x2.AuxInt 13426 if x2.Aux != s { 13427 break 13428 } 13429 _ = x2.Args[2] 13430 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13431 break 13432 } 13433 b = mergePoint(b, x0, x1, x2) 13434 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13435 v.reset(OpCopy) 13436 v.AddArg(v0) 13437 v0.AuxInt = i0 13438 v0.Aux = s 13439 v0.AddArg(p) 13440 v0.AddArg(idx) 13441 v0.AddArg(mem) 13442 return true 13443 } 13444 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13445 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13446 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13447 for { 13448 _ = v.Args[1] 13449 o0 := v.Args[0] 13450 if o0.Op != Op386ORL { 13451 break 13452 } 13453 _ = o0.Args[1] 13454 x0 := o0.Args[0] 13455 if x0.Op != Op386MOVWloadidx1 { 13456 break 13457 } 13458 i0 := x0.AuxInt 13459 s := x0.Aux 13460 mem := x0.Args[2] 13461 idx := x0.Args[0] 13462 p := x0.Args[1] 13463 s0 := o0.Args[1] 13464 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13465 break 13466 } 13467 x1 := s0.Args[0] 13468 if x1.Op != Op386MOVBloadidx1 { 13469 break 13470 } 13471 i2 := x1.AuxInt 13472 if x1.Aux != s { 13473 break 13474 } 13475 _ = x1.Args[2] 13476 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 13477 break 13478 } 13479 s1 := v.Args[1] 13480 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13481 break 13482 } 13483 x2 := s1.Args[0] 13484 if x2.Op != Op386MOVBloadidx1 { 13485 break 13486 } 13487 i3 := x2.AuxInt 13488 if x2.Aux != s { 13489 break 13490 } 13491 _ = x2.Args[2] 13492 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13493 break 13494 } 13495 b = mergePoint(b, x0, x1, x2) 13496 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13497 v.reset(OpCopy) 13498 v.AddArg(v0) 13499 v0.AuxInt = i0 13500 v0.Aux = s 13501 v0.AddArg(p) 13502 v0.AddArg(idx) 13503 v0.AddArg(mem) 13504 return true 13505 } 13506 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13507 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13508 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13509 for { 13510 _ = v.Args[1] 13511 o0 := v.Args[0] 13512 if o0.Op != Op386ORL { 13513 break 13514 } 13515 _ = o0.Args[1] 13516 x0 := o0.Args[0] 13517 if x0.Op != Op386MOVWloadidx1 { 13518 break 13519 } 13520 i0 := x0.AuxInt 13521 s := x0.Aux 13522 mem := x0.Args[2] 13523 p := x0.Args[0] 13524 idx := x0.Args[1] 13525 s0 := o0.Args[1] 13526 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13527 break 13528 } 13529 x1 := s0.Args[0] 13530 if x1.Op != Op386MOVBloadidx1 { 13531 break 13532 } 13533 i2 := x1.AuxInt 13534 if x1.Aux != s { 13535 break 13536 } 13537 _ = x1.Args[2] 13538 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 13539 break 13540 } 13541 s1 := v.Args[1] 13542 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13543 break 13544 } 13545 x2 := s1.Args[0] 13546 if x2.Op != Op386MOVBloadidx1 { 13547 break 13548 } 13549 i3 := x2.AuxInt 13550 if x2.Aux != s { 13551 break 13552 } 13553 _ = x2.Args[2] 13554 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13555 break 13556 } 13557 b = mergePoint(b, x0, x1, x2) 13558 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13559 v.reset(OpCopy) 13560 v.AddArg(v0) 13561 v0.AuxInt = i0 13562 v0.Aux = s 13563 v0.AddArg(p) 13564 v0.AddArg(idx) 13565 v0.AddArg(mem) 13566 return true 13567 } 13568 // match: (ORL o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem))) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13569 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13570 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13571 for { 13572 _ = v.Args[1] 13573 o0 := v.Args[0] 13574 if o0.Op != Op386ORL { 13575 break 13576 } 13577 _ = o0.Args[1] 13578 x0 := o0.Args[0] 13579 if x0.Op != Op386MOVWloadidx1 { 13580 break 13581 } 13582 i0 := x0.AuxInt 13583 s := x0.Aux 13584 mem := x0.Args[2] 13585 idx := x0.Args[0] 13586 p := x0.Args[1] 13587 s0 := o0.Args[1] 13588 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13589 break 13590 } 13591 x1 := s0.Args[0] 13592 if x1.Op != Op386MOVBloadidx1 { 13593 break 13594 } 13595 i2 := x1.AuxInt 13596 if x1.Aux != s { 13597 break 13598 } 13599 _ = x1.Args[2] 13600 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 13601 break 13602 } 13603 s1 := v.Args[1] 13604 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13605 break 13606 } 13607 x2 := s1.Args[0] 13608 if x2.Op != Op386MOVBloadidx1 { 13609 break 13610 } 13611 i3 := x2.AuxInt 13612 if x2.Aux != s { 13613 break 13614 } 13615 _ = x2.Args[2] 13616 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13617 break 13618 } 13619 b = mergePoint(b, x0, x1, x2) 13620 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13621 v.reset(OpCopy) 13622 v.AddArg(v0) 13623 v0.AuxInt = i0 13624 v0.Aux = s 13625 v0.AddArg(p) 13626 v0.AddArg(idx) 13627 v0.AddArg(mem) 13628 return true 13629 } 13630 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13631 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13632 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13633 for { 13634 _ = v.Args[1] 13635 o0 := v.Args[0] 13636 if o0.Op != Op386ORL { 13637 break 13638 } 13639 _ = o0.Args[1] 13640 s0 := o0.Args[0] 13641 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13642 break 13643 } 13644 x1 := s0.Args[0] 13645 if x1.Op != Op386MOVBloadidx1 { 13646 break 13647 } 13648 i2 := x1.AuxInt 13649 s := x1.Aux 13650 mem := x1.Args[2] 13651 p := x1.Args[0] 13652 idx := x1.Args[1] 13653 x0 := o0.Args[1] 13654 if x0.Op != Op386MOVWloadidx1 { 13655 break 13656 } 13657 i0 := x0.AuxInt 13658 if x0.Aux != s { 13659 break 13660 } 13661 _ = x0.Args[2] 13662 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13663 break 13664 } 13665 s1 := v.Args[1] 13666 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13667 break 13668 } 13669 x2 := s1.Args[0] 13670 if x2.Op != Op386MOVBloadidx1 { 13671 break 13672 } 13673 i3 := x2.AuxInt 13674 if x2.Aux != s { 13675 break 13676 } 13677 _ = x2.Args[2] 13678 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13679 break 13680 } 13681 b = mergePoint(b, x0, x1, x2) 13682 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13683 v.reset(OpCopy) 13684 v.AddArg(v0) 13685 v0.AuxInt = i0 13686 v0.Aux = s 13687 v0.AddArg(p) 13688 v0.AddArg(idx) 13689 v0.AddArg(mem) 13690 return true 13691 } 13692 return false 13693 } 13694 func rewriteValue386_Op386ORL_40(v *Value) bool { 13695 b := v.Block 13696 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13697 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13698 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13699 for { 13700 _ = v.Args[1] 13701 o0 := v.Args[0] 13702 if o0.Op != Op386ORL { 13703 break 13704 } 13705 _ = o0.Args[1] 13706 s0 := o0.Args[0] 13707 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13708 break 13709 } 13710 x1 := s0.Args[0] 13711 if x1.Op != Op386MOVBloadidx1 { 13712 break 13713 } 13714 i2 := x1.AuxInt 13715 s := x1.Aux 13716 mem := x1.Args[2] 13717 idx := x1.Args[0] 13718 p := x1.Args[1] 13719 x0 := o0.Args[1] 13720 if x0.Op != Op386MOVWloadidx1 { 13721 break 13722 } 13723 i0 := x0.AuxInt 13724 if x0.Aux != s { 13725 break 13726 } 13727 _ = x0.Args[2] 13728 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13729 break 13730 } 13731 s1 := v.Args[1] 13732 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13733 break 13734 } 13735 x2 := s1.Args[0] 13736 if x2.Op != Op386MOVBloadidx1 { 13737 break 13738 } 13739 i3 := x2.AuxInt 13740 if x2.Aux != s { 13741 break 13742 } 13743 _ = x2.Args[2] 13744 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13745 break 13746 } 13747 b = mergePoint(b, x0, x1, x2) 13748 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13749 v.reset(OpCopy) 13750 v.AddArg(v0) 13751 v0.AuxInt = i0 13752 v0.Aux = s 13753 v0.AddArg(p) 13754 v0.AddArg(idx) 13755 v0.AddArg(mem) 13756 return true 13757 } 13758 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13759 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13760 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13761 for { 13762 _ = v.Args[1] 13763 o0 := v.Args[0] 13764 if o0.Op != Op386ORL { 13765 break 13766 } 13767 _ = o0.Args[1] 13768 s0 := o0.Args[0] 13769 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13770 break 13771 } 13772 x1 := s0.Args[0] 13773 if x1.Op != Op386MOVBloadidx1 { 13774 break 13775 } 13776 i2 := x1.AuxInt 13777 s := x1.Aux 13778 mem := x1.Args[2] 13779 p := x1.Args[0] 13780 idx := x1.Args[1] 13781 x0 := o0.Args[1] 13782 if x0.Op != Op386MOVWloadidx1 { 13783 break 13784 } 13785 i0 := x0.AuxInt 13786 if x0.Aux != s { 13787 break 13788 } 13789 _ = x0.Args[2] 13790 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 13791 break 13792 } 13793 s1 := v.Args[1] 13794 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13795 break 13796 } 13797 x2 := s1.Args[0] 13798 if x2.Op != Op386MOVBloadidx1 { 13799 break 13800 } 13801 i3 := x2.AuxInt 13802 if x2.Aux != s { 13803 break 13804 } 13805 _ = x2.Args[2] 13806 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13807 break 13808 } 13809 b = mergePoint(b, x0, x1, x2) 13810 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13811 v.reset(OpCopy) 13812 v.AddArg(v0) 13813 v0.AuxInt = i0 13814 v0.Aux = s 13815 v0.AddArg(p) 13816 v0.AddArg(idx) 13817 v0.AddArg(mem) 13818 return true 13819 } 13820 // match: (ORL o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem)) s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem))) 13821 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13822 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13823 for { 13824 _ = v.Args[1] 13825 o0 := v.Args[0] 13826 if o0.Op != Op386ORL { 13827 break 13828 } 13829 _ = o0.Args[1] 13830 s0 := o0.Args[0] 13831 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13832 break 13833 } 13834 x1 := s0.Args[0] 13835 if x1.Op != Op386MOVBloadidx1 { 13836 break 13837 } 13838 i2 := x1.AuxInt 13839 s := x1.Aux 13840 mem := x1.Args[2] 13841 idx := x1.Args[0] 13842 p := x1.Args[1] 13843 x0 := o0.Args[1] 13844 if x0.Op != Op386MOVWloadidx1 { 13845 break 13846 } 13847 i0 := x0.AuxInt 13848 if x0.Aux != s { 13849 break 13850 } 13851 _ = x0.Args[2] 13852 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 13853 break 13854 } 13855 s1 := v.Args[1] 13856 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13857 break 13858 } 13859 x2 := s1.Args[0] 13860 if x2.Op != Op386MOVBloadidx1 { 13861 break 13862 } 13863 i3 := x2.AuxInt 13864 if x2.Aux != s { 13865 break 13866 } 13867 _ = x2.Args[2] 13868 if idx != x2.Args[0] || p != x2.Args[1] || mem != x2.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13869 break 13870 } 13871 b = mergePoint(b, x0, x1, x2) 13872 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13873 v.reset(OpCopy) 13874 v.AddArg(v0) 13875 v0.AuxInt = i0 13876 v0.Aux = s 13877 v0.AddArg(p) 13878 v0.AddArg(idx) 13879 v0.AddArg(mem) 13880 return true 13881 } 13882 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)))) 13883 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13884 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13885 for { 13886 _ = v.Args[1] 13887 s1 := v.Args[0] 13888 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13889 break 13890 } 13891 x2 := s1.Args[0] 13892 if x2.Op != Op386MOVBloadidx1 { 13893 break 13894 } 13895 i3 := x2.AuxInt 13896 s := x2.Aux 13897 mem := x2.Args[2] 13898 p := x2.Args[0] 13899 idx := x2.Args[1] 13900 o0 := v.Args[1] 13901 if o0.Op != Op386ORL { 13902 break 13903 } 13904 _ = o0.Args[1] 13905 x0 := o0.Args[0] 13906 if x0.Op != Op386MOVWloadidx1 { 13907 break 13908 } 13909 i0 := x0.AuxInt 13910 if x0.Aux != s { 13911 break 13912 } 13913 _ = x0.Args[2] 13914 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13915 break 13916 } 13917 s0 := o0.Args[1] 13918 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13919 break 13920 } 13921 x1 := s0.Args[0] 13922 if x1.Op != Op386MOVBloadidx1 { 13923 break 13924 } 13925 i2 := x1.AuxInt 13926 if x1.Aux != s { 13927 break 13928 } 13929 _ = x1.Args[2] 13930 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13931 break 13932 } 13933 b = mergePoint(b, x0, x1, x2) 13934 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13935 v.reset(OpCopy) 13936 v.AddArg(v0) 13937 v0.AuxInt = i0 13938 v0.Aux = s 13939 v0.AddArg(p) 13940 v0.AddArg(idx) 13941 v0.AddArg(mem) 13942 return true 13943 } 13944 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)))) 13945 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 13946 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 13947 for { 13948 _ = v.Args[1] 13949 s1 := v.Args[0] 13950 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 13951 break 13952 } 13953 x2 := s1.Args[0] 13954 if x2.Op != Op386MOVBloadidx1 { 13955 break 13956 } 13957 i3 := x2.AuxInt 13958 s := x2.Aux 13959 mem := x2.Args[2] 13960 idx := x2.Args[0] 13961 p := x2.Args[1] 13962 o0 := v.Args[1] 13963 if o0.Op != Op386ORL { 13964 break 13965 } 13966 _ = o0.Args[1] 13967 x0 := o0.Args[0] 13968 if x0.Op != Op386MOVWloadidx1 { 13969 break 13970 } 13971 i0 := x0.AuxInt 13972 if x0.Aux != s { 13973 break 13974 } 13975 _ = x0.Args[2] 13976 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 13977 break 13978 } 13979 s0 := o0.Args[1] 13980 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 13981 break 13982 } 13983 x1 := s0.Args[0] 13984 if x1.Op != Op386MOVBloadidx1 { 13985 break 13986 } 13987 i2 := x1.AuxInt 13988 if x1.Aux != s { 13989 break 13990 } 13991 _ = x1.Args[2] 13992 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 13993 break 13994 } 13995 b = mergePoint(b, x0, x1, x2) 13996 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 13997 v.reset(OpCopy) 13998 v.AddArg(v0) 13999 v0.AuxInt = i0 14000 v0.Aux = s 14001 v0.AddArg(p) 14002 v0.AddArg(idx) 14003 v0.AddArg(mem) 14004 return true 14005 } 14006 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)))) 14007 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14008 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14009 for { 14010 _ = v.Args[1] 14011 s1 := v.Args[0] 14012 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14013 break 14014 } 14015 x2 := s1.Args[0] 14016 if x2.Op != Op386MOVBloadidx1 { 14017 break 14018 } 14019 i3 := x2.AuxInt 14020 s := x2.Aux 14021 mem := x2.Args[2] 14022 p := x2.Args[0] 14023 idx := x2.Args[1] 14024 o0 := v.Args[1] 14025 if o0.Op != Op386ORL { 14026 break 14027 } 14028 _ = o0.Args[1] 14029 x0 := o0.Args[0] 14030 if x0.Op != Op386MOVWloadidx1 { 14031 break 14032 } 14033 i0 := x0.AuxInt 14034 if x0.Aux != s { 14035 break 14036 } 14037 _ = x0.Args[2] 14038 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 14039 break 14040 } 14041 s0 := o0.Args[1] 14042 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14043 break 14044 } 14045 x1 := s0.Args[0] 14046 if x1.Op != Op386MOVBloadidx1 { 14047 break 14048 } 14049 i2 := x1.AuxInt 14050 if x1.Aux != s { 14051 break 14052 } 14053 _ = x1.Args[2] 14054 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14055 break 14056 } 14057 b = mergePoint(b, x0, x1, x2) 14058 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14059 v.reset(OpCopy) 14060 v.AddArg(v0) 14061 v0.AuxInt = i0 14062 v0.Aux = s 14063 v0.AddArg(p) 14064 v0.AddArg(idx) 14065 v0.AddArg(mem) 14066 return true 14067 } 14068 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)))) 14069 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14070 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14071 for { 14072 _ = v.Args[1] 14073 s1 := v.Args[0] 14074 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14075 break 14076 } 14077 x2 := s1.Args[0] 14078 if x2.Op != Op386MOVBloadidx1 { 14079 break 14080 } 14081 i3 := x2.AuxInt 14082 s := x2.Aux 14083 mem := x2.Args[2] 14084 idx := x2.Args[0] 14085 p := x2.Args[1] 14086 o0 := v.Args[1] 14087 if o0.Op != Op386ORL { 14088 break 14089 } 14090 _ = o0.Args[1] 14091 x0 := o0.Args[0] 14092 if x0.Op != Op386MOVWloadidx1 { 14093 break 14094 } 14095 i0 := x0.AuxInt 14096 if x0.Aux != s { 14097 break 14098 } 14099 _ = x0.Args[2] 14100 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 14101 break 14102 } 14103 s0 := o0.Args[1] 14104 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14105 break 14106 } 14107 x1 := s0.Args[0] 14108 if x1.Op != Op386MOVBloadidx1 { 14109 break 14110 } 14111 i2 := x1.AuxInt 14112 if x1.Aux != s { 14113 break 14114 } 14115 _ = x1.Args[2] 14116 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14117 break 14118 } 14119 b = mergePoint(b, x0, x1, x2) 14120 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14121 v.reset(OpCopy) 14122 v.AddArg(v0) 14123 v0.AuxInt = i0 14124 v0.Aux = s 14125 v0.AddArg(p) 14126 v0.AddArg(idx) 14127 v0.AddArg(mem) 14128 return true 14129 } 14130 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)))) 14131 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14132 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14133 for { 14134 _ = v.Args[1] 14135 s1 := v.Args[0] 14136 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14137 break 14138 } 14139 x2 := s1.Args[0] 14140 if x2.Op != Op386MOVBloadidx1 { 14141 break 14142 } 14143 i3 := x2.AuxInt 14144 s := x2.Aux 14145 mem := x2.Args[2] 14146 p := x2.Args[0] 14147 idx := x2.Args[1] 14148 o0 := v.Args[1] 14149 if o0.Op != Op386ORL { 14150 break 14151 } 14152 _ = o0.Args[1] 14153 x0 := o0.Args[0] 14154 if x0.Op != Op386MOVWloadidx1 { 14155 break 14156 } 14157 i0 := x0.AuxInt 14158 if x0.Aux != s { 14159 break 14160 } 14161 _ = x0.Args[2] 14162 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 14163 break 14164 } 14165 s0 := o0.Args[1] 14166 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14167 break 14168 } 14169 x1 := s0.Args[0] 14170 if x1.Op != Op386MOVBloadidx1 { 14171 break 14172 } 14173 i2 := x1.AuxInt 14174 if x1.Aux != s { 14175 break 14176 } 14177 _ = x1.Args[2] 14178 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14179 break 14180 } 14181 b = mergePoint(b, x0, x1, x2) 14182 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14183 v.reset(OpCopy) 14184 v.AddArg(v0) 14185 v0.AuxInt = i0 14186 v0.Aux = s 14187 v0.AddArg(p) 14188 v0.AddArg(idx) 14189 v0.AddArg(mem) 14190 return true 14191 } 14192 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} p idx mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)))) 14193 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14194 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14195 for { 14196 _ = v.Args[1] 14197 s1 := v.Args[0] 14198 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14199 break 14200 } 14201 x2 := s1.Args[0] 14202 if x2.Op != Op386MOVBloadidx1 { 14203 break 14204 } 14205 i3 := x2.AuxInt 14206 s := x2.Aux 14207 mem := x2.Args[2] 14208 idx := x2.Args[0] 14209 p := x2.Args[1] 14210 o0 := v.Args[1] 14211 if o0.Op != Op386ORL { 14212 break 14213 } 14214 _ = o0.Args[1] 14215 x0 := o0.Args[0] 14216 if x0.Op != Op386MOVWloadidx1 { 14217 break 14218 } 14219 i0 := x0.AuxInt 14220 if x0.Aux != s { 14221 break 14222 } 14223 _ = x0.Args[2] 14224 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] { 14225 break 14226 } 14227 s0 := o0.Args[1] 14228 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14229 break 14230 } 14231 x1 := s0.Args[0] 14232 if x1.Op != Op386MOVBloadidx1 { 14233 break 14234 } 14235 i2 := x1.AuxInt 14236 if x1.Aux != s { 14237 break 14238 } 14239 _ = x1.Args[2] 14240 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14241 break 14242 } 14243 b = mergePoint(b, x0, x1, x2) 14244 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14245 v.reset(OpCopy) 14246 v.AddArg(v0) 14247 v0.AuxInt = i0 14248 v0.Aux = s 14249 v0.AddArg(p) 14250 v0.AddArg(idx) 14251 v0.AddArg(mem) 14252 return true 14253 } 14254 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)))) 14255 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14256 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14257 for { 14258 _ = v.Args[1] 14259 s1 := v.Args[0] 14260 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14261 break 14262 } 14263 x2 := s1.Args[0] 14264 if x2.Op != Op386MOVBloadidx1 { 14265 break 14266 } 14267 i3 := x2.AuxInt 14268 s := x2.Aux 14269 mem := x2.Args[2] 14270 p := x2.Args[0] 14271 idx := x2.Args[1] 14272 o0 := v.Args[1] 14273 if o0.Op != Op386ORL { 14274 break 14275 } 14276 _ = o0.Args[1] 14277 x0 := o0.Args[0] 14278 if x0.Op != Op386MOVWloadidx1 { 14279 break 14280 } 14281 i0 := x0.AuxInt 14282 if x0.Aux != s { 14283 break 14284 } 14285 _ = x0.Args[2] 14286 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 14287 break 14288 } 14289 s0 := o0.Args[1] 14290 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14291 break 14292 } 14293 x1 := s0.Args[0] 14294 if x1.Op != Op386MOVBloadidx1 { 14295 break 14296 } 14297 i2 := x1.AuxInt 14298 if x1.Aux != s { 14299 break 14300 } 14301 _ = x1.Args[2] 14302 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14303 break 14304 } 14305 b = mergePoint(b, x0, x1, x2) 14306 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14307 v.reset(OpCopy) 14308 v.AddArg(v0) 14309 v0.AuxInt = i0 14310 v0.Aux = s 14311 v0.AddArg(p) 14312 v0.AddArg(idx) 14313 v0.AddArg(mem) 14314 return true 14315 } 14316 return false 14317 } 14318 func rewriteValue386_Op386ORL_50(v *Value) bool { 14319 b := v.Block 14320 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL x0:(MOVWloadidx1 [i0] {s} idx p mem) s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)))) 14321 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14322 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14323 for { 14324 _ = v.Args[1] 14325 s1 := v.Args[0] 14326 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14327 break 14328 } 14329 x2 := s1.Args[0] 14330 if x2.Op != Op386MOVBloadidx1 { 14331 break 14332 } 14333 i3 := x2.AuxInt 14334 s := x2.Aux 14335 mem := x2.Args[2] 14336 idx := x2.Args[0] 14337 p := x2.Args[1] 14338 o0 := v.Args[1] 14339 if o0.Op != Op386ORL { 14340 break 14341 } 14342 _ = o0.Args[1] 14343 x0 := o0.Args[0] 14344 if x0.Op != Op386MOVWloadidx1 { 14345 break 14346 } 14347 i0 := x0.AuxInt 14348 if x0.Aux != s { 14349 break 14350 } 14351 _ = x0.Args[2] 14352 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] { 14353 break 14354 } 14355 s0 := o0.Args[1] 14356 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14357 break 14358 } 14359 x1 := s0.Args[0] 14360 if x1.Op != Op386MOVBloadidx1 { 14361 break 14362 } 14363 i2 := x1.AuxInt 14364 if x1.Aux != s { 14365 break 14366 } 14367 _ = x1.Args[2] 14368 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14369 break 14370 } 14371 b = mergePoint(b, x0, x1, x2) 14372 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14373 v.reset(OpCopy) 14374 v.AddArg(v0) 14375 v0.AuxInt = i0 14376 v0.Aux = s 14377 v0.AddArg(p) 14378 v0.AddArg(idx) 14379 v0.AddArg(mem) 14380 return true 14381 } 14382 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem))) 14383 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14384 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14385 for { 14386 _ = v.Args[1] 14387 s1 := v.Args[0] 14388 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14389 break 14390 } 14391 x2 := s1.Args[0] 14392 if x2.Op != Op386MOVBloadidx1 { 14393 break 14394 } 14395 i3 := x2.AuxInt 14396 s := x2.Aux 14397 mem := x2.Args[2] 14398 p := x2.Args[0] 14399 idx := x2.Args[1] 14400 o0 := v.Args[1] 14401 if o0.Op != Op386ORL { 14402 break 14403 } 14404 _ = o0.Args[1] 14405 s0 := o0.Args[0] 14406 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14407 break 14408 } 14409 x1 := s0.Args[0] 14410 if x1.Op != Op386MOVBloadidx1 { 14411 break 14412 } 14413 i2 := x1.AuxInt 14414 if x1.Aux != s { 14415 break 14416 } 14417 _ = x1.Args[2] 14418 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 14419 break 14420 } 14421 x0 := o0.Args[1] 14422 if x0.Op != Op386MOVWloadidx1 { 14423 break 14424 } 14425 i0 := x0.AuxInt 14426 if x0.Aux != s { 14427 break 14428 } 14429 _ = x0.Args[2] 14430 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14431 break 14432 } 14433 b = mergePoint(b, x0, x1, x2) 14434 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14435 v.reset(OpCopy) 14436 v.AddArg(v0) 14437 v0.AuxInt = i0 14438 v0.Aux = s 14439 v0.AddArg(p) 14440 v0.AddArg(idx) 14441 v0.AddArg(mem) 14442 return true 14443 } 14444 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem))) 14445 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14446 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14447 for { 14448 _ = v.Args[1] 14449 s1 := v.Args[0] 14450 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14451 break 14452 } 14453 x2 := s1.Args[0] 14454 if x2.Op != Op386MOVBloadidx1 { 14455 break 14456 } 14457 i3 := x2.AuxInt 14458 s := x2.Aux 14459 mem := x2.Args[2] 14460 idx := x2.Args[0] 14461 p := x2.Args[1] 14462 o0 := v.Args[1] 14463 if o0.Op != Op386ORL { 14464 break 14465 } 14466 _ = o0.Args[1] 14467 s0 := o0.Args[0] 14468 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14469 break 14470 } 14471 x1 := s0.Args[0] 14472 if x1.Op != Op386MOVBloadidx1 { 14473 break 14474 } 14475 i2 := x1.AuxInt 14476 if x1.Aux != s { 14477 break 14478 } 14479 _ = x1.Args[2] 14480 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 14481 break 14482 } 14483 x0 := o0.Args[1] 14484 if x0.Op != Op386MOVWloadidx1 { 14485 break 14486 } 14487 i0 := x0.AuxInt 14488 if x0.Aux != s { 14489 break 14490 } 14491 _ = x0.Args[2] 14492 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14493 break 14494 } 14495 b = mergePoint(b, x0, x1, x2) 14496 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14497 v.reset(OpCopy) 14498 v.AddArg(v0) 14499 v0.AuxInt = i0 14500 v0.Aux = s 14501 v0.AddArg(p) 14502 v0.AddArg(idx) 14503 v0.AddArg(mem) 14504 return true 14505 } 14506 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem))) 14507 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14508 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14509 for { 14510 _ = v.Args[1] 14511 s1 := v.Args[0] 14512 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14513 break 14514 } 14515 x2 := s1.Args[0] 14516 if x2.Op != Op386MOVBloadidx1 { 14517 break 14518 } 14519 i3 := x2.AuxInt 14520 s := x2.Aux 14521 mem := x2.Args[2] 14522 p := x2.Args[0] 14523 idx := x2.Args[1] 14524 o0 := v.Args[1] 14525 if o0.Op != Op386ORL { 14526 break 14527 } 14528 _ = o0.Args[1] 14529 s0 := o0.Args[0] 14530 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14531 break 14532 } 14533 x1 := s0.Args[0] 14534 if x1.Op != Op386MOVBloadidx1 { 14535 break 14536 } 14537 i2 := x1.AuxInt 14538 if x1.Aux != s { 14539 break 14540 } 14541 _ = x1.Args[2] 14542 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 14543 break 14544 } 14545 x0 := o0.Args[1] 14546 if x0.Op != Op386MOVWloadidx1 { 14547 break 14548 } 14549 i0 := x0.AuxInt 14550 if x0.Aux != s { 14551 break 14552 } 14553 _ = x0.Args[2] 14554 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14555 break 14556 } 14557 b = mergePoint(b, x0, x1, x2) 14558 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14559 v.reset(OpCopy) 14560 v.AddArg(v0) 14561 v0.AuxInt = i0 14562 v0.Aux = s 14563 v0.AddArg(p) 14564 v0.AddArg(idx) 14565 v0.AddArg(mem) 14566 return true 14567 } 14568 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} p idx mem))) 14569 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14570 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14571 for { 14572 _ = v.Args[1] 14573 s1 := v.Args[0] 14574 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14575 break 14576 } 14577 x2 := s1.Args[0] 14578 if x2.Op != Op386MOVBloadidx1 { 14579 break 14580 } 14581 i3 := x2.AuxInt 14582 s := x2.Aux 14583 mem := x2.Args[2] 14584 idx := x2.Args[0] 14585 p := x2.Args[1] 14586 o0 := v.Args[1] 14587 if o0.Op != Op386ORL { 14588 break 14589 } 14590 _ = o0.Args[1] 14591 s0 := o0.Args[0] 14592 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14593 break 14594 } 14595 x1 := s0.Args[0] 14596 if x1.Op != Op386MOVBloadidx1 { 14597 break 14598 } 14599 i2 := x1.AuxInt 14600 if x1.Aux != s { 14601 break 14602 } 14603 _ = x1.Args[2] 14604 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 14605 break 14606 } 14607 x0 := o0.Args[1] 14608 if x0.Op != Op386MOVWloadidx1 { 14609 break 14610 } 14611 i0 := x0.AuxInt 14612 if x0.Aux != s { 14613 break 14614 } 14615 _ = x0.Args[2] 14616 if p != x0.Args[0] || idx != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14617 break 14618 } 14619 b = mergePoint(b, x0, x1, x2) 14620 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14621 v.reset(OpCopy) 14622 v.AddArg(v0) 14623 v0.AuxInt = i0 14624 v0.Aux = s 14625 v0.AddArg(p) 14626 v0.AddArg(idx) 14627 v0.AddArg(mem) 14628 return true 14629 } 14630 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem))) 14631 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14632 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14633 for { 14634 _ = v.Args[1] 14635 s1 := v.Args[0] 14636 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14637 break 14638 } 14639 x2 := s1.Args[0] 14640 if x2.Op != Op386MOVBloadidx1 { 14641 break 14642 } 14643 i3 := x2.AuxInt 14644 s := x2.Aux 14645 mem := x2.Args[2] 14646 p := x2.Args[0] 14647 idx := x2.Args[1] 14648 o0 := v.Args[1] 14649 if o0.Op != Op386ORL { 14650 break 14651 } 14652 _ = o0.Args[1] 14653 s0 := o0.Args[0] 14654 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14655 break 14656 } 14657 x1 := s0.Args[0] 14658 if x1.Op != Op386MOVBloadidx1 { 14659 break 14660 } 14661 i2 := x1.AuxInt 14662 if x1.Aux != s { 14663 break 14664 } 14665 _ = x1.Args[2] 14666 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 14667 break 14668 } 14669 x0 := o0.Args[1] 14670 if x0.Op != Op386MOVWloadidx1 { 14671 break 14672 } 14673 i0 := x0.AuxInt 14674 if x0.Aux != s { 14675 break 14676 } 14677 _ = x0.Args[2] 14678 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14679 break 14680 } 14681 b = mergePoint(b, x0, x1, x2) 14682 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14683 v.reset(OpCopy) 14684 v.AddArg(v0) 14685 v0.AuxInt = i0 14686 v0.Aux = s 14687 v0.AddArg(p) 14688 v0.AddArg(idx) 14689 v0.AddArg(mem) 14690 return true 14691 } 14692 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} p idx mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem))) 14693 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14694 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14695 for { 14696 _ = v.Args[1] 14697 s1 := v.Args[0] 14698 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14699 break 14700 } 14701 x2 := s1.Args[0] 14702 if x2.Op != Op386MOVBloadidx1 { 14703 break 14704 } 14705 i3 := x2.AuxInt 14706 s := x2.Aux 14707 mem := x2.Args[2] 14708 idx := x2.Args[0] 14709 p := x2.Args[1] 14710 o0 := v.Args[1] 14711 if o0.Op != Op386ORL { 14712 break 14713 } 14714 _ = o0.Args[1] 14715 s0 := o0.Args[0] 14716 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14717 break 14718 } 14719 x1 := s0.Args[0] 14720 if x1.Op != Op386MOVBloadidx1 { 14721 break 14722 } 14723 i2 := x1.AuxInt 14724 if x1.Aux != s { 14725 break 14726 } 14727 _ = x1.Args[2] 14728 if p != x1.Args[0] || idx != x1.Args[1] || mem != x1.Args[2] { 14729 break 14730 } 14731 x0 := o0.Args[1] 14732 if x0.Op != Op386MOVWloadidx1 { 14733 break 14734 } 14735 i0 := x0.AuxInt 14736 if x0.Aux != s { 14737 break 14738 } 14739 _ = x0.Args[2] 14740 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14741 break 14742 } 14743 b = mergePoint(b, x0, x1, x2) 14744 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14745 v.reset(OpCopy) 14746 v.AddArg(v0) 14747 v0.AuxInt = i0 14748 v0.Aux = s 14749 v0.AddArg(p) 14750 v0.AddArg(idx) 14751 v0.AddArg(mem) 14752 return true 14753 } 14754 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} p idx mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem))) 14755 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14756 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14757 for { 14758 _ = v.Args[1] 14759 s1 := v.Args[0] 14760 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14761 break 14762 } 14763 x2 := s1.Args[0] 14764 if x2.Op != Op386MOVBloadidx1 { 14765 break 14766 } 14767 i3 := x2.AuxInt 14768 s := x2.Aux 14769 mem := x2.Args[2] 14770 p := x2.Args[0] 14771 idx := x2.Args[1] 14772 o0 := v.Args[1] 14773 if o0.Op != Op386ORL { 14774 break 14775 } 14776 _ = o0.Args[1] 14777 s0 := o0.Args[0] 14778 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14779 break 14780 } 14781 x1 := s0.Args[0] 14782 if x1.Op != Op386MOVBloadidx1 { 14783 break 14784 } 14785 i2 := x1.AuxInt 14786 if x1.Aux != s { 14787 break 14788 } 14789 _ = x1.Args[2] 14790 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 14791 break 14792 } 14793 x0 := o0.Args[1] 14794 if x0.Op != Op386MOVWloadidx1 { 14795 break 14796 } 14797 i0 := x0.AuxInt 14798 if x0.Aux != s { 14799 break 14800 } 14801 _ = x0.Args[2] 14802 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14803 break 14804 } 14805 b = mergePoint(b, x0, x1, x2) 14806 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14807 v.reset(OpCopy) 14808 v.AddArg(v0) 14809 v0.AuxInt = i0 14810 v0.Aux = s 14811 v0.AddArg(p) 14812 v0.AddArg(idx) 14813 v0.AddArg(mem) 14814 return true 14815 } 14816 // match: (ORL s1:(SHLLconst [24] x2:(MOVBloadidx1 [i3] {s} idx p mem)) o0:(ORL s0:(SHLLconst [16] x1:(MOVBloadidx1 [i2] {s} idx p mem)) x0:(MOVWloadidx1 [i0] {s} idx p mem))) 14817 // cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 14818 // result: @mergePoint(b,x0,x1,x2) (MOVLloadidx1 <v.Type> [i0] {s} p idx mem) 14819 for { 14820 _ = v.Args[1] 14821 s1 := v.Args[0] 14822 if s1.Op != Op386SHLLconst || s1.AuxInt != 24 { 14823 break 14824 } 14825 x2 := s1.Args[0] 14826 if x2.Op != Op386MOVBloadidx1 { 14827 break 14828 } 14829 i3 := x2.AuxInt 14830 s := x2.Aux 14831 mem := x2.Args[2] 14832 idx := x2.Args[0] 14833 p := x2.Args[1] 14834 o0 := v.Args[1] 14835 if o0.Op != Op386ORL { 14836 break 14837 } 14838 _ = o0.Args[1] 14839 s0 := o0.Args[0] 14840 if s0.Op != Op386SHLLconst || s0.AuxInt != 16 { 14841 break 14842 } 14843 x1 := s0.Args[0] 14844 if x1.Op != Op386MOVBloadidx1 { 14845 break 14846 } 14847 i2 := x1.AuxInt 14848 if x1.Aux != s { 14849 break 14850 } 14851 _ = x1.Args[2] 14852 if idx != x1.Args[0] || p != x1.Args[1] || mem != x1.Args[2] { 14853 break 14854 } 14855 x0 := o0.Args[1] 14856 if x0.Op != Op386MOVWloadidx1 { 14857 break 14858 } 14859 i0 := x0.AuxInt 14860 if x0.Aux != s { 14861 break 14862 } 14863 _ = x0.Args[2] 14864 if idx != x0.Args[0] || p != x0.Args[1] || mem != x0.Args[2] || !(i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 14865 break 14866 } 14867 b = mergePoint(b, x0, x1, x2) 14868 v0 := b.NewValue0(v.Pos, Op386MOVLloadidx1, v.Type) 14869 v.reset(OpCopy) 14870 v.AddArg(v0) 14871 v0.AuxInt = i0 14872 v0.Aux = s 14873 v0.AddArg(p) 14874 v0.AddArg(idx) 14875 v0.AddArg(mem) 14876 return true 14877 } 14878 return false 14879 } 14880 func rewriteValue386_Op386ORLconst_0(v *Value) bool { 14881 // match: (ORLconst [c] x) 14882 // cond: int32(c)==0 14883 // result: x 14884 for { 14885 c := v.AuxInt 14886 x := v.Args[0] 14887 if !(int32(c) == 0) { 14888 break 14889 } 14890 v.reset(OpCopy) 14891 v.Type = x.Type 14892 v.AddArg(x) 14893 return true 14894 } 14895 // match: (ORLconst [c] _) 14896 // cond: int32(c)==-1 14897 // result: (MOVLconst [-1]) 14898 for { 14899 c := v.AuxInt 14900 if !(int32(c) == -1) { 14901 break 14902 } 14903 v.reset(Op386MOVLconst) 14904 v.AuxInt = -1 14905 return true 14906 } 14907 // match: (ORLconst [c] (MOVLconst [d])) 14908 // result: (MOVLconst [c|d]) 14909 for { 14910 c := v.AuxInt 14911 v_0 := v.Args[0] 14912 if v_0.Op != Op386MOVLconst { 14913 break 14914 } 14915 d := v_0.AuxInt 14916 v.reset(Op386MOVLconst) 14917 v.AuxInt = c | d 14918 return true 14919 } 14920 return false 14921 } 14922 func rewriteValue386_Op386ORLconstmodify_0(v *Value) bool { 14923 b := v.Block 14924 config := b.Func.Config 14925 // match: (ORLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) 14926 // cond: ValAndOff(valoff1).canAdd(off2) 14927 // result: (ORLconstmodify [ValAndOff(valoff1).add(off2)] {sym} base mem) 14928 for { 14929 valoff1 := v.AuxInt 14930 sym := v.Aux 14931 mem := v.Args[1] 14932 v_0 := v.Args[0] 14933 if v_0.Op != Op386ADDLconst { 14934 break 14935 } 14936 off2 := v_0.AuxInt 14937 base := v_0.Args[0] 14938 if !(ValAndOff(valoff1).canAdd(off2)) { 14939 break 14940 } 14941 v.reset(Op386ORLconstmodify) 14942 v.AuxInt = ValAndOff(valoff1).add(off2) 14943 v.Aux = sym 14944 v.AddArg(base) 14945 v.AddArg(mem) 14946 return true 14947 } 14948 // match: (ORLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) 14949 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 14950 // result: (ORLconstmodify [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base mem) 14951 for { 14952 valoff1 := v.AuxInt 14953 sym1 := v.Aux 14954 mem := v.Args[1] 14955 v_0 := v.Args[0] 14956 if v_0.Op != Op386LEAL { 14957 break 14958 } 14959 off2 := v_0.AuxInt 14960 sym2 := v_0.Aux 14961 base := v_0.Args[0] 14962 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 14963 break 14964 } 14965 v.reset(Op386ORLconstmodify) 14966 v.AuxInt = ValAndOff(valoff1).add(off2) 14967 v.Aux = mergeSym(sym1, sym2) 14968 v.AddArg(base) 14969 v.AddArg(mem) 14970 return true 14971 } 14972 return false 14973 } 14974 func rewriteValue386_Op386ORLconstmodifyidx4_0(v *Value) bool { 14975 b := v.Block 14976 config := b.Func.Config 14977 // match: (ORLconstmodifyidx4 [valoff1] {sym} (ADDLconst [off2] base) idx mem) 14978 // cond: ValAndOff(valoff1).canAdd(off2) 14979 // result: (ORLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {sym} base idx mem) 14980 for { 14981 valoff1 := v.AuxInt 14982 sym := v.Aux 14983 mem := v.Args[2] 14984 v_0 := v.Args[0] 14985 if v_0.Op != Op386ADDLconst { 14986 break 14987 } 14988 off2 := v_0.AuxInt 14989 base := v_0.Args[0] 14990 idx := v.Args[1] 14991 if !(ValAndOff(valoff1).canAdd(off2)) { 14992 break 14993 } 14994 v.reset(Op386ORLconstmodifyidx4) 14995 v.AuxInt = ValAndOff(valoff1).add(off2) 14996 v.Aux = sym 14997 v.AddArg(base) 14998 v.AddArg(idx) 14999 v.AddArg(mem) 15000 return true 15001 } 15002 // match: (ORLconstmodifyidx4 [valoff1] {sym} base (ADDLconst [off2] idx) mem) 15003 // cond: ValAndOff(valoff1).canAdd(off2*4) 15004 // result: (ORLconstmodifyidx4 [ValAndOff(valoff1).add(off2*4)] {sym} base idx mem) 15005 for { 15006 valoff1 := v.AuxInt 15007 sym := v.Aux 15008 mem := v.Args[2] 15009 base := v.Args[0] 15010 v_1 := v.Args[1] 15011 if v_1.Op != Op386ADDLconst { 15012 break 15013 } 15014 off2 := v_1.AuxInt 15015 idx := v_1.Args[0] 15016 if !(ValAndOff(valoff1).canAdd(off2 * 4)) { 15017 break 15018 } 15019 v.reset(Op386ORLconstmodifyidx4) 15020 v.AuxInt = ValAndOff(valoff1).add(off2 * 4) 15021 v.Aux = sym 15022 v.AddArg(base) 15023 v.AddArg(idx) 15024 v.AddArg(mem) 15025 return true 15026 } 15027 // match: (ORLconstmodifyidx4 [valoff1] {sym1} (LEAL [off2] {sym2} base) idx mem) 15028 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 15029 // result: (ORLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base idx mem) 15030 for { 15031 valoff1 := v.AuxInt 15032 sym1 := v.Aux 15033 mem := v.Args[2] 15034 v_0 := v.Args[0] 15035 if v_0.Op != Op386LEAL { 15036 break 15037 } 15038 off2 := v_0.AuxInt 15039 sym2 := v_0.Aux 15040 base := v_0.Args[0] 15041 idx := v.Args[1] 15042 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 15043 break 15044 } 15045 v.reset(Op386ORLconstmodifyidx4) 15046 v.AuxInt = ValAndOff(valoff1).add(off2) 15047 v.Aux = mergeSym(sym1, sym2) 15048 v.AddArg(base) 15049 v.AddArg(idx) 15050 v.AddArg(mem) 15051 return true 15052 } 15053 return false 15054 } 15055 func rewriteValue386_Op386ORLload_0(v *Value) bool { 15056 b := v.Block 15057 config := b.Func.Config 15058 // match: (ORLload [off1] {sym} val (ADDLconst [off2] base) mem) 15059 // cond: is32Bit(off1+off2) 15060 // result: (ORLload [off1+off2] {sym} val base mem) 15061 for { 15062 off1 := v.AuxInt 15063 sym := v.Aux 15064 mem := v.Args[2] 15065 val := v.Args[0] 15066 v_1 := v.Args[1] 15067 if v_1.Op != Op386ADDLconst { 15068 break 15069 } 15070 off2 := v_1.AuxInt 15071 base := v_1.Args[0] 15072 if !(is32Bit(off1 + off2)) { 15073 break 15074 } 15075 v.reset(Op386ORLload) 15076 v.AuxInt = off1 + off2 15077 v.Aux = sym 15078 v.AddArg(val) 15079 v.AddArg(base) 15080 v.AddArg(mem) 15081 return true 15082 } 15083 // match: (ORLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 15084 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 15085 // result: (ORLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 15086 for { 15087 off1 := v.AuxInt 15088 sym1 := v.Aux 15089 mem := v.Args[2] 15090 val := v.Args[0] 15091 v_1 := v.Args[1] 15092 if v_1.Op != Op386LEAL { 15093 break 15094 } 15095 off2 := v_1.AuxInt 15096 sym2 := v_1.Aux 15097 base := v_1.Args[0] 15098 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 15099 break 15100 } 15101 v.reset(Op386ORLload) 15102 v.AuxInt = off1 + off2 15103 v.Aux = mergeSym(sym1, sym2) 15104 v.AddArg(val) 15105 v.AddArg(base) 15106 v.AddArg(mem) 15107 return true 15108 } 15109 // match: (ORLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 15110 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 15111 // result: (ORLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 15112 for { 15113 off1 := v.AuxInt 15114 sym1 := v.Aux 15115 mem := v.Args[2] 15116 val := v.Args[0] 15117 v_1 := v.Args[1] 15118 if v_1.Op != Op386LEAL4 { 15119 break 15120 } 15121 off2 := v_1.AuxInt 15122 sym2 := v_1.Aux 15123 idx := v_1.Args[1] 15124 ptr := v_1.Args[0] 15125 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 15126 break 15127 } 15128 v.reset(Op386ORLloadidx4) 15129 v.AuxInt = off1 + off2 15130 v.Aux = mergeSym(sym1, sym2) 15131 v.AddArg(val) 15132 v.AddArg(ptr) 15133 v.AddArg(idx) 15134 v.AddArg(mem) 15135 return true 15136 } 15137 return false 15138 } 15139 func rewriteValue386_Op386ORLloadidx4_0(v *Value) bool { 15140 b := v.Block 15141 config := b.Func.Config 15142 // match: (ORLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 15143 // cond: is32Bit(off1+off2) 15144 // result: (ORLloadidx4 [off1+off2] {sym} val base idx mem) 15145 for { 15146 off1 := v.AuxInt 15147 sym := v.Aux 15148 mem := v.Args[3] 15149 val := v.Args[0] 15150 v_1 := v.Args[1] 15151 if v_1.Op != Op386ADDLconst { 15152 break 15153 } 15154 off2 := v_1.AuxInt 15155 base := v_1.Args[0] 15156 idx := v.Args[2] 15157 if !(is32Bit(off1 + off2)) { 15158 break 15159 } 15160 v.reset(Op386ORLloadidx4) 15161 v.AuxInt = off1 + off2 15162 v.Aux = sym 15163 v.AddArg(val) 15164 v.AddArg(base) 15165 v.AddArg(idx) 15166 v.AddArg(mem) 15167 return true 15168 } 15169 // match: (ORLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 15170 // cond: is32Bit(off1+off2*4) 15171 // result: (ORLloadidx4 [off1+off2*4] {sym} val base idx mem) 15172 for { 15173 off1 := v.AuxInt 15174 sym := v.Aux 15175 mem := v.Args[3] 15176 val := v.Args[0] 15177 base := v.Args[1] 15178 v_2 := v.Args[2] 15179 if v_2.Op != Op386ADDLconst { 15180 break 15181 } 15182 off2 := v_2.AuxInt 15183 idx := v_2.Args[0] 15184 if !(is32Bit(off1 + off2*4)) { 15185 break 15186 } 15187 v.reset(Op386ORLloadidx4) 15188 v.AuxInt = off1 + off2*4 15189 v.Aux = sym 15190 v.AddArg(val) 15191 v.AddArg(base) 15192 v.AddArg(idx) 15193 v.AddArg(mem) 15194 return true 15195 } 15196 // match: (ORLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 15197 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 15198 // result: (ORLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 15199 for { 15200 off1 := v.AuxInt 15201 sym1 := v.Aux 15202 mem := v.Args[3] 15203 val := v.Args[0] 15204 v_1 := v.Args[1] 15205 if v_1.Op != Op386LEAL { 15206 break 15207 } 15208 off2 := v_1.AuxInt 15209 sym2 := v_1.Aux 15210 base := v_1.Args[0] 15211 idx := v.Args[2] 15212 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 15213 break 15214 } 15215 v.reset(Op386ORLloadidx4) 15216 v.AuxInt = off1 + off2 15217 v.Aux = mergeSym(sym1, sym2) 15218 v.AddArg(val) 15219 v.AddArg(base) 15220 v.AddArg(idx) 15221 v.AddArg(mem) 15222 return true 15223 } 15224 return false 15225 } 15226 func rewriteValue386_Op386ORLmodify_0(v *Value) bool { 15227 b := v.Block 15228 config := b.Func.Config 15229 // match: (ORLmodify [off1] {sym} (ADDLconst [off2] base) val mem) 15230 // cond: is32Bit(off1+off2) 15231 // result: (ORLmodify [off1+off2] {sym} base val mem) 15232 for { 15233 off1 := v.AuxInt 15234 sym := v.Aux 15235 mem := v.Args[2] 15236 v_0 := v.Args[0] 15237 if v_0.Op != Op386ADDLconst { 15238 break 15239 } 15240 off2 := v_0.AuxInt 15241 base := v_0.Args[0] 15242 val := v.Args[1] 15243 if !(is32Bit(off1 + off2)) { 15244 break 15245 } 15246 v.reset(Op386ORLmodify) 15247 v.AuxInt = off1 + off2 15248 v.Aux = sym 15249 v.AddArg(base) 15250 v.AddArg(val) 15251 v.AddArg(mem) 15252 return true 15253 } 15254 // match: (ORLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 15255 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 15256 // result: (ORLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) 15257 for { 15258 off1 := v.AuxInt 15259 sym1 := v.Aux 15260 mem := v.Args[2] 15261 v_0 := v.Args[0] 15262 if v_0.Op != Op386LEAL { 15263 break 15264 } 15265 off2 := v_0.AuxInt 15266 sym2 := v_0.Aux 15267 base := v_0.Args[0] 15268 val := v.Args[1] 15269 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 15270 break 15271 } 15272 v.reset(Op386ORLmodify) 15273 v.AuxInt = off1 + off2 15274 v.Aux = mergeSym(sym1, sym2) 15275 v.AddArg(base) 15276 v.AddArg(val) 15277 v.AddArg(mem) 15278 return true 15279 } 15280 return false 15281 } 15282 func rewriteValue386_Op386ORLmodifyidx4_0(v *Value) bool { 15283 b := v.Block 15284 config := b.Func.Config 15285 // match: (ORLmodifyidx4 [off1] {sym} (ADDLconst [off2] base) idx val mem) 15286 // cond: is32Bit(off1+off2) 15287 // result: (ORLmodifyidx4 [off1+off2] {sym} base idx val mem) 15288 for { 15289 off1 := v.AuxInt 15290 sym := v.Aux 15291 mem := v.Args[3] 15292 v_0 := v.Args[0] 15293 if v_0.Op != Op386ADDLconst { 15294 break 15295 } 15296 off2 := v_0.AuxInt 15297 base := v_0.Args[0] 15298 idx := v.Args[1] 15299 val := v.Args[2] 15300 if !(is32Bit(off1 + off2)) { 15301 break 15302 } 15303 v.reset(Op386ORLmodifyidx4) 15304 v.AuxInt = off1 + off2 15305 v.Aux = sym 15306 v.AddArg(base) 15307 v.AddArg(idx) 15308 v.AddArg(val) 15309 v.AddArg(mem) 15310 return true 15311 } 15312 // match: (ORLmodifyidx4 [off1] {sym} base (ADDLconst [off2] idx) val mem) 15313 // cond: is32Bit(off1+off2*4) 15314 // result: (ORLmodifyidx4 [off1+off2*4] {sym} base idx val mem) 15315 for { 15316 off1 := v.AuxInt 15317 sym := v.Aux 15318 mem := v.Args[3] 15319 base := v.Args[0] 15320 v_1 := v.Args[1] 15321 if v_1.Op != Op386ADDLconst { 15322 break 15323 } 15324 off2 := v_1.AuxInt 15325 idx := v_1.Args[0] 15326 val := v.Args[2] 15327 if !(is32Bit(off1 + off2*4)) { 15328 break 15329 } 15330 v.reset(Op386ORLmodifyidx4) 15331 v.AuxInt = off1 + off2*4 15332 v.Aux = sym 15333 v.AddArg(base) 15334 v.AddArg(idx) 15335 v.AddArg(val) 15336 v.AddArg(mem) 15337 return true 15338 } 15339 // match: (ORLmodifyidx4 [off1] {sym1} (LEAL [off2] {sym2} base) idx val mem) 15340 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 15341 // result: (ORLmodifyidx4 [off1+off2] {mergeSym(sym1,sym2)} base idx val mem) 15342 for { 15343 off1 := v.AuxInt 15344 sym1 := v.Aux 15345 mem := v.Args[3] 15346 v_0 := v.Args[0] 15347 if v_0.Op != Op386LEAL { 15348 break 15349 } 15350 off2 := v_0.AuxInt 15351 sym2 := v_0.Aux 15352 base := v_0.Args[0] 15353 idx := v.Args[1] 15354 val := v.Args[2] 15355 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 15356 break 15357 } 15358 v.reset(Op386ORLmodifyidx4) 15359 v.AuxInt = off1 + off2 15360 v.Aux = mergeSym(sym1, sym2) 15361 v.AddArg(base) 15362 v.AddArg(idx) 15363 v.AddArg(val) 15364 v.AddArg(mem) 15365 return true 15366 } 15367 // match: (ORLmodifyidx4 [off] {sym} ptr idx (MOVLconst [c]) mem) 15368 // cond: validValAndOff(c,off) 15369 // result: (ORLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 15370 for { 15371 off := v.AuxInt 15372 sym := v.Aux 15373 mem := v.Args[3] 15374 ptr := v.Args[0] 15375 idx := v.Args[1] 15376 v_2 := v.Args[2] 15377 if v_2.Op != Op386MOVLconst { 15378 break 15379 } 15380 c := v_2.AuxInt 15381 if !(validValAndOff(c, off)) { 15382 break 15383 } 15384 v.reset(Op386ORLconstmodifyidx4) 15385 v.AuxInt = makeValAndOff(c, off) 15386 v.Aux = sym 15387 v.AddArg(ptr) 15388 v.AddArg(idx) 15389 v.AddArg(mem) 15390 return true 15391 } 15392 return false 15393 } 15394 func rewriteValue386_Op386ROLBconst_0(v *Value) bool { 15395 // match: (ROLBconst [c] (ROLBconst [d] x)) 15396 // result: (ROLBconst [(c+d)& 7] x) 15397 for { 15398 c := v.AuxInt 15399 v_0 := v.Args[0] 15400 if v_0.Op != Op386ROLBconst { 15401 break 15402 } 15403 d := v_0.AuxInt 15404 x := v_0.Args[0] 15405 v.reset(Op386ROLBconst) 15406 v.AuxInt = (c + d) & 7 15407 v.AddArg(x) 15408 return true 15409 } 15410 // match: (ROLBconst [0] x) 15411 // result: x 15412 for { 15413 if v.AuxInt != 0 { 15414 break 15415 } 15416 x := v.Args[0] 15417 v.reset(OpCopy) 15418 v.Type = x.Type 15419 v.AddArg(x) 15420 return true 15421 } 15422 return false 15423 } 15424 func rewriteValue386_Op386ROLLconst_0(v *Value) bool { 15425 // match: (ROLLconst [c] (ROLLconst [d] x)) 15426 // result: (ROLLconst [(c+d)&31] x) 15427 for { 15428 c := v.AuxInt 15429 v_0 := v.Args[0] 15430 if v_0.Op != Op386ROLLconst { 15431 break 15432 } 15433 d := v_0.AuxInt 15434 x := v_0.Args[0] 15435 v.reset(Op386ROLLconst) 15436 v.AuxInt = (c + d) & 31 15437 v.AddArg(x) 15438 return true 15439 } 15440 // match: (ROLLconst [0] x) 15441 // result: x 15442 for { 15443 if v.AuxInt != 0 { 15444 break 15445 } 15446 x := v.Args[0] 15447 v.reset(OpCopy) 15448 v.Type = x.Type 15449 v.AddArg(x) 15450 return true 15451 } 15452 return false 15453 } 15454 func rewriteValue386_Op386ROLWconst_0(v *Value) bool { 15455 // match: (ROLWconst [c] (ROLWconst [d] x)) 15456 // result: (ROLWconst [(c+d)&15] x) 15457 for { 15458 c := v.AuxInt 15459 v_0 := v.Args[0] 15460 if v_0.Op != Op386ROLWconst { 15461 break 15462 } 15463 d := v_0.AuxInt 15464 x := v_0.Args[0] 15465 v.reset(Op386ROLWconst) 15466 v.AuxInt = (c + d) & 15 15467 v.AddArg(x) 15468 return true 15469 } 15470 // match: (ROLWconst [0] x) 15471 // result: x 15472 for { 15473 if v.AuxInt != 0 { 15474 break 15475 } 15476 x := v.Args[0] 15477 v.reset(OpCopy) 15478 v.Type = x.Type 15479 v.AddArg(x) 15480 return true 15481 } 15482 return false 15483 } 15484 func rewriteValue386_Op386SARB_0(v *Value) bool { 15485 // match: (SARB x (MOVLconst [c])) 15486 // result: (SARBconst [min(c&31,7)] x) 15487 for { 15488 _ = v.Args[1] 15489 x := v.Args[0] 15490 v_1 := v.Args[1] 15491 if v_1.Op != Op386MOVLconst { 15492 break 15493 } 15494 c := v_1.AuxInt 15495 v.reset(Op386SARBconst) 15496 v.AuxInt = min(c&31, 7) 15497 v.AddArg(x) 15498 return true 15499 } 15500 return false 15501 } 15502 func rewriteValue386_Op386SARBconst_0(v *Value) bool { 15503 // match: (SARBconst x [0]) 15504 // result: x 15505 for { 15506 if v.AuxInt != 0 { 15507 break 15508 } 15509 x := v.Args[0] 15510 v.reset(OpCopy) 15511 v.Type = x.Type 15512 v.AddArg(x) 15513 return true 15514 } 15515 // match: (SARBconst [c] (MOVLconst [d])) 15516 // result: (MOVLconst [d>>uint64(c)]) 15517 for { 15518 c := v.AuxInt 15519 v_0 := v.Args[0] 15520 if v_0.Op != Op386MOVLconst { 15521 break 15522 } 15523 d := v_0.AuxInt 15524 v.reset(Op386MOVLconst) 15525 v.AuxInt = d >> uint64(c) 15526 return true 15527 } 15528 return false 15529 } 15530 func rewriteValue386_Op386SARL_0(v *Value) bool { 15531 // match: (SARL x (MOVLconst [c])) 15532 // result: (SARLconst [c&31] x) 15533 for { 15534 _ = v.Args[1] 15535 x := v.Args[0] 15536 v_1 := v.Args[1] 15537 if v_1.Op != Op386MOVLconst { 15538 break 15539 } 15540 c := v_1.AuxInt 15541 v.reset(Op386SARLconst) 15542 v.AuxInt = c & 31 15543 v.AddArg(x) 15544 return true 15545 } 15546 // match: (SARL x (ANDLconst [31] y)) 15547 // result: (SARL x y) 15548 for { 15549 _ = v.Args[1] 15550 x := v.Args[0] 15551 v_1 := v.Args[1] 15552 if v_1.Op != Op386ANDLconst || v_1.AuxInt != 31 { 15553 break 15554 } 15555 y := v_1.Args[0] 15556 v.reset(Op386SARL) 15557 v.AddArg(x) 15558 v.AddArg(y) 15559 return true 15560 } 15561 return false 15562 } 15563 func rewriteValue386_Op386SARLconst_0(v *Value) bool { 15564 // match: (SARLconst x [0]) 15565 // result: x 15566 for { 15567 if v.AuxInt != 0 { 15568 break 15569 } 15570 x := v.Args[0] 15571 v.reset(OpCopy) 15572 v.Type = x.Type 15573 v.AddArg(x) 15574 return true 15575 } 15576 // match: (SARLconst [c] (MOVLconst [d])) 15577 // result: (MOVLconst [d>>uint64(c)]) 15578 for { 15579 c := v.AuxInt 15580 v_0 := v.Args[0] 15581 if v_0.Op != Op386MOVLconst { 15582 break 15583 } 15584 d := v_0.AuxInt 15585 v.reset(Op386MOVLconst) 15586 v.AuxInt = d >> uint64(c) 15587 return true 15588 } 15589 return false 15590 } 15591 func rewriteValue386_Op386SARW_0(v *Value) bool { 15592 // match: (SARW x (MOVLconst [c])) 15593 // result: (SARWconst [min(c&31,15)] x) 15594 for { 15595 _ = v.Args[1] 15596 x := v.Args[0] 15597 v_1 := v.Args[1] 15598 if v_1.Op != Op386MOVLconst { 15599 break 15600 } 15601 c := v_1.AuxInt 15602 v.reset(Op386SARWconst) 15603 v.AuxInt = min(c&31, 15) 15604 v.AddArg(x) 15605 return true 15606 } 15607 return false 15608 } 15609 func rewriteValue386_Op386SARWconst_0(v *Value) bool { 15610 // match: (SARWconst x [0]) 15611 // result: x 15612 for { 15613 if v.AuxInt != 0 { 15614 break 15615 } 15616 x := v.Args[0] 15617 v.reset(OpCopy) 15618 v.Type = x.Type 15619 v.AddArg(x) 15620 return true 15621 } 15622 // match: (SARWconst [c] (MOVLconst [d])) 15623 // result: (MOVLconst [d>>uint64(c)]) 15624 for { 15625 c := v.AuxInt 15626 v_0 := v.Args[0] 15627 if v_0.Op != Op386MOVLconst { 15628 break 15629 } 15630 d := v_0.AuxInt 15631 v.reset(Op386MOVLconst) 15632 v.AuxInt = d >> uint64(c) 15633 return true 15634 } 15635 return false 15636 } 15637 func rewriteValue386_Op386SBBL_0(v *Value) bool { 15638 // match: (SBBL x (MOVLconst [c]) f) 15639 // result: (SBBLconst [c] x f) 15640 for { 15641 f := v.Args[2] 15642 x := v.Args[0] 15643 v_1 := v.Args[1] 15644 if v_1.Op != Op386MOVLconst { 15645 break 15646 } 15647 c := v_1.AuxInt 15648 v.reset(Op386SBBLconst) 15649 v.AuxInt = c 15650 v.AddArg(x) 15651 v.AddArg(f) 15652 return true 15653 } 15654 return false 15655 } 15656 func rewriteValue386_Op386SBBLcarrymask_0(v *Value) bool { 15657 // match: (SBBLcarrymask (FlagEQ)) 15658 // result: (MOVLconst [0]) 15659 for { 15660 v_0 := v.Args[0] 15661 if v_0.Op != Op386FlagEQ { 15662 break 15663 } 15664 v.reset(Op386MOVLconst) 15665 v.AuxInt = 0 15666 return true 15667 } 15668 // match: (SBBLcarrymask (FlagLT_ULT)) 15669 // result: (MOVLconst [-1]) 15670 for { 15671 v_0 := v.Args[0] 15672 if v_0.Op != Op386FlagLT_ULT { 15673 break 15674 } 15675 v.reset(Op386MOVLconst) 15676 v.AuxInt = -1 15677 return true 15678 } 15679 // match: (SBBLcarrymask (FlagLT_UGT)) 15680 // result: (MOVLconst [0]) 15681 for { 15682 v_0 := v.Args[0] 15683 if v_0.Op != Op386FlagLT_UGT { 15684 break 15685 } 15686 v.reset(Op386MOVLconst) 15687 v.AuxInt = 0 15688 return true 15689 } 15690 // match: (SBBLcarrymask (FlagGT_ULT)) 15691 // result: (MOVLconst [-1]) 15692 for { 15693 v_0 := v.Args[0] 15694 if v_0.Op != Op386FlagGT_ULT { 15695 break 15696 } 15697 v.reset(Op386MOVLconst) 15698 v.AuxInt = -1 15699 return true 15700 } 15701 // match: (SBBLcarrymask (FlagGT_UGT)) 15702 // result: (MOVLconst [0]) 15703 for { 15704 v_0 := v.Args[0] 15705 if v_0.Op != Op386FlagGT_UGT { 15706 break 15707 } 15708 v.reset(Op386MOVLconst) 15709 v.AuxInt = 0 15710 return true 15711 } 15712 return false 15713 } 15714 func rewriteValue386_Op386SETA_0(v *Value) bool { 15715 // match: (SETA (InvertFlags x)) 15716 // result: (SETB x) 15717 for { 15718 v_0 := v.Args[0] 15719 if v_0.Op != Op386InvertFlags { 15720 break 15721 } 15722 x := v_0.Args[0] 15723 v.reset(Op386SETB) 15724 v.AddArg(x) 15725 return true 15726 } 15727 // match: (SETA (FlagEQ)) 15728 // result: (MOVLconst [0]) 15729 for { 15730 v_0 := v.Args[0] 15731 if v_0.Op != Op386FlagEQ { 15732 break 15733 } 15734 v.reset(Op386MOVLconst) 15735 v.AuxInt = 0 15736 return true 15737 } 15738 // match: (SETA (FlagLT_ULT)) 15739 // result: (MOVLconst [0]) 15740 for { 15741 v_0 := v.Args[0] 15742 if v_0.Op != Op386FlagLT_ULT { 15743 break 15744 } 15745 v.reset(Op386MOVLconst) 15746 v.AuxInt = 0 15747 return true 15748 } 15749 // match: (SETA (FlagLT_UGT)) 15750 // result: (MOVLconst [1]) 15751 for { 15752 v_0 := v.Args[0] 15753 if v_0.Op != Op386FlagLT_UGT { 15754 break 15755 } 15756 v.reset(Op386MOVLconst) 15757 v.AuxInt = 1 15758 return true 15759 } 15760 // match: (SETA (FlagGT_ULT)) 15761 // result: (MOVLconst [0]) 15762 for { 15763 v_0 := v.Args[0] 15764 if v_0.Op != Op386FlagGT_ULT { 15765 break 15766 } 15767 v.reset(Op386MOVLconst) 15768 v.AuxInt = 0 15769 return true 15770 } 15771 // match: (SETA (FlagGT_UGT)) 15772 // result: (MOVLconst [1]) 15773 for { 15774 v_0 := v.Args[0] 15775 if v_0.Op != Op386FlagGT_UGT { 15776 break 15777 } 15778 v.reset(Op386MOVLconst) 15779 v.AuxInt = 1 15780 return true 15781 } 15782 return false 15783 } 15784 func rewriteValue386_Op386SETAE_0(v *Value) bool { 15785 // match: (SETAE (InvertFlags x)) 15786 // result: (SETBE x) 15787 for { 15788 v_0 := v.Args[0] 15789 if v_0.Op != Op386InvertFlags { 15790 break 15791 } 15792 x := v_0.Args[0] 15793 v.reset(Op386SETBE) 15794 v.AddArg(x) 15795 return true 15796 } 15797 // match: (SETAE (FlagEQ)) 15798 // result: (MOVLconst [1]) 15799 for { 15800 v_0 := v.Args[0] 15801 if v_0.Op != Op386FlagEQ { 15802 break 15803 } 15804 v.reset(Op386MOVLconst) 15805 v.AuxInt = 1 15806 return true 15807 } 15808 // match: (SETAE (FlagLT_ULT)) 15809 // result: (MOVLconst [0]) 15810 for { 15811 v_0 := v.Args[0] 15812 if v_0.Op != Op386FlagLT_ULT { 15813 break 15814 } 15815 v.reset(Op386MOVLconst) 15816 v.AuxInt = 0 15817 return true 15818 } 15819 // match: (SETAE (FlagLT_UGT)) 15820 // result: (MOVLconst [1]) 15821 for { 15822 v_0 := v.Args[0] 15823 if v_0.Op != Op386FlagLT_UGT { 15824 break 15825 } 15826 v.reset(Op386MOVLconst) 15827 v.AuxInt = 1 15828 return true 15829 } 15830 // match: (SETAE (FlagGT_ULT)) 15831 // result: (MOVLconst [0]) 15832 for { 15833 v_0 := v.Args[0] 15834 if v_0.Op != Op386FlagGT_ULT { 15835 break 15836 } 15837 v.reset(Op386MOVLconst) 15838 v.AuxInt = 0 15839 return true 15840 } 15841 // match: (SETAE (FlagGT_UGT)) 15842 // result: (MOVLconst [1]) 15843 for { 15844 v_0 := v.Args[0] 15845 if v_0.Op != Op386FlagGT_UGT { 15846 break 15847 } 15848 v.reset(Op386MOVLconst) 15849 v.AuxInt = 1 15850 return true 15851 } 15852 return false 15853 } 15854 func rewriteValue386_Op386SETB_0(v *Value) bool { 15855 // match: (SETB (InvertFlags x)) 15856 // result: (SETA x) 15857 for { 15858 v_0 := v.Args[0] 15859 if v_0.Op != Op386InvertFlags { 15860 break 15861 } 15862 x := v_0.Args[0] 15863 v.reset(Op386SETA) 15864 v.AddArg(x) 15865 return true 15866 } 15867 // match: (SETB (FlagEQ)) 15868 // result: (MOVLconst [0]) 15869 for { 15870 v_0 := v.Args[0] 15871 if v_0.Op != Op386FlagEQ { 15872 break 15873 } 15874 v.reset(Op386MOVLconst) 15875 v.AuxInt = 0 15876 return true 15877 } 15878 // match: (SETB (FlagLT_ULT)) 15879 // result: (MOVLconst [1]) 15880 for { 15881 v_0 := v.Args[0] 15882 if v_0.Op != Op386FlagLT_ULT { 15883 break 15884 } 15885 v.reset(Op386MOVLconst) 15886 v.AuxInt = 1 15887 return true 15888 } 15889 // match: (SETB (FlagLT_UGT)) 15890 // result: (MOVLconst [0]) 15891 for { 15892 v_0 := v.Args[0] 15893 if v_0.Op != Op386FlagLT_UGT { 15894 break 15895 } 15896 v.reset(Op386MOVLconst) 15897 v.AuxInt = 0 15898 return true 15899 } 15900 // match: (SETB (FlagGT_ULT)) 15901 // result: (MOVLconst [1]) 15902 for { 15903 v_0 := v.Args[0] 15904 if v_0.Op != Op386FlagGT_ULT { 15905 break 15906 } 15907 v.reset(Op386MOVLconst) 15908 v.AuxInt = 1 15909 return true 15910 } 15911 // match: (SETB (FlagGT_UGT)) 15912 // result: (MOVLconst [0]) 15913 for { 15914 v_0 := v.Args[0] 15915 if v_0.Op != Op386FlagGT_UGT { 15916 break 15917 } 15918 v.reset(Op386MOVLconst) 15919 v.AuxInt = 0 15920 return true 15921 } 15922 return false 15923 } 15924 func rewriteValue386_Op386SETBE_0(v *Value) bool { 15925 // match: (SETBE (InvertFlags x)) 15926 // result: (SETAE x) 15927 for { 15928 v_0 := v.Args[0] 15929 if v_0.Op != Op386InvertFlags { 15930 break 15931 } 15932 x := v_0.Args[0] 15933 v.reset(Op386SETAE) 15934 v.AddArg(x) 15935 return true 15936 } 15937 // match: (SETBE (FlagEQ)) 15938 // result: (MOVLconst [1]) 15939 for { 15940 v_0 := v.Args[0] 15941 if v_0.Op != Op386FlagEQ { 15942 break 15943 } 15944 v.reset(Op386MOVLconst) 15945 v.AuxInt = 1 15946 return true 15947 } 15948 // match: (SETBE (FlagLT_ULT)) 15949 // result: (MOVLconst [1]) 15950 for { 15951 v_0 := v.Args[0] 15952 if v_0.Op != Op386FlagLT_ULT { 15953 break 15954 } 15955 v.reset(Op386MOVLconst) 15956 v.AuxInt = 1 15957 return true 15958 } 15959 // match: (SETBE (FlagLT_UGT)) 15960 // result: (MOVLconst [0]) 15961 for { 15962 v_0 := v.Args[0] 15963 if v_0.Op != Op386FlagLT_UGT { 15964 break 15965 } 15966 v.reset(Op386MOVLconst) 15967 v.AuxInt = 0 15968 return true 15969 } 15970 // match: (SETBE (FlagGT_ULT)) 15971 // result: (MOVLconst [1]) 15972 for { 15973 v_0 := v.Args[0] 15974 if v_0.Op != Op386FlagGT_ULT { 15975 break 15976 } 15977 v.reset(Op386MOVLconst) 15978 v.AuxInt = 1 15979 return true 15980 } 15981 // match: (SETBE (FlagGT_UGT)) 15982 // result: (MOVLconst [0]) 15983 for { 15984 v_0 := v.Args[0] 15985 if v_0.Op != Op386FlagGT_UGT { 15986 break 15987 } 15988 v.reset(Op386MOVLconst) 15989 v.AuxInt = 0 15990 return true 15991 } 15992 return false 15993 } 15994 func rewriteValue386_Op386SETEQ_0(v *Value) bool { 15995 // match: (SETEQ (InvertFlags x)) 15996 // result: (SETEQ x) 15997 for { 15998 v_0 := v.Args[0] 15999 if v_0.Op != Op386InvertFlags { 16000 break 16001 } 16002 x := v_0.Args[0] 16003 v.reset(Op386SETEQ) 16004 v.AddArg(x) 16005 return true 16006 } 16007 // match: (SETEQ (FlagEQ)) 16008 // result: (MOVLconst [1]) 16009 for { 16010 v_0 := v.Args[0] 16011 if v_0.Op != Op386FlagEQ { 16012 break 16013 } 16014 v.reset(Op386MOVLconst) 16015 v.AuxInt = 1 16016 return true 16017 } 16018 // match: (SETEQ (FlagLT_ULT)) 16019 // result: (MOVLconst [0]) 16020 for { 16021 v_0 := v.Args[0] 16022 if v_0.Op != Op386FlagLT_ULT { 16023 break 16024 } 16025 v.reset(Op386MOVLconst) 16026 v.AuxInt = 0 16027 return true 16028 } 16029 // match: (SETEQ (FlagLT_UGT)) 16030 // result: (MOVLconst [0]) 16031 for { 16032 v_0 := v.Args[0] 16033 if v_0.Op != Op386FlagLT_UGT { 16034 break 16035 } 16036 v.reset(Op386MOVLconst) 16037 v.AuxInt = 0 16038 return true 16039 } 16040 // match: (SETEQ (FlagGT_ULT)) 16041 // result: (MOVLconst [0]) 16042 for { 16043 v_0 := v.Args[0] 16044 if v_0.Op != Op386FlagGT_ULT { 16045 break 16046 } 16047 v.reset(Op386MOVLconst) 16048 v.AuxInt = 0 16049 return true 16050 } 16051 // match: (SETEQ (FlagGT_UGT)) 16052 // result: (MOVLconst [0]) 16053 for { 16054 v_0 := v.Args[0] 16055 if v_0.Op != Op386FlagGT_UGT { 16056 break 16057 } 16058 v.reset(Op386MOVLconst) 16059 v.AuxInt = 0 16060 return true 16061 } 16062 return false 16063 } 16064 func rewriteValue386_Op386SETG_0(v *Value) bool { 16065 // match: (SETG (InvertFlags x)) 16066 // result: (SETL x) 16067 for { 16068 v_0 := v.Args[0] 16069 if v_0.Op != Op386InvertFlags { 16070 break 16071 } 16072 x := v_0.Args[0] 16073 v.reset(Op386SETL) 16074 v.AddArg(x) 16075 return true 16076 } 16077 // match: (SETG (FlagEQ)) 16078 // result: (MOVLconst [0]) 16079 for { 16080 v_0 := v.Args[0] 16081 if v_0.Op != Op386FlagEQ { 16082 break 16083 } 16084 v.reset(Op386MOVLconst) 16085 v.AuxInt = 0 16086 return true 16087 } 16088 // match: (SETG (FlagLT_ULT)) 16089 // result: (MOVLconst [0]) 16090 for { 16091 v_0 := v.Args[0] 16092 if v_0.Op != Op386FlagLT_ULT { 16093 break 16094 } 16095 v.reset(Op386MOVLconst) 16096 v.AuxInt = 0 16097 return true 16098 } 16099 // match: (SETG (FlagLT_UGT)) 16100 // result: (MOVLconst [0]) 16101 for { 16102 v_0 := v.Args[0] 16103 if v_0.Op != Op386FlagLT_UGT { 16104 break 16105 } 16106 v.reset(Op386MOVLconst) 16107 v.AuxInt = 0 16108 return true 16109 } 16110 // match: (SETG (FlagGT_ULT)) 16111 // result: (MOVLconst [1]) 16112 for { 16113 v_0 := v.Args[0] 16114 if v_0.Op != Op386FlagGT_ULT { 16115 break 16116 } 16117 v.reset(Op386MOVLconst) 16118 v.AuxInt = 1 16119 return true 16120 } 16121 // match: (SETG (FlagGT_UGT)) 16122 // result: (MOVLconst [1]) 16123 for { 16124 v_0 := v.Args[0] 16125 if v_0.Op != Op386FlagGT_UGT { 16126 break 16127 } 16128 v.reset(Op386MOVLconst) 16129 v.AuxInt = 1 16130 return true 16131 } 16132 return false 16133 } 16134 func rewriteValue386_Op386SETGE_0(v *Value) bool { 16135 // match: (SETGE (InvertFlags x)) 16136 // result: (SETLE x) 16137 for { 16138 v_0 := v.Args[0] 16139 if v_0.Op != Op386InvertFlags { 16140 break 16141 } 16142 x := v_0.Args[0] 16143 v.reset(Op386SETLE) 16144 v.AddArg(x) 16145 return true 16146 } 16147 // match: (SETGE (FlagEQ)) 16148 // result: (MOVLconst [1]) 16149 for { 16150 v_0 := v.Args[0] 16151 if v_0.Op != Op386FlagEQ { 16152 break 16153 } 16154 v.reset(Op386MOVLconst) 16155 v.AuxInt = 1 16156 return true 16157 } 16158 // match: (SETGE (FlagLT_ULT)) 16159 // result: (MOVLconst [0]) 16160 for { 16161 v_0 := v.Args[0] 16162 if v_0.Op != Op386FlagLT_ULT { 16163 break 16164 } 16165 v.reset(Op386MOVLconst) 16166 v.AuxInt = 0 16167 return true 16168 } 16169 // match: (SETGE (FlagLT_UGT)) 16170 // result: (MOVLconst [0]) 16171 for { 16172 v_0 := v.Args[0] 16173 if v_0.Op != Op386FlagLT_UGT { 16174 break 16175 } 16176 v.reset(Op386MOVLconst) 16177 v.AuxInt = 0 16178 return true 16179 } 16180 // match: (SETGE (FlagGT_ULT)) 16181 // result: (MOVLconst [1]) 16182 for { 16183 v_0 := v.Args[0] 16184 if v_0.Op != Op386FlagGT_ULT { 16185 break 16186 } 16187 v.reset(Op386MOVLconst) 16188 v.AuxInt = 1 16189 return true 16190 } 16191 // match: (SETGE (FlagGT_UGT)) 16192 // result: (MOVLconst [1]) 16193 for { 16194 v_0 := v.Args[0] 16195 if v_0.Op != Op386FlagGT_UGT { 16196 break 16197 } 16198 v.reset(Op386MOVLconst) 16199 v.AuxInt = 1 16200 return true 16201 } 16202 return false 16203 } 16204 func rewriteValue386_Op386SETL_0(v *Value) bool { 16205 // match: (SETL (InvertFlags x)) 16206 // result: (SETG x) 16207 for { 16208 v_0 := v.Args[0] 16209 if v_0.Op != Op386InvertFlags { 16210 break 16211 } 16212 x := v_0.Args[0] 16213 v.reset(Op386SETG) 16214 v.AddArg(x) 16215 return true 16216 } 16217 // match: (SETL (FlagEQ)) 16218 // result: (MOVLconst [0]) 16219 for { 16220 v_0 := v.Args[0] 16221 if v_0.Op != Op386FlagEQ { 16222 break 16223 } 16224 v.reset(Op386MOVLconst) 16225 v.AuxInt = 0 16226 return true 16227 } 16228 // match: (SETL (FlagLT_ULT)) 16229 // result: (MOVLconst [1]) 16230 for { 16231 v_0 := v.Args[0] 16232 if v_0.Op != Op386FlagLT_ULT { 16233 break 16234 } 16235 v.reset(Op386MOVLconst) 16236 v.AuxInt = 1 16237 return true 16238 } 16239 // match: (SETL (FlagLT_UGT)) 16240 // result: (MOVLconst [1]) 16241 for { 16242 v_0 := v.Args[0] 16243 if v_0.Op != Op386FlagLT_UGT { 16244 break 16245 } 16246 v.reset(Op386MOVLconst) 16247 v.AuxInt = 1 16248 return true 16249 } 16250 // match: (SETL (FlagGT_ULT)) 16251 // result: (MOVLconst [0]) 16252 for { 16253 v_0 := v.Args[0] 16254 if v_0.Op != Op386FlagGT_ULT { 16255 break 16256 } 16257 v.reset(Op386MOVLconst) 16258 v.AuxInt = 0 16259 return true 16260 } 16261 // match: (SETL (FlagGT_UGT)) 16262 // result: (MOVLconst [0]) 16263 for { 16264 v_0 := v.Args[0] 16265 if v_0.Op != Op386FlagGT_UGT { 16266 break 16267 } 16268 v.reset(Op386MOVLconst) 16269 v.AuxInt = 0 16270 return true 16271 } 16272 return false 16273 } 16274 func rewriteValue386_Op386SETLE_0(v *Value) bool { 16275 // match: (SETLE (InvertFlags x)) 16276 // result: (SETGE x) 16277 for { 16278 v_0 := v.Args[0] 16279 if v_0.Op != Op386InvertFlags { 16280 break 16281 } 16282 x := v_0.Args[0] 16283 v.reset(Op386SETGE) 16284 v.AddArg(x) 16285 return true 16286 } 16287 // match: (SETLE (FlagEQ)) 16288 // result: (MOVLconst [1]) 16289 for { 16290 v_0 := v.Args[0] 16291 if v_0.Op != Op386FlagEQ { 16292 break 16293 } 16294 v.reset(Op386MOVLconst) 16295 v.AuxInt = 1 16296 return true 16297 } 16298 // match: (SETLE (FlagLT_ULT)) 16299 // result: (MOVLconst [1]) 16300 for { 16301 v_0 := v.Args[0] 16302 if v_0.Op != Op386FlagLT_ULT { 16303 break 16304 } 16305 v.reset(Op386MOVLconst) 16306 v.AuxInt = 1 16307 return true 16308 } 16309 // match: (SETLE (FlagLT_UGT)) 16310 // result: (MOVLconst [1]) 16311 for { 16312 v_0 := v.Args[0] 16313 if v_0.Op != Op386FlagLT_UGT { 16314 break 16315 } 16316 v.reset(Op386MOVLconst) 16317 v.AuxInt = 1 16318 return true 16319 } 16320 // match: (SETLE (FlagGT_ULT)) 16321 // result: (MOVLconst [0]) 16322 for { 16323 v_0 := v.Args[0] 16324 if v_0.Op != Op386FlagGT_ULT { 16325 break 16326 } 16327 v.reset(Op386MOVLconst) 16328 v.AuxInt = 0 16329 return true 16330 } 16331 // match: (SETLE (FlagGT_UGT)) 16332 // result: (MOVLconst [0]) 16333 for { 16334 v_0 := v.Args[0] 16335 if v_0.Op != Op386FlagGT_UGT { 16336 break 16337 } 16338 v.reset(Op386MOVLconst) 16339 v.AuxInt = 0 16340 return true 16341 } 16342 return false 16343 } 16344 func rewriteValue386_Op386SETNE_0(v *Value) bool { 16345 // match: (SETNE (InvertFlags x)) 16346 // result: (SETNE x) 16347 for { 16348 v_0 := v.Args[0] 16349 if v_0.Op != Op386InvertFlags { 16350 break 16351 } 16352 x := v_0.Args[0] 16353 v.reset(Op386SETNE) 16354 v.AddArg(x) 16355 return true 16356 } 16357 // match: (SETNE (FlagEQ)) 16358 // result: (MOVLconst [0]) 16359 for { 16360 v_0 := v.Args[0] 16361 if v_0.Op != Op386FlagEQ { 16362 break 16363 } 16364 v.reset(Op386MOVLconst) 16365 v.AuxInt = 0 16366 return true 16367 } 16368 // match: (SETNE (FlagLT_ULT)) 16369 // result: (MOVLconst [1]) 16370 for { 16371 v_0 := v.Args[0] 16372 if v_0.Op != Op386FlagLT_ULT { 16373 break 16374 } 16375 v.reset(Op386MOVLconst) 16376 v.AuxInt = 1 16377 return true 16378 } 16379 // match: (SETNE (FlagLT_UGT)) 16380 // result: (MOVLconst [1]) 16381 for { 16382 v_0 := v.Args[0] 16383 if v_0.Op != Op386FlagLT_UGT { 16384 break 16385 } 16386 v.reset(Op386MOVLconst) 16387 v.AuxInt = 1 16388 return true 16389 } 16390 // match: (SETNE (FlagGT_ULT)) 16391 // result: (MOVLconst [1]) 16392 for { 16393 v_0 := v.Args[0] 16394 if v_0.Op != Op386FlagGT_ULT { 16395 break 16396 } 16397 v.reset(Op386MOVLconst) 16398 v.AuxInt = 1 16399 return true 16400 } 16401 // match: (SETNE (FlagGT_UGT)) 16402 // result: (MOVLconst [1]) 16403 for { 16404 v_0 := v.Args[0] 16405 if v_0.Op != Op386FlagGT_UGT { 16406 break 16407 } 16408 v.reset(Op386MOVLconst) 16409 v.AuxInt = 1 16410 return true 16411 } 16412 return false 16413 } 16414 func rewriteValue386_Op386SHLL_0(v *Value) bool { 16415 // match: (SHLL x (MOVLconst [c])) 16416 // result: (SHLLconst [c&31] x) 16417 for { 16418 _ = v.Args[1] 16419 x := v.Args[0] 16420 v_1 := v.Args[1] 16421 if v_1.Op != Op386MOVLconst { 16422 break 16423 } 16424 c := v_1.AuxInt 16425 v.reset(Op386SHLLconst) 16426 v.AuxInt = c & 31 16427 v.AddArg(x) 16428 return true 16429 } 16430 // match: (SHLL x (ANDLconst [31] y)) 16431 // result: (SHLL x y) 16432 for { 16433 _ = v.Args[1] 16434 x := v.Args[0] 16435 v_1 := v.Args[1] 16436 if v_1.Op != Op386ANDLconst || v_1.AuxInt != 31 { 16437 break 16438 } 16439 y := v_1.Args[0] 16440 v.reset(Op386SHLL) 16441 v.AddArg(x) 16442 v.AddArg(y) 16443 return true 16444 } 16445 return false 16446 } 16447 func rewriteValue386_Op386SHLLconst_0(v *Value) bool { 16448 // match: (SHLLconst x [0]) 16449 // result: x 16450 for { 16451 if v.AuxInt != 0 { 16452 break 16453 } 16454 x := v.Args[0] 16455 v.reset(OpCopy) 16456 v.Type = x.Type 16457 v.AddArg(x) 16458 return true 16459 } 16460 return false 16461 } 16462 func rewriteValue386_Op386SHRB_0(v *Value) bool { 16463 // match: (SHRB x (MOVLconst [c])) 16464 // cond: c&31 < 8 16465 // result: (SHRBconst [c&31] x) 16466 for { 16467 _ = v.Args[1] 16468 x := v.Args[0] 16469 v_1 := v.Args[1] 16470 if v_1.Op != Op386MOVLconst { 16471 break 16472 } 16473 c := v_1.AuxInt 16474 if !(c&31 < 8) { 16475 break 16476 } 16477 v.reset(Op386SHRBconst) 16478 v.AuxInt = c & 31 16479 v.AddArg(x) 16480 return true 16481 } 16482 // match: (SHRB _ (MOVLconst [c])) 16483 // cond: c&31 >= 8 16484 // result: (MOVLconst [0]) 16485 for { 16486 _ = v.Args[1] 16487 v_1 := v.Args[1] 16488 if v_1.Op != Op386MOVLconst { 16489 break 16490 } 16491 c := v_1.AuxInt 16492 if !(c&31 >= 8) { 16493 break 16494 } 16495 v.reset(Op386MOVLconst) 16496 v.AuxInt = 0 16497 return true 16498 } 16499 return false 16500 } 16501 func rewriteValue386_Op386SHRBconst_0(v *Value) bool { 16502 // match: (SHRBconst x [0]) 16503 // result: x 16504 for { 16505 if v.AuxInt != 0 { 16506 break 16507 } 16508 x := v.Args[0] 16509 v.reset(OpCopy) 16510 v.Type = x.Type 16511 v.AddArg(x) 16512 return true 16513 } 16514 return false 16515 } 16516 func rewriteValue386_Op386SHRL_0(v *Value) bool { 16517 // match: (SHRL x (MOVLconst [c])) 16518 // result: (SHRLconst [c&31] x) 16519 for { 16520 _ = v.Args[1] 16521 x := v.Args[0] 16522 v_1 := v.Args[1] 16523 if v_1.Op != Op386MOVLconst { 16524 break 16525 } 16526 c := v_1.AuxInt 16527 v.reset(Op386SHRLconst) 16528 v.AuxInt = c & 31 16529 v.AddArg(x) 16530 return true 16531 } 16532 // match: (SHRL x (ANDLconst [31] y)) 16533 // result: (SHRL x y) 16534 for { 16535 _ = v.Args[1] 16536 x := v.Args[0] 16537 v_1 := v.Args[1] 16538 if v_1.Op != Op386ANDLconst || v_1.AuxInt != 31 { 16539 break 16540 } 16541 y := v_1.Args[0] 16542 v.reset(Op386SHRL) 16543 v.AddArg(x) 16544 v.AddArg(y) 16545 return true 16546 } 16547 return false 16548 } 16549 func rewriteValue386_Op386SHRLconst_0(v *Value) bool { 16550 // match: (SHRLconst x [0]) 16551 // result: x 16552 for { 16553 if v.AuxInt != 0 { 16554 break 16555 } 16556 x := v.Args[0] 16557 v.reset(OpCopy) 16558 v.Type = x.Type 16559 v.AddArg(x) 16560 return true 16561 } 16562 return false 16563 } 16564 func rewriteValue386_Op386SHRW_0(v *Value) bool { 16565 // match: (SHRW x (MOVLconst [c])) 16566 // cond: c&31 < 16 16567 // result: (SHRWconst [c&31] x) 16568 for { 16569 _ = v.Args[1] 16570 x := v.Args[0] 16571 v_1 := v.Args[1] 16572 if v_1.Op != Op386MOVLconst { 16573 break 16574 } 16575 c := v_1.AuxInt 16576 if !(c&31 < 16) { 16577 break 16578 } 16579 v.reset(Op386SHRWconst) 16580 v.AuxInt = c & 31 16581 v.AddArg(x) 16582 return true 16583 } 16584 // match: (SHRW _ (MOVLconst [c])) 16585 // cond: c&31 >= 16 16586 // result: (MOVLconst [0]) 16587 for { 16588 _ = v.Args[1] 16589 v_1 := v.Args[1] 16590 if v_1.Op != Op386MOVLconst { 16591 break 16592 } 16593 c := v_1.AuxInt 16594 if !(c&31 >= 16) { 16595 break 16596 } 16597 v.reset(Op386MOVLconst) 16598 v.AuxInt = 0 16599 return true 16600 } 16601 return false 16602 } 16603 func rewriteValue386_Op386SHRWconst_0(v *Value) bool { 16604 // match: (SHRWconst x [0]) 16605 // result: x 16606 for { 16607 if v.AuxInt != 0 { 16608 break 16609 } 16610 x := v.Args[0] 16611 v.reset(OpCopy) 16612 v.Type = x.Type 16613 v.AddArg(x) 16614 return true 16615 } 16616 return false 16617 } 16618 func rewriteValue386_Op386SUBL_0(v *Value) bool { 16619 b := v.Block 16620 // match: (SUBL x (MOVLconst [c])) 16621 // result: (SUBLconst x [c]) 16622 for { 16623 _ = v.Args[1] 16624 x := v.Args[0] 16625 v_1 := v.Args[1] 16626 if v_1.Op != Op386MOVLconst { 16627 break 16628 } 16629 c := v_1.AuxInt 16630 v.reset(Op386SUBLconst) 16631 v.AuxInt = c 16632 v.AddArg(x) 16633 return true 16634 } 16635 // match: (SUBL (MOVLconst [c]) x) 16636 // result: (NEGL (SUBLconst <v.Type> x [c])) 16637 for { 16638 x := v.Args[1] 16639 v_0 := v.Args[0] 16640 if v_0.Op != Op386MOVLconst { 16641 break 16642 } 16643 c := v_0.AuxInt 16644 v.reset(Op386NEGL) 16645 v0 := b.NewValue0(v.Pos, Op386SUBLconst, v.Type) 16646 v0.AuxInt = c 16647 v0.AddArg(x) 16648 v.AddArg(v0) 16649 return true 16650 } 16651 // match: (SUBL x l:(MOVLload [off] {sym} ptr mem)) 16652 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 16653 // result: (SUBLload x [off] {sym} ptr mem) 16654 for { 16655 _ = v.Args[1] 16656 x := v.Args[0] 16657 l := v.Args[1] 16658 if l.Op != Op386MOVLload { 16659 break 16660 } 16661 off := l.AuxInt 16662 sym := l.Aux 16663 mem := l.Args[1] 16664 ptr := l.Args[0] 16665 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 16666 break 16667 } 16668 v.reset(Op386SUBLload) 16669 v.AuxInt = off 16670 v.Aux = sym 16671 v.AddArg(x) 16672 v.AddArg(ptr) 16673 v.AddArg(mem) 16674 return true 16675 } 16676 // match: (SUBL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 16677 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 16678 // result: (SUBLloadidx4 x [off] {sym} ptr idx mem) 16679 for { 16680 _ = v.Args[1] 16681 x := v.Args[0] 16682 l := v.Args[1] 16683 if l.Op != Op386MOVLloadidx4 { 16684 break 16685 } 16686 off := l.AuxInt 16687 sym := l.Aux 16688 mem := l.Args[2] 16689 ptr := l.Args[0] 16690 idx := l.Args[1] 16691 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 16692 break 16693 } 16694 v.reset(Op386SUBLloadidx4) 16695 v.AuxInt = off 16696 v.Aux = sym 16697 v.AddArg(x) 16698 v.AddArg(ptr) 16699 v.AddArg(idx) 16700 v.AddArg(mem) 16701 return true 16702 } 16703 // match: (SUBL x x) 16704 // result: (MOVLconst [0]) 16705 for { 16706 x := v.Args[1] 16707 if x != v.Args[0] { 16708 break 16709 } 16710 v.reset(Op386MOVLconst) 16711 v.AuxInt = 0 16712 return true 16713 } 16714 return false 16715 } 16716 func rewriteValue386_Op386SUBLcarry_0(v *Value) bool { 16717 // match: (SUBLcarry x (MOVLconst [c])) 16718 // result: (SUBLconstcarry [c] x) 16719 for { 16720 _ = v.Args[1] 16721 x := v.Args[0] 16722 v_1 := v.Args[1] 16723 if v_1.Op != Op386MOVLconst { 16724 break 16725 } 16726 c := v_1.AuxInt 16727 v.reset(Op386SUBLconstcarry) 16728 v.AuxInt = c 16729 v.AddArg(x) 16730 return true 16731 } 16732 return false 16733 } 16734 func rewriteValue386_Op386SUBLconst_0(v *Value) bool { 16735 // match: (SUBLconst [c] x) 16736 // cond: int32(c) == 0 16737 // result: x 16738 for { 16739 c := v.AuxInt 16740 x := v.Args[0] 16741 if !(int32(c) == 0) { 16742 break 16743 } 16744 v.reset(OpCopy) 16745 v.Type = x.Type 16746 v.AddArg(x) 16747 return true 16748 } 16749 // match: (SUBLconst [c] x) 16750 // result: (ADDLconst [int64(int32(-c))] x) 16751 for { 16752 c := v.AuxInt 16753 x := v.Args[0] 16754 v.reset(Op386ADDLconst) 16755 v.AuxInt = int64(int32(-c)) 16756 v.AddArg(x) 16757 return true 16758 } 16759 } 16760 func rewriteValue386_Op386SUBLload_0(v *Value) bool { 16761 b := v.Block 16762 config := b.Func.Config 16763 // match: (SUBLload [off1] {sym} val (ADDLconst [off2] base) mem) 16764 // cond: is32Bit(off1+off2) 16765 // result: (SUBLload [off1+off2] {sym} val base mem) 16766 for { 16767 off1 := v.AuxInt 16768 sym := v.Aux 16769 mem := v.Args[2] 16770 val := v.Args[0] 16771 v_1 := v.Args[1] 16772 if v_1.Op != Op386ADDLconst { 16773 break 16774 } 16775 off2 := v_1.AuxInt 16776 base := v_1.Args[0] 16777 if !(is32Bit(off1 + off2)) { 16778 break 16779 } 16780 v.reset(Op386SUBLload) 16781 v.AuxInt = off1 + off2 16782 v.Aux = sym 16783 v.AddArg(val) 16784 v.AddArg(base) 16785 v.AddArg(mem) 16786 return true 16787 } 16788 // match: (SUBLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 16789 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 16790 // result: (SUBLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 16791 for { 16792 off1 := v.AuxInt 16793 sym1 := v.Aux 16794 mem := v.Args[2] 16795 val := v.Args[0] 16796 v_1 := v.Args[1] 16797 if v_1.Op != Op386LEAL { 16798 break 16799 } 16800 off2 := v_1.AuxInt 16801 sym2 := v_1.Aux 16802 base := v_1.Args[0] 16803 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 16804 break 16805 } 16806 v.reset(Op386SUBLload) 16807 v.AuxInt = off1 + off2 16808 v.Aux = mergeSym(sym1, sym2) 16809 v.AddArg(val) 16810 v.AddArg(base) 16811 v.AddArg(mem) 16812 return true 16813 } 16814 // match: (SUBLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 16815 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 16816 // result: (SUBLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 16817 for { 16818 off1 := v.AuxInt 16819 sym1 := v.Aux 16820 mem := v.Args[2] 16821 val := v.Args[0] 16822 v_1 := v.Args[1] 16823 if v_1.Op != Op386LEAL4 { 16824 break 16825 } 16826 off2 := v_1.AuxInt 16827 sym2 := v_1.Aux 16828 idx := v_1.Args[1] 16829 ptr := v_1.Args[0] 16830 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 16831 break 16832 } 16833 v.reset(Op386SUBLloadidx4) 16834 v.AuxInt = off1 + off2 16835 v.Aux = mergeSym(sym1, sym2) 16836 v.AddArg(val) 16837 v.AddArg(ptr) 16838 v.AddArg(idx) 16839 v.AddArg(mem) 16840 return true 16841 } 16842 return false 16843 } 16844 func rewriteValue386_Op386SUBLloadidx4_0(v *Value) bool { 16845 b := v.Block 16846 config := b.Func.Config 16847 // match: (SUBLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 16848 // cond: is32Bit(off1+off2) 16849 // result: (SUBLloadidx4 [off1+off2] {sym} val base idx mem) 16850 for { 16851 off1 := v.AuxInt 16852 sym := v.Aux 16853 mem := v.Args[3] 16854 val := v.Args[0] 16855 v_1 := v.Args[1] 16856 if v_1.Op != Op386ADDLconst { 16857 break 16858 } 16859 off2 := v_1.AuxInt 16860 base := v_1.Args[0] 16861 idx := v.Args[2] 16862 if !(is32Bit(off1 + off2)) { 16863 break 16864 } 16865 v.reset(Op386SUBLloadidx4) 16866 v.AuxInt = off1 + off2 16867 v.Aux = sym 16868 v.AddArg(val) 16869 v.AddArg(base) 16870 v.AddArg(idx) 16871 v.AddArg(mem) 16872 return true 16873 } 16874 // match: (SUBLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 16875 // cond: is32Bit(off1+off2*4) 16876 // result: (SUBLloadidx4 [off1+off2*4] {sym} val base idx mem) 16877 for { 16878 off1 := v.AuxInt 16879 sym := v.Aux 16880 mem := v.Args[3] 16881 val := v.Args[0] 16882 base := v.Args[1] 16883 v_2 := v.Args[2] 16884 if v_2.Op != Op386ADDLconst { 16885 break 16886 } 16887 off2 := v_2.AuxInt 16888 idx := v_2.Args[0] 16889 if !(is32Bit(off1 + off2*4)) { 16890 break 16891 } 16892 v.reset(Op386SUBLloadidx4) 16893 v.AuxInt = off1 + off2*4 16894 v.Aux = sym 16895 v.AddArg(val) 16896 v.AddArg(base) 16897 v.AddArg(idx) 16898 v.AddArg(mem) 16899 return true 16900 } 16901 // match: (SUBLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 16902 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 16903 // result: (SUBLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 16904 for { 16905 off1 := v.AuxInt 16906 sym1 := v.Aux 16907 mem := v.Args[3] 16908 val := v.Args[0] 16909 v_1 := v.Args[1] 16910 if v_1.Op != Op386LEAL { 16911 break 16912 } 16913 off2 := v_1.AuxInt 16914 sym2 := v_1.Aux 16915 base := v_1.Args[0] 16916 idx := v.Args[2] 16917 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 16918 break 16919 } 16920 v.reset(Op386SUBLloadidx4) 16921 v.AuxInt = off1 + off2 16922 v.Aux = mergeSym(sym1, sym2) 16923 v.AddArg(val) 16924 v.AddArg(base) 16925 v.AddArg(idx) 16926 v.AddArg(mem) 16927 return true 16928 } 16929 return false 16930 } 16931 func rewriteValue386_Op386SUBLmodify_0(v *Value) bool { 16932 b := v.Block 16933 config := b.Func.Config 16934 // match: (SUBLmodify [off1] {sym} (ADDLconst [off2] base) val mem) 16935 // cond: is32Bit(off1+off2) 16936 // result: (SUBLmodify [off1+off2] {sym} base val mem) 16937 for { 16938 off1 := v.AuxInt 16939 sym := v.Aux 16940 mem := v.Args[2] 16941 v_0 := v.Args[0] 16942 if v_0.Op != Op386ADDLconst { 16943 break 16944 } 16945 off2 := v_0.AuxInt 16946 base := v_0.Args[0] 16947 val := v.Args[1] 16948 if !(is32Bit(off1 + off2)) { 16949 break 16950 } 16951 v.reset(Op386SUBLmodify) 16952 v.AuxInt = off1 + off2 16953 v.Aux = sym 16954 v.AddArg(base) 16955 v.AddArg(val) 16956 v.AddArg(mem) 16957 return true 16958 } 16959 // match: (SUBLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 16960 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 16961 // result: (SUBLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) 16962 for { 16963 off1 := v.AuxInt 16964 sym1 := v.Aux 16965 mem := v.Args[2] 16966 v_0 := v.Args[0] 16967 if v_0.Op != Op386LEAL { 16968 break 16969 } 16970 off2 := v_0.AuxInt 16971 sym2 := v_0.Aux 16972 base := v_0.Args[0] 16973 val := v.Args[1] 16974 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 16975 break 16976 } 16977 v.reset(Op386SUBLmodify) 16978 v.AuxInt = off1 + off2 16979 v.Aux = mergeSym(sym1, sym2) 16980 v.AddArg(base) 16981 v.AddArg(val) 16982 v.AddArg(mem) 16983 return true 16984 } 16985 return false 16986 } 16987 func rewriteValue386_Op386SUBLmodifyidx4_0(v *Value) bool { 16988 b := v.Block 16989 config := b.Func.Config 16990 // match: (SUBLmodifyidx4 [off1] {sym} (ADDLconst [off2] base) idx val mem) 16991 // cond: is32Bit(off1+off2) 16992 // result: (SUBLmodifyidx4 [off1+off2] {sym} base idx val mem) 16993 for { 16994 off1 := v.AuxInt 16995 sym := v.Aux 16996 mem := v.Args[3] 16997 v_0 := v.Args[0] 16998 if v_0.Op != Op386ADDLconst { 16999 break 17000 } 17001 off2 := v_0.AuxInt 17002 base := v_0.Args[0] 17003 idx := v.Args[1] 17004 val := v.Args[2] 17005 if !(is32Bit(off1 + off2)) { 17006 break 17007 } 17008 v.reset(Op386SUBLmodifyidx4) 17009 v.AuxInt = off1 + off2 17010 v.Aux = sym 17011 v.AddArg(base) 17012 v.AddArg(idx) 17013 v.AddArg(val) 17014 v.AddArg(mem) 17015 return true 17016 } 17017 // match: (SUBLmodifyidx4 [off1] {sym} base (ADDLconst [off2] idx) val mem) 17018 // cond: is32Bit(off1+off2*4) 17019 // result: (SUBLmodifyidx4 [off1+off2*4] {sym} base idx val mem) 17020 for { 17021 off1 := v.AuxInt 17022 sym := v.Aux 17023 mem := v.Args[3] 17024 base := v.Args[0] 17025 v_1 := v.Args[1] 17026 if v_1.Op != Op386ADDLconst { 17027 break 17028 } 17029 off2 := v_1.AuxInt 17030 idx := v_1.Args[0] 17031 val := v.Args[2] 17032 if !(is32Bit(off1 + off2*4)) { 17033 break 17034 } 17035 v.reset(Op386SUBLmodifyidx4) 17036 v.AuxInt = off1 + off2*4 17037 v.Aux = sym 17038 v.AddArg(base) 17039 v.AddArg(idx) 17040 v.AddArg(val) 17041 v.AddArg(mem) 17042 return true 17043 } 17044 // match: (SUBLmodifyidx4 [off1] {sym1} (LEAL [off2] {sym2} base) idx val mem) 17045 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17046 // result: (SUBLmodifyidx4 [off1+off2] {mergeSym(sym1,sym2)} base idx val mem) 17047 for { 17048 off1 := v.AuxInt 17049 sym1 := v.Aux 17050 mem := v.Args[3] 17051 v_0 := v.Args[0] 17052 if v_0.Op != Op386LEAL { 17053 break 17054 } 17055 off2 := v_0.AuxInt 17056 sym2 := v_0.Aux 17057 base := v_0.Args[0] 17058 idx := v.Args[1] 17059 val := v.Args[2] 17060 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17061 break 17062 } 17063 v.reset(Op386SUBLmodifyidx4) 17064 v.AuxInt = off1 + off2 17065 v.Aux = mergeSym(sym1, sym2) 17066 v.AddArg(base) 17067 v.AddArg(idx) 17068 v.AddArg(val) 17069 v.AddArg(mem) 17070 return true 17071 } 17072 // match: (SUBLmodifyidx4 [off] {sym} ptr idx (MOVLconst [c]) mem) 17073 // cond: validValAndOff(-c,off) 17074 // result: (ADDLconstmodifyidx4 [makeValAndOff(-c,off)] {sym} ptr idx mem) 17075 for { 17076 off := v.AuxInt 17077 sym := v.Aux 17078 mem := v.Args[3] 17079 ptr := v.Args[0] 17080 idx := v.Args[1] 17081 v_2 := v.Args[2] 17082 if v_2.Op != Op386MOVLconst { 17083 break 17084 } 17085 c := v_2.AuxInt 17086 if !(validValAndOff(-c, off)) { 17087 break 17088 } 17089 v.reset(Op386ADDLconstmodifyidx4) 17090 v.AuxInt = makeValAndOff(-c, off) 17091 v.Aux = sym 17092 v.AddArg(ptr) 17093 v.AddArg(idx) 17094 v.AddArg(mem) 17095 return true 17096 } 17097 return false 17098 } 17099 func rewriteValue386_Op386SUBSD_0(v *Value) bool { 17100 b := v.Block 17101 config := b.Func.Config 17102 // match: (SUBSD x l:(MOVSDload [off] {sym} ptr mem)) 17103 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 17104 // result: (SUBSDload x [off] {sym} ptr mem) 17105 for { 17106 _ = v.Args[1] 17107 x := v.Args[0] 17108 l := v.Args[1] 17109 if l.Op != Op386MOVSDload { 17110 break 17111 } 17112 off := l.AuxInt 17113 sym := l.Aux 17114 mem := l.Args[1] 17115 ptr := l.Args[0] 17116 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 17117 break 17118 } 17119 v.reset(Op386SUBSDload) 17120 v.AuxInt = off 17121 v.Aux = sym 17122 v.AddArg(x) 17123 v.AddArg(ptr) 17124 v.AddArg(mem) 17125 return true 17126 } 17127 return false 17128 } 17129 func rewriteValue386_Op386SUBSDload_0(v *Value) bool { 17130 b := v.Block 17131 config := b.Func.Config 17132 // match: (SUBSDload [off1] {sym} val (ADDLconst [off2] base) mem) 17133 // cond: is32Bit(off1+off2) 17134 // result: (SUBSDload [off1+off2] {sym} val base mem) 17135 for { 17136 off1 := v.AuxInt 17137 sym := v.Aux 17138 mem := v.Args[2] 17139 val := v.Args[0] 17140 v_1 := v.Args[1] 17141 if v_1.Op != Op386ADDLconst { 17142 break 17143 } 17144 off2 := v_1.AuxInt 17145 base := v_1.Args[0] 17146 if !(is32Bit(off1 + off2)) { 17147 break 17148 } 17149 v.reset(Op386SUBSDload) 17150 v.AuxInt = off1 + off2 17151 v.Aux = sym 17152 v.AddArg(val) 17153 v.AddArg(base) 17154 v.AddArg(mem) 17155 return true 17156 } 17157 // match: (SUBSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 17158 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17159 // result: (SUBSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 17160 for { 17161 off1 := v.AuxInt 17162 sym1 := v.Aux 17163 mem := v.Args[2] 17164 val := v.Args[0] 17165 v_1 := v.Args[1] 17166 if v_1.Op != Op386LEAL { 17167 break 17168 } 17169 off2 := v_1.AuxInt 17170 sym2 := v_1.Aux 17171 base := v_1.Args[0] 17172 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17173 break 17174 } 17175 v.reset(Op386SUBSDload) 17176 v.AuxInt = off1 + off2 17177 v.Aux = mergeSym(sym1, sym2) 17178 v.AddArg(val) 17179 v.AddArg(base) 17180 v.AddArg(mem) 17181 return true 17182 } 17183 return false 17184 } 17185 func rewriteValue386_Op386SUBSS_0(v *Value) bool { 17186 b := v.Block 17187 config := b.Func.Config 17188 // match: (SUBSS x l:(MOVSSload [off] {sym} ptr mem)) 17189 // cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l) 17190 // result: (SUBSSload x [off] {sym} ptr mem) 17191 for { 17192 _ = v.Args[1] 17193 x := v.Args[0] 17194 l := v.Args[1] 17195 if l.Op != Op386MOVSSload { 17196 break 17197 } 17198 off := l.AuxInt 17199 sym := l.Aux 17200 mem := l.Args[1] 17201 ptr := l.Args[0] 17202 if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) { 17203 break 17204 } 17205 v.reset(Op386SUBSSload) 17206 v.AuxInt = off 17207 v.Aux = sym 17208 v.AddArg(x) 17209 v.AddArg(ptr) 17210 v.AddArg(mem) 17211 return true 17212 } 17213 return false 17214 } 17215 func rewriteValue386_Op386SUBSSload_0(v *Value) bool { 17216 b := v.Block 17217 config := b.Func.Config 17218 // match: (SUBSSload [off1] {sym} val (ADDLconst [off2] base) mem) 17219 // cond: is32Bit(off1+off2) 17220 // result: (SUBSSload [off1+off2] {sym} val base mem) 17221 for { 17222 off1 := v.AuxInt 17223 sym := v.Aux 17224 mem := v.Args[2] 17225 val := v.Args[0] 17226 v_1 := v.Args[1] 17227 if v_1.Op != Op386ADDLconst { 17228 break 17229 } 17230 off2 := v_1.AuxInt 17231 base := v_1.Args[0] 17232 if !(is32Bit(off1 + off2)) { 17233 break 17234 } 17235 v.reset(Op386SUBSSload) 17236 v.AuxInt = off1 + off2 17237 v.Aux = sym 17238 v.AddArg(val) 17239 v.AddArg(base) 17240 v.AddArg(mem) 17241 return true 17242 } 17243 // match: (SUBSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 17244 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17245 // result: (SUBSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 17246 for { 17247 off1 := v.AuxInt 17248 sym1 := v.Aux 17249 mem := v.Args[2] 17250 val := v.Args[0] 17251 v_1 := v.Args[1] 17252 if v_1.Op != Op386LEAL { 17253 break 17254 } 17255 off2 := v_1.AuxInt 17256 sym2 := v_1.Aux 17257 base := v_1.Args[0] 17258 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17259 break 17260 } 17261 v.reset(Op386SUBSSload) 17262 v.AuxInt = off1 + off2 17263 v.Aux = mergeSym(sym1, sym2) 17264 v.AddArg(val) 17265 v.AddArg(base) 17266 v.AddArg(mem) 17267 return true 17268 } 17269 return false 17270 } 17271 func rewriteValue386_Op386XORL_0(v *Value) bool { 17272 // match: (XORL x (MOVLconst [c])) 17273 // result: (XORLconst [c] x) 17274 for { 17275 _ = v.Args[1] 17276 x := v.Args[0] 17277 v_1 := v.Args[1] 17278 if v_1.Op != Op386MOVLconst { 17279 break 17280 } 17281 c := v_1.AuxInt 17282 v.reset(Op386XORLconst) 17283 v.AuxInt = c 17284 v.AddArg(x) 17285 return true 17286 } 17287 // match: (XORL (MOVLconst [c]) x) 17288 // result: (XORLconst [c] x) 17289 for { 17290 x := v.Args[1] 17291 v_0 := v.Args[0] 17292 if v_0.Op != Op386MOVLconst { 17293 break 17294 } 17295 c := v_0.AuxInt 17296 v.reset(Op386XORLconst) 17297 v.AuxInt = c 17298 v.AddArg(x) 17299 return true 17300 } 17301 // match: (XORL (SHLLconst [c] x) (SHRLconst [d] x)) 17302 // cond: d == 32-c 17303 // result: (ROLLconst [c] x) 17304 for { 17305 _ = v.Args[1] 17306 v_0 := v.Args[0] 17307 if v_0.Op != Op386SHLLconst { 17308 break 17309 } 17310 c := v_0.AuxInt 17311 x := v_0.Args[0] 17312 v_1 := v.Args[1] 17313 if v_1.Op != Op386SHRLconst { 17314 break 17315 } 17316 d := v_1.AuxInt 17317 if x != v_1.Args[0] || !(d == 32-c) { 17318 break 17319 } 17320 v.reset(Op386ROLLconst) 17321 v.AuxInt = c 17322 v.AddArg(x) 17323 return true 17324 } 17325 // match: (XORL (SHRLconst [d] x) (SHLLconst [c] x)) 17326 // cond: d == 32-c 17327 // result: (ROLLconst [c] x) 17328 for { 17329 _ = v.Args[1] 17330 v_0 := v.Args[0] 17331 if v_0.Op != Op386SHRLconst { 17332 break 17333 } 17334 d := v_0.AuxInt 17335 x := v_0.Args[0] 17336 v_1 := v.Args[1] 17337 if v_1.Op != Op386SHLLconst { 17338 break 17339 } 17340 c := v_1.AuxInt 17341 if x != v_1.Args[0] || !(d == 32-c) { 17342 break 17343 } 17344 v.reset(Op386ROLLconst) 17345 v.AuxInt = c 17346 v.AddArg(x) 17347 return true 17348 } 17349 // match: (XORL <t> (SHLLconst x [c]) (SHRWconst x [d])) 17350 // cond: c < 16 && d == 16-c && t.Size() == 2 17351 // result: (ROLWconst x [c]) 17352 for { 17353 t := v.Type 17354 _ = v.Args[1] 17355 v_0 := v.Args[0] 17356 if v_0.Op != Op386SHLLconst { 17357 break 17358 } 17359 c := v_0.AuxInt 17360 x := v_0.Args[0] 17361 v_1 := v.Args[1] 17362 if v_1.Op != Op386SHRWconst { 17363 break 17364 } 17365 d := v_1.AuxInt 17366 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 17367 break 17368 } 17369 v.reset(Op386ROLWconst) 17370 v.AuxInt = c 17371 v.AddArg(x) 17372 return true 17373 } 17374 // match: (XORL <t> (SHRWconst x [d]) (SHLLconst x [c])) 17375 // cond: c < 16 && d == 16-c && t.Size() == 2 17376 // result: (ROLWconst x [c]) 17377 for { 17378 t := v.Type 17379 _ = v.Args[1] 17380 v_0 := v.Args[0] 17381 if v_0.Op != Op386SHRWconst { 17382 break 17383 } 17384 d := v_0.AuxInt 17385 x := v_0.Args[0] 17386 v_1 := v.Args[1] 17387 if v_1.Op != Op386SHLLconst { 17388 break 17389 } 17390 c := v_1.AuxInt 17391 if x != v_1.Args[0] || !(c < 16 && d == 16-c && t.Size() == 2) { 17392 break 17393 } 17394 v.reset(Op386ROLWconst) 17395 v.AuxInt = c 17396 v.AddArg(x) 17397 return true 17398 } 17399 // match: (XORL <t> (SHLLconst x [c]) (SHRBconst x [d])) 17400 // cond: c < 8 && d == 8-c && t.Size() == 1 17401 // result: (ROLBconst x [c]) 17402 for { 17403 t := v.Type 17404 _ = v.Args[1] 17405 v_0 := v.Args[0] 17406 if v_0.Op != Op386SHLLconst { 17407 break 17408 } 17409 c := v_0.AuxInt 17410 x := v_0.Args[0] 17411 v_1 := v.Args[1] 17412 if v_1.Op != Op386SHRBconst { 17413 break 17414 } 17415 d := v_1.AuxInt 17416 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 17417 break 17418 } 17419 v.reset(Op386ROLBconst) 17420 v.AuxInt = c 17421 v.AddArg(x) 17422 return true 17423 } 17424 // match: (XORL <t> (SHRBconst x [d]) (SHLLconst x [c])) 17425 // cond: c < 8 && d == 8-c && t.Size() == 1 17426 // result: (ROLBconst x [c]) 17427 for { 17428 t := v.Type 17429 _ = v.Args[1] 17430 v_0 := v.Args[0] 17431 if v_0.Op != Op386SHRBconst { 17432 break 17433 } 17434 d := v_0.AuxInt 17435 x := v_0.Args[0] 17436 v_1 := v.Args[1] 17437 if v_1.Op != Op386SHLLconst { 17438 break 17439 } 17440 c := v_1.AuxInt 17441 if x != v_1.Args[0] || !(c < 8 && d == 8-c && t.Size() == 1) { 17442 break 17443 } 17444 v.reset(Op386ROLBconst) 17445 v.AuxInt = c 17446 v.AddArg(x) 17447 return true 17448 } 17449 // match: (XORL x l:(MOVLload [off] {sym} ptr mem)) 17450 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 17451 // result: (XORLload x [off] {sym} ptr mem) 17452 for { 17453 _ = v.Args[1] 17454 x := v.Args[0] 17455 l := v.Args[1] 17456 if l.Op != Op386MOVLload { 17457 break 17458 } 17459 off := l.AuxInt 17460 sym := l.Aux 17461 mem := l.Args[1] 17462 ptr := l.Args[0] 17463 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 17464 break 17465 } 17466 v.reset(Op386XORLload) 17467 v.AuxInt = off 17468 v.Aux = sym 17469 v.AddArg(x) 17470 v.AddArg(ptr) 17471 v.AddArg(mem) 17472 return true 17473 } 17474 // match: (XORL l:(MOVLload [off] {sym} ptr mem) x) 17475 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 17476 // result: (XORLload x [off] {sym} ptr mem) 17477 for { 17478 x := v.Args[1] 17479 l := v.Args[0] 17480 if l.Op != Op386MOVLload { 17481 break 17482 } 17483 off := l.AuxInt 17484 sym := l.Aux 17485 mem := l.Args[1] 17486 ptr := l.Args[0] 17487 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 17488 break 17489 } 17490 v.reset(Op386XORLload) 17491 v.AuxInt = off 17492 v.Aux = sym 17493 v.AddArg(x) 17494 v.AddArg(ptr) 17495 v.AddArg(mem) 17496 return true 17497 } 17498 return false 17499 } 17500 func rewriteValue386_Op386XORL_10(v *Value) bool { 17501 // match: (XORL x l:(MOVLloadidx4 [off] {sym} ptr idx mem)) 17502 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 17503 // result: (XORLloadidx4 x [off] {sym} ptr idx mem) 17504 for { 17505 _ = v.Args[1] 17506 x := v.Args[0] 17507 l := v.Args[1] 17508 if l.Op != Op386MOVLloadidx4 { 17509 break 17510 } 17511 off := l.AuxInt 17512 sym := l.Aux 17513 mem := l.Args[2] 17514 ptr := l.Args[0] 17515 idx := l.Args[1] 17516 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 17517 break 17518 } 17519 v.reset(Op386XORLloadidx4) 17520 v.AuxInt = off 17521 v.Aux = sym 17522 v.AddArg(x) 17523 v.AddArg(ptr) 17524 v.AddArg(idx) 17525 v.AddArg(mem) 17526 return true 17527 } 17528 // match: (XORL l:(MOVLloadidx4 [off] {sym} ptr idx mem) x) 17529 // cond: canMergeLoadClobber(v, l, x) && clobber(l) 17530 // result: (XORLloadidx4 x [off] {sym} ptr idx mem) 17531 for { 17532 x := v.Args[1] 17533 l := v.Args[0] 17534 if l.Op != Op386MOVLloadidx4 { 17535 break 17536 } 17537 off := l.AuxInt 17538 sym := l.Aux 17539 mem := l.Args[2] 17540 ptr := l.Args[0] 17541 idx := l.Args[1] 17542 if !(canMergeLoadClobber(v, l, x) && clobber(l)) { 17543 break 17544 } 17545 v.reset(Op386XORLloadidx4) 17546 v.AuxInt = off 17547 v.Aux = sym 17548 v.AddArg(x) 17549 v.AddArg(ptr) 17550 v.AddArg(idx) 17551 v.AddArg(mem) 17552 return true 17553 } 17554 // match: (XORL x x) 17555 // result: (MOVLconst [0]) 17556 for { 17557 x := v.Args[1] 17558 if x != v.Args[0] { 17559 break 17560 } 17561 v.reset(Op386MOVLconst) 17562 v.AuxInt = 0 17563 return true 17564 } 17565 return false 17566 } 17567 func rewriteValue386_Op386XORLconst_0(v *Value) bool { 17568 // match: (XORLconst [c] (XORLconst [d] x)) 17569 // result: (XORLconst [c ^ d] x) 17570 for { 17571 c := v.AuxInt 17572 v_0 := v.Args[0] 17573 if v_0.Op != Op386XORLconst { 17574 break 17575 } 17576 d := v_0.AuxInt 17577 x := v_0.Args[0] 17578 v.reset(Op386XORLconst) 17579 v.AuxInt = c ^ d 17580 v.AddArg(x) 17581 return true 17582 } 17583 // match: (XORLconst [c] x) 17584 // cond: int32(c)==0 17585 // result: x 17586 for { 17587 c := v.AuxInt 17588 x := v.Args[0] 17589 if !(int32(c) == 0) { 17590 break 17591 } 17592 v.reset(OpCopy) 17593 v.Type = x.Type 17594 v.AddArg(x) 17595 return true 17596 } 17597 // match: (XORLconst [c] (MOVLconst [d])) 17598 // result: (MOVLconst [c^d]) 17599 for { 17600 c := v.AuxInt 17601 v_0 := v.Args[0] 17602 if v_0.Op != Op386MOVLconst { 17603 break 17604 } 17605 d := v_0.AuxInt 17606 v.reset(Op386MOVLconst) 17607 v.AuxInt = c ^ d 17608 return true 17609 } 17610 return false 17611 } 17612 func rewriteValue386_Op386XORLconstmodify_0(v *Value) bool { 17613 b := v.Block 17614 config := b.Func.Config 17615 // match: (XORLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) 17616 // cond: ValAndOff(valoff1).canAdd(off2) 17617 // result: (XORLconstmodify [ValAndOff(valoff1).add(off2)] {sym} base mem) 17618 for { 17619 valoff1 := v.AuxInt 17620 sym := v.Aux 17621 mem := v.Args[1] 17622 v_0 := v.Args[0] 17623 if v_0.Op != Op386ADDLconst { 17624 break 17625 } 17626 off2 := v_0.AuxInt 17627 base := v_0.Args[0] 17628 if !(ValAndOff(valoff1).canAdd(off2)) { 17629 break 17630 } 17631 v.reset(Op386XORLconstmodify) 17632 v.AuxInt = ValAndOff(valoff1).add(off2) 17633 v.Aux = sym 17634 v.AddArg(base) 17635 v.AddArg(mem) 17636 return true 17637 } 17638 // match: (XORLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) 17639 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17640 // result: (XORLconstmodify [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base mem) 17641 for { 17642 valoff1 := v.AuxInt 17643 sym1 := v.Aux 17644 mem := v.Args[1] 17645 v_0 := v.Args[0] 17646 if v_0.Op != Op386LEAL { 17647 break 17648 } 17649 off2 := v_0.AuxInt 17650 sym2 := v_0.Aux 17651 base := v_0.Args[0] 17652 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17653 break 17654 } 17655 v.reset(Op386XORLconstmodify) 17656 v.AuxInt = ValAndOff(valoff1).add(off2) 17657 v.Aux = mergeSym(sym1, sym2) 17658 v.AddArg(base) 17659 v.AddArg(mem) 17660 return true 17661 } 17662 return false 17663 } 17664 func rewriteValue386_Op386XORLconstmodifyidx4_0(v *Value) bool { 17665 b := v.Block 17666 config := b.Func.Config 17667 // match: (XORLconstmodifyidx4 [valoff1] {sym} (ADDLconst [off2] base) idx mem) 17668 // cond: ValAndOff(valoff1).canAdd(off2) 17669 // result: (XORLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {sym} base idx mem) 17670 for { 17671 valoff1 := v.AuxInt 17672 sym := v.Aux 17673 mem := v.Args[2] 17674 v_0 := v.Args[0] 17675 if v_0.Op != Op386ADDLconst { 17676 break 17677 } 17678 off2 := v_0.AuxInt 17679 base := v_0.Args[0] 17680 idx := v.Args[1] 17681 if !(ValAndOff(valoff1).canAdd(off2)) { 17682 break 17683 } 17684 v.reset(Op386XORLconstmodifyidx4) 17685 v.AuxInt = ValAndOff(valoff1).add(off2) 17686 v.Aux = sym 17687 v.AddArg(base) 17688 v.AddArg(idx) 17689 v.AddArg(mem) 17690 return true 17691 } 17692 // match: (XORLconstmodifyidx4 [valoff1] {sym} base (ADDLconst [off2] idx) mem) 17693 // cond: ValAndOff(valoff1).canAdd(off2*4) 17694 // result: (XORLconstmodifyidx4 [ValAndOff(valoff1).add(off2*4)] {sym} base idx mem) 17695 for { 17696 valoff1 := v.AuxInt 17697 sym := v.Aux 17698 mem := v.Args[2] 17699 base := v.Args[0] 17700 v_1 := v.Args[1] 17701 if v_1.Op != Op386ADDLconst { 17702 break 17703 } 17704 off2 := v_1.AuxInt 17705 idx := v_1.Args[0] 17706 if !(ValAndOff(valoff1).canAdd(off2 * 4)) { 17707 break 17708 } 17709 v.reset(Op386XORLconstmodifyidx4) 17710 v.AuxInt = ValAndOff(valoff1).add(off2 * 4) 17711 v.Aux = sym 17712 v.AddArg(base) 17713 v.AddArg(idx) 17714 v.AddArg(mem) 17715 return true 17716 } 17717 // match: (XORLconstmodifyidx4 [valoff1] {sym1} (LEAL [off2] {sym2} base) idx mem) 17718 // cond: ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17719 // result: (XORLconstmodifyidx4 [ValAndOff(valoff1).add(off2)] {mergeSym(sym1,sym2)} base idx mem) 17720 for { 17721 valoff1 := v.AuxInt 17722 sym1 := v.Aux 17723 mem := v.Args[2] 17724 v_0 := v.Args[0] 17725 if v_0.Op != Op386LEAL { 17726 break 17727 } 17728 off2 := v_0.AuxInt 17729 sym2 := v_0.Aux 17730 base := v_0.Args[0] 17731 idx := v.Args[1] 17732 if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17733 break 17734 } 17735 v.reset(Op386XORLconstmodifyidx4) 17736 v.AuxInt = ValAndOff(valoff1).add(off2) 17737 v.Aux = mergeSym(sym1, sym2) 17738 v.AddArg(base) 17739 v.AddArg(idx) 17740 v.AddArg(mem) 17741 return true 17742 } 17743 return false 17744 } 17745 func rewriteValue386_Op386XORLload_0(v *Value) bool { 17746 b := v.Block 17747 config := b.Func.Config 17748 // match: (XORLload [off1] {sym} val (ADDLconst [off2] base) mem) 17749 // cond: is32Bit(off1+off2) 17750 // result: (XORLload [off1+off2] {sym} val base mem) 17751 for { 17752 off1 := v.AuxInt 17753 sym := v.Aux 17754 mem := v.Args[2] 17755 val := v.Args[0] 17756 v_1 := v.Args[1] 17757 if v_1.Op != Op386ADDLconst { 17758 break 17759 } 17760 off2 := v_1.AuxInt 17761 base := v_1.Args[0] 17762 if !(is32Bit(off1 + off2)) { 17763 break 17764 } 17765 v.reset(Op386XORLload) 17766 v.AuxInt = off1 + off2 17767 v.Aux = sym 17768 v.AddArg(val) 17769 v.AddArg(base) 17770 v.AddArg(mem) 17771 return true 17772 } 17773 // match: (XORLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) 17774 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17775 // result: (XORLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) 17776 for { 17777 off1 := v.AuxInt 17778 sym1 := v.Aux 17779 mem := v.Args[2] 17780 val := v.Args[0] 17781 v_1 := v.Args[1] 17782 if v_1.Op != Op386LEAL { 17783 break 17784 } 17785 off2 := v_1.AuxInt 17786 sym2 := v_1.Aux 17787 base := v_1.Args[0] 17788 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17789 break 17790 } 17791 v.reset(Op386XORLload) 17792 v.AuxInt = off1 + off2 17793 v.Aux = mergeSym(sym1, sym2) 17794 v.AddArg(val) 17795 v.AddArg(base) 17796 v.AddArg(mem) 17797 return true 17798 } 17799 // match: (XORLload [off1] {sym1} val (LEAL4 [off2] {sym2} ptr idx) mem) 17800 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 17801 // result: (XORLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val ptr idx mem) 17802 for { 17803 off1 := v.AuxInt 17804 sym1 := v.Aux 17805 mem := v.Args[2] 17806 val := v.Args[0] 17807 v_1 := v.Args[1] 17808 if v_1.Op != Op386LEAL4 { 17809 break 17810 } 17811 off2 := v_1.AuxInt 17812 sym2 := v_1.Aux 17813 idx := v_1.Args[1] 17814 ptr := v_1.Args[0] 17815 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 17816 break 17817 } 17818 v.reset(Op386XORLloadidx4) 17819 v.AuxInt = off1 + off2 17820 v.Aux = mergeSym(sym1, sym2) 17821 v.AddArg(val) 17822 v.AddArg(ptr) 17823 v.AddArg(idx) 17824 v.AddArg(mem) 17825 return true 17826 } 17827 return false 17828 } 17829 func rewriteValue386_Op386XORLloadidx4_0(v *Value) bool { 17830 b := v.Block 17831 config := b.Func.Config 17832 // match: (XORLloadidx4 [off1] {sym} val (ADDLconst [off2] base) idx mem) 17833 // cond: is32Bit(off1+off2) 17834 // result: (XORLloadidx4 [off1+off2] {sym} val base idx mem) 17835 for { 17836 off1 := v.AuxInt 17837 sym := v.Aux 17838 mem := v.Args[3] 17839 val := v.Args[0] 17840 v_1 := v.Args[1] 17841 if v_1.Op != Op386ADDLconst { 17842 break 17843 } 17844 off2 := v_1.AuxInt 17845 base := v_1.Args[0] 17846 idx := v.Args[2] 17847 if !(is32Bit(off1 + off2)) { 17848 break 17849 } 17850 v.reset(Op386XORLloadidx4) 17851 v.AuxInt = off1 + off2 17852 v.Aux = sym 17853 v.AddArg(val) 17854 v.AddArg(base) 17855 v.AddArg(idx) 17856 v.AddArg(mem) 17857 return true 17858 } 17859 // match: (XORLloadidx4 [off1] {sym} val base (ADDLconst [off2] idx) mem) 17860 // cond: is32Bit(off1+off2*4) 17861 // result: (XORLloadidx4 [off1+off2*4] {sym} val base idx mem) 17862 for { 17863 off1 := v.AuxInt 17864 sym := v.Aux 17865 mem := v.Args[3] 17866 val := v.Args[0] 17867 base := v.Args[1] 17868 v_2 := v.Args[2] 17869 if v_2.Op != Op386ADDLconst { 17870 break 17871 } 17872 off2 := v_2.AuxInt 17873 idx := v_2.Args[0] 17874 if !(is32Bit(off1 + off2*4)) { 17875 break 17876 } 17877 v.reset(Op386XORLloadidx4) 17878 v.AuxInt = off1 + off2*4 17879 v.Aux = sym 17880 v.AddArg(val) 17881 v.AddArg(base) 17882 v.AddArg(idx) 17883 v.AddArg(mem) 17884 return true 17885 } 17886 // match: (XORLloadidx4 [off1] {sym1} val (LEAL [off2] {sym2} base) idx mem) 17887 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17888 // result: (XORLloadidx4 [off1+off2] {mergeSym(sym1,sym2)} val base idx mem) 17889 for { 17890 off1 := v.AuxInt 17891 sym1 := v.Aux 17892 mem := v.Args[3] 17893 val := v.Args[0] 17894 v_1 := v.Args[1] 17895 if v_1.Op != Op386LEAL { 17896 break 17897 } 17898 off2 := v_1.AuxInt 17899 sym2 := v_1.Aux 17900 base := v_1.Args[0] 17901 idx := v.Args[2] 17902 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17903 break 17904 } 17905 v.reset(Op386XORLloadidx4) 17906 v.AuxInt = off1 + off2 17907 v.Aux = mergeSym(sym1, sym2) 17908 v.AddArg(val) 17909 v.AddArg(base) 17910 v.AddArg(idx) 17911 v.AddArg(mem) 17912 return true 17913 } 17914 return false 17915 } 17916 func rewriteValue386_Op386XORLmodify_0(v *Value) bool { 17917 b := v.Block 17918 config := b.Func.Config 17919 // match: (XORLmodify [off1] {sym} (ADDLconst [off2] base) val mem) 17920 // cond: is32Bit(off1+off2) 17921 // result: (XORLmodify [off1+off2] {sym} base val mem) 17922 for { 17923 off1 := v.AuxInt 17924 sym := v.Aux 17925 mem := v.Args[2] 17926 v_0 := v.Args[0] 17927 if v_0.Op != Op386ADDLconst { 17928 break 17929 } 17930 off2 := v_0.AuxInt 17931 base := v_0.Args[0] 17932 val := v.Args[1] 17933 if !(is32Bit(off1 + off2)) { 17934 break 17935 } 17936 v.reset(Op386XORLmodify) 17937 v.AuxInt = off1 + off2 17938 v.Aux = sym 17939 v.AddArg(base) 17940 v.AddArg(val) 17941 v.AddArg(mem) 17942 return true 17943 } 17944 // match: (XORLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) 17945 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 17946 // result: (XORLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) 17947 for { 17948 off1 := v.AuxInt 17949 sym1 := v.Aux 17950 mem := v.Args[2] 17951 v_0 := v.Args[0] 17952 if v_0.Op != Op386LEAL { 17953 break 17954 } 17955 off2 := v_0.AuxInt 17956 sym2 := v_0.Aux 17957 base := v_0.Args[0] 17958 val := v.Args[1] 17959 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 17960 break 17961 } 17962 v.reset(Op386XORLmodify) 17963 v.AuxInt = off1 + off2 17964 v.Aux = mergeSym(sym1, sym2) 17965 v.AddArg(base) 17966 v.AddArg(val) 17967 v.AddArg(mem) 17968 return true 17969 } 17970 return false 17971 } 17972 func rewriteValue386_Op386XORLmodifyidx4_0(v *Value) bool { 17973 b := v.Block 17974 config := b.Func.Config 17975 // match: (XORLmodifyidx4 [off1] {sym} (ADDLconst [off2] base) idx val mem) 17976 // cond: is32Bit(off1+off2) 17977 // result: (XORLmodifyidx4 [off1+off2] {sym} base idx val mem) 17978 for { 17979 off1 := v.AuxInt 17980 sym := v.Aux 17981 mem := v.Args[3] 17982 v_0 := v.Args[0] 17983 if v_0.Op != Op386ADDLconst { 17984 break 17985 } 17986 off2 := v_0.AuxInt 17987 base := v_0.Args[0] 17988 idx := v.Args[1] 17989 val := v.Args[2] 17990 if !(is32Bit(off1 + off2)) { 17991 break 17992 } 17993 v.reset(Op386XORLmodifyidx4) 17994 v.AuxInt = off1 + off2 17995 v.Aux = sym 17996 v.AddArg(base) 17997 v.AddArg(idx) 17998 v.AddArg(val) 17999 v.AddArg(mem) 18000 return true 18001 } 18002 // match: (XORLmodifyidx4 [off1] {sym} base (ADDLconst [off2] idx) val mem) 18003 // cond: is32Bit(off1+off2*4) 18004 // result: (XORLmodifyidx4 [off1+off2*4] {sym} base idx val mem) 18005 for { 18006 off1 := v.AuxInt 18007 sym := v.Aux 18008 mem := v.Args[3] 18009 base := v.Args[0] 18010 v_1 := v.Args[1] 18011 if v_1.Op != Op386ADDLconst { 18012 break 18013 } 18014 off2 := v_1.AuxInt 18015 idx := v_1.Args[0] 18016 val := v.Args[2] 18017 if !(is32Bit(off1 + off2*4)) { 18018 break 18019 } 18020 v.reset(Op386XORLmodifyidx4) 18021 v.AuxInt = off1 + off2*4 18022 v.Aux = sym 18023 v.AddArg(base) 18024 v.AddArg(idx) 18025 v.AddArg(val) 18026 v.AddArg(mem) 18027 return true 18028 } 18029 // match: (XORLmodifyidx4 [off1] {sym1} (LEAL [off2] {sym2} base) idx val mem) 18030 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) 18031 // result: (XORLmodifyidx4 [off1+off2] {mergeSym(sym1,sym2)} base idx val mem) 18032 for { 18033 off1 := v.AuxInt 18034 sym1 := v.Aux 18035 mem := v.Args[3] 18036 v_0 := v.Args[0] 18037 if v_0.Op != Op386LEAL { 18038 break 18039 } 18040 off2 := v_0.AuxInt 18041 sym2 := v_0.Aux 18042 base := v_0.Args[0] 18043 idx := v.Args[1] 18044 val := v.Args[2] 18045 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { 18046 break 18047 } 18048 v.reset(Op386XORLmodifyidx4) 18049 v.AuxInt = off1 + off2 18050 v.Aux = mergeSym(sym1, sym2) 18051 v.AddArg(base) 18052 v.AddArg(idx) 18053 v.AddArg(val) 18054 v.AddArg(mem) 18055 return true 18056 } 18057 // match: (XORLmodifyidx4 [off] {sym} ptr idx (MOVLconst [c]) mem) 18058 // cond: validValAndOff(c,off) 18059 // result: (XORLconstmodifyidx4 [makeValAndOff(c,off)] {sym} ptr idx mem) 18060 for { 18061 off := v.AuxInt 18062 sym := v.Aux 18063 mem := v.Args[3] 18064 ptr := v.Args[0] 18065 idx := v.Args[1] 18066 v_2 := v.Args[2] 18067 if v_2.Op != Op386MOVLconst { 18068 break 18069 } 18070 c := v_2.AuxInt 18071 if !(validValAndOff(c, off)) { 18072 break 18073 } 18074 v.reset(Op386XORLconstmodifyidx4) 18075 v.AuxInt = makeValAndOff(c, off) 18076 v.Aux = sym 18077 v.AddArg(ptr) 18078 v.AddArg(idx) 18079 v.AddArg(mem) 18080 return true 18081 } 18082 return false 18083 } 18084 func rewriteValue386_OpAdd16_0(v *Value) bool { 18085 // match: (Add16 x y) 18086 // result: (ADDL x y) 18087 for { 18088 y := v.Args[1] 18089 x := v.Args[0] 18090 v.reset(Op386ADDL) 18091 v.AddArg(x) 18092 v.AddArg(y) 18093 return true 18094 } 18095 } 18096 func rewriteValue386_OpAdd32_0(v *Value) bool { 18097 // match: (Add32 x y) 18098 // result: (ADDL x y) 18099 for { 18100 y := v.Args[1] 18101 x := v.Args[0] 18102 v.reset(Op386ADDL) 18103 v.AddArg(x) 18104 v.AddArg(y) 18105 return true 18106 } 18107 } 18108 func rewriteValue386_OpAdd32F_0(v *Value) bool { 18109 // match: (Add32F x y) 18110 // result: (ADDSS x y) 18111 for { 18112 y := v.Args[1] 18113 x := v.Args[0] 18114 v.reset(Op386ADDSS) 18115 v.AddArg(x) 18116 v.AddArg(y) 18117 return true 18118 } 18119 } 18120 func rewriteValue386_OpAdd32carry_0(v *Value) bool { 18121 // match: (Add32carry x y) 18122 // result: (ADDLcarry x y) 18123 for { 18124 y := v.Args[1] 18125 x := v.Args[0] 18126 v.reset(Op386ADDLcarry) 18127 v.AddArg(x) 18128 v.AddArg(y) 18129 return true 18130 } 18131 } 18132 func rewriteValue386_OpAdd32withcarry_0(v *Value) bool { 18133 // match: (Add32withcarry x y c) 18134 // result: (ADCL x y c) 18135 for { 18136 c := v.Args[2] 18137 x := v.Args[0] 18138 y := v.Args[1] 18139 v.reset(Op386ADCL) 18140 v.AddArg(x) 18141 v.AddArg(y) 18142 v.AddArg(c) 18143 return true 18144 } 18145 } 18146 func rewriteValue386_OpAdd64F_0(v *Value) bool { 18147 // match: (Add64F x y) 18148 // result: (ADDSD x y) 18149 for { 18150 y := v.Args[1] 18151 x := v.Args[0] 18152 v.reset(Op386ADDSD) 18153 v.AddArg(x) 18154 v.AddArg(y) 18155 return true 18156 } 18157 } 18158 func rewriteValue386_OpAdd8_0(v *Value) bool { 18159 // match: (Add8 x y) 18160 // result: (ADDL x y) 18161 for { 18162 y := v.Args[1] 18163 x := v.Args[0] 18164 v.reset(Op386ADDL) 18165 v.AddArg(x) 18166 v.AddArg(y) 18167 return true 18168 } 18169 } 18170 func rewriteValue386_OpAddPtr_0(v *Value) bool { 18171 // match: (AddPtr x y) 18172 // result: (ADDL x y) 18173 for { 18174 y := v.Args[1] 18175 x := v.Args[0] 18176 v.reset(Op386ADDL) 18177 v.AddArg(x) 18178 v.AddArg(y) 18179 return true 18180 } 18181 } 18182 func rewriteValue386_OpAddr_0(v *Value) bool { 18183 // match: (Addr {sym} base) 18184 // result: (LEAL {sym} base) 18185 for { 18186 sym := v.Aux 18187 base := v.Args[0] 18188 v.reset(Op386LEAL) 18189 v.Aux = sym 18190 v.AddArg(base) 18191 return true 18192 } 18193 } 18194 func rewriteValue386_OpAnd16_0(v *Value) bool { 18195 // match: (And16 x y) 18196 // result: (ANDL x y) 18197 for { 18198 y := v.Args[1] 18199 x := v.Args[0] 18200 v.reset(Op386ANDL) 18201 v.AddArg(x) 18202 v.AddArg(y) 18203 return true 18204 } 18205 } 18206 func rewriteValue386_OpAnd32_0(v *Value) bool { 18207 // match: (And32 x y) 18208 // result: (ANDL x y) 18209 for { 18210 y := v.Args[1] 18211 x := v.Args[0] 18212 v.reset(Op386ANDL) 18213 v.AddArg(x) 18214 v.AddArg(y) 18215 return true 18216 } 18217 } 18218 func rewriteValue386_OpAnd8_0(v *Value) bool { 18219 // match: (And8 x y) 18220 // result: (ANDL x y) 18221 for { 18222 y := v.Args[1] 18223 x := v.Args[0] 18224 v.reset(Op386ANDL) 18225 v.AddArg(x) 18226 v.AddArg(y) 18227 return true 18228 } 18229 } 18230 func rewriteValue386_OpAndB_0(v *Value) bool { 18231 // match: (AndB x y) 18232 // result: (ANDL x y) 18233 for { 18234 y := v.Args[1] 18235 x := v.Args[0] 18236 v.reset(Op386ANDL) 18237 v.AddArg(x) 18238 v.AddArg(y) 18239 return true 18240 } 18241 } 18242 func rewriteValue386_OpAvg32u_0(v *Value) bool { 18243 // match: (Avg32u x y) 18244 // result: (AVGLU x y) 18245 for { 18246 y := v.Args[1] 18247 x := v.Args[0] 18248 v.reset(Op386AVGLU) 18249 v.AddArg(x) 18250 v.AddArg(y) 18251 return true 18252 } 18253 } 18254 func rewriteValue386_OpBswap32_0(v *Value) bool { 18255 // match: (Bswap32 x) 18256 // result: (BSWAPL x) 18257 for { 18258 x := v.Args[0] 18259 v.reset(Op386BSWAPL) 18260 v.AddArg(x) 18261 return true 18262 } 18263 } 18264 func rewriteValue386_OpClosureCall_0(v *Value) bool { 18265 // match: (ClosureCall [argwid] entry closure mem) 18266 // result: (CALLclosure [argwid] entry closure mem) 18267 for { 18268 argwid := v.AuxInt 18269 mem := v.Args[2] 18270 entry := v.Args[0] 18271 closure := v.Args[1] 18272 v.reset(Op386CALLclosure) 18273 v.AuxInt = argwid 18274 v.AddArg(entry) 18275 v.AddArg(closure) 18276 v.AddArg(mem) 18277 return true 18278 } 18279 } 18280 func rewriteValue386_OpCom16_0(v *Value) bool { 18281 // match: (Com16 x) 18282 // result: (NOTL x) 18283 for { 18284 x := v.Args[0] 18285 v.reset(Op386NOTL) 18286 v.AddArg(x) 18287 return true 18288 } 18289 } 18290 func rewriteValue386_OpCom32_0(v *Value) bool { 18291 // match: (Com32 x) 18292 // result: (NOTL x) 18293 for { 18294 x := v.Args[0] 18295 v.reset(Op386NOTL) 18296 v.AddArg(x) 18297 return true 18298 } 18299 } 18300 func rewriteValue386_OpCom8_0(v *Value) bool { 18301 // match: (Com8 x) 18302 // result: (NOTL x) 18303 for { 18304 x := v.Args[0] 18305 v.reset(Op386NOTL) 18306 v.AddArg(x) 18307 return true 18308 } 18309 } 18310 func rewriteValue386_OpConst16_0(v *Value) bool { 18311 // match: (Const16 [val]) 18312 // result: (MOVLconst [val]) 18313 for { 18314 val := v.AuxInt 18315 v.reset(Op386MOVLconst) 18316 v.AuxInt = val 18317 return true 18318 } 18319 } 18320 func rewriteValue386_OpConst32_0(v *Value) bool { 18321 // match: (Const32 [val]) 18322 // result: (MOVLconst [val]) 18323 for { 18324 val := v.AuxInt 18325 v.reset(Op386MOVLconst) 18326 v.AuxInt = val 18327 return true 18328 } 18329 } 18330 func rewriteValue386_OpConst32F_0(v *Value) bool { 18331 // match: (Const32F [val]) 18332 // result: (MOVSSconst [val]) 18333 for { 18334 val := v.AuxInt 18335 v.reset(Op386MOVSSconst) 18336 v.AuxInt = val 18337 return true 18338 } 18339 } 18340 func rewriteValue386_OpConst64F_0(v *Value) bool { 18341 // match: (Const64F [val]) 18342 // result: (MOVSDconst [val]) 18343 for { 18344 val := v.AuxInt 18345 v.reset(Op386MOVSDconst) 18346 v.AuxInt = val 18347 return true 18348 } 18349 } 18350 func rewriteValue386_OpConst8_0(v *Value) bool { 18351 // match: (Const8 [val]) 18352 // result: (MOVLconst [val]) 18353 for { 18354 val := v.AuxInt 18355 v.reset(Op386MOVLconst) 18356 v.AuxInt = val 18357 return true 18358 } 18359 } 18360 func rewriteValue386_OpConstBool_0(v *Value) bool { 18361 // match: (ConstBool [b]) 18362 // result: (MOVLconst [b]) 18363 for { 18364 b := v.AuxInt 18365 v.reset(Op386MOVLconst) 18366 v.AuxInt = b 18367 return true 18368 } 18369 } 18370 func rewriteValue386_OpConstNil_0(v *Value) bool { 18371 // match: (ConstNil) 18372 // result: (MOVLconst [0]) 18373 for { 18374 v.reset(Op386MOVLconst) 18375 v.AuxInt = 0 18376 return true 18377 } 18378 } 18379 func rewriteValue386_OpCtz16_0(v *Value) bool { 18380 b := v.Block 18381 typ := &b.Func.Config.Types 18382 // match: (Ctz16 x) 18383 // result: (BSFL (ORLconst <typ.UInt32> [0x10000] x)) 18384 for { 18385 x := v.Args[0] 18386 v.reset(Op386BSFL) 18387 v0 := b.NewValue0(v.Pos, Op386ORLconst, typ.UInt32) 18388 v0.AuxInt = 0x10000 18389 v0.AddArg(x) 18390 v.AddArg(v0) 18391 return true 18392 } 18393 } 18394 func rewriteValue386_OpCtz16NonZero_0(v *Value) bool { 18395 // match: (Ctz16NonZero x) 18396 // result: (BSFL x) 18397 for { 18398 x := v.Args[0] 18399 v.reset(Op386BSFL) 18400 v.AddArg(x) 18401 return true 18402 } 18403 } 18404 func rewriteValue386_OpCvt32Fto32_0(v *Value) bool { 18405 // match: (Cvt32Fto32 x) 18406 // result: (CVTTSS2SL x) 18407 for { 18408 x := v.Args[0] 18409 v.reset(Op386CVTTSS2SL) 18410 v.AddArg(x) 18411 return true 18412 } 18413 } 18414 func rewriteValue386_OpCvt32Fto64F_0(v *Value) bool { 18415 // match: (Cvt32Fto64F x) 18416 // result: (CVTSS2SD x) 18417 for { 18418 x := v.Args[0] 18419 v.reset(Op386CVTSS2SD) 18420 v.AddArg(x) 18421 return true 18422 } 18423 } 18424 func rewriteValue386_OpCvt32to32F_0(v *Value) bool { 18425 // match: (Cvt32to32F x) 18426 // result: (CVTSL2SS x) 18427 for { 18428 x := v.Args[0] 18429 v.reset(Op386CVTSL2SS) 18430 v.AddArg(x) 18431 return true 18432 } 18433 } 18434 func rewriteValue386_OpCvt32to64F_0(v *Value) bool { 18435 // match: (Cvt32to64F x) 18436 // result: (CVTSL2SD x) 18437 for { 18438 x := v.Args[0] 18439 v.reset(Op386CVTSL2SD) 18440 v.AddArg(x) 18441 return true 18442 } 18443 } 18444 func rewriteValue386_OpCvt64Fto32_0(v *Value) bool { 18445 // match: (Cvt64Fto32 x) 18446 // result: (CVTTSD2SL x) 18447 for { 18448 x := v.Args[0] 18449 v.reset(Op386CVTTSD2SL) 18450 v.AddArg(x) 18451 return true 18452 } 18453 } 18454 func rewriteValue386_OpCvt64Fto32F_0(v *Value) bool { 18455 // match: (Cvt64Fto32F x) 18456 // result: (CVTSD2SS x) 18457 for { 18458 x := v.Args[0] 18459 v.reset(Op386CVTSD2SS) 18460 v.AddArg(x) 18461 return true 18462 } 18463 } 18464 func rewriteValue386_OpDiv16_0(v *Value) bool { 18465 // match: (Div16 [a] x y) 18466 // result: (DIVW [a] x y) 18467 for { 18468 a := v.AuxInt 18469 y := v.Args[1] 18470 x := v.Args[0] 18471 v.reset(Op386DIVW) 18472 v.AuxInt = a 18473 v.AddArg(x) 18474 v.AddArg(y) 18475 return true 18476 } 18477 } 18478 func rewriteValue386_OpDiv16u_0(v *Value) bool { 18479 // match: (Div16u x y) 18480 // result: (DIVWU x y) 18481 for { 18482 y := v.Args[1] 18483 x := v.Args[0] 18484 v.reset(Op386DIVWU) 18485 v.AddArg(x) 18486 v.AddArg(y) 18487 return true 18488 } 18489 } 18490 func rewriteValue386_OpDiv32_0(v *Value) bool { 18491 // match: (Div32 [a] x y) 18492 // result: (DIVL [a] x y) 18493 for { 18494 a := v.AuxInt 18495 y := v.Args[1] 18496 x := v.Args[0] 18497 v.reset(Op386DIVL) 18498 v.AuxInt = a 18499 v.AddArg(x) 18500 v.AddArg(y) 18501 return true 18502 } 18503 } 18504 func rewriteValue386_OpDiv32F_0(v *Value) bool { 18505 // match: (Div32F x y) 18506 // result: (DIVSS x y) 18507 for { 18508 y := v.Args[1] 18509 x := v.Args[0] 18510 v.reset(Op386DIVSS) 18511 v.AddArg(x) 18512 v.AddArg(y) 18513 return true 18514 } 18515 } 18516 func rewriteValue386_OpDiv32u_0(v *Value) bool { 18517 // match: (Div32u x y) 18518 // result: (DIVLU x y) 18519 for { 18520 y := v.Args[1] 18521 x := v.Args[0] 18522 v.reset(Op386DIVLU) 18523 v.AddArg(x) 18524 v.AddArg(y) 18525 return true 18526 } 18527 } 18528 func rewriteValue386_OpDiv64F_0(v *Value) bool { 18529 // match: (Div64F x y) 18530 // result: (DIVSD x y) 18531 for { 18532 y := v.Args[1] 18533 x := v.Args[0] 18534 v.reset(Op386DIVSD) 18535 v.AddArg(x) 18536 v.AddArg(y) 18537 return true 18538 } 18539 } 18540 func rewriteValue386_OpDiv8_0(v *Value) bool { 18541 b := v.Block 18542 typ := &b.Func.Config.Types 18543 // match: (Div8 x y) 18544 // result: (DIVW (SignExt8to16 x) (SignExt8to16 y)) 18545 for { 18546 y := v.Args[1] 18547 x := v.Args[0] 18548 v.reset(Op386DIVW) 18549 v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16) 18550 v0.AddArg(x) 18551 v.AddArg(v0) 18552 v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16) 18553 v1.AddArg(y) 18554 v.AddArg(v1) 18555 return true 18556 } 18557 } 18558 func rewriteValue386_OpDiv8u_0(v *Value) bool { 18559 b := v.Block 18560 typ := &b.Func.Config.Types 18561 // match: (Div8u x y) 18562 // result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)) 18563 for { 18564 y := v.Args[1] 18565 x := v.Args[0] 18566 v.reset(Op386DIVWU) 18567 v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16) 18568 v0.AddArg(x) 18569 v.AddArg(v0) 18570 v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16) 18571 v1.AddArg(y) 18572 v.AddArg(v1) 18573 return true 18574 } 18575 } 18576 func rewriteValue386_OpEq16_0(v *Value) bool { 18577 b := v.Block 18578 // match: (Eq16 x y) 18579 // result: (SETEQ (CMPW x y)) 18580 for { 18581 y := v.Args[1] 18582 x := v.Args[0] 18583 v.reset(Op386SETEQ) 18584 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 18585 v0.AddArg(x) 18586 v0.AddArg(y) 18587 v.AddArg(v0) 18588 return true 18589 } 18590 } 18591 func rewriteValue386_OpEq32_0(v *Value) bool { 18592 b := v.Block 18593 // match: (Eq32 x y) 18594 // result: (SETEQ (CMPL x y)) 18595 for { 18596 y := v.Args[1] 18597 x := v.Args[0] 18598 v.reset(Op386SETEQ) 18599 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18600 v0.AddArg(x) 18601 v0.AddArg(y) 18602 v.AddArg(v0) 18603 return true 18604 } 18605 } 18606 func rewriteValue386_OpEq32F_0(v *Value) bool { 18607 b := v.Block 18608 // match: (Eq32F x y) 18609 // result: (SETEQF (UCOMISS x y)) 18610 for { 18611 y := v.Args[1] 18612 x := v.Args[0] 18613 v.reset(Op386SETEQF) 18614 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 18615 v0.AddArg(x) 18616 v0.AddArg(y) 18617 v.AddArg(v0) 18618 return true 18619 } 18620 } 18621 func rewriteValue386_OpEq64F_0(v *Value) bool { 18622 b := v.Block 18623 // match: (Eq64F x y) 18624 // result: (SETEQF (UCOMISD x y)) 18625 for { 18626 y := v.Args[1] 18627 x := v.Args[0] 18628 v.reset(Op386SETEQF) 18629 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 18630 v0.AddArg(x) 18631 v0.AddArg(y) 18632 v.AddArg(v0) 18633 return true 18634 } 18635 } 18636 func rewriteValue386_OpEq8_0(v *Value) bool { 18637 b := v.Block 18638 // match: (Eq8 x y) 18639 // result: (SETEQ (CMPB x y)) 18640 for { 18641 y := v.Args[1] 18642 x := v.Args[0] 18643 v.reset(Op386SETEQ) 18644 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18645 v0.AddArg(x) 18646 v0.AddArg(y) 18647 v.AddArg(v0) 18648 return true 18649 } 18650 } 18651 func rewriteValue386_OpEqB_0(v *Value) bool { 18652 b := v.Block 18653 // match: (EqB x y) 18654 // result: (SETEQ (CMPB x y)) 18655 for { 18656 y := v.Args[1] 18657 x := v.Args[0] 18658 v.reset(Op386SETEQ) 18659 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18660 v0.AddArg(x) 18661 v0.AddArg(y) 18662 v.AddArg(v0) 18663 return true 18664 } 18665 } 18666 func rewriteValue386_OpEqPtr_0(v *Value) bool { 18667 b := v.Block 18668 // match: (EqPtr x y) 18669 // result: (SETEQ (CMPL x y)) 18670 for { 18671 y := v.Args[1] 18672 x := v.Args[0] 18673 v.reset(Op386SETEQ) 18674 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18675 v0.AddArg(x) 18676 v0.AddArg(y) 18677 v.AddArg(v0) 18678 return true 18679 } 18680 } 18681 func rewriteValue386_OpGeq16_0(v *Value) bool { 18682 b := v.Block 18683 // match: (Geq16 x y) 18684 // result: (SETGE (CMPW x y)) 18685 for { 18686 y := v.Args[1] 18687 x := v.Args[0] 18688 v.reset(Op386SETGE) 18689 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 18690 v0.AddArg(x) 18691 v0.AddArg(y) 18692 v.AddArg(v0) 18693 return true 18694 } 18695 } 18696 func rewriteValue386_OpGeq16U_0(v *Value) bool { 18697 b := v.Block 18698 // match: (Geq16U x y) 18699 // result: (SETAE (CMPW x y)) 18700 for { 18701 y := v.Args[1] 18702 x := v.Args[0] 18703 v.reset(Op386SETAE) 18704 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 18705 v0.AddArg(x) 18706 v0.AddArg(y) 18707 v.AddArg(v0) 18708 return true 18709 } 18710 } 18711 func rewriteValue386_OpGeq32_0(v *Value) bool { 18712 b := v.Block 18713 // match: (Geq32 x y) 18714 // result: (SETGE (CMPL x y)) 18715 for { 18716 y := v.Args[1] 18717 x := v.Args[0] 18718 v.reset(Op386SETGE) 18719 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18720 v0.AddArg(x) 18721 v0.AddArg(y) 18722 v.AddArg(v0) 18723 return true 18724 } 18725 } 18726 func rewriteValue386_OpGeq32F_0(v *Value) bool { 18727 b := v.Block 18728 // match: (Geq32F x y) 18729 // result: (SETGEF (UCOMISS x y)) 18730 for { 18731 y := v.Args[1] 18732 x := v.Args[0] 18733 v.reset(Op386SETGEF) 18734 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 18735 v0.AddArg(x) 18736 v0.AddArg(y) 18737 v.AddArg(v0) 18738 return true 18739 } 18740 } 18741 func rewriteValue386_OpGeq32U_0(v *Value) bool { 18742 b := v.Block 18743 // match: (Geq32U x y) 18744 // result: (SETAE (CMPL x y)) 18745 for { 18746 y := v.Args[1] 18747 x := v.Args[0] 18748 v.reset(Op386SETAE) 18749 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18750 v0.AddArg(x) 18751 v0.AddArg(y) 18752 v.AddArg(v0) 18753 return true 18754 } 18755 } 18756 func rewriteValue386_OpGeq64F_0(v *Value) bool { 18757 b := v.Block 18758 // match: (Geq64F x y) 18759 // result: (SETGEF (UCOMISD x y)) 18760 for { 18761 y := v.Args[1] 18762 x := v.Args[0] 18763 v.reset(Op386SETGEF) 18764 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 18765 v0.AddArg(x) 18766 v0.AddArg(y) 18767 v.AddArg(v0) 18768 return true 18769 } 18770 } 18771 func rewriteValue386_OpGeq8_0(v *Value) bool { 18772 b := v.Block 18773 // match: (Geq8 x y) 18774 // result: (SETGE (CMPB x y)) 18775 for { 18776 y := v.Args[1] 18777 x := v.Args[0] 18778 v.reset(Op386SETGE) 18779 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18780 v0.AddArg(x) 18781 v0.AddArg(y) 18782 v.AddArg(v0) 18783 return true 18784 } 18785 } 18786 func rewriteValue386_OpGeq8U_0(v *Value) bool { 18787 b := v.Block 18788 // match: (Geq8U x y) 18789 // result: (SETAE (CMPB x y)) 18790 for { 18791 y := v.Args[1] 18792 x := v.Args[0] 18793 v.reset(Op386SETAE) 18794 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18795 v0.AddArg(x) 18796 v0.AddArg(y) 18797 v.AddArg(v0) 18798 return true 18799 } 18800 } 18801 func rewriteValue386_OpGetCallerPC_0(v *Value) bool { 18802 // match: (GetCallerPC) 18803 // result: (LoweredGetCallerPC) 18804 for { 18805 v.reset(Op386LoweredGetCallerPC) 18806 return true 18807 } 18808 } 18809 func rewriteValue386_OpGetCallerSP_0(v *Value) bool { 18810 // match: (GetCallerSP) 18811 // result: (LoweredGetCallerSP) 18812 for { 18813 v.reset(Op386LoweredGetCallerSP) 18814 return true 18815 } 18816 } 18817 func rewriteValue386_OpGetClosurePtr_0(v *Value) bool { 18818 // match: (GetClosurePtr) 18819 // result: (LoweredGetClosurePtr) 18820 for { 18821 v.reset(Op386LoweredGetClosurePtr) 18822 return true 18823 } 18824 } 18825 func rewriteValue386_OpGetG_0(v *Value) bool { 18826 // match: (GetG mem) 18827 // result: (LoweredGetG mem) 18828 for { 18829 mem := v.Args[0] 18830 v.reset(Op386LoweredGetG) 18831 v.AddArg(mem) 18832 return true 18833 } 18834 } 18835 func rewriteValue386_OpGreater16_0(v *Value) bool { 18836 b := v.Block 18837 // match: (Greater16 x y) 18838 // result: (SETG (CMPW x y)) 18839 for { 18840 y := v.Args[1] 18841 x := v.Args[0] 18842 v.reset(Op386SETG) 18843 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 18844 v0.AddArg(x) 18845 v0.AddArg(y) 18846 v.AddArg(v0) 18847 return true 18848 } 18849 } 18850 func rewriteValue386_OpGreater16U_0(v *Value) bool { 18851 b := v.Block 18852 // match: (Greater16U x y) 18853 // result: (SETA (CMPW x y)) 18854 for { 18855 y := v.Args[1] 18856 x := v.Args[0] 18857 v.reset(Op386SETA) 18858 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 18859 v0.AddArg(x) 18860 v0.AddArg(y) 18861 v.AddArg(v0) 18862 return true 18863 } 18864 } 18865 func rewriteValue386_OpGreater32_0(v *Value) bool { 18866 b := v.Block 18867 // match: (Greater32 x y) 18868 // result: (SETG (CMPL x y)) 18869 for { 18870 y := v.Args[1] 18871 x := v.Args[0] 18872 v.reset(Op386SETG) 18873 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18874 v0.AddArg(x) 18875 v0.AddArg(y) 18876 v.AddArg(v0) 18877 return true 18878 } 18879 } 18880 func rewriteValue386_OpGreater32F_0(v *Value) bool { 18881 b := v.Block 18882 // match: (Greater32F x y) 18883 // result: (SETGF (UCOMISS x y)) 18884 for { 18885 y := v.Args[1] 18886 x := v.Args[0] 18887 v.reset(Op386SETGF) 18888 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 18889 v0.AddArg(x) 18890 v0.AddArg(y) 18891 v.AddArg(v0) 18892 return true 18893 } 18894 } 18895 func rewriteValue386_OpGreater32U_0(v *Value) bool { 18896 b := v.Block 18897 // match: (Greater32U x y) 18898 // result: (SETA (CMPL x y)) 18899 for { 18900 y := v.Args[1] 18901 x := v.Args[0] 18902 v.reset(Op386SETA) 18903 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 18904 v0.AddArg(x) 18905 v0.AddArg(y) 18906 v.AddArg(v0) 18907 return true 18908 } 18909 } 18910 func rewriteValue386_OpGreater64F_0(v *Value) bool { 18911 b := v.Block 18912 // match: (Greater64F x y) 18913 // result: (SETGF (UCOMISD x y)) 18914 for { 18915 y := v.Args[1] 18916 x := v.Args[0] 18917 v.reset(Op386SETGF) 18918 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 18919 v0.AddArg(x) 18920 v0.AddArg(y) 18921 v.AddArg(v0) 18922 return true 18923 } 18924 } 18925 func rewriteValue386_OpGreater8_0(v *Value) bool { 18926 b := v.Block 18927 // match: (Greater8 x y) 18928 // result: (SETG (CMPB x y)) 18929 for { 18930 y := v.Args[1] 18931 x := v.Args[0] 18932 v.reset(Op386SETG) 18933 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18934 v0.AddArg(x) 18935 v0.AddArg(y) 18936 v.AddArg(v0) 18937 return true 18938 } 18939 } 18940 func rewriteValue386_OpGreater8U_0(v *Value) bool { 18941 b := v.Block 18942 // match: (Greater8U x y) 18943 // result: (SETA (CMPB x y)) 18944 for { 18945 y := v.Args[1] 18946 x := v.Args[0] 18947 v.reset(Op386SETA) 18948 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 18949 v0.AddArg(x) 18950 v0.AddArg(y) 18951 v.AddArg(v0) 18952 return true 18953 } 18954 } 18955 func rewriteValue386_OpHmul32_0(v *Value) bool { 18956 // match: (Hmul32 x y) 18957 // result: (HMULL x y) 18958 for { 18959 y := v.Args[1] 18960 x := v.Args[0] 18961 v.reset(Op386HMULL) 18962 v.AddArg(x) 18963 v.AddArg(y) 18964 return true 18965 } 18966 } 18967 func rewriteValue386_OpHmul32u_0(v *Value) bool { 18968 // match: (Hmul32u x y) 18969 // result: (HMULLU x y) 18970 for { 18971 y := v.Args[1] 18972 x := v.Args[0] 18973 v.reset(Op386HMULLU) 18974 v.AddArg(x) 18975 v.AddArg(y) 18976 return true 18977 } 18978 } 18979 func rewriteValue386_OpInterCall_0(v *Value) bool { 18980 // match: (InterCall [argwid] entry mem) 18981 // result: (CALLinter [argwid] entry mem) 18982 for { 18983 argwid := v.AuxInt 18984 mem := v.Args[1] 18985 entry := v.Args[0] 18986 v.reset(Op386CALLinter) 18987 v.AuxInt = argwid 18988 v.AddArg(entry) 18989 v.AddArg(mem) 18990 return true 18991 } 18992 } 18993 func rewriteValue386_OpIsInBounds_0(v *Value) bool { 18994 b := v.Block 18995 // match: (IsInBounds idx len) 18996 // result: (SETB (CMPL idx len)) 18997 for { 18998 len := v.Args[1] 18999 idx := v.Args[0] 19000 v.reset(Op386SETB) 19001 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19002 v0.AddArg(idx) 19003 v0.AddArg(len) 19004 v.AddArg(v0) 19005 return true 19006 } 19007 } 19008 func rewriteValue386_OpIsNonNil_0(v *Value) bool { 19009 b := v.Block 19010 // match: (IsNonNil p) 19011 // result: (SETNE (TESTL p p)) 19012 for { 19013 p := v.Args[0] 19014 v.reset(Op386SETNE) 19015 v0 := b.NewValue0(v.Pos, Op386TESTL, types.TypeFlags) 19016 v0.AddArg(p) 19017 v0.AddArg(p) 19018 v.AddArg(v0) 19019 return true 19020 } 19021 } 19022 func rewriteValue386_OpIsSliceInBounds_0(v *Value) bool { 19023 b := v.Block 19024 // match: (IsSliceInBounds idx len) 19025 // result: (SETBE (CMPL idx len)) 19026 for { 19027 len := v.Args[1] 19028 idx := v.Args[0] 19029 v.reset(Op386SETBE) 19030 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19031 v0.AddArg(idx) 19032 v0.AddArg(len) 19033 v.AddArg(v0) 19034 return true 19035 } 19036 } 19037 func rewriteValue386_OpLeq16_0(v *Value) bool { 19038 b := v.Block 19039 // match: (Leq16 x y) 19040 // result: (SETLE (CMPW x y)) 19041 for { 19042 y := v.Args[1] 19043 x := v.Args[0] 19044 v.reset(Op386SETLE) 19045 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 19046 v0.AddArg(x) 19047 v0.AddArg(y) 19048 v.AddArg(v0) 19049 return true 19050 } 19051 } 19052 func rewriteValue386_OpLeq16U_0(v *Value) bool { 19053 b := v.Block 19054 // match: (Leq16U x y) 19055 // result: (SETBE (CMPW x y)) 19056 for { 19057 y := v.Args[1] 19058 x := v.Args[0] 19059 v.reset(Op386SETBE) 19060 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 19061 v0.AddArg(x) 19062 v0.AddArg(y) 19063 v.AddArg(v0) 19064 return true 19065 } 19066 } 19067 func rewriteValue386_OpLeq32_0(v *Value) bool { 19068 b := v.Block 19069 // match: (Leq32 x y) 19070 // result: (SETLE (CMPL x y)) 19071 for { 19072 y := v.Args[1] 19073 x := v.Args[0] 19074 v.reset(Op386SETLE) 19075 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19076 v0.AddArg(x) 19077 v0.AddArg(y) 19078 v.AddArg(v0) 19079 return true 19080 } 19081 } 19082 func rewriteValue386_OpLeq32F_0(v *Value) bool { 19083 b := v.Block 19084 // match: (Leq32F x y) 19085 // result: (SETGEF (UCOMISS y x)) 19086 for { 19087 y := v.Args[1] 19088 x := v.Args[0] 19089 v.reset(Op386SETGEF) 19090 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 19091 v0.AddArg(y) 19092 v0.AddArg(x) 19093 v.AddArg(v0) 19094 return true 19095 } 19096 } 19097 func rewriteValue386_OpLeq32U_0(v *Value) bool { 19098 b := v.Block 19099 // match: (Leq32U x y) 19100 // result: (SETBE (CMPL x y)) 19101 for { 19102 y := v.Args[1] 19103 x := v.Args[0] 19104 v.reset(Op386SETBE) 19105 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19106 v0.AddArg(x) 19107 v0.AddArg(y) 19108 v.AddArg(v0) 19109 return true 19110 } 19111 } 19112 func rewriteValue386_OpLeq64F_0(v *Value) bool { 19113 b := v.Block 19114 // match: (Leq64F x y) 19115 // result: (SETGEF (UCOMISD y x)) 19116 for { 19117 y := v.Args[1] 19118 x := v.Args[0] 19119 v.reset(Op386SETGEF) 19120 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 19121 v0.AddArg(y) 19122 v0.AddArg(x) 19123 v.AddArg(v0) 19124 return true 19125 } 19126 } 19127 func rewriteValue386_OpLeq8_0(v *Value) bool { 19128 b := v.Block 19129 // match: (Leq8 x y) 19130 // result: (SETLE (CMPB x y)) 19131 for { 19132 y := v.Args[1] 19133 x := v.Args[0] 19134 v.reset(Op386SETLE) 19135 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 19136 v0.AddArg(x) 19137 v0.AddArg(y) 19138 v.AddArg(v0) 19139 return true 19140 } 19141 } 19142 func rewriteValue386_OpLeq8U_0(v *Value) bool { 19143 b := v.Block 19144 // match: (Leq8U x y) 19145 // result: (SETBE (CMPB x y)) 19146 for { 19147 y := v.Args[1] 19148 x := v.Args[0] 19149 v.reset(Op386SETBE) 19150 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 19151 v0.AddArg(x) 19152 v0.AddArg(y) 19153 v.AddArg(v0) 19154 return true 19155 } 19156 } 19157 func rewriteValue386_OpLess16_0(v *Value) bool { 19158 b := v.Block 19159 // match: (Less16 x y) 19160 // result: (SETL (CMPW x y)) 19161 for { 19162 y := v.Args[1] 19163 x := v.Args[0] 19164 v.reset(Op386SETL) 19165 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 19166 v0.AddArg(x) 19167 v0.AddArg(y) 19168 v.AddArg(v0) 19169 return true 19170 } 19171 } 19172 func rewriteValue386_OpLess16U_0(v *Value) bool { 19173 b := v.Block 19174 // match: (Less16U x y) 19175 // result: (SETB (CMPW x y)) 19176 for { 19177 y := v.Args[1] 19178 x := v.Args[0] 19179 v.reset(Op386SETB) 19180 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 19181 v0.AddArg(x) 19182 v0.AddArg(y) 19183 v.AddArg(v0) 19184 return true 19185 } 19186 } 19187 func rewriteValue386_OpLess32_0(v *Value) bool { 19188 b := v.Block 19189 // match: (Less32 x y) 19190 // result: (SETL (CMPL x y)) 19191 for { 19192 y := v.Args[1] 19193 x := v.Args[0] 19194 v.reset(Op386SETL) 19195 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19196 v0.AddArg(x) 19197 v0.AddArg(y) 19198 v.AddArg(v0) 19199 return true 19200 } 19201 } 19202 func rewriteValue386_OpLess32F_0(v *Value) bool { 19203 b := v.Block 19204 // match: (Less32F x y) 19205 // result: (SETGF (UCOMISS y x)) 19206 for { 19207 y := v.Args[1] 19208 x := v.Args[0] 19209 v.reset(Op386SETGF) 19210 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 19211 v0.AddArg(y) 19212 v0.AddArg(x) 19213 v.AddArg(v0) 19214 return true 19215 } 19216 } 19217 func rewriteValue386_OpLess32U_0(v *Value) bool { 19218 b := v.Block 19219 // match: (Less32U x y) 19220 // result: (SETB (CMPL x y)) 19221 for { 19222 y := v.Args[1] 19223 x := v.Args[0] 19224 v.reset(Op386SETB) 19225 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 19226 v0.AddArg(x) 19227 v0.AddArg(y) 19228 v.AddArg(v0) 19229 return true 19230 } 19231 } 19232 func rewriteValue386_OpLess64F_0(v *Value) bool { 19233 b := v.Block 19234 // match: (Less64F x y) 19235 // result: (SETGF (UCOMISD y x)) 19236 for { 19237 y := v.Args[1] 19238 x := v.Args[0] 19239 v.reset(Op386SETGF) 19240 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 19241 v0.AddArg(y) 19242 v0.AddArg(x) 19243 v.AddArg(v0) 19244 return true 19245 } 19246 } 19247 func rewriteValue386_OpLess8_0(v *Value) bool { 19248 b := v.Block 19249 // match: (Less8 x y) 19250 // result: (SETL (CMPB x y)) 19251 for { 19252 y := v.Args[1] 19253 x := v.Args[0] 19254 v.reset(Op386SETL) 19255 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 19256 v0.AddArg(x) 19257 v0.AddArg(y) 19258 v.AddArg(v0) 19259 return true 19260 } 19261 } 19262 func rewriteValue386_OpLess8U_0(v *Value) bool { 19263 b := v.Block 19264 // match: (Less8U x y) 19265 // result: (SETB (CMPB x y)) 19266 for { 19267 y := v.Args[1] 19268 x := v.Args[0] 19269 v.reset(Op386SETB) 19270 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 19271 v0.AddArg(x) 19272 v0.AddArg(y) 19273 v.AddArg(v0) 19274 return true 19275 } 19276 } 19277 func rewriteValue386_OpLoad_0(v *Value) bool { 19278 // match: (Load <t> ptr mem) 19279 // cond: (is32BitInt(t) || isPtr(t)) 19280 // result: (MOVLload ptr mem) 19281 for { 19282 t := v.Type 19283 mem := v.Args[1] 19284 ptr := v.Args[0] 19285 if !(is32BitInt(t) || isPtr(t)) { 19286 break 19287 } 19288 v.reset(Op386MOVLload) 19289 v.AddArg(ptr) 19290 v.AddArg(mem) 19291 return true 19292 } 19293 // match: (Load <t> ptr mem) 19294 // cond: is16BitInt(t) 19295 // result: (MOVWload ptr mem) 19296 for { 19297 t := v.Type 19298 mem := v.Args[1] 19299 ptr := v.Args[0] 19300 if !(is16BitInt(t)) { 19301 break 19302 } 19303 v.reset(Op386MOVWload) 19304 v.AddArg(ptr) 19305 v.AddArg(mem) 19306 return true 19307 } 19308 // match: (Load <t> ptr mem) 19309 // cond: (t.IsBoolean() || is8BitInt(t)) 19310 // result: (MOVBload ptr mem) 19311 for { 19312 t := v.Type 19313 mem := v.Args[1] 19314 ptr := v.Args[0] 19315 if !(t.IsBoolean() || is8BitInt(t)) { 19316 break 19317 } 19318 v.reset(Op386MOVBload) 19319 v.AddArg(ptr) 19320 v.AddArg(mem) 19321 return true 19322 } 19323 // match: (Load <t> ptr mem) 19324 // cond: is32BitFloat(t) 19325 // result: (MOVSSload ptr mem) 19326 for { 19327 t := v.Type 19328 mem := v.Args[1] 19329 ptr := v.Args[0] 19330 if !(is32BitFloat(t)) { 19331 break 19332 } 19333 v.reset(Op386MOVSSload) 19334 v.AddArg(ptr) 19335 v.AddArg(mem) 19336 return true 19337 } 19338 // match: (Load <t> ptr mem) 19339 // cond: is64BitFloat(t) 19340 // result: (MOVSDload ptr mem) 19341 for { 19342 t := v.Type 19343 mem := v.Args[1] 19344 ptr := v.Args[0] 19345 if !(is64BitFloat(t)) { 19346 break 19347 } 19348 v.reset(Op386MOVSDload) 19349 v.AddArg(ptr) 19350 v.AddArg(mem) 19351 return true 19352 } 19353 return false 19354 } 19355 func rewriteValue386_OpLocalAddr_0(v *Value) bool { 19356 // match: (LocalAddr {sym} base _) 19357 // result: (LEAL {sym} base) 19358 for { 19359 sym := v.Aux 19360 _ = v.Args[1] 19361 base := v.Args[0] 19362 v.reset(Op386LEAL) 19363 v.Aux = sym 19364 v.AddArg(base) 19365 return true 19366 } 19367 } 19368 func rewriteValue386_OpLsh16x16_0(v *Value) bool { 19369 b := v.Block 19370 // match: (Lsh16x16 <t> x y) 19371 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32]))) 19372 for { 19373 t := v.Type 19374 y := v.Args[1] 19375 x := v.Args[0] 19376 v.reset(Op386ANDL) 19377 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19378 v0.AddArg(x) 19379 v0.AddArg(y) 19380 v.AddArg(v0) 19381 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19382 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 19383 v2.AuxInt = 32 19384 v2.AddArg(y) 19385 v1.AddArg(v2) 19386 v.AddArg(v1) 19387 return true 19388 } 19389 } 19390 func rewriteValue386_OpLsh16x32_0(v *Value) bool { 19391 b := v.Block 19392 // match: (Lsh16x32 <t> x y) 19393 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32]))) 19394 for { 19395 t := v.Type 19396 y := v.Args[1] 19397 x := v.Args[0] 19398 v.reset(Op386ANDL) 19399 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19400 v0.AddArg(x) 19401 v0.AddArg(y) 19402 v.AddArg(v0) 19403 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19404 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 19405 v2.AuxInt = 32 19406 v2.AddArg(y) 19407 v1.AddArg(v2) 19408 v.AddArg(v1) 19409 return true 19410 } 19411 } 19412 func rewriteValue386_OpLsh16x64_0(v *Value) bool { 19413 // match: (Lsh16x64 x (Const64 [c])) 19414 // cond: uint64(c) < 16 19415 // result: (SHLLconst x [c]) 19416 for { 19417 _ = v.Args[1] 19418 x := v.Args[0] 19419 v_1 := v.Args[1] 19420 if v_1.Op != OpConst64 { 19421 break 19422 } 19423 c := v_1.AuxInt 19424 if !(uint64(c) < 16) { 19425 break 19426 } 19427 v.reset(Op386SHLLconst) 19428 v.AuxInt = c 19429 v.AddArg(x) 19430 return true 19431 } 19432 // match: (Lsh16x64 _ (Const64 [c])) 19433 // cond: uint64(c) >= 16 19434 // result: (Const16 [0]) 19435 for { 19436 _ = v.Args[1] 19437 v_1 := v.Args[1] 19438 if v_1.Op != OpConst64 { 19439 break 19440 } 19441 c := v_1.AuxInt 19442 if !(uint64(c) >= 16) { 19443 break 19444 } 19445 v.reset(OpConst16) 19446 v.AuxInt = 0 19447 return true 19448 } 19449 return false 19450 } 19451 func rewriteValue386_OpLsh16x8_0(v *Value) bool { 19452 b := v.Block 19453 // match: (Lsh16x8 <t> x y) 19454 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32]))) 19455 for { 19456 t := v.Type 19457 y := v.Args[1] 19458 x := v.Args[0] 19459 v.reset(Op386ANDL) 19460 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19461 v0.AddArg(x) 19462 v0.AddArg(y) 19463 v.AddArg(v0) 19464 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19465 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 19466 v2.AuxInt = 32 19467 v2.AddArg(y) 19468 v1.AddArg(v2) 19469 v.AddArg(v1) 19470 return true 19471 } 19472 } 19473 func rewriteValue386_OpLsh32x16_0(v *Value) bool { 19474 b := v.Block 19475 // match: (Lsh32x16 <t> x y) 19476 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32]))) 19477 for { 19478 t := v.Type 19479 y := v.Args[1] 19480 x := v.Args[0] 19481 v.reset(Op386ANDL) 19482 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19483 v0.AddArg(x) 19484 v0.AddArg(y) 19485 v.AddArg(v0) 19486 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19487 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 19488 v2.AuxInt = 32 19489 v2.AddArg(y) 19490 v1.AddArg(v2) 19491 v.AddArg(v1) 19492 return true 19493 } 19494 } 19495 func rewriteValue386_OpLsh32x32_0(v *Value) bool { 19496 b := v.Block 19497 // match: (Lsh32x32 <t> x y) 19498 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32]))) 19499 for { 19500 t := v.Type 19501 y := v.Args[1] 19502 x := v.Args[0] 19503 v.reset(Op386ANDL) 19504 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19505 v0.AddArg(x) 19506 v0.AddArg(y) 19507 v.AddArg(v0) 19508 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19509 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 19510 v2.AuxInt = 32 19511 v2.AddArg(y) 19512 v1.AddArg(v2) 19513 v.AddArg(v1) 19514 return true 19515 } 19516 } 19517 func rewriteValue386_OpLsh32x64_0(v *Value) bool { 19518 // match: (Lsh32x64 x (Const64 [c])) 19519 // cond: uint64(c) < 32 19520 // result: (SHLLconst x [c]) 19521 for { 19522 _ = v.Args[1] 19523 x := v.Args[0] 19524 v_1 := v.Args[1] 19525 if v_1.Op != OpConst64 { 19526 break 19527 } 19528 c := v_1.AuxInt 19529 if !(uint64(c) < 32) { 19530 break 19531 } 19532 v.reset(Op386SHLLconst) 19533 v.AuxInt = c 19534 v.AddArg(x) 19535 return true 19536 } 19537 // match: (Lsh32x64 _ (Const64 [c])) 19538 // cond: uint64(c) >= 32 19539 // result: (Const32 [0]) 19540 for { 19541 _ = v.Args[1] 19542 v_1 := v.Args[1] 19543 if v_1.Op != OpConst64 { 19544 break 19545 } 19546 c := v_1.AuxInt 19547 if !(uint64(c) >= 32) { 19548 break 19549 } 19550 v.reset(OpConst32) 19551 v.AuxInt = 0 19552 return true 19553 } 19554 return false 19555 } 19556 func rewriteValue386_OpLsh32x8_0(v *Value) bool { 19557 b := v.Block 19558 // match: (Lsh32x8 <t> x y) 19559 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32]))) 19560 for { 19561 t := v.Type 19562 y := v.Args[1] 19563 x := v.Args[0] 19564 v.reset(Op386ANDL) 19565 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19566 v0.AddArg(x) 19567 v0.AddArg(y) 19568 v.AddArg(v0) 19569 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19570 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 19571 v2.AuxInt = 32 19572 v2.AddArg(y) 19573 v1.AddArg(v2) 19574 v.AddArg(v1) 19575 return true 19576 } 19577 } 19578 func rewriteValue386_OpLsh8x16_0(v *Value) bool { 19579 b := v.Block 19580 // match: (Lsh8x16 <t> x y) 19581 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32]))) 19582 for { 19583 t := v.Type 19584 y := v.Args[1] 19585 x := v.Args[0] 19586 v.reset(Op386ANDL) 19587 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19588 v0.AddArg(x) 19589 v0.AddArg(y) 19590 v.AddArg(v0) 19591 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19592 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 19593 v2.AuxInt = 32 19594 v2.AddArg(y) 19595 v1.AddArg(v2) 19596 v.AddArg(v1) 19597 return true 19598 } 19599 } 19600 func rewriteValue386_OpLsh8x32_0(v *Value) bool { 19601 b := v.Block 19602 // match: (Lsh8x32 <t> x y) 19603 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32]))) 19604 for { 19605 t := v.Type 19606 y := v.Args[1] 19607 x := v.Args[0] 19608 v.reset(Op386ANDL) 19609 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19610 v0.AddArg(x) 19611 v0.AddArg(y) 19612 v.AddArg(v0) 19613 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19614 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 19615 v2.AuxInt = 32 19616 v2.AddArg(y) 19617 v1.AddArg(v2) 19618 v.AddArg(v1) 19619 return true 19620 } 19621 } 19622 func rewriteValue386_OpLsh8x64_0(v *Value) bool { 19623 // match: (Lsh8x64 x (Const64 [c])) 19624 // cond: uint64(c) < 8 19625 // result: (SHLLconst x [c]) 19626 for { 19627 _ = v.Args[1] 19628 x := v.Args[0] 19629 v_1 := v.Args[1] 19630 if v_1.Op != OpConst64 { 19631 break 19632 } 19633 c := v_1.AuxInt 19634 if !(uint64(c) < 8) { 19635 break 19636 } 19637 v.reset(Op386SHLLconst) 19638 v.AuxInt = c 19639 v.AddArg(x) 19640 return true 19641 } 19642 // match: (Lsh8x64 _ (Const64 [c])) 19643 // cond: uint64(c) >= 8 19644 // result: (Const8 [0]) 19645 for { 19646 _ = v.Args[1] 19647 v_1 := v.Args[1] 19648 if v_1.Op != OpConst64 { 19649 break 19650 } 19651 c := v_1.AuxInt 19652 if !(uint64(c) >= 8) { 19653 break 19654 } 19655 v.reset(OpConst8) 19656 v.AuxInt = 0 19657 return true 19658 } 19659 return false 19660 } 19661 func rewriteValue386_OpLsh8x8_0(v *Value) bool { 19662 b := v.Block 19663 // match: (Lsh8x8 <t> x y) 19664 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32]))) 19665 for { 19666 t := v.Type 19667 y := v.Args[1] 19668 x := v.Args[0] 19669 v.reset(Op386ANDL) 19670 v0 := b.NewValue0(v.Pos, Op386SHLL, t) 19671 v0.AddArg(x) 19672 v0.AddArg(y) 19673 v.AddArg(v0) 19674 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 19675 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 19676 v2.AuxInt = 32 19677 v2.AddArg(y) 19678 v1.AddArg(v2) 19679 v.AddArg(v1) 19680 return true 19681 } 19682 } 19683 func rewriteValue386_OpMod16_0(v *Value) bool { 19684 // match: (Mod16 [a] x y) 19685 // result: (MODW [a] x y) 19686 for { 19687 a := v.AuxInt 19688 y := v.Args[1] 19689 x := v.Args[0] 19690 v.reset(Op386MODW) 19691 v.AuxInt = a 19692 v.AddArg(x) 19693 v.AddArg(y) 19694 return true 19695 } 19696 } 19697 func rewriteValue386_OpMod16u_0(v *Value) bool { 19698 // match: (Mod16u x y) 19699 // result: (MODWU x y) 19700 for { 19701 y := v.Args[1] 19702 x := v.Args[0] 19703 v.reset(Op386MODWU) 19704 v.AddArg(x) 19705 v.AddArg(y) 19706 return true 19707 } 19708 } 19709 func rewriteValue386_OpMod32_0(v *Value) bool { 19710 // match: (Mod32 [a] x y) 19711 // result: (MODL [a] x y) 19712 for { 19713 a := v.AuxInt 19714 y := v.Args[1] 19715 x := v.Args[0] 19716 v.reset(Op386MODL) 19717 v.AuxInt = a 19718 v.AddArg(x) 19719 v.AddArg(y) 19720 return true 19721 } 19722 } 19723 func rewriteValue386_OpMod32u_0(v *Value) bool { 19724 // match: (Mod32u x y) 19725 // result: (MODLU x y) 19726 for { 19727 y := v.Args[1] 19728 x := v.Args[0] 19729 v.reset(Op386MODLU) 19730 v.AddArg(x) 19731 v.AddArg(y) 19732 return true 19733 } 19734 } 19735 func rewriteValue386_OpMod8_0(v *Value) bool { 19736 b := v.Block 19737 typ := &b.Func.Config.Types 19738 // match: (Mod8 x y) 19739 // result: (MODW (SignExt8to16 x) (SignExt8to16 y)) 19740 for { 19741 y := v.Args[1] 19742 x := v.Args[0] 19743 v.reset(Op386MODW) 19744 v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16) 19745 v0.AddArg(x) 19746 v.AddArg(v0) 19747 v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16) 19748 v1.AddArg(y) 19749 v.AddArg(v1) 19750 return true 19751 } 19752 } 19753 func rewriteValue386_OpMod8u_0(v *Value) bool { 19754 b := v.Block 19755 typ := &b.Func.Config.Types 19756 // match: (Mod8u x y) 19757 // result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y)) 19758 for { 19759 y := v.Args[1] 19760 x := v.Args[0] 19761 v.reset(Op386MODWU) 19762 v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16) 19763 v0.AddArg(x) 19764 v.AddArg(v0) 19765 v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16) 19766 v1.AddArg(y) 19767 v.AddArg(v1) 19768 return true 19769 } 19770 } 19771 func rewriteValue386_OpMove_0(v *Value) bool { 19772 b := v.Block 19773 typ := &b.Func.Config.Types 19774 // match: (Move [0] _ _ mem) 19775 // result: mem 19776 for { 19777 if v.AuxInt != 0 { 19778 break 19779 } 19780 mem := v.Args[2] 19781 v.reset(OpCopy) 19782 v.Type = mem.Type 19783 v.AddArg(mem) 19784 return true 19785 } 19786 // match: (Move [1] dst src mem) 19787 // result: (MOVBstore dst (MOVBload src mem) mem) 19788 for { 19789 if v.AuxInt != 1 { 19790 break 19791 } 19792 mem := v.Args[2] 19793 dst := v.Args[0] 19794 src := v.Args[1] 19795 v.reset(Op386MOVBstore) 19796 v.AddArg(dst) 19797 v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8) 19798 v0.AddArg(src) 19799 v0.AddArg(mem) 19800 v.AddArg(v0) 19801 v.AddArg(mem) 19802 return true 19803 } 19804 // match: (Move [2] dst src mem) 19805 // result: (MOVWstore dst (MOVWload src mem) mem) 19806 for { 19807 if v.AuxInt != 2 { 19808 break 19809 } 19810 mem := v.Args[2] 19811 dst := v.Args[0] 19812 src := v.Args[1] 19813 v.reset(Op386MOVWstore) 19814 v.AddArg(dst) 19815 v0 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16) 19816 v0.AddArg(src) 19817 v0.AddArg(mem) 19818 v.AddArg(v0) 19819 v.AddArg(mem) 19820 return true 19821 } 19822 // match: (Move [4] dst src mem) 19823 // result: (MOVLstore dst (MOVLload src mem) mem) 19824 for { 19825 if v.AuxInt != 4 { 19826 break 19827 } 19828 mem := v.Args[2] 19829 dst := v.Args[0] 19830 src := v.Args[1] 19831 v.reset(Op386MOVLstore) 19832 v.AddArg(dst) 19833 v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19834 v0.AddArg(src) 19835 v0.AddArg(mem) 19836 v.AddArg(v0) 19837 v.AddArg(mem) 19838 return true 19839 } 19840 // match: (Move [3] dst src mem) 19841 // result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVWstore dst (MOVWload src mem) mem)) 19842 for { 19843 if v.AuxInt != 3 { 19844 break 19845 } 19846 mem := v.Args[2] 19847 dst := v.Args[0] 19848 src := v.Args[1] 19849 v.reset(Op386MOVBstore) 19850 v.AuxInt = 2 19851 v.AddArg(dst) 19852 v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8) 19853 v0.AuxInt = 2 19854 v0.AddArg(src) 19855 v0.AddArg(mem) 19856 v.AddArg(v0) 19857 v1 := b.NewValue0(v.Pos, Op386MOVWstore, types.TypeMem) 19858 v1.AddArg(dst) 19859 v2 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16) 19860 v2.AddArg(src) 19861 v2.AddArg(mem) 19862 v1.AddArg(v2) 19863 v1.AddArg(mem) 19864 v.AddArg(v1) 19865 return true 19866 } 19867 // match: (Move [5] dst src mem) 19868 // result: (MOVBstore [4] dst (MOVBload [4] src mem) (MOVLstore dst (MOVLload src mem) mem)) 19869 for { 19870 if v.AuxInt != 5 { 19871 break 19872 } 19873 mem := v.Args[2] 19874 dst := v.Args[0] 19875 src := v.Args[1] 19876 v.reset(Op386MOVBstore) 19877 v.AuxInt = 4 19878 v.AddArg(dst) 19879 v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8) 19880 v0.AuxInt = 4 19881 v0.AddArg(src) 19882 v0.AddArg(mem) 19883 v.AddArg(v0) 19884 v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem) 19885 v1.AddArg(dst) 19886 v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19887 v2.AddArg(src) 19888 v2.AddArg(mem) 19889 v1.AddArg(v2) 19890 v1.AddArg(mem) 19891 v.AddArg(v1) 19892 return true 19893 } 19894 // match: (Move [6] dst src mem) 19895 // result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVLstore dst (MOVLload src mem) mem)) 19896 for { 19897 if v.AuxInt != 6 { 19898 break 19899 } 19900 mem := v.Args[2] 19901 dst := v.Args[0] 19902 src := v.Args[1] 19903 v.reset(Op386MOVWstore) 19904 v.AuxInt = 4 19905 v.AddArg(dst) 19906 v0 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16) 19907 v0.AuxInt = 4 19908 v0.AddArg(src) 19909 v0.AddArg(mem) 19910 v.AddArg(v0) 19911 v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem) 19912 v1.AddArg(dst) 19913 v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19914 v2.AddArg(src) 19915 v2.AddArg(mem) 19916 v1.AddArg(v2) 19917 v1.AddArg(mem) 19918 v.AddArg(v1) 19919 return true 19920 } 19921 // match: (Move [7] dst src mem) 19922 // result: (MOVLstore [3] dst (MOVLload [3] src mem) (MOVLstore dst (MOVLload src mem) mem)) 19923 for { 19924 if v.AuxInt != 7 { 19925 break 19926 } 19927 mem := v.Args[2] 19928 dst := v.Args[0] 19929 src := v.Args[1] 19930 v.reset(Op386MOVLstore) 19931 v.AuxInt = 3 19932 v.AddArg(dst) 19933 v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19934 v0.AuxInt = 3 19935 v0.AddArg(src) 19936 v0.AddArg(mem) 19937 v.AddArg(v0) 19938 v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem) 19939 v1.AddArg(dst) 19940 v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19941 v2.AddArg(src) 19942 v2.AddArg(mem) 19943 v1.AddArg(v2) 19944 v1.AddArg(mem) 19945 v.AddArg(v1) 19946 return true 19947 } 19948 // match: (Move [8] dst src mem) 19949 // result: (MOVLstore [4] dst (MOVLload [4] src mem) (MOVLstore dst (MOVLload src mem) mem)) 19950 for { 19951 if v.AuxInt != 8 { 19952 break 19953 } 19954 mem := v.Args[2] 19955 dst := v.Args[0] 19956 src := v.Args[1] 19957 v.reset(Op386MOVLstore) 19958 v.AuxInt = 4 19959 v.AddArg(dst) 19960 v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19961 v0.AuxInt = 4 19962 v0.AddArg(src) 19963 v0.AddArg(mem) 19964 v.AddArg(v0) 19965 v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem) 19966 v1.AddArg(dst) 19967 v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19968 v2.AddArg(src) 19969 v2.AddArg(mem) 19970 v1.AddArg(v2) 19971 v1.AddArg(mem) 19972 v.AddArg(v1) 19973 return true 19974 } 19975 // match: (Move [s] dst src mem) 19976 // cond: s > 8 && s%4 != 0 19977 // result: (Move [s-s%4] (ADDLconst <dst.Type> dst [s%4]) (ADDLconst <src.Type> src [s%4]) (MOVLstore dst (MOVLload src mem) mem)) 19978 for { 19979 s := v.AuxInt 19980 mem := v.Args[2] 19981 dst := v.Args[0] 19982 src := v.Args[1] 19983 if !(s > 8 && s%4 != 0) { 19984 break 19985 } 19986 v.reset(OpMove) 19987 v.AuxInt = s - s%4 19988 v0 := b.NewValue0(v.Pos, Op386ADDLconst, dst.Type) 19989 v0.AuxInt = s % 4 19990 v0.AddArg(dst) 19991 v.AddArg(v0) 19992 v1 := b.NewValue0(v.Pos, Op386ADDLconst, src.Type) 19993 v1.AuxInt = s % 4 19994 v1.AddArg(src) 19995 v.AddArg(v1) 19996 v2 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem) 19997 v2.AddArg(dst) 19998 v3 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32) 19999 v3.AddArg(src) 20000 v3.AddArg(mem) 20001 v2.AddArg(v3) 20002 v2.AddArg(mem) 20003 v.AddArg(v2) 20004 return true 20005 } 20006 return false 20007 } 20008 func rewriteValue386_OpMove_10(v *Value) bool { 20009 b := v.Block 20010 config := b.Func.Config 20011 typ := &b.Func.Config.Types 20012 // match: (Move [s] dst src mem) 20013 // cond: s > 8 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice 20014 // result: (DUFFCOPY [10*(128-s/4)] dst src mem) 20015 for { 20016 s := v.AuxInt 20017 mem := v.Args[2] 20018 dst := v.Args[0] 20019 src := v.Args[1] 20020 if !(s > 8 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice) { 20021 break 20022 } 20023 v.reset(Op386DUFFCOPY) 20024 v.AuxInt = 10 * (128 - s/4) 20025 v.AddArg(dst) 20026 v.AddArg(src) 20027 v.AddArg(mem) 20028 return true 20029 } 20030 // match: (Move [s] dst src mem) 20031 // cond: (s > 4*128 || config.noDuffDevice) && s%4 == 0 20032 // result: (REPMOVSL dst src (MOVLconst [s/4]) mem) 20033 for { 20034 s := v.AuxInt 20035 mem := v.Args[2] 20036 dst := v.Args[0] 20037 src := v.Args[1] 20038 if !((s > 4*128 || config.noDuffDevice) && s%4 == 0) { 20039 break 20040 } 20041 v.reset(Op386REPMOVSL) 20042 v.AddArg(dst) 20043 v.AddArg(src) 20044 v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32) 20045 v0.AuxInt = s / 4 20046 v.AddArg(v0) 20047 v.AddArg(mem) 20048 return true 20049 } 20050 return false 20051 } 20052 func rewriteValue386_OpMul16_0(v *Value) bool { 20053 // match: (Mul16 x y) 20054 // result: (MULL x y) 20055 for { 20056 y := v.Args[1] 20057 x := v.Args[0] 20058 v.reset(Op386MULL) 20059 v.AddArg(x) 20060 v.AddArg(y) 20061 return true 20062 } 20063 } 20064 func rewriteValue386_OpMul32_0(v *Value) bool { 20065 // match: (Mul32 x y) 20066 // result: (MULL x y) 20067 for { 20068 y := v.Args[1] 20069 x := v.Args[0] 20070 v.reset(Op386MULL) 20071 v.AddArg(x) 20072 v.AddArg(y) 20073 return true 20074 } 20075 } 20076 func rewriteValue386_OpMul32F_0(v *Value) bool { 20077 // match: (Mul32F x y) 20078 // result: (MULSS x y) 20079 for { 20080 y := v.Args[1] 20081 x := v.Args[0] 20082 v.reset(Op386MULSS) 20083 v.AddArg(x) 20084 v.AddArg(y) 20085 return true 20086 } 20087 } 20088 func rewriteValue386_OpMul32uhilo_0(v *Value) bool { 20089 // match: (Mul32uhilo x y) 20090 // result: (MULLQU x y) 20091 for { 20092 y := v.Args[1] 20093 x := v.Args[0] 20094 v.reset(Op386MULLQU) 20095 v.AddArg(x) 20096 v.AddArg(y) 20097 return true 20098 } 20099 } 20100 func rewriteValue386_OpMul64F_0(v *Value) bool { 20101 // match: (Mul64F x y) 20102 // result: (MULSD x y) 20103 for { 20104 y := v.Args[1] 20105 x := v.Args[0] 20106 v.reset(Op386MULSD) 20107 v.AddArg(x) 20108 v.AddArg(y) 20109 return true 20110 } 20111 } 20112 func rewriteValue386_OpMul8_0(v *Value) bool { 20113 // match: (Mul8 x y) 20114 // result: (MULL x y) 20115 for { 20116 y := v.Args[1] 20117 x := v.Args[0] 20118 v.reset(Op386MULL) 20119 v.AddArg(x) 20120 v.AddArg(y) 20121 return true 20122 } 20123 } 20124 func rewriteValue386_OpNeg16_0(v *Value) bool { 20125 // match: (Neg16 x) 20126 // result: (NEGL x) 20127 for { 20128 x := v.Args[0] 20129 v.reset(Op386NEGL) 20130 v.AddArg(x) 20131 return true 20132 } 20133 } 20134 func rewriteValue386_OpNeg32_0(v *Value) bool { 20135 // match: (Neg32 x) 20136 // result: (NEGL x) 20137 for { 20138 x := v.Args[0] 20139 v.reset(Op386NEGL) 20140 v.AddArg(x) 20141 return true 20142 } 20143 } 20144 func rewriteValue386_OpNeg32F_0(v *Value) bool { 20145 b := v.Block 20146 config := b.Func.Config 20147 typ := &b.Func.Config.Types 20148 // match: (Neg32F x) 20149 // cond: !config.use387 20150 // result: (PXOR x (MOVSSconst <typ.Float32> [auxFrom32F(float32(math.Copysign(0, -1)))])) 20151 for { 20152 x := v.Args[0] 20153 if !(!config.use387) { 20154 break 20155 } 20156 v.reset(Op386PXOR) 20157 v.AddArg(x) 20158 v0 := b.NewValue0(v.Pos, Op386MOVSSconst, typ.Float32) 20159 v0.AuxInt = auxFrom32F(float32(math.Copysign(0, -1))) 20160 v.AddArg(v0) 20161 return true 20162 } 20163 // match: (Neg32F x) 20164 // cond: config.use387 20165 // result: (FCHS x) 20166 for { 20167 x := v.Args[0] 20168 if !(config.use387) { 20169 break 20170 } 20171 v.reset(Op386FCHS) 20172 v.AddArg(x) 20173 return true 20174 } 20175 return false 20176 } 20177 func rewriteValue386_OpNeg64F_0(v *Value) bool { 20178 b := v.Block 20179 config := b.Func.Config 20180 typ := &b.Func.Config.Types 20181 // match: (Neg64F x) 20182 // cond: !config.use387 20183 // result: (PXOR x (MOVSDconst <typ.Float64> [auxFrom64F(math.Copysign(0, -1))])) 20184 for { 20185 x := v.Args[0] 20186 if !(!config.use387) { 20187 break 20188 } 20189 v.reset(Op386PXOR) 20190 v.AddArg(x) 20191 v0 := b.NewValue0(v.Pos, Op386MOVSDconst, typ.Float64) 20192 v0.AuxInt = auxFrom64F(math.Copysign(0, -1)) 20193 v.AddArg(v0) 20194 return true 20195 } 20196 // match: (Neg64F x) 20197 // cond: config.use387 20198 // result: (FCHS x) 20199 for { 20200 x := v.Args[0] 20201 if !(config.use387) { 20202 break 20203 } 20204 v.reset(Op386FCHS) 20205 v.AddArg(x) 20206 return true 20207 } 20208 return false 20209 } 20210 func rewriteValue386_OpNeg8_0(v *Value) bool { 20211 // match: (Neg8 x) 20212 // result: (NEGL x) 20213 for { 20214 x := v.Args[0] 20215 v.reset(Op386NEGL) 20216 v.AddArg(x) 20217 return true 20218 } 20219 } 20220 func rewriteValue386_OpNeq16_0(v *Value) bool { 20221 b := v.Block 20222 // match: (Neq16 x y) 20223 // result: (SETNE (CMPW x y)) 20224 for { 20225 y := v.Args[1] 20226 x := v.Args[0] 20227 v.reset(Op386SETNE) 20228 v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) 20229 v0.AddArg(x) 20230 v0.AddArg(y) 20231 v.AddArg(v0) 20232 return true 20233 } 20234 } 20235 func rewriteValue386_OpNeq32_0(v *Value) bool { 20236 b := v.Block 20237 // match: (Neq32 x y) 20238 // result: (SETNE (CMPL x y)) 20239 for { 20240 y := v.Args[1] 20241 x := v.Args[0] 20242 v.reset(Op386SETNE) 20243 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 20244 v0.AddArg(x) 20245 v0.AddArg(y) 20246 v.AddArg(v0) 20247 return true 20248 } 20249 } 20250 func rewriteValue386_OpNeq32F_0(v *Value) bool { 20251 b := v.Block 20252 // match: (Neq32F x y) 20253 // result: (SETNEF (UCOMISS x y)) 20254 for { 20255 y := v.Args[1] 20256 x := v.Args[0] 20257 v.reset(Op386SETNEF) 20258 v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags) 20259 v0.AddArg(x) 20260 v0.AddArg(y) 20261 v.AddArg(v0) 20262 return true 20263 } 20264 } 20265 func rewriteValue386_OpNeq64F_0(v *Value) bool { 20266 b := v.Block 20267 // match: (Neq64F x y) 20268 // result: (SETNEF (UCOMISD x y)) 20269 for { 20270 y := v.Args[1] 20271 x := v.Args[0] 20272 v.reset(Op386SETNEF) 20273 v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags) 20274 v0.AddArg(x) 20275 v0.AddArg(y) 20276 v.AddArg(v0) 20277 return true 20278 } 20279 } 20280 func rewriteValue386_OpNeq8_0(v *Value) bool { 20281 b := v.Block 20282 // match: (Neq8 x y) 20283 // result: (SETNE (CMPB x y)) 20284 for { 20285 y := v.Args[1] 20286 x := v.Args[0] 20287 v.reset(Op386SETNE) 20288 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 20289 v0.AddArg(x) 20290 v0.AddArg(y) 20291 v.AddArg(v0) 20292 return true 20293 } 20294 } 20295 func rewriteValue386_OpNeqB_0(v *Value) bool { 20296 b := v.Block 20297 // match: (NeqB x y) 20298 // result: (SETNE (CMPB x y)) 20299 for { 20300 y := v.Args[1] 20301 x := v.Args[0] 20302 v.reset(Op386SETNE) 20303 v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) 20304 v0.AddArg(x) 20305 v0.AddArg(y) 20306 v.AddArg(v0) 20307 return true 20308 } 20309 } 20310 func rewriteValue386_OpNeqPtr_0(v *Value) bool { 20311 b := v.Block 20312 // match: (NeqPtr x y) 20313 // result: (SETNE (CMPL x y)) 20314 for { 20315 y := v.Args[1] 20316 x := v.Args[0] 20317 v.reset(Op386SETNE) 20318 v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) 20319 v0.AddArg(x) 20320 v0.AddArg(y) 20321 v.AddArg(v0) 20322 return true 20323 } 20324 } 20325 func rewriteValue386_OpNilCheck_0(v *Value) bool { 20326 // match: (NilCheck ptr mem) 20327 // result: (LoweredNilCheck ptr mem) 20328 for { 20329 mem := v.Args[1] 20330 ptr := v.Args[0] 20331 v.reset(Op386LoweredNilCheck) 20332 v.AddArg(ptr) 20333 v.AddArg(mem) 20334 return true 20335 } 20336 } 20337 func rewriteValue386_OpNot_0(v *Value) bool { 20338 // match: (Not x) 20339 // result: (XORLconst [1] x) 20340 for { 20341 x := v.Args[0] 20342 v.reset(Op386XORLconst) 20343 v.AuxInt = 1 20344 v.AddArg(x) 20345 return true 20346 } 20347 } 20348 func rewriteValue386_OpOffPtr_0(v *Value) bool { 20349 // match: (OffPtr [off] ptr) 20350 // result: (ADDLconst [off] ptr) 20351 for { 20352 off := v.AuxInt 20353 ptr := v.Args[0] 20354 v.reset(Op386ADDLconst) 20355 v.AuxInt = off 20356 v.AddArg(ptr) 20357 return true 20358 } 20359 } 20360 func rewriteValue386_OpOr16_0(v *Value) bool { 20361 // match: (Or16 x y) 20362 // result: (ORL x y) 20363 for { 20364 y := v.Args[1] 20365 x := v.Args[0] 20366 v.reset(Op386ORL) 20367 v.AddArg(x) 20368 v.AddArg(y) 20369 return true 20370 } 20371 } 20372 func rewriteValue386_OpOr32_0(v *Value) bool { 20373 // match: (Or32 x y) 20374 // result: (ORL x y) 20375 for { 20376 y := v.Args[1] 20377 x := v.Args[0] 20378 v.reset(Op386ORL) 20379 v.AddArg(x) 20380 v.AddArg(y) 20381 return true 20382 } 20383 } 20384 func rewriteValue386_OpOr8_0(v *Value) bool { 20385 // match: (Or8 x y) 20386 // result: (ORL x y) 20387 for { 20388 y := v.Args[1] 20389 x := v.Args[0] 20390 v.reset(Op386ORL) 20391 v.AddArg(x) 20392 v.AddArg(y) 20393 return true 20394 } 20395 } 20396 func rewriteValue386_OpOrB_0(v *Value) bool { 20397 // match: (OrB x y) 20398 // result: (ORL x y) 20399 for { 20400 y := v.Args[1] 20401 x := v.Args[0] 20402 v.reset(Op386ORL) 20403 v.AddArg(x) 20404 v.AddArg(y) 20405 return true 20406 } 20407 } 20408 func rewriteValue386_OpPanicBounds_0(v *Value) bool { 20409 // match: (PanicBounds [kind] x y mem) 20410 // cond: boundsABI(kind) == 0 20411 // result: (LoweredPanicBoundsA [kind] x y mem) 20412 for { 20413 kind := v.AuxInt 20414 mem := v.Args[2] 20415 x := v.Args[0] 20416 y := v.Args[1] 20417 if !(boundsABI(kind) == 0) { 20418 break 20419 } 20420 v.reset(Op386LoweredPanicBoundsA) 20421 v.AuxInt = kind 20422 v.AddArg(x) 20423 v.AddArg(y) 20424 v.AddArg(mem) 20425 return true 20426 } 20427 // match: (PanicBounds [kind] x y mem) 20428 // cond: boundsABI(kind) == 1 20429 // result: (LoweredPanicBoundsB [kind] x y mem) 20430 for { 20431 kind := v.AuxInt 20432 mem := v.Args[2] 20433 x := v.Args[0] 20434 y := v.Args[1] 20435 if !(boundsABI(kind) == 1) { 20436 break 20437 } 20438 v.reset(Op386LoweredPanicBoundsB) 20439 v.AuxInt = kind 20440 v.AddArg(x) 20441 v.AddArg(y) 20442 v.AddArg(mem) 20443 return true 20444 } 20445 // match: (PanicBounds [kind] x y mem) 20446 // cond: boundsABI(kind) == 2 20447 // result: (LoweredPanicBoundsC [kind] x y mem) 20448 for { 20449 kind := v.AuxInt 20450 mem := v.Args[2] 20451 x := v.Args[0] 20452 y := v.Args[1] 20453 if !(boundsABI(kind) == 2) { 20454 break 20455 } 20456 v.reset(Op386LoweredPanicBoundsC) 20457 v.AuxInt = kind 20458 v.AddArg(x) 20459 v.AddArg(y) 20460 v.AddArg(mem) 20461 return true 20462 } 20463 return false 20464 } 20465 func rewriteValue386_OpPanicExtend_0(v *Value) bool { 20466 // match: (PanicExtend [kind] hi lo y mem) 20467 // cond: boundsABI(kind) == 0 20468 // result: (LoweredPanicExtendA [kind] hi lo y mem) 20469 for { 20470 kind := v.AuxInt 20471 mem := v.Args[3] 20472 hi := v.Args[0] 20473 lo := v.Args[1] 20474 y := v.Args[2] 20475 if !(boundsABI(kind) == 0) { 20476 break 20477 } 20478 v.reset(Op386LoweredPanicExtendA) 20479 v.AuxInt = kind 20480 v.AddArg(hi) 20481 v.AddArg(lo) 20482 v.AddArg(y) 20483 v.AddArg(mem) 20484 return true 20485 } 20486 // match: (PanicExtend [kind] hi lo y mem) 20487 // cond: boundsABI(kind) == 1 20488 // result: (LoweredPanicExtendB [kind] hi lo y mem) 20489 for { 20490 kind := v.AuxInt 20491 mem := v.Args[3] 20492 hi := v.Args[0] 20493 lo := v.Args[1] 20494 y := v.Args[2] 20495 if !(boundsABI(kind) == 1) { 20496 break 20497 } 20498 v.reset(Op386LoweredPanicExtendB) 20499 v.AuxInt = kind 20500 v.AddArg(hi) 20501 v.AddArg(lo) 20502 v.AddArg(y) 20503 v.AddArg(mem) 20504 return true 20505 } 20506 // match: (PanicExtend [kind] hi lo y mem) 20507 // cond: boundsABI(kind) == 2 20508 // result: (LoweredPanicExtendC [kind] hi lo y mem) 20509 for { 20510 kind := v.AuxInt 20511 mem := v.Args[3] 20512 hi := v.Args[0] 20513 lo := v.Args[1] 20514 y := v.Args[2] 20515 if !(boundsABI(kind) == 2) { 20516 break 20517 } 20518 v.reset(Op386LoweredPanicExtendC) 20519 v.AuxInt = kind 20520 v.AddArg(hi) 20521 v.AddArg(lo) 20522 v.AddArg(y) 20523 v.AddArg(mem) 20524 return true 20525 } 20526 return false 20527 } 20528 func rewriteValue386_OpRotateLeft16_0(v *Value) bool { 20529 // match: (RotateLeft16 x (MOVLconst [c])) 20530 // result: (ROLWconst [c&15] x) 20531 for { 20532 _ = v.Args[1] 20533 x := v.Args[0] 20534 v_1 := v.Args[1] 20535 if v_1.Op != Op386MOVLconst { 20536 break 20537 } 20538 c := v_1.AuxInt 20539 v.reset(Op386ROLWconst) 20540 v.AuxInt = c & 15 20541 v.AddArg(x) 20542 return true 20543 } 20544 return false 20545 } 20546 func rewriteValue386_OpRotateLeft32_0(v *Value) bool { 20547 // match: (RotateLeft32 x (MOVLconst [c])) 20548 // result: (ROLLconst [c&31] x) 20549 for { 20550 _ = v.Args[1] 20551 x := v.Args[0] 20552 v_1 := v.Args[1] 20553 if v_1.Op != Op386MOVLconst { 20554 break 20555 } 20556 c := v_1.AuxInt 20557 v.reset(Op386ROLLconst) 20558 v.AuxInt = c & 31 20559 v.AddArg(x) 20560 return true 20561 } 20562 return false 20563 } 20564 func rewriteValue386_OpRotateLeft8_0(v *Value) bool { 20565 // match: (RotateLeft8 x (MOVLconst [c])) 20566 // result: (ROLBconst [c&7] x) 20567 for { 20568 _ = v.Args[1] 20569 x := v.Args[0] 20570 v_1 := v.Args[1] 20571 if v_1.Op != Op386MOVLconst { 20572 break 20573 } 20574 c := v_1.AuxInt 20575 v.reset(Op386ROLBconst) 20576 v.AuxInt = c & 7 20577 v.AddArg(x) 20578 return true 20579 } 20580 return false 20581 } 20582 func rewriteValue386_OpRound32F_0(v *Value) bool { 20583 // match: (Round32F x) 20584 // result: x 20585 for { 20586 x := v.Args[0] 20587 v.reset(OpCopy) 20588 v.Type = x.Type 20589 v.AddArg(x) 20590 return true 20591 } 20592 } 20593 func rewriteValue386_OpRound64F_0(v *Value) bool { 20594 // match: (Round64F x) 20595 // result: x 20596 for { 20597 x := v.Args[0] 20598 v.reset(OpCopy) 20599 v.Type = x.Type 20600 v.AddArg(x) 20601 return true 20602 } 20603 } 20604 func rewriteValue386_OpRsh16Ux16_0(v *Value) bool { 20605 b := v.Block 20606 // match: (Rsh16Ux16 <t> x y) 20607 // result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16]))) 20608 for { 20609 t := v.Type 20610 y := v.Args[1] 20611 x := v.Args[0] 20612 v.reset(Op386ANDL) 20613 v0 := b.NewValue0(v.Pos, Op386SHRW, t) 20614 v0.AddArg(x) 20615 v0.AddArg(y) 20616 v.AddArg(v0) 20617 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20618 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 20619 v2.AuxInt = 16 20620 v2.AddArg(y) 20621 v1.AddArg(v2) 20622 v.AddArg(v1) 20623 return true 20624 } 20625 } 20626 func rewriteValue386_OpRsh16Ux32_0(v *Value) bool { 20627 b := v.Block 20628 // match: (Rsh16Ux32 <t> x y) 20629 // result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16]))) 20630 for { 20631 t := v.Type 20632 y := v.Args[1] 20633 x := v.Args[0] 20634 v.reset(Op386ANDL) 20635 v0 := b.NewValue0(v.Pos, Op386SHRW, t) 20636 v0.AddArg(x) 20637 v0.AddArg(y) 20638 v.AddArg(v0) 20639 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20640 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 20641 v2.AuxInt = 16 20642 v2.AddArg(y) 20643 v1.AddArg(v2) 20644 v.AddArg(v1) 20645 return true 20646 } 20647 } 20648 func rewriteValue386_OpRsh16Ux64_0(v *Value) bool { 20649 // match: (Rsh16Ux64 x (Const64 [c])) 20650 // cond: uint64(c) < 16 20651 // result: (SHRWconst x [c]) 20652 for { 20653 _ = v.Args[1] 20654 x := v.Args[0] 20655 v_1 := v.Args[1] 20656 if v_1.Op != OpConst64 { 20657 break 20658 } 20659 c := v_1.AuxInt 20660 if !(uint64(c) < 16) { 20661 break 20662 } 20663 v.reset(Op386SHRWconst) 20664 v.AuxInt = c 20665 v.AddArg(x) 20666 return true 20667 } 20668 // match: (Rsh16Ux64 _ (Const64 [c])) 20669 // cond: uint64(c) >= 16 20670 // result: (Const16 [0]) 20671 for { 20672 _ = v.Args[1] 20673 v_1 := v.Args[1] 20674 if v_1.Op != OpConst64 { 20675 break 20676 } 20677 c := v_1.AuxInt 20678 if !(uint64(c) >= 16) { 20679 break 20680 } 20681 v.reset(OpConst16) 20682 v.AuxInt = 0 20683 return true 20684 } 20685 return false 20686 } 20687 func rewriteValue386_OpRsh16Ux8_0(v *Value) bool { 20688 b := v.Block 20689 // match: (Rsh16Ux8 <t> x y) 20690 // result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16]))) 20691 for { 20692 t := v.Type 20693 y := v.Args[1] 20694 x := v.Args[0] 20695 v.reset(Op386ANDL) 20696 v0 := b.NewValue0(v.Pos, Op386SHRW, t) 20697 v0.AddArg(x) 20698 v0.AddArg(y) 20699 v.AddArg(v0) 20700 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20701 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 20702 v2.AuxInt = 16 20703 v2.AddArg(y) 20704 v1.AddArg(v2) 20705 v.AddArg(v1) 20706 return true 20707 } 20708 } 20709 func rewriteValue386_OpRsh16x16_0(v *Value) bool { 20710 b := v.Block 20711 // match: (Rsh16x16 <t> x y) 20712 // result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [16]))))) 20713 for { 20714 t := v.Type 20715 y := v.Args[1] 20716 x := v.Args[0] 20717 v.reset(Op386SARW) 20718 v.Type = t 20719 v.AddArg(x) 20720 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 20721 v0.AddArg(y) 20722 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 20723 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 20724 v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 20725 v3.AuxInt = 16 20726 v3.AddArg(y) 20727 v2.AddArg(v3) 20728 v1.AddArg(v2) 20729 v0.AddArg(v1) 20730 v.AddArg(v0) 20731 return true 20732 } 20733 } 20734 func rewriteValue386_OpRsh16x32_0(v *Value) bool { 20735 b := v.Block 20736 // match: (Rsh16x32 <t> x y) 20737 // result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [16]))))) 20738 for { 20739 t := v.Type 20740 y := v.Args[1] 20741 x := v.Args[0] 20742 v.reset(Op386SARW) 20743 v.Type = t 20744 v.AddArg(x) 20745 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 20746 v0.AddArg(y) 20747 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 20748 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 20749 v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 20750 v3.AuxInt = 16 20751 v3.AddArg(y) 20752 v2.AddArg(v3) 20753 v1.AddArg(v2) 20754 v0.AddArg(v1) 20755 v.AddArg(v0) 20756 return true 20757 } 20758 } 20759 func rewriteValue386_OpRsh16x64_0(v *Value) bool { 20760 // match: (Rsh16x64 x (Const64 [c])) 20761 // cond: uint64(c) < 16 20762 // result: (SARWconst x [c]) 20763 for { 20764 _ = v.Args[1] 20765 x := v.Args[0] 20766 v_1 := v.Args[1] 20767 if v_1.Op != OpConst64 { 20768 break 20769 } 20770 c := v_1.AuxInt 20771 if !(uint64(c) < 16) { 20772 break 20773 } 20774 v.reset(Op386SARWconst) 20775 v.AuxInt = c 20776 v.AddArg(x) 20777 return true 20778 } 20779 // match: (Rsh16x64 x (Const64 [c])) 20780 // cond: uint64(c) >= 16 20781 // result: (SARWconst x [15]) 20782 for { 20783 _ = v.Args[1] 20784 x := v.Args[0] 20785 v_1 := v.Args[1] 20786 if v_1.Op != OpConst64 { 20787 break 20788 } 20789 c := v_1.AuxInt 20790 if !(uint64(c) >= 16) { 20791 break 20792 } 20793 v.reset(Op386SARWconst) 20794 v.AuxInt = 15 20795 v.AddArg(x) 20796 return true 20797 } 20798 return false 20799 } 20800 func rewriteValue386_OpRsh16x8_0(v *Value) bool { 20801 b := v.Block 20802 // match: (Rsh16x8 <t> x y) 20803 // result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [16]))))) 20804 for { 20805 t := v.Type 20806 y := v.Args[1] 20807 x := v.Args[0] 20808 v.reset(Op386SARW) 20809 v.Type = t 20810 v.AddArg(x) 20811 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 20812 v0.AddArg(y) 20813 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 20814 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 20815 v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 20816 v3.AuxInt = 16 20817 v3.AddArg(y) 20818 v2.AddArg(v3) 20819 v1.AddArg(v2) 20820 v0.AddArg(v1) 20821 v.AddArg(v0) 20822 return true 20823 } 20824 } 20825 func rewriteValue386_OpRsh32Ux16_0(v *Value) bool { 20826 b := v.Block 20827 // match: (Rsh32Ux16 <t> x y) 20828 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32]))) 20829 for { 20830 t := v.Type 20831 y := v.Args[1] 20832 x := v.Args[0] 20833 v.reset(Op386ANDL) 20834 v0 := b.NewValue0(v.Pos, Op386SHRL, t) 20835 v0.AddArg(x) 20836 v0.AddArg(y) 20837 v.AddArg(v0) 20838 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20839 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 20840 v2.AuxInt = 32 20841 v2.AddArg(y) 20842 v1.AddArg(v2) 20843 v.AddArg(v1) 20844 return true 20845 } 20846 } 20847 func rewriteValue386_OpRsh32Ux32_0(v *Value) bool { 20848 b := v.Block 20849 // match: (Rsh32Ux32 <t> x y) 20850 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32]))) 20851 for { 20852 t := v.Type 20853 y := v.Args[1] 20854 x := v.Args[0] 20855 v.reset(Op386ANDL) 20856 v0 := b.NewValue0(v.Pos, Op386SHRL, t) 20857 v0.AddArg(x) 20858 v0.AddArg(y) 20859 v.AddArg(v0) 20860 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20861 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 20862 v2.AuxInt = 32 20863 v2.AddArg(y) 20864 v1.AddArg(v2) 20865 v.AddArg(v1) 20866 return true 20867 } 20868 } 20869 func rewriteValue386_OpRsh32Ux64_0(v *Value) bool { 20870 // match: (Rsh32Ux64 x (Const64 [c])) 20871 // cond: uint64(c) < 32 20872 // result: (SHRLconst x [c]) 20873 for { 20874 _ = v.Args[1] 20875 x := v.Args[0] 20876 v_1 := v.Args[1] 20877 if v_1.Op != OpConst64 { 20878 break 20879 } 20880 c := v_1.AuxInt 20881 if !(uint64(c) < 32) { 20882 break 20883 } 20884 v.reset(Op386SHRLconst) 20885 v.AuxInt = c 20886 v.AddArg(x) 20887 return true 20888 } 20889 // match: (Rsh32Ux64 _ (Const64 [c])) 20890 // cond: uint64(c) >= 32 20891 // result: (Const32 [0]) 20892 for { 20893 _ = v.Args[1] 20894 v_1 := v.Args[1] 20895 if v_1.Op != OpConst64 { 20896 break 20897 } 20898 c := v_1.AuxInt 20899 if !(uint64(c) >= 32) { 20900 break 20901 } 20902 v.reset(OpConst32) 20903 v.AuxInt = 0 20904 return true 20905 } 20906 return false 20907 } 20908 func rewriteValue386_OpRsh32Ux8_0(v *Value) bool { 20909 b := v.Block 20910 // match: (Rsh32Ux8 <t> x y) 20911 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32]))) 20912 for { 20913 t := v.Type 20914 y := v.Args[1] 20915 x := v.Args[0] 20916 v.reset(Op386ANDL) 20917 v0 := b.NewValue0(v.Pos, Op386SHRL, t) 20918 v0.AddArg(x) 20919 v0.AddArg(y) 20920 v.AddArg(v0) 20921 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 20922 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 20923 v2.AuxInt = 32 20924 v2.AddArg(y) 20925 v1.AddArg(v2) 20926 v.AddArg(v1) 20927 return true 20928 } 20929 } 20930 func rewriteValue386_OpRsh32x16_0(v *Value) bool { 20931 b := v.Block 20932 // match: (Rsh32x16 <t> x y) 20933 // result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [32]))))) 20934 for { 20935 t := v.Type 20936 y := v.Args[1] 20937 x := v.Args[0] 20938 v.reset(Op386SARL) 20939 v.Type = t 20940 v.AddArg(x) 20941 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 20942 v0.AddArg(y) 20943 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 20944 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 20945 v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 20946 v3.AuxInt = 32 20947 v3.AddArg(y) 20948 v2.AddArg(v3) 20949 v1.AddArg(v2) 20950 v0.AddArg(v1) 20951 v.AddArg(v0) 20952 return true 20953 } 20954 } 20955 func rewriteValue386_OpRsh32x32_0(v *Value) bool { 20956 b := v.Block 20957 // match: (Rsh32x32 <t> x y) 20958 // result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [32]))))) 20959 for { 20960 t := v.Type 20961 y := v.Args[1] 20962 x := v.Args[0] 20963 v.reset(Op386SARL) 20964 v.Type = t 20965 v.AddArg(x) 20966 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 20967 v0.AddArg(y) 20968 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 20969 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 20970 v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 20971 v3.AuxInt = 32 20972 v3.AddArg(y) 20973 v2.AddArg(v3) 20974 v1.AddArg(v2) 20975 v0.AddArg(v1) 20976 v.AddArg(v0) 20977 return true 20978 } 20979 } 20980 func rewriteValue386_OpRsh32x64_0(v *Value) bool { 20981 // match: (Rsh32x64 x (Const64 [c])) 20982 // cond: uint64(c) < 32 20983 // result: (SARLconst x [c]) 20984 for { 20985 _ = v.Args[1] 20986 x := v.Args[0] 20987 v_1 := v.Args[1] 20988 if v_1.Op != OpConst64 { 20989 break 20990 } 20991 c := v_1.AuxInt 20992 if !(uint64(c) < 32) { 20993 break 20994 } 20995 v.reset(Op386SARLconst) 20996 v.AuxInt = c 20997 v.AddArg(x) 20998 return true 20999 } 21000 // match: (Rsh32x64 x (Const64 [c])) 21001 // cond: uint64(c) >= 32 21002 // result: (SARLconst x [31]) 21003 for { 21004 _ = v.Args[1] 21005 x := v.Args[0] 21006 v_1 := v.Args[1] 21007 if v_1.Op != OpConst64 { 21008 break 21009 } 21010 c := v_1.AuxInt 21011 if !(uint64(c) >= 32) { 21012 break 21013 } 21014 v.reset(Op386SARLconst) 21015 v.AuxInt = 31 21016 v.AddArg(x) 21017 return true 21018 } 21019 return false 21020 } 21021 func rewriteValue386_OpRsh32x8_0(v *Value) bool { 21022 b := v.Block 21023 // match: (Rsh32x8 <t> x y) 21024 // result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [32]))))) 21025 for { 21026 t := v.Type 21027 y := v.Args[1] 21028 x := v.Args[0] 21029 v.reset(Op386SARL) 21030 v.Type = t 21031 v.AddArg(x) 21032 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 21033 v0.AddArg(y) 21034 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 21035 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 21036 v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 21037 v3.AuxInt = 32 21038 v3.AddArg(y) 21039 v2.AddArg(v3) 21040 v1.AddArg(v2) 21041 v0.AddArg(v1) 21042 v.AddArg(v0) 21043 return true 21044 } 21045 } 21046 func rewriteValue386_OpRsh8Ux16_0(v *Value) bool { 21047 b := v.Block 21048 // match: (Rsh8Ux16 <t> x y) 21049 // result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8]))) 21050 for { 21051 t := v.Type 21052 y := v.Args[1] 21053 x := v.Args[0] 21054 v.reset(Op386ANDL) 21055 v0 := b.NewValue0(v.Pos, Op386SHRB, t) 21056 v0.AddArg(x) 21057 v0.AddArg(y) 21058 v.AddArg(v0) 21059 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 21060 v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 21061 v2.AuxInt = 8 21062 v2.AddArg(y) 21063 v1.AddArg(v2) 21064 v.AddArg(v1) 21065 return true 21066 } 21067 } 21068 func rewriteValue386_OpRsh8Ux32_0(v *Value) bool { 21069 b := v.Block 21070 // match: (Rsh8Ux32 <t> x y) 21071 // result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8]))) 21072 for { 21073 t := v.Type 21074 y := v.Args[1] 21075 x := v.Args[0] 21076 v.reset(Op386ANDL) 21077 v0 := b.NewValue0(v.Pos, Op386SHRB, t) 21078 v0.AddArg(x) 21079 v0.AddArg(y) 21080 v.AddArg(v0) 21081 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 21082 v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 21083 v2.AuxInt = 8 21084 v2.AddArg(y) 21085 v1.AddArg(v2) 21086 v.AddArg(v1) 21087 return true 21088 } 21089 } 21090 func rewriteValue386_OpRsh8Ux64_0(v *Value) bool { 21091 // match: (Rsh8Ux64 x (Const64 [c])) 21092 // cond: uint64(c) < 8 21093 // result: (SHRBconst x [c]) 21094 for { 21095 _ = v.Args[1] 21096 x := v.Args[0] 21097 v_1 := v.Args[1] 21098 if v_1.Op != OpConst64 { 21099 break 21100 } 21101 c := v_1.AuxInt 21102 if !(uint64(c) < 8) { 21103 break 21104 } 21105 v.reset(Op386SHRBconst) 21106 v.AuxInt = c 21107 v.AddArg(x) 21108 return true 21109 } 21110 // match: (Rsh8Ux64 _ (Const64 [c])) 21111 // cond: uint64(c) >= 8 21112 // result: (Const8 [0]) 21113 for { 21114 _ = v.Args[1] 21115 v_1 := v.Args[1] 21116 if v_1.Op != OpConst64 { 21117 break 21118 } 21119 c := v_1.AuxInt 21120 if !(uint64(c) >= 8) { 21121 break 21122 } 21123 v.reset(OpConst8) 21124 v.AuxInt = 0 21125 return true 21126 } 21127 return false 21128 } 21129 func rewriteValue386_OpRsh8Ux8_0(v *Value) bool { 21130 b := v.Block 21131 // match: (Rsh8Ux8 <t> x y) 21132 // result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8]))) 21133 for { 21134 t := v.Type 21135 y := v.Args[1] 21136 x := v.Args[0] 21137 v.reset(Op386ANDL) 21138 v0 := b.NewValue0(v.Pos, Op386SHRB, t) 21139 v0.AddArg(x) 21140 v0.AddArg(y) 21141 v.AddArg(v0) 21142 v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 21143 v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 21144 v2.AuxInt = 8 21145 v2.AddArg(y) 21146 v1.AddArg(v2) 21147 v.AddArg(v1) 21148 return true 21149 } 21150 } 21151 func rewriteValue386_OpRsh8x16_0(v *Value) bool { 21152 b := v.Block 21153 // match: (Rsh8x16 <t> x y) 21154 // result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [8]))))) 21155 for { 21156 t := v.Type 21157 y := v.Args[1] 21158 x := v.Args[0] 21159 v.reset(Op386SARB) 21160 v.Type = t 21161 v.AddArg(x) 21162 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 21163 v0.AddArg(y) 21164 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 21165 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 21166 v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) 21167 v3.AuxInt = 8 21168 v3.AddArg(y) 21169 v2.AddArg(v3) 21170 v1.AddArg(v2) 21171 v0.AddArg(v1) 21172 v.AddArg(v0) 21173 return true 21174 } 21175 } 21176 func rewriteValue386_OpRsh8x32_0(v *Value) bool { 21177 b := v.Block 21178 // match: (Rsh8x32 <t> x y) 21179 // result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [8]))))) 21180 for { 21181 t := v.Type 21182 y := v.Args[1] 21183 x := v.Args[0] 21184 v.reset(Op386SARB) 21185 v.Type = t 21186 v.AddArg(x) 21187 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 21188 v0.AddArg(y) 21189 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 21190 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 21191 v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 21192 v3.AuxInt = 8 21193 v3.AddArg(y) 21194 v2.AddArg(v3) 21195 v1.AddArg(v2) 21196 v0.AddArg(v1) 21197 v.AddArg(v0) 21198 return true 21199 } 21200 } 21201 func rewriteValue386_OpRsh8x64_0(v *Value) bool { 21202 // match: (Rsh8x64 x (Const64 [c])) 21203 // cond: uint64(c) < 8 21204 // result: (SARBconst x [c]) 21205 for { 21206 _ = v.Args[1] 21207 x := v.Args[0] 21208 v_1 := v.Args[1] 21209 if v_1.Op != OpConst64 { 21210 break 21211 } 21212 c := v_1.AuxInt 21213 if !(uint64(c) < 8) { 21214 break 21215 } 21216 v.reset(Op386SARBconst) 21217 v.AuxInt = c 21218 v.AddArg(x) 21219 return true 21220 } 21221 // match: (Rsh8x64 x (Const64 [c])) 21222 // cond: uint64(c) >= 8 21223 // result: (SARBconst x [7]) 21224 for { 21225 _ = v.Args[1] 21226 x := v.Args[0] 21227 v_1 := v.Args[1] 21228 if v_1.Op != OpConst64 { 21229 break 21230 } 21231 c := v_1.AuxInt 21232 if !(uint64(c) >= 8) { 21233 break 21234 } 21235 v.reset(Op386SARBconst) 21236 v.AuxInt = 7 21237 v.AddArg(x) 21238 return true 21239 } 21240 return false 21241 } 21242 func rewriteValue386_OpRsh8x8_0(v *Value) bool { 21243 b := v.Block 21244 // match: (Rsh8x8 <t> x y) 21245 // result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [8]))))) 21246 for { 21247 t := v.Type 21248 y := v.Args[1] 21249 x := v.Args[0] 21250 v.reset(Op386SARB) 21251 v.Type = t 21252 v.AddArg(x) 21253 v0 := b.NewValue0(v.Pos, Op386ORL, y.Type) 21254 v0.AddArg(y) 21255 v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type) 21256 v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type) 21257 v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) 21258 v3.AuxInt = 8 21259 v3.AddArg(y) 21260 v2.AddArg(v3) 21261 v1.AddArg(v2) 21262 v0.AddArg(v1) 21263 v.AddArg(v0) 21264 return true 21265 } 21266 } 21267 func rewriteValue386_OpSelect0_0(v *Value) bool { 21268 b := v.Block 21269 typ := &b.Func.Config.Types 21270 // match: (Select0 (Mul32uover x y)) 21271 // result: (Select0 <typ.UInt32> (MULLU x y)) 21272 for { 21273 v_0 := v.Args[0] 21274 if v_0.Op != OpMul32uover { 21275 break 21276 } 21277 y := v_0.Args[1] 21278 x := v_0.Args[0] 21279 v.reset(OpSelect0) 21280 v.Type = typ.UInt32 21281 v0 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags)) 21282 v0.AddArg(x) 21283 v0.AddArg(y) 21284 v.AddArg(v0) 21285 return true 21286 } 21287 return false 21288 } 21289 func rewriteValue386_OpSelect1_0(v *Value) bool { 21290 b := v.Block 21291 typ := &b.Func.Config.Types 21292 // match: (Select1 (Mul32uover x y)) 21293 // result: (SETO (Select1 <types.TypeFlags> (MULLU x y))) 21294 for { 21295 v_0 := v.Args[0] 21296 if v_0.Op != OpMul32uover { 21297 break 21298 } 21299 y := v_0.Args[1] 21300 x := v_0.Args[0] 21301 v.reset(Op386SETO) 21302 v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags) 21303 v1 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags)) 21304 v1.AddArg(x) 21305 v1.AddArg(y) 21306 v0.AddArg(v1) 21307 v.AddArg(v0) 21308 return true 21309 } 21310 return false 21311 } 21312 func rewriteValue386_OpSignExt16to32_0(v *Value) bool { 21313 // match: (SignExt16to32 x) 21314 // result: (MOVWLSX x) 21315 for { 21316 x := v.Args[0] 21317 v.reset(Op386MOVWLSX) 21318 v.AddArg(x) 21319 return true 21320 } 21321 } 21322 func rewriteValue386_OpSignExt8to16_0(v *Value) bool { 21323 // match: (SignExt8to16 x) 21324 // result: (MOVBLSX x) 21325 for { 21326 x := v.Args[0] 21327 v.reset(Op386MOVBLSX) 21328 v.AddArg(x) 21329 return true 21330 } 21331 } 21332 func rewriteValue386_OpSignExt8to32_0(v *Value) bool { 21333 // match: (SignExt8to32 x) 21334 // result: (MOVBLSX x) 21335 for { 21336 x := v.Args[0] 21337 v.reset(Op386MOVBLSX) 21338 v.AddArg(x) 21339 return true 21340 } 21341 } 21342 func rewriteValue386_OpSignmask_0(v *Value) bool { 21343 // match: (Signmask x) 21344 // result: (SARLconst x [31]) 21345 for { 21346 x := v.Args[0] 21347 v.reset(Op386SARLconst) 21348 v.AuxInt = 31 21349 v.AddArg(x) 21350 return true 21351 } 21352 } 21353 func rewriteValue386_OpSlicemask_0(v *Value) bool { 21354 b := v.Block 21355 // match: (Slicemask <t> x) 21356 // result: (SARLconst (NEGL <t> x) [31]) 21357 for { 21358 t := v.Type 21359 x := v.Args[0] 21360 v.reset(Op386SARLconst) 21361 v.AuxInt = 31 21362 v0 := b.NewValue0(v.Pos, Op386NEGL, t) 21363 v0.AddArg(x) 21364 v.AddArg(v0) 21365 return true 21366 } 21367 } 21368 func rewriteValue386_OpSqrt_0(v *Value) bool { 21369 // match: (Sqrt x) 21370 // result: (SQRTSD x) 21371 for { 21372 x := v.Args[0] 21373 v.reset(Op386SQRTSD) 21374 v.AddArg(x) 21375 return true 21376 } 21377 } 21378 func rewriteValue386_OpStaticCall_0(v *Value) bool { 21379 // match: (StaticCall [argwid] {target} mem) 21380 // result: (CALLstatic [argwid] {target} mem) 21381 for { 21382 argwid := v.AuxInt 21383 target := v.Aux 21384 mem := v.Args[0] 21385 v.reset(Op386CALLstatic) 21386 v.AuxInt = argwid 21387 v.Aux = target 21388 v.AddArg(mem) 21389 return true 21390 } 21391 } 21392 func rewriteValue386_OpStore_0(v *Value) bool { 21393 // match: (Store {t} ptr val mem) 21394 // cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type) 21395 // result: (MOVSDstore ptr val mem) 21396 for { 21397 t := v.Aux 21398 mem := v.Args[2] 21399 ptr := v.Args[0] 21400 val := v.Args[1] 21401 if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) { 21402 break 21403 } 21404 v.reset(Op386MOVSDstore) 21405 v.AddArg(ptr) 21406 v.AddArg(val) 21407 v.AddArg(mem) 21408 return true 21409 } 21410 // match: (Store {t} ptr val mem) 21411 // cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type) 21412 // result: (MOVSSstore ptr val mem) 21413 for { 21414 t := v.Aux 21415 mem := v.Args[2] 21416 ptr := v.Args[0] 21417 val := v.Args[1] 21418 if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) { 21419 break 21420 } 21421 v.reset(Op386MOVSSstore) 21422 v.AddArg(ptr) 21423 v.AddArg(val) 21424 v.AddArg(mem) 21425 return true 21426 } 21427 // match: (Store {t} ptr val mem) 21428 // cond: t.(*types.Type).Size() == 4 21429 // result: (MOVLstore ptr val mem) 21430 for { 21431 t := v.Aux 21432 mem := v.Args[2] 21433 ptr := v.Args[0] 21434 val := v.Args[1] 21435 if !(t.(*types.Type).Size() == 4) { 21436 break 21437 } 21438 v.reset(Op386MOVLstore) 21439 v.AddArg(ptr) 21440 v.AddArg(val) 21441 v.AddArg(mem) 21442 return true 21443 } 21444 // match: (Store {t} ptr val mem) 21445 // cond: t.(*types.Type).Size() == 2 21446 // result: (MOVWstore ptr val mem) 21447 for { 21448 t := v.Aux 21449 mem := v.Args[2] 21450 ptr := v.Args[0] 21451 val := v.Args[1] 21452 if !(t.(*types.Type).Size() == 2) { 21453 break 21454 } 21455 v.reset(Op386MOVWstore) 21456 v.AddArg(ptr) 21457 v.AddArg(val) 21458 v.AddArg(mem) 21459 return true 21460 } 21461 // match: (Store {t} ptr val mem) 21462 // cond: t.(*types.Type).Size() == 1 21463 // result: (MOVBstore ptr val mem) 21464 for { 21465 t := v.Aux 21466 mem := v.Args[2] 21467 ptr := v.Args[0] 21468 val := v.Args[1] 21469 if !(t.(*types.Type).Size() == 1) { 21470 break 21471 } 21472 v.reset(Op386MOVBstore) 21473 v.AddArg(ptr) 21474 v.AddArg(val) 21475 v.AddArg(mem) 21476 return true 21477 } 21478 return false 21479 } 21480 func rewriteValue386_OpSub16_0(v *Value) bool { 21481 // match: (Sub16 x y) 21482 // result: (SUBL x y) 21483 for { 21484 y := v.Args[1] 21485 x := v.Args[0] 21486 v.reset(Op386SUBL) 21487 v.AddArg(x) 21488 v.AddArg(y) 21489 return true 21490 } 21491 } 21492 func rewriteValue386_OpSub32_0(v *Value) bool { 21493 // match: (Sub32 x y) 21494 // result: (SUBL x y) 21495 for { 21496 y := v.Args[1] 21497 x := v.Args[0] 21498 v.reset(Op386SUBL) 21499 v.AddArg(x) 21500 v.AddArg(y) 21501 return true 21502 } 21503 } 21504 func rewriteValue386_OpSub32F_0(v *Value) bool { 21505 // match: (Sub32F x y) 21506 // result: (SUBSS x y) 21507 for { 21508 y := v.Args[1] 21509 x := v.Args[0] 21510 v.reset(Op386SUBSS) 21511 v.AddArg(x) 21512 v.AddArg(y) 21513 return true 21514 } 21515 } 21516 func rewriteValue386_OpSub32carry_0(v *Value) bool { 21517 // match: (Sub32carry x y) 21518 // result: (SUBLcarry x y) 21519 for { 21520 y := v.Args[1] 21521 x := v.Args[0] 21522 v.reset(Op386SUBLcarry) 21523 v.AddArg(x) 21524 v.AddArg(y) 21525 return true 21526 } 21527 } 21528 func rewriteValue386_OpSub32withcarry_0(v *Value) bool { 21529 // match: (Sub32withcarry x y c) 21530 // result: (SBBL x y c) 21531 for { 21532 c := v.Args[2] 21533 x := v.Args[0] 21534 y := v.Args[1] 21535 v.reset(Op386SBBL) 21536 v.AddArg(x) 21537 v.AddArg(y) 21538 v.AddArg(c) 21539 return true 21540 } 21541 } 21542 func rewriteValue386_OpSub64F_0(v *Value) bool { 21543 // match: (Sub64F x y) 21544 // result: (SUBSD x y) 21545 for { 21546 y := v.Args[1] 21547 x := v.Args[0] 21548 v.reset(Op386SUBSD) 21549 v.AddArg(x) 21550 v.AddArg(y) 21551 return true 21552 } 21553 } 21554 func rewriteValue386_OpSub8_0(v *Value) bool { 21555 // match: (Sub8 x y) 21556 // result: (SUBL x y) 21557 for { 21558 y := v.Args[1] 21559 x := v.Args[0] 21560 v.reset(Op386SUBL) 21561 v.AddArg(x) 21562 v.AddArg(y) 21563 return true 21564 } 21565 } 21566 func rewriteValue386_OpSubPtr_0(v *Value) bool { 21567 // match: (SubPtr x y) 21568 // result: (SUBL x y) 21569 for { 21570 y := v.Args[1] 21571 x := v.Args[0] 21572 v.reset(Op386SUBL) 21573 v.AddArg(x) 21574 v.AddArg(y) 21575 return true 21576 } 21577 } 21578 func rewriteValue386_OpTrunc16to8_0(v *Value) bool { 21579 // match: (Trunc16to8 x) 21580 // result: x 21581 for { 21582 x := v.Args[0] 21583 v.reset(OpCopy) 21584 v.Type = x.Type 21585 v.AddArg(x) 21586 return true 21587 } 21588 } 21589 func rewriteValue386_OpTrunc32to16_0(v *Value) bool { 21590 // match: (Trunc32to16 x) 21591 // result: x 21592 for { 21593 x := v.Args[0] 21594 v.reset(OpCopy) 21595 v.Type = x.Type 21596 v.AddArg(x) 21597 return true 21598 } 21599 } 21600 func rewriteValue386_OpTrunc32to8_0(v *Value) bool { 21601 // match: (Trunc32to8 x) 21602 // result: x 21603 for { 21604 x := v.Args[0] 21605 v.reset(OpCopy) 21606 v.Type = x.Type 21607 v.AddArg(x) 21608 return true 21609 } 21610 } 21611 func rewriteValue386_OpWB_0(v *Value) bool { 21612 // match: (WB {fn} destptr srcptr mem) 21613 // result: (LoweredWB {fn} destptr srcptr mem) 21614 for { 21615 fn := v.Aux 21616 mem := v.Args[2] 21617 destptr := v.Args[0] 21618 srcptr := v.Args[1] 21619 v.reset(Op386LoweredWB) 21620 v.Aux = fn 21621 v.AddArg(destptr) 21622 v.AddArg(srcptr) 21623 v.AddArg(mem) 21624 return true 21625 } 21626 } 21627 func rewriteValue386_OpXor16_0(v *Value) bool { 21628 // match: (Xor16 x y) 21629 // result: (XORL x y) 21630 for { 21631 y := v.Args[1] 21632 x := v.Args[0] 21633 v.reset(Op386XORL) 21634 v.AddArg(x) 21635 v.AddArg(y) 21636 return true 21637 } 21638 } 21639 func rewriteValue386_OpXor32_0(v *Value) bool { 21640 // match: (Xor32 x y) 21641 // result: (XORL x y) 21642 for { 21643 y := v.Args[1] 21644 x := v.Args[0] 21645 v.reset(Op386XORL) 21646 v.AddArg(x) 21647 v.AddArg(y) 21648 return true 21649 } 21650 } 21651 func rewriteValue386_OpXor8_0(v *Value) bool { 21652 // match: (Xor8 x y) 21653 // result: (XORL x y) 21654 for { 21655 y := v.Args[1] 21656 x := v.Args[0] 21657 v.reset(Op386XORL) 21658 v.AddArg(x) 21659 v.AddArg(y) 21660 return true 21661 } 21662 } 21663 func rewriteValue386_OpZero_0(v *Value) bool { 21664 b := v.Block 21665 typ := &b.Func.Config.Types 21666 // match: (Zero [0] _ mem) 21667 // result: mem 21668 for { 21669 if v.AuxInt != 0 { 21670 break 21671 } 21672 mem := v.Args[1] 21673 v.reset(OpCopy) 21674 v.Type = mem.Type 21675 v.AddArg(mem) 21676 return true 21677 } 21678 // match: (Zero [1] destptr mem) 21679 // result: (MOVBstoreconst [0] destptr mem) 21680 for { 21681 if v.AuxInt != 1 { 21682 break 21683 } 21684 mem := v.Args[1] 21685 destptr := v.Args[0] 21686 v.reset(Op386MOVBstoreconst) 21687 v.AuxInt = 0 21688 v.AddArg(destptr) 21689 v.AddArg(mem) 21690 return true 21691 } 21692 // match: (Zero [2] destptr mem) 21693 // result: (MOVWstoreconst [0] destptr mem) 21694 for { 21695 if v.AuxInt != 2 { 21696 break 21697 } 21698 mem := v.Args[1] 21699 destptr := v.Args[0] 21700 v.reset(Op386MOVWstoreconst) 21701 v.AuxInt = 0 21702 v.AddArg(destptr) 21703 v.AddArg(mem) 21704 return true 21705 } 21706 // match: (Zero [4] destptr mem) 21707 // result: (MOVLstoreconst [0] destptr mem) 21708 for { 21709 if v.AuxInt != 4 { 21710 break 21711 } 21712 mem := v.Args[1] 21713 destptr := v.Args[0] 21714 v.reset(Op386MOVLstoreconst) 21715 v.AuxInt = 0 21716 v.AddArg(destptr) 21717 v.AddArg(mem) 21718 return true 21719 } 21720 // match: (Zero [3] destptr mem) 21721 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVWstoreconst [0] destptr mem)) 21722 for { 21723 if v.AuxInt != 3 { 21724 break 21725 } 21726 mem := v.Args[1] 21727 destptr := v.Args[0] 21728 v.reset(Op386MOVBstoreconst) 21729 v.AuxInt = makeValAndOff(0, 2) 21730 v.AddArg(destptr) 21731 v0 := b.NewValue0(v.Pos, Op386MOVWstoreconst, types.TypeMem) 21732 v0.AuxInt = 0 21733 v0.AddArg(destptr) 21734 v0.AddArg(mem) 21735 v.AddArg(v0) 21736 return true 21737 } 21738 // match: (Zero [5] destptr mem) 21739 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem)) 21740 for { 21741 if v.AuxInt != 5 { 21742 break 21743 } 21744 mem := v.Args[1] 21745 destptr := v.Args[0] 21746 v.reset(Op386MOVBstoreconst) 21747 v.AuxInt = makeValAndOff(0, 4) 21748 v.AddArg(destptr) 21749 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21750 v0.AuxInt = 0 21751 v0.AddArg(destptr) 21752 v0.AddArg(mem) 21753 v.AddArg(v0) 21754 return true 21755 } 21756 // match: (Zero [6] destptr mem) 21757 // result: (MOVWstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem)) 21758 for { 21759 if v.AuxInt != 6 { 21760 break 21761 } 21762 mem := v.Args[1] 21763 destptr := v.Args[0] 21764 v.reset(Op386MOVWstoreconst) 21765 v.AuxInt = makeValAndOff(0, 4) 21766 v.AddArg(destptr) 21767 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21768 v0.AuxInt = 0 21769 v0.AddArg(destptr) 21770 v0.AddArg(mem) 21771 v.AddArg(v0) 21772 return true 21773 } 21774 // match: (Zero [7] destptr mem) 21775 // result: (MOVLstoreconst [makeValAndOff(0,3)] destptr (MOVLstoreconst [0] destptr mem)) 21776 for { 21777 if v.AuxInt != 7 { 21778 break 21779 } 21780 mem := v.Args[1] 21781 destptr := v.Args[0] 21782 v.reset(Op386MOVLstoreconst) 21783 v.AuxInt = makeValAndOff(0, 3) 21784 v.AddArg(destptr) 21785 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21786 v0.AuxInt = 0 21787 v0.AddArg(destptr) 21788 v0.AddArg(mem) 21789 v.AddArg(v0) 21790 return true 21791 } 21792 // match: (Zero [s] destptr mem) 21793 // cond: s%4 != 0 && s > 4 21794 // result: (Zero [s-s%4] (ADDLconst destptr [s%4]) (MOVLstoreconst [0] destptr mem)) 21795 for { 21796 s := v.AuxInt 21797 mem := v.Args[1] 21798 destptr := v.Args[0] 21799 if !(s%4 != 0 && s > 4) { 21800 break 21801 } 21802 v.reset(OpZero) 21803 v.AuxInt = s - s%4 21804 v0 := b.NewValue0(v.Pos, Op386ADDLconst, typ.UInt32) 21805 v0.AuxInt = s % 4 21806 v0.AddArg(destptr) 21807 v.AddArg(v0) 21808 v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21809 v1.AuxInt = 0 21810 v1.AddArg(destptr) 21811 v1.AddArg(mem) 21812 v.AddArg(v1) 21813 return true 21814 } 21815 // match: (Zero [8] destptr mem) 21816 // result: (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem)) 21817 for { 21818 if v.AuxInt != 8 { 21819 break 21820 } 21821 mem := v.Args[1] 21822 destptr := v.Args[0] 21823 v.reset(Op386MOVLstoreconst) 21824 v.AuxInt = makeValAndOff(0, 4) 21825 v.AddArg(destptr) 21826 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21827 v0.AuxInt = 0 21828 v0.AddArg(destptr) 21829 v0.AddArg(mem) 21830 v.AddArg(v0) 21831 return true 21832 } 21833 return false 21834 } 21835 func rewriteValue386_OpZero_10(v *Value) bool { 21836 b := v.Block 21837 config := b.Func.Config 21838 typ := &b.Func.Config.Types 21839 // match: (Zero [12] destptr mem) 21840 // result: (MOVLstoreconst [makeValAndOff(0,8)] destptr (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem))) 21841 for { 21842 if v.AuxInt != 12 { 21843 break 21844 } 21845 mem := v.Args[1] 21846 destptr := v.Args[0] 21847 v.reset(Op386MOVLstoreconst) 21848 v.AuxInt = makeValAndOff(0, 8) 21849 v.AddArg(destptr) 21850 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21851 v0.AuxInt = makeValAndOff(0, 4) 21852 v0.AddArg(destptr) 21853 v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21854 v1.AuxInt = 0 21855 v1.AddArg(destptr) 21856 v1.AddArg(mem) 21857 v0.AddArg(v1) 21858 v.AddArg(v0) 21859 return true 21860 } 21861 // match: (Zero [16] destptr mem) 21862 // result: (MOVLstoreconst [makeValAndOff(0,12)] destptr (MOVLstoreconst [makeValAndOff(0,8)] destptr (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem)))) 21863 for { 21864 if v.AuxInt != 16 { 21865 break 21866 } 21867 mem := v.Args[1] 21868 destptr := v.Args[0] 21869 v.reset(Op386MOVLstoreconst) 21870 v.AuxInt = makeValAndOff(0, 12) 21871 v.AddArg(destptr) 21872 v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21873 v0.AuxInt = makeValAndOff(0, 8) 21874 v0.AddArg(destptr) 21875 v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21876 v1.AuxInt = makeValAndOff(0, 4) 21877 v1.AddArg(destptr) 21878 v2 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem) 21879 v2.AuxInt = 0 21880 v2.AddArg(destptr) 21881 v2.AddArg(mem) 21882 v1.AddArg(v2) 21883 v0.AddArg(v1) 21884 v.AddArg(v0) 21885 return true 21886 } 21887 // match: (Zero [s] destptr mem) 21888 // cond: s > 16 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice 21889 // result: (DUFFZERO [1*(128-s/4)] destptr (MOVLconst [0]) mem) 21890 for { 21891 s := v.AuxInt 21892 mem := v.Args[1] 21893 destptr := v.Args[0] 21894 if !(s > 16 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice) { 21895 break 21896 } 21897 v.reset(Op386DUFFZERO) 21898 v.AuxInt = 1 * (128 - s/4) 21899 v.AddArg(destptr) 21900 v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32) 21901 v0.AuxInt = 0 21902 v.AddArg(v0) 21903 v.AddArg(mem) 21904 return true 21905 } 21906 // match: (Zero [s] destptr mem) 21907 // cond: (s > 4*128 || (config.noDuffDevice && s > 16)) && s%4 == 0 21908 // result: (REPSTOSL destptr (MOVLconst [s/4]) (MOVLconst [0]) mem) 21909 for { 21910 s := v.AuxInt 21911 mem := v.Args[1] 21912 destptr := v.Args[0] 21913 if !((s > 4*128 || (config.noDuffDevice && s > 16)) && s%4 == 0) { 21914 break 21915 } 21916 v.reset(Op386REPSTOSL) 21917 v.AddArg(destptr) 21918 v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32) 21919 v0.AuxInt = s / 4 21920 v.AddArg(v0) 21921 v1 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32) 21922 v1.AuxInt = 0 21923 v.AddArg(v1) 21924 v.AddArg(mem) 21925 return true 21926 } 21927 return false 21928 } 21929 func rewriteValue386_OpZeroExt16to32_0(v *Value) bool { 21930 // match: (ZeroExt16to32 x) 21931 // result: (MOVWLZX x) 21932 for { 21933 x := v.Args[0] 21934 v.reset(Op386MOVWLZX) 21935 v.AddArg(x) 21936 return true 21937 } 21938 } 21939 func rewriteValue386_OpZeroExt8to16_0(v *Value) bool { 21940 // match: (ZeroExt8to16 x) 21941 // result: (MOVBLZX x) 21942 for { 21943 x := v.Args[0] 21944 v.reset(Op386MOVBLZX) 21945 v.AddArg(x) 21946 return true 21947 } 21948 } 21949 func rewriteValue386_OpZeroExt8to32_0(v *Value) bool { 21950 // match: (ZeroExt8to32 x) 21951 // result: (MOVBLZX x) 21952 for { 21953 x := v.Args[0] 21954 v.reset(Op386MOVBLZX) 21955 v.AddArg(x) 21956 return true 21957 } 21958 } 21959 func rewriteValue386_OpZeromask_0(v *Value) bool { 21960 b := v.Block 21961 // match: (Zeromask <t> x) 21962 // result: (XORLconst [-1] (SBBLcarrymask <t> (CMPLconst x [1]))) 21963 for { 21964 t := v.Type 21965 x := v.Args[0] 21966 v.reset(Op386XORLconst) 21967 v.AuxInt = -1 21968 v0 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t) 21969 v1 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) 21970 v1.AuxInt = 1 21971 v1.AddArg(x) 21972 v0.AddArg(v1) 21973 v.AddArg(v0) 21974 return true 21975 } 21976 } 21977 func rewriteBlock386(b *Block) bool { 21978 switch b.Kind { 21979 case Block386EQ: 21980 // match: (EQ (InvertFlags cmp) yes no) 21981 // result: (EQ cmp yes no) 21982 for b.Controls[0].Op == Op386InvertFlags { 21983 v_0 := b.Controls[0] 21984 cmp := v_0.Args[0] 21985 b.Reset(Block386EQ) 21986 b.AddControl(cmp) 21987 return true 21988 } 21989 // match: (EQ (FlagEQ) yes no) 21990 // result: (First yes no) 21991 for b.Controls[0].Op == Op386FlagEQ { 21992 b.Reset(BlockFirst) 21993 return true 21994 } 21995 // match: (EQ (FlagLT_ULT) yes no) 21996 // result: (First no yes) 21997 for b.Controls[0].Op == Op386FlagLT_ULT { 21998 b.Reset(BlockFirst) 21999 b.swapSuccessors() 22000 return true 22001 } 22002 // match: (EQ (FlagLT_UGT) yes no) 22003 // result: (First no yes) 22004 for b.Controls[0].Op == Op386FlagLT_UGT { 22005 b.Reset(BlockFirst) 22006 b.swapSuccessors() 22007 return true 22008 } 22009 // match: (EQ (FlagGT_ULT) yes no) 22010 // result: (First no yes) 22011 for b.Controls[0].Op == Op386FlagGT_ULT { 22012 b.Reset(BlockFirst) 22013 b.swapSuccessors() 22014 return true 22015 } 22016 // match: (EQ (FlagGT_UGT) yes no) 22017 // result: (First no yes) 22018 for b.Controls[0].Op == Op386FlagGT_UGT { 22019 b.Reset(BlockFirst) 22020 b.swapSuccessors() 22021 return true 22022 } 22023 case Block386GE: 22024 // match: (GE (InvertFlags cmp) yes no) 22025 // result: (LE cmp yes no) 22026 for b.Controls[0].Op == Op386InvertFlags { 22027 v_0 := b.Controls[0] 22028 cmp := v_0.Args[0] 22029 b.Reset(Block386LE) 22030 b.AddControl(cmp) 22031 return true 22032 } 22033 // match: (GE (FlagEQ) yes no) 22034 // result: (First yes no) 22035 for b.Controls[0].Op == Op386FlagEQ { 22036 b.Reset(BlockFirst) 22037 return true 22038 } 22039 // match: (GE (FlagLT_ULT) yes no) 22040 // result: (First no yes) 22041 for b.Controls[0].Op == Op386FlagLT_ULT { 22042 b.Reset(BlockFirst) 22043 b.swapSuccessors() 22044 return true 22045 } 22046 // match: (GE (FlagLT_UGT) yes no) 22047 // result: (First no yes) 22048 for b.Controls[0].Op == Op386FlagLT_UGT { 22049 b.Reset(BlockFirst) 22050 b.swapSuccessors() 22051 return true 22052 } 22053 // match: (GE (FlagGT_ULT) yes no) 22054 // result: (First yes no) 22055 for b.Controls[0].Op == Op386FlagGT_ULT { 22056 b.Reset(BlockFirst) 22057 return true 22058 } 22059 // match: (GE (FlagGT_UGT) yes no) 22060 // result: (First yes no) 22061 for b.Controls[0].Op == Op386FlagGT_UGT { 22062 b.Reset(BlockFirst) 22063 return true 22064 } 22065 case Block386GT: 22066 // match: (GT (InvertFlags cmp) yes no) 22067 // result: (LT cmp yes no) 22068 for b.Controls[0].Op == Op386InvertFlags { 22069 v_0 := b.Controls[0] 22070 cmp := v_0.Args[0] 22071 b.Reset(Block386LT) 22072 b.AddControl(cmp) 22073 return true 22074 } 22075 // match: (GT (FlagEQ) yes no) 22076 // result: (First no yes) 22077 for b.Controls[0].Op == Op386FlagEQ { 22078 b.Reset(BlockFirst) 22079 b.swapSuccessors() 22080 return true 22081 } 22082 // match: (GT (FlagLT_ULT) yes no) 22083 // result: (First no yes) 22084 for b.Controls[0].Op == Op386FlagLT_ULT { 22085 b.Reset(BlockFirst) 22086 b.swapSuccessors() 22087 return true 22088 } 22089 // match: (GT (FlagLT_UGT) yes no) 22090 // result: (First no yes) 22091 for b.Controls[0].Op == Op386FlagLT_UGT { 22092 b.Reset(BlockFirst) 22093 b.swapSuccessors() 22094 return true 22095 } 22096 // match: (GT (FlagGT_ULT) yes no) 22097 // result: (First yes no) 22098 for b.Controls[0].Op == Op386FlagGT_ULT { 22099 b.Reset(BlockFirst) 22100 return true 22101 } 22102 // match: (GT (FlagGT_UGT) yes no) 22103 // result: (First yes no) 22104 for b.Controls[0].Op == Op386FlagGT_UGT { 22105 b.Reset(BlockFirst) 22106 return true 22107 } 22108 case BlockIf: 22109 // match: (If (SETL cmp) yes no) 22110 // result: (LT cmp yes no) 22111 for b.Controls[0].Op == Op386SETL { 22112 v_0 := b.Controls[0] 22113 cmp := v_0.Args[0] 22114 b.Reset(Block386LT) 22115 b.AddControl(cmp) 22116 return true 22117 } 22118 // match: (If (SETLE cmp) yes no) 22119 // result: (LE cmp yes no) 22120 for b.Controls[0].Op == Op386SETLE { 22121 v_0 := b.Controls[0] 22122 cmp := v_0.Args[0] 22123 b.Reset(Block386LE) 22124 b.AddControl(cmp) 22125 return true 22126 } 22127 // match: (If (SETG cmp) yes no) 22128 // result: (GT cmp yes no) 22129 for b.Controls[0].Op == Op386SETG { 22130 v_0 := b.Controls[0] 22131 cmp := v_0.Args[0] 22132 b.Reset(Block386GT) 22133 b.AddControl(cmp) 22134 return true 22135 } 22136 // match: (If (SETGE cmp) yes no) 22137 // result: (GE cmp yes no) 22138 for b.Controls[0].Op == Op386SETGE { 22139 v_0 := b.Controls[0] 22140 cmp := v_0.Args[0] 22141 b.Reset(Block386GE) 22142 b.AddControl(cmp) 22143 return true 22144 } 22145 // match: (If (SETEQ cmp) yes no) 22146 // result: (EQ cmp yes no) 22147 for b.Controls[0].Op == Op386SETEQ { 22148 v_0 := b.Controls[0] 22149 cmp := v_0.Args[0] 22150 b.Reset(Block386EQ) 22151 b.AddControl(cmp) 22152 return true 22153 } 22154 // match: (If (SETNE cmp) yes no) 22155 // result: (NE cmp yes no) 22156 for b.Controls[0].Op == Op386SETNE { 22157 v_0 := b.Controls[0] 22158 cmp := v_0.Args[0] 22159 b.Reset(Block386NE) 22160 b.AddControl(cmp) 22161 return true 22162 } 22163 // match: (If (SETB cmp) yes no) 22164 // result: (ULT cmp yes no) 22165 for b.Controls[0].Op == Op386SETB { 22166 v_0 := b.Controls[0] 22167 cmp := v_0.Args[0] 22168 b.Reset(Block386ULT) 22169 b.AddControl(cmp) 22170 return true 22171 } 22172 // match: (If (SETBE cmp) yes no) 22173 // result: (ULE cmp yes no) 22174 for b.Controls[0].Op == Op386SETBE { 22175 v_0 := b.Controls[0] 22176 cmp := v_0.Args[0] 22177 b.Reset(Block386ULE) 22178 b.AddControl(cmp) 22179 return true 22180 } 22181 // match: (If (SETA cmp) yes no) 22182 // result: (UGT cmp yes no) 22183 for b.Controls[0].Op == Op386SETA { 22184 v_0 := b.Controls[0] 22185 cmp := v_0.Args[0] 22186 b.Reset(Block386UGT) 22187 b.AddControl(cmp) 22188 return true 22189 } 22190 // match: (If (SETAE cmp) yes no) 22191 // result: (UGE cmp yes no) 22192 for b.Controls[0].Op == Op386SETAE { 22193 v_0 := b.Controls[0] 22194 cmp := v_0.Args[0] 22195 b.Reset(Block386UGE) 22196 b.AddControl(cmp) 22197 return true 22198 } 22199 // match: (If (SETO cmp) yes no) 22200 // result: (OS cmp yes no) 22201 for b.Controls[0].Op == Op386SETO { 22202 v_0 := b.Controls[0] 22203 cmp := v_0.Args[0] 22204 b.Reset(Block386OS) 22205 b.AddControl(cmp) 22206 return true 22207 } 22208 // match: (If (SETGF cmp) yes no) 22209 // result: (UGT cmp yes no) 22210 for b.Controls[0].Op == Op386SETGF { 22211 v_0 := b.Controls[0] 22212 cmp := v_0.Args[0] 22213 b.Reset(Block386UGT) 22214 b.AddControl(cmp) 22215 return true 22216 } 22217 // match: (If (SETGEF cmp) yes no) 22218 // result: (UGE cmp yes no) 22219 for b.Controls[0].Op == Op386SETGEF { 22220 v_0 := b.Controls[0] 22221 cmp := v_0.Args[0] 22222 b.Reset(Block386UGE) 22223 b.AddControl(cmp) 22224 return true 22225 } 22226 // match: (If (SETEQF cmp) yes no) 22227 // result: (EQF cmp yes no) 22228 for b.Controls[0].Op == Op386SETEQF { 22229 v_0 := b.Controls[0] 22230 cmp := v_0.Args[0] 22231 b.Reset(Block386EQF) 22232 b.AddControl(cmp) 22233 return true 22234 } 22235 // match: (If (SETNEF cmp) yes no) 22236 // result: (NEF cmp yes no) 22237 for b.Controls[0].Op == Op386SETNEF { 22238 v_0 := b.Controls[0] 22239 cmp := v_0.Args[0] 22240 b.Reset(Block386NEF) 22241 b.AddControl(cmp) 22242 return true 22243 } 22244 // match: (If cond yes no) 22245 // result: (NE (TESTB cond cond) yes no) 22246 for { 22247 cond := b.Controls[0] 22248 b.Reset(Block386NE) 22249 v0 := b.NewValue0(cond.Pos, Op386TESTB, types.TypeFlags) 22250 v0.AddArg(cond) 22251 v0.AddArg(cond) 22252 b.AddControl(v0) 22253 return true 22254 } 22255 case Block386LE: 22256 // match: (LE (InvertFlags cmp) yes no) 22257 // result: (GE cmp yes no) 22258 for b.Controls[0].Op == Op386InvertFlags { 22259 v_0 := b.Controls[0] 22260 cmp := v_0.Args[0] 22261 b.Reset(Block386GE) 22262 b.AddControl(cmp) 22263 return true 22264 } 22265 // match: (LE (FlagEQ) yes no) 22266 // result: (First yes no) 22267 for b.Controls[0].Op == Op386FlagEQ { 22268 b.Reset(BlockFirst) 22269 return true 22270 } 22271 // match: (LE (FlagLT_ULT) yes no) 22272 // result: (First yes no) 22273 for b.Controls[0].Op == Op386FlagLT_ULT { 22274 b.Reset(BlockFirst) 22275 return true 22276 } 22277 // match: (LE (FlagLT_UGT) yes no) 22278 // result: (First yes no) 22279 for b.Controls[0].Op == Op386FlagLT_UGT { 22280 b.Reset(BlockFirst) 22281 return true 22282 } 22283 // match: (LE (FlagGT_ULT) yes no) 22284 // result: (First no yes) 22285 for b.Controls[0].Op == Op386FlagGT_ULT { 22286 b.Reset(BlockFirst) 22287 b.swapSuccessors() 22288 return true 22289 } 22290 // match: (LE (FlagGT_UGT) yes no) 22291 // result: (First no yes) 22292 for b.Controls[0].Op == Op386FlagGT_UGT { 22293 b.Reset(BlockFirst) 22294 b.swapSuccessors() 22295 return true 22296 } 22297 case Block386LT: 22298 // match: (LT (InvertFlags cmp) yes no) 22299 // result: (GT cmp yes no) 22300 for b.Controls[0].Op == Op386InvertFlags { 22301 v_0 := b.Controls[0] 22302 cmp := v_0.Args[0] 22303 b.Reset(Block386GT) 22304 b.AddControl(cmp) 22305 return true 22306 } 22307 // match: (LT (FlagEQ) yes no) 22308 // result: (First no yes) 22309 for b.Controls[0].Op == Op386FlagEQ { 22310 b.Reset(BlockFirst) 22311 b.swapSuccessors() 22312 return true 22313 } 22314 // match: (LT (FlagLT_ULT) yes no) 22315 // result: (First yes no) 22316 for b.Controls[0].Op == Op386FlagLT_ULT { 22317 b.Reset(BlockFirst) 22318 return true 22319 } 22320 // match: (LT (FlagLT_UGT) yes no) 22321 // result: (First yes no) 22322 for b.Controls[0].Op == Op386FlagLT_UGT { 22323 b.Reset(BlockFirst) 22324 return true 22325 } 22326 // match: (LT (FlagGT_ULT) yes no) 22327 // result: (First no yes) 22328 for b.Controls[0].Op == Op386FlagGT_ULT { 22329 b.Reset(BlockFirst) 22330 b.swapSuccessors() 22331 return true 22332 } 22333 // match: (LT (FlagGT_UGT) yes no) 22334 // result: (First no yes) 22335 for b.Controls[0].Op == Op386FlagGT_UGT { 22336 b.Reset(BlockFirst) 22337 b.swapSuccessors() 22338 return true 22339 } 22340 case Block386NE: 22341 // match: (NE (TESTB (SETL cmp) (SETL cmp)) yes no) 22342 // result: (LT cmp yes no) 22343 for b.Controls[0].Op == Op386TESTB { 22344 v_0 := b.Controls[0] 22345 _ = v_0.Args[1] 22346 v_0_0 := v_0.Args[0] 22347 if v_0_0.Op != Op386SETL { 22348 break 22349 } 22350 cmp := v_0_0.Args[0] 22351 v_0_1 := v_0.Args[1] 22352 if v_0_1.Op != Op386SETL || cmp != v_0_1.Args[0] { 22353 break 22354 } 22355 b.Reset(Block386LT) 22356 b.AddControl(cmp) 22357 return true 22358 } 22359 // match: (NE (TESTB (SETL cmp) (SETL cmp)) yes no) 22360 // result: (LT cmp yes no) 22361 for b.Controls[0].Op == Op386TESTB { 22362 v_0 := b.Controls[0] 22363 _ = v_0.Args[1] 22364 v_0_0 := v_0.Args[0] 22365 if v_0_0.Op != Op386SETL { 22366 break 22367 } 22368 cmp := v_0_0.Args[0] 22369 v_0_1 := v_0.Args[1] 22370 if v_0_1.Op != Op386SETL || cmp != v_0_1.Args[0] { 22371 break 22372 } 22373 b.Reset(Block386LT) 22374 b.AddControl(cmp) 22375 return true 22376 } 22377 // match: (NE (TESTB (SETLE cmp) (SETLE cmp)) yes no) 22378 // result: (LE cmp yes no) 22379 for b.Controls[0].Op == Op386TESTB { 22380 v_0 := b.Controls[0] 22381 _ = v_0.Args[1] 22382 v_0_0 := v_0.Args[0] 22383 if v_0_0.Op != Op386SETLE { 22384 break 22385 } 22386 cmp := v_0_0.Args[0] 22387 v_0_1 := v_0.Args[1] 22388 if v_0_1.Op != Op386SETLE || cmp != v_0_1.Args[0] { 22389 break 22390 } 22391 b.Reset(Block386LE) 22392 b.AddControl(cmp) 22393 return true 22394 } 22395 // match: (NE (TESTB (SETLE cmp) (SETLE cmp)) yes no) 22396 // result: (LE cmp yes no) 22397 for b.Controls[0].Op == Op386TESTB { 22398 v_0 := b.Controls[0] 22399 _ = v_0.Args[1] 22400 v_0_0 := v_0.Args[0] 22401 if v_0_0.Op != Op386SETLE { 22402 break 22403 } 22404 cmp := v_0_0.Args[0] 22405 v_0_1 := v_0.Args[1] 22406 if v_0_1.Op != Op386SETLE || cmp != v_0_1.Args[0] { 22407 break 22408 } 22409 b.Reset(Block386LE) 22410 b.AddControl(cmp) 22411 return true 22412 } 22413 // match: (NE (TESTB (SETG cmp) (SETG cmp)) yes no) 22414 // result: (GT cmp yes no) 22415 for b.Controls[0].Op == Op386TESTB { 22416 v_0 := b.Controls[0] 22417 _ = v_0.Args[1] 22418 v_0_0 := v_0.Args[0] 22419 if v_0_0.Op != Op386SETG { 22420 break 22421 } 22422 cmp := v_0_0.Args[0] 22423 v_0_1 := v_0.Args[1] 22424 if v_0_1.Op != Op386SETG || cmp != v_0_1.Args[0] { 22425 break 22426 } 22427 b.Reset(Block386GT) 22428 b.AddControl(cmp) 22429 return true 22430 } 22431 // match: (NE (TESTB (SETG cmp) (SETG cmp)) yes no) 22432 // result: (GT cmp yes no) 22433 for b.Controls[0].Op == Op386TESTB { 22434 v_0 := b.Controls[0] 22435 _ = v_0.Args[1] 22436 v_0_0 := v_0.Args[0] 22437 if v_0_0.Op != Op386SETG { 22438 break 22439 } 22440 cmp := v_0_0.Args[0] 22441 v_0_1 := v_0.Args[1] 22442 if v_0_1.Op != Op386SETG || cmp != v_0_1.Args[0] { 22443 break 22444 } 22445 b.Reset(Block386GT) 22446 b.AddControl(cmp) 22447 return true 22448 } 22449 // match: (NE (TESTB (SETGE cmp) (SETGE cmp)) yes no) 22450 // result: (GE cmp yes no) 22451 for b.Controls[0].Op == Op386TESTB { 22452 v_0 := b.Controls[0] 22453 _ = v_0.Args[1] 22454 v_0_0 := v_0.Args[0] 22455 if v_0_0.Op != Op386SETGE { 22456 break 22457 } 22458 cmp := v_0_0.Args[0] 22459 v_0_1 := v_0.Args[1] 22460 if v_0_1.Op != Op386SETGE || cmp != v_0_1.Args[0] { 22461 break 22462 } 22463 b.Reset(Block386GE) 22464 b.AddControl(cmp) 22465 return true 22466 } 22467 // match: (NE (TESTB (SETGE cmp) (SETGE cmp)) yes no) 22468 // result: (GE cmp yes no) 22469 for b.Controls[0].Op == Op386TESTB { 22470 v_0 := b.Controls[0] 22471 _ = v_0.Args[1] 22472 v_0_0 := v_0.Args[0] 22473 if v_0_0.Op != Op386SETGE { 22474 break 22475 } 22476 cmp := v_0_0.Args[0] 22477 v_0_1 := v_0.Args[1] 22478 if v_0_1.Op != Op386SETGE || cmp != v_0_1.Args[0] { 22479 break 22480 } 22481 b.Reset(Block386GE) 22482 b.AddControl(cmp) 22483 return true 22484 } 22485 // match: (NE (TESTB (SETEQ cmp) (SETEQ cmp)) yes no) 22486 // result: (EQ cmp yes no) 22487 for b.Controls[0].Op == Op386TESTB { 22488 v_0 := b.Controls[0] 22489 _ = v_0.Args[1] 22490 v_0_0 := v_0.Args[0] 22491 if v_0_0.Op != Op386SETEQ { 22492 break 22493 } 22494 cmp := v_0_0.Args[0] 22495 v_0_1 := v_0.Args[1] 22496 if v_0_1.Op != Op386SETEQ || cmp != v_0_1.Args[0] { 22497 break 22498 } 22499 b.Reset(Block386EQ) 22500 b.AddControl(cmp) 22501 return true 22502 } 22503 // match: (NE (TESTB (SETEQ cmp) (SETEQ cmp)) yes no) 22504 // result: (EQ cmp yes no) 22505 for b.Controls[0].Op == Op386TESTB { 22506 v_0 := b.Controls[0] 22507 _ = v_0.Args[1] 22508 v_0_0 := v_0.Args[0] 22509 if v_0_0.Op != Op386SETEQ { 22510 break 22511 } 22512 cmp := v_0_0.Args[0] 22513 v_0_1 := v_0.Args[1] 22514 if v_0_1.Op != Op386SETEQ || cmp != v_0_1.Args[0] { 22515 break 22516 } 22517 b.Reset(Block386EQ) 22518 b.AddControl(cmp) 22519 return true 22520 } 22521 // match: (NE (TESTB (SETNE cmp) (SETNE cmp)) yes no) 22522 // result: (NE cmp yes no) 22523 for b.Controls[0].Op == Op386TESTB { 22524 v_0 := b.Controls[0] 22525 _ = v_0.Args[1] 22526 v_0_0 := v_0.Args[0] 22527 if v_0_0.Op != Op386SETNE { 22528 break 22529 } 22530 cmp := v_0_0.Args[0] 22531 v_0_1 := v_0.Args[1] 22532 if v_0_1.Op != Op386SETNE || cmp != v_0_1.Args[0] { 22533 break 22534 } 22535 b.Reset(Block386NE) 22536 b.AddControl(cmp) 22537 return true 22538 } 22539 // match: (NE (TESTB (SETNE cmp) (SETNE cmp)) yes no) 22540 // result: (NE cmp yes no) 22541 for b.Controls[0].Op == Op386TESTB { 22542 v_0 := b.Controls[0] 22543 _ = v_0.Args[1] 22544 v_0_0 := v_0.Args[0] 22545 if v_0_0.Op != Op386SETNE { 22546 break 22547 } 22548 cmp := v_0_0.Args[0] 22549 v_0_1 := v_0.Args[1] 22550 if v_0_1.Op != Op386SETNE || cmp != v_0_1.Args[0] { 22551 break 22552 } 22553 b.Reset(Block386NE) 22554 b.AddControl(cmp) 22555 return true 22556 } 22557 // match: (NE (TESTB (SETB cmp) (SETB cmp)) yes no) 22558 // result: (ULT cmp yes no) 22559 for b.Controls[0].Op == Op386TESTB { 22560 v_0 := b.Controls[0] 22561 _ = v_0.Args[1] 22562 v_0_0 := v_0.Args[0] 22563 if v_0_0.Op != Op386SETB { 22564 break 22565 } 22566 cmp := v_0_0.Args[0] 22567 v_0_1 := v_0.Args[1] 22568 if v_0_1.Op != Op386SETB || cmp != v_0_1.Args[0] { 22569 break 22570 } 22571 b.Reset(Block386ULT) 22572 b.AddControl(cmp) 22573 return true 22574 } 22575 // match: (NE (TESTB (SETB cmp) (SETB cmp)) yes no) 22576 // result: (ULT cmp yes no) 22577 for b.Controls[0].Op == Op386TESTB { 22578 v_0 := b.Controls[0] 22579 _ = v_0.Args[1] 22580 v_0_0 := v_0.Args[0] 22581 if v_0_0.Op != Op386SETB { 22582 break 22583 } 22584 cmp := v_0_0.Args[0] 22585 v_0_1 := v_0.Args[1] 22586 if v_0_1.Op != Op386SETB || cmp != v_0_1.Args[0] { 22587 break 22588 } 22589 b.Reset(Block386ULT) 22590 b.AddControl(cmp) 22591 return true 22592 } 22593 // match: (NE (TESTB (SETBE cmp) (SETBE cmp)) yes no) 22594 // result: (ULE cmp yes no) 22595 for b.Controls[0].Op == Op386TESTB { 22596 v_0 := b.Controls[0] 22597 _ = v_0.Args[1] 22598 v_0_0 := v_0.Args[0] 22599 if v_0_0.Op != Op386SETBE { 22600 break 22601 } 22602 cmp := v_0_0.Args[0] 22603 v_0_1 := v_0.Args[1] 22604 if v_0_1.Op != Op386SETBE || cmp != v_0_1.Args[0] { 22605 break 22606 } 22607 b.Reset(Block386ULE) 22608 b.AddControl(cmp) 22609 return true 22610 } 22611 // match: (NE (TESTB (SETBE cmp) (SETBE cmp)) yes no) 22612 // result: (ULE cmp yes no) 22613 for b.Controls[0].Op == Op386TESTB { 22614 v_0 := b.Controls[0] 22615 _ = v_0.Args[1] 22616 v_0_0 := v_0.Args[0] 22617 if v_0_0.Op != Op386SETBE { 22618 break 22619 } 22620 cmp := v_0_0.Args[0] 22621 v_0_1 := v_0.Args[1] 22622 if v_0_1.Op != Op386SETBE || cmp != v_0_1.Args[0] { 22623 break 22624 } 22625 b.Reset(Block386ULE) 22626 b.AddControl(cmp) 22627 return true 22628 } 22629 // match: (NE (TESTB (SETA cmp) (SETA cmp)) yes no) 22630 // result: (UGT cmp yes no) 22631 for b.Controls[0].Op == Op386TESTB { 22632 v_0 := b.Controls[0] 22633 _ = v_0.Args[1] 22634 v_0_0 := v_0.Args[0] 22635 if v_0_0.Op != Op386SETA { 22636 break 22637 } 22638 cmp := v_0_0.Args[0] 22639 v_0_1 := v_0.Args[1] 22640 if v_0_1.Op != Op386SETA || cmp != v_0_1.Args[0] { 22641 break 22642 } 22643 b.Reset(Block386UGT) 22644 b.AddControl(cmp) 22645 return true 22646 } 22647 // match: (NE (TESTB (SETA cmp) (SETA cmp)) yes no) 22648 // result: (UGT cmp yes no) 22649 for b.Controls[0].Op == Op386TESTB { 22650 v_0 := b.Controls[0] 22651 _ = v_0.Args[1] 22652 v_0_0 := v_0.Args[0] 22653 if v_0_0.Op != Op386SETA { 22654 break 22655 } 22656 cmp := v_0_0.Args[0] 22657 v_0_1 := v_0.Args[1] 22658 if v_0_1.Op != Op386SETA || cmp != v_0_1.Args[0] { 22659 break 22660 } 22661 b.Reset(Block386UGT) 22662 b.AddControl(cmp) 22663 return true 22664 } 22665 // match: (NE (TESTB (SETAE cmp) (SETAE cmp)) yes no) 22666 // result: (UGE cmp yes no) 22667 for b.Controls[0].Op == Op386TESTB { 22668 v_0 := b.Controls[0] 22669 _ = v_0.Args[1] 22670 v_0_0 := v_0.Args[0] 22671 if v_0_0.Op != Op386SETAE { 22672 break 22673 } 22674 cmp := v_0_0.Args[0] 22675 v_0_1 := v_0.Args[1] 22676 if v_0_1.Op != Op386SETAE || cmp != v_0_1.Args[0] { 22677 break 22678 } 22679 b.Reset(Block386UGE) 22680 b.AddControl(cmp) 22681 return true 22682 } 22683 // match: (NE (TESTB (SETAE cmp) (SETAE cmp)) yes no) 22684 // result: (UGE cmp yes no) 22685 for b.Controls[0].Op == Op386TESTB { 22686 v_0 := b.Controls[0] 22687 _ = v_0.Args[1] 22688 v_0_0 := v_0.Args[0] 22689 if v_0_0.Op != Op386SETAE { 22690 break 22691 } 22692 cmp := v_0_0.Args[0] 22693 v_0_1 := v_0.Args[1] 22694 if v_0_1.Op != Op386SETAE || cmp != v_0_1.Args[0] { 22695 break 22696 } 22697 b.Reset(Block386UGE) 22698 b.AddControl(cmp) 22699 return true 22700 } 22701 // match: (NE (TESTB (SETO cmp) (SETO cmp)) yes no) 22702 // result: (OS cmp yes no) 22703 for b.Controls[0].Op == Op386TESTB { 22704 v_0 := b.Controls[0] 22705 _ = v_0.Args[1] 22706 v_0_0 := v_0.Args[0] 22707 if v_0_0.Op != Op386SETO { 22708 break 22709 } 22710 cmp := v_0_0.Args[0] 22711 v_0_1 := v_0.Args[1] 22712 if v_0_1.Op != Op386SETO || cmp != v_0_1.Args[0] { 22713 break 22714 } 22715 b.Reset(Block386OS) 22716 b.AddControl(cmp) 22717 return true 22718 } 22719 // match: (NE (TESTB (SETO cmp) (SETO cmp)) yes no) 22720 // result: (OS cmp yes no) 22721 for b.Controls[0].Op == Op386TESTB { 22722 v_0 := b.Controls[0] 22723 _ = v_0.Args[1] 22724 v_0_0 := v_0.Args[0] 22725 if v_0_0.Op != Op386SETO { 22726 break 22727 } 22728 cmp := v_0_0.Args[0] 22729 v_0_1 := v_0.Args[1] 22730 if v_0_1.Op != Op386SETO || cmp != v_0_1.Args[0] { 22731 break 22732 } 22733 b.Reset(Block386OS) 22734 b.AddControl(cmp) 22735 return true 22736 } 22737 // match: (NE (TESTB (SETGF cmp) (SETGF cmp)) yes no) 22738 // result: (UGT cmp yes no) 22739 for b.Controls[0].Op == Op386TESTB { 22740 v_0 := b.Controls[0] 22741 _ = v_0.Args[1] 22742 v_0_0 := v_0.Args[0] 22743 if v_0_0.Op != Op386SETGF { 22744 break 22745 } 22746 cmp := v_0_0.Args[0] 22747 v_0_1 := v_0.Args[1] 22748 if v_0_1.Op != Op386SETGF || cmp != v_0_1.Args[0] { 22749 break 22750 } 22751 b.Reset(Block386UGT) 22752 b.AddControl(cmp) 22753 return true 22754 } 22755 // match: (NE (TESTB (SETGF cmp) (SETGF cmp)) yes no) 22756 // result: (UGT cmp yes no) 22757 for b.Controls[0].Op == Op386TESTB { 22758 v_0 := b.Controls[0] 22759 _ = v_0.Args[1] 22760 v_0_0 := v_0.Args[0] 22761 if v_0_0.Op != Op386SETGF { 22762 break 22763 } 22764 cmp := v_0_0.Args[0] 22765 v_0_1 := v_0.Args[1] 22766 if v_0_1.Op != Op386SETGF || cmp != v_0_1.Args[0] { 22767 break 22768 } 22769 b.Reset(Block386UGT) 22770 b.AddControl(cmp) 22771 return true 22772 } 22773 // match: (NE (TESTB (SETGEF cmp) (SETGEF cmp)) yes no) 22774 // result: (UGE cmp yes no) 22775 for b.Controls[0].Op == Op386TESTB { 22776 v_0 := b.Controls[0] 22777 _ = v_0.Args[1] 22778 v_0_0 := v_0.Args[0] 22779 if v_0_0.Op != Op386SETGEF { 22780 break 22781 } 22782 cmp := v_0_0.Args[0] 22783 v_0_1 := v_0.Args[1] 22784 if v_0_1.Op != Op386SETGEF || cmp != v_0_1.Args[0] { 22785 break 22786 } 22787 b.Reset(Block386UGE) 22788 b.AddControl(cmp) 22789 return true 22790 } 22791 // match: (NE (TESTB (SETGEF cmp) (SETGEF cmp)) yes no) 22792 // result: (UGE cmp yes no) 22793 for b.Controls[0].Op == Op386TESTB { 22794 v_0 := b.Controls[0] 22795 _ = v_0.Args[1] 22796 v_0_0 := v_0.Args[0] 22797 if v_0_0.Op != Op386SETGEF { 22798 break 22799 } 22800 cmp := v_0_0.Args[0] 22801 v_0_1 := v_0.Args[1] 22802 if v_0_1.Op != Op386SETGEF || cmp != v_0_1.Args[0] { 22803 break 22804 } 22805 b.Reset(Block386UGE) 22806 b.AddControl(cmp) 22807 return true 22808 } 22809 // match: (NE (TESTB (SETEQF cmp) (SETEQF cmp)) yes no) 22810 // result: (EQF cmp yes no) 22811 for b.Controls[0].Op == Op386TESTB { 22812 v_0 := b.Controls[0] 22813 _ = v_0.Args[1] 22814 v_0_0 := v_0.Args[0] 22815 if v_0_0.Op != Op386SETEQF { 22816 break 22817 } 22818 cmp := v_0_0.Args[0] 22819 v_0_1 := v_0.Args[1] 22820 if v_0_1.Op != Op386SETEQF || cmp != v_0_1.Args[0] { 22821 break 22822 } 22823 b.Reset(Block386EQF) 22824 b.AddControl(cmp) 22825 return true 22826 } 22827 // match: (NE (TESTB (SETEQF cmp) (SETEQF cmp)) yes no) 22828 // result: (EQF cmp yes no) 22829 for b.Controls[0].Op == Op386TESTB { 22830 v_0 := b.Controls[0] 22831 _ = v_0.Args[1] 22832 v_0_0 := v_0.Args[0] 22833 if v_0_0.Op != Op386SETEQF { 22834 break 22835 } 22836 cmp := v_0_0.Args[0] 22837 v_0_1 := v_0.Args[1] 22838 if v_0_1.Op != Op386SETEQF || cmp != v_0_1.Args[0] { 22839 break 22840 } 22841 b.Reset(Block386EQF) 22842 b.AddControl(cmp) 22843 return true 22844 } 22845 // match: (NE (TESTB (SETNEF cmp) (SETNEF cmp)) yes no) 22846 // result: (NEF cmp yes no) 22847 for b.Controls[0].Op == Op386TESTB { 22848 v_0 := b.Controls[0] 22849 _ = v_0.Args[1] 22850 v_0_0 := v_0.Args[0] 22851 if v_0_0.Op != Op386SETNEF { 22852 break 22853 } 22854 cmp := v_0_0.Args[0] 22855 v_0_1 := v_0.Args[1] 22856 if v_0_1.Op != Op386SETNEF || cmp != v_0_1.Args[0] { 22857 break 22858 } 22859 b.Reset(Block386NEF) 22860 b.AddControl(cmp) 22861 return true 22862 } 22863 // match: (NE (TESTB (SETNEF cmp) (SETNEF cmp)) yes no) 22864 // result: (NEF cmp yes no) 22865 for b.Controls[0].Op == Op386TESTB { 22866 v_0 := b.Controls[0] 22867 _ = v_0.Args[1] 22868 v_0_0 := v_0.Args[0] 22869 if v_0_0.Op != Op386SETNEF { 22870 break 22871 } 22872 cmp := v_0_0.Args[0] 22873 v_0_1 := v_0.Args[1] 22874 if v_0_1.Op != Op386SETNEF || cmp != v_0_1.Args[0] { 22875 break 22876 } 22877 b.Reset(Block386NEF) 22878 b.AddControl(cmp) 22879 return true 22880 } 22881 // match: (NE (InvertFlags cmp) yes no) 22882 // result: (NE cmp yes no) 22883 for b.Controls[0].Op == Op386InvertFlags { 22884 v_0 := b.Controls[0] 22885 cmp := v_0.Args[0] 22886 b.Reset(Block386NE) 22887 b.AddControl(cmp) 22888 return true 22889 } 22890 // match: (NE (FlagEQ) yes no) 22891 // result: (First no yes) 22892 for b.Controls[0].Op == Op386FlagEQ { 22893 b.Reset(BlockFirst) 22894 b.swapSuccessors() 22895 return true 22896 } 22897 // match: (NE (FlagLT_ULT) yes no) 22898 // result: (First yes no) 22899 for b.Controls[0].Op == Op386FlagLT_ULT { 22900 b.Reset(BlockFirst) 22901 return true 22902 } 22903 // match: (NE (FlagLT_UGT) yes no) 22904 // result: (First yes no) 22905 for b.Controls[0].Op == Op386FlagLT_UGT { 22906 b.Reset(BlockFirst) 22907 return true 22908 } 22909 // match: (NE (FlagGT_ULT) yes no) 22910 // result: (First yes no) 22911 for b.Controls[0].Op == Op386FlagGT_ULT { 22912 b.Reset(BlockFirst) 22913 return true 22914 } 22915 // match: (NE (FlagGT_UGT) yes no) 22916 // result: (First yes no) 22917 for b.Controls[0].Op == Op386FlagGT_UGT { 22918 b.Reset(BlockFirst) 22919 return true 22920 } 22921 case Block386UGE: 22922 // match: (UGE (InvertFlags cmp) yes no) 22923 // result: (ULE cmp yes no) 22924 for b.Controls[0].Op == Op386InvertFlags { 22925 v_0 := b.Controls[0] 22926 cmp := v_0.Args[0] 22927 b.Reset(Block386ULE) 22928 b.AddControl(cmp) 22929 return true 22930 } 22931 // match: (UGE (FlagEQ) yes no) 22932 // result: (First yes no) 22933 for b.Controls[0].Op == Op386FlagEQ { 22934 b.Reset(BlockFirst) 22935 return true 22936 } 22937 // match: (UGE (FlagLT_ULT) yes no) 22938 // result: (First no yes) 22939 for b.Controls[0].Op == Op386FlagLT_ULT { 22940 b.Reset(BlockFirst) 22941 b.swapSuccessors() 22942 return true 22943 } 22944 // match: (UGE (FlagLT_UGT) yes no) 22945 // result: (First yes no) 22946 for b.Controls[0].Op == Op386FlagLT_UGT { 22947 b.Reset(BlockFirst) 22948 return true 22949 } 22950 // match: (UGE (FlagGT_ULT) yes no) 22951 // result: (First no yes) 22952 for b.Controls[0].Op == Op386FlagGT_ULT { 22953 b.Reset(BlockFirst) 22954 b.swapSuccessors() 22955 return true 22956 } 22957 // match: (UGE (FlagGT_UGT) yes no) 22958 // result: (First yes no) 22959 for b.Controls[0].Op == Op386FlagGT_UGT { 22960 b.Reset(BlockFirst) 22961 return true 22962 } 22963 case Block386UGT: 22964 // match: (UGT (InvertFlags cmp) yes no) 22965 // result: (ULT cmp yes no) 22966 for b.Controls[0].Op == Op386InvertFlags { 22967 v_0 := b.Controls[0] 22968 cmp := v_0.Args[0] 22969 b.Reset(Block386ULT) 22970 b.AddControl(cmp) 22971 return true 22972 } 22973 // match: (UGT (FlagEQ) yes no) 22974 // result: (First no yes) 22975 for b.Controls[0].Op == Op386FlagEQ { 22976 b.Reset(BlockFirst) 22977 b.swapSuccessors() 22978 return true 22979 } 22980 // match: (UGT (FlagLT_ULT) yes no) 22981 // result: (First no yes) 22982 for b.Controls[0].Op == Op386FlagLT_ULT { 22983 b.Reset(BlockFirst) 22984 b.swapSuccessors() 22985 return true 22986 } 22987 // match: (UGT (FlagLT_UGT) yes no) 22988 // result: (First yes no) 22989 for b.Controls[0].Op == Op386FlagLT_UGT { 22990 b.Reset(BlockFirst) 22991 return true 22992 } 22993 // match: (UGT (FlagGT_ULT) yes no) 22994 // result: (First no yes) 22995 for b.Controls[0].Op == Op386FlagGT_ULT { 22996 b.Reset(BlockFirst) 22997 b.swapSuccessors() 22998 return true 22999 } 23000 // match: (UGT (FlagGT_UGT) yes no) 23001 // result: (First yes no) 23002 for b.Controls[0].Op == Op386FlagGT_UGT { 23003 b.Reset(BlockFirst) 23004 return true 23005 } 23006 case Block386ULE: 23007 // match: (ULE (InvertFlags cmp) yes no) 23008 // result: (UGE cmp yes no) 23009 for b.Controls[0].Op == Op386InvertFlags { 23010 v_0 := b.Controls[0] 23011 cmp := v_0.Args[0] 23012 b.Reset(Block386UGE) 23013 b.AddControl(cmp) 23014 return true 23015 } 23016 // match: (ULE (FlagEQ) yes no) 23017 // result: (First yes no) 23018 for b.Controls[0].Op == Op386FlagEQ { 23019 b.Reset(BlockFirst) 23020 return true 23021 } 23022 // match: (ULE (FlagLT_ULT) yes no) 23023 // result: (First yes no) 23024 for b.Controls[0].Op == Op386FlagLT_ULT { 23025 b.Reset(BlockFirst) 23026 return true 23027 } 23028 // match: (ULE (FlagLT_UGT) yes no) 23029 // result: (First no yes) 23030 for b.Controls[0].Op == Op386FlagLT_UGT { 23031 b.Reset(BlockFirst) 23032 b.swapSuccessors() 23033 return true 23034 } 23035 // match: (ULE (FlagGT_ULT) yes no) 23036 // result: (First yes no) 23037 for b.Controls[0].Op == Op386FlagGT_ULT { 23038 b.Reset(BlockFirst) 23039 return true 23040 } 23041 // match: (ULE (FlagGT_UGT) yes no) 23042 // result: (First no yes) 23043 for b.Controls[0].Op == Op386FlagGT_UGT { 23044 b.Reset(BlockFirst) 23045 b.swapSuccessors() 23046 return true 23047 } 23048 case Block386ULT: 23049 // match: (ULT (InvertFlags cmp) yes no) 23050 // result: (UGT cmp yes no) 23051 for b.Controls[0].Op == Op386InvertFlags { 23052 v_0 := b.Controls[0] 23053 cmp := v_0.Args[0] 23054 b.Reset(Block386UGT) 23055 b.AddControl(cmp) 23056 return true 23057 } 23058 // match: (ULT (FlagEQ) yes no) 23059 // result: (First no yes) 23060 for b.Controls[0].Op == Op386FlagEQ { 23061 b.Reset(BlockFirst) 23062 b.swapSuccessors() 23063 return true 23064 } 23065 // match: (ULT (FlagLT_ULT) yes no) 23066 // result: (First yes no) 23067 for b.Controls[0].Op == Op386FlagLT_ULT { 23068 b.Reset(BlockFirst) 23069 return true 23070 } 23071 // match: (ULT (FlagLT_UGT) yes no) 23072 // result: (First no yes) 23073 for b.Controls[0].Op == Op386FlagLT_UGT { 23074 b.Reset(BlockFirst) 23075 b.swapSuccessors() 23076 return true 23077 } 23078 // match: (ULT (FlagGT_ULT) yes no) 23079 // result: (First yes no) 23080 for b.Controls[0].Op == Op386FlagGT_ULT { 23081 b.Reset(BlockFirst) 23082 return true 23083 } 23084 // match: (ULT (FlagGT_UGT) yes no) 23085 // result: (First no yes) 23086 for b.Controls[0].Op == Op386FlagGT_UGT { 23087 b.Reset(BlockFirst) 23088 b.swapSuccessors() 23089 return true 23090 } 23091 } 23092 return false 23093 }