github.com/goccy/go-jit@v0.0.0-20200514131505-ff78d45cf6af/internal/ccall/jit-rules-x86-64.inc (about)

     1  /* Automatically generated from ./jit-rules-x86-64.ins - DO NOT EDIT */
     2  /*
     3   * Copyright (C) 2004, 2006-2007  Southern Storm Software, Pty Ltd.
     4   *
     5   * This file is part of the libjit library.
     6   *
     7   * The libjit library is free software: you can redistribute it and/or
     8   * modify it under the terms of the GNU Lesser General Public License
     9   * as published by the Free Software Foundation, either version 2.1 of
    10   * the License, or (at your option) any later version.
    11   *
    12   * The libjit library is distributed in the hope that it will be useful,
    13   * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    15   * Lesser General Public License for more details.
    16   *
    17   * You should have received a copy of the GNU Lesser General Public
    18   * License along with the libjit library.  If not, see
    19   * <http://www.gnu.org/licenses/>.
    20  */
    21  
    22  #if defined(JIT_INCLUDE_RULES)
    23  
    24  case JIT_OP_TRUNC_SBYTE:
    25  {
    26  	unsigned char * inst;
    27  	_jit_regs_t regs;
    28  	int reg, reg2;
    29  	{
    30  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
    31  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
    32  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
    33  		_jit_regs_begin(gen, &regs, 32);
    34  		inst = (unsigned char *)(gen->ptr);
    35  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
    36  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
    37  		{
    38  			x86_64_movsx8_reg_reg_size(inst, reg, reg2, 4);
    39  		}
    40  		gen->ptr = (unsigned char *)inst;
    41  		_jit_regs_commit(gen, &regs);
    42  	}
    43  }
    44  break;
    45  
    46  case JIT_OP_TRUNC_UBYTE:
    47  {
    48  	unsigned char * inst;
    49  	_jit_regs_t regs;
    50  	int reg, reg2;
    51  	{
    52  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
    53  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
    54  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
    55  		_jit_regs_begin(gen, &regs, 32);
    56  		inst = (unsigned char *)(gen->ptr);
    57  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
    58  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
    59  		{
    60  			x86_64_movzx8_reg_reg_size(inst, reg, reg2, 4);
    61  		}
    62  		gen->ptr = (unsigned char *)inst;
    63  		_jit_regs_commit(gen, &regs);
    64  	}
    65  }
    66  break;
    67  
    68  case JIT_OP_TRUNC_SHORT:
    69  {
    70  	unsigned char * inst;
    71  	_jit_regs_t regs;
    72  	int reg, reg2;
    73  	{
    74  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
    75  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
    76  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
    77  		_jit_regs_begin(gen, &regs, 32);
    78  		inst = (unsigned char *)(gen->ptr);
    79  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
    80  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
    81  		{
    82  			x86_64_movsx16_reg_reg_size(inst, reg, reg2, 4);
    83  		}
    84  		gen->ptr = (unsigned char *)inst;
    85  		_jit_regs_commit(gen, &regs);
    86  	}
    87  }
    88  break;
    89  
    90  case JIT_OP_TRUNC_USHORT:
    91  {
    92  	unsigned char * inst;
    93  	_jit_regs_t regs;
    94  	int reg, reg2;
    95  	{
    96  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
    97  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
    98  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
    99  		_jit_regs_begin(gen, &regs, 32);
   100  		inst = (unsigned char *)(gen->ptr);
   101  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   102  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   103  		{
   104  			x86_64_movzx16_reg_reg_size(inst, reg, reg2, 4);
   105  		}
   106  		gen->ptr = (unsigned char *)inst;
   107  		_jit_regs_commit(gen, &regs);
   108  	}
   109  }
   110  break;
   111  
   112  case JIT_OP_TRUNC_INT:
   113  {
   114  	unsigned char * inst;
   115  	_jit_regs_t regs;
   116  	int reg, reg2;
   117  	{
   118  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   119  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   120  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   121  		_jit_regs_begin(gen, &regs, 32);
   122  		inst = (unsigned char *)(gen->ptr);
   123  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   124  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   125  		{
   126  			if(reg != reg2)
   127  			{
   128  				x86_64_mov_reg_reg_size(inst, reg, reg2, 4);
   129  			}
   130  		}
   131  		gen->ptr = (unsigned char *)inst;
   132  		_jit_regs_commit(gen, &regs);
   133  	}
   134  }
   135  break;
   136  
   137  case JIT_OP_TRUNC_UINT:
   138  {
   139  	unsigned char * inst;
   140  	_jit_regs_t regs;
   141  	int reg, reg2;
   142  	{
   143  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   144  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   145  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   146  		_jit_regs_begin(gen, &regs, 32);
   147  		inst = (unsigned char *)(gen->ptr);
   148  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   149  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   150  		{
   151  			if(reg != reg2)
   152  			{
   153  				x86_64_mov_reg_reg_size(inst, reg, reg2, 4);
   154  			}
   155  		}
   156  		gen->ptr = (unsigned char *)inst;
   157  		_jit_regs_commit(gen, &regs);
   158  	}
   159  }
   160  break;
   161  
   162  case JIT_OP_LOW_WORD:
   163  {
   164  	unsigned char * inst;
   165  	_jit_regs_t regs;
   166  	int reg, reg2;
   167  	jit_nint imm_value;
   168  	jit_nint local_offset;
   169  	if(insn->value1->is_constant)
   170  	{
   171  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   172  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   173  		_jit_regs_begin(gen, &regs, 32);
   174  		inst = (unsigned char *)(gen->ptr);
   175  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   176  		imm_value = insn->value1->address;
   177  		{
   178  			x86_64_mov_reg_imm_size(inst, reg, imm_value, 4);
   179  		}
   180  		gen->ptr = (unsigned char *)inst;
   181  		_jit_regs_commit(gen, &regs);
   182  	}
   183  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   184  	{
   185  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   186  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   187  		_jit_gen_fix_value(insn->value1);
   188  		_jit_regs_begin(gen, &regs, 32);
   189  		inst = (unsigned char *)(gen->ptr);
   190  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   191  		local_offset = insn->value1->frame_offset;
   192  		{
   193  			x86_64_mov_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
   194  		}
   195  		gen->ptr = (unsigned char *)inst;
   196  		_jit_regs_commit(gen, &regs);
   197  	}
   198  	else
   199  	{
   200  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   201  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   202  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   203  		_jit_regs_begin(gen, &regs, 32);
   204  		inst = (unsigned char *)(gen->ptr);
   205  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   206  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   207  		{
   208  			if(reg != reg2)
   209  			{
   210  				x86_64_mov_reg_reg_size(inst, reg, reg2, 4);
   211  			}
   212  		}
   213  		gen->ptr = (unsigned char *)inst;
   214  		_jit_regs_commit(gen, &regs);
   215  	}
   216  }
   217  break;
   218  
   219  case JIT_OP_EXPAND_INT:
   220  {
   221  	unsigned char * inst;
   222  	_jit_regs_t regs;
   223  	int reg, reg2;
   224  	{
   225  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   226  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   227  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   228  		_jit_regs_begin(gen, &regs, 32);
   229  		inst = (unsigned char *)(gen->ptr);
   230  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   231  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   232  		{
   233  			x86_64_movsx32_reg_reg_size(inst, reg, reg2, 8);
   234  		}
   235  		gen->ptr = (unsigned char *)inst;
   236  		_jit_regs_commit(gen, &regs);
   237  	}
   238  }
   239  break;
   240  
   241  case JIT_OP_EXPAND_UINT:
   242  {
   243  	unsigned char * inst;
   244  	_jit_regs_t regs;
   245  	int reg, reg2;
   246  	{
   247  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   248  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   249  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   250  		_jit_regs_begin(gen, &regs, 32);
   251  		inst = (unsigned char *)(gen->ptr);
   252  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   253  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   254  		{
   255  			x86_64_mov_reg_reg_size(inst, reg, reg2, 4);
   256  		}
   257  		gen->ptr = (unsigned char *)inst;
   258  		_jit_regs_commit(gen, &regs);
   259  	}
   260  }
   261  break;
   262  
   263  case JIT_OP_INT_TO_NFLOAT:
   264  {
   265  	unsigned char * inst;
   266  	_jit_regs_t regs;
   267  	int reg, reg2;
   268  	jit_nint local_offset;
   269  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   270  	{
   271  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   272  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   273  		_jit_gen_fix_value(insn->value1);
   274  		_jit_regs_begin(gen, &regs, 32);
   275  		inst = (unsigned char *)(gen->ptr);
   276  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   277  		local_offset = insn->value1->frame_offset;
   278  		{
   279  			x86_64_fild_membase_size(inst, X86_64_RBP, local_offset, 4);
   280  		}
   281  		gen->ptr = (unsigned char *)inst;
   282  		_jit_regs_commit(gen, &regs);
   283  	}
   284  	else
   285  	{
   286  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   287  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   288  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   289  		_jit_regs_begin(gen, &regs, 32);
   290  		inst = (unsigned char *)(gen->ptr);
   291  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   292  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   293  		{
   294  	#ifdef HAVE_RED_ZONE
   295  			x86_64_mov_membase_reg_size(inst, X86_64_RSP, -8, reg2, 4);
   296  			x86_64_fild_membase_size(inst, X86_64_RSP, -8, 4);
   297  	#else
   298  			x86_64_push_reg_size(inst, reg2, 8);
   299  			x86_64_fild_membase_size(inst, X86_64_RSP, 0, 4);
   300  			x86_64_add_reg_imm_size(inst, X86_64_RSP, sizeof(jit_nint), 8);
   301  	#endif
   302  		}
   303  		gen->ptr = (unsigned char *)inst;
   304  		_jit_regs_commit(gen, &regs);
   305  	}
   306  }
   307  break;
   308  
   309  case JIT_OP_LONG_TO_NFLOAT:
   310  {
   311  	unsigned char * inst;
   312  	_jit_regs_t regs;
   313  	int reg, reg2;
   314  	jit_nint local_offset;
   315  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   316  	{
   317  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   318  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   319  		_jit_gen_fix_value(insn->value1);
   320  		_jit_regs_begin(gen, &regs, 32);
   321  		inst = (unsigned char *)(gen->ptr);
   322  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   323  		local_offset = insn->value1->frame_offset;
   324  		{
   325  			x86_64_fild_membase_size(inst, X86_64_RBP, local_offset, 8);
   326  		}
   327  		gen->ptr = (unsigned char *)inst;
   328  		_jit_regs_commit(gen, &regs);
   329  	}
   330  	else
   331  	{
   332  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   333  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   334  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   335  		_jit_regs_begin(gen, &regs, 32);
   336  		inst = (unsigned char *)(gen->ptr);
   337  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   338  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   339  		{
   340  	#ifdef HAVE_RED_ZONE
   341  			x86_64_mov_membase_reg_size(inst, X86_64_RSP, -8, reg2, 8);
   342  			x86_64_fild_membase_size(inst, X86_64_RSP, -8, 8);
   343  	#else
   344  			x86_64_push_reg_size(inst, reg2, 8);
   345  			x86_64_fild_membase_size(inst, X86_64_RSP, 0, 8);
   346  			x86_64_add_reg_imm_size(inst, X86_64_RSP, sizeof(jit_nint), 8);
   347  	#endif
   348  		}
   349  		gen->ptr = (unsigned char *)inst;
   350  		_jit_regs_commit(gen, &regs);
   351  	}
   352  }
   353  break;
   354  
   355  case JIT_OP_FLOAT32_TO_INT:
   356  {
   357  	unsigned char * inst;
   358  	_jit_regs_t regs;
   359  	int reg, reg2;
   360  	jit_nint local_offset;
   361  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   362  	{
   363  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   364  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   365  		_jit_gen_fix_value(insn->value1);
   366  		_jit_regs_begin(gen, &regs, 32);
   367  		inst = (unsigned char *)(gen->ptr);
   368  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   369  		local_offset = insn->value1->frame_offset;
   370  		{
   371  			x86_64_cvttss2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
   372  		}
   373  		gen->ptr = (unsigned char *)inst;
   374  		_jit_regs_commit(gen, &regs);
   375  	}
   376  	else
   377  	{
   378  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   379  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   380  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   381  		_jit_regs_begin(gen, &regs, 32);
   382  		inst = (unsigned char *)(gen->ptr);
   383  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   384  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   385  		{
   386  			x86_64_cvttss2si_reg_reg_size(inst, reg, reg2, 4);
   387  		}
   388  		gen->ptr = (unsigned char *)inst;
   389  		_jit_regs_commit(gen, &regs);
   390  	}
   391  }
   392  break;
   393  
   394  case JIT_OP_FLOAT32_TO_UINT:
   395  {
   396  	unsigned char * inst;
   397  	_jit_regs_t regs;
   398  	int reg, reg2;
   399  	jit_nint local_offset;
   400  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   401  	{
   402  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   403  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   404  		_jit_gen_fix_value(insn->value1);
   405  		_jit_regs_begin(gen, &regs, 32);
   406  		inst = (unsigned char *)(gen->ptr);
   407  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   408  		local_offset = insn->value1->frame_offset;
   409  		{
   410  			x86_64_cvttss2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   411  		}
   412  		gen->ptr = (unsigned char *)inst;
   413  		_jit_regs_commit(gen, &regs);
   414  	}
   415  	else
   416  	{
   417  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   418  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   419  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   420  		_jit_regs_begin(gen, &regs, 32);
   421  		inst = (unsigned char *)(gen->ptr);
   422  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   423  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   424  		{
   425  			x86_64_cvttss2si_reg_reg_size(inst, reg, reg2, 8);
   426  		}
   427  		gen->ptr = (unsigned char *)inst;
   428  		_jit_regs_commit(gen, &regs);
   429  	}
   430  }
   431  break;
   432  
   433  case JIT_OP_FLOAT32_TO_LONG:
   434  {
   435  	unsigned char * inst;
   436  	_jit_regs_t regs;
   437  	int reg, reg2;
   438  	jit_nint local_offset;
   439  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   440  	{
   441  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   442  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   443  		_jit_gen_fix_value(insn->value1);
   444  		_jit_regs_begin(gen, &regs, 32);
   445  		inst = (unsigned char *)(gen->ptr);
   446  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   447  		local_offset = insn->value1->frame_offset;
   448  		{
   449  			x86_64_cvttss2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   450  		}
   451  		gen->ptr = (unsigned char *)inst;
   452  		_jit_regs_commit(gen, &regs);
   453  	}
   454  	else
   455  	{
   456  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   457  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   458  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   459  		_jit_regs_begin(gen, &regs, 32);
   460  		inst = (unsigned char *)(gen->ptr);
   461  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   462  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   463  		{
   464  			x86_64_cvttss2si_reg_reg_size(inst, reg, reg2, 8);
   465  		}
   466  		gen->ptr = (unsigned char *)inst;
   467  		_jit_regs_commit(gen, &regs);
   468  	}
   469  }
   470  break;
   471  
   472  case JIT_OP_INT_TO_FLOAT32:
   473  {
   474  	unsigned char * inst;
   475  	_jit_regs_t regs;
   476  	int reg, reg2;
   477  	jit_nint local_offset;
   478  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   479  	{
   480  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   481  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   482  		_jit_gen_fix_value(insn->value1);
   483  		_jit_regs_begin(gen, &regs, 32);
   484  		inst = (unsigned char *)(gen->ptr);
   485  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   486  		local_offset = insn->value1->frame_offset;
   487  		{
   488  			x86_64_cvtsi2ss_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
   489  		}
   490  		gen->ptr = (unsigned char *)inst;
   491  		_jit_regs_commit(gen, &regs);
   492  	}
   493  	else
   494  	{
   495  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   496  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   497  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   498  		_jit_regs_begin(gen, &regs, 32);
   499  		inst = (unsigned char *)(gen->ptr);
   500  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   501  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   502  		{
   503  			x86_64_cvtsi2ss_reg_reg_size(inst, reg, reg2, 4);
   504  		}
   505  		gen->ptr = (unsigned char *)inst;
   506  		_jit_regs_commit(gen, &regs);
   507  	}
   508  }
   509  break;
   510  
   511  case JIT_OP_UINT_TO_FLOAT32:
   512  {
   513  	unsigned char * inst;
   514  	_jit_regs_t regs;
   515  	int reg, reg2;
   516  	{
   517  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   518  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   519  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   520  		_jit_regs_begin(gen, &regs, 32);
   521  		inst = (unsigned char *)(gen->ptr);
   522  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   523  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   524  		{
   525  			x86_64_mov_reg_reg_size(inst, reg2, reg2, 4);
   526  			x86_64_cvtsi2ss_reg_reg_size(inst, reg, reg2, 8);
   527  		}
   528  		gen->ptr = (unsigned char *)inst;
   529  		_jit_regs_commit(gen, &regs);
   530  	}
   531  }
   532  break;
   533  
   534  case JIT_OP_LONG_TO_FLOAT32:
   535  {
   536  	unsigned char * inst;
   537  	_jit_regs_t regs;
   538  	int reg, reg2;
   539  	jit_nint local_offset;
   540  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   541  	{
   542  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   543  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   544  		_jit_gen_fix_value(insn->value1);
   545  		_jit_regs_begin(gen, &regs, 32);
   546  		inst = (unsigned char *)(gen->ptr);
   547  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   548  		local_offset = insn->value1->frame_offset;
   549  		{
   550  			x86_64_cvtsi2ss_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   551  		}
   552  		gen->ptr = (unsigned char *)inst;
   553  		_jit_regs_commit(gen, &regs);
   554  	}
   555  	else
   556  	{
   557  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   558  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   559  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   560  		_jit_regs_begin(gen, &regs, 32);
   561  		inst = (unsigned char *)(gen->ptr);
   562  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   563  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   564  		{
   565  			x86_64_cvtsi2ss_reg_reg_size(inst, reg, reg2, 8);
   566  		}
   567  		gen->ptr = (unsigned char *)inst;
   568  		_jit_regs_commit(gen, &regs);
   569  	}
   570  }
   571  break;
   572  
   573  case JIT_OP_FLOAT64_TO_FLOAT32:
   574  {
   575  	unsigned char * inst;
   576  	_jit_regs_t regs;
   577  	int reg, reg2;
   578  	jit_nint local_offset;
   579  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   580  	{
   581  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   582  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   583  		_jit_gen_fix_value(insn->value1);
   584  		_jit_regs_begin(gen, &regs, 32);
   585  		inst = (unsigned char *)(gen->ptr);
   586  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   587  		local_offset = insn->value1->frame_offset;
   588  		{
   589  			x86_64_cvtsd2ss_reg_membase(inst, reg, X86_64_RBP, local_offset);
   590  		}
   591  		gen->ptr = (unsigned char *)inst;
   592  		_jit_regs_commit(gen, &regs);
   593  	}
   594  	else
   595  	{
   596  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   597  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   598  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   599  		_jit_regs_begin(gen, &regs, 32);
   600  		inst = (unsigned char *)(gen->ptr);
   601  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   602  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   603  		{
   604  			x86_64_cvtsd2ss_reg_reg(inst, reg, reg2);
   605  		}
   606  		gen->ptr = (unsigned char *)inst;
   607  		_jit_regs_commit(gen, &regs);
   608  	}
   609  }
   610  break;
   611  
   612  case JIT_OP_FLOAT64_TO_INT:
   613  {
   614  	unsigned char * inst;
   615  	_jit_regs_t regs;
   616  	int reg, reg2;
   617  	jit_nint local_offset;
   618  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   619  	{
   620  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   621  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   622  		_jit_gen_fix_value(insn->value1);
   623  		_jit_regs_begin(gen, &regs, 32);
   624  		inst = (unsigned char *)(gen->ptr);
   625  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   626  		local_offset = insn->value1->frame_offset;
   627  		{
   628  			x86_64_cvttsd2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
   629  		}
   630  		gen->ptr = (unsigned char *)inst;
   631  		_jit_regs_commit(gen, &regs);
   632  	}
   633  	else
   634  	{
   635  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   636  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   637  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   638  		_jit_regs_begin(gen, &regs, 32);
   639  		inst = (unsigned char *)(gen->ptr);
   640  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   641  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   642  		{
   643  			x86_64_cvttsd2si_reg_reg_size(inst, reg, reg2, 4);
   644  		}
   645  		gen->ptr = (unsigned char *)inst;
   646  		_jit_regs_commit(gen, &regs);
   647  	}
   648  }
   649  break;
   650  
   651  case JIT_OP_FLOAT64_TO_UINT:
   652  {
   653  	unsigned char * inst;
   654  	_jit_regs_t regs;
   655  	int reg, reg2;
   656  	jit_nint local_offset;
   657  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   658  	{
   659  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   660  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   661  		_jit_gen_fix_value(insn->value1);
   662  		_jit_regs_begin(gen, &regs, 32);
   663  		inst = (unsigned char *)(gen->ptr);
   664  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   665  		local_offset = insn->value1->frame_offset;
   666  		{
   667  			x86_64_cvttsd2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   668  		}
   669  		gen->ptr = (unsigned char *)inst;
   670  		_jit_regs_commit(gen, &regs);
   671  	}
   672  	else
   673  	{
   674  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   675  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   676  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   677  		_jit_regs_begin(gen, &regs, 32);
   678  		inst = (unsigned char *)(gen->ptr);
   679  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   680  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   681  		{
   682  			x86_64_cvttsd2si_reg_reg_size(inst, reg, reg2, 8);
   683  		}
   684  		gen->ptr = (unsigned char *)inst;
   685  		_jit_regs_commit(gen, &regs);
   686  	}
   687  }
   688  break;
   689  
   690  case JIT_OP_FLOAT64_TO_LONG:
   691  {
   692  	unsigned char * inst;
   693  	_jit_regs_t regs;
   694  	int reg, reg2;
   695  	jit_nint local_offset;
   696  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   697  	{
   698  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   699  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   700  		_jit_gen_fix_value(insn->value1);
   701  		_jit_regs_begin(gen, &regs, 32);
   702  		inst = (unsigned char *)(gen->ptr);
   703  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   704  		local_offset = insn->value1->frame_offset;
   705  		{
   706  			x86_64_cvttsd2si_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   707  		}
   708  		gen->ptr = (unsigned char *)inst;
   709  		_jit_regs_commit(gen, &regs);
   710  	}
   711  	else
   712  	{
   713  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   714  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   715  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   716  		_jit_regs_begin(gen, &regs, 32);
   717  		inst = (unsigned char *)(gen->ptr);
   718  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   719  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   720  		{
   721  			x86_64_cvttsd2si_reg_reg_size(inst, reg, reg2, 8);
   722  		}
   723  		gen->ptr = (unsigned char *)inst;
   724  		_jit_regs_commit(gen, &regs);
   725  	}
   726  }
   727  break;
   728  
   729  case JIT_OP_INT_TO_FLOAT64:
   730  {
   731  	unsigned char * inst;
   732  	_jit_regs_t regs;
   733  	int reg, reg2;
   734  	jit_nint local_offset;
   735  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   736  	{
   737  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   738  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   739  		_jit_gen_fix_value(insn->value1);
   740  		_jit_regs_begin(gen, &regs, 32);
   741  		inst = (unsigned char *)(gen->ptr);
   742  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   743  		local_offset = insn->value1->frame_offset;
   744  		{
   745  			x86_64_cvtsi2sd_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
   746  		}
   747  		gen->ptr = (unsigned char *)inst;
   748  		_jit_regs_commit(gen, &regs);
   749  	}
   750  	else
   751  	{
   752  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   753  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   754  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   755  		_jit_regs_begin(gen, &regs, 32);
   756  		inst = (unsigned char *)(gen->ptr);
   757  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   758  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   759  		{
   760  			x86_64_cvtsi2sd_reg_reg_size(inst, reg, reg2, 4);
   761  		}
   762  		gen->ptr = (unsigned char *)inst;
   763  		_jit_regs_commit(gen, &regs);
   764  	}
   765  }
   766  break;
   767  
   768  case JIT_OP_UINT_TO_FLOAT64:
   769  {
   770  	unsigned char * inst;
   771  	_jit_regs_t regs;
   772  	int reg, reg2;
   773  	{
   774  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   775  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   776  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   777  		_jit_regs_begin(gen, &regs, 32);
   778  		inst = (unsigned char *)(gen->ptr);
   779  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   780  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   781  		{
   782  			x86_64_mov_reg_reg_size(inst, reg2, reg2, 4);
   783  			x86_64_cvtsi2sd_reg_reg_size(inst, reg, reg2, 8);
   784  		}
   785  		gen->ptr = (unsigned char *)inst;
   786  		_jit_regs_commit(gen, &regs);
   787  	}
   788  }
   789  break;
   790  
   791  case JIT_OP_LONG_TO_FLOAT64:
   792  {
   793  	unsigned char * inst;
   794  	_jit_regs_t regs;
   795  	int reg, reg2;
   796  	jit_nint local_offset;
   797  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   798  	{
   799  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   800  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   801  		_jit_gen_fix_value(insn->value1);
   802  		_jit_regs_begin(gen, &regs, 32);
   803  		inst = (unsigned char *)(gen->ptr);
   804  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   805  		local_offset = insn->value1->frame_offset;
   806  		{
   807  			x86_64_cvtsi2sd_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
   808  		}
   809  		gen->ptr = (unsigned char *)inst;
   810  		_jit_regs_commit(gen, &regs);
   811  	}
   812  	else
   813  	{
   814  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   815  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   816  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
   817  		_jit_regs_begin(gen, &regs, 32);
   818  		inst = (unsigned char *)(gen->ptr);
   819  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   820  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   821  		{
   822  			x86_64_cvtsi2sd_reg_reg_size(inst, reg, reg2, 8);
   823  		}
   824  		gen->ptr = (unsigned char *)inst;
   825  		_jit_regs_commit(gen, &regs);
   826  	}
   827  }
   828  break;
   829  
   830  case JIT_OP_FLOAT32_TO_FLOAT64:
   831  {
   832  	unsigned char * inst;
   833  	_jit_regs_t regs;
   834  	int reg, reg2;
   835  	jit_nint local_offset;
   836  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   837  	{
   838  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   839  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   840  		_jit_gen_fix_value(insn->value1);
   841  		_jit_regs_begin(gen, &regs, 32);
   842  		inst = (unsigned char *)(gen->ptr);
   843  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   844  		local_offset = insn->value1->frame_offset;
   845  		{
   846  			x86_64_cvtss2sd_reg_membase(inst, reg, X86_64_RBP, local_offset);
   847  		}
   848  		gen->ptr = (unsigned char *)inst;
   849  		_jit_regs_commit(gen, &regs);
   850  	}
   851  	else
   852  	{
   853  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   854  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
   855  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   856  		_jit_regs_begin(gen, &regs, 32);
   857  		inst = (unsigned char *)(gen->ptr);
   858  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   859  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   860  		{
   861  			x86_64_cvtss2sd_reg_reg(inst, reg, reg2);
   862  		}
   863  		gen->ptr = (unsigned char *)inst;
   864  		_jit_regs_commit(gen, &regs);
   865  	}
   866  }
   867  break;
   868  
   869  case JIT_OP_NFLOAT_TO_INT:
   870  {
   871  	unsigned char * inst;
   872  	_jit_regs_t regs;
   873  	int reg, reg2, reg3;
   874  	{
   875  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
   876  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   877  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
   878  		_jit_regs_add_scratch(&regs, x86_64_reg);
   879  		_jit_regs_begin(gen, &regs, 32);
   880  		inst = (unsigned char *)(gen->ptr);
   881  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   882  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   883  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
   884  		{
   885  			inst = x86_64_nfloat_to_int(inst, reg, reg3, 4);
   886  		}
   887  		gen->ptr = (unsigned char *)inst;
   888  		_jit_regs_commit(gen, &regs);
   889  	}
   890  }
   891  break;
   892  
   893  case JIT_OP_NFLOAT_TO_LONG:
   894  {
   895  	unsigned char * inst;
   896  	_jit_regs_t regs;
   897  	int reg, reg2, reg3;
   898  	{
   899  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
   900  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
   901  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
   902  		_jit_regs_add_scratch(&regs, x86_64_reg);
   903  		_jit_regs_begin(gen, &regs, 32);
   904  		inst = (unsigned char *)(gen->ptr);
   905  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   906  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   907  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
   908  		{
   909  			inst = x86_64_nfloat_to_int(inst, reg, reg3, 8);
   910  		}
   911  		gen->ptr = (unsigned char *)inst;
   912  		_jit_regs_commit(gen, &regs);
   913  	}
   914  }
   915  break;
   916  
   917  case JIT_OP_FLOAT32_TO_NFLOAT:
   918  {
   919  	unsigned char * inst;
   920  	_jit_regs_t regs;
   921  	int reg, reg2;
   922  	jit_nint local_offset;
   923  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   924  	{
   925  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   926  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   927  		_jit_gen_fix_value(insn->value1);
   928  		_jit_regs_begin(gen, &regs, 32);
   929  		inst = (unsigned char *)(gen->ptr);
   930  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   931  		local_offset = insn->value1->frame_offset;
   932  		{
   933  			x86_64_fld_membase_size(inst, X86_64_RBP, local_offset, 4);
   934  		}
   935  		gen->ptr = (unsigned char *)inst;
   936  		_jit_regs_commit(gen, &regs);
   937  	}
   938  	else
   939  	{
   940  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   941  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   942  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   943  		_jit_regs_begin(gen, &regs, 32);
   944  		inst = (unsigned char *)(gen->ptr);
   945  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   946  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   947  		{
   948  	#ifdef HAVE_RED_ZONE
   949  			x86_64_movss_membase_reg(inst, X86_64_RSP, -8, reg2);
   950  			x86_64_fld_membase_size(inst, X86_64_RSP, -8, 4);
   951  	#else
   952  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
   953  			x86_64_movss_regp_reg(inst, X86_64_RSP, reg2);
   954  			x86_64_fld_regp_size(inst, X86_64_RSP, 4);
   955  			x86_64_add_reg_imm_size(inst, X86_64_RSP, 8, 8);
   956  	#endif
   957  		}
   958  		gen->ptr = (unsigned char *)inst;
   959  		_jit_regs_commit(gen, &regs);
   960  	}
   961  }
   962  break;
   963  
   964  case JIT_OP_FLOAT64_TO_NFLOAT:
   965  {
   966  	unsigned char * inst;
   967  	_jit_regs_t regs;
   968  	int reg, reg2;
   969  	jit_nint local_offset;
   970  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
   971  	{
   972  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   973  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   974  		_jit_gen_fix_value(insn->value1);
   975  		_jit_regs_begin(gen, &regs, 32);
   976  		inst = (unsigned char *)(gen->ptr);
   977  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   978  		local_offset = insn->value1->frame_offset;
   979  		{
   980  			x86_64_fld_membase_size(inst, X86_64_RBP, local_offset, 8);
   981  		}
   982  		gen->ptr = (unsigned char *)inst;
   983  		_jit_regs_commit(gen, &regs);
   984  	}
   985  	else
   986  	{
   987  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
   988  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
   989  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
   990  		_jit_regs_begin(gen, &regs, 32);
   991  		inst = (unsigned char *)(gen->ptr);
   992  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
   993  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
   994  		{
   995  	#ifdef HAVE_RED_ZONE
   996  			x86_64_movsd_membase_reg(inst, X86_64_RSP, -8, reg2);
   997  			x86_64_fld_membase_size(inst, X86_64_RSP, -8, 8);
   998  	#else
   999  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1000  			x86_64_movsd_regp_reg(inst, X86_64_RSP, reg2);
  1001  			x86_64_fld_regp_size(inst, X86_64_RSP, 8);
  1002  			x86_64_add_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1003  	#endif
  1004  		}
  1005  		gen->ptr = (unsigned char *)inst;
  1006  		_jit_regs_commit(gen, &regs);
  1007  	}
  1008  }
  1009  break;
  1010  
  1011  case JIT_OP_NFLOAT_TO_FLOAT32:
  1012  {
  1013  	unsigned char * inst;
  1014  	_jit_regs_t regs;
  1015  	int reg, reg2;
  1016  	jit_nint local_offset;
  1017  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1018  	{
  1019  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
  1020  		_jit_gen_fix_value(insn->dest);
  1021  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1022  		_jit_regs_begin(gen, &regs, 32);
  1023  		inst = (unsigned char *)(gen->ptr);
  1024  		local_offset = insn->dest->frame_offset;
  1025  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1026  		{
  1027  			x86_64_fstp_membase_size(inst, X86_64_RBP, local_offset, 4);
  1028  		}
  1029  		gen->ptr = (unsigned char *)inst;
  1030  		_jit_regs_commit(gen, &regs);
  1031  	}
  1032  	else
  1033  	{
  1034  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
  1035  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  1036  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1037  		_jit_regs_begin(gen, &regs, 32);
  1038  		inst = (unsigned char *)(gen->ptr);
  1039  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  1040  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1041  		{
  1042  	#ifdef HAVE_RED_ZONE
  1043  			/* Avoid modifying the stack pointer by simply using negative */
  1044  			/* offsets here. */
  1045  			x86_64_fstp_membase_size(inst, X86_64_RSP, -8, 4);
  1046  			x86_64_movss_reg_membase(inst, reg, X86_64_RSP, -8);
  1047  	#else
  1048  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1049  			x86_64_fstp_regp_size(inst, X86_64_RSP, 4);
  1050  			x86_64_movss_reg_regp(inst, reg, X86_64_RSP);
  1051  			x86_64_add_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1052  	#endif
  1053  		}
  1054  		gen->ptr = (unsigned char *)inst;
  1055  		_jit_regs_commit(gen, &regs);
  1056  	}
  1057  }
  1058  break;
  1059  
  1060  case JIT_OP_NFLOAT_TO_FLOAT64:
  1061  {
  1062  	unsigned char * inst;
  1063  	_jit_regs_t regs;
  1064  	int reg, reg2;
  1065  	jit_nint local_offset;
  1066  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1067  	{
  1068  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
  1069  		_jit_gen_fix_value(insn->dest);
  1070  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1071  		_jit_regs_begin(gen, &regs, 32);
  1072  		inst = (unsigned char *)(gen->ptr);
  1073  		local_offset = insn->dest->frame_offset;
  1074  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1075  		{
  1076  			x86_64_fstp_membase_size(inst, X86_64_RBP, local_offset, 8);
  1077  		}
  1078  		gen->ptr = (unsigned char *)inst;
  1079  		_jit_regs_commit(gen, &regs);
  1080  	}
  1081  	else
  1082  	{
  1083  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_STACK);
  1084  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  1085  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1086  		_jit_regs_begin(gen, &regs, 32);
  1087  		inst = (unsigned char *)(gen->ptr);
  1088  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  1089  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1090  		{
  1091  	#ifdef HAVE_RED_ZONE
  1092  			/* Avoid modifying the stack pointer by simply using negative */
  1093  			/* offsets here. */
  1094  			x86_64_fstp_membase_size(inst, X86_64_RSP, -8, 8);
  1095  			x86_64_movsd_reg_membase(inst, reg, X86_64_RSP, -8);
  1096  	#else
  1097  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1098  			x86_64_fstp_regp_size(inst, X86_64_RSP, 8);
  1099  			x86_64_movsd_reg_regp(inst, reg, X86_64_RSP);
  1100  			x86_64_add_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1101  	#endif
  1102  		}
  1103  		gen->ptr = (unsigned char *)inst;
  1104  		_jit_regs_commit(gen, &regs);
  1105  	}
  1106  }
  1107  break;
  1108  
  1109  case JIT_OP_COPY_LOAD_SBYTE:
  1110  case JIT_OP_COPY_LOAD_UBYTE:
  1111  case JIT_OP_COPY_STORE_BYTE:
  1112  {
  1113  	unsigned char * inst;
  1114  	_jit_regs_t regs;
  1115  	int reg;
  1116  	jit_nint imm_value;
  1117  	jit_nint local_offset;
  1118  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0 && insn->value1->is_constant)
  1119  	{
  1120  		_jit_gen_fix_value(insn->dest);
  1121  		_jit_gen_check_space(gen, 32);
  1122  		inst = (unsigned char *)(gen->ptr);
  1123  		local_offset = insn->dest->frame_offset;
  1124  		imm_value = insn->value1->address;
  1125  		{
  1126  			x86_64_mov_membase_imm_size(inst, X86_64_RBP, local_offset, imm_value, 1);
  1127  		}
  1128  		gen->ptr = (unsigned char *)inst;
  1129  	}
  1130  	else if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1131  	{
  1132  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COPY);
  1133  		_jit_gen_fix_value(insn->dest);
  1134  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1135  		_jit_regs_begin(gen, &regs, 32);
  1136  		inst = (unsigned char *)(gen->ptr);
  1137  		local_offset = insn->dest->frame_offset;
  1138  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1139  		{
  1140  			x86_64_mov_membase_reg_size(inst, X86_64_RBP, local_offset, reg, 1);
  1141  		}
  1142  		gen->ptr = (unsigned char *)inst;
  1143  		_jit_regs_commit(gen, &regs);
  1144  	}
  1145  	else
  1146  	{
  1147  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1148  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1149  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1150  		_jit_regs_begin(gen, &regs, 32);
  1151  		inst = (unsigned char *)(gen->ptr);
  1152  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1153  		{}
  1154  		gen->ptr = (unsigned char *)inst;
  1155  		_jit_regs_commit(gen, &regs);
  1156  	}
  1157  }
  1158  break;
  1159  
  1160  case JIT_OP_COPY_LOAD_SHORT:
  1161  case JIT_OP_COPY_LOAD_USHORT:
  1162  case JIT_OP_COPY_STORE_SHORT:
  1163  {
  1164  	unsigned char * inst;
  1165  	_jit_regs_t regs;
  1166  	int reg;
  1167  	jit_nint imm_value;
  1168  	jit_nint local_offset;
  1169  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0 && insn->value1->is_constant)
  1170  	{
  1171  		_jit_gen_fix_value(insn->dest);
  1172  		_jit_gen_check_space(gen, 32);
  1173  		inst = (unsigned char *)(gen->ptr);
  1174  		local_offset = insn->dest->frame_offset;
  1175  		imm_value = insn->value1->address;
  1176  		{
  1177  			x86_64_mov_membase_imm_size(inst, X86_64_RBP, local_offset, imm_value, 2);
  1178  		}
  1179  		gen->ptr = (unsigned char *)inst;
  1180  	}
  1181  	else if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1182  	{
  1183  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COPY);
  1184  		_jit_gen_fix_value(insn->dest);
  1185  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1186  		_jit_regs_begin(gen, &regs, 32);
  1187  		inst = (unsigned char *)(gen->ptr);
  1188  		local_offset = insn->dest->frame_offset;
  1189  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1190  		{
  1191  			x86_64_mov_membase_reg_size(inst, X86_64_RBP, local_offset, reg, 2);
  1192  		}
  1193  		gen->ptr = (unsigned char *)inst;
  1194  		_jit_regs_commit(gen, &regs);
  1195  	}
  1196  	else
  1197  	{
  1198  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1199  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1200  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1201  		_jit_regs_begin(gen, &regs, 32);
  1202  		inst = (unsigned char *)(gen->ptr);
  1203  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1204  		{}
  1205  		gen->ptr = (unsigned char *)inst;
  1206  		_jit_regs_commit(gen, &regs);
  1207  	}
  1208  }
  1209  break;
  1210  
  1211  case JIT_OP_COPY_INT:
  1212  {
  1213  	unsigned char * inst;
  1214  	_jit_regs_t regs;
  1215  	int reg;
  1216  	jit_nint imm_value;
  1217  	jit_nint local_offset;
  1218  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0 && insn->value1->is_constant)
  1219  	{
  1220  		_jit_gen_fix_value(insn->dest);
  1221  		_jit_gen_check_space(gen, 32);
  1222  		inst = (unsigned char *)(gen->ptr);
  1223  		local_offset = insn->dest->frame_offset;
  1224  		imm_value = insn->value1->address;
  1225  		{
  1226  			x86_64_mov_membase_imm_size(inst, X86_64_RBP, local_offset, imm_value, 4);
  1227  		}
  1228  		gen->ptr = (unsigned char *)inst;
  1229  	}
  1230  	else
  1231  	{
  1232  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1233  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1234  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1235  		_jit_regs_begin(gen, &regs, 32);
  1236  		inst = (unsigned char *)(gen->ptr);
  1237  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1238  		{}
  1239  		gen->ptr = (unsigned char *)inst;
  1240  		_jit_regs_commit(gen, &regs);
  1241  	}
  1242  }
  1243  break;
  1244  
  1245  case JIT_OP_COPY_LONG:
  1246  {
  1247  	unsigned char * inst;
  1248  	_jit_regs_t regs;
  1249  	int reg;
  1250  	jit_nint imm_value;
  1251  	jit_nint local_offset;
  1252  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0 && insn->value1->is_nint_constant && insn->value1->address >= -2147483648 && insn->value1->address <= 2147483647)
  1253  	{
  1254  		_jit_gen_fix_value(insn->dest);
  1255  		_jit_gen_check_space(gen, 32);
  1256  		inst = (unsigned char *)(gen->ptr);
  1257  		local_offset = insn->dest->frame_offset;
  1258  		imm_value = insn->value1->address;
  1259  		{
  1260  			x86_64_mov_membase_imm_size(inst, X86_64_RBP, local_offset, imm_value, 8);
  1261  		}
  1262  		gen->ptr = (unsigned char *)inst;
  1263  	}
  1264  	else
  1265  	{
  1266  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1267  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1268  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1269  		_jit_regs_begin(gen, &regs, 32);
  1270  		inst = (unsigned char *)(gen->ptr);
  1271  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1272  		{}
  1273  		gen->ptr = (unsigned char *)inst;
  1274  		_jit_regs_commit(gen, &regs);
  1275  	}
  1276  }
  1277  break;
  1278  
  1279  case JIT_OP_COPY_FLOAT32:
  1280  {
  1281  	unsigned char * inst;
  1282  	_jit_regs_t regs;
  1283  	int reg;
  1284  	jit_nint local_offset;
  1285  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1286  	{
  1287  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COPY);
  1288  		_jit_gen_fix_value(insn->dest);
  1289  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1290  		_jit_regs_begin(gen, &regs, 32);
  1291  		inst = (unsigned char *)(gen->ptr);
  1292  		local_offset = insn->dest->frame_offset;
  1293  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1294  		{
  1295  			x86_64_movss_membase_reg(inst, X86_64_RBP, local_offset, reg);
  1296  		}
  1297  		gen->ptr = (unsigned char *)inst;
  1298  		_jit_regs_commit(gen, &regs);
  1299  	}
  1300  	else
  1301  	{
  1302  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1303  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  1304  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1305  		_jit_regs_begin(gen, &regs, 32);
  1306  		inst = (unsigned char *)(gen->ptr);
  1307  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1308  		{}
  1309  		gen->ptr = (unsigned char *)inst;
  1310  		_jit_regs_commit(gen, &regs);
  1311  	}
  1312  }
  1313  break;
  1314  
  1315  case JIT_OP_COPY_FLOAT64:
  1316  {
  1317  	unsigned char * inst;
  1318  	_jit_regs_t regs;
  1319  	int reg;
  1320  	jit_nint local_offset;
  1321  	if(!insn->dest->is_constant && !insn->dest->in_register && !insn->dest->has_global_register&& (insn->flags & JIT_INSN_DEST_NEXT_USE) == 0)
  1322  	{
  1323  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COPY);
  1324  		_jit_gen_fix_value(insn->dest);
  1325  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1326  		_jit_regs_begin(gen, &regs, 32);
  1327  		inst = (unsigned char *)(gen->ptr);
  1328  		local_offset = insn->dest->frame_offset;
  1329  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1330  		{
  1331  			x86_64_movsd_membase_reg(inst, X86_64_RBP, local_offset, reg);
  1332  		}
  1333  		gen->ptr = (unsigned char *)inst;
  1334  		_jit_regs_commit(gen, &regs);
  1335  	}
  1336  	else
  1337  	{
  1338  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY);
  1339  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  1340  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1341  		_jit_regs_begin(gen, &regs, 32);
  1342  		inst = (unsigned char *)(gen->ptr);
  1343  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1344  		{}
  1345  		gen->ptr = (unsigned char *)inst;
  1346  		_jit_regs_commit(gen, &regs);
  1347  	}
  1348  }
  1349  break;
  1350  
  1351  case JIT_OP_COPY_NFLOAT:
  1352  {
  1353  	unsigned char * inst;
  1354  	_jit_regs_t regs;
  1355  	int reg;
  1356  	{
  1357  		_jit_regs_init(gen, &regs, _JIT_REGS_COPY | _JIT_REGS_STACK);
  1358  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
  1359  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1360  		_jit_regs_begin(gen, &regs, 32);
  1361  		inst = (unsigned char *)(gen->ptr);
  1362  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1363  		{}
  1364  		gen->ptr = (unsigned char *)inst;
  1365  		_jit_regs_commit(gen, &regs);
  1366  	}
  1367  }
  1368  break;
  1369  
  1370  case JIT_OP_COPY_STRUCT:
  1371  {
  1372  	unsigned char * inst;
  1373  	_jit_regs_t regs;
  1374  	int reg, reg2;
  1375  	jit_nint local_offset, local_offset2;
  1376  	if(!insn->dest->is_constant && !insn->dest->has_global_register && !insn->value1->is_constant && !insn->value1->has_global_register && (jit_type_get_size(jit_value_get_type(insn->dest)) <= _JIT_MAX_MEMCPY_INLINE))
  1377  	{
  1378  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  1379  		_jit_regs_force_out(gen, insn->dest, 1);
  1380  		_jit_gen_fix_value(insn->dest);
  1381  		_jit_regs_force_out(gen, insn->value1, 0);
  1382  		_jit_gen_fix_value(insn->value1);
  1383  		_jit_regs_add_scratch(&regs, x86_64_reg);
  1384  		_jit_regs_add_scratch(&regs, x86_64_xreg);
  1385  		_jit_regs_begin(gen, &regs, 32);
  1386  		inst = (unsigned char *)(gen->ptr);
  1387  		local_offset = insn->dest->frame_offset;
  1388  		local_offset2 = insn->value1->frame_offset;
  1389  		reg = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  1390  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  1391  		{
  1392  			inst = small_struct_copy(gen, inst, X86_64_RBP, local_offset, X86_64_RBP, local_offset2,
  1393  									 jit_value_get_type(insn->dest), reg, reg2);
  1394  		}
  1395  		gen->ptr = (unsigned char *)inst;
  1396  		_jit_regs_commit(gen, &regs);
  1397  	}
  1398  	else
  1399  	{
  1400  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  1401  		_jit_regs_force_out(gen, insn->dest, 1);
  1402  		_jit_gen_fix_value(insn->dest);
  1403  		_jit_regs_force_out(gen, insn->value1, 0);
  1404  		_jit_gen_fix_value(insn->value1);
  1405  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
  1406  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
  1407  		_jit_regs_begin(gen, &regs, 32);
  1408  		inst = (unsigned char *)(gen->ptr);
  1409  		local_offset = insn->dest->frame_offset;
  1410  		local_offset2 = insn->value1->frame_offset;
  1411  		{
  1412  			inst = memory_copy(gen, inst, X86_64_RBP, local_offset, X86_64_RBP, local_offset2,
  1413  					   jit_type_get_size(jit_value_get_type(insn->dest)));
  1414  		}
  1415  		gen->ptr = (unsigned char *)inst;
  1416  		_jit_regs_commit(gen, &regs);
  1417  	}
  1418  }
  1419  break;
  1420  
  1421  case JIT_OP_ADDRESS_OF:
  1422  {
  1423  	unsigned char * inst;
  1424  	_jit_regs_t regs;
  1425  	int reg;
  1426  	jit_nint local_offset;
  1427  	{
  1428  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  1429  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1430  		_jit_regs_force_out(gen, insn->value1, 0);
  1431  		_jit_gen_fix_value(insn->value1);
  1432  		_jit_regs_begin(gen, &regs, 32);
  1433  		inst = (unsigned char *)(gen->ptr);
  1434  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  1435  		local_offset = insn->value1->frame_offset;
  1436  		{
  1437  			x86_64_lea_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  1438  		}
  1439  		gen->ptr = (unsigned char *)inst;
  1440  		_jit_regs_commit(gen, &regs);
  1441  	}
  1442  }
  1443  break;
  1444  
  1445  case JIT_OP_INCOMING_REG:
  1446  case JIT_OP_RETURN_REG:
  1447  {
  1448  	unsigned char * inst;
  1449  	_jit_regs_t regs;
  1450  	int reg;
  1451  	{
  1452  		_jit_regs_init(gen, &regs, 0);
  1453  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1454  		_jit_regs_begin(gen, &regs, 32);
  1455  		inst = (unsigned char *)(gen->ptr);
  1456  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1457  		{
  1458  			/*
  1459  			 * This rule does nothing itself. Also at this point
  1460  			 * the value is supposed to be already in the register
  1461  			 * so the "reg" pattern does not load it either. But
  1462  			 * it allows the allocator to check the liveness flags
  1463  			 * and free the register if the value is dead.
  1464  			 */
  1465  		}
  1466  		gen->ptr = (unsigned char *)inst;
  1467  		_jit_regs_commit(gen, &regs);
  1468  	}
  1469  }
  1470  break;
  1471  
  1472  case JIT_OP_RETRIEVE_FRAME_POINTER:
  1473  {
  1474  	unsigned char * inst;
  1475  	_jit_regs_t regs;
  1476  	int reg;
  1477  	{
  1478  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  1479  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  1480  		_jit_regs_begin(gen, &regs, 32);
  1481  		inst = (unsigned char *)(gen->ptr);
  1482  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  1483  		{
  1484  			x86_64_mov_reg_reg_size(inst, reg, X86_64_RBP, 8);
  1485  		}
  1486  		gen->ptr = (unsigned char *)inst;
  1487  		_jit_regs_commit(gen, &regs);
  1488  	}
  1489  }
  1490  break;
  1491  
  1492  case JIT_OP_PUSH_INT:
  1493  {
  1494  	unsigned char * inst;
  1495  	_jit_regs_t regs;
  1496  	int reg;
  1497  	jit_nint imm_value;
  1498  	jit_nint local_offset;
  1499  	if(insn->value1->is_constant)
  1500  	{
  1501  		_jit_gen_check_space(gen, 32);
  1502  		inst = (unsigned char *)(gen->ptr);
  1503  		imm_value = insn->value1->address;
  1504  		{
  1505  			x86_64_push_imm(inst, imm_value);
  1506  			gen->stack_changed = 1;
  1507  		}
  1508  		gen->ptr = (unsigned char *)inst;
  1509  	}
  1510  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
  1511  	{
  1512  		_jit_gen_fix_value(insn->value1);
  1513  		_jit_gen_check_space(gen, 32);
  1514  		inst = (unsigned char *)(gen->ptr);
  1515  		local_offset = insn->value1->frame_offset;
  1516  		{
  1517  			x86_64_push_membase_size(inst, X86_64_RBP, local_offset, 4);
  1518  			gen->stack_changed = 1;
  1519  		}
  1520  		gen->ptr = (unsigned char *)inst;
  1521  	}
  1522  	else
  1523  	{
  1524  		_jit_regs_init(gen, &regs, 0);
  1525  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1526  		_jit_regs_begin(gen, &regs, 32);
  1527  		inst = (unsigned char *)(gen->ptr);
  1528  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1529  		{
  1530  			x86_64_push_reg_size(inst, reg, 4);
  1531  			gen->stack_changed = 1;
  1532  		}
  1533  		gen->ptr = (unsigned char *)inst;
  1534  		_jit_regs_commit(gen, &regs);
  1535  	}
  1536  }
  1537  break;
  1538  
  1539  case JIT_OP_PUSH_LONG:
  1540  {
  1541  	unsigned char * inst;
  1542  	_jit_regs_t regs;
  1543  	int reg;
  1544  	jit_nint imm_value;
  1545  	jit_nint local_offset;
  1546  	if(insn->value1->is_constant)
  1547  	{
  1548  		_jit_gen_check_space(gen, 32);
  1549  		inst = (unsigned char *)(gen->ptr);
  1550  		imm_value = insn->value1->address;
  1551  		{
  1552  			if((imm_value >= (jit_nint)jit_min_int) && (imm_value <= (jit_nint)jit_max_int))
  1553  			{
  1554  				x86_64_push_imm(inst, imm_value);
  1555  			}
  1556  			else
  1557  			{
  1558  				jit_int *ptr = (jit_int *)&(imm_value);
  1559  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1560  				x86_64_mov_membase_imm_size(inst, X86_64_RSP, 4, ptr[1], 4);
  1561  				x86_64_mov_membase_imm_size(inst, X86_64_RSP, 0, ptr[0], 4);
  1562  			}
  1563  			gen->stack_changed = 1;
  1564  		}
  1565  		gen->ptr = (unsigned char *)inst;
  1566  	}
  1567  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
  1568  	{
  1569  		_jit_gen_fix_value(insn->value1);
  1570  		_jit_gen_check_space(gen, 32);
  1571  		inst = (unsigned char *)(gen->ptr);
  1572  		local_offset = insn->value1->frame_offset;
  1573  		{
  1574  			x86_64_push_membase_size(inst, X86_64_RBP, local_offset, 8);
  1575  			gen->stack_changed = 1;
  1576  		}
  1577  		gen->ptr = (unsigned char *)inst;
  1578  	}
  1579  	else
  1580  	{
  1581  		_jit_regs_init(gen, &regs, 0);
  1582  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1583  		_jit_regs_begin(gen, &regs, 32);
  1584  		inst = (unsigned char *)(gen->ptr);
  1585  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1586  		{
  1587  			x86_64_push_reg_size(inst, reg, 8);
  1588  			gen->stack_changed = 1;
  1589  		}
  1590  		gen->ptr = (unsigned char *)inst;
  1591  		_jit_regs_commit(gen, &regs);
  1592  	}
  1593  }
  1594  break;
  1595  
  1596  case JIT_OP_PUSH_FLOAT32:
  1597  {
  1598  	unsigned char * inst;
  1599  	_jit_regs_t regs;
  1600  	int reg;
  1601  	jit_nint imm_value;
  1602  	jit_nint local_offset;
  1603  	if(insn->value1->is_constant)
  1604  	{
  1605  		_jit_gen_check_space(gen, 32);
  1606  		inst = (unsigned char *)(gen->ptr);
  1607  		imm_value = insn->value1->address;
  1608  		{
  1609  			jit_int *ptr = (jit_int *)(imm_value);
  1610  			x86_64_push_imm_size(inst, ptr[0], 4);
  1611  			gen->stack_changed = 1;
  1612  		}
  1613  		gen->ptr = (unsigned char *)inst;
  1614  	}
  1615  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
  1616  	{
  1617  		_jit_gen_fix_value(insn->value1);
  1618  		_jit_gen_check_space(gen, 32);
  1619  		inst = (unsigned char *)(gen->ptr);
  1620  		local_offset = insn->value1->frame_offset;
  1621  		{
  1622  			x86_64_push_membase_size(inst, X86_64_RBP, local_offset, 4);
  1623  			gen->stack_changed = 1;
  1624  		}
  1625  		gen->ptr = (unsigned char *)inst;
  1626  	}
  1627  	else
  1628  	{
  1629  		_jit_regs_init(gen, &regs, 0);
  1630  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1631  		_jit_regs_begin(gen, &regs, 32);
  1632  		inst = (unsigned char *)(gen->ptr);
  1633  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1634  		{
  1635  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1636  			x86_64_movss_membase_reg(inst, X86_64_RSP, 0, reg);
  1637  			gen->stack_changed = 1;
  1638  		}
  1639  		gen->ptr = (unsigned char *)inst;
  1640  		_jit_regs_commit(gen, &regs);
  1641  	}
  1642  }
  1643  break;
  1644  
  1645  case JIT_OP_PUSH_FLOAT64:
  1646  {
  1647  	unsigned char * inst;
  1648  	_jit_regs_t regs;
  1649  	int reg;
  1650  	jit_nint imm_value;
  1651  	jit_nint local_offset;
  1652  	if(insn->value1->is_constant)
  1653  	{
  1654  		_jit_gen_check_space(gen, 32);
  1655  		inst = (unsigned char *)(gen->ptr);
  1656  		imm_value = insn->value1->address;
  1657  		{
  1658  			jit_int *ptr = (jit_int *)(imm_value);
  1659  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1660  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, 4, ptr[1], 4);
  1661  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, 0, ptr[0], 4);
  1662  			gen->stack_changed = 1;
  1663  		}
  1664  		gen->ptr = (unsigned char *)inst;
  1665  	}
  1666  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
  1667  	{
  1668  		_jit_gen_fix_value(insn->value1);
  1669  		_jit_gen_check_space(gen, 32);
  1670  		inst = (unsigned char *)(gen->ptr);
  1671  		local_offset = insn->value1->frame_offset;
  1672  		{
  1673  			x86_64_push_membase_size(inst, X86_64_RBP, local_offset, 8);
  1674  			gen->stack_changed = 1;
  1675  		}
  1676  		gen->ptr = (unsigned char *)inst;
  1677  	}
  1678  	else
  1679  	{
  1680  		_jit_regs_init(gen, &regs, 0);
  1681  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1682  		_jit_regs_begin(gen, &regs, 32);
  1683  		inst = (unsigned char *)(gen->ptr);
  1684  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1685  		{
  1686  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1687  			x86_64_movsd_membase_reg(inst, X86_64_RSP, 0, reg);
  1688  			gen->stack_changed = 1;
  1689  		}
  1690  		gen->ptr = (unsigned char *)inst;
  1691  		_jit_regs_commit(gen, &regs);
  1692  	}
  1693  }
  1694  break;
  1695  
  1696  case JIT_OP_PUSH_NFLOAT:
  1697  {
  1698  	unsigned char * inst;
  1699  	_jit_regs_t regs;
  1700  	int reg;
  1701  	jit_nint imm_value;
  1702  	jit_nint local_offset;
  1703  	if(insn->value1->is_constant)
  1704  	{
  1705  		_jit_gen_check_space(gen, 32);
  1706  		inst = (unsigned char *)(gen->ptr);
  1707  		imm_value = insn->value1->address;
  1708  		{
  1709  			jit_int *ptr = (jit_int *)(imm_value);
  1710  			if(sizeof(jit_nfloat) != sizeof(jit_float64))
  1711  			{
  1712  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, 16, 8);
  1713  				x86_64_mov_membase_imm_size(inst, X86_64_RSP, 8, ptr[2], 4);
  1714  			}
  1715  			else
  1716  			{
  1717  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, sizeof(jit_float64), 8);
  1718  			}
  1719  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, 4, ptr[1], 4);
  1720  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, 0, ptr[0], 4);
  1721  			gen->stack_changed = 1;
  1722  		}
  1723  		gen->ptr = (unsigned char *)inst;
  1724  	}
  1725  	else if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
  1726  	{
  1727  		_jit_regs_init(gen, &regs, _JIT_REGS_STACK);
  1728  		_jit_gen_fix_value(insn->value1);
  1729  		_jit_regs_add_scratch(&regs, x86_64_reg);
  1730  		_jit_regs_begin(gen, &regs, 32);
  1731  		inst = (unsigned char *)(gen->ptr);
  1732  		local_offset = insn->value1->frame_offset;
  1733  		reg = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  1734  		{
  1735  			if(sizeof(jit_nfloat) != sizeof(jit_float64))
  1736  			{
  1737  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, 16, 8);
  1738  				x86_64_mov_reg_membase_size(inst, reg, X86_64_RBP, local_offset + 8, 4);
  1739  				x86_64_mov_membase_reg_size(inst, X86_64_RSP, 8, reg, 4);
  1740  			}
  1741  			else
  1742  			{
  1743  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
  1744  			}
  1745  			x86_64_mov_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  1746  			x86_64_mov_membase_reg_size(inst, X86_64_RSP, 0, reg, 8);
  1747  			gen->stack_changed = 1;
  1748  		}
  1749  		gen->ptr = (unsigned char *)inst;
  1750  		_jit_regs_commit(gen, &regs);
  1751  	}
  1752  	else
  1753  	{
  1754  		_jit_regs_init(gen, &regs, _JIT_REGS_STACK);
  1755  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  1756  		_jit_regs_begin(gen, &regs, 32);
  1757  		inst = (unsigned char *)(gen->ptr);
  1758  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1759  		{
  1760  			if(sizeof(jit_nfloat) != sizeof(jit_float64))
  1761  			{
  1762  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, 16, 8);
  1763  				x86_64_fstp_membase_size(inst, X86_64_RSP, 0, 10);
  1764  			}
  1765  			else
  1766  			{
  1767  				x86_64_sub_reg_imm_size(inst, X86_64_RSP, sizeof(jit_float64), 8);
  1768  				x86_64_fstp_membase_size(inst, X86_64_RSP, 0, 8);
  1769  			}
  1770  			gen->stack_changed = 1;
  1771  		}
  1772  		gen->ptr = (unsigned char *)inst;
  1773  		_jit_regs_commit(gen, &regs);
  1774  	}
  1775  }
  1776  break;
  1777  
  1778  case JIT_OP_PUSH_STRUCT:
  1779  {
  1780  	unsigned char * inst;
  1781  	_jit_regs_t regs;
  1782  	int reg;
  1783  	if((((jit_nuint)jit_value_get_nint_constant(insn->value2)) <= 32))
  1784  	{
  1785  		_jit_regs_init(gen, &regs, 0);
  1786  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1787  		_jit_regs_begin(gen, &regs, 128);
  1788  		inst = (unsigned char *)(gen->ptr);
  1789  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1790  		{
  1791  			jit_nuint size;
  1792  			jit_nuint last_part;
  1793  			size = (jit_nuint)jit_value_get_nint_constant(insn->value2);
  1794  			last_part = size & 0x7;
  1795  			if(last_part)
  1796  			{
  1797  				/* Handle the possible last part smaller than 8 bytes */
  1798  				size -= last_part;
  1799  	
  1800  				/* We don't care about the last not needed bytes */
  1801  				x86_64_push_membase_size(inst, reg, size, 8);
  1802  			}
  1803  			/* Handle full multiple pointer sized parts */
  1804  			while(size > 0)
  1805  			{
  1806  				size -= sizeof(void *);
  1807  				x86_64_push_membase_size(inst, reg, size, 8);
  1808  			}
  1809  			gen->stack_changed = 1;
  1810  		}
  1811  		gen->ptr = (unsigned char *)inst;
  1812  		_jit_regs_commit(gen, &regs);
  1813  	}
  1814  	else
  1815  	{
  1816  		_jit_regs_init(gen, &regs, 0);
  1817  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1818  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
  1819  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
  1820  		_jit_regs_begin(gen, &regs, 128);
  1821  		inst = (unsigned char *)(gen->ptr);
  1822  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1823  		{
  1824  			/* Handle arbitrary-sized structures */
  1825  			jit_nuint size;
  1826  			size = (jit_nuint)jit_value_get_nint_constant(insn->value2);
  1827  			/* TODO: Maybe we should check for sizes > 2GB? */
  1828  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, ROUND_STACK(size), 8);
  1829  			inst = memory_copy(gen, inst, X86_64_RSP, 0, reg, 0, size);
  1830  			gen->stack_changed = 1;
  1831  		}
  1832  		gen->ptr = (unsigned char *)inst;
  1833  		_jit_regs_commit(gen, &regs);
  1834  	}
  1835  }
  1836  break;
  1837  
  1838  case JIT_OP_POP_STACK:
  1839  {
  1840  	unsigned char * inst;
  1841  	{
  1842  		_jit_gen_check_space(gen, 32);
  1843  		inst = (unsigned char *)(gen->ptr);
  1844  		{
  1845  			x86_64_add_reg_imm_size(inst, X86_64_RSP, insn->value1->address, 8);
  1846  			gen->stack_changed = 1;
  1847  		}
  1848  		gen->ptr = (unsigned char *)inst;
  1849  	}
  1850  }
  1851  break;
  1852  
  1853  case JIT_OP_SET_PARAM_INT:
  1854  {
  1855  	unsigned char * inst;
  1856  	_jit_regs_t regs;
  1857  	int reg;
  1858  	jit_nint imm_value, imm_value2;
  1859  	if(insn->value1->is_constant && insn->value2->is_constant)
  1860  	{
  1861  		_jit_gen_check_space(gen, 32);
  1862  		inst = (unsigned char *)(gen->ptr);
  1863  		imm_value = insn->value1->address;
  1864  		imm_value2 = insn->value2->address;
  1865  		{
  1866  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, imm_value, 4);
  1867  		}
  1868  		gen->ptr = (unsigned char *)inst;
  1869  	}
  1870  	else
  1871  	{
  1872  		_jit_regs_init(gen, &regs, 0);
  1873  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1874  		_jit_regs_begin(gen, &regs, 32);
  1875  		inst = (unsigned char *)(gen->ptr);
  1876  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1877  		imm_value = insn->value2->address;
  1878  		{
  1879  			x86_64_mov_membase_reg_size(inst, X86_64_RSP, imm_value, reg, 4);
  1880  		}
  1881  		gen->ptr = (unsigned char *)inst;
  1882  		_jit_regs_commit(gen, &regs);
  1883  	}
  1884  }
  1885  break;
  1886  
  1887  case JIT_OP_SET_PARAM_LONG:
  1888  {
  1889  	unsigned char * inst;
  1890  	_jit_regs_t regs;
  1891  	int reg;
  1892  	jit_nint imm_value, imm_value2;
  1893  	if(insn->value1->is_nint_constant && insn->value1->address >= -2147483648 && insn->value1->address <= 2147483647 && insn->value2->is_constant)
  1894  	{
  1895  		_jit_gen_check_space(gen, 32);
  1896  		inst = (unsigned char *)(gen->ptr);
  1897  		imm_value = insn->value1->address;
  1898  		imm_value2 = insn->value2->address;
  1899  		{
  1900  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, imm_value, 8);
  1901  		}
  1902  		gen->ptr = (unsigned char *)inst;
  1903  	}
  1904  	else if(insn->value1->is_constant && insn->value2->is_constant)
  1905  	{
  1906  		_jit_gen_check_space(gen, 32);
  1907  		inst = (unsigned char *)(gen->ptr);
  1908  		imm_value = insn->value1->address;
  1909  		imm_value2 = insn->value2->address;
  1910  		{
  1911  			jit_int *ptr = (jit_int *)&(imm_value);
  1912  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2 + 4, ptr[1], 4);
  1913  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, ptr[0], 4);
  1914  		}
  1915  		gen->ptr = (unsigned char *)inst;
  1916  	}
  1917  	else
  1918  	{
  1919  		_jit_regs_init(gen, &regs, 0);
  1920  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  1921  		_jit_regs_begin(gen, &regs, 32);
  1922  		inst = (unsigned char *)(gen->ptr);
  1923  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1924  		imm_value = insn->value2->address;
  1925  		{
  1926  			x86_64_mov_membase_reg_size(inst, X86_64_RSP, imm_value, reg, 8);
  1927  		}
  1928  		gen->ptr = (unsigned char *)inst;
  1929  		_jit_regs_commit(gen, &regs);
  1930  	}
  1931  }
  1932  break;
  1933  
  1934  case JIT_OP_SET_PARAM_FLOAT32:
  1935  {
  1936  	unsigned char * inst;
  1937  	_jit_regs_t regs;
  1938  	int reg;
  1939  	jit_nint imm_value, imm_value2;
  1940  	if(insn->value1->is_constant && insn->value2->is_constant)
  1941  	{
  1942  		_jit_gen_check_space(gen, 32);
  1943  		inst = (unsigned char *)(gen->ptr);
  1944  		imm_value = insn->value1->address;
  1945  		imm_value2 = insn->value2->address;
  1946  		{
  1947  			jit_int *ptr = (jit_int *)(imm_value);
  1948  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, ptr[0], 4);
  1949  		}
  1950  		gen->ptr = (unsigned char *)inst;
  1951  	}
  1952  	else
  1953  	{
  1954  		_jit_regs_init(gen, &regs, 0);
  1955  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1956  		_jit_regs_begin(gen, &regs, 32);
  1957  		inst = (unsigned char *)(gen->ptr);
  1958  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1959  		imm_value = insn->value2->address;
  1960  		{
  1961  			x86_64_movss_membase_reg(inst, X86_64_RSP, imm_value, reg);
  1962  		}
  1963  		gen->ptr = (unsigned char *)inst;
  1964  		_jit_regs_commit(gen, &regs);
  1965  	}
  1966  }
  1967  break;
  1968  
  1969  case JIT_OP_SET_PARAM_FLOAT64:
  1970  {
  1971  	unsigned char * inst;
  1972  	_jit_regs_t regs;
  1973  	int reg;
  1974  	jit_nint imm_value, imm_value2;
  1975  	if(insn->value1->is_constant && insn->value2->is_constant)
  1976  	{
  1977  		_jit_gen_check_space(gen, 32);
  1978  		inst = (unsigned char *)(gen->ptr);
  1979  		imm_value = insn->value1->address;
  1980  		imm_value2 = insn->value2->address;
  1981  		{
  1982  			jit_int *ptr = (jit_int *)(imm_value);
  1983  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2 + 4, ptr[1], 4);
  1984  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, ptr[0], 4);
  1985  		}
  1986  		gen->ptr = (unsigned char *)inst;
  1987  	}
  1988  	else
  1989  	{
  1990  		_jit_regs_init(gen, &regs, 0);
  1991  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  1992  		_jit_regs_begin(gen, &regs, 32);
  1993  		inst = (unsigned char *)(gen->ptr);
  1994  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  1995  		imm_value = insn->value2->address;
  1996  		{
  1997  			x86_64_movsd_membase_reg(inst, X86_64_RSP, imm_value, reg);
  1998  		}
  1999  		gen->ptr = (unsigned char *)inst;
  2000  		_jit_regs_commit(gen, &regs);
  2001  	}
  2002  }
  2003  break;
  2004  
  2005  case JIT_OP_SET_PARAM_NFLOAT:
  2006  {
  2007  	unsigned char * inst;
  2008  	_jit_regs_t regs;
  2009  	int reg;
  2010  	jit_nint imm_value, imm_value2;
  2011  	if(insn->value1->is_constant && insn->value2->is_constant)
  2012  	{
  2013  		_jit_gen_check_space(gen, 32);
  2014  		inst = (unsigned char *)(gen->ptr);
  2015  		imm_value = insn->value1->address;
  2016  		imm_value2 = insn->value2->address;
  2017  		{
  2018  			jit_int *ptr = (jit_int *)(imm_value);
  2019  			if(sizeof(jit_nfloat) != sizeof(jit_float64))
  2020  			{
  2021  				x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2 + 8, ptr[2], 4);
  2022  			}
  2023  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2 + 4, ptr[1], 4);
  2024  			x86_64_mov_membase_imm_size(inst, X86_64_RSP, imm_value2, ptr[0], 4);
  2025  		}
  2026  		gen->ptr = (unsigned char *)inst;
  2027  	}
  2028  	else
  2029  	{
  2030  		_jit_regs_init(gen, &regs, 0);
  2031  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  2032  		_jit_regs_begin(gen, &regs, 32);
  2033  		inst = (unsigned char *)(gen->ptr);
  2034  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2035  		imm_value = insn->value2->address;
  2036  		{
  2037  			if(sizeof(jit_nfloat) != sizeof(jit_float64))
  2038  			{
  2039  				x86_64_fstp_membase_size(inst, X86_64_RSP, imm_value, 10);
  2040  			}
  2041  			else
  2042  			{
  2043  				x86_64_fstp_membase_size(inst, X86_64_RSP, imm_value, 8);
  2044  			}
  2045  		}
  2046  		gen->ptr = (unsigned char *)inst;
  2047  		_jit_regs_commit(gen, &regs);
  2048  	}
  2049  }
  2050  break;
  2051  
  2052  case JIT_OP_SET_PARAM_STRUCT:
  2053  {
  2054  	unsigned char * inst;
  2055  	_jit_regs_t regs;
  2056  	int reg;
  2057  	jit_nint imm_value;
  2058  	{
  2059  		_jit_regs_init(gen, &regs, 0);
  2060  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2061  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
  2062  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
  2063  		_jit_regs_begin(gen, &regs, 32);
  2064  		inst = (unsigned char *)(gen->ptr);
  2065  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2066  		imm_value = insn->value2->address;
  2067  		{
  2068  			/* Handle arbitrary-sized structures */
  2069  			jit_nint offset = jit_value_get_nint_constant(insn->dest);
  2070  			/* TODO: Maybe we should check for sizes > 2GB? */
  2071  			inst = memory_copy(gen, inst, X86_64_RSP, offset, reg, 0, imm_value);
  2072  		}
  2073  		gen->ptr = (unsigned char *)inst;
  2074  		_jit_regs_commit(gen, &regs);
  2075  	}
  2076  }
  2077  break;
  2078  
  2079  case JIT_OP_FLUSH_SMALL_STRUCT:
  2080  {
  2081  	unsigned char * inst;
  2082  	{
  2083  		_jit_gen_check_space(gen, 32);
  2084  		inst = (unsigned char *)(gen->ptr);
  2085  		{
  2086  			inst = flush_return_struct(inst, insn->value1);
  2087  		}
  2088  		gen->ptr = (unsigned char *)inst;
  2089  	}
  2090  }
  2091  break;
  2092  
  2093  case JIT_OP_RETURN:
  2094  {
  2095  	unsigned char * inst;
  2096  	{
  2097  		_jit_gen_check_space(gen, 32);
  2098  		inst = (unsigned char *)(gen->ptr);
  2099  		{
  2100  			inst = jump_to_epilog(gen, inst, block);
  2101  		}
  2102  		gen->ptr = (unsigned char *)inst;
  2103  	}
  2104  }
  2105  break;
  2106  
  2107  case JIT_OP_RETURN_INT:
  2108  {
  2109  	unsigned char * inst;
  2110  	_jit_regs_t regs;
  2111  	int reg;
  2112  	{
  2113  		_jit_regs_init(gen, &regs, 0);
  2114  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2115  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  2116  		_jit_regs_begin(gen, &regs, 32);
  2117  		inst = (unsigned char *)(gen->ptr);
  2118  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2119  		{
  2120  			inst = jump_to_epilog(gen, inst, block);
  2121  		}
  2122  		gen->ptr = (unsigned char *)inst;
  2123  		_jit_regs_commit(gen, &regs);
  2124  	}
  2125  }
  2126  break;
  2127  
  2128  case JIT_OP_RETURN_LONG:
  2129  {
  2130  	unsigned char * inst;
  2131  	_jit_regs_t regs;
  2132  	int reg;
  2133  	{
  2134  		_jit_regs_init(gen, &regs, 0);
  2135  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2136  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  2137  		_jit_regs_begin(gen, &regs, 32);
  2138  		inst = (unsigned char *)(gen->ptr);
  2139  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2140  		{
  2141  			inst = jump_to_epilog(gen, inst, block);
  2142  		}
  2143  		gen->ptr = (unsigned char *)inst;
  2144  		_jit_regs_commit(gen, &regs);
  2145  	}
  2146  }
  2147  break;
  2148  
  2149  case JIT_OP_RETURN_FLOAT32:
  2150  {
  2151  	unsigned char * inst;
  2152  	_jit_regs_t regs;
  2153  	int reg;
  2154  	{
  2155  		_jit_regs_init(gen, &regs, 0);
  2156  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  2157  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("xmm0"), -1);
  2158  		_jit_regs_begin(gen, &regs, 32);
  2159  		inst = (unsigned char *)(gen->ptr);
  2160  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2161  		{
  2162  			inst = jump_to_epilog(gen, inst, block);
  2163  		}
  2164  		gen->ptr = (unsigned char *)inst;
  2165  		_jit_regs_commit(gen, &regs);
  2166  	}
  2167  }
  2168  break;
  2169  
  2170  case JIT_OP_RETURN_FLOAT64:
  2171  {
  2172  	unsigned char * inst;
  2173  	_jit_regs_t regs;
  2174  	int reg;
  2175  	{
  2176  		_jit_regs_init(gen, &regs, 0);
  2177  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  2178  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("xmm0"), -1);
  2179  		_jit_regs_begin(gen, &regs, 32);
  2180  		inst = (unsigned char *)(gen->ptr);
  2181  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2182  		{
  2183  			inst = jump_to_epilog(gen, inst, block);
  2184  		}
  2185  		gen->ptr = (unsigned char *)inst;
  2186  		_jit_regs_commit(gen, &regs);
  2187  	}
  2188  }
  2189  break;
  2190  
  2191  case JIT_OP_RETURN_NFLOAT:
  2192  {
  2193  	unsigned char * inst;
  2194  	_jit_regs_t regs;
  2195  	int reg;
  2196  	{
  2197  		_jit_regs_init(gen, &regs, _JIT_REGS_STACK);
  2198  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  2199  		_jit_regs_clobber_class(gen, &regs, x86_64_freg);
  2200  		_jit_regs_begin(gen, &regs, 32);
  2201  		inst = (unsigned char *)(gen->ptr);
  2202  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2203  		{
  2204  			/* clobber(freg) frees all registers on the fp stack */
  2205  			inst = jump_to_epilog(gen, inst, block);
  2206  		}
  2207  		gen->ptr = (unsigned char *)inst;
  2208  		_jit_regs_commit(gen, &regs);
  2209  	}
  2210  }
  2211  break;
  2212  
  2213  case JIT_OP_RETURN_SMALL_STRUCT:
  2214  {
  2215  	unsigned char * inst;
  2216  	_jit_regs_t regs;
  2217  	int reg;
  2218  	jit_nint imm_value;
  2219  	{
  2220  		_jit_regs_init(gen, &regs, 0);
  2221  		_jit_regs_init_value1(&regs, insn, 0, x86_64_rreg);
  2222  		_jit_regs_begin(gen, &regs, 32);
  2223  		inst = (unsigned char *)(gen->ptr);
  2224  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2225  		imm_value = insn->value2->address;
  2226  		{
  2227  			inst = return_struct(inst, func, reg);
  2228  			inst = jump_to_epilog(gen, inst, block);
  2229  		}
  2230  		gen->ptr = (unsigned char *)inst;
  2231  		_jit_regs_commit(gen, &regs);
  2232  	}
  2233  }
  2234  break;
  2235  
  2236  case JIT_OP_LOAD_RELATIVE_SBYTE:
  2237  {
  2238  	unsigned char * inst;
  2239  	_jit_regs_t regs;
  2240  	int reg, reg2;
  2241  	jit_nint imm_value;
  2242  	{
  2243  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2244  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2245  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2246  		_jit_regs_begin(gen, &regs, 32);
  2247  		inst = (unsigned char *)(gen->ptr);
  2248  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2249  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2250  		imm_value = insn->value2->address;
  2251  		{
  2252  			if(imm_value == 0)
  2253  			{
  2254  				x86_64_movsx8_reg_regp_size(inst, reg, reg2, 8);
  2255  			}
  2256  			else
  2257  			{
  2258  				x86_64_movsx8_reg_membase_size(inst, reg, reg2, imm_value, 8);
  2259  			}
  2260  		}
  2261  		gen->ptr = (unsigned char *)inst;
  2262  		_jit_regs_commit(gen, &regs);
  2263  	}
  2264  }
  2265  break;
  2266  
  2267  case JIT_OP_LOAD_RELATIVE_UBYTE:
  2268  {
  2269  	unsigned char * inst;
  2270  	_jit_regs_t regs;
  2271  	int reg, reg2;
  2272  	jit_nint imm_value;
  2273  	{
  2274  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2275  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2276  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2277  		_jit_regs_begin(gen, &regs, 32);
  2278  		inst = (unsigned char *)(gen->ptr);
  2279  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2280  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2281  		imm_value = insn->value2->address;
  2282  		{
  2283  			if(imm_value == 0)
  2284  			{
  2285  				x86_64_movzx8_reg_regp_size(inst, reg, reg2, 8);
  2286  			}
  2287  			else
  2288  			{
  2289  				x86_64_movzx8_reg_membase_size(inst, reg, reg2, imm_value, 8);
  2290  			}
  2291  		}
  2292  		gen->ptr = (unsigned char *)inst;
  2293  		_jit_regs_commit(gen, &regs);
  2294  	}
  2295  }
  2296  break;
  2297  
  2298  case JIT_OP_LOAD_RELATIVE_SHORT:
  2299  {
  2300  	unsigned char * inst;
  2301  	_jit_regs_t regs;
  2302  	int reg, reg2;
  2303  	jit_nint imm_value;
  2304  	{
  2305  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2306  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2307  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2308  		_jit_regs_begin(gen, &regs, 32);
  2309  		inst = (unsigned char *)(gen->ptr);
  2310  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2311  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2312  		imm_value = insn->value2->address;
  2313  		{
  2314  			if(imm_value == 0)
  2315  			{
  2316  				x86_64_movsx16_reg_regp_size(inst, reg, reg2, 8);
  2317  			}
  2318  			else
  2319  			{
  2320  				x86_64_movsx16_reg_membase_size(inst, reg, reg2, imm_value, 8);
  2321  			}
  2322  		}
  2323  		gen->ptr = (unsigned char *)inst;
  2324  		_jit_regs_commit(gen, &regs);
  2325  	}
  2326  }
  2327  break;
  2328  
  2329  case JIT_OP_LOAD_RELATIVE_USHORT:
  2330  {
  2331  	unsigned char * inst;
  2332  	_jit_regs_t regs;
  2333  	int reg, reg2;
  2334  	jit_nint imm_value;
  2335  	{
  2336  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2337  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2338  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2339  		_jit_regs_begin(gen, &regs, 32);
  2340  		inst = (unsigned char *)(gen->ptr);
  2341  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2342  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2343  		imm_value = insn->value2->address;
  2344  		{
  2345  			if(imm_value == 0)
  2346  			{
  2347  				x86_64_movzx16_reg_regp_size(inst, reg, reg2, 8);
  2348  			}
  2349  			else
  2350  			{
  2351  				x86_64_movzx16_reg_membase_size(inst, reg, reg2, imm_value, 8);
  2352  			}
  2353  		}
  2354  		gen->ptr = (unsigned char *)inst;
  2355  		_jit_regs_commit(gen, &regs);
  2356  	}
  2357  }
  2358  break;
  2359  
  2360  case JIT_OP_LOAD_RELATIVE_INT:
  2361  {
  2362  	unsigned char * inst;
  2363  	_jit_regs_t regs;
  2364  	int reg, reg2;
  2365  	jit_nint imm_value;
  2366  	{
  2367  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2368  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2369  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2370  		_jit_regs_begin(gen, &regs, 32);
  2371  		inst = (unsigned char *)(gen->ptr);
  2372  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2373  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2374  		imm_value = insn->value2->address;
  2375  		{
  2376  			if(imm_value == 0)
  2377  			{
  2378  				x86_64_mov_reg_regp_size(inst, reg, reg2, 4);
  2379  			}
  2380  			else
  2381  			{
  2382  				x86_64_mov_reg_membase_size(inst, reg, reg2, imm_value, 4);
  2383  			}
  2384  		}
  2385  		gen->ptr = (unsigned char *)inst;
  2386  		_jit_regs_commit(gen, &regs);
  2387  	}
  2388  }
  2389  break;
  2390  
  2391  case JIT_OP_LOAD_RELATIVE_LONG:
  2392  {
  2393  	unsigned char * inst;
  2394  	_jit_regs_t regs;
  2395  	int reg, reg2;
  2396  	jit_nint imm_value;
  2397  	{
  2398  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2399  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2400  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2401  		_jit_regs_begin(gen, &regs, 32);
  2402  		inst = (unsigned char *)(gen->ptr);
  2403  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2404  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2405  		imm_value = insn->value2->address;
  2406  		{
  2407  			if(imm_value == 0)
  2408  			{
  2409  				x86_64_mov_reg_regp_size(inst, reg, reg2, 8);
  2410  			}
  2411  			else
  2412  			{
  2413  				x86_64_mov_reg_membase_size(inst, reg, reg2, imm_value, 8);
  2414  			}
  2415  		}
  2416  		gen->ptr = (unsigned char *)inst;
  2417  		_jit_regs_commit(gen, &regs);
  2418  	}
  2419  }
  2420  break;
  2421  
  2422  case JIT_OP_LOAD_RELATIVE_FLOAT32:
  2423  {
  2424  	unsigned char * inst;
  2425  	_jit_regs_t regs;
  2426  	int reg, reg2;
  2427  	jit_nint imm_value;
  2428  	{
  2429  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2430  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  2431  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2432  		_jit_regs_begin(gen, &regs, 32);
  2433  		inst = (unsigned char *)(gen->ptr);
  2434  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2435  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2436  		imm_value = insn->value2->address;
  2437  		{
  2438  			if(imm_value == 0)
  2439  			{
  2440  				x86_64_movss_reg_regp(inst, reg, reg2);
  2441  			}
  2442  			else
  2443  			{
  2444  				x86_64_movss_reg_membase(inst, reg, reg2, imm_value);
  2445  			}
  2446  		}
  2447  		gen->ptr = (unsigned char *)inst;
  2448  		_jit_regs_commit(gen, &regs);
  2449  	}
  2450  }
  2451  break;
  2452  
  2453  case JIT_OP_LOAD_RELATIVE_FLOAT64:
  2454  {
  2455  	unsigned char * inst;
  2456  	_jit_regs_t regs;
  2457  	int reg, reg2;
  2458  	jit_nint imm_value;
  2459  	{
  2460  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2461  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  2462  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2463  		_jit_regs_begin(gen, &regs, 32);
  2464  		inst = (unsigned char *)(gen->ptr);
  2465  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2466  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2467  		imm_value = insn->value2->address;
  2468  		{
  2469  			if(imm_value == 0)
  2470  			{
  2471  				x86_64_movsd_reg_regp(inst, reg, reg2);
  2472  			}
  2473  			else
  2474  			{
  2475  				x86_64_movsd_reg_membase(inst, reg, reg2, imm_value);
  2476  			}
  2477  		}
  2478  		gen->ptr = (unsigned char *)inst;
  2479  		_jit_regs_commit(gen, &regs);
  2480  	}
  2481  }
  2482  break;
  2483  
  2484  case JIT_OP_LOAD_RELATIVE_NFLOAT:
  2485  {
  2486  	unsigned char * inst;
  2487  	_jit_regs_t regs;
  2488  	int reg, reg2;
  2489  	jit_nint imm_value;
  2490  	if(insn->value2->is_constant && (sizeof(jit_nfloat) != sizeof(jit_float64)))
  2491  	{
  2492  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2493  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
  2494  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2495  		_jit_regs_begin(gen, &regs, 32);
  2496  		inst = (unsigned char *)(gen->ptr);
  2497  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2498  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2499  		imm_value = insn->value2->address;
  2500  		{
  2501  			x86_64_fld_membase_size(inst, reg2, imm_value, 10);
  2502  		}
  2503  		gen->ptr = (unsigned char *)inst;
  2504  		_jit_regs_commit(gen, &regs);
  2505  	}
  2506  	else
  2507  	{
  2508  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2509  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
  2510  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2511  		_jit_regs_begin(gen, &regs, 32);
  2512  		inst = (unsigned char *)(gen->ptr);
  2513  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2514  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2515  		imm_value = insn->value2->address;
  2516  		{
  2517  			x86_64_fld_membase_size(inst, reg2, imm_value, 8);
  2518  		}
  2519  		gen->ptr = (unsigned char *)inst;
  2520  		_jit_regs_commit(gen, &regs);
  2521  	}
  2522  }
  2523  break;
  2524  
  2525  case JIT_OP_LOAD_RELATIVE_STRUCT:
  2526  {
  2527  	unsigned char * inst;
  2528  	_jit_regs_t regs;
  2529  	int reg, reg2, reg3;
  2530  	jit_nint imm_value;
  2531  	jit_nint local_offset;
  2532  	if(!insn->dest->is_constant && !insn->dest->has_global_register && insn->value2->is_constant && (jit_type_get_size(jit_value_get_type(insn->dest)) <= _JIT_MAX_MEMCPY_INLINE))
  2533  	{
  2534  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2535  		_jit_regs_force_out(gen, insn->dest, 1);
  2536  		_jit_gen_fix_value(insn->dest);
  2537  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2538  		_jit_regs_add_scratch(&regs, x86_64_reg);
  2539  		_jit_regs_add_scratch(&regs, x86_64_xreg);
  2540  		_jit_regs_begin(gen, &regs, 128);
  2541  		inst = (unsigned char *)(gen->ptr);
  2542  		local_offset = insn->dest->frame_offset;
  2543  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2544  		imm_value = insn->value2->address;
  2545  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  2546  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  2547  		{
  2548  			inst = small_struct_copy(gen, inst, X86_64_RBP, local_offset, reg, imm_value,
  2549  									 jit_value_get_type(insn->dest), reg2, reg3);
  2550  		}
  2551  		gen->ptr = (unsigned char *)inst;
  2552  		_jit_regs_commit(gen, &regs);
  2553  	}
  2554  	else
  2555  	{
  2556  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2557  		_jit_regs_force_out(gen, insn->dest, 1);
  2558  		_jit_gen_fix_value(insn->dest);
  2559  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2560  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
  2561  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
  2562  		_jit_regs_begin(gen, &regs, 128);
  2563  		inst = (unsigned char *)(gen->ptr);
  2564  		local_offset = insn->dest->frame_offset;
  2565  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2566  		imm_value = insn->value2->address;
  2567  		{
  2568  			inst = memory_copy(gen, inst, X86_64_RBP, local_offset, reg, imm_value,
  2569  					   jit_type_get_size(jit_value_get_type(insn->dest)));
  2570  		}
  2571  		gen->ptr = (unsigned char *)inst;
  2572  		_jit_regs_commit(gen, &regs);
  2573  	}
  2574  }
  2575  break;
  2576  
  2577  case JIT_OP_STORE_RELATIVE_BYTE:
  2578  {
  2579  	unsigned char * inst;
  2580  	_jit_regs_t regs;
  2581  	int reg, reg2;
  2582  	jit_nint imm_value, imm_value2;
  2583  	if(insn->value1->is_constant && insn->value2->is_constant)
  2584  	{
  2585  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2586  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2587  		_jit_regs_begin(gen, &regs, 32);
  2588  		inst = (unsigned char *)(gen->ptr);
  2589  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2590  		imm_value = insn->value1->address;
  2591  		imm_value2 = insn->value2->address;
  2592  		{
  2593  			if(imm_value2 == 0)
  2594  			{
  2595  				x86_64_mov_regp_imm_size(inst, reg, imm_value, 1);
  2596  			}
  2597  			else
  2598  			{
  2599  				x86_64_mov_membase_imm_size(inst, reg, imm_value2, imm_value, 1);
  2600  			}
  2601  		}
  2602  		gen->ptr = (unsigned char *)inst;
  2603  		_jit_regs_commit(gen, &regs);
  2604  	}
  2605  	else
  2606  	{
  2607  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2608  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2609  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2610  		_jit_regs_begin(gen, &regs, 32);
  2611  		inst = (unsigned char *)(gen->ptr);
  2612  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2613  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2614  		imm_value = insn->value2->address;
  2615  		{
  2616  			if(imm_value == 0)
  2617  			{
  2618  				x86_64_mov_regp_reg_size(inst, reg, reg2, 1);
  2619  			}
  2620  			else
  2621  			{
  2622  				x86_64_mov_membase_reg_size(inst, reg, imm_value, reg2, 1);
  2623  			}
  2624  		}
  2625  		gen->ptr = (unsigned char *)inst;
  2626  		_jit_regs_commit(gen, &regs);
  2627  	}
  2628  }
  2629  break;
  2630  
  2631  case JIT_OP_STORE_RELATIVE_SHORT:
  2632  {
  2633  	unsigned char * inst;
  2634  	_jit_regs_t regs;
  2635  	int reg, reg2;
  2636  	jit_nint imm_value, imm_value2;
  2637  	if(insn->value1->is_constant && insn->value2->is_constant)
  2638  	{
  2639  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2640  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2641  		_jit_regs_begin(gen, &regs, 32);
  2642  		inst = (unsigned char *)(gen->ptr);
  2643  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2644  		imm_value = insn->value1->address;
  2645  		imm_value2 = insn->value2->address;
  2646  		{
  2647  			if(imm_value2 == 0)
  2648  			{
  2649  				x86_64_mov_regp_imm_size(inst, reg, imm_value, 2);
  2650  			}
  2651  			else
  2652  			{
  2653  				x86_64_mov_membase_imm_size(inst, reg, imm_value2, imm_value, 2);
  2654  			}
  2655  		}
  2656  		gen->ptr = (unsigned char *)inst;
  2657  		_jit_regs_commit(gen, &regs);
  2658  	}
  2659  	else
  2660  	{
  2661  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2662  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2663  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2664  		_jit_regs_begin(gen, &regs, 32);
  2665  		inst = (unsigned char *)(gen->ptr);
  2666  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2667  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2668  		imm_value = insn->value2->address;
  2669  		{
  2670  			if(imm_value == 0)
  2671  			{
  2672  				x86_64_mov_regp_reg_size(inst, reg, reg2, 2);
  2673  			}
  2674  			else
  2675  			{
  2676  				x86_64_mov_membase_reg_size(inst, reg, imm_value, reg2, 2);
  2677  			}
  2678  		}
  2679  		gen->ptr = (unsigned char *)inst;
  2680  		_jit_regs_commit(gen, &regs);
  2681  	}
  2682  }
  2683  break;
  2684  
  2685  case JIT_OP_STORE_RELATIVE_INT:
  2686  {
  2687  	unsigned char * inst;
  2688  	_jit_regs_t regs;
  2689  	int reg, reg2;
  2690  	jit_nint imm_value, imm_value2;
  2691  	if(insn->value1->is_constant && insn->value2->is_constant)
  2692  	{
  2693  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2694  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2695  		_jit_regs_begin(gen, &regs, 32);
  2696  		inst = (unsigned char *)(gen->ptr);
  2697  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2698  		imm_value = insn->value1->address;
  2699  		imm_value2 = insn->value2->address;
  2700  		{
  2701  			if(imm_value2 == 0)
  2702  			{
  2703  				x86_64_mov_regp_imm_size(inst, reg, imm_value, 4);
  2704  			}
  2705  			else
  2706  			{
  2707  				x86_64_mov_membase_imm_size(inst, reg, imm_value2, imm_value, 4);
  2708  			}
  2709  		}
  2710  		gen->ptr = (unsigned char *)inst;
  2711  		_jit_regs_commit(gen, &regs);
  2712  	}
  2713  	else
  2714  	{
  2715  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2716  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2717  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2718  		_jit_regs_begin(gen, &regs, 32);
  2719  		inst = (unsigned char *)(gen->ptr);
  2720  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2721  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2722  		imm_value = insn->value2->address;
  2723  		{
  2724  			if(imm_value == 0)
  2725  			{
  2726  				x86_64_mov_regp_reg_size(inst, reg, reg2, 4);
  2727  			}
  2728  			else
  2729  			{
  2730  				x86_64_mov_membase_reg_size(inst, reg, imm_value, reg2, 4);
  2731  			}
  2732  		}
  2733  		gen->ptr = (unsigned char *)inst;
  2734  		_jit_regs_commit(gen, &regs);
  2735  	}
  2736  }
  2737  break;
  2738  
  2739  case JIT_OP_STORE_RELATIVE_LONG:
  2740  {
  2741  	unsigned char * inst;
  2742  	_jit_regs_t regs;
  2743  	int reg, reg2;
  2744  	jit_nint imm_value, imm_value2;
  2745  	if(insn->value1->is_nint_constant && insn->value1->address >= -2147483648 && insn->value1->address <= 2147483647 && insn->value2->is_constant)
  2746  	{
  2747  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2748  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2749  		_jit_regs_begin(gen, &regs, 32);
  2750  		inst = (unsigned char *)(gen->ptr);
  2751  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2752  		imm_value = insn->value1->address;
  2753  		imm_value2 = insn->value2->address;
  2754  		{
  2755  			if(imm_value2 == 0)
  2756  			{
  2757  				x86_64_mov_regp_imm_size(inst, reg, imm_value, 8);
  2758  			}
  2759  			else
  2760  			{
  2761  				x86_64_mov_membase_imm_size(inst, reg, imm_value2, imm_value, 8);
  2762  			}
  2763  		}
  2764  		gen->ptr = (unsigned char *)inst;
  2765  		_jit_regs_commit(gen, &regs);
  2766  	}
  2767  	else
  2768  	{
  2769  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2770  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2771  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2772  		_jit_regs_begin(gen, &regs, 32);
  2773  		inst = (unsigned char *)(gen->ptr);
  2774  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2775  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2776  		imm_value = insn->value2->address;
  2777  		{
  2778  			if(imm_value == 0)
  2779  			{
  2780  				x86_64_mov_regp_reg_size(inst, reg, reg2, 8);
  2781  			}
  2782  			else
  2783  			{
  2784  				x86_64_mov_membase_reg_size(inst, reg, imm_value, reg2, 8);
  2785  			}
  2786  		}
  2787  		gen->ptr = (unsigned char *)inst;
  2788  		_jit_regs_commit(gen, &regs);
  2789  	}
  2790  }
  2791  break;
  2792  
  2793  case JIT_OP_STORE_RELATIVE_FLOAT32:
  2794  {
  2795  	unsigned char * inst;
  2796  	_jit_regs_t regs;
  2797  	int reg, reg2;
  2798  	jit_nint imm_value, imm_value2;
  2799  	if(insn->value1->is_constant && insn->value2->is_constant)
  2800  	{
  2801  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2802  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2803  		_jit_regs_begin(gen, &regs, 32);
  2804  		inst = (unsigned char *)(gen->ptr);
  2805  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2806  		imm_value = insn->value1->address;
  2807  		imm_value2 = insn->value2->address;
  2808  		{
  2809  			if(imm_value2 == 0)
  2810  			{
  2811  				x86_64_mov_regp_imm_size(inst, reg, ((jit_int *)(imm_value))[0], 4);
  2812  			}
  2813  			else
  2814  			{
  2815  				x86_64_mov_membase_imm_size(inst, reg, imm_value2, ((jit_int *)(imm_value))[0], 4);
  2816  			}
  2817  		}
  2818  		gen->ptr = (unsigned char *)inst;
  2819  		_jit_regs_commit(gen, &regs);
  2820  	}
  2821  	else
  2822  	{
  2823  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2824  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2825  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  2826  		_jit_regs_begin(gen, &regs, 32);
  2827  		inst = (unsigned char *)(gen->ptr);
  2828  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2829  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2830  		imm_value = insn->value2->address;
  2831  		{
  2832  			if(imm_value == 0)
  2833  			{
  2834  				x86_64_movss_regp_reg(inst, reg, reg2);
  2835  			}
  2836  			else
  2837  			{
  2838  				x86_64_movss_membase_reg(inst, reg, imm_value, reg2);
  2839  			}
  2840  		}
  2841  		gen->ptr = (unsigned char *)inst;
  2842  		_jit_regs_commit(gen, &regs);
  2843  	}
  2844  }
  2845  break;
  2846  
  2847  case JIT_OP_STORE_RELATIVE_FLOAT64:
  2848  {
  2849  	unsigned char * inst;
  2850  	_jit_regs_t regs;
  2851  	int reg, reg2;
  2852  	jit_nint imm_value, imm_value2;
  2853  	if(insn->value1->is_constant && insn->value2->is_constant)
  2854  	{
  2855  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2856  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2857  		_jit_regs_begin(gen, &regs, 32);
  2858  		inst = (unsigned char *)(gen->ptr);
  2859  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2860  		imm_value = insn->value1->address;
  2861  		imm_value2 = insn->value2->address;
  2862  		{
  2863  			x86_64_mov_membase_imm_size(inst, reg, imm_value2, ((int *)(imm_value))[0], 4);
  2864  			x86_64_mov_membase_imm_size(inst, reg, imm_value2 + 4, ((int *)(imm_value))[1], 4);
  2865  		}
  2866  		gen->ptr = (unsigned char *)inst;
  2867  		_jit_regs_commit(gen, &regs);
  2868  	}
  2869  	else
  2870  	{
  2871  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2872  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2873  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  2874  		_jit_regs_begin(gen, &regs, 32);
  2875  		inst = (unsigned char *)(gen->ptr);
  2876  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2877  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2878  		imm_value = insn->value2->address;
  2879  		{
  2880  			if(imm_value == 0)
  2881  			{
  2882  				x86_64_movsd_regp_reg(inst, reg, reg2);
  2883  			}
  2884  			else
  2885  			{
  2886  				x86_64_movsd_membase_reg(inst, reg, imm_value, reg2);
  2887  			}
  2888  		}
  2889  		gen->ptr = (unsigned char *)inst;
  2890  		_jit_regs_commit(gen, &regs);
  2891  	}
  2892  }
  2893  break;
  2894  
  2895  case JIT_OP_STORE_RELATIVE_STRUCT:
  2896  {
  2897  	unsigned char * inst;
  2898  	_jit_regs_t regs;
  2899  	int reg, reg2, reg3;
  2900  	jit_nint imm_value;
  2901  	jit_nint local_offset;
  2902  	if(!insn->value1->is_constant && !insn->value1->has_global_register && insn->value2->is_constant && (jit_type_get_size(jit_value_get_type(insn->value1)) <= _JIT_MAX_MEMCPY_INLINE))
  2903  	{
  2904  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2905  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2906  		_jit_regs_force_out(gen, insn->value1, 0);
  2907  		_jit_gen_fix_value(insn->value1);
  2908  		_jit_regs_add_scratch(&regs, x86_64_reg);
  2909  		_jit_regs_add_scratch(&regs, x86_64_xreg);
  2910  		_jit_regs_begin(gen, &regs, 32);
  2911  		inst = (unsigned char *)(gen->ptr);
  2912  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2913  		local_offset = insn->value1->frame_offset;
  2914  		imm_value = insn->value2->address;
  2915  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  2916  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  2917  		{
  2918  			inst = small_struct_copy(gen, inst, reg, imm_value, X86_64_RBP, local_offset,
  2919  									 jit_value_get_type(insn->value1), reg2, reg3);
  2920  		}
  2921  		gen->ptr = (unsigned char *)inst;
  2922  		_jit_regs_commit(gen, &regs);
  2923  	}
  2924  	else
  2925  	{
  2926  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  2927  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2928  		_jit_regs_force_out(gen, insn->value1, 0);
  2929  		_jit_gen_fix_value(insn->value1);
  2930  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
  2931  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
  2932  		_jit_regs_begin(gen, &regs, 32);
  2933  		inst = (unsigned char *)(gen->ptr);
  2934  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2935  		local_offset = insn->value1->frame_offset;
  2936  		imm_value = insn->value2->address;
  2937  		{
  2938  			inst = memory_copy(gen, inst, reg, imm_value, X86_64_RBP, local_offset,
  2939  					   jit_type_get_size(jit_value_get_type(insn->value1)));
  2940  		}
  2941  		gen->ptr = (unsigned char *)inst;
  2942  		_jit_regs_commit(gen, &regs);
  2943  	}
  2944  }
  2945  break;
  2946  
  2947  case JIT_OP_ADD_RELATIVE:
  2948  {
  2949  	unsigned char * inst;
  2950  	_jit_regs_t regs;
  2951  	int reg, reg2;
  2952  	jit_nint imm_value;
  2953  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  2954  	{
  2955  		_jit_regs_init(gen, &regs, 0);
  2956  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2957  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2958  		_jit_regs_begin(gen, &regs, 32);
  2959  		inst = (unsigned char *)(gen->ptr);
  2960  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2961  		{
  2962  		}
  2963  		gen->ptr = (unsigned char *)inst;
  2964  		_jit_regs_commit(gen, &regs);
  2965  	}
  2966  	else
  2967  	{
  2968  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2969  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2970  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2971  		_jit_regs_begin(gen, &regs, 32);
  2972  		inst = (unsigned char *)(gen->ptr);
  2973  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2974  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2975  		imm_value = insn->value2->address;
  2976  		{
  2977  			x86_64_lea_membase_size(inst, reg, reg2, imm_value, 8);
  2978  		}
  2979  		gen->ptr = (unsigned char *)inst;
  2980  		_jit_regs_commit(gen, &regs);
  2981  	}
  2982  }
  2983  break;
  2984  
  2985  case JIT_OP_LOAD_ELEMENT_SBYTE:
  2986  {
  2987  	unsigned char * inst;
  2988  	_jit_regs_t regs;
  2989  	int reg, reg2, reg3;
  2990  	{
  2991  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  2992  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  2993  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  2994  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  2995  		_jit_regs_begin(gen, &regs, 32);
  2996  		inst = (unsigned char *)(gen->ptr);
  2997  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  2998  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  2999  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3000  		{
  3001  			x86_64_movsx8_reg_memindex_size(inst, reg, reg2, 0, reg3, 0, 4);
  3002  		}
  3003  		gen->ptr = (unsigned char *)inst;
  3004  		_jit_regs_commit(gen, &regs);
  3005  	}
  3006  }
  3007  break;
  3008  
  3009  case JIT_OP_LOAD_ELEMENT_UBYTE:
  3010  {
  3011  	unsigned char * inst;
  3012  	_jit_regs_t regs;
  3013  	int reg, reg2, reg3;
  3014  	{
  3015  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3016  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3017  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3018  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3019  		_jit_regs_begin(gen, &regs, 32);
  3020  		inst = (unsigned char *)(gen->ptr);
  3021  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3022  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3023  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3024  		{
  3025  			x86_64_movzx8_reg_memindex_size(inst, reg, reg2, 0, reg3, 0, 4);
  3026  		}
  3027  		gen->ptr = (unsigned char *)inst;
  3028  		_jit_regs_commit(gen, &regs);
  3029  	}
  3030  }
  3031  break;
  3032  
  3033  case JIT_OP_LOAD_ELEMENT_SHORT:
  3034  {
  3035  	unsigned char * inst;
  3036  	_jit_regs_t regs;
  3037  	int reg, reg2, reg3;
  3038  	{
  3039  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3040  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3041  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3042  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3043  		_jit_regs_begin(gen, &regs, 32);
  3044  		inst = (unsigned char *)(gen->ptr);
  3045  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3046  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3047  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3048  		{
  3049  			x86_64_movsx16_reg_memindex_size(inst, reg, reg2, 0, reg3, 1, 4);
  3050  		}
  3051  		gen->ptr = (unsigned char *)inst;
  3052  		_jit_regs_commit(gen, &regs);
  3053  	}
  3054  }
  3055  break;
  3056  
  3057  case JIT_OP_LOAD_ELEMENT_USHORT:
  3058  {
  3059  	unsigned char * inst;
  3060  	_jit_regs_t regs;
  3061  	int reg, reg2, reg3;
  3062  	{
  3063  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3064  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3065  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3066  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3067  		_jit_regs_begin(gen, &regs, 32);
  3068  		inst = (unsigned char *)(gen->ptr);
  3069  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3070  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3071  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3072  		{
  3073  			x86_64_movzx16_reg_memindex_size(inst, reg, reg2, 0, reg3, 1, 4);
  3074  		}
  3075  		gen->ptr = (unsigned char *)inst;
  3076  		_jit_regs_commit(gen, &regs);
  3077  	}
  3078  }
  3079  break;
  3080  
  3081  case JIT_OP_LOAD_ELEMENT_INT:
  3082  {
  3083  	unsigned char * inst;
  3084  	_jit_regs_t regs;
  3085  	int reg, reg2, reg3;
  3086  	{
  3087  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3088  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3089  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3090  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3091  		_jit_regs_begin(gen, &regs, 32);
  3092  		inst = (unsigned char *)(gen->ptr);
  3093  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3094  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3095  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3096  		{
  3097  			x86_64_mov_reg_memindex_size(inst, reg, reg2, 0, reg3, 2, 4);
  3098  		}
  3099  		gen->ptr = (unsigned char *)inst;
  3100  		_jit_regs_commit(gen, &regs);
  3101  	}
  3102  }
  3103  break;
  3104  
  3105  case JIT_OP_LOAD_ELEMENT_LONG:
  3106  {
  3107  	unsigned char * inst;
  3108  	_jit_regs_t regs;
  3109  	int reg, reg2, reg3;
  3110  	{
  3111  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3112  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3113  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3114  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3115  		_jit_regs_begin(gen, &regs, 32);
  3116  		inst = (unsigned char *)(gen->ptr);
  3117  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3118  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3119  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3120  		{
  3121  			x86_64_mov_reg_memindex_size(inst, reg, reg2, 0, reg3, 3, 8);
  3122  		}
  3123  		gen->ptr = (unsigned char *)inst;
  3124  		_jit_regs_commit(gen, &regs);
  3125  	}
  3126  }
  3127  break;
  3128  
  3129  case JIT_OP_LOAD_ELEMENT_FLOAT32:
  3130  {
  3131  	unsigned char * inst;
  3132  	_jit_regs_t regs;
  3133  	int reg, reg2, reg3;
  3134  	{
  3135  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3136  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  3137  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3138  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3139  		_jit_regs_begin(gen, &regs, 32);
  3140  		inst = (unsigned char *)(gen->ptr);
  3141  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3142  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3143  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3144  		{
  3145  			x86_64_movss_reg_memindex(inst, reg, reg2, 0, reg3, 2);
  3146  		}
  3147  		gen->ptr = (unsigned char *)inst;
  3148  		_jit_regs_commit(gen, &regs);
  3149  	}
  3150  }
  3151  break;
  3152  
  3153  case JIT_OP_LOAD_ELEMENT_FLOAT64:
  3154  {
  3155  	unsigned char * inst;
  3156  	_jit_regs_t regs;
  3157  	int reg, reg2, reg3;
  3158  	{
  3159  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3160  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  3161  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3162  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3163  		_jit_regs_begin(gen, &regs, 32);
  3164  		inst = (unsigned char *)(gen->ptr);
  3165  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3166  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3167  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3168  		{
  3169  			x86_64_movsd_reg_memindex(inst, reg, reg2, 0, reg3, 3);
  3170  		}
  3171  		gen->ptr = (unsigned char *)inst;
  3172  		_jit_regs_commit(gen, &regs);
  3173  	}
  3174  }
  3175  break;
  3176  
  3177  case JIT_OP_STORE_ELEMENT_BYTE:
  3178  {
  3179  	unsigned char * inst;
  3180  	_jit_regs_t regs;
  3181  	int reg, reg2, reg3;
  3182  	{
  3183  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3184  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3185  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3186  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3187  		_jit_regs_begin(gen, &regs, 32);
  3188  		inst = (unsigned char *)(gen->ptr);
  3189  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3190  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3191  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3192  		{
  3193  			x86_64_mov_memindex_reg_size(inst, reg, 0, reg2, 0, reg3, 1);
  3194  		}
  3195  		gen->ptr = (unsigned char *)inst;
  3196  		_jit_regs_commit(gen, &regs);
  3197  	}
  3198  }
  3199  break;
  3200  
  3201  case JIT_OP_STORE_ELEMENT_SHORT:
  3202  {
  3203  	unsigned char * inst;
  3204  	_jit_regs_t regs;
  3205  	int reg, reg2, reg3;
  3206  	{
  3207  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3208  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3209  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3210  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3211  		_jit_regs_begin(gen, &regs, 32);
  3212  		inst = (unsigned char *)(gen->ptr);
  3213  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3214  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3215  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3216  		{
  3217  			x86_64_mov_memindex_reg_size(inst, reg, 0, reg2, 1, reg3, 2);
  3218  		}
  3219  		gen->ptr = (unsigned char *)inst;
  3220  		_jit_regs_commit(gen, &regs);
  3221  	}
  3222  }
  3223  break;
  3224  
  3225  case JIT_OP_STORE_ELEMENT_INT:
  3226  {
  3227  	unsigned char * inst;
  3228  	_jit_regs_t regs;
  3229  	int reg, reg2, reg3;
  3230  	{
  3231  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3232  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3233  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3234  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3235  		_jit_regs_begin(gen, &regs, 32);
  3236  		inst = (unsigned char *)(gen->ptr);
  3237  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3238  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3239  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3240  		{
  3241  			x86_64_mov_memindex_reg_size(inst, reg, 0, reg2, 2, reg3, 4);
  3242  		}
  3243  		gen->ptr = (unsigned char *)inst;
  3244  		_jit_regs_commit(gen, &regs);
  3245  	}
  3246  }
  3247  break;
  3248  
  3249  case JIT_OP_STORE_ELEMENT_LONG:
  3250  {
  3251  	unsigned char * inst;
  3252  	_jit_regs_t regs;
  3253  	int reg, reg2, reg3;
  3254  	jit_nint imm_value;
  3255  	if(insn->value2->is_constant)
  3256  	{
  3257  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3258  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3259  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3260  		_jit_regs_begin(gen, &regs, 32);
  3261  		inst = (unsigned char *)(gen->ptr);
  3262  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3263  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3264  		imm_value = insn->value2->address;
  3265  		{
  3266  			if(imm_value >= (jit_nint)jit_min_int && imm_value <= (jit_nint)jit_max_int)
  3267  			{
  3268  				x86_64_mov_memindex_imm_size(inst, reg, 0, reg2, 3, imm_value, 8);
  3269  			}
  3270  			else
  3271  			{
  3272  				jit_int *long_ptr = (jit_int *)(&(imm_value));
  3273  	
  3274  				x86_64_mov_memindex_imm_size(inst, reg, 0, reg2, 3, long_ptr[0], 4);
  3275  				x86_64_mov_memindex_imm_size(inst, reg, 4, reg2, 3, long_ptr[1], 4);
  3276  			}
  3277  		}
  3278  		gen->ptr = (unsigned char *)inst;
  3279  		_jit_regs_commit(gen, &regs);
  3280  	}
  3281  	else
  3282  	{
  3283  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3284  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3285  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3286  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3287  		_jit_regs_begin(gen, &regs, 32);
  3288  		inst = (unsigned char *)(gen->ptr);
  3289  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3290  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3291  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3292  		{
  3293  			x86_64_mov_memindex_reg_size(inst, reg, 0, reg2, 3, reg3, 8);
  3294  		}
  3295  		gen->ptr = (unsigned char *)inst;
  3296  		_jit_regs_commit(gen, &regs);
  3297  	}
  3298  }
  3299  break;
  3300  
  3301  case JIT_OP_STORE_ELEMENT_FLOAT32:
  3302  {
  3303  	unsigned char * inst;
  3304  	_jit_regs_t regs;
  3305  	int reg, reg2, reg3;
  3306  	{
  3307  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3308  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3309  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3310  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  3311  		_jit_regs_begin(gen, &regs, 32);
  3312  		inst = (unsigned char *)(gen->ptr);
  3313  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3314  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3315  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3316  		{
  3317  			x86_64_movss_memindex_reg(inst, reg, 0, reg2, 2, reg3);
  3318  		}
  3319  		gen->ptr = (unsigned char *)inst;
  3320  		_jit_regs_commit(gen, &regs);
  3321  	}
  3322  }
  3323  break;
  3324  
  3325  case JIT_OP_STORE_ELEMENT_FLOAT64:
  3326  {
  3327  	unsigned char * inst;
  3328  	_jit_regs_t regs;
  3329  	int reg, reg2, reg3;
  3330  	{
  3331  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
  3332  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3333  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3334  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  3335  		_jit_regs_begin(gen, &regs, 32);
  3336  		inst = (unsigned char *)(gen->ptr);
  3337  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3338  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3339  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3340  		{
  3341  			x86_64_movsd_memindex_reg(inst, reg, 0, reg2, 3, reg3);
  3342  		}
  3343  		gen->ptr = (unsigned char *)inst;
  3344  		_jit_regs_commit(gen, &regs);
  3345  	}
  3346  }
  3347  break;
  3348  
  3349  case JIT_OP_IADD:
  3350  {
  3351  	unsigned char * inst;
  3352  	_jit_regs_t regs;
  3353  	int reg, reg2;
  3354  	jit_nint imm_value;
  3355  	jit_nint local_offset;
  3356  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3357  	{
  3358  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3359  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3360  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3361  		_jit_regs_begin(gen, &regs, 32);
  3362  		inst = (unsigned char *)(gen->ptr);
  3363  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3364  		{
  3365  		}
  3366  		gen->ptr = (unsigned char *)inst;
  3367  		_jit_regs_commit(gen, &regs);
  3368  	}
  3369  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  3370  	{
  3371  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  3372  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3373  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3374  		_jit_regs_begin(gen, &regs, 32);
  3375  		inst = (unsigned char *)(gen->ptr);
  3376  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3377  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3378  		imm_value = insn->value2->address;
  3379  		{
  3380  			if(reg != reg2)
  3381  			{
  3382  				x86_64_lea_membase_size(inst, reg, reg2, imm_value, 4);
  3383  			}
  3384  			else if(imm_value == 1)
  3385  			{
  3386  				x86_64_inc_reg_size(inst, reg, 4);
  3387  			}
  3388  			else if(imm_value == -1)
  3389  			{
  3390  				x86_64_dec_reg_size(inst, reg, 4);
  3391  			}
  3392  			else
  3393  			{
  3394  				x86_64_add_reg_imm_size(inst, reg, imm_value, 4);
  3395  			}
  3396  		}
  3397  		gen->ptr = (unsigned char *)inst;
  3398  		_jit_regs_commit(gen, &regs);
  3399  	}
  3400  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  3401  	{
  3402  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3403  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3404  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3405  		_jit_gen_fix_value(insn->value2);
  3406  		_jit_regs_begin(gen, &regs, 32);
  3407  		inst = (unsigned char *)(gen->ptr);
  3408  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3409  		local_offset = insn->value2->frame_offset;
  3410  		{
  3411  			x86_64_add_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  3412  		}
  3413  		gen->ptr = (unsigned char *)inst;
  3414  		_jit_regs_commit(gen, &regs);
  3415  	}
  3416  	else
  3417  	{
  3418  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3419  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3420  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3421  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3422  		_jit_regs_begin(gen, &regs, 32);
  3423  		inst = (unsigned char *)(gen->ptr);
  3424  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3425  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3426  		{
  3427  			x86_64_add_reg_reg_size(inst, reg, reg2, 4);
  3428  		}
  3429  		gen->ptr = (unsigned char *)inst;
  3430  		_jit_regs_commit(gen, &regs);
  3431  	}
  3432  }
  3433  break;
  3434  
  3435  case JIT_OP_ISUB:
  3436  {
  3437  	unsigned char * inst;
  3438  	_jit_regs_t regs;
  3439  	int reg, reg2;
  3440  	jit_nint imm_value;
  3441  	jit_nint local_offset;
  3442  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3443  	{
  3444  		_jit_regs_init(gen, &regs, 0);
  3445  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3446  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3447  		_jit_regs_begin(gen, &regs, 32);
  3448  		inst = (unsigned char *)(gen->ptr);
  3449  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3450  		{
  3451  		}
  3452  		gen->ptr = (unsigned char *)inst;
  3453  		_jit_regs_commit(gen, &regs);
  3454  	}
  3455  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  3456  	{
  3457  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  3458  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3459  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3460  		_jit_regs_begin(gen, &regs, 32);
  3461  		inst = (unsigned char *)(gen->ptr);
  3462  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  3463  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3464  		imm_value = insn->value2->address;
  3465  		{
  3466  			if(reg != reg2)
  3467  			{
  3468  				x86_64_lea_membase_size(inst, reg, reg2, -imm_value, 4);
  3469  			}
  3470  			else if(imm_value == 1)
  3471  			{
  3472  				x86_64_dec_reg_size(inst, reg, 4);
  3473  			}
  3474  			else if(imm_value == -1)
  3475  			{
  3476  				x86_64_inc_reg_size(inst, reg, 4);
  3477  			}
  3478  			else
  3479  			{
  3480  				x86_64_sub_reg_imm_size(inst, reg, imm_value, 4);
  3481  			}
  3482  		}
  3483  		gen->ptr = (unsigned char *)inst;
  3484  		_jit_regs_commit(gen, &regs);
  3485  	}
  3486  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  3487  	{
  3488  		_jit_regs_init(gen, &regs, 0);
  3489  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3490  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3491  		_jit_gen_fix_value(insn->value2);
  3492  		_jit_regs_begin(gen, &regs, 32);
  3493  		inst = (unsigned char *)(gen->ptr);
  3494  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3495  		local_offset = insn->value2->frame_offset;
  3496  		{
  3497  			x86_64_sub_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  3498  		}
  3499  		gen->ptr = (unsigned char *)inst;
  3500  		_jit_regs_commit(gen, &regs);
  3501  	}
  3502  	else
  3503  	{
  3504  		_jit_regs_init(gen, &regs, 0);
  3505  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3506  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3507  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3508  		_jit_regs_begin(gen, &regs, 32);
  3509  		inst = (unsigned char *)(gen->ptr);
  3510  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3511  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3512  		{
  3513  			x86_64_sub_reg_reg_size(inst, reg, reg2, 4);
  3514  		}
  3515  		gen->ptr = (unsigned char *)inst;
  3516  		_jit_regs_commit(gen, &regs);
  3517  	}
  3518  }
  3519  break;
  3520  
  3521  case JIT_OP_INEG:
  3522  {
  3523  	unsigned char * inst;
  3524  	_jit_regs_t regs;
  3525  	int reg;
  3526  	{
  3527  		_jit_regs_init(gen, &regs, 0);
  3528  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3529  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3530  		_jit_regs_begin(gen, &regs, 32);
  3531  		inst = (unsigned char *)(gen->ptr);
  3532  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3533  		{
  3534  			x86_64_neg_reg_size(inst, reg, 4);
  3535  		}
  3536  		gen->ptr = (unsigned char *)inst;
  3537  		_jit_regs_commit(gen, &regs);
  3538  	}
  3539  }
  3540  break;
  3541  
  3542  case JIT_OP_IMUL:
  3543  {
  3544  	unsigned char * inst;
  3545  	_jit_regs_t regs;
  3546  	int reg, reg2;
  3547  	jit_nint imm_value;
  3548  	jit_nint local_offset;
  3549  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3550  	{
  3551  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3552  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3553  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3554  		_jit_regs_begin(gen, &regs, 32);
  3555  		inst = (unsigned char *)(gen->ptr);
  3556  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3557  		{
  3558  			x86_64_clear_reg(inst, reg);
  3559  		}
  3560  		gen->ptr = (unsigned char *)inst;
  3561  		_jit_regs_commit(gen, &regs);
  3562  	}
  3563  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  3564  	{
  3565  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3566  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3567  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3568  		_jit_regs_begin(gen, &regs, 32);
  3569  		inst = (unsigned char *)(gen->ptr);
  3570  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3571  		imm_value = insn->value2->address;
  3572  		{
  3573  			x86_64_neg_reg_size(inst, reg, 4);
  3574  		}
  3575  		gen->ptr = (unsigned char *)inst;
  3576  		_jit_regs_commit(gen, &regs);
  3577  	}
  3578  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  3579  	{
  3580  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3581  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3582  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3583  		_jit_regs_begin(gen, &regs, 32);
  3584  		inst = (unsigned char *)(gen->ptr);
  3585  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3586  		imm_value = insn->value2->address;
  3587  		{
  3588  		}
  3589  		gen->ptr = (unsigned char *)inst;
  3590  		_jit_regs_commit(gen, &regs);
  3591  	}
  3592  	else if(insn->value2->is_constant && (insn->value2->address == 2))
  3593  	{
  3594  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3595  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3596  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3597  		_jit_regs_begin(gen, &regs, 32);
  3598  		inst = (unsigned char *)(gen->ptr);
  3599  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3600  		imm_value = insn->value2->address;
  3601  		{
  3602  			x86_64_add_reg_reg_size(inst, reg, reg, 4);
  3603  		}
  3604  		gen->ptr = (unsigned char *)inst;
  3605  		_jit_regs_commit(gen, &regs);
  3606  	}
  3607  	else if(insn->value2->is_constant && ((((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  3608  	{
  3609  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3610  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3611  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3612  		_jit_regs_begin(gen, &regs, 32);
  3613  		inst = (unsigned char *)(gen->ptr);
  3614  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3615  		imm_value = insn->value2->address;
  3616  		{
  3617  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  3618  			jit_nuint shift, value = imm_value >> 1;
  3619  			for(shift = 0; value; value >>= 1)
  3620  			{
  3621  			    ++shift;
  3622  			}
  3623  			x86_64_shl_reg_imm_size(inst, reg, shift, 4);
  3624  		}
  3625  		gen->ptr = (unsigned char *)inst;
  3626  		_jit_regs_commit(gen, &regs);
  3627  	}
  3628  	else if(insn->value2->is_constant)
  3629  	{
  3630  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3631  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3632  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3633  		_jit_regs_begin(gen, &regs, 32);
  3634  		inst = (unsigned char *)(gen->ptr);
  3635  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3636  		imm_value = insn->value2->address;
  3637  		{
  3638  			x86_64_imul_reg_reg_imm_size(inst, reg, reg, imm_value, 4);
  3639  		}
  3640  		gen->ptr = (unsigned char *)inst;
  3641  		_jit_regs_commit(gen, &regs);
  3642  	}
  3643  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  3644  	{
  3645  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3646  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3647  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3648  		_jit_gen_fix_value(insn->value2);
  3649  		_jit_regs_begin(gen, &regs, 32);
  3650  		inst = (unsigned char *)(gen->ptr);
  3651  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3652  		local_offset = insn->value2->frame_offset;
  3653  		{
  3654  			x86_64_imul_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  3655  		}
  3656  		gen->ptr = (unsigned char *)inst;
  3657  		_jit_regs_commit(gen, &regs);
  3658  	}
  3659  	else
  3660  	{
  3661  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  3662  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3663  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3664  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  3665  		_jit_regs_begin(gen, &regs, 32);
  3666  		inst = (unsigned char *)(gen->ptr);
  3667  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3668  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3669  		{
  3670  			x86_64_imul_reg_reg_size(inst, reg, reg2, 4);
  3671  		}
  3672  		gen->ptr = (unsigned char *)inst;
  3673  		_jit_regs_commit(gen, &regs);
  3674  	}
  3675  }
  3676  break;
  3677  
  3678  case JIT_OP_IDIV:
  3679  {
  3680  	unsigned char * inst;
  3681  	_jit_regs_t regs;
  3682  	int reg, reg2, reg3;
  3683  	jit_nint imm_value;
  3684  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3685  	{
  3686  		_jit_gen_check_space(gen, 128);
  3687  		inst = (unsigned char *)(gen->ptr);
  3688  		{
  3689  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  3690  		}
  3691  		gen->ptr = (unsigned char *)inst;
  3692  	}
  3693  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  3694  	{
  3695  		_jit_regs_init(gen, &regs, 0);
  3696  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3697  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3698  		_jit_regs_begin(gen, &regs, 128);
  3699  		inst = (unsigned char *)(gen->ptr);
  3700  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3701  		imm_value = insn->value2->address;
  3702  		{
  3703  		}
  3704  		gen->ptr = (unsigned char *)inst;
  3705  		_jit_regs_commit(gen, &regs);
  3706  	}
  3707  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  3708  	{
  3709  		_jit_regs_init(gen, &regs, 0);
  3710  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3711  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3712  		_jit_regs_begin(gen, &regs, 128);
  3713  		inst = (unsigned char *)(gen->ptr);
  3714  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3715  		imm_value = insn->value2->address;
  3716  		{
  3717  			/* Dividing by -1 gives an exception if the argument
  3718  			   is minint, or simply negates for other values */
  3719  			jit_int min_int = jit_min_int;
  3720  			unsigned char *patch;
  3721  			x86_64_cmp_reg_imm_size(inst, reg, min_int, 4);
  3722  			patch = inst;
  3723  			x86_branch8(inst, X86_CC_NE, 0, 0);
  3724  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  3725  			x86_patch(patch, inst);
  3726  			x86_64_neg_reg_size(inst, reg, 4);
  3727  		}
  3728  		gen->ptr = (unsigned char *)inst;
  3729  		_jit_regs_commit(gen, &regs);
  3730  	}
  3731  	else if(insn->value2->is_constant && (insn->value2->address == 2))
  3732  	{
  3733  		_jit_regs_init(gen, &regs, 0);
  3734  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3735  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3736  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3737  		_jit_regs_begin(gen, &regs, 128);
  3738  		inst = (unsigned char *)(gen->ptr);
  3739  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3740  		imm_value = insn->value2->address;
  3741  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3742  		{
  3743  			/* move the value to be divided to the temporary */
  3744  			x86_64_mov_reg_reg_size(inst, reg2, reg, 4);
  3745  			/* shift the temporary to the 31 bits right */
  3746  			/* The result is 1 for negative values and 0 for zero or */
  3747  			/* positive values. (corrective value for negatives) */
  3748  			x86_64_shr_reg_imm_size(inst, reg2, 0x1f, 4);
  3749  			/* Add the corrective value to the divident */
  3750  			x86_64_add_reg_reg_size(inst, reg, reg2, 4);
  3751  			/* and do the right shift */
  3752  			x86_64_sar_reg_imm_size(inst, reg, 1, 4);
  3753  		}
  3754  		gen->ptr = (unsigned char *)inst;
  3755  		_jit_regs_commit(gen, &regs);
  3756  	}
  3757  	else if(insn->value2->is_constant && ((insn->value2->address > 0) && (((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  3758  	{
  3759  		_jit_regs_init(gen, &regs, 0);
  3760  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3761  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3762  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3763  		_jit_regs_begin(gen, &regs, 128);
  3764  		inst = (unsigned char *)(gen->ptr);
  3765  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3766  		imm_value = insn->value2->address;
  3767  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3768  		{
  3769  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  3770  			jit_nuint shift, corr, value = imm_value >> 1;
  3771  			for(shift = 0; value; value >>= 1)
  3772  			{
  3773  			    ++shift;
  3774  			}
  3775  			corr = imm_value - 1;
  3776  			x86_64_lea_membase_size(inst, reg2, reg, corr, 4);
  3777  			x86_64_test_reg_reg_size(inst, reg, reg, 4);
  3778  			x86_64_cmov_reg_reg_size(inst, X86_CC_S, reg, reg2, 1, 4);
  3779  			x86_64_sar_reg_imm_size(inst, reg, shift, 4);
  3780  		}
  3781  		gen->ptr = (unsigned char *)inst;
  3782  		_jit_regs_commit(gen, &regs);
  3783  	}
  3784  	else if(insn->value2->is_constant)
  3785  	{
  3786  		_jit_regs_init(gen, &regs, 0);
  3787  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3788  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3789  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  3790  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  3791  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3792  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  3793  		_jit_regs_begin(gen, &regs, 128);
  3794  		inst = (unsigned char *)(gen->ptr);
  3795  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3796  		imm_value = insn->value2->address;
  3797  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3798  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  3799  		{
  3800  			x86_64_mov_reg_imm_size(inst, reg2, imm_value, 4);
  3801  			x86_64_cdq(inst);
  3802  			x86_64_idiv_reg_size(inst, reg2, 4);
  3803  		}
  3804  		gen->ptr = (unsigned char *)inst;
  3805  		_jit_regs_commit(gen, &regs);
  3806  	}
  3807  	else
  3808  	{
  3809  		_jit_regs_init(gen, &regs, 0);
  3810  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3811  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3812  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  3813  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  3814  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3815  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  3816  		_jit_regs_begin(gen, &regs, 128);
  3817  		inst = (unsigned char *)(gen->ptr);
  3818  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3819  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3820  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3821  		{
  3822  			jit_int min_int = jit_min_int;
  3823  			unsigned char *patch, *patch2;
  3824  	#ifndef JIT_USE_SIGNALS
  3825  			x86_64_test_reg_reg_size(inst, reg2, reg2, 4);
  3826  			patch = inst;
  3827  			x86_branch8(inst, X86_CC_NE, 0, 0);
  3828  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  3829  			x86_patch(patch, inst);
  3830  	#endif
  3831  			x86_64_cmp_reg_imm_size(inst, reg2, -1, 4);
  3832  			patch = inst;
  3833  			x86_branch8(inst, X86_CC_NE, 0, 0);
  3834  			x86_64_cmp_reg_imm_size(inst, reg, min_int, 4);
  3835  			patch2 = inst;
  3836  			x86_branch8(inst, X86_CC_NE, 0, 0);
  3837  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  3838  			x86_patch(patch, inst);
  3839  			x86_patch(patch2, inst);
  3840  			x86_64_cdq(inst);
  3841  			x86_64_idiv_reg_size(inst, reg2, 4);
  3842  		}
  3843  		gen->ptr = (unsigned char *)inst;
  3844  		_jit_regs_commit(gen, &regs);
  3845  	}
  3846  }
  3847  break;
  3848  
  3849  case JIT_OP_IDIV_UN:
  3850  {
  3851  	unsigned char * inst;
  3852  	_jit_regs_t regs;
  3853  	int reg, reg2, reg3;
  3854  	jit_nint imm_value;
  3855  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3856  	{
  3857  		_jit_gen_check_space(gen, 128);
  3858  		inst = (unsigned char *)(gen->ptr);
  3859  		{
  3860  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  3861  		}
  3862  		gen->ptr = (unsigned char *)inst;
  3863  	}
  3864  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  3865  	{
  3866  		_jit_regs_init(gen, &regs, 0);
  3867  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3868  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3869  		_jit_regs_begin(gen, &regs, 128);
  3870  		inst = (unsigned char *)(gen->ptr);
  3871  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3872  		imm_value = insn->value2->address;
  3873  		{
  3874  		}
  3875  		gen->ptr = (unsigned char *)inst;
  3876  		_jit_regs_commit(gen, &regs);
  3877  	}
  3878  	else if(insn->value2->is_constant && ((((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  3879  	{
  3880  		_jit_regs_init(gen, &regs, 0);
  3881  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3882  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3883  		_jit_regs_begin(gen, &regs, 128);
  3884  		inst = (unsigned char *)(gen->ptr);
  3885  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3886  		imm_value = insn->value2->address;
  3887  		{
  3888  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  3889  			jit_nuint shift, value = imm_value >> 1;
  3890  			for(shift = 0; value; value >>= 1)
  3891  			{
  3892  			    ++shift;
  3893  			}
  3894  			x86_64_shr_reg_imm_size(inst, reg, shift, 4);
  3895  		}
  3896  		gen->ptr = (unsigned char *)inst;
  3897  		_jit_regs_commit(gen, &regs);
  3898  	}
  3899  	else if(insn->value2->is_constant)
  3900  	{
  3901  		_jit_regs_init(gen, &regs, 0);
  3902  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3903  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3904  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  3905  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  3906  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3907  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  3908  		_jit_regs_begin(gen, &regs, 128);
  3909  		inst = (unsigned char *)(gen->ptr);
  3910  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3911  		imm_value = insn->value2->address;
  3912  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3913  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  3914  		{
  3915  			x86_64_mov_reg_imm_size(inst, reg2, imm_value, 4);
  3916  			x86_64_clear_reg(inst, X86_64_RDX);
  3917  			x86_64_div_reg_size(inst, reg2, 4);
  3918  		}
  3919  		gen->ptr = (unsigned char *)inst;
  3920  		_jit_regs_commit(gen, &regs);
  3921  	}
  3922  	else
  3923  	{
  3924  		_jit_regs_init(gen, &regs, 0);
  3925  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3926  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3927  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  3928  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  3929  		_jit_regs_add_scratch(&regs, x86_64_reg);
  3930  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  3931  		_jit_regs_begin(gen, &regs, 128);
  3932  		inst = (unsigned char *)(gen->ptr);
  3933  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3934  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  3935  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  3936  		{
  3937  	#ifndef JIT_USE_SIGNALS
  3938  			unsigned char *patch;
  3939  			x86_64_test_reg_reg_size(inst, reg2, reg2, 4);
  3940  			patch = inst;
  3941  			x86_branch8(inst, X86_CC_NE, 0, 0);
  3942  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  3943  			x86_patch(patch, inst);
  3944  	#endif
  3945  			x86_64_clear_reg(inst, X86_64_RDX);
  3946  			x86_64_div_reg_size(inst, reg2, 4);
  3947  		}
  3948  		gen->ptr = (unsigned char *)inst;
  3949  		_jit_regs_commit(gen, &regs);
  3950  	}
  3951  }
  3952  break;
  3953  
  3954  case JIT_OP_IREM:
  3955  {
  3956  	unsigned char * inst;
  3957  	_jit_regs_t regs;
  3958  	int reg, reg2, reg3, reg4;
  3959  	jit_nint imm_value;
  3960  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  3961  	{
  3962  		_jit_gen_check_space(gen, 128);
  3963  		inst = (unsigned char *)(gen->ptr);
  3964  		{
  3965  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  3966  		}
  3967  		gen->ptr = (unsigned char *)inst;
  3968  	}
  3969  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  3970  	{
  3971  		_jit_regs_init(gen, &regs, 0);
  3972  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3973  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3974  		_jit_regs_begin(gen, &regs, 128);
  3975  		inst = (unsigned char *)(gen->ptr);
  3976  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3977  		imm_value = insn->value2->address;
  3978  		{
  3979  			x86_64_clear_reg(inst, reg);
  3980  		}
  3981  		gen->ptr = (unsigned char *)inst;
  3982  		_jit_regs_commit(gen, &regs);
  3983  	}
  3984  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  3985  	{
  3986  		_jit_regs_init(gen, &regs, 0);
  3987  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  3988  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  3989  		_jit_regs_begin(gen, &regs, 128);
  3990  		inst = (unsigned char *)(gen->ptr);
  3991  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  3992  		imm_value = insn->value2->address;
  3993  		{
  3994  			/* Dividing by -1 gives an exception if the argument
  3995  			   is minint, or simply gives a remainder of zero */
  3996  			jit_int min_int = jit_min_int;
  3997  			unsigned char *patch;
  3998  			x86_64_cmp_reg_imm_size(inst, reg, min_int, 4);
  3999  			patch = inst;
  4000  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4001  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4002  			x86_patch(patch, inst);
  4003  			x86_64_clear_reg(inst, reg);
  4004  		}
  4005  		gen->ptr = (unsigned char *)inst;
  4006  		_jit_regs_commit(gen, &regs);
  4007  	}
  4008  	else if(insn->value2->is_constant)
  4009  	{
  4010  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4011  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4012  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4013  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4014  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4015  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  4016  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4017  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  4018  		_jit_regs_begin(gen, &regs, 128);
  4019  		inst = (unsigned char *)(gen->ptr);
  4020  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4021  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4022  		imm_value = insn->value2->address;
  4023  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4024  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  4025  		{
  4026  			x86_64_mov_reg_imm_size(inst, reg3, imm_value, 4);
  4027  			x86_64_cdq(inst);
  4028  			x86_64_idiv_reg_size(inst, reg3, 4);
  4029  		}
  4030  		gen->ptr = (unsigned char *)inst;
  4031  		_jit_regs_commit(gen, &regs);
  4032  	}
  4033  	else
  4034  	{
  4035  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4036  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4037  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4038  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4039  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4040  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  4041  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4042  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  4043  		_jit_regs_begin(gen, &regs, 128);
  4044  		inst = (unsigned char *)(gen->ptr);
  4045  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4046  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4047  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4048  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4049  		{
  4050  			jit_int min_int = jit_min_int;
  4051  			unsigned char *patch, *patch2;
  4052  	#ifndef JIT_USE_SIGNALS
  4053  			x86_64_test_reg_reg_size(inst, reg3, reg3, 4);
  4054  			patch = inst;
  4055  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4056  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4057  			x86_patch(patch, inst);
  4058  	#endif
  4059  			x86_64_cmp_reg_imm_size(inst, reg3, -1, 4);
  4060  			patch = inst;
  4061  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4062  			x86_64_cmp_reg_imm_size(inst, reg2, min_int, 4);
  4063  			patch2 = inst;
  4064  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4065  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4066  			x86_patch(patch, inst);
  4067  			x86_patch(patch2, inst);
  4068  			x86_64_cdq(inst);
  4069  			x86_64_idiv_reg_size(inst, reg3, 4);
  4070  		}
  4071  		gen->ptr = (unsigned char *)inst;
  4072  		_jit_regs_commit(gen, &regs);
  4073  	}
  4074  }
  4075  break;
  4076  
  4077  case JIT_OP_IREM_UN:
  4078  {
  4079  	unsigned char * inst;
  4080  	_jit_regs_t regs;
  4081  	int reg, reg2, reg3, reg4;
  4082  	jit_nint imm_value;
  4083  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4084  	{
  4085  		_jit_gen_check_space(gen, 128);
  4086  		inst = (unsigned char *)(gen->ptr);
  4087  		{
  4088  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4089  		}
  4090  		gen->ptr = (unsigned char *)inst;
  4091  	}
  4092  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4093  	{
  4094  		_jit_regs_init(gen, &regs, 0);
  4095  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4096  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4097  		_jit_regs_begin(gen, &regs, 128);
  4098  		inst = (unsigned char *)(gen->ptr);
  4099  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4100  		imm_value = insn->value2->address;
  4101  		{
  4102  			x86_64_clear_reg(inst, reg);
  4103  		}
  4104  		gen->ptr = (unsigned char *)inst;
  4105  		_jit_regs_commit(gen, &regs);
  4106  	}
  4107  	else if(insn->value2->is_constant && ((insn->value2->address & (insn->value2->address - 1)) == 0))
  4108  	{
  4109  		_jit_regs_init(gen, &regs, 0);
  4110  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4111  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4112  		_jit_regs_begin(gen, &regs, 128);
  4113  		inst = (unsigned char *)(gen->ptr);
  4114  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4115  		imm_value = insn->value2->address;
  4116  		{
  4117  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  4118  			x86_64_and_reg_imm_size(inst, reg, imm_value - 1, 4);
  4119  		}
  4120  		gen->ptr = (unsigned char *)inst;
  4121  		_jit_regs_commit(gen, &regs);
  4122  	}
  4123  	else if(insn->value2->is_constant)
  4124  	{
  4125  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4126  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4127  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4128  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4129  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4130  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  4131  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4132  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  4133  		_jit_regs_begin(gen, &regs, 128);
  4134  		inst = (unsigned char *)(gen->ptr);
  4135  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4136  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4137  		imm_value = insn->value2->address;
  4138  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4139  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  4140  		{
  4141  			x86_64_mov_reg_imm_size(inst, reg3, imm_value, 4);
  4142  			x86_64_clear_reg(inst, X86_64_RDX);
  4143  			x86_64_div_reg_size(inst, reg3, 4);
  4144  		}
  4145  		gen->ptr = (unsigned char *)inst;
  4146  		_jit_regs_commit(gen, &regs);
  4147  	}
  4148  	else
  4149  	{
  4150  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4151  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4152  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4153  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4154  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4155  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  4156  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4157  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  4158  		_jit_regs_begin(gen, &regs, 128);
  4159  		inst = (unsigned char *)(gen->ptr);
  4160  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4161  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4162  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4163  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4164  		{
  4165  	#ifndef JIT_USE_SIGNALS
  4166  			unsigned char *patch;
  4167  			x86_64_test_reg_reg_size(inst, reg3, reg3, 4);
  4168  			patch = inst;
  4169  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4170  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4171  			x86_patch(patch, inst);
  4172  	#endif
  4173  			x86_64_clear_reg(inst, X86_64_RDX);
  4174  			x86_64_div_reg_size(inst, reg3, 4);
  4175  		}
  4176  		gen->ptr = (unsigned char *)inst;
  4177  		_jit_regs_commit(gen, &regs);
  4178  	}
  4179  }
  4180  break;
  4181  
  4182  case JIT_OP_LADD:
  4183  {
  4184  	unsigned char * inst;
  4185  	_jit_regs_t regs;
  4186  	int reg, reg2;
  4187  	jit_nint imm_value;
  4188  	jit_nint local_offset;
  4189  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4190  	{
  4191  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4192  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4193  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4194  		_jit_regs_begin(gen, &regs, 32);
  4195  		inst = (unsigned char *)(gen->ptr);
  4196  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4197  		{
  4198  		}
  4199  		gen->ptr = (unsigned char *)inst;
  4200  		_jit_regs_commit(gen, &regs);
  4201  	}
  4202  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  4203  	{
  4204  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  4205  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4206  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4207  		_jit_regs_begin(gen, &regs, 32);
  4208  		inst = (unsigned char *)(gen->ptr);
  4209  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4210  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4211  		imm_value = insn->value2->address;
  4212  		{
  4213  			if(reg != reg2)
  4214  			{
  4215  				x86_64_lea_membase_size(inst, reg, reg2, imm_value, 8);
  4216  			}
  4217  			else if(imm_value == 1)
  4218  			{
  4219  				x86_64_inc_reg_size(inst, reg, 8);
  4220  			}
  4221  			else if(imm_value == -1)
  4222  			{
  4223  				x86_64_dec_reg_size(inst, reg, 8);
  4224  			}
  4225  			else
  4226  			{
  4227  				x86_64_add_reg_imm_size(inst, reg, imm_value, 8);
  4228  			}
  4229  		}
  4230  		gen->ptr = (unsigned char *)inst;
  4231  		_jit_regs_commit(gen, &regs);
  4232  	}
  4233  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  4234  	{
  4235  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4236  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4237  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4238  		_jit_gen_fix_value(insn->value2);
  4239  		_jit_regs_begin(gen, &regs, 32);
  4240  		inst = (unsigned char *)(gen->ptr);
  4241  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4242  		local_offset = insn->value2->frame_offset;
  4243  		{
  4244  			x86_64_add_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  4245  		}
  4246  		gen->ptr = (unsigned char *)inst;
  4247  		_jit_regs_commit(gen, &regs);
  4248  	}
  4249  	else
  4250  	{
  4251  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4252  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4253  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4254  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  4255  		_jit_regs_begin(gen, &regs, 32);
  4256  		inst = (unsigned char *)(gen->ptr);
  4257  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4258  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4259  		{
  4260  			x86_64_add_reg_reg_size(inst, reg, reg2, 8);
  4261  		}
  4262  		gen->ptr = (unsigned char *)inst;
  4263  		_jit_regs_commit(gen, &regs);
  4264  	}
  4265  }
  4266  break;
  4267  
  4268  case JIT_OP_LSUB:
  4269  {
  4270  	unsigned char * inst;
  4271  	_jit_regs_t regs;
  4272  	int reg, reg2;
  4273  	jit_nint imm_value;
  4274  	jit_nint local_offset;
  4275  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4276  	{
  4277  		_jit_regs_init(gen, &regs, 0);
  4278  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4279  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4280  		_jit_regs_begin(gen, &regs, 32);
  4281  		inst = (unsigned char *)(gen->ptr);
  4282  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4283  		{
  4284  		}
  4285  		gen->ptr = (unsigned char *)inst;
  4286  		_jit_regs_commit(gen, &regs);
  4287  	}
  4288  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  4289  	{
  4290  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4291  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4292  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4293  		_jit_regs_begin(gen, &regs, 32);
  4294  		inst = (unsigned char *)(gen->ptr);
  4295  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4296  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4297  		imm_value = insn->value2->address;
  4298  		{
  4299  			if(reg != reg2)
  4300  			{
  4301  				x86_64_lea_membase_size(inst, reg, reg2, -imm_value, 8);
  4302  			}
  4303  			else if(imm_value == 1)
  4304  			{
  4305  				x86_64_dec_reg_size(inst, reg, 8);
  4306  			}
  4307  			else if(imm_value == -1)
  4308  			{
  4309  				x86_64_inc_reg_size(inst, reg, 8);
  4310  			}
  4311  			else
  4312  			{
  4313  				x86_64_sub_reg_imm_size(inst, reg, imm_value, 8);
  4314  			}
  4315  		}
  4316  		gen->ptr = (unsigned char *)inst;
  4317  		_jit_regs_commit(gen, &regs);
  4318  	}
  4319  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  4320  	{
  4321  		_jit_regs_init(gen, &regs, 0);
  4322  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4323  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4324  		_jit_gen_fix_value(insn->value2);
  4325  		_jit_regs_begin(gen, &regs, 32);
  4326  		inst = (unsigned char *)(gen->ptr);
  4327  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4328  		local_offset = insn->value2->frame_offset;
  4329  		{
  4330  			x86_64_sub_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  4331  		}
  4332  		gen->ptr = (unsigned char *)inst;
  4333  		_jit_regs_commit(gen, &regs);
  4334  	}
  4335  	else
  4336  	{
  4337  		_jit_regs_init(gen, &regs, 0);
  4338  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4339  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4340  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  4341  		_jit_regs_begin(gen, &regs, 32);
  4342  		inst = (unsigned char *)(gen->ptr);
  4343  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4344  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4345  		{
  4346  			x86_64_sub_reg_reg_size(inst, reg, reg2, 8);
  4347  		}
  4348  		gen->ptr = (unsigned char *)inst;
  4349  		_jit_regs_commit(gen, &regs);
  4350  	}
  4351  }
  4352  break;
  4353  
  4354  case JIT_OP_LNEG:
  4355  {
  4356  	unsigned char * inst;
  4357  	_jit_regs_t regs;
  4358  	int reg;
  4359  	{
  4360  		_jit_regs_init(gen, &regs, 0);
  4361  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4362  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4363  		_jit_regs_begin(gen, &regs, 32);
  4364  		inst = (unsigned char *)(gen->ptr);
  4365  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4366  		{
  4367  			x86_64_neg_reg_size(inst, reg, 8);
  4368  		}
  4369  		gen->ptr = (unsigned char *)inst;
  4370  		_jit_regs_commit(gen, &regs);
  4371  	}
  4372  }
  4373  break;
  4374  
  4375  case JIT_OP_LMUL:
  4376  {
  4377  	unsigned char * inst;
  4378  	_jit_regs_t regs;
  4379  	int reg, reg2;
  4380  	jit_nint imm_value;
  4381  	jit_nint local_offset;
  4382  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4383  	{
  4384  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4385  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4386  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4387  		_jit_regs_begin(gen, &regs, 32);
  4388  		inst = (unsigned char *)(gen->ptr);
  4389  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4390  		{
  4391  			x86_64_clear_reg(inst, reg);
  4392  		}
  4393  		gen->ptr = (unsigned char *)inst;
  4394  		_jit_regs_commit(gen, &regs);
  4395  	}
  4396  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  4397  	{
  4398  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4399  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4400  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4401  		_jit_regs_begin(gen, &regs, 32);
  4402  		inst = (unsigned char *)(gen->ptr);
  4403  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4404  		imm_value = insn->value2->address;
  4405  		{
  4406  			x86_64_neg_reg_size(inst, reg, 8);
  4407  		}
  4408  		gen->ptr = (unsigned char *)inst;
  4409  		_jit_regs_commit(gen, &regs);
  4410  	}
  4411  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4412  	{
  4413  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4414  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4415  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4416  		_jit_regs_begin(gen, &regs, 32);
  4417  		inst = (unsigned char *)(gen->ptr);
  4418  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4419  		imm_value = insn->value2->address;
  4420  		{
  4421  		}
  4422  		gen->ptr = (unsigned char *)inst;
  4423  		_jit_regs_commit(gen, &regs);
  4424  	}
  4425  	else if(insn->value2->is_constant && (insn->value2->address == 2))
  4426  	{
  4427  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4428  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4429  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4430  		_jit_regs_begin(gen, &regs, 32);
  4431  		inst = (unsigned char *)(gen->ptr);
  4432  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4433  		imm_value = insn->value2->address;
  4434  		{
  4435  			x86_64_add_reg_reg_size(inst, reg, reg, 8);
  4436  		}
  4437  		gen->ptr = (unsigned char *)inst;
  4438  		_jit_regs_commit(gen, &regs);
  4439  	}
  4440  	else if(insn->value2->is_constant && ((((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  4441  	{
  4442  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4443  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4444  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4445  		_jit_regs_begin(gen, &regs, 32);
  4446  		inst = (unsigned char *)(gen->ptr);
  4447  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4448  		imm_value = insn->value2->address;
  4449  		{
  4450  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  4451  			jit_nuint shift, value = imm_value >> 1;
  4452  			for(shift = 0; value; value >>= 1)
  4453  			{
  4454  			    ++shift;
  4455  			}
  4456  			x86_64_shl_reg_imm_size(inst, reg, shift, 8);
  4457  		}
  4458  		gen->ptr = (unsigned char *)inst;
  4459  		_jit_regs_commit(gen, &regs);
  4460  	}
  4461  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  4462  	{
  4463  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4464  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4465  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4466  		_jit_regs_begin(gen, &regs, 32);
  4467  		inst = (unsigned char *)(gen->ptr);
  4468  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4469  		imm_value = insn->value2->address;
  4470  		{
  4471  			x86_64_imul_reg_reg_imm_size(inst, reg, reg, imm_value, 8);
  4472  		}
  4473  		gen->ptr = (unsigned char *)inst;
  4474  		_jit_regs_commit(gen, &regs);
  4475  	}
  4476  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  4477  	{
  4478  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4479  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4480  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4481  		_jit_gen_fix_value(insn->value2);
  4482  		_jit_regs_begin(gen, &regs, 32);
  4483  		inst = (unsigned char *)(gen->ptr);
  4484  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4485  		local_offset = insn->value2->frame_offset;
  4486  		{
  4487  			x86_64_imul_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  4488  		}
  4489  		gen->ptr = (unsigned char *)inst;
  4490  		_jit_regs_commit(gen, &regs);
  4491  	}
  4492  	else
  4493  	{
  4494  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  4495  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4496  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4497  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  4498  		_jit_regs_begin(gen, &regs, 32);
  4499  		inst = (unsigned char *)(gen->ptr);
  4500  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4501  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4502  		{
  4503  			x86_64_imul_reg_reg_size(inst, reg, reg2, 8);
  4504  		}
  4505  		gen->ptr = (unsigned char *)inst;
  4506  		_jit_regs_commit(gen, &regs);
  4507  	}
  4508  }
  4509  break;
  4510  
  4511  case JIT_OP_LDIV:
  4512  {
  4513  	unsigned char * inst;
  4514  	_jit_regs_t regs;
  4515  	int reg, reg2, reg3;
  4516  	jit_nint imm_value;
  4517  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4518  	{
  4519  		_jit_gen_check_space(gen, 128);
  4520  		inst = (unsigned char *)(gen->ptr);
  4521  		{
  4522  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4523  		}
  4524  		gen->ptr = (unsigned char *)inst;
  4525  	}
  4526  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4527  	{
  4528  		_jit_regs_init(gen, &regs, 0);
  4529  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4530  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4531  		_jit_regs_begin(gen, &regs, 128);
  4532  		inst = (unsigned char *)(gen->ptr);
  4533  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4534  		imm_value = insn->value2->address;
  4535  		{
  4536  		}
  4537  		gen->ptr = (unsigned char *)inst;
  4538  		_jit_regs_commit(gen, &regs);
  4539  	}
  4540  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  4541  	{
  4542  		_jit_regs_init(gen, &regs, 0);
  4543  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4544  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4545  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4546  		_jit_regs_begin(gen, &regs, 128);
  4547  		inst = (unsigned char *)(gen->ptr);
  4548  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4549  		imm_value = insn->value2->address;
  4550  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4551  		{
  4552  			/* Dividing by -1 gives an exception if the argument
  4553  			   is minint, or simply negates for other values */
  4554  			jit_long min_long = jit_min_long;
  4555  			unsigned char *patch;
  4556  			x86_64_mov_reg_imm_size(inst, reg2, min_long, 8);
  4557  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  4558  			patch = inst;
  4559  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4560  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4561  			x86_patch(patch, inst);
  4562  			x86_64_neg_reg_size(inst, reg, 8);
  4563  		}
  4564  		gen->ptr = (unsigned char *)inst;
  4565  		_jit_regs_commit(gen, &regs);
  4566  	}
  4567  	else if(insn->value2->is_constant && (insn->value2->address == 2))
  4568  	{
  4569  		_jit_regs_init(gen, &regs, 0);
  4570  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4571  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4572  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4573  		_jit_regs_begin(gen, &regs, 128);
  4574  		inst = (unsigned char *)(gen->ptr);
  4575  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4576  		imm_value = insn->value2->address;
  4577  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4578  		{
  4579  			/* move the value to be divided to the temporary */
  4580  			x86_64_mov_reg_reg_size(inst, reg2, reg, 8);
  4581  			/* shift the temporary to the 63 bits right */
  4582  			/* The result is 1 for negative values and 0 for zero or */
  4583  			/* positive values. (corrective value for negatives) */
  4584  			x86_64_shr_reg_imm_size(inst, reg2, 0x3f, 8);
  4585  			/* Add the corrective value to the divident */
  4586  			x86_64_add_reg_reg_size(inst, reg, reg2, 8);
  4587  			/* and do the right shift */
  4588  			x86_64_sar_reg_imm_size(inst, reg, 1, 8);
  4589  		}
  4590  		gen->ptr = (unsigned char *)inst;
  4591  		_jit_regs_commit(gen, &regs);
  4592  	}
  4593  	else if(insn->value2->is_constant && ((insn->value2->address > 0) && (((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  4594  	{
  4595  		_jit_regs_init(gen, &regs, 0);
  4596  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4597  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4598  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4599  		_jit_regs_begin(gen, &regs, 128);
  4600  		inst = (unsigned char *)(gen->ptr);
  4601  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4602  		imm_value = insn->value2->address;
  4603  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4604  		{
  4605  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  4606  			jit_nuint shift, value = imm_value >> 1;
  4607  			for(shift = 0; value; value >>= 1)
  4608  			{
  4609  			    ++shift;
  4610  			}
  4611  			if((jit_nuint)imm_value <= (jit_nuint)jit_max_uint)
  4612  			{
  4613  				jit_nuint corr = (imm_value - 1);
  4614  	
  4615  				x86_64_lea_membase_size(inst, reg2, reg, corr, 8);
  4616  				x86_64_test_reg_reg_size(inst, reg, reg, 8);
  4617  			}
  4618  			else
  4619  			{
  4620  				jit_nuint corr = (imm_value - 1);
  4621  	
  4622  				if(corr <= (jit_nuint)jit_max_uint)
  4623  				{
  4624  					x86_64_mov_reg_imm_size(inst, reg2, corr, 4);
  4625  				}
  4626  				else
  4627  				{
  4628  					x86_64_mov_reg_imm_size(inst, reg2, corr, 8);
  4629  				}
  4630  				x86_64_test_reg_reg_size(inst, reg, reg, 8);
  4631  				x86_64_lea_memindex_size(inst, reg2, reg, 0, reg2, 0, 8);
  4632  			}
  4633  			x86_64_cmov_reg_reg_size(inst, X86_CC_S, reg, reg2, 1, 8);
  4634  			x86_64_sar_reg_imm_size(inst, reg, shift, 8);
  4635  		}
  4636  		gen->ptr = (unsigned char *)inst;
  4637  		_jit_regs_commit(gen, &regs);
  4638  	}
  4639  	else if(insn->value2->is_constant)
  4640  	{
  4641  		_jit_regs_init(gen, &regs, 0);
  4642  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4643  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4644  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4645  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  4646  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4647  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  4648  		_jit_regs_begin(gen, &regs, 128);
  4649  		inst = (unsigned char *)(gen->ptr);
  4650  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4651  		imm_value = insn->value2->address;
  4652  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4653  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  4654  		{
  4655  			x86_64_mov_reg_imm_size(inst, reg2, imm_value, 8);
  4656  			x86_64_cqo(inst);
  4657  			x86_64_idiv_reg_size(inst, reg2, 8);
  4658  		}
  4659  		gen->ptr = (unsigned char *)inst;
  4660  		_jit_regs_commit(gen, &regs);
  4661  	}
  4662  	else
  4663  	{
  4664  		_jit_regs_init(gen, &regs, 0);
  4665  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4666  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4667  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4668  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  4669  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4670  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  4671  		_jit_regs_begin(gen, &regs, 128);
  4672  		inst = (unsigned char *)(gen->ptr);
  4673  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4674  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4675  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4676  		{
  4677  			jit_long min_long = jit_min_long;
  4678  			unsigned char *patch, *patch2;
  4679  	#ifndef JIT_USE_SIGNALS
  4680  			x86_64_or_reg_reg_size(inst, reg2, reg2, 8);
  4681  			patch = inst;
  4682  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4683  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4684  			x86_patch(patch, inst);
  4685  	#endif
  4686  			x86_64_cmp_reg_imm_size(inst, reg2, -1, 8);
  4687  			patch = inst;
  4688  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4689  			x86_64_mov_reg_imm_size(inst, reg3, min_long, 8);
  4690  			x86_64_cmp_reg_reg_size(inst, reg, reg3, 8);
  4691  			patch2 = inst;
  4692  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4693  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4694  			x86_patch(patch, inst);
  4695  			x86_patch(patch2, inst);
  4696  			x86_64_cqo(inst);
  4697  			x86_64_idiv_reg_size(inst, reg2, 8);
  4698  		}
  4699  		gen->ptr = (unsigned char *)inst;
  4700  		_jit_regs_commit(gen, &regs);
  4701  	}
  4702  }
  4703  break;
  4704  
  4705  case JIT_OP_LDIV_UN:
  4706  {
  4707  	unsigned char * inst;
  4708  	_jit_regs_t regs;
  4709  	int reg, reg2, reg3;
  4710  	jit_nint imm_value;
  4711  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4712  	{
  4713  		_jit_gen_check_space(gen, 128);
  4714  		inst = (unsigned char *)(gen->ptr);
  4715  		{
  4716  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4717  		}
  4718  		gen->ptr = (unsigned char *)inst;
  4719  	}
  4720  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4721  	{
  4722  		_jit_regs_init(gen, &regs, 0);
  4723  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4724  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4725  		_jit_regs_begin(gen, &regs, 128);
  4726  		inst = (unsigned char *)(gen->ptr);
  4727  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4728  		imm_value = insn->value2->address;
  4729  		{
  4730  		}
  4731  		gen->ptr = (unsigned char *)inst;
  4732  		_jit_regs_commit(gen, &regs);
  4733  	}
  4734  	else if(insn->value2->is_constant && ((((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  4735  	{
  4736  		_jit_regs_init(gen, &regs, 0);
  4737  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4738  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4739  		_jit_regs_begin(gen, &regs, 128);
  4740  		inst = (unsigned char *)(gen->ptr);
  4741  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4742  		imm_value = insn->value2->address;
  4743  		{
  4744  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  4745  			jit_nuint shift, value = imm_value >> 1;
  4746  			for(shift = 0; value; value >>= 1)
  4747  			{
  4748  			    ++shift;
  4749  			}
  4750  			x86_64_shr_reg_imm_size(inst, reg, shift, 8);
  4751  		}
  4752  		gen->ptr = (unsigned char *)inst;
  4753  		_jit_regs_commit(gen, &regs);
  4754  	}
  4755  	else if(insn->value2->is_constant)
  4756  	{
  4757  		_jit_regs_init(gen, &regs, 0);
  4758  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4759  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4760  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4761  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  4762  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4763  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  4764  		_jit_regs_begin(gen, &regs, 128);
  4765  		inst = (unsigned char *)(gen->ptr);
  4766  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4767  		imm_value = insn->value2->address;
  4768  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4769  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  4770  		{
  4771  			x86_64_mov_reg_imm_size(inst, reg2, imm_value, 8);
  4772  			x86_64_clear_reg(inst, X86_64_RDX);
  4773  			x86_64_div_reg_size(inst, reg2, 8);
  4774  		}
  4775  		gen->ptr = (unsigned char *)inst;
  4776  		_jit_regs_commit(gen, &regs);
  4777  	}
  4778  	else
  4779  	{
  4780  		_jit_regs_init(gen, &regs, 0);
  4781  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4782  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4783  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4784  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  4785  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4786  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  4787  		_jit_regs_begin(gen, &regs, 128);
  4788  		inst = (unsigned char *)(gen->ptr);
  4789  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4790  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4791  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4792  		{
  4793  	#ifndef JIT_USE_SIGNALS
  4794  			unsigned char *patch;
  4795  			x86_64_test_reg_reg_size(inst, reg2, reg2, 8);
  4796  			patch = inst;
  4797  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4798  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4799  			x86_patch(patch, inst);
  4800  	#endif
  4801  			x86_64_clear_reg(inst, X86_64_RDX);
  4802  			x86_64_div_reg_size(inst, reg2, 8);
  4803  		}
  4804  		gen->ptr = (unsigned char *)inst;
  4805  		_jit_regs_commit(gen, &regs);
  4806  	}
  4807  }
  4808  break;
  4809  
  4810  case JIT_OP_LREM:
  4811  {
  4812  	unsigned char * inst;
  4813  	_jit_regs_t regs;
  4814  	int reg, reg2, reg3, reg4;
  4815  	jit_nint imm_value;
  4816  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4817  	{
  4818  		_jit_gen_check_space(gen, 128);
  4819  		inst = (unsigned char *)(gen->ptr);
  4820  		{
  4821  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4822  		}
  4823  		gen->ptr = (unsigned char *)inst;
  4824  	}
  4825  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4826  	{
  4827  		_jit_regs_init(gen, &regs, 0);
  4828  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4829  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4830  		_jit_regs_begin(gen, &regs, 128);
  4831  		inst = (unsigned char *)(gen->ptr);
  4832  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4833  		imm_value = insn->value2->address;
  4834  		{
  4835  			x86_64_clear_reg(inst, reg);
  4836  		}
  4837  		gen->ptr = (unsigned char *)inst;
  4838  		_jit_regs_commit(gen, &regs);
  4839  	}
  4840  	else if(insn->value2->is_constant && (insn->value2->address == -1))
  4841  	{
  4842  		_jit_regs_init(gen, &regs, 0);
  4843  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4844  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4845  		_jit_regs_begin(gen, &regs, 128);
  4846  		inst = (unsigned char *)(gen->ptr);
  4847  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4848  		imm_value = insn->value2->address;
  4849  		{
  4850  			/* Dividing by -1 gives an exception if the argument
  4851  			   is minint, or simply gives a remainder of zero */
  4852  			jit_long min_long = jit_min_long;
  4853  			unsigned char *patch;
  4854  			x86_64_cmp_reg_imm_size(inst, reg, min_long, 8);
  4855  			patch = inst;
  4856  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4857  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4858  			x86_patch(patch, inst);
  4859  			x86_64_clear_reg(inst, reg);
  4860  		}
  4861  		gen->ptr = (unsigned char *)inst;
  4862  		_jit_regs_commit(gen, &regs);
  4863  	}
  4864  	else if(insn->value2->is_constant)
  4865  	{
  4866  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4867  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4868  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4869  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4870  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4871  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  4872  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4873  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  4874  		_jit_regs_begin(gen, &regs, 128);
  4875  		inst = (unsigned char *)(gen->ptr);
  4876  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4877  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4878  		imm_value = insn->value2->address;
  4879  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4880  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  4881  		{
  4882  			x86_64_mov_reg_imm_size(inst, reg3, imm_value, 8);
  4883  			x86_64_cqo(inst);
  4884  			x86_64_idiv_reg_size(inst, reg3, 8);
  4885  		}
  4886  		gen->ptr = (unsigned char *)inst;
  4887  		_jit_regs_commit(gen, &regs);
  4888  	}
  4889  	else
  4890  	{
  4891  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4892  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4893  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4894  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4895  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4896  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  4897  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4898  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  4899  		_jit_regs_begin(gen, &regs, 128);
  4900  		inst = (unsigned char *)(gen->ptr);
  4901  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  4902  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4903  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  4904  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4905  		{
  4906  			jit_long min_long = jit_min_long;
  4907  			unsigned char *patch, *patch2;
  4908  	#ifndef JIT_USE_SIGNALS
  4909  			x86_64_test_reg_reg_size(inst, reg3, reg3, 8);
  4910  			patch = inst;
  4911  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4912  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4913  			x86_patch(patch, inst);
  4914  	#endif
  4915  			x86_64_mov_reg_imm_size(inst, reg, min_long, 8);
  4916  			x86_64_cmp_reg_imm_size(inst, reg3, -1, 8);
  4917  			patch = inst;
  4918  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4919  			x86_64_cmp_reg_reg_size(inst, reg2, reg, 8);
  4920  			patch2 = inst;
  4921  			x86_branch8(inst, X86_CC_NE, 0, 0);
  4922  			inst = throw_builtin(inst, func, JIT_RESULT_ARITHMETIC);
  4923  			x86_patch(patch, inst);
  4924  			x86_patch(patch2, inst);
  4925  			x86_64_cqo(inst);
  4926  			x86_64_idiv_reg_size(inst, reg3, 8);
  4927  		}
  4928  		gen->ptr = (unsigned char *)inst;
  4929  		_jit_regs_commit(gen, &regs);
  4930  	}
  4931  }
  4932  break;
  4933  
  4934  case JIT_OP_LREM_UN:
  4935  {
  4936  	unsigned char * inst;
  4937  	_jit_regs_t regs;
  4938  	int reg, reg2, reg3, reg4;
  4939  	jit_nint imm_value;
  4940  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  4941  	{
  4942  		_jit_gen_check_space(gen, 128);
  4943  		inst = (unsigned char *)(gen->ptr);
  4944  		{
  4945  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  4946  		}
  4947  		gen->ptr = (unsigned char *)inst;
  4948  	}
  4949  	else if(insn->value2->is_constant && (insn->value2->address == 1))
  4950  	{
  4951  		_jit_regs_init(gen, &regs, 0);
  4952  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4953  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4954  		_jit_regs_begin(gen, &regs, 128);
  4955  		inst = (unsigned char *)(gen->ptr);
  4956  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4957  		imm_value = insn->value2->address;
  4958  		{
  4959  			x86_64_clear_reg(inst, reg);
  4960  		}
  4961  		gen->ptr = (unsigned char *)inst;
  4962  		_jit_regs_commit(gen, &regs);
  4963  	}
  4964  	else if(insn->value2->is_constant && ((((jit_nuint)insn->value2->address) & (((jit_nuint)insn->value2->address) - 1)) == 0))
  4965  	{
  4966  		_jit_regs_init(gen, &regs, 0);
  4967  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4968  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  4969  		_jit_regs_add_scratch(&regs, x86_64_reg);
  4970  		_jit_regs_begin(gen, &regs, 128);
  4971  		inst = (unsigned char *)(gen->ptr);
  4972  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  4973  		imm_value = insn->value2->address;
  4974  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  4975  		{
  4976  			/* x & (x - 1) is equal to zero if x is a power of 2  */
  4977  			if((imm_value >= jit_min_int) && (imm_value <= jit_max_int))
  4978  			{
  4979  				x86_64_and_reg_imm_size(inst, reg, imm_value - 1, 8);
  4980  			}
  4981  			else
  4982  			{
  4983  				jit_long temp = imm_value - 1;
  4984  	
  4985  				x86_64_mov_reg_imm_size(inst, reg2, temp, 8);
  4986  				x86_64_and_reg_reg_size(inst, reg, reg2, 8);
  4987  			}
  4988  		}
  4989  		gen->ptr = (unsigned char *)inst;
  4990  		_jit_regs_commit(gen, &regs);
  4991  	}
  4992  	else if(insn->value2->is_constant)
  4993  	{
  4994  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  4995  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  4996  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  4997  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  4998  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  4999  		_jit_regs_add_scratch(&regs, x86_64_dreg);
  5000  		_jit_regs_add_scratch(&regs, x86_64_reg);
  5001  		_jit_regs_set_scratch(gen, &regs, 1, _jit_regs_lookup("rdx"));
  5002  		_jit_regs_begin(gen, &regs, 128);
  5003  		inst = (unsigned char *)(gen->ptr);
  5004  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  5005  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5006  		imm_value = insn->value2->address;
  5007  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  5008  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
  5009  		{
  5010  			x86_64_mov_reg_imm_size(inst, reg3, imm_value, 8);
  5011  			x86_64_clear_reg(inst, X86_64_RDX);
  5012  			x86_64_div_reg_size(inst, reg3, 8);
  5013  		}
  5014  		gen->ptr = (unsigned char *)inst;
  5015  		_jit_regs_commit(gen, &regs);
  5016  	}
  5017  	else
  5018  	{
  5019  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  5020  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5021  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdx"), -1);
  5022  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_CLOBBER, x86_64_reg);
  5023  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rax"), -1);
  5024  		_jit_regs_init_value2(&regs, insn, 0, x86_64_dreg);
  5025  		_jit_regs_add_scratch(&regs, x86_64_reg);
  5026  		_jit_regs_set_scratch(gen, &regs, 0, _jit_regs_lookup("rdx"));
  5027  		_jit_regs_begin(gen, &regs, 128);
  5028  		inst = (unsigned char *)(gen->ptr);
  5029  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  5030  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5031  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5032  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
  5033  		{
  5034  	#ifndef JIT_USE_SIGNALS
  5035  			unsigned char *patch;
  5036  			x86_64_test_reg_reg_size(inst, reg3, reg3, 8);
  5037  			patch = inst;
  5038  			x86_branch8(inst, X86_CC_NE, 0, 0);
  5039  			inst = throw_builtin(inst, func, JIT_RESULT_DIVISION_BY_ZERO);
  5040  			x86_patch(patch, inst);
  5041  	#endif
  5042  			x86_64_clear_reg(inst, X86_64_RDX);
  5043  			x86_64_div_reg_size(inst, reg3, 8);
  5044  		}
  5045  		gen->ptr = (unsigned char *)inst;
  5046  		_jit_regs_commit(gen, &regs);
  5047  	}
  5048  }
  5049  break;
  5050  
  5051  case JIT_OP_FADD:
  5052  {
  5053  	unsigned char * inst;
  5054  	_jit_regs_t regs;
  5055  	int reg, reg2;
  5056  	jit_nint imm_value;
  5057  	jit_nint local_offset;
  5058  	if(insn->value2->is_constant)
  5059  	{
  5060  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5061  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5062  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5063  		_jit_regs_begin(gen, &regs, 32);
  5064  		inst = (unsigned char *)(gen->ptr);
  5065  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5066  		imm_value = insn->value2->address;
  5067  		{
  5068  			_jit_xmm1_reg_imm_size_float32(gen, &inst, XMM1_ADD, reg, (jit_float32 *)imm_value);
  5069  		}
  5070  		gen->ptr = (unsigned char *)inst;
  5071  		_jit_regs_commit(gen, &regs);
  5072  	}
  5073  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5074  	{
  5075  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5076  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5077  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5078  		_jit_gen_fix_value(insn->value2);
  5079  		_jit_regs_begin(gen, &regs, 32);
  5080  		inst = (unsigned char *)(gen->ptr);
  5081  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5082  		local_offset = insn->value2->frame_offset;
  5083  		{
  5084  			x86_64_addss_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5085  		}
  5086  		gen->ptr = (unsigned char *)inst;
  5087  		_jit_regs_commit(gen, &regs);
  5088  	}
  5089  	else
  5090  	{
  5091  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5092  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5093  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5094  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5095  		_jit_regs_begin(gen, &regs, 32);
  5096  		inst = (unsigned char *)(gen->ptr);
  5097  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5098  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5099  		{
  5100  			x86_64_addss_reg_reg(inst, reg, reg2);
  5101  		}
  5102  		gen->ptr = (unsigned char *)inst;
  5103  		_jit_regs_commit(gen, &regs);
  5104  	}
  5105  }
  5106  break;
  5107  
  5108  case JIT_OP_FSUB:
  5109  {
  5110  	unsigned char * inst;
  5111  	_jit_regs_t regs;
  5112  	int reg, reg2;
  5113  	jit_nint imm_value;
  5114  	jit_nint local_offset;
  5115  	if(insn->value2->is_constant)
  5116  	{
  5117  		_jit_regs_init(gen, &regs, 0);
  5118  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5119  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5120  		_jit_regs_begin(gen, &regs, 32);
  5121  		inst = (unsigned char *)(gen->ptr);
  5122  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5123  		imm_value = insn->value2->address;
  5124  		{
  5125  			_jit_xmm1_reg_imm_size_float32(gen, &inst, XMM1_SUB, reg, (jit_float32 *)imm_value);
  5126  		}
  5127  		gen->ptr = (unsigned char *)inst;
  5128  		_jit_regs_commit(gen, &regs);
  5129  	}
  5130  	else if(1)
  5131  	{
  5132  		_jit_regs_init(gen, &regs, 0);
  5133  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5134  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5135  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5136  		_jit_regs_begin(gen, &regs, 32);
  5137  		inst = (unsigned char *)(gen->ptr);
  5138  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5139  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5140  		{
  5141  			x86_64_subss_reg_reg(inst, reg, reg2);
  5142  		}
  5143  		gen->ptr = (unsigned char *)inst;
  5144  		_jit_regs_commit(gen, &regs);
  5145  	}
  5146  	else
  5147  	{
  5148  		_jit_regs_init(gen, &regs, 0);
  5149  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5150  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5151  		_jit_gen_fix_value(insn->value2);
  5152  		_jit_regs_begin(gen, &regs, 32);
  5153  		inst = (unsigned char *)(gen->ptr);
  5154  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5155  		local_offset = insn->value2->frame_offset;
  5156  		{
  5157  			x86_64_subss_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5158  		}
  5159  		gen->ptr = (unsigned char *)inst;
  5160  		_jit_regs_commit(gen, &regs);
  5161  	}
  5162  }
  5163  break;
  5164  
  5165  case JIT_OP_FMUL:
  5166  {
  5167  	unsigned char * inst;
  5168  	_jit_regs_t regs;
  5169  	int reg, reg2;
  5170  	jit_nint imm_value;
  5171  	jit_nint local_offset;
  5172  	if(insn->value2->is_constant)
  5173  	{
  5174  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5175  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5176  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5177  		_jit_regs_begin(gen, &regs, 32);
  5178  		inst = (unsigned char *)(gen->ptr);
  5179  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5180  		imm_value = insn->value2->address;
  5181  		{
  5182  			_jit_xmm1_reg_imm_size_float32(gen, &inst, XMM1_MUL, reg, (jit_float32 *)imm_value);
  5183  		}
  5184  		gen->ptr = (unsigned char *)inst;
  5185  		_jit_regs_commit(gen, &regs);
  5186  	}
  5187  	else if(1)
  5188  	{
  5189  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5190  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5191  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5192  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5193  		_jit_regs_begin(gen, &regs, 32);
  5194  		inst = (unsigned char *)(gen->ptr);
  5195  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5196  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5197  		{
  5198  			x86_64_mulss_reg_reg(inst, reg, reg2);
  5199  		}
  5200  		gen->ptr = (unsigned char *)inst;
  5201  		_jit_regs_commit(gen, &regs);
  5202  	}
  5203  	else
  5204  	{
  5205  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5206  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5207  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5208  		_jit_gen_fix_value(insn->value2);
  5209  		_jit_regs_begin(gen, &regs, 32);
  5210  		inst = (unsigned char *)(gen->ptr);
  5211  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5212  		local_offset = insn->value2->frame_offset;
  5213  		{
  5214  			x86_64_mulss_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5215  		}
  5216  		gen->ptr = (unsigned char *)inst;
  5217  		_jit_regs_commit(gen, &regs);
  5218  	}
  5219  }
  5220  break;
  5221  
  5222  case JIT_OP_FDIV:
  5223  {
  5224  	unsigned char * inst;
  5225  	_jit_regs_t regs;
  5226  	int reg, reg2;
  5227  	jit_nint imm_value;
  5228  	jit_nint local_offset;
  5229  	if(insn->value2->is_constant)
  5230  	{
  5231  		_jit_regs_init(gen, &regs, 0);
  5232  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5233  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5234  		_jit_regs_begin(gen, &regs, 32);
  5235  		inst = (unsigned char *)(gen->ptr);
  5236  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5237  		imm_value = insn->value2->address;
  5238  		{
  5239  			_jit_xmm1_reg_imm_size_float32(gen, &inst, XMM1_DIV, reg, (jit_float32 *)imm_value);
  5240  		}
  5241  		gen->ptr = (unsigned char *)inst;
  5242  		_jit_regs_commit(gen, &regs);
  5243  	}
  5244  	else if(1)
  5245  	{
  5246  		_jit_regs_init(gen, &regs, 0);
  5247  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5248  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5249  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5250  		_jit_regs_begin(gen, &regs, 32);
  5251  		inst = (unsigned char *)(gen->ptr);
  5252  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5253  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5254  		{
  5255  			x86_64_divss_reg_reg(inst, reg, reg2);
  5256  		}
  5257  		gen->ptr = (unsigned char *)inst;
  5258  		_jit_regs_commit(gen, &regs);
  5259  	}
  5260  	else
  5261  	{
  5262  		_jit_regs_init(gen, &regs, 0);
  5263  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5264  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5265  		_jit_gen_fix_value(insn->value2);
  5266  		_jit_regs_begin(gen, &regs, 32);
  5267  		inst = (unsigned char *)(gen->ptr);
  5268  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5269  		local_offset = insn->value2->frame_offset;
  5270  		{
  5271  			x86_64_divss_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5272  		}
  5273  		gen->ptr = (unsigned char *)inst;
  5274  		_jit_regs_commit(gen, &regs);
  5275  	}
  5276  }
  5277  break;
  5278  
  5279  case JIT_OP_FABS:
  5280  {
  5281  	unsigned char * inst;
  5282  	_jit_regs_t regs;
  5283  	int reg;
  5284  	{
  5285  		_jit_regs_init(gen, &regs, 0);
  5286  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5287  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5288  		_jit_regs_begin(gen, &regs, 32);
  5289  		inst = (unsigned char *)(gen->ptr);
  5290  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5291  		{
  5292  			/* Simply clear the sign */
  5293  			jit_uint values[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
  5294  	
  5295  			_jit_plops_reg_imm(gen, &inst, XMM_ANDP, reg, &(values[0]));
  5296  		}
  5297  		gen->ptr = (unsigned char *)inst;
  5298  		_jit_regs_commit(gen, &regs);
  5299  	}
  5300  }
  5301  break;
  5302  
  5303  case JIT_OP_FNEG:
  5304  {
  5305  	unsigned char * inst;
  5306  	_jit_regs_t regs;
  5307  	int reg;
  5308  	{
  5309  		_jit_regs_init(gen, &regs, 0);
  5310  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5311  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5312  		_jit_regs_begin(gen, &regs, 32);
  5313  		inst = (unsigned char *)(gen->ptr);
  5314  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5315  		{
  5316  			/* Simply toggle the sign */
  5317  			jit_uint values[4] = {0x80000000, 0x80000000, 0x80000000, 0x80000000};
  5318  	
  5319  			_jit_plops_reg_imm(gen, &inst, XMM_XORP, reg, &(values[0]));
  5320  		}
  5321  		gen->ptr = (unsigned char *)inst;
  5322  		_jit_regs_commit(gen, &regs);
  5323  	}
  5324  }
  5325  break;
  5326  
  5327  case JIT_OP_DADD:
  5328  {
  5329  	unsigned char * inst;
  5330  	_jit_regs_t regs;
  5331  	int reg, reg2;
  5332  	jit_nint imm_value;
  5333  	jit_nint local_offset;
  5334  	if(insn->value2->is_constant)
  5335  	{
  5336  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5337  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5338  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5339  		_jit_regs_begin(gen, &regs, 32);
  5340  		inst = (unsigned char *)(gen->ptr);
  5341  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5342  		imm_value = insn->value2->address;
  5343  		{
  5344  			_jit_xmm1_reg_imm_size_float64(gen, &inst, XMM1_ADD, reg, (jit_float64 *)imm_value);
  5345  		}
  5346  		gen->ptr = (unsigned char *)inst;
  5347  		_jit_regs_commit(gen, &regs);
  5348  	}
  5349  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5350  	{
  5351  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5352  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5353  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5354  		_jit_gen_fix_value(insn->value2);
  5355  		_jit_regs_begin(gen, &regs, 32);
  5356  		inst = (unsigned char *)(gen->ptr);
  5357  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5358  		local_offset = insn->value2->frame_offset;
  5359  		{
  5360  			x86_64_addsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5361  		}
  5362  		gen->ptr = (unsigned char *)inst;
  5363  		_jit_regs_commit(gen, &regs);
  5364  	}
  5365  	else
  5366  	{
  5367  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5368  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5369  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5370  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5371  		_jit_regs_begin(gen, &regs, 32);
  5372  		inst = (unsigned char *)(gen->ptr);
  5373  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5374  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5375  		{
  5376  			x86_64_addsd_reg_reg(inst, reg, reg2);
  5377  		}
  5378  		gen->ptr = (unsigned char *)inst;
  5379  		_jit_regs_commit(gen, &regs);
  5380  	}
  5381  }
  5382  break;
  5383  
  5384  case JIT_OP_DSUB:
  5385  {
  5386  	unsigned char * inst;
  5387  	_jit_regs_t regs;
  5388  	int reg, reg2;
  5389  	jit_nint imm_value;
  5390  	jit_nint local_offset;
  5391  	if(insn->value2->is_constant)
  5392  	{
  5393  		_jit_regs_init(gen, &regs, 0);
  5394  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5395  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5396  		_jit_regs_begin(gen, &regs, 32);
  5397  		inst = (unsigned char *)(gen->ptr);
  5398  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5399  		imm_value = insn->value2->address;
  5400  		{
  5401  			_jit_xmm1_reg_imm_size_float64(gen, &inst, XMM1_SUB, reg, (jit_float64 *)imm_value);
  5402  		}
  5403  		gen->ptr = (unsigned char *)inst;
  5404  		_jit_regs_commit(gen, &regs);
  5405  	}
  5406  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5407  	{
  5408  		_jit_regs_init(gen, &regs, 0);
  5409  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5410  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5411  		_jit_gen_fix_value(insn->value2);
  5412  		_jit_regs_begin(gen, &regs, 32);
  5413  		inst = (unsigned char *)(gen->ptr);
  5414  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5415  		local_offset = insn->value2->frame_offset;
  5416  		{
  5417  			x86_64_subsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5418  		}
  5419  		gen->ptr = (unsigned char *)inst;
  5420  		_jit_regs_commit(gen, &regs);
  5421  	}
  5422  	else
  5423  	{
  5424  		_jit_regs_init(gen, &regs, 0);
  5425  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5426  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5427  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5428  		_jit_regs_begin(gen, &regs, 32);
  5429  		inst = (unsigned char *)(gen->ptr);
  5430  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5431  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5432  		{
  5433  			x86_64_subsd_reg_reg(inst, reg, reg2);
  5434  		}
  5435  		gen->ptr = (unsigned char *)inst;
  5436  		_jit_regs_commit(gen, &regs);
  5437  	}
  5438  }
  5439  break;
  5440  
  5441  case JIT_OP_DMUL:
  5442  {
  5443  	unsigned char * inst;
  5444  	_jit_regs_t regs;
  5445  	int reg, reg2;
  5446  	jit_nint imm_value;
  5447  	jit_nint local_offset;
  5448  	if(insn->value2->is_constant)
  5449  	{
  5450  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5451  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5452  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5453  		_jit_regs_begin(gen, &regs, 32);
  5454  		inst = (unsigned char *)(gen->ptr);
  5455  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5456  		imm_value = insn->value2->address;
  5457  		{
  5458  			_jit_xmm1_reg_imm_size_float64(gen, &inst, XMM1_MUL, reg, (jit_float64 *)imm_value);
  5459  		}
  5460  		gen->ptr = (unsigned char *)inst;
  5461  		_jit_regs_commit(gen, &regs);
  5462  	}
  5463  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5464  	{
  5465  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5466  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5467  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5468  		_jit_gen_fix_value(insn->value2);
  5469  		_jit_regs_begin(gen, &regs, 32);
  5470  		inst = (unsigned char *)(gen->ptr);
  5471  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5472  		local_offset = insn->value2->frame_offset;
  5473  		{
  5474  			x86_64_mulsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5475  		}
  5476  		gen->ptr = (unsigned char *)inst;
  5477  		_jit_regs_commit(gen, &regs);
  5478  	}
  5479  	else
  5480  	{
  5481  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5482  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5483  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5484  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5485  		_jit_regs_begin(gen, &regs, 32);
  5486  		inst = (unsigned char *)(gen->ptr);
  5487  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5488  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5489  		{
  5490  			x86_64_mulsd_reg_reg(inst, reg, reg2);
  5491  		}
  5492  		gen->ptr = (unsigned char *)inst;
  5493  		_jit_regs_commit(gen, &regs);
  5494  	}
  5495  }
  5496  break;
  5497  
  5498  case JIT_OP_DDIV:
  5499  {
  5500  	unsigned char * inst;
  5501  	_jit_regs_t regs;
  5502  	int reg, reg2;
  5503  	jit_nint imm_value;
  5504  	jit_nint local_offset;
  5505  	if(insn->value2->is_constant)
  5506  	{
  5507  		_jit_regs_init(gen, &regs, 0);
  5508  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5509  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5510  		_jit_regs_begin(gen, &regs, 32);
  5511  		inst = (unsigned char *)(gen->ptr);
  5512  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5513  		imm_value = insn->value2->address;
  5514  		{
  5515  			_jit_xmm1_reg_imm_size_float64(gen, &inst, XMM1_DIV, reg, (jit_float64 *)imm_value);
  5516  		}
  5517  		gen->ptr = (unsigned char *)inst;
  5518  		_jit_regs_commit(gen, &regs);
  5519  	}
  5520  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5521  	{
  5522  		_jit_regs_init(gen, &regs, 0);
  5523  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5524  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5525  		_jit_gen_fix_value(insn->value2);
  5526  		_jit_regs_begin(gen, &regs, 32);
  5527  		inst = (unsigned char *)(gen->ptr);
  5528  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5529  		local_offset = insn->value2->frame_offset;
  5530  		{
  5531  			x86_64_divsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
  5532  		}
  5533  		gen->ptr = (unsigned char *)inst;
  5534  		_jit_regs_commit(gen, &regs);
  5535  	}
  5536  	else
  5537  	{
  5538  		_jit_regs_init(gen, &regs, 0);
  5539  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5540  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5541  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  5542  		_jit_regs_begin(gen, &regs, 32);
  5543  		inst = (unsigned char *)(gen->ptr);
  5544  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5545  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5546  		{
  5547  			x86_64_divsd_reg_reg(inst, reg, reg2);
  5548  		}
  5549  		gen->ptr = (unsigned char *)inst;
  5550  		_jit_regs_commit(gen, &regs);
  5551  	}
  5552  }
  5553  break;
  5554  
  5555  case JIT_OP_DABS:
  5556  {
  5557  	unsigned char * inst;
  5558  	_jit_regs_t regs;
  5559  	int reg;
  5560  	{
  5561  		_jit_regs_init(gen, &regs, 0);
  5562  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5563  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5564  		_jit_regs_begin(gen, &regs, 32);
  5565  		inst = (unsigned char *)(gen->ptr);
  5566  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5567  		{
  5568  			/* Simply clear the sign */
  5569  			jit_ulong values[2] = {0x7fffffffffffffff, 0x7fffffffffffffff};
  5570  	
  5571  			_jit_plopd_reg_imm(gen, &inst, XMM_ANDP, reg, &(values[0]));
  5572  		}
  5573  		gen->ptr = (unsigned char *)inst;
  5574  		_jit_regs_commit(gen, &regs);
  5575  	}
  5576  }
  5577  break;
  5578  
  5579  case JIT_OP_DNEG:
  5580  {
  5581  	unsigned char * inst;
  5582  	_jit_regs_t regs;
  5583  	int reg;
  5584  	{
  5585  		_jit_regs_init(gen, &regs, 0);
  5586  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
  5587  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  5588  		_jit_regs_begin(gen, &regs, 32);
  5589  		inst = (unsigned char *)(gen->ptr);
  5590  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5591  		{
  5592  			/* Simply toggle the sign */
  5593  			jit_ulong values[2] = {0x8000000000000000, 0x8000000000000000};
  5594  	
  5595  			_jit_plopd_reg_imm(gen, &inst, XMM_XORP, reg, &(values[0]));
  5596  		}
  5597  		gen->ptr = (unsigned char *)inst;
  5598  		_jit_regs_commit(gen, &regs);
  5599  	}
  5600  }
  5601  break;
  5602  
  5603  case JIT_OP_NFABS:
  5604  {
  5605  	unsigned char * inst;
  5606  	_jit_regs_t regs;
  5607  	int reg;
  5608  	{
  5609  		_jit_regs_init(gen, &regs, _JIT_REGS_STACK);
  5610  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
  5611  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  5612  		_jit_regs_begin(gen, &regs, 32);
  5613  		inst = (unsigned char *)(gen->ptr);
  5614  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5615  		{
  5616  			x86_64_fabs(inst);
  5617  		}
  5618  		gen->ptr = (unsigned char *)inst;
  5619  		_jit_regs_commit(gen, &regs);
  5620  	}
  5621  }
  5622  break;
  5623  
  5624  case JIT_OP_NFNEG:
  5625  {
  5626  	unsigned char * inst;
  5627  	_jit_regs_t regs;
  5628  	int reg;
  5629  	{
  5630  		_jit_regs_init(gen, &regs, _JIT_REGS_STACK);
  5631  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
  5632  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
  5633  		_jit_regs_begin(gen, &regs, 32);
  5634  		inst = (unsigned char *)(gen->ptr);
  5635  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5636  		{
  5637  			x86_64_fchs(inst);
  5638  		}
  5639  		gen->ptr = (unsigned char *)inst;
  5640  		_jit_regs_commit(gen, &regs);
  5641  	}
  5642  }
  5643  break;
  5644  
  5645  case JIT_OP_IAND:
  5646  {
  5647  	unsigned char * inst;
  5648  	_jit_regs_t regs;
  5649  	int reg, reg2;
  5650  	jit_nint imm_value;
  5651  	jit_nint local_offset;
  5652  	if(insn->value2->is_constant)
  5653  	{
  5654  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5655  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5656  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5657  		_jit_regs_begin(gen, &regs, 32);
  5658  		inst = (unsigned char *)(gen->ptr);
  5659  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5660  		imm_value = insn->value2->address;
  5661  		{
  5662  			x86_64_and_reg_imm_size(inst, reg, imm_value, 4);
  5663  		}
  5664  		gen->ptr = (unsigned char *)inst;
  5665  		_jit_regs_commit(gen, &regs);
  5666  	}
  5667  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5668  	{
  5669  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5670  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5671  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5672  		_jit_gen_fix_value(insn->value2);
  5673  		_jit_regs_begin(gen, &regs, 32);
  5674  		inst = (unsigned char *)(gen->ptr);
  5675  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5676  		local_offset = insn->value2->frame_offset;
  5677  		{
  5678  			x86_64_and_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  5679  		}
  5680  		gen->ptr = (unsigned char *)inst;
  5681  		_jit_regs_commit(gen, &regs);
  5682  	}
  5683  	else
  5684  	{
  5685  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5686  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5687  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5688  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5689  		_jit_regs_begin(gen, &regs, 32);
  5690  		inst = (unsigned char *)(gen->ptr);
  5691  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5692  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5693  		{
  5694  			x86_64_and_reg_reg_size(inst, reg, reg2, 4);
  5695  		}
  5696  		gen->ptr = (unsigned char *)inst;
  5697  		_jit_regs_commit(gen, &regs);
  5698  	}
  5699  }
  5700  break;
  5701  
  5702  case JIT_OP_IOR:
  5703  {
  5704  	unsigned char * inst;
  5705  	_jit_regs_t regs;
  5706  	int reg, reg2;
  5707  	jit_nint imm_value;
  5708  	jit_nint local_offset;
  5709  	if(insn->value2->is_constant)
  5710  	{
  5711  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5712  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5713  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5714  		_jit_regs_begin(gen, &regs, 32);
  5715  		inst = (unsigned char *)(gen->ptr);
  5716  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5717  		imm_value = insn->value2->address;
  5718  		{
  5719  			x86_64_or_reg_imm_size(inst, reg, imm_value, 4);
  5720  		}
  5721  		gen->ptr = (unsigned char *)inst;
  5722  		_jit_regs_commit(gen, &regs);
  5723  	}
  5724  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5725  	{
  5726  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5727  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5728  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5729  		_jit_gen_fix_value(insn->value2);
  5730  		_jit_regs_begin(gen, &regs, 32);
  5731  		inst = (unsigned char *)(gen->ptr);
  5732  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5733  		local_offset = insn->value2->frame_offset;
  5734  		{
  5735  			x86_64_or_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  5736  		}
  5737  		gen->ptr = (unsigned char *)inst;
  5738  		_jit_regs_commit(gen, &regs);
  5739  	}
  5740  	else
  5741  	{
  5742  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5743  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5744  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5745  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5746  		_jit_regs_begin(gen, &regs, 32);
  5747  		inst = (unsigned char *)(gen->ptr);
  5748  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5749  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5750  		{
  5751  			x86_64_or_reg_reg_size(inst, reg, reg2, 4);
  5752  		}
  5753  		gen->ptr = (unsigned char *)inst;
  5754  		_jit_regs_commit(gen, &regs);
  5755  	}
  5756  }
  5757  break;
  5758  
  5759  case JIT_OP_IXOR:
  5760  {
  5761  	unsigned char * inst;
  5762  	_jit_regs_t regs;
  5763  	int reg, reg2;
  5764  	jit_nint imm_value;
  5765  	jit_nint local_offset;
  5766  	if(insn->value2->is_constant)
  5767  	{
  5768  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5769  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5770  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5771  		_jit_regs_begin(gen, &regs, 32);
  5772  		inst = (unsigned char *)(gen->ptr);
  5773  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5774  		imm_value = insn->value2->address;
  5775  		{
  5776  			x86_64_xor_reg_imm_size(inst, reg, imm_value, 4);
  5777  		}
  5778  		gen->ptr = (unsigned char *)inst;
  5779  		_jit_regs_commit(gen, &regs);
  5780  	}
  5781  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5782  	{
  5783  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5784  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5785  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5786  		_jit_gen_fix_value(insn->value2);
  5787  		_jit_regs_begin(gen, &regs, 32);
  5788  		inst = (unsigned char *)(gen->ptr);
  5789  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5790  		local_offset = insn->value2->frame_offset;
  5791  		{
  5792  			x86_64_xor_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  5793  		}
  5794  		gen->ptr = (unsigned char *)inst;
  5795  		_jit_regs_commit(gen, &regs);
  5796  	}
  5797  	else
  5798  	{
  5799  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5800  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5801  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5802  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5803  		_jit_regs_begin(gen, &regs, 32);
  5804  		inst = (unsigned char *)(gen->ptr);
  5805  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5806  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5807  		{
  5808  			x86_64_xor_reg_reg_size(inst, reg, reg2, 4);
  5809  		}
  5810  		gen->ptr = (unsigned char *)inst;
  5811  		_jit_regs_commit(gen, &regs);
  5812  	}
  5813  }
  5814  break;
  5815  
  5816  case JIT_OP_INOT:
  5817  {
  5818  	unsigned char * inst;
  5819  	_jit_regs_t regs;
  5820  	int reg;
  5821  	{
  5822  		_jit_regs_init(gen, &regs, 0);
  5823  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5824  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5825  		_jit_regs_begin(gen, &regs, 32);
  5826  		inst = (unsigned char *)(gen->ptr);
  5827  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5828  		{
  5829  			x86_64_not_reg_size(inst, reg, 4);
  5830  		}
  5831  		gen->ptr = (unsigned char *)inst;
  5832  		_jit_regs_commit(gen, &regs);
  5833  	}
  5834  }
  5835  break;
  5836  
  5837  case JIT_OP_ISHL:
  5838  {
  5839  	unsigned char * inst;
  5840  	_jit_regs_t regs;
  5841  	int reg, reg2;
  5842  	jit_nint imm_value;
  5843  	if(insn->value2->is_constant)
  5844  	{
  5845  		_jit_regs_init(gen, &regs, 0);
  5846  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5847  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5848  		_jit_regs_begin(gen, &regs, 32);
  5849  		inst = (unsigned char *)(gen->ptr);
  5850  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5851  		imm_value = insn->value2->address;
  5852  		{
  5853  			x86_64_shl_reg_imm_size(inst, reg, (imm_value & 0x1F), 4);
  5854  		}
  5855  		gen->ptr = (unsigned char *)inst;
  5856  		_jit_regs_commit(gen, &regs);
  5857  	}
  5858  	else
  5859  	{
  5860  		_jit_regs_init(gen, &regs, 0);
  5861  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  5862  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  5863  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5864  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  5865  		_jit_regs_begin(gen, &regs, 32);
  5866  		inst = (unsigned char *)(gen->ptr);
  5867  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5868  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5869  		{
  5870  			x86_64_shl_reg_size(inst, reg, 4);
  5871  		}
  5872  		gen->ptr = (unsigned char *)inst;
  5873  		_jit_regs_commit(gen, &regs);
  5874  	}
  5875  }
  5876  break;
  5877  
  5878  case JIT_OP_ISHR:
  5879  {
  5880  	unsigned char * inst;
  5881  	_jit_regs_t regs;
  5882  	int reg, reg2;
  5883  	jit_nint imm_value;
  5884  	if(insn->value2->is_constant)
  5885  	{
  5886  		_jit_regs_init(gen, &regs, 0);
  5887  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5888  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5889  		_jit_regs_begin(gen, &regs, 32);
  5890  		inst = (unsigned char *)(gen->ptr);
  5891  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5892  		imm_value = insn->value2->address;
  5893  		{
  5894  			x86_64_sar_reg_imm_size(inst, reg, (imm_value & 0x1F), 4);
  5895  		}
  5896  		gen->ptr = (unsigned char *)inst;
  5897  		_jit_regs_commit(gen, &regs);
  5898  	}
  5899  	else
  5900  	{
  5901  		_jit_regs_init(gen, &regs, 0);
  5902  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  5903  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  5904  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5905  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  5906  		_jit_regs_begin(gen, &regs, 32);
  5907  		inst = (unsigned char *)(gen->ptr);
  5908  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5909  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5910  		{
  5911  			x86_64_sar_reg_size(inst, reg, 4);
  5912  		}
  5913  		gen->ptr = (unsigned char *)inst;
  5914  		_jit_regs_commit(gen, &regs);
  5915  	}
  5916  }
  5917  break;
  5918  
  5919  case JIT_OP_ISHR_UN:
  5920  {
  5921  	unsigned char * inst;
  5922  	_jit_regs_t regs;
  5923  	int reg, reg2;
  5924  	jit_nint imm_value;
  5925  	if(insn->value2->is_constant)
  5926  	{
  5927  		_jit_regs_init(gen, &regs, 0);
  5928  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5929  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5930  		_jit_regs_begin(gen, &regs, 32);
  5931  		inst = (unsigned char *)(gen->ptr);
  5932  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5933  		imm_value = insn->value2->address;
  5934  		{
  5935  			x86_64_shr_reg_imm_size(inst, reg, (imm_value & 0x1F), 4);
  5936  		}
  5937  		gen->ptr = (unsigned char *)inst;
  5938  		_jit_regs_commit(gen, &regs);
  5939  	}
  5940  	else
  5941  	{
  5942  		_jit_regs_init(gen, &regs, 0);
  5943  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  5944  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  5945  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  5946  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  5947  		_jit_regs_begin(gen, &regs, 32);
  5948  		inst = (unsigned char *)(gen->ptr);
  5949  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5950  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  5951  		{
  5952  			x86_64_shr_reg_size(inst, reg, 4);
  5953  		}
  5954  		gen->ptr = (unsigned char *)inst;
  5955  		_jit_regs_commit(gen, &regs);
  5956  	}
  5957  }
  5958  break;
  5959  
  5960  case JIT_OP_LAND:
  5961  {
  5962  	unsigned char * inst;
  5963  	_jit_regs_t regs;
  5964  	int reg, reg2;
  5965  	jit_nint imm_value;
  5966  	jit_nint local_offset;
  5967  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  5968  	{
  5969  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5970  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5971  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5972  		_jit_regs_begin(gen, &regs, 32);
  5973  		inst = (unsigned char *)(gen->ptr);
  5974  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5975  		imm_value = insn->value2->address;
  5976  		{
  5977  			x86_64_and_reg_imm_size(inst, reg, imm_value, 8);
  5978  		}
  5979  		gen->ptr = (unsigned char *)inst;
  5980  		_jit_regs_commit(gen, &regs);
  5981  	}
  5982  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  5983  	{
  5984  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  5985  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  5986  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  5987  		_jit_gen_fix_value(insn->value2);
  5988  		_jit_regs_begin(gen, &regs, 32);
  5989  		inst = (unsigned char *)(gen->ptr);
  5990  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  5991  		local_offset = insn->value2->frame_offset;
  5992  		{
  5993  			x86_64_and_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  5994  		}
  5995  		gen->ptr = (unsigned char *)inst;
  5996  		_jit_regs_commit(gen, &regs);
  5997  	}
  5998  	else
  5999  	{
  6000  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6001  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6002  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6003  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6004  		_jit_regs_begin(gen, &regs, 32);
  6005  		inst = (unsigned char *)(gen->ptr);
  6006  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6007  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6008  		{
  6009  			x86_64_and_reg_reg_size(inst, reg, reg2, 8);
  6010  		}
  6011  		gen->ptr = (unsigned char *)inst;
  6012  		_jit_regs_commit(gen, &regs);
  6013  	}
  6014  }
  6015  break;
  6016  
  6017  case JIT_OP_LOR:
  6018  {
  6019  	unsigned char * inst;
  6020  	_jit_regs_t regs;
  6021  	int reg, reg2;
  6022  	jit_nint imm_value;
  6023  	jit_nint local_offset;
  6024  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  6025  	{
  6026  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6027  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6028  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6029  		_jit_regs_begin(gen, &regs, 32);
  6030  		inst = (unsigned char *)(gen->ptr);
  6031  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6032  		imm_value = insn->value2->address;
  6033  		{
  6034  			x86_64_or_reg_imm_size(inst, reg, imm_value, 8);
  6035  		}
  6036  		gen->ptr = (unsigned char *)inst;
  6037  		_jit_regs_commit(gen, &regs);
  6038  	}
  6039  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6040  	{
  6041  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6042  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6043  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6044  		_jit_gen_fix_value(insn->value2);
  6045  		_jit_regs_begin(gen, &regs, 32);
  6046  		inst = (unsigned char *)(gen->ptr);
  6047  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6048  		local_offset = insn->value2->frame_offset;
  6049  		{
  6050  			x86_64_or_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  6051  		}
  6052  		gen->ptr = (unsigned char *)inst;
  6053  		_jit_regs_commit(gen, &regs);
  6054  	}
  6055  	else
  6056  	{
  6057  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6058  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6059  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6060  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6061  		_jit_regs_begin(gen, &regs, 32);
  6062  		inst = (unsigned char *)(gen->ptr);
  6063  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6064  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6065  		{
  6066  			x86_64_or_reg_reg_size(inst, reg, reg2, 8);
  6067  		}
  6068  		gen->ptr = (unsigned char *)inst;
  6069  		_jit_regs_commit(gen, &regs);
  6070  	}
  6071  }
  6072  break;
  6073  
  6074  case JIT_OP_LXOR:
  6075  {
  6076  	unsigned char * inst;
  6077  	_jit_regs_t regs;
  6078  	int reg, reg2;
  6079  	jit_nint imm_value;
  6080  	jit_nint local_offset;
  6081  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  6082  	{
  6083  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6084  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6085  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6086  		_jit_regs_begin(gen, &regs, 32);
  6087  		inst = (unsigned char *)(gen->ptr);
  6088  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6089  		imm_value = insn->value2->address;
  6090  		{
  6091  			x86_64_xor_reg_imm_size(inst, reg, imm_value, 8);
  6092  		}
  6093  		gen->ptr = (unsigned char *)inst;
  6094  		_jit_regs_commit(gen, &regs);
  6095  	}
  6096  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6097  	{
  6098  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6099  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6100  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6101  		_jit_gen_fix_value(insn->value2);
  6102  		_jit_regs_begin(gen, &regs, 32);
  6103  		inst = (unsigned char *)(gen->ptr);
  6104  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6105  		local_offset = insn->value2->frame_offset;
  6106  		{
  6107  			x86_64_xor_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  6108  		}
  6109  		gen->ptr = (unsigned char *)inst;
  6110  		_jit_regs_commit(gen, &regs);
  6111  	}
  6112  	else
  6113  	{
  6114  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
  6115  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6116  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6117  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6118  		_jit_regs_begin(gen, &regs, 32);
  6119  		inst = (unsigned char *)(gen->ptr);
  6120  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6121  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6122  		{
  6123  			x86_64_xor_reg_reg_size(inst, reg, reg2, 8);
  6124  		}
  6125  		gen->ptr = (unsigned char *)inst;
  6126  		_jit_regs_commit(gen, &regs);
  6127  	}
  6128  }
  6129  break;
  6130  
  6131  case JIT_OP_LNOT:
  6132  {
  6133  	unsigned char * inst;
  6134  	_jit_regs_t regs;
  6135  	int reg;
  6136  	{
  6137  		_jit_regs_init(gen, &regs, 0);
  6138  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6139  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6140  		_jit_regs_begin(gen, &regs, 32);
  6141  		inst = (unsigned char *)(gen->ptr);
  6142  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6143  		{
  6144  			x86_64_not_reg_size(inst, reg, 8);
  6145  		}
  6146  		gen->ptr = (unsigned char *)inst;
  6147  		_jit_regs_commit(gen, &regs);
  6148  	}
  6149  }
  6150  break;
  6151  
  6152  case JIT_OP_LSHL:
  6153  {
  6154  	unsigned char * inst;
  6155  	_jit_regs_t regs;
  6156  	int reg, reg2;
  6157  	jit_nint imm_value;
  6158  	if(insn->value2->is_constant)
  6159  	{
  6160  		_jit_regs_init(gen, &regs, 0);
  6161  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6162  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6163  		_jit_regs_begin(gen, &regs, 32);
  6164  		inst = (unsigned char *)(gen->ptr);
  6165  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6166  		imm_value = insn->value2->address;
  6167  		{
  6168  			x86_64_shl_reg_imm_size(inst, reg, (imm_value & 0x3F), 8);
  6169  		}
  6170  		gen->ptr = (unsigned char *)inst;
  6171  		_jit_regs_commit(gen, &regs);
  6172  	}
  6173  	else
  6174  	{
  6175  		_jit_regs_init(gen, &regs, 0);
  6176  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  6177  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  6178  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6179  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  6180  		_jit_regs_begin(gen, &regs, 32);
  6181  		inst = (unsigned char *)(gen->ptr);
  6182  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6183  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6184  		{
  6185  			x86_64_shl_reg_size(inst, reg, 8);
  6186  		}
  6187  		gen->ptr = (unsigned char *)inst;
  6188  		_jit_regs_commit(gen, &regs);
  6189  	}
  6190  }
  6191  break;
  6192  
  6193  case JIT_OP_LSHR:
  6194  {
  6195  	unsigned char * inst;
  6196  	_jit_regs_t regs;
  6197  	int reg, reg2;
  6198  	jit_nint imm_value;
  6199  	if(insn->value2->is_constant)
  6200  	{
  6201  		_jit_regs_init(gen, &regs, 0);
  6202  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6203  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6204  		_jit_regs_begin(gen, &regs, 32);
  6205  		inst = (unsigned char *)(gen->ptr);
  6206  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6207  		imm_value = insn->value2->address;
  6208  		{
  6209  			x86_64_sar_reg_imm_size(inst, reg, (imm_value & 0x3F), 8);
  6210  		}
  6211  		gen->ptr = (unsigned char *)inst;
  6212  		_jit_regs_commit(gen, &regs);
  6213  	}
  6214  	else
  6215  	{
  6216  		_jit_regs_init(gen, &regs, 0);
  6217  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  6218  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  6219  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6220  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  6221  		_jit_regs_begin(gen, &regs, 32);
  6222  		inst = (unsigned char *)(gen->ptr);
  6223  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6224  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6225  		{
  6226  			x86_64_sar_reg_size(inst, reg, 8);
  6227  		}
  6228  		gen->ptr = (unsigned char *)inst;
  6229  		_jit_regs_commit(gen, &regs);
  6230  	}
  6231  }
  6232  break;
  6233  
  6234  case JIT_OP_LSHR_UN:
  6235  {
  6236  	unsigned char * inst;
  6237  	_jit_regs_t regs;
  6238  	int reg, reg2;
  6239  	jit_nint imm_value;
  6240  	if(insn->value2->is_constant)
  6241  	{
  6242  		_jit_regs_init(gen, &regs, 0);
  6243  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  6244  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6245  		_jit_regs_begin(gen, &regs, 32);
  6246  		inst = (unsigned char *)(gen->ptr);
  6247  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6248  		imm_value = insn->value2->address;
  6249  		{
  6250  			x86_64_shr_reg_imm_size(inst, reg, (imm_value & 0x3F), 8);
  6251  		}
  6252  		gen->ptr = (unsigned char *)inst;
  6253  		_jit_regs_commit(gen, &regs);
  6254  	}
  6255  	else
  6256  	{
  6257  		_jit_regs_init(gen, &regs, 0);
  6258  		_jit_regs_init_dest(&regs, insn, 0, x86_64_sreg);
  6259  		_jit_regs_init_value1(&regs, insn, 0, x86_64_sreg);
  6260  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6261  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rcx"), -1);
  6262  		_jit_regs_begin(gen, &regs, 32);
  6263  		inst = (unsigned char *)(gen->ptr);
  6264  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6265  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6266  		{
  6267  			x86_64_shr_reg_size(inst, reg, 8);
  6268  		}
  6269  		gen->ptr = (unsigned char *)inst;
  6270  		_jit_regs_commit(gen, &regs);
  6271  	}
  6272  }
  6273  break;
  6274  
  6275  case JIT_OP_BR:
  6276  {
  6277  	unsigned char * inst;
  6278  	{
  6279  		_jit_regs_spill_all(gen);
  6280  		_jit_gen_check_space(gen, 32);
  6281  		inst = (unsigned char *)(gen->ptr);
  6282  		{
  6283  			inst = output_branch(func, inst, 0xEB /* jmp */, insn);
  6284  		}
  6285  		gen->ptr = (unsigned char *)inst;
  6286  	}
  6287  }
  6288  break;
  6289  
  6290  case JIT_OP_BR_IFALSE:
  6291  {
  6292  	unsigned char * inst;
  6293  	_jit_regs_t regs;
  6294  	int reg;
  6295  	{
  6296  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6297  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6298  		_jit_regs_clobber_all(gen, &regs);
  6299  		_jit_regs_begin(gen, &regs, 32);
  6300  		inst = (unsigned char *)(gen->ptr);
  6301  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6302  		{
  6303  			x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6304  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  6305  		}
  6306  		gen->ptr = (unsigned char *)inst;
  6307  		_jit_regs_commit(gen, &regs);
  6308  	}
  6309  }
  6310  break;
  6311  
  6312  case JIT_OP_BR_ITRUE:
  6313  {
  6314  	unsigned char * inst;
  6315  	_jit_regs_t regs;
  6316  	int reg;
  6317  	{
  6318  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6319  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6320  		_jit_regs_clobber_all(gen, &regs);
  6321  		_jit_regs_begin(gen, &regs, 32);
  6322  		inst = (unsigned char *)(gen->ptr);
  6323  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6324  		{
  6325  			x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6326  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  6327  		}
  6328  		gen->ptr = (unsigned char *)inst;
  6329  		_jit_regs_commit(gen, &regs);
  6330  	}
  6331  }
  6332  break;
  6333  
  6334  case JIT_OP_BR_IEQ:
  6335  {
  6336  	unsigned char * inst;
  6337  	_jit_regs_t regs;
  6338  	int reg, reg2;
  6339  	jit_nint imm_value;
  6340  	jit_nint local_offset;
  6341  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  6342  	{
  6343  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6344  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6345  		_jit_regs_clobber_all(gen, &regs);
  6346  		_jit_regs_begin(gen, &regs, 32);
  6347  		inst = (unsigned char *)(gen->ptr);
  6348  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6349  		{
  6350  			x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6351  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  6352  		}
  6353  		gen->ptr = (unsigned char *)inst;
  6354  		_jit_regs_commit(gen, &regs);
  6355  	}
  6356  	else if(insn->value2->is_constant)
  6357  	{
  6358  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6359  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6360  		_jit_regs_clobber_all(gen, &regs);
  6361  		_jit_regs_begin(gen, &regs, 32);
  6362  		inst = (unsigned char *)(gen->ptr);
  6363  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6364  		imm_value = insn->value2->address;
  6365  		{
  6366  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6367  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  6368  		}
  6369  		gen->ptr = (unsigned char *)inst;
  6370  		_jit_regs_commit(gen, &regs);
  6371  	}
  6372  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6373  	{
  6374  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6375  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6376  		_jit_gen_fix_value(insn->value2);
  6377  		_jit_regs_clobber_all(gen, &regs);
  6378  		_jit_regs_begin(gen, &regs, 32);
  6379  		inst = (unsigned char *)(gen->ptr);
  6380  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6381  		local_offset = insn->value2->frame_offset;
  6382  		{
  6383  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6384  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  6385  		}
  6386  		gen->ptr = (unsigned char *)inst;
  6387  		_jit_regs_commit(gen, &regs);
  6388  	}
  6389  	else
  6390  	{
  6391  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6392  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6393  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6394  		_jit_regs_clobber_all(gen, &regs);
  6395  		_jit_regs_begin(gen, &regs, 32);
  6396  		inst = (unsigned char *)(gen->ptr);
  6397  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6398  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6399  		{
  6400  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6401  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  6402  		}
  6403  		gen->ptr = (unsigned char *)inst;
  6404  		_jit_regs_commit(gen, &regs);
  6405  	}
  6406  }
  6407  break;
  6408  
  6409  case JIT_OP_BR_INE:
  6410  {
  6411  	unsigned char * inst;
  6412  	_jit_regs_t regs;
  6413  	int reg, reg2;
  6414  	jit_nint imm_value;
  6415  	jit_nint local_offset;
  6416  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  6417  	{
  6418  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6419  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6420  		_jit_regs_clobber_all(gen, &regs);
  6421  		_jit_regs_begin(gen, &regs, 32);
  6422  		inst = (unsigned char *)(gen->ptr);
  6423  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6424  		{
  6425  			x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6426  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  6427  		}
  6428  		gen->ptr = (unsigned char *)inst;
  6429  		_jit_regs_commit(gen, &regs);
  6430  	}
  6431  	else if(insn->value2->is_constant)
  6432  	{
  6433  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6434  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6435  		_jit_regs_clobber_all(gen, &regs);
  6436  		_jit_regs_begin(gen, &regs, 32);
  6437  		inst = (unsigned char *)(gen->ptr);
  6438  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6439  		imm_value = insn->value2->address;
  6440  		{
  6441  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6442  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  6443  		}
  6444  		gen->ptr = (unsigned char *)inst;
  6445  		_jit_regs_commit(gen, &regs);
  6446  	}
  6447  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6448  	{
  6449  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6450  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6451  		_jit_gen_fix_value(insn->value2);
  6452  		_jit_regs_clobber_all(gen, &regs);
  6453  		_jit_regs_begin(gen, &regs, 32);
  6454  		inst = (unsigned char *)(gen->ptr);
  6455  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6456  		local_offset = insn->value2->frame_offset;
  6457  		{
  6458  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6459  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  6460  		}
  6461  		gen->ptr = (unsigned char *)inst;
  6462  		_jit_regs_commit(gen, &regs);
  6463  	}
  6464  	else
  6465  	{
  6466  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  6467  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6468  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6469  		_jit_regs_clobber_all(gen, &regs);
  6470  		_jit_regs_begin(gen, &regs, 32);
  6471  		inst = (unsigned char *)(gen->ptr);
  6472  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6473  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6474  		{
  6475  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6476  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  6477  		}
  6478  		gen->ptr = (unsigned char *)inst;
  6479  		_jit_regs_commit(gen, &regs);
  6480  	}
  6481  }
  6482  break;
  6483  
  6484  case JIT_OP_BR_ILT:
  6485  {
  6486  	unsigned char * inst;
  6487  	_jit_regs_t regs;
  6488  	int reg, reg2;
  6489  	jit_nint imm_value;
  6490  	jit_nint local_offset;
  6491  	if(insn->value2->is_constant)
  6492  	{
  6493  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6494  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6495  		_jit_regs_clobber_all(gen, &regs);
  6496  		_jit_regs_begin(gen, &regs, 32);
  6497  		inst = (unsigned char *)(gen->ptr);
  6498  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6499  		imm_value = insn->value2->address;
  6500  		{
  6501  			if(imm_value == 0)
  6502  			{
  6503  				x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6504  			}
  6505  			else
  6506  			{
  6507  				x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6508  			}
  6509  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  6510  		}
  6511  		gen->ptr = (unsigned char *)inst;
  6512  		_jit_regs_commit(gen, &regs);
  6513  	}
  6514  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6515  	{
  6516  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6517  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6518  		_jit_gen_fix_value(insn->value2);
  6519  		_jit_regs_clobber_all(gen, &regs);
  6520  		_jit_regs_begin(gen, &regs, 32);
  6521  		inst = (unsigned char *)(gen->ptr);
  6522  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6523  		local_offset = insn->value2->frame_offset;
  6524  		{
  6525  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6526  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  6527  		}
  6528  		gen->ptr = (unsigned char *)inst;
  6529  		_jit_regs_commit(gen, &regs);
  6530  	}
  6531  	else
  6532  	{
  6533  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6534  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6535  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6536  		_jit_regs_clobber_all(gen, &regs);
  6537  		_jit_regs_begin(gen, &regs, 32);
  6538  		inst = (unsigned char *)(gen->ptr);
  6539  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6540  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6541  		{
  6542  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6543  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  6544  		}
  6545  		gen->ptr = (unsigned char *)inst;
  6546  		_jit_regs_commit(gen, &regs);
  6547  	}
  6548  }
  6549  break;
  6550  
  6551  case JIT_OP_BR_ILT_UN:
  6552  {
  6553  	unsigned char * inst;
  6554  	_jit_regs_t regs;
  6555  	int reg, reg2;
  6556  	jit_nint imm_value;
  6557  	jit_nint local_offset;
  6558  	if(insn->value2->is_constant)
  6559  	{
  6560  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6561  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6562  		_jit_regs_clobber_all(gen, &regs);
  6563  		_jit_regs_begin(gen, &regs, 32);
  6564  		inst = (unsigned char *)(gen->ptr);
  6565  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6566  		imm_value = insn->value2->address;
  6567  		{
  6568  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6569  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  6570  		}
  6571  		gen->ptr = (unsigned char *)inst;
  6572  		_jit_regs_commit(gen, &regs);
  6573  	}
  6574  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6575  	{
  6576  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6577  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6578  		_jit_gen_fix_value(insn->value2);
  6579  		_jit_regs_clobber_all(gen, &regs);
  6580  		_jit_regs_begin(gen, &regs, 32);
  6581  		inst = (unsigned char *)(gen->ptr);
  6582  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6583  		local_offset = insn->value2->frame_offset;
  6584  		{
  6585  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6586  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  6587  		}
  6588  		gen->ptr = (unsigned char *)inst;
  6589  		_jit_regs_commit(gen, &regs);
  6590  	}
  6591  	else
  6592  	{
  6593  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6594  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6595  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6596  		_jit_regs_clobber_all(gen, &regs);
  6597  		_jit_regs_begin(gen, &regs, 32);
  6598  		inst = (unsigned char *)(gen->ptr);
  6599  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6600  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6601  		{
  6602  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6603  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  6604  		}
  6605  		gen->ptr = (unsigned char *)inst;
  6606  		_jit_regs_commit(gen, &regs);
  6607  	}
  6608  }
  6609  break;
  6610  
  6611  case JIT_OP_BR_ILE:
  6612  {
  6613  	unsigned char * inst;
  6614  	_jit_regs_t regs;
  6615  	int reg, reg2;
  6616  	jit_nint imm_value;
  6617  	jit_nint local_offset;
  6618  	if(insn->value2->is_constant)
  6619  	{
  6620  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6621  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6622  		_jit_regs_clobber_all(gen, &regs);
  6623  		_jit_regs_begin(gen, &regs, 32);
  6624  		inst = (unsigned char *)(gen->ptr);
  6625  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6626  		imm_value = insn->value2->address;
  6627  		{
  6628  			if(imm_value == 0)
  6629  			{
  6630  				x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6631  			}
  6632  			else
  6633  			{
  6634  				x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6635  			}
  6636  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  6637  		}
  6638  		gen->ptr = (unsigned char *)inst;
  6639  		_jit_regs_commit(gen, &regs);
  6640  	}
  6641  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6642  	{
  6643  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6644  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6645  		_jit_gen_fix_value(insn->value2);
  6646  		_jit_regs_clobber_all(gen, &regs);
  6647  		_jit_regs_begin(gen, &regs, 32);
  6648  		inst = (unsigned char *)(gen->ptr);
  6649  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6650  		local_offset = insn->value2->frame_offset;
  6651  		{
  6652  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6653  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  6654  		}
  6655  		gen->ptr = (unsigned char *)inst;
  6656  		_jit_regs_commit(gen, &regs);
  6657  	}
  6658  	else
  6659  	{
  6660  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6661  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6662  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6663  		_jit_regs_clobber_all(gen, &regs);
  6664  		_jit_regs_begin(gen, &regs, 32);
  6665  		inst = (unsigned char *)(gen->ptr);
  6666  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6667  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6668  		{
  6669  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6670  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  6671  		}
  6672  		gen->ptr = (unsigned char *)inst;
  6673  		_jit_regs_commit(gen, &regs);
  6674  	}
  6675  }
  6676  break;
  6677  
  6678  case JIT_OP_BR_ILE_UN:
  6679  {
  6680  	unsigned char * inst;
  6681  	_jit_regs_t regs;
  6682  	int reg, reg2;
  6683  	jit_nint imm_value;
  6684  	jit_nint local_offset;
  6685  	if(insn->value2->is_constant)
  6686  	{
  6687  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6688  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6689  		_jit_regs_clobber_all(gen, &regs);
  6690  		_jit_regs_begin(gen, &regs, 32);
  6691  		inst = (unsigned char *)(gen->ptr);
  6692  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6693  		imm_value = insn->value2->address;
  6694  		{
  6695  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6696  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  6697  		}
  6698  		gen->ptr = (unsigned char *)inst;
  6699  		_jit_regs_commit(gen, &regs);
  6700  	}
  6701  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6702  	{
  6703  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6704  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6705  		_jit_gen_fix_value(insn->value2);
  6706  		_jit_regs_clobber_all(gen, &regs);
  6707  		_jit_regs_begin(gen, &regs, 32);
  6708  		inst = (unsigned char *)(gen->ptr);
  6709  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6710  		local_offset = insn->value2->frame_offset;
  6711  		{
  6712  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6713  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  6714  		}
  6715  		gen->ptr = (unsigned char *)inst;
  6716  		_jit_regs_commit(gen, &regs);
  6717  	}
  6718  	else
  6719  	{
  6720  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6721  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6722  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6723  		_jit_regs_clobber_all(gen, &regs);
  6724  		_jit_regs_begin(gen, &regs, 32);
  6725  		inst = (unsigned char *)(gen->ptr);
  6726  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6727  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6728  		{
  6729  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6730  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  6731  		}
  6732  		gen->ptr = (unsigned char *)inst;
  6733  		_jit_regs_commit(gen, &regs);
  6734  	}
  6735  }
  6736  break;
  6737  
  6738  case JIT_OP_BR_IGT:
  6739  {
  6740  	unsigned char * inst;
  6741  	_jit_regs_t regs;
  6742  	int reg, reg2;
  6743  	jit_nint imm_value;
  6744  	jit_nint local_offset;
  6745  	if(insn->value2->is_constant)
  6746  	{
  6747  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6748  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6749  		_jit_regs_clobber_all(gen, &regs);
  6750  		_jit_regs_begin(gen, &regs, 32);
  6751  		inst = (unsigned char *)(gen->ptr);
  6752  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6753  		imm_value = insn->value2->address;
  6754  		{
  6755  			if(imm_value == 0)
  6756  			{
  6757  				x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6758  			}
  6759  			else
  6760  			{
  6761  				x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6762  			}
  6763  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  6764  		}
  6765  		gen->ptr = (unsigned char *)inst;
  6766  		_jit_regs_commit(gen, &regs);
  6767  	}
  6768  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6769  	{
  6770  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6771  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6772  		_jit_gen_fix_value(insn->value2);
  6773  		_jit_regs_clobber_all(gen, &regs);
  6774  		_jit_regs_begin(gen, &regs, 32);
  6775  		inst = (unsigned char *)(gen->ptr);
  6776  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6777  		local_offset = insn->value2->frame_offset;
  6778  		{
  6779  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6780  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  6781  		}
  6782  		gen->ptr = (unsigned char *)inst;
  6783  		_jit_regs_commit(gen, &regs);
  6784  	}
  6785  	else
  6786  	{
  6787  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6788  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6789  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6790  		_jit_regs_clobber_all(gen, &regs);
  6791  		_jit_regs_begin(gen, &regs, 32);
  6792  		inst = (unsigned char *)(gen->ptr);
  6793  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6794  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6795  		{
  6796  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6797  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  6798  		}
  6799  		gen->ptr = (unsigned char *)inst;
  6800  		_jit_regs_commit(gen, &regs);
  6801  	}
  6802  }
  6803  break;
  6804  
  6805  case JIT_OP_BR_IGT_UN:
  6806  {
  6807  	unsigned char * inst;
  6808  	_jit_regs_t regs;
  6809  	int reg, reg2;
  6810  	jit_nint imm_value;
  6811  	jit_nint local_offset;
  6812  	if(insn->value2->is_constant)
  6813  	{
  6814  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6815  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6816  		_jit_regs_clobber_all(gen, &regs);
  6817  		_jit_regs_begin(gen, &regs, 32);
  6818  		inst = (unsigned char *)(gen->ptr);
  6819  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6820  		imm_value = insn->value2->address;
  6821  		{
  6822  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6823  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  6824  		}
  6825  		gen->ptr = (unsigned char *)inst;
  6826  		_jit_regs_commit(gen, &regs);
  6827  	}
  6828  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6829  	{
  6830  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6831  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6832  		_jit_gen_fix_value(insn->value2);
  6833  		_jit_regs_clobber_all(gen, &regs);
  6834  		_jit_regs_begin(gen, &regs, 32);
  6835  		inst = (unsigned char *)(gen->ptr);
  6836  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6837  		local_offset = insn->value2->frame_offset;
  6838  		{
  6839  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6840  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  6841  		}
  6842  		gen->ptr = (unsigned char *)inst;
  6843  		_jit_regs_commit(gen, &regs);
  6844  	}
  6845  	else
  6846  	{
  6847  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6848  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6849  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6850  		_jit_regs_clobber_all(gen, &regs);
  6851  		_jit_regs_begin(gen, &regs, 32);
  6852  		inst = (unsigned char *)(gen->ptr);
  6853  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6854  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6855  		{
  6856  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6857  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  6858  		}
  6859  		gen->ptr = (unsigned char *)inst;
  6860  		_jit_regs_commit(gen, &regs);
  6861  	}
  6862  }
  6863  break;
  6864  
  6865  case JIT_OP_BR_IGE:
  6866  {
  6867  	unsigned char * inst;
  6868  	_jit_regs_t regs;
  6869  	int reg, reg2;
  6870  	jit_nint imm_value;
  6871  	jit_nint local_offset;
  6872  	if(insn->value2->is_constant)
  6873  	{
  6874  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6875  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6876  		_jit_regs_clobber_all(gen, &regs);
  6877  		_jit_regs_begin(gen, &regs, 32);
  6878  		inst = (unsigned char *)(gen->ptr);
  6879  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6880  		imm_value = insn->value2->address;
  6881  		{
  6882  			if(imm_value == 0)
  6883  			{
  6884  				x86_64_test_reg_reg_size(inst, reg, reg, 4);
  6885  			}
  6886  			else
  6887  			{
  6888  				x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6889  			}
  6890  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  6891  		}
  6892  		gen->ptr = (unsigned char *)inst;
  6893  		_jit_regs_commit(gen, &regs);
  6894  	}
  6895  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6896  	{
  6897  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6898  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6899  		_jit_gen_fix_value(insn->value2);
  6900  		_jit_regs_clobber_all(gen, &regs);
  6901  		_jit_regs_begin(gen, &regs, 32);
  6902  		inst = (unsigned char *)(gen->ptr);
  6903  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6904  		local_offset = insn->value2->frame_offset;
  6905  		{
  6906  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6907  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  6908  		}
  6909  		gen->ptr = (unsigned char *)inst;
  6910  		_jit_regs_commit(gen, &regs);
  6911  	}
  6912  	else
  6913  	{
  6914  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6915  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6916  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6917  		_jit_regs_clobber_all(gen, &regs);
  6918  		_jit_regs_begin(gen, &regs, 32);
  6919  		inst = (unsigned char *)(gen->ptr);
  6920  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6921  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6922  		{
  6923  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6924  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  6925  		}
  6926  		gen->ptr = (unsigned char *)inst;
  6927  		_jit_regs_commit(gen, &regs);
  6928  	}
  6929  }
  6930  break;
  6931  
  6932  case JIT_OP_BR_IGE_UN:
  6933  {
  6934  	unsigned char * inst;
  6935  	_jit_regs_t regs;
  6936  	int reg, reg2;
  6937  	jit_nint imm_value;
  6938  	jit_nint local_offset;
  6939  	if(insn->value2->is_constant)
  6940  	{
  6941  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6942  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6943  		_jit_regs_clobber_all(gen, &regs);
  6944  		_jit_regs_begin(gen, &regs, 32);
  6945  		inst = (unsigned char *)(gen->ptr);
  6946  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6947  		imm_value = insn->value2->address;
  6948  		{
  6949  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 4);
  6950  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  6951  		}
  6952  		gen->ptr = (unsigned char *)inst;
  6953  		_jit_regs_commit(gen, &regs);
  6954  	}
  6955  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  6956  	{
  6957  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6958  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6959  		_jit_gen_fix_value(insn->value2);
  6960  		_jit_regs_clobber_all(gen, &regs);
  6961  		_jit_regs_begin(gen, &regs, 32);
  6962  		inst = (unsigned char *)(gen->ptr);
  6963  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6964  		local_offset = insn->value2->frame_offset;
  6965  		{
  6966  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 4);
  6967  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  6968  		}
  6969  		gen->ptr = (unsigned char *)inst;
  6970  		_jit_regs_commit(gen, &regs);
  6971  	}
  6972  	else
  6973  	{
  6974  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6975  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  6976  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  6977  		_jit_regs_clobber_all(gen, &regs);
  6978  		_jit_regs_begin(gen, &regs, 32);
  6979  		inst = (unsigned char *)(gen->ptr);
  6980  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  6981  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  6982  		{
  6983  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
  6984  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  6985  		}
  6986  		gen->ptr = (unsigned char *)inst;
  6987  		_jit_regs_commit(gen, &regs);
  6988  	}
  6989  }
  6990  break;
  6991  
  6992  case JIT_OP_BR_LFALSE:
  6993  {
  6994  	unsigned char * inst;
  6995  	_jit_regs_t regs;
  6996  	int reg;
  6997  	{
  6998  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  6999  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7000  		_jit_regs_clobber_all(gen, &regs);
  7001  		_jit_regs_begin(gen, &regs, 32);
  7002  		inst = (unsigned char *)(gen->ptr);
  7003  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7004  		{
  7005  			x86_64_test_reg_reg_size(inst, reg, reg, 8);
  7006  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  7007  		}
  7008  		gen->ptr = (unsigned char *)inst;
  7009  		_jit_regs_commit(gen, &regs);
  7010  	}
  7011  }
  7012  break;
  7013  
  7014  case JIT_OP_BR_LTRUE:
  7015  {
  7016  	unsigned char * inst;
  7017  	_jit_regs_t regs;
  7018  	int reg;
  7019  	{
  7020  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7021  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7022  		_jit_regs_clobber_all(gen, &regs);
  7023  		_jit_regs_begin(gen, &regs, 32);
  7024  		inst = (unsigned char *)(gen->ptr);
  7025  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7026  		{
  7027  			x86_64_test_reg_reg_size(inst, reg, reg, 8);
  7028  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  7029  		}
  7030  		gen->ptr = (unsigned char *)inst;
  7031  		_jit_regs_commit(gen, &regs);
  7032  	}
  7033  }
  7034  break;
  7035  
  7036  case JIT_OP_BR_LEQ:
  7037  {
  7038  	unsigned char * inst;
  7039  	_jit_regs_t regs;
  7040  	int reg, reg2;
  7041  	jit_nint imm_value;
  7042  	jit_nint local_offset;
  7043  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  7044  	{
  7045  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7046  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7047  		_jit_regs_clobber_all(gen, &regs);
  7048  		_jit_regs_begin(gen, &regs, 32);
  7049  		inst = (unsigned char *)(gen->ptr);
  7050  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7051  		{
  7052  			x86_64_test_reg_reg_size(inst, reg, reg, 8);
  7053  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  7054  		}
  7055  		gen->ptr = (unsigned char *)inst;
  7056  		_jit_regs_commit(gen, &regs);
  7057  	}
  7058  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7059  	{
  7060  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7061  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7062  		_jit_regs_clobber_all(gen, &regs);
  7063  		_jit_regs_begin(gen, &regs, 32);
  7064  		inst = (unsigned char *)(gen->ptr);
  7065  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7066  		imm_value = insn->value2->address;
  7067  		{
  7068  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7069  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  7070  		}
  7071  		gen->ptr = (unsigned char *)inst;
  7072  		_jit_regs_commit(gen, &regs);
  7073  	}
  7074  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7075  	{
  7076  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7077  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7078  		_jit_gen_fix_value(insn->value2);
  7079  		_jit_regs_clobber_all(gen, &regs);
  7080  		_jit_regs_begin(gen, &regs, 32);
  7081  		inst = (unsigned char *)(gen->ptr);
  7082  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7083  		local_offset = insn->value2->frame_offset;
  7084  		{
  7085  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7086  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  7087  		}
  7088  		gen->ptr = (unsigned char *)inst;
  7089  		_jit_regs_commit(gen, &regs);
  7090  	}
  7091  	else
  7092  	{
  7093  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7094  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7095  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7096  		_jit_regs_clobber_all(gen, &regs);
  7097  		_jit_regs_begin(gen, &regs, 32);
  7098  		inst = (unsigned char *)(gen->ptr);
  7099  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7100  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7101  		{
  7102  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7103  			inst = output_branch(func, inst, 0x74 /* eq */, insn);
  7104  		}
  7105  		gen->ptr = (unsigned char *)inst;
  7106  		_jit_regs_commit(gen, &regs);
  7107  	}
  7108  }
  7109  break;
  7110  
  7111  case JIT_OP_BR_LNE:
  7112  {
  7113  	unsigned char * inst;
  7114  	_jit_regs_t regs;
  7115  	int reg, reg2;
  7116  	jit_nint imm_value;
  7117  	jit_nint local_offset;
  7118  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  7119  	{
  7120  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7121  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7122  		_jit_regs_clobber_all(gen, &regs);
  7123  		_jit_regs_begin(gen, &regs, 32);
  7124  		inst = (unsigned char *)(gen->ptr);
  7125  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7126  		{
  7127  			x86_64_test_reg_reg_size(inst, reg, reg, 8);
  7128  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  7129  		}
  7130  		gen->ptr = (unsigned char *)inst;
  7131  		_jit_regs_commit(gen, &regs);
  7132  	}
  7133  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7134  	{
  7135  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7136  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7137  		_jit_regs_clobber_all(gen, &regs);
  7138  		_jit_regs_begin(gen, &regs, 32);
  7139  		inst = (unsigned char *)(gen->ptr);
  7140  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7141  		imm_value = insn->value2->address;
  7142  		{
  7143  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7144  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  7145  		}
  7146  		gen->ptr = (unsigned char *)inst;
  7147  		_jit_regs_commit(gen, &regs);
  7148  	}
  7149  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7150  	{
  7151  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7152  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7153  		_jit_gen_fix_value(insn->value2);
  7154  		_jit_regs_clobber_all(gen, &regs);
  7155  		_jit_regs_begin(gen, &regs, 32);
  7156  		inst = (unsigned char *)(gen->ptr);
  7157  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7158  		local_offset = insn->value2->frame_offset;
  7159  		{
  7160  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7161  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  7162  		}
  7163  		gen->ptr = (unsigned char *)inst;
  7164  		_jit_regs_commit(gen, &regs);
  7165  	}
  7166  	else
  7167  	{
  7168  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7169  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7170  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7171  		_jit_regs_clobber_all(gen, &regs);
  7172  		_jit_regs_begin(gen, &regs, 32);
  7173  		inst = (unsigned char *)(gen->ptr);
  7174  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7175  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7176  		{
  7177  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7178  			inst = output_branch(func, inst, 0x75 /* ne */, insn);
  7179  		}
  7180  		gen->ptr = (unsigned char *)inst;
  7181  		_jit_regs_commit(gen, &regs);
  7182  	}
  7183  }
  7184  break;
  7185  
  7186  case JIT_OP_BR_LLT:
  7187  {
  7188  	unsigned char * inst;
  7189  	_jit_regs_t regs;
  7190  	int reg, reg2;
  7191  	jit_nint imm_value;
  7192  	jit_nint local_offset;
  7193  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7194  	{
  7195  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7196  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7197  		_jit_regs_clobber_all(gen, &regs);
  7198  		_jit_regs_begin(gen, &regs, 32);
  7199  		inst = (unsigned char *)(gen->ptr);
  7200  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7201  		imm_value = insn->value2->address;
  7202  		{
  7203  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7204  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  7205  		}
  7206  		gen->ptr = (unsigned char *)inst;
  7207  		_jit_regs_commit(gen, &regs);
  7208  	}
  7209  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7210  	{
  7211  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7212  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7213  		_jit_gen_fix_value(insn->value2);
  7214  		_jit_regs_clobber_all(gen, &regs);
  7215  		_jit_regs_begin(gen, &regs, 32);
  7216  		inst = (unsigned char *)(gen->ptr);
  7217  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7218  		local_offset = insn->value2->frame_offset;
  7219  		{
  7220  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7221  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  7222  		}
  7223  		gen->ptr = (unsigned char *)inst;
  7224  		_jit_regs_commit(gen, &regs);
  7225  	}
  7226  	else
  7227  	{
  7228  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7229  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7230  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7231  		_jit_regs_clobber_all(gen, &regs);
  7232  		_jit_regs_begin(gen, &regs, 32);
  7233  		inst = (unsigned char *)(gen->ptr);
  7234  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7235  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7236  		{
  7237  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7238  			inst = output_branch(func, inst, 0x7C /* lt */, insn);
  7239  		}
  7240  		gen->ptr = (unsigned char *)inst;
  7241  		_jit_regs_commit(gen, &regs);
  7242  	}
  7243  }
  7244  break;
  7245  
  7246  case JIT_OP_BR_LLT_UN:
  7247  {
  7248  	unsigned char * inst;
  7249  	_jit_regs_t regs;
  7250  	int reg, reg2;
  7251  	jit_nint imm_value;
  7252  	jit_nint local_offset;
  7253  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7254  	{
  7255  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7256  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7257  		_jit_regs_clobber_all(gen, &regs);
  7258  		_jit_regs_begin(gen, &regs, 32);
  7259  		inst = (unsigned char *)(gen->ptr);
  7260  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7261  		imm_value = insn->value2->address;
  7262  		{
  7263  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7264  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  7265  		}
  7266  		gen->ptr = (unsigned char *)inst;
  7267  		_jit_regs_commit(gen, &regs);
  7268  	}
  7269  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7270  	{
  7271  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7272  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7273  		_jit_gen_fix_value(insn->value2);
  7274  		_jit_regs_clobber_all(gen, &regs);
  7275  		_jit_regs_begin(gen, &regs, 32);
  7276  		inst = (unsigned char *)(gen->ptr);
  7277  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7278  		local_offset = insn->value2->frame_offset;
  7279  		{
  7280  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7281  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  7282  		}
  7283  		gen->ptr = (unsigned char *)inst;
  7284  		_jit_regs_commit(gen, &regs);
  7285  	}
  7286  	else
  7287  	{
  7288  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7289  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7290  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7291  		_jit_regs_clobber_all(gen, &regs);
  7292  		_jit_regs_begin(gen, &regs, 32);
  7293  		inst = (unsigned char *)(gen->ptr);
  7294  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7295  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7296  		{
  7297  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7298  			inst = output_branch(func, inst, 0x72 /* lt_un */, insn);
  7299  		}
  7300  		gen->ptr = (unsigned char *)inst;
  7301  		_jit_regs_commit(gen, &regs);
  7302  	}
  7303  }
  7304  break;
  7305  
  7306  case JIT_OP_BR_LLE:
  7307  {
  7308  	unsigned char * inst;
  7309  	_jit_regs_t regs;
  7310  	int reg, reg2;
  7311  	jit_nint imm_value;
  7312  	jit_nint local_offset;
  7313  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7314  	{
  7315  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7316  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7317  		_jit_regs_clobber_all(gen, &regs);
  7318  		_jit_regs_begin(gen, &regs, 32);
  7319  		inst = (unsigned char *)(gen->ptr);
  7320  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7321  		imm_value = insn->value2->address;
  7322  		{
  7323  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7324  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  7325  		}
  7326  		gen->ptr = (unsigned char *)inst;
  7327  		_jit_regs_commit(gen, &regs);
  7328  	}
  7329  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7330  	{
  7331  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7332  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7333  		_jit_gen_fix_value(insn->value2);
  7334  		_jit_regs_clobber_all(gen, &regs);
  7335  		_jit_regs_begin(gen, &regs, 32);
  7336  		inst = (unsigned char *)(gen->ptr);
  7337  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7338  		local_offset = insn->value2->frame_offset;
  7339  		{
  7340  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7341  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  7342  		}
  7343  		gen->ptr = (unsigned char *)inst;
  7344  		_jit_regs_commit(gen, &regs);
  7345  	}
  7346  	else
  7347  	{
  7348  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7349  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7350  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7351  		_jit_regs_clobber_all(gen, &regs);
  7352  		_jit_regs_begin(gen, &regs, 32);
  7353  		inst = (unsigned char *)(gen->ptr);
  7354  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7355  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7356  		{
  7357  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7358  			inst = output_branch(func, inst, 0x7E /* le */, insn);
  7359  		}
  7360  		gen->ptr = (unsigned char *)inst;
  7361  		_jit_regs_commit(gen, &regs);
  7362  	}
  7363  }
  7364  break;
  7365  
  7366  case JIT_OP_BR_LLE_UN:
  7367  {
  7368  	unsigned char * inst;
  7369  	_jit_regs_t regs;
  7370  	int reg, reg2;
  7371  	jit_nint imm_value;
  7372  	jit_nint local_offset;
  7373  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7374  	{
  7375  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7376  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7377  		_jit_regs_clobber_all(gen, &regs);
  7378  		_jit_regs_begin(gen, &regs, 32);
  7379  		inst = (unsigned char *)(gen->ptr);
  7380  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7381  		imm_value = insn->value2->address;
  7382  		{
  7383  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7384  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  7385  		}
  7386  		gen->ptr = (unsigned char *)inst;
  7387  		_jit_regs_commit(gen, &regs);
  7388  	}
  7389  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7390  	{
  7391  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7392  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7393  		_jit_gen_fix_value(insn->value2);
  7394  		_jit_regs_clobber_all(gen, &regs);
  7395  		_jit_regs_begin(gen, &regs, 32);
  7396  		inst = (unsigned char *)(gen->ptr);
  7397  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7398  		local_offset = insn->value2->frame_offset;
  7399  		{
  7400  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7401  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  7402  		}
  7403  		gen->ptr = (unsigned char *)inst;
  7404  		_jit_regs_commit(gen, &regs);
  7405  	}
  7406  	else
  7407  	{
  7408  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7409  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7410  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7411  		_jit_regs_clobber_all(gen, &regs);
  7412  		_jit_regs_begin(gen, &regs, 32);
  7413  		inst = (unsigned char *)(gen->ptr);
  7414  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7415  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7416  		{
  7417  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7418  			inst = output_branch(func, inst, 0x76 /* le_un */, insn);
  7419  		}
  7420  		gen->ptr = (unsigned char *)inst;
  7421  		_jit_regs_commit(gen, &regs);
  7422  	}
  7423  }
  7424  break;
  7425  
  7426  case JIT_OP_BR_LGT:
  7427  {
  7428  	unsigned char * inst;
  7429  	_jit_regs_t regs;
  7430  	int reg, reg2;
  7431  	jit_nint imm_value;
  7432  	jit_nint local_offset;
  7433  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7434  	{
  7435  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7436  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7437  		_jit_regs_clobber_all(gen, &regs);
  7438  		_jit_regs_begin(gen, &regs, 32);
  7439  		inst = (unsigned char *)(gen->ptr);
  7440  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7441  		imm_value = insn->value2->address;
  7442  		{
  7443  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7444  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  7445  		}
  7446  		gen->ptr = (unsigned char *)inst;
  7447  		_jit_regs_commit(gen, &regs);
  7448  	}
  7449  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7450  	{
  7451  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7452  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7453  		_jit_gen_fix_value(insn->value2);
  7454  		_jit_regs_clobber_all(gen, &regs);
  7455  		_jit_regs_begin(gen, &regs, 32);
  7456  		inst = (unsigned char *)(gen->ptr);
  7457  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7458  		local_offset = insn->value2->frame_offset;
  7459  		{
  7460  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7461  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  7462  		}
  7463  		gen->ptr = (unsigned char *)inst;
  7464  		_jit_regs_commit(gen, &regs);
  7465  	}
  7466  	else
  7467  	{
  7468  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7469  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7470  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7471  		_jit_regs_clobber_all(gen, &regs);
  7472  		_jit_regs_begin(gen, &regs, 32);
  7473  		inst = (unsigned char *)(gen->ptr);
  7474  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7475  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7476  		{
  7477  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7478  			inst = output_branch(func, inst, 0x7F /* gt */, insn);
  7479  		}
  7480  		gen->ptr = (unsigned char *)inst;
  7481  		_jit_regs_commit(gen, &regs);
  7482  	}
  7483  }
  7484  break;
  7485  
  7486  case JIT_OP_BR_LGT_UN:
  7487  {
  7488  	unsigned char * inst;
  7489  	_jit_regs_t regs;
  7490  	int reg, reg2;
  7491  	jit_nint imm_value;
  7492  	jit_nint local_offset;
  7493  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7494  	{
  7495  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7496  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7497  		_jit_regs_clobber_all(gen, &regs);
  7498  		_jit_regs_begin(gen, &regs, 32);
  7499  		inst = (unsigned char *)(gen->ptr);
  7500  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7501  		imm_value = insn->value2->address;
  7502  		{
  7503  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7504  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  7505  		}
  7506  		gen->ptr = (unsigned char *)inst;
  7507  		_jit_regs_commit(gen, &regs);
  7508  	}
  7509  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7510  	{
  7511  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7512  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7513  		_jit_gen_fix_value(insn->value2);
  7514  		_jit_regs_clobber_all(gen, &regs);
  7515  		_jit_regs_begin(gen, &regs, 32);
  7516  		inst = (unsigned char *)(gen->ptr);
  7517  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7518  		local_offset = insn->value2->frame_offset;
  7519  		{
  7520  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7521  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  7522  		}
  7523  		gen->ptr = (unsigned char *)inst;
  7524  		_jit_regs_commit(gen, &regs);
  7525  	}
  7526  	else
  7527  	{
  7528  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7529  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7530  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7531  		_jit_regs_clobber_all(gen, &regs);
  7532  		_jit_regs_begin(gen, &regs, 32);
  7533  		inst = (unsigned char *)(gen->ptr);
  7534  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7535  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7536  		{
  7537  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7538  			inst = output_branch(func, inst, 0x77 /* gt_un */, insn);
  7539  		}
  7540  		gen->ptr = (unsigned char *)inst;
  7541  		_jit_regs_commit(gen, &regs);
  7542  	}
  7543  }
  7544  break;
  7545  
  7546  case JIT_OP_BR_LGE:
  7547  {
  7548  	unsigned char * inst;
  7549  	_jit_regs_t regs;
  7550  	int reg, reg2;
  7551  	jit_nint imm_value;
  7552  	jit_nint local_offset;
  7553  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7554  	{
  7555  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7556  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7557  		_jit_regs_clobber_all(gen, &regs);
  7558  		_jit_regs_begin(gen, &regs, 32);
  7559  		inst = (unsigned char *)(gen->ptr);
  7560  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7561  		imm_value = insn->value2->address;
  7562  		{
  7563  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7564  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  7565  		}
  7566  		gen->ptr = (unsigned char *)inst;
  7567  		_jit_regs_commit(gen, &regs);
  7568  	}
  7569  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7570  	{
  7571  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7572  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7573  		_jit_gen_fix_value(insn->value2);
  7574  		_jit_regs_clobber_all(gen, &regs);
  7575  		_jit_regs_begin(gen, &regs, 32);
  7576  		inst = (unsigned char *)(gen->ptr);
  7577  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7578  		local_offset = insn->value2->frame_offset;
  7579  		{
  7580  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7581  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  7582  		}
  7583  		gen->ptr = (unsigned char *)inst;
  7584  		_jit_regs_commit(gen, &regs);
  7585  	}
  7586  	else
  7587  	{
  7588  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7589  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7590  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7591  		_jit_regs_clobber_all(gen, &regs);
  7592  		_jit_regs_begin(gen, &regs, 32);
  7593  		inst = (unsigned char *)(gen->ptr);
  7594  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7595  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7596  		{
  7597  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7598  			inst = output_branch(func, inst, 0x7D /* ge */, insn);
  7599  		}
  7600  		gen->ptr = (unsigned char *)inst;
  7601  		_jit_regs_commit(gen, &regs);
  7602  	}
  7603  }
  7604  break;
  7605  
  7606  case JIT_OP_BR_LGE_UN:
  7607  {
  7608  	unsigned char * inst;
  7609  	_jit_regs_t regs;
  7610  	int reg, reg2;
  7611  	jit_nint imm_value;
  7612  	jit_nint local_offset;
  7613  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  7614  	{
  7615  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7616  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7617  		_jit_regs_clobber_all(gen, &regs);
  7618  		_jit_regs_begin(gen, &regs, 32);
  7619  		inst = (unsigned char *)(gen->ptr);
  7620  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7621  		imm_value = insn->value2->address;
  7622  		{
  7623  			x86_64_cmp_reg_imm_size(inst, reg, imm_value, 8);
  7624  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  7625  		}
  7626  		gen->ptr = (unsigned char *)inst;
  7627  		_jit_regs_commit(gen, &regs);
  7628  	}
  7629  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7630  	{
  7631  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7632  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7633  		_jit_gen_fix_value(insn->value2);
  7634  		_jit_regs_clobber_all(gen, &regs);
  7635  		_jit_regs_begin(gen, &regs, 32);
  7636  		inst = (unsigned char *)(gen->ptr);
  7637  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7638  		local_offset = insn->value2->frame_offset;
  7639  		{
  7640  			x86_64_cmp_reg_membase_size(inst, reg, X86_64_RBP, local_offset, 8);
  7641  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  7642  		}
  7643  		gen->ptr = (unsigned char *)inst;
  7644  		_jit_regs_commit(gen, &regs);
  7645  	}
  7646  	else
  7647  	{
  7648  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7649  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  7650  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  7651  		_jit_regs_clobber_all(gen, &regs);
  7652  		_jit_regs_begin(gen, &regs, 32);
  7653  		inst = (unsigned char *)(gen->ptr);
  7654  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7655  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7656  		{
  7657  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
  7658  			inst = output_branch(func, inst, 0x73 /* ge_un */, insn);
  7659  		}
  7660  		gen->ptr = (unsigned char *)inst;
  7661  		_jit_regs_commit(gen, &regs);
  7662  	}
  7663  }
  7664  break;
  7665  
  7666  case JIT_OP_BR_FEQ:
  7667  {
  7668  	unsigned char * inst;
  7669  	_jit_regs_t regs;
  7670  	int reg, reg2;
  7671  	jit_nint imm_value;
  7672  	jit_nint local_offset;
  7673  	if(insn->value2->is_constant)
  7674  	{
  7675  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7676  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7677  		_jit_regs_clobber_all(gen, &regs);
  7678  		_jit_regs_begin(gen, &regs, 32);
  7679  		inst = (unsigned char *)(gen->ptr);
  7680  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7681  		imm_value = insn->value2->address;
  7682  		{
  7683  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, reg, (void *)imm_value, 0, 0, insn);
  7684  		}
  7685  		gen->ptr = (unsigned char *)inst;
  7686  		_jit_regs_commit(gen, &regs);
  7687  	}
  7688  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7689  	{
  7690  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7691  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7692  		_jit_gen_fix_value(insn->value2);
  7693  		_jit_regs_clobber_all(gen, &regs);
  7694  		_jit_regs_begin(gen, &regs, 32);
  7695  		inst = (unsigned char *)(gen->ptr);
  7696  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7697  		local_offset = insn->value2->frame_offset;
  7698  		{
  7699  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_Z, reg, X86_64_RBP, local_offset, 0, 0, insn);
  7700  		}
  7701  		gen->ptr = (unsigned char *)inst;
  7702  		_jit_regs_commit(gen, &regs);
  7703  	}
  7704  	else
  7705  	{
  7706  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7707  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7708  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7709  		_jit_regs_clobber_all(gen, &regs);
  7710  		_jit_regs_begin(gen, &regs, 32);
  7711  		inst = (unsigned char *)(gen->ptr);
  7712  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7713  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7714  		{
  7715  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_Z, reg, reg2, 0, 0, insn);
  7716  		}
  7717  		gen->ptr = (unsigned char *)inst;
  7718  		_jit_regs_commit(gen, &regs);
  7719  	}
  7720  }
  7721  break;
  7722  
  7723  case JIT_OP_BR_FNE:
  7724  {
  7725  	unsigned char * inst;
  7726  	_jit_regs_t regs;
  7727  	int reg, reg2;
  7728  	jit_nint imm_value;
  7729  	jit_nint local_offset;
  7730  	if(insn->value2->is_constant)
  7731  	{
  7732  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7733  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7734  		_jit_regs_clobber_all(gen, &regs);
  7735  		_jit_regs_begin(gen, &regs, 32);
  7736  		inst = (unsigned char *)(gen->ptr);
  7737  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7738  		imm_value = insn->value2->address;
  7739  		{
  7740  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, reg, (void *)imm_value, 0, 1, insn);
  7741  		}
  7742  		gen->ptr = (unsigned char *)inst;
  7743  		_jit_regs_commit(gen, &regs);
  7744  	}
  7745  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7746  	{
  7747  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7748  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7749  		_jit_gen_fix_value(insn->value2);
  7750  		_jit_regs_clobber_all(gen, &regs);
  7751  		_jit_regs_begin(gen, &regs, 32);
  7752  		inst = (unsigned char *)(gen->ptr);
  7753  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7754  		local_offset = insn->value2->frame_offset;
  7755  		{
  7756  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NZ, reg, X86_64_RBP, local_offset, 0, 1, insn);
  7757  		}
  7758  		gen->ptr = (unsigned char *)inst;
  7759  		_jit_regs_commit(gen, &regs);
  7760  	}
  7761  	else
  7762  	{
  7763  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  7764  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7765  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7766  		_jit_regs_clobber_all(gen, &regs);
  7767  		_jit_regs_begin(gen, &regs, (20));
  7768  		inst = (unsigned char *)(gen->ptr);
  7769  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7770  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7771  		{
  7772  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NZ, reg, reg2, 0, 1, insn);
  7773  		}
  7774  		gen->ptr = (unsigned char *)inst;
  7775  		_jit_regs_commit(gen, &regs);
  7776  	}
  7777  }
  7778  break;
  7779  
  7780  case JIT_OP_BR_FLT:
  7781  {
  7782  	unsigned char * inst;
  7783  	_jit_regs_t regs;
  7784  	int reg, reg2;
  7785  	jit_nint imm_value;
  7786  	jit_nint local_offset;
  7787  	if(insn->value2->is_constant)
  7788  	{
  7789  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7790  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7791  		_jit_regs_clobber_all(gen, &regs);
  7792  		_jit_regs_begin(gen, &regs, 32);
  7793  		inst = (unsigned char *)(gen->ptr);
  7794  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7795  		imm_value = insn->value2->address;
  7796  		{
  7797  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, reg, (void *)imm_value, 0, 0, insn);
  7798  		}
  7799  		gen->ptr = (unsigned char *)inst;
  7800  		_jit_regs_commit(gen, &regs);
  7801  	}
  7802  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7803  	{
  7804  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7805  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7806  		_jit_gen_fix_value(insn->value2);
  7807  		_jit_regs_clobber_all(gen, &regs);
  7808  		_jit_regs_begin(gen, &regs, 32);
  7809  		inst = (unsigned char *)(gen->ptr);
  7810  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7811  		local_offset = insn->value2->frame_offset;
  7812  		{
  7813  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, reg, X86_64_RBP, local_offset, 0, 0, insn);
  7814  		}
  7815  		gen->ptr = (unsigned char *)inst;
  7816  		_jit_regs_commit(gen, &regs);
  7817  	}
  7818  	else
  7819  	{
  7820  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7821  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7822  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7823  		_jit_regs_clobber_all(gen, &regs);
  7824  		_jit_regs_begin(gen, &regs, 32);
  7825  		inst = (unsigned char *)(gen->ptr);
  7826  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7827  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7828  		{
  7829  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_C, reg, reg2, 0, 0, insn);
  7830  		}
  7831  		gen->ptr = (unsigned char *)inst;
  7832  		_jit_regs_commit(gen, &regs);
  7833  	}
  7834  }
  7835  break;
  7836  
  7837  case JIT_OP_BR_FLT_INV:
  7838  {
  7839  	unsigned char * inst;
  7840  	_jit_regs_t regs;
  7841  	int reg, reg2;
  7842  	jit_nint imm_value;
  7843  	jit_nint local_offset;
  7844  	if(insn->value2->is_constant)
  7845  	{
  7846  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7847  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7848  		_jit_regs_clobber_all(gen, &regs);
  7849  		_jit_regs_begin(gen, &regs, 32);
  7850  		inst = (unsigned char *)(gen->ptr);
  7851  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7852  		imm_value = insn->value2->address;
  7853  		{
  7854  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, reg, (void *)imm_value, 0, 1, insn);
  7855  		}
  7856  		gen->ptr = (unsigned char *)inst;
  7857  		_jit_regs_commit(gen, &regs);
  7858  	}
  7859  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7860  	{
  7861  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7862  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7863  		_jit_gen_fix_value(insn->value2);
  7864  		_jit_regs_clobber_all(gen, &regs);
  7865  		_jit_regs_begin(gen, &regs, 32);
  7866  		inst = (unsigned char *)(gen->ptr);
  7867  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7868  		local_offset = insn->value2->frame_offset;
  7869  		{
  7870  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, reg, X86_64_RBP, local_offset, 0, 1, insn);
  7871  		}
  7872  		gen->ptr = (unsigned char *)inst;
  7873  		_jit_regs_commit(gen, &regs);
  7874  	}
  7875  	else
  7876  	{
  7877  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7878  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7879  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7880  		_jit_regs_clobber_all(gen, &regs);
  7881  		_jit_regs_begin(gen, &regs, 32);
  7882  		inst = (unsigned char *)(gen->ptr);
  7883  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7884  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7885  		{
  7886  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_C, reg, reg2, 0, 1, insn);
  7887  		}
  7888  		gen->ptr = (unsigned char *)inst;
  7889  		_jit_regs_commit(gen, &regs);
  7890  	}
  7891  }
  7892  break;
  7893  
  7894  case JIT_OP_BR_FLE:
  7895  {
  7896  	unsigned char * inst;
  7897  	_jit_regs_t regs;
  7898  	int reg, reg2;
  7899  	jit_nint imm_value;
  7900  	jit_nint local_offset;
  7901  	if(insn->value2->is_constant)
  7902  	{
  7903  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7904  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7905  		_jit_regs_clobber_all(gen, &regs);
  7906  		_jit_regs_begin(gen, &regs, 32);
  7907  		inst = (unsigned char *)(gen->ptr);
  7908  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7909  		imm_value = insn->value2->address;
  7910  		{
  7911  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, reg, (void *)imm_value, 0, 0, insn);
  7912  		}
  7913  		gen->ptr = (unsigned char *)inst;
  7914  		_jit_regs_commit(gen, &regs);
  7915  	}
  7916  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7917  	{
  7918  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7919  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7920  		_jit_gen_fix_value(insn->value2);
  7921  		_jit_regs_clobber_all(gen, &regs);
  7922  		_jit_regs_begin(gen, &regs, 32);
  7923  		inst = (unsigned char *)(gen->ptr);
  7924  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7925  		local_offset = insn->value2->frame_offset;
  7926  		{
  7927  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, reg, X86_64_RBP, local_offset, 0, 0, insn);
  7928  		}
  7929  		gen->ptr = (unsigned char *)inst;
  7930  		_jit_regs_commit(gen, &regs);
  7931  	}
  7932  	else
  7933  	{
  7934  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7935  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7936  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7937  		_jit_regs_clobber_all(gen, &regs);
  7938  		_jit_regs_begin(gen, &regs, 32);
  7939  		inst = (unsigned char *)(gen->ptr);
  7940  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7941  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7942  		{
  7943  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_BE, reg, reg2, 0, 0, insn);
  7944  		}
  7945  		gen->ptr = (unsigned char *)inst;
  7946  		_jit_regs_commit(gen, &regs);
  7947  	}
  7948  }
  7949  break;
  7950  
  7951  case JIT_OP_BR_FLE_INV:
  7952  {
  7953  	unsigned char * inst;
  7954  	_jit_regs_t regs;
  7955  	int reg, reg2;
  7956  	jit_nint imm_value;
  7957  	jit_nint local_offset;
  7958  	if(insn->value2->is_constant)
  7959  	{
  7960  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7961  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7962  		_jit_regs_clobber_all(gen, &regs);
  7963  		_jit_regs_begin(gen, &regs, 32);
  7964  		inst = (unsigned char *)(gen->ptr);
  7965  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7966  		imm_value = insn->value2->address;
  7967  		{
  7968  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, reg, (void *)imm_value, 0, 1, insn);
  7969  		}
  7970  		gen->ptr = (unsigned char *)inst;
  7971  		_jit_regs_commit(gen, &regs);
  7972  	}
  7973  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  7974  	{
  7975  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7976  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7977  		_jit_gen_fix_value(insn->value2);
  7978  		_jit_regs_clobber_all(gen, &regs);
  7979  		_jit_regs_begin(gen, &regs, 32);
  7980  		inst = (unsigned char *)(gen->ptr);
  7981  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7982  		local_offset = insn->value2->frame_offset;
  7983  		{
  7984  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, reg, X86_64_RBP, local_offset, 0, 1, insn);
  7985  		}
  7986  		gen->ptr = (unsigned char *)inst;
  7987  		_jit_regs_commit(gen, &regs);
  7988  	}
  7989  	else
  7990  	{
  7991  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  7992  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  7993  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  7994  		_jit_regs_clobber_all(gen, &regs);
  7995  		_jit_regs_begin(gen, &regs, 32);
  7996  		inst = (unsigned char *)(gen->ptr);
  7997  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  7998  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  7999  		{
  8000  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_BE, reg, reg2, 0, 1, insn);
  8001  		}
  8002  		gen->ptr = (unsigned char *)inst;
  8003  		_jit_regs_commit(gen, &regs);
  8004  	}
  8005  }
  8006  break;
  8007  
  8008  case JIT_OP_BR_FGT:
  8009  {
  8010  	unsigned char * inst;
  8011  	_jit_regs_t regs;
  8012  	int reg, reg2;
  8013  	jit_nint imm_value;
  8014  	jit_nint local_offset;
  8015  	if(insn->value2->is_constant)
  8016  	{
  8017  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8018  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8019  		_jit_regs_clobber_all(gen, &regs);
  8020  		_jit_regs_begin(gen, &regs, 32);
  8021  		inst = (unsigned char *)(gen->ptr);
  8022  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8023  		imm_value = insn->value2->address;
  8024  		{
  8025  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, reg, (void *)imm_value, 0, 0, insn);
  8026  		}
  8027  		gen->ptr = (unsigned char *)inst;
  8028  		_jit_regs_commit(gen, &regs);
  8029  	}
  8030  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8031  	{
  8032  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8033  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8034  		_jit_gen_fix_value(insn->value2);
  8035  		_jit_regs_clobber_all(gen, &regs);
  8036  		_jit_regs_begin(gen, &regs, 32);
  8037  		inst = (unsigned char *)(gen->ptr);
  8038  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8039  		local_offset = insn->value2->frame_offset;
  8040  		{
  8041  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, reg, X86_64_RBP, local_offset, 0, 0, insn);
  8042  		}
  8043  		gen->ptr = (unsigned char *)inst;
  8044  		_jit_regs_commit(gen, &regs);
  8045  	}
  8046  	else
  8047  	{
  8048  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8049  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8050  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8051  		_jit_regs_clobber_all(gen, &regs);
  8052  		_jit_regs_begin(gen, &regs, 32);
  8053  		inst = (unsigned char *)(gen->ptr);
  8054  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8055  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8056  		{
  8057  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NBE, reg, reg2, 0, 0, insn);
  8058  		}
  8059  		gen->ptr = (unsigned char *)inst;
  8060  		_jit_regs_commit(gen, &regs);
  8061  	}
  8062  }
  8063  break;
  8064  
  8065  case JIT_OP_BR_FGT_INV:
  8066  {
  8067  	unsigned char * inst;
  8068  	_jit_regs_t regs;
  8069  	int reg, reg2;
  8070  	jit_nint imm_value;
  8071  	jit_nint local_offset;
  8072  	if(insn->value2->is_constant)
  8073  	{
  8074  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8075  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8076  		_jit_regs_clobber_all(gen, &regs);
  8077  		_jit_regs_begin(gen, &regs, 32);
  8078  		inst = (unsigned char *)(gen->ptr);
  8079  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8080  		imm_value = insn->value2->address;
  8081  		{
  8082  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, reg, (void *)imm_value, 0, 1, insn);
  8083  		}
  8084  		gen->ptr = (unsigned char *)inst;
  8085  		_jit_regs_commit(gen, &regs);
  8086  	}
  8087  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8088  	{
  8089  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8090  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8091  		_jit_gen_fix_value(insn->value2);
  8092  		_jit_regs_clobber_all(gen, &regs);
  8093  		_jit_regs_begin(gen, &regs, 32);
  8094  		inst = (unsigned char *)(gen->ptr);
  8095  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8096  		local_offset = insn->value2->frame_offset;
  8097  		{
  8098  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, reg, X86_64_RBP, local_offset, 0, 1, insn);
  8099  		}
  8100  		gen->ptr = (unsigned char *)inst;
  8101  		_jit_regs_commit(gen, &regs);
  8102  	}
  8103  	else
  8104  	{
  8105  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8106  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8107  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8108  		_jit_regs_clobber_all(gen, &regs);
  8109  		_jit_regs_begin(gen, &regs, 32);
  8110  		inst = (unsigned char *)(gen->ptr);
  8111  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8112  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8113  		{
  8114  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NBE, reg, reg2, 0, 1, insn);
  8115  		}
  8116  		gen->ptr = (unsigned char *)inst;
  8117  		_jit_regs_commit(gen, &regs);
  8118  	}
  8119  }
  8120  break;
  8121  
  8122  case JIT_OP_BR_FGE:
  8123  {
  8124  	unsigned char * inst;
  8125  	_jit_regs_t regs;
  8126  	int reg, reg2;
  8127  	jit_nint imm_value;
  8128  	jit_nint local_offset;
  8129  	if(insn->value2->is_constant)
  8130  	{
  8131  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8132  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8133  		_jit_regs_clobber_all(gen, &regs);
  8134  		_jit_regs_begin(gen, &regs, 32);
  8135  		inst = (unsigned char *)(gen->ptr);
  8136  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8137  		imm_value = insn->value2->address;
  8138  		{
  8139  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, reg, (void *)imm_value, 0, 0, insn);
  8140  		}
  8141  		gen->ptr = (unsigned char *)inst;
  8142  		_jit_regs_commit(gen, &regs);
  8143  	}
  8144  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8145  	{
  8146  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8147  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8148  		_jit_gen_fix_value(insn->value2);
  8149  		_jit_regs_clobber_all(gen, &regs);
  8150  		_jit_regs_begin(gen, &regs, 32);
  8151  		inst = (unsigned char *)(gen->ptr);
  8152  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8153  		local_offset = insn->value2->frame_offset;
  8154  		{
  8155  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, reg, X86_64_RBP, local_offset, 0, 0, insn);
  8156  		}
  8157  		gen->ptr = (unsigned char *)inst;
  8158  		_jit_regs_commit(gen, &regs);
  8159  	}
  8160  	else
  8161  	{
  8162  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8163  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8164  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8165  		_jit_regs_clobber_all(gen, &regs);
  8166  		_jit_regs_begin(gen, &regs, 32);
  8167  		inst = (unsigned char *)(gen->ptr);
  8168  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8169  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8170  		{
  8171  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NC, reg, reg2, 0, 0, insn);
  8172  		}
  8173  		gen->ptr = (unsigned char *)inst;
  8174  		_jit_regs_commit(gen, &regs);
  8175  	}
  8176  }
  8177  break;
  8178  
  8179  case JIT_OP_BR_FGE_INV:
  8180  {
  8181  	unsigned char * inst;
  8182  	_jit_regs_t regs;
  8183  	int reg, reg2;
  8184  	jit_nint imm_value;
  8185  	jit_nint local_offset;
  8186  	if(insn->value2->is_constant)
  8187  	{
  8188  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8189  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8190  		_jit_regs_clobber_all(gen, &regs);
  8191  		_jit_regs_begin(gen, &regs, 32);
  8192  		inst = (unsigned char *)(gen->ptr);
  8193  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8194  		imm_value = insn->value2->address;
  8195  		{
  8196  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, reg, (void *)imm_value, 0, 1, insn);
  8197  		}
  8198  		gen->ptr = (unsigned char *)inst;
  8199  		_jit_regs_commit(gen, &regs);
  8200  	}
  8201  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8202  	{
  8203  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8204  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8205  		_jit_gen_fix_value(insn->value2);
  8206  		_jit_regs_clobber_all(gen, &regs);
  8207  		_jit_regs_begin(gen, &regs, 32);
  8208  		inst = (unsigned char *)(gen->ptr);
  8209  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8210  		local_offset = insn->value2->frame_offset;
  8211  		{
  8212  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, reg, X86_64_RBP, local_offset, 0, 1, insn);
  8213  		}
  8214  		gen->ptr = (unsigned char *)inst;
  8215  		_jit_regs_commit(gen, &regs);
  8216  	}
  8217  	else
  8218  	{
  8219  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8220  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8221  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8222  		_jit_regs_clobber_all(gen, &regs);
  8223  		_jit_regs_begin(gen, &regs, 32);
  8224  		inst = (unsigned char *)(gen->ptr);
  8225  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8226  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8227  		{
  8228  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NC, reg, reg2, 0, 1, insn);
  8229  		}
  8230  		gen->ptr = (unsigned char *)inst;
  8231  		_jit_regs_commit(gen, &regs);
  8232  	}
  8233  }
  8234  break;
  8235  
  8236  case JIT_OP_BR_DEQ:
  8237  {
  8238  	unsigned char * inst;
  8239  	_jit_regs_t regs;
  8240  	int reg, reg2;
  8241  	jit_nint imm_value;
  8242  	jit_nint local_offset;
  8243  	if(insn->value2->is_constant)
  8244  	{
  8245  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8246  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8247  		_jit_regs_clobber_all(gen, &regs);
  8248  		_jit_regs_begin(gen, &regs, 32);
  8249  		inst = (unsigned char *)(gen->ptr);
  8250  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8251  		imm_value = insn->value2->address;
  8252  		{
  8253  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, reg, (void *)imm_value, 1, 0, insn);
  8254  		}
  8255  		gen->ptr = (unsigned char *)inst;
  8256  		_jit_regs_commit(gen, &regs);
  8257  	}
  8258  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8259  	{
  8260  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8261  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8262  		_jit_gen_fix_value(insn->value2);
  8263  		_jit_regs_clobber_all(gen, &regs);
  8264  		_jit_regs_begin(gen, &regs, 32);
  8265  		inst = (unsigned char *)(gen->ptr);
  8266  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8267  		local_offset = insn->value2->frame_offset;
  8268  		{
  8269  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_Z, reg, X86_64_RBP, local_offset, 1, 0, insn);
  8270  		}
  8271  		gen->ptr = (unsigned char *)inst;
  8272  		_jit_regs_commit(gen, &regs);
  8273  	}
  8274  	else
  8275  	{
  8276  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8277  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8278  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8279  		_jit_regs_clobber_all(gen, &regs);
  8280  		_jit_regs_begin(gen, &regs, 32);
  8281  		inst = (unsigned char *)(gen->ptr);
  8282  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8283  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8284  		{
  8285  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_Z, reg, reg2, 1, 0, insn);
  8286  		}
  8287  		gen->ptr = (unsigned char *)inst;
  8288  		_jit_regs_commit(gen, &regs);
  8289  	}
  8290  }
  8291  break;
  8292  
  8293  case JIT_OP_BR_DNE:
  8294  {
  8295  	unsigned char * inst;
  8296  	_jit_regs_t regs;
  8297  	int reg, reg2;
  8298  	jit_nint imm_value;
  8299  	jit_nint local_offset;
  8300  	if(insn->value2->is_constant)
  8301  	{
  8302  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8303  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8304  		_jit_regs_clobber_all(gen, &regs);
  8305  		_jit_regs_begin(gen, &regs, 32);
  8306  		inst = (unsigned char *)(gen->ptr);
  8307  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8308  		imm_value = insn->value2->address;
  8309  		{
  8310  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, reg, (void *)imm_value, 1, 1, insn);
  8311  		}
  8312  		gen->ptr = (unsigned char *)inst;
  8313  		_jit_regs_commit(gen, &regs);
  8314  	}
  8315  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8316  	{
  8317  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8318  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8319  		_jit_gen_fix_value(insn->value2);
  8320  		_jit_regs_clobber_all(gen, &regs);
  8321  		_jit_regs_begin(gen, &regs, 32);
  8322  		inst = (unsigned char *)(gen->ptr);
  8323  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8324  		local_offset = insn->value2->frame_offset;
  8325  		{
  8326  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NZ, reg, X86_64_RBP, local_offset, 1, 1, insn);
  8327  		}
  8328  		gen->ptr = (unsigned char *)inst;
  8329  		_jit_regs_commit(gen, &regs);
  8330  	}
  8331  	else
  8332  	{
  8333  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH | _JIT_REGS_COMMUTATIVE);
  8334  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8335  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8336  		_jit_regs_clobber_all(gen, &regs);
  8337  		_jit_regs_begin(gen, &regs, (20));
  8338  		inst = (unsigned char *)(gen->ptr);
  8339  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8340  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8341  		{
  8342  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NZ, reg, reg2, 1, 1, insn);
  8343  		}
  8344  		gen->ptr = (unsigned char *)inst;
  8345  		_jit_regs_commit(gen, &regs);
  8346  	}
  8347  }
  8348  break;
  8349  
  8350  case JIT_OP_BR_DLT:
  8351  {
  8352  	unsigned char * inst;
  8353  	_jit_regs_t regs;
  8354  	int reg, reg2;
  8355  	jit_nint imm_value;
  8356  	jit_nint local_offset;
  8357  	if(insn->value2->is_constant)
  8358  	{
  8359  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8360  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8361  		_jit_regs_clobber_all(gen, &regs);
  8362  		_jit_regs_begin(gen, &regs, 32);
  8363  		inst = (unsigned char *)(gen->ptr);
  8364  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8365  		imm_value = insn->value2->address;
  8366  		{
  8367  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, reg, (void *)imm_value, 1, 0, insn);
  8368  		}
  8369  		gen->ptr = (unsigned char *)inst;
  8370  		_jit_regs_commit(gen, &regs);
  8371  	}
  8372  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8373  	{
  8374  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8375  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8376  		_jit_gen_fix_value(insn->value2);
  8377  		_jit_regs_clobber_all(gen, &regs);
  8378  		_jit_regs_begin(gen, &regs, 32);
  8379  		inst = (unsigned char *)(gen->ptr);
  8380  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8381  		local_offset = insn->value2->frame_offset;
  8382  		{
  8383  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, reg, X86_64_RBP, local_offset, 1, 0, insn);
  8384  		}
  8385  		gen->ptr = (unsigned char *)inst;
  8386  		_jit_regs_commit(gen, &regs);
  8387  	}
  8388  	else
  8389  	{
  8390  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8391  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8392  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8393  		_jit_regs_clobber_all(gen, &regs);
  8394  		_jit_regs_begin(gen, &regs, 32);
  8395  		inst = (unsigned char *)(gen->ptr);
  8396  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8397  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8398  		{
  8399  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_C, reg, reg2, 1, 0, insn);
  8400  		}
  8401  		gen->ptr = (unsigned char *)inst;
  8402  		_jit_regs_commit(gen, &regs);
  8403  	}
  8404  }
  8405  break;
  8406  
  8407  case JIT_OP_BR_DLT_INV:
  8408  {
  8409  	unsigned char * inst;
  8410  	_jit_regs_t regs;
  8411  	int reg, reg2;
  8412  	jit_nint imm_value;
  8413  	jit_nint local_offset;
  8414  	if(insn->value2->is_constant)
  8415  	{
  8416  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8417  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8418  		_jit_regs_clobber_all(gen, &regs);
  8419  		_jit_regs_begin(gen, &regs, 32);
  8420  		inst = (unsigned char *)(gen->ptr);
  8421  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8422  		imm_value = insn->value2->address;
  8423  		{
  8424  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, reg, (void *)imm_value, 1, 1, insn);
  8425  		}
  8426  		gen->ptr = (unsigned char *)inst;
  8427  		_jit_regs_commit(gen, &regs);
  8428  	}
  8429  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8430  	{
  8431  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8432  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8433  		_jit_gen_fix_value(insn->value2);
  8434  		_jit_regs_clobber_all(gen, &regs);
  8435  		_jit_regs_begin(gen, &regs, 32);
  8436  		inst = (unsigned char *)(gen->ptr);
  8437  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8438  		local_offset = insn->value2->frame_offset;
  8439  		{
  8440  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, reg, X86_64_RBP, local_offset, 1, 1, insn);
  8441  		}
  8442  		gen->ptr = (unsigned char *)inst;
  8443  		_jit_regs_commit(gen, &regs);
  8444  	}
  8445  	else
  8446  	{
  8447  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8448  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8449  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8450  		_jit_regs_clobber_all(gen, &regs);
  8451  		_jit_regs_begin(gen, &regs, 32);
  8452  		inst = (unsigned char *)(gen->ptr);
  8453  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8454  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8455  		{
  8456  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_C, reg, reg2, 1, 1, insn);
  8457  		}
  8458  		gen->ptr = (unsigned char *)inst;
  8459  		_jit_regs_commit(gen, &regs);
  8460  	}
  8461  }
  8462  break;
  8463  
  8464  case JIT_OP_BR_DLE:
  8465  {
  8466  	unsigned char * inst;
  8467  	_jit_regs_t regs;
  8468  	int reg, reg2;
  8469  	jit_nint imm_value;
  8470  	jit_nint local_offset;
  8471  	if(insn->value2->is_constant)
  8472  	{
  8473  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8474  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8475  		_jit_regs_clobber_all(gen, &regs);
  8476  		_jit_regs_begin(gen, &regs, 32);
  8477  		inst = (unsigned char *)(gen->ptr);
  8478  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8479  		imm_value = insn->value2->address;
  8480  		{
  8481  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, reg, (void *)imm_value, 1, 0, insn);
  8482  		}
  8483  		gen->ptr = (unsigned char *)inst;
  8484  		_jit_regs_commit(gen, &regs);
  8485  	}
  8486  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8487  	{
  8488  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8489  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8490  		_jit_gen_fix_value(insn->value2);
  8491  		_jit_regs_clobber_all(gen, &regs);
  8492  		_jit_regs_begin(gen, &regs, 32);
  8493  		inst = (unsigned char *)(gen->ptr);
  8494  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8495  		local_offset = insn->value2->frame_offset;
  8496  		{
  8497  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, reg, X86_64_RBP, local_offset, 1, 0, insn);
  8498  		}
  8499  		gen->ptr = (unsigned char *)inst;
  8500  		_jit_regs_commit(gen, &regs);
  8501  	}
  8502  	else
  8503  	{
  8504  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8505  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8506  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8507  		_jit_regs_clobber_all(gen, &regs);
  8508  		_jit_regs_begin(gen, &regs, 32);
  8509  		inst = (unsigned char *)(gen->ptr);
  8510  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8511  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8512  		{
  8513  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_BE, reg, reg2, 1, 0, insn);
  8514  		}
  8515  		gen->ptr = (unsigned char *)inst;
  8516  		_jit_regs_commit(gen, &regs);
  8517  	}
  8518  }
  8519  break;
  8520  
  8521  case JIT_OP_BR_DLE_INV:
  8522  {
  8523  	unsigned char * inst;
  8524  	_jit_regs_t regs;
  8525  	int reg, reg2;
  8526  	jit_nint imm_value;
  8527  	jit_nint local_offset;
  8528  	if(insn->value2->is_constant)
  8529  	{
  8530  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8531  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8532  		_jit_regs_clobber_all(gen, &regs);
  8533  		_jit_regs_begin(gen, &regs, 32);
  8534  		inst = (unsigned char *)(gen->ptr);
  8535  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8536  		imm_value = insn->value2->address;
  8537  		{
  8538  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, reg, (void *)imm_value, 1, 1, insn);
  8539  		}
  8540  		gen->ptr = (unsigned char *)inst;
  8541  		_jit_regs_commit(gen, &regs);
  8542  	}
  8543  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8544  	{
  8545  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8546  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8547  		_jit_gen_fix_value(insn->value2);
  8548  		_jit_regs_clobber_all(gen, &regs);
  8549  		_jit_regs_begin(gen, &regs, 32);
  8550  		inst = (unsigned char *)(gen->ptr);
  8551  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8552  		local_offset = insn->value2->frame_offset;
  8553  		{
  8554  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, reg, X86_64_RBP, local_offset, 1, 1, insn);
  8555  		}
  8556  		gen->ptr = (unsigned char *)inst;
  8557  		_jit_regs_commit(gen, &regs);
  8558  	}
  8559  	else
  8560  	{
  8561  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8562  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8563  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8564  		_jit_regs_clobber_all(gen, &regs);
  8565  		_jit_regs_begin(gen, &regs, 32);
  8566  		inst = (unsigned char *)(gen->ptr);
  8567  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8568  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8569  		{
  8570  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_BE, reg, reg2, 1, 1, insn);
  8571  		}
  8572  		gen->ptr = (unsigned char *)inst;
  8573  		_jit_regs_commit(gen, &regs);
  8574  	}
  8575  }
  8576  break;
  8577  
  8578  case JIT_OP_BR_DGT:
  8579  {
  8580  	unsigned char * inst;
  8581  	_jit_regs_t regs;
  8582  	int reg, reg2;
  8583  	jit_nint imm_value;
  8584  	jit_nint local_offset;
  8585  	if(insn->value2->is_constant)
  8586  	{
  8587  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8588  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8589  		_jit_regs_clobber_all(gen, &regs);
  8590  		_jit_regs_begin(gen, &regs, 32);
  8591  		inst = (unsigned char *)(gen->ptr);
  8592  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8593  		imm_value = insn->value2->address;
  8594  		{
  8595  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, reg, (void *)imm_value, 1, 0, insn);
  8596  		}
  8597  		gen->ptr = (unsigned char *)inst;
  8598  		_jit_regs_commit(gen, &regs);
  8599  	}
  8600  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8601  	{
  8602  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8603  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8604  		_jit_gen_fix_value(insn->value2);
  8605  		_jit_regs_clobber_all(gen, &regs);
  8606  		_jit_regs_begin(gen, &regs, 32);
  8607  		inst = (unsigned char *)(gen->ptr);
  8608  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8609  		local_offset = insn->value2->frame_offset;
  8610  		{
  8611  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, reg, X86_64_RBP, local_offset, 1, 0, insn);
  8612  		}
  8613  		gen->ptr = (unsigned char *)inst;
  8614  		_jit_regs_commit(gen, &regs);
  8615  	}
  8616  	else
  8617  	{
  8618  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8619  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8620  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8621  		_jit_regs_clobber_all(gen, &regs);
  8622  		_jit_regs_begin(gen, &regs, 32);
  8623  		inst = (unsigned char *)(gen->ptr);
  8624  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8625  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8626  		{
  8627  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NBE, reg, reg2, 1, 0, insn);
  8628  		}
  8629  		gen->ptr = (unsigned char *)inst;
  8630  		_jit_regs_commit(gen, &regs);
  8631  	}
  8632  }
  8633  break;
  8634  
  8635  case JIT_OP_BR_DGT_INV:
  8636  {
  8637  	unsigned char * inst;
  8638  	_jit_regs_t regs;
  8639  	int reg, reg2;
  8640  	jit_nint imm_value;
  8641  	jit_nint local_offset;
  8642  	if(insn->value2->is_constant)
  8643  	{
  8644  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8645  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8646  		_jit_regs_clobber_all(gen, &regs);
  8647  		_jit_regs_begin(gen, &regs, 32);
  8648  		inst = (unsigned char *)(gen->ptr);
  8649  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8650  		imm_value = insn->value2->address;
  8651  		{
  8652  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, reg, (void *)imm_value, 1, 1, insn);
  8653  		}
  8654  		gen->ptr = (unsigned char *)inst;
  8655  		_jit_regs_commit(gen, &regs);
  8656  	}
  8657  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8658  	{
  8659  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8660  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8661  		_jit_gen_fix_value(insn->value2);
  8662  		_jit_regs_clobber_all(gen, &regs);
  8663  		_jit_regs_begin(gen, &regs, 32);
  8664  		inst = (unsigned char *)(gen->ptr);
  8665  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8666  		local_offset = insn->value2->frame_offset;
  8667  		{
  8668  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, reg, X86_64_RBP, local_offset, 1, 1, insn);
  8669  		}
  8670  		gen->ptr = (unsigned char *)inst;
  8671  		_jit_regs_commit(gen, &regs);
  8672  	}
  8673  	else
  8674  	{
  8675  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8676  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8677  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8678  		_jit_regs_clobber_all(gen, &regs);
  8679  		_jit_regs_begin(gen, &regs, 32);
  8680  		inst = (unsigned char *)(gen->ptr);
  8681  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8682  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8683  		{
  8684  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NBE, reg, reg2, 1, 1, insn);
  8685  		}
  8686  		gen->ptr = (unsigned char *)inst;
  8687  		_jit_regs_commit(gen, &regs);
  8688  	}
  8689  }
  8690  break;
  8691  
  8692  case JIT_OP_BR_DGE:
  8693  {
  8694  	unsigned char * inst;
  8695  	_jit_regs_t regs;
  8696  	int reg, reg2;
  8697  	jit_nint imm_value;
  8698  	jit_nint local_offset;
  8699  	if(insn->value2->is_constant)
  8700  	{
  8701  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8702  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8703  		_jit_regs_clobber_all(gen, &regs);
  8704  		_jit_regs_begin(gen, &regs, 32);
  8705  		inst = (unsigned char *)(gen->ptr);
  8706  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8707  		imm_value = insn->value2->address;
  8708  		{
  8709  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, reg, (void *)imm_value, 1, 0, insn);
  8710  		}
  8711  		gen->ptr = (unsigned char *)inst;
  8712  		_jit_regs_commit(gen, &regs);
  8713  	}
  8714  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8715  	{
  8716  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8717  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8718  		_jit_gen_fix_value(insn->value2);
  8719  		_jit_regs_clobber_all(gen, &regs);
  8720  		_jit_regs_begin(gen, &regs, 32);
  8721  		inst = (unsigned char *)(gen->ptr);
  8722  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8723  		local_offset = insn->value2->frame_offset;
  8724  		{
  8725  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, reg, X86_64_RBP, local_offset, 1, 0, insn);
  8726  		}
  8727  		gen->ptr = (unsigned char *)inst;
  8728  		_jit_regs_commit(gen, &regs);
  8729  	}
  8730  	else
  8731  	{
  8732  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8733  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8734  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8735  		_jit_regs_clobber_all(gen, &regs);
  8736  		_jit_regs_begin(gen, &regs, 32);
  8737  		inst = (unsigned char *)(gen->ptr);
  8738  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8739  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8740  		{
  8741  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NC, reg, reg2, 1, 0, insn);
  8742  		}
  8743  		gen->ptr = (unsigned char *)inst;
  8744  		_jit_regs_commit(gen, &regs);
  8745  	}
  8746  }
  8747  break;
  8748  
  8749  case JIT_OP_BR_DGE_INV:
  8750  {
  8751  	unsigned char * inst;
  8752  	_jit_regs_t regs;
  8753  	int reg, reg2;
  8754  	jit_nint imm_value;
  8755  	jit_nint local_offset;
  8756  	if(insn->value2->is_constant)
  8757  	{
  8758  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8759  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8760  		_jit_regs_clobber_all(gen, &regs);
  8761  		_jit_regs_begin(gen, &regs, 32);
  8762  		inst = (unsigned char *)(gen->ptr);
  8763  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8764  		imm_value = insn->value2->address;
  8765  		{
  8766  			inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, reg, (void *)imm_value, 1, 1, insn);
  8767  		}
  8768  		gen->ptr = (unsigned char *)inst;
  8769  		_jit_regs_commit(gen, &regs);
  8770  	}
  8771  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8772  	{
  8773  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8774  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8775  		_jit_gen_fix_value(insn->value2);
  8776  		_jit_regs_clobber_all(gen, &regs);
  8777  		_jit_regs_begin(gen, &regs, 32);
  8778  		inst = (unsigned char *)(gen->ptr);
  8779  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8780  		local_offset = insn->value2->frame_offset;
  8781  		{
  8782  			inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, reg, X86_64_RBP, local_offset, 1, 1, insn);
  8783  		}
  8784  		gen->ptr = (unsigned char *)inst;
  8785  		_jit_regs_commit(gen, &regs);
  8786  	}
  8787  	else
  8788  	{
  8789  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
  8790  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
  8791  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
  8792  		_jit_regs_clobber_all(gen, &regs);
  8793  		_jit_regs_begin(gen, &regs, 32);
  8794  		inst = (unsigned char *)(gen->ptr);
  8795  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8796  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8797  		{
  8798  			inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NC, reg, reg2, 1, 1, insn);
  8799  		}
  8800  		gen->ptr = (unsigned char *)inst;
  8801  		_jit_regs_commit(gen, &regs);
  8802  	}
  8803  }
  8804  break;
  8805  
  8806  case JIT_OP_IEQ:
  8807  {
  8808  	unsigned char * inst;
  8809  	_jit_regs_t regs;
  8810  	int reg, reg2, reg3;
  8811  	jit_nint imm_value;
  8812  	jit_nint local_offset;
  8813  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  8814  	{
  8815  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8816  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8817  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8818  		_jit_regs_begin(gen, &regs, 32);
  8819  		inst = (unsigned char *)(gen->ptr);
  8820  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8821  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8822  		{
  8823  			x86_64_test_reg_reg_size(inst, reg2, reg2, 4);
  8824  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  8825  		}
  8826  		gen->ptr = (unsigned char *)inst;
  8827  		_jit_regs_commit(gen, &regs);
  8828  	}
  8829  	else if(insn->value2->is_constant)
  8830  	{
  8831  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8832  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8833  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8834  		_jit_regs_begin(gen, &regs, 32);
  8835  		inst = (unsigned char *)(gen->ptr);
  8836  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8837  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8838  		imm_value = insn->value2->address;
  8839  		{
  8840  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  8841  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  8842  		}
  8843  		gen->ptr = (unsigned char *)inst;
  8844  		_jit_regs_commit(gen, &regs);
  8845  	}
  8846  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8847  	{
  8848  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8849  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8850  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8851  		_jit_gen_fix_value(insn->value2);
  8852  		_jit_regs_begin(gen, &regs, 32);
  8853  		inst = (unsigned char *)(gen->ptr);
  8854  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8855  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8856  		local_offset = insn->value2->frame_offset;
  8857  		{
  8858  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  8859  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  8860  		}
  8861  		gen->ptr = (unsigned char *)inst;
  8862  		_jit_regs_commit(gen, &regs);
  8863  	}
  8864  	else
  8865  	{
  8866  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8867  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8868  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8869  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  8870  		_jit_regs_begin(gen, &regs, 32);
  8871  		inst = (unsigned char *)(gen->ptr);
  8872  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8873  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8874  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8875  		{
  8876  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  8877  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  8878  		}
  8879  		gen->ptr = (unsigned char *)inst;
  8880  		_jit_regs_commit(gen, &regs);
  8881  	}
  8882  }
  8883  break;
  8884  
  8885  case JIT_OP_INE:
  8886  {
  8887  	unsigned char * inst;
  8888  	_jit_regs_t regs;
  8889  	int reg, reg2, reg3;
  8890  	jit_nint imm_value;
  8891  	jit_nint local_offset;
  8892  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  8893  	{
  8894  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8895  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8896  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8897  		_jit_regs_begin(gen, &regs, 32);
  8898  		inst = (unsigned char *)(gen->ptr);
  8899  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8900  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8901  		{
  8902  			x86_64_test_reg_reg_size(inst, reg2, reg2, 4);
  8903  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  8904  		}
  8905  		gen->ptr = (unsigned char *)inst;
  8906  		_jit_regs_commit(gen, &regs);
  8907  	}
  8908  	else if(insn->value2->is_constant)
  8909  	{
  8910  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8911  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8912  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8913  		_jit_regs_begin(gen, &regs, 32);
  8914  		inst = (unsigned char *)(gen->ptr);
  8915  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8916  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8917  		imm_value = insn->value2->address;
  8918  		{
  8919  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  8920  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  8921  		}
  8922  		gen->ptr = (unsigned char *)inst;
  8923  		_jit_regs_commit(gen, &regs);
  8924  	}
  8925  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8926  	{
  8927  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8928  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8929  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8930  		_jit_gen_fix_value(insn->value2);
  8931  		_jit_regs_begin(gen, &regs, 32);
  8932  		inst = (unsigned char *)(gen->ptr);
  8933  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8934  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8935  		local_offset = insn->value2->frame_offset;
  8936  		{
  8937  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  8938  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  8939  		}
  8940  		gen->ptr = (unsigned char *)inst;
  8941  		_jit_regs_commit(gen, &regs);
  8942  	}
  8943  	else
  8944  	{
  8945  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  8946  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8947  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8948  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  8949  		_jit_regs_begin(gen, &regs, 32);
  8950  		inst = (unsigned char *)(gen->ptr);
  8951  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8952  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8953  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  8954  		{
  8955  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  8956  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  8957  		}
  8958  		gen->ptr = (unsigned char *)inst;
  8959  		_jit_regs_commit(gen, &regs);
  8960  	}
  8961  }
  8962  break;
  8963  
  8964  case JIT_OP_ILT:
  8965  {
  8966  	unsigned char * inst;
  8967  	_jit_regs_t regs;
  8968  	int reg, reg2, reg3;
  8969  	jit_nint imm_value;
  8970  	jit_nint local_offset;
  8971  	if(insn->value2->is_constant)
  8972  	{
  8973  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  8974  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8975  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8976  		_jit_regs_begin(gen, &regs, 32);
  8977  		inst = (unsigned char *)(gen->ptr);
  8978  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8979  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8980  		imm_value = insn->value2->address;
  8981  		{
  8982  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  8983  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  8984  		}
  8985  		gen->ptr = (unsigned char *)inst;
  8986  		_jit_regs_commit(gen, &regs);
  8987  	}
  8988  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  8989  	{
  8990  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  8991  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  8992  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  8993  		_jit_gen_fix_value(insn->value2);
  8994  		_jit_regs_begin(gen, &regs, 32);
  8995  		inst = (unsigned char *)(gen->ptr);
  8996  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  8997  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  8998  		local_offset = insn->value2->frame_offset;
  8999  		{
  9000  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9001  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  9002  		}
  9003  		gen->ptr = (unsigned char *)inst;
  9004  		_jit_regs_commit(gen, &regs);
  9005  	}
  9006  	else
  9007  	{
  9008  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9009  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9010  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9011  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9012  		_jit_regs_begin(gen, &regs, 32);
  9013  		inst = (unsigned char *)(gen->ptr);
  9014  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9015  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9016  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9017  		{
  9018  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9019  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  9020  		}
  9021  		gen->ptr = (unsigned char *)inst;
  9022  		_jit_regs_commit(gen, &regs);
  9023  	}
  9024  }
  9025  break;
  9026  
  9027  case JIT_OP_ILT_UN:
  9028  {
  9029  	unsigned char * inst;
  9030  	_jit_regs_t regs;
  9031  	int reg, reg2, reg3;
  9032  	jit_nint imm_value;
  9033  	jit_nint local_offset;
  9034  	if(insn->value2->is_constant)
  9035  	{
  9036  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9037  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9038  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9039  		_jit_regs_begin(gen, &regs, 32);
  9040  		inst = (unsigned char *)(gen->ptr);
  9041  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9042  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9043  		imm_value = insn->value2->address;
  9044  		{
  9045  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9046  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9047  		}
  9048  		gen->ptr = (unsigned char *)inst;
  9049  		_jit_regs_commit(gen, &regs);
  9050  	}
  9051  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9052  	{
  9053  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9054  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9055  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9056  		_jit_gen_fix_value(insn->value2);
  9057  		_jit_regs_begin(gen, &regs, 32);
  9058  		inst = (unsigned char *)(gen->ptr);
  9059  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9060  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9061  		local_offset = insn->value2->frame_offset;
  9062  		{
  9063  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9064  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9065  		}
  9066  		gen->ptr = (unsigned char *)inst;
  9067  		_jit_regs_commit(gen, &regs);
  9068  	}
  9069  	else
  9070  	{
  9071  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9072  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9073  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9074  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9075  		_jit_regs_begin(gen, &regs, 32);
  9076  		inst = (unsigned char *)(gen->ptr);
  9077  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9078  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9079  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9080  		{
  9081  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9082  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9083  		}
  9084  		gen->ptr = (unsigned char *)inst;
  9085  		_jit_regs_commit(gen, &regs);
  9086  	}
  9087  }
  9088  break;
  9089  
  9090  case JIT_OP_ILE:
  9091  {
  9092  	unsigned char * inst;
  9093  	_jit_regs_t regs;
  9094  	int reg, reg2, reg3;
  9095  	jit_nint imm_value;
  9096  	jit_nint local_offset;
  9097  	if(insn->value2->is_constant)
  9098  	{
  9099  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9100  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9101  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9102  		_jit_regs_begin(gen, &regs, 32);
  9103  		inst = (unsigned char *)(gen->ptr);
  9104  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9105  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9106  		imm_value = insn->value2->address;
  9107  		{
  9108  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9109  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9110  		}
  9111  		gen->ptr = (unsigned char *)inst;
  9112  		_jit_regs_commit(gen, &regs);
  9113  	}
  9114  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9115  	{
  9116  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9117  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9118  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9119  		_jit_gen_fix_value(insn->value2);
  9120  		_jit_regs_begin(gen, &regs, 32);
  9121  		inst = (unsigned char *)(gen->ptr);
  9122  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9123  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9124  		local_offset = insn->value2->frame_offset;
  9125  		{
  9126  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9127  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9128  		}
  9129  		gen->ptr = (unsigned char *)inst;
  9130  		_jit_regs_commit(gen, &regs);
  9131  	}
  9132  	else
  9133  	{
  9134  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9135  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9136  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9137  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9138  		_jit_regs_begin(gen, &regs, 32);
  9139  		inst = (unsigned char *)(gen->ptr);
  9140  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9141  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9142  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9143  		{
  9144  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9145  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9146  		}
  9147  		gen->ptr = (unsigned char *)inst;
  9148  		_jit_regs_commit(gen, &regs);
  9149  	}
  9150  }
  9151  break;
  9152  
  9153  case JIT_OP_ILE_UN:
  9154  {
  9155  	unsigned char * inst;
  9156  	_jit_regs_t regs;
  9157  	int reg, reg2, reg3;
  9158  	jit_nint imm_value;
  9159  	jit_nint local_offset;
  9160  	if(insn->value2->is_constant)
  9161  	{
  9162  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9163  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9164  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9165  		_jit_regs_begin(gen, &regs, 32);
  9166  		inst = (unsigned char *)(gen->ptr);
  9167  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9168  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9169  		imm_value = insn->value2->address;
  9170  		{
  9171  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9172  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9173  		}
  9174  		gen->ptr = (unsigned char *)inst;
  9175  		_jit_regs_commit(gen, &regs);
  9176  	}
  9177  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9178  	{
  9179  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9180  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9181  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9182  		_jit_gen_fix_value(insn->value2);
  9183  		_jit_regs_begin(gen, &regs, 32);
  9184  		inst = (unsigned char *)(gen->ptr);
  9185  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9186  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9187  		local_offset = insn->value2->frame_offset;
  9188  		{
  9189  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9190  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9191  		}
  9192  		gen->ptr = (unsigned char *)inst;
  9193  		_jit_regs_commit(gen, &regs);
  9194  	}
  9195  	else
  9196  	{
  9197  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9198  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9199  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9200  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9201  		_jit_regs_begin(gen, &regs, 32);
  9202  		inst = (unsigned char *)(gen->ptr);
  9203  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9204  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9205  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9206  		{
  9207  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9208  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9209  		}
  9210  		gen->ptr = (unsigned char *)inst;
  9211  		_jit_regs_commit(gen, &regs);
  9212  	}
  9213  }
  9214  break;
  9215  
  9216  case JIT_OP_IGT:
  9217  {
  9218  	unsigned char * inst;
  9219  	_jit_regs_t regs;
  9220  	int reg, reg2, reg3;
  9221  	jit_nint imm_value;
  9222  	jit_nint local_offset;
  9223  	if(insn->value2->is_constant)
  9224  	{
  9225  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9226  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9227  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9228  		_jit_regs_begin(gen, &regs, 32);
  9229  		inst = (unsigned char *)(gen->ptr);
  9230  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9231  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9232  		imm_value = insn->value2->address;
  9233  		{
  9234  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9235  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9236  		}
  9237  		gen->ptr = (unsigned char *)inst;
  9238  		_jit_regs_commit(gen, &regs);
  9239  	}
  9240  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9241  	{
  9242  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9243  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9244  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9245  		_jit_gen_fix_value(insn->value2);
  9246  		_jit_regs_begin(gen, &regs, 32);
  9247  		inst = (unsigned char *)(gen->ptr);
  9248  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9249  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9250  		local_offset = insn->value2->frame_offset;
  9251  		{
  9252  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9253  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9254  		}
  9255  		gen->ptr = (unsigned char *)inst;
  9256  		_jit_regs_commit(gen, &regs);
  9257  	}
  9258  	else
  9259  	{
  9260  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9261  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9262  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9263  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9264  		_jit_regs_begin(gen, &regs, 32);
  9265  		inst = (unsigned char *)(gen->ptr);
  9266  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9267  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9268  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9269  		{
  9270  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9271  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9272  		}
  9273  		gen->ptr = (unsigned char *)inst;
  9274  		_jit_regs_commit(gen, &regs);
  9275  	}
  9276  }
  9277  break;
  9278  
  9279  case JIT_OP_IGT_UN:
  9280  {
  9281  	unsigned char * inst;
  9282  	_jit_regs_t regs;
  9283  	int reg, reg2, reg3;
  9284  	jit_nint imm_value;
  9285  	jit_nint local_offset;
  9286  	if(insn->value2->is_constant)
  9287  	{
  9288  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9289  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9290  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9291  		_jit_regs_begin(gen, &regs, 32);
  9292  		inst = (unsigned char *)(gen->ptr);
  9293  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9294  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9295  		imm_value = insn->value2->address;
  9296  		{
  9297  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9298  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9299  		}
  9300  		gen->ptr = (unsigned char *)inst;
  9301  		_jit_regs_commit(gen, &regs);
  9302  	}
  9303  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9304  	{
  9305  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9306  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9307  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9308  		_jit_gen_fix_value(insn->value2);
  9309  		_jit_regs_begin(gen, &regs, 32);
  9310  		inst = (unsigned char *)(gen->ptr);
  9311  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9312  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9313  		local_offset = insn->value2->frame_offset;
  9314  		{
  9315  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9316  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9317  		}
  9318  		gen->ptr = (unsigned char *)inst;
  9319  		_jit_regs_commit(gen, &regs);
  9320  	}
  9321  	else
  9322  	{
  9323  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9324  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9325  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9326  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9327  		_jit_regs_begin(gen, &regs, 32);
  9328  		inst = (unsigned char *)(gen->ptr);
  9329  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9330  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9331  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9332  		{
  9333  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9334  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9335  		}
  9336  		gen->ptr = (unsigned char *)inst;
  9337  		_jit_regs_commit(gen, &regs);
  9338  	}
  9339  }
  9340  break;
  9341  
  9342  case JIT_OP_IGE:
  9343  {
  9344  	unsigned char * inst;
  9345  	_jit_regs_t regs;
  9346  	int reg, reg2, reg3;
  9347  	jit_nint imm_value;
  9348  	jit_nint local_offset;
  9349  	if(insn->value2->is_constant)
  9350  	{
  9351  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9352  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9353  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9354  		_jit_regs_begin(gen, &regs, 32);
  9355  		inst = (unsigned char *)(gen->ptr);
  9356  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9357  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9358  		imm_value = insn->value2->address;
  9359  		{
  9360  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9361  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
  9362  		}
  9363  		gen->ptr = (unsigned char *)inst;
  9364  		_jit_regs_commit(gen, &regs);
  9365  	}
  9366  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9367  	{
  9368  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9369  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9370  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9371  		_jit_gen_fix_value(insn->value2);
  9372  		_jit_regs_begin(gen, &regs, 32);
  9373  		inst = (unsigned char *)(gen->ptr);
  9374  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9375  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9376  		local_offset = insn->value2->frame_offset;
  9377  		{
  9378  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9379  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
  9380  		}
  9381  		gen->ptr = (unsigned char *)inst;
  9382  		_jit_regs_commit(gen, &regs);
  9383  	}
  9384  	else
  9385  	{
  9386  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9387  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9388  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9389  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9390  		_jit_regs_begin(gen, &regs, 32);
  9391  		inst = (unsigned char *)(gen->ptr);
  9392  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9393  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9394  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9395  		{
  9396  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9397  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
  9398  		}
  9399  		gen->ptr = (unsigned char *)inst;
  9400  		_jit_regs_commit(gen, &regs);
  9401  	}
  9402  }
  9403  break;
  9404  
  9405  case JIT_OP_IGE_UN:
  9406  {
  9407  	unsigned char * inst;
  9408  	_jit_regs_t regs;
  9409  	int reg, reg2, reg3;
  9410  	jit_nint imm_value;
  9411  	jit_nint local_offset;
  9412  	if(insn->value2->is_constant)
  9413  	{
  9414  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9415  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9416  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9417  		_jit_regs_begin(gen, &regs, 32);
  9418  		inst = (unsigned char *)(gen->ptr);
  9419  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9420  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9421  		imm_value = insn->value2->address;
  9422  		{
  9423  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 4);
  9424  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
  9425  		}
  9426  		gen->ptr = (unsigned char *)inst;
  9427  		_jit_regs_commit(gen, &regs);
  9428  	}
  9429  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9430  	{
  9431  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9432  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9433  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9434  		_jit_gen_fix_value(insn->value2);
  9435  		_jit_regs_begin(gen, &regs, 32);
  9436  		inst = (unsigned char *)(gen->ptr);
  9437  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9438  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9439  		local_offset = insn->value2->frame_offset;
  9440  		{
  9441  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 4);
  9442  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
  9443  		}
  9444  		gen->ptr = (unsigned char *)inst;
  9445  		_jit_regs_commit(gen, &regs);
  9446  	}
  9447  	else
  9448  	{
  9449  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9450  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9451  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9452  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9453  		_jit_regs_begin(gen, &regs, 32);
  9454  		inst = (unsigned char *)(gen->ptr);
  9455  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9456  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9457  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9458  		{
  9459  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 4);
  9460  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
  9461  		}
  9462  		gen->ptr = (unsigned char *)inst;
  9463  		_jit_regs_commit(gen, &regs);
  9464  	}
  9465  }
  9466  break;
  9467  
  9468  case JIT_OP_LEQ:
  9469  {
  9470  	unsigned char * inst;
  9471  	_jit_regs_t regs;
  9472  	int reg, reg2, reg3;
  9473  	jit_nint imm_value;
  9474  	jit_nint local_offset;
  9475  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  9476  	{
  9477  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9478  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9479  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9480  		_jit_regs_begin(gen, &regs, 32);
  9481  		inst = (unsigned char *)(gen->ptr);
  9482  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9483  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9484  		{
  9485  			x86_64_test_reg_reg_size(inst, reg2, reg2, 8);
  9486  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  9487  		}
  9488  		gen->ptr = (unsigned char *)inst;
  9489  		_jit_regs_commit(gen, &regs);
  9490  	}
  9491  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9492  	{
  9493  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9494  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9495  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9496  		_jit_regs_begin(gen, &regs, 32);
  9497  		inst = (unsigned char *)(gen->ptr);
  9498  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9499  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9500  		imm_value = insn->value2->address;
  9501  		{
  9502  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9503  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  9504  		}
  9505  		gen->ptr = (unsigned char *)inst;
  9506  		_jit_regs_commit(gen, &regs);
  9507  	}
  9508  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9509  	{
  9510  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9511  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9512  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9513  		_jit_gen_fix_value(insn->value2);
  9514  		_jit_regs_begin(gen, &regs, 32);
  9515  		inst = (unsigned char *)(gen->ptr);
  9516  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9517  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9518  		local_offset = insn->value2->frame_offset;
  9519  		{
  9520  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9521  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  9522  		}
  9523  		gen->ptr = (unsigned char *)inst;
  9524  		_jit_regs_commit(gen, &regs);
  9525  	}
  9526  	else
  9527  	{
  9528  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9529  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9530  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9531  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9532  		_jit_regs_begin(gen, &regs, 32);
  9533  		inst = (unsigned char *)(gen->ptr);
  9534  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9535  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9536  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9537  		{
  9538  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9539  			inst = setcc_reg(inst, reg, X86_CC_EQ, 0);
  9540  		}
  9541  		gen->ptr = (unsigned char *)inst;
  9542  		_jit_regs_commit(gen, &regs);
  9543  	}
  9544  }
  9545  break;
  9546  
  9547  case JIT_OP_LNE:
  9548  {
  9549  	unsigned char * inst;
  9550  	_jit_regs_t regs;
  9551  	int reg, reg2, reg3;
  9552  	jit_nint imm_value;
  9553  	jit_nint local_offset;
  9554  	if(insn->value2->is_nint_constant && insn->value2->address == 0)
  9555  	{
  9556  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9557  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9558  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9559  		_jit_regs_begin(gen, &regs, 32);
  9560  		inst = (unsigned char *)(gen->ptr);
  9561  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9562  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9563  		{
  9564  			x86_64_test_reg_reg_size(inst, reg2, reg2, 8);
  9565  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  9566  		}
  9567  		gen->ptr = (unsigned char *)inst;
  9568  		_jit_regs_commit(gen, &regs);
  9569  	}
  9570  	else if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9571  	{
  9572  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9573  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9574  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9575  		_jit_regs_begin(gen, &regs, 32);
  9576  		inst = (unsigned char *)(gen->ptr);
  9577  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9578  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9579  		imm_value = insn->value2->address;
  9580  		{
  9581  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9582  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  9583  		}
  9584  		gen->ptr = (unsigned char *)inst;
  9585  		_jit_regs_commit(gen, &regs);
  9586  	}
  9587  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9588  	{
  9589  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9590  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9591  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9592  		_jit_gen_fix_value(insn->value2);
  9593  		_jit_regs_begin(gen, &regs, 32);
  9594  		inst = (unsigned char *)(gen->ptr);
  9595  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9596  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9597  		local_offset = insn->value2->frame_offset;
  9598  		{
  9599  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9600  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  9601  		}
  9602  		gen->ptr = (unsigned char *)inst;
  9603  		_jit_regs_commit(gen, &regs);
  9604  	}
  9605  	else
  9606  	{
  9607  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
  9608  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9609  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9610  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9611  		_jit_regs_begin(gen, &regs, 32);
  9612  		inst = (unsigned char *)(gen->ptr);
  9613  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9614  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9615  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9616  		{
  9617  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9618  			inst = setcc_reg(inst, reg, X86_CC_NE, 0);
  9619  		}
  9620  		gen->ptr = (unsigned char *)inst;
  9621  		_jit_regs_commit(gen, &regs);
  9622  	}
  9623  }
  9624  break;
  9625  
  9626  case JIT_OP_LLT:
  9627  {
  9628  	unsigned char * inst;
  9629  	_jit_regs_t regs;
  9630  	int reg, reg2, reg3;
  9631  	jit_nint imm_value;
  9632  	jit_nint local_offset;
  9633  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9634  	{
  9635  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9636  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9637  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9638  		_jit_regs_begin(gen, &regs, 32);
  9639  		inst = (unsigned char *)(gen->ptr);
  9640  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9641  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9642  		imm_value = insn->value2->address;
  9643  		{
  9644  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9645  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  9646  		}
  9647  		gen->ptr = (unsigned char *)inst;
  9648  		_jit_regs_commit(gen, &regs);
  9649  	}
  9650  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9651  	{
  9652  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9653  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9654  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9655  		_jit_gen_fix_value(insn->value2);
  9656  		_jit_regs_begin(gen, &regs, 32);
  9657  		inst = (unsigned char *)(gen->ptr);
  9658  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9659  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9660  		local_offset = insn->value2->frame_offset;
  9661  		{
  9662  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9663  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  9664  		}
  9665  		gen->ptr = (unsigned char *)inst;
  9666  		_jit_regs_commit(gen, &regs);
  9667  	}
  9668  	else
  9669  	{
  9670  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9671  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9672  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9673  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9674  		_jit_regs_begin(gen, &regs, 32);
  9675  		inst = (unsigned char *)(gen->ptr);
  9676  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9677  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9678  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9679  		{
  9680  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9681  			inst = setcc_reg(inst, reg, X86_CC_LT, 1);
  9682  		}
  9683  		gen->ptr = (unsigned char *)inst;
  9684  		_jit_regs_commit(gen, &regs);
  9685  	}
  9686  }
  9687  break;
  9688  
  9689  case JIT_OP_LLT_UN:
  9690  {
  9691  	unsigned char * inst;
  9692  	_jit_regs_t regs;
  9693  	int reg, reg2, reg3;
  9694  	jit_nint imm_value;
  9695  	jit_nint local_offset;
  9696  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9697  	{
  9698  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9699  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9700  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9701  		_jit_regs_begin(gen, &regs, 32);
  9702  		inst = (unsigned char *)(gen->ptr);
  9703  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9704  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9705  		imm_value = insn->value2->address;
  9706  		{
  9707  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9708  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9709  		}
  9710  		gen->ptr = (unsigned char *)inst;
  9711  		_jit_regs_commit(gen, &regs);
  9712  	}
  9713  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9714  	{
  9715  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9716  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9717  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9718  		_jit_gen_fix_value(insn->value2);
  9719  		_jit_regs_begin(gen, &regs, 32);
  9720  		inst = (unsigned char *)(gen->ptr);
  9721  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9722  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9723  		local_offset = insn->value2->frame_offset;
  9724  		{
  9725  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9726  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9727  		}
  9728  		gen->ptr = (unsigned char *)inst;
  9729  		_jit_regs_commit(gen, &regs);
  9730  	}
  9731  	else
  9732  	{
  9733  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9734  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9735  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9736  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9737  		_jit_regs_begin(gen, &regs, 32);
  9738  		inst = (unsigned char *)(gen->ptr);
  9739  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9740  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9741  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9742  		{
  9743  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9744  			inst = setcc_reg(inst, reg, X86_CC_LT, 0);
  9745  		}
  9746  		gen->ptr = (unsigned char *)inst;
  9747  		_jit_regs_commit(gen, &regs);
  9748  	}
  9749  }
  9750  break;
  9751  
  9752  case JIT_OP_LLE:
  9753  {
  9754  	unsigned char * inst;
  9755  	_jit_regs_t regs;
  9756  	int reg, reg2, reg3;
  9757  	jit_nint imm_value;
  9758  	jit_nint local_offset;
  9759  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9760  	{
  9761  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9762  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9763  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9764  		_jit_regs_begin(gen, &regs, 32);
  9765  		inst = (unsigned char *)(gen->ptr);
  9766  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9767  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9768  		imm_value = insn->value2->address;
  9769  		{
  9770  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9771  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9772  		}
  9773  		gen->ptr = (unsigned char *)inst;
  9774  		_jit_regs_commit(gen, &regs);
  9775  	}
  9776  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9777  	{
  9778  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9779  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9780  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9781  		_jit_gen_fix_value(insn->value2);
  9782  		_jit_regs_begin(gen, &regs, 32);
  9783  		inst = (unsigned char *)(gen->ptr);
  9784  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9785  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9786  		local_offset = insn->value2->frame_offset;
  9787  		{
  9788  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9789  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9790  		}
  9791  		gen->ptr = (unsigned char *)inst;
  9792  		_jit_regs_commit(gen, &regs);
  9793  	}
  9794  	else
  9795  	{
  9796  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9797  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9798  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9799  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9800  		_jit_regs_begin(gen, &regs, 32);
  9801  		inst = (unsigned char *)(gen->ptr);
  9802  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9803  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9804  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9805  		{
  9806  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9807  			inst = setcc_reg(inst, reg, X86_CC_LE, 1);
  9808  		}
  9809  		gen->ptr = (unsigned char *)inst;
  9810  		_jit_regs_commit(gen, &regs);
  9811  	}
  9812  }
  9813  break;
  9814  
  9815  case JIT_OP_LLE_UN:
  9816  {
  9817  	unsigned char * inst;
  9818  	_jit_regs_t regs;
  9819  	int reg, reg2, reg3;
  9820  	jit_nint imm_value;
  9821  	jit_nint local_offset;
  9822  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9823  	{
  9824  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9825  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9826  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9827  		_jit_regs_begin(gen, &regs, 32);
  9828  		inst = (unsigned char *)(gen->ptr);
  9829  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9830  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9831  		imm_value = insn->value2->address;
  9832  		{
  9833  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9834  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9835  		}
  9836  		gen->ptr = (unsigned char *)inst;
  9837  		_jit_regs_commit(gen, &regs);
  9838  	}
  9839  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9840  	{
  9841  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9842  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9843  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9844  		_jit_gen_fix_value(insn->value2);
  9845  		_jit_regs_begin(gen, &regs, 32);
  9846  		inst = (unsigned char *)(gen->ptr);
  9847  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9848  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9849  		local_offset = insn->value2->frame_offset;
  9850  		{
  9851  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9852  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9853  		}
  9854  		gen->ptr = (unsigned char *)inst;
  9855  		_jit_regs_commit(gen, &regs);
  9856  	}
  9857  	else
  9858  	{
  9859  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9860  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9861  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9862  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9863  		_jit_regs_begin(gen, &regs, 32);
  9864  		inst = (unsigned char *)(gen->ptr);
  9865  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9866  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9867  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9868  		{
  9869  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9870  			inst = setcc_reg(inst, reg, X86_CC_LE, 0);
  9871  		}
  9872  		gen->ptr = (unsigned char *)inst;
  9873  		_jit_regs_commit(gen, &regs);
  9874  	}
  9875  }
  9876  break;
  9877  
  9878  case JIT_OP_LGT:
  9879  {
  9880  	unsigned char * inst;
  9881  	_jit_regs_t regs;
  9882  	int reg, reg2, reg3;
  9883  	jit_nint imm_value;
  9884  	jit_nint local_offset;
  9885  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9886  	{
  9887  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9888  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9889  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9890  		_jit_regs_begin(gen, &regs, 32);
  9891  		inst = (unsigned char *)(gen->ptr);
  9892  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9893  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9894  		imm_value = insn->value2->address;
  9895  		{
  9896  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9897  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9898  		}
  9899  		gen->ptr = (unsigned char *)inst;
  9900  		_jit_regs_commit(gen, &regs);
  9901  	}
  9902  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9903  	{
  9904  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9905  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9906  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9907  		_jit_gen_fix_value(insn->value2);
  9908  		_jit_regs_begin(gen, &regs, 32);
  9909  		inst = (unsigned char *)(gen->ptr);
  9910  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9911  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9912  		local_offset = insn->value2->frame_offset;
  9913  		{
  9914  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9915  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9916  		}
  9917  		gen->ptr = (unsigned char *)inst;
  9918  		_jit_regs_commit(gen, &regs);
  9919  	}
  9920  	else
  9921  	{
  9922  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9923  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9924  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9925  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9926  		_jit_regs_begin(gen, &regs, 32);
  9927  		inst = (unsigned char *)(gen->ptr);
  9928  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9929  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9930  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9931  		{
  9932  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9933  			inst = setcc_reg(inst, reg, X86_CC_GT, 1);
  9934  		}
  9935  		gen->ptr = (unsigned char *)inst;
  9936  		_jit_regs_commit(gen, &regs);
  9937  	}
  9938  }
  9939  break;
  9940  
  9941  case JIT_OP_LGT_UN:
  9942  {
  9943  	unsigned char * inst;
  9944  	_jit_regs_t regs;
  9945  	int reg, reg2, reg3;
  9946  	jit_nint imm_value;
  9947  	jit_nint local_offset;
  9948  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
  9949  	{
  9950  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9951  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9952  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9953  		_jit_regs_begin(gen, &regs, 32);
  9954  		inst = (unsigned char *)(gen->ptr);
  9955  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9956  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9957  		imm_value = insn->value2->address;
  9958  		{
  9959  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
  9960  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9961  		}
  9962  		gen->ptr = (unsigned char *)inst;
  9963  		_jit_regs_commit(gen, &regs);
  9964  	}
  9965  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
  9966  	{
  9967  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9968  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9969  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9970  		_jit_gen_fix_value(insn->value2);
  9971  		_jit_regs_begin(gen, &regs, 32);
  9972  		inst = (unsigned char *)(gen->ptr);
  9973  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9974  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9975  		local_offset = insn->value2->frame_offset;
  9976  		{
  9977  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
  9978  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9979  		}
  9980  		gen->ptr = (unsigned char *)inst;
  9981  		_jit_regs_commit(gen, &regs);
  9982  	}
  9983  	else
  9984  	{
  9985  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
  9986  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
  9987  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
  9988  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
  9989  		_jit_regs_begin(gen, &regs, 32);
  9990  		inst = (unsigned char *)(gen->ptr);
  9991  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
  9992  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
  9993  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
  9994  		{
  9995  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
  9996  			inst = setcc_reg(inst, reg, X86_CC_GT, 0);
  9997  		}
  9998  		gen->ptr = (unsigned char *)inst;
  9999  		_jit_regs_commit(gen, &regs);
 10000  	}
 10001  }
 10002  break;
 10003  
 10004  case JIT_OP_LGE:
 10005  {
 10006  	unsigned char * inst;
 10007  	_jit_regs_t regs;
 10008  	int reg, reg2, reg3;
 10009  	jit_nint imm_value;
 10010  	jit_nint local_offset;
 10011  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
 10012  	{
 10013  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10014  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10015  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10016  		_jit_regs_begin(gen, &regs, 32);
 10017  		inst = (unsigned char *)(gen->ptr);
 10018  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10019  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10020  		imm_value = insn->value2->address;
 10021  		{
 10022  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
 10023  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
 10024  		}
 10025  		gen->ptr = (unsigned char *)inst;
 10026  		_jit_regs_commit(gen, &regs);
 10027  	}
 10028  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 10029  	{
 10030  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10031  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10032  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10033  		_jit_gen_fix_value(insn->value2);
 10034  		_jit_regs_begin(gen, &regs, 32);
 10035  		inst = (unsigned char *)(gen->ptr);
 10036  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10037  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10038  		local_offset = insn->value2->frame_offset;
 10039  		{
 10040  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
 10041  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
 10042  		}
 10043  		gen->ptr = (unsigned char *)inst;
 10044  		_jit_regs_commit(gen, &regs);
 10045  	}
 10046  	else
 10047  	{
 10048  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10049  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10050  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10051  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 10052  		_jit_regs_begin(gen, &regs, 32);
 10053  		inst = (unsigned char *)(gen->ptr);
 10054  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10055  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10056  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10057  		{
 10058  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
 10059  			inst = setcc_reg(inst, reg, X86_CC_GE, 1);
 10060  		}
 10061  		gen->ptr = (unsigned char *)inst;
 10062  		_jit_regs_commit(gen, &regs);
 10063  	}
 10064  }
 10065  break;
 10066  
 10067  case JIT_OP_LGE_UN:
 10068  {
 10069  	unsigned char * inst;
 10070  	_jit_regs_t regs;
 10071  	int reg, reg2, reg3;
 10072  	jit_nint imm_value;
 10073  	jit_nint local_offset;
 10074  	if(insn->value2->is_nint_constant && insn->value2->address >= -2147483648 && insn->value2->address <= 2147483647)
 10075  	{
 10076  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10077  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10078  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10079  		_jit_regs_begin(gen, &regs, 32);
 10080  		inst = (unsigned char *)(gen->ptr);
 10081  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10082  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10083  		imm_value = insn->value2->address;
 10084  		{
 10085  			x86_64_cmp_reg_imm_size(inst, reg2, imm_value, 8);
 10086  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
 10087  		}
 10088  		gen->ptr = (unsigned char *)inst;
 10089  		_jit_regs_commit(gen, &regs);
 10090  	}
 10091  	else if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 10092  	{
 10093  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10094  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10095  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10096  		_jit_gen_fix_value(insn->value2);
 10097  		_jit_regs_begin(gen, &regs, 32);
 10098  		inst = (unsigned char *)(gen->ptr);
 10099  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10100  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10101  		local_offset = insn->value2->frame_offset;
 10102  		{
 10103  			x86_64_cmp_reg_membase_size(inst, reg2, X86_64_RBP, local_offset, 8);
 10104  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
 10105  		}
 10106  		gen->ptr = (unsigned char *)inst;
 10107  		_jit_regs_commit(gen, &regs);
 10108  	}
 10109  	else
 10110  	{
 10111  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10112  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 10113  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 10114  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 10115  		_jit_regs_begin(gen, &regs, 32);
 10116  		inst = (unsigned char *)(gen->ptr);
 10117  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10118  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10119  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10120  		{
 10121  			x86_64_cmp_reg_reg_size(inst, reg2, reg3, 8);
 10122  			inst = setcc_reg(inst, reg, X86_CC_GE, 0);
 10123  		}
 10124  		gen->ptr = (unsigned char *)inst;
 10125  		_jit_regs_commit(gen, &regs);
 10126  	}
 10127  }
 10128  break;
 10129  
 10130  case JIT_OP_FEQ:
 10131  {
 10132  	unsigned char * inst;
 10133  	_jit_regs_t regs;
 10134  	int reg, reg2, reg3, reg4;
 10135  	jit_nint imm_value;
 10136  	if(insn->value2->is_constant)
 10137  	{
 10138  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10139  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10140  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10141  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10142  		_jit_regs_begin(gen, &regs, (23));
 10143  		inst = (unsigned char *)(gen->ptr);
 10144  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10145  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10146  		imm_value = insn->value2->address;
 10147  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10148  		{
 10149  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_Z, reg2, (void *)imm_value, reg3, 0, 0);
 10150  		}
 10151  		gen->ptr = (unsigned char *)inst;
 10152  		_jit_regs_commit(gen, &regs);
 10153  	}
 10154  	else
 10155  	{
 10156  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10157  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10158  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10159  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10160  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10161  		_jit_regs_begin(gen, &regs, (20));
 10162  		inst = (unsigned char *)(gen->ptr);
 10163  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10164  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10165  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10166  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10167  		{
 10168  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_Z, reg2, reg3, reg4, 0, 0);
 10169  		}
 10170  		gen->ptr = (unsigned char *)inst;
 10171  		_jit_regs_commit(gen, &regs);
 10172  	}
 10173  }
 10174  break;
 10175  
 10176  case JIT_OP_FNE:
 10177  {
 10178  	unsigned char * inst;
 10179  	_jit_regs_t regs;
 10180  	int reg, reg2, reg3, reg4;
 10181  	jit_nint imm_value;
 10182  	if(insn->value2->is_constant)
 10183  	{
 10184  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10185  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10186  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10187  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10188  		_jit_regs_begin(gen, &regs, (23));
 10189  		inst = (unsigned char *)(gen->ptr);
 10190  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10191  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10192  		imm_value = insn->value2->address;
 10193  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10194  		{
 10195  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NZ, reg2, (void *)imm_value, reg3, 0, 1);
 10196  		}
 10197  		gen->ptr = (unsigned char *)inst;
 10198  		_jit_regs_commit(gen, &regs);
 10199  	}
 10200  	else
 10201  	{
 10202  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10203  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10204  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10205  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10206  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10207  		_jit_regs_begin(gen, &regs, (20));
 10208  		inst = (unsigned char *)(gen->ptr);
 10209  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10210  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10211  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10212  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10213  		{
 10214  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NZ, reg2, reg3, reg4, 0, 1);
 10215  		}
 10216  		gen->ptr = (unsigned char *)inst;
 10217  		_jit_regs_commit(gen, &regs);
 10218  	}
 10219  }
 10220  break;
 10221  
 10222  case JIT_OP_FLT:
 10223  {
 10224  	unsigned char * inst;
 10225  	_jit_regs_t regs;
 10226  	int reg, reg2, reg3, reg4;
 10227  	jit_nint imm_value;
 10228  	if(insn->value2->is_constant)
 10229  	{
 10230  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10231  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10232  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10233  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10234  		_jit_regs_begin(gen, &regs, (23));
 10235  		inst = (unsigned char *)(gen->ptr);
 10236  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10237  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10238  		imm_value = insn->value2->address;
 10239  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10240  		{
 10241  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_C, reg2, (void *)imm_value, reg3, 0, 0);
 10242  		}
 10243  		gen->ptr = (unsigned char *)inst;
 10244  		_jit_regs_commit(gen, &regs);
 10245  	}
 10246  	else
 10247  	{
 10248  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10249  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10250  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10251  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10252  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10253  		_jit_regs_begin(gen, &regs, (20));
 10254  		inst = (unsigned char *)(gen->ptr);
 10255  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10256  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10257  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10258  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10259  		{
 10260  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_C, reg2, reg3, reg4, 0, 0);
 10261  		}
 10262  		gen->ptr = (unsigned char *)inst;
 10263  		_jit_regs_commit(gen, &regs);
 10264  	}
 10265  }
 10266  break;
 10267  
 10268  case JIT_OP_FLT_INV:
 10269  {
 10270  	unsigned char * inst;
 10271  	_jit_regs_t regs;
 10272  	int reg, reg2, reg3, reg4;
 10273  	jit_nint imm_value;
 10274  	if(insn->value2->is_constant)
 10275  	{
 10276  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10277  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10278  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10279  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10280  		_jit_regs_begin(gen, &regs, (23));
 10281  		inst = (unsigned char *)(gen->ptr);
 10282  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10283  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10284  		imm_value = insn->value2->address;
 10285  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10286  		{
 10287  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_C, reg2, (void *)imm_value, reg3, 0, 1);
 10288  		}
 10289  		gen->ptr = (unsigned char *)inst;
 10290  		_jit_regs_commit(gen, &regs);
 10291  	}
 10292  	else
 10293  	{
 10294  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10295  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10296  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10297  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10298  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10299  		_jit_regs_begin(gen, &regs, (20));
 10300  		inst = (unsigned char *)(gen->ptr);
 10301  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10302  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10303  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10304  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10305  		{
 10306  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_C, reg2, reg3, reg4, 0, 1);
 10307  		}
 10308  		gen->ptr = (unsigned char *)inst;
 10309  		_jit_regs_commit(gen, &regs);
 10310  	}
 10311  }
 10312  break;
 10313  
 10314  case JIT_OP_FLE:
 10315  {
 10316  	unsigned char * inst;
 10317  	_jit_regs_t regs;
 10318  	int reg, reg2, reg3, reg4;
 10319  	jit_nint imm_value;
 10320  	if(insn->value2->is_constant)
 10321  	{
 10322  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10323  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10324  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10325  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10326  		_jit_regs_begin(gen, &regs, (23));
 10327  		inst = (unsigned char *)(gen->ptr);
 10328  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10329  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10330  		imm_value = insn->value2->address;
 10331  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10332  		{
 10333  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_BE, reg2, (void *)imm_value, reg3, 0, 0);
 10334  		}
 10335  		gen->ptr = (unsigned char *)inst;
 10336  		_jit_regs_commit(gen, &regs);
 10337  	}
 10338  	else
 10339  	{
 10340  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10341  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10342  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10343  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10344  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10345  		_jit_regs_begin(gen, &regs, (20));
 10346  		inst = (unsigned char *)(gen->ptr);
 10347  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10348  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10349  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10350  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10351  		{
 10352  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_BE, reg2, reg3, reg4, 0, 0);
 10353  		}
 10354  		gen->ptr = (unsigned char *)inst;
 10355  		_jit_regs_commit(gen, &regs);
 10356  	}
 10357  }
 10358  break;
 10359  
 10360  case JIT_OP_FLE_INV:
 10361  {
 10362  	unsigned char * inst;
 10363  	_jit_regs_t regs;
 10364  	int reg, reg2, reg3, reg4;
 10365  	jit_nint imm_value;
 10366  	if(insn->value2->is_constant)
 10367  	{
 10368  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10369  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10370  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10371  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10372  		_jit_regs_begin(gen, &regs, (23));
 10373  		inst = (unsigned char *)(gen->ptr);
 10374  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10375  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10376  		imm_value = insn->value2->address;
 10377  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10378  		{
 10379  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_BE, reg2, (void *)imm_value, reg3, 0, 1);
 10380  		}
 10381  		gen->ptr = (unsigned char *)inst;
 10382  		_jit_regs_commit(gen, &regs);
 10383  	}
 10384  	else
 10385  	{
 10386  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10387  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10388  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10389  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10390  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10391  		_jit_regs_begin(gen, &regs, (20));
 10392  		inst = (unsigned char *)(gen->ptr);
 10393  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10394  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10395  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10396  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10397  		{
 10398  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_BE, reg2, reg3, reg4, 0, 1);
 10399  		}
 10400  		gen->ptr = (unsigned char *)inst;
 10401  		_jit_regs_commit(gen, &regs);
 10402  	}
 10403  }
 10404  break;
 10405  
 10406  case JIT_OP_FGT:
 10407  {
 10408  	unsigned char * inst;
 10409  	_jit_regs_t regs;
 10410  	int reg, reg2, reg3, reg4;
 10411  	jit_nint imm_value;
 10412  	if(insn->value2->is_constant)
 10413  	{
 10414  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10415  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10416  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10417  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10418  		_jit_regs_begin(gen, &regs, (23));
 10419  		inst = (unsigned char *)(gen->ptr);
 10420  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10421  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10422  		imm_value = insn->value2->address;
 10423  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10424  		{
 10425  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NBE, reg2, (void *)imm_value, reg3, 0, 0);
 10426  		}
 10427  		gen->ptr = (unsigned char *)inst;
 10428  		_jit_regs_commit(gen, &regs);
 10429  	}
 10430  	else
 10431  	{
 10432  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10433  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10434  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10435  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10436  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10437  		_jit_regs_begin(gen, &regs, (20));
 10438  		inst = (unsigned char *)(gen->ptr);
 10439  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10440  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10441  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10442  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10443  		{
 10444  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NBE, reg2, reg3, reg4, 0, 0);
 10445  		}
 10446  		gen->ptr = (unsigned char *)inst;
 10447  		_jit_regs_commit(gen, &regs);
 10448  	}
 10449  }
 10450  break;
 10451  
 10452  case JIT_OP_FGT_INV:
 10453  {
 10454  	unsigned char * inst;
 10455  	_jit_regs_t regs;
 10456  	int reg, reg2, reg3, reg4;
 10457  	jit_nint imm_value;
 10458  	if(insn->value2->is_constant)
 10459  	{
 10460  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10461  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10462  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10463  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10464  		_jit_regs_begin(gen, &regs, (23));
 10465  		inst = (unsigned char *)(gen->ptr);
 10466  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10467  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10468  		imm_value = insn->value2->address;
 10469  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10470  		{
 10471  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NBE, reg2, (void *)imm_value, reg3, 0, 1);
 10472  		}
 10473  		gen->ptr = (unsigned char *)inst;
 10474  		_jit_regs_commit(gen, &regs);
 10475  	}
 10476  	else
 10477  	{
 10478  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10479  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10480  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10481  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10482  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10483  		_jit_regs_begin(gen, &regs, (20));
 10484  		inst = (unsigned char *)(gen->ptr);
 10485  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10486  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10487  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10488  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10489  		{
 10490  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NBE, reg2, reg3, reg4, 0, 1);
 10491  		}
 10492  		gen->ptr = (unsigned char *)inst;
 10493  		_jit_regs_commit(gen, &regs);
 10494  	}
 10495  }
 10496  break;
 10497  
 10498  case JIT_OP_FGE:
 10499  {
 10500  	unsigned char * inst;
 10501  	_jit_regs_t regs;
 10502  	int reg, reg2, reg3, reg4;
 10503  	jit_nint imm_value;
 10504  	if(insn->value2->is_constant)
 10505  	{
 10506  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10507  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10508  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10509  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10510  		_jit_regs_begin(gen, &regs, (23));
 10511  		inst = (unsigned char *)(gen->ptr);
 10512  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10513  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10514  		imm_value = insn->value2->address;
 10515  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10516  		{
 10517  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NC, reg2, (void *)imm_value, reg3, 0, 0);
 10518  		}
 10519  		gen->ptr = (unsigned char *)inst;
 10520  		_jit_regs_commit(gen, &regs);
 10521  	}
 10522  	else
 10523  	{
 10524  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10525  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10526  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10527  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10528  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10529  		_jit_regs_begin(gen, &regs, (20));
 10530  		inst = (unsigned char *)(gen->ptr);
 10531  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10532  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10533  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10534  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10535  		{
 10536  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NC, reg2, reg3, reg4, 0, 0);
 10537  		}
 10538  		gen->ptr = (unsigned char *)inst;
 10539  		_jit_regs_commit(gen, &regs);
 10540  	}
 10541  }
 10542  break;
 10543  
 10544  case JIT_OP_FGE_INV:
 10545  {
 10546  	unsigned char * inst;
 10547  	_jit_regs_t regs;
 10548  	int reg, reg2, reg3, reg4;
 10549  	jit_nint imm_value;
 10550  	if(insn->value2->is_constant)
 10551  	{
 10552  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10553  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10554  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10555  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10556  		_jit_regs_begin(gen, &regs, (23));
 10557  		inst = (unsigned char *)(gen->ptr);
 10558  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10559  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10560  		imm_value = insn->value2->address;
 10561  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10562  		{
 10563  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NC, reg2, (void *)imm_value, reg3, 0, 1);
 10564  		}
 10565  		gen->ptr = (unsigned char *)inst;
 10566  		_jit_regs_commit(gen, &regs);
 10567  	}
 10568  	else
 10569  	{
 10570  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10571  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10572  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10573  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10574  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10575  		_jit_regs_begin(gen, &regs, (20));
 10576  		inst = (unsigned char *)(gen->ptr);
 10577  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10578  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10579  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10580  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10581  		{
 10582  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NC, reg2, reg3, reg4, 0, 1);
 10583  		}
 10584  		gen->ptr = (unsigned char *)inst;
 10585  		_jit_regs_commit(gen, &regs);
 10586  	}
 10587  }
 10588  break;
 10589  
 10590  case JIT_OP_DEQ:
 10591  {
 10592  	unsigned char * inst;
 10593  	_jit_regs_t regs;
 10594  	int reg, reg2, reg3, reg4;
 10595  	jit_nint imm_value;
 10596  	if(insn->value2->is_constant)
 10597  	{
 10598  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10599  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10600  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10601  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10602  		_jit_regs_begin(gen, &regs, (24));
 10603  		inst = (unsigned char *)(gen->ptr);
 10604  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10605  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10606  		imm_value = insn->value2->address;
 10607  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10608  		{
 10609  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_Z, reg2, (void *)imm_value, reg3, 1, 0);
 10610  		}
 10611  		gen->ptr = (unsigned char *)inst;
 10612  		_jit_regs_commit(gen, &regs);
 10613  	}
 10614  	else
 10615  	{
 10616  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10617  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10618  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10619  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10620  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10621  		_jit_regs_begin(gen, &regs, (20));
 10622  		inst = (unsigned char *)(gen->ptr);
 10623  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10624  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10625  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10626  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10627  		{
 10628  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_Z, reg2, reg3, reg4, 1, 0);
 10629  		}
 10630  		gen->ptr = (unsigned char *)inst;
 10631  		_jit_regs_commit(gen, &regs);
 10632  	}
 10633  }
 10634  break;
 10635  
 10636  case JIT_OP_DNE:
 10637  {
 10638  	unsigned char * inst;
 10639  	_jit_regs_t regs;
 10640  	int reg, reg2, reg3, reg4;
 10641  	jit_nint imm_value;
 10642  	if(insn->value2->is_constant)
 10643  	{
 10644  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10645  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10646  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10647  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10648  		_jit_regs_begin(gen, &regs, (24));
 10649  		inst = (unsigned char *)(gen->ptr);
 10650  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10651  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10652  		imm_value = insn->value2->address;
 10653  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10654  		{
 10655  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NZ, reg2, (void *)imm_value, reg3, 1, 1);
 10656  		}
 10657  		gen->ptr = (unsigned char *)inst;
 10658  		_jit_regs_commit(gen, &regs);
 10659  	}
 10660  	else
 10661  	{
 10662  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST | _JIT_REGS_COMMUTATIVE);
 10663  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10664  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10665  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10666  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10667  		_jit_regs_begin(gen, &regs, (20));
 10668  		inst = (unsigned char *)(gen->ptr);
 10669  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10670  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10671  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10672  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10673  		{
 10674  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NZ, reg2, reg3, reg4, 1, 1);
 10675  		}
 10676  		gen->ptr = (unsigned char *)inst;
 10677  		_jit_regs_commit(gen, &regs);
 10678  	}
 10679  }
 10680  break;
 10681  
 10682  case JIT_OP_DLT:
 10683  {
 10684  	unsigned char * inst;
 10685  	_jit_regs_t regs;
 10686  	int reg, reg2, reg3, reg4;
 10687  	jit_nint imm_value;
 10688  	if(insn->value2->is_constant)
 10689  	{
 10690  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10691  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10692  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10693  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10694  		_jit_regs_begin(gen, &regs, (24));
 10695  		inst = (unsigned char *)(gen->ptr);
 10696  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10697  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10698  		imm_value = insn->value2->address;
 10699  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10700  		{
 10701  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_C, reg2, (void *)imm_value, reg3, 1, 0);
 10702  		}
 10703  		gen->ptr = (unsigned char *)inst;
 10704  		_jit_regs_commit(gen, &regs);
 10705  	}
 10706  	else
 10707  	{
 10708  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10709  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10710  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10711  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10712  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10713  		_jit_regs_begin(gen, &regs, (20));
 10714  		inst = (unsigned char *)(gen->ptr);
 10715  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10716  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10717  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10718  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10719  		{
 10720  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_C, reg2, reg3, reg4, 1, 0);
 10721  		}
 10722  		gen->ptr = (unsigned char *)inst;
 10723  		_jit_regs_commit(gen, &regs);
 10724  	}
 10725  }
 10726  break;
 10727  
 10728  case JIT_OP_DLT_INV:
 10729  {
 10730  	unsigned char * inst;
 10731  	_jit_regs_t regs;
 10732  	int reg, reg2, reg3, reg4;
 10733  	jit_nint imm_value;
 10734  	if(insn->value2->is_constant)
 10735  	{
 10736  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10737  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10738  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10739  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10740  		_jit_regs_begin(gen, &regs, (24));
 10741  		inst = (unsigned char *)(gen->ptr);
 10742  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10743  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10744  		imm_value = insn->value2->address;
 10745  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10746  		{
 10747  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_C, reg2, (void *)imm_value, reg3, 1, 1);
 10748  		}
 10749  		gen->ptr = (unsigned char *)inst;
 10750  		_jit_regs_commit(gen, &regs);
 10751  	}
 10752  	else
 10753  	{
 10754  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10755  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10756  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10757  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10758  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10759  		_jit_regs_begin(gen, &regs, (20));
 10760  		inst = (unsigned char *)(gen->ptr);
 10761  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10762  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10763  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10764  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10765  		{
 10766  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_C, reg2, reg3, reg4, 1, 1);
 10767  		}
 10768  		gen->ptr = (unsigned char *)inst;
 10769  		_jit_regs_commit(gen, &regs);
 10770  	}
 10771  }
 10772  break;
 10773  
 10774  case JIT_OP_DLE:
 10775  {
 10776  	unsigned char * inst;
 10777  	_jit_regs_t regs;
 10778  	int reg, reg2, reg3, reg4;
 10779  	jit_nint imm_value;
 10780  	if(insn->value2->is_constant)
 10781  	{
 10782  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10783  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10784  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10785  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10786  		_jit_regs_begin(gen, &regs, (24));
 10787  		inst = (unsigned char *)(gen->ptr);
 10788  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10789  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10790  		imm_value = insn->value2->address;
 10791  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10792  		{
 10793  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_BE, reg2, (void *)imm_value, reg3, 1, 0);
 10794  		}
 10795  		gen->ptr = (unsigned char *)inst;
 10796  		_jit_regs_commit(gen, &regs);
 10797  	}
 10798  	else
 10799  	{
 10800  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10801  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10802  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10803  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10804  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10805  		_jit_regs_begin(gen, &regs, (20));
 10806  		inst = (unsigned char *)(gen->ptr);
 10807  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10808  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10809  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10810  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10811  		{
 10812  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_BE, reg2, reg3, reg4, 1, 0);
 10813  		}
 10814  		gen->ptr = (unsigned char *)inst;
 10815  		_jit_regs_commit(gen, &regs);
 10816  	}
 10817  }
 10818  break;
 10819  
 10820  case JIT_OP_DLE_INV:
 10821  {
 10822  	unsigned char * inst;
 10823  	_jit_regs_t regs;
 10824  	int reg, reg2, reg3, reg4;
 10825  	jit_nint imm_value;
 10826  	if(insn->value2->is_constant)
 10827  	{
 10828  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10829  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10830  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10831  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10832  		_jit_regs_begin(gen, &regs, (24));
 10833  		inst = (unsigned char *)(gen->ptr);
 10834  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10835  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10836  		imm_value = insn->value2->address;
 10837  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10838  		{
 10839  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_BE, reg2, (void *)imm_value, reg3, 1, 1);
 10840  		}
 10841  		gen->ptr = (unsigned char *)inst;
 10842  		_jit_regs_commit(gen, &regs);
 10843  	}
 10844  	else
 10845  	{
 10846  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10847  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10848  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10849  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10850  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10851  		_jit_regs_begin(gen, &regs, (20));
 10852  		inst = (unsigned char *)(gen->ptr);
 10853  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10854  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10855  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10856  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10857  		{
 10858  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_BE, reg2, reg3, reg4, 1, 1);
 10859  		}
 10860  		gen->ptr = (unsigned char *)inst;
 10861  		_jit_regs_commit(gen, &regs);
 10862  	}
 10863  }
 10864  break;
 10865  
 10866  case JIT_OP_DGT:
 10867  {
 10868  	unsigned char * inst;
 10869  	_jit_regs_t regs;
 10870  	int reg, reg2, reg3, reg4;
 10871  	jit_nint imm_value;
 10872  	if(insn->value2->is_constant)
 10873  	{
 10874  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10875  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10876  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10877  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10878  		_jit_regs_begin(gen, &regs, (24));
 10879  		inst = (unsigned char *)(gen->ptr);
 10880  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10881  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10882  		imm_value = insn->value2->address;
 10883  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10884  		{
 10885  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NBE, reg2, (void *)imm_value, reg3, 1, 0);
 10886  		}
 10887  		gen->ptr = (unsigned char *)inst;
 10888  		_jit_regs_commit(gen, &regs);
 10889  	}
 10890  	else
 10891  	{
 10892  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10893  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10894  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10895  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10896  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10897  		_jit_regs_begin(gen, &regs, (20));
 10898  		inst = (unsigned char *)(gen->ptr);
 10899  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10900  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10901  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10902  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10903  		{
 10904  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NBE, reg2, reg3, reg4, 1, 0);
 10905  		}
 10906  		gen->ptr = (unsigned char *)inst;
 10907  		_jit_regs_commit(gen, &regs);
 10908  	}
 10909  }
 10910  break;
 10911  
 10912  case JIT_OP_DGT_INV:
 10913  {
 10914  	unsigned char * inst;
 10915  	_jit_regs_t regs;
 10916  	int reg, reg2, reg3, reg4;
 10917  	jit_nint imm_value;
 10918  	if(insn->value2->is_constant)
 10919  	{
 10920  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10921  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10922  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10923  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10924  		_jit_regs_begin(gen, &regs, (24));
 10925  		inst = (unsigned char *)(gen->ptr);
 10926  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10927  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10928  		imm_value = insn->value2->address;
 10929  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10930  		{
 10931  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NBE, reg2, (void *)imm_value, reg3, 1, 1);
 10932  		}
 10933  		gen->ptr = (unsigned char *)inst;
 10934  		_jit_regs_commit(gen, &regs);
 10935  	}
 10936  	else
 10937  	{
 10938  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10939  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10940  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10941  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10942  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10943  		_jit_regs_begin(gen, &regs, (20));
 10944  		inst = (unsigned char *)(gen->ptr);
 10945  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10946  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10947  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10948  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10949  		{
 10950  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NBE, reg2, reg3, reg4, 1, 1);
 10951  		}
 10952  		gen->ptr = (unsigned char *)inst;
 10953  		_jit_regs_commit(gen, &regs);
 10954  	}
 10955  }
 10956  break;
 10957  
 10958  case JIT_OP_DGE:
 10959  {
 10960  	unsigned char * inst;
 10961  	_jit_regs_t regs;
 10962  	int reg, reg2, reg3, reg4;
 10963  	jit_nint imm_value;
 10964  	if(insn->value2->is_constant)
 10965  	{
 10966  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10967  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10968  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10969  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10970  		_jit_regs_begin(gen, &regs, (24));
 10971  		inst = (unsigned char *)(gen->ptr);
 10972  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10973  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10974  		imm_value = insn->value2->address;
 10975  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10976  		{
 10977  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NC, reg2, (void *)imm_value, reg3, 1, 0);
 10978  		}
 10979  		gen->ptr = (unsigned char *)inst;
 10980  		_jit_regs_commit(gen, &regs);
 10981  	}
 10982  	else
 10983  	{
 10984  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 10985  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 10986  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 10987  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 10988  		_jit_regs_add_scratch(&regs, x86_64_reg);
 10989  		_jit_regs_begin(gen, &regs, (20));
 10990  		inst = (unsigned char *)(gen->ptr);
 10991  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 10992  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 10993  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 10994  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 10995  		{
 10996  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NC, reg2, reg3, reg4, 1, 0);
 10997  		}
 10998  		gen->ptr = (unsigned char *)inst;
 10999  		_jit_regs_commit(gen, &regs);
 11000  	}
 11001  }
 11002  break;
 11003  
 11004  case JIT_OP_DGE_INV:
 11005  {
 11006  	unsigned char * inst;
 11007  	_jit_regs_t regs;
 11008  	int reg, reg2, reg3, reg4;
 11009  	jit_nint imm_value;
 11010  	if(insn->value2->is_constant)
 11011  	{
 11012  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11013  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11014  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11015  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11016  		_jit_regs_begin(gen, &regs, (24));
 11017  		inst = (unsigned char *)(gen->ptr);
 11018  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11019  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11020  		imm_value = insn->value2->address;
 11021  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11022  		{
 11023  			inst = xmm_cmp_setcc_reg_imm(gen, inst, reg, X86_CC_NC, reg2, (void *)imm_value, reg3, 1, 1);
 11024  		}
 11025  		gen->ptr = (unsigned char *)inst;
 11026  		_jit_regs_commit(gen, &regs);
 11027  	}
 11028  	else
 11029  	{
 11030  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11031  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11032  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11033  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 11034  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11035  		_jit_regs_begin(gen, &regs, (20));
 11036  		inst = (unsigned char *)(gen->ptr);
 11037  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11038  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11039  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11040  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11041  		{
 11042  			inst = xmm_cmp_setcc_reg_reg(inst, reg, X86_CC_NC, reg2, reg3, reg4, 1, 1);
 11043  		}
 11044  		gen->ptr = (unsigned char *)inst;
 11045  		_jit_regs_commit(gen, &regs);
 11046  	}
 11047  }
 11048  break;
 11049  
 11050  case JIT_OP_FSQRT:
 11051  {
 11052  	unsigned char * inst;
 11053  	_jit_regs_t regs;
 11054  	int reg, reg2;
 11055  	jit_nint local_offset;
 11056  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11057  	{
 11058  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11059  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11060  		_jit_gen_fix_value(insn->value1);
 11061  		_jit_regs_begin(gen, &regs, 32);
 11062  		inst = (unsigned char *)(gen->ptr);
 11063  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11064  		local_offset = insn->value1->frame_offset;
 11065  		{
 11066  			x86_64_sqrtss_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11067  		}
 11068  		gen->ptr = (unsigned char *)inst;
 11069  		_jit_regs_commit(gen, &regs);
 11070  	}
 11071  	else
 11072  	{
 11073  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11074  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11075  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11076  		_jit_regs_begin(gen, &regs, 32);
 11077  		inst = (unsigned char *)(gen->ptr);
 11078  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11079  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11080  		{
 11081  			x86_64_sqrtss_reg_reg(inst, reg, reg2);
 11082  		}
 11083  		gen->ptr = (unsigned char *)inst;
 11084  		_jit_regs_commit(gen, &regs);
 11085  	}
 11086  }
 11087  break;
 11088  
 11089  case JIT_OP_DSQRT:
 11090  {
 11091  	unsigned char * inst;
 11092  	_jit_regs_t regs;
 11093  	int reg, reg2;
 11094  	jit_nint local_offset;
 11095  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11096  	{
 11097  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11098  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11099  		_jit_gen_fix_value(insn->value1);
 11100  		_jit_regs_begin(gen, &regs, 32);
 11101  		inst = (unsigned char *)(gen->ptr);
 11102  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11103  		local_offset = insn->value1->frame_offset;
 11104  		{
 11105  			x86_64_sqrtsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11106  		}
 11107  		gen->ptr = (unsigned char *)inst;
 11108  		_jit_regs_commit(gen, &regs);
 11109  	}
 11110  	else
 11111  	{
 11112  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11113  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11114  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11115  		_jit_regs_begin(gen, &regs, 32);
 11116  		inst = (unsigned char *)(gen->ptr);
 11117  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11118  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11119  		{
 11120  			x86_64_sqrtsd_reg_reg(inst, reg, reg2);
 11121  		}
 11122  		gen->ptr = (unsigned char *)inst;
 11123  		_jit_regs_commit(gen, &regs);
 11124  	}
 11125  }
 11126  break;
 11127  
 11128  case JIT_OP_IMAX:
 11129  {
 11130  	unsigned char * inst;
 11131  	_jit_regs_t regs;
 11132  	int reg, reg2;
 11133  	{
 11134  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11135  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11136  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11137  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11138  		_jit_regs_begin(gen, &regs, 32);
 11139  		inst = (unsigned char *)(gen->ptr);
 11140  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11141  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11142  		{
 11143  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
 11144  			x86_64_cmov_reg_reg_size(inst, X86_CC_LT, reg, reg2, 1, 4);
 11145  		}
 11146  		gen->ptr = (unsigned char *)inst;
 11147  		_jit_regs_commit(gen, &regs);
 11148  	}
 11149  }
 11150  break;
 11151  
 11152  case JIT_OP_IMAX_UN:
 11153  {
 11154  	unsigned char * inst;
 11155  	_jit_regs_t regs;
 11156  	int reg, reg2;
 11157  	{
 11158  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11159  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11160  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11161  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11162  		_jit_regs_begin(gen, &regs, 32);
 11163  		inst = (unsigned char *)(gen->ptr);
 11164  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11165  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11166  		{
 11167  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
 11168  			x86_64_cmov_reg_reg_size(inst, X86_CC_LT, reg, reg2, 0, 4);
 11169  		}
 11170  		gen->ptr = (unsigned char *)inst;
 11171  		_jit_regs_commit(gen, &regs);
 11172  	}
 11173  }
 11174  break;
 11175  
 11176  case JIT_OP_IMIN:
 11177  {
 11178  	unsigned char * inst;
 11179  	_jit_regs_t regs;
 11180  	int reg, reg2;
 11181  	{
 11182  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11183  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11184  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11185  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11186  		_jit_regs_begin(gen, &regs, 32);
 11187  		inst = (unsigned char *)(gen->ptr);
 11188  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11189  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11190  		{
 11191  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
 11192  			x86_64_cmov_reg_reg_size(inst, X86_CC_GT, reg, reg2, 1, 4);
 11193  		}
 11194  		gen->ptr = (unsigned char *)inst;
 11195  		_jit_regs_commit(gen, &regs);
 11196  	}
 11197  }
 11198  break;
 11199  
 11200  case JIT_OP_IMIN_UN:
 11201  {
 11202  	unsigned char * inst;
 11203  	_jit_regs_t regs;
 11204  	int reg, reg2;
 11205  	{
 11206  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11207  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11208  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11209  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11210  		_jit_regs_begin(gen, &regs, 32);
 11211  		inst = (unsigned char *)(gen->ptr);
 11212  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11213  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11214  		{
 11215  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 4);
 11216  			x86_64_cmov_reg_reg_size(inst, X86_CC_GT, reg, reg2, 0, 4);
 11217  		}
 11218  		gen->ptr = (unsigned char *)inst;
 11219  		_jit_regs_commit(gen, &regs);
 11220  	}
 11221  }
 11222  break;
 11223  
 11224  case JIT_OP_ISIGN:
 11225  {
 11226  	unsigned char * inst;
 11227  	_jit_regs_t regs;
 11228  	int reg, reg2;
 11229  	jit_nint imm_value;
 11230  	if(insn->value1->is_constant)
 11231  	{
 11232  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11233  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11234  		_jit_regs_begin(gen, &regs, 32);
 11235  		inst = (unsigned char *)(gen->ptr);
 11236  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11237  		imm_value = insn->value1->address;
 11238  		{
 11239  			if(imm_value < 0)
 11240  			{
 11241  				x86_64_mov_reg_imm_size(inst, reg, -1, 4);
 11242  			}
 11243  			else if(imm_value > 0)
 11244  			{
 11245  				x86_64_mov_reg_imm_size(inst, reg, 1, 4);
 11246  			}
 11247  			else
 11248  			{
 11249  				x86_64_clear_reg(inst, reg);
 11250  			}
 11251  		}
 11252  		gen->ptr = (unsigned char *)inst;
 11253  		_jit_regs_commit(gen, &regs);
 11254  	}
 11255  	else
 11256  	{
 11257  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11258  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11259  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11260  		_jit_regs_begin(gen, &regs, 32);
 11261  		inst = (unsigned char *)(gen->ptr);
 11262  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11263  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11264  		{
 11265  			x86_64_clear_reg(inst, reg);
 11266  			x86_64_test_reg_reg_size(inst, reg2, reg2, 4);
 11267  			x86_64_set_reg(inst, X86_CC_NZ, reg, 0);
 11268  			x86_64_sar_reg_imm_size(inst, reg2, 31, 4);
 11269  			x86_64_or_reg_reg_size(inst, reg, reg2, 4);
 11270  		}
 11271  		gen->ptr = (unsigned char *)inst;
 11272  		_jit_regs_commit(gen, &regs);
 11273  	}
 11274  }
 11275  break;
 11276  
 11277  case JIT_OP_LMAX:
 11278  {
 11279  	unsigned char * inst;
 11280  	_jit_regs_t regs;
 11281  	int reg, reg2;
 11282  	{
 11283  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11284  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11285  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11286  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11287  		_jit_regs_begin(gen, &regs, 32);
 11288  		inst = (unsigned char *)(gen->ptr);
 11289  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11290  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11291  		{
 11292  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
 11293  			x86_64_cmov_reg_reg_size(inst, X86_CC_LT, reg, reg2, 1, 8);
 11294  		}
 11295  		gen->ptr = (unsigned char *)inst;
 11296  		_jit_regs_commit(gen, &regs);
 11297  	}
 11298  }
 11299  break;
 11300  
 11301  case JIT_OP_LMAX_UN:
 11302  {
 11303  	unsigned char * inst;
 11304  	_jit_regs_t regs;
 11305  	int reg, reg2;
 11306  	{
 11307  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11308  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11309  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11310  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11311  		_jit_regs_begin(gen, &regs, 32);
 11312  		inst = (unsigned char *)(gen->ptr);
 11313  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11314  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11315  		{
 11316  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
 11317  			x86_64_cmov_reg_reg_size(inst, X86_CC_LT, reg, reg2, 0, 8);
 11318  		}
 11319  		gen->ptr = (unsigned char *)inst;
 11320  		_jit_regs_commit(gen, &regs);
 11321  	}
 11322  }
 11323  break;
 11324  
 11325  case JIT_OP_LMIN:
 11326  {
 11327  	unsigned char * inst;
 11328  	_jit_regs_t regs;
 11329  	int reg, reg2;
 11330  	{
 11331  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11332  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11333  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11334  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11335  		_jit_regs_begin(gen, &regs, 32);
 11336  		inst = (unsigned char *)(gen->ptr);
 11337  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11338  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11339  		{
 11340  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
 11341  			x86_64_cmov_reg_reg_size(inst, X86_CC_GT, reg, reg2, 1, 8);
 11342  		}
 11343  		gen->ptr = (unsigned char *)inst;
 11344  		_jit_regs_commit(gen, &regs);
 11345  	}
 11346  }
 11347  break;
 11348  
 11349  case JIT_OP_LMIN_UN:
 11350  {
 11351  	unsigned char * inst;
 11352  	_jit_regs_t regs;
 11353  	int reg, reg2;
 11354  	{
 11355  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11356  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11357  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11358  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 11359  		_jit_regs_begin(gen, &regs, 32);
 11360  		inst = (unsigned char *)(gen->ptr);
 11361  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11362  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11363  		{
 11364  			x86_64_cmp_reg_reg_size(inst, reg, reg2, 8);
 11365  			x86_64_cmov_reg_reg_size(inst, X86_CC_GT, reg, reg2, 0, 8);
 11366  		}
 11367  		gen->ptr = (unsigned char *)inst;
 11368  		_jit_regs_commit(gen, &regs);
 11369  	}
 11370  }
 11371  break;
 11372  
 11373  case JIT_OP_LSIGN:
 11374  {
 11375  	unsigned char * inst;
 11376  	_jit_regs_t regs;
 11377  	int reg, reg2;
 11378  	jit_nint imm_value;
 11379  	if(insn->value1->is_constant)
 11380  	{
 11381  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11382  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 11383  		_jit_regs_begin(gen, &regs, 32);
 11384  		inst = (unsigned char *)(gen->ptr);
 11385  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11386  		imm_value = insn->value1->address;
 11387  		{
 11388  			if(imm_value < 0)
 11389  			{
 11390  				x86_64_mov_reg_imm_size(inst, reg, -1, 4);
 11391  			}
 11392  			else if(imm_value > 0)
 11393  			{
 11394  				x86_64_mov_reg_imm_size(inst, reg, 1, 4);
 11395  			}
 11396  			else
 11397  			{
 11398  				x86_64_clear_reg(inst, reg);
 11399  			}
 11400  		}
 11401  		gen->ptr = (unsigned char *)inst;
 11402  		_jit_regs_commit(gen, &regs);
 11403  	}
 11404  	else
 11405  	{
 11406  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11407  		_jit_regs_init_dest(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11408  		_jit_regs_init_value1(&regs, insn, _JIT_REGS_EARLY_CLOBBER, x86_64_reg);
 11409  		_jit_regs_begin(gen, &regs, 32);
 11410  		inst = (unsigned char *)(gen->ptr);
 11411  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11412  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11413  		{
 11414  			x86_64_clear_reg(inst, reg);
 11415  			x86_64_test_reg_reg_size(inst, reg2, reg2, 8);
 11416  			x86_64_set_reg(inst, X86_CC_NZ, reg, 0);
 11417  			x86_64_sar_reg_imm_size(inst, reg2, 63, 8);
 11418  			x86_64_or_reg_reg_size(inst, reg, reg2, 4);
 11419  		}
 11420  		gen->ptr = (unsigned char *)inst;
 11421  		_jit_regs_commit(gen, &regs);
 11422  	}
 11423  }
 11424  break;
 11425  
 11426  case JIT_OP_FMAX:
 11427  {
 11428  	unsigned char * inst;
 11429  	_jit_regs_t regs;
 11430  	int reg, reg2;
 11431  	jit_nint local_offset;
 11432  	if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 11433  	{
 11434  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11435  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11436  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11437  		_jit_gen_fix_value(insn->value2);
 11438  		_jit_regs_begin(gen, &regs, 32);
 11439  		inst = (unsigned char *)(gen->ptr);
 11440  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11441  		local_offset = insn->value2->frame_offset;
 11442  		{
 11443  			x86_64_maxss_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11444  		}
 11445  		gen->ptr = (unsigned char *)inst;
 11446  		_jit_regs_commit(gen, &regs);
 11447  	}
 11448  	else
 11449  	{
 11450  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11451  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11452  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11453  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 11454  		_jit_regs_begin(gen, &regs, 32);
 11455  		inst = (unsigned char *)(gen->ptr);
 11456  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11457  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11458  		{
 11459  			x86_64_maxss_reg_reg(inst, reg, reg2);
 11460  		}
 11461  		gen->ptr = (unsigned char *)inst;
 11462  		_jit_regs_commit(gen, &regs);
 11463  	}
 11464  }
 11465  break;
 11466  
 11467  case JIT_OP_FMIN:
 11468  {
 11469  	unsigned char * inst;
 11470  	_jit_regs_t regs;
 11471  	int reg, reg2;
 11472  	jit_nint local_offset;
 11473  	if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 11474  	{
 11475  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11476  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11477  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11478  		_jit_gen_fix_value(insn->value2);
 11479  		_jit_regs_begin(gen, &regs, 32);
 11480  		inst = (unsigned char *)(gen->ptr);
 11481  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11482  		local_offset = insn->value2->frame_offset;
 11483  		{
 11484  			x86_64_minss_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11485  		}
 11486  		gen->ptr = (unsigned char *)inst;
 11487  		_jit_regs_commit(gen, &regs);
 11488  	}
 11489  	else
 11490  	{
 11491  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11492  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11493  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11494  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 11495  		_jit_regs_begin(gen, &regs, 32);
 11496  		inst = (unsigned char *)(gen->ptr);
 11497  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11498  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11499  		{
 11500  			x86_64_minss_reg_reg(inst, reg, reg2);
 11501  		}
 11502  		gen->ptr = (unsigned char *)inst;
 11503  		_jit_regs_commit(gen, &regs);
 11504  	}
 11505  }
 11506  break;
 11507  
 11508  case JIT_OP_DMAX:
 11509  {
 11510  	unsigned char * inst;
 11511  	_jit_regs_t regs;
 11512  	int reg, reg2;
 11513  	jit_nint local_offset;
 11514  	if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 11515  	{
 11516  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11517  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11518  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11519  		_jit_gen_fix_value(insn->value2);
 11520  		_jit_regs_begin(gen, &regs, 32);
 11521  		inst = (unsigned char *)(gen->ptr);
 11522  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11523  		local_offset = insn->value2->frame_offset;
 11524  		{
 11525  			x86_64_maxsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11526  		}
 11527  		gen->ptr = (unsigned char *)inst;
 11528  		_jit_regs_commit(gen, &regs);
 11529  	}
 11530  	else
 11531  	{
 11532  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11533  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11534  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11535  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 11536  		_jit_regs_begin(gen, &regs, 32);
 11537  		inst = (unsigned char *)(gen->ptr);
 11538  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11539  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11540  		{
 11541  			x86_64_maxsd_reg_reg(inst, reg, reg2);
 11542  		}
 11543  		gen->ptr = (unsigned char *)inst;
 11544  		_jit_regs_commit(gen, &regs);
 11545  	}
 11546  }
 11547  break;
 11548  
 11549  case JIT_OP_DMIN:
 11550  {
 11551  	unsigned char * inst;
 11552  	_jit_regs_t regs;
 11553  	int reg, reg2;
 11554  	jit_nint local_offset;
 11555  	if(!insn->value2->is_constant && !insn->value2->in_register && !insn->value2->has_global_register&& (insn->flags & JIT_INSN_VALUE2_NEXT_USE) == 0)
 11556  	{
 11557  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11558  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11559  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11560  		_jit_gen_fix_value(insn->value2);
 11561  		_jit_regs_begin(gen, &regs, 32);
 11562  		inst = (unsigned char *)(gen->ptr);
 11563  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11564  		local_offset = insn->value2->frame_offset;
 11565  		{
 11566  			x86_64_minsd_reg_membase(inst, reg, X86_64_RBP, local_offset);
 11567  		}
 11568  		gen->ptr = (unsigned char *)inst;
 11569  		_jit_regs_commit(gen, &regs);
 11570  	}
 11571  	else
 11572  	{
 11573  		_jit_regs_init(gen, &regs, _JIT_REGS_COMMUTATIVE);
 11574  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11575  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11576  		_jit_regs_init_value2(&regs, insn, 0, x86_64_xreg);
 11577  		_jit_regs_begin(gen, &regs, 32);
 11578  		inst = (unsigned char *)(gen->ptr);
 11579  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11580  		reg2 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 11581  		{
 11582  			x86_64_minsd_reg_reg(inst, reg, reg2);
 11583  		}
 11584  		gen->ptr = (unsigned char *)inst;
 11585  		_jit_regs_commit(gen, &regs);
 11586  	}
 11587  }
 11588  break;
 11589  
 11590  case JIT_OP_FFLOOR:
 11591  {
 11592  	unsigned char * inst;
 11593  	_jit_regs_t regs;
 11594  	int reg, reg2, reg3;
 11595  	jit_nint local_offset;
 11596  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11597  	{
 11598  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11599  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11600  		_jit_gen_fix_value(insn->value1);
 11601  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11602  		_jit_regs_begin(gen, &regs, 128);
 11603  		inst = (unsigned char *)(gen->ptr);
 11604  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11605  		local_offset = insn->value1->frame_offset;
 11606  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11607  		{
 11608  			inst = x86_64_rounds_reg_membase(inst, reg, local_offset, reg2, X86_ROUND_DOWN);
 11609  		}
 11610  		gen->ptr = (unsigned char *)inst;
 11611  		_jit_regs_commit(gen, &regs);
 11612  	}
 11613  	else
 11614  	{
 11615  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11616  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11617  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11618  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11619  		_jit_regs_begin(gen, &regs, 128);
 11620  		inst = (unsigned char *)(gen->ptr);
 11621  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11622  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11623  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11624  		{
 11625  			inst = x86_64_rounds_reg_reg(inst, reg, reg2, reg3, X86_ROUND_DOWN);
 11626  		}
 11627  		gen->ptr = (unsigned char *)inst;
 11628  		_jit_regs_commit(gen, &regs);
 11629  	}
 11630  }
 11631  break;
 11632  
 11633  case JIT_OP_DFLOOR:
 11634  {
 11635  	unsigned char * inst;
 11636  	_jit_regs_t regs;
 11637  	int reg, reg2, reg3;
 11638  	jit_nint local_offset;
 11639  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11640  	{
 11641  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11642  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11643  		_jit_gen_fix_value(insn->value1);
 11644  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11645  		_jit_regs_begin(gen, &regs, 128);
 11646  		inst = (unsigned char *)(gen->ptr);
 11647  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11648  		local_offset = insn->value1->frame_offset;
 11649  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11650  		{
 11651  			inst = x86_64_roundd_reg_membase(inst, reg, local_offset, reg2, X86_ROUND_DOWN);
 11652  		}
 11653  		gen->ptr = (unsigned char *)inst;
 11654  		_jit_regs_commit(gen, &regs);
 11655  	}
 11656  	else
 11657  	{
 11658  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11659  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11660  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11661  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11662  		_jit_regs_begin(gen, &regs, 128);
 11663  		inst = (unsigned char *)(gen->ptr);
 11664  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11665  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11666  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11667  		{
 11668  			inst = x86_64_roundd_reg_reg(inst, reg, reg2, reg3, X86_ROUND_DOWN);
 11669  		}
 11670  		gen->ptr = (unsigned char *)inst;
 11671  		_jit_regs_commit(gen, &regs);
 11672  	}
 11673  }
 11674  break;
 11675  
 11676  case JIT_OP_NFFLOOR:
 11677  {
 11678  	unsigned char * inst;
 11679  	_jit_regs_t regs;
 11680  	int reg, reg2;
 11681  	{
 11682  		_jit_regs_init(gen, &regs, 0);
 11683  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
 11684  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
 11685  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11686  		_jit_regs_begin(gen, &regs, 128);
 11687  		inst = (unsigned char *)(gen->ptr);
 11688  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11689  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11690  		{
 11691  			inst = x86_64_roundnf(inst, reg2, X86_ROUND_DOWN);
 11692  		}
 11693  		gen->ptr = (unsigned char *)inst;
 11694  		_jit_regs_commit(gen, &regs);
 11695  	}
 11696  }
 11697  break;
 11698  
 11699  case JIT_OP_FCEIL:
 11700  {
 11701  	unsigned char * inst;
 11702  	_jit_regs_t regs;
 11703  	int reg, reg2, reg3;
 11704  	jit_nint local_offset;
 11705  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11706  	{
 11707  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11708  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11709  		_jit_gen_fix_value(insn->value1);
 11710  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11711  		_jit_regs_begin(gen, &regs, 128);
 11712  		inst = (unsigned char *)(gen->ptr);
 11713  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11714  		local_offset = insn->value1->frame_offset;
 11715  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11716  		{
 11717  			inst = x86_64_rounds_reg_membase(inst, reg, local_offset, reg2, X86_ROUND_UP);
 11718  		}
 11719  		gen->ptr = (unsigned char *)inst;
 11720  		_jit_regs_commit(gen, &regs);
 11721  	}
 11722  	else
 11723  	{
 11724  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11725  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11726  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11727  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11728  		_jit_regs_begin(gen, &regs, 128);
 11729  		inst = (unsigned char *)(gen->ptr);
 11730  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11731  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11732  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11733  		{
 11734  			inst = x86_64_rounds_reg_reg(inst, reg, reg2, reg3, X86_ROUND_UP);
 11735  		}
 11736  		gen->ptr = (unsigned char *)inst;
 11737  		_jit_regs_commit(gen, &regs);
 11738  	}
 11739  }
 11740  break;
 11741  
 11742  case JIT_OP_DCEIL:
 11743  {
 11744  	unsigned char * inst;
 11745  	_jit_regs_t regs;
 11746  	int reg, reg2, reg3;
 11747  	jit_nint local_offset;
 11748  	if(!insn->value1->is_constant && !insn->value1->in_register && !insn->value1->has_global_register&& (insn->flags & JIT_INSN_VALUE1_NEXT_USE) == 0)
 11749  	{
 11750  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11751  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11752  		_jit_gen_fix_value(insn->value1);
 11753  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11754  		_jit_regs_begin(gen, &regs, 128);
 11755  		inst = (unsigned char *)(gen->ptr);
 11756  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11757  		local_offset = insn->value1->frame_offset;
 11758  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11759  		{
 11760  			inst = x86_64_roundd_reg_membase(inst, reg, local_offset, reg2, X86_ROUND_UP);
 11761  		}
 11762  		gen->ptr = (unsigned char *)inst;
 11763  		_jit_regs_commit(gen, &regs);
 11764  	}
 11765  	else
 11766  	{
 11767  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 11768  		_jit_regs_init_dest(&regs, insn, 0, x86_64_xreg);
 11769  		_jit_regs_init_value1(&regs, insn, 0, x86_64_xreg);
 11770  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11771  		_jit_regs_begin(gen, &regs, 128);
 11772  		inst = (unsigned char *)(gen->ptr);
 11773  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 11774  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11775  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11776  		{
 11777  			inst = x86_64_roundd_reg_reg(inst, reg, reg2, reg3, X86_ROUND_UP);
 11778  		}
 11779  		gen->ptr = (unsigned char *)inst;
 11780  		_jit_regs_commit(gen, &regs);
 11781  	}
 11782  }
 11783  break;
 11784  
 11785  case JIT_OP_NFCEIL:
 11786  {
 11787  	unsigned char * inst;
 11788  	_jit_regs_t regs;
 11789  	int reg, reg2;
 11790  	{
 11791  		_jit_regs_init(gen, &regs, 0);
 11792  		_jit_regs_init_dest(&regs, insn, 0, x86_64_freg);
 11793  		_jit_regs_init_value1(&regs, insn, 0, x86_64_freg);
 11794  		_jit_regs_add_scratch(&regs, x86_64_reg);
 11795  		_jit_regs_begin(gen, &regs, 128);
 11796  		inst = (unsigned char *)(gen->ptr);
 11797  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11798  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 11799  		{
 11800  			inst = x86_64_roundnf(inst, reg2, X86_ROUND_UP);
 11801  		}
 11802  		gen->ptr = (unsigned char *)inst;
 11803  		_jit_regs_commit(gen, &regs);
 11804  	}
 11805  }
 11806  break;
 11807  
 11808  case JIT_OP_CHECK_NULL:
 11809  {
 11810  	unsigned char * inst;
 11811  	_jit_regs_t regs;
 11812  	int reg;
 11813  	{
 11814  		_jit_regs_init(gen, &regs, 0);
 11815  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11816  		_jit_regs_begin(gen, &regs, 32);
 11817  		inst = (unsigned char *)(gen->ptr);
 11818  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11819  		{
 11820  	#if 0 && defined(JIT_USE_SIGNALS)
 11821  			/* if reg contains NULL this generates SEGV and the signal
 11822  			   handler will throw the exception  */
 11823  			x86_64_cmp_reg_membase_size(inst, reg, reg, 0, 8);
 11824  	#else
 11825  			unsigned char *patch;
 11826  			x86_64_test_reg_reg_size(inst, reg, reg, 8);
 11827  			patch = inst;
 11828  			x86_branch8(inst, X86_CC_NE, 0, 0);
 11829  			inst = throw_builtin(inst, func, JIT_RESULT_NULL_REFERENCE);
 11830  			x86_patch(patch, inst);
 11831  	#endif
 11832  		}
 11833  		gen->ptr = (unsigned char *)inst;
 11834  		_jit_regs_commit(gen, &regs);
 11835  	}
 11836  }
 11837  break;
 11838  
 11839  case JIT_OP_CALL:
 11840  {
 11841  	unsigned char * inst;
 11842  	{
 11843  		_jit_gen_check_space(gen, 32);
 11844  		inst = (unsigned char *)(gen->ptr);
 11845  		{
 11846  			jit_function_t func = (jit_function_t)(insn->dest);
 11847  			inst = x86_64_call_code(inst, (jit_nint)jit_function_to_closure(func));
 11848  		}
 11849  		gen->ptr = (unsigned char *)inst;
 11850  	}
 11851  }
 11852  break;
 11853  
 11854  case JIT_OP_CALL_TAIL:
 11855  {
 11856  	unsigned char * inst;
 11857  	{
 11858  		_jit_gen_check_space(gen, 32);
 11859  		inst = (unsigned char *)(gen->ptr);
 11860  		{
 11861  			jit_function_t func = (jit_function_t)(insn->dest);
 11862  			x86_64_mov_reg_reg_size(inst, X86_64_RSP, X86_64_RBP, 8);
 11863  			x86_64_pop_reg_size(inst, X86_64_RBP, 8);
 11864  			x86_64_jump_to_code(inst, (jit_nint)jit_function_to_closure(func));
 11865  		}
 11866  		gen->ptr = (unsigned char *)inst;
 11867  	}
 11868  }
 11869  break;
 11870  
 11871  case JIT_OP_CALL_INDIRECT:
 11872  {
 11873  	unsigned char * inst;
 11874  	{
 11875  		_jit_gen_check_space(gen, 32);
 11876  		inst = (unsigned char *)(gen->ptr);
 11877  		{
 11878  			x86_64_mov_reg_imm_size(inst, X86_64_RAX, 8, 4);
 11879  			x86_64_call_reg(inst, X86_64_SCRATCH);
 11880  		}
 11881  		gen->ptr = (unsigned char *)inst;
 11882  	}
 11883  }
 11884  break;
 11885  
 11886  case JIT_OP_CALL_INDIRECT_TAIL:
 11887  {
 11888  	unsigned char * inst;
 11889  	{
 11890  		_jit_gen_check_space(gen, 32);
 11891  		inst = (unsigned char *)(gen->ptr);
 11892  		{
 11893  			x86_64_mov_reg_reg_size(inst, X86_64_RSP, X86_64_RBP, 8);
 11894  			x86_64_pop_reg_size(inst, X86_64_RBP, 8);
 11895  			x86_64_jmp_reg(inst, X86_64_SCRATCH);
 11896  		}
 11897  		gen->ptr = (unsigned char *)inst;
 11898  	}
 11899  }
 11900  break;
 11901  
 11902  case JIT_OP_CALL_VTABLE_PTR:
 11903  {
 11904  	unsigned char * inst;
 11905  	{
 11906  		_jit_gen_check_space(gen, 32);
 11907  		inst = (unsigned char *)(gen->ptr);
 11908  		{
 11909  			x86_64_mov_reg_imm_size(inst, X86_64_RAX, 8, 4);
 11910  			x86_64_call_reg(inst, X86_64_SCRATCH);
 11911  		}
 11912  		gen->ptr = (unsigned char *)inst;
 11913  	}
 11914  }
 11915  break;
 11916  
 11917  case JIT_OP_CALL_VTABLE_PTR_TAIL:
 11918  {
 11919  	unsigned char * inst;
 11920  	{
 11921  		_jit_gen_check_space(gen, 32);
 11922  		inst = (unsigned char *)(gen->ptr);
 11923  		{
 11924  			x86_64_mov_reg_reg_size(inst, X86_64_RSP, X86_64_RBP, 8);
 11925  			x86_64_pop_reg_size(inst, X86_64_RBP, 8);
 11926  			x86_64_jmp_reg(inst, X86_64_SCRATCH);
 11927  		}
 11928  		gen->ptr = (unsigned char *)inst;
 11929  	}
 11930  }
 11931  break;
 11932  
 11933  case JIT_OP_CALL_EXTERNAL:
 11934  {
 11935  	unsigned char * inst;
 11936  	{
 11937  		_jit_gen_check_space(gen, 32);
 11938  		inst = (unsigned char *)(gen->ptr);
 11939  		{
 11940  			inst = x86_64_call_code(inst, (jit_nint)(insn->dest));
 11941  		}
 11942  		gen->ptr = (unsigned char *)inst;
 11943  	}
 11944  }
 11945  break;
 11946  
 11947  case JIT_OP_CALL_EXTERNAL_TAIL:
 11948  {
 11949  	unsigned char * inst;
 11950  	{
 11951  		_jit_gen_check_space(gen, 32);
 11952  		inst = (unsigned char *)(gen->ptr);
 11953  		{
 11954  			x86_64_mov_reg_reg_size(inst, X86_64_RSP, X86_64_RBP, 8);
 11955  			x86_64_pop_reg_size(inst, X86_64_RBP, 8);
 11956  			x86_64_jump_to_code(inst, (jit_nint)(insn->dest));
 11957  		}
 11958  		gen->ptr = (unsigned char *)inst;
 11959  	}
 11960  }
 11961  break;
 11962  
 11963  case JIT_OP_THROW:
 11964  {
 11965  	unsigned char * inst;
 11966  	_jit_regs_t regs;
 11967  	int reg;
 11968  	{
 11969  		_jit_regs_init(gen, &regs, _JIT_REGS_BRANCH);
 11970  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 11971  		_jit_regs_clobber_all(gen, &regs);
 11972  		_jit_regs_begin(gen, &regs, 32);
 11973  		inst = (unsigned char *)(gen->ptr);
 11974  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 11975  		{
 11976  			x86_64_mov_reg_reg_size(inst, X86_64_RDI, reg, 8);
 11977  			if(func->builder->setjmp_value != 0)
 11978  			{
 11979  				jit_nint pc_offset;
 11980  	
 11981  				/* We have a "setjmp" block in the current function,
 11982  				   so we must record the location of the throw first */
 11983  				_jit_gen_fix_value(func->builder->setjmp_value);
 11984  				pc_offset = func->builder->setjmp_value->frame_offset +
 11985  								jit_jmp_catch_pc_offset;
 11986  	
 11987  				x86_64_lea_membase_size(inst, X86_64_SCRATCH, X86_64_RIP, 0, 8);
 11988  				x86_64_mov_membase_reg_size(inst, X86_64_RBP, pc_offset,
 11989  											X86_64_SCRATCH, 8);
 11990  			}
 11991  			inst = x86_64_call_code(inst, (jit_nint)jit_exception_throw);
 11992  		}
 11993  		gen->ptr = (unsigned char *)inst;
 11994  		_jit_regs_commit(gen, &regs);
 11995  	}
 11996  }
 11997  break;
 11998  
 11999  case JIT_OP_RETHROW:
 12000  {
 12001  		{ /* Not used in native code back ends */ }
 12002  }
 12003  break;
 12004  
 12005  case JIT_OP_LOAD_PC:
 12006  {
 12007  	unsigned char * inst;
 12008  	_jit_regs_t regs;
 12009  	int reg;
 12010  	{
 12011  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 12012  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12013  		_jit_regs_begin(gen, &regs, 32);
 12014  		inst = (unsigned char *)(gen->ptr);
 12015  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12016  		{
 12017  			x86_64_lea_membase_size(inst, reg, X86_64_RIP, 0, 8);
 12018  		}
 12019  		gen->ptr = (unsigned char *)inst;
 12020  		_jit_regs_commit(gen, &regs);
 12021  	}
 12022  }
 12023  break;
 12024  
 12025  case JIT_OP_LOAD_EXCEPTION_PC:
 12026  {
 12027  		{ /* Not used in native code back ends */ }
 12028  }
 12029  break;
 12030  
 12031  case JIT_OP_ENTER_FINALLY:
 12032  {
 12033  	unsigned char * inst;
 12034  	{
 12035  		_jit_gen_check_space(gen, 32);
 12036  		inst = (unsigned char *)(gen->ptr);
 12037  		{
 12038  			/* The return address is on the stack */
 12039  			x86_64_sub_reg_imm_size(inst, X86_64_RSP, 8, 8);
 12040  		 }
 12041  		gen->ptr = (unsigned char *)inst;
 12042  	}
 12043  }
 12044  break;
 12045  
 12046  case JIT_OP_LEAVE_FINALLY:
 12047  {
 12048  	unsigned char * inst;
 12049  	{
 12050  		_jit_regs_spill_all(gen);
 12051  		_jit_gen_check_space(gen, 32);
 12052  		inst = (unsigned char *)(gen->ptr);
 12053  		{
 12054  			/* The "finally" return address is on the stack */
 12055  			x86_64_add_reg_imm_size(inst, X86_64_RSP, 8, 8);
 12056  			x86_64_ret(inst);
 12057  		}
 12058  		gen->ptr = (unsigned char *)inst;
 12059  	}
 12060  }
 12061  break;
 12062  
 12063  case JIT_OP_CALL_FINALLY:
 12064  {
 12065  	unsigned char * inst;
 12066  	{
 12067  		_jit_regs_spill_all(gen);
 12068  		_jit_gen_check_space(gen, 32);
 12069  		inst = (unsigned char *)(gen->ptr);
 12070  		{
 12071  			jit_block_t block;
 12072  	
 12073  			block = jit_block_from_label(func, (jit_label_t)(insn->dest));
 12074  			if(!block)
 12075  			{
 12076  				return;
 12077  			}
 12078  	
 12079  			if(block->address)
 12080  			{
 12081  				inst = x86_64_call_code(inst, (jit_nint)block->address);
 12082  			}
 12083  			else
 12084  			{
 12085  				jit_int fixup;
 12086  	
 12087  				if(block->fixup_list)
 12088  				{
 12089  					fixup = _JIT_CALC_FIXUP(block->fixup_list, inst + 1);
 12090  				}
 12091  				else
 12092  				{
 12093  					fixup = 0;
 12094  				}
 12095  				block->fixup_list = (void *)(inst + 1);
 12096  				x86_64_call_imm(inst, fixup);
 12097  			}
 12098  		}
 12099  		gen->ptr = (unsigned char *)inst;
 12100  	}
 12101  }
 12102  break;
 12103  
 12104  case JIT_OP_ADDRESS_OF_LABEL:
 12105  {
 12106  	unsigned char * inst;
 12107  	_jit_regs_t regs;
 12108  	int reg;
 12109  	{
 12110  		_jit_regs_init(gen, &regs, _JIT_REGS_FREE_DEST);
 12111  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12112  		_jit_regs_begin(gen, &regs, 32);
 12113  		inst = (unsigned char *)(gen->ptr);
 12114  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12115  		{
 12116  			jit_int *fixup;
 12117  	
 12118  			block = jit_block_from_label(func, (jit_label_t)(insn->value1));
 12119  			if(block->address)
 12120  			{
 12121  				/* The label is in the current function so we assume that the */
 12122  				/* displacement to the current instruction is in the +-2GB range */
 12123  	
 12124  				x86_64_lea_membase_size(inst, reg, X86_64_RIP, 0, 8);
 12125  				fixup = (jit_int *)(inst - 4);
 12126  				fixup[0] = (jit_int)((jit_nint)block->address - (jit_nint)inst);
 12127  			}
 12128  			else
 12129  			{
 12130  				/* Output a placeholder and record on the block's fixup list */
 12131  				/* The label is in the current function so we assume that the */
 12132  				/* displacement to the current instruction will be in the +-2GB range */
 12133  				x86_64_lea_membase_size(inst, reg, X86_64_RIP, 0, 8);
 12134  				fixup = (jit_int *)(inst - 4);
 12135  				if(block->fixup_list)
 12136  				{
 12137  					fixup[0] = _JIT_CALC_FIXUP(block->fixup_list, fixup);
 12138  				}
 12139  				block->fixup_list = (void *)fixup;
 12140  			}
 12141  		}
 12142  		gen->ptr = (unsigned char *)inst;
 12143  		_jit_regs_commit(gen, &regs);
 12144  	}
 12145  }
 12146  break;
 12147  
 12148  case JIT_OP_MEMCPY:
 12149  {
 12150  	unsigned char * inst;
 12151  	_jit_regs_t regs;
 12152  	int reg, reg2, reg3, reg4;
 12153  	jit_nint imm_value;
 12154  	if(insn->value2->is_constant && (insn->value2->address <= 0))
 12155  	{
 12156  		_jit_gen_check_space(gen, 32);
 12157  		inst = (unsigned char *)(gen->ptr);
 12158  		imm_value = insn->value2->address;
 12159  		{ }
 12160  		gen->ptr = (unsigned char *)inst;
 12161  	}
 12162  	else if(insn->value2->is_constant && (insn->value2->address <= _JIT_MAX_MEMCPY_INLINE))
 12163  	{
 12164  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12165  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12166  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 12167  		_jit_regs_add_scratch(&regs, x86_64_reg);
 12168  		_jit_regs_add_scratch(&regs, x86_64_xreg);
 12169  		_jit_regs_begin(gen, &regs, 32);
 12170  		inst = (unsigned char *)(gen->ptr);
 12171  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12172  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 12173  		imm_value = insn->value2->address;
 12174  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 12175  		reg4 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
 12176  		{
 12177  			inst = small_block_copy(gen, inst, reg, 0, reg2, 0, imm_value, reg3, reg4, 0);
 12178  		}
 12179  		gen->ptr = (unsigned char *)inst;
 12180  		_jit_regs_commit(gen, &regs);
 12181  	}
 12182  	else if(insn->value2->is_constant)
 12183  	{
 12184  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12185  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12186  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 12187  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
 12188  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
 12189  		_jit_regs_begin(gen, &regs, 32);
 12190  		inst = (unsigned char *)(gen->ptr);
 12191  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12192  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 12193  		imm_value = insn->value2->address;
 12194  		{
 12195  			inst = memory_copy(gen, inst, reg, 0, reg2, 0, imm_value);
 12196  		}
 12197  		gen->ptr = (unsigned char *)inst;
 12198  		_jit_regs_commit(gen, &regs);
 12199  	}
 12200  	else
 12201  	{
 12202  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12203  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12204  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdi"), -1);
 12205  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 12206  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rsi"), -1);
 12207  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 12208  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rdx"), -1);
 12209  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
 12210  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
 12211  		_jit_regs_begin(gen, &regs, 32);
 12212  		inst = (unsigned char *)(gen->ptr);
 12213  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12214  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 12215  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 12216  		{
 12217  			inst = x86_64_call_code(inst, (jit_nint)jit_memcpy);
 12218  		}
 12219  		gen->ptr = (unsigned char *)inst;
 12220  		_jit_regs_commit(gen, &regs);
 12221  	}
 12222  }
 12223  break;
 12224  
 12225  case JIT_OP_MEMSET:
 12226  {
 12227  	unsigned char * inst;
 12228  	_jit_regs_t regs;
 12229  	int reg, reg2, reg3;
 12230  	jit_nint imm_value, imm_value2;
 12231  	if(insn->value2->is_constant && (insn->value2->address <= 0))
 12232  	{
 12233  		_jit_gen_check_space(gen, 32);
 12234  		inst = (unsigned char *)(gen->ptr);
 12235  		imm_value = insn->value2->address;
 12236  		{ }
 12237  		gen->ptr = (unsigned char *)inst;
 12238  	}
 12239  	else if(insn->value1->is_constant && insn->value2->is_constant && (insn->value1->address == 0 && insn->value2->address <= _JIT_MAX_MEMSET_INLINE && insn->value2->address % 16 == 0))
 12240  	{
 12241  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12242  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12243  		_jit_regs_add_scratch(&regs, x86_64_xreg);
 12244  		_jit_regs_begin(gen, &regs, 32);
 12245  		inst = (unsigned char *)(gen->ptr);
 12246  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12247  		imm_value = insn->value1->address;
 12248  		imm_value2 = insn->value2->address;
 12249  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 12250  		{
 12251  			inst = small_block_set(gen, inst, reg, 0, imm_value, imm_value2, 0, reg2, 0, 1);
 12252  		}
 12253  		gen->ptr = (unsigned char *)inst;
 12254  		_jit_regs_commit(gen, &regs);
 12255  	}
 12256  	else if(insn->value1->is_constant && insn->value2->is_constant && (insn->value2->address <= _JIT_MAX_MEMSET_INLINE && insn->value2->address < 32))
 12257  	{
 12258  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12259  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12260  		_jit_regs_add_scratch(&regs, x86_64_reg);
 12261  		_jit_regs_begin(gen, &regs, 32);
 12262  		inst = (unsigned char *)(gen->ptr);
 12263  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12264  		imm_value = insn->value1->address;
 12265  		imm_value2 = insn->value2->address;
 12266  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 12267  		{
 12268  			inst = small_block_set(gen, inst, reg, 0, imm_value, imm_value2, reg2, 0, 0, 0);
 12269  		}
 12270  		gen->ptr = (unsigned char *)inst;
 12271  		_jit_regs_commit(gen, &regs);
 12272  	}
 12273  	else if(insn->value1->is_constant && insn->value2->is_constant && (insn->value2->address <= _JIT_MAX_MEMSET_INLINE))
 12274  	{
 12275  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12276  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12277  		_jit_regs_add_scratch(&regs, x86_64_reg);
 12278  		_jit_regs_add_scratch(&regs, x86_64_xreg);
 12279  		_jit_regs_begin(gen, &regs, 32);
 12280  		inst = (unsigned char *)(gen->ptr);
 12281  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12282  		imm_value = insn->value1->address;
 12283  		imm_value2 = insn->value2->address;
 12284  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 12285  		reg3 = _jit_reg_info[_jit_regs_get_scratch(&regs, 1)].cpu_reg;
 12286  		{
 12287  			inst = small_block_set(gen, inst, reg, 0, imm_value, imm_value2, reg2, reg3, 0, 1);
 12288  		}
 12289  		gen->ptr = (unsigned char *)inst;
 12290  		_jit_regs_commit(gen, &regs);
 12291  	}
 12292  	else
 12293  	{
 12294  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY);
 12295  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12296  		_jit_regs_set_dest(gen, &regs, _jit_regs_lookup("rdi"), -1);
 12297  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 12298  		_jit_regs_set_value1(gen, &regs, _jit_regs_lookup("rsi"), -1);
 12299  		_jit_regs_init_value2(&regs, insn, 0, x86_64_reg);
 12300  		_jit_regs_set_value2(gen, &regs, _jit_regs_lookup("rdx"), -1);
 12301  		_jit_regs_clobber_class(gen, &regs, x86_64_creg);
 12302  		_jit_regs_clobber_class(gen, &regs, x86_64_xreg);
 12303  		_jit_regs_begin(gen, &regs, 32);
 12304  		inst = (unsigned char *)(gen->ptr);
 12305  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12306  		reg2 = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 12307  		reg3 = _jit_reg_info[_jit_regs_get_value2(&regs)].cpu_reg;
 12308  		{
 12309  			inst = x86_64_call_code(inst, (jit_nint)jit_memset);
 12310  		}
 12311  		gen->ptr = (unsigned char *)inst;
 12312  		_jit_regs_commit(gen, &regs);
 12313  	}
 12314  }
 12315  break;
 12316  
 12317  case JIT_OP_ALLOCA:
 12318  {
 12319  	unsigned char * inst;
 12320  	_jit_regs_t regs;
 12321  	int reg;
 12322  	{
 12323  		_jit_regs_init(gen, &regs, 0);
 12324  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12325  		_jit_regs_init_value1(&regs, insn, 0, x86_64_reg);
 12326  		_jit_regs_begin(gen, &regs, 32);
 12327  		inst = (unsigned char *)(gen->ptr);
 12328  		reg = _jit_reg_info[_jit_regs_get_value1(&regs)].cpu_reg;
 12329  		{
 12330  			x86_64_sub_reg_reg_size(inst, X86_64_RSP, reg, 8);
 12331  			x86_64_mov_reg_reg_size(inst, reg, X86_64_RSP, 8);
 12332  			inst = fixup_alloca(gen, inst, reg);
 12333  			gen->stack_changed = 1;
 12334  	}
 12335  		gen->ptr = (unsigned char *)inst;
 12336  		_jit_regs_commit(gen, &regs);
 12337  	}
 12338  }
 12339  break;
 12340  
 12341  case JIT_OP_JUMP_TABLE:
 12342  {
 12343  	unsigned char * inst;
 12344  	_jit_regs_t regs;
 12345  	int reg, reg2;
 12346  	jit_nint imm_value, imm_value2;
 12347  	{
 12348  		_jit_regs_init(gen, &regs, _JIT_REGS_TERNARY | _JIT_REGS_BRANCH);
 12349  		_jit_regs_init_dest(&regs, insn, 0, x86_64_reg);
 12350  		_jit_regs_add_scratch(&regs, x86_64_reg);
 12351  		_jit_regs_clobber_all(gen, &regs);
 12352  		_jit_regs_begin(gen, &regs, (64 + sizeof(void *) * insn->value2->address));
 12353  		inst = (unsigned char *)(gen->ptr);
 12354  		reg = _jit_reg_info[_jit_regs_get_dest(&regs)].cpu_reg;
 12355  		imm_value = insn->value1->address;
 12356  		imm_value2 = insn->value2->address;
 12357  		reg2 = _jit_reg_info[_jit_regs_get_scratch(&regs, 0)].cpu_reg;
 12358  		{
 12359  			unsigned char *patch_jump_table;
 12360  			unsigned char *patch_fall_through;
 12361  			int index;
 12362  			jit_label_t *labels;
 12363  			jit_nint num_labels;
 12364  			jit_block_t block;
 12365  	
 12366  			labels = (jit_label_t *) imm_value;
 12367  			num_labels = imm_value2;
 12368  	
 12369  			patch_jump_table = (unsigned char *)_jit_gen_alloc(gen, sizeof(void *) * imm_value2);
 12370  			if(!patch_jump_table)
 12371  			{
 12372  				/* The cache is full */
 12373  				return;
 12374  			}
 12375  	
 12376  			x86_64_mov_reg_imm_size(inst, reg2, (jit_nint)patch_jump_table, 8);
 12377  			x86_64_cmp_reg_imm_size(inst, reg, num_labels, 8);
 12378  			patch_fall_through = inst;
 12379  			x86_branch32(inst, X86_CC_AE, 0, 0);
 12380  	
 12381  			if(func->builder->position_independent)
 12382  			{
 12383  				/* TODO */
 12384  				TODO();
 12385  			}
 12386  			else
 12387  			{
 12388  				x86_64_jmp_memindex(inst, reg2, 0, reg, 3);
 12389  			}
 12390  	
 12391  			for(index = 0; index < num_labels; index++)
 12392  			{
 12393  				block = jit_block_from_label(func, labels[index]);
 12394  				if(!block)
 12395  				{
 12396  					return;
 12397  				}
 12398  	
 12399  				if(func->builder->position_independent)
 12400  				{
 12401  					/* TODO */
 12402  					TODO();
 12403  				}
 12404  				else
 12405  				{
 12406  					if(block->address)
 12407  					{
 12408  						x86_64_imm_emit64(patch_jump_table, (jit_nint)(block->address));
 12409  					}
 12410  					else
 12411  					{
 12412  						/* Output a placeholder and record on the block's absolute fixup list */
 12413  						x86_64_imm_emit64(patch_jump_table, (jit_nint)(block->fixup_absolute_list));
 12414  						block->fixup_absolute_list = (void *)(patch_jump_table - 8);
 12415  					}
 12416  				}
 12417  			}
 12418  	
 12419  			x86_patch(patch_fall_through, inst);
 12420  		}
 12421  		gen->ptr = (unsigned char *)inst;
 12422  		_jit_regs_commit(gen, &regs);
 12423  	}
 12424  }
 12425  break;
 12426  
 12427  #elif defined(JIT_INCLUDE_SUPPORTED)
 12428  
 12429  case JIT_OP_TRUNC_SBYTE:
 12430  case JIT_OP_TRUNC_UBYTE:
 12431  case JIT_OP_TRUNC_SHORT:
 12432  case JIT_OP_TRUNC_USHORT:
 12433  case JIT_OP_TRUNC_INT:
 12434  case JIT_OP_TRUNC_UINT:
 12435  case JIT_OP_LOW_WORD:
 12436  case JIT_OP_EXPAND_INT:
 12437  case JIT_OP_EXPAND_UINT:
 12438  case JIT_OP_INT_TO_NFLOAT:
 12439  case JIT_OP_LONG_TO_NFLOAT:
 12440  case JIT_OP_FLOAT32_TO_INT:
 12441  case JIT_OP_FLOAT32_TO_UINT:
 12442  case JIT_OP_FLOAT32_TO_LONG:
 12443  case JIT_OP_INT_TO_FLOAT32:
 12444  case JIT_OP_UINT_TO_FLOAT32:
 12445  case JIT_OP_LONG_TO_FLOAT32:
 12446  case JIT_OP_FLOAT64_TO_FLOAT32:
 12447  case JIT_OP_FLOAT64_TO_INT:
 12448  case JIT_OP_FLOAT64_TO_UINT:
 12449  case JIT_OP_FLOAT64_TO_LONG:
 12450  case JIT_OP_INT_TO_FLOAT64:
 12451  case JIT_OP_UINT_TO_FLOAT64:
 12452  case JIT_OP_LONG_TO_FLOAT64:
 12453  case JIT_OP_FLOAT32_TO_FLOAT64:
 12454  case JIT_OP_NFLOAT_TO_INT:
 12455  case JIT_OP_NFLOAT_TO_LONG:
 12456  case JIT_OP_FLOAT32_TO_NFLOAT:
 12457  case JIT_OP_FLOAT64_TO_NFLOAT:
 12458  case JIT_OP_NFLOAT_TO_FLOAT32:
 12459  case JIT_OP_NFLOAT_TO_FLOAT64:
 12460  case JIT_OP_COPY_LOAD_SBYTE:
 12461  case JIT_OP_COPY_LOAD_UBYTE:
 12462  case JIT_OP_COPY_STORE_BYTE:
 12463  case JIT_OP_COPY_LOAD_SHORT:
 12464  case JIT_OP_COPY_LOAD_USHORT:
 12465  case JIT_OP_COPY_STORE_SHORT:
 12466  case JIT_OP_COPY_INT:
 12467  case JIT_OP_COPY_LONG:
 12468  case JIT_OP_COPY_FLOAT32:
 12469  case JIT_OP_COPY_FLOAT64:
 12470  case JIT_OP_COPY_NFLOAT:
 12471  case JIT_OP_COPY_STRUCT:
 12472  case JIT_OP_ADDRESS_OF:
 12473  case JIT_OP_INCOMING_REG:
 12474  case JIT_OP_RETURN_REG:
 12475  case JIT_OP_RETRIEVE_FRAME_POINTER:
 12476  case JIT_OP_PUSH_INT:
 12477  case JIT_OP_PUSH_LONG:
 12478  case JIT_OP_PUSH_FLOAT32:
 12479  case JIT_OP_PUSH_FLOAT64:
 12480  case JIT_OP_PUSH_NFLOAT:
 12481  case JIT_OP_PUSH_STRUCT:
 12482  case JIT_OP_POP_STACK:
 12483  case JIT_OP_SET_PARAM_INT:
 12484  case JIT_OP_SET_PARAM_LONG:
 12485  case JIT_OP_SET_PARAM_FLOAT32:
 12486  case JIT_OP_SET_PARAM_FLOAT64:
 12487  case JIT_OP_SET_PARAM_NFLOAT:
 12488  case JIT_OP_SET_PARAM_STRUCT:
 12489  case JIT_OP_FLUSH_SMALL_STRUCT:
 12490  case JIT_OP_RETURN:
 12491  case JIT_OP_RETURN_INT:
 12492  case JIT_OP_RETURN_LONG:
 12493  case JIT_OP_RETURN_FLOAT32:
 12494  case JIT_OP_RETURN_FLOAT64:
 12495  case JIT_OP_RETURN_NFLOAT:
 12496  case JIT_OP_RETURN_SMALL_STRUCT:
 12497  case JIT_OP_LOAD_RELATIVE_SBYTE:
 12498  case JIT_OP_LOAD_RELATIVE_UBYTE:
 12499  case JIT_OP_LOAD_RELATIVE_SHORT:
 12500  case JIT_OP_LOAD_RELATIVE_USHORT:
 12501  case JIT_OP_LOAD_RELATIVE_INT:
 12502  case JIT_OP_LOAD_RELATIVE_LONG:
 12503  case JIT_OP_LOAD_RELATIVE_FLOAT32:
 12504  case JIT_OP_LOAD_RELATIVE_FLOAT64:
 12505  case JIT_OP_LOAD_RELATIVE_NFLOAT:
 12506  case JIT_OP_LOAD_RELATIVE_STRUCT:
 12507  case JIT_OP_STORE_RELATIVE_BYTE:
 12508  case JIT_OP_STORE_RELATIVE_SHORT:
 12509  case JIT_OP_STORE_RELATIVE_INT:
 12510  case JIT_OP_STORE_RELATIVE_LONG:
 12511  case JIT_OP_STORE_RELATIVE_FLOAT32:
 12512  case JIT_OP_STORE_RELATIVE_FLOAT64:
 12513  case JIT_OP_STORE_RELATIVE_STRUCT:
 12514  case JIT_OP_ADD_RELATIVE:
 12515  case JIT_OP_LOAD_ELEMENT_SBYTE:
 12516  case JIT_OP_LOAD_ELEMENT_UBYTE:
 12517  case JIT_OP_LOAD_ELEMENT_SHORT:
 12518  case JIT_OP_LOAD_ELEMENT_USHORT:
 12519  case JIT_OP_LOAD_ELEMENT_INT:
 12520  case JIT_OP_LOAD_ELEMENT_LONG:
 12521  case JIT_OP_LOAD_ELEMENT_FLOAT32:
 12522  case JIT_OP_LOAD_ELEMENT_FLOAT64:
 12523  case JIT_OP_STORE_ELEMENT_BYTE:
 12524  case JIT_OP_STORE_ELEMENT_SHORT:
 12525  case JIT_OP_STORE_ELEMENT_INT:
 12526  case JIT_OP_STORE_ELEMENT_LONG:
 12527  case JIT_OP_STORE_ELEMENT_FLOAT32:
 12528  case JIT_OP_STORE_ELEMENT_FLOAT64:
 12529  case JIT_OP_IADD:
 12530  case JIT_OP_ISUB:
 12531  case JIT_OP_INEG:
 12532  case JIT_OP_IMUL:
 12533  case JIT_OP_IDIV:
 12534  case JIT_OP_IDIV_UN:
 12535  case JIT_OP_IREM:
 12536  case JIT_OP_IREM_UN:
 12537  case JIT_OP_LADD:
 12538  case JIT_OP_LSUB:
 12539  case JIT_OP_LNEG:
 12540  case JIT_OP_LMUL:
 12541  case JIT_OP_LDIV:
 12542  case JIT_OP_LDIV_UN:
 12543  case JIT_OP_LREM:
 12544  case JIT_OP_LREM_UN:
 12545  case JIT_OP_FADD:
 12546  case JIT_OP_FSUB:
 12547  case JIT_OP_FMUL:
 12548  case JIT_OP_FDIV:
 12549  case JIT_OP_FABS:
 12550  case JIT_OP_FNEG:
 12551  case JIT_OP_DADD:
 12552  case JIT_OP_DSUB:
 12553  case JIT_OP_DMUL:
 12554  case JIT_OP_DDIV:
 12555  case JIT_OP_DABS:
 12556  case JIT_OP_DNEG:
 12557  case JIT_OP_NFABS:
 12558  case JIT_OP_NFNEG:
 12559  case JIT_OP_IAND:
 12560  case JIT_OP_IOR:
 12561  case JIT_OP_IXOR:
 12562  case JIT_OP_INOT:
 12563  case JIT_OP_ISHL:
 12564  case JIT_OP_ISHR:
 12565  case JIT_OP_ISHR_UN:
 12566  case JIT_OP_LAND:
 12567  case JIT_OP_LOR:
 12568  case JIT_OP_LXOR:
 12569  case JIT_OP_LNOT:
 12570  case JIT_OP_LSHL:
 12571  case JIT_OP_LSHR:
 12572  case JIT_OP_LSHR_UN:
 12573  case JIT_OP_BR:
 12574  case JIT_OP_BR_IFALSE:
 12575  case JIT_OP_BR_ITRUE:
 12576  case JIT_OP_BR_IEQ:
 12577  case JIT_OP_BR_INE:
 12578  case JIT_OP_BR_ILT:
 12579  case JIT_OP_BR_ILT_UN:
 12580  case JIT_OP_BR_ILE:
 12581  case JIT_OP_BR_ILE_UN:
 12582  case JIT_OP_BR_IGT:
 12583  case JIT_OP_BR_IGT_UN:
 12584  case JIT_OP_BR_IGE:
 12585  case JIT_OP_BR_IGE_UN:
 12586  case JIT_OP_BR_LFALSE:
 12587  case JIT_OP_BR_LTRUE:
 12588  case JIT_OP_BR_LEQ:
 12589  case JIT_OP_BR_LNE:
 12590  case JIT_OP_BR_LLT:
 12591  case JIT_OP_BR_LLT_UN:
 12592  case JIT_OP_BR_LLE:
 12593  case JIT_OP_BR_LLE_UN:
 12594  case JIT_OP_BR_LGT:
 12595  case JIT_OP_BR_LGT_UN:
 12596  case JIT_OP_BR_LGE:
 12597  case JIT_OP_BR_LGE_UN:
 12598  case JIT_OP_BR_FEQ:
 12599  case JIT_OP_BR_FNE:
 12600  case JIT_OP_BR_FLT:
 12601  case JIT_OP_BR_FLT_INV:
 12602  case JIT_OP_BR_FLE:
 12603  case JIT_OP_BR_FLE_INV:
 12604  case JIT_OP_BR_FGT:
 12605  case JIT_OP_BR_FGT_INV:
 12606  case JIT_OP_BR_FGE:
 12607  case JIT_OP_BR_FGE_INV:
 12608  case JIT_OP_BR_DEQ:
 12609  case JIT_OP_BR_DNE:
 12610  case JIT_OP_BR_DLT:
 12611  case JIT_OP_BR_DLT_INV:
 12612  case JIT_OP_BR_DLE:
 12613  case JIT_OP_BR_DLE_INV:
 12614  case JIT_OP_BR_DGT:
 12615  case JIT_OP_BR_DGT_INV:
 12616  case JIT_OP_BR_DGE:
 12617  case JIT_OP_BR_DGE_INV:
 12618  case JIT_OP_IEQ:
 12619  case JIT_OP_INE:
 12620  case JIT_OP_ILT:
 12621  case JIT_OP_ILT_UN:
 12622  case JIT_OP_ILE:
 12623  case JIT_OP_ILE_UN:
 12624  case JIT_OP_IGT:
 12625  case JIT_OP_IGT_UN:
 12626  case JIT_OP_IGE:
 12627  case JIT_OP_IGE_UN:
 12628  case JIT_OP_LEQ:
 12629  case JIT_OP_LNE:
 12630  case JIT_OP_LLT:
 12631  case JIT_OP_LLT_UN:
 12632  case JIT_OP_LLE:
 12633  case JIT_OP_LLE_UN:
 12634  case JIT_OP_LGT:
 12635  case JIT_OP_LGT_UN:
 12636  case JIT_OP_LGE:
 12637  case JIT_OP_LGE_UN:
 12638  case JIT_OP_FEQ:
 12639  case JIT_OP_FNE:
 12640  case JIT_OP_FLT:
 12641  case JIT_OP_FLT_INV:
 12642  case JIT_OP_FLE:
 12643  case JIT_OP_FLE_INV:
 12644  case JIT_OP_FGT:
 12645  case JIT_OP_FGT_INV:
 12646  case JIT_OP_FGE:
 12647  case JIT_OP_FGE_INV:
 12648  case JIT_OP_DEQ:
 12649  case JIT_OP_DNE:
 12650  case JIT_OP_DLT:
 12651  case JIT_OP_DLT_INV:
 12652  case JIT_OP_DLE:
 12653  case JIT_OP_DLE_INV:
 12654  case JIT_OP_DGT:
 12655  case JIT_OP_DGT_INV:
 12656  case JIT_OP_DGE:
 12657  case JIT_OP_DGE_INV:
 12658  case JIT_OP_FSQRT:
 12659  case JIT_OP_DSQRT:
 12660  case JIT_OP_IMAX:
 12661  case JIT_OP_IMAX_UN:
 12662  case JIT_OP_IMIN:
 12663  case JIT_OP_IMIN_UN:
 12664  case JIT_OP_ISIGN:
 12665  case JIT_OP_LMAX:
 12666  case JIT_OP_LMAX_UN:
 12667  case JIT_OP_LMIN:
 12668  case JIT_OP_LMIN_UN:
 12669  case JIT_OP_LSIGN:
 12670  case JIT_OP_FMAX:
 12671  case JIT_OP_FMIN:
 12672  case JIT_OP_DMAX:
 12673  case JIT_OP_DMIN:
 12674  case JIT_OP_FFLOOR:
 12675  case JIT_OP_DFLOOR:
 12676  case JIT_OP_NFFLOOR:
 12677  case JIT_OP_FCEIL:
 12678  case JIT_OP_DCEIL:
 12679  case JIT_OP_NFCEIL:
 12680  case JIT_OP_CHECK_NULL:
 12681  case JIT_OP_CALL:
 12682  case JIT_OP_CALL_TAIL:
 12683  case JIT_OP_CALL_INDIRECT:
 12684  case JIT_OP_CALL_INDIRECT_TAIL:
 12685  case JIT_OP_CALL_VTABLE_PTR:
 12686  case JIT_OP_CALL_VTABLE_PTR_TAIL:
 12687  case JIT_OP_CALL_EXTERNAL:
 12688  case JIT_OP_CALL_EXTERNAL_TAIL:
 12689  case JIT_OP_THROW:
 12690  case JIT_OP_RETHROW:
 12691  case JIT_OP_LOAD_PC:
 12692  case JIT_OP_LOAD_EXCEPTION_PC:
 12693  case JIT_OP_ENTER_FINALLY:
 12694  case JIT_OP_LEAVE_FINALLY:
 12695  case JIT_OP_CALL_FINALLY:
 12696  case JIT_OP_ADDRESS_OF_LABEL:
 12697  case JIT_OP_MEMCPY:
 12698  case JIT_OP_MEMSET:
 12699  case JIT_OP_ALLOCA:
 12700  case JIT_OP_JUMP_TABLE:
 12701  	return 1;
 12702  
 12703  #endif