github.com/google/syzkaller@v0.0.0-20240517125934-c0f1611a36d6/executor/kvm.h (about)

     1  // Copyright 2017 syzkaller project authors. All rights reserved.
     2  // Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
     3  
     4  #define ADDR_TEXT 0x0000
     5  #define ADDR_GDT 0x1000
     6  #define ADDR_LDT 0x1800
     7  #define ADDR_PML4 0x2000
     8  #define ADDR_PDP 0x3000
     9  #define ADDR_PD 0x4000
    10  #define ADDR_STACK0 0x0f80
    11  #define ADDR_VAR_HLT 0x2800
    12  #define ADDR_VAR_SYSRET 0x2808
    13  #define ADDR_VAR_SYSEXIT 0x2810
    14  #define ADDR_VAR_IDT 0x3800
    15  #define ADDR_VAR_TSS64 0x3a00
    16  #define ADDR_VAR_TSS64_CPL3 0x3c00
    17  #define ADDR_VAR_TSS16 0x3d00
    18  #define ADDR_VAR_TSS16_2 0x3e00
    19  #define ADDR_VAR_TSS16_CPL3 0x3f00
    20  #define ADDR_VAR_TSS32 0x4800
    21  #define ADDR_VAR_TSS32_2 0x4a00
    22  #define ADDR_VAR_TSS32_CPL3 0x4c00
    23  #define ADDR_VAR_TSS32_VM86 0x4e00
    24  #define ADDR_VAR_VMXON_PTR 0x5f00
    25  #define ADDR_VAR_VMCS_PTR 0x5f08
    26  #define ADDR_VAR_VMEXIT_PTR 0x5f10
    27  #define ADDR_VAR_VMWRITE_FLD 0x5f18
    28  #define ADDR_VAR_VMWRITE_VAL 0x5f20
    29  #define ADDR_VAR_VMXON 0x6000
    30  #define ADDR_VAR_VMCS 0x7000
    31  #define ADDR_VAR_VMEXIT_CODE 0x9000
    32  #define ADDR_VAR_USER_CODE 0x9100
    33  #define ADDR_VAR_USER_CODE2 0x9120
    34  
    35  #define SEL_LDT (1 << 3)
    36  #define SEL_CS16 (2 << 3)
    37  #define SEL_DS16 (3 << 3)
    38  #define SEL_CS16_CPL3 ((4 << 3) + 3)
    39  #define SEL_DS16_CPL3 ((5 << 3) + 3)
    40  #define SEL_CS32 (6 << 3)
    41  #define SEL_DS32 (7 << 3)
    42  #define SEL_CS32_CPL3 ((8 << 3) + 3)
    43  #define SEL_DS32_CPL3 ((9 << 3) + 3)
    44  #define SEL_CS64 (10 << 3)
    45  #define SEL_DS64 (11 << 3)
    46  #define SEL_CS64_CPL3 ((12 << 3) + 3)
    47  #define SEL_DS64_CPL3 ((13 << 3) + 3)
    48  #define SEL_CGATE16 (14 << 3)
    49  #define SEL_TGATE16 (15 << 3)
    50  #define SEL_CGATE32 (16 << 3)
    51  #define SEL_TGATE32 (17 << 3)
    52  #define SEL_CGATE64 (18 << 3)
    53  #define SEL_CGATE64_HI (19 << 3)
    54  #define SEL_TSS16 (20 << 3)
    55  #define SEL_TSS16_2 (21 << 3)
    56  #define SEL_TSS16_CPL3 ((22 << 3) + 3)
    57  #define SEL_TSS32 (23 << 3)
    58  #define SEL_TSS32_2 (24 << 3)
    59  #define SEL_TSS32_CPL3 ((25 << 3) + 3)
    60  #define SEL_TSS32_VM86 (26 << 3)
    61  #define SEL_TSS64 (27 << 3)
    62  #define SEL_TSS64_HI (28 << 3)
    63  #define SEL_TSS64_CPL3 ((29 << 3) + 3)
    64  #define SEL_TSS64_CPL3_HI (30 << 3)
    65  
    66  #define MSR_IA32_FEATURE_CONTROL 0x3a
    67  #define MSR_IA32_VMX_BASIC 0x480
    68  #define MSR_IA32_SMBASE 0x9e
    69  #define MSR_IA32_SYSENTER_CS 0x174
    70  #define MSR_IA32_SYSENTER_ESP 0x175
    71  #define MSR_IA32_SYSENTER_EIP 0x176
    72  #define MSR_IA32_STAR 0xC0000081
    73  #define MSR_IA32_LSTAR 0xC0000082
    74  #define MSR_IA32_VMX_PROCBASED_CTLS2 0x48B
    75  
    76  #define NEXT_INSN $0xbadc0de
    77  #define PREFIX_SIZE 0xba1d