github.com/hikaru7719/go@v0.0.0-20181025140707-c8b2ac68906a/src/cmd/compile/internal/ssa/rewritePPC64.go (about)

     1  // Code generated from gen/PPC64.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "math"
     7  import "cmd/internal/obj"
     8  import "cmd/internal/objabi"
     9  import "cmd/compile/internal/types"
    10  
    11  var _ = math.MinInt8  // in case not otherwise used
    12  var _ = obj.ANOP      // in case not otherwise used
    13  var _ = objabi.GOROOT // in case not otherwise used
    14  var _ = types.TypeMem // in case not otherwise used
    15  
    16  func rewriteValuePPC64(v *Value) bool {
    17  	switch v.Op {
    18  	case OpAbs:
    19  		return rewriteValuePPC64_OpAbs_0(v)
    20  	case OpAdd16:
    21  		return rewriteValuePPC64_OpAdd16_0(v)
    22  	case OpAdd32:
    23  		return rewriteValuePPC64_OpAdd32_0(v)
    24  	case OpAdd32F:
    25  		return rewriteValuePPC64_OpAdd32F_0(v)
    26  	case OpAdd64:
    27  		return rewriteValuePPC64_OpAdd64_0(v)
    28  	case OpAdd64F:
    29  		return rewriteValuePPC64_OpAdd64F_0(v)
    30  	case OpAdd8:
    31  		return rewriteValuePPC64_OpAdd8_0(v)
    32  	case OpAddPtr:
    33  		return rewriteValuePPC64_OpAddPtr_0(v)
    34  	case OpAddr:
    35  		return rewriteValuePPC64_OpAddr_0(v)
    36  	case OpAnd16:
    37  		return rewriteValuePPC64_OpAnd16_0(v)
    38  	case OpAnd32:
    39  		return rewriteValuePPC64_OpAnd32_0(v)
    40  	case OpAnd64:
    41  		return rewriteValuePPC64_OpAnd64_0(v)
    42  	case OpAnd8:
    43  		return rewriteValuePPC64_OpAnd8_0(v)
    44  	case OpAndB:
    45  		return rewriteValuePPC64_OpAndB_0(v)
    46  	case OpAtomicAdd32:
    47  		return rewriteValuePPC64_OpAtomicAdd32_0(v)
    48  	case OpAtomicAdd64:
    49  		return rewriteValuePPC64_OpAtomicAdd64_0(v)
    50  	case OpAtomicAnd8:
    51  		return rewriteValuePPC64_OpAtomicAnd8_0(v)
    52  	case OpAtomicCompareAndSwap32:
    53  		return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
    54  	case OpAtomicCompareAndSwap64:
    55  		return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
    56  	case OpAtomicCompareAndSwapRel32:
    57  		return rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v)
    58  	case OpAtomicExchange32:
    59  		return rewriteValuePPC64_OpAtomicExchange32_0(v)
    60  	case OpAtomicExchange64:
    61  		return rewriteValuePPC64_OpAtomicExchange64_0(v)
    62  	case OpAtomicLoad32:
    63  		return rewriteValuePPC64_OpAtomicLoad32_0(v)
    64  	case OpAtomicLoad64:
    65  		return rewriteValuePPC64_OpAtomicLoad64_0(v)
    66  	case OpAtomicLoadAcq32:
    67  		return rewriteValuePPC64_OpAtomicLoadAcq32_0(v)
    68  	case OpAtomicLoadPtr:
    69  		return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
    70  	case OpAtomicOr8:
    71  		return rewriteValuePPC64_OpAtomicOr8_0(v)
    72  	case OpAtomicStore32:
    73  		return rewriteValuePPC64_OpAtomicStore32_0(v)
    74  	case OpAtomicStore64:
    75  		return rewriteValuePPC64_OpAtomicStore64_0(v)
    76  	case OpAtomicStoreRel32:
    77  		return rewriteValuePPC64_OpAtomicStoreRel32_0(v)
    78  	case OpAvg64u:
    79  		return rewriteValuePPC64_OpAvg64u_0(v)
    80  	case OpBitLen32:
    81  		return rewriteValuePPC64_OpBitLen32_0(v)
    82  	case OpBitLen64:
    83  		return rewriteValuePPC64_OpBitLen64_0(v)
    84  	case OpCeil:
    85  		return rewriteValuePPC64_OpCeil_0(v)
    86  	case OpClosureCall:
    87  		return rewriteValuePPC64_OpClosureCall_0(v)
    88  	case OpCom16:
    89  		return rewriteValuePPC64_OpCom16_0(v)
    90  	case OpCom32:
    91  		return rewriteValuePPC64_OpCom32_0(v)
    92  	case OpCom64:
    93  		return rewriteValuePPC64_OpCom64_0(v)
    94  	case OpCom8:
    95  		return rewriteValuePPC64_OpCom8_0(v)
    96  	case OpConst16:
    97  		return rewriteValuePPC64_OpConst16_0(v)
    98  	case OpConst32:
    99  		return rewriteValuePPC64_OpConst32_0(v)
   100  	case OpConst32F:
   101  		return rewriteValuePPC64_OpConst32F_0(v)
   102  	case OpConst64:
   103  		return rewriteValuePPC64_OpConst64_0(v)
   104  	case OpConst64F:
   105  		return rewriteValuePPC64_OpConst64F_0(v)
   106  	case OpConst8:
   107  		return rewriteValuePPC64_OpConst8_0(v)
   108  	case OpConstBool:
   109  		return rewriteValuePPC64_OpConstBool_0(v)
   110  	case OpConstNil:
   111  		return rewriteValuePPC64_OpConstNil_0(v)
   112  	case OpCopysign:
   113  		return rewriteValuePPC64_OpCopysign_0(v)
   114  	case OpCtz16:
   115  		return rewriteValuePPC64_OpCtz16_0(v)
   116  	case OpCtz32:
   117  		return rewriteValuePPC64_OpCtz32_0(v)
   118  	case OpCtz32NonZero:
   119  		return rewriteValuePPC64_OpCtz32NonZero_0(v)
   120  	case OpCtz64:
   121  		return rewriteValuePPC64_OpCtz64_0(v)
   122  	case OpCtz64NonZero:
   123  		return rewriteValuePPC64_OpCtz64NonZero_0(v)
   124  	case OpCtz8:
   125  		return rewriteValuePPC64_OpCtz8_0(v)
   126  	case OpCvt32Fto32:
   127  		return rewriteValuePPC64_OpCvt32Fto32_0(v)
   128  	case OpCvt32Fto64:
   129  		return rewriteValuePPC64_OpCvt32Fto64_0(v)
   130  	case OpCvt32Fto64F:
   131  		return rewriteValuePPC64_OpCvt32Fto64F_0(v)
   132  	case OpCvt32to32F:
   133  		return rewriteValuePPC64_OpCvt32to32F_0(v)
   134  	case OpCvt32to64F:
   135  		return rewriteValuePPC64_OpCvt32to64F_0(v)
   136  	case OpCvt64Fto32:
   137  		return rewriteValuePPC64_OpCvt64Fto32_0(v)
   138  	case OpCvt64Fto32F:
   139  		return rewriteValuePPC64_OpCvt64Fto32F_0(v)
   140  	case OpCvt64Fto64:
   141  		return rewriteValuePPC64_OpCvt64Fto64_0(v)
   142  	case OpCvt64to32F:
   143  		return rewriteValuePPC64_OpCvt64to32F_0(v)
   144  	case OpCvt64to64F:
   145  		return rewriteValuePPC64_OpCvt64to64F_0(v)
   146  	case OpDiv16:
   147  		return rewriteValuePPC64_OpDiv16_0(v)
   148  	case OpDiv16u:
   149  		return rewriteValuePPC64_OpDiv16u_0(v)
   150  	case OpDiv32:
   151  		return rewriteValuePPC64_OpDiv32_0(v)
   152  	case OpDiv32F:
   153  		return rewriteValuePPC64_OpDiv32F_0(v)
   154  	case OpDiv32u:
   155  		return rewriteValuePPC64_OpDiv32u_0(v)
   156  	case OpDiv64:
   157  		return rewriteValuePPC64_OpDiv64_0(v)
   158  	case OpDiv64F:
   159  		return rewriteValuePPC64_OpDiv64F_0(v)
   160  	case OpDiv64u:
   161  		return rewriteValuePPC64_OpDiv64u_0(v)
   162  	case OpDiv8:
   163  		return rewriteValuePPC64_OpDiv8_0(v)
   164  	case OpDiv8u:
   165  		return rewriteValuePPC64_OpDiv8u_0(v)
   166  	case OpEq16:
   167  		return rewriteValuePPC64_OpEq16_0(v)
   168  	case OpEq32:
   169  		return rewriteValuePPC64_OpEq32_0(v)
   170  	case OpEq32F:
   171  		return rewriteValuePPC64_OpEq32F_0(v)
   172  	case OpEq64:
   173  		return rewriteValuePPC64_OpEq64_0(v)
   174  	case OpEq64F:
   175  		return rewriteValuePPC64_OpEq64F_0(v)
   176  	case OpEq8:
   177  		return rewriteValuePPC64_OpEq8_0(v)
   178  	case OpEqB:
   179  		return rewriteValuePPC64_OpEqB_0(v)
   180  	case OpEqPtr:
   181  		return rewriteValuePPC64_OpEqPtr_0(v)
   182  	case OpFloor:
   183  		return rewriteValuePPC64_OpFloor_0(v)
   184  	case OpGeq16:
   185  		return rewriteValuePPC64_OpGeq16_0(v)
   186  	case OpGeq16U:
   187  		return rewriteValuePPC64_OpGeq16U_0(v)
   188  	case OpGeq32:
   189  		return rewriteValuePPC64_OpGeq32_0(v)
   190  	case OpGeq32F:
   191  		return rewriteValuePPC64_OpGeq32F_0(v)
   192  	case OpGeq32U:
   193  		return rewriteValuePPC64_OpGeq32U_0(v)
   194  	case OpGeq64:
   195  		return rewriteValuePPC64_OpGeq64_0(v)
   196  	case OpGeq64F:
   197  		return rewriteValuePPC64_OpGeq64F_0(v)
   198  	case OpGeq64U:
   199  		return rewriteValuePPC64_OpGeq64U_0(v)
   200  	case OpGeq8:
   201  		return rewriteValuePPC64_OpGeq8_0(v)
   202  	case OpGeq8U:
   203  		return rewriteValuePPC64_OpGeq8U_0(v)
   204  	case OpGetCallerPC:
   205  		return rewriteValuePPC64_OpGetCallerPC_0(v)
   206  	case OpGetCallerSP:
   207  		return rewriteValuePPC64_OpGetCallerSP_0(v)
   208  	case OpGetClosurePtr:
   209  		return rewriteValuePPC64_OpGetClosurePtr_0(v)
   210  	case OpGreater16:
   211  		return rewriteValuePPC64_OpGreater16_0(v)
   212  	case OpGreater16U:
   213  		return rewriteValuePPC64_OpGreater16U_0(v)
   214  	case OpGreater32:
   215  		return rewriteValuePPC64_OpGreater32_0(v)
   216  	case OpGreater32F:
   217  		return rewriteValuePPC64_OpGreater32F_0(v)
   218  	case OpGreater32U:
   219  		return rewriteValuePPC64_OpGreater32U_0(v)
   220  	case OpGreater64:
   221  		return rewriteValuePPC64_OpGreater64_0(v)
   222  	case OpGreater64F:
   223  		return rewriteValuePPC64_OpGreater64F_0(v)
   224  	case OpGreater64U:
   225  		return rewriteValuePPC64_OpGreater64U_0(v)
   226  	case OpGreater8:
   227  		return rewriteValuePPC64_OpGreater8_0(v)
   228  	case OpGreater8U:
   229  		return rewriteValuePPC64_OpGreater8U_0(v)
   230  	case OpHmul32:
   231  		return rewriteValuePPC64_OpHmul32_0(v)
   232  	case OpHmul32u:
   233  		return rewriteValuePPC64_OpHmul32u_0(v)
   234  	case OpHmul64:
   235  		return rewriteValuePPC64_OpHmul64_0(v)
   236  	case OpHmul64u:
   237  		return rewriteValuePPC64_OpHmul64u_0(v)
   238  	case OpInterCall:
   239  		return rewriteValuePPC64_OpInterCall_0(v)
   240  	case OpIsInBounds:
   241  		return rewriteValuePPC64_OpIsInBounds_0(v)
   242  	case OpIsNonNil:
   243  		return rewriteValuePPC64_OpIsNonNil_0(v)
   244  	case OpIsSliceInBounds:
   245  		return rewriteValuePPC64_OpIsSliceInBounds_0(v)
   246  	case OpLeq16:
   247  		return rewriteValuePPC64_OpLeq16_0(v)
   248  	case OpLeq16U:
   249  		return rewriteValuePPC64_OpLeq16U_0(v)
   250  	case OpLeq32:
   251  		return rewriteValuePPC64_OpLeq32_0(v)
   252  	case OpLeq32F:
   253  		return rewriteValuePPC64_OpLeq32F_0(v)
   254  	case OpLeq32U:
   255  		return rewriteValuePPC64_OpLeq32U_0(v)
   256  	case OpLeq64:
   257  		return rewriteValuePPC64_OpLeq64_0(v)
   258  	case OpLeq64F:
   259  		return rewriteValuePPC64_OpLeq64F_0(v)
   260  	case OpLeq64U:
   261  		return rewriteValuePPC64_OpLeq64U_0(v)
   262  	case OpLeq8:
   263  		return rewriteValuePPC64_OpLeq8_0(v)
   264  	case OpLeq8U:
   265  		return rewriteValuePPC64_OpLeq8U_0(v)
   266  	case OpLess16:
   267  		return rewriteValuePPC64_OpLess16_0(v)
   268  	case OpLess16U:
   269  		return rewriteValuePPC64_OpLess16U_0(v)
   270  	case OpLess32:
   271  		return rewriteValuePPC64_OpLess32_0(v)
   272  	case OpLess32F:
   273  		return rewriteValuePPC64_OpLess32F_0(v)
   274  	case OpLess32U:
   275  		return rewriteValuePPC64_OpLess32U_0(v)
   276  	case OpLess64:
   277  		return rewriteValuePPC64_OpLess64_0(v)
   278  	case OpLess64F:
   279  		return rewriteValuePPC64_OpLess64F_0(v)
   280  	case OpLess64U:
   281  		return rewriteValuePPC64_OpLess64U_0(v)
   282  	case OpLess8:
   283  		return rewriteValuePPC64_OpLess8_0(v)
   284  	case OpLess8U:
   285  		return rewriteValuePPC64_OpLess8U_0(v)
   286  	case OpLoad:
   287  		return rewriteValuePPC64_OpLoad_0(v)
   288  	case OpLocalAddr:
   289  		return rewriteValuePPC64_OpLocalAddr_0(v)
   290  	case OpLsh16x16:
   291  		return rewriteValuePPC64_OpLsh16x16_0(v)
   292  	case OpLsh16x32:
   293  		return rewriteValuePPC64_OpLsh16x32_0(v)
   294  	case OpLsh16x64:
   295  		return rewriteValuePPC64_OpLsh16x64_0(v)
   296  	case OpLsh16x8:
   297  		return rewriteValuePPC64_OpLsh16x8_0(v)
   298  	case OpLsh32x16:
   299  		return rewriteValuePPC64_OpLsh32x16_0(v)
   300  	case OpLsh32x32:
   301  		return rewriteValuePPC64_OpLsh32x32_0(v)
   302  	case OpLsh32x64:
   303  		return rewriteValuePPC64_OpLsh32x64_0(v)
   304  	case OpLsh32x8:
   305  		return rewriteValuePPC64_OpLsh32x8_0(v)
   306  	case OpLsh64x16:
   307  		return rewriteValuePPC64_OpLsh64x16_0(v)
   308  	case OpLsh64x32:
   309  		return rewriteValuePPC64_OpLsh64x32_0(v)
   310  	case OpLsh64x64:
   311  		return rewriteValuePPC64_OpLsh64x64_0(v)
   312  	case OpLsh64x8:
   313  		return rewriteValuePPC64_OpLsh64x8_0(v)
   314  	case OpLsh8x16:
   315  		return rewriteValuePPC64_OpLsh8x16_0(v)
   316  	case OpLsh8x32:
   317  		return rewriteValuePPC64_OpLsh8x32_0(v)
   318  	case OpLsh8x64:
   319  		return rewriteValuePPC64_OpLsh8x64_0(v)
   320  	case OpLsh8x8:
   321  		return rewriteValuePPC64_OpLsh8x8_0(v)
   322  	case OpMod16:
   323  		return rewriteValuePPC64_OpMod16_0(v)
   324  	case OpMod16u:
   325  		return rewriteValuePPC64_OpMod16u_0(v)
   326  	case OpMod32:
   327  		return rewriteValuePPC64_OpMod32_0(v)
   328  	case OpMod32u:
   329  		return rewriteValuePPC64_OpMod32u_0(v)
   330  	case OpMod64:
   331  		return rewriteValuePPC64_OpMod64_0(v)
   332  	case OpMod64u:
   333  		return rewriteValuePPC64_OpMod64u_0(v)
   334  	case OpMod8:
   335  		return rewriteValuePPC64_OpMod8_0(v)
   336  	case OpMod8u:
   337  		return rewriteValuePPC64_OpMod8u_0(v)
   338  	case OpMove:
   339  		return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
   340  	case OpMul16:
   341  		return rewriteValuePPC64_OpMul16_0(v)
   342  	case OpMul32:
   343  		return rewriteValuePPC64_OpMul32_0(v)
   344  	case OpMul32F:
   345  		return rewriteValuePPC64_OpMul32F_0(v)
   346  	case OpMul64:
   347  		return rewriteValuePPC64_OpMul64_0(v)
   348  	case OpMul64F:
   349  		return rewriteValuePPC64_OpMul64F_0(v)
   350  	case OpMul64uhilo:
   351  		return rewriteValuePPC64_OpMul64uhilo_0(v)
   352  	case OpMul8:
   353  		return rewriteValuePPC64_OpMul8_0(v)
   354  	case OpNeg16:
   355  		return rewriteValuePPC64_OpNeg16_0(v)
   356  	case OpNeg32:
   357  		return rewriteValuePPC64_OpNeg32_0(v)
   358  	case OpNeg32F:
   359  		return rewriteValuePPC64_OpNeg32F_0(v)
   360  	case OpNeg64:
   361  		return rewriteValuePPC64_OpNeg64_0(v)
   362  	case OpNeg64F:
   363  		return rewriteValuePPC64_OpNeg64F_0(v)
   364  	case OpNeg8:
   365  		return rewriteValuePPC64_OpNeg8_0(v)
   366  	case OpNeq16:
   367  		return rewriteValuePPC64_OpNeq16_0(v)
   368  	case OpNeq32:
   369  		return rewriteValuePPC64_OpNeq32_0(v)
   370  	case OpNeq32F:
   371  		return rewriteValuePPC64_OpNeq32F_0(v)
   372  	case OpNeq64:
   373  		return rewriteValuePPC64_OpNeq64_0(v)
   374  	case OpNeq64F:
   375  		return rewriteValuePPC64_OpNeq64F_0(v)
   376  	case OpNeq8:
   377  		return rewriteValuePPC64_OpNeq8_0(v)
   378  	case OpNeqB:
   379  		return rewriteValuePPC64_OpNeqB_0(v)
   380  	case OpNeqPtr:
   381  		return rewriteValuePPC64_OpNeqPtr_0(v)
   382  	case OpNilCheck:
   383  		return rewriteValuePPC64_OpNilCheck_0(v)
   384  	case OpNot:
   385  		return rewriteValuePPC64_OpNot_0(v)
   386  	case OpOffPtr:
   387  		return rewriteValuePPC64_OpOffPtr_0(v)
   388  	case OpOr16:
   389  		return rewriteValuePPC64_OpOr16_0(v)
   390  	case OpOr32:
   391  		return rewriteValuePPC64_OpOr32_0(v)
   392  	case OpOr64:
   393  		return rewriteValuePPC64_OpOr64_0(v)
   394  	case OpOr8:
   395  		return rewriteValuePPC64_OpOr8_0(v)
   396  	case OpOrB:
   397  		return rewriteValuePPC64_OpOrB_0(v)
   398  	case OpPPC64ADD:
   399  		return rewriteValuePPC64_OpPPC64ADD_0(v)
   400  	case OpPPC64ADDconst:
   401  		return rewriteValuePPC64_OpPPC64ADDconst_0(v)
   402  	case OpPPC64AND:
   403  		return rewriteValuePPC64_OpPPC64AND_0(v) || rewriteValuePPC64_OpPPC64AND_10(v)
   404  	case OpPPC64ANDconst:
   405  		return rewriteValuePPC64_OpPPC64ANDconst_0(v) || rewriteValuePPC64_OpPPC64ANDconst_10(v)
   406  	case OpPPC64CMP:
   407  		return rewriteValuePPC64_OpPPC64CMP_0(v)
   408  	case OpPPC64CMPU:
   409  		return rewriteValuePPC64_OpPPC64CMPU_0(v)
   410  	case OpPPC64CMPUconst:
   411  		return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
   412  	case OpPPC64CMPW:
   413  		return rewriteValuePPC64_OpPPC64CMPW_0(v)
   414  	case OpPPC64CMPWU:
   415  		return rewriteValuePPC64_OpPPC64CMPWU_0(v)
   416  	case OpPPC64CMPWUconst:
   417  		return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
   418  	case OpPPC64CMPWconst:
   419  		return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
   420  	case OpPPC64CMPconst:
   421  		return rewriteValuePPC64_OpPPC64CMPconst_0(v)
   422  	case OpPPC64Equal:
   423  		return rewriteValuePPC64_OpPPC64Equal_0(v)
   424  	case OpPPC64FABS:
   425  		return rewriteValuePPC64_OpPPC64FABS_0(v)
   426  	case OpPPC64FADD:
   427  		return rewriteValuePPC64_OpPPC64FADD_0(v)
   428  	case OpPPC64FADDS:
   429  		return rewriteValuePPC64_OpPPC64FADDS_0(v)
   430  	case OpPPC64FCEIL:
   431  		return rewriteValuePPC64_OpPPC64FCEIL_0(v)
   432  	case OpPPC64FFLOOR:
   433  		return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
   434  	case OpPPC64FMOVDload:
   435  		return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
   436  	case OpPPC64FMOVDstore:
   437  		return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
   438  	case OpPPC64FMOVSload:
   439  		return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
   440  	case OpPPC64FMOVSstore:
   441  		return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
   442  	case OpPPC64FNEG:
   443  		return rewriteValuePPC64_OpPPC64FNEG_0(v)
   444  	case OpPPC64FSQRT:
   445  		return rewriteValuePPC64_OpPPC64FSQRT_0(v)
   446  	case OpPPC64FSUB:
   447  		return rewriteValuePPC64_OpPPC64FSUB_0(v)
   448  	case OpPPC64FSUBS:
   449  		return rewriteValuePPC64_OpPPC64FSUBS_0(v)
   450  	case OpPPC64FTRUNC:
   451  		return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
   452  	case OpPPC64GreaterEqual:
   453  		return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
   454  	case OpPPC64GreaterThan:
   455  		return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
   456  	case OpPPC64LessEqual:
   457  		return rewriteValuePPC64_OpPPC64LessEqual_0(v)
   458  	case OpPPC64LessThan:
   459  		return rewriteValuePPC64_OpPPC64LessThan_0(v)
   460  	case OpPPC64MFVSRD:
   461  		return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
   462  	case OpPPC64MOVBZload:
   463  		return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
   464  	case OpPPC64MOVBZloadidx:
   465  		return rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v)
   466  	case OpPPC64MOVBZreg:
   467  		return rewriteValuePPC64_OpPPC64MOVBZreg_0(v) || rewriteValuePPC64_OpPPC64MOVBZreg_10(v)
   468  	case OpPPC64MOVBreg:
   469  		return rewriteValuePPC64_OpPPC64MOVBreg_0(v) || rewriteValuePPC64_OpPPC64MOVBreg_10(v)
   470  	case OpPPC64MOVBstore:
   471  		return rewriteValuePPC64_OpPPC64MOVBstore_0(v) || rewriteValuePPC64_OpPPC64MOVBstore_10(v) || rewriteValuePPC64_OpPPC64MOVBstore_20(v)
   472  	case OpPPC64MOVBstoreidx:
   473  		return rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v) || rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v)
   474  	case OpPPC64MOVBstorezero:
   475  		return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
   476  	case OpPPC64MOVDload:
   477  		return rewriteValuePPC64_OpPPC64MOVDload_0(v)
   478  	case OpPPC64MOVDloadidx:
   479  		return rewriteValuePPC64_OpPPC64MOVDloadidx_0(v)
   480  	case OpPPC64MOVDstore:
   481  		return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
   482  	case OpPPC64MOVDstoreidx:
   483  		return rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v)
   484  	case OpPPC64MOVDstorezero:
   485  		return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
   486  	case OpPPC64MOVHBRstore:
   487  		return rewriteValuePPC64_OpPPC64MOVHBRstore_0(v)
   488  	case OpPPC64MOVHZload:
   489  		return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
   490  	case OpPPC64MOVHZloadidx:
   491  		return rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v)
   492  	case OpPPC64MOVHZreg:
   493  		return rewriteValuePPC64_OpPPC64MOVHZreg_0(v) || rewriteValuePPC64_OpPPC64MOVHZreg_10(v)
   494  	case OpPPC64MOVHload:
   495  		return rewriteValuePPC64_OpPPC64MOVHload_0(v)
   496  	case OpPPC64MOVHloadidx:
   497  		return rewriteValuePPC64_OpPPC64MOVHloadidx_0(v)
   498  	case OpPPC64MOVHreg:
   499  		return rewriteValuePPC64_OpPPC64MOVHreg_0(v) || rewriteValuePPC64_OpPPC64MOVHreg_10(v)
   500  	case OpPPC64MOVHstore:
   501  		return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
   502  	case OpPPC64MOVHstoreidx:
   503  		return rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v)
   504  	case OpPPC64MOVHstorezero:
   505  		return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
   506  	case OpPPC64MOVWBRstore:
   507  		return rewriteValuePPC64_OpPPC64MOVWBRstore_0(v)
   508  	case OpPPC64MOVWZload:
   509  		return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
   510  	case OpPPC64MOVWZloadidx:
   511  		return rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v)
   512  	case OpPPC64MOVWZreg:
   513  		return rewriteValuePPC64_OpPPC64MOVWZreg_0(v) || rewriteValuePPC64_OpPPC64MOVWZreg_10(v) || rewriteValuePPC64_OpPPC64MOVWZreg_20(v)
   514  	case OpPPC64MOVWload:
   515  		return rewriteValuePPC64_OpPPC64MOVWload_0(v)
   516  	case OpPPC64MOVWloadidx:
   517  		return rewriteValuePPC64_OpPPC64MOVWloadidx_0(v)
   518  	case OpPPC64MOVWreg:
   519  		return rewriteValuePPC64_OpPPC64MOVWreg_0(v) || rewriteValuePPC64_OpPPC64MOVWreg_10(v)
   520  	case OpPPC64MOVWstore:
   521  		return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
   522  	case OpPPC64MOVWstoreidx:
   523  		return rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v)
   524  	case OpPPC64MOVWstorezero:
   525  		return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
   526  	case OpPPC64MTVSRD:
   527  		return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
   528  	case OpPPC64MaskIfNotCarry:
   529  		return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
   530  	case OpPPC64NotEqual:
   531  		return rewriteValuePPC64_OpPPC64NotEqual_0(v)
   532  	case OpPPC64OR:
   533  		return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v)
   534  	case OpPPC64ORN:
   535  		return rewriteValuePPC64_OpPPC64ORN_0(v)
   536  	case OpPPC64ORconst:
   537  		return rewriteValuePPC64_OpPPC64ORconst_0(v)
   538  	case OpPPC64SUB:
   539  		return rewriteValuePPC64_OpPPC64SUB_0(v)
   540  	case OpPPC64XOR:
   541  		return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
   542  	case OpPPC64XORconst:
   543  		return rewriteValuePPC64_OpPPC64XORconst_0(v)
   544  	case OpPopCount16:
   545  		return rewriteValuePPC64_OpPopCount16_0(v)
   546  	case OpPopCount32:
   547  		return rewriteValuePPC64_OpPopCount32_0(v)
   548  	case OpPopCount64:
   549  		return rewriteValuePPC64_OpPopCount64_0(v)
   550  	case OpPopCount8:
   551  		return rewriteValuePPC64_OpPopCount8_0(v)
   552  	case OpRound:
   553  		return rewriteValuePPC64_OpRound_0(v)
   554  	case OpRound32F:
   555  		return rewriteValuePPC64_OpRound32F_0(v)
   556  	case OpRound64F:
   557  		return rewriteValuePPC64_OpRound64F_0(v)
   558  	case OpRsh16Ux16:
   559  		return rewriteValuePPC64_OpRsh16Ux16_0(v)
   560  	case OpRsh16Ux32:
   561  		return rewriteValuePPC64_OpRsh16Ux32_0(v)
   562  	case OpRsh16Ux64:
   563  		return rewriteValuePPC64_OpRsh16Ux64_0(v)
   564  	case OpRsh16Ux8:
   565  		return rewriteValuePPC64_OpRsh16Ux8_0(v)
   566  	case OpRsh16x16:
   567  		return rewriteValuePPC64_OpRsh16x16_0(v)
   568  	case OpRsh16x32:
   569  		return rewriteValuePPC64_OpRsh16x32_0(v)
   570  	case OpRsh16x64:
   571  		return rewriteValuePPC64_OpRsh16x64_0(v)
   572  	case OpRsh16x8:
   573  		return rewriteValuePPC64_OpRsh16x8_0(v)
   574  	case OpRsh32Ux16:
   575  		return rewriteValuePPC64_OpRsh32Ux16_0(v)
   576  	case OpRsh32Ux32:
   577  		return rewriteValuePPC64_OpRsh32Ux32_0(v)
   578  	case OpRsh32Ux64:
   579  		return rewriteValuePPC64_OpRsh32Ux64_0(v) || rewriteValuePPC64_OpRsh32Ux64_10(v)
   580  	case OpRsh32Ux8:
   581  		return rewriteValuePPC64_OpRsh32Ux8_0(v)
   582  	case OpRsh32x16:
   583  		return rewriteValuePPC64_OpRsh32x16_0(v)
   584  	case OpRsh32x32:
   585  		return rewriteValuePPC64_OpRsh32x32_0(v)
   586  	case OpRsh32x64:
   587  		return rewriteValuePPC64_OpRsh32x64_0(v) || rewriteValuePPC64_OpRsh32x64_10(v)
   588  	case OpRsh32x8:
   589  		return rewriteValuePPC64_OpRsh32x8_0(v)
   590  	case OpRsh64Ux16:
   591  		return rewriteValuePPC64_OpRsh64Ux16_0(v)
   592  	case OpRsh64Ux32:
   593  		return rewriteValuePPC64_OpRsh64Ux32_0(v)
   594  	case OpRsh64Ux64:
   595  		return rewriteValuePPC64_OpRsh64Ux64_0(v) || rewriteValuePPC64_OpRsh64Ux64_10(v)
   596  	case OpRsh64Ux8:
   597  		return rewriteValuePPC64_OpRsh64Ux8_0(v)
   598  	case OpRsh64x16:
   599  		return rewriteValuePPC64_OpRsh64x16_0(v)
   600  	case OpRsh64x32:
   601  		return rewriteValuePPC64_OpRsh64x32_0(v)
   602  	case OpRsh64x64:
   603  		return rewriteValuePPC64_OpRsh64x64_0(v) || rewriteValuePPC64_OpRsh64x64_10(v)
   604  	case OpRsh64x8:
   605  		return rewriteValuePPC64_OpRsh64x8_0(v)
   606  	case OpRsh8Ux16:
   607  		return rewriteValuePPC64_OpRsh8Ux16_0(v)
   608  	case OpRsh8Ux32:
   609  		return rewriteValuePPC64_OpRsh8Ux32_0(v)
   610  	case OpRsh8Ux64:
   611  		return rewriteValuePPC64_OpRsh8Ux64_0(v)
   612  	case OpRsh8Ux8:
   613  		return rewriteValuePPC64_OpRsh8Ux8_0(v)
   614  	case OpRsh8x16:
   615  		return rewriteValuePPC64_OpRsh8x16_0(v)
   616  	case OpRsh8x32:
   617  		return rewriteValuePPC64_OpRsh8x32_0(v)
   618  	case OpRsh8x64:
   619  		return rewriteValuePPC64_OpRsh8x64_0(v)
   620  	case OpRsh8x8:
   621  		return rewriteValuePPC64_OpRsh8x8_0(v)
   622  	case OpSignExt16to32:
   623  		return rewriteValuePPC64_OpSignExt16to32_0(v)
   624  	case OpSignExt16to64:
   625  		return rewriteValuePPC64_OpSignExt16to64_0(v)
   626  	case OpSignExt32to64:
   627  		return rewriteValuePPC64_OpSignExt32to64_0(v)
   628  	case OpSignExt8to16:
   629  		return rewriteValuePPC64_OpSignExt8to16_0(v)
   630  	case OpSignExt8to32:
   631  		return rewriteValuePPC64_OpSignExt8to32_0(v)
   632  	case OpSignExt8to64:
   633  		return rewriteValuePPC64_OpSignExt8to64_0(v)
   634  	case OpSlicemask:
   635  		return rewriteValuePPC64_OpSlicemask_0(v)
   636  	case OpSqrt:
   637  		return rewriteValuePPC64_OpSqrt_0(v)
   638  	case OpStaticCall:
   639  		return rewriteValuePPC64_OpStaticCall_0(v)
   640  	case OpStore:
   641  		return rewriteValuePPC64_OpStore_0(v)
   642  	case OpSub16:
   643  		return rewriteValuePPC64_OpSub16_0(v)
   644  	case OpSub32:
   645  		return rewriteValuePPC64_OpSub32_0(v)
   646  	case OpSub32F:
   647  		return rewriteValuePPC64_OpSub32F_0(v)
   648  	case OpSub64:
   649  		return rewriteValuePPC64_OpSub64_0(v)
   650  	case OpSub64F:
   651  		return rewriteValuePPC64_OpSub64F_0(v)
   652  	case OpSub8:
   653  		return rewriteValuePPC64_OpSub8_0(v)
   654  	case OpSubPtr:
   655  		return rewriteValuePPC64_OpSubPtr_0(v)
   656  	case OpTrunc:
   657  		return rewriteValuePPC64_OpTrunc_0(v)
   658  	case OpTrunc16to8:
   659  		return rewriteValuePPC64_OpTrunc16to8_0(v)
   660  	case OpTrunc32to16:
   661  		return rewriteValuePPC64_OpTrunc32to16_0(v)
   662  	case OpTrunc32to8:
   663  		return rewriteValuePPC64_OpTrunc32to8_0(v)
   664  	case OpTrunc64to16:
   665  		return rewriteValuePPC64_OpTrunc64to16_0(v)
   666  	case OpTrunc64to32:
   667  		return rewriteValuePPC64_OpTrunc64to32_0(v)
   668  	case OpTrunc64to8:
   669  		return rewriteValuePPC64_OpTrunc64to8_0(v)
   670  	case OpWB:
   671  		return rewriteValuePPC64_OpWB_0(v)
   672  	case OpXor16:
   673  		return rewriteValuePPC64_OpXor16_0(v)
   674  	case OpXor32:
   675  		return rewriteValuePPC64_OpXor32_0(v)
   676  	case OpXor64:
   677  		return rewriteValuePPC64_OpXor64_0(v)
   678  	case OpXor8:
   679  		return rewriteValuePPC64_OpXor8_0(v)
   680  	case OpZero:
   681  		return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
   682  	case OpZeroExt16to32:
   683  		return rewriteValuePPC64_OpZeroExt16to32_0(v)
   684  	case OpZeroExt16to64:
   685  		return rewriteValuePPC64_OpZeroExt16to64_0(v)
   686  	case OpZeroExt32to64:
   687  		return rewriteValuePPC64_OpZeroExt32to64_0(v)
   688  	case OpZeroExt8to16:
   689  		return rewriteValuePPC64_OpZeroExt8to16_0(v)
   690  	case OpZeroExt8to32:
   691  		return rewriteValuePPC64_OpZeroExt8to32_0(v)
   692  	case OpZeroExt8to64:
   693  		return rewriteValuePPC64_OpZeroExt8to64_0(v)
   694  	}
   695  	return false
   696  }
   697  func rewriteValuePPC64_OpAbs_0(v *Value) bool {
   698  	// match: (Abs x)
   699  	// cond:
   700  	// result: (FABS x)
   701  	for {
   702  		x := v.Args[0]
   703  		v.reset(OpPPC64FABS)
   704  		v.AddArg(x)
   705  		return true
   706  	}
   707  }
   708  func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
   709  	// match: (Add16 x y)
   710  	// cond:
   711  	// result: (ADD x y)
   712  	for {
   713  		_ = v.Args[1]
   714  		x := v.Args[0]
   715  		y := v.Args[1]
   716  		v.reset(OpPPC64ADD)
   717  		v.AddArg(x)
   718  		v.AddArg(y)
   719  		return true
   720  	}
   721  }
   722  func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
   723  	// match: (Add32 x y)
   724  	// cond:
   725  	// result: (ADD x y)
   726  	for {
   727  		_ = v.Args[1]
   728  		x := v.Args[0]
   729  		y := v.Args[1]
   730  		v.reset(OpPPC64ADD)
   731  		v.AddArg(x)
   732  		v.AddArg(y)
   733  		return true
   734  	}
   735  }
   736  func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
   737  	// match: (Add32F x y)
   738  	// cond:
   739  	// result: (FADDS x y)
   740  	for {
   741  		_ = v.Args[1]
   742  		x := v.Args[0]
   743  		y := v.Args[1]
   744  		v.reset(OpPPC64FADDS)
   745  		v.AddArg(x)
   746  		v.AddArg(y)
   747  		return true
   748  	}
   749  }
   750  func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
   751  	// match: (Add64 x y)
   752  	// cond:
   753  	// result: (ADD x y)
   754  	for {
   755  		_ = v.Args[1]
   756  		x := v.Args[0]
   757  		y := v.Args[1]
   758  		v.reset(OpPPC64ADD)
   759  		v.AddArg(x)
   760  		v.AddArg(y)
   761  		return true
   762  	}
   763  }
   764  func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
   765  	// match: (Add64F x y)
   766  	// cond:
   767  	// result: (FADD x y)
   768  	for {
   769  		_ = v.Args[1]
   770  		x := v.Args[0]
   771  		y := v.Args[1]
   772  		v.reset(OpPPC64FADD)
   773  		v.AddArg(x)
   774  		v.AddArg(y)
   775  		return true
   776  	}
   777  }
   778  func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
   779  	// match: (Add8 x y)
   780  	// cond:
   781  	// result: (ADD x y)
   782  	for {
   783  		_ = v.Args[1]
   784  		x := v.Args[0]
   785  		y := v.Args[1]
   786  		v.reset(OpPPC64ADD)
   787  		v.AddArg(x)
   788  		v.AddArg(y)
   789  		return true
   790  	}
   791  }
   792  func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
   793  	// match: (AddPtr x y)
   794  	// cond:
   795  	// result: (ADD x y)
   796  	for {
   797  		_ = v.Args[1]
   798  		x := v.Args[0]
   799  		y := v.Args[1]
   800  		v.reset(OpPPC64ADD)
   801  		v.AddArg(x)
   802  		v.AddArg(y)
   803  		return true
   804  	}
   805  }
   806  func rewriteValuePPC64_OpAddr_0(v *Value) bool {
   807  	// match: (Addr {sym} base)
   808  	// cond:
   809  	// result: (MOVDaddr {sym} base)
   810  	for {
   811  		sym := v.Aux
   812  		base := v.Args[0]
   813  		v.reset(OpPPC64MOVDaddr)
   814  		v.Aux = sym
   815  		v.AddArg(base)
   816  		return true
   817  	}
   818  }
   819  func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
   820  	// match: (And16 x y)
   821  	// cond:
   822  	// result: (AND x y)
   823  	for {
   824  		_ = v.Args[1]
   825  		x := v.Args[0]
   826  		y := v.Args[1]
   827  		v.reset(OpPPC64AND)
   828  		v.AddArg(x)
   829  		v.AddArg(y)
   830  		return true
   831  	}
   832  }
   833  func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
   834  	// match: (And32 x y)
   835  	// cond:
   836  	// result: (AND x y)
   837  	for {
   838  		_ = v.Args[1]
   839  		x := v.Args[0]
   840  		y := v.Args[1]
   841  		v.reset(OpPPC64AND)
   842  		v.AddArg(x)
   843  		v.AddArg(y)
   844  		return true
   845  	}
   846  }
   847  func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
   848  	// match: (And64 x y)
   849  	// cond:
   850  	// result: (AND x y)
   851  	for {
   852  		_ = v.Args[1]
   853  		x := v.Args[0]
   854  		y := v.Args[1]
   855  		v.reset(OpPPC64AND)
   856  		v.AddArg(x)
   857  		v.AddArg(y)
   858  		return true
   859  	}
   860  }
   861  func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
   862  	// match: (And8 x y)
   863  	// cond:
   864  	// result: (AND x y)
   865  	for {
   866  		_ = v.Args[1]
   867  		x := v.Args[0]
   868  		y := v.Args[1]
   869  		v.reset(OpPPC64AND)
   870  		v.AddArg(x)
   871  		v.AddArg(y)
   872  		return true
   873  	}
   874  }
   875  func rewriteValuePPC64_OpAndB_0(v *Value) bool {
   876  	// match: (AndB x y)
   877  	// cond:
   878  	// result: (AND x y)
   879  	for {
   880  		_ = v.Args[1]
   881  		x := v.Args[0]
   882  		y := v.Args[1]
   883  		v.reset(OpPPC64AND)
   884  		v.AddArg(x)
   885  		v.AddArg(y)
   886  		return true
   887  	}
   888  }
   889  func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
   890  	// match: (AtomicAdd32 ptr val mem)
   891  	// cond:
   892  	// result: (LoweredAtomicAdd32 ptr val mem)
   893  	for {
   894  		_ = v.Args[2]
   895  		ptr := v.Args[0]
   896  		val := v.Args[1]
   897  		mem := v.Args[2]
   898  		v.reset(OpPPC64LoweredAtomicAdd32)
   899  		v.AddArg(ptr)
   900  		v.AddArg(val)
   901  		v.AddArg(mem)
   902  		return true
   903  	}
   904  }
   905  func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
   906  	// match: (AtomicAdd64 ptr val mem)
   907  	// cond:
   908  	// result: (LoweredAtomicAdd64 ptr val mem)
   909  	for {
   910  		_ = v.Args[2]
   911  		ptr := v.Args[0]
   912  		val := v.Args[1]
   913  		mem := v.Args[2]
   914  		v.reset(OpPPC64LoweredAtomicAdd64)
   915  		v.AddArg(ptr)
   916  		v.AddArg(val)
   917  		v.AddArg(mem)
   918  		return true
   919  	}
   920  }
   921  func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
   922  	// match: (AtomicAnd8 ptr val mem)
   923  	// cond:
   924  	// result: (LoweredAtomicAnd8 ptr val mem)
   925  	for {
   926  		_ = v.Args[2]
   927  		ptr := v.Args[0]
   928  		val := v.Args[1]
   929  		mem := v.Args[2]
   930  		v.reset(OpPPC64LoweredAtomicAnd8)
   931  		v.AddArg(ptr)
   932  		v.AddArg(val)
   933  		v.AddArg(mem)
   934  		return true
   935  	}
   936  }
   937  func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
   938  	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   939  	// cond:
   940  	// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
   941  	for {
   942  		_ = v.Args[3]
   943  		ptr := v.Args[0]
   944  		old := v.Args[1]
   945  		new_ := v.Args[2]
   946  		mem := v.Args[3]
   947  		v.reset(OpPPC64LoweredAtomicCas32)
   948  		v.AuxInt = 1
   949  		v.AddArg(ptr)
   950  		v.AddArg(old)
   951  		v.AddArg(new_)
   952  		v.AddArg(mem)
   953  		return true
   954  	}
   955  }
   956  func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
   957  	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
   958  	// cond:
   959  	// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
   960  	for {
   961  		_ = v.Args[3]
   962  		ptr := v.Args[0]
   963  		old := v.Args[1]
   964  		new_ := v.Args[2]
   965  		mem := v.Args[3]
   966  		v.reset(OpPPC64LoweredAtomicCas64)
   967  		v.AuxInt = 1
   968  		v.AddArg(ptr)
   969  		v.AddArg(old)
   970  		v.AddArg(new_)
   971  		v.AddArg(mem)
   972  		return true
   973  	}
   974  }
   975  func rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v *Value) bool {
   976  	// match: (AtomicCompareAndSwapRel32 ptr old new_ mem)
   977  	// cond:
   978  	// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
   979  	for {
   980  		_ = v.Args[3]
   981  		ptr := v.Args[0]
   982  		old := v.Args[1]
   983  		new_ := v.Args[2]
   984  		mem := v.Args[3]
   985  		v.reset(OpPPC64LoweredAtomicCas32)
   986  		v.AuxInt = 0
   987  		v.AddArg(ptr)
   988  		v.AddArg(old)
   989  		v.AddArg(new_)
   990  		v.AddArg(mem)
   991  		return true
   992  	}
   993  }
   994  func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
   995  	// match: (AtomicExchange32 ptr val mem)
   996  	// cond:
   997  	// result: (LoweredAtomicExchange32 ptr val mem)
   998  	for {
   999  		_ = v.Args[2]
  1000  		ptr := v.Args[0]
  1001  		val := v.Args[1]
  1002  		mem := v.Args[2]
  1003  		v.reset(OpPPC64LoweredAtomicExchange32)
  1004  		v.AddArg(ptr)
  1005  		v.AddArg(val)
  1006  		v.AddArg(mem)
  1007  		return true
  1008  	}
  1009  }
  1010  func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
  1011  	// match: (AtomicExchange64 ptr val mem)
  1012  	// cond:
  1013  	// result: (LoweredAtomicExchange64 ptr val mem)
  1014  	for {
  1015  		_ = v.Args[2]
  1016  		ptr := v.Args[0]
  1017  		val := v.Args[1]
  1018  		mem := v.Args[2]
  1019  		v.reset(OpPPC64LoweredAtomicExchange64)
  1020  		v.AddArg(ptr)
  1021  		v.AddArg(val)
  1022  		v.AddArg(mem)
  1023  		return true
  1024  	}
  1025  }
  1026  func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
  1027  	// match: (AtomicLoad32 ptr mem)
  1028  	// cond:
  1029  	// result: (LoweredAtomicLoad32 [1] ptr mem)
  1030  	for {
  1031  		_ = v.Args[1]
  1032  		ptr := v.Args[0]
  1033  		mem := v.Args[1]
  1034  		v.reset(OpPPC64LoweredAtomicLoad32)
  1035  		v.AuxInt = 1
  1036  		v.AddArg(ptr)
  1037  		v.AddArg(mem)
  1038  		return true
  1039  	}
  1040  }
  1041  func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
  1042  	// match: (AtomicLoad64 ptr mem)
  1043  	// cond:
  1044  	// result: (LoweredAtomicLoad64 [1] ptr mem)
  1045  	for {
  1046  		_ = v.Args[1]
  1047  		ptr := v.Args[0]
  1048  		mem := v.Args[1]
  1049  		v.reset(OpPPC64LoweredAtomicLoad64)
  1050  		v.AuxInt = 1
  1051  		v.AddArg(ptr)
  1052  		v.AddArg(mem)
  1053  		return true
  1054  	}
  1055  }
  1056  func rewriteValuePPC64_OpAtomicLoadAcq32_0(v *Value) bool {
  1057  	// match: (AtomicLoadAcq32 ptr mem)
  1058  	// cond:
  1059  	// result: (LoweredAtomicLoad32 [0] ptr mem)
  1060  	for {
  1061  		_ = v.Args[1]
  1062  		ptr := v.Args[0]
  1063  		mem := v.Args[1]
  1064  		v.reset(OpPPC64LoweredAtomicLoad32)
  1065  		v.AuxInt = 0
  1066  		v.AddArg(ptr)
  1067  		v.AddArg(mem)
  1068  		return true
  1069  	}
  1070  }
  1071  func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
  1072  	// match: (AtomicLoadPtr ptr mem)
  1073  	// cond:
  1074  	// result: (LoweredAtomicLoadPtr [1] ptr mem)
  1075  	for {
  1076  		_ = v.Args[1]
  1077  		ptr := v.Args[0]
  1078  		mem := v.Args[1]
  1079  		v.reset(OpPPC64LoweredAtomicLoadPtr)
  1080  		v.AuxInt = 1
  1081  		v.AddArg(ptr)
  1082  		v.AddArg(mem)
  1083  		return true
  1084  	}
  1085  }
  1086  func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
  1087  	// match: (AtomicOr8 ptr val mem)
  1088  	// cond:
  1089  	// result: (LoweredAtomicOr8 ptr val mem)
  1090  	for {
  1091  		_ = v.Args[2]
  1092  		ptr := v.Args[0]
  1093  		val := v.Args[1]
  1094  		mem := v.Args[2]
  1095  		v.reset(OpPPC64LoweredAtomicOr8)
  1096  		v.AddArg(ptr)
  1097  		v.AddArg(val)
  1098  		v.AddArg(mem)
  1099  		return true
  1100  	}
  1101  }
  1102  func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
  1103  	// match: (AtomicStore32 ptr val mem)
  1104  	// cond:
  1105  	// result: (LoweredAtomicStore32 [1] ptr val mem)
  1106  	for {
  1107  		_ = v.Args[2]
  1108  		ptr := v.Args[0]
  1109  		val := v.Args[1]
  1110  		mem := v.Args[2]
  1111  		v.reset(OpPPC64LoweredAtomicStore32)
  1112  		v.AuxInt = 1
  1113  		v.AddArg(ptr)
  1114  		v.AddArg(val)
  1115  		v.AddArg(mem)
  1116  		return true
  1117  	}
  1118  }
  1119  func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
  1120  	// match: (AtomicStore64 ptr val mem)
  1121  	// cond:
  1122  	// result: (LoweredAtomicStore64 [1] ptr val mem)
  1123  	for {
  1124  		_ = v.Args[2]
  1125  		ptr := v.Args[0]
  1126  		val := v.Args[1]
  1127  		mem := v.Args[2]
  1128  		v.reset(OpPPC64LoweredAtomicStore64)
  1129  		v.AuxInt = 1
  1130  		v.AddArg(ptr)
  1131  		v.AddArg(val)
  1132  		v.AddArg(mem)
  1133  		return true
  1134  	}
  1135  }
  1136  func rewriteValuePPC64_OpAtomicStoreRel32_0(v *Value) bool {
  1137  	// match: (AtomicStoreRel32 ptr val mem)
  1138  	// cond:
  1139  	// result: (LoweredAtomicStore32 [0] ptr val mem)
  1140  	for {
  1141  		_ = v.Args[2]
  1142  		ptr := v.Args[0]
  1143  		val := v.Args[1]
  1144  		mem := v.Args[2]
  1145  		v.reset(OpPPC64LoweredAtomicStore32)
  1146  		v.AuxInt = 0
  1147  		v.AddArg(ptr)
  1148  		v.AddArg(val)
  1149  		v.AddArg(mem)
  1150  		return true
  1151  	}
  1152  }
  1153  func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
  1154  	b := v.Block
  1155  	_ = b
  1156  	// match: (Avg64u <t> x y)
  1157  	// cond:
  1158  	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
  1159  	for {
  1160  		t := v.Type
  1161  		_ = v.Args[1]
  1162  		x := v.Args[0]
  1163  		y := v.Args[1]
  1164  		v.reset(OpPPC64ADD)
  1165  		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
  1166  		v0.AuxInt = 1
  1167  		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
  1168  		v1.AddArg(x)
  1169  		v1.AddArg(y)
  1170  		v0.AddArg(v1)
  1171  		v.AddArg(v0)
  1172  		v.AddArg(y)
  1173  		return true
  1174  	}
  1175  }
  1176  func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
  1177  	b := v.Block
  1178  	_ = b
  1179  	typ := &b.Func.Config.Types
  1180  	_ = typ
  1181  	// match: (BitLen32 x)
  1182  	// cond:
  1183  	// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
  1184  	for {
  1185  		x := v.Args[0]
  1186  		v.reset(OpPPC64SUB)
  1187  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1188  		v0.AuxInt = 32
  1189  		v.AddArg(v0)
  1190  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
  1191  		v1.AddArg(x)
  1192  		v.AddArg(v1)
  1193  		return true
  1194  	}
  1195  }
  1196  func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
  1197  	b := v.Block
  1198  	_ = b
  1199  	typ := &b.Func.Config.Types
  1200  	_ = typ
  1201  	// match: (BitLen64 x)
  1202  	// cond:
  1203  	// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
  1204  	for {
  1205  		x := v.Args[0]
  1206  		v.reset(OpPPC64SUB)
  1207  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1208  		v0.AuxInt = 64
  1209  		v.AddArg(v0)
  1210  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
  1211  		v1.AddArg(x)
  1212  		v.AddArg(v1)
  1213  		return true
  1214  	}
  1215  }
  1216  func rewriteValuePPC64_OpCeil_0(v *Value) bool {
  1217  	// match: (Ceil x)
  1218  	// cond:
  1219  	// result: (FCEIL x)
  1220  	for {
  1221  		x := v.Args[0]
  1222  		v.reset(OpPPC64FCEIL)
  1223  		v.AddArg(x)
  1224  		return true
  1225  	}
  1226  }
  1227  func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
  1228  	// match: (ClosureCall [argwid] entry closure mem)
  1229  	// cond:
  1230  	// result: (CALLclosure [argwid] entry closure mem)
  1231  	for {
  1232  		argwid := v.AuxInt
  1233  		_ = v.Args[2]
  1234  		entry := v.Args[0]
  1235  		closure := v.Args[1]
  1236  		mem := v.Args[2]
  1237  		v.reset(OpPPC64CALLclosure)
  1238  		v.AuxInt = argwid
  1239  		v.AddArg(entry)
  1240  		v.AddArg(closure)
  1241  		v.AddArg(mem)
  1242  		return true
  1243  	}
  1244  }
  1245  func rewriteValuePPC64_OpCom16_0(v *Value) bool {
  1246  	// match: (Com16 x)
  1247  	// cond:
  1248  	// result: (NOR x x)
  1249  	for {
  1250  		x := v.Args[0]
  1251  		v.reset(OpPPC64NOR)
  1252  		v.AddArg(x)
  1253  		v.AddArg(x)
  1254  		return true
  1255  	}
  1256  }
  1257  func rewriteValuePPC64_OpCom32_0(v *Value) bool {
  1258  	// match: (Com32 x)
  1259  	// cond:
  1260  	// result: (NOR x x)
  1261  	for {
  1262  		x := v.Args[0]
  1263  		v.reset(OpPPC64NOR)
  1264  		v.AddArg(x)
  1265  		v.AddArg(x)
  1266  		return true
  1267  	}
  1268  }
  1269  func rewriteValuePPC64_OpCom64_0(v *Value) bool {
  1270  	// match: (Com64 x)
  1271  	// cond:
  1272  	// result: (NOR x x)
  1273  	for {
  1274  		x := v.Args[0]
  1275  		v.reset(OpPPC64NOR)
  1276  		v.AddArg(x)
  1277  		v.AddArg(x)
  1278  		return true
  1279  	}
  1280  }
  1281  func rewriteValuePPC64_OpCom8_0(v *Value) bool {
  1282  	// match: (Com8 x)
  1283  	// cond:
  1284  	// result: (NOR x x)
  1285  	for {
  1286  		x := v.Args[0]
  1287  		v.reset(OpPPC64NOR)
  1288  		v.AddArg(x)
  1289  		v.AddArg(x)
  1290  		return true
  1291  	}
  1292  }
  1293  func rewriteValuePPC64_OpConst16_0(v *Value) bool {
  1294  	// match: (Const16 [val])
  1295  	// cond:
  1296  	// result: (MOVDconst [val])
  1297  	for {
  1298  		val := v.AuxInt
  1299  		v.reset(OpPPC64MOVDconst)
  1300  		v.AuxInt = val
  1301  		return true
  1302  	}
  1303  }
  1304  func rewriteValuePPC64_OpConst32_0(v *Value) bool {
  1305  	// match: (Const32 [val])
  1306  	// cond:
  1307  	// result: (MOVDconst [val])
  1308  	for {
  1309  		val := v.AuxInt
  1310  		v.reset(OpPPC64MOVDconst)
  1311  		v.AuxInt = val
  1312  		return true
  1313  	}
  1314  }
  1315  func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
  1316  	// match: (Const32F [val])
  1317  	// cond:
  1318  	// result: (FMOVSconst [val])
  1319  	for {
  1320  		val := v.AuxInt
  1321  		v.reset(OpPPC64FMOVSconst)
  1322  		v.AuxInt = val
  1323  		return true
  1324  	}
  1325  }
  1326  func rewriteValuePPC64_OpConst64_0(v *Value) bool {
  1327  	// match: (Const64 [val])
  1328  	// cond:
  1329  	// result: (MOVDconst [val])
  1330  	for {
  1331  		val := v.AuxInt
  1332  		v.reset(OpPPC64MOVDconst)
  1333  		v.AuxInt = val
  1334  		return true
  1335  	}
  1336  }
  1337  func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
  1338  	// match: (Const64F [val])
  1339  	// cond:
  1340  	// result: (FMOVDconst [val])
  1341  	for {
  1342  		val := v.AuxInt
  1343  		v.reset(OpPPC64FMOVDconst)
  1344  		v.AuxInt = val
  1345  		return true
  1346  	}
  1347  }
  1348  func rewriteValuePPC64_OpConst8_0(v *Value) bool {
  1349  	// match: (Const8 [val])
  1350  	// cond:
  1351  	// result: (MOVDconst [val])
  1352  	for {
  1353  		val := v.AuxInt
  1354  		v.reset(OpPPC64MOVDconst)
  1355  		v.AuxInt = val
  1356  		return true
  1357  	}
  1358  }
  1359  func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
  1360  	// match: (ConstBool [b])
  1361  	// cond:
  1362  	// result: (MOVDconst [b])
  1363  	for {
  1364  		b := v.AuxInt
  1365  		v.reset(OpPPC64MOVDconst)
  1366  		v.AuxInt = b
  1367  		return true
  1368  	}
  1369  }
  1370  func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
  1371  	// match: (ConstNil)
  1372  	// cond:
  1373  	// result: (MOVDconst [0])
  1374  	for {
  1375  		v.reset(OpPPC64MOVDconst)
  1376  		v.AuxInt = 0
  1377  		return true
  1378  	}
  1379  }
  1380  func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
  1381  	// match: (Copysign x y)
  1382  	// cond:
  1383  	// result: (FCPSGN y x)
  1384  	for {
  1385  		_ = v.Args[1]
  1386  		x := v.Args[0]
  1387  		y := v.Args[1]
  1388  		v.reset(OpPPC64FCPSGN)
  1389  		v.AddArg(y)
  1390  		v.AddArg(x)
  1391  		return true
  1392  	}
  1393  }
  1394  func rewriteValuePPC64_OpCtz16_0(v *Value) bool {
  1395  	b := v.Block
  1396  	_ = b
  1397  	typ := &b.Func.Config.Types
  1398  	_ = typ
  1399  	// match: (Ctz16 x)
  1400  	// cond:
  1401  	// result: (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
  1402  	for {
  1403  		x := v.Args[0]
  1404  		v.reset(OpPPC64POPCNTW)
  1405  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
  1406  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int16)
  1407  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int16)
  1408  		v2.AuxInt = -1
  1409  		v2.AddArg(x)
  1410  		v1.AddArg(v2)
  1411  		v1.AddArg(x)
  1412  		v0.AddArg(v1)
  1413  		v.AddArg(v0)
  1414  		return true
  1415  	}
  1416  }
  1417  func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
  1418  	b := v.Block
  1419  	_ = b
  1420  	typ := &b.Func.Config.Types
  1421  	_ = typ
  1422  	// match: (Ctz32 x)
  1423  	// cond:
  1424  	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
  1425  	for {
  1426  		x := v.Args[0]
  1427  		v.reset(OpPPC64POPCNTW)
  1428  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1429  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
  1430  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
  1431  		v2.AuxInt = -1
  1432  		v2.AddArg(x)
  1433  		v1.AddArg(v2)
  1434  		v1.AddArg(x)
  1435  		v0.AddArg(v1)
  1436  		v.AddArg(v0)
  1437  		return true
  1438  	}
  1439  }
  1440  func rewriteValuePPC64_OpCtz32NonZero_0(v *Value) bool {
  1441  	// match: (Ctz32NonZero x)
  1442  	// cond:
  1443  	// result: (Ctz32 x)
  1444  	for {
  1445  		x := v.Args[0]
  1446  		v.reset(OpCtz32)
  1447  		v.AddArg(x)
  1448  		return true
  1449  	}
  1450  }
  1451  func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
  1452  	b := v.Block
  1453  	_ = b
  1454  	typ := &b.Func.Config.Types
  1455  	_ = typ
  1456  	// match: (Ctz64 x)
  1457  	// cond:
  1458  	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
  1459  	for {
  1460  		x := v.Args[0]
  1461  		v.reset(OpPPC64POPCNTD)
  1462  		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
  1463  		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
  1464  		v1.AuxInt = -1
  1465  		v1.AddArg(x)
  1466  		v0.AddArg(v1)
  1467  		v0.AddArg(x)
  1468  		v.AddArg(v0)
  1469  		return true
  1470  	}
  1471  }
  1472  func rewriteValuePPC64_OpCtz64NonZero_0(v *Value) bool {
  1473  	// match: (Ctz64NonZero x)
  1474  	// cond:
  1475  	// result: (Ctz64 x)
  1476  	for {
  1477  		x := v.Args[0]
  1478  		v.reset(OpCtz64)
  1479  		v.AddArg(x)
  1480  		return true
  1481  	}
  1482  }
  1483  func rewriteValuePPC64_OpCtz8_0(v *Value) bool {
  1484  	b := v.Block
  1485  	_ = b
  1486  	typ := &b.Func.Config.Types
  1487  	_ = typ
  1488  	// match: (Ctz8 x)
  1489  	// cond:
  1490  	// result: (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))
  1491  	for {
  1492  		x := v.Args[0]
  1493  		v.reset(OpPPC64POPCNTB)
  1494  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  1495  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.UInt8)
  1496  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.UInt8)
  1497  		v2.AuxInt = -1
  1498  		v2.AddArg(x)
  1499  		v1.AddArg(v2)
  1500  		v1.AddArg(x)
  1501  		v0.AddArg(v1)
  1502  		v.AddArg(v0)
  1503  		return true
  1504  	}
  1505  }
  1506  func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
  1507  	b := v.Block
  1508  	_ = b
  1509  	typ := &b.Func.Config.Types
  1510  	_ = typ
  1511  	// match: (Cvt32Fto32 x)
  1512  	// cond:
  1513  	// result: (MFVSRD (FCTIWZ x))
  1514  	for {
  1515  		x := v.Args[0]
  1516  		v.reset(OpPPC64MFVSRD)
  1517  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1518  		v0.AddArg(x)
  1519  		v.AddArg(v0)
  1520  		return true
  1521  	}
  1522  }
  1523  func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
  1524  	b := v.Block
  1525  	_ = b
  1526  	typ := &b.Func.Config.Types
  1527  	_ = typ
  1528  	// match: (Cvt32Fto64 x)
  1529  	// cond:
  1530  	// result: (MFVSRD (FCTIDZ x))
  1531  	for {
  1532  		x := v.Args[0]
  1533  		v.reset(OpPPC64MFVSRD)
  1534  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1535  		v0.AddArg(x)
  1536  		v.AddArg(v0)
  1537  		return true
  1538  	}
  1539  }
  1540  func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
  1541  	// match: (Cvt32Fto64F x)
  1542  	// cond:
  1543  	// result: x
  1544  	for {
  1545  		x := v.Args[0]
  1546  		v.reset(OpCopy)
  1547  		v.Type = x.Type
  1548  		v.AddArg(x)
  1549  		return true
  1550  	}
  1551  }
  1552  func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
  1553  	b := v.Block
  1554  	_ = b
  1555  	typ := &b.Func.Config.Types
  1556  	_ = typ
  1557  	// match: (Cvt32to32F x)
  1558  	// cond:
  1559  	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
  1560  	for {
  1561  		x := v.Args[0]
  1562  		v.reset(OpPPC64FCFIDS)
  1563  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1564  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1565  		v1.AddArg(x)
  1566  		v0.AddArg(v1)
  1567  		v.AddArg(v0)
  1568  		return true
  1569  	}
  1570  }
  1571  func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
  1572  	b := v.Block
  1573  	_ = b
  1574  	typ := &b.Func.Config.Types
  1575  	_ = typ
  1576  	// match: (Cvt32to64F x)
  1577  	// cond:
  1578  	// result: (FCFID (MTVSRD (SignExt32to64 x)))
  1579  	for {
  1580  		x := v.Args[0]
  1581  		v.reset(OpPPC64FCFID)
  1582  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1583  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1584  		v1.AddArg(x)
  1585  		v0.AddArg(v1)
  1586  		v.AddArg(v0)
  1587  		return true
  1588  	}
  1589  }
  1590  func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
  1591  	b := v.Block
  1592  	_ = b
  1593  	typ := &b.Func.Config.Types
  1594  	_ = typ
  1595  	// match: (Cvt64Fto32 x)
  1596  	// cond:
  1597  	// result: (MFVSRD (FCTIWZ x))
  1598  	for {
  1599  		x := v.Args[0]
  1600  		v.reset(OpPPC64MFVSRD)
  1601  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1602  		v0.AddArg(x)
  1603  		v.AddArg(v0)
  1604  		return true
  1605  	}
  1606  }
  1607  func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
  1608  	// match: (Cvt64Fto32F x)
  1609  	// cond:
  1610  	// result: (FRSP x)
  1611  	for {
  1612  		x := v.Args[0]
  1613  		v.reset(OpPPC64FRSP)
  1614  		v.AddArg(x)
  1615  		return true
  1616  	}
  1617  }
  1618  func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
  1619  	b := v.Block
  1620  	_ = b
  1621  	typ := &b.Func.Config.Types
  1622  	_ = typ
  1623  	// match: (Cvt64Fto64 x)
  1624  	// cond:
  1625  	// result: (MFVSRD (FCTIDZ x))
  1626  	for {
  1627  		x := v.Args[0]
  1628  		v.reset(OpPPC64MFVSRD)
  1629  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1630  		v0.AddArg(x)
  1631  		v.AddArg(v0)
  1632  		return true
  1633  	}
  1634  }
  1635  func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
  1636  	b := v.Block
  1637  	_ = b
  1638  	typ := &b.Func.Config.Types
  1639  	_ = typ
  1640  	// match: (Cvt64to32F x)
  1641  	// cond:
  1642  	// result: (FCFIDS (MTVSRD x))
  1643  	for {
  1644  		x := v.Args[0]
  1645  		v.reset(OpPPC64FCFIDS)
  1646  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1647  		v0.AddArg(x)
  1648  		v.AddArg(v0)
  1649  		return true
  1650  	}
  1651  }
  1652  func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
  1653  	b := v.Block
  1654  	_ = b
  1655  	typ := &b.Func.Config.Types
  1656  	_ = typ
  1657  	// match: (Cvt64to64F x)
  1658  	// cond:
  1659  	// result: (FCFID (MTVSRD x))
  1660  	for {
  1661  		x := v.Args[0]
  1662  		v.reset(OpPPC64FCFID)
  1663  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1664  		v0.AddArg(x)
  1665  		v.AddArg(v0)
  1666  		return true
  1667  	}
  1668  }
  1669  func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
  1670  	b := v.Block
  1671  	_ = b
  1672  	typ := &b.Func.Config.Types
  1673  	_ = typ
  1674  	// match: (Div16 x y)
  1675  	// cond:
  1676  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
  1677  	for {
  1678  		_ = v.Args[1]
  1679  		x := v.Args[0]
  1680  		y := v.Args[1]
  1681  		v.reset(OpPPC64DIVW)
  1682  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1683  		v0.AddArg(x)
  1684  		v.AddArg(v0)
  1685  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1686  		v1.AddArg(y)
  1687  		v.AddArg(v1)
  1688  		return true
  1689  	}
  1690  }
  1691  func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
  1692  	b := v.Block
  1693  	_ = b
  1694  	typ := &b.Func.Config.Types
  1695  	_ = typ
  1696  	// match: (Div16u x y)
  1697  	// cond:
  1698  	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1699  	for {
  1700  		_ = v.Args[1]
  1701  		x := v.Args[0]
  1702  		y := v.Args[1]
  1703  		v.reset(OpPPC64DIVWU)
  1704  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1705  		v0.AddArg(x)
  1706  		v.AddArg(v0)
  1707  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1708  		v1.AddArg(y)
  1709  		v.AddArg(v1)
  1710  		return true
  1711  	}
  1712  }
  1713  func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
  1714  	// match: (Div32 x y)
  1715  	// cond:
  1716  	// result: (DIVW x y)
  1717  	for {
  1718  		_ = v.Args[1]
  1719  		x := v.Args[0]
  1720  		y := v.Args[1]
  1721  		v.reset(OpPPC64DIVW)
  1722  		v.AddArg(x)
  1723  		v.AddArg(y)
  1724  		return true
  1725  	}
  1726  }
  1727  func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
  1728  	// match: (Div32F x y)
  1729  	// cond:
  1730  	// result: (FDIVS x y)
  1731  	for {
  1732  		_ = v.Args[1]
  1733  		x := v.Args[0]
  1734  		y := v.Args[1]
  1735  		v.reset(OpPPC64FDIVS)
  1736  		v.AddArg(x)
  1737  		v.AddArg(y)
  1738  		return true
  1739  	}
  1740  }
  1741  func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
  1742  	// match: (Div32u x y)
  1743  	// cond:
  1744  	// result: (DIVWU x y)
  1745  	for {
  1746  		_ = v.Args[1]
  1747  		x := v.Args[0]
  1748  		y := v.Args[1]
  1749  		v.reset(OpPPC64DIVWU)
  1750  		v.AddArg(x)
  1751  		v.AddArg(y)
  1752  		return true
  1753  	}
  1754  }
  1755  func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
  1756  	// match: (Div64 x y)
  1757  	// cond:
  1758  	// result: (DIVD x y)
  1759  	for {
  1760  		_ = v.Args[1]
  1761  		x := v.Args[0]
  1762  		y := v.Args[1]
  1763  		v.reset(OpPPC64DIVD)
  1764  		v.AddArg(x)
  1765  		v.AddArg(y)
  1766  		return true
  1767  	}
  1768  }
  1769  func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
  1770  	// match: (Div64F x y)
  1771  	// cond:
  1772  	// result: (FDIV x y)
  1773  	for {
  1774  		_ = v.Args[1]
  1775  		x := v.Args[0]
  1776  		y := v.Args[1]
  1777  		v.reset(OpPPC64FDIV)
  1778  		v.AddArg(x)
  1779  		v.AddArg(y)
  1780  		return true
  1781  	}
  1782  }
  1783  func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
  1784  	// match: (Div64u x y)
  1785  	// cond:
  1786  	// result: (DIVDU x y)
  1787  	for {
  1788  		_ = v.Args[1]
  1789  		x := v.Args[0]
  1790  		y := v.Args[1]
  1791  		v.reset(OpPPC64DIVDU)
  1792  		v.AddArg(x)
  1793  		v.AddArg(y)
  1794  		return true
  1795  	}
  1796  }
  1797  func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
  1798  	b := v.Block
  1799  	_ = b
  1800  	typ := &b.Func.Config.Types
  1801  	_ = typ
  1802  	// match: (Div8 x y)
  1803  	// cond:
  1804  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
  1805  	for {
  1806  		_ = v.Args[1]
  1807  		x := v.Args[0]
  1808  		y := v.Args[1]
  1809  		v.reset(OpPPC64DIVW)
  1810  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1811  		v0.AddArg(x)
  1812  		v.AddArg(v0)
  1813  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1814  		v1.AddArg(y)
  1815  		v.AddArg(v1)
  1816  		return true
  1817  	}
  1818  }
  1819  func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
  1820  	b := v.Block
  1821  	_ = b
  1822  	typ := &b.Func.Config.Types
  1823  	_ = typ
  1824  	// match: (Div8u x y)
  1825  	// cond:
  1826  	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1827  	for {
  1828  		_ = v.Args[1]
  1829  		x := v.Args[0]
  1830  		y := v.Args[1]
  1831  		v.reset(OpPPC64DIVWU)
  1832  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1833  		v0.AddArg(x)
  1834  		v.AddArg(v0)
  1835  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1836  		v1.AddArg(y)
  1837  		v.AddArg(v1)
  1838  		return true
  1839  	}
  1840  }
  1841  func rewriteValuePPC64_OpEq16_0(v *Value) bool {
  1842  	b := v.Block
  1843  	_ = b
  1844  	typ := &b.Func.Config.Types
  1845  	_ = typ
  1846  	// match: (Eq16 x y)
  1847  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1848  	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1849  	for {
  1850  		_ = v.Args[1]
  1851  		x := v.Args[0]
  1852  		y := v.Args[1]
  1853  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1854  			break
  1855  		}
  1856  		v.reset(OpPPC64Equal)
  1857  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1858  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1859  		v1.AddArg(x)
  1860  		v0.AddArg(v1)
  1861  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1862  		v2.AddArg(y)
  1863  		v0.AddArg(v2)
  1864  		v.AddArg(v0)
  1865  		return true
  1866  	}
  1867  	// match: (Eq16 x y)
  1868  	// cond:
  1869  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1870  	for {
  1871  		_ = v.Args[1]
  1872  		x := v.Args[0]
  1873  		y := v.Args[1]
  1874  		v.reset(OpPPC64Equal)
  1875  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1876  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1877  		v1.AddArg(x)
  1878  		v0.AddArg(v1)
  1879  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1880  		v2.AddArg(y)
  1881  		v0.AddArg(v2)
  1882  		v.AddArg(v0)
  1883  		return true
  1884  	}
  1885  }
  1886  func rewriteValuePPC64_OpEq32_0(v *Value) bool {
  1887  	b := v.Block
  1888  	_ = b
  1889  	// match: (Eq32 x y)
  1890  	// cond:
  1891  	// result: (Equal (CMPW x y))
  1892  	for {
  1893  		_ = v.Args[1]
  1894  		x := v.Args[0]
  1895  		y := v.Args[1]
  1896  		v.reset(OpPPC64Equal)
  1897  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1898  		v0.AddArg(x)
  1899  		v0.AddArg(y)
  1900  		v.AddArg(v0)
  1901  		return true
  1902  	}
  1903  }
  1904  func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
  1905  	b := v.Block
  1906  	_ = b
  1907  	// match: (Eq32F x y)
  1908  	// cond:
  1909  	// result: (Equal (FCMPU x y))
  1910  	for {
  1911  		_ = v.Args[1]
  1912  		x := v.Args[0]
  1913  		y := v.Args[1]
  1914  		v.reset(OpPPC64Equal)
  1915  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1916  		v0.AddArg(x)
  1917  		v0.AddArg(y)
  1918  		v.AddArg(v0)
  1919  		return true
  1920  	}
  1921  }
  1922  func rewriteValuePPC64_OpEq64_0(v *Value) bool {
  1923  	b := v.Block
  1924  	_ = b
  1925  	// match: (Eq64 x y)
  1926  	// cond:
  1927  	// result: (Equal (CMP x y))
  1928  	for {
  1929  		_ = v.Args[1]
  1930  		x := v.Args[0]
  1931  		y := v.Args[1]
  1932  		v.reset(OpPPC64Equal)
  1933  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1934  		v0.AddArg(x)
  1935  		v0.AddArg(y)
  1936  		v.AddArg(v0)
  1937  		return true
  1938  	}
  1939  }
  1940  func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
  1941  	b := v.Block
  1942  	_ = b
  1943  	// match: (Eq64F x y)
  1944  	// cond:
  1945  	// result: (Equal (FCMPU x y))
  1946  	for {
  1947  		_ = v.Args[1]
  1948  		x := v.Args[0]
  1949  		y := v.Args[1]
  1950  		v.reset(OpPPC64Equal)
  1951  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1952  		v0.AddArg(x)
  1953  		v0.AddArg(y)
  1954  		v.AddArg(v0)
  1955  		return true
  1956  	}
  1957  }
  1958  func rewriteValuePPC64_OpEq8_0(v *Value) bool {
  1959  	b := v.Block
  1960  	_ = b
  1961  	typ := &b.Func.Config.Types
  1962  	_ = typ
  1963  	// match: (Eq8 x y)
  1964  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1965  	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  1966  	for {
  1967  		_ = v.Args[1]
  1968  		x := v.Args[0]
  1969  		y := v.Args[1]
  1970  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1971  			break
  1972  		}
  1973  		v.reset(OpPPC64Equal)
  1974  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1975  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1976  		v1.AddArg(x)
  1977  		v0.AddArg(v1)
  1978  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1979  		v2.AddArg(y)
  1980  		v0.AddArg(v2)
  1981  		v.AddArg(v0)
  1982  		return true
  1983  	}
  1984  	// match: (Eq8 x y)
  1985  	// cond:
  1986  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1987  	for {
  1988  		_ = v.Args[1]
  1989  		x := v.Args[0]
  1990  		y := v.Args[1]
  1991  		v.reset(OpPPC64Equal)
  1992  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1993  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1994  		v1.AddArg(x)
  1995  		v0.AddArg(v1)
  1996  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1997  		v2.AddArg(y)
  1998  		v0.AddArg(v2)
  1999  		v.AddArg(v0)
  2000  		return true
  2001  	}
  2002  }
  2003  func rewriteValuePPC64_OpEqB_0(v *Value) bool {
  2004  	b := v.Block
  2005  	_ = b
  2006  	typ := &b.Func.Config.Types
  2007  	_ = typ
  2008  	// match: (EqB x y)
  2009  	// cond:
  2010  	// result: (ANDconst [1] (EQV x y))
  2011  	for {
  2012  		_ = v.Args[1]
  2013  		x := v.Args[0]
  2014  		y := v.Args[1]
  2015  		v.reset(OpPPC64ANDconst)
  2016  		v.AuxInt = 1
  2017  		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
  2018  		v0.AddArg(x)
  2019  		v0.AddArg(y)
  2020  		v.AddArg(v0)
  2021  		return true
  2022  	}
  2023  }
  2024  func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
  2025  	b := v.Block
  2026  	_ = b
  2027  	// match: (EqPtr x y)
  2028  	// cond:
  2029  	// result: (Equal (CMP x y))
  2030  	for {
  2031  		_ = v.Args[1]
  2032  		x := v.Args[0]
  2033  		y := v.Args[1]
  2034  		v.reset(OpPPC64Equal)
  2035  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2036  		v0.AddArg(x)
  2037  		v0.AddArg(y)
  2038  		v.AddArg(v0)
  2039  		return true
  2040  	}
  2041  }
  2042  func rewriteValuePPC64_OpFloor_0(v *Value) bool {
  2043  	// match: (Floor x)
  2044  	// cond:
  2045  	// result: (FFLOOR x)
  2046  	for {
  2047  		x := v.Args[0]
  2048  		v.reset(OpPPC64FFLOOR)
  2049  		v.AddArg(x)
  2050  		return true
  2051  	}
  2052  }
  2053  func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
  2054  	b := v.Block
  2055  	_ = b
  2056  	typ := &b.Func.Config.Types
  2057  	_ = typ
  2058  	// match: (Geq16 x y)
  2059  	// cond:
  2060  	// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2061  	for {
  2062  		_ = v.Args[1]
  2063  		x := v.Args[0]
  2064  		y := v.Args[1]
  2065  		v.reset(OpPPC64GreaterEqual)
  2066  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2067  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2068  		v1.AddArg(x)
  2069  		v0.AddArg(v1)
  2070  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2071  		v2.AddArg(y)
  2072  		v0.AddArg(v2)
  2073  		v.AddArg(v0)
  2074  		return true
  2075  	}
  2076  }
  2077  func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
  2078  	b := v.Block
  2079  	_ = b
  2080  	typ := &b.Func.Config.Types
  2081  	_ = typ
  2082  	// match: (Geq16U x y)
  2083  	// cond:
  2084  	// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2085  	for {
  2086  		_ = v.Args[1]
  2087  		x := v.Args[0]
  2088  		y := v.Args[1]
  2089  		v.reset(OpPPC64GreaterEqual)
  2090  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2091  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2092  		v1.AddArg(x)
  2093  		v0.AddArg(v1)
  2094  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2095  		v2.AddArg(y)
  2096  		v0.AddArg(v2)
  2097  		v.AddArg(v0)
  2098  		return true
  2099  	}
  2100  }
  2101  func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
  2102  	b := v.Block
  2103  	_ = b
  2104  	// match: (Geq32 x y)
  2105  	// cond:
  2106  	// result: (GreaterEqual (CMPW x y))
  2107  	for {
  2108  		_ = v.Args[1]
  2109  		x := v.Args[0]
  2110  		y := v.Args[1]
  2111  		v.reset(OpPPC64GreaterEqual)
  2112  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2113  		v0.AddArg(x)
  2114  		v0.AddArg(y)
  2115  		v.AddArg(v0)
  2116  		return true
  2117  	}
  2118  }
  2119  func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
  2120  	b := v.Block
  2121  	_ = b
  2122  	// match: (Geq32F x y)
  2123  	// cond:
  2124  	// result: (FGreaterEqual (FCMPU x y))
  2125  	for {
  2126  		_ = v.Args[1]
  2127  		x := v.Args[0]
  2128  		y := v.Args[1]
  2129  		v.reset(OpPPC64FGreaterEqual)
  2130  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2131  		v0.AddArg(x)
  2132  		v0.AddArg(y)
  2133  		v.AddArg(v0)
  2134  		return true
  2135  	}
  2136  }
  2137  func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
  2138  	b := v.Block
  2139  	_ = b
  2140  	// match: (Geq32U x y)
  2141  	// cond:
  2142  	// result: (GreaterEqual (CMPWU x y))
  2143  	for {
  2144  		_ = v.Args[1]
  2145  		x := v.Args[0]
  2146  		y := v.Args[1]
  2147  		v.reset(OpPPC64GreaterEqual)
  2148  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2149  		v0.AddArg(x)
  2150  		v0.AddArg(y)
  2151  		v.AddArg(v0)
  2152  		return true
  2153  	}
  2154  }
  2155  func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
  2156  	b := v.Block
  2157  	_ = b
  2158  	// match: (Geq64 x y)
  2159  	// cond:
  2160  	// result: (GreaterEqual (CMP x y))
  2161  	for {
  2162  		_ = v.Args[1]
  2163  		x := v.Args[0]
  2164  		y := v.Args[1]
  2165  		v.reset(OpPPC64GreaterEqual)
  2166  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2167  		v0.AddArg(x)
  2168  		v0.AddArg(y)
  2169  		v.AddArg(v0)
  2170  		return true
  2171  	}
  2172  }
  2173  func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
  2174  	b := v.Block
  2175  	_ = b
  2176  	// match: (Geq64F x y)
  2177  	// cond:
  2178  	// result: (FGreaterEqual (FCMPU x y))
  2179  	for {
  2180  		_ = v.Args[1]
  2181  		x := v.Args[0]
  2182  		y := v.Args[1]
  2183  		v.reset(OpPPC64FGreaterEqual)
  2184  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2185  		v0.AddArg(x)
  2186  		v0.AddArg(y)
  2187  		v.AddArg(v0)
  2188  		return true
  2189  	}
  2190  }
  2191  func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
  2192  	b := v.Block
  2193  	_ = b
  2194  	// match: (Geq64U x y)
  2195  	// cond:
  2196  	// result: (GreaterEqual (CMPU x y))
  2197  	for {
  2198  		_ = v.Args[1]
  2199  		x := v.Args[0]
  2200  		y := v.Args[1]
  2201  		v.reset(OpPPC64GreaterEqual)
  2202  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2203  		v0.AddArg(x)
  2204  		v0.AddArg(y)
  2205  		v.AddArg(v0)
  2206  		return true
  2207  	}
  2208  }
  2209  func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
  2210  	b := v.Block
  2211  	_ = b
  2212  	typ := &b.Func.Config.Types
  2213  	_ = typ
  2214  	// match: (Geq8 x y)
  2215  	// cond:
  2216  	// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2217  	for {
  2218  		_ = v.Args[1]
  2219  		x := v.Args[0]
  2220  		y := v.Args[1]
  2221  		v.reset(OpPPC64GreaterEqual)
  2222  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2223  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2224  		v1.AddArg(x)
  2225  		v0.AddArg(v1)
  2226  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2227  		v2.AddArg(y)
  2228  		v0.AddArg(v2)
  2229  		v.AddArg(v0)
  2230  		return true
  2231  	}
  2232  }
  2233  func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
  2234  	b := v.Block
  2235  	_ = b
  2236  	typ := &b.Func.Config.Types
  2237  	_ = typ
  2238  	// match: (Geq8U x y)
  2239  	// cond:
  2240  	// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2241  	for {
  2242  		_ = v.Args[1]
  2243  		x := v.Args[0]
  2244  		y := v.Args[1]
  2245  		v.reset(OpPPC64GreaterEqual)
  2246  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2247  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2248  		v1.AddArg(x)
  2249  		v0.AddArg(v1)
  2250  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2251  		v2.AddArg(y)
  2252  		v0.AddArg(v2)
  2253  		v.AddArg(v0)
  2254  		return true
  2255  	}
  2256  }
  2257  func rewriteValuePPC64_OpGetCallerPC_0(v *Value) bool {
  2258  	// match: (GetCallerPC)
  2259  	// cond:
  2260  	// result: (LoweredGetCallerPC)
  2261  	for {
  2262  		v.reset(OpPPC64LoweredGetCallerPC)
  2263  		return true
  2264  	}
  2265  }
  2266  func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
  2267  	// match: (GetCallerSP)
  2268  	// cond:
  2269  	// result: (LoweredGetCallerSP)
  2270  	for {
  2271  		v.reset(OpPPC64LoweredGetCallerSP)
  2272  		return true
  2273  	}
  2274  }
  2275  func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
  2276  	// match: (GetClosurePtr)
  2277  	// cond:
  2278  	// result: (LoweredGetClosurePtr)
  2279  	for {
  2280  		v.reset(OpPPC64LoweredGetClosurePtr)
  2281  		return true
  2282  	}
  2283  }
  2284  func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
  2285  	b := v.Block
  2286  	_ = b
  2287  	typ := &b.Func.Config.Types
  2288  	_ = typ
  2289  	// match: (Greater16 x y)
  2290  	// cond:
  2291  	// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2292  	for {
  2293  		_ = v.Args[1]
  2294  		x := v.Args[0]
  2295  		y := v.Args[1]
  2296  		v.reset(OpPPC64GreaterThan)
  2297  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2298  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2299  		v1.AddArg(x)
  2300  		v0.AddArg(v1)
  2301  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2302  		v2.AddArg(y)
  2303  		v0.AddArg(v2)
  2304  		v.AddArg(v0)
  2305  		return true
  2306  	}
  2307  }
  2308  func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
  2309  	b := v.Block
  2310  	_ = b
  2311  	typ := &b.Func.Config.Types
  2312  	_ = typ
  2313  	// match: (Greater16U x y)
  2314  	// cond:
  2315  	// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2316  	for {
  2317  		_ = v.Args[1]
  2318  		x := v.Args[0]
  2319  		y := v.Args[1]
  2320  		v.reset(OpPPC64GreaterThan)
  2321  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2322  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2323  		v1.AddArg(x)
  2324  		v0.AddArg(v1)
  2325  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2326  		v2.AddArg(y)
  2327  		v0.AddArg(v2)
  2328  		v.AddArg(v0)
  2329  		return true
  2330  	}
  2331  }
  2332  func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
  2333  	b := v.Block
  2334  	_ = b
  2335  	// match: (Greater32 x y)
  2336  	// cond:
  2337  	// result: (GreaterThan (CMPW x y))
  2338  	for {
  2339  		_ = v.Args[1]
  2340  		x := v.Args[0]
  2341  		y := v.Args[1]
  2342  		v.reset(OpPPC64GreaterThan)
  2343  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2344  		v0.AddArg(x)
  2345  		v0.AddArg(y)
  2346  		v.AddArg(v0)
  2347  		return true
  2348  	}
  2349  }
  2350  func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
  2351  	b := v.Block
  2352  	_ = b
  2353  	// match: (Greater32F x y)
  2354  	// cond:
  2355  	// result: (FGreaterThan (FCMPU x y))
  2356  	for {
  2357  		_ = v.Args[1]
  2358  		x := v.Args[0]
  2359  		y := v.Args[1]
  2360  		v.reset(OpPPC64FGreaterThan)
  2361  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2362  		v0.AddArg(x)
  2363  		v0.AddArg(y)
  2364  		v.AddArg(v0)
  2365  		return true
  2366  	}
  2367  }
  2368  func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
  2369  	b := v.Block
  2370  	_ = b
  2371  	// match: (Greater32U x y)
  2372  	// cond:
  2373  	// result: (GreaterThan (CMPWU x y))
  2374  	for {
  2375  		_ = v.Args[1]
  2376  		x := v.Args[0]
  2377  		y := v.Args[1]
  2378  		v.reset(OpPPC64GreaterThan)
  2379  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2380  		v0.AddArg(x)
  2381  		v0.AddArg(y)
  2382  		v.AddArg(v0)
  2383  		return true
  2384  	}
  2385  }
  2386  func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
  2387  	b := v.Block
  2388  	_ = b
  2389  	// match: (Greater64 x y)
  2390  	// cond:
  2391  	// result: (GreaterThan (CMP x y))
  2392  	for {
  2393  		_ = v.Args[1]
  2394  		x := v.Args[0]
  2395  		y := v.Args[1]
  2396  		v.reset(OpPPC64GreaterThan)
  2397  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2398  		v0.AddArg(x)
  2399  		v0.AddArg(y)
  2400  		v.AddArg(v0)
  2401  		return true
  2402  	}
  2403  }
  2404  func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
  2405  	b := v.Block
  2406  	_ = b
  2407  	// match: (Greater64F x y)
  2408  	// cond:
  2409  	// result: (FGreaterThan (FCMPU x y))
  2410  	for {
  2411  		_ = v.Args[1]
  2412  		x := v.Args[0]
  2413  		y := v.Args[1]
  2414  		v.reset(OpPPC64FGreaterThan)
  2415  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2416  		v0.AddArg(x)
  2417  		v0.AddArg(y)
  2418  		v.AddArg(v0)
  2419  		return true
  2420  	}
  2421  }
  2422  func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
  2423  	b := v.Block
  2424  	_ = b
  2425  	// match: (Greater64U x y)
  2426  	// cond:
  2427  	// result: (GreaterThan (CMPU x y))
  2428  	for {
  2429  		_ = v.Args[1]
  2430  		x := v.Args[0]
  2431  		y := v.Args[1]
  2432  		v.reset(OpPPC64GreaterThan)
  2433  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2434  		v0.AddArg(x)
  2435  		v0.AddArg(y)
  2436  		v.AddArg(v0)
  2437  		return true
  2438  	}
  2439  }
  2440  func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
  2441  	b := v.Block
  2442  	_ = b
  2443  	typ := &b.Func.Config.Types
  2444  	_ = typ
  2445  	// match: (Greater8 x y)
  2446  	// cond:
  2447  	// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2448  	for {
  2449  		_ = v.Args[1]
  2450  		x := v.Args[0]
  2451  		y := v.Args[1]
  2452  		v.reset(OpPPC64GreaterThan)
  2453  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2454  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2455  		v1.AddArg(x)
  2456  		v0.AddArg(v1)
  2457  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2458  		v2.AddArg(y)
  2459  		v0.AddArg(v2)
  2460  		v.AddArg(v0)
  2461  		return true
  2462  	}
  2463  }
  2464  func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
  2465  	b := v.Block
  2466  	_ = b
  2467  	typ := &b.Func.Config.Types
  2468  	_ = typ
  2469  	// match: (Greater8U x y)
  2470  	// cond:
  2471  	// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2472  	for {
  2473  		_ = v.Args[1]
  2474  		x := v.Args[0]
  2475  		y := v.Args[1]
  2476  		v.reset(OpPPC64GreaterThan)
  2477  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2478  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2479  		v1.AddArg(x)
  2480  		v0.AddArg(v1)
  2481  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2482  		v2.AddArg(y)
  2483  		v0.AddArg(v2)
  2484  		v.AddArg(v0)
  2485  		return true
  2486  	}
  2487  }
  2488  func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
  2489  	// match: (Hmul32 x y)
  2490  	// cond:
  2491  	// result: (MULHW x y)
  2492  	for {
  2493  		_ = v.Args[1]
  2494  		x := v.Args[0]
  2495  		y := v.Args[1]
  2496  		v.reset(OpPPC64MULHW)
  2497  		v.AddArg(x)
  2498  		v.AddArg(y)
  2499  		return true
  2500  	}
  2501  }
  2502  func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
  2503  	// match: (Hmul32u x y)
  2504  	// cond:
  2505  	// result: (MULHWU x y)
  2506  	for {
  2507  		_ = v.Args[1]
  2508  		x := v.Args[0]
  2509  		y := v.Args[1]
  2510  		v.reset(OpPPC64MULHWU)
  2511  		v.AddArg(x)
  2512  		v.AddArg(y)
  2513  		return true
  2514  	}
  2515  }
  2516  func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
  2517  	// match: (Hmul64 x y)
  2518  	// cond:
  2519  	// result: (MULHD x y)
  2520  	for {
  2521  		_ = v.Args[1]
  2522  		x := v.Args[0]
  2523  		y := v.Args[1]
  2524  		v.reset(OpPPC64MULHD)
  2525  		v.AddArg(x)
  2526  		v.AddArg(y)
  2527  		return true
  2528  	}
  2529  }
  2530  func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
  2531  	// match: (Hmul64u x y)
  2532  	// cond:
  2533  	// result: (MULHDU x y)
  2534  	for {
  2535  		_ = v.Args[1]
  2536  		x := v.Args[0]
  2537  		y := v.Args[1]
  2538  		v.reset(OpPPC64MULHDU)
  2539  		v.AddArg(x)
  2540  		v.AddArg(y)
  2541  		return true
  2542  	}
  2543  }
  2544  func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
  2545  	// match: (InterCall [argwid] entry mem)
  2546  	// cond:
  2547  	// result: (CALLinter [argwid] entry mem)
  2548  	for {
  2549  		argwid := v.AuxInt
  2550  		_ = v.Args[1]
  2551  		entry := v.Args[0]
  2552  		mem := v.Args[1]
  2553  		v.reset(OpPPC64CALLinter)
  2554  		v.AuxInt = argwid
  2555  		v.AddArg(entry)
  2556  		v.AddArg(mem)
  2557  		return true
  2558  	}
  2559  }
  2560  func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
  2561  	b := v.Block
  2562  	_ = b
  2563  	// match: (IsInBounds idx len)
  2564  	// cond:
  2565  	// result: (LessThan (CMPU idx len))
  2566  	for {
  2567  		_ = v.Args[1]
  2568  		idx := v.Args[0]
  2569  		len := v.Args[1]
  2570  		v.reset(OpPPC64LessThan)
  2571  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2572  		v0.AddArg(idx)
  2573  		v0.AddArg(len)
  2574  		v.AddArg(v0)
  2575  		return true
  2576  	}
  2577  }
  2578  func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
  2579  	b := v.Block
  2580  	_ = b
  2581  	// match: (IsNonNil ptr)
  2582  	// cond:
  2583  	// result: (NotEqual (CMPconst [0] ptr))
  2584  	for {
  2585  		ptr := v.Args[0]
  2586  		v.reset(OpPPC64NotEqual)
  2587  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  2588  		v0.AuxInt = 0
  2589  		v0.AddArg(ptr)
  2590  		v.AddArg(v0)
  2591  		return true
  2592  	}
  2593  }
  2594  func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
  2595  	b := v.Block
  2596  	_ = b
  2597  	// match: (IsSliceInBounds idx len)
  2598  	// cond:
  2599  	// result: (LessEqual (CMPU idx len))
  2600  	for {
  2601  		_ = v.Args[1]
  2602  		idx := v.Args[0]
  2603  		len := v.Args[1]
  2604  		v.reset(OpPPC64LessEqual)
  2605  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2606  		v0.AddArg(idx)
  2607  		v0.AddArg(len)
  2608  		v.AddArg(v0)
  2609  		return true
  2610  	}
  2611  }
  2612  func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
  2613  	b := v.Block
  2614  	_ = b
  2615  	typ := &b.Func.Config.Types
  2616  	_ = typ
  2617  	// match: (Leq16 x y)
  2618  	// cond:
  2619  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2620  	for {
  2621  		_ = v.Args[1]
  2622  		x := v.Args[0]
  2623  		y := v.Args[1]
  2624  		v.reset(OpPPC64LessEqual)
  2625  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2626  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2627  		v1.AddArg(x)
  2628  		v0.AddArg(v1)
  2629  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2630  		v2.AddArg(y)
  2631  		v0.AddArg(v2)
  2632  		v.AddArg(v0)
  2633  		return true
  2634  	}
  2635  }
  2636  func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
  2637  	b := v.Block
  2638  	_ = b
  2639  	typ := &b.Func.Config.Types
  2640  	_ = typ
  2641  	// match: (Leq16U x y)
  2642  	// cond:
  2643  	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2644  	for {
  2645  		_ = v.Args[1]
  2646  		x := v.Args[0]
  2647  		y := v.Args[1]
  2648  		v.reset(OpPPC64LessEqual)
  2649  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2650  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2651  		v1.AddArg(x)
  2652  		v0.AddArg(v1)
  2653  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2654  		v2.AddArg(y)
  2655  		v0.AddArg(v2)
  2656  		v.AddArg(v0)
  2657  		return true
  2658  	}
  2659  }
  2660  func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
  2661  	b := v.Block
  2662  	_ = b
  2663  	// match: (Leq32 x y)
  2664  	// cond:
  2665  	// result: (LessEqual (CMPW x y))
  2666  	for {
  2667  		_ = v.Args[1]
  2668  		x := v.Args[0]
  2669  		y := v.Args[1]
  2670  		v.reset(OpPPC64LessEqual)
  2671  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2672  		v0.AddArg(x)
  2673  		v0.AddArg(y)
  2674  		v.AddArg(v0)
  2675  		return true
  2676  	}
  2677  }
  2678  func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
  2679  	b := v.Block
  2680  	_ = b
  2681  	// match: (Leq32F x y)
  2682  	// cond:
  2683  	// result: (FLessEqual (FCMPU x y))
  2684  	for {
  2685  		_ = v.Args[1]
  2686  		x := v.Args[0]
  2687  		y := v.Args[1]
  2688  		v.reset(OpPPC64FLessEqual)
  2689  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2690  		v0.AddArg(x)
  2691  		v0.AddArg(y)
  2692  		v.AddArg(v0)
  2693  		return true
  2694  	}
  2695  }
  2696  func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
  2697  	b := v.Block
  2698  	_ = b
  2699  	// match: (Leq32U x y)
  2700  	// cond:
  2701  	// result: (LessEqual (CMPWU x y))
  2702  	for {
  2703  		_ = v.Args[1]
  2704  		x := v.Args[0]
  2705  		y := v.Args[1]
  2706  		v.reset(OpPPC64LessEqual)
  2707  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2708  		v0.AddArg(x)
  2709  		v0.AddArg(y)
  2710  		v.AddArg(v0)
  2711  		return true
  2712  	}
  2713  }
  2714  func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
  2715  	b := v.Block
  2716  	_ = b
  2717  	// match: (Leq64 x y)
  2718  	// cond:
  2719  	// result: (LessEqual (CMP x y))
  2720  	for {
  2721  		_ = v.Args[1]
  2722  		x := v.Args[0]
  2723  		y := v.Args[1]
  2724  		v.reset(OpPPC64LessEqual)
  2725  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2726  		v0.AddArg(x)
  2727  		v0.AddArg(y)
  2728  		v.AddArg(v0)
  2729  		return true
  2730  	}
  2731  }
  2732  func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
  2733  	b := v.Block
  2734  	_ = b
  2735  	// match: (Leq64F x y)
  2736  	// cond:
  2737  	// result: (FLessEqual (FCMPU x y))
  2738  	for {
  2739  		_ = v.Args[1]
  2740  		x := v.Args[0]
  2741  		y := v.Args[1]
  2742  		v.reset(OpPPC64FLessEqual)
  2743  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2744  		v0.AddArg(x)
  2745  		v0.AddArg(y)
  2746  		v.AddArg(v0)
  2747  		return true
  2748  	}
  2749  }
  2750  func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
  2751  	b := v.Block
  2752  	_ = b
  2753  	// match: (Leq64U x y)
  2754  	// cond:
  2755  	// result: (LessEqual (CMPU x y))
  2756  	for {
  2757  		_ = v.Args[1]
  2758  		x := v.Args[0]
  2759  		y := v.Args[1]
  2760  		v.reset(OpPPC64LessEqual)
  2761  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2762  		v0.AddArg(x)
  2763  		v0.AddArg(y)
  2764  		v.AddArg(v0)
  2765  		return true
  2766  	}
  2767  }
  2768  func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
  2769  	b := v.Block
  2770  	_ = b
  2771  	typ := &b.Func.Config.Types
  2772  	_ = typ
  2773  	// match: (Leq8 x y)
  2774  	// cond:
  2775  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2776  	for {
  2777  		_ = v.Args[1]
  2778  		x := v.Args[0]
  2779  		y := v.Args[1]
  2780  		v.reset(OpPPC64LessEqual)
  2781  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2782  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2783  		v1.AddArg(x)
  2784  		v0.AddArg(v1)
  2785  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2786  		v2.AddArg(y)
  2787  		v0.AddArg(v2)
  2788  		v.AddArg(v0)
  2789  		return true
  2790  	}
  2791  }
  2792  func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
  2793  	b := v.Block
  2794  	_ = b
  2795  	typ := &b.Func.Config.Types
  2796  	_ = typ
  2797  	// match: (Leq8U x y)
  2798  	// cond:
  2799  	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2800  	for {
  2801  		_ = v.Args[1]
  2802  		x := v.Args[0]
  2803  		y := v.Args[1]
  2804  		v.reset(OpPPC64LessEqual)
  2805  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2806  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2807  		v1.AddArg(x)
  2808  		v0.AddArg(v1)
  2809  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2810  		v2.AddArg(y)
  2811  		v0.AddArg(v2)
  2812  		v.AddArg(v0)
  2813  		return true
  2814  	}
  2815  }
  2816  func rewriteValuePPC64_OpLess16_0(v *Value) bool {
  2817  	b := v.Block
  2818  	_ = b
  2819  	typ := &b.Func.Config.Types
  2820  	_ = typ
  2821  	// match: (Less16 x y)
  2822  	// cond:
  2823  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2824  	for {
  2825  		_ = v.Args[1]
  2826  		x := v.Args[0]
  2827  		y := v.Args[1]
  2828  		v.reset(OpPPC64LessThan)
  2829  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2830  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2831  		v1.AddArg(x)
  2832  		v0.AddArg(v1)
  2833  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2834  		v2.AddArg(y)
  2835  		v0.AddArg(v2)
  2836  		v.AddArg(v0)
  2837  		return true
  2838  	}
  2839  }
  2840  func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
  2841  	b := v.Block
  2842  	_ = b
  2843  	typ := &b.Func.Config.Types
  2844  	_ = typ
  2845  	// match: (Less16U x y)
  2846  	// cond:
  2847  	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2848  	for {
  2849  		_ = v.Args[1]
  2850  		x := v.Args[0]
  2851  		y := v.Args[1]
  2852  		v.reset(OpPPC64LessThan)
  2853  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2854  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2855  		v1.AddArg(x)
  2856  		v0.AddArg(v1)
  2857  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2858  		v2.AddArg(y)
  2859  		v0.AddArg(v2)
  2860  		v.AddArg(v0)
  2861  		return true
  2862  	}
  2863  }
  2864  func rewriteValuePPC64_OpLess32_0(v *Value) bool {
  2865  	b := v.Block
  2866  	_ = b
  2867  	// match: (Less32 x y)
  2868  	// cond:
  2869  	// result: (LessThan (CMPW x y))
  2870  	for {
  2871  		_ = v.Args[1]
  2872  		x := v.Args[0]
  2873  		y := v.Args[1]
  2874  		v.reset(OpPPC64LessThan)
  2875  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2876  		v0.AddArg(x)
  2877  		v0.AddArg(y)
  2878  		v.AddArg(v0)
  2879  		return true
  2880  	}
  2881  }
  2882  func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
  2883  	b := v.Block
  2884  	_ = b
  2885  	// match: (Less32F x y)
  2886  	// cond:
  2887  	// result: (FLessThan (FCMPU x y))
  2888  	for {
  2889  		_ = v.Args[1]
  2890  		x := v.Args[0]
  2891  		y := v.Args[1]
  2892  		v.reset(OpPPC64FLessThan)
  2893  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2894  		v0.AddArg(x)
  2895  		v0.AddArg(y)
  2896  		v.AddArg(v0)
  2897  		return true
  2898  	}
  2899  }
  2900  func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
  2901  	b := v.Block
  2902  	_ = b
  2903  	// match: (Less32U x y)
  2904  	// cond:
  2905  	// result: (LessThan (CMPWU x y))
  2906  	for {
  2907  		_ = v.Args[1]
  2908  		x := v.Args[0]
  2909  		y := v.Args[1]
  2910  		v.reset(OpPPC64LessThan)
  2911  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2912  		v0.AddArg(x)
  2913  		v0.AddArg(y)
  2914  		v.AddArg(v0)
  2915  		return true
  2916  	}
  2917  }
  2918  func rewriteValuePPC64_OpLess64_0(v *Value) bool {
  2919  	b := v.Block
  2920  	_ = b
  2921  	// match: (Less64 x y)
  2922  	// cond:
  2923  	// result: (LessThan (CMP x y))
  2924  	for {
  2925  		_ = v.Args[1]
  2926  		x := v.Args[0]
  2927  		y := v.Args[1]
  2928  		v.reset(OpPPC64LessThan)
  2929  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2930  		v0.AddArg(x)
  2931  		v0.AddArg(y)
  2932  		v.AddArg(v0)
  2933  		return true
  2934  	}
  2935  }
  2936  func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
  2937  	b := v.Block
  2938  	_ = b
  2939  	// match: (Less64F x y)
  2940  	// cond:
  2941  	// result: (FLessThan (FCMPU x y))
  2942  	for {
  2943  		_ = v.Args[1]
  2944  		x := v.Args[0]
  2945  		y := v.Args[1]
  2946  		v.reset(OpPPC64FLessThan)
  2947  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2948  		v0.AddArg(x)
  2949  		v0.AddArg(y)
  2950  		v.AddArg(v0)
  2951  		return true
  2952  	}
  2953  }
  2954  func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
  2955  	b := v.Block
  2956  	_ = b
  2957  	// match: (Less64U x y)
  2958  	// cond:
  2959  	// result: (LessThan (CMPU x y))
  2960  	for {
  2961  		_ = v.Args[1]
  2962  		x := v.Args[0]
  2963  		y := v.Args[1]
  2964  		v.reset(OpPPC64LessThan)
  2965  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2966  		v0.AddArg(x)
  2967  		v0.AddArg(y)
  2968  		v.AddArg(v0)
  2969  		return true
  2970  	}
  2971  }
  2972  func rewriteValuePPC64_OpLess8_0(v *Value) bool {
  2973  	b := v.Block
  2974  	_ = b
  2975  	typ := &b.Func.Config.Types
  2976  	_ = typ
  2977  	// match: (Less8 x y)
  2978  	// cond:
  2979  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2980  	for {
  2981  		_ = v.Args[1]
  2982  		x := v.Args[0]
  2983  		y := v.Args[1]
  2984  		v.reset(OpPPC64LessThan)
  2985  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2986  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2987  		v1.AddArg(x)
  2988  		v0.AddArg(v1)
  2989  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2990  		v2.AddArg(y)
  2991  		v0.AddArg(v2)
  2992  		v.AddArg(v0)
  2993  		return true
  2994  	}
  2995  }
  2996  func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
  2997  	b := v.Block
  2998  	_ = b
  2999  	typ := &b.Func.Config.Types
  3000  	_ = typ
  3001  	// match: (Less8U x y)
  3002  	// cond:
  3003  	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  3004  	for {
  3005  		_ = v.Args[1]
  3006  		x := v.Args[0]
  3007  		y := v.Args[1]
  3008  		v.reset(OpPPC64LessThan)
  3009  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  3010  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  3011  		v1.AddArg(x)
  3012  		v0.AddArg(v1)
  3013  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  3014  		v2.AddArg(y)
  3015  		v0.AddArg(v2)
  3016  		v.AddArg(v0)
  3017  		return true
  3018  	}
  3019  }
  3020  func rewriteValuePPC64_OpLoad_0(v *Value) bool {
  3021  	b := v.Block
  3022  	_ = b
  3023  	typ := &b.Func.Config.Types
  3024  	_ = typ
  3025  	// match: (Load <t> ptr mem)
  3026  	// cond: (is64BitInt(t) || isPtr(t))
  3027  	// result: (MOVDload ptr mem)
  3028  	for {
  3029  		t := v.Type
  3030  		_ = v.Args[1]
  3031  		ptr := v.Args[0]
  3032  		mem := v.Args[1]
  3033  		if !(is64BitInt(t) || isPtr(t)) {
  3034  			break
  3035  		}
  3036  		v.reset(OpPPC64MOVDload)
  3037  		v.AddArg(ptr)
  3038  		v.AddArg(mem)
  3039  		return true
  3040  	}
  3041  	// match: (Load <t> ptr mem)
  3042  	// cond: is32BitInt(t) && isSigned(t)
  3043  	// result: (MOVWload ptr mem)
  3044  	for {
  3045  		t := v.Type
  3046  		_ = v.Args[1]
  3047  		ptr := v.Args[0]
  3048  		mem := v.Args[1]
  3049  		if !(is32BitInt(t) && isSigned(t)) {
  3050  			break
  3051  		}
  3052  		v.reset(OpPPC64MOVWload)
  3053  		v.AddArg(ptr)
  3054  		v.AddArg(mem)
  3055  		return true
  3056  	}
  3057  	// match: (Load <t> ptr mem)
  3058  	// cond: is32BitInt(t) && !isSigned(t)
  3059  	// result: (MOVWZload ptr mem)
  3060  	for {
  3061  		t := v.Type
  3062  		_ = v.Args[1]
  3063  		ptr := v.Args[0]
  3064  		mem := v.Args[1]
  3065  		if !(is32BitInt(t) && !isSigned(t)) {
  3066  			break
  3067  		}
  3068  		v.reset(OpPPC64MOVWZload)
  3069  		v.AddArg(ptr)
  3070  		v.AddArg(mem)
  3071  		return true
  3072  	}
  3073  	// match: (Load <t> ptr mem)
  3074  	// cond: is16BitInt(t) && isSigned(t)
  3075  	// result: (MOVHload ptr mem)
  3076  	for {
  3077  		t := v.Type
  3078  		_ = v.Args[1]
  3079  		ptr := v.Args[0]
  3080  		mem := v.Args[1]
  3081  		if !(is16BitInt(t) && isSigned(t)) {
  3082  			break
  3083  		}
  3084  		v.reset(OpPPC64MOVHload)
  3085  		v.AddArg(ptr)
  3086  		v.AddArg(mem)
  3087  		return true
  3088  	}
  3089  	// match: (Load <t> ptr mem)
  3090  	// cond: is16BitInt(t) && !isSigned(t)
  3091  	// result: (MOVHZload ptr mem)
  3092  	for {
  3093  		t := v.Type
  3094  		_ = v.Args[1]
  3095  		ptr := v.Args[0]
  3096  		mem := v.Args[1]
  3097  		if !(is16BitInt(t) && !isSigned(t)) {
  3098  			break
  3099  		}
  3100  		v.reset(OpPPC64MOVHZload)
  3101  		v.AddArg(ptr)
  3102  		v.AddArg(mem)
  3103  		return true
  3104  	}
  3105  	// match: (Load <t> ptr mem)
  3106  	// cond: t.IsBoolean()
  3107  	// result: (MOVBZload ptr mem)
  3108  	for {
  3109  		t := v.Type
  3110  		_ = v.Args[1]
  3111  		ptr := v.Args[0]
  3112  		mem := v.Args[1]
  3113  		if !(t.IsBoolean()) {
  3114  			break
  3115  		}
  3116  		v.reset(OpPPC64MOVBZload)
  3117  		v.AddArg(ptr)
  3118  		v.AddArg(mem)
  3119  		return true
  3120  	}
  3121  	// match: (Load <t> ptr mem)
  3122  	// cond: is8BitInt(t) && isSigned(t)
  3123  	// result: (MOVBreg (MOVBZload ptr mem))
  3124  	for {
  3125  		t := v.Type
  3126  		_ = v.Args[1]
  3127  		ptr := v.Args[0]
  3128  		mem := v.Args[1]
  3129  		if !(is8BitInt(t) && isSigned(t)) {
  3130  			break
  3131  		}
  3132  		v.reset(OpPPC64MOVBreg)
  3133  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  3134  		v0.AddArg(ptr)
  3135  		v0.AddArg(mem)
  3136  		v.AddArg(v0)
  3137  		return true
  3138  	}
  3139  	// match: (Load <t> ptr mem)
  3140  	// cond: is8BitInt(t) && !isSigned(t)
  3141  	// result: (MOVBZload ptr mem)
  3142  	for {
  3143  		t := v.Type
  3144  		_ = v.Args[1]
  3145  		ptr := v.Args[0]
  3146  		mem := v.Args[1]
  3147  		if !(is8BitInt(t) && !isSigned(t)) {
  3148  			break
  3149  		}
  3150  		v.reset(OpPPC64MOVBZload)
  3151  		v.AddArg(ptr)
  3152  		v.AddArg(mem)
  3153  		return true
  3154  	}
  3155  	// match: (Load <t> ptr mem)
  3156  	// cond: is32BitFloat(t)
  3157  	// result: (FMOVSload ptr mem)
  3158  	for {
  3159  		t := v.Type
  3160  		_ = v.Args[1]
  3161  		ptr := v.Args[0]
  3162  		mem := v.Args[1]
  3163  		if !(is32BitFloat(t)) {
  3164  			break
  3165  		}
  3166  		v.reset(OpPPC64FMOVSload)
  3167  		v.AddArg(ptr)
  3168  		v.AddArg(mem)
  3169  		return true
  3170  	}
  3171  	// match: (Load <t> ptr mem)
  3172  	// cond: is64BitFloat(t)
  3173  	// result: (FMOVDload ptr mem)
  3174  	for {
  3175  		t := v.Type
  3176  		_ = v.Args[1]
  3177  		ptr := v.Args[0]
  3178  		mem := v.Args[1]
  3179  		if !(is64BitFloat(t)) {
  3180  			break
  3181  		}
  3182  		v.reset(OpPPC64FMOVDload)
  3183  		v.AddArg(ptr)
  3184  		v.AddArg(mem)
  3185  		return true
  3186  	}
  3187  	return false
  3188  }
  3189  func rewriteValuePPC64_OpLocalAddr_0(v *Value) bool {
  3190  	// match: (LocalAddr {sym} base _)
  3191  	// cond:
  3192  	// result: (MOVDaddr {sym} base)
  3193  	for {
  3194  		sym := v.Aux
  3195  		_ = v.Args[1]
  3196  		base := v.Args[0]
  3197  		v.reset(OpPPC64MOVDaddr)
  3198  		v.Aux = sym
  3199  		v.AddArg(base)
  3200  		return true
  3201  	}
  3202  }
  3203  func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
  3204  	b := v.Block
  3205  	_ = b
  3206  	typ := &b.Func.Config.Types
  3207  	_ = typ
  3208  	// match: (Lsh16x16 x y)
  3209  	// cond: shiftIsBounded(v)
  3210  	// result: (SLW x y)
  3211  	for {
  3212  		_ = v.Args[1]
  3213  		x := v.Args[0]
  3214  		y := v.Args[1]
  3215  		if !(shiftIsBounded(v)) {
  3216  			break
  3217  		}
  3218  		v.reset(OpPPC64SLW)
  3219  		v.AddArg(x)
  3220  		v.AddArg(y)
  3221  		return true
  3222  	}
  3223  	// match: (Lsh16x16 x y)
  3224  	// cond:
  3225  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
  3226  	for {
  3227  		_ = v.Args[1]
  3228  		x := v.Args[0]
  3229  		y := v.Args[1]
  3230  		v.reset(OpPPC64SLW)
  3231  		v.AddArg(x)
  3232  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3233  		v0.AddArg(y)
  3234  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3235  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3236  		v2.AuxInt = -16
  3237  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3238  		v3.AddArg(y)
  3239  		v2.AddArg(v3)
  3240  		v1.AddArg(v2)
  3241  		v0.AddArg(v1)
  3242  		v.AddArg(v0)
  3243  		return true
  3244  	}
  3245  }
  3246  func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
  3247  	b := v.Block
  3248  	_ = b
  3249  	typ := &b.Func.Config.Types
  3250  	_ = typ
  3251  	// match: (Lsh16x32 x (Const64 [c]))
  3252  	// cond: uint32(c) < 16
  3253  	// result: (SLWconst x [c])
  3254  	for {
  3255  		_ = v.Args[1]
  3256  		x := v.Args[0]
  3257  		v_1 := v.Args[1]
  3258  		if v_1.Op != OpConst64 {
  3259  			break
  3260  		}
  3261  		c := v_1.AuxInt
  3262  		if !(uint32(c) < 16) {
  3263  			break
  3264  		}
  3265  		v.reset(OpPPC64SLWconst)
  3266  		v.AuxInt = c
  3267  		v.AddArg(x)
  3268  		return true
  3269  	}
  3270  	// match: (Lsh16x32 x (MOVDconst [c]))
  3271  	// cond: uint32(c) < 16
  3272  	// result: (SLWconst x [c])
  3273  	for {
  3274  		_ = v.Args[1]
  3275  		x := v.Args[0]
  3276  		v_1 := v.Args[1]
  3277  		if v_1.Op != OpPPC64MOVDconst {
  3278  			break
  3279  		}
  3280  		c := v_1.AuxInt
  3281  		if !(uint32(c) < 16) {
  3282  			break
  3283  		}
  3284  		v.reset(OpPPC64SLWconst)
  3285  		v.AuxInt = c
  3286  		v.AddArg(x)
  3287  		return true
  3288  	}
  3289  	// match: (Lsh16x32 x y)
  3290  	// cond: shiftIsBounded(v)
  3291  	// result: (SLW x y)
  3292  	for {
  3293  		_ = v.Args[1]
  3294  		x := v.Args[0]
  3295  		y := v.Args[1]
  3296  		if !(shiftIsBounded(v)) {
  3297  			break
  3298  		}
  3299  		v.reset(OpPPC64SLW)
  3300  		v.AddArg(x)
  3301  		v.AddArg(y)
  3302  		return true
  3303  	}
  3304  	// match: (Lsh16x32 x y)
  3305  	// cond:
  3306  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
  3307  	for {
  3308  		_ = v.Args[1]
  3309  		x := v.Args[0]
  3310  		y := v.Args[1]
  3311  		v.reset(OpPPC64SLW)
  3312  		v.AddArg(x)
  3313  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3314  		v0.AddArg(y)
  3315  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3316  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3317  		v2.AuxInt = -16
  3318  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3319  		v3.AddArg(y)
  3320  		v2.AddArg(v3)
  3321  		v1.AddArg(v2)
  3322  		v0.AddArg(v1)
  3323  		v.AddArg(v0)
  3324  		return true
  3325  	}
  3326  }
  3327  func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
  3328  	b := v.Block
  3329  	_ = b
  3330  	typ := &b.Func.Config.Types
  3331  	_ = typ
  3332  	// match: (Lsh16x64 x (Const64 [c]))
  3333  	// cond: uint64(c) < 16
  3334  	// result: (SLWconst x [c])
  3335  	for {
  3336  		_ = v.Args[1]
  3337  		x := v.Args[0]
  3338  		v_1 := v.Args[1]
  3339  		if v_1.Op != OpConst64 {
  3340  			break
  3341  		}
  3342  		c := v_1.AuxInt
  3343  		if !(uint64(c) < 16) {
  3344  			break
  3345  		}
  3346  		v.reset(OpPPC64SLWconst)
  3347  		v.AuxInt = c
  3348  		v.AddArg(x)
  3349  		return true
  3350  	}
  3351  	// match: (Lsh16x64 _ (Const64 [c]))
  3352  	// cond: uint64(c) >= 16
  3353  	// result: (MOVDconst [0])
  3354  	for {
  3355  		_ = v.Args[1]
  3356  		v_1 := v.Args[1]
  3357  		if v_1.Op != OpConst64 {
  3358  			break
  3359  		}
  3360  		c := v_1.AuxInt
  3361  		if !(uint64(c) >= 16) {
  3362  			break
  3363  		}
  3364  		v.reset(OpPPC64MOVDconst)
  3365  		v.AuxInt = 0
  3366  		return true
  3367  	}
  3368  	// match: (Lsh16x64 x (MOVDconst [c]))
  3369  	// cond: uint64(c) < 16
  3370  	// result: (SLWconst x [c])
  3371  	for {
  3372  		_ = v.Args[1]
  3373  		x := v.Args[0]
  3374  		v_1 := v.Args[1]
  3375  		if v_1.Op != OpPPC64MOVDconst {
  3376  			break
  3377  		}
  3378  		c := v_1.AuxInt
  3379  		if !(uint64(c) < 16) {
  3380  			break
  3381  		}
  3382  		v.reset(OpPPC64SLWconst)
  3383  		v.AuxInt = c
  3384  		v.AddArg(x)
  3385  		return true
  3386  	}
  3387  	// match: (Lsh16x64 x y)
  3388  	// cond: shiftIsBounded(v)
  3389  	// result: (SLW x y)
  3390  	for {
  3391  		_ = v.Args[1]
  3392  		x := v.Args[0]
  3393  		y := v.Args[1]
  3394  		if !(shiftIsBounded(v)) {
  3395  			break
  3396  		}
  3397  		v.reset(OpPPC64SLW)
  3398  		v.AddArg(x)
  3399  		v.AddArg(y)
  3400  		return true
  3401  	}
  3402  	// match: (Lsh16x64 x y)
  3403  	// cond:
  3404  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
  3405  	for {
  3406  		_ = v.Args[1]
  3407  		x := v.Args[0]
  3408  		y := v.Args[1]
  3409  		v.reset(OpPPC64SLW)
  3410  		v.AddArg(x)
  3411  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3412  		v0.AddArg(y)
  3413  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3414  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3415  		v2.AuxInt = -16
  3416  		v2.AddArg(y)
  3417  		v1.AddArg(v2)
  3418  		v0.AddArg(v1)
  3419  		v.AddArg(v0)
  3420  		return true
  3421  	}
  3422  }
  3423  func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
  3424  	b := v.Block
  3425  	_ = b
  3426  	typ := &b.Func.Config.Types
  3427  	_ = typ
  3428  	// match: (Lsh16x8 x y)
  3429  	// cond: shiftIsBounded(v)
  3430  	// result: (SLW x y)
  3431  	for {
  3432  		_ = v.Args[1]
  3433  		x := v.Args[0]
  3434  		y := v.Args[1]
  3435  		if !(shiftIsBounded(v)) {
  3436  			break
  3437  		}
  3438  		v.reset(OpPPC64SLW)
  3439  		v.AddArg(x)
  3440  		v.AddArg(y)
  3441  		return true
  3442  	}
  3443  	// match: (Lsh16x8 x y)
  3444  	// cond:
  3445  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
  3446  	for {
  3447  		_ = v.Args[1]
  3448  		x := v.Args[0]
  3449  		y := v.Args[1]
  3450  		v.reset(OpPPC64SLW)
  3451  		v.AddArg(x)
  3452  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3453  		v0.AddArg(y)
  3454  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3455  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3456  		v2.AuxInt = -16
  3457  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3458  		v3.AddArg(y)
  3459  		v2.AddArg(v3)
  3460  		v1.AddArg(v2)
  3461  		v0.AddArg(v1)
  3462  		v.AddArg(v0)
  3463  		return true
  3464  	}
  3465  }
  3466  func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
  3467  	b := v.Block
  3468  	_ = b
  3469  	typ := &b.Func.Config.Types
  3470  	_ = typ
  3471  	// match: (Lsh32x16 x y)
  3472  	// cond: shiftIsBounded(v)
  3473  	// result: (SLW x y)
  3474  	for {
  3475  		_ = v.Args[1]
  3476  		x := v.Args[0]
  3477  		y := v.Args[1]
  3478  		if !(shiftIsBounded(v)) {
  3479  			break
  3480  		}
  3481  		v.reset(OpPPC64SLW)
  3482  		v.AddArg(x)
  3483  		v.AddArg(y)
  3484  		return true
  3485  	}
  3486  	// match: (Lsh32x16 x y)
  3487  	// cond:
  3488  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
  3489  	for {
  3490  		_ = v.Args[1]
  3491  		x := v.Args[0]
  3492  		y := v.Args[1]
  3493  		v.reset(OpPPC64SLW)
  3494  		v.AddArg(x)
  3495  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3496  		v0.AddArg(y)
  3497  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3498  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3499  		v2.AuxInt = -32
  3500  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3501  		v3.AddArg(y)
  3502  		v2.AddArg(v3)
  3503  		v1.AddArg(v2)
  3504  		v0.AddArg(v1)
  3505  		v.AddArg(v0)
  3506  		return true
  3507  	}
  3508  }
  3509  func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
  3510  	b := v.Block
  3511  	_ = b
  3512  	typ := &b.Func.Config.Types
  3513  	_ = typ
  3514  	// match: (Lsh32x32 x (Const64 [c]))
  3515  	// cond: uint32(c) < 32
  3516  	// result: (SLWconst x [c])
  3517  	for {
  3518  		_ = v.Args[1]
  3519  		x := v.Args[0]
  3520  		v_1 := v.Args[1]
  3521  		if v_1.Op != OpConst64 {
  3522  			break
  3523  		}
  3524  		c := v_1.AuxInt
  3525  		if !(uint32(c) < 32) {
  3526  			break
  3527  		}
  3528  		v.reset(OpPPC64SLWconst)
  3529  		v.AuxInt = c
  3530  		v.AddArg(x)
  3531  		return true
  3532  	}
  3533  	// match: (Lsh32x32 x (MOVDconst [c]))
  3534  	// cond: uint32(c) < 32
  3535  	// result: (SLWconst x [c])
  3536  	for {
  3537  		_ = v.Args[1]
  3538  		x := v.Args[0]
  3539  		v_1 := v.Args[1]
  3540  		if v_1.Op != OpPPC64MOVDconst {
  3541  			break
  3542  		}
  3543  		c := v_1.AuxInt
  3544  		if !(uint32(c) < 32) {
  3545  			break
  3546  		}
  3547  		v.reset(OpPPC64SLWconst)
  3548  		v.AuxInt = c
  3549  		v.AddArg(x)
  3550  		return true
  3551  	}
  3552  	// match: (Lsh32x32 x y)
  3553  	// cond: shiftIsBounded(v)
  3554  	// result: (SLW x y)
  3555  	for {
  3556  		_ = v.Args[1]
  3557  		x := v.Args[0]
  3558  		y := v.Args[1]
  3559  		if !(shiftIsBounded(v)) {
  3560  			break
  3561  		}
  3562  		v.reset(OpPPC64SLW)
  3563  		v.AddArg(x)
  3564  		v.AddArg(y)
  3565  		return true
  3566  	}
  3567  	// match: (Lsh32x32 x y)
  3568  	// cond:
  3569  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
  3570  	for {
  3571  		_ = v.Args[1]
  3572  		x := v.Args[0]
  3573  		y := v.Args[1]
  3574  		v.reset(OpPPC64SLW)
  3575  		v.AddArg(x)
  3576  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3577  		v0.AddArg(y)
  3578  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3579  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3580  		v2.AuxInt = -32
  3581  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3582  		v3.AddArg(y)
  3583  		v2.AddArg(v3)
  3584  		v1.AddArg(v2)
  3585  		v0.AddArg(v1)
  3586  		v.AddArg(v0)
  3587  		return true
  3588  	}
  3589  }
  3590  func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
  3591  	b := v.Block
  3592  	_ = b
  3593  	typ := &b.Func.Config.Types
  3594  	_ = typ
  3595  	// match: (Lsh32x64 x (Const64 [c]))
  3596  	// cond: uint64(c) < 32
  3597  	// result: (SLWconst x [c])
  3598  	for {
  3599  		_ = v.Args[1]
  3600  		x := v.Args[0]
  3601  		v_1 := v.Args[1]
  3602  		if v_1.Op != OpConst64 {
  3603  			break
  3604  		}
  3605  		c := v_1.AuxInt
  3606  		if !(uint64(c) < 32) {
  3607  			break
  3608  		}
  3609  		v.reset(OpPPC64SLWconst)
  3610  		v.AuxInt = c
  3611  		v.AddArg(x)
  3612  		return true
  3613  	}
  3614  	// match: (Lsh32x64 _ (Const64 [c]))
  3615  	// cond: uint64(c) >= 32
  3616  	// result: (MOVDconst [0])
  3617  	for {
  3618  		_ = v.Args[1]
  3619  		v_1 := v.Args[1]
  3620  		if v_1.Op != OpConst64 {
  3621  			break
  3622  		}
  3623  		c := v_1.AuxInt
  3624  		if !(uint64(c) >= 32) {
  3625  			break
  3626  		}
  3627  		v.reset(OpPPC64MOVDconst)
  3628  		v.AuxInt = 0
  3629  		return true
  3630  	}
  3631  	// match: (Lsh32x64 x (MOVDconst [c]))
  3632  	// cond: uint64(c) < 32
  3633  	// result: (SLWconst x [c])
  3634  	for {
  3635  		_ = v.Args[1]
  3636  		x := v.Args[0]
  3637  		v_1 := v.Args[1]
  3638  		if v_1.Op != OpPPC64MOVDconst {
  3639  			break
  3640  		}
  3641  		c := v_1.AuxInt
  3642  		if !(uint64(c) < 32) {
  3643  			break
  3644  		}
  3645  		v.reset(OpPPC64SLWconst)
  3646  		v.AuxInt = c
  3647  		v.AddArg(x)
  3648  		return true
  3649  	}
  3650  	// match: (Lsh32x64 x y)
  3651  	// cond: shiftIsBounded(v)
  3652  	// result: (SLW x y)
  3653  	for {
  3654  		_ = v.Args[1]
  3655  		x := v.Args[0]
  3656  		y := v.Args[1]
  3657  		if !(shiftIsBounded(v)) {
  3658  			break
  3659  		}
  3660  		v.reset(OpPPC64SLW)
  3661  		v.AddArg(x)
  3662  		v.AddArg(y)
  3663  		return true
  3664  	}
  3665  	// match: (Lsh32x64 x (AND y (MOVDconst [31])))
  3666  	// cond:
  3667  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3668  	for {
  3669  		_ = v.Args[1]
  3670  		x := v.Args[0]
  3671  		v_1 := v.Args[1]
  3672  		if v_1.Op != OpPPC64AND {
  3673  			break
  3674  		}
  3675  		_ = v_1.Args[1]
  3676  		y := v_1.Args[0]
  3677  		v_1_1 := v_1.Args[1]
  3678  		if v_1_1.Op != OpPPC64MOVDconst {
  3679  			break
  3680  		}
  3681  		if v_1_1.AuxInt != 31 {
  3682  			break
  3683  		}
  3684  		v.reset(OpPPC64SLW)
  3685  		v.AddArg(x)
  3686  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3687  		v0.AuxInt = 31
  3688  		v0.AddArg(y)
  3689  		v.AddArg(v0)
  3690  		return true
  3691  	}
  3692  	// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
  3693  	// cond:
  3694  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3695  	for {
  3696  		_ = v.Args[1]
  3697  		x := v.Args[0]
  3698  		v_1 := v.Args[1]
  3699  		if v_1.Op != OpPPC64AND {
  3700  			break
  3701  		}
  3702  		_ = v_1.Args[1]
  3703  		v_1_0 := v_1.Args[0]
  3704  		if v_1_0.Op != OpPPC64MOVDconst {
  3705  			break
  3706  		}
  3707  		if v_1_0.AuxInt != 31 {
  3708  			break
  3709  		}
  3710  		y := v_1.Args[1]
  3711  		v.reset(OpPPC64SLW)
  3712  		v.AddArg(x)
  3713  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3714  		v0.AuxInt = 31
  3715  		v0.AddArg(y)
  3716  		v.AddArg(v0)
  3717  		return true
  3718  	}
  3719  	// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
  3720  	// cond:
  3721  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3722  	for {
  3723  		_ = v.Args[1]
  3724  		x := v.Args[0]
  3725  		v_1 := v.Args[1]
  3726  		if v_1.Op != OpPPC64ANDconst {
  3727  			break
  3728  		}
  3729  		if v_1.Type != typ.Int32 {
  3730  			break
  3731  		}
  3732  		if v_1.AuxInt != 31 {
  3733  			break
  3734  		}
  3735  		y := v_1.Args[0]
  3736  		v.reset(OpPPC64SLW)
  3737  		v.AddArg(x)
  3738  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3739  		v0.AuxInt = 31
  3740  		v0.AddArg(y)
  3741  		v.AddArg(v0)
  3742  		return true
  3743  	}
  3744  	// match: (Lsh32x64 x y)
  3745  	// cond:
  3746  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
  3747  	for {
  3748  		_ = v.Args[1]
  3749  		x := v.Args[0]
  3750  		y := v.Args[1]
  3751  		v.reset(OpPPC64SLW)
  3752  		v.AddArg(x)
  3753  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3754  		v0.AddArg(y)
  3755  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3756  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3757  		v2.AuxInt = -32
  3758  		v2.AddArg(y)
  3759  		v1.AddArg(v2)
  3760  		v0.AddArg(v1)
  3761  		v.AddArg(v0)
  3762  		return true
  3763  	}
  3764  }
  3765  func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
  3766  	b := v.Block
  3767  	_ = b
  3768  	typ := &b.Func.Config.Types
  3769  	_ = typ
  3770  	// match: (Lsh32x8 x y)
  3771  	// cond: shiftIsBounded(v)
  3772  	// result: (SLW x y)
  3773  	for {
  3774  		_ = v.Args[1]
  3775  		x := v.Args[0]
  3776  		y := v.Args[1]
  3777  		if !(shiftIsBounded(v)) {
  3778  			break
  3779  		}
  3780  		v.reset(OpPPC64SLW)
  3781  		v.AddArg(x)
  3782  		v.AddArg(y)
  3783  		return true
  3784  	}
  3785  	// match: (Lsh32x8 x y)
  3786  	// cond:
  3787  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
  3788  	for {
  3789  		_ = v.Args[1]
  3790  		x := v.Args[0]
  3791  		y := v.Args[1]
  3792  		v.reset(OpPPC64SLW)
  3793  		v.AddArg(x)
  3794  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3795  		v0.AddArg(y)
  3796  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3797  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3798  		v2.AuxInt = -32
  3799  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3800  		v3.AddArg(y)
  3801  		v2.AddArg(v3)
  3802  		v1.AddArg(v2)
  3803  		v0.AddArg(v1)
  3804  		v.AddArg(v0)
  3805  		return true
  3806  	}
  3807  }
  3808  func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
  3809  	b := v.Block
  3810  	_ = b
  3811  	typ := &b.Func.Config.Types
  3812  	_ = typ
  3813  	// match: (Lsh64x16 x y)
  3814  	// cond: shiftIsBounded(v)
  3815  	// result: (SLD x y)
  3816  	for {
  3817  		_ = v.Args[1]
  3818  		x := v.Args[0]
  3819  		y := v.Args[1]
  3820  		if !(shiftIsBounded(v)) {
  3821  			break
  3822  		}
  3823  		v.reset(OpPPC64SLD)
  3824  		v.AddArg(x)
  3825  		v.AddArg(y)
  3826  		return true
  3827  	}
  3828  	// match: (Lsh64x16 x y)
  3829  	// cond:
  3830  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
  3831  	for {
  3832  		_ = v.Args[1]
  3833  		x := v.Args[0]
  3834  		y := v.Args[1]
  3835  		v.reset(OpPPC64SLD)
  3836  		v.AddArg(x)
  3837  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3838  		v0.AddArg(y)
  3839  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3840  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3841  		v2.AuxInt = -64
  3842  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3843  		v3.AddArg(y)
  3844  		v2.AddArg(v3)
  3845  		v1.AddArg(v2)
  3846  		v0.AddArg(v1)
  3847  		v.AddArg(v0)
  3848  		return true
  3849  	}
  3850  }
  3851  func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
  3852  	b := v.Block
  3853  	_ = b
  3854  	typ := &b.Func.Config.Types
  3855  	_ = typ
  3856  	// match: (Lsh64x32 x (Const64 [c]))
  3857  	// cond: uint32(c) < 64
  3858  	// result: (SLDconst x [c])
  3859  	for {
  3860  		_ = v.Args[1]
  3861  		x := v.Args[0]
  3862  		v_1 := v.Args[1]
  3863  		if v_1.Op != OpConst64 {
  3864  			break
  3865  		}
  3866  		c := v_1.AuxInt
  3867  		if !(uint32(c) < 64) {
  3868  			break
  3869  		}
  3870  		v.reset(OpPPC64SLDconst)
  3871  		v.AuxInt = c
  3872  		v.AddArg(x)
  3873  		return true
  3874  	}
  3875  	// match: (Lsh64x32 x (MOVDconst [c]))
  3876  	// cond: uint32(c) < 64
  3877  	// result: (SLDconst x [c])
  3878  	for {
  3879  		_ = v.Args[1]
  3880  		x := v.Args[0]
  3881  		v_1 := v.Args[1]
  3882  		if v_1.Op != OpPPC64MOVDconst {
  3883  			break
  3884  		}
  3885  		c := v_1.AuxInt
  3886  		if !(uint32(c) < 64) {
  3887  			break
  3888  		}
  3889  		v.reset(OpPPC64SLDconst)
  3890  		v.AuxInt = c
  3891  		v.AddArg(x)
  3892  		return true
  3893  	}
  3894  	// match: (Lsh64x32 x y)
  3895  	// cond: shiftIsBounded(v)
  3896  	// result: (SLD x y)
  3897  	for {
  3898  		_ = v.Args[1]
  3899  		x := v.Args[0]
  3900  		y := v.Args[1]
  3901  		if !(shiftIsBounded(v)) {
  3902  			break
  3903  		}
  3904  		v.reset(OpPPC64SLD)
  3905  		v.AddArg(x)
  3906  		v.AddArg(y)
  3907  		return true
  3908  	}
  3909  	// match: (Lsh64x32 x y)
  3910  	// cond:
  3911  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
  3912  	for {
  3913  		_ = v.Args[1]
  3914  		x := v.Args[0]
  3915  		y := v.Args[1]
  3916  		v.reset(OpPPC64SLD)
  3917  		v.AddArg(x)
  3918  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3919  		v0.AddArg(y)
  3920  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3921  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3922  		v2.AuxInt = -64
  3923  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3924  		v3.AddArg(y)
  3925  		v2.AddArg(v3)
  3926  		v1.AddArg(v2)
  3927  		v0.AddArg(v1)
  3928  		v.AddArg(v0)
  3929  		return true
  3930  	}
  3931  }
  3932  func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
  3933  	b := v.Block
  3934  	_ = b
  3935  	typ := &b.Func.Config.Types
  3936  	_ = typ
  3937  	// match: (Lsh64x64 x (Const64 [c]))
  3938  	// cond: uint64(c) < 64
  3939  	// result: (SLDconst x [c])
  3940  	for {
  3941  		_ = v.Args[1]
  3942  		x := v.Args[0]
  3943  		v_1 := v.Args[1]
  3944  		if v_1.Op != OpConst64 {
  3945  			break
  3946  		}
  3947  		c := v_1.AuxInt
  3948  		if !(uint64(c) < 64) {
  3949  			break
  3950  		}
  3951  		v.reset(OpPPC64SLDconst)
  3952  		v.AuxInt = c
  3953  		v.AddArg(x)
  3954  		return true
  3955  	}
  3956  	// match: (Lsh64x64 _ (Const64 [c]))
  3957  	// cond: uint64(c) >= 64
  3958  	// result: (MOVDconst [0])
  3959  	for {
  3960  		_ = v.Args[1]
  3961  		v_1 := v.Args[1]
  3962  		if v_1.Op != OpConst64 {
  3963  			break
  3964  		}
  3965  		c := v_1.AuxInt
  3966  		if !(uint64(c) >= 64) {
  3967  			break
  3968  		}
  3969  		v.reset(OpPPC64MOVDconst)
  3970  		v.AuxInt = 0
  3971  		return true
  3972  	}
  3973  	// match: (Lsh64x64 x (MOVDconst [c]))
  3974  	// cond: uint64(c) < 64
  3975  	// result: (SLDconst x [c])
  3976  	for {
  3977  		_ = v.Args[1]
  3978  		x := v.Args[0]
  3979  		v_1 := v.Args[1]
  3980  		if v_1.Op != OpPPC64MOVDconst {
  3981  			break
  3982  		}
  3983  		c := v_1.AuxInt
  3984  		if !(uint64(c) < 64) {
  3985  			break
  3986  		}
  3987  		v.reset(OpPPC64SLDconst)
  3988  		v.AuxInt = c
  3989  		v.AddArg(x)
  3990  		return true
  3991  	}
  3992  	// match: (Lsh64x64 x y)
  3993  	// cond: shiftIsBounded(v)
  3994  	// result: (SLD x y)
  3995  	for {
  3996  		_ = v.Args[1]
  3997  		x := v.Args[0]
  3998  		y := v.Args[1]
  3999  		if !(shiftIsBounded(v)) {
  4000  			break
  4001  		}
  4002  		v.reset(OpPPC64SLD)
  4003  		v.AddArg(x)
  4004  		v.AddArg(y)
  4005  		return true
  4006  	}
  4007  	// match: (Lsh64x64 x (AND y (MOVDconst [63])))
  4008  	// cond:
  4009  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4010  	for {
  4011  		_ = v.Args[1]
  4012  		x := v.Args[0]
  4013  		v_1 := v.Args[1]
  4014  		if v_1.Op != OpPPC64AND {
  4015  			break
  4016  		}
  4017  		_ = v_1.Args[1]
  4018  		y := v_1.Args[0]
  4019  		v_1_1 := v_1.Args[1]
  4020  		if v_1_1.Op != OpPPC64MOVDconst {
  4021  			break
  4022  		}
  4023  		if v_1_1.AuxInt != 63 {
  4024  			break
  4025  		}
  4026  		v.reset(OpPPC64SLD)
  4027  		v.AddArg(x)
  4028  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4029  		v0.AuxInt = 63
  4030  		v0.AddArg(y)
  4031  		v.AddArg(v0)
  4032  		return true
  4033  	}
  4034  	// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
  4035  	// cond:
  4036  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4037  	for {
  4038  		_ = v.Args[1]
  4039  		x := v.Args[0]
  4040  		v_1 := v.Args[1]
  4041  		if v_1.Op != OpPPC64AND {
  4042  			break
  4043  		}
  4044  		_ = v_1.Args[1]
  4045  		v_1_0 := v_1.Args[0]
  4046  		if v_1_0.Op != OpPPC64MOVDconst {
  4047  			break
  4048  		}
  4049  		if v_1_0.AuxInt != 63 {
  4050  			break
  4051  		}
  4052  		y := v_1.Args[1]
  4053  		v.reset(OpPPC64SLD)
  4054  		v.AddArg(x)
  4055  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4056  		v0.AuxInt = 63
  4057  		v0.AddArg(y)
  4058  		v.AddArg(v0)
  4059  		return true
  4060  	}
  4061  	// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
  4062  	// cond:
  4063  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4064  	for {
  4065  		_ = v.Args[1]
  4066  		x := v.Args[0]
  4067  		v_1 := v.Args[1]
  4068  		if v_1.Op != OpPPC64ANDconst {
  4069  			break
  4070  		}
  4071  		if v_1.Type != typ.Int64 {
  4072  			break
  4073  		}
  4074  		if v_1.AuxInt != 63 {
  4075  			break
  4076  		}
  4077  		y := v_1.Args[0]
  4078  		v.reset(OpPPC64SLD)
  4079  		v.AddArg(x)
  4080  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4081  		v0.AuxInt = 63
  4082  		v0.AddArg(y)
  4083  		v.AddArg(v0)
  4084  		return true
  4085  	}
  4086  	// match: (Lsh64x64 x y)
  4087  	// cond:
  4088  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
  4089  	for {
  4090  		_ = v.Args[1]
  4091  		x := v.Args[0]
  4092  		y := v.Args[1]
  4093  		v.reset(OpPPC64SLD)
  4094  		v.AddArg(x)
  4095  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4096  		v0.AddArg(y)
  4097  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4098  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4099  		v2.AuxInt = -64
  4100  		v2.AddArg(y)
  4101  		v1.AddArg(v2)
  4102  		v0.AddArg(v1)
  4103  		v.AddArg(v0)
  4104  		return true
  4105  	}
  4106  }
  4107  func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
  4108  	b := v.Block
  4109  	_ = b
  4110  	typ := &b.Func.Config.Types
  4111  	_ = typ
  4112  	// match: (Lsh64x8 x y)
  4113  	// cond: shiftIsBounded(v)
  4114  	// result: (SLD x y)
  4115  	for {
  4116  		_ = v.Args[1]
  4117  		x := v.Args[0]
  4118  		y := v.Args[1]
  4119  		if !(shiftIsBounded(v)) {
  4120  			break
  4121  		}
  4122  		v.reset(OpPPC64SLD)
  4123  		v.AddArg(x)
  4124  		v.AddArg(y)
  4125  		return true
  4126  	}
  4127  	// match: (Lsh64x8 x y)
  4128  	// cond:
  4129  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
  4130  	for {
  4131  		_ = v.Args[1]
  4132  		x := v.Args[0]
  4133  		y := v.Args[1]
  4134  		v.reset(OpPPC64SLD)
  4135  		v.AddArg(x)
  4136  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4137  		v0.AddArg(y)
  4138  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4139  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4140  		v2.AuxInt = -64
  4141  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  4142  		v3.AddArg(y)
  4143  		v2.AddArg(v3)
  4144  		v1.AddArg(v2)
  4145  		v0.AddArg(v1)
  4146  		v.AddArg(v0)
  4147  		return true
  4148  	}
  4149  }
  4150  func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
  4151  	b := v.Block
  4152  	_ = b
  4153  	typ := &b.Func.Config.Types
  4154  	_ = typ
  4155  	// match: (Lsh8x16 x y)
  4156  	// cond: shiftIsBounded(v)
  4157  	// result: (SLW x y)
  4158  	for {
  4159  		_ = v.Args[1]
  4160  		x := v.Args[0]
  4161  		y := v.Args[1]
  4162  		if !(shiftIsBounded(v)) {
  4163  			break
  4164  		}
  4165  		v.reset(OpPPC64SLW)
  4166  		v.AddArg(x)
  4167  		v.AddArg(y)
  4168  		return true
  4169  	}
  4170  	// match: (Lsh8x16 x y)
  4171  	// cond:
  4172  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
  4173  	for {
  4174  		_ = v.Args[1]
  4175  		x := v.Args[0]
  4176  		y := v.Args[1]
  4177  		v.reset(OpPPC64SLW)
  4178  		v.AddArg(x)
  4179  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4180  		v0.AddArg(y)
  4181  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4182  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4183  		v2.AuxInt = -8
  4184  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  4185  		v3.AddArg(y)
  4186  		v2.AddArg(v3)
  4187  		v1.AddArg(v2)
  4188  		v0.AddArg(v1)
  4189  		v.AddArg(v0)
  4190  		return true
  4191  	}
  4192  }
  4193  func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
  4194  	b := v.Block
  4195  	_ = b
  4196  	typ := &b.Func.Config.Types
  4197  	_ = typ
  4198  	// match: (Lsh8x32 x (Const64 [c]))
  4199  	// cond: uint32(c) < 8
  4200  	// result: (SLWconst x [c])
  4201  	for {
  4202  		_ = v.Args[1]
  4203  		x := v.Args[0]
  4204  		v_1 := v.Args[1]
  4205  		if v_1.Op != OpConst64 {
  4206  			break
  4207  		}
  4208  		c := v_1.AuxInt
  4209  		if !(uint32(c) < 8) {
  4210  			break
  4211  		}
  4212  		v.reset(OpPPC64SLWconst)
  4213  		v.AuxInt = c
  4214  		v.AddArg(x)
  4215  		return true
  4216  	}
  4217  	// match: (Lsh8x32 x (MOVDconst [c]))
  4218  	// cond: uint32(c) < 8
  4219  	// result: (SLWconst x [c])
  4220  	for {
  4221  		_ = v.Args[1]
  4222  		x := v.Args[0]
  4223  		v_1 := v.Args[1]
  4224  		if v_1.Op != OpPPC64MOVDconst {
  4225  			break
  4226  		}
  4227  		c := v_1.AuxInt
  4228  		if !(uint32(c) < 8) {
  4229  			break
  4230  		}
  4231  		v.reset(OpPPC64SLWconst)
  4232  		v.AuxInt = c
  4233  		v.AddArg(x)
  4234  		return true
  4235  	}
  4236  	// match: (Lsh8x32 x y)
  4237  	// cond: shiftIsBounded(v)
  4238  	// result: (SLW x y)
  4239  	for {
  4240  		_ = v.Args[1]
  4241  		x := v.Args[0]
  4242  		y := v.Args[1]
  4243  		if !(shiftIsBounded(v)) {
  4244  			break
  4245  		}
  4246  		v.reset(OpPPC64SLW)
  4247  		v.AddArg(x)
  4248  		v.AddArg(y)
  4249  		return true
  4250  	}
  4251  	// match: (Lsh8x32 x y)
  4252  	// cond:
  4253  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
  4254  	for {
  4255  		_ = v.Args[1]
  4256  		x := v.Args[0]
  4257  		y := v.Args[1]
  4258  		v.reset(OpPPC64SLW)
  4259  		v.AddArg(x)
  4260  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4261  		v0.AddArg(y)
  4262  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4263  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4264  		v2.AuxInt = -8
  4265  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  4266  		v3.AddArg(y)
  4267  		v2.AddArg(v3)
  4268  		v1.AddArg(v2)
  4269  		v0.AddArg(v1)
  4270  		v.AddArg(v0)
  4271  		return true
  4272  	}
  4273  }
  4274  func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
  4275  	b := v.Block
  4276  	_ = b
  4277  	typ := &b.Func.Config.Types
  4278  	_ = typ
  4279  	// match: (Lsh8x64 x (Const64 [c]))
  4280  	// cond: uint64(c) < 8
  4281  	// result: (SLWconst x [c])
  4282  	for {
  4283  		_ = v.Args[1]
  4284  		x := v.Args[0]
  4285  		v_1 := v.Args[1]
  4286  		if v_1.Op != OpConst64 {
  4287  			break
  4288  		}
  4289  		c := v_1.AuxInt
  4290  		if !(uint64(c) < 8) {
  4291  			break
  4292  		}
  4293  		v.reset(OpPPC64SLWconst)
  4294  		v.AuxInt = c
  4295  		v.AddArg(x)
  4296  		return true
  4297  	}
  4298  	// match: (Lsh8x64 _ (Const64 [c]))
  4299  	// cond: uint64(c) >= 8
  4300  	// result: (MOVDconst [0])
  4301  	for {
  4302  		_ = v.Args[1]
  4303  		v_1 := v.Args[1]
  4304  		if v_1.Op != OpConst64 {
  4305  			break
  4306  		}
  4307  		c := v_1.AuxInt
  4308  		if !(uint64(c) >= 8) {
  4309  			break
  4310  		}
  4311  		v.reset(OpPPC64MOVDconst)
  4312  		v.AuxInt = 0
  4313  		return true
  4314  	}
  4315  	// match: (Lsh8x64 x (MOVDconst [c]))
  4316  	// cond: uint64(c) < 8
  4317  	// result: (SLWconst x [c])
  4318  	for {
  4319  		_ = v.Args[1]
  4320  		x := v.Args[0]
  4321  		v_1 := v.Args[1]
  4322  		if v_1.Op != OpPPC64MOVDconst {
  4323  			break
  4324  		}
  4325  		c := v_1.AuxInt
  4326  		if !(uint64(c) < 8) {
  4327  			break
  4328  		}
  4329  		v.reset(OpPPC64SLWconst)
  4330  		v.AuxInt = c
  4331  		v.AddArg(x)
  4332  		return true
  4333  	}
  4334  	// match: (Lsh8x64 x y)
  4335  	// cond: shiftIsBounded(v)
  4336  	// result: (SLW x y)
  4337  	for {
  4338  		_ = v.Args[1]
  4339  		x := v.Args[0]
  4340  		y := v.Args[1]
  4341  		if !(shiftIsBounded(v)) {
  4342  			break
  4343  		}
  4344  		v.reset(OpPPC64SLW)
  4345  		v.AddArg(x)
  4346  		v.AddArg(y)
  4347  		return true
  4348  	}
  4349  	// match: (Lsh8x64 x y)
  4350  	// cond:
  4351  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
  4352  	for {
  4353  		_ = v.Args[1]
  4354  		x := v.Args[0]
  4355  		y := v.Args[1]
  4356  		v.reset(OpPPC64SLW)
  4357  		v.AddArg(x)
  4358  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4359  		v0.AddArg(y)
  4360  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4361  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4362  		v2.AuxInt = -8
  4363  		v2.AddArg(y)
  4364  		v1.AddArg(v2)
  4365  		v0.AddArg(v1)
  4366  		v.AddArg(v0)
  4367  		return true
  4368  	}
  4369  }
  4370  func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
  4371  	b := v.Block
  4372  	_ = b
  4373  	typ := &b.Func.Config.Types
  4374  	_ = typ
  4375  	// match: (Lsh8x8 x y)
  4376  	// cond: shiftIsBounded(v)
  4377  	// result: (SLW x y)
  4378  	for {
  4379  		_ = v.Args[1]
  4380  		x := v.Args[0]
  4381  		y := v.Args[1]
  4382  		if !(shiftIsBounded(v)) {
  4383  			break
  4384  		}
  4385  		v.reset(OpPPC64SLW)
  4386  		v.AddArg(x)
  4387  		v.AddArg(y)
  4388  		return true
  4389  	}
  4390  	// match: (Lsh8x8 x y)
  4391  	// cond:
  4392  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
  4393  	for {
  4394  		_ = v.Args[1]
  4395  		x := v.Args[0]
  4396  		y := v.Args[1]
  4397  		v.reset(OpPPC64SLW)
  4398  		v.AddArg(x)
  4399  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4400  		v0.AddArg(y)
  4401  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4402  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4403  		v2.AuxInt = -8
  4404  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  4405  		v3.AddArg(y)
  4406  		v2.AddArg(v3)
  4407  		v1.AddArg(v2)
  4408  		v0.AddArg(v1)
  4409  		v.AddArg(v0)
  4410  		return true
  4411  	}
  4412  }
  4413  func rewriteValuePPC64_OpMod16_0(v *Value) bool {
  4414  	b := v.Block
  4415  	_ = b
  4416  	typ := &b.Func.Config.Types
  4417  	_ = typ
  4418  	// match: (Mod16 x y)
  4419  	// cond:
  4420  	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
  4421  	for {
  4422  		_ = v.Args[1]
  4423  		x := v.Args[0]
  4424  		y := v.Args[1]
  4425  		v.reset(OpMod32)
  4426  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4427  		v0.AddArg(x)
  4428  		v.AddArg(v0)
  4429  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4430  		v1.AddArg(y)
  4431  		v.AddArg(v1)
  4432  		return true
  4433  	}
  4434  }
  4435  func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
  4436  	b := v.Block
  4437  	_ = b
  4438  	typ := &b.Func.Config.Types
  4439  	_ = typ
  4440  	// match: (Mod16u x y)
  4441  	// cond:
  4442  	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
  4443  	for {
  4444  		_ = v.Args[1]
  4445  		x := v.Args[0]
  4446  		y := v.Args[1]
  4447  		v.reset(OpMod32u)
  4448  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4449  		v0.AddArg(x)
  4450  		v.AddArg(v0)
  4451  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4452  		v1.AddArg(y)
  4453  		v.AddArg(v1)
  4454  		return true
  4455  	}
  4456  }
  4457  func rewriteValuePPC64_OpMod32_0(v *Value) bool {
  4458  	b := v.Block
  4459  	_ = b
  4460  	typ := &b.Func.Config.Types
  4461  	_ = typ
  4462  	// match: (Mod32 x y)
  4463  	// cond:
  4464  	// result: (SUB x (MULLW y (DIVW x y)))
  4465  	for {
  4466  		_ = v.Args[1]
  4467  		x := v.Args[0]
  4468  		y := v.Args[1]
  4469  		v.reset(OpPPC64SUB)
  4470  		v.AddArg(x)
  4471  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4472  		v0.AddArg(y)
  4473  		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
  4474  		v1.AddArg(x)
  4475  		v1.AddArg(y)
  4476  		v0.AddArg(v1)
  4477  		v.AddArg(v0)
  4478  		return true
  4479  	}
  4480  }
  4481  func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
  4482  	b := v.Block
  4483  	_ = b
  4484  	typ := &b.Func.Config.Types
  4485  	_ = typ
  4486  	// match: (Mod32u x y)
  4487  	// cond:
  4488  	// result: (SUB x (MULLW y (DIVWU x y)))
  4489  	for {
  4490  		_ = v.Args[1]
  4491  		x := v.Args[0]
  4492  		y := v.Args[1]
  4493  		v.reset(OpPPC64SUB)
  4494  		v.AddArg(x)
  4495  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4496  		v0.AddArg(y)
  4497  		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
  4498  		v1.AddArg(x)
  4499  		v1.AddArg(y)
  4500  		v0.AddArg(v1)
  4501  		v.AddArg(v0)
  4502  		return true
  4503  	}
  4504  }
  4505  func rewriteValuePPC64_OpMod64_0(v *Value) bool {
  4506  	b := v.Block
  4507  	_ = b
  4508  	typ := &b.Func.Config.Types
  4509  	_ = typ
  4510  	// match: (Mod64 x y)
  4511  	// cond:
  4512  	// result: (SUB x (MULLD y (DIVD x y)))
  4513  	for {
  4514  		_ = v.Args[1]
  4515  		x := v.Args[0]
  4516  		y := v.Args[1]
  4517  		v.reset(OpPPC64SUB)
  4518  		v.AddArg(x)
  4519  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4520  		v0.AddArg(y)
  4521  		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
  4522  		v1.AddArg(x)
  4523  		v1.AddArg(y)
  4524  		v0.AddArg(v1)
  4525  		v.AddArg(v0)
  4526  		return true
  4527  	}
  4528  }
  4529  func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
  4530  	b := v.Block
  4531  	_ = b
  4532  	typ := &b.Func.Config.Types
  4533  	_ = typ
  4534  	// match: (Mod64u x y)
  4535  	// cond:
  4536  	// result: (SUB x (MULLD y (DIVDU x y)))
  4537  	for {
  4538  		_ = v.Args[1]
  4539  		x := v.Args[0]
  4540  		y := v.Args[1]
  4541  		v.reset(OpPPC64SUB)
  4542  		v.AddArg(x)
  4543  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4544  		v0.AddArg(y)
  4545  		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
  4546  		v1.AddArg(x)
  4547  		v1.AddArg(y)
  4548  		v0.AddArg(v1)
  4549  		v.AddArg(v0)
  4550  		return true
  4551  	}
  4552  }
  4553  func rewriteValuePPC64_OpMod8_0(v *Value) bool {
  4554  	b := v.Block
  4555  	_ = b
  4556  	typ := &b.Func.Config.Types
  4557  	_ = typ
  4558  	// match: (Mod8 x y)
  4559  	// cond:
  4560  	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
  4561  	for {
  4562  		_ = v.Args[1]
  4563  		x := v.Args[0]
  4564  		y := v.Args[1]
  4565  		v.reset(OpMod32)
  4566  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4567  		v0.AddArg(x)
  4568  		v.AddArg(v0)
  4569  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4570  		v1.AddArg(y)
  4571  		v.AddArg(v1)
  4572  		return true
  4573  	}
  4574  }
  4575  func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
  4576  	b := v.Block
  4577  	_ = b
  4578  	typ := &b.Func.Config.Types
  4579  	_ = typ
  4580  	// match: (Mod8u x y)
  4581  	// cond:
  4582  	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
  4583  	for {
  4584  		_ = v.Args[1]
  4585  		x := v.Args[0]
  4586  		y := v.Args[1]
  4587  		v.reset(OpMod32u)
  4588  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4589  		v0.AddArg(x)
  4590  		v.AddArg(v0)
  4591  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4592  		v1.AddArg(y)
  4593  		v.AddArg(v1)
  4594  		return true
  4595  	}
  4596  }
  4597  func rewriteValuePPC64_OpMove_0(v *Value) bool {
  4598  	b := v.Block
  4599  	_ = b
  4600  	typ := &b.Func.Config.Types
  4601  	_ = typ
  4602  	// match: (Move [0] _ _ mem)
  4603  	// cond:
  4604  	// result: mem
  4605  	for {
  4606  		if v.AuxInt != 0 {
  4607  			break
  4608  		}
  4609  		_ = v.Args[2]
  4610  		mem := v.Args[2]
  4611  		v.reset(OpCopy)
  4612  		v.Type = mem.Type
  4613  		v.AddArg(mem)
  4614  		return true
  4615  	}
  4616  	// match: (Move [1] dst src mem)
  4617  	// cond:
  4618  	// result: (MOVBstore dst (MOVBZload src mem) mem)
  4619  	for {
  4620  		if v.AuxInt != 1 {
  4621  			break
  4622  		}
  4623  		_ = v.Args[2]
  4624  		dst := v.Args[0]
  4625  		src := v.Args[1]
  4626  		mem := v.Args[2]
  4627  		v.reset(OpPPC64MOVBstore)
  4628  		v.AddArg(dst)
  4629  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4630  		v0.AddArg(src)
  4631  		v0.AddArg(mem)
  4632  		v.AddArg(v0)
  4633  		v.AddArg(mem)
  4634  		return true
  4635  	}
  4636  	// match: (Move [2] dst src mem)
  4637  	// cond:
  4638  	// result: (MOVHstore dst (MOVHZload src mem) mem)
  4639  	for {
  4640  		if v.AuxInt != 2 {
  4641  			break
  4642  		}
  4643  		_ = v.Args[2]
  4644  		dst := v.Args[0]
  4645  		src := v.Args[1]
  4646  		mem := v.Args[2]
  4647  		v.reset(OpPPC64MOVHstore)
  4648  		v.AddArg(dst)
  4649  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4650  		v0.AddArg(src)
  4651  		v0.AddArg(mem)
  4652  		v.AddArg(v0)
  4653  		v.AddArg(mem)
  4654  		return true
  4655  	}
  4656  	// match: (Move [4] dst src mem)
  4657  	// cond:
  4658  	// result: (MOVWstore dst (MOVWZload src mem) mem)
  4659  	for {
  4660  		if v.AuxInt != 4 {
  4661  			break
  4662  		}
  4663  		_ = v.Args[2]
  4664  		dst := v.Args[0]
  4665  		src := v.Args[1]
  4666  		mem := v.Args[2]
  4667  		v.reset(OpPPC64MOVWstore)
  4668  		v.AddArg(dst)
  4669  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4670  		v0.AddArg(src)
  4671  		v0.AddArg(mem)
  4672  		v.AddArg(v0)
  4673  		v.AddArg(mem)
  4674  		return true
  4675  	}
  4676  	// match: (Move [8] {t} dst src mem)
  4677  	// cond: t.(*types.Type).Alignment()%4 == 0
  4678  	// result: (MOVDstore dst (MOVDload src mem) mem)
  4679  	for {
  4680  		if v.AuxInt != 8 {
  4681  			break
  4682  		}
  4683  		t := v.Aux
  4684  		_ = v.Args[2]
  4685  		dst := v.Args[0]
  4686  		src := v.Args[1]
  4687  		mem := v.Args[2]
  4688  		if !(t.(*types.Type).Alignment()%4 == 0) {
  4689  			break
  4690  		}
  4691  		v.reset(OpPPC64MOVDstore)
  4692  		v.AddArg(dst)
  4693  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  4694  		v0.AddArg(src)
  4695  		v0.AddArg(mem)
  4696  		v.AddArg(v0)
  4697  		v.AddArg(mem)
  4698  		return true
  4699  	}
  4700  	// match: (Move [8] dst src mem)
  4701  	// cond:
  4702  	// result: (MOVWstore [4] dst (MOVWZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4703  	for {
  4704  		if v.AuxInt != 8 {
  4705  			break
  4706  		}
  4707  		_ = v.Args[2]
  4708  		dst := v.Args[0]
  4709  		src := v.Args[1]
  4710  		mem := v.Args[2]
  4711  		v.reset(OpPPC64MOVWstore)
  4712  		v.AuxInt = 4
  4713  		v.AddArg(dst)
  4714  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4715  		v0.AuxInt = 4
  4716  		v0.AddArg(src)
  4717  		v0.AddArg(mem)
  4718  		v.AddArg(v0)
  4719  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4720  		v1.AddArg(dst)
  4721  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4722  		v2.AddArg(src)
  4723  		v2.AddArg(mem)
  4724  		v1.AddArg(v2)
  4725  		v1.AddArg(mem)
  4726  		v.AddArg(v1)
  4727  		return true
  4728  	}
  4729  	// match: (Move [3] dst src mem)
  4730  	// cond:
  4731  	// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  4732  	for {
  4733  		if v.AuxInt != 3 {
  4734  			break
  4735  		}
  4736  		_ = v.Args[2]
  4737  		dst := v.Args[0]
  4738  		src := v.Args[1]
  4739  		mem := v.Args[2]
  4740  		v.reset(OpPPC64MOVBstore)
  4741  		v.AuxInt = 2
  4742  		v.AddArg(dst)
  4743  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4744  		v0.AuxInt = 2
  4745  		v0.AddArg(src)
  4746  		v0.AddArg(mem)
  4747  		v.AddArg(v0)
  4748  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4749  		v1.AddArg(dst)
  4750  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
  4751  		v2.AddArg(src)
  4752  		v2.AddArg(mem)
  4753  		v1.AddArg(v2)
  4754  		v1.AddArg(mem)
  4755  		v.AddArg(v1)
  4756  		return true
  4757  	}
  4758  	// match: (Move [5] dst src mem)
  4759  	// cond:
  4760  	// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4761  	for {
  4762  		if v.AuxInt != 5 {
  4763  			break
  4764  		}
  4765  		_ = v.Args[2]
  4766  		dst := v.Args[0]
  4767  		src := v.Args[1]
  4768  		mem := v.Args[2]
  4769  		v.reset(OpPPC64MOVBstore)
  4770  		v.AuxInt = 4
  4771  		v.AddArg(dst)
  4772  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4773  		v0.AuxInt = 4
  4774  		v0.AddArg(src)
  4775  		v0.AddArg(mem)
  4776  		v.AddArg(v0)
  4777  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4778  		v1.AddArg(dst)
  4779  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4780  		v2.AddArg(src)
  4781  		v2.AddArg(mem)
  4782  		v1.AddArg(v2)
  4783  		v1.AddArg(mem)
  4784  		v.AddArg(v1)
  4785  		return true
  4786  	}
  4787  	// match: (Move [6] dst src mem)
  4788  	// cond:
  4789  	// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4790  	for {
  4791  		if v.AuxInt != 6 {
  4792  			break
  4793  		}
  4794  		_ = v.Args[2]
  4795  		dst := v.Args[0]
  4796  		src := v.Args[1]
  4797  		mem := v.Args[2]
  4798  		v.reset(OpPPC64MOVHstore)
  4799  		v.AuxInt = 4
  4800  		v.AddArg(dst)
  4801  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4802  		v0.AuxInt = 4
  4803  		v0.AddArg(src)
  4804  		v0.AddArg(mem)
  4805  		v.AddArg(v0)
  4806  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4807  		v1.AddArg(dst)
  4808  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4809  		v2.AddArg(src)
  4810  		v2.AddArg(mem)
  4811  		v1.AddArg(v2)
  4812  		v1.AddArg(mem)
  4813  		v.AddArg(v1)
  4814  		return true
  4815  	}
  4816  	// match: (Move [7] dst src mem)
  4817  	// cond:
  4818  	// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
  4819  	for {
  4820  		if v.AuxInt != 7 {
  4821  			break
  4822  		}
  4823  		_ = v.Args[2]
  4824  		dst := v.Args[0]
  4825  		src := v.Args[1]
  4826  		mem := v.Args[2]
  4827  		v.reset(OpPPC64MOVBstore)
  4828  		v.AuxInt = 6
  4829  		v.AddArg(dst)
  4830  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4831  		v0.AuxInt = 6
  4832  		v0.AddArg(src)
  4833  		v0.AddArg(mem)
  4834  		v.AddArg(v0)
  4835  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4836  		v1.AuxInt = 4
  4837  		v1.AddArg(dst)
  4838  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4839  		v2.AuxInt = 4
  4840  		v2.AddArg(src)
  4841  		v2.AddArg(mem)
  4842  		v1.AddArg(v2)
  4843  		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4844  		v3.AddArg(dst)
  4845  		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4846  		v4.AddArg(src)
  4847  		v4.AddArg(mem)
  4848  		v3.AddArg(v4)
  4849  		v3.AddArg(mem)
  4850  		v1.AddArg(v3)
  4851  		v.AddArg(v1)
  4852  		return true
  4853  	}
  4854  	return false
  4855  }
  4856  func rewriteValuePPC64_OpMove_10(v *Value) bool {
  4857  	// match: (Move [s] dst src mem)
  4858  	// cond: s > 8
  4859  	// result: (LoweredMove [s] dst src mem)
  4860  	for {
  4861  		s := v.AuxInt
  4862  		_ = v.Args[2]
  4863  		dst := v.Args[0]
  4864  		src := v.Args[1]
  4865  		mem := v.Args[2]
  4866  		if !(s > 8) {
  4867  			break
  4868  		}
  4869  		v.reset(OpPPC64LoweredMove)
  4870  		v.AuxInt = s
  4871  		v.AddArg(dst)
  4872  		v.AddArg(src)
  4873  		v.AddArg(mem)
  4874  		return true
  4875  	}
  4876  	return false
  4877  }
  4878  func rewriteValuePPC64_OpMul16_0(v *Value) bool {
  4879  	// match: (Mul16 x y)
  4880  	// cond:
  4881  	// result: (MULLW x y)
  4882  	for {
  4883  		_ = v.Args[1]
  4884  		x := v.Args[0]
  4885  		y := v.Args[1]
  4886  		v.reset(OpPPC64MULLW)
  4887  		v.AddArg(x)
  4888  		v.AddArg(y)
  4889  		return true
  4890  	}
  4891  }
  4892  func rewriteValuePPC64_OpMul32_0(v *Value) bool {
  4893  	// match: (Mul32 x y)
  4894  	// cond:
  4895  	// result: (MULLW x y)
  4896  	for {
  4897  		_ = v.Args[1]
  4898  		x := v.Args[0]
  4899  		y := v.Args[1]
  4900  		v.reset(OpPPC64MULLW)
  4901  		v.AddArg(x)
  4902  		v.AddArg(y)
  4903  		return true
  4904  	}
  4905  }
  4906  func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
  4907  	// match: (Mul32F x y)
  4908  	// cond:
  4909  	// result: (FMULS x y)
  4910  	for {
  4911  		_ = v.Args[1]
  4912  		x := v.Args[0]
  4913  		y := v.Args[1]
  4914  		v.reset(OpPPC64FMULS)
  4915  		v.AddArg(x)
  4916  		v.AddArg(y)
  4917  		return true
  4918  	}
  4919  }
  4920  func rewriteValuePPC64_OpMul64_0(v *Value) bool {
  4921  	// match: (Mul64 x y)
  4922  	// cond:
  4923  	// result: (MULLD x y)
  4924  	for {
  4925  		_ = v.Args[1]
  4926  		x := v.Args[0]
  4927  		y := v.Args[1]
  4928  		v.reset(OpPPC64MULLD)
  4929  		v.AddArg(x)
  4930  		v.AddArg(y)
  4931  		return true
  4932  	}
  4933  }
  4934  func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
  4935  	// match: (Mul64F x y)
  4936  	// cond:
  4937  	// result: (FMUL x y)
  4938  	for {
  4939  		_ = v.Args[1]
  4940  		x := v.Args[0]
  4941  		y := v.Args[1]
  4942  		v.reset(OpPPC64FMUL)
  4943  		v.AddArg(x)
  4944  		v.AddArg(y)
  4945  		return true
  4946  	}
  4947  }
  4948  func rewriteValuePPC64_OpMul64uhilo_0(v *Value) bool {
  4949  	// match: (Mul64uhilo x y)
  4950  	// cond:
  4951  	// result: (LoweredMuluhilo x y)
  4952  	for {
  4953  		_ = v.Args[1]
  4954  		x := v.Args[0]
  4955  		y := v.Args[1]
  4956  		v.reset(OpPPC64LoweredMuluhilo)
  4957  		v.AddArg(x)
  4958  		v.AddArg(y)
  4959  		return true
  4960  	}
  4961  }
  4962  func rewriteValuePPC64_OpMul8_0(v *Value) bool {
  4963  	// match: (Mul8 x y)
  4964  	// cond:
  4965  	// result: (MULLW x y)
  4966  	for {
  4967  		_ = v.Args[1]
  4968  		x := v.Args[0]
  4969  		y := v.Args[1]
  4970  		v.reset(OpPPC64MULLW)
  4971  		v.AddArg(x)
  4972  		v.AddArg(y)
  4973  		return true
  4974  	}
  4975  }
  4976  func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
  4977  	// match: (Neg16 x)
  4978  	// cond:
  4979  	// result: (NEG x)
  4980  	for {
  4981  		x := v.Args[0]
  4982  		v.reset(OpPPC64NEG)
  4983  		v.AddArg(x)
  4984  		return true
  4985  	}
  4986  }
  4987  func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
  4988  	// match: (Neg32 x)
  4989  	// cond:
  4990  	// result: (NEG x)
  4991  	for {
  4992  		x := v.Args[0]
  4993  		v.reset(OpPPC64NEG)
  4994  		v.AddArg(x)
  4995  		return true
  4996  	}
  4997  }
  4998  func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
  4999  	// match: (Neg32F x)
  5000  	// cond:
  5001  	// result: (FNEG x)
  5002  	for {
  5003  		x := v.Args[0]
  5004  		v.reset(OpPPC64FNEG)
  5005  		v.AddArg(x)
  5006  		return true
  5007  	}
  5008  }
  5009  func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
  5010  	// match: (Neg64 x)
  5011  	// cond:
  5012  	// result: (NEG x)
  5013  	for {
  5014  		x := v.Args[0]
  5015  		v.reset(OpPPC64NEG)
  5016  		v.AddArg(x)
  5017  		return true
  5018  	}
  5019  }
  5020  func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
  5021  	// match: (Neg64F x)
  5022  	// cond:
  5023  	// result: (FNEG x)
  5024  	for {
  5025  		x := v.Args[0]
  5026  		v.reset(OpPPC64FNEG)
  5027  		v.AddArg(x)
  5028  		return true
  5029  	}
  5030  }
  5031  func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
  5032  	// match: (Neg8 x)
  5033  	// cond:
  5034  	// result: (NEG x)
  5035  	for {
  5036  		x := v.Args[0]
  5037  		v.reset(OpPPC64NEG)
  5038  		v.AddArg(x)
  5039  		return true
  5040  	}
  5041  }
  5042  func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
  5043  	b := v.Block
  5044  	_ = b
  5045  	typ := &b.Func.Config.Types
  5046  	_ = typ
  5047  	// match: (Neq16 x y)
  5048  	// cond: isSigned(x.Type) && isSigned(y.Type)
  5049  	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  5050  	for {
  5051  		_ = v.Args[1]
  5052  		x := v.Args[0]
  5053  		y := v.Args[1]
  5054  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  5055  			break
  5056  		}
  5057  		v.reset(OpPPC64NotEqual)
  5058  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5059  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5060  		v1.AddArg(x)
  5061  		v0.AddArg(v1)
  5062  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5063  		v2.AddArg(y)
  5064  		v0.AddArg(v2)
  5065  		v.AddArg(v0)
  5066  		return true
  5067  	}
  5068  	// match: (Neq16 x y)
  5069  	// cond:
  5070  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  5071  	for {
  5072  		_ = v.Args[1]
  5073  		x := v.Args[0]
  5074  		y := v.Args[1]
  5075  		v.reset(OpPPC64NotEqual)
  5076  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5077  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5078  		v1.AddArg(x)
  5079  		v0.AddArg(v1)
  5080  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5081  		v2.AddArg(y)
  5082  		v0.AddArg(v2)
  5083  		v.AddArg(v0)
  5084  		return true
  5085  	}
  5086  }
  5087  func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
  5088  	b := v.Block
  5089  	_ = b
  5090  	// match: (Neq32 x y)
  5091  	// cond:
  5092  	// result: (NotEqual (CMPW x y))
  5093  	for {
  5094  		_ = v.Args[1]
  5095  		x := v.Args[0]
  5096  		y := v.Args[1]
  5097  		v.reset(OpPPC64NotEqual)
  5098  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5099  		v0.AddArg(x)
  5100  		v0.AddArg(y)
  5101  		v.AddArg(v0)
  5102  		return true
  5103  	}
  5104  }
  5105  func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
  5106  	b := v.Block
  5107  	_ = b
  5108  	// match: (Neq32F x y)
  5109  	// cond:
  5110  	// result: (NotEqual (FCMPU x y))
  5111  	for {
  5112  		_ = v.Args[1]
  5113  		x := v.Args[0]
  5114  		y := v.Args[1]
  5115  		v.reset(OpPPC64NotEqual)
  5116  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  5117  		v0.AddArg(x)
  5118  		v0.AddArg(y)
  5119  		v.AddArg(v0)
  5120  		return true
  5121  	}
  5122  }
  5123  func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
  5124  	b := v.Block
  5125  	_ = b
  5126  	// match: (Neq64 x y)
  5127  	// cond:
  5128  	// result: (NotEqual (CMP x y))
  5129  	for {
  5130  		_ = v.Args[1]
  5131  		x := v.Args[0]
  5132  		y := v.Args[1]
  5133  		v.reset(OpPPC64NotEqual)
  5134  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  5135  		v0.AddArg(x)
  5136  		v0.AddArg(y)
  5137  		v.AddArg(v0)
  5138  		return true
  5139  	}
  5140  }
  5141  func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
  5142  	b := v.Block
  5143  	_ = b
  5144  	// match: (Neq64F x y)
  5145  	// cond:
  5146  	// result: (NotEqual (FCMPU x y))
  5147  	for {
  5148  		_ = v.Args[1]
  5149  		x := v.Args[0]
  5150  		y := v.Args[1]
  5151  		v.reset(OpPPC64NotEqual)
  5152  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  5153  		v0.AddArg(x)
  5154  		v0.AddArg(y)
  5155  		v.AddArg(v0)
  5156  		return true
  5157  	}
  5158  }
  5159  func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
  5160  	b := v.Block
  5161  	_ = b
  5162  	typ := &b.Func.Config.Types
  5163  	_ = typ
  5164  	// match: (Neq8 x y)
  5165  	// cond: isSigned(x.Type) && isSigned(y.Type)
  5166  	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  5167  	for {
  5168  		_ = v.Args[1]
  5169  		x := v.Args[0]
  5170  		y := v.Args[1]
  5171  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  5172  			break
  5173  		}
  5174  		v.reset(OpPPC64NotEqual)
  5175  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5176  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5177  		v1.AddArg(x)
  5178  		v0.AddArg(v1)
  5179  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5180  		v2.AddArg(y)
  5181  		v0.AddArg(v2)
  5182  		v.AddArg(v0)
  5183  		return true
  5184  	}
  5185  	// match: (Neq8 x y)
  5186  	// cond:
  5187  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5188  	for {
  5189  		_ = v.Args[1]
  5190  		x := v.Args[0]
  5191  		y := v.Args[1]
  5192  		v.reset(OpPPC64NotEqual)
  5193  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5194  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5195  		v1.AddArg(x)
  5196  		v0.AddArg(v1)
  5197  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5198  		v2.AddArg(y)
  5199  		v0.AddArg(v2)
  5200  		v.AddArg(v0)
  5201  		return true
  5202  	}
  5203  }
  5204  func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
  5205  	// match: (NeqB x y)
  5206  	// cond:
  5207  	// result: (XOR x y)
  5208  	for {
  5209  		_ = v.Args[1]
  5210  		x := v.Args[0]
  5211  		y := v.Args[1]
  5212  		v.reset(OpPPC64XOR)
  5213  		v.AddArg(x)
  5214  		v.AddArg(y)
  5215  		return true
  5216  	}
  5217  }
  5218  func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
  5219  	b := v.Block
  5220  	_ = b
  5221  	// match: (NeqPtr x y)
  5222  	// cond:
  5223  	// result: (NotEqual (CMP x y))
  5224  	for {
  5225  		_ = v.Args[1]
  5226  		x := v.Args[0]
  5227  		y := v.Args[1]
  5228  		v.reset(OpPPC64NotEqual)
  5229  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  5230  		v0.AddArg(x)
  5231  		v0.AddArg(y)
  5232  		v.AddArg(v0)
  5233  		return true
  5234  	}
  5235  }
  5236  func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
  5237  	// match: (NilCheck ptr mem)
  5238  	// cond:
  5239  	// result: (LoweredNilCheck ptr mem)
  5240  	for {
  5241  		_ = v.Args[1]
  5242  		ptr := v.Args[0]
  5243  		mem := v.Args[1]
  5244  		v.reset(OpPPC64LoweredNilCheck)
  5245  		v.AddArg(ptr)
  5246  		v.AddArg(mem)
  5247  		return true
  5248  	}
  5249  }
  5250  func rewriteValuePPC64_OpNot_0(v *Value) bool {
  5251  	// match: (Not x)
  5252  	// cond:
  5253  	// result: (XORconst [1] x)
  5254  	for {
  5255  		x := v.Args[0]
  5256  		v.reset(OpPPC64XORconst)
  5257  		v.AuxInt = 1
  5258  		v.AddArg(x)
  5259  		return true
  5260  	}
  5261  }
  5262  func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
  5263  	b := v.Block
  5264  	_ = b
  5265  	typ := &b.Func.Config.Types
  5266  	_ = typ
  5267  	// match: (OffPtr [off] ptr)
  5268  	// cond:
  5269  	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
  5270  	for {
  5271  		off := v.AuxInt
  5272  		ptr := v.Args[0]
  5273  		v.reset(OpPPC64ADD)
  5274  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  5275  		v0.AuxInt = off
  5276  		v.AddArg(v0)
  5277  		v.AddArg(ptr)
  5278  		return true
  5279  	}
  5280  }
  5281  func rewriteValuePPC64_OpOr16_0(v *Value) bool {
  5282  	// match: (Or16 x y)
  5283  	// cond:
  5284  	// result: (OR x y)
  5285  	for {
  5286  		_ = v.Args[1]
  5287  		x := v.Args[0]
  5288  		y := v.Args[1]
  5289  		v.reset(OpPPC64OR)
  5290  		v.AddArg(x)
  5291  		v.AddArg(y)
  5292  		return true
  5293  	}
  5294  }
  5295  func rewriteValuePPC64_OpOr32_0(v *Value) bool {
  5296  	// match: (Or32 x y)
  5297  	// cond:
  5298  	// result: (OR x y)
  5299  	for {
  5300  		_ = v.Args[1]
  5301  		x := v.Args[0]
  5302  		y := v.Args[1]
  5303  		v.reset(OpPPC64OR)
  5304  		v.AddArg(x)
  5305  		v.AddArg(y)
  5306  		return true
  5307  	}
  5308  }
  5309  func rewriteValuePPC64_OpOr64_0(v *Value) bool {
  5310  	// match: (Or64 x y)
  5311  	// cond:
  5312  	// result: (OR x y)
  5313  	for {
  5314  		_ = v.Args[1]
  5315  		x := v.Args[0]
  5316  		y := v.Args[1]
  5317  		v.reset(OpPPC64OR)
  5318  		v.AddArg(x)
  5319  		v.AddArg(y)
  5320  		return true
  5321  	}
  5322  }
  5323  func rewriteValuePPC64_OpOr8_0(v *Value) bool {
  5324  	// match: (Or8 x y)
  5325  	// cond:
  5326  	// result: (OR x y)
  5327  	for {
  5328  		_ = v.Args[1]
  5329  		x := v.Args[0]
  5330  		y := v.Args[1]
  5331  		v.reset(OpPPC64OR)
  5332  		v.AddArg(x)
  5333  		v.AddArg(y)
  5334  		return true
  5335  	}
  5336  }
  5337  func rewriteValuePPC64_OpOrB_0(v *Value) bool {
  5338  	// match: (OrB x y)
  5339  	// cond:
  5340  	// result: (OR x y)
  5341  	for {
  5342  		_ = v.Args[1]
  5343  		x := v.Args[0]
  5344  		y := v.Args[1]
  5345  		v.reset(OpPPC64OR)
  5346  		v.AddArg(x)
  5347  		v.AddArg(y)
  5348  		return true
  5349  	}
  5350  }
  5351  func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
  5352  	b := v.Block
  5353  	_ = b
  5354  	typ := &b.Func.Config.Types
  5355  	_ = typ
  5356  	// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
  5357  	// cond: d == 64-c
  5358  	// result: (ROTLconst [c] x)
  5359  	for {
  5360  		_ = v.Args[1]
  5361  		v_0 := v.Args[0]
  5362  		if v_0.Op != OpPPC64SLDconst {
  5363  			break
  5364  		}
  5365  		c := v_0.AuxInt
  5366  		x := v_0.Args[0]
  5367  		v_1 := v.Args[1]
  5368  		if v_1.Op != OpPPC64SRDconst {
  5369  			break
  5370  		}
  5371  		d := v_1.AuxInt
  5372  		if x != v_1.Args[0] {
  5373  			break
  5374  		}
  5375  		if !(d == 64-c) {
  5376  			break
  5377  		}
  5378  		v.reset(OpPPC64ROTLconst)
  5379  		v.AuxInt = c
  5380  		v.AddArg(x)
  5381  		return true
  5382  	}
  5383  	// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
  5384  	// cond: d == 64-c
  5385  	// result: (ROTLconst [c] x)
  5386  	for {
  5387  		_ = v.Args[1]
  5388  		v_0 := v.Args[0]
  5389  		if v_0.Op != OpPPC64SRDconst {
  5390  			break
  5391  		}
  5392  		d := v_0.AuxInt
  5393  		x := v_0.Args[0]
  5394  		v_1 := v.Args[1]
  5395  		if v_1.Op != OpPPC64SLDconst {
  5396  			break
  5397  		}
  5398  		c := v_1.AuxInt
  5399  		if x != v_1.Args[0] {
  5400  			break
  5401  		}
  5402  		if !(d == 64-c) {
  5403  			break
  5404  		}
  5405  		v.reset(OpPPC64ROTLconst)
  5406  		v.AuxInt = c
  5407  		v.AddArg(x)
  5408  		return true
  5409  	}
  5410  	// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
  5411  	// cond: d == 32-c
  5412  	// result: (ROTLWconst [c] x)
  5413  	for {
  5414  		_ = v.Args[1]
  5415  		v_0 := v.Args[0]
  5416  		if v_0.Op != OpPPC64SLWconst {
  5417  			break
  5418  		}
  5419  		c := v_0.AuxInt
  5420  		x := v_0.Args[0]
  5421  		v_1 := v.Args[1]
  5422  		if v_1.Op != OpPPC64SRWconst {
  5423  			break
  5424  		}
  5425  		d := v_1.AuxInt
  5426  		if x != v_1.Args[0] {
  5427  			break
  5428  		}
  5429  		if !(d == 32-c) {
  5430  			break
  5431  		}
  5432  		v.reset(OpPPC64ROTLWconst)
  5433  		v.AuxInt = c
  5434  		v.AddArg(x)
  5435  		return true
  5436  	}
  5437  	// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
  5438  	// cond: d == 32-c
  5439  	// result: (ROTLWconst [c] x)
  5440  	for {
  5441  		_ = v.Args[1]
  5442  		v_0 := v.Args[0]
  5443  		if v_0.Op != OpPPC64SRWconst {
  5444  			break
  5445  		}
  5446  		d := v_0.AuxInt
  5447  		x := v_0.Args[0]
  5448  		v_1 := v.Args[1]
  5449  		if v_1.Op != OpPPC64SLWconst {
  5450  			break
  5451  		}
  5452  		c := v_1.AuxInt
  5453  		if x != v_1.Args[0] {
  5454  			break
  5455  		}
  5456  		if !(d == 32-c) {
  5457  			break
  5458  		}
  5459  		v.reset(OpPPC64ROTLWconst)
  5460  		v.AuxInt = c
  5461  		v.AddArg(x)
  5462  		return true
  5463  	}
  5464  	// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  5465  	// cond:
  5466  	// result: (ROTL x y)
  5467  	for {
  5468  		_ = v.Args[1]
  5469  		v_0 := v.Args[0]
  5470  		if v_0.Op != OpPPC64SLD {
  5471  			break
  5472  		}
  5473  		_ = v_0.Args[1]
  5474  		x := v_0.Args[0]
  5475  		v_0_1 := v_0.Args[1]
  5476  		if v_0_1.Op != OpPPC64ANDconst {
  5477  			break
  5478  		}
  5479  		if v_0_1.Type != typ.Int64 {
  5480  			break
  5481  		}
  5482  		if v_0_1.AuxInt != 63 {
  5483  			break
  5484  		}
  5485  		y := v_0_1.Args[0]
  5486  		v_1 := v.Args[1]
  5487  		if v_1.Op != OpPPC64SRD {
  5488  			break
  5489  		}
  5490  		_ = v_1.Args[1]
  5491  		if x != v_1.Args[0] {
  5492  			break
  5493  		}
  5494  		v_1_1 := v_1.Args[1]
  5495  		if v_1_1.Op != OpPPC64SUB {
  5496  			break
  5497  		}
  5498  		if v_1_1.Type != typ.UInt {
  5499  			break
  5500  		}
  5501  		_ = v_1_1.Args[1]
  5502  		v_1_1_0 := v_1_1.Args[0]
  5503  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5504  			break
  5505  		}
  5506  		if v_1_1_0.AuxInt != 64 {
  5507  			break
  5508  		}
  5509  		v_1_1_1 := v_1_1.Args[1]
  5510  		if v_1_1_1.Op != OpPPC64ANDconst {
  5511  			break
  5512  		}
  5513  		if v_1_1_1.Type != typ.UInt {
  5514  			break
  5515  		}
  5516  		if v_1_1_1.AuxInt != 63 {
  5517  			break
  5518  		}
  5519  		if y != v_1_1_1.Args[0] {
  5520  			break
  5521  		}
  5522  		v.reset(OpPPC64ROTL)
  5523  		v.AddArg(x)
  5524  		v.AddArg(y)
  5525  		return true
  5526  	}
  5527  	// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  5528  	// cond:
  5529  	// result: (ROTL x y)
  5530  	for {
  5531  		_ = v.Args[1]
  5532  		v_0 := v.Args[0]
  5533  		if v_0.Op != OpPPC64SRD {
  5534  			break
  5535  		}
  5536  		_ = v_0.Args[1]
  5537  		x := v_0.Args[0]
  5538  		v_0_1 := v_0.Args[1]
  5539  		if v_0_1.Op != OpPPC64SUB {
  5540  			break
  5541  		}
  5542  		if v_0_1.Type != typ.UInt {
  5543  			break
  5544  		}
  5545  		_ = v_0_1.Args[1]
  5546  		v_0_1_0 := v_0_1.Args[0]
  5547  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5548  			break
  5549  		}
  5550  		if v_0_1_0.AuxInt != 64 {
  5551  			break
  5552  		}
  5553  		v_0_1_1 := v_0_1.Args[1]
  5554  		if v_0_1_1.Op != OpPPC64ANDconst {
  5555  			break
  5556  		}
  5557  		if v_0_1_1.Type != typ.UInt {
  5558  			break
  5559  		}
  5560  		if v_0_1_1.AuxInt != 63 {
  5561  			break
  5562  		}
  5563  		y := v_0_1_1.Args[0]
  5564  		v_1 := v.Args[1]
  5565  		if v_1.Op != OpPPC64SLD {
  5566  			break
  5567  		}
  5568  		_ = v_1.Args[1]
  5569  		if x != v_1.Args[0] {
  5570  			break
  5571  		}
  5572  		v_1_1 := v_1.Args[1]
  5573  		if v_1_1.Op != OpPPC64ANDconst {
  5574  			break
  5575  		}
  5576  		if v_1_1.Type != typ.Int64 {
  5577  			break
  5578  		}
  5579  		if v_1_1.AuxInt != 63 {
  5580  			break
  5581  		}
  5582  		if y != v_1_1.Args[0] {
  5583  			break
  5584  		}
  5585  		v.reset(OpPPC64ROTL)
  5586  		v.AddArg(x)
  5587  		v.AddArg(y)
  5588  		return true
  5589  	}
  5590  	// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  5591  	// cond:
  5592  	// result: (ROTLW x y)
  5593  	for {
  5594  		_ = v.Args[1]
  5595  		v_0 := v.Args[0]
  5596  		if v_0.Op != OpPPC64SLW {
  5597  			break
  5598  		}
  5599  		_ = v_0.Args[1]
  5600  		x := v_0.Args[0]
  5601  		v_0_1 := v_0.Args[1]
  5602  		if v_0_1.Op != OpPPC64ANDconst {
  5603  			break
  5604  		}
  5605  		if v_0_1.Type != typ.Int32 {
  5606  			break
  5607  		}
  5608  		if v_0_1.AuxInt != 31 {
  5609  			break
  5610  		}
  5611  		y := v_0_1.Args[0]
  5612  		v_1 := v.Args[1]
  5613  		if v_1.Op != OpPPC64SRW {
  5614  			break
  5615  		}
  5616  		_ = v_1.Args[1]
  5617  		if x != v_1.Args[0] {
  5618  			break
  5619  		}
  5620  		v_1_1 := v_1.Args[1]
  5621  		if v_1_1.Op != OpPPC64SUB {
  5622  			break
  5623  		}
  5624  		if v_1_1.Type != typ.UInt {
  5625  			break
  5626  		}
  5627  		_ = v_1_1.Args[1]
  5628  		v_1_1_0 := v_1_1.Args[0]
  5629  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5630  			break
  5631  		}
  5632  		if v_1_1_0.AuxInt != 32 {
  5633  			break
  5634  		}
  5635  		v_1_1_1 := v_1_1.Args[1]
  5636  		if v_1_1_1.Op != OpPPC64ANDconst {
  5637  			break
  5638  		}
  5639  		if v_1_1_1.Type != typ.UInt {
  5640  			break
  5641  		}
  5642  		if v_1_1_1.AuxInt != 31 {
  5643  			break
  5644  		}
  5645  		if y != v_1_1_1.Args[0] {
  5646  			break
  5647  		}
  5648  		v.reset(OpPPC64ROTLW)
  5649  		v.AddArg(x)
  5650  		v.AddArg(y)
  5651  		return true
  5652  	}
  5653  	// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  5654  	// cond:
  5655  	// result: (ROTLW x y)
  5656  	for {
  5657  		_ = v.Args[1]
  5658  		v_0 := v.Args[0]
  5659  		if v_0.Op != OpPPC64SRW {
  5660  			break
  5661  		}
  5662  		_ = v_0.Args[1]
  5663  		x := v_0.Args[0]
  5664  		v_0_1 := v_0.Args[1]
  5665  		if v_0_1.Op != OpPPC64SUB {
  5666  			break
  5667  		}
  5668  		if v_0_1.Type != typ.UInt {
  5669  			break
  5670  		}
  5671  		_ = v_0_1.Args[1]
  5672  		v_0_1_0 := v_0_1.Args[0]
  5673  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5674  			break
  5675  		}
  5676  		if v_0_1_0.AuxInt != 32 {
  5677  			break
  5678  		}
  5679  		v_0_1_1 := v_0_1.Args[1]
  5680  		if v_0_1_1.Op != OpPPC64ANDconst {
  5681  			break
  5682  		}
  5683  		if v_0_1_1.Type != typ.UInt {
  5684  			break
  5685  		}
  5686  		if v_0_1_1.AuxInt != 31 {
  5687  			break
  5688  		}
  5689  		y := v_0_1_1.Args[0]
  5690  		v_1 := v.Args[1]
  5691  		if v_1.Op != OpPPC64SLW {
  5692  			break
  5693  		}
  5694  		_ = v_1.Args[1]
  5695  		if x != v_1.Args[0] {
  5696  			break
  5697  		}
  5698  		v_1_1 := v_1.Args[1]
  5699  		if v_1_1.Op != OpPPC64ANDconst {
  5700  			break
  5701  		}
  5702  		if v_1_1.Type != typ.Int32 {
  5703  			break
  5704  		}
  5705  		if v_1_1.AuxInt != 31 {
  5706  			break
  5707  		}
  5708  		if y != v_1_1.Args[0] {
  5709  			break
  5710  		}
  5711  		v.reset(OpPPC64ROTLW)
  5712  		v.AddArg(x)
  5713  		v.AddArg(y)
  5714  		return true
  5715  	}
  5716  	// match: (ADD x (MOVDconst [c]))
  5717  	// cond: is32Bit(c)
  5718  	// result: (ADDconst [c] x)
  5719  	for {
  5720  		_ = v.Args[1]
  5721  		x := v.Args[0]
  5722  		v_1 := v.Args[1]
  5723  		if v_1.Op != OpPPC64MOVDconst {
  5724  			break
  5725  		}
  5726  		c := v_1.AuxInt
  5727  		if !(is32Bit(c)) {
  5728  			break
  5729  		}
  5730  		v.reset(OpPPC64ADDconst)
  5731  		v.AuxInt = c
  5732  		v.AddArg(x)
  5733  		return true
  5734  	}
  5735  	// match: (ADD (MOVDconst [c]) x)
  5736  	// cond: is32Bit(c)
  5737  	// result: (ADDconst [c] x)
  5738  	for {
  5739  		_ = v.Args[1]
  5740  		v_0 := v.Args[0]
  5741  		if v_0.Op != OpPPC64MOVDconst {
  5742  			break
  5743  		}
  5744  		c := v_0.AuxInt
  5745  		x := v.Args[1]
  5746  		if !(is32Bit(c)) {
  5747  			break
  5748  		}
  5749  		v.reset(OpPPC64ADDconst)
  5750  		v.AuxInt = c
  5751  		v.AddArg(x)
  5752  		return true
  5753  	}
  5754  	return false
  5755  }
  5756  func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
  5757  	// match: (ADDconst [c] (ADDconst [d] x))
  5758  	// cond: is32Bit(c+d)
  5759  	// result: (ADDconst [c+d] x)
  5760  	for {
  5761  		c := v.AuxInt
  5762  		v_0 := v.Args[0]
  5763  		if v_0.Op != OpPPC64ADDconst {
  5764  			break
  5765  		}
  5766  		d := v_0.AuxInt
  5767  		x := v_0.Args[0]
  5768  		if !(is32Bit(c + d)) {
  5769  			break
  5770  		}
  5771  		v.reset(OpPPC64ADDconst)
  5772  		v.AuxInt = c + d
  5773  		v.AddArg(x)
  5774  		return true
  5775  	}
  5776  	// match: (ADDconst [0] x)
  5777  	// cond:
  5778  	// result: x
  5779  	for {
  5780  		if v.AuxInt != 0 {
  5781  			break
  5782  		}
  5783  		x := v.Args[0]
  5784  		v.reset(OpCopy)
  5785  		v.Type = x.Type
  5786  		v.AddArg(x)
  5787  		return true
  5788  	}
  5789  	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
  5790  	// cond:
  5791  	// result: (MOVDaddr [c+d] {sym} x)
  5792  	for {
  5793  		c := v.AuxInt
  5794  		v_0 := v.Args[0]
  5795  		if v_0.Op != OpPPC64MOVDaddr {
  5796  			break
  5797  		}
  5798  		d := v_0.AuxInt
  5799  		sym := v_0.Aux
  5800  		x := v_0.Args[0]
  5801  		v.reset(OpPPC64MOVDaddr)
  5802  		v.AuxInt = c + d
  5803  		v.Aux = sym
  5804  		v.AddArg(x)
  5805  		return true
  5806  	}
  5807  	return false
  5808  }
  5809  func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
  5810  	// match: (AND x (NOR y y))
  5811  	// cond:
  5812  	// result: (ANDN x y)
  5813  	for {
  5814  		_ = v.Args[1]
  5815  		x := v.Args[0]
  5816  		v_1 := v.Args[1]
  5817  		if v_1.Op != OpPPC64NOR {
  5818  			break
  5819  		}
  5820  		_ = v_1.Args[1]
  5821  		y := v_1.Args[0]
  5822  		if y != v_1.Args[1] {
  5823  			break
  5824  		}
  5825  		v.reset(OpPPC64ANDN)
  5826  		v.AddArg(x)
  5827  		v.AddArg(y)
  5828  		return true
  5829  	}
  5830  	// match: (AND (NOR y y) x)
  5831  	// cond:
  5832  	// result: (ANDN x y)
  5833  	for {
  5834  		_ = v.Args[1]
  5835  		v_0 := v.Args[0]
  5836  		if v_0.Op != OpPPC64NOR {
  5837  			break
  5838  		}
  5839  		_ = v_0.Args[1]
  5840  		y := v_0.Args[0]
  5841  		if y != v_0.Args[1] {
  5842  			break
  5843  		}
  5844  		x := v.Args[1]
  5845  		v.reset(OpPPC64ANDN)
  5846  		v.AddArg(x)
  5847  		v.AddArg(y)
  5848  		return true
  5849  	}
  5850  	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
  5851  	// cond:
  5852  	// result: (MOVDconst [c&d])
  5853  	for {
  5854  		_ = v.Args[1]
  5855  		v_0 := v.Args[0]
  5856  		if v_0.Op != OpPPC64MOVDconst {
  5857  			break
  5858  		}
  5859  		c := v_0.AuxInt
  5860  		v_1 := v.Args[1]
  5861  		if v_1.Op != OpPPC64MOVDconst {
  5862  			break
  5863  		}
  5864  		d := v_1.AuxInt
  5865  		v.reset(OpPPC64MOVDconst)
  5866  		v.AuxInt = c & d
  5867  		return true
  5868  	}
  5869  	// match: (AND (MOVDconst [d]) (MOVDconst [c]))
  5870  	// cond:
  5871  	// result: (MOVDconst [c&d])
  5872  	for {
  5873  		_ = v.Args[1]
  5874  		v_0 := v.Args[0]
  5875  		if v_0.Op != OpPPC64MOVDconst {
  5876  			break
  5877  		}
  5878  		d := v_0.AuxInt
  5879  		v_1 := v.Args[1]
  5880  		if v_1.Op != OpPPC64MOVDconst {
  5881  			break
  5882  		}
  5883  		c := v_1.AuxInt
  5884  		v.reset(OpPPC64MOVDconst)
  5885  		v.AuxInt = c & d
  5886  		return true
  5887  	}
  5888  	// match: (AND x (MOVDconst [c]))
  5889  	// cond: isU16Bit(c)
  5890  	// result: (ANDconst [c] x)
  5891  	for {
  5892  		_ = v.Args[1]
  5893  		x := v.Args[0]
  5894  		v_1 := v.Args[1]
  5895  		if v_1.Op != OpPPC64MOVDconst {
  5896  			break
  5897  		}
  5898  		c := v_1.AuxInt
  5899  		if !(isU16Bit(c)) {
  5900  			break
  5901  		}
  5902  		v.reset(OpPPC64ANDconst)
  5903  		v.AuxInt = c
  5904  		v.AddArg(x)
  5905  		return true
  5906  	}
  5907  	// match: (AND (MOVDconst [c]) x)
  5908  	// cond: isU16Bit(c)
  5909  	// result: (ANDconst [c] x)
  5910  	for {
  5911  		_ = v.Args[1]
  5912  		v_0 := v.Args[0]
  5913  		if v_0.Op != OpPPC64MOVDconst {
  5914  			break
  5915  		}
  5916  		c := v_0.AuxInt
  5917  		x := v.Args[1]
  5918  		if !(isU16Bit(c)) {
  5919  			break
  5920  		}
  5921  		v.reset(OpPPC64ANDconst)
  5922  		v.AuxInt = c
  5923  		v.AddArg(x)
  5924  		return true
  5925  	}
  5926  	// match: (AND (MOVDconst [c]) y:(MOVWZreg _))
  5927  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5928  	// result: y
  5929  	for {
  5930  		_ = v.Args[1]
  5931  		v_0 := v.Args[0]
  5932  		if v_0.Op != OpPPC64MOVDconst {
  5933  			break
  5934  		}
  5935  		c := v_0.AuxInt
  5936  		y := v.Args[1]
  5937  		if y.Op != OpPPC64MOVWZreg {
  5938  			break
  5939  		}
  5940  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5941  			break
  5942  		}
  5943  		v.reset(OpCopy)
  5944  		v.Type = y.Type
  5945  		v.AddArg(y)
  5946  		return true
  5947  	}
  5948  	// match: (AND y:(MOVWZreg _) (MOVDconst [c]))
  5949  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5950  	// result: y
  5951  	for {
  5952  		_ = v.Args[1]
  5953  		y := v.Args[0]
  5954  		if y.Op != OpPPC64MOVWZreg {
  5955  			break
  5956  		}
  5957  		v_1 := v.Args[1]
  5958  		if v_1.Op != OpPPC64MOVDconst {
  5959  			break
  5960  		}
  5961  		c := v_1.AuxInt
  5962  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5963  			break
  5964  		}
  5965  		v.reset(OpCopy)
  5966  		v.Type = y.Type
  5967  		v.AddArg(y)
  5968  		return true
  5969  	}
  5970  	// match: (AND (MOVDconst [0xFFFFFFFF]) y:(MOVWreg x))
  5971  	// cond:
  5972  	// result: (MOVWZreg x)
  5973  	for {
  5974  		_ = v.Args[1]
  5975  		v_0 := v.Args[0]
  5976  		if v_0.Op != OpPPC64MOVDconst {
  5977  			break
  5978  		}
  5979  		if v_0.AuxInt != 0xFFFFFFFF {
  5980  			break
  5981  		}
  5982  		y := v.Args[1]
  5983  		if y.Op != OpPPC64MOVWreg {
  5984  			break
  5985  		}
  5986  		x := y.Args[0]
  5987  		v.reset(OpPPC64MOVWZreg)
  5988  		v.AddArg(x)
  5989  		return true
  5990  	}
  5991  	// match: (AND y:(MOVWreg x) (MOVDconst [0xFFFFFFFF]))
  5992  	// cond:
  5993  	// result: (MOVWZreg x)
  5994  	for {
  5995  		_ = v.Args[1]
  5996  		y := v.Args[0]
  5997  		if y.Op != OpPPC64MOVWreg {
  5998  			break
  5999  		}
  6000  		x := y.Args[0]
  6001  		v_1 := v.Args[1]
  6002  		if v_1.Op != OpPPC64MOVDconst {
  6003  			break
  6004  		}
  6005  		if v_1.AuxInt != 0xFFFFFFFF {
  6006  			break
  6007  		}
  6008  		v.reset(OpPPC64MOVWZreg)
  6009  		v.AddArg(x)
  6010  		return true
  6011  	}
  6012  	return false
  6013  }
  6014  func rewriteValuePPC64_OpPPC64AND_10(v *Value) bool {
  6015  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  6016  	// cond:
  6017  	// result: (ANDconst [c&0xFF] x)
  6018  	for {
  6019  		_ = v.Args[1]
  6020  		v_0 := v.Args[0]
  6021  		if v_0.Op != OpPPC64MOVDconst {
  6022  			break
  6023  		}
  6024  		c := v_0.AuxInt
  6025  		x := v.Args[1]
  6026  		if x.Op != OpPPC64MOVBZload {
  6027  			break
  6028  		}
  6029  		_ = x.Args[1]
  6030  		v.reset(OpPPC64ANDconst)
  6031  		v.AuxInt = c & 0xFF
  6032  		v.AddArg(x)
  6033  		return true
  6034  	}
  6035  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  6036  	// cond:
  6037  	// result: (ANDconst [c&0xFF] x)
  6038  	for {
  6039  		_ = v.Args[1]
  6040  		x := v.Args[0]
  6041  		if x.Op != OpPPC64MOVBZload {
  6042  			break
  6043  		}
  6044  		_ = x.Args[1]
  6045  		v_1 := v.Args[1]
  6046  		if v_1.Op != OpPPC64MOVDconst {
  6047  			break
  6048  		}
  6049  		c := v_1.AuxInt
  6050  		v.reset(OpPPC64ANDconst)
  6051  		v.AuxInt = c & 0xFF
  6052  		v.AddArg(x)
  6053  		return true
  6054  	}
  6055  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  6056  	// cond:
  6057  	// result: (ANDconst [c&0xFF] x)
  6058  	for {
  6059  		_ = v.Args[1]
  6060  		x := v.Args[0]
  6061  		if x.Op != OpPPC64MOVBZload {
  6062  			break
  6063  		}
  6064  		_ = x.Args[1]
  6065  		v_1 := v.Args[1]
  6066  		if v_1.Op != OpPPC64MOVDconst {
  6067  			break
  6068  		}
  6069  		c := v_1.AuxInt
  6070  		v.reset(OpPPC64ANDconst)
  6071  		v.AuxInt = c & 0xFF
  6072  		v.AddArg(x)
  6073  		return true
  6074  	}
  6075  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  6076  	// cond:
  6077  	// result: (ANDconst [c&0xFF] x)
  6078  	for {
  6079  		_ = v.Args[1]
  6080  		v_0 := v.Args[0]
  6081  		if v_0.Op != OpPPC64MOVDconst {
  6082  			break
  6083  		}
  6084  		c := v_0.AuxInt
  6085  		x := v.Args[1]
  6086  		if x.Op != OpPPC64MOVBZload {
  6087  			break
  6088  		}
  6089  		_ = x.Args[1]
  6090  		v.reset(OpPPC64ANDconst)
  6091  		v.AuxInt = c & 0xFF
  6092  		v.AddArg(x)
  6093  		return true
  6094  	}
  6095  	return false
  6096  }
  6097  func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
  6098  	// match: (ANDconst [c] (ANDconst [d] x))
  6099  	// cond:
  6100  	// result: (ANDconst [c&d] x)
  6101  	for {
  6102  		c := v.AuxInt
  6103  		v_0 := v.Args[0]
  6104  		if v_0.Op != OpPPC64ANDconst {
  6105  			break
  6106  		}
  6107  		d := v_0.AuxInt
  6108  		x := v_0.Args[0]
  6109  		v.reset(OpPPC64ANDconst)
  6110  		v.AuxInt = c & d
  6111  		v.AddArg(x)
  6112  		return true
  6113  	}
  6114  	// match: (ANDconst [-1] x)
  6115  	// cond:
  6116  	// result: x
  6117  	for {
  6118  		if v.AuxInt != -1 {
  6119  			break
  6120  		}
  6121  		x := v.Args[0]
  6122  		v.reset(OpCopy)
  6123  		v.Type = x.Type
  6124  		v.AddArg(x)
  6125  		return true
  6126  	}
  6127  	// match: (ANDconst [0] _)
  6128  	// cond:
  6129  	// result: (MOVDconst [0])
  6130  	for {
  6131  		if v.AuxInt != 0 {
  6132  			break
  6133  		}
  6134  		v.reset(OpPPC64MOVDconst)
  6135  		v.AuxInt = 0
  6136  		return true
  6137  	}
  6138  	// match: (ANDconst [c] y:(MOVBZreg _))
  6139  	// cond: c&0xFF == 0xFF
  6140  	// result: y
  6141  	for {
  6142  		c := v.AuxInt
  6143  		y := v.Args[0]
  6144  		if y.Op != OpPPC64MOVBZreg {
  6145  			break
  6146  		}
  6147  		if !(c&0xFF == 0xFF) {
  6148  			break
  6149  		}
  6150  		v.reset(OpCopy)
  6151  		v.Type = y.Type
  6152  		v.AddArg(y)
  6153  		return true
  6154  	}
  6155  	// match: (ANDconst [0xFF] y:(MOVBreg _))
  6156  	// cond:
  6157  	// result: y
  6158  	for {
  6159  		if v.AuxInt != 0xFF {
  6160  			break
  6161  		}
  6162  		y := v.Args[0]
  6163  		if y.Op != OpPPC64MOVBreg {
  6164  			break
  6165  		}
  6166  		v.reset(OpCopy)
  6167  		v.Type = y.Type
  6168  		v.AddArg(y)
  6169  		return true
  6170  	}
  6171  	// match: (ANDconst [c] y:(MOVHZreg _))
  6172  	// cond: c&0xFFFF == 0xFFFF
  6173  	// result: y
  6174  	for {
  6175  		c := v.AuxInt
  6176  		y := v.Args[0]
  6177  		if y.Op != OpPPC64MOVHZreg {
  6178  			break
  6179  		}
  6180  		if !(c&0xFFFF == 0xFFFF) {
  6181  			break
  6182  		}
  6183  		v.reset(OpCopy)
  6184  		v.Type = y.Type
  6185  		v.AddArg(y)
  6186  		return true
  6187  	}
  6188  	// match: (ANDconst [0xFFFF] y:(MOVHreg _))
  6189  	// cond:
  6190  	// result: y
  6191  	for {
  6192  		if v.AuxInt != 0xFFFF {
  6193  			break
  6194  		}
  6195  		y := v.Args[0]
  6196  		if y.Op != OpPPC64MOVHreg {
  6197  			break
  6198  		}
  6199  		v.reset(OpCopy)
  6200  		v.Type = y.Type
  6201  		v.AddArg(y)
  6202  		return true
  6203  	}
  6204  	// match: (ANDconst [c] (MOVBreg x))
  6205  	// cond:
  6206  	// result: (ANDconst [c&0xFF] x)
  6207  	for {
  6208  		c := v.AuxInt
  6209  		v_0 := v.Args[0]
  6210  		if v_0.Op != OpPPC64MOVBreg {
  6211  			break
  6212  		}
  6213  		x := v_0.Args[0]
  6214  		v.reset(OpPPC64ANDconst)
  6215  		v.AuxInt = c & 0xFF
  6216  		v.AddArg(x)
  6217  		return true
  6218  	}
  6219  	// match: (ANDconst [c] (MOVBZreg x))
  6220  	// cond:
  6221  	// result: (ANDconst [c&0xFF] x)
  6222  	for {
  6223  		c := v.AuxInt
  6224  		v_0 := v.Args[0]
  6225  		if v_0.Op != OpPPC64MOVBZreg {
  6226  			break
  6227  		}
  6228  		x := v_0.Args[0]
  6229  		v.reset(OpPPC64ANDconst)
  6230  		v.AuxInt = c & 0xFF
  6231  		v.AddArg(x)
  6232  		return true
  6233  	}
  6234  	// match: (ANDconst [c] (MOVHreg x))
  6235  	// cond:
  6236  	// result: (ANDconst [c&0xFFFF] x)
  6237  	for {
  6238  		c := v.AuxInt
  6239  		v_0 := v.Args[0]
  6240  		if v_0.Op != OpPPC64MOVHreg {
  6241  			break
  6242  		}
  6243  		x := v_0.Args[0]
  6244  		v.reset(OpPPC64ANDconst)
  6245  		v.AuxInt = c & 0xFFFF
  6246  		v.AddArg(x)
  6247  		return true
  6248  	}
  6249  	return false
  6250  }
  6251  func rewriteValuePPC64_OpPPC64ANDconst_10(v *Value) bool {
  6252  	// match: (ANDconst [c] (MOVHZreg x))
  6253  	// cond:
  6254  	// result: (ANDconst [c&0xFFFF] x)
  6255  	for {
  6256  		c := v.AuxInt
  6257  		v_0 := v.Args[0]
  6258  		if v_0.Op != OpPPC64MOVHZreg {
  6259  			break
  6260  		}
  6261  		x := v_0.Args[0]
  6262  		v.reset(OpPPC64ANDconst)
  6263  		v.AuxInt = c & 0xFFFF
  6264  		v.AddArg(x)
  6265  		return true
  6266  	}
  6267  	// match: (ANDconst [c] (MOVWreg x))
  6268  	// cond:
  6269  	// result: (ANDconst [c&0xFFFFFFFF] x)
  6270  	for {
  6271  		c := v.AuxInt
  6272  		v_0 := v.Args[0]
  6273  		if v_0.Op != OpPPC64MOVWreg {
  6274  			break
  6275  		}
  6276  		x := v_0.Args[0]
  6277  		v.reset(OpPPC64ANDconst)
  6278  		v.AuxInt = c & 0xFFFFFFFF
  6279  		v.AddArg(x)
  6280  		return true
  6281  	}
  6282  	// match: (ANDconst [c] (MOVWZreg x))
  6283  	// cond:
  6284  	// result: (ANDconst [c&0xFFFFFFFF] x)
  6285  	for {
  6286  		c := v.AuxInt
  6287  		v_0 := v.Args[0]
  6288  		if v_0.Op != OpPPC64MOVWZreg {
  6289  			break
  6290  		}
  6291  		x := v_0.Args[0]
  6292  		v.reset(OpPPC64ANDconst)
  6293  		v.AuxInt = c & 0xFFFFFFFF
  6294  		v.AddArg(x)
  6295  		return true
  6296  	}
  6297  	return false
  6298  }
  6299  func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
  6300  	b := v.Block
  6301  	_ = b
  6302  	// match: (CMP x (MOVDconst [c]))
  6303  	// cond: is16Bit(c)
  6304  	// result: (CMPconst x [c])
  6305  	for {
  6306  		_ = v.Args[1]
  6307  		x := v.Args[0]
  6308  		v_1 := v.Args[1]
  6309  		if v_1.Op != OpPPC64MOVDconst {
  6310  			break
  6311  		}
  6312  		c := v_1.AuxInt
  6313  		if !(is16Bit(c)) {
  6314  			break
  6315  		}
  6316  		v.reset(OpPPC64CMPconst)
  6317  		v.AuxInt = c
  6318  		v.AddArg(x)
  6319  		return true
  6320  	}
  6321  	// match: (CMP (MOVDconst [c]) y)
  6322  	// cond: is16Bit(c)
  6323  	// result: (InvertFlags (CMPconst y [c]))
  6324  	for {
  6325  		_ = v.Args[1]
  6326  		v_0 := v.Args[0]
  6327  		if v_0.Op != OpPPC64MOVDconst {
  6328  			break
  6329  		}
  6330  		c := v_0.AuxInt
  6331  		y := v.Args[1]
  6332  		if !(is16Bit(c)) {
  6333  			break
  6334  		}
  6335  		v.reset(OpPPC64InvertFlags)
  6336  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  6337  		v0.AuxInt = c
  6338  		v0.AddArg(y)
  6339  		v.AddArg(v0)
  6340  		return true
  6341  	}
  6342  	return false
  6343  }
  6344  func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
  6345  	b := v.Block
  6346  	_ = b
  6347  	// match: (CMPU x (MOVDconst [c]))
  6348  	// cond: isU16Bit(c)
  6349  	// result: (CMPUconst x [c])
  6350  	for {
  6351  		_ = v.Args[1]
  6352  		x := v.Args[0]
  6353  		v_1 := v.Args[1]
  6354  		if v_1.Op != OpPPC64MOVDconst {
  6355  			break
  6356  		}
  6357  		c := v_1.AuxInt
  6358  		if !(isU16Bit(c)) {
  6359  			break
  6360  		}
  6361  		v.reset(OpPPC64CMPUconst)
  6362  		v.AuxInt = c
  6363  		v.AddArg(x)
  6364  		return true
  6365  	}
  6366  	// match: (CMPU (MOVDconst [c]) y)
  6367  	// cond: isU16Bit(c)
  6368  	// result: (InvertFlags (CMPUconst y [c]))
  6369  	for {
  6370  		_ = v.Args[1]
  6371  		v_0 := v.Args[0]
  6372  		if v_0.Op != OpPPC64MOVDconst {
  6373  			break
  6374  		}
  6375  		c := v_0.AuxInt
  6376  		y := v.Args[1]
  6377  		if !(isU16Bit(c)) {
  6378  			break
  6379  		}
  6380  		v.reset(OpPPC64InvertFlags)
  6381  		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
  6382  		v0.AuxInt = c
  6383  		v0.AddArg(y)
  6384  		v.AddArg(v0)
  6385  		return true
  6386  	}
  6387  	return false
  6388  }
  6389  func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
  6390  	// match: (CMPUconst (MOVDconst [x]) [y])
  6391  	// cond: x==y
  6392  	// result: (FlagEQ)
  6393  	for {
  6394  		y := v.AuxInt
  6395  		v_0 := v.Args[0]
  6396  		if v_0.Op != OpPPC64MOVDconst {
  6397  			break
  6398  		}
  6399  		x := v_0.AuxInt
  6400  		if !(x == y) {
  6401  			break
  6402  		}
  6403  		v.reset(OpPPC64FlagEQ)
  6404  		return true
  6405  	}
  6406  	// match: (CMPUconst (MOVDconst [x]) [y])
  6407  	// cond: uint64(x)<uint64(y)
  6408  	// result: (FlagLT)
  6409  	for {
  6410  		y := v.AuxInt
  6411  		v_0 := v.Args[0]
  6412  		if v_0.Op != OpPPC64MOVDconst {
  6413  			break
  6414  		}
  6415  		x := v_0.AuxInt
  6416  		if !(uint64(x) < uint64(y)) {
  6417  			break
  6418  		}
  6419  		v.reset(OpPPC64FlagLT)
  6420  		return true
  6421  	}
  6422  	// match: (CMPUconst (MOVDconst [x]) [y])
  6423  	// cond: uint64(x)>uint64(y)
  6424  	// result: (FlagGT)
  6425  	for {
  6426  		y := v.AuxInt
  6427  		v_0 := v.Args[0]
  6428  		if v_0.Op != OpPPC64MOVDconst {
  6429  			break
  6430  		}
  6431  		x := v_0.AuxInt
  6432  		if !(uint64(x) > uint64(y)) {
  6433  			break
  6434  		}
  6435  		v.reset(OpPPC64FlagGT)
  6436  		return true
  6437  	}
  6438  	return false
  6439  }
  6440  func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
  6441  	b := v.Block
  6442  	_ = b
  6443  	// match: (CMPW x (MOVWreg y))
  6444  	// cond:
  6445  	// result: (CMPW x y)
  6446  	for {
  6447  		_ = v.Args[1]
  6448  		x := v.Args[0]
  6449  		v_1 := v.Args[1]
  6450  		if v_1.Op != OpPPC64MOVWreg {
  6451  			break
  6452  		}
  6453  		y := v_1.Args[0]
  6454  		v.reset(OpPPC64CMPW)
  6455  		v.AddArg(x)
  6456  		v.AddArg(y)
  6457  		return true
  6458  	}
  6459  	// match: (CMPW (MOVWreg x) y)
  6460  	// cond:
  6461  	// result: (CMPW x y)
  6462  	for {
  6463  		_ = v.Args[1]
  6464  		v_0 := v.Args[0]
  6465  		if v_0.Op != OpPPC64MOVWreg {
  6466  			break
  6467  		}
  6468  		x := v_0.Args[0]
  6469  		y := v.Args[1]
  6470  		v.reset(OpPPC64CMPW)
  6471  		v.AddArg(x)
  6472  		v.AddArg(y)
  6473  		return true
  6474  	}
  6475  	// match: (CMPW x (MOVDconst [c]))
  6476  	// cond: is16Bit(c)
  6477  	// result: (CMPWconst x [c])
  6478  	for {
  6479  		_ = v.Args[1]
  6480  		x := v.Args[0]
  6481  		v_1 := v.Args[1]
  6482  		if v_1.Op != OpPPC64MOVDconst {
  6483  			break
  6484  		}
  6485  		c := v_1.AuxInt
  6486  		if !(is16Bit(c)) {
  6487  			break
  6488  		}
  6489  		v.reset(OpPPC64CMPWconst)
  6490  		v.AuxInt = c
  6491  		v.AddArg(x)
  6492  		return true
  6493  	}
  6494  	// match: (CMPW (MOVDconst [c]) y)
  6495  	// cond: is16Bit(c)
  6496  	// result: (InvertFlags (CMPWconst y [c]))
  6497  	for {
  6498  		_ = v.Args[1]
  6499  		v_0 := v.Args[0]
  6500  		if v_0.Op != OpPPC64MOVDconst {
  6501  			break
  6502  		}
  6503  		c := v_0.AuxInt
  6504  		y := v.Args[1]
  6505  		if !(is16Bit(c)) {
  6506  			break
  6507  		}
  6508  		v.reset(OpPPC64InvertFlags)
  6509  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
  6510  		v0.AuxInt = c
  6511  		v0.AddArg(y)
  6512  		v.AddArg(v0)
  6513  		return true
  6514  	}
  6515  	return false
  6516  }
  6517  func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
  6518  	b := v.Block
  6519  	_ = b
  6520  	// match: (CMPWU x (MOVWZreg y))
  6521  	// cond:
  6522  	// result: (CMPWU x y)
  6523  	for {
  6524  		_ = v.Args[1]
  6525  		x := v.Args[0]
  6526  		v_1 := v.Args[1]
  6527  		if v_1.Op != OpPPC64MOVWZreg {
  6528  			break
  6529  		}
  6530  		y := v_1.Args[0]
  6531  		v.reset(OpPPC64CMPWU)
  6532  		v.AddArg(x)
  6533  		v.AddArg(y)
  6534  		return true
  6535  	}
  6536  	// match: (CMPWU (MOVWZreg x) y)
  6537  	// cond:
  6538  	// result: (CMPWU x y)
  6539  	for {
  6540  		_ = v.Args[1]
  6541  		v_0 := v.Args[0]
  6542  		if v_0.Op != OpPPC64MOVWZreg {
  6543  			break
  6544  		}
  6545  		x := v_0.Args[0]
  6546  		y := v.Args[1]
  6547  		v.reset(OpPPC64CMPWU)
  6548  		v.AddArg(x)
  6549  		v.AddArg(y)
  6550  		return true
  6551  	}
  6552  	// match: (CMPWU x (MOVDconst [c]))
  6553  	// cond: isU16Bit(c)
  6554  	// result: (CMPWUconst x [c])
  6555  	for {
  6556  		_ = v.Args[1]
  6557  		x := v.Args[0]
  6558  		v_1 := v.Args[1]
  6559  		if v_1.Op != OpPPC64MOVDconst {
  6560  			break
  6561  		}
  6562  		c := v_1.AuxInt
  6563  		if !(isU16Bit(c)) {
  6564  			break
  6565  		}
  6566  		v.reset(OpPPC64CMPWUconst)
  6567  		v.AuxInt = c
  6568  		v.AddArg(x)
  6569  		return true
  6570  	}
  6571  	// match: (CMPWU (MOVDconst [c]) y)
  6572  	// cond: isU16Bit(c)
  6573  	// result: (InvertFlags (CMPWUconst y [c]))
  6574  	for {
  6575  		_ = v.Args[1]
  6576  		v_0 := v.Args[0]
  6577  		if v_0.Op != OpPPC64MOVDconst {
  6578  			break
  6579  		}
  6580  		c := v_0.AuxInt
  6581  		y := v.Args[1]
  6582  		if !(isU16Bit(c)) {
  6583  			break
  6584  		}
  6585  		v.reset(OpPPC64InvertFlags)
  6586  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
  6587  		v0.AuxInt = c
  6588  		v0.AddArg(y)
  6589  		v.AddArg(v0)
  6590  		return true
  6591  	}
  6592  	return false
  6593  }
  6594  func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
  6595  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6596  	// cond: int32(x)==int32(y)
  6597  	// result: (FlagEQ)
  6598  	for {
  6599  		y := v.AuxInt
  6600  		v_0 := v.Args[0]
  6601  		if v_0.Op != OpPPC64MOVDconst {
  6602  			break
  6603  		}
  6604  		x := v_0.AuxInt
  6605  		if !(int32(x) == int32(y)) {
  6606  			break
  6607  		}
  6608  		v.reset(OpPPC64FlagEQ)
  6609  		return true
  6610  	}
  6611  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6612  	// cond: uint32(x)<uint32(y)
  6613  	// result: (FlagLT)
  6614  	for {
  6615  		y := v.AuxInt
  6616  		v_0 := v.Args[0]
  6617  		if v_0.Op != OpPPC64MOVDconst {
  6618  			break
  6619  		}
  6620  		x := v_0.AuxInt
  6621  		if !(uint32(x) < uint32(y)) {
  6622  			break
  6623  		}
  6624  		v.reset(OpPPC64FlagLT)
  6625  		return true
  6626  	}
  6627  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6628  	// cond: uint32(x)>uint32(y)
  6629  	// result: (FlagGT)
  6630  	for {
  6631  		y := v.AuxInt
  6632  		v_0 := v.Args[0]
  6633  		if v_0.Op != OpPPC64MOVDconst {
  6634  			break
  6635  		}
  6636  		x := v_0.AuxInt
  6637  		if !(uint32(x) > uint32(y)) {
  6638  			break
  6639  		}
  6640  		v.reset(OpPPC64FlagGT)
  6641  		return true
  6642  	}
  6643  	return false
  6644  }
  6645  func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
  6646  	// match: (CMPWconst (MOVDconst [x]) [y])
  6647  	// cond: int32(x)==int32(y)
  6648  	// result: (FlagEQ)
  6649  	for {
  6650  		y := v.AuxInt
  6651  		v_0 := v.Args[0]
  6652  		if v_0.Op != OpPPC64MOVDconst {
  6653  			break
  6654  		}
  6655  		x := v_0.AuxInt
  6656  		if !(int32(x) == int32(y)) {
  6657  			break
  6658  		}
  6659  		v.reset(OpPPC64FlagEQ)
  6660  		return true
  6661  	}
  6662  	// match: (CMPWconst (MOVDconst [x]) [y])
  6663  	// cond: int32(x)<int32(y)
  6664  	// result: (FlagLT)
  6665  	for {
  6666  		y := v.AuxInt
  6667  		v_0 := v.Args[0]
  6668  		if v_0.Op != OpPPC64MOVDconst {
  6669  			break
  6670  		}
  6671  		x := v_0.AuxInt
  6672  		if !(int32(x) < int32(y)) {
  6673  			break
  6674  		}
  6675  		v.reset(OpPPC64FlagLT)
  6676  		return true
  6677  	}
  6678  	// match: (CMPWconst (MOVDconst [x]) [y])
  6679  	// cond: int32(x)>int32(y)
  6680  	// result: (FlagGT)
  6681  	for {
  6682  		y := v.AuxInt
  6683  		v_0 := v.Args[0]
  6684  		if v_0.Op != OpPPC64MOVDconst {
  6685  			break
  6686  		}
  6687  		x := v_0.AuxInt
  6688  		if !(int32(x) > int32(y)) {
  6689  			break
  6690  		}
  6691  		v.reset(OpPPC64FlagGT)
  6692  		return true
  6693  	}
  6694  	return false
  6695  }
  6696  func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
  6697  	// match: (CMPconst (MOVDconst [x]) [y])
  6698  	// cond: x==y
  6699  	// result: (FlagEQ)
  6700  	for {
  6701  		y := v.AuxInt
  6702  		v_0 := v.Args[0]
  6703  		if v_0.Op != OpPPC64MOVDconst {
  6704  			break
  6705  		}
  6706  		x := v_0.AuxInt
  6707  		if !(x == y) {
  6708  			break
  6709  		}
  6710  		v.reset(OpPPC64FlagEQ)
  6711  		return true
  6712  	}
  6713  	// match: (CMPconst (MOVDconst [x]) [y])
  6714  	// cond: x<y
  6715  	// result: (FlagLT)
  6716  	for {
  6717  		y := v.AuxInt
  6718  		v_0 := v.Args[0]
  6719  		if v_0.Op != OpPPC64MOVDconst {
  6720  			break
  6721  		}
  6722  		x := v_0.AuxInt
  6723  		if !(x < y) {
  6724  			break
  6725  		}
  6726  		v.reset(OpPPC64FlagLT)
  6727  		return true
  6728  	}
  6729  	// match: (CMPconst (MOVDconst [x]) [y])
  6730  	// cond: x>y
  6731  	// result: (FlagGT)
  6732  	for {
  6733  		y := v.AuxInt
  6734  		v_0 := v.Args[0]
  6735  		if v_0.Op != OpPPC64MOVDconst {
  6736  			break
  6737  		}
  6738  		x := v_0.AuxInt
  6739  		if !(x > y) {
  6740  			break
  6741  		}
  6742  		v.reset(OpPPC64FlagGT)
  6743  		return true
  6744  	}
  6745  	return false
  6746  }
  6747  func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
  6748  	// match: (Equal (FlagEQ))
  6749  	// cond:
  6750  	// result: (MOVDconst [1])
  6751  	for {
  6752  		v_0 := v.Args[0]
  6753  		if v_0.Op != OpPPC64FlagEQ {
  6754  			break
  6755  		}
  6756  		v.reset(OpPPC64MOVDconst)
  6757  		v.AuxInt = 1
  6758  		return true
  6759  	}
  6760  	// match: (Equal (FlagLT))
  6761  	// cond:
  6762  	// result: (MOVDconst [0])
  6763  	for {
  6764  		v_0 := v.Args[0]
  6765  		if v_0.Op != OpPPC64FlagLT {
  6766  			break
  6767  		}
  6768  		v.reset(OpPPC64MOVDconst)
  6769  		v.AuxInt = 0
  6770  		return true
  6771  	}
  6772  	// match: (Equal (FlagGT))
  6773  	// cond:
  6774  	// result: (MOVDconst [0])
  6775  	for {
  6776  		v_0 := v.Args[0]
  6777  		if v_0.Op != OpPPC64FlagGT {
  6778  			break
  6779  		}
  6780  		v.reset(OpPPC64MOVDconst)
  6781  		v.AuxInt = 0
  6782  		return true
  6783  	}
  6784  	// match: (Equal (InvertFlags x))
  6785  	// cond:
  6786  	// result: (Equal x)
  6787  	for {
  6788  		v_0 := v.Args[0]
  6789  		if v_0.Op != OpPPC64InvertFlags {
  6790  			break
  6791  		}
  6792  		x := v_0.Args[0]
  6793  		v.reset(OpPPC64Equal)
  6794  		v.AddArg(x)
  6795  		return true
  6796  	}
  6797  	return false
  6798  }
  6799  func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
  6800  	// match: (FABS (FMOVDconst [x]))
  6801  	// cond:
  6802  	// result: (FMOVDconst [auxFrom64F(math.Abs(auxTo64F(x)))])
  6803  	for {
  6804  		v_0 := v.Args[0]
  6805  		if v_0.Op != OpPPC64FMOVDconst {
  6806  			break
  6807  		}
  6808  		x := v_0.AuxInt
  6809  		v.reset(OpPPC64FMOVDconst)
  6810  		v.AuxInt = auxFrom64F(math.Abs(auxTo64F(x)))
  6811  		return true
  6812  	}
  6813  	return false
  6814  }
  6815  func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
  6816  	// match: (FADD (FMUL x y) z)
  6817  	// cond:
  6818  	// result: (FMADD x y z)
  6819  	for {
  6820  		_ = v.Args[1]
  6821  		v_0 := v.Args[0]
  6822  		if v_0.Op != OpPPC64FMUL {
  6823  			break
  6824  		}
  6825  		_ = v_0.Args[1]
  6826  		x := v_0.Args[0]
  6827  		y := v_0.Args[1]
  6828  		z := v.Args[1]
  6829  		v.reset(OpPPC64FMADD)
  6830  		v.AddArg(x)
  6831  		v.AddArg(y)
  6832  		v.AddArg(z)
  6833  		return true
  6834  	}
  6835  	// match: (FADD z (FMUL x y))
  6836  	// cond:
  6837  	// result: (FMADD x y z)
  6838  	for {
  6839  		_ = v.Args[1]
  6840  		z := v.Args[0]
  6841  		v_1 := v.Args[1]
  6842  		if v_1.Op != OpPPC64FMUL {
  6843  			break
  6844  		}
  6845  		_ = v_1.Args[1]
  6846  		x := v_1.Args[0]
  6847  		y := v_1.Args[1]
  6848  		v.reset(OpPPC64FMADD)
  6849  		v.AddArg(x)
  6850  		v.AddArg(y)
  6851  		v.AddArg(z)
  6852  		return true
  6853  	}
  6854  	return false
  6855  }
  6856  func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
  6857  	// match: (FADDS (FMULS x y) z)
  6858  	// cond:
  6859  	// result: (FMADDS x y z)
  6860  	for {
  6861  		_ = v.Args[1]
  6862  		v_0 := v.Args[0]
  6863  		if v_0.Op != OpPPC64FMULS {
  6864  			break
  6865  		}
  6866  		_ = v_0.Args[1]
  6867  		x := v_0.Args[0]
  6868  		y := v_0.Args[1]
  6869  		z := v.Args[1]
  6870  		v.reset(OpPPC64FMADDS)
  6871  		v.AddArg(x)
  6872  		v.AddArg(y)
  6873  		v.AddArg(z)
  6874  		return true
  6875  	}
  6876  	// match: (FADDS z (FMULS x y))
  6877  	// cond:
  6878  	// result: (FMADDS x y z)
  6879  	for {
  6880  		_ = v.Args[1]
  6881  		z := v.Args[0]
  6882  		v_1 := v.Args[1]
  6883  		if v_1.Op != OpPPC64FMULS {
  6884  			break
  6885  		}
  6886  		_ = v_1.Args[1]
  6887  		x := v_1.Args[0]
  6888  		y := v_1.Args[1]
  6889  		v.reset(OpPPC64FMADDS)
  6890  		v.AddArg(x)
  6891  		v.AddArg(y)
  6892  		v.AddArg(z)
  6893  		return true
  6894  	}
  6895  	return false
  6896  }
  6897  func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
  6898  	// match: (FCEIL (FMOVDconst [x]))
  6899  	// cond:
  6900  	// result: (FMOVDconst [auxFrom64F(math.Ceil(auxTo64F(x)))])
  6901  	for {
  6902  		v_0 := v.Args[0]
  6903  		if v_0.Op != OpPPC64FMOVDconst {
  6904  			break
  6905  		}
  6906  		x := v_0.AuxInt
  6907  		v.reset(OpPPC64FMOVDconst)
  6908  		v.AuxInt = auxFrom64F(math.Ceil(auxTo64F(x)))
  6909  		return true
  6910  	}
  6911  	return false
  6912  }
  6913  func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
  6914  	// match: (FFLOOR (FMOVDconst [x]))
  6915  	// cond:
  6916  	// result: (FMOVDconst [auxFrom64F(math.Floor(auxTo64F(x)))])
  6917  	for {
  6918  		v_0 := v.Args[0]
  6919  		if v_0.Op != OpPPC64FMOVDconst {
  6920  			break
  6921  		}
  6922  		x := v_0.AuxInt
  6923  		v.reset(OpPPC64FMOVDconst)
  6924  		v.AuxInt = auxFrom64F(math.Floor(auxTo64F(x)))
  6925  		return true
  6926  	}
  6927  	return false
  6928  }
  6929  func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
  6930  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
  6931  	// cond:
  6932  	// result: (MTVSRD x)
  6933  	for {
  6934  		off := v.AuxInt
  6935  		sym := v.Aux
  6936  		_ = v.Args[1]
  6937  		ptr := v.Args[0]
  6938  		v_1 := v.Args[1]
  6939  		if v_1.Op != OpPPC64MOVDstore {
  6940  			break
  6941  		}
  6942  		if v_1.AuxInt != off {
  6943  			break
  6944  		}
  6945  		if v_1.Aux != sym {
  6946  			break
  6947  		}
  6948  		_ = v_1.Args[2]
  6949  		if ptr != v_1.Args[0] {
  6950  			break
  6951  		}
  6952  		x := v_1.Args[1]
  6953  		v.reset(OpPPC64MTVSRD)
  6954  		v.AddArg(x)
  6955  		return true
  6956  	}
  6957  	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6958  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6959  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6960  	for {
  6961  		off1 := v.AuxInt
  6962  		sym1 := v.Aux
  6963  		_ = v.Args[1]
  6964  		p := v.Args[0]
  6965  		if p.Op != OpPPC64MOVDaddr {
  6966  			break
  6967  		}
  6968  		off2 := p.AuxInt
  6969  		sym2 := p.Aux
  6970  		ptr := p.Args[0]
  6971  		mem := v.Args[1]
  6972  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6973  			break
  6974  		}
  6975  		v.reset(OpPPC64FMOVDload)
  6976  		v.AuxInt = off1 + off2
  6977  		v.Aux = mergeSym(sym1, sym2)
  6978  		v.AddArg(ptr)
  6979  		v.AddArg(mem)
  6980  		return true
  6981  	}
  6982  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6983  	// cond: is16Bit(off1+off2)
  6984  	// result: (FMOVDload [off1+off2] {sym} ptr mem)
  6985  	for {
  6986  		off1 := v.AuxInt
  6987  		sym := v.Aux
  6988  		_ = v.Args[1]
  6989  		v_0 := v.Args[0]
  6990  		if v_0.Op != OpPPC64ADDconst {
  6991  			break
  6992  		}
  6993  		off2 := v_0.AuxInt
  6994  		ptr := v_0.Args[0]
  6995  		mem := v.Args[1]
  6996  		if !(is16Bit(off1 + off2)) {
  6997  			break
  6998  		}
  6999  		v.reset(OpPPC64FMOVDload)
  7000  		v.AuxInt = off1 + off2
  7001  		v.Aux = sym
  7002  		v.AddArg(ptr)
  7003  		v.AddArg(mem)
  7004  		return true
  7005  	}
  7006  	return false
  7007  }
  7008  func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
  7009  	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
  7010  	// cond:
  7011  	// result: (MOVDstore [off] {sym} ptr x mem)
  7012  	for {
  7013  		off := v.AuxInt
  7014  		sym := v.Aux
  7015  		_ = v.Args[2]
  7016  		ptr := v.Args[0]
  7017  		v_1 := v.Args[1]
  7018  		if v_1.Op != OpPPC64MTVSRD {
  7019  			break
  7020  		}
  7021  		x := v_1.Args[0]
  7022  		mem := v.Args[2]
  7023  		v.reset(OpPPC64MOVDstore)
  7024  		v.AuxInt = off
  7025  		v.Aux = sym
  7026  		v.AddArg(ptr)
  7027  		v.AddArg(x)
  7028  		v.AddArg(mem)
  7029  		return true
  7030  	}
  7031  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7032  	// cond: is16Bit(off1+off2)
  7033  	// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
  7034  	for {
  7035  		off1 := v.AuxInt
  7036  		sym := v.Aux
  7037  		_ = v.Args[2]
  7038  		v_0 := v.Args[0]
  7039  		if v_0.Op != OpPPC64ADDconst {
  7040  			break
  7041  		}
  7042  		off2 := v_0.AuxInt
  7043  		ptr := v_0.Args[0]
  7044  		val := v.Args[1]
  7045  		mem := v.Args[2]
  7046  		if !(is16Bit(off1 + off2)) {
  7047  			break
  7048  		}
  7049  		v.reset(OpPPC64FMOVDstore)
  7050  		v.AuxInt = off1 + off2
  7051  		v.Aux = sym
  7052  		v.AddArg(ptr)
  7053  		v.AddArg(val)
  7054  		v.AddArg(mem)
  7055  		return true
  7056  	}
  7057  	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7058  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7059  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7060  	for {
  7061  		off1 := v.AuxInt
  7062  		sym1 := v.Aux
  7063  		_ = v.Args[2]
  7064  		p := v.Args[0]
  7065  		if p.Op != OpPPC64MOVDaddr {
  7066  			break
  7067  		}
  7068  		off2 := p.AuxInt
  7069  		sym2 := p.Aux
  7070  		ptr := p.Args[0]
  7071  		val := v.Args[1]
  7072  		mem := v.Args[2]
  7073  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7074  			break
  7075  		}
  7076  		v.reset(OpPPC64FMOVDstore)
  7077  		v.AuxInt = off1 + off2
  7078  		v.Aux = mergeSym(sym1, sym2)
  7079  		v.AddArg(ptr)
  7080  		v.AddArg(val)
  7081  		v.AddArg(mem)
  7082  		return true
  7083  	}
  7084  	return false
  7085  }
  7086  func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
  7087  	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7088  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7089  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7090  	for {
  7091  		off1 := v.AuxInt
  7092  		sym1 := v.Aux
  7093  		_ = v.Args[1]
  7094  		p := v.Args[0]
  7095  		if p.Op != OpPPC64MOVDaddr {
  7096  			break
  7097  		}
  7098  		off2 := p.AuxInt
  7099  		sym2 := p.Aux
  7100  		ptr := p.Args[0]
  7101  		mem := v.Args[1]
  7102  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7103  			break
  7104  		}
  7105  		v.reset(OpPPC64FMOVSload)
  7106  		v.AuxInt = off1 + off2
  7107  		v.Aux = mergeSym(sym1, sym2)
  7108  		v.AddArg(ptr)
  7109  		v.AddArg(mem)
  7110  		return true
  7111  	}
  7112  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  7113  	// cond: is16Bit(off1+off2)
  7114  	// result: (FMOVSload [off1+off2] {sym} ptr mem)
  7115  	for {
  7116  		off1 := v.AuxInt
  7117  		sym := v.Aux
  7118  		_ = v.Args[1]
  7119  		v_0 := v.Args[0]
  7120  		if v_0.Op != OpPPC64ADDconst {
  7121  			break
  7122  		}
  7123  		off2 := v_0.AuxInt
  7124  		ptr := v_0.Args[0]
  7125  		mem := v.Args[1]
  7126  		if !(is16Bit(off1 + off2)) {
  7127  			break
  7128  		}
  7129  		v.reset(OpPPC64FMOVSload)
  7130  		v.AuxInt = off1 + off2
  7131  		v.Aux = sym
  7132  		v.AddArg(ptr)
  7133  		v.AddArg(mem)
  7134  		return true
  7135  	}
  7136  	return false
  7137  }
  7138  func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
  7139  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7140  	// cond: is16Bit(off1+off2)
  7141  	// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
  7142  	for {
  7143  		off1 := v.AuxInt
  7144  		sym := v.Aux
  7145  		_ = v.Args[2]
  7146  		v_0 := v.Args[0]
  7147  		if v_0.Op != OpPPC64ADDconst {
  7148  			break
  7149  		}
  7150  		off2 := v_0.AuxInt
  7151  		ptr := v_0.Args[0]
  7152  		val := v.Args[1]
  7153  		mem := v.Args[2]
  7154  		if !(is16Bit(off1 + off2)) {
  7155  			break
  7156  		}
  7157  		v.reset(OpPPC64FMOVSstore)
  7158  		v.AuxInt = off1 + off2
  7159  		v.Aux = sym
  7160  		v.AddArg(ptr)
  7161  		v.AddArg(val)
  7162  		v.AddArg(mem)
  7163  		return true
  7164  	}
  7165  	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7166  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7167  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7168  	for {
  7169  		off1 := v.AuxInt
  7170  		sym1 := v.Aux
  7171  		_ = v.Args[2]
  7172  		p := v.Args[0]
  7173  		if p.Op != OpPPC64MOVDaddr {
  7174  			break
  7175  		}
  7176  		off2 := p.AuxInt
  7177  		sym2 := p.Aux
  7178  		ptr := p.Args[0]
  7179  		val := v.Args[1]
  7180  		mem := v.Args[2]
  7181  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7182  			break
  7183  		}
  7184  		v.reset(OpPPC64FMOVSstore)
  7185  		v.AuxInt = off1 + off2
  7186  		v.Aux = mergeSym(sym1, sym2)
  7187  		v.AddArg(ptr)
  7188  		v.AddArg(val)
  7189  		v.AddArg(mem)
  7190  		return true
  7191  	}
  7192  	return false
  7193  }
  7194  func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
  7195  	// match: (FNEG (FABS x))
  7196  	// cond:
  7197  	// result: (FNABS x)
  7198  	for {
  7199  		v_0 := v.Args[0]
  7200  		if v_0.Op != OpPPC64FABS {
  7201  			break
  7202  		}
  7203  		x := v_0.Args[0]
  7204  		v.reset(OpPPC64FNABS)
  7205  		v.AddArg(x)
  7206  		return true
  7207  	}
  7208  	// match: (FNEG (FNABS x))
  7209  	// cond:
  7210  	// result: (FABS x)
  7211  	for {
  7212  		v_0 := v.Args[0]
  7213  		if v_0.Op != OpPPC64FNABS {
  7214  			break
  7215  		}
  7216  		x := v_0.Args[0]
  7217  		v.reset(OpPPC64FABS)
  7218  		v.AddArg(x)
  7219  		return true
  7220  	}
  7221  	return false
  7222  }
  7223  func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
  7224  	// match: (FSQRT (FMOVDconst [x]))
  7225  	// cond:
  7226  	// result: (FMOVDconst [auxFrom64F(math.Sqrt(auxTo64F(x)))])
  7227  	for {
  7228  		v_0 := v.Args[0]
  7229  		if v_0.Op != OpPPC64FMOVDconst {
  7230  			break
  7231  		}
  7232  		x := v_0.AuxInt
  7233  		v.reset(OpPPC64FMOVDconst)
  7234  		v.AuxInt = auxFrom64F(math.Sqrt(auxTo64F(x)))
  7235  		return true
  7236  	}
  7237  	return false
  7238  }
  7239  func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
  7240  	// match: (FSUB (FMUL x y) z)
  7241  	// cond:
  7242  	// result: (FMSUB x y z)
  7243  	for {
  7244  		_ = v.Args[1]
  7245  		v_0 := v.Args[0]
  7246  		if v_0.Op != OpPPC64FMUL {
  7247  			break
  7248  		}
  7249  		_ = v_0.Args[1]
  7250  		x := v_0.Args[0]
  7251  		y := v_0.Args[1]
  7252  		z := v.Args[1]
  7253  		v.reset(OpPPC64FMSUB)
  7254  		v.AddArg(x)
  7255  		v.AddArg(y)
  7256  		v.AddArg(z)
  7257  		return true
  7258  	}
  7259  	return false
  7260  }
  7261  func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
  7262  	// match: (FSUBS (FMULS x y) z)
  7263  	// cond:
  7264  	// result: (FMSUBS x y z)
  7265  	for {
  7266  		_ = v.Args[1]
  7267  		v_0 := v.Args[0]
  7268  		if v_0.Op != OpPPC64FMULS {
  7269  			break
  7270  		}
  7271  		_ = v_0.Args[1]
  7272  		x := v_0.Args[0]
  7273  		y := v_0.Args[1]
  7274  		z := v.Args[1]
  7275  		v.reset(OpPPC64FMSUBS)
  7276  		v.AddArg(x)
  7277  		v.AddArg(y)
  7278  		v.AddArg(z)
  7279  		return true
  7280  	}
  7281  	return false
  7282  }
  7283  func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
  7284  	// match: (FTRUNC (FMOVDconst [x]))
  7285  	// cond:
  7286  	// result: (FMOVDconst [auxFrom64F(math.Trunc(auxTo64F(x)))])
  7287  	for {
  7288  		v_0 := v.Args[0]
  7289  		if v_0.Op != OpPPC64FMOVDconst {
  7290  			break
  7291  		}
  7292  		x := v_0.AuxInt
  7293  		v.reset(OpPPC64FMOVDconst)
  7294  		v.AuxInt = auxFrom64F(math.Trunc(auxTo64F(x)))
  7295  		return true
  7296  	}
  7297  	return false
  7298  }
  7299  func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
  7300  	// match: (GreaterEqual (FlagEQ))
  7301  	// cond:
  7302  	// result: (MOVDconst [1])
  7303  	for {
  7304  		v_0 := v.Args[0]
  7305  		if v_0.Op != OpPPC64FlagEQ {
  7306  			break
  7307  		}
  7308  		v.reset(OpPPC64MOVDconst)
  7309  		v.AuxInt = 1
  7310  		return true
  7311  	}
  7312  	// match: (GreaterEqual (FlagLT))
  7313  	// cond:
  7314  	// result: (MOVDconst [0])
  7315  	for {
  7316  		v_0 := v.Args[0]
  7317  		if v_0.Op != OpPPC64FlagLT {
  7318  			break
  7319  		}
  7320  		v.reset(OpPPC64MOVDconst)
  7321  		v.AuxInt = 0
  7322  		return true
  7323  	}
  7324  	// match: (GreaterEqual (FlagGT))
  7325  	// cond:
  7326  	// result: (MOVDconst [1])
  7327  	for {
  7328  		v_0 := v.Args[0]
  7329  		if v_0.Op != OpPPC64FlagGT {
  7330  			break
  7331  		}
  7332  		v.reset(OpPPC64MOVDconst)
  7333  		v.AuxInt = 1
  7334  		return true
  7335  	}
  7336  	// match: (GreaterEqual (InvertFlags x))
  7337  	// cond:
  7338  	// result: (LessEqual x)
  7339  	for {
  7340  		v_0 := v.Args[0]
  7341  		if v_0.Op != OpPPC64InvertFlags {
  7342  			break
  7343  		}
  7344  		x := v_0.Args[0]
  7345  		v.reset(OpPPC64LessEqual)
  7346  		v.AddArg(x)
  7347  		return true
  7348  	}
  7349  	return false
  7350  }
  7351  func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
  7352  	// match: (GreaterThan (FlagEQ))
  7353  	// cond:
  7354  	// result: (MOVDconst [0])
  7355  	for {
  7356  		v_0 := v.Args[0]
  7357  		if v_0.Op != OpPPC64FlagEQ {
  7358  			break
  7359  		}
  7360  		v.reset(OpPPC64MOVDconst)
  7361  		v.AuxInt = 0
  7362  		return true
  7363  	}
  7364  	// match: (GreaterThan (FlagLT))
  7365  	// cond:
  7366  	// result: (MOVDconst [0])
  7367  	for {
  7368  		v_0 := v.Args[0]
  7369  		if v_0.Op != OpPPC64FlagLT {
  7370  			break
  7371  		}
  7372  		v.reset(OpPPC64MOVDconst)
  7373  		v.AuxInt = 0
  7374  		return true
  7375  	}
  7376  	// match: (GreaterThan (FlagGT))
  7377  	// cond:
  7378  	// result: (MOVDconst [1])
  7379  	for {
  7380  		v_0 := v.Args[0]
  7381  		if v_0.Op != OpPPC64FlagGT {
  7382  			break
  7383  		}
  7384  		v.reset(OpPPC64MOVDconst)
  7385  		v.AuxInt = 1
  7386  		return true
  7387  	}
  7388  	// match: (GreaterThan (InvertFlags x))
  7389  	// cond:
  7390  	// result: (LessThan x)
  7391  	for {
  7392  		v_0 := v.Args[0]
  7393  		if v_0.Op != OpPPC64InvertFlags {
  7394  			break
  7395  		}
  7396  		x := v_0.Args[0]
  7397  		v.reset(OpPPC64LessThan)
  7398  		v.AddArg(x)
  7399  		return true
  7400  	}
  7401  	return false
  7402  }
  7403  func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
  7404  	// match: (LessEqual (FlagEQ))
  7405  	// cond:
  7406  	// result: (MOVDconst [1])
  7407  	for {
  7408  		v_0 := v.Args[0]
  7409  		if v_0.Op != OpPPC64FlagEQ {
  7410  			break
  7411  		}
  7412  		v.reset(OpPPC64MOVDconst)
  7413  		v.AuxInt = 1
  7414  		return true
  7415  	}
  7416  	// match: (LessEqual (FlagLT))
  7417  	// cond:
  7418  	// result: (MOVDconst [1])
  7419  	for {
  7420  		v_0 := v.Args[0]
  7421  		if v_0.Op != OpPPC64FlagLT {
  7422  			break
  7423  		}
  7424  		v.reset(OpPPC64MOVDconst)
  7425  		v.AuxInt = 1
  7426  		return true
  7427  	}
  7428  	// match: (LessEqual (FlagGT))
  7429  	// cond:
  7430  	// result: (MOVDconst [0])
  7431  	for {
  7432  		v_0 := v.Args[0]
  7433  		if v_0.Op != OpPPC64FlagGT {
  7434  			break
  7435  		}
  7436  		v.reset(OpPPC64MOVDconst)
  7437  		v.AuxInt = 0
  7438  		return true
  7439  	}
  7440  	// match: (LessEqual (InvertFlags x))
  7441  	// cond:
  7442  	// result: (GreaterEqual x)
  7443  	for {
  7444  		v_0 := v.Args[0]
  7445  		if v_0.Op != OpPPC64InvertFlags {
  7446  			break
  7447  		}
  7448  		x := v_0.Args[0]
  7449  		v.reset(OpPPC64GreaterEqual)
  7450  		v.AddArg(x)
  7451  		return true
  7452  	}
  7453  	return false
  7454  }
  7455  func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
  7456  	// match: (LessThan (FlagEQ))
  7457  	// cond:
  7458  	// result: (MOVDconst [0])
  7459  	for {
  7460  		v_0 := v.Args[0]
  7461  		if v_0.Op != OpPPC64FlagEQ {
  7462  			break
  7463  		}
  7464  		v.reset(OpPPC64MOVDconst)
  7465  		v.AuxInt = 0
  7466  		return true
  7467  	}
  7468  	// match: (LessThan (FlagLT))
  7469  	// cond:
  7470  	// result: (MOVDconst [1])
  7471  	for {
  7472  		v_0 := v.Args[0]
  7473  		if v_0.Op != OpPPC64FlagLT {
  7474  			break
  7475  		}
  7476  		v.reset(OpPPC64MOVDconst)
  7477  		v.AuxInt = 1
  7478  		return true
  7479  	}
  7480  	// match: (LessThan (FlagGT))
  7481  	// cond:
  7482  	// result: (MOVDconst [0])
  7483  	for {
  7484  		v_0 := v.Args[0]
  7485  		if v_0.Op != OpPPC64FlagGT {
  7486  			break
  7487  		}
  7488  		v.reset(OpPPC64MOVDconst)
  7489  		v.AuxInt = 0
  7490  		return true
  7491  	}
  7492  	// match: (LessThan (InvertFlags x))
  7493  	// cond:
  7494  	// result: (GreaterThan x)
  7495  	for {
  7496  		v_0 := v.Args[0]
  7497  		if v_0.Op != OpPPC64InvertFlags {
  7498  			break
  7499  		}
  7500  		x := v_0.Args[0]
  7501  		v.reset(OpPPC64GreaterThan)
  7502  		v.AddArg(x)
  7503  		return true
  7504  	}
  7505  	return false
  7506  }
  7507  func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
  7508  	b := v.Block
  7509  	_ = b
  7510  	typ := &b.Func.Config.Types
  7511  	_ = typ
  7512  	// match: (MFVSRD (FMOVDconst [c]))
  7513  	// cond:
  7514  	// result: (MOVDconst [c])
  7515  	for {
  7516  		v_0 := v.Args[0]
  7517  		if v_0.Op != OpPPC64FMOVDconst {
  7518  			break
  7519  		}
  7520  		c := v_0.AuxInt
  7521  		v.reset(OpPPC64MOVDconst)
  7522  		v.AuxInt = c
  7523  		return true
  7524  	}
  7525  	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
  7526  	// cond: x.Uses == 1 && clobber(x)
  7527  	// result: @x.Block (MOVDload [off] {sym} ptr mem)
  7528  	for {
  7529  		x := v.Args[0]
  7530  		if x.Op != OpPPC64FMOVDload {
  7531  			break
  7532  		}
  7533  		off := x.AuxInt
  7534  		sym := x.Aux
  7535  		_ = x.Args[1]
  7536  		ptr := x.Args[0]
  7537  		mem := x.Args[1]
  7538  		if !(x.Uses == 1 && clobber(x)) {
  7539  			break
  7540  		}
  7541  		b = x.Block
  7542  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  7543  		v.reset(OpCopy)
  7544  		v.AddArg(v0)
  7545  		v0.AuxInt = off
  7546  		v0.Aux = sym
  7547  		v0.AddArg(ptr)
  7548  		v0.AddArg(mem)
  7549  		return true
  7550  	}
  7551  	return false
  7552  }
  7553  func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
  7554  	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7555  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7556  	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7557  	for {
  7558  		off1 := v.AuxInt
  7559  		sym1 := v.Aux
  7560  		_ = v.Args[1]
  7561  		p := v.Args[0]
  7562  		if p.Op != OpPPC64MOVDaddr {
  7563  			break
  7564  		}
  7565  		off2 := p.AuxInt
  7566  		sym2 := p.Aux
  7567  		ptr := p.Args[0]
  7568  		mem := v.Args[1]
  7569  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7570  			break
  7571  		}
  7572  		v.reset(OpPPC64MOVBZload)
  7573  		v.AuxInt = off1 + off2
  7574  		v.Aux = mergeSym(sym1, sym2)
  7575  		v.AddArg(ptr)
  7576  		v.AddArg(mem)
  7577  		return true
  7578  	}
  7579  	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
  7580  	// cond: is16Bit(off1+off2)
  7581  	// result: (MOVBZload [off1+off2] {sym} x mem)
  7582  	for {
  7583  		off1 := v.AuxInt
  7584  		sym := v.Aux
  7585  		_ = v.Args[1]
  7586  		v_0 := v.Args[0]
  7587  		if v_0.Op != OpPPC64ADDconst {
  7588  			break
  7589  		}
  7590  		off2 := v_0.AuxInt
  7591  		x := v_0.Args[0]
  7592  		mem := v.Args[1]
  7593  		if !(is16Bit(off1 + off2)) {
  7594  			break
  7595  		}
  7596  		v.reset(OpPPC64MOVBZload)
  7597  		v.AuxInt = off1 + off2
  7598  		v.Aux = sym
  7599  		v.AddArg(x)
  7600  		v.AddArg(mem)
  7601  		return true
  7602  	}
  7603  	// match: (MOVBZload [0] {sym} p:(ADD ptr idx) mem)
  7604  	// cond: sym == nil && p.Uses == 1
  7605  	// result: (MOVBZloadidx ptr idx mem)
  7606  	for {
  7607  		if v.AuxInt != 0 {
  7608  			break
  7609  		}
  7610  		sym := v.Aux
  7611  		_ = v.Args[1]
  7612  		p := v.Args[0]
  7613  		if p.Op != OpPPC64ADD {
  7614  			break
  7615  		}
  7616  		_ = p.Args[1]
  7617  		ptr := p.Args[0]
  7618  		idx := p.Args[1]
  7619  		mem := v.Args[1]
  7620  		if !(sym == nil && p.Uses == 1) {
  7621  			break
  7622  		}
  7623  		v.reset(OpPPC64MOVBZloadidx)
  7624  		v.AddArg(ptr)
  7625  		v.AddArg(idx)
  7626  		v.AddArg(mem)
  7627  		return true
  7628  	}
  7629  	return false
  7630  }
  7631  func rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v *Value) bool {
  7632  	// match: (MOVBZloadidx ptr (MOVDconst [c]) mem)
  7633  	// cond: is16Bit(c)
  7634  	// result: (MOVBZload [c] ptr mem)
  7635  	for {
  7636  		_ = v.Args[2]
  7637  		ptr := v.Args[0]
  7638  		v_1 := v.Args[1]
  7639  		if v_1.Op != OpPPC64MOVDconst {
  7640  			break
  7641  		}
  7642  		c := v_1.AuxInt
  7643  		mem := v.Args[2]
  7644  		if !(is16Bit(c)) {
  7645  			break
  7646  		}
  7647  		v.reset(OpPPC64MOVBZload)
  7648  		v.AuxInt = c
  7649  		v.AddArg(ptr)
  7650  		v.AddArg(mem)
  7651  		return true
  7652  	}
  7653  	// match: (MOVBZloadidx (MOVDconst [c]) ptr mem)
  7654  	// cond: is16Bit(c)
  7655  	// result: (MOVBZload [c] ptr mem)
  7656  	for {
  7657  		_ = v.Args[2]
  7658  		v_0 := v.Args[0]
  7659  		if v_0.Op != OpPPC64MOVDconst {
  7660  			break
  7661  		}
  7662  		c := v_0.AuxInt
  7663  		ptr := v.Args[1]
  7664  		mem := v.Args[2]
  7665  		if !(is16Bit(c)) {
  7666  			break
  7667  		}
  7668  		v.reset(OpPPC64MOVBZload)
  7669  		v.AuxInt = c
  7670  		v.AddArg(ptr)
  7671  		v.AddArg(mem)
  7672  		return true
  7673  	}
  7674  	return false
  7675  }
  7676  func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
  7677  	b := v.Block
  7678  	_ = b
  7679  	typ := &b.Func.Config.Types
  7680  	_ = typ
  7681  	// match: (MOVBZreg y:(ANDconst [c] _))
  7682  	// cond: uint64(c) <= 0xFF
  7683  	// result: y
  7684  	for {
  7685  		y := v.Args[0]
  7686  		if y.Op != OpPPC64ANDconst {
  7687  			break
  7688  		}
  7689  		c := y.AuxInt
  7690  		if !(uint64(c) <= 0xFF) {
  7691  			break
  7692  		}
  7693  		v.reset(OpCopy)
  7694  		v.Type = y.Type
  7695  		v.AddArg(y)
  7696  		return true
  7697  	}
  7698  	// match: (MOVBZreg (SRWconst [c] (MOVBZreg x)))
  7699  	// cond:
  7700  	// result: (SRWconst [c] (MOVBZreg x))
  7701  	for {
  7702  		v_0 := v.Args[0]
  7703  		if v_0.Op != OpPPC64SRWconst {
  7704  			break
  7705  		}
  7706  		c := v_0.AuxInt
  7707  		v_0_0 := v_0.Args[0]
  7708  		if v_0_0.Op != OpPPC64MOVBZreg {
  7709  			break
  7710  		}
  7711  		x := v_0_0.Args[0]
  7712  		v.reset(OpPPC64SRWconst)
  7713  		v.AuxInt = c
  7714  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  7715  		v0.AddArg(x)
  7716  		v.AddArg(v0)
  7717  		return true
  7718  	}
  7719  	// match: (MOVBZreg (SRWconst [c] x))
  7720  	// cond: sizeof(x.Type) == 8
  7721  	// result: (SRWconst [c] x)
  7722  	for {
  7723  		v_0 := v.Args[0]
  7724  		if v_0.Op != OpPPC64SRWconst {
  7725  			break
  7726  		}
  7727  		c := v_0.AuxInt
  7728  		x := v_0.Args[0]
  7729  		if !(sizeof(x.Type) == 8) {
  7730  			break
  7731  		}
  7732  		v.reset(OpPPC64SRWconst)
  7733  		v.AuxInt = c
  7734  		v.AddArg(x)
  7735  		return true
  7736  	}
  7737  	// match: (MOVBZreg (SRDconst [c] x))
  7738  	// cond: c>=56
  7739  	// result: (SRDconst [c] x)
  7740  	for {
  7741  		v_0 := v.Args[0]
  7742  		if v_0.Op != OpPPC64SRDconst {
  7743  			break
  7744  		}
  7745  		c := v_0.AuxInt
  7746  		x := v_0.Args[0]
  7747  		if !(c >= 56) {
  7748  			break
  7749  		}
  7750  		v.reset(OpPPC64SRDconst)
  7751  		v.AuxInt = c
  7752  		v.AddArg(x)
  7753  		return true
  7754  	}
  7755  	// match: (MOVBZreg (SRWconst [c] x))
  7756  	// cond: c>=24
  7757  	// result: (SRWconst [c] x)
  7758  	for {
  7759  		v_0 := v.Args[0]
  7760  		if v_0.Op != OpPPC64SRWconst {
  7761  			break
  7762  		}
  7763  		c := v_0.AuxInt
  7764  		x := v_0.Args[0]
  7765  		if !(c >= 24) {
  7766  			break
  7767  		}
  7768  		v.reset(OpPPC64SRWconst)
  7769  		v.AuxInt = c
  7770  		v.AddArg(x)
  7771  		return true
  7772  	}
  7773  	// match: (MOVBZreg y:(MOVBZreg _))
  7774  	// cond:
  7775  	// result: y
  7776  	for {
  7777  		y := v.Args[0]
  7778  		if y.Op != OpPPC64MOVBZreg {
  7779  			break
  7780  		}
  7781  		v.reset(OpCopy)
  7782  		v.Type = y.Type
  7783  		v.AddArg(y)
  7784  		return true
  7785  	}
  7786  	// match: (MOVBZreg (MOVBreg x))
  7787  	// cond:
  7788  	// result: (MOVBZreg x)
  7789  	for {
  7790  		v_0 := v.Args[0]
  7791  		if v_0.Op != OpPPC64MOVBreg {
  7792  			break
  7793  		}
  7794  		x := v_0.Args[0]
  7795  		v.reset(OpPPC64MOVBZreg)
  7796  		v.AddArg(x)
  7797  		return true
  7798  	}
  7799  	// match: (MOVBZreg x:(MOVBZload _ _))
  7800  	// cond:
  7801  	// result: x
  7802  	for {
  7803  		x := v.Args[0]
  7804  		if x.Op != OpPPC64MOVBZload {
  7805  			break
  7806  		}
  7807  		_ = x.Args[1]
  7808  		v.reset(OpCopy)
  7809  		v.Type = x.Type
  7810  		v.AddArg(x)
  7811  		return true
  7812  	}
  7813  	// match: (MOVBZreg x:(MOVBZloadidx _ _ _))
  7814  	// cond:
  7815  	// result: x
  7816  	for {
  7817  		x := v.Args[0]
  7818  		if x.Op != OpPPC64MOVBZloadidx {
  7819  			break
  7820  		}
  7821  		_ = x.Args[2]
  7822  		v.reset(OpCopy)
  7823  		v.Type = x.Type
  7824  		v.AddArg(x)
  7825  		return true
  7826  	}
  7827  	// match: (MOVBZreg x:(Arg <t>))
  7828  	// cond: is8BitInt(t) && !isSigned(t)
  7829  	// result: x
  7830  	for {
  7831  		x := v.Args[0]
  7832  		if x.Op != OpArg {
  7833  			break
  7834  		}
  7835  		t := x.Type
  7836  		if !(is8BitInt(t) && !isSigned(t)) {
  7837  			break
  7838  		}
  7839  		v.reset(OpCopy)
  7840  		v.Type = x.Type
  7841  		v.AddArg(x)
  7842  		return true
  7843  	}
  7844  	return false
  7845  }
  7846  func rewriteValuePPC64_OpPPC64MOVBZreg_10(v *Value) bool {
  7847  	// match: (MOVBZreg (MOVDconst [c]))
  7848  	// cond:
  7849  	// result: (MOVDconst [int64(uint8(c))])
  7850  	for {
  7851  		v_0 := v.Args[0]
  7852  		if v_0.Op != OpPPC64MOVDconst {
  7853  			break
  7854  		}
  7855  		c := v_0.AuxInt
  7856  		v.reset(OpPPC64MOVDconst)
  7857  		v.AuxInt = int64(uint8(c))
  7858  		return true
  7859  	}
  7860  	return false
  7861  }
  7862  func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
  7863  	b := v.Block
  7864  	_ = b
  7865  	typ := &b.Func.Config.Types
  7866  	_ = typ
  7867  	// match: (MOVBreg y:(ANDconst [c] _))
  7868  	// cond: uint64(c) <= 0x7F
  7869  	// result: y
  7870  	for {
  7871  		y := v.Args[0]
  7872  		if y.Op != OpPPC64ANDconst {
  7873  			break
  7874  		}
  7875  		c := y.AuxInt
  7876  		if !(uint64(c) <= 0x7F) {
  7877  			break
  7878  		}
  7879  		v.reset(OpCopy)
  7880  		v.Type = y.Type
  7881  		v.AddArg(y)
  7882  		return true
  7883  	}
  7884  	// match: (MOVBreg (SRAWconst [c] (MOVBreg x)))
  7885  	// cond:
  7886  	// result: (SRAWconst [c] (MOVBreg x))
  7887  	for {
  7888  		v_0 := v.Args[0]
  7889  		if v_0.Op != OpPPC64SRAWconst {
  7890  			break
  7891  		}
  7892  		c := v_0.AuxInt
  7893  		v_0_0 := v_0.Args[0]
  7894  		if v_0_0.Op != OpPPC64MOVBreg {
  7895  			break
  7896  		}
  7897  		x := v_0_0.Args[0]
  7898  		v.reset(OpPPC64SRAWconst)
  7899  		v.AuxInt = c
  7900  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
  7901  		v0.AddArg(x)
  7902  		v.AddArg(v0)
  7903  		return true
  7904  	}
  7905  	// match: (MOVBreg (SRAWconst [c] x))
  7906  	// cond: sizeof(x.Type) == 8
  7907  	// result: (SRAWconst [c] x)
  7908  	for {
  7909  		v_0 := v.Args[0]
  7910  		if v_0.Op != OpPPC64SRAWconst {
  7911  			break
  7912  		}
  7913  		c := v_0.AuxInt
  7914  		x := v_0.Args[0]
  7915  		if !(sizeof(x.Type) == 8) {
  7916  			break
  7917  		}
  7918  		v.reset(OpPPC64SRAWconst)
  7919  		v.AuxInt = c
  7920  		v.AddArg(x)
  7921  		return true
  7922  	}
  7923  	// match: (MOVBreg (SRDconst [c] x))
  7924  	// cond: c>56
  7925  	// result: (SRDconst [c] x)
  7926  	for {
  7927  		v_0 := v.Args[0]
  7928  		if v_0.Op != OpPPC64SRDconst {
  7929  			break
  7930  		}
  7931  		c := v_0.AuxInt
  7932  		x := v_0.Args[0]
  7933  		if !(c > 56) {
  7934  			break
  7935  		}
  7936  		v.reset(OpPPC64SRDconst)
  7937  		v.AuxInt = c
  7938  		v.AddArg(x)
  7939  		return true
  7940  	}
  7941  	// match: (MOVBreg (SRDconst [c] x))
  7942  	// cond: c==56
  7943  	// result: (SRADconst [c] x)
  7944  	for {
  7945  		v_0 := v.Args[0]
  7946  		if v_0.Op != OpPPC64SRDconst {
  7947  			break
  7948  		}
  7949  		c := v_0.AuxInt
  7950  		x := v_0.Args[0]
  7951  		if !(c == 56) {
  7952  			break
  7953  		}
  7954  		v.reset(OpPPC64SRADconst)
  7955  		v.AuxInt = c
  7956  		v.AddArg(x)
  7957  		return true
  7958  	}
  7959  	// match: (MOVBreg (SRWconst [c] x))
  7960  	// cond: c>24
  7961  	// result: (SRWconst [c] x)
  7962  	for {
  7963  		v_0 := v.Args[0]
  7964  		if v_0.Op != OpPPC64SRWconst {
  7965  			break
  7966  		}
  7967  		c := v_0.AuxInt
  7968  		x := v_0.Args[0]
  7969  		if !(c > 24) {
  7970  			break
  7971  		}
  7972  		v.reset(OpPPC64SRWconst)
  7973  		v.AuxInt = c
  7974  		v.AddArg(x)
  7975  		return true
  7976  	}
  7977  	// match: (MOVBreg (SRWconst [c] x))
  7978  	// cond: c==24
  7979  	// result: (SRAWconst [c] x)
  7980  	for {
  7981  		v_0 := v.Args[0]
  7982  		if v_0.Op != OpPPC64SRWconst {
  7983  			break
  7984  		}
  7985  		c := v_0.AuxInt
  7986  		x := v_0.Args[0]
  7987  		if !(c == 24) {
  7988  			break
  7989  		}
  7990  		v.reset(OpPPC64SRAWconst)
  7991  		v.AuxInt = c
  7992  		v.AddArg(x)
  7993  		return true
  7994  	}
  7995  	// match: (MOVBreg y:(MOVBreg _))
  7996  	// cond:
  7997  	// result: y
  7998  	for {
  7999  		y := v.Args[0]
  8000  		if y.Op != OpPPC64MOVBreg {
  8001  			break
  8002  		}
  8003  		v.reset(OpCopy)
  8004  		v.Type = y.Type
  8005  		v.AddArg(y)
  8006  		return true
  8007  	}
  8008  	// match: (MOVBreg (MOVBZreg x))
  8009  	// cond:
  8010  	// result: (MOVBreg x)
  8011  	for {
  8012  		v_0 := v.Args[0]
  8013  		if v_0.Op != OpPPC64MOVBZreg {
  8014  			break
  8015  		}
  8016  		x := v_0.Args[0]
  8017  		v.reset(OpPPC64MOVBreg)
  8018  		v.AddArg(x)
  8019  		return true
  8020  	}
  8021  	// match: (MOVBreg x:(Arg <t>))
  8022  	// cond: is8BitInt(t) && isSigned(t)
  8023  	// result: x
  8024  	for {
  8025  		x := v.Args[0]
  8026  		if x.Op != OpArg {
  8027  			break
  8028  		}
  8029  		t := x.Type
  8030  		if !(is8BitInt(t) && isSigned(t)) {
  8031  			break
  8032  		}
  8033  		v.reset(OpCopy)
  8034  		v.Type = x.Type
  8035  		v.AddArg(x)
  8036  		return true
  8037  	}
  8038  	return false
  8039  }
  8040  func rewriteValuePPC64_OpPPC64MOVBreg_10(v *Value) bool {
  8041  	// match: (MOVBreg (MOVDconst [c]))
  8042  	// cond:
  8043  	// result: (MOVDconst [int64(int8(c))])
  8044  	for {
  8045  		v_0 := v.Args[0]
  8046  		if v_0.Op != OpPPC64MOVDconst {
  8047  			break
  8048  		}
  8049  		c := v_0.AuxInt
  8050  		v.reset(OpPPC64MOVDconst)
  8051  		v.AuxInt = int64(int8(c))
  8052  		return true
  8053  	}
  8054  	return false
  8055  }
  8056  func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
  8057  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
  8058  	// cond: is16Bit(off1+off2)
  8059  	// result: (MOVBstore [off1+off2] {sym} x val mem)
  8060  	for {
  8061  		off1 := v.AuxInt
  8062  		sym := v.Aux
  8063  		_ = v.Args[2]
  8064  		v_0 := v.Args[0]
  8065  		if v_0.Op != OpPPC64ADDconst {
  8066  			break
  8067  		}
  8068  		off2 := v_0.AuxInt
  8069  		x := v_0.Args[0]
  8070  		val := v.Args[1]
  8071  		mem := v.Args[2]
  8072  		if !(is16Bit(off1 + off2)) {
  8073  			break
  8074  		}
  8075  		v.reset(OpPPC64MOVBstore)
  8076  		v.AuxInt = off1 + off2
  8077  		v.Aux = sym
  8078  		v.AddArg(x)
  8079  		v.AddArg(val)
  8080  		v.AddArg(mem)
  8081  		return true
  8082  	}
  8083  	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8084  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8085  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8086  	for {
  8087  		off1 := v.AuxInt
  8088  		sym1 := v.Aux
  8089  		_ = v.Args[2]
  8090  		p := v.Args[0]
  8091  		if p.Op != OpPPC64MOVDaddr {
  8092  			break
  8093  		}
  8094  		off2 := p.AuxInt
  8095  		sym2 := p.Aux
  8096  		ptr := p.Args[0]
  8097  		val := v.Args[1]
  8098  		mem := v.Args[2]
  8099  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8100  			break
  8101  		}
  8102  		v.reset(OpPPC64MOVBstore)
  8103  		v.AuxInt = off1 + off2
  8104  		v.Aux = mergeSym(sym1, sym2)
  8105  		v.AddArg(ptr)
  8106  		v.AddArg(val)
  8107  		v.AddArg(mem)
  8108  		return true
  8109  	}
  8110  	// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
  8111  	// cond:
  8112  	// result: (MOVBstorezero [off] {sym} ptr mem)
  8113  	for {
  8114  		off := v.AuxInt
  8115  		sym := v.Aux
  8116  		_ = v.Args[2]
  8117  		ptr := v.Args[0]
  8118  		v_1 := v.Args[1]
  8119  		if v_1.Op != OpPPC64MOVDconst {
  8120  			break
  8121  		}
  8122  		if v_1.AuxInt != 0 {
  8123  			break
  8124  		}
  8125  		mem := v.Args[2]
  8126  		v.reset(OpPPC64MOVBstorezero)
  8127  		v.AuxInt = off
  8128  		v.Aux = sym
  8129  		v.AddArg(ptr)
  8130  		v.AddArg(mem)
  8131  		return true
  8132  	}
  8133  	// match: (MOVBstore [off] {sym} p:(ADD ptr idx) val mem)
  8134  	// cond: off == 0 && sym == nil && p.Uses == 1
  8135  	// result: (MOVBstoreidx ptr idx val mem)
  8136  	for {
  8137  		off := v.AuxInt
  8138  		sym := v.Aux
  8139  		_ = v.Args[2]
  8140  		p := v.Args[0]
  8141  		if p.Op != OpPPC64ADD {
  8142  			break
  8143  		}
  8144  		_ = p.Args[1]
  8145  		ptr := p.Args[0]
  8146  		idx := p.Args[1]
  8147  		val := v.Args[1]
  8148  		mem := v.Args[2]
  8149  		if !(off == 0 && sym == nil && p.Uses == 1) {
  8150  			break
  8151  		}
  8152  		v.reset(OpPPC64MOVBstoreidx)
  8153  		v.AddArg(ptr)
  8154  		v.AddArg(idx)
  8155  		v.AddArg(val)
  8156  		v.AddArg(mem)
  8157  		return true
  8158  	}
  8159  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  8160  	// cond:
  8161  	// result: (MOVBstore [off] {sym} ptr x mem)
  8162  	for {
  8163  		off := v.AuxInt
  8164  		sym := v.Aux
  8165  		_ = v.Args[2]
  8166  		ptr := v.Args[0]
  8167  		v_1 := v.Args[1]
  8168  		if v_1.Op != OpPPC64MOVBreg {
  8169  			break
  8170  		}
  8171  		x := v_1.Args[0]
  8172  		mem := v.Args[2]
  8173  		v.reset(OpPPC64MOVBstore)
  8174  		v.AuxInt = off
  8175  		v.Aux = sym
  8176  		v.AddArg(ptr)
  8177  		v.AddArg(x)
  8178  		v.AddArg(mem)
  8179  		return true
  8180  	}
  8181  	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
  8182  	// cond:
  8183  	// result: (MOVBstore [off] {sym} ptr x mem)
  8184  	for {
  8185  		off := v.AuxInt
  8186  		sym := v.Aux
  8187  		_ = v.Args[2]
  8188  		ptr := v.Args[0]
  8189  		v_1 := v.Args[1]
  8190  		if v_1.Op != OpPPC64MOVBZreg {
  8191  			break
  8192  		}
  8193  		x := v_1.Args[0]
  8194  		mem := v.Args[2]
  8195  		v.reset(OpPPC64MOVBstore)
  8196  		v.AuxInt = off
  8197  		v.Aux = sym
  8198  		v.AddArg(ptr)
  8199  		v.AddArg(x)
  8200  		v.AddArg(mem)
  8201  		return true
  8202  	}
  8203  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  8204  	// cond:
  8205  	// result: (MOVBstore [off] {sym} ptr x mem)
  8206  	for {
  8207  		off := v.AuxInt
  8208  		sym := v.Aux
  8209  		_ = v.Args[2]
  8210  		ptr := v.Args[0]
  8211  		v_1 := v.Args[1]
  8212  		if v_1.Op != OpPPC64MOVHreg {
  8213  			break
  8214  		}
  8215  		x := v_1.Args[0]
  8216  		mem := v.Args[2]
  8217  		v.reset(OpPPC64MOVBstore)
  8218  		v.AuxInt = off
  8219  		v.Aux = sym
  8220  		v.AddArg(ptr)
  8221  		v.AddArg(x)
  8222  		v.AddArg(mem)
  8223  		return true
  8224  	}
  8225  	// match: (MOVBstore [off] {sym} ptr (MOVHZreg x) mem)
  8226  	// cond:
  8227  	// result: (MOVBstore [off] {sym} ptr x mem)
  8228  	for {
  8229  		off := v.AuxInt
  8230  		sym := v.Aux
  8231  		_ = v.Args[2]
  8232  		ptr := v.Args[0]
  8233  		v_1 := v.Args[1]
  8234  		if v_1.Op != OpPPC64MOVHZreg {
  8235  			break
  8236  		}
  8237  		x := v_1.Args[0]
  8238  		mem := v.Args[2]
  8239  		v.reset(OpPPC64MOVBstore)
  8240  		v.AuxInt = off
  8241  		v.Aux = sym
  8242  		v.AddArg(ptr)
  8243  		v.AddArg(x)
  8244  		v.AddArg(mem)
  8245  		return true
  8246  	}
  8247  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  8248  	// cond:
  8249  	// result: (MOVBstore [off] {sym} ptr x mem)
  8250  	for {
  8251  		off := v.AuxInt
  8252  		sym := v.Aux
  8253  		_ = v.Args[2]
  8254  		ptr := v.Args[0]
  8255  		v_1 := v.Args[1]
  8256  		if v_1.Op != OpPPC64MOVWreg {
  8257  			break
  8258  		}
  8259  		x := v_1.Args[0]
  8260  		mem := v.Args[2]
  8261  		v.reset(OpPPC64MOVBstore)
  8262  		v.AuxInt = off
  8263  		v.Aux = sym
  8264  		v.AddArg(ptr)
  8265  		v.AddArg(x)
  8266  		v.AddArg(mem)
  8267  		return true
  8268  	}
  8269  	// match: (MOVBstore [off] {sym} ptr (MOVWZreg x) mem)
  8270  	// cond:
  8271  	// result: (MOVBstore [off] {sym} ptr x mem)
  8272  	for {
  8273  		off := v.AuxInt
  8274  		sym := v.Aux
  8275  		_ = v.Args[2]
  8276  		ptr := v.Args[0]
  8277  		v_1 := v.Args[1]
  8278  		if v_1.Op != OpPPC64MOVWZreg {
  8279  			break
  8280  		}
  8281  		x := v_1.Args[0]
  8282  		mem := v.Args[2]
  8283  		v.reset(OpPPC64MOVBstore)
  8284  		v.AuxInt = off
  8285  		v.Aux = sym
  8286  		v.AddArg(ptr)
  8287  		v.AddArg(x)
  8288  		v.AddArg(mem)
  8289  		return true
  8290  	}
  8291  	return false
  8292  }
  8293  func rewriteValuePPC64_OpPPC64MOVBstore_10(v *Value) bool {
  8294  	b := v.Block
  8295  	_ = b
  8296  	config := b.Func.Config
  8297  	_ = config
  8298  	typ := &b.Func.Config.Types
  8299  	_ = typ
  8300  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHreg x) [c]) mem)
  8301  	// cond: c <= 8
  8302  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8303  	for {
  8304  		off := v.AuxInt
  8305  		sym := v.Aux
  8306  		_ = v.Args[2]
  8307  		ptr := v.Args[0]
  8308  		v_1 := v.Args[1]
  8309  		if v_1.Op != OpPPC64SRWconst {
  8310  			break
  8311  		}
  8312  		c := v_1.AuxInt
  8313  		v_1_0 := v_1.Args[0]
  8314  		if v_1_0.Op != OpPPC64MOVHreg {
  8315  			break
  8316  		}
  8317  		x := v_1_0.Args[0]
  8318  		mem := v.Args[2]
  8319  		if !(c <= 8) {
  8320  			break
  8321  		}
  8322  		v.reset(OpPPC64MOVBstore)
  8323  		v.AuxInt = off
  8324  		v.Aux = sym
  8325  		v.AddArg(ptr)
  8326  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8327  		v0.AuxInt = c
  8328  		v0.AddArg(x)
  8329  		v.AddArg(v0)
  8330  		v.AddArg(mem)
  8331  		return true
  8332  	}
  8333  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHZreg x) [c]) mem)
  8334  	// cond: c <= 8
  8335  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8336  	for {
  8337  		off := v.AuxInt
  8338  		sym := v.Aux
  8339  		_ = v.Args[2]
  8340  		ptr := v.Args[0]
  8341  		v_1 := v.Args[1]
  8342  		if v_1.Op != OpPPC64SRWconst {
  8343  			break
  8344  		}
  8345  		c := v_1.AuxInt
  8346  		v_1_0 := v_1.Args[0]
  8347  		if v_1_0.Op != OpPPC64MOVHZreg {
  8348  			break
  8349  		}
  8350  		x := v_1_0.Args[0]
  8351  		mem := v.Args[2]
  8352  		if !(c <= 8) {
  8353  			break
  8354  		}
  8355  		v.reset(OpPPC64MOVBstore)
  8356  		v.AuxInt = off
  8357  		v.Aux = sym
  8358  		v.AddArg(ptr)
  8359  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8360  		v0.AuxInt = c
  8361  		v0.AddArg(x)
  8362  		v.AddArg(v0)
  8363  		v.AddArg(mem)
  8364  		return true
  8365  	}
  8366  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWreg x) [c]) mem)
  8367  	// cond: c <= 24
  8368  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8369  	for {
  8370  		off := v.AuxInt
  8371  		sym := v.Aux
  8372  		_ = v.Args[2]
  8373  		ptr := v.Args[0]
  8374  		v_1 := v.Args[1]
  8375  		if v_1.Op != OpPPC64SRWconst {
  8376  			break
  8377  		}
  8378  		c := v_1.AuxInt
  8379  		v_1_0 := v_1.Args[0]
  8380  		if v_1_0.Op != OpPPC64MOVWreg {
  8381  			break
  8382  		}
  8383  		x := v_1_0.Args[0]
  8384  		mem := v.Args[2]
  8385  		if !(c <= 24) {
  8386  			break
  8387  		}
  8388  		v.reset(OpPPC64MOVBstore)
  8389  		v.AuxInt = off
  8390  		v.Aux = sym
  8391  		v.AddArg(ptr)
  8392  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8393  		v0.AuxInt = c
  8394  		v0.AddArg(x)
  8395  		v.AddArg(v0)
  8396  		v.AddArg(mem)
  8397  		return true
  8398  	}
  8399  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWZreg x) [c]) mem)
  8400  	// cond: c <= 24
  8401  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8402  	for {
  8403  		off := v.AuxInt
  8404  		sym := v.Aux
  8405  		_ = v.Args[2]
  8406  		ptr := v.Args[0]
  8407  		v_1 := v.Args[1]
  8408  		if v_1.Op != OpPPC64SRWconst {
  8409  			break
  8410  		}
  8411  		c := v_1.AuxInt
  8412  		v_1_0 := v_1.Args[0]
  8413  		if v_1_0.Op != OpPPC64MOVWZreg {
  8414  			break
  8415  		}
  8416  		x := v_1_0.Args[0]
  8417  		mem := v.Args[2]
  8418  		if !(c <= 24) {
  8419  			break
  8420  		}
  8421  		v.reset(OpPPC64MOVBstore)
  8422  		v.AuxInt = off
  8423  		v.Aux = sym
  8424  		v.AddArg(ptr)
  8425  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8426  		v0.AuxInt = c
  8427  		v0.AddArg(x)
  8428  		v.AddArg(v0)
  8429  		v.AddArg(mem)
  8430  		return true
  8431  	}
  8432  	// match: (MOVBstore [i1] {s} p (SRWconst w [24]) x0:(MOVBstore [i0] {s} p (SRWconst w [16]) mem))
  8433  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8434  	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8435  	for {
  8436  		i1 := v.AuxInt
  8437  		s := v.Aux
  8438  		_ = v.Args[2]
  8439  		p := v.Args[0]
  8440  		v_1 := v.Args[1]
  8441  		if v_1.Op != OpPPC64SRWconst {
  8442  			break
  8443  		}
  8444  		if v_1.AuxInt != 24 {
  8445  			break
  8446  		}
  8447  		w := v_1.Args[0]
  8448  		x0 := v.Args[2]
  8449  		if x0.Op != OpPPC64MOVBstore {
  8450  			break
  8451  		}
  8452  		i0 := x0.AuxInt
  8453  		if x0.Aux != s {
  8454  			break
  8455  		}
  8456  		_ = x0.Args[2]
  8457  		if p != x0.Args[0] {
  8458  			break
  8459  		}
  8460  		x0_1 := x0.Args[1]
  8461  		if x0_1.Op != OpPPC64SRWconst {
  8462  			break
  8463  		}
  8464  		if x0_1.AuxInt != 16 {
  8465  			break
  8466  		}
  8467  		if w != x0_1.Args[0] {
  8468  			break
  8469  		}
  8470  		mem := x0.Args[2]
  8471  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8472  			break
  8473  		}
  8474  		v.reset(OpPPC64MOVHstore)
  8475  		v.AuxInt = i0
  8476  		v.Aux = s
  8477  		v.AddArg(p)
  8478  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt16)
  8479  		v0.AuxInt = 16
  8480  		v0.AddArg(w)
  8481  		v.AddArg(v0)
  8482  		v.AddArg(mem)
  8483  		return true
  8484  	}
  8485  	// match: (MOVBstore [i1] {s} p (SRDconst w [24]) x0:(MOVBstore [i0] {s} p (SRDconst w [16]) mem))
  8486  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8487  	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8488  	for {
  8489  		i1 := v.AuxInt
  8490  		s := v.Aux
  8491  		_ = v.Args[2]
  8492  		p := v.Args[0]
  8493  		v_1 := v.Args[1]
  8494  		if v_1.Op != OpPPC64SRDconst {
  8495  			break
  8496  		}
  8497  		if v_1.AuxInt != 24 {
  8498  			break
  8499  		}
  8500  		w := v_1.Args[0]
  8501  		x0 := v.Args[2]
  8502  		if x0.Op != OpPPC64MOVBstore {
  8503  			break
  8504  		}
  8505  		i0 := x0.AuxInt
  8506  		if x0.Aux != s {
  8507  			break
  8508  		}
  8509  		_ = x0.Args[2]
  8510  		if p != x0.Args[0] {
  8511  			break
  8512  		}
  8513  		x0_1 := x0.Args[1]
  8514  		if x0_1.Op != OpPPC64SRDconst {
  8515  			break
  8516  		}
  8517  		if x0_1.AuxInt != 16 {
  8518  			break
  8519  		}
  8520  		if w != x0_1.Args[0] {
  8521  			break
  8522  		}
  8523  		mem := x0.Args[2]
  8524  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8525  			break
  8526  		}
  8527  		v.reset(OpPPC64MOVHstore)
  8528  		v.AuxInt = i0
  8529  		v.Aux = s
  8530  		v.AddArg(p)
  8531  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt16)
  8532  		v0.AuxInt = 16
  8533  		v0.AddArg(w)
  8534  		v.AddArg(v0)
  8535  		v.AddArg(mem)
  8536  		return true
  8537  	}
  8538  	// match: (MOVBstore [i1] {s} p (SRWconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8539  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8540  	// result: (MOVHstore [i0] {s} p w mem)
  8541  	for {
  8542  		i1 := v.AuxInt
  8543  		s := v.Aux
  8544  		_ = v.Args[2]
  8545  		p := v.Args[0]
  8546  		v_1 := v.Args[1]
  8547  		if v_1.Op != OpPPC64SRWconst {
  8548  			break
  8549  		}
  8550  		if v_1.AuxInt != 8 {
  8551  			break
  8552  		}
  8553  		w := v_1.Args[0]
  8554  		x0 := v.Args[2]
  8555  		if x0.Op != OpPPC64MOVBstore {
  8556  			break
  8557  		}
  8558  		i0 := x0.AuxInt
  8559  		if x0.Aux != s {
  8560  			break
  8561  		}
  8562  		_ = x0.Args[2]
  8563  		if p != x0.Args[0] {
  8564  			break
  8565  		}
  8566  		if w != x0.Args[1] {
  8567  			break
  8568  		}
  8569  		mem := x0.Args[2]
  8570  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8571  			break
  8572  		}
  8573  		v.reset(OpPPC64MOVHstore)
  8574  		v.AuxInt = i0
  8575  		v.Aux = s
  8576  		v.AddArg(p)
  8577  		v.AddArg(w)
  8578  		v.AddArg(mem)
  8579  		return true
  8580  	}
  8581  	// match: (MOVBstore [i1] {s} p (SRDconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8582  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8583  	// result: (MOVHstore [i0] {s} p w mem)
  8584  	for {
  8585  		i1 := v.AuxInt
  8586  		s := v.Aux
  8587  		_ = v.Args[2]
  8588  		p := v.Args[0]
  8589  		v_1 := v.Args[1]
  8590  		if v_1.Op != OpPPC64SRDconst {
  8591  			break
  8592  		}
  8593  		if v_1.AuxInt != 8 {
  8594  			break
  8595  		}
  8596  		w := v_1.Args[0]
  8597  		x0 := v.Args[2]
  8598  		if x0.Op != OpPPC64MOVBstore {
  8599  			break
  8600  		}
  8601  		i0 := x0.AuxInt
  8602  		if x0.Aux != s {
  8603  			break
  8604  		}
  8605  		_ = x0.Args[2]
  8606  		if p != x0.Args[0] {
  8607  			break
  8608  		}
  8609  		if w != x0.Args[1] {
  8610  			break
  8611  		}
  8612  		mem := x0.Args[2]
  8613  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8614  			break
  8615  		}
  8616  		v.reset(OpPPC64MOVHstore)
  8617  		v.AuxInt = i0
  8618  		v.Aux = s
  8619  		v.AddArg(p)
  8620  		v.AddArg(w)
  8621  		v.AddArg(mem)
  8622  		return true
  8623  	}
  8624  	// match: (MOVBstore [i3] {s} p w x0:(MOVBstore [i2] {s} p (SRWconst w [8]) x1:(MOVBstore [i1] {s} p (SRWconst w [16]) x2:(MOVBstore [i0] {s} p (SRWconst w [24]) mem))))
  8625  	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)
  8626  	// result: (MOVWBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8627  	for {
  8628  		i3 := v.AuxInt
  8629  		s := v.Aux
  8630  		_ = v.Args[2]
  8631  		p := v.Args[0]
  8632  		w := v.Args[1]
  8633  		x0 := v.Args[2]
  8634  		if x0.Op != OpPPC64MOVBstore {
  8635  			break
  8636  		}
  8637  		i2 := x0.AuxInt
  8638  		if x0.Aux != s {
  8639  			break
  8640  		}
  8641  		_ = x0.Args[2]
  8642  		if p != x0.Args[0] {
  8643  			break
  8644  		}
  8645  		x0_1 := x0.Args[1]
  8646  		if x0_1.Op != OpPPC64SRWconst {
  8647  			break
  8648  		}
  8649  		if x0_1.AuxInt != 8 {
  8650  			break
  8651  		}
  8652  		if w != x0_1.Args[0] {
  8653  			break
  8654  		}
  8655  		x1 := x0.Args[2]
  8656  		if x1.Op != OpPPC64MOVBstore {
  8657  			break
  8658  		}
  8659  		i1 := x1.AuxInt
  8660  		if x1.Aux != s {
  8661  			break
  8662  		}
  8663  		_ = x1.Args[2]
  8664  		if p != x1.Args[0] {
  8665  			break
  8666  		}
  8667  		x1_1 := x1.Args[1]
  8668  		if x1_1.Op != OpPPC64SRWconst {
  8669  			break
  8670  		}
  8671  		if x1_1.AuxInt != 16 {
  8672  			break
  8673  		}
  8674  		if w != x1_1.Args[0] {
  8675  			break
  8676  		}
  8677  		x2 := x1.Args[2]
  8678  		if x2.Op != OpPPC64MOVBstore {
  8679  			break
  8680  		}
  8681  		i0 := x2.AuxInt
  8682  		if x2.Aux != s {
  8683  			break
  8684  		}
  8685  		_ = x2.Args[2]
  8686  		if p != x2.Args[0] {
  8687  			break
  8688  		}
  8689  		x2_1 := x2.Args[1]
  8690  		if x2_1.Op != OpPPC64SRWconst {
  8691  			break
  8692  		}
  8693  		if x2_1.AuxInt != 24 {
  8694  			break
  8695  		}
  8696  		if w != x2_1.Args[0] {
  8697  			break
  8698  		}
  8699  		mem := x2.Args[2]
  8700  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
  8701  			break
  8702  		}
  8703  		v.reset(OpPPC64MOVWBRstore)
  8704  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8705  		v0.AuxInt = i0
  8706  		v0.Aux = s
  8707  		v0.AddArg(p)
  8708  		v.AddArg(v0)
  8709  		v.AddArg(w)
  8710  		v.AddArg(mem)
  8711  		return true
  8712  	}
  8713  	// match: (MOVBstore [i1] {s} p w x0:(MOVBstore [i0] {s} p (SRWconst w [8]) mem))
  8714  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8715  	// result: (MOVHBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8716  	for {
  8717  		i1 := v.AuxInt
  8718  		s := v.Aux
  8719  		_ = v.Args[2]
  8720  		p := v.Args[0]
  8721  		w := v.Args[1]
  8722  		x0 := v.Args[2]
  8723  		if x0.Op != OpPPC64MOVBstore {
  8724  			break
  8725  		}
  8726  		i0 := x0.AuxInt
  8727  		if x0.Aux != s {
  8728  			break
  8729  		}
  8730  		_ = x0.Args[2]
  8731  		if p != x0.Args[0] {
  8732  			break
  8733  		}
  8734  		x0_1 := x0.Args[1]
  8735  		if x0_1.Op != OpPPC64SRWconst {
  8736  			break
  8737  		}
  8738  		if x0_1.AuxInt != 8 {
  8739  			break
  8740  		}
  8741  		if w != x0_1.Args[0] {
  8742  			break
  8743  		}
  8744  		mem := x0.Args[2]
  8745  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8746  			break
  8747  		}
  8748  		v.reset(OpPPC64MOVHBRstore)
  8749  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8750  		v0.AuxInt = i0
  8751  		v0.Aux = s
  8752  		v0.AddArg(p)
  8753  		v.AddArg(v0)
  8754  		v.AddArg(w)
  8755  		v.AddArg(mem)
  8756  		return true
  8757  	}
  8758  	return false
  8759  }
  8760  func rewriteValuePPC64_OpPPC64MOVBstore_20(v *Value) bool {
  8761  	b := v.Block
  8762  	_ = b
  8763  	config := b.Func.Config
  8764  	_ = config
  8765  	typ := &b.Func.Config.Types
  8766  	_ = typ
  8767  	// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVWstore [i0] {s} p w mem)))))
  8768  	// cond: !config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)
  8769  	// result: (MOVDstore [i0] {s} p w mem)
  8770  	for {
  8771  		i7 := v.AuxInt
  8772  		s := v.Aux
  8773  		_ = v.Args[2]
  8774  		p := v.Args[0]
  8775  		v_1 := v.Args[1]
  8776  		if v_1.Op != OpPPC64SRDconst {
  8777  			break
  8778  		}
  8779  		if v_1.AuxInt != 56 {
  8780  			break
  8781  		}
  8782  		w := v_1.Args[0]
  8783  		x0 := v.Args[2]
  8784  		if x0.Op != OpPPC64MOVBstore {
  8785  			break
  8786  		}
  8787  		i6 := x0.AuxInt
  8788  		if x0.Aux != s {
  8789  			break
  8790  		}
  8791  		_ = x0.Args[2]
  8792  		if p != x0.Args[0] {
  8793  			break
  8794  		}
  8795  		x0_1 := x0.Args[1]
  8796  		if x0_1.Op != OpPPC64SRDconst {
  8797  			break
  8798  		}
  8799  		if x0_1.AuxInt != 48 {
  8800  			break
  8801  		}
  8802  		if w != x0_1.Args[0] {
  8803  			break
  8804  		}
  8805  		x1 := x0.Args[2]
  8806  		if x1.Op != OpPPC64MOVBstore {
  8807  			break
  8808  		}
  8809  		i5 := x1.AuxInt
  8810  		if x1.Aux != s {
  8811  			break
  8812  		}
  8813  		_ = x1.Args[2]
  8814  		if p != x1.Args[0] {
  8815  			break
  8816  		}
  8817  		x1_1 := x1.Args[1]
  8818  		if x1_1.Op != OpPPC64SRDconst {
  8819  			break
  8820  		}
  8821  		if x1_1.AuxInt != 40 {
  8822  			break
  8823  		}
  8824  		if w != x1_1.Args[0] {
  8825  			break
  8826  		}
  8827  		x2 := x1.Args[2]
  8828  		if x2.Op != OpPPC64MOVBstore {
  8829  			break
  8830  		}
  8831  		i4 := x2.AuxInt
  8832  		if x2.Aux != s {
  8833  			break
  8834  		}
  8835  		_ = x2.Args[2]
  8836  		if p != x2.Args[0] {
  8837  			break
  8838  		}
  8839  		x2_1 := x2.Args[1]
  8840  		if x2_1.Op != OpPPC64SRDconst {
  8841  			break
  8842  		}
  8843  		if x2_1.AuxInt != 32 {
  8844  			break
  8845  		}
  8846  		if w != x2_1.Args[0] {
  8847  			break
  8848  		}
  8849  		x3 := x2.Args[2]
  8850  		if x3.Op != OpPPC64MOVWstore {
  8851  			break
  8852  		}
  8853  		i0 := x3.AuxInt
  8854  		if x3.Aux != s {
  8855  			break
  8856  		}
  8857  		_ = x3.Args[2]
  8858  		if p != x3.Args[0] {
  8859  			break
  8860  		}
  8861  		if w != x3.Args[1] {
  8862  			break
  8863  		}
  8864  		mem := x3.Args[2]
  8865  		if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)) {
  8866  			break
  8867  		}
  8868  		v.reset(OpPPC64MOVDstore)
  8869  		v.AuxInt = i0
  8870  		v.Aux = s
  8871  		v.AddArg(p)
  8872  		v.AddArg(w)
  8873  		v.AddArg(mem)
  8874  		return true
  8875  	}
  8876  	// match: (MOVBstore [i7] {s} p w x0:(MOVBstore [i6] {s} p (SRDconst w [8]) x1:(MOVBstore [i5] {s} p (SRDconst w [16]) x2:(MOVBstore [i4] {s} p (SRDconst w [24]) x3:(MOVBstore [i3] {s} p (SRDconst w [32]) x4:(MOVBstore [i2] {s} p (SRDconst w [40]) x5:(MOVBstore [i1] {s} p (SRDconst w [48]) x6:(MOVBstore [i0] {s} p (SRDconst w [56]) mem))))))))
  8877  	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
  8878  	// result: (MOVDBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8879  	for {
  8880  		i7 := v.AuxInt
  8881  		s := v.Aux
  8882  		_ = v.Args[2]
  8883  		p := v.Args[0]
  8884  		w := v.Args[1]
  8885  		x0 := v.Args[2]
  8886  		if x0.Op != OpPPC64MOVBstore {
  8887  			break
  8888  		}
  8889  		i6 := x0.AuxInt
  8890  		if x0.Aux != s {
  8891  			break
  8892  		}
  8893  		_ = x0.Args[2]
  8894  		if p != x0.Args[0] {
  8895  			break
  8896  		}
  8897  		x0_1 := x0.Args[1]
  8898  		if x0_1.Op != OpPPC64SRDconst {
  8899  			break
  8900  		}
  8901  		if x0_1.AuxInt != 8 {
  8902  			break
  8903  		}
  8904  		if w != x0_1.Args[0] {
  8905  			break
  8906  		}
  8907  		x1 := x0.Args[2]
  8908  		if x1.Op != OpPPC64MOVBstore {
  8909  			break
  8910  		}
  8911  		i5 := x1.AuxInt
  8912  		if x1.Aux != s {
  8913  			break
  8914  		}
  8915  		_ = x1.Args[2]
  8916  		if p != x1.Args[0] {
  8917  			break
  8918  		}
  8919  		x1_1 := x1.Args[1]
  8920  		if x1_1.Op != OpPPC64SRDconst {
  8921  			break
  8922  		}
  8923  		if x1_1.AuxInt != 16 {
  8924  			break
  8925  		}
  8926  		if w != x1_1.Args[0] {
  8927  			break
  8928  		}
  8929  		x2 := x1.Args[2]
  8930  		if x2.Op != OpPPC64MOVBstore {
  8931  			break
  8932  		}
  8933  		i4 := x2.AuxInt
  8934  		if x2.Aux != s {
  8935  			break
  8936  		}
  8937  		_ = x2.Args[2]
  8938  		if p != x2.Args[0] {
  8939  			break
  8940  		}
  8941  		x2_1 := x2.Args[1]
  8942  		if x2_1.Op != OpPPC64SRDconst {
  8943  			break
  8944  		}
  8945  		if x2_1.AuxInt != 24 {
  8946  			break
  8947  		}
  8948  		if w != x2_1.Args[0] {
  8949  			break
  8950  		}
  8951  		x3 := x2.Args[2]
  8952  		if x3.Op != OpPPC64MOVBstore {
  8953  			break
  8954  		}
  8955  		i3 := x3.AuxInt
  8956  		if x3.Aux != s {
  8957  			break
  8958  		}
  8959  		_ = x3.Args[2]
  8960  		if p != x3.Args[0] {
  8961  			break
  8962  		}
  8963  		x3_1 := x3.Args[1]
  8964  		if x3_1.Op != OpPPC64SRDconst {
  8965  			break
  8966  		}
  8967  		if x3_1.AuxInt != 32 {
  8968  			break
  8969  		}
  8970  		if w != x3_1.Args[0] {
  8971  			break
  8972  		}
  8973  		x4 := x3.Args[2]
  8974  		if x4.Op != OpPPC64MOVBstore {
  8975  			break
  8976  		}
  8977  		i2 := x4.AuxInt
  8978  		if x4.Aux != s {
  8979  			break
  8980  		}
  8981  		_ = x4.Args[2]
  8982  		if p != x4.Args[0] {
  8983  			break
  8984  		}
  8985  		x4_1 := x4.Args[1]
  8986  		if x4_1.Op != OpPPC64SRDconst {
  8987  			break
  8988  		}
  8989  		if x4_1.AuxInt != 40 {
  8990  			break
  8991  		}
  8992  		if w != x4_1.Args[0] {
  8993  			break
  8994  		}
  8995  		x5 := x4.Args[2]
  8996  		if x5.Op != OpPPC64MOVBstore {
  8997  			break
  8998  		}
  8999  		i1 := x5.AuxInt
  9000  		if x5.Aux != s {
  9001  			break
  9002  		}
  9003  		_ = x5.Args[2]
  9004  		if p != x5.Args[0] {
  9005  			break
  9006  		}
  9007  		x5_1 := x5.Args[1]
  9008  		if x5_1.Op != OpPPC64SRDconst {
  9009  			break
  9010  		}
  9011  		if x5_1.AuxInt != 48 {
  9012  			break
  9013  		}
  9014  		if w != x5_1.Args[0] {
  9015  			break
  9016  		}
  9017  		x6 := x5.Args[2]
  9018  		if x6.Op != OpPPC64MOVBstore {
  9019  			break
  9020  		}
  9021  		i0 := x6.AuxInt
  9022  		if x6.Aux != s {
  9023  			break
  9024  		}
  9025  		_ = x6.Args[2]
  9026  		if p != x6.Args[0] {
  9027  			break
  9028  		}
  9029  		x6_1 := x6.Args[1]
  9030  		if x6_1.Op != OpPPC64SRDconst {
  9031  			break
  9032  		}
  9033  		if x6_1.AuxInt != 56 {
  9034  			break
  9035  		}
  9036  		if w != x6_1.Args[0] {
  9037  			break
  9038  		}
  9039  		mem := x6.Args[2]
  9040  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
  9041  			break
  9042  		}
  9043  		v.reset(OpPPC64MOVDBRstore)
  9044  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  9045  		v0.AuxInt = i0
  9046  		v0.Aux = s
  9047  		v0.AddArg(p)
  9048  		v.AddArg(v0)
  9049  		v.AddArg(w)
  9050  		v.AddArg(mem)
  9051  		return true
  9052  	}
  9053  	return false
  9054  }
  9055  func rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v *Value) bool {
  9056  	b := v.Block
  9057  	_ = b
  9058  	typ := &b.Func.Config.Types
  9059  	_ = typ
  9060  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
  9061  	// cond: is16Bit(c)
  9062  	// result: (MOVBstore [c] ptr val mem)
  9063  	for {
  9064  		_ = v.Args[3]
  9065  		ptr := v.Args[0]
  9066  		v_1 := v.Args[1]
  9067  		if v_1.Op != OpPPC64MOVDconst {
  9068  			break
  9069  		}
  9070  		c := v_1.AuxInt
  9071  		val := v.Args[2]
  9072  		mem := v.Args[3]
  9073  		if !(is16Bit(c)) {
  9074  			break
  9075  		}
  9076  		v.reset(OpPPC64MOVBstore)
  9077  		v.AuxInt = c
  9078  		v.AddArg(ptr)
  9079  		v.AddArg(val)
  9080  		v.AddArg(mem)
  9081  		return true
  9082  	}
  9083  	// match: (MOVBstoreidx (MOVDconst [c]) ptr val mem)
  9084  	// cond: is16Bit(c)
  9085  	// result: (MOVBstore [c] ptr val mem)
  9086  	for {
  9087  		_ = v.Args[3]
  9088  		v_0 := v.Args[0]
  9089  		if v_0.Op != OpPPC64MOVDconst {
  9090  			break
  9091  		}
  9092  		c := v_0.AuxInt
  9093  		ptr := v.Args[1]
  9094  		val := v.Args[2]
  9095  		mem := v.Args[3]
  9096  		if !(is16Bit(c)) {
  9097  			break
  9098  		}
  9099  		v.reset(OpPPC64MOVBstore)
  9100  		v.AuxInt = c
  9101  		v.AddArg(ptr)
  9102  		v.AddArg(val)
  9103  		v.AddArg(mem)
  9104  		return true
  9105  	}
  9106  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBreg x) mem)
  9107  	// cond:
  9108  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9109  	for {
  9110  		off := v.AuxInt
  9111  		sym := v.Aux
  9112  		_ = v.Args[3]
  9113  		ptr := v.Args[0]
  9114  		idx := v.Args[1]
  9115  		v_2 := v.Args[2]
  9116  		if v_2.Op != OpPPC64MOVBreg {
  9117  			break
  9118  		}
  9119  		x := v_2.Args[0]
  9120  		mem := v.Args[3]
  9121  		v.reset(OpPPC64MOVBstoreidx)
  9122  		v.AuxInt = off
  9123  		v.Aux = sym
  9124  		v.AddArg(ptr)
  9125  		v.AddArg(idx)
  9126  		v.AddArg(x)
  9127  		v.AddArg(mem)
  9128  		return true
  9129  	}
  9130  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBZreg x) mem)
  9131  	// cond:
  9132  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9133  	for {
  9134  		off := v.AuxInt
  9135  		sym := v.Aux
  9136  		_ = v.Args[3]
  9137  		ptr := v.Args[0]
  9138  		idx := v.Args[1]
  9139  		v_2 := v.Args[2]
  9140  		if v_2.Op != OpPPC64MOVBZreg {
  9141  			break
  9142  		}
  9143  		x := v_2.Args[0]
  9144  		mem := v.Args[3]
  9145  		v.reset(OpPPC64MOVBstoreidx)
  9146  		v.AuxInt = off
  9147  		v.Aux = sym
  9148  		v.AddArg(ptr)
  9149  		v.AddArg(idx)
  9150  		v.AddArg(x)
  9151  		v.AddArg(mem)
  9152  		return true
  9153  	}
  9154  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
  9155  	// cond:
  9156  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9157  	for {
  9158  		off := v.AuxInt
  9159  		sym := v.Aux
  9160  		_ = v.Args[3]
  9161  		ptr := v.Args[0]
  9162  		idx := v.Args[1]
  9163  		v_2 := v.Args[2]
  9164  		if v_2.Op != OpPPC64MOVHreg {
  9165  			break
  9166  		}
  9167  		x := v_2.Args[0]
  9168  		mem := v.Args[3]
  9169  		v.reset(OpPPC64MOVBstoreidx)
  9170  		v.AuxInt = off
  9171  		v.Aux = sym
  9172  		v.AddArg(ptr)
  9173  		v.AddArg(idx)
  9174  		v.AddArg(x)
  9175  		v.AddArg(mem)
  9176  		return true
  9177  	}
  9178  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
  9179  	// cond:
  9180  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9181  	for {
  9182  		off := v.AuxInt
  9183  		sym := v.Aux
  9184  		_ = v.Args[3]
  9185  		ptr := v.Args[0]
  9186  		idx := v.Args[1]
  9187  		v_2 := v.Args[2]
  9188  		if v_2.Op != OpPPC64MOVHZreg {
  9189  			break
  9190  		}
  9191  		x := v_2.Args[0]
  9192  		mem := v.Args[3]
  9193  		v.reset(OpPPC64MOVBstoreidx)
  9194  		v.AuxInt = off
  9195  		v.Aux = sym
  9196  		v.AddArg(ptr)
  9197  		v.AddArg(idx)
  9198  		v.AddArg(x)
  9199  		v.AddArg(mem)
  9200  		return true
  9201  	}
  9202  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
  9203  	// cond:
  9204  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9205  	for {
  9206  		off := v.AuxInt
  9207  		sym := v.Aux
  9208  		_ = v.Args[3]
  9209  		ptr := v.Args[0]
  9210  		idx := v.Args[1]
  9211  		v_2 := v.Args[2]
  9212  		if v_2.Op != OpPPC64MOVWreg {
  9213  			break
  9214  		}
  9215  		x := v_2.Args[0]
  9216  		mem := v.Args[3]
  9217  		v.reset(OpPPC64MOVBstoreidx)
  9218  		v.AuxInt = off
  9219  		v.Aux = sym
  9220  		v.AddArg(ptr)
  9221  		v.AddArg(idx)
  9222  		v.AddArg(x)
  9223  		v.AddArg(mem)
  9224  		return true
  9225  	}
  9226  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
  9227  	// cond:
  9228  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9229  	for {
  9230  		off := v.AuxInt
  9231  		sym := v.Aux
  9232  		_ = v.Args[3]
  9233  		ptr := v.Args[0]
  9234  		idx := v.Args[1]
  9235  		v_2 := v.Args[2]
  9236  		if v_2.Op != OpPPC64MOVWZreg {
  9237  			break
  9238  		}
  9239  		x := v_2.Args[0]
  9240  		mem := v.Args[3]
  9241  		v.reset(OpPPC64MOVBstoreidx)
  9242  		v.AuxInt = off
  9243  		v.Aux = sym
  9244  		v.AddArg(ptr)
  9245  		v.AddArg(idx)
  9246  		v.AddArg(x)
  9247  		v.AddArg(mem)
  9248  		return true
  9249  	}
  9250  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHreg x) [c]) mem)
  9251  	// cond: c <= 8
  9252  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9253  	for {
  9254  		off := v.AuxInt
  9255  		sym := v.Aux
  9256  		_ = v.Args[3]
  9257  		ptr := v.Args[0]
  9258  		idx := v.Args[1]
  9259  		v_2 := v.Args[2]
  9260  		if v_2.Op != OpPPC64SRWconst {
  9261  			break
  9262  		}
  9263  		c := v_2.AuxInt
  9264  		v_2_0 := v_2.Args[0]
  9265  		if v_2_0.Op != OpPPC64MOVHreg {
  9266  			break
  9267  		}
  9268  		x := v_2_0.Args[0]
  9269  		mem := v.Args[3]
  9270  		if !(c <= 8) {
  9271  			break
  9272  		}
  9273  		v.reset(OpPPC64MOVBstoreidx)
  9274  		v.AuxInt = off
  9275  		v.Aux = sym
  9276  		v.AddArg(ptr)
  9277  		v.AddArg(idx)
  9278  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9279  		v0.AuxInt = c
  9280  		v0.AddArg(x)
  9281  		v.AddArg(v0)
  9282  		v.AddArg(mem)
  9283  		return true
  9284  	}
  9285  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHZreg x) [c]) mem)
  9286  	// cond: c <= 8
  9287  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9288  	for {
  9289  		off := v.AuxInt
  9290  		sym := v.Aux
  9291  		_ = v.Args[3]
  9292  		ptr := v.Args[0]
  9293  		idx := v.Args[1]
  9294  		v_2 := v.Args[2]
  9295  		if v_2.Op != OpPPC64SRWconst {
  9296  			break
  9297  		}
  9298  		c := v_2.AuxInt
  9299  		v_2_0 := v_2.Args[0]
  9300  		if v_2_0.Op != OpPPC64MOVHZreg {
  9301  			break
  9302  		}
  9303  		x := v_2_0.Args[0]
  9304  		mem := v.Args[3]
  9305  		if !(c <= 8) {
  9306  			break
  9307  		}
  9308  		v.reset(OpPPC64MOVBstoreidx)
  9309  		v.AuxInt = off
  9310  		v.Aux = sym
  9311  		v.AddArg(ptr)
  9312  		v.AddArg(idx)
  9313  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9314  		v0.AuxInt = c
  9315  		v0.AddArg(x)
  9316  		v.AddArg(v0)
  9317  		v.AddArg(mem)
  9318  		return true
  9319  	}
  9320  	return false
  9321  }
  9322  func rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v *Value) bool {
  9323  	b := v.Block
  9324  	_ = b
  9325  	typ := &b.Func.Config.Types
  9326  	_ = typ
  9327  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWreg x) [c]) mem)
  9328  	// cond: c <= 24
  9329  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9330  	for {
  9331  		off := v.AuxInt
  9332  		sym := v.Aux
  9333  		_ = v.Args[3]
  9334  		ptr := v.Args[0]
  9335  		idx := v.Args[1]
  9336  		v_2 := v.Args[2]
  9337  		if v_2.Op != OpPPC64SRWconst {
  9338  			break
  9339  		}
  9340  		c := v_2.AuxInt
  9341  		v_2_0 := v_2.Args[0]
  9342  		if v_2_0.Op != OpPPC64MOVWreg {
  9343  			break
  9344  		}
  9345  		x := v_2_0.Args[0]
  9346  		mem := v.Args[3]
  9347  		if !(c <= 24) {
  9348  			break
  9349  		}
  9350  		v.reset(OpPPC64MOVBstoreidx)
  9351  		v.AuxInt = off
  9352  		v.Aux = sym
  9353  		v.AddArg(ptr)
  9354  		v.AddArg(idx)
  9355  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9356  		v0.AuxInt = c
  9357  		v0.AddArg(x)
  9358  		v.AddArg(v0)
  9359  		v.AddArg(mem)
  9360  		return true
  9361  	}
  9362  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWZreg x) [c]) mem)
  9363  	// cond: c <= 24
  9364  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9365  	for {
  9366  		off := v.AuxInt
  9367  		sym := v.Aux
  9368  		_ = v.Args[3]
  9369  		ptr := v.Args[0]
  9370  		idx := v.Args[1]
  9371  		v_2 := v.Args[2]
  9372  		if v_2.Op != OpPPC64SRWconst {
  9373  			break
  9374  		}
  9375  		c := v_2.AuxInt
  9376  		v_2_0 := v_2.Args[0]
  9377  		if v_2_0.Op != OpPPC64MOVWZreg {
  9378  			break
  9379  		}
  9380  		x := v_2_0.Args[0]
  9381  		mem := v.Args[3]
  9382  		if !(c <= 24) {
  9383  			break
  9384  		}
  9385  		v.reset(OpPPC64MOVBstoreidx)
  9386  		v.AuxInt = off
  9387  		v.Aux = sym
  9388  		v.AddArg(ptr)
  9389  		v.AddArg(idx)
  9390  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9391  		v0.AuxInt = c
  9392  		v0.AddArg(x)
  9393  		v.AddArg(v0)
  9394  		v.AddArg(mem)
  9395  		return true
  9396  	}
  9397  	return false
  9398  }
  9399  func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
  9400  	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9401  	// cond: is16Bit(off1+off2)
  9402  	// result: (MOVBstorezero [off1+off2] {sym} x mem)
  9403  	for {
  9404  		off1 := v.AuxInt
  9405  		sym := v.Aux
  9406  		_ = v.Args[1]
  9407  		v_0 := v.Args[0]
  9408  		if v_0.Op != OpPPC64ADDconst {
  9409  			break
  9410  		}
  9411  		off2 := v_0.AuxInt
  9412  		x := v_0.Args[0]
  9413  		mem := v.Args[1]
  9414  		if !(is16Bit(off1 + off2)) {
  9415  			break
  9416  		}
  9417  		v.reset(OpPPC64MOVBstorezero)
  9418  		v.AuxInt = off1 + off2
  9419  		v.Aux = sym
  9420  		v.AddArg(x)
  9421  		v.AddArg(mem)
  9422  		return true
  9423  	}
  9424  	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9425  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9426  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9427  	for {
  9428  		off1 := v.AuxInt
  9429  		sym1 := v.Aux
  9430  		_ = v.Args[1]
  9431  		p := v.Args[0]
  9432  		if p.Op != OpPPC64MOVDaddr {
  9433  			break
  9434  		}
  9435  		off2 := p.AuxInt
  9436  		sym2 := p.Aux
  9437  		x := p.Args[0]
  9438  		mem := v.Args[1]
  9439  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9440  			break
  9441  		}
  9442  		v.reset(OpPPC64MOVBstorezero)
  9443  		v.AuxInt = off1 + off2
  9444  		v.Aux = mergeSym(sym1, sym2)
  9445  		v.AddArg(x)
  9446  		v.AddArg(mem)
  9447  		return true
  9448  	}
  9449  	return false
  9450  }
  9451  func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
  9452  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
  9453  	// cond:
  9454  	// result: (MFVSRD x)
  9455  	for {
  9456  		off := v.AuxInt
  9457  		sym := v.Aux
  9458  		_ = v.Args[1]
  9459  		ptr := v.Args[0]
  9460  		v_1 := v.Args[1]
  9461  		if v_1.Op != OpPPC64FMOVDstore {
  9462  			break
  9463  		}
  9464  		if v_1.AuxInt != off {
  9465  			break
  9466  		}
  9467  		if v_1.Aux != sym {
  9468  			break
  9469  		}
  9470  		_ = v_1.Args[2]
  9471  		if ptr != v_1.Args[0] {
  9472  			break
  9473  		}
  9474  		x := v_1.Args[1]
  9475  		v.reset(OpPPC64MFVSRD)
  9476  		v.AddArg(x)
  9477  		return true
  9478  	}
  9479  	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9480  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9481  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9482  	for {
  9483  		off1 := v.AuxInt
  9484  		sym1 := v.Aux
  9485  		_ = v.Args[1]
  9486  		p := v.Args[0]
  9487  		if p.Op != OpPPC64MOVDaddr {
  9488  			break
  9489  		}
  9490  		off2 := p.AuxInt
  9491  		sym2 := p.Aux
  9492  		ptr := p.Args[0]
  9493  		mem := v.Args[1]
  9494  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9495  			break
  9496  		}
  9497  		v.reset(OpPPC64MOVDload)
  9498  		v.AuxInt = off1 + off2
  9499  		v.Aux = mergeSym(sym1, sym2)
  9500  		v.AddArg(ptr)
  9501  		v.AddArg(mem)
  9502  		return true
  9503  	}
  9504  	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
  9505  	// cond: is16Bit(off1+off2)
  9506  	// result: (MOVDload [off1+off2] {sym} x mem)
  9507  	for {
  9508  		off1 := v.AuxInt
  9509  		sym := v.Aux
  9510  		_ = v.Args[1]
  9511  		v_0 := v.Args[0]
  9512  		if v_0.Op != OpPPC64ADDconst {
  9513  			break
  9514  		}
  9515  		off2 := v_0.AuxInt
  9516  		x := v_0.Args[0]
  9517  		mem := v.Args[1]
  9518  		if !(is16Bit(off1 + off2)) {
  9519  			break
  9520  		}
  9521  		v.reset(OpPPC64MOVDload)
  9522  		v.AuxInt = off1 + off2
  9523  		v.Aux = sym
  9524  		v.AddArg(x)
  9525  		v.AddArg(mem)
  9526  		return true
  9527  	}
  9528  	// match: (MOVDload [0] {sym} p:(ADD ptr idx) mem)
  9529  	// cond: sym == nil && p.Uses == 1
  9530  	// result: (MOVDloadidx ptr idx mem)
  9531  	for {
  9532  		if v.AuxInt != 0 {
  9533  			break
  9534  		}
  9535  		sym := v.Aux
  9536  		_ = v.Args[1]
  9537  		p := v.Args[0]
  9538  		if p.Op != OpPPC64ADD {
  9539  			break
  9540  		}
  9541  		_ = p.Args[1]
  9542  		ptr := p.Args[0]
  9543  		idx := p.Args[1]
  9544  		mem := v.Args[1]
  9545  		if !(sym == nil && p.Uses == 1) {
  9546  			break
  9547  		}
  9548  		v.reset(OpPPC64MOVDloadidx)
  9549  		v.AddArg(ptr)
  9550  		v.AddArg(idx)
  9551  		v.AddArg(mem)
  9552  		return true
  9553  	}
  9554  	return false
  9555  }
  9556  func rewriteValuePPC64_OpPPC64MOVDloadidx_0(v *Value) bool {
  9557  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
  9558  	// cond: is16Bit(c)
  9559  	// result: (MOVDload [c] ptr mem)
  9560  	for {
  9561  		_ = v.Args[2]
  9562  		ptr := v.Args[0]
  9563  		v_1 := v.Args[1]
  9564  		if v_1.Op != OpPPC64MOVDconst {
  9565  			break
  9566  		}
  9567  		c := v_1.AuxInt
  9568  		mem := v.Args[2]
  9569  		if !(is16Bit(c)) {
  9570  			break
  9571  		}
  9572  		v.reset(OpPPC64MOVDload)
  9573  		v.AuxInt = c
  9574  		v.AddArg(ptr)
  9575  		v.AddArg(mem)
  9576  		return true
  9577  	}
  9578  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
  9579  	// cond: is16Bit(c)
  9580  	// result: (MOVDload [c] ptr mem)
  9581  	for {
  9582  		_ = v.Args[2]
  9583  		v_0 := v.Args[0]
  9584  		if v_0.Op != OpPPC64MOVDconst {
  9585  			break
  9586  		}
  9587  		c := v_0.AuxInt
  9588  		ptr := v.Args[1]
  9589  		mem := v.Args[2]
  9590  		if !(is16Bit(c)) {
  9591  			break
  9592  		}
  9593  		v.reset(OpPPC64MOVDload)
  9594  		v.AuxInt = c
  9595  		v.AddArg(ptr)
  9596  		v.AddArg(mem)
  9597  		return true
  9598  	}
  9599  	return false
  9600  }
  9601  func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
  9602  	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
  9603  	// cond:
  9604  	// result: (FMOVDstore [off] {sym} ptr x mem)
  9605  	for {
  9606  		off := v.AuxInt
  9607  		sym := v.Aux
  9608  		_ = v.Args[2]
  9609  		ptr := v.Args[0]
  9610  		v_1 := v.Args[1]
  9611  		if v_1.Op != OpPPC64MFVSRD {
  9612  			break
  9613  		}
  9614  		x := v_1.Args[0]
  9615  		mem := v.Args[2]
  9616  		v.reset(OpPPC64FMOVDstore)
  9617  		v.AuxInt = off
  9618  		v.Aux = sym
  9619  		v.AddArg(ptr)
  9620  		v.AddArg(x)
  9621  		v.AddArg(mem)
  9622  		return true
  9623  	}
  9624  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
  9625  	// cond: is16Bit(off1+off2)
  9626  	// result: (MOVDstore [off1+off2] {sym} x val mem)
  9627  	for {
  9628  		off1 := v.AuxInt
  9629  		sym := v.Aux
  9630  		_ = v.Args[2]
  9631  		v_0 := v.Args[0]
  9632  		if v_0.Op != OpPPC64ADDconst {
  9633  			break
  9634  		}
  9635  		off2 := v_0.AuxInt
  9636  		x := v_0.Args[0]
  9637  		val := v.Args[1]
  9638  		mem := v.Args[2]
  9639  		if !(is16Bit(off1 + off2)) {
  9640  			break
  9641  		}
  9642  		v.reset(OpPPC64MOVDstore)
  9643  		v.AuxInt = off1 + off2
  9644  		v.Aux = sym
  9645  		v.AddArg(x)
  9646  		v.AddArg(val)
  9647  		v.AddArg(mem)
  9648  		return true
  9649  	}
  9650  	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  9651  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9652  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9653  	for {
  9654  		off1 := v.AuxInt
  9655  		sym1 := v.Aux
  9656  		_ = v.Args[2]
  9657  		p := v.Args[0]
  9658  		if p.Op != OpPPC64MOVDaddr {
  9659  			break
  9660  		}
  9661  		off2 := p.AuxInt
  9662  		sym2 := p.Aux
  9663  		ptr := p.Args[0]
  9664  		val := v.Args[1]
  9665  		mem := v.Args[2]
  9666  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9667  			break
  9668  		}
  9669  		v.reset(OpPPC64MOVDstore)
  9670  		v.AuxInt = off1 + off2
  9671  		v.Aux = mergeSym(sym1, sym2)
  9672  		v.AddArg(ptr)
  9673  		v.AddArg(val)
  9674  		v.AddArg(mem)
  9675  		return true
  9676  	}
  9677  	// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
  9678  	// cond:
  9679  	// result: (MOVDstorezero [off] {sym} ptr mem)
  9680  	for {
  9681  		off := v.AuxInt
  9682  		sym := v.Aux
  9683  		_ = v.Args[2]
  9684  		ptr := v.Args[0]
  9685  		v_1 := v.Args[1]
  9686  		if v_1.Op != OpPPC64MOVDconst {
  9687  			break
  9688  		}
  9689  		if v_1.AuxInt != 0 {
  9690  			break
  9691  		}
  9692  		mem := v.Args[2]
  9693  		v.reset(OpPPC64MOVDstorezero)
  9694  		v.AuxInt = off
  9695  		v.Aux = sym
  9696  		v.AddArg(ptr)
  9697  		v.AddArg(mem)
  9698  		return true
  9699  	}
  9700  	// match: (MOVDstore [off] {sym} p:(ADD ptr idx) val mem)
  9701  	// cond: off == 0 && sym == nil && p.Uses == 1
  9702  	// result: (MOVDstoreidx ptr idx val mem)
  9703  	for {
  9704  		off := v.AuxInt
  9705  		sym := v.Aux
  9706  		_ = v.Args[2]
  9707  		p := v.Args[0]
  9708  		if p.Op != OpPPC64ADD {
  9709  			break
  9710  		}
  9711  		_ = p.Args[1]
  9712  		ptr := p.Args[0]
  9713  		idx := p.Args[1]
  9714  		val := v.Args[1]
  9715  		mem := v.Args[2]
  9716  		if !(off == 0 && sym == nil && p.Uses == 1) {
  9717  			break
  9718  		}
  9719  		v.reset(OpPPC64MOVDstoreidx)
  9720  		v.AddArg(ptr)
  9721  		v.AddArg(idx)
  9722  		v.AddArg(val)
  9723  		v.AddArg(mem)
  9724  		return true
  9725  	}
  9726  	return false
  9727  }
  9728  func rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v *Value) bool {
  9729  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
  9730  	// cond: is16Bit(c)
  9731  	// result: (MOVDstore [c] ptr val mem)
  9732  	for {
  9733  		_ = v.Args[3]
  9734  		ptr := v.Args[0]
  9735  		v_1 := v.Args[1]
  9736  		if v_1.Op != OpPPC64MOVDconst {
  9737  			break
  9738  		}
  9739  		c := v_1.AuxInt
  9740  		val := v.Args[2]
  9741  		mem := v.Args[3]
  9742  		if !(is16Bit(c)) {
  9743  			break
  9744  		}
  9745  		v.reset(OpPPC64MOVDstore)
  9746  		v.AuxInt = c
  9747  		v.AddArg(ptr)
  9748  		v.AddArg(val)
  9749  		v.AddArg(mem)
  9750  		return true
  9751  	}
  9752  	// match: (MOVDstoreidx (MOVDconst [c]) ptr val mem)
  9753  	// cond: is16Bit(c)
  9754  	// result: (MOVDstore [c] ptr val mem)
  9755  	for {
  9756  		_ = v.Args[3]
  9757  		v_0 := v.Args[0]
  9758  		if v_0.Op != OpPPC64MOVDconst {
  9759  			break
  9760  		}
  9761  		c := v_0.AuxInt
  9762  		ptr := v.Args[1]
  9763  		val := v.Args[2]
  9764  		mem := v.Args[3]
  9765  		if !(is16Bit(c)) {
  9766  			break
  9767  		}
  9768  		v.reset(OpPPC64MOVDstore)
  9769  		v.AuxInt = c
  9770  		v.AddArg(ptr)
  9771  		v.AddArg(val)
  9772  		v.AddArg(mem)
  9773  		return true
  9774  	}
  9775  	return false
  9776  }
  9777  func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
  9778  	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9779  	// cond: is16Bit(off1+off2)
  9780  	// result: (MOVDstorezero [off1+off2] {sym} x mem)
  9781  	for {
  9782  		off1 := v.AuxInt
  9783  		sym := v.Aux
  9784  		_ = v.Args[1]
  9785  		v_0 := v.Args[0]
  9786  		if v_0.Op != OpPPC64ADDconst {
  9787  			break
  9788  		}
  9789  		off2 := v_0.AuxInt
  9790  		x := v_0.Args[0]
  9791  		mem := v.Args[1]
  9792  		if !(is16Bit(off1 + off2)) {
  9793  			break
  9794  		}
  9795  		v.reset(OpPPC64MOVDstorezero)
  9796  		v.AuxInt = off1 + off2
  9797  		v.Aux = sym
  9798  		v.AddArg(x)
  9799  		v.AddArg(mem)
  9800  		return true
  9801  	}
  9802  	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9803  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9804  	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9805  	for {
  9806  		off1 := v.AuxInt
  9807  		sym1 := v.Aux
  9808  		_ = v.Args[1]
  9809  		p := v.Args[0]
  9810  		if p.Op != OpPPC64MOVDaddr {
  9811  			break
  9812  		}
  9813  		off2 := p.AuxInt
  9814  		sym2 := p.Aux
  9815  		x := p.Args[0]
  9816  		mem := v.Args[1]
  9817  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9818  			break
  9819  		}
  9820  		v.reset(OpPPC64MOVDstorezero)
  9821  		v.AuxInt = off1 + off2
  9822  		v.Aux = mergeSym(sym1, sym2)
  9823  		v.AddArg(x)
  9824  		v.AddArg(mem)
  9825  		return true
  9826  	}
  9827  	return false
  9828  }
  9829  func rewriteValuePPC64_OpPPC64MOVHBRstore_0(v *Value) bool {
  9830  	// match: (MOVHBRstore {sym} ptr (MOVHreg x) mem)
  9831  	// cond:
  9832  	// result: (MOVHBRstore {sym} ptr x mem)
  9833  	for {
  9834  		sym := v.Aux
  9835  		_ = v.Args[2]
  9836  		ptr := v.Args[0]
  9837  		v_1 := v.Args[1]
  9838  		if v_1.Op != OpPPC64MOVHreg {
  9839  			break
  9840  		}
  9841  		x := v_1.Args[0]
  9842  		mem := v.Args[2]
  9843  		v.reset(OpPPC64MOVHBRstore)
  9844  		v.Aux = sym
  9845  		v.AddArg(ptr)
  9846  		v.AddArg(x)
  9847  		v.AddArg(mem)
  9848  		return true
  9849  	}
  9850  	// match: (MOVHBRstore {sym} ptr (MOVHZreg x) mem)
  9851  	// cond:
  9852  	// result: (MOVHBRstore {sym} ptr x mem)
  9853  	for {
  9854  		sym := v.Aux
  9855  		_ = v.Args[2]
  9856  		ptr := v.Args[0]
  9857  		v_1 := v.Args[1]
  9858  		if v_1.Op != OpPPC64MOVHZreg {
  9859  			break
  9860  		}
  9861  		x := v_1.Args[0]
  9862  		mem := v.Args[2]
  9863  		v.reset(OpPPC64MOVHBRstore)
  9864  		v.Aux = sym
  9865  		v.AddArg(ptr)
  9866  		v.AddArg(x)
  9867  		v.AddArg(mem)
  9868  		return true
  9869  	}
  9870  	// match: (MOVHBRstore {sym} ptr (MOVWreg x) mem)
  9871  	// cond:
  9872  	// result: (MOVHBRstore {sym} ptr x mem)
  9873  	for {
  9874  		sym := v.Aux
  9875  		_ = v.Args[2]
  9876  		ptr := v.Args[0]
  9877  		v_1 := v.Args[1]
  9878  		if v_1.Op != OpPPC64MOVWreg {
  9879  			break
  9880  		}
  9881  		x := v_1.Args[0]
  9882  		mem := v.Args[2]
  9883  		v.reset(OpPPC64MOVHBRstore)
  9884  		v.Aux = sym
  9885  		v.AddArg(ptr)
  9886  		v.AddArg(x)
  9887  		v.AddArg(mem)
  9888  		return true
  9889  	}
  9890  	// match: (MOVHBRstore {sym} ptr (MOVWZreg x) mem)
  9891  	// cond:
  9892  	// result: (MOVHBRstore {sym} ptr x mem)
  9893  	for {
  9894  		sym := v.Aux
  9895  		_ = v.Args[2]
  9896  		ptr := v.Args[0]
  9897  		v_1 := v.Args[1]
  9898  		if v_1.Op != OpPPC64MOVWZreg {
  9899  			break
  9900  		}
  9901  		x := v_1.Args[0]
  9902  		mem := v.Args[2]
  9903  		v.reset(OpPPC64MOVHBRstore)
  9904  		v.Aux = sym
  9905  		v.AddArg(ptr)
  9906  		v.AddArg(x)
  9907  		v.AddArg(mem)
  9908  		return true
  9909  	}
  9910  	return false
  9911  }
  9912  func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
  9913  	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9914  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9915  	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9916  	for {
  9917  		off1 := v.AuxInt
  9918  		sym1 := v.Aux
  9919  		_ = v.Args[1]
  9920  		p := v.Args[0]
  9921  		if p.Op != OpPPC64MOVDaddr {
  9922  			break
  9923  		}
  9924  		off2 := p.AuxInt
  9925  		sym2 := p.Aux
  9926  		ptr := p.Args[0]
  9927  		mem := v.Args[1]
  9928  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9929  			break
  9930  		}
  9931  		v.reset(OpPPC64MOVHZload)
  9932  		v.AuxInt = off1 + off2
  9933  		v.Aux = mergeSym(sym1, sym2)
  9934  		v.AddArg(ptr)
  9935  		v.AddArg(mem)
  9936  		return true
  9937  	}
  9938  	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
  9939  	// cond: is16Bit(off1+off2)
  9940  	// result: (MOVHZload [off1+off2] {sym} x mem)
  9941  	for {
  9942  		off1 := v.AuxInt
  9943  		sym := v.Aux
  9944  		_ = v.Args[1]
  9945  		v_0 := v.Args[0]
  9946  		if v_0.Op != OpPPC64ADDconst {
  9947  			break
  9948  		}
  9949  		off2 := v_0.AuxInt
  9950  		x := v_0.Args[0]
  9951  		mem := v.Args[1]
  9952  		if !(is16Bit(off1 + off2)) {
  9953  			break
  9954  		}
  9955  		v.reset(OpPPC64MOVHZload)
  9956  		v.AuxInt = off1 + off2
  9957  		v.Aux = sym
  9958  		v.AddArg(x)
  9959  		v.AddArg(mem)
  9960  		return true
  9961  	}
  9962  	// match: (MOVHZload [0] {sym} p:(ADD ptr idx) mem)
  9963  	// cond: sym == nil && p.Uses == 1
  9964  	// result: (MOVHZloadidx ptr idx mem)
  9965  	for {
  9966  		if v.AuxInt != 0 {
  9967  			break
  9968  		}
  9969  		sym := v.Aux
  9970  		_ = v.Args[1]
  9971  		p := v.Args[0]
  9972  		if p.Op != OpPPC64ADD {
  9973  			break
  9974  		}
  9975  		_ = p.Args[1]
  9976  		ptr := p.Args[0]
  9977  		idx := p.Args[1]
  9978  		mem := v.Args[1]
  9979  		if !(sym == nil && p.Uses == 1) {
  9980  			break
  9981  		}
  9982  		v.reset(OpPPC64MOVHZloadidx)
  9983  		v.AddArg(ptr)
  9984  		v.AddArg(idx)
  9985  		v.AddArg(mem)
  9986  		return true
  9987  	}
  9988  	return false
  9989  }
  9990  func rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v *Value) bool {
  9991  	// match: (MOVHZloadidx ptr (MOVDconst [c]) mem)
  9992  	// cond: is16Bit(c)
  9993  	// result: (MOVHZload [c] ptr mem)
  9994  	for {
  9995  		_ = v.Args[2]
  9996  		ptr := v.Args[0]
  9997  		v_1 := v.Args[1]
  9998  		if v_1.Op != OpPPC64MOVDconst {
  9999  			break
 10000  		}
 10001  		c := v_1.AuxInt
 10002  		mem := v.Args[2]
 10003  		if !(is16Bit(c)) {
 10004  			break
 10005  		}
 10006  		v.reset(OpPPC64MOVHZload)
 10007  		v.AuxInt = c
 10008  		v.AddArg(ptr)
 10009  		v.AddArg(mem)
 10010  		return true
 10011  	}
 10012  	// match: (MOVHZloadidx (MOVDconst [c]) ptr mem)
 10013  	// cond: is16Bit(c)
 10014  	// result: (MOVHZload [c] ptr mem)
 10015  	for {
 10016  		_ = v.Args[2]
 10017  		v_0 := v.Args[0]
 10018  		if v_0.Op != OpPPC64MOVDconst {
 10019  			break
 10020  		}
 10021  		c := v_0.AuxInt
 10022  		ptr := v.Args[1]
 10023  		mem := v.Args[2]
 10024  		if !(is16Bit(c)) {
 10025  			break
 10026  		}
 10027  		v.reset(OpPPC64MOVHZload)
 10028  		v.AuxInt = c
 10029  		v.AddArg(ptr)
 10030  		v.AddArg(mem)
 10031  		return true
 10032  	}
 10033  	return false
 10034  }
 10035  func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
 10036  	b := v.Block
 10037  	_ = b
 10038  	typ := &b.Func.Config.Types
 10039  	_ = typ
 10040  	// match: (MOVHZreg y:(ANDconst [c] _))
 10041  	// cond: uint64(c) <= 0xFFFF
 10042  	// result: y
 10043  	for {
 10044  		y := v.Args[0]
 10045  		if y.Op != OpPPC64ANDconst {
 10046  			break
 10047  		}
 10048  		c := y.AuxInt
 10049  		if !(uint64(c) <= 0xFFFF) {
 10050  			break
 10051  		}
 10052  		v.reset(OpCopy)
 10053  		v.Type = y.Type
 10054  		v.AddArg(y)
 10055  		return true
 10056  	}
 10057  	// match: (MOVHZreg (SRWconst [c] (MOVBZreg x)))
 10058  	// cond:
 10059  	// result: (SRWconst [c] (MOVBZreg x))
 10060  	for {
 10061  		v_0 := v.Args[0]
 10062  		if v_0.Op != OpPPC64SRWconst {
 10063  			break
 10064  		}
 10065  		c := v_0.AuxInt
 10066  		v_0_0 := v_0.Args[0]
 10067  		if v_0_0.Op != OpPPC64MOVBZreg {
 10068  			break
 10069  		}
 10070  		x := v_0_0.Args[0]
 10071  		v.reset(OpPPC64SRWconst)
 10072  		v.AuxInt = c
 10073  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 10074  		v0.AddArg(x)
 10075  		v.AddArg(v0)
 10076  		return true
 10077  	}
 10078  	// match: (MOVHZreg (SRWconst [c] (MOVHZreg x)))
 10079  	// cond:
 10080  	// result: (SRWconst [c] (MOVHZreg x))
 10081  	for {
 10082  		v_0 := v.Args[0]
 10083  		if v_0.Op != OpPPC64SRWconst {
 10084  			break
 10085  		}
 10086  		c := v_0.AuxInt
 10087  		v_0_0 := v_0.Args[0]
 10088  		if v_0_0.Op != OpPPC64MOVHZreg {
 10089  			break
 10090  		}
 10091  		x := v_0_0.Args[0]
 10092  		v.reset(OpPPC64SRWconst)
 10093  		v.AuxInt = c
 10094  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 10095  		v0.AddArg(x)
 10096  		v.AddArg(v0)
 10097  		return true
 10098  	}
 10099  	// match: (MOVHZreg (SRWconst [c] x))
 10100  	// cond: sizeof(x.Type) <= 16
 10101  	// result: (SRWconst [c] x)
 10102  	for {
 10103  		v_0 := v.Args[0]
 10104  		if v_0.Op != OpPPC64SRWconst {
 10105  			break
 10106  		}
 10107  		c := v_0.AuxInt
 10108  		x := v_0.Args[0]
 10109  		if !(sizeof(x.Type) <= 16) {
 10110  			break
 10111  		}
 10112  		v.reset(OpPPC64SRWconst)
 10113  		v.AuxInt = c
 10114  		v.AddArg(x)
 10115  		return true
 10116  	}
 10117  	// match: (MOVHZreg (SRDconst [c] x))
 10118  	// cond: c>=48
 10119  	// result: (SRDconst [c] x)
 10120  	for {
 10121  		v_0 := v.Args[0]
 10122  		if v_0.Op != OpPPC64SRDconst {
 10123  			break
 10124  		}
 10125  		c := v_0.AuxInt
 10126  		x := v_0.Args[0]
 10127  		if !(c >= 48) {
 10128  			break
 10129  		}
 10130  		v.reset(OpPPC64SRDconst)
 10131  		v.AuxInt = c
 10132  		v.AddArg(x)
 10133  		return true
 10134  	}
 10135  	// match: (MOVHZreg (SRWconst [c] x))
 10136  	// cond: c>=16
 10137  	// result: (SRWconst [c] x)
 10138  	for {
 10139  		v_0 := v.Args[0]
 10140  		if v_0.Op != OpPPC64SRWconst {
 10141  			break
 10142  		}
 10143  		c := v_0.AuxInt
 10144  		x := v_0.Args[0]
 10145  		if !(c >= 16) {
 10146  			break
 10147  		}
 10148  		v.reset(OpPPC64SRWconst)
 10149  		v.AuxInt = c
 10150  		v.AddArg(x)
 10151  		return true
 10152  	}
 10153  	// match: (MOVHZreg y:(MOVHZreg _))
 10154  	// cond:
 10155  	// result: y
 10156  	for {
 10157  		y := v.Args[0]
 10158  		if y.Op != OpPPC64MOVHZreg {
 10159  			break
 10160  		}
 10161  		v.reset(OpCopy)
 10162  		v.Type = y.Type
 10163  		v.AddArg(y)
 10164  		return true
 10165  	}
 10166  	// match: (MOVHZreg y:(MOVBZreg _))
 10167  	// cond:
 10168  	// result: y
 10169  	for {
 10170  		y := v.Args[0]
 10171  		if y.Op != OpPPC64MOVBZreg {
 10172  			break
 10173  		}
 10174  		v.reset(OpCopy)
 10175  		v.Type = y.Type
 10176  		v.AddArg(y)
 10177  		return true
 10178  	}
 10179  	// match: (MOVHZreg y:(MOVHBRload _ _))
 10180  	// cond:
 10181  	// result: y
 10182  	for {
 10183  		y := v.Args[0]
 10184  		if y.Op != OpPPC64MOVHBRload {
 10185  			break
 10186  		}
 10187  		_ = y.Args[1]
 10188  		v.reset(OpCopy)
 10189  		v.Type = y.Type
 10190  		v.AddArg(y)
 10191  		return true
 10192  	}
 10193  	// match: (MOVHZreg y:(MOVHreg x))
 10194  	// cond:
 10195  	// result: (MOVHZreg x)
 10196  	for {
 10197  		y := v.Args[0]
 10198  		if y.Op != OpPPC64MOVHreg {
 10199  			break
 10200  		}
 10201  		x := y.Args[0]
 10202  		v.reset(OpPPC64MOVHZreg)
 10203  		v.AddArg(x)
 10204  		return true
 10205  	}
 10206  	return false
 10207  }
 10208  func rewriteValuePPC64_OpPPC64MOVHZreg_10(v *Value) bool {
 10209  	// match: (MOVHZreg x:(MOVBZload _ _))
 10210  	// cond:
 10211  	// result: x
 10212  	for {
 10213  		x := v.Args[0]
 10214  		if x.Op != OpPPC64MOVBZload {
 10215  			break
 10216  		}
 10217  		_ = x.Args[1]
 10218  		v.reset(OpCopy)
 10219  		v.Type = x.Type
 10220  		v.AddArg(x)
 10221  		return true
 10222  	}
 10223  	// match: (MOVHZreg x:(MOVBZloadidx _ _ _))
 10224  	// cond:
 10225  	// result: x
 10226  	for {
 10227  		x := v.Args[0]
 10228  		if x.Op != OpPPC64MOVBZloadidx {
 10229  			break
 10230  		}
 10231  		_ = x.Args[2]
 10232  		v.reset(OpCopy)
 10233  		v.Type = x.Type
 10234  		v.AddArg(x)
 10235  		return true
 10236  	}
 10237  	// match: (MOVHZreg x:(MOVHZload _ _))
 10238  	// cond:
 10239  	// result: x
 10240  	for {
 10241  		x := v.Args[0]
 10242  		if x.Op != OpPPC64MOVHZload {
 10243  			break
 10244  		}
 10245  		_ = x.Args[1]
 10246  		v.reset(OpCopy)
 10247  		v.Type = x.Type
 10248  		v.AddArg(x)
 10249  		return true
 10250  	}
 10251  	// match: (MOVHZreg x:(MOVHZloadidx _ _ _))
 10252  	// cond:
 10253  	// result: x
 10254  	for {
 10255  		x := v.Args[0]
 10256  		if x.Op != OpPPC64MOVHZloadidx {
 10257  			break
 10258  		}
 10259  		_ = x.Args[2]
 10260  		v.reset(OpCopy)
 10261  		v.Type = x.Type
 10262  		v.AddArg(x)
 10263  		return true
 10264  	}
 10265  	// match: (MOVHZreg x:(Arg <t>))
 10266  	// cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t)
 10267  	// result: x
 10268  	for {
 10269  		x := v.Args[0]
 10270  		if x.Op != OpArg {
 10271  			break
 10272  		}
 10273  		t := x.Type
 10274  		if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) {
 10275  			break
 10276  		}
 10277  		v.reset(OpCopy)
 10278  		v.Type = x.Type
 10279  		v.AddArg(x)
 10280  		return true
 10281  	}
 10282  	// match: (MOVHZreg (MOVDconst [c]))
 10283  	// cond:
 10284  	// result: (MOVDconst [int64(uint16(c))])
 10285  	for {
 10286  		v_0 := v.Args[0]
 10287  		if v_0.Op != OpPPC64MOVDconst {
 10288  			break
 10289  		}
 10290  		c := v_0.AuxInt
 10291  		v.reset(OpPPC64MOVDconst)
 10292  		v.AuxInt = int64(uint16(c))
 10293  		return true
 10294  	}
 10295  	return false
 10296  }
 10297  func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
 10298  	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 10299  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10300  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10301  	for {
 10302  		off1 := v.AuxInt
 10303  		sym1 := v.Aux
 10304  		_ = v.Args[1]
 10305  		p := v.Args[0]
 10306  		if p.Op != OpPPC64MOVDaddr {
 10307  			break
 10308  		}
 10309  		off2 := p.AuxInt
 10310  		sym2 := p.Aux
 10311  		ptr := p.Args[0]
 10312  		mem := v.Args[1]
 10313  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10314  			break
 10315  		}
 10316  		v.reset(OpPPC64MOVHload)
 10317  		v.AuxInt = off1 + off2
 10318  		v.Aux = mergeSym(sym1, sym2)
 10319  		v.AddArg(ptr)
 10320  		v.AddArg(mem)
 10321  		return true
 10322  	}
 10323  	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
 10324  	// cond: is16Bit(off1+off2)
 10325  	// result: (MOVHload [off1+off2] {sym} x mem)
 10326  	for {
 10327  		off1 := v.AuxInt
 10328  		sym := v.Aux
 10329  		_ = v.Args[1]
 10330  		v_0 := v.Args[0]
 10331  		if v_0.Op != OpPPC64ADDconst {
 10332  			break
 10333  		}
 10334  		off2 := v_0.AuxInt
 10335  		x := v_0.Args[0]
 10336  		mem := v.Args[1]
 10337  		if !(is16Bit(off1 + off2)) {
 10338  			break
 10339  		}
 10340  		v.reset(OpPPC64MOVHload)
 10341  		v.AuxInt = off1 + off2
 10342  		v.Aux = sym
 10343  		v.AddArg(x)
 10344  		v.AddArg(mem)
 10345  		return true
 10346  	}
 10347  	// match: (MOVHload [0] {sym} p:(ADD ptr idx) mem)
 10348  	// cond: sym == nil && p.Uses == 1
 10349  	// result: (MOVHloadidx ptr idx mem)
 10350  	for {
 10351  		if v.AuxInt != 0 {
 10352  			break
 10353  		}
 10354  		sym := v.Aux
 10355  		_ = v.Args[1]
 10356  		p := v.Args[0]
 10357  		if p.Op != OpPPC64ADD {
 10358  			break
 10359  		}
 10360  		_ = p.Args[1]
 10361  		ptr := p.Args[0]
 10362  		idx := p.Args[1]
 10363  		mem := v.Args[1]
 10364  		if !(sym == nil && p.Uses == 1) {
 10365  			break
 10366  		}
 10367  		v.reset(OpPPC64MOVHloadidx)
 10368  		v.AddArg(ptr)
 10369  		v.AddArg(idx)
 10370  		v.AddArg(mem)
 10371  		return true
 10372  	}
 10373  	return false
 10374  }
 10375  func rewriteValuePPC64_OpPPC64MOVHloadidx_0(v *Value) bool {
 10376  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 10377  	// cond: is16Bit(c)
 10378  	// result: (MOVHload [c] ptr mem)
 10379  	for {
 10380  		_ = v.Args[2]
 10381  		ptr := v.Args[0]
 10382  		v_1 := v.Args[1]
 10383  		if v_1.Op != OpPPC64MOVDconst {
 10384  			break
 10385  		}
 10386  		c := v_1.AuxInt
 10387  		mem := v.Args[2]
 10388  		if !(is16Bit(c)) {
 10389  			break
 10390  		}
 10391  		v.reset(OpPPC64MOVHload)
 10392  		v.AuxInt = c
 10393  		v.AddArg(ptr)
 10394  		v.AddArg(mem)
 10395  		return true
 10396  	}
 10397  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 10398  	// cond: is16Bit(c)
 10399  	// result: (MOVHload [c] ptr mem)
 10400  	for {
 10401  		_ = v.Args[2]
 10402  		v_0 := v.Args[0]
 10403  		if v_0.Op != OpPPC64MOVDconst {
 10404  			break
 10405  		}
 10406  		c := v_0.AuxInt
 10407  		ptr := v.Args[1]
 10408  		mem := v.Args[2]
 10409  		if !(is16Bit(c)) {
 10410  			break
 10411  		}
 10412  		v.reset(OpPPC64MOVHload)
 10413  		v.AuxInt = c
 10414  		v.AddArg(ptr)
 10415  		v.AddArg(mem)
 10416  		return true
 10417  	}
 10418  	return false
 10419  }
 10420  func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
 10421  	b := v.Block
 10422  	_ = b
 10423  	typ := &b.Func.Config.Types
 10424  	_ = typ
 10425  	// match: (MOVHreg y:(ANDconst [c] _))
 10426  	// cond: uint64(c) <= 0x7FFF
 10427  	// result: y
 10428  	for {
 10429  		y := v.Args[0]
 10430  		if y.Op != OpPPC64ANDconst {
 10431  			break
 10432  		}
 10433  		c := y.AuxInt
 10434  		if !(uint64(c) <= 0x7FFF) {
 10435  			break
 10436  		}
 10437  		v.reset(OpCopy)
 10438  		v.Type = y.Type
 10439  		v.AddArg(y)
 10440  		return true
 10441  	}
 10442  	// match: (MOVHreg (SRAWconst [c] (MOVBreg x)))
 10443  	// cond:
 10444  	// result: (SRAWconst [c] (MOVBreg x))
 10445  	for {
 10446  		v_0 := v.Args[0]
 10447  		if v_0.Op != OpPPC64SRAWconst {
 10448  			break
 10449  		}
 10450  		c := v_0.AuxInt
 10451  		v_0_0 := v_0.Args[0]
 10452  		if v_0_0.Op != OpPPC64MOVBreg {
 10453  			break
 10454  		}
 10455  		x := v_0_0.Args[0]
 10456  		v.reset(OpPPC64SRAWconst)
 10457  		v.AuxInt = c
 10458  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 10459  		v0.AddArg(x)
 10460  		v.AddArg(v0)
 10461  		return true
 10462  	}
 10463  	// match: (MOVHreg (SRAWconst [c] (MOVHreg x)))
 10464  	// cond:
 10465  	// result: (SRAWconst [c] (MOVHreg x))
 10466  	for {
 10467  		v_0 := v.Args[0]
 10468  		if v_0.Op != OpPPC64SRAWconst {
 10469  			break
 10470  		}
 10471  		c := v_0.AuxInt
 10472  		v_0_0 := v_0.Args[0]
 10473  		if v_0_0.Op != OpPPC64MOVHreg {
 10474  			break
 10475  		}
 10476  		x := v_0_0.Args[0]
 10477  		v.reset(OpPPC64SRAWconst)
 10478  		v.AuxInt = c
 10479  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 10480  		v0.AddArg(x)
 10481  		v.AddArg(v0)
 10482  		return true
 10483  	}
 10484  	// match: (MOVHreg (SRAWconst [c] x))
 10485  	// cond: sizeof(x.Type) <= 16
 10486  	// result: (SRAWconst [c] x)
 10487  	for {
 10488  		v_0 := v.Args[0]
 10489  		if v_0.Op != OpPPC64SRAWconst {
 10490  			break
 10491  		}
 10492  		c := v_0.AuxInt
 10493  		x := v_0.Args[0]
 10494  		if !(sizeof(x.Type) <= 16) {
 10495  			break
 10496  		}
 10497  		v.reset(OpPPC64SRAWconst)
 10498  		v.AuxInt = c
 10499  		v.AddArg(x)
 10500  		return true
 10501  	}
 10502  	// match: (MOVHreg (SRDconst [c] x))
 10503  	// cond: c>48
 10504  	// result: (SRDconst [c] x)
 10505  	for {
 10506  		v_0 := v.Args[0]
 10507  		if v_0.Op != OpPPC64SRDconst {
 10508  			break
 10509  		}
 10510  		c := v_0.AuxInt
 10511  		x := v_0.Args[0]
 10512  		if !(c > 48) {
 10513  			break
 10514  		}
 10515  		v.reset(OpPPC64SRDconst)
 10516  		v.AuxInt = c
 10517  		v.AddArg(x)
 10518  		return true
 10519  	}
 10520  	// match: (MOVHreg (SRDconst [c] x))
 10521  	// cond: c==48
 10522  	// result: (SRADconst [c] x)
 10523  	for {
 10524  		v_0 := v.Args[0]
 10525  		if v_0.Op != OpPPC64SRDconst {
 10526  			break
 10527  		}
 10528  		c := v_0.AuxInt
 10529  		x := v_0.Args[0]
 10530  		if !(c == 48) {
 10531  			break
 10532  		}
 10533  		v.reset(OpPPC64SRADconst)
 10534  		v.AuxInt = c
 10535  		v.AddArg(x)
 10536  		return true
 10537  	}
 10538  	// match: (MOVHreg (SRWconst [c] x))
 10539  	// cond: c>16
 10540  	// result: (SRWconst [c] x)
 10541  	for {
 10542  		v_0 := v.Args[0]
 10543  		if v_0.Op != OpPPC64SRWconst {
 10544  			break
 10545  		}
 10546  		c := v_0.AuxInt
 10547  		x := v_0.Args[0]
 10548  		if !(c > 16) {
 10549  			break
 10550  		}
 10551  		v.reset(OpPPC64SRWconst)
 10552  		v.AuxInt = c
 10553  		v.AddArg(x)
 10554  		return true
 10555  	}
 10556  	// match: (MOVHreg (SRWconst [c] x))
 10557  	// cond: c==16
 10558  	// result: (SRAWconst [c] x)
 10559  	for {
 10560  		v_0 := v.Args[0]
 10561  		if v_0.Op != OpPPC64SRWconst {
 10562  			break
 10563  		}
 10564  		c := v_0.AuxInt
 10565  		x := v_0.Args[0]
 10566  		if !(c == 16) {
 10567  			break
 10568  		}
 10569  		v.reset(OpPPC64SRAWconst)
 10570  		v.AuxInt = c
 10571  		v.AddArg(x)
 10572  		return true
 10573  	}
 10574  	// match: (MOVHreg y:(MOVHreg _))
 10575  	// cond:
 10576  	// result: y
 10577  	for {
 10578  		y := v.Args[0]
 10579  		if y.Op != OpPPC64MOVHreg {
 10580  			break
 10581  		}
 10582  		v.reset(OpCopy)
 10583  		v.Type = y.Type
 10584  		v.AddArg(y)
 10585  		return true
 10586  	}
 10587  	// match: (MOVHreg y:(MOVBreg _))
 10588  	// cond:
 10589  	// result: y
 10590  	for {
 10591  		y := v.Args[0]
 10592  		if y.Op != OpPPC64MOVBreg {
 10593  			break
 10594  		}
 10595  		v.reset(OpCopy)
 10596  		v.Type = y.Type
 10597  		v.AddArg(y)
 10598  		return true
 10599  	}
 10600  	return false
 10601  }
 10602  func rewriteValuePPC64_OpPPC64MOVHreg_10(v *Value) bool {
 10603  	// match: (MOVHreg y:(MOVHZreg x))
 10604  	// cond:
 10605  	// result: (MOVHreg x)
 10606  	for {
 10607  		y := v.Args[0]
 10608  		if y.Op != OpPPC64MOVHZreg {
 10609  			break
 10610  		}
 10611  		x := y.Args[0]
 10612  		v.reset(OpPPC64MOVHreg)
 10613  		v.AddArg(x)
 10614  		return true
 10615  	}
 10616  	// match: (MOVHreg x:(MOVHload _ _))
 10617  	// cond:
 10618  	// result: x
 10619  	for {
 10620  		x := v.Args[0]
 10621  		if x.Op != OpPPC64MOVHload {
 10622  			break
 10623  		}
 10624  		_ = x.Args[1]
 10625  		v.reset(OpCopy)
 10626  		v.Type = x.Type
 10627  		v.AddArg(x)
 10628  		return true
 10629  	}
 10630  	// match: (MOVHreg x:(MOVHloadidx _ _ _))
 10631  	// cond:
 10632  	// result: x
 10633  	for {
 10634  		x := v.Args[0]
 10635  		if x.Op != OpPPC64MOVHloadidx {
 10636  			break
 10637  		}
 10638  		_ = x.Args[2]
 10639  		v.reset(OpCopy)
 10640  		v.Type = x.Type
 10641  		v.AddArg(x)
 10642  		return true
 10643  	}
 10644  	// match: (MOVHreg x:(Arg <t>))
 10645  	// cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t)
 10646  	// result: x
 10647  	for {
 10648  		x := v.Args[0]
 10649  		if x.Op != OpArg {
 10650  			break
 10651  		}
 10652  		t := x.Type
 10653  		if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) {
 10654  			break
 10655  		}
 10656  		v.reset(OpCopy)
 10657  		v.Type = x.Type
 10658  		v.AddArg(x)
 10659  		return true
 10660  	}
 10661  	// match: (MOVHreg (MOVDconst [c]))
 10662  	// cond:
 10663  	// result: (MOVDconst [int64(int16(c))])
 10664  	for {
 10665  		v_0 := v.Args[0]
 10666  		if v_0.Op != OpPPC64MOVDconst {
 10667  			break
 10668  		}
 10669  		c := v_0.AuxInt
 10670  		v.reset(OpPPC64MOVDconst)
 10671  		v.AuxInt = int64(int16(c))
 10672  		return true
 10673  	}
 10674  	return false
 10675  }
 10676  func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
 10677  	b := v.Block
 10678  	_ = b
 10679  	config := b.Func.Config
 10680  	_ = config
 10681  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
 10682  	// cond: is16Bit(off1+off2)
 10683  	// result: (MOVHstore [off1+off2] {sym} x val mem)
 10684  	for {
 10685  		off1 := v.AuxInt
 10686  		sym := v.Aux
 10687  		_ = v.Args[2]
 10688  		v_0 := v.Args[0]
 10689  		if v_0.Op != OpPPC64ADDconst {
 10690  			break
 10691  		}
 10692  		off2 := v_0.AuxInt
 10693  		x := v_0.Args[0]
 10694  		val := v.Args[1]
 10695  		mem := v.Args[2]
 10696  		if !(is16Bit(off1 + off2)) {
 10697  			break
 10698  		}
 10699  		v.reset(OpPPC64MOVHstore)
 10700  		v.AuxInt = off1 + off2
 10701  		v.Aux = sym
 10702  		v.AddArg(x)
 10703  		v.AddArg(val)
 10704  		v.AddArg(mem)
 10705  		return true
 10706  	}
 10707  	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 10708  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10709  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 10710  	for {
 10711  		off1 := v.AuxInt
 10712  		sym1 := v.Aux
 10713  		_ = v.Args[2]
 10714  		p := v.Args[0]
 10715  		if p.Op != OpPPC64MOVDaddr {
 10716  			break
 10717  		}
 10718  		off2 := p.AuxInt
 10719  		sym2 := p.Aux
 10720  		ptr := p.Args[0]
 10721  		val := v.Args[1]
 10722  		mem := v.Args[2]
 10723  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10724  			break
 10725  		}
 10726  		v.reset(OpPPC64MOVHstore)
 10727  		v.AuxInt = off1 + off2
 10728  		v.Aux = mergeSym(sym1, sym2)
 10729  		v.AddArg(ptr)
 10730  		v.AddArg(val)
 10731  		v.AddArg(mem)
 10732  		return true
 10733  	}
 10734  	// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
 10735  	// cond:
 10736  	// result: (MOVHstorezero [off] {sym} ptr mem)
 10737  	for {
 10738  		off := v.AuxInt
 10739  		sym := v.Aux
 10740  		_ = v.Args[2]
 10741  		ptr := v.Args[0]
 10742  		v_1 := v.Args[1]
 10743  		if v_1.Op != OpPPC64MOVDconst {
 10744  			break
 10745  		}
 10746  		if v_1.AuxInt != 0 {
 10747  			break
 10748  		}
 10749  		mem := v.Args[2]
 10750  		v.reset(OpPPC64MOVHstorezero)
 10751  		v.AuxInt = off
 10752  		v.Aux = sym
 10753  		v.AddArg(ptr)
 10754  		v.AddArg(mem)
 10755  		return true
 10756  	}
 10757  	// match: (MOVHstore [off] {sym} p:(ADD ptr idx) val mem)
 10758  	// cond: off == 0 && sym == nil && p.Uses == 1
 10759  	// result: (MOVHstoreidx ptr idx val mem)
 10760  	for {
 10761  		off := v.AuxInt
 10762  		sym := v.Aux
 10763  		_ = v.Args[2]
 10764  		p := v.Args[0]
 10765  		if p.Op != OpPPC64ADD {
 10766  			break
 10767  		}
 10768  		_ = p.Args[1]
 10769  		ptr := p.Args[0]
 10770  		idx := p.Args[1]
 10771  		val := v.Args[1]
 10772  		mem := v.Args[2]
 10773  		if !(off == 0 && sym == nil && p.Uses == 1) {
 10774  			break
 10775  		}
 10776  		v.reset(OpPPC64MOVHstoreidx)
 10777  		v.AddArg(ptr)
 10778  		v.AddArg(idx)
 10779  		v.AddArg(val)
 10780  		v.AddArg(mem)
 10781  		return true
 10782  	}
 10783  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 10784  	// cond:
 10785  	// result: (MOVHstore [off] {sym} ptr x mem)
 10786  	for {
 10787  		off := v.AuxInt
 10788  		sym := v.Aux
 10789  		_ = v.Args[2]
 10790  		ptr := v.Args[0]
 10791  		v_1 := v.Args[1]
 10792  		if v_1.Op != OpPPC64MOVHreg {
 10793  			break
 10794  		}
 10795  		x := v_1.Args[0]
 10796  		mem := v.Args[2]
 10797  		v.reset(OpPPC64MOVHstore)
 10798  		v.AuxInt = off
 10799  		v.Aux = sym
 10800  		v.AddArg(ptr)
 10801  		v.AddArg(x)
 10802  		v.AddArg(mem)
 10803  		return true
 10804  	}
 10805  	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
 10806  	// cond:
 10807  	// result: (MOVHstore [off] {sym} ptr x mem)
 10808  	for {
 10809  		off := v.AuxInt
 10810  		sym := v.Aux
 10811  		_ = v.Args[2]
 10812  		ptr := v.Args[0]
 10813  		v_1 := v.Args[1]
 10814  		if v_1.Op != OpPPC64MOVHZreg {
 10815  			break
 10816  		}
 10817  		x := v_1.Args[0]
 10818  		mem := v.Args[2]
 10819  		v.reset(OpPPC64MOVHstore)
 10820  		v.AuxInt = off
 10821  		v.Aux = sym
 10822  		v.AddArg(ptr)
 10823  		v.AddArg(x)
 10824  		v.AddArg(mem)
 10825  		return true
 10826  	}
 10827  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 10828  	// cond:
 10829  	// result: (MOVHstore [off] {sym} ptr x mem)
 10830  	for {
 10831  		off := v.AuxInt
 10832  		sym := v.Aux
 10833  		_ = v.Args[2]
 10834  		ptr := v.Args[0]
 10835  		v_1 := v.Args[1]
 10836  		if v_1.Op != OpPPC64MOVWreg {
 10837  			break
 10838  		}
 10839  		x := v_1.Args[0]
 10840  		mem := v.Args[2]
 10841  		v.reset(OpPPC64MOVHstore)
 10842  		v.AuxInt = off
 10843  		v.Aux = sym
 10844  		v.AddArg(ptr)
 10845  		v.AddArg(x)
 10846  		v.AddArg(mem)
 10847  		return true
 10848  	}
 10849  	// match: (MOVHstore [off] {sym} ptr (MOVWZreg x) mem)
 10850  	// cond:
 10851  	// result: (MOVHstore [off] {sym} ptr x mem)
 10852  	for {
 10853  		off := v.AuxInt
 10854  		sym := v.Aux
 10855  		_ = v.Args[2]
 10856  		ptr := v.Args[0]
 10857  		v_1 := v.Args[1]
 10858  		if v_1.Op != OpPPC64MOVWZreg {
 10859  			break
 10860  		}
 10861  		x := v_1.Args[0]
 10862  		mem := v.Args[2]
 10863  		v.reset(OpPPC64MOVHstore)
 10864  		v.AuxInt = off
 10865  		v.Aux = sym
 10866  		v.AddArg(ptr)
 10867  		v.AddArg(x)
 10868  		v.AddArg(mem)
 10869  		return true
 10870  	}
 10871  	// match: (MOVHstore [i1] {s} p (SRWconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10872  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10873  	// result: (MOVWstore [i0] {s} p w mem)
 10874  	for {
 10875  		i1 := v.AuxInt
 10876  		s := v.Aux
 10877  		_ = v.Args[2]
 10878  		p := v.Args[0]
 10879  		v_1 := v.Args[1]
 10880  		if v_1.Op != OpPPC64SRWconst {
 10881  			break
 10882  		}
 10883  		if v_1.AuxInt != 16 {
 10884  			break
 10885  		}
 10886  		w := v_1.Args[0]
 10887  		x0 := v.Args[2]
 10888  		if x0.Op != OpPPC64MOVHstore {
 10889  			break
 10890  		}
 10891  		i0 := x0.AuxInt
 10892  		if x0.Aux != s {
 10893  			break
 10894  		}
 10895  		_ = x0.Args[2]
 10896  		if p != x0.Args[0] {
 10897  			break
 10898  		}
 10899  		if w != x0.Args[1] {
 10900  			break
 10901  		}
 10902  		mem := x0.Args[2]
 10903  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10904  			break
 10905  		}
 10906  		v.reset(OpPPC64MOVWstore)
 10907  		v.AuxInt = i0
 10908  		v.Aux = s
 10909  		v.AddArg(p)
 10910  		v.AddArg(w)
 10911  		v.AddArg(mem)
 10912  		return true
 10913  	}
 10914  	// match: (MOVHstore [i1] {s} p (SRDconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10915  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10916  	// result: (MOVWstore [i0] {s} p w mem)
 10917  	for {
 10918  		i1 := v.AuxInt
 10919  		s := v.Aux
 10920  		_ = v.Args[2]
 10921  		p := v.Args[0]
 10922  		v_1 := v.Args[1]
 10923  		if v_1.Op != OpPPC64SRDconst {
 10924  			break
 10925  		}
 10926  		if v_1.AuxInt != 16 {
 10927  			break
 10928  		}
 10929  		w := v_1.Args[0]
 10930  		x0 := v.Args[2]
 10931  		if x0.Op != OpPPC64MOVHstore {
 10932  			break
 10933  		}
 10934  		i0 := x0.AuxInt
 10935  		if x0.Aux != s {
 10936  			break
 10937  		}
 10938  		_ = x0.Args[2]
 10939  		if p != x0.Args[0] {
 10940  			break
 10941  		}
 10942  		if w != x0.Args[1] {
 10943  			break
 10944  		}
 10945  		mem := x0.Args[2]
 10946  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10947  			break
 10948  		}
 10949  		v.reset(OpPPC64MOVWstore)
 10950  		v.AuxInt = i0
 10951  		v.Aux = s
 10952  		v.AddArg(p)
 10953  		v.AddArg(w)
 10954  		v.AddArg(mem)
 10955  		return true
 10956  	}
 10957  	return false
 10958  }
 10959  func rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v *Value) bool {
 10960  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 10961  	// cond: is16Bit(c)
 10962  	// result: (MOVHstore [c] ptr val mem)
 10963  	for {
 10964  		_ = v.Args[3]
 10965  		ptr := v.Args[0]
 10966  		v_1 := v.Args[1]
 10967  		if v_1.Op != OpPPC64MOVDconst {
 10968  			break
 10969  		}
 10970  		c := v_1.AuxInt
 10971  		val := v.Args[2]
 10972  		mem := v.Args[3]
 10973  		if !(is16Bit(c)) {
 10974  			break
 10975  		}
 10976  		v.reset(OpPPC64MOVHstore)
 10977  		v.AuxInt = c
 10978  		v.AddArg(ptr)
 10979  		v.AddArg(val)
 10980  		v.AddArg(mem)
 10981  		return true
 10982  	}
 10983  	// match: (MOVHstoreidx (MOVDconst [c]) ptr val mem)
 10984  	// cond: is16Bit(c)
 10985  	// result: (MOVHstore [c] ptr val mem)
 10986  	for {
 10987  		_ = v.Args[3]
 10988  		v_0 := v.Args[0]
 10989  		if v_0.Op != OpPPC64MOVDconst {
 10990  			break
 10991  		}
 10992  		c := v_0.AuxInt
 10993  		ptr := v.Args[1]
 10994  		val := v.Args[2]
 10995  		mem := v.Args[3]
 10996  		if !(is16Bit(c)) {
 10997  			break
 10998  		}
 10999  		v.reset(OpPPC64MOVHstore)
 11000  		v.AuxInt = c
 11001  		v.AddArg(ptr)
 11002  		v.AddArg(val)
 11003  		v.AddArg(mem)
 11004  		return true
 11005  	}
 11006  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
 11007  	// cond:
 11008  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11009  	for {
 11010  		off := v.AuxInt
 11011  		sym := v.Aux
 11012  		_ = v.Args[3]
 11013  		ptr := v.Args[0]
 11014  		idx := v.Args[1]
 11015  		v_2 := v.Args[2]
 11016  		if v_2.Op != OpPPC64MOVHreg {
 11017  			break
 11018  		}
 11019  		x := v_2.Args[0]
 11020  		mem := v.Args[3]
 11021  		v.reset(OpPPC64MOVHstoreidx)
 11022  		v.AuxInt = off
 11023  		v.Aux = sym
 11024  		v.AddArg(ptr)
 11025  		v.AddArg(idx)
 11026  		v.AddArg(x)
 11027  		v.AddArg(mem)
 11028  		return true
 11029  	}
 11030  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
 11031  	// cond:
 11032  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11033  	for {
 11034  		off := v.AuxInt
 11035  		sym := v.Aux
 11036  		_ = v.Args[3]
 11037  		ptr := v.Args[0]
 11038  		idx := v.Args[1]
 11039  		v_2 := v.Args[2]
 11040  		if v_2.Op != OpPPC64MOVHZreg {
 11041  			break
 11042  		}
 11043  		x := v_2.Args[0]
 11044  		mem := v.Args[3]
 11045  		v.reset(OpPPC64MOVHstoreidx)
 11046  		v.AuxInt = off
 11047  		v.Aux = sym
 11048  		v.AddArg(ptr)
 11049  		v.AddArg(idx)
 11050  		v.AddArg(x)
 11051  		v.AddArg(mem)
 11052  		return true
 11053  	}
 11054  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 11055  	// cond:
 11056  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11057  	for {
 11058  		off := v.AuxInt
 11059  		sym := v.Aux
 11060  		_ = v.Args[3]
 11061  		ptr := v.Args[0]
 11062  		idx := v.Args[1]
 11063  		v_2 := v.Args[2]
 11064  		if v_2.Op != OpPPC64MOVWreg {
 11065  			break
 11066  		}
 11067  		x := v_2.Args[0]
 11068  		mem := v.Args[3]
 11069  		v.reset(OpPPC64MOVHstoreidx)
 11070  		v.AuxInt = off
 11071  		v.Aux = sym
 11072  		v.AddArg(ptr)
 11073  		v.AddArg(idx)
 11074  		v.AddArg(x)
 11075  		v.AddArg(mem)
 11076  		return true
 11077  	}
 11078  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 11079  	// cond:
 11080  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11081  	for {
 11082  		off := v.AuxInt
 11083  		sym := v.Aux
 11084  		_ = v.Args[3]
 11085  		ptr := v.Args[0]
 11086  		idx := v.Args[1]
 11087  		v_2 := v.Args[2]
 11088  		if v_2.Op != OpPPC64MOVWZreg {
 11089  			break
 11090  		}
 11091  		x := v_2.Args[0]
 11092  		mem := v.Args[3]
 11093  		v.reset(OpPPC64MOVHstoreidx)
 11094  		v.AuxInt = off
 11095  		v.Aux = sym
 11096  		v.AddArg(ptr)
 11097  		v.AddArg(idx)
 11098  		v.AddArg(x)
 11099  		v.AddArg(mem)
 11100  		return true
 11101  	}
 11102  	return false
 11103  }
 11104  func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
 11105  	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
 11106  	// cond: is16Bit(off1+off2)
 11107  	// result: (MOVHstorezero [off1+off2] {sym} x mem)
 11108  	for {
 11109  		off1 := v.AuxInt
 11110  		sym := v.Aux
 11111  		_ = v.Args[1]
 11112  		v_0 := v.Args[0]
 11113  		if v_0.Op != OpPPC64ADDconst {
 11114  			break
 11115  		}
 11116  		off2 := v_0.AuxInt
 11117  		x := v_0.Args[0]
 11118  		mem := v.Args[1]
 11119  		if !(is16Bit(off1 + off2)) {
 11120  			break
 11121  		}
 11122  		v.reset(OpPPC64MOVHstorezero)
 11123  		v.AuxInt = off1 + off2
 11124  		v.Aux = sym
 11125  		v.AddArg(x)
 11126  		v.AddArg(mem)
 11127  		return true
 11128  	}
 11129  	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 11130  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 11131  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 11132  	for {
 11133  		off1 := v.AuxInt
 11134  		sym1 := v.Aux
 11135  		_ = v.Args[1]
 11136  		p := v.Args[0]
 11137  		if p.Op != OpPPC64MOVDaddr {
 11138  			break
 11139  		}
 11140  		off2 := p.AuxInt
 11141  		sym2 := p.Aux
 11142  		x := p.Args[0]
 11143  		mem := v.Args[1]
 11144  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 11145  			break
 11146  		}
 11147  		v.reset(OpPPC64MOVHstorezero)
 11148  		v.AuxInt = off1 + off2
 11149  		v.Aux = mergeSym(sym1, sym2)
 11150  		v.AddArg(x)
 11151  		v.AddArg(mem)
 11152  		return true
 11153  	}
 11154  	return false
 11155  }
 11156  func rewriteValuePPC64_OpPPC64MOVWBRstore_0(v *Value) bool {
 11157  	// match: (MOVWBRstore {sym} ptr (MOVWreg x) mem)
 11158  	// cond:
 11159  	// result: (MOVWBRstore {sym} ptr x mem)
 11160  	for {
 11161  		sym := v.Aux
 11162  		_ = v.Args[2]
 11163  		ptr := v.Args[0]
 11164  		v_1 := v.Args[1]
 11165  		if v_1.Op != OpPPC64MOVWreg {
 11166  			break
 11167  		}
 11168  		x := v_1.Args[0]
 11169  		mem := v.Args[2]
 11170  		v.reset(OpPPC64MOVWBRstore)
 11171  		v.Aux = sym
 11172  		v.AddArg(ptr)
 11173  		v.AddArg(x)
 11174  		v.AddArg(mem)
 11175  		return true
 11176  	}
 11177  	// match: (MOVWBRstore {sym} ptr (MOVWZreg x) mem)
 11178  	// cond:
 11179  	// result: (MOVWBRstore {sym} ptr x mem)
 11180  	for {
 11181  		sym := v.Aux
 11182  		_ = v.Args[2]
 11183  		ptr := v.Args[0]
 11184  		v_1 := v.Args[1]
 11185  		if v_1.Op != OpPPC64MOVWZreg {
 11186  			break
 11187  		}
 11188  		x := v_1.Args[0]
 11189  		mem := v.Args[2]
 11190  		v.reset(OpPPC64MOVWBRstore)
 11191  		v.Aux = sym
 11192  		v.AddArg(ptr)
 11193  		v.AddArg(x)
 11194  		v.AddArg(mem)
 11195  		return true
 11196  	}
 11197  	return false
 11198  }
 11199  func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
 11200  	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 11201  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11202  	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11203  	for {
 11204  		off1 := v.AuxInt
 11205  		sym1 := v.Aux
 11206  		_ = v.Args[1]
 11207  		p := v.Args[0]
 11208  		if p.Op != OpPPC64MOVDaddr {
 11209  			break
 11210  		}
 11211  		off2 := p.AuxInt
 11212  		sym2 := p.Aux
 11213  		ptr := p.Args[0]
 11214  		mem := v.Args[1]
 11215  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11216  			break
 11217  		}
 11218  		v.reset(OpPPC64MOVWZload)
 11219  		v.AuxInt = off1 + off2
 11220  		v.Aux = mergeSym(sym1, sym2)
 11221  		v.AddArg(ptr)
 11222  		v.AddArg(mem)
 11223  		return true
 11224  	}
 11225  	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
 11226  	// cond: is16Bit(off1+off2)
 11227  	// result: (MOVWZload [off1+off2] {sym} x mem)
 11228  	for {
 11229  		off1 := v.AuxInt
 11230  		sym := v.Aux
 11231  		_ = v.Args[1]
 11232  		v_0 := v.Args[0]
 11233  		if v_0.Op != OpPPC64ADDconst {
 11234  			break
 11235  		}
 11236  		off2 := v_0.AuxInt
 11237  		x := v_0.Args[0]
 11238  		mem := v.Args[1]
 11239  		if !(is16Bit(off1 + off2)) {
 11240  			break
 11241  		}
 11242  		v.reset(OpPPC64MOVWZload)
 11243  		v.AuxInt = off1 + off2
 11244  		v.Aux = sym
 11245  		v.AddArg(x)
 11246  		v.AddArg(mem)
 11247  		return true
 11248  	}
 11249  	// match: (MOVWZload [0] {sym} p:(ADD ptr idx) mem)
 11250  	// cond: sym == nil && p.Uses == 1
 11251  	// result: (MOVWZloadidx ptr idx mem)
 11252  	for {
 11253  		if v.AuxInt != 0 {
 11254  			break
 11255  		}
 11256  		sym := v.Aux
 11257  		_ = v.Args[1]
 11258  		p := v.Args[0]
 11259  		if p.Op != OpPPC64ADD {
 11260  			break
 11261  		}
 11262  		_ = p.Args[1]
 11263  		ptr := p.Args[0]
 11264  		idx := p.Args[1]
 11265  		mem := v.Args[1]
 11266  		if !(sym == nil && p.Uses == 1) {
 11267  			break
 11268  		}
 11269  		v.reset(OpPPC64MOVWZloadidx)
 11270  		v.AddArg(ptr)
 11271  		v.AddArg(idx)
 11272  		v.AddArg(mem)
 11273  		return true
 11274  	}
 11275  	return false
 11276  }
 11277  func rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v *Value) bool {
 11278  	// match: (MOVWZloadidx ptr (MOVDconst [c]) mem)
 11279  	// cond: is16Bit(c)
 11280  	// result: (MOVWZload [c] ptr mem)
 11281  	for {
 11282  		_ = v.Args[2]
 11283  		ptr := v.Args[0]
 11284  		v_1 := v.Args[1]
 11285  		if v_1.Op != OpPPC64MOVDconst {
 11286  			break
 11287  		}
 11288  		c := v_1.AuxInt
 11289  		mem := v.Args[2]
 11290  		if !(is16Bit(c)) {
 11291  			break
 11292  		}
 11293  		v.reset(OpPPC64MOVWZload)
 11294  		v.AuxInt = c
 11295  		v.AddArg(ptr)
 11296  		v.AddArg(mem)
 11297  		return true
 11298  	}
 11299  	// match: (MOVWZloadidx (MOVDconst [c]) ptr mem)
 11300  	// cond: is16Bit(c)
 11301  	// result: (MOVWZload [c] ptr mem)
 11302  	for {
 11303  		_ = v.Args[2]
 11304  		v_0 := v.Args[0]
 11305  		if v_0.Op != OpPPC64MOVDconst {
 11306  			break
 11307  		}
 11308  		c := v_0.AuxInt
 11309  		ptr := v.Args[1]
 11310  		mem := v.Args[2]
 11311  		if !(is16Bit(c)) {
 11312  			break
 11313  		}
 11314  		v.reset(OpPPC64MOVWZload)
 11315  		v.AuxInt = c
 11316  		v.AddArg(ptr)
 11317  		v.AddArg(mem)
 11318  		return true
 11319  	}
 11320  	return false
 11321  }
 11322  func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
 11323  	b := v.Block
 11324  	_ = b
 11325  	typ := &b.Func.Config.Types
 11326  	_ = typ
 11327  	// match: (MOVWZreg y:(ANDconst [c] _))
 11328  	// cond: uint64(c) <= 0xFFFFFFFF
 11329  	// result: y
 11330  	for {
 11331  		y := v.Args[0]
 11332  		if y.Op != OpPPC64ANDconst {
 11333  			break
 11334  		}
 11335  		c := y.AuxInt
 11336  		if !(uint64(c) <= 0xFFFFFFFF) {
 11337  			break
 11338  		}
 11339  		v.reset(OpCopy)
 11340  		v.Type = y.Type
 11341  		v.AddArg(y)
 11342  		return true
 11343  	}
 11344  	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
 11345  	// cond: uint64(c) <= 0xFFFFFFFF
 11346  	// result: y
 11347  	for {
 11348  		y := v.Args[0]
 11349  		if y.Op != OpPPC64AND {
 11350  			break
 11351  		}
 11352  		_ = y.Args[1]
 11353  		y_0 := y.Args[0]
 11354  		if y_0.Op != OpPPC64MOVDconst {
 11355  			break
 11356  		}
 11357  		c := y_0.AuxInt
 11358  		if !(uint64(c) <= 0xFFFFFFFF) {
 11359  			break
 11360  		}
 11361  		v.reset(OpCopy)
 11362  		v.Type = y.Type
 11363  		v.AddArg(y)
 11364  		return true
 11365  	}
 11366  	// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
 11367  	// cond: uint64(c) <= 0xFFFFFFFF
 11368  	// result: y
 11369  	for {
 11370  		y := v.Args[0]
 11371  		if y.Op != OpPPC64AND {
 11372  			break
 11373  		}
 11374  		_ = y.Args[1]
 11375  		y_1 := y.Args[1]
 11376  		if y_1.Op != OpPPC64MOVDconst {
 11377  			break
 11378  		}
 11379  		c := y_1.AuxInt
 11380  		if !(uint64(c) <= 0xFFFFFFFF) {
 11381  			break
 11382  		}
 11383  		v.reset(OpCopy)
 11384  		v.Type = y.Type
 11385  		v.AddArg(y)
 11386  		return true
 11387  	}
 11388  	// match: (MOVWZreg (SRWconst [c] (MOVBZreg x)))
 11389  	// cond:
 11390  	// result: (SRWconst [c] (MOVBZreg x))
 11391  	for {
 11392  		v_0 := v.Args[0]
 11393  		if v_0.Op != OpPPC64SRWconst {
 11394  			break
 11395  		}
 11396  		c := v_0.AuxInt
 11397  		v_0_0 := v_0.Args[0]
 11398  		if v_0_0.Op != OpPPC64MOVBZreg {
 11399  			break
 11400  		}
 11401  		x := v_0_0.Args[0]
 11402  		v.reset(OpPPC64SRWconst)
 11403  		v.AuxInt = c
 11404  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 11405  		v0.AddArg(x)
 11406  		v.AddArg(v0)
 11407  		return true
 11408  	}
 11409  	// match: (MOVWZreg (SRWconst [c] (MOVHZreg x)))
 11410  	// cond:
 11411  	// result: (SRWconst [c] (MOVHZreg x))
 11412  	for {
 11413  		v_0 := v.Args[0]
 11414  		if v_0.Op != OpPPC64SRWconst {
 11415  			break
 11416  		}
 11417  		c := v_0.AuxInt
 11418  		v_0_0 := v_0.Args[0]
 11419  		if v_0_0.Op != OpPPC64MOVHZreg {
 11420  			break
 11421  		}
 11422  		x := v_0_0.Args[0]
 11423  		v.reset(OpPPC64SRWconst)
 11424  		v.AuxInt = c
 11425  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 11426  		v0.AddArg(x)
 11427  		v.AddArg(v0)
 11428  		return true
 11429  	}
 11430  	// match: (MOVWZreg (SRWconst [c] (MOVWZreg x)))
 11431  	// cond:
 11432  	// result: (SRWconst [c] (MOVWZreg x))
 11433  	for {
 11434  		v_0 := v.Args[0]
 11435  		if v_0.Op != OpPPC64SRWconst {
 11436  			break
 11437  		}
 11438  		c := v_0.AuxInt
 11439  		v_0_0 := v_0.Args[0]
 11440  		if v_0_0.Op != OpPPC64MOVWZreg {
 11441  			break
 11442  		}
 11443  		x := v_0_0.Args[0]
 11444  		v.reset(OpPPC64SRWconst)
 11445  		v.AuxInt = c
 11446  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 11447  		v0.AddArg(x)
 11448  		v.AddArg(v0)
 11449  		return true
 11450  	}
 11451  	// match: (MOVWZreg (SRWconst [c] x))
 11452  	// cond: sizeof(x.Type) <= 32
 11453  	// result: (SRWconst [c] x)
 11454  	for {
 11455  		v_0 := v.Args[0]
 11456  		if v_0.Op != OpPPC64SRWconst {
 11457  			break
 11458  		}
 11459  		c := v_0.AuxInt
 11460  		x := v_0.Args[0]
 11461  		if !(sizeof(x.Type) <= 32) {
 11462  			break
 11463  		}
 11464  		v.reset(OpPPC64SRWconst)
 11465  		v.AuxInt = c
 11466  		v.AddArg(x)
 11467  		return true
 11468  	}
 11469  	// match: (MOVWZreg (SRDconst [c] x))
 11470  	// cond: c>=32
 11471  	// result: (SRDconst [c] x)
 11472  	for {
 11473  		v_0 := v.Args[0]
 11474  		if v_0.Op != OpPPC64SRDconst {
 11475  			break
 11476  		}
 11477  		c := v_0.AuxInt
 11478  		x := v_0.Args[0]
 11479  		if !(c >= 32) {
 11480  			break
 11481  		}
 11482  		v.reset(OpPPC64SRDconst)
 11483  		v.AuxInt = c
 11484  		v.AddArg(x)
 11485  		return true
 11486  	}
 11487  	// match: (MOVWZreg y:(MOVWZreg _))
 11488  	// cond:
 11489  	// result: y
 11490  	for {
 11491  		y := v.Args[0]
 11492  		if y.Op != OpPPC64MOVWZreg {
 11493  			break
 11494  		}
 11495  		v.reset(OpCopy)
 11496  		v.Type = y.Type
 11497  		v.AddArg(y)
 11498  		return true
 11499  	}
 11500  	// match: (MOVWZreg y:(MOVHZreg _))
 11501  	// cond:
 11502  	// result: y
 11503  	for {
 11504  		y := v.Args[0]
 11505  		if y.Op != OpPPC64MOVHZreg {
 11506  			break
 11507  		}
 11508  		v.reset(OpCopy)
 11509  		v.Type = y.Type
 11510  		v.AddArg(y)
 11511  		return true
 11512  	}
 11513  	return false
 11514  }
 11515  func rewriteValuePPC64_OpPPC64MOVWZreg_10(v *Value) bool {
 11516  	// match: (MOVWZreg y:(MOVBZreg _))
 11517  	// cond:
 11518  	// result: y
 11519  	for {
 11520  		y := v.Args[0]
 11521  		if y.Op != OpPPC64MOVBZreg {
 11522  			break
 11523  		}
 11524  		v.reset(OpCopy)
 11525  		v.Type = y.Type
 11526  		v.AddArg(y)
 11527  		return true
 11528  	}
 11529  	// match: (MOVWZreg y:(MOVHBRload _ _))
 11530  	// cond:
 11531  	// result: y
 11532  	for {
 11533  		y := v.Args[0]
 11534  		if y.Op != OpPPC64MOVHBRload {
 11535  			break
 11536  		}
 11537  		_ = y.Args[1]
 11538  		v.reset(OpCopy)
 11539  		v.Type = y.Type
 11540  		v.AddArg(y)
 11541  		return true
 11542  	}
 11543  	// match: (MOVWZreg y:(MOVWBRload _ _))
 11544  	// cond:
 11545  	// result: y
 11546  	for {
 11547  		y := v.Args[0]
 11548  		if y.Op != OpPPC64MOVWBRload {
 11549  			break
 11550  		}
 11551  		_ = y.Args[1]
 11552  		v.reset(OpCopy)
 11553  		v.Type = y.Type
 11554  		v.AddArg(y)
 11555  		return true
 11556  	}
 11557  	// match: (MOVWZreg y:(MOVWreg x))
 11558  	// cond:
 11559  	// result: (MOVWZreg x)
 11560  	for {
 11561  		y := v.Args[0]
 11562  		if y.Op != OpPPC64MOVWreg {
 11563  			break
 11564  		}
 11565  		x := y.Args[0]
 11566  		v.reset(OpPPC64MOVWZreg)
 11567  		v.AddArg(x)
 11568  		return true
 11569  	}
 11570  	// match: (MOVWZreg x:(MOVBZload _ _))
 11571  	// cond:
 11572  	// result: x
 11573  	for {
 11574  		x := v.Args[0]
 11575  		if x.Op != OpPPC64MOVBZload {
 11576  			break
 11577  		}
 11578  		_ = x.Args[1]
 11579  		v.reset(OpCopy)
 11580  		v.Type = x.Type
 11581  		v.AddArg(x)
 11582  		return true
 11583  	}
 11584  	// match: (MOVWZreg x:(MOVBZloadidx _ _ _))
 11585  	// cond:
 11586  	// result: x
 11587  	for {
 11588  		x := v.Args[0]
 11589  		if x.Op != OpPPC64MOVBZloadidx {
 11590  			break
 11591  		}
 11592  		_ = x.Args[2]
 11593  		v.reset(OpCopy)
 11594  		v.Type = x.Type
 11595  		v.AddArg(x)
 11596  		return true
 11597  	}
 11598  	// match: (MOVWZreg x:(MOVHZload _ _))
 11599  	// cond:
 11600  	// result: x
 11601  	for {
 11602  		x := v.Args[0]
 11603  		if x.Op != OpPPC64MOVHZload {
 11604  			break
 11605  		}
 11606  		_ = x.Args[1]
 11607  		v.reset(OpCopy)
 11608  		v.Type = x.Type
 11609  		v.AddArg(x)
 11610  		return true
 11611  	}
 11612  	// match: (MOVWZreg x:(MOVHZloadidx _ _ _))
 11613  	// cond:
 11614  	// result: x
 11615  	for {
 11616  		x := v.Args[0]
 11617  		if x.Op != OpPPC64MOVHZloadidx {
 11618  			break
 11619  		}
 11620  		_ = x.Args[2]
 11621  		v.reset(OpCopy)
 11622  		v.Type = x.Type
 11623  		v.AddArg(x)
 11624  		return true
 11625  	}
 11626  	// match: (MOVWZreg x:(MOVWZload _ _))
 11627  	// cond:
 11628  	// result: x
 11629  	for {
 11630  		x := v.Args[0]
 11631  		if x.Op != OpPPC64MOVWZload {
 11632  			break
 11633  		}
 11634  		_ = x.Args[1]
 11635  		v.reset(OpCopy)
 11636  		v.Type = x.Type
 11637  		v.AddArg(x)
 11638  		return true
 11639  	}
 11640  	// match: (MOVWZreg x:(MOVWZloadidx _ _ _))
 11641  	// cond:
 11642  	// result: x
 11643  	for {
 11644  		x := v.Args[0]
 11645  		if x.Op != OpPPC64MOVWZloadidx {
 11646  			break
 11647  		}
 11648  		_ = x.Args[2]
 11649  		v.reset(OpCopy)
 11650  		v.Type = x.Type
 11651  		v.AddArg(x)
 11652  		return true
 11653  	}
 11654  	return false
 11655  }
 11656  func rewriteValuePPC64_OpPPC64MOVWZreg_20(v *Value) bool {
 11657  	// match: (MOVWZreg x:(Arg <t>))
 11658  	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)
 11659  	// result: x
 11660  	for {
 11661  		x := v.Args[0]
 11662  		if x.Op != OpArg {
 11663  			break
 11664  		}
 11665  		t := x.Type
 11666  		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) {
 11667  			break
 11668  		}
 11669  		v.reset(OpCopy)
 11670  		v.Type = x.Type
 11671  		v.AddArg(x)
 11672  		return true
 11673  	}
 11674  	// match: (MOVWZreg (MOVDconst [c]))
 11675  	// cond:
 11676  	// result: (MOVDconst [int64(uint32(c))])
 11677  	for {
 11678  		v_0 := v.Args[0]
 11679  		if v_0.Op != OpPPC64MOVDconst {
 11680  			break
 11681  		}
 11682  		c := v_0.AuxInt
 11683  		v.reset(OpPPC64MOVDconst)
 11684  		v.AuxInt = int64(uint32(c))
 11685  		return true
 11686  	}
 11687  	return false
 11688  }
 11689  func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
 11690  	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 11691  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11692  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11693  	for {
 11694  		off1 := v.AuxInt
 11695  		sym1 := v.Aux
 11696  		_ = v.Args[1]
 11697  		p := v.Args[0]
 11698  		if p.Op != OpPPC64MOVDaddr {
 11699  			break
 11700  		}
 11701  		off2 := p.AuxInt
 11702  		sym2 := p.Aux
 11703  		ptr := p.Args[0]
 11704  		mem := v.Args[1]
 11705  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11706  			break
 11707  		}
 11708  		v.reset(OpPPC64MOVWload)
 11709  		v.AuxInt = off1 + off2
 11710  		v.Aux = mergeSym(sym1, sym2)
 11711  		v.AddArg(ptr)
 11712  		v.AddArg(mem)
 11713  		return true
 11714  	}
 11715  	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
 11716  	// cond: is16Bit(off1+off2)
 11717  	// result: (MOVWload [off1+off2] {sym} x mem)
 11718  	for {
 11719  		off1 := v.AuxInt
 11720  		sym := v.Aux
 11721  		_ = v.Args[1]
 11722  		v_0 := v.Args[0]
 11723  		if v_0.Op != OpPPC64ADDconst {
 11724  			break
 11725  		}
 11726  		off2 := v_0.AuxInt
 11727  		x := v_0.Args[0]
 11728  		mem := v.Args[1]
 11729  		if !(is16Bit(off1 + off2)) {
 11730  			break
 11731  		}
 11732  		v.reset(OpPPC64MOVWload)
 11733  		v.AuxInt = off1 + off2
 11734  		v.Aux = sym
 11735  		v.AddArg(x)
 11736  		v.AddArg(mem)
 11737  		return true
 11738  	}
 11739  	// match: (MOVWload [0] {sym} p:(ADD ptr idx) mem)
 11740  	// cond: sym == nil && p.Uses == 1
 11741  	// result: (MOVWloadidx ptr idx mem)
 11742  	for {
 11743  		if v.AuxInt != 0 {
 11744  			break
 11745  		}
 11746  		sym := v.Aux
 11747  		_ = v.Args[1]
 11748  		p := v.Args[0]
 11749  		if p.Op != OpPPC64ADD {
 11750  			break
 11751  		}
 11752  		_ = p.Args[1]
 11753  		ptr := p.Args[0]
 11754  		idx := p.Args[1]
 11755  		mem := v.Args[1]
 11756  		if !(sym == nil && p.Uses == 1) {
 11757  			break
 11758  		}
 11759  		v.reset(OpPPC64MOVWloadidx)
 11760  		v.AddArg(ptr)
 11761  		v.AddArg(idx)
 11762  		v.AddArg(mem)
 11763  		return true
 11764  	}
 11765  	return false
 11766  }
 11767  func rewriteValuePPC64_OpPPC64MOVWloadidx_0(v *Value) bool {
 11768  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 11769  	// cond: is16Bit(c)
 11770  	// result: (MOVWload [c] ptr mem)
 11771  	for {
 11772  		_ = v.Args[2]
 11773  		ptr := v.Args[0]
 11774  		v_1 := v.Args[1]
 11775  		if v_1.Op != OpPPC64MOVDconst {
 11776  			break
 11777  		}
 11778  		c := v_1.AuxInt
 11779  		mem := v.Args[2]
 11780  		if !(is16Bit(c)) {
 11781  			break
 11782  		}
 11783  		v.reset(OpPPC64MOVWload)
 11784  		v.AuxInt = c
 11785  		v.AddArg(ptr)
 11786  		v.AddArg(mem)
 11787  		return true
 11788  	}
 11789  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 11790  	// cond: is16Bit(c)
 11791  	// result: (MOVWload [c] ptr mem)
 11792  	for {
 11793  		_ = v.Args[2]
 11794  		v_0 := v.Args[0]
 11795  		if v_0.Op != OpPPC64MOVDconst {
 11796  			break
 11797  		}
 11798  		c := v_0.AuxInt
 11799  		ptr := v.Args[1]
 11800  		mem := v.Args[2]
 11801  		if !(is16Bit(c)) {
 11802  			break
 11803  		}
 11804  		v.reset(OpPPC64MOVWload)
 11805  		v.AuxInt = c
 11806  		v.AddArg(ptr)
 11807  		v.AddArg(mem)
 11808  		return true
 11809  	}
 11810  	return false
 11811  }
 11812  func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
 11813  	b := v.Block
 11814  	_ = b
 11815  	typ := &b.Func.Config.Types
 11816  	_ = typ
 11817  	// match: (MOVWreg y:(ANDconst [c] _))
 11818  	// cond: uint64(c) <= 0xFFFF
 11819  	// result: y
 11820  	for {
 11821  		y := v.Args[0]
 11822  		if y.Op != OpPPC64ANDconst {
 11823  			break
 11824  		}
 11825  		c := y.AuxInt
 11826  		if !(uint64(c) <= 0xFFFF) {
 11827  			break
 11828  		}
 11829  		v.reset(OpCopy)
 11830  		v.Type = y.Type
 11831  		v.AddArg(y)
 11832  		return true
 11833  	}
 11834  	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
 11835  	// cond: uint64(c) <= 0x7FFFFFFF
 11836  	// result: y
 11837  	for {
 11838  		y := v.Args[0]
 11839  		if y.Op != OpPPC64AND {
 11840  			break
 11841  		}
 11842  		_ = y.Args[1]
 11843  		y_0 := y.Args[0]
 11844  		if y_0.Op != OpPPC64MOVDconst {
 11845  			break
 11846  		}
 11847  		c := y_0.AuxInt
 11848  		if !(uint64(c) <= 0x7FFFFFFF) {
 11849  			break
 11850  		}
 11851  		v.reset(OpCopy)
 11852  		v.Type = y.Type
 11853  		v.AddArg(y)
 11854  		return true
 11855  	}
 11856  	// match: (MOVWreg y:(AND _ (MOVDconst [c])))
 11857  	// cond: uint64(c) <= 0x7FFFFFFF
 11858  	// result: y
 11859  	for {
 11860  		y := v.Args[0]
 11861  		if y.Op != OpPPC64AND {
 11862  			break
 11863  		}
 11864  		_ = y.Args[1]
 11865  		y_1 := y.Args[1]
 11866  		if y_1.Op != OpPPC64MOVDconst {
 11867  			break
 11868  		}
 11869  		c := y_1.AuxInt
 11870  		if !(uint64(c) <= 0x7FFFFFFF) {
 11871  			break
 11872  		}
 11873  		v.reset(OpCopy)
 11874  		v.Type = y.Type
 11875  		v.AddArg(y)
 11876  		return true
 11877  	}
 11878  	// match: (MOVWreg (SRAWconst [c] (MOVBreg x)))
 11879  	// cond:
 11880  	// result: (SRAWconst [c] (MOVBreg x))
 11881  	for {
 11882  		v_0 := v.Args[0]
 11883  		if v_0.Op != OpPPC64SRAWconst {
 11884  			break
 11885  		}
 11886  		c := v_0.AuxInt
 11887  		v_0_0 := v_0.Args[0]
 11888  		if v_0_0.Op != OpPPC64MOVBreg {
 11889  			break
 11890  		}
 11891  		x := v_0_0.Args[0]
 11892  		v.reset(OpPPC64SRAWconst)
 11893  		v.AuxInt = c
 11894  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 11895  		v0.AddArg(x)
 11896  		v.AddArg(v0)
 11897  		return true
 11898  	}
 11899  	// match: (MOVWreg (SRAWconst [c] (MOVHreg x)))
 11900  	// cond:
 11901  	// result: (SRAWconst [c] (MOVHreg x))
 11902  	for {
 11903  		v_0 := v.Args[0]
 11904  		if v_0.Op != OpPPC64SRAWconst {
 11905  			break
 11906  		}
 11907  		c := v_0.AuxInt
 11908  		v_0_0 := v_0.Args[0]
 11909  		if v_0_0.Op != OpPPC64MOVHreg {
 11910  			break
 11911  		}
 11912  		x := v_0_0.Args[0]
 11913  		v.reset(OpPPC64SRAWconst)
 11914  		v.AuxInt = c
 11915  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 11916  		v0.AddArg(x)
 11917  		v.AddArg(v0)
 11918  		return true
 11919  	}
 11920  	// match: (MOVWreg (SRAWconst [c] (MOVWreg x)))
 11921  	// cond:
 11922  	// result: (SRAWconst [c] (MOVWreg x))
 11923  	for {
 11924  		v_0 := v.Args[0]
 11925  		if v_0.Op != OpPPC64SRAWconst {
 11926  			break
 11927  		}
 11928  		c := v_0.AuxInt
 11929  		v_0_0 := v_0.Args[0]
 11930  		if v_0_0.Op != OpPPC64MOVWreg {
 11931  			break
 11932  		}
 11933  		x := v_0_0.Args[0]
 11934  		v.reset(OpPPC64SRAWconst)
 11935  		v.AuxInt = c
 11936  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWreg, typ.Int64)
 11937  		v0.AddArg(x)
 11938  		v.AddArg(v0)
 11939  		return true
 11940  	}
 11941  	// match: (MOVWreg (SRAWconst [c] x))
 11942  	// cond: sizeof(x.Type) <= 32
 11943  	// result: (SRAWconst [c] x)
 11944  	for {
 11945  		v_0 := v.Args[0]
 11946  		if v_0.Op != OpPPC64SRAWconst {
 11947  			break
 11948  		}
 11949  		c := v_0.AuxInt
 11950  		x := v_0.Args[0]
 11951  		if !(sizeof(x.Type) <= 32) {
 11952  			break
 11953  		}
 11954  		v.reset(OpPPC64SRAWconst)
 11955  		v.AuxInt = c
 11956  		v.AddArg(x)
 11957  		return true
 11958  	}
 11959  	// match: (MOVWreg (SRDconst [c] x))
 11960  	// cond: c>32
 11961  	// result: (SRDconst [c] x)
 11962  	for {
 11963  		v_0 := v.Args[0]
 11964  		if v_0.Op != OpPPC64SRDconst {
 11965  			break
 11966  		}
 11967  		c := v_0.AuxInt
 11968  		x := v_0.Args[0]
 11969  		if !(c > 32) {
 11970  			break
 11971  		}
 11972  		v.reset(OpPPC64SRDconst)
 11973  		v.AuxInt = c
 11974  		v.AddArg(x)
 11975  		return true
 11976  	}
 11977  	// match: (MOVWreg (SRDconst [c] x))
 11978  	// cond: c==32
 11979  	// result: (SRADconst [c] x)
 11980  	for {
 11981  		v_0 := v.Args[0]
 11982  		if v_0.Op != OpPPC64SRDconst {
 11983  			break
 11984  		}
 11985  		c := v_0.AuxInt
 11986  		x := v_0.Args[0]
 11987  		if !(c == 32) {
 11988  			break
 11989  		}
 11990  		v.reset(OpPPC64SRADconst)
 11991  		v.AuxInt = c
 11992  		v.AddArg(x)
 11993  		return true
 11994  	}
 11995  	// match: (MOVWreg y:(MOVWreg _))
 11996  	// cond:
 11997  	// result: y
 11998  	for {
 11999  		y := v.Args[0]
 12000  		if y.Op != OpPPC64MOVWreg {
 12001  			break
 12002  		}
 12003  		v.reset(OpCopy)
 12004  		v.Type = y.Type
 12005  		v.AddArg(y)
 12006  		return true
 12007  	}
 12008  	return false
 12009  }
 12010  func rewriteValuePPC64_OpPPC64MOVWreg_10(v *Value) bool {
 12011  	// match: (MOVWreg y:(MOVHreg _))
 12012  	// cond:
 12013  	// result: y
 12014  	for {
 12015  		y := v.Args[0]
 12016  		if y.Op != OpPPC64MOVHreg {
 12017  			break
 12018  		}
 12019  		v.reset(OpCopy)
 12020  		v.Type = y.Type
 12021  		v.AddArg(y)
 12022  		return true
 12023  	}
 12024  	// match: (MOVWreg y:(MOVBreg _))
 12025  	// cond:
 12026  	// result: y
 12027  	for {
 12028  		y := v.Args[0]
 12029  		if y.Op != OpPPC64MOVBreg {
 12030  			break
 12031  		}
 12032  		v.reset(OpCopy)
 12033  		v.Type = y.Type
 12034  		v.AddArg(y)
 12035  		return true
 12036  	}
 12037  	// match: (MOVWreg y:(MOVWZreg x))
 12038  	// cond:
 12039  	// result: (MOVWreg x)
 12040  	for {
 12041  		y := v.Args[0]
 12042  		if y.Op != OpPPC64MOVWZreg {
 12043  			break
 12044  		}
 12045  		x := y.Args[0]
 12046  		v.reset(OpPPC64MOVWreg)
 12047  		v.AddArg(x)
 12048  		return true
 12049  	}
 12050  	// match: (MOVWreg x:(MOVHload _ _))
 12051  	// cond:
 12052  	// result: x
 12053  	for {
 12054  		x := v.Args[0]
 12055  		if x.Op != OpPPC64MOVHload {
 12056  			break
 12057  		}
 12058  		_ = x.Args[1]
 12059  		v.reset(OpCopy)
 12060  		v.Type = x.Type
 12061  		v.AddArg(x)
 12062  		return true
 12063  	}
 12064  	// match: (MOVWreg x:(MOVHloadidx _ _ _))
 12065  	// cond:
 12066  	// result: x
 12067  	for {
 12068  		x := v.Args[0]
 12069  		if x.Op != OpPPC64MOVHloadidx {
 12070  			break
 12071  		}
 12072  		_ = x.Args[2]
 12073  		v.reset(OpCopy)
 12074  		v.Type = x.Type
 12075  		v.AddArg(x)
 12076  		return true
 12077  	}
 12078  	// match: (MOVWreg x:(MOVWload _ _))
 12079  	// cond:
 12080  	// result: x
 12081  	for {
 12082  		x := v.Args[0]
 12083  		if x.Op != OpPPC64MOVWload {
 12084  			break
 12085  		}
 12086  		_ = x.Args[1]
 12087  		v.reset(OpCopy)
 12088  		v.Type = x.Type
 12089  		v.AddArg(x)
 12090  		return true
 12091  	}
 12092  	// match: (MOVWreg x:(MOVWloadidx _ _ _))
 12093  	// cond:
 12094  	// result: x
 12095  	for {
 12096  		x := v.Args[0]
 12097  		if x.Op != OpPPC64MOVWloadidx {
 12098  			break
 12099  		}
 12100  		_ = x.Args[2]
 12101  		v.reset(OpCopy)
 12102  		v.Type = x.Type
 12103  		v.AddArg(x)
 12104  		return true
 12105  	}
 12106  	// match: (MOVWreg x:(Arg <t>))
 12107  	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)
 12108  	// result: x
 12109  	for {
 12110  		x := v.Args[0]
 12111  		if x.Op != OpArg {
 12112  			break
 12113  		}
 12114  		t := x.Type
 12115  		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) {
 12116  			break
 12117  		}
 12118  		v.reset(OpCopy)
 12119  		v.Type = x.Type
 12120  		v.AddArg(x)
 12121  		return true
 12122  	}
 12123  	// match: (MOVWreg (MOVDconst [c]))
 12124  	// cond:
 12125  	// result: (MOVDconst [int64(int32(c))])
 12126  	for {
 12127  		v_0 := v.Args[0]
 12128  		if v_0.Op != OpPPC64MOVDconst {
 12129  			break
 12130  		}
 12131  		c := v_0.AuxInt
 12132  		v.reset(OpPPC64MOVDconst)
 12133  		v.AuxInt = int64(int32(c))
 12134  		return true
 12135  	}
 12136  	return false
 12137  }
 12138  func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
 12139  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
 12140  	// cond: is16Bit(off1+off2)
 12141  	// result: (MOVWstore [off1+off2] {sym} x val mem)
 12142  	for {
 12143  		off1 := v.AuxInt
 12144  		sym := v.Aux
 12145  		_ = v.Args[2]
 12146  		v_0 := v.Args[0]
 12147  		if v_0.Op != OpPPC64ADDconst {
 12148  			break
 12149  		}
 12150  		off2 := v_0.AuxInt
 12151  		x := v_0.Args[0]
 12152  		val := v.Args[1]
 12153  		mem := v.Args[2]
 12154  		if !(is16Bit(off1 + off2)) {
 12155  			break
 12156  		}
 12157  		v.reset(OpPPC64MOVWstore)
 12158  		v.AuxInt = off1 + off2
 12159  		v.Aux = sym
 12160  		v.AddArg(x)
 12161  		v.AddArg(val)
 12162  		v.AddArg(mem)
 12163  		return true
 12164  	}
 12165  	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 12166  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 12167  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 12168  	for {
 12169  		off1 := v.AuxInt
 12170  		sym1 := v.Aux
 12171  		_ = v.Args[2]
 12172  		p := v.Args[0]
 12173  		if p.Op != OpPPC64MOVDaddr {
 12174  			break
 12175  		}
 12176  		off2 := p.AuxInt
 12177  		sym2 := p.Aux
 12178  		ptr := p.Args[0]
 12179  		val := v.Args[1]
 12180  		mem := v.Args[2]
 12181  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 12182  			break
 12183  		}
 12184  		v.reset(OpPPC64MOVWstore)
 12185  		v.AuxInt = off1 + off2
 12186  		v.Aux = mergeSym(sym1, sym2)
 12187  		v.AddArg(ptr)
 12188  		v.AddArg(val)
 12189  		v.AddArg(mem)
 12190  		return true
 12191  	}
 12192  	// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
 12193  	// cond:
 12194  	// result: (MOVWstorezero [off] {sym} ptr mem)
 12195  	for {
 12196  		off := v.AuxInt
 12197  		sym := v.Aux
 12198  		_ = v.Args[2]
 12199  		ptr := v.Args[0]
 12200  		v_1 := v.Args[1]
 12201  		if v_1.Op != OpPPC64MOVDconst {
 12202  			break
 12203  		}
 12204  		if v_1.AuxInt != 0 {
 12205  			break
 12206  		}
 12207  		mem := v.Args[2]
 12208  		v.reset(OpPPC64MOVWstorezero)
 12209  		v.AuxInt = off
 12210  		v.Aux = sym
 12211  		v.AddArg(ptr)
 12212  		v.AddArg(mem)
 12213  		return true
 12214  	}
 12215  	// match: (MOVWstore [off] {sym} p:(ADD ptr idx) val mem)
 12216  	// cond: off == 0 && sym == nil && p.Uses == 1
 12217  	// result: (MOVWstoreidx ptr idx val mem)
 12218  	for {
 12219  		off := v.AuxInt
 12220  		sym := v.Aux
 12221  		_ = v.Args[2]
 12222  		p := v.Args[0]
 12223  		if p.Op != OpPPC64ADD {
 12224  			break
 12225  		}
 12226  		_ = p.Args[1]
 12227  		ptr := p.Args[0]
 12228  		idx := p.Args[1]
 12229  		val := v.Args[1]
 12230  		mem := v.Args[2]
 12231  		if !(off == 0 && sym == nil && p.Uses == 1) {
 12232  			break
 12233  		}
 12234  		v.reset(OpPPC64MOVWstoreidx)
 12235  		v.AddArg(ptr)
 12236  		v.AddArg(idx)
 12237  		v.AddArg(val)
 12238  		v.AddArg(mem)
 12239  		return true
 12240  	}
 12241  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 12242  	// cond:
 12243  	// result: (MOVWstore [off] {sym} ptr x mem)
 12244  	for {
 12245  		off := v.AuxInt
 12246  		sym := v.Aux
 12247  		_ = v.Args[2]
 12248  		ptr := v.Args[0]
 12249  		v_1 := v.Args[1]
 12250  		if v_1.Op != OpPPC64MOVWreg {
 12251  			break
 12252  		}
 12253  		x := v_1.Args[0]
 12254  		mem := v.Args[2]
 12255  		v.reset(OpPPC64MOVWstore)
 12256  		v.AuxInt = off
 12257  		v.Aux = sym
 12258  		v.AddArg(ptr)
 12259  		v.AddArg(x)
 12260  		v.AddArg(mem)
 12261  		return true
 12262  	}
 12263  	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
 12264  	// cond:
 12265  	// result: (MOVWstore [off] {sym} ptr x mem)
 12266  	for {
 12267  		off := v.AuxInt
 12268  		sym := v.Aux
 12269  		_ = v.Args[2]
 12270  		ptr := v.Args[0]
 12271  		v_1 := v.Args[1]
 12272  		if v_1.Op != OpPPC64MOVWZreg {
 12273  			break
 12274  		}
 12275  		x := v_1.Args[0]
 12276  		mem := v.Args[2]
 12277  		v.reset(OpPPC64MOVWstore)
 12278  		v.AuxInt = off
 12279  		v.Aux = sym
 12280  		v.AddArg(ptr)
 12281  		v.AddArg(x)
 12282  		v.AddArg(mem)
 12283  		return true
 12284  	}
 12285  	return false
 12286  }
 12287  func rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v *Value) bool {
 12288  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 12289  	// cond: is16Bit(c)
 12290  	// result: (MOVWstore [c] ptr val mem)
 12291  	for {
 12292  		_ = v.Args[3]
 12293  		ptr := v.Args[0]
 12294  		v_1 := v.Args[1]
 12295  		if v_1.Op != OpPPC64MOVDconst {
 12296  			break
 12297  		}
 12298  		c := v_1.AuxInt
 12299  		val := v.Args[2]
 12300  		mem := v.Args[3]
 12301  		if !(is16Bit(c)) {
 12302  			break
 12303  		}
 12304  		v.reset(OpPPC64MOVWstore)
 12305  		v.AuxInt = c
 12306  		v.AddArg(ptr)
 12307  		v.AddArg(val)
 12308  		v.AddArg(mem)
 12309  		return true
 12310  	}
 12311  	// match: (MOVWstoreidx (MOVDconst [c]) ptr val mem)
 12312  	// cond: is16Bit(c)
 12313  	// result: (MOVWstore [c] ptr val mem)
 12314  	for {
 12315  		_ = v.Args[3]
 12316  		v_0 := v.Args[0]
 12317  		if v_0.Op != OpPPC64MOVDconst {
 12318  			break
 12319  		}
 12320  		c := v_0.AuxInt
 12321  		ptr := v.Args[1]
 12322  		val := v.Args[2]
 12323  		mem := v.Args[3]
 12324  		if !(is16Bit(c)) {
 12325  			break
 12326  		}
 12327  		v.reset(OpPPC64MOVWstore)
 12328  		v.AuxInt = c
 12329  		v.AddArg(ptr)
 12330  		v.AddArg(val)
 12331  		v.AddArg(mem)
 12332  		return true
 12333  	}
 12334  	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 12335  	// cond:
 12336  	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 12337  	for {
 12338  		off := v.AuxInt
 12339  		sym := v.Aux
 12340  		_ = v.Args[3]
 12341  		ptr := v.Args[0]
 12342  		idx := v.Args[1]
 12343  		v_2 := v.Args[2]
 12344  		if v_2.Op != OpPPC64MOVWreg {
 12345  			break
 12346  		}
 12347  		x := v_2.Args[0]
 12348  		mem := v.Args[3]
 12349  		v.reset(OpPPC64MOVWstoreidx)
 12350  		v.AuxInt = off
 12351  		v.Aux = sym
 12352  		v.AddArg(ptr)
 12353  		v.AddArg(idx)
 12354  		v.AddArg(x)
 12355  		v.AddArg(mem)
 12356  		return true
 12357  	}
 12358  	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 12359  	// cond:
 12360  	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 12361  	for {
 12362  		off := v.AuxInt
 12363  		sym := v.Aux
 12364  		_ = v.Args[3]
 12365  		ptr := v.Args[0]
 12366  		idx := v.Args[1]
 12367  		v_2 := v.Args[2]
 12368  		if v_2.Op != OpPPC64MOVWZreg {
 12369  			break
 12370  		}
 12371  		x := v_2.Args[0]
 12372  		mem := v.Args[3]
 12373  		v.reset(OpPPC64MOVWstoreidx)
 12374  		v.AuxInt = off
 12375  		v.Aux = sym
 12376  		v.AddArg(ptr)
 12377  		v.AddArg(idx)
 12378  		v.AddArg(x)
 12379  		v.AddArg(mem)
 12380  		return true
 12381  	}
 12382  	return false
 12383  }
 12384  func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
 12385  	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
 12386  	// cond: is16Bit(off1+off2)
 12387  	// result: (MOVWstorezero [off1+off2] {sym} x mem)
 12388  	for {
 12389  		off1 := v.AuxInt
 12390  		sym := v.Aux
 12391  		_ = v.Args[1]
 12392  		v_0 := v.Args[0]
 12393  		if v_0.Op != OpPPC64ADDconst {
 12394  			break
 12395  		}
 12396  		off2 := v_0.AuxInt
 12397  		x := v_0.Args[0]
 12398  		mem := v.Args[1]
 12399  		if !(is16Bit(off1 + off2)) {
 12400  			break
 12401  		}
 12402  		v.reset(OpPPC64MOVWstorezero)
 12403  		v.AuxInt = off1 + off2
 12404  		v.Aux = sym
 12405  		v.AddArg(x)
 12406  		v.AddArg(mem)
 12407  		return true
 12408  	}
 12409  	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 12410  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 12411  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 12412  	for {
 12413  		off1 := v.AuxInt
 12414  		sym1 := v.Aux
 12415  		_ = v.Args[1]
 12416  		p := v.Args[0]
 12417  		if p.Op != OpPPC64MOVDaddr {
 12418  			break
 12419  		}
 12420  		off2 := p.AuxInt
 12421  		sym2 := p.Aux
 12422  		x := p.Args[0]
 12423  		mem := v.Args[1]
 12424  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 12425  			break
 12426  		}
 12427  		v.reset(OpPPC64MOVWstorezero)
 12428  		v.AuxInt = off1 + off2
 12429  		v.Aux = mergeSym(sym1, sym2)
 12430  		v.AddArg(x)
 12431  		v.AddArg(mem)
 12432  		return true
 12433  	}
 12434  	return false
 12435  }
 12436  func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
 12437  	b := v.Block
 12438  	_ = b
 12439  	typ := &b.Func.Config.Types
 12440  	_ = typ
 12441  	// match: (MTVSRD (MOVDconst [c]))
 12442  	// cond:
 12443  	// result: (FMOVDconst [c])
 12444  	for {
 12445  		v_0 := v.Args[0]
 12446  		if v_0.Op != OpPPC64MOVDconst {
 12447  			break
 12448  		}
 12449  		c := v_0.AuxInt
 12450  		v.reset(OpPPC64FMOVDconst)
 12451  		v.AuxInt = c
 12452  		return true
 12453  	}
 12454  	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
 12455  	// cond: x.Uses == 1 && clobber(x)
 12456  	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
 12457  	for {
 12458  		x := v.Args[0]
 12459  		if x.Op != OpPPC64MOVDload {
 12460  			break
 12461  		}
 12462  		off := x.AuxInt
 12463  		sym := x.Aux
 12464  		_ = x.Args[1]
 12465  		ptr := x.Args[0]
 12466  		mem := x.Args[1]
 12467  		if !(x.Uses == 1 && clobber(x)) {
 12468  			break
 12469  		}
 12470  		b = x.Block
 12471  		v0 := b.NewValue0(v.Pos, OpPPC64FMOVDload, typ.Float64)
 12472  		v.reset(OpCopy)
 12473  		v.AddArg(v0)
 12474  		v0.AuxInt = off
 12475  		v0.Aux = sym
 12476  		v0.AddArg(ptr)
 12477  		v0.AddArg(mem)
 12478  		return true
 12479  	}
 12480  	return false
 12481  }
 12482  func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
 12483  	// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
 12484  	// cond: c < 0 && d > 0 && c + d < 0
 12485  	// result: (MOVDconst [-1])
 12486  	for {
 12487  		v_0 := v.Args[0]
 12488  		if v_0.Op != OpPPC64ADDconstForCarry {
 12489  			break
 12490  		}
 12491  		c := v_0.AuxInt
 12492  		v_0_0 := v_0.Args[0]
 12493  		if v_0_0.Op != OpPPC64ANDconst {
 12494  			break
 12495  		}
 12496  		d := v_0_0.AuxInt
 12497  		if !(c < 0 && d > 0 && c+d < 0) {
 12498  			break
 12499  		}
 12500  		v.reset(OpPPC64MOVDconst)
 12501  		v.AuxInt = -1
 12502  		return true
 12503  	}
 12504  	return false
 12505  }
 12506  func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
 12507  	// match: (NotEqual (FlagEQ))
 12508  	// cond:
 12509  	// result: (MOVDconst [0])
 12510  	for {
 12511  		v_0 := v.Args[0]
 12512  		if v_0.Op != OpPPC64FlagEQ {
 12513  			break
 12514  		}
 12515  		v.reset(OpPPC64MOVDconst)
 12516  		v.AuxInt = 0
 12517  		return true
 12518  	}
 12519  	// match: (NotEqual (FlagLT))
 12520  	// cond:
 12521  	// result: (MOVDconst [1])
 12522  	for {
 12523  		v_0 := v.Args[0]
 12524  		if v_0.Op != OpPPC64FlagLT {
 12525  			break
 12526  		}
 12527  		v.reset(OpPPC64MOVDconst)
 12528  		v.AuxInt = 1
 12529  		return true
 12530  	}
 12531  	// match: (NotEqual (FlagGT))
 12532  	// cond:
 12533  	// result: (MOVDconst [1])
 12534  	for {
 12535  		v_0 := v.Args[0]
 12536  		if v_0.Op != OpPPC64FlagGT {
 12537  			break
 12538  		}
 12539  		v.reset(OpPPC64MOVDconst)
 12540  		v.AuxInt = 1
 12541  		return true
 12542  	}
 12543  	// match: (NotEqual (InvertFlags x))
 12544  	// cond:
 12545  	// result: (NotEqual x)
 12546  	for {
 12547  		v_0 := v.Args[0]
 12548  		if v_0.Op != OpPPC64InvertFlags {
 12549  			break
 12550  		}
 12551  		x := v_0.Args[0]
 12552  		v.reset(OpPPC64NotEqual)
 12553  		v.AddArg(x)
 12554  		return true
 12555  	}
 12556  	return false
 12557  }
 12558  func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
 12559  	b := v.Block
 12560  	_ = b
 12561  	typ := &b.Func.Config.Types
 12562  	_ = typ
 12563  	// match: (OR (SLDconst x [c]) (SRDconst x [d]))
 12564  	// cond: d == 64-c
 12565  	// result: (ROTLconst [c] x)
 12566  	for {
 12567  		_ = v.Args[1]
 12568  		v_0 := v.Args[0]
 12569  		if v_0.Op != OpPPC64SLDconst {
 12570  			break
 12571  		}
 12572  		c := v_0.AuxInt
 12573  		x := v_0.Args[0]
 12574  		v_1 := v.Args[1]
 12575  		if v_1.Op != OpPPC64SRDconst {
 12576  			break
 12577  		}
 12578  		d := v_1.AuxInt
 12579  		if x != v_1.Args[0] {
 12580  			break
 12581  		}
 12582  		if !(d == 64-c) {
 12583  			break
 12584  		}
 12585  		v.reset(OpPPC64ROTLconst)
 12586  		v.AuxInt = c
 12587  		v.AddArg(x)
 12588  		return true
 12589  	}
 12590  	// match: (OR (SRDconst x [d]) (SLDconst x [c]))
 12591  	// cond: d == 64-c
 12592  	// result: (ROTLconst [c] x)
 12593  	for {
 12594  		_ = v.Args[1]
 12595  		v_0 := v.Args[0]
 12596  		if v_0.Op != OpPPC64SRDconst {
 12597  			break
 12598  		}
 12599  		d := v_0.AuxInt
 12600  		x := v_0.Args[0]
 12601  		v_1 := v.Args[1]
 12602  		if v_1.Op != OpPPC64SLDconst {
 12603  			break
 12604  		}
 12605  		c := v_1.AuxInt
 12606  		if x != v_1.Args[0] {
 12607  			break
 12608  		}
 12609  		if !(d == 64-c) {
 12610  			break
 12611  		}
 12612  		v.reset(OpPPC64ROTLconst)
 12613  		v.AuxInt = c
 12614  		v.AddArg(x)
 12615  		return true
 12616  	}
 12617  	// match: (OR (SLWconst x [c]) (SRWconst x [d]))
 12618  	// cond: d == 32-c
 12619  	// result: (ROTLWconst [c] x)
 12620  	for {
 12621  		_ = v.Args[1]
 12622  		v_0 := v.Args[0]
 12623  		if v_0.Op != OpPPC64SLWconst {
 12624  			break
 12625  		}
 12626  		c := v_0.AuxInt
 12627  		x := v_0.Args[0]
 12628  		v_1 := v.Args[1]
 12629  		if v_1.Op != OpPPC64SRWconst {
 12630  			break
 12631  		}
 12632  		d := v_1.AuxInt
 12633  		if x != v_1.Args[0] {
 12634  			break
 12635  		}
 12636  		if !(d == 32-c) {
 12637  			break
 12638  		}
 12639  		v.reset(OpPPC64ROTLWconst)
 12640  		v.AuxInt = c
 12641  		v.AddArg(x)
 12642  		return true
 12643  	}
 12644  	// match: (OR (SRWconst x [d]) (SLWconst x [c]))
 12645  	// cond: d == 32-c
 12646  	// result: (ROTLWconst [c] x)
 12647  	for {
 12648  		_ = v.Args[1]
 12649  		v_0 := v.Args[0]
 12650  		if v_0.Op != OpPPC64SRWconst {
 12651  			break
 12652  		}
 12653  		d := v_0.AuxInt
 12654  		x := v_0.Args[0]
 12655  		v_1 := v.Args[1]
 12656  		if v_1.Op != OpPPC64SLWconst {
 12657  			break
 12658  		}
 12659  		c := v_1.AuxInt
 12660  		if x != v_1.Args[0] {
 12661  			break
 12662  		}
 12663  		if !(d == 32-c) {
 12664  			break
 12665  		}
 12666  		v.reset(OpPPC64ROTLWconst)
 12667  		v.AuxInt = c
 12668  		v.AddArg(x)
 12669  		return true
 12670  	}
 12671  	// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 12672  	// cond:
 12673  	// result: (ROTL x y)
 12674  	for {
 12675  		_ = v.Args[1]
 12676  		v_0 := v.Args[0]
 12677  		if v_0.Op != OpPPC64SLD {
 12678  			break
 12679  		}
 12680  		_ = v_0.Args[1]
 12681  		x := v_0.Args[0]
 12682  		v_0_1 := v_0.Args[1]
 12683  		if v_0_1.Op != OpPPC64ANDconst {
 12684  			break
 12685  		}
 12686  		if v_0_1.Type != typ.Int64 {
 12687  			break
 12688  		}
 12689  		if v_0_1.AuxInt != 63 {
 12690  			break
 12691  		}
 12692  		y := v_0_1.Args[0]
 12693  		v_1 := v.Args[1]
 12694  		if v_1.Op != OpPPC64SRD {
 12695  			break
 12696  		}
 12697  		_ = v_1.Args[1]
 12698  		if x != v_1.Args[0] {
 12699  			break
 12700  		}
 12701  		v_1_1 := v_1.Args[1]
 12702  		if v_1_1.Op != OpPPC64SUB {
 12703  			break
 12704  		}
 12705  		if v_1_1.Type != typ.UInt {
 12706  			break
 12707  		}
 12708  		_ = v_1_1.Args[1]
 12709  		v_1_1_0 := v_1_1.Args[0]
 12710  		if v_1_1_0.Op != OpPPC64MOVDconst {
 12711  			break
 12712  		}
 12713  		if v_1_1_0.AuxInt != 64 {
 12714  			break
 12715  		}
 12716  		v_1_1_1 := v_1_1.Args[1]
 12717  		if v_1_1_1.Op != OpPPC64ANDconst {
 12718  			break
 12719  		}
 12720  		if v_1_1_1.Type != typ.UInt {
 12721  			break
 12722  		}
 12723  		if v_1_1_1.AuxInt != 63 {
 12724  			break
 12725  		}
 12726  		if y != v_1_1_1.Args[0] {
 12727  			break
 12728  		}
 12729  		v.reset(OpPPC64ROTL)
 12730  		v.AddArg(x)
 12731  		v.AddArg(y)
 12732  		return true
 12733  	}
 12734  	// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 12735  	// cond:
 12736  	// result: (ROTL x y)
 12737  	for {
 12738  		_ = v.Args[1]
 12739  		v_0 := v.Args[0]
 12740  		if v_0.Op != OpPPC64SRD {
 12741  			break
 12742  		}
 12743  		_ = v_0.Args[1]
 12744  		x := v_0.Args[0]
 12745  		v_0_1 := v_0.Args[1]
 12746  		if v_0_1.Op != OpPPC64SUB {
 12747  			break
 12748  		}
 12749  		if v_0_1.Type != typ.UInt {
 12750  			break
 12751  		}
 12752  		_ = v_0_1.Args[1]
 12753  		v_0_1_0 := v_0_1.Args[0]
 12754  		if v_0_1_0.Op != OpPPC64MOVDconst {
 12755  			break
 12756  		}
 12757  		if v_0_1_0.AuxInt != 64 {
 12758  			break
 12759  		}
 12760  		v_0_1_1 := v_0_1.Args[1]
 12761  		if v_0_1_1.Op != OpPPC64ANDconst {
 12762  			break
 12763  		}
 12764  		if v_0_1_1.Type != typ.UInt {
 12765  			break
 12766  		}
 12767  		if v_0_1_1.AuxInt != 63 {
 12768  			break
 12769  		}
 12770  		y := v_0_1_1.Args[0]
 12771  		v_1 := v.Args[1]
 12772  		if v_1.Op != OpPPC64SLD {
 12773  			break
 12774  		}
 12775  		_ = v_1.Args[1]
 12776  		if x != v_1.Args[0] {
 12777  			break
 12778  		}
 12779  		v_1_1 := v_1.Args[1]
 12780  		if v_1_1.Op != OpPPC64ANDconst {
 12781  			break
 12782  		}
 12783  		if v_1_1.Type != typ.Int64 {
 12784  			break
 12785  		}
 12786  		if v_1_1.AuxInt != 63 {
 12787  			break
 12788  		}
 12789  		if y != v_1_1.Args[0] {
 12790  			break
 12791  		}
 12792  		v.reset(OpPPC64ROTL)
 12793  		v.AddArg(x)
 12794  		v.AddArg(y)
 12795  		return true
 12796  	}
 12797  	// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 12798  	// cond:
 12799  	// result: (ROTLW x y)
 12800  	for {
 12801  		_ = v.Args[1]
 12802  		v_0 := v.Args[0]
 12803  		if v_0.Op != OpPPC64SLW {
 12804  			break
 12805  		}
 12806  		_ = v_0.Args[1]
 12807  		x := v_0.Args[0]
 12808  		v_0_1 := v_0.Args[1]
 12809  		if v_0_1.Op != OpPPC64ANDconst {
 12810  			break
 12811  		}
 12812  		if v_0_1.Type != typ.Int32 {
 12813  			break
 12814  		}
 12815  		if v_0_1.AuxInt != 31 {
 12816  			break
 12817  		}
 12818  		y := v_0_1.Args[0]
 12819  		v_1 := v.Args[1]
 12820  		if v_1.Op != OpPPC64SRW {
 12821  			break
 12822  		}
 12823  		_ = v_1.Args[1]
 12824  		if x != v_1.Args[0] {
 12825  			break
 12826  		}
 12827  		v_1_1 := v_1.Args[1]
 12828  		if v_1_1.Op != OpPPC64SUB {
 12829  			break
 12830  		}
 12831  		if v_1_1.Type != typ.UInt {
 12832  			break
 12833  		}
 12834  		_ = v_1_1.Args[1]
 12835  		v_1_1_0 := v_1_1.Args[0]
 12836  		if v_1_1_0.Op != OpPPC64MOVDconst {
 12837  			break
 12838  		}
 12839  		if v_1_1_0.AuxInt != 32 {
 12840  			break
 12841  		}
 12842  		v_1_1_1 := v_1_1.Args[1]
 12843  		if v_1_1_1.Op != OpPPC64ANDconst {
 12844  			break
 12845  		}
 12846  		if v_1_1_1.Type != typ.UInt {
 12847  			break
 12848  		}
 12849  		if v_1_1_1.AuxInt != 31 {
 12850  			break
 12851  		}
 12852  		if y != v_1_1_1.Args[0] {
 12853  			break
 12854  		}
 12855  		v.reset(OpPPC64ROTLW)
 12856  		v.AddArg(x)
 12857  		v.AddArg(y)
 12858  		return true
 12859  	}
 12860  	// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 12861  	// cond:
 12862  	// result: (ROTLW x y)
 12863  	for {
 12864  		_ = v.Args[1]
 12865  		v_0 := v.Args[0]
 12866  		if v_0.Op != OpPPC64SRW {
 12867  			break
 12868  		}
 12869  		_ = v_0.Args[1]
 12870  		x := v_0.Args[0]
 12871  		v_0_1 := v_0.Args[1]
 12872  		if v_0_1.Op != OpPPC64SUB {
 12873  			break
 12874  		}
 12875  		if v_0_1.Type != typ.UInt {
 12876  			break
 12877  		}
 12878  		_ = v_0_1.Args[1]
 12879  		v_0_1_0 := v_0_1.Args[0]
 12880  		if v_0_1_0.Op != OpPPC64MOVDconst {
 12881  			break
 12882  		}
 12883  		if v_0_1_0.AuxInt != 32 {
 12884  			break
 12885  		}
 12886  		v_0_1_1 := v_0_1.Args[1]
 12887  		if v_0_1_1.Op != OpPPC64ANDconst {
 12888  			break
 12889  		}
 12890  		if v_0_1_1.Type != typ.UInt {
 12891  			break
 12892  		}
 12893  		if v_0_1_1.AuxInt != 31 {
 12894  			break
 12895  		}
 12896  		y := v_0_1_1.Args[0]
 12897  		v_1 := v.Args[1]
 12898  		if v_1.Op != OpPPC64SLW {
 12899  			break
 12900  		}
 12901  		_ = v_1.Args[1]
 12902  		if x != v_1.Args[0] {
 12903  			break
 12904  		}
 12905  		v_1_1 := v_1.Args[1]
 12906  		if v_1_1.Op != OpPPC64ANDconst {
 12907  			break
 12908  		}
 12909  		if v_1_1.Type != typ.Int32 {
 12910  			break
 12911  		}
 12912  		if v_1_1.AuxInt != 31 {
 12913  			break
 12914  		}
 12915  		if y != v_1_1.Args[0] {
 12916  			break
 12917  		}
 12918  		v.reset(OpPPC64ROTLW)
 12919  		v.AddArg(x)
 12920  		v.AddArg(y)
 12921  		return true
 12922  	}
 12923  	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
 12924  	// cond:
 12925  	// result: (MOVDconst [c|d])
 12926  	for {
 12927  		_ = v.Args[1]
 12928  		v_0 := v.Args[0]
 12929  		if v_0.Op != OpPPC64MOVDconst {
 12930  			break
 12931  		}
 12932  		c := v_0.AuxInt
 12933  		v_1 := v.Args[1]
 12934  		if v_1.Op != OpPPC64MOVDconst {
 12935  			break
 12936  		}
 12937  		d := v_1.AuxInt
 12938  		v.reset(OpPPC64MOVDconst)
 12939  		v.AuxInt = c | d
 12940  		return true
 12941  	}
 12942  	// match: (OR (MOVDconst [d]) (MOVDconst [c]))
 12943  	// cond:
 12944  	// result: (MOVDconst [c|d])
 12945  	for {
 12946  		_ = v.Args[1]
 12947  		v_0 := v.Args[0]
 12948  		if v_0.Op != OpPPC64MOVDconst {
 12949  			break
 12950  		}
 12951  		d := v_0.AuxInt
 12952  		v_1 := v.Args[1]
 12953  		if v_1.Op != OpPPC64MOVDconst {
 12954  			break
 12955  		}
 12956  		c := v_1.AuxInt
 12957  		v.reset(OpPPC64MOVDconst)
 12958  		v.AuxInt = c | d
 12959  		return true
 12960  	}
 12961  	return false
 12962  }
 12963  func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
 12964  	b := v.Block
 12965  	_ = b
 12966  	config := b.Func.Config
 12967  	_ = config
 12968  	typ := &b.Func.Config.Types
 12969  	_ = typ
 12970  	// match: (OR x (MOVDconst [c]))
 12971  	// cond: isU32Bit(c)
 12972  	// result: (ORconst [c] x)
 12973  	for {
 12974  		_ = v.Args[1]
 12975  		x := v.Args[0]
 12976  		v_1 := v.Args[1]
 12977  		if v_1.Op != OpPPC64MOVDconst {
 12978  			break
 12979  		}
 12980  		c := v_1.AuxInt
 12981  		if !(isU32Bit(c)) {
 12982  			break
 12983  		}
 12984  		v.reset(OpPPC64ORconst)
 12985  		v.AuxInt = c
 12986  		v.AddArg(x)
 12987  		return true
 12988  	}
 12989  	// match: (OR (MOVDconst [c]) x)
 12990  	// cond: isU32Bit(c)
 12991  	// result: (ORconst [c] x)
 12992  	for {
 12993  		_ = v.Args[1]
 12994  		v_0 := v.Args[0]
 12995  		if v_0.Op != OpPPC64MOVDconst {
 12996  			break
 12997  		}
 12998  		c := v_0.AuxInt
 12999  		x := v.Args[1]
 13000  		if !(isU32Bit(c)) {
 13001  			break
 13002  		}
 13003  		v.reset(OpPPC64ORconst)
 13004  		v.AuxInt = c
 13005  		v.AddArg(x)
 13006  		return true
 13007  	}
 13008  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
 13009  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13010  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13011  	for {
 13012  		t := v.Type
 13013  		_ = v.Args[1]
 13014  		x0 := v.Args[0]
 13015  		if x0.Op != OpPPC64MOVBZload {
 13016  			break
 13017  		}
 13018  		i0 := x0.AuxInt
 13019  		s := x0.Aux
 13020  		_ = x0.Args[1]
 13021  		p := x0.Args[0]
 13022  		mem := x0.Args[1]
 13023  		o1 := v.Args[1]
 13024  		if o1.Op != OpPPC64SLWconst {
 13025  			break
 13026  		}
 13027  		if o1.AuxInt != 8 {
 13028  			break
 13029  		}
 13030  		x1 := o1.Args[0]
 13031  		if x1.Op != OpPPC64MOVBZload {
 13032  			break
 13033  		}
 13034  		i1 := x1.AuxInt
 13035  		if x1.Aux != s {
 13036  			break
 13037  		}
 13038  		_ = x1.Args[1]
 13039  		if p != x1.Args[0] {
 13040  			break
 13041  		}
 13042  		if mem != x1.Args[1] {
 13043  			break
 13044  		}
 13045  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13046  			break
 13047  		}
 13048  		b = mergePoint(b, x0, x1)
 13049  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
 13050  		v.reset(OpCopy)
 13051  		v.AddArg(v0)
 13052  		v0.AuxInt = i0
 13053  		v0.Aux = s
 13054  		v0.AddArg(p)
 13055  		v0.AddArg(mem)
 13056  		return true
 13057  	}
 13058  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 13059  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13060  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13061  	for {
 13062  		t := v.Type
 13063  		_ = v.Args[1]
 13064  		o1 := v.Args[0]
 13065  		if o1.Op != OpPPC64SLWconst {
 13066  			break
 13067  		}
 13068  		if o1.AuxInt != 8 {
 13069  			break
 13070  		}
 13071  		x1 := o1.Args[0]
 13072  		if x1.Op != OpPPC64MOVBZload {
 13073  			break
 13074  		}
 13075  		i1 := x1.AuxInt
 13076  		s := x1.Aux
 13077  		_ = x1.Args[1]
 13078  		p := x1.Args[0]
 13079  		mem := x1.Args[1]
 13080  		x0 := v.Args[1]
 13081  		if x0.Op != OpPPC64MOVBZload {
 13082  			break
 13083  		}
 13084  		i0 := x0.AuxInt
 13085  		if x0.Aux != s {
 13086  			break
 13087  		}
 13088  		_ = x0.Args[1]
 13089  		if p != x0.Args[0] {
 13090  			break
 13091  		}
 13092  		if mem != x0.Args[1] {
 13093  			break
 13094  		}
 13095  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13096  			break
 13097  		}
 13098  		b = mergePoint(b, x0, x1)
 13099  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
 13100  		v.reset(OpCopy)
 13101  		v.AddArg(v0)
 13102  		v0.AuxInt = i0
 13103  		v0.Aux = s
 13104  		v0.AddArg(p)
 13105  		v0.AddArg(mem)
 13106  		return true
 13107  	}
 13108  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))
 13109  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13110  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13111  	for {
 13112  		t := v.Type
 13113  		_ = v.Args[1]
 13114  		x0 := v.Args[0]
 13115  		if x0.Op != OpPPC64MOVBZload {
 13116  			break
 13117  		}
 13118  		i0 := x0.AuxInt
 13119  		s := x0.Aux
 13120  		_ = x0.Args[1]
 13121  		p := x0.Args[0]
 13122  		mem := x0.Args[1]
 13123  		o1 := v.Args[1]
 13124  		if o1.Op != OpPPC64SLDconst {
 13125  			break
 13126  		}
 13127  		if o1.AuxInt != 8 {
 13128  			break
 13129  		}
 13130  		x1 := o1.Args[0]
 13131  		if x1.Op != OpPPC64MOVBZload {
 13132  			break
 13133  		}
 13134  		i1 := x1.AuxInt
 13135  		if x1.Aux != s {
 13136  			break
 13137  		}
 13138  		_ = x1.Args[1]
 13139  		if p != x1.Args[0] {
 13140  			break
 13141  		}
 13142  		if mem != x1.Args[1] {
 13143  			break
 13144  		}
 13145  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13146  			break
 13147  		}
 13148  		b = mergePoint(b, x0, x1)
 13149  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
 13150  		v.reset(OpCopy)
 13151  		v.AddArg(v0)
 13152  		v0.AuxInt = i0
 13153  		v0.Aux = s
 13154  		v0.AddArg(p)
 13155  		v0.AddArg(mem)
 13156  		return true
 13157  	}
 13158  	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 13159  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13160  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13161  	for {
 13162  		t := v.Type
 13163  		_ = v.Args[1]
 13164  		o1 := v.Args[0]
 13165  		if o1.Op != OpPPC64SLDconst {
 13166  			break
 13167  		}
 13168  		if o1.AuxInt != 8 {
 13169  			break
 13170  		}
 13171  		x1 := o1.Args[0]
 13172  		if x1.Op != OpPPC64MOVBZload {
 13173  			break
 13174  		}
 13175  		i1 := x1.AuxInt
 13176  		s := x1.Aux
 13177  		_ = x1.Args[1]
 13178  		p := x1.Args[0]
 13179  		mem := x1.Args[1]
 13180  		x0 := v.Args[1]
 13181  		if x0.Op != OpPPC64MOVBZload {
 13182  			break
 13183  		}
 13184  		i0 := x0.AuxInt
 13185  		if x0.Aux != s {
 13186  			break
 13187  		}
 13188  		_ = x0.Args[1]
 13189  		if p != x0.Args[0] {
 13190  			break
 13191  		}
 13192  		if mem != x0.Args[1] {
 13193  			break
 13194  		}
 13195  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13196  			break
 13197  		}
 13198  		b = mergePoint(b, x0, x1)
 13199  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
 13200  		v.reset(OpCopy)
 13201  		v.AddArg(v0)
 13202  		v0.AuxInt = i0
 13203  		v0.Aux = s
 13204  		v0.AddArg(p)
 13205  		v0.AddArg(mem)
 13206  		return true
 13207  	}
 13208  	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]))
 13209  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13210  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13211  	for {
 13212  		t := v.Type
 13213  		_ = v.Args[1]
 13214  		x0 := v.Args[0]
 13215  		if x0.Op != OpPPC64MOVBZload {
 13216  			break
 13217  		}
 13218  		i1 := x0.AuxInt
 13219  		s := x0.Aux
 13220  		_ = x0.Args[1]
 13221  		p := x0.Args[0]
 13222  		mem := x0.Args[1]
 13223  		o1 := v.Args[1]
 13224  		if o1.Op != OpPPC64SLWconst {
 13225  			break
 13226  		}
 13227  		if o1.AuxInt != 8 {
 13228  			break
 13229  		}
 13230  		x1 := o1.Args[0]
 13231  		if x1.Op != OpPPC64MOVBZload {
 13232  			break
 13233  		}
 13234  		i0 := x1.AuxInt
 13235  		if x1.Aux != s {
 13236  			break
 13237  		}
 13238  		_ = x1.Args[1]
 13239  		if p != x1.Args[0] {
 13240  			break
 13241  		}
 13242  		if mem != x1.Args[1] {
 13243  			break
 13244  		}
 13245  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13246  			break
 13247  		}
 13248  		b = mergePoint(b, x0, x1)
 13249  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13250  		v.reset(OpCopy)
 13251  		v.AddArg(v0)
 13252  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13253  		v1.AuxInt = i0
 13254  		v1.Aux = s
 13255  		v1.AddArg(p)
 13256  		v0.AddArg(v1)
 13257  		v0.AddArg(mem)
 13258  		return true
 13259  	}
 13260  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 13261  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13262  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13263  	for {
 13264  		t := v.Type
 13265  		_ = v.Args[1]
 13266  		o1 := v.Args[0]
 13267  		if o1.Op != OpPPC64SLWconst {
 13268  			break
 13269  		}
 13270  		if o1.AuxInt != 8 {
 13271  			break
 13272  		}
 13273  		x1 := o1.Args[0]
 13274  		if x1.Op != OpPPC64MOVBZload {
 13275  			break
 13276  		}
 13277  		i0 := x1.AuxInt
 13278  		s := x1.Aux
 13279  		_ = x1.Args[1]
 13280  		p := x1.Args[0]
 13281  		mem := x1.Args[1]
 13282  		x0 := v.Args[1]
 13283  		if x0.Op != OpPPC64MOVBZload {
 13284  			break
 13285  		}
 13286  		i1 := x0.AuxInt
 13287  		if x0.Aux != s {
 13288  			break
 13289  		}
 13290  		_ = x0.Args[1]
 13291  		if p != x0.Args[0] {
 13292  			break
 13293  		}
 13294  		if mem != x0.Args[1] {
 13295  			break
 13296  		}
 13297  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13298  			break
 13299  		}
 13300  		b = mergePoint(b, x0, x1)
 13301  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13302  		v.reset(OpCopy)
 13303  		v.AddArg(v0)
 13304  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13305  		v1.AuxInt = i0
 13306  		v1.Aux = s
 13307  		v1.AddArg(p)
 13308  		v0.AddArg(v1)
 13309  		v0.AddArg(mem)
 13310  		return true
 13311  	}
 13312  	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]))
 13313  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13314  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13315  	for {
 13316  		t := v.Type
 13317  		_ = v.Args[1]
 13318  		x0 := v.Args[0]
 13319  		if x0.Op != OpPPC64MOVBZload {
 13320  			break
 13321  		}
 13322  		i1 := x0.AuxInt
 13323  		s := x0.Aux
 13324  		_ = x0.Args[1]
 13325  		p := x0.Args[0]
 13326  		mem := x0.Args[1]
 13327  		o1 := v.Args[1]
 13328  		if o1.Op != OpPPC64SLDconst {
 13329  			break
 13330  		}
 13331  		if o1.AuxInt != 8 {
 13332  			break
 13333  		}
 13334  		x1 := o1.Args[0]
 13335  		if x1.Op != OpPPC64MOVBZload {
 13336  			break
 13337  		}
 13338  		i0 := x1.AuxInt
 13339  		if x1.Aux != s {
 13340  			break
 13341  		}
 13342  		_ = x1.Args[1]
 13343  		if p != x1.Args[0] {
 13344  			break
 13345  		}
 13346  		if mem != x1.Args[1] {
 13347  			break
 13348  		}
 13349  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13350  			break
 13351  		}
 13352  		b = mergePoint(b, x0, x1)
 13353  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13354  		v.reset(OpCopy)
 13355  		v.AddArg(v0)
 13356  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13357  		v1.AuxInt = i0
 13358  		v1.Aux = s
 13359  		v1.AddArg(p)
 13360  		v0.AddArg(v1)
 13361  		v0.AddArg(mem)
 13362  		return true
 13363  	}
 13364  	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 13365  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13366  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13367  	for {
 13368  		t := v.Type
 13369  		_ = v.Args[1]
 13370  		o1 := v.Args[0]
 13371  		if o1.Op != OpPPC64SLDconst {
 13372  			break
 13373  		}
 13374  		if o1.AuxInt != 8 {
 13375  			break
 13376  		}
 13377  		x1 := o1.Args[0]
 13378  		if x1.Op != OpPPC64MOVBZload {
 13379  			break
 13380  		}
 13381  		i0 := x1.AuxInt
 13382  		s := x1.Aux
 13383  		_ = x1.Args[1]
 13384  		p := x1.Args[0]
 13385  		mem := x1.Args[1]
 13386  		x0 := v.Args[1]
 13387  		if x0.Op != OpPPC64MOVBZload {
 13388  			break
 13389  		}
 13390  		i1 := x0.AuxInt
 13391  		if x0.Aux != s {
 13392  			break
 13393  		}
 13394  		_ = x0.Args[1]
 13395  		if p != x0.Args[0] {
 13396  			break
 13397  		}
 13398  		if mem != x0.Args[1] {
 13399  			break
 13400  		}
 13401  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13402  			break
 13403  		}
 13404  		b = mergePoint(b, x0, x1)
 13405  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13406  		v.reset(OpCopy)
 13407  		v.AddArg(v0)
 13408  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13409  		v1.AuxInt = i0
 13410  		v1.Aux = s
 13411  		v1.AddArg(p)
 13412  		v0.AddArg(v1)
 13413  		v0.AddArg(mem)
 13414  		return true
 13415  	}
 13416  	return false
 13417  }
 13418  func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
 13419  	b := v.Block
 13420  	_ = b
 13421  	config := b.Func.Config
 13422  	_ = config
 13423  	typ := &b.Func.Config.Types
 13424  	_ = typ
 13425  	// match: (OR <t> s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 13426  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13427  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13428  	for {
 13429  		t := v.Type
 13430  		_ = v.Args[1]
 13431  		s0 := v.Args[0]
 13432  		if s0.Op != OpPPC64SLWconst {
 13433  			break
 13434  		}
 13435  		n1 := s0.AuxInt
 13436  		x0 := s0.Args[0]
 13437  		if x0.Op != OpPPC64MOVBZload {
 13438  			break
 13439  		}
 13440  		i1 := x0.AuxInt
 13441  		s := x0.Aux
 13442  		_ = x0.Args[1]
 13443  		p := x0.Args[0]
 13444  		mem := x0.Args[1]
 13445  		s1 := v.Args[1]
 13446  		if s1.Op != OpPPC64SLWconst {
 13447  			break
 13448  		}
 13449  		n2 := s1.AuxInt
 13450  		x1 := s1.Args[0]
 13451  		if x1.Op != OpPPC64MOVBZload {
 13452  			break
 13453  		}
 13454  		i0 := x1.AuxInt
 13455  		if x1.Aux != s {
 13456  			break
 13457  		}
 13458  		_ = x1.Args[1]
 13459  		if p != x1.Args[0] {
 13460  			break
 13461  		}
 13462  		if mem != x1.Args[1] {
 13463  			break
 13464  		}
 13465  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13466  			break
 13467  		}
 13468  		b = mergePoint(b, x0, x1)
 13469  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 13470  		v.reset(OpCopy)
 13471  		v.AddArg(v0)
 13472  		v0.AuxInt = n1
 13473  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13474  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13475  		v2.AuxInt = i0
 13476  		v2.Aux = s
 13477  		v2.AddArg(p)
 13478  		v1.AddArg(v2)
 13479  		v1.AddArg(mem)
 13480  		v0.AddArg(v1)
 13481  		return true
 13482  	}
 13483  	// match: (OR <t> s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13484  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13485  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13486  	for {
 13487  		t := v.Type
 13488  		_ = v.Args[1]
 13489  		s1 := v.Args[0]
 13490  		if s1.Op != OpPPC64SLWconst {
 13491  			break
 13492  		}
 13493  		n2 := s1.AuxInt
 13494  		x1 := s1.Args[0]
 13495  		if x1.Op != OpPPC64MOVBZload {
 13496  			break
 13497  		}
 13498  		i0 := x1.AuxInt
 13499  		s := x1.Aux
 13500  		_ = x1.Args[1]
 13501  		p := x1.Args[0]
 13502  		mem := x1.Args[1]
 13503  		s0 := v.Args[1]
 13504  		if s0.Op != OpPPC64SLWconst {
 13505  			break
 13506  		}
 13507  		n1 := s0.AuxInt
 13508  		x0 := s0.Args[0]
 13509  		if x0.Op != OpPPC64MOVBZload {
 13510  			break
 13511  		}
 13512  		i1 := x0.AuxInt
 13513  		if x0.Aux != s {
 13514  			break
 13515  		}
 13516  		_ = x0.Args[1]
 13517  		if p != x0.Args[0] {
 13518  			break
 13519  		}
 13520  		if mem != x0.Args[1] {
 13521  			break
 13522  		}
 13523  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13524  			break
 13525  		}
 13526  		b = mergePoint(b, x0, x1)
 13527  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 13528  		v.reset(OpCopy)
 13529  		v.AddArg(v0)
 13530  		v0.AuxInt = n1
 13531  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13532  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13533  		v2.AuxInt = i0
 13534  		v2.Aux = s
 13535  		v2.AddArg(p)
 13536  		v1.AddArg(v2)
 13537  		v1.AddArg(mem)
 13538  		v0.AddArg(v1)
 13539  		return true
 13540  	}
 13541  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 13542  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13543  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13544  	for {
 13545  		t := v.Type
 13546  		_ = v.Args[1]
 13547  		s0 := v.Args[0]
 13548  		if s0.Op != OpPPC64SLDconst {
 13549  			break
 13550  		}
 13551  		n1 := s0.AuxInt
 13552  		x0 := s0.Args[0]
 13553  		if x0.Op != OpPPC64MOVBZload {
 13554  			break
 13555  		}
 13556  		i1 := x0.AuxInt
 13557  		s := x0.Aux
 13558  		_ = x0.Args[1]
 13559  		p := x0.Args[0]
 13560  		mem := x0.Args[1]
 13561  		s1 := v.Args[1]
 13562  		if s1.Op != OpPPC64SLDconst {
 13563  			break
 13564  		}
 13565  		n2 := s1.AuxInt
 13566  		x1 := s1.Args[0]
 13567  		if x1.Op != OpPPC64MOVBZload {
 13568  			break
 13569  		}
 13570  		i0 := x1.AuxInt
 13571  		if x1.Aux != s {
 13572  			break
 13573  		}
 13574  		_ = x1.Args[1]
 13575  		if p != x1.Args[0] {
 13576  			break
 13577  		}
 13578  		if mem != x1.Args[1] {
 13579  			break
 13580  		}
 13581  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13582  			break
 13583  		}
 13584  		b = mergePoint(b, x0, x1)
 13585  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 13586  		v.reset(OpCopy)
 13587  		v.AddArg(v0)
 13588  		v0.AuxInt = n1
 13589  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13590  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13591  		v2.AuxInt = i0
 13592  		v2.Aux = s
 13593  		v2.AddArg(p)
 13594  		v1.AddArg(v2)
 13595  		v1.AddArg(mem)
 13596  		v0.AddArg(v1)
 13597  		return true
 13598  	}
 13599  	// match: (OR <t> s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13600  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13601  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13602  	for {
 13603  		t := v.Type
 13604  		_ = v.Args[1]
 13605  		s1 := v.Args[0]
 13606  		if s1.Op != OpPPC64SLDconst {
 13607  			break
 13608  		}
 13609  		n2 := s1.AuxInt
 13610  		x1 := s1.Args[0]
 13611  		if x1.Op != OpPPC64MOVBZload {
 13612  			break
 13613  		}
 13614  		i0 := x1.AuxInt
 13615  		s := x1.Aux
 13616  		_ = x1.Args[1]
 13617  		p := x1.Args[0]
 13618  		mem := x1.Args[1]
 13619  		s0 := v.Args[1]
 13620  		if s0.Op != OpPPC64SLDconst {
 13621  			break
 13622  		}
 13623  		n1 := s0.AuxInt
 13624  		x0 := s0.Args[0]
 13625  		if x0.Op != OpPPC64MOVBZload {
 13626  			break
 13627  		}
 13628  		i1 := x0.AuxInt
 13629  		if x0.Aux != s {
 13630  			break
 13631  		}
 13632  		_ = x0.Args[1]
 13633  		if p != x0.Args[0] {
 13634  			break
 13635  		}
 13636  		if mem != x0.Args[1] {
 13637  			break
 13638  		}
 13639  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13640  			break
 13641  		}
 13642  		b = mergePoint(b, x0, x1)
 13643  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 13644  		v.reset(OpCopy)
 13645  		v.AddArg(v0)
 13646  		v0.AuxInt = n1
 13647  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHBRload, t)
 13648  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13649  		v2.AuxInt = i0
 13650  		v2.Aux = s
 13651  		v2.AddArg(p)
 13652  		v1.AddArg(v2)
 13653  		v1.AddArg(mem)
 13654  		v0.AddArg(v1)
 13655  		return true
 13656  	}
 13657  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13658  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13659  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13660  	for {
 13661  		t := v.Type
 13662  		_ = v.Args[1]
 13663  		s1 := v.Args[0]
 13664  		if s1.Op != OpPPC64SLWconst {
 13665  			break
 13666  		}
 13667  		if s1.AuxInt != 24 {
 13668  			break
 13669  		}
 13670  		x2 := s1.Args[0]
 13671  		if x2.Op != OpPPC64MOVBZload {
 13672  			break
 13673  		}
 13674  		i3 := x2.AuxInt
 13675  		s := x2.Aux
 13676  		_ = x2.Args[1]
 13677  		p := x2.Args[0]
 13678  		mem := x2.Args[1]
 13679  		o0 := v.Args[1]
 13680  		if o0.Op != OpPPC64OR {
 13681  			break
 13682  		}
 13683  		if o0.Type != t {
 13684  			break
 13685  		}
 13686  		_ = o0.Args[1]
 13687  		s0 := o0.Args[0]
 13688  		if s0.Op != OpPPC64SLWconst {
 13689  			break
 13690  		}
 13691  		if s0.AuxInt != 16 {
 13692  			break
 13693  		}
 13694  		x1 := s0.Args[0]
 13695  		if x1.Op != OpPPC64MOVBZload {
 13696  			break
 13697  		}
 13698  		i2 := x1.AuxInt
 13699  		if x1.Aux != s {
 13700  			break
 13701  		}
 13702  		_ = x1.Args[1]
 13703  		if p != x1.Args[0] {
 13704  			break
 13705  		}
 13706  		if mem != x1.Args[1] {
 13707  			break
 13708  		}
 13709  		x0 := o0.Args[1]
 13710  		if x0.Op != OpPPC64MOVHZload {
 13711  			break
 13712  		}
 13713  		i0 := x0.AuxInt
 13714  		if x0.Aux != s {
 13715  			break
 13716  		}
 13717  		_ = x0.Args[1]
 13718  		if p != x0.Args[0] {
 13719  			break
 13720  		}
 13721  		if mem != x0.Args[1] {
 13722  			break
 13723  		}
 13724  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13725  			break
 13726  		}
 13727  		b = mergePoint(b, x0, x1, x2)
 13728  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 13729  		v.reset(OpCopy)
 13730  		v.AddArg(v0)
 13731  		v0.AuxInt = i0
 13732  		v0.Aux = s
 13733  		v0.AddArg(p)
 13734  		v0.AddArg(mem)
 13735  		return true
 13736  	}
 13737  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
 13738  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13739  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13740  	for {
 13741  		t := v.Type
 13742  		_ = v.Args[1]
 13743  		s1 := v.Args[0]
 13744  		if s1.Op != OpPPC64SLWconst {
 13745  			break
 13746  		}
 13747  		if s1.AuxInt != 24 {
 13748  			break
 13749  		}
 13750  		x2 := s1.Args[0]
 13751  		if x2.Op != OpPPC64MOVBZload {
 13752  			break
 13753  		}
 13754  		i3 := x2.AuxInt
 13755  		s := x2.Aux
 13756  		_ = x2.Args[1]
 13757  		p := x2.Args[0]
 13758  		mem := x2.Args[1]
 13759  		o0 := v.Args[1]
 13760  		if o0.Op != OpPPC64OR {
 13761  			break
 13762  		}
 13763  		if o0.Type != t {
 13764  			break
 13765  		}
 13766  		_ = o0.Args[1]
 13767  		x0 := o0.Args[0]
 13768  		if x0.Op != OpPPC64MOVHZload {
 13769  			break
 13770  		}
 13771  		i0 := x0.AuxInt
 13772  		if x0.Aux != s {
 13773  			break
 13774  		}
 13775  		_ = x0.Args[1]
 13776  		if p != x0.Args[0] {
 13777  			break
 13778  		}
 13779  		if mem != x0.Args[1] {
 13780  			break
 13781  		}
 13782  		s0 := o0.Args[1]
 13783  		if s0.Op != OpPPC64SLWconst {
 13784  			break
 13785  		}
 13786  		if s0.AuxInt != 16 {
 13787  			break
 13788  		}
 13789  		x1 := s0.Args[0]
 13790  		if x1.Op != OpPPC64MOVBZload {
 13791  			break
 13792  		}
 13793  		i2 := x1.AuxInt
 13794  		if x1.Aux != s {
 13795  			break
 13796  		}
 13797  		_ = x1.Args[1]
 13798  		if p != x1.Args[0] {
 13799  			break
 13800  		}
 13801  		if mem != x1.Args[1] {
 13802  			break
 13803  		}
 13804  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13805  			break
 13806  		}
 13807  		b = mergePoint(b, x0, x1, x2)
 13808  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 13809  		v.reset(OpCopy)
 13810  		v.AddArg(v0)
 13811  		v0.AuxInt = i0
 13812  		v0.Aux = s
 13813  		v0.AddArg(p)
 13814  		v0.AddArg(mem)
 13815  		return true
 13816  	}
 13817  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13818  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13819  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13820  	for {
 13821  		t := v.Type
 13822  		_ = v.Args[1]
 13823  		o0 := v.Args[0]
 13824  		if o0.Op != OpPPC64OR {
 13825  			break
 13826  		}
 13827  		if o0.Type != t {
 13828  			break
 13829  		}
 13830  		_ = o0.Args[1]
 13831  		s0 := o0.Args[0]
 13832  		if s0.Op != OpPPC64SLWconst {
 13833  			break
 13834  		}
 13835  		if s0.AuxInt != 16 {
 13836  			break
 13837  		}
 13838  		x1 := s0.Args[0]
 13839  		if x1.Op != OpPPC64MOVBZload {
 13840  			break
 13841  		}
 13842  		i2 := x1.AuxInt
 13843  		s := x1.Aux
 13844  		_ = x1.Args[1]
 13845  		p := x1.Args[0]
 13846  		mem := x1.Args[1]
 13847  		x0 := o0.Args[1]
 13848  		if x0.Op != OpPPC64MOVHZload {
 13849  			break
 13850  		}
 13851  		i0 := x0.AuxInt
 13852  		if x0.Aux != s {
 13853  			break
 13854  		}
 13855  		_ = x0.Args[1]
 13856  		if p != x0.Args[0] {
 13857  			break
 13858  		}
 13859  		if mem != x0.Args[1] {
 13860  			break
 13861  		}
 13862  		s1 := v.Args[1]
 13863  		if s1.Op != OpPPC64SLWconst {
 13864  			break
 13865  		}
 13866  		if s1.AuxInt != 24 {
 13867  			break
 13868  		}
 13869  		x2 := s1.Args[0]
 13870  		if x2.Op != OpPPC64MOVBZload {
 13871  			break
 13872  		}
 13873  		i3 := x2.AuxInt
 13874  		if x2.Aux != s {
 13875  			break
 13876  		}
 13877  		_ = x2.Args[1]
 13878  		if p != x2.Args[0] {
 13879  			break
 13880  		}
 13881  		if mem != x2.Args[1] {
 13882  			break
 13883  		}
 13884  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13885  			break
 13886  		}
 13887  		b = mergePoint(b, x0, x1, x2)
 13888  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 13889  		v.reset(OpCopy)
 13890  		v.AddArg(v0)
 13891  		v0.AuxInt = i0
 13892  		v0.Aux = s
 13893  		v0.AddArg(p)
 13894  		v0.AddArg(mem)
 13895  		return true
 13896  	}
 13897  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13898  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13899  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13900  	for {
 13901  		t := v.Type
 13902  		_ = v.Args[1]
 13903  		o0 := v.Args[0]
 13904  		if o0.Op != OpPPC64OR {
 13905  			break
 13906  		}
 13907  		if o0.Type != t {
 13908  			break
 13909  		}
 13910  		_ = o0.Args[1]
 13911  		x0 := o0.Args[0]
 13912  		if x0.Op != OpPPC64MOVHZload {
 13913  			break
 13914  		}
 13915  		i0 := x0.AuxInt
 13916  		s := x0.Aux
 13917  		_ = x0.Args[1]
 13918  		p := x0.Args[0]
 13919  		mem := x0.Args[1]
 13920  		s0 := o0.Args[1]
 13921  		if s0.Op != OpPPC64SLWconst {
 13922  			break
 13923  		}
 13924  		if s0.AuxInt != 16 {
 13925  			break
 13926  		}
 13927  		x1 := s0.Args[0]
 13928  		if x1.Op != OpPPC64MOVBZload {
 13929  			break
 13930  		}
 13931  		i2 := x1.AuxInt
 13932  		if x1.Aux != s {
 13933  			break
 13934  		}
 13935  		_ = x1.Args[1]
 13936  		if p != x1.Args[0] {
 13937  			break
 13938  		}
 13939  		if mem != x1.Args[1] {
 13940  			break
 13941  		}
 13942  		s1 := v.Args[1]
 13943  		if s1.Op != OpPPC64SLWconst {
 13944  			break
 13945  		}
 13946  		if s1.AuxInt != 24 {
 13947  			break
 13948  		}
 13949  		x2 := s1.Args[0]
 13950  		if x2.Op != OpPPC64MOVBZload {
 13951  			break
 13952  		}
 13953  		i3 := x2.AuxInt
 13954  		if x2.Aux != s {
 13955  			break
 13956  		}
 13957  		_ = x2.Args[1]
 13958  		if p != x2.Args[0] {
 13959  			break
 13960  		}
 13961  		if mem != x2.Args[1] {
 13962  			break
 13963  		}
 13964  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13965  			break
 13966  		}
 13967  		b = mergePoint(b, x0, x1, x2)
 13968  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 13969  		v.reset(OpCopy)
 13970  		v.AddArg(v0)
 13971  		v0.AuxInt = i0
 13972  		v0.Aux = s
 13973  		v0.AddArg(p)
 13974  		v0.AddArg(mem)
 13975  		return true
 13976  	}
 13977  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13978  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13979  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13980  	for {
 13981  		t := v.Type
 13982  		_ = v.Args[1]
 13983  		s1 := v.Args[0]
 13984  		if s1.Op != OpPPC64SLDconst {
 13985  			break
 13986  		}
 13987  		if s1.AuxInt != 24 {
 13988  			break
 13989  		}
 13990  		x2 := s1.Args[0]
 13991  		if x2.Op != OpPPC64MOVBZload {
 13992  			break
 13993  		}
 13994  		i3 := x2.AuxInt
 13995  		s := x2.Aux
 13996  		_ = x2.Args[1]
 13997  		p := x2.Args[0]
 13998  		mem := x2.Args[1]
 13999  		o0 := v.Args[1]
 14000  		if o0.Op != OpPPC64OR {
 14001  			break
 14002  		}
 14003  		if o0.Type != t {
 14004  			break
 14005  		}
 14006  		_ = o0.Args[1]
 14007  		s0 := o0.Args[0]
 14008  		if s0.Op != OpPPC64SLDconst {
 14009  			break
 14010  		}
 14011  		if s0.AuxInt != 16 {
 14012  			break
 14013  		}
 14014  		x1 := s0.Args[0]
 14015  		if x1.Op != OpPPC64MOVBZload {
 14016  			break
 14017  		}
 14018  		i2 := x1.AuxInt
 14019  		if x1.Aux != s {
 14020  			break
 14021  		}
 14022  		_ = x1.Args[1]
 14023  		if p != x1.Args[0] {
 14024  			break
 14025  		}
 14026  		if mem != x1.Args[1] {
 14027  			break
 14028  		}
 14029  		x0 := o0.Args[1]
 14030  		if x0.Op != OpPPC64MOVHZload {
 14031  			break
 14032  		}
 14033  		i0 := x0.AuxInt
 14034  		if x0.Aux != s {
 14035  			break
 14036  		}
 14037  		_ = x0.Args[1]
 14038  		if p != x0.Args[0] {
 14039  			break
 14040  		}
 14041  		if mem != x0.Args[1] {
 14042  			break
 14043  		}
 14044  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14045  			break
 14046  		}
 14047  		b = mergePoint(b, x0, x1, x2)
 14048  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 14049  		v.reset(OpCopy)
 14050  		v.AddArg(v0)
 14051  		v0.AuxInt = i0
 14052  		v0.Aux = s
 14053  		v0.AddArg(p)
 14054  		v0.AddArg(mem)
 14055  		return true
 14056  	}
 14057  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])))
 14058  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14059  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14060  	for {
 14061  		t := v.Type
 14062  		_ = v.Args[1]
 14063  		s1 := v.Args[0]
 14064  		if s1.Op != OpPPC64SLDconst {
 14065  			break
 14066  		}
 14067  		if s1.AuxInt != 24 {
 14068  			break
 14069  		}
 14070  		x2 := s1.Args[0]
 14071  		if x2.Op != OpPPC64MOVBZload {
 14072  			break
 14073  		}
 14074  		i3 := x2.AuxInt
 14075  		s := x2.Aux
 14076  		_ = x2.Args[1]
 14077  		p := x2.Args[0]
 14078  		mem := x2.Args[1]
 14079  		o0 := v.Args[1]
 14080  		if o0.Op != OpPPC64OR {
 14081  			break
 14082  		}
 14083  		if o0.Type != t {
 14084  			break
 14085  		}
 14086  		_ = o0.Args[1]
 14087  		x0 := o0.Args[0]
 14088  		if x0.Op != OpPPC64MOVHZload {
 14089  			break
 14090  		}
 14091  		i0 := x0.AuxInt
 14092  		if x0.Aux != s {
 14093  			break
 14094  		}
 14095  		_ = x0.Args[1]
 14096  		if p != x0.Args[0] {
 14097  			break
 14098  		}
 14099  		if mem != x0.Args[1] {
 14100  			break
 14101  		}
 14102  		s0 := o0.Args[1]
 14103  		if s0.Op != OpPPC64SLDconst {
 14104  			break
 14105  		}
 14106  		if s0.AuxInt != 16 {
 14107  			break
 14108  		}
 14109  		x1 := s0.Args[0]
 14110  		if x1.Op != OpPPC64MOVBZload {
 14111  			break
 14112  		}
 14113  		i2 := x1.AuxInt
 14114  		if x1.Aux != s {
 14115  			break
 14116  		}
 14117  		_ = x1.Args[1]
 14118  		if p != x1.Args[0] {
 14119  			break
 14120  		}
 14121  		if mem != x1.Args[1] {
 14122  			break
 14123  		}
 14124  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14125  			break
 14126  		}
 14127  		b = mergePoint(b, x0, x1, x2)
 14128  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 14129  		v.reset(OpCopy)
 14130  		v.AddArg(v0)
 14131  		v0.AuxInt = i0
 14132  		v0.Aux = s
 14133  		v0.AddArg(p)
 14134  		v0.AddArg(mem)
 14135  		return true
 14136  	}
 14137  	return false
 14138  }
 14139  func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
 14140  	b := v.Block
 14141  	_ = b
 14142  	config := b.Func.Config
 14143  	_ = config
 14144  	typ := &b.Func.Config.Types
 14145  	_ = typ
 14146  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 14147  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14148  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14149  	for {
 14150  		t := v.Type
 14151  		_ = v.Args[1]
 14152  		o0 := v.Args[0]
 14153  		if o0.Op != OpPPC64OR {
 14154  			break
 14155  		}
 14156  		if o0.Type != t {
 14157  			break
 14158  		}
 14159  		_ = o0.Args[1]
 14160  		s0 := o0.Args[0]
 14161  		if s0.Op != OpPPC64SLDconst {
 14162  			break
 14163  		}
 14164  		if s0.AuxInt != 16 {
 14165  			break
 14166  		}
 14167  		x1 := s0.Args[0]
 14168  		if x1.Op != OpPPC64MOVBZload {
 14169  			break
 14170  		}
 14171  		i2 := x1.AuxInt
 14172  		s := x1.Aux
 14173  		_ = x1.Args[1]
 14174  		p := x1.Args[0]
 14175  		mem := x1.Args[1]
 14176  		x0 := o0.Args[1]
 14177  		if x0.Op != OpPPC64MOVHZload {
 14178  			break
 14179  		}
 14180  		i0 := x0.AuxInt
 14181  		if x0.Aux != s {
 14182  			break
 14183  		}
 14184  		_ = x0.Args[1]
 14185  		if p != x0.Args[0] {
 14186  			break
 14187  		}
 14188  		if mem != x0.Args[1] {
 14189  			break
 14190  		}
 14191  		s1 := v.Args[1]
 14192  		if s1.Op != OpPPC64SLDconst {
 14193  			break
 14194  		}
 14195  		if s1.AuxInt != 24 {
 14196  			break
 14197  		}
 14198  		x2 := s1.Args[0]
 14199  		if x2.Op != OpPPC64MOVBZload {
 14200  			break
 14201  		}
 14202  		i3 := x2.AuxInt
 14203  		if x2.Aux != s {
 14204  			break
 14205  		}
 14206  		_ = x2.Args[1]
 14207  		if p != x2.Args[0] {
 14208  			break
 14209  		}
 14210  		if mem != x2.Args[1] {
 14211  			break
 14212  		}
 14213  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14214  			break
 14215  		}
 14216  		b = mergePoint(b, x0, x1, x2)
 14217  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 14218  		v.reset(OpCopy)
 14219  		v.AddArg(v0)
 14220  		v0.AuxInt = i0
 14221  		v0.Aux = s
 14222  		v0.AddArg(p)
 14223  		v0.AddArg(mem)
 14224  		return true
 14225  	}
 14226  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 14227  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14228  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14229  	for {
 14230  		t := v.Type
 14231  		_ = v.Args[1]
 14232  		o0 := v.Args[0]
 14233  		if o0.Op != OpPPC64OR {
 14234  			break
 14235  		}
 14236  		if o0.Type != t {
 14237  			break
 14238  		}
 14239  		_ = o0.Args[1]
 14240  		x0 := o0.Args[0]
 14241  		if x0.Op != OpPPC64MOVHZload {
 14242  			break
 14243  		}
 14244  		i0 := x0.AuxInt
 14245  		s := x0.Aux
 14246  		_ = x0.Args[1]
 14247  		p := x0.Args[0]
 14248  		mem := x0.Args[1]
 14249  		s0 := o0.Args[1]
 14250  		if s0.Op != OpPPC64SLDconst {
 14251  			break
 14252  		}
 14253  		if s0.AuxInt != 16 {
 14254  			break
 14255  		}
 14256  		x1 := s0.Args[0]
 14257  		if x1.Op != OpPPC64MOVBZload {
 14258  			break
 14259  		}
 14260  		i2 := x1.AuxInt
 14261  		if x1.Aux != s {
 14262  			break
 14263  		}
 14264  		_ = x1.Args[1]
 14265  		if p != x1.Args[0] {
 14266  			break
 14267  		}
 14268  		if mem != x1.Args[1] {
 14269  			break
 14270  		}
 14271  		s1 := v.Args[1]
 14272  		if s1.Op != OpPPC64SLDconst {
 14273  			break
 14274  		}
 14275  		if s1.AuxInt != 24 {
 14276  			break
 14277  		}
 14278  		x2 := s1.Args[0]
 14279  		if x2.Op != OpPPC64MOVBZload {
 14280  			break
 14281  		}
 14282  		i3 := x2.AuxInt
 14283  		if x2.Aux != s {
 14284  			break
 14285  		}
 14286  		_ = x2.Args[1]
 14287  		if p != x2.Args[0] {
 14288  			break
 14289  		}
 14290  		if mem != x2.Args[1] {
 14291  			break
 14292  		}
 14293  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14294  			break
 14295  		}
 14296  		b = mergePoint(b, x0, x1, x2)
 14297  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
 14298  		v.reset(OpCopy)
 14299  		v.AddArg(v0)
 14300  		v0.AuxInt = i0
 14301  		v0.Aux = s
 14302  		v0.AddArg(p)
 14303  		v0.AddArg(mem)
 14304  		return true
 14305  	}
 14306  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 14307  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14308  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14309  	for {
 14310  		t := v.Type
 14311  		_ = v.Args[1]
 14312  		s1 := v.Args[0]
 14313  		if s1.Op != OpPPC64SLWconst {
 14314  			break
 14315  		}
 14316  		if s1.AuxInt != 24 {
 14317  			break
 14318  		}
 14319  		x2 := s1.Args[0]
 14320  		if x2.Op != OpPPC64MOVBZload {
 14321  			break
 14322  		}
 14323  		i0 := x2.AuxInt
 14324  		s := x2.Aux
 14325  		_ = x2.Args[1]
 14326  		p := x2.Args[0]
 14327  		mem := x2.Args[1]
 14328  		o0 := v.Args[1]
 14329  		if o0.Op != OpPPC64OR {
 14330  			break
 14331  		}
 14332  		if o0.Type != t {
 14333  			break
 14334  		}
 14335  		_ = o0.Args[1]
 14336  		s0 := o0.Args[0]
 14337  		if s0.Op != OpPPC64SLWconst {
 14338  			break
 14339  		}
 14340  		if s0.AuxInt != 16 {
 14341  			break
 14342  		}
 14343  		x1 := s0.Args[0]
 14344  		if x1.Op != OpPPC64MOVBZload {
 14345  			break
 14346  		}
 14347  		i1 := x1.AuxInt
 14348  		if x1.Aux != s {
 14349  			break
 14350  		}
 14351  		_ = x1.Args[1]
 14352  		if p != x1.Args[0] {
 14353  			break
 14354  		}
 14355  		if mem != x1.Args[1] {
 14356  			break
 14357  		}
 14358  		x0 := o0.Args[1]
 14359  		if x0.Op != OpPPC64MOVHBRload {
 14360  			break
 14361  		}
 14362  		if x0.Type != t {
 14363  			break
 14364  		}
 14365  		_ = x0.Args[1]
 14366  		x0_0 := x0.Args[0]
 14367  		if x0_0.Op != OpPPC64MOVDaddr {
 14368  			break
 14369  		}
 14370  		if x0_0.Type != typ.Uintptr {
 14371  			break
 14372  		}
 14373  		i2 := x0_0.AuxInt
 14374  		if x0_0.Aux != s {
 14375  			break
 14376  		}
 14377  		if p != x0_0.Args[0] {
 14378  			break
 14379  		}
 14380  		if mem != x0.Args[1] {
 14381  			break
 14382  		}
 14383  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14384  			break
 14385  		}
 14386  		b = mergePoint(b, x0, x1, x2)
 14387  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14388  		v.reset(OpCopy)
 14389  		v.AddArg(v0)
 14390  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14391  		v1.AuxInt = i0
 14392  		v1.Aux = s
 14393  		v1.AddArg(p)
 14394  		v0.AddArg(v1)
 14395  		v0.AddArg(mem)
 14396  		return true
 14397  	}
 14398  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])))
 14399  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14400  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14401  	for {
 14402  		t := v.Type
 14403  		_ = v.Args[1]
 14404  		s1 := v.Args[0]
 14405  		if s1.Op != OpPPC64SLWconst {
 14406  			break
 14407  		}
 14408  		if s1.AuxInt != 24 {
 14409  			break
 14410  		}
 14411  		x2 := s1.Args[0]
 14412  		if x2.Op != OpPPC64MOVBZload {
 14413  			break
 14414  		}
 14415  		i0 := x2.AuxInt
 14416  		s := x2.Aux
 14417  		_ = x2.Args[1]
 14418  		p := x2.Args[0]
 14419  		mem := x2.Args[1]
 14420  		o0 := v.Args[1]
 14421  		if o0.Op != OpPPC64OR {
 14422  			break
 14423  		}
 14424  		if o0.Type != t {
 14425  			break
 14426  		}
 14427  		_ = o0.Args[1]
 14428  		x0 := o0.Args[0]
 14429  		if x0.Op != OpPPC64MOVHBRload {
 14430  			break
 14431  		}
 14432  		if x0.Type != t {
 14433  			break
 14434  		}
 14435  		_ = x0.Args[1]
 14436  		x0_0 := x0.Args[0]
 14437  		if x0_0.Op != OpPPC64MOVDaddr {
 14438  			break
 14439  		}
 14440  		if x0_0.Type != typ.Uintptr {
 14441  			break
 14442  		}
 14443  		i2 := x0_0.AuxInt
 14444  		if x0_0.Aux != s {
 14445  			break
 14446  		}
 14447  		if p != x0_0.Args[0] {
 14448  			break
 14449  		}
 14450  		if mem != x0.Args[1] {
 14451  			break
 14452  		}
 14453  		s0 := o0.Args[1]
 14454  		if s0.Op != OpPPC64SLWconst {
 14455  			break
 14456  		}
 14457  		if s0.AuxInt != 16 {
 14458  			break
 14459  		}
 14460  		x1 := s0.Args[0]
 14461  		if x1.Op != OpPPC64MOVBZload {
 14462  			break
 14463  		}
 14464  		i1 := x1.AuxInt
 14465  		if x1.Aux != s {
 14466  			break
 14467  		}
 14468  		_ = x1.Args[1]
 14469  		if p != x1.Args[0] {
 14470  			break
 14471  		}
 14472  		if mem != x1.Args[1] {
 14473  			break
 14474  		}
 14475  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14476  			break
 14477  		}
 14478  		b = mergePoint(b, x0, x1, x2)
 14479  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14480  		v.reset(OpCopy)
 14481  		v.AddArg(v0)
 14482  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14483  		v1.AuxInt = i0
 14484  		v1.Aux = s
 14485  		v1.AddArg(p)
 14486  		v0.AddArg(v1)
 14487  		v0.AddArg(mem)
 14488  		return true
 14489  	}
 14490  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14491  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14492  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14493  	for {
 14494  		t := v.Type
 14495  		_ = v.Args[1]
 14496  		o0 := v.Args[0]
 14497  		if o0.Op != OpPPC64OR {
 14498  			break
 14499  		}
 14500  		if o0.Type != t {
 14501  			break
 14502  		}
 14503  		_ = o0.Args[1]
 14504  		s0 := o0.Args[0]
 14505  		if s0.Op != OpPPC64SLWconst {
 14506  			break
 14507  		}
 14508  		if s0.AuxInt != 16 {
 14509  			break
 14510  		}
 14511  		x1 := s0.Args[0]
 14512  		if x1.Op != OpPPC64MOVBZload {
 14513  			break
 14514  		}
 14515  		i1 := x1.AuxInt
 14516  		s := x1.Aux
 14517  		_ = x1.Args[1]
 14518  		p := x1.Args[0]
 14519  		mem := x1.Args[1]
 14520  		x0 := o0.Args[1]
 14521  		if x0.Op != OpPPC64MOVHBRload {
 14522  			break
 14523  		}
 14524  		if x0.Type != t {
 14525  			break
 14526  		}
 14527  		_ = x0.Args[1]
 14528  		x0_0 := x0.Args[0]
 14529  		if x0_0.Op != OpPPC64MOVDaddr {
 14530  			break
 14531  		}
 14532  		if x0_0.Type != typ.Uintptr {
 14533  			break
 14534  		}
 14535  		i2 := x0_0.AuxInt
 14536  		if x0_0.Aux != s {
 14537  			break
 14538  		}
 14539  		if p != x0_0.Args[0] {
 14540  			break
 14541  		}
 14542  		if mem != x0.Args[1] {
 14543  			break
 14544  		}
 14545  		s1 := v.Args[1]
 14546  		if s1.Op != OpPPC64SLWconst {
 14547  			break
 14548  		}
 14549  		if s1.AuxInt != 24 {
 14550  			break
 14551  		}
 14552  		x2 := s1.Args[0]
 14553  		if x2.Op != OpPPC64MOVBZload {
 14554  			break
 14555  		}
 14556  		i0 := x2.AuxInt
 14557  		if x2.Aux != s {
 14558  			break
 14559  		}
 14560  		_ = x2.Args[1]
 14561  		if p != x2.Args[0] {
 14562  			break
 14563  		}
 14564  		if mem != x2.Args[1] {
 14565  			break
 14566  		}
 14567  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14568  			break
 14569  		}
 14570  		b = mergePoint(b, x0, x1, x2)
 14571  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14572  		v.reset(OpCopy)
 14573  		v.AddArg(v0)
 14574  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14575  		v1.AuxInt = i0
 14576  		v1.Aux = s
 14577  		v1.AddArg(p)
 14578  		v0.AddArg(v1)
 14579  		v0.AddArg(mem)
 14580  		return true
 14581  	}
 14582  	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14583  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14584  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14585  	for {
 14586  		t := v.Type
 14587  		_ = v.Args[1]
 14588  		o0 := v.Args[0]
 14589  		if o0.Op != OpPPC64OR {
 14590  			break
 14591  		}
 14592  		if o0.Type != t {
 14593  			break
 14594  		}
 14595  		_ = o0.Args[1]
 14596  		x0 := o0.Args[0]
 14597  		if x0.Op != OpPPC64MOVHBRload {
 14598  			break
 14599  		}
 14600  		if x0.Type != t {
 14601  			break
 14602  		}
 14603  		_ = x0.Args[1]
 14604  		x0_0 := x0.Args[0]
 14605  		if x0_0.Op != OpPPC64MOVDaddr {
 14606  			break
 14607  		}
 14608  		if x0_0.Type != typ.Uintptr {
 14609  			break
 14610  		}
 14611  		i2 := x0_0.AuxInt
 14612  		s := x0_0.Aux
 14613  		p := x0_0.Args[0]
 14614  		mem := x0.Args[1]
 14615  		s0 := o0.Args[1]
 14616  		if s0.Op != OpPPC64SLWconst {
 14617  			break
 14618  		}
 14619  		if s0.AuxInt != 16 {
 14620  			break
 14621  		}
 14622  		x1 := s0.Args[0]
 14623  		if x1.Op != OpPPC64MOVBZload {
 14624  			break
 14625  		}
 14626  		i1 := x1.AuxInt
 14627  		if x1.Aux != s {
 14628  			break
 14629  		}
 14630  		_ = x1.Args[1]
 14631  		if p != x1.Args[0] {
 14632  			break
 14633  		}
 14634  		if mem != x1.Args[1] {
 14635  			break
 14636  		}
 14637  		s1 := v.Args[1]
 14638  		if s1.Op != OpPPC64SLWconst {
 14639  			break
 14640  		}
 14641  		if s1.AuxInt != 24 {
 14642  			break
 14643  		}
 14644  		x2 := s1.Args[0]
 14645  		if x2.Op != OpPPC64MOVBZload {
 14646  			break
 14647  		}
 14648  		i0 := x2.AuxInt
 14649  		if x2.Aux != s {
 14650  			break
 14651  		}
 14652  		_ = x2.Args[1]
 14653  		if p != x2.Args[0] {
 14654  			break
 14655  		}
 14656  		if mem != x2.Args[1] {
 14657  			break
 14658  		}
 14659  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14660  			break
 14661  		}
 14662  		b = mergePoint(b, x0, x1, x2)
 14663  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14664  		v.reset(OpCopy)
 14665  		v.AddArg(v0)
 14666  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14667  		v1.AuxInt = i0
 14668  		v1.Aux = s
 14669  		v1.AddArg(p)
 14670  		v0.AddArg(v1)
 14671  		v0.AddArg(mem)
 14672  		return true
 14673  	}
 14674  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 14675  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14676  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14677  	for {
 14678  		t := v.Type
 14679  		_ = v.Args[1]
 14680  		s1 := v.Args[0]
 14681  		if s1.Op != OpPPC64SLDconst {
 14682  			break
 14683  		}
 14684  		if s1.AuxInt != 24 {
 14685  			break
 14686  		}
 14687  		x2 := s1.Args[0]
 14688  		if x2.Op != OpPPC64MOVBZload {
 14689  			break
 14690  		}
 14691  		i0 := x2.AuxInt
 14692  		s := x2.Aux
 14693  		_ = x2.Args[1]
 14694  		p := x2.Args[0]
 14695  		mem := x2.Args[1]
 14696  		o0 := v.Args[1]
 14697  		if o0.Op != OpPPC64OR {
 14698  			break
 14699  		}
 14700  		if o0.Type != t {
 14701  			break
 14702  		}
 14703  		_ = o0.Args[1]
 14704  		s0 := o0.Args[0]
 14705  		if s0.Op != OpPPC64SLDconst {
 14706  			break
 14707  		}
 14708  		if s0.AuxInt != 16 {
 14709  			break
 14710  		}
 14711  		x1 := s0.Args[0]
 14712  		if x1.Op != OpPPC64MOVBZload {
 14713  			break
 14714  		}
 14715  		i1 := x1.AuxInt
 14716  		if x1.Aux != s {
 14717  			break
 14718  		}
 14719  		_ = x1.Args[1]
 14720  		if p != x1.Args[0] {
 14721  			break
 14722  		}
 14723  		if mem != x1.Args[1] {
 14724  			break
 14725  		}
 14726  		x0 := o0.Args[1]
 14727  		if x0.Op != OpPPC64MOVHBRload {
 14728  			break
 14729  		}
 14730  		if x0.Type != t {
 14731  			break
 14732  		}
 14733  		_ = x0.Args[1]
 14734  		x0_0 := x0.Args[0]
 14735  		if x0_0.Op != OpPPC64MOVDaddr {
 14736  			break
 14737  		}
 14738  		if x0_0.Type != typ.Uintptr {
 14739  			break
 14740  		}
 14741  		i2 := x0_0.AuxInt
 14742  		if x0_0.Aux != s {
 14743  			break
 14744  		}
 14745  		if p != x0_0.Args[0] {
 14746  			break
 14747  		}
 14748  		if mem != x0.Args[1] {
 14749  			break
 14750  		}
 14751  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14752  			break
 14753  		}
 14754  		b = mergePoint(b, x0, x1, x2)
 14755  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14756  		v.reset(OpCopy)
 14757  		v.AddArg(v0)
 14758  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14759  		v1.AuxInt = i0
 14760  		v1.Aux = s
 14761  		v1.AddArg(p)
 14762  		v0.AddArg(v1)
 14763  		v0.AddArg(mem)
 14764  		return true
 14765  	}
 14766  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])))
 14767  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14768  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14769  	for {
 14770  		t := v.Type
 14771  		_ = v.Args[1]
 14772  		s1 := v.Args[0]
 14773  		if s1.Op != OpPPC64SLDconst {
 14774  			break
 14775  		}
 14776  		if s1.AuxInt != 24 {
 14777  			break
 14778  		}
 14779  		x2 := s1.Args[0]
 14780  		if x2.Op != OpPPC64MOVBZload {
 14781  			break
 14782  		}
 14783  		i0 := x2.AuxInt
 14784  		s := x2.Aux
 14785  		_ = x2.Args[1]
 14786  		p := x2.Args[0]
 14787  		mem := x2.Args[1]
 14788  		o0 := v.Args[1]
 14789  		if o0.Op != OpPPC64OR {
 14790  			break
 14791  		}
 14792  		if o0.Type != t {
 14793  			break
 14794  		}
 14795  		_ = o0.Args[1]
 14796  		x0 := o0.Args[0]
 14797  		if x0.Op != OpPPC64MOVHBRload {
 14798  			break
 14799  		}
 14800  		if x0.Type != t {
 14801  			break
 14802  		}
 14803  		_ = x0.Args[1]
 14804  		x0_0 := x0.Args[0]
 14805  		if x0_0.Op != OpPPC64MOVDaddr {
 14806  			break
 14807  		}
 14808  		if x0_0.Type != typ.Uintptr {
 14809  			break
 14810  		}
 14811  		i2 := x0_0.AuxInt
 14812  		if x0_0.Aux != s {
 14813  			break
 14814  		}
 14815  		if p != x0_0.Args[0] {
 14816  			break
 14817  		}
 14818  		if mem != x0.Args[1] {
 14819  			break
 14820  		}
 14821  		s0 := o0.Args[1]
 14822  		if s0.Op != OpPPC64SLDconst {
 14823  			break
 14824  		}
 14825  		if s0.AuxInt != 16 {
 14826  			break
 14827  		}
 14828  		x1 := s0.Args[0]
 14829  		if x1.Op != OpPPC64MOVBZload {
 14830  			break
 14831  		}
 14832  		i1 := x1.AuxInt
 14833  		if x1.Aux != s {
 14834  			break
 14835  		}
 14836  		_ = x1.Args[1]
 14837  		if p != x1.Args[0] {
 14838  			break
 14839  		}
 14840  		if mem != x1.Args[1] {
 14841  			break
 14842  		}
 14843  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14844  			break
 14845  		}
 14846  		b = mergePoint(b, x0, x1, x2)
 14847  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14848  		v.reset(OpCopy)
 14849  		v.AddArg(v0)
 14850  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14851  		v1.AuxInt = i0
 14852  		v1.Aux = s
 14853  		v1.AddArg(p)
 14854  		v0.AddArg(v1)
 14855  		v0.AddArg(mem)
 14856  		return true
 14857  	}
 14858  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14859  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14860  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14861  	for {
 14862  		t := v.Type
 14863  		_ = v.Args[1]
 14864  		o0 := v.Args[0]
 14865  		if o0.Op != OpPPC64OR {
 14866  			break
 14867  		}
 14868  		if o0.Type != t {
 14869  			break
 14870  		}
 14871  		_ = o0.Args[1]
 14872  		s0 := o0.Args[0]
 14873  		if s0.Op != OpPPC64SLDconst {
 14874  			break
 14875  		}
 14876  		if s0.AuxInt != 16 {
 14877  			break
 14878  		}
 14879  		x1 := s0.Args[0]
 14880  		if x1.Op != OpPPC64MOVBZload {
 14881  			break
 14882  		}
 14883  		i1 := x1.AuxInt
 14884  		s := x1.Aux
 14885  		_ = x1.Args[1]
 14886  		p := x1.Args[0]
 14887  		mem := x1.Args[1]
 14888  		x0 := o0.Args[1]
 14889  		if x0.Op != OpPPC64MOVHBRload {
 14890  			break
 14891  		}
 14892  		if x0.Type != t {
 14893  			break
 14894  		}
 14895  		_ = x0.Args[1]
 14896  		x0_0 := x0.Args[0]
 14897  		if x0_0.Op != OpPPC64MOVDaddr {
 14898  			break
 14899  		}
 14900  		if x0_0.Type != typ.Uintptr {
 14901  			break
 14902  		}
 14903  		i2 := x0_0.AuxInt
 14904  		if x0_0.Aux != s {
 14905  			break
 14906  		}
 14907  		if p != x0_0.Args[0] {
 14908  			break
 14909  		}
 14910  		if mem != x0.Args[1] {
 14911  			break
 14912  		}
 14913  		s1 := v.Args[1]
 14914  		if s1.Op != OpPPC64SLDconst {
 14915  			break
 14916  		}
 14917  		if s1.AuxInt != 24 {
 14918  			break
 14919  		}
 14920  		x2 := s1.Args[0]
 14921  		if x2.Op != OpPPC64MOVBZload {
 14922  			break
 14923  		}
 14924  		i0 := x2.AuxInt
 14925  		if x2.Aux != s {
 14926  			break
 14927  		}
 14928  		_ = x2.Args[1]
 14929  		if p != x2.Args[0] {
 14930  			break
 14931  		}
 14932  		if mem != x2.Args[1] {
 14933  			break
 14934  		}
 14935  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14936  			break
 14937  		}
 14938  		b = mergePoint(b, x0, x1, x2)
 14939  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 14940  		v.reset(OpCopy)
 14941  		v.AddArg(v0)
 14942  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14943  		v1.AuxInt = i0
 14944  		v1.Aux = s
 14945  		v1.AddArg(p)
 14946  		v0.AddArg(v1)
 14947  		v0.AddArg(mem)
 14948  		return true
 14949  	}
 14950  	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14951  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14952  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14953  	for {
 14954  		t := v.Type
 14955  		_ = v.Args[1]
 14956  		o0 := v.Args[0]
 14957  		if o0.Op != OpPPC64OR {
 14958  			break
 14959  		}
 14960  		if o0.Type != t {
 14961  			break
 14962  		}
 14963  		_ = o0.Args[1]
 14964  		x0 := o0.Args[0]
 14965  		if x0.Op != OpPPC64MOVHBRload {
 14966  			break
 14967  		}
 14968  		if x0.Type != t {
 14969  			break
 14970  		}
 14971  		_ = x0.Args[1]
 14972  		x0_0 := x0.Args[0]
 14973  		if x0_0.Op != OpPPC64MOVDaddr {
 14974  			break
 14975  		}
 14976  		if x0_0.Type != typ.Uintptr {
 14977  			break
 14978  		}
 14979  		i2 := x0_0.AuxInt
 14980  		s := x0_0.Aux
 14981  		p := x0_0.Args[0]
 14982  		mem := x0.Args[1]
 14983  		s0 := o0.Args[1]
 14984  		if s0.Op != OpPPC64SLDconst {
 14985  			break
 14986  		}
 14987  		if s0.AuxInt != 16 {
 14988  			break
 14989  		}
 14990  		x1 := s0.Args[0]
 14991  		if x1.Op != OpPPC64MOVBZload {
 14992  			break
 14993  		}
 14994  		i1 := x1.AuxInt
 14995  		if x1.Aux != s {
 14996  			break
 14997  		}
 14998  		_ = x1.Args[1]
 14999  		if p != x1.Args[0] {
 15000  			break
 15001  		}
 15002  		if mem != x1.Args[1] {
 15003  			break
 15004  		}
 15005  		s1 := v.Args[1]
 15006  		if s1.Op != OpPPC64SLDconst {
 15007  			break
 15008  		}
 15009  		if s1.AuxInt != 24 {
 15010  			break
 15011  		}
 15012  		x2 := s1.Args[0]
 15013  		if x2.Op != OpPPC64MOVBZload {
 15014  			break
 15015  		}
 15016  		i0 := x2.AuxInt
 15017  		if x2.Aux != s {
 15018  			break
 15019  		}
 15020  		_ = x2.Args[1]
 15021  		if p != x2.Args[0] {
 15022  			break
 15023  		}
 15024  		if mem != x2.Args[1] {
 15025  			break
 15026  		}
 15027  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15028  			break
 15029  		}
 15030  		b = mergePoint(b, x0, x1, x2)
 15031  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15032  		v.reset(OpCopy)
 15033  		v.AddArg(v0)
 15034  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15035  		v1.AuxInt = i0
 15036  		v1.Aux = s
 15037  		v1.AddArg(p)
 15038  		v0.AddArg(v1)
 15039  		v0.AddArg(mem)
 15040  		return true
 15041  	}
 15042  	return false
 15043  }
 15044  func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
 15045  	b := v.Block
 15046  	_ = b
 15047  	config := b.Func.Config
 15048  	_ = config
 15049  	typ := &b.Func.Config.Types
 15050  	_ = typ
 15051  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 15052  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15053  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15054  	for {
 15055  		t := v.Type
 15056  		_ = v.Args[1]
 15057  		x0 := v.Args[0]
 15058  		if x0.Op != OpPPC64MOVBZload {
 15059  			break
 15060  		}
 15061  		i3 := x0.AuxInt
 15062  		s := x0.Aux
 15063  		_ = x0.Args[1]
 15064  		p := x0.Args[0]
 15065  		mem := x0.Args[1]
 15066  		o0 := v.Args[1]
 15067  		if o0.Op != OpPPC64OR {
 15068  			break
 15069  		}
 15070  		if o0.Type != t {
 15071  			break
 15072  		}
 15073  		_ = o0.Args[1]
 15074  		s0 := o0.Args[0]
 15075  		if s0.Op != OpPPC64SLWconst {
 15076  			break
 15077  		}
 15078  		if s0.AuxInt != 8 {
 15079  			break
 15080  		}
 15081  		x1 := s0.Args[0]
 15082  		if x1.Op != OpPPC64MOVBZload {
 15083  			break
 15084  		}
 15085  		i2 := x1.AuxInt
 15086  		if x1.Aux != s {
 15087  			break
 15088  		}
 15089  		_ = x1.Args[1]
 15090  		if p != x1.Args[0] {
 15091  			break
 15092  		}
 15093  		if mem != x1.Args[1] {
 15094  			break
 15095  		}
 15096  		s1 := o0.Args[1]
 15097  		if s1.Op != OpPPC64SLWconst {
 15098  			break
 15099  		}
 15100  		if s1.AuxInt != 16 {
 15101  			break
 15102  		}
 15103  		x2 := s1.Args[0]
 15104  		if x2.Op != OpPPC64MOVHBRload {
 15105  			break
 15106  		}
 15107  		if x2.Type != t {
 15108  			break
 15109  		}
 15110  		_ = x2.Args[1]
 15111  		x2_0 := x2.Args[0]
 15112  		if x2_0.Op != OpPPC64MOVDaddr {
 15113  			break
 15114  		}
 15115  		if x2_0.Type != typ.Uintptr {
 15116  			break
 15117  		}
 15118  		i0 := x2_0.AuxInt
 15119  		if x2_0.Aux != s {
 15120  			break
 15121  		}
 15122  		if p != x2_0.Args[0] {
 15123  			break
 15124  		}
 15125  		if mem != x2.Args[1] {
 15126  			break
 15127  		}
 15128  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15129  			break
 15130  		}
 15131  		b = mergePoint(b, x0, x1, x2)
 15132  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15133  		v.reset(OpCopy)
 15134  		v.AddArg(v0)
 15135  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15136  		v1.AuxInt = i0
 15137  		v1.Aux = s
 15138  		v1.AddArg(p)
 15139  		v0.AddArg(v1)
 15140  		v0.AddArg(mem)
 15141  		return true
 15142  	}
 15143  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])))
 15144  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15145  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15146  	for {
 15147  		t := v.Type
 15148  		_ = v.Args[1]
 15149  		x0 := v.Args[0]
 15150  		if x0.Op != OpPPC64MOVBZload {
 15151  			break
 15152  		}
 15153  		i3 := x0.AuxInt
 15154  		s := x0.Aux
 15155  		_ = x0.Args[1]
 15156  		p := x0.Args[0]
 15157  		mem := x0.Args[1]
 15158  		o0 := v.Args[1]
 15159  		if o0.Op != OpPPC64OR {
 15160  			break
 15161  		}
 15162  		if o0.Type != t {
 15163  			break
 15164  		}
 15165  		_ = o0.Args[1]
 15166  		s1 := o0.Args[0]
 15167  		if s1.Op != OpPPC64SLWconst {
 15168  			break
 15169  		}
 15170  		if s1.AuxInt != 16 {
 15171  			break
 15172  		}
 15173  		x2 := s1.Args[0]
 15174  		if x2.Op != OpPPC64MOVHBRload {
 15175  			break
 15176  		}
 15177  		if x2.Type != t {
 15178  			break
 15179  		}
 15180  		_ = x2.Args[1]
 15181  		x2_0 := x2.Args[0]
 15182  		if x2_0.Op != OpPPC64MOVDaddr {
 15183  			break
 15184  		}
 15185  		if x2_0.Type != typ.Uintptr {
 15186  			break
 15187  		}
 15188  		i0 := x2_0.AuxInt
 15189  		if x2_0.Aux != s {
 15190  			break
 15191  		}
 15192  		if p != x2_0.Args[0] {
 15193  			break
 15194  		}
 15195  		if mem != x2.Args[1] {
 15196  			break
 15197  		}
 15198  		s0 := o0.Args[1]
 15199  		if s0.Op != OpPPC64SLWconst {
 15200  			break
 15201  		}
 15202  		if s0.AuxInt != 8 {
 15203  			break
 15204  		}
 15205  		x1 := s0.Args[0]
 15206  		if x1.Op != OpPPC64MOVBZload {
 15207  			break
 15208  		}
 15209  		i2 := x1.AuxInt
 15210  		if x1.Aux != s {
 15211  			break
 15212  		}
 15213  		_ = x1.Args[1]
 15214  		if p != x1.Args[0] {
 15215  			break
 15216  		}
 15217  		if mem != x1.Args[1] {
 15218  			break
 15219  		}
 15220  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15221  			break
 15222  		}
 15223  		b = mergePoint(b, x0, x1, x2)
 15224  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15225  		v.reset(OpCopy)
 15226  		v.AddArg(v0)
 15227  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15228  		v1.AuxInt = i0
 15229  		v1.Aux = s
 15230  		v1.AddArg(p)
 15231  		v0.AddArg(v1)
 15232  		v0.AddArg(mem)
 15233  		return true
 15234  	}
 15235  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 15236  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15237  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15238  	for {
 15239  		t := v.Type
 15240  		_ = v.Args[1]
 15241  		o0 := v.Args[0]
 15242  		if o0.Op != OpPPC64OR {
 15243  			break
 15244  		}
 15245  		if o0.Type != t {
 15246  			break
 15247  		}
 15248  		_ = o0.Args[1]
 15249  		s0 := o0.Args[0]
 15250  		if s0.Op != OpPPC64SLWconst {
 15251  			break
 15252  		}
 15253  		if s0.AuxInt != 8 {
 15254  			break
 15255  		}
 15256  		x1 := s0.Args[0]
 15257  		if x1.Op != OpPPC64MOVBZload {
 15258  			break
 15259  		}
 15260  		i2 := x1.AuxInt
 15261  		s := x1.Aux
 15262  		_ = x1.Args[1]
 15263  		p := x1.Args[0]
 15264  		mem := x1.Args[1]
 15265  		s1 := o0.Args[1]
 15266  		if s1.Op != OpPPC64SLWconst {
 15267  			break
 15268  		}
 15269  		if s1.AuxInt != 16 {
 15270  			break
 15271  		}
 15272  		x2 := s1.Args[0]
 15273  		if x2.Op != OpPPC64MOVHBRload {
 15274  			break
 15275  		}
 15276  		if x2.Type != t {
 15277  			break
 15278  		}
 15279  		_ = x2.Args[1]
 15280  		x2_0 := x2.Args[0]
 15281  		if x2_0.Op != OpPPC64MOVDaddr {
 15282  			break
 15283  		}
 15284  		if x2_0.Type != typ.Uintptr {
 15285  			break
 15286  		}
 15287  		i0 := x2_0.AuxInt
 15288  		if x2_0.Aux != s {
 15289  			break
 15290  		}
 15291  		if p != x2_0.Args[0] {
 15292  			break
 15293  		}
 15294  		if mem != x2.Args[1] {
 15295  			break
 15296  		}
 15297  		x0 := v.Args[1]
 15298  		if x0.Op != OpPPC64MOVBZload {
 15299  			break
 15300  		}
 15301  		i3 := x0.AuxInt
 15302  		if x0.Aux != s {
 15303  			break
 15304  		}
 15305  		_ = x0.Args[1]
 15306  		if p != x0.Args[0] {
 15307  			break
 15308  		}
 15309  		if mem != x0.Args[1] {
 15310  			break
 15311  		}
 15312  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15313  			break
 15314  		}
 15315  		b = mergePoint(b, x0, x1, x2)
 15316  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15317  		v.reset(OpCopy)
 15318  		v.AddArg(v0)
 15319  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15320  		v1.AuxInt = i0
 15321  		v1.Aux = s
 15322  		v1.AddArg(p)
 15323  		v0.AddArg(v1)
 15324  		v0.AddArg(mem)
 15325  		return true
 15326  	}
 15327  	// match: (OR <t> o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 15328  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15329  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15330  	for {
 15331  		t := v.Type
 15332  		_ = v.Args[1]
 15333  		o0 := v.Args[0]
 15334  		if o0.Op != OpPPC64OR {
 15335  			break
 15336  		}
 15337  		if o0.Type != t {
 15338  			break
 15339  		}
 15340  		_ = o0.Args[1]
 15341  		s1 := o0.Args[0]
 15342  		if s1.Op != OpPPC64SLWconst {
 15343  			break
 15344  		}
 15345  		if s1.AuxInt != 16 {
 15346  			break
 15347  		}
 15348  		x2 := s1.Args[0]
 15349  		if x2.Op != OpPPC64MOVHBRload {
 15350  			break
 15351  		}
 15352  		if x2.Type != t {
 15353  			break
 15354  		}
 15355  		_ = x2.Args[1]
 15356  		x2_0 := x2.Args[0]
 15357  		if x2_0.Op != OpPPC64MOVDaddr {
 15358  			break
 15359  		}
 15360  		if x2_0.Type != typ.Uintptr {
 15361  			break
 15362  		}
 15363  		i0 := x2_0.AuxInt
 15364  		s := x2_0.Aux
 15365  		p := x2_0.Args[0]
 15366  		mem := x2.Args[1]
 15367  		s0 := o0.Args[1]
 15368  		if s0.Op != OpPPC64SLWconst {
 15369  			break
 15370  		}
 15371  		if s0.AuxInt != 8 {
 15372  			break
 15373  		}
 15374  		x1 := s0.Args[0]
 15375  		if x1.Op != OpPPC64MOVBZload {
 15376  			break
 15377  		}
 15378  		i2 := x1.AuxInt
 15379  		if x1.Aux != s {
 15380  			break
 15381  		}
 15382  		_ = x1.Args[1]
 15383  		if p != x1.Args[0] {
 15384  			break
 15385  		}
 15386  		if mem != x1.Args[1] {
 15387  			break
 15388  		}
 15389  		x0 := v.Args[1]
 15390  		if x0.Op != OpPPC64MOVBZload {
 15391  			break
 15392  		}
 15393  		i3 := x0.AuxInt
 15394  		if x0.Aux != s {
 15395  			break
 15396  		}
 15397  		_ = x0.Args[1]
 15398  		if p != x0.Args[0] {
 15399  			break
 15400  		}
 15401  		if mem != x0.Args[1] {
 15402  			break
 15403  		}
 15404  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15405  			break
 15406  		}
 15407  		b = mergePoint(b, x0, x1, x2)
 15408  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15409  		v.reset(OpCopy)
 15410  		v.AddArg(v0)
 15411  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15412  		v1.AuxInt = i0
 15413  		v1.Aux = s
 15414  		v1.AddArg(p)
 15415  		v0.AddArg(v1)
 15416  		v0.AddArg(mem)
 15417  		return true
 15418  	}
 15419  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 15420  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15421  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15422  	for {
 15423  		t := v.Type
 15424  		_ = v.Args[1]
 15425  		x0 := v.Args[0]
 15426  		if x0.Op != OpPPC64MOVBZload {
 15427  			break
 15428  		}
 15429  		i3 := x0.AuxInt
 15430  		s := x0.Aux
 15431  		_ = x0.Args[1]
 15432  		p := x0.Args[0]
 15433  		mem := x0.Args[1]
 15434  		o0 := v.Args[1]
 15435  		if o0.Op != OpPPC64OR {
 15436  			break
 15437  		}
 15438  		if o0.Type != t {
 15439  			break
 15440  		}
 15441  		_ = o0.Args[1]
 15442  		s0 := o0.Args[0]
 15443  		if s0.Op != OpPPC64SLDconst {
 15444  			break
 15445  		}
 15446  		if s0.AuxInt != 8 {
 15447  			break
 15448  		}
 15449  		x1 := s0.Args[0]
 15450  		if x1.Op != OpPPC64MOVBZload {
 15451  			break
 15452  		}
 15453  		i2 := x1.AuxInt
 15454  		if x1.Aux != s {
 15455  			break
 15456  		}
 15457  		_ = x1.Args[1]
 15458  		if p != x1.Args[0] {
 15459  			break
 15460  		}
 15461  		if mem != x1.Args[1] {
 15462  			break
 15463  		}
 15464  		s1 := o0.Args[1]
 15465  		if s1.Op != OpPPC64SLDconst {
 15466  			break
 15467  		}
 15468  		if s1.AuxInt != 16 {
 15469  			break
 15470  		}
 15471  		x2 := s1.Args[0]
 15472  		if x2.Op != OpPPC64MOVHBRload {
 15473  			break
 15474  		}
 15475  		if x2.Type != t {
 15476  			break
 15477  		}
 15478  		_ = x2.Args[1]
 15479  		x2_0 := x2.Args[0]
 15480  		if x2_0.Op != OpPPC64MOVDaddr {
 15481  			break
 15482  		}
 15483  		if x2_0.Type != typ.Uintptr {
 15484  			break
 15485  		}
 15486  		i0 := x2_0.AuxInt
 15487  		if x2_0.Aux != s {
 15488  			break
 15489  		}
 15490  		if p != x2_0.Args[0] {
 15491  			break
 15492  		}
 15493  		if mem != x2.Args[1] {
 15494  			break
 15495  		}
 15496  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15497  			break
 15498  		}
 15499  		b = mergePoint(b, x0, x1, x2)
 15500  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15501  		v.reset(OpCopy)
 15502  		v.AddArg(v0)
 15503  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15504  		v1.AuxInt = i0
 15505  		v1.Aux = s
 15506  		v1.AddArg(p)
 15507  		v0.AddArg(v1)
 15508  		v0.AddArg(mem)
 15509  		return true
 15510  	}
 15511  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])))
 15512  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15513  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15514  	for {
 15515  		t := v.Type
 15516  		_ = v.Args[1]
 15517  		x0 := v.Args[0]
 15518  		if x0.Op != OpPPC64MOVBZload {
 15519  			break
 15520  		}
 15521  		i3 := x0.AuxInt
 15522  		s := x0.Aux
 15523  		_ = x0.Args[1]
 15524  		p := x0.Args[0]
 15525  		mem := x0.Args[1]
 15526  		o0 := v.Args[1]
 15527  		if o0.Op != OpPPC64OR {
 15528  			break
 15529  		}
 15530  		if o0.Type != t {
 15531  			break
 15532  		}
 15533  		_ = o0.Args[1]
 15534  		s1 := o0.Args[0]
 15535  		if s1.Op != OpPPC64SLDconst {
 15536  			break
 15537  		}
 15538  		if s1.AuxInt != 16 {
 15539  			break
 15540  		}
 15541  		x2 := s1.Args[0]
 15542  		if x2.Op != OpPPC64MOVHBRload {
 15543  			break
 15544  		}
 15545  		if x2.Type != t {
 15546  			break
 15547  		}
 15548  		_ = x2.Args[1]
 15549  		x2_0 := x2.Args[0]
 15550  		if x2_0.Op != OpPPC64MOVDaddr {
 15551  			break
 15552  		}
 15553  		if x2_0.Type != typ.Uintptr {
 15554  			break
 15555  		}
 15556  		i0 := x2_0.AuxInt
 15557  		if x2_0.Aux != s {
 15558  			break
 15559  		}
 15560  		if p != x2_0.Args[0] {
 15561  			break
 15562  		}
 15563  		if mem != x2.Args[1] {
 15564  			break
 15565  		}
 15566  		s0 := o0.Args[1]
 15567  		if s0.Op != OpPPC64SLDconst {
 15568  			break
 15569  		}
 15570  		if s0.AuxInt != 8 {
 15571  			break
 15572  		}
 15573  		x1 := s0.Args[0]
 15574  		if x1.Op != OpPPC64MOVBZload {
 15575  			break
 15576  		}
 15577  		i2 := x1.AuxInt
 15578  		if x1.Aux != s {
 15579  			break
 15580  		}
 15581  		_ = x1.Args[1]
 15582  		if p != x1.Args[0] {
 15583  			break
 15584  		}
 15585  		if mem != x1.Args[1] {
 15586  			break
 15587  		}
 15588  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15589  			break
 15590  		}
 15591  		b = mergePoint(b, x0, x1, x2)
 15592  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15593  		v.reset(OpCopy)
 15594  		v.AddArg(v0)
 15595  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15596  		v1.AuxInt = i0
 15597  		v1.Aux = s
 15598  		v1.AddArg(p)
 15599  		v0.AddArg(v1)
 15600  		v0.AddArg(mem)
 15601  		return true
 15602  	}
 15603  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 15604  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15605  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15606  	for {
 15607  		t := v.Type
 15608  		_ = v.Args[1]
 15609  		o0 := v.Args[0]
 15610  		if o0.Op != OpPPC64OR {
 15611  			break
 15612  		}
 15613  		if o0.Type != t {
 15614  			break
 15615  		}
 15616  		_ = o0.Args[1]
 15617  		s0 := o0.Args[0]
 15618  		if s0.Op != OpPPC64SLDconst {
 15619  			break
 15620  		}
 15621  		if s0.AuxInt != 8 {
 15622  			break
 15623  		}
 15624  		x1 := s0.Args[0]
 15625  		if x1.Op != OpPPC64MOVBZload {
 15626  			break
 15627  		}
 15628  		i2 := x1.AuxInt
 15629  		s := x1.Aux
 15630  		_ = x1.Args[1]
 15631  		p := x1.Args[0]
 15632  		mem := x1.Args[1]
 15633  		s1 := o0.Args[1]
 15634  		if s1.Op != OpPPC64SLDconst {
 15635  			break
 15636  		}
 15637  		if s1.AuxInt != 16 {
 15638  			break
 15639  		}
 15640  		x2 := s1.Args[0]
 15641  		if x2.Op != OpPPC64MOVHBRload {
 15642  			break
 15643  		}
 15644  		if x2.Type != t {
 15645  			break
 15646  		}
 15647  		_ = x2.Args[1]
 15648  		x2_0 := x2.Args[0]
 15649  		if x2_0.Op != OpPPC64MOVDaddr {
 15650  			break
 15651  		}
 15652  		if x2_0.Type != typ.Uintptr {
 15653  			break
 15654  		}
 15655  		i0 := x2_0.AuxInt
 15656  		if x2_0.Aux != s {
 15657  			break
 15658  		}
 15659  		if p != x2_0.Args[0] {
 15660  			break
 15661  		}
 15662  		if mem != x2.Args[1] {
 15663  			break
 15664  		}
 15665  		x0 := v.Args[1]
 15666  		if x0.Op != OpPPC64MOVBZload {
 15667  			break
 15668  		}
 15669  		i3 := x0.AuxInt
 15670  		if x0.Aux != s {
 15671  			break
 15672  		}
 15673  		_ = x0.Args[1]
 15674  		if p != x0.Args[0] {
 15675  			break
 15676  		}
 15677  		if mem != x0.Args[1] {
 15678  			break
 15679  		}
 15680  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15681  			break
 15682  		}
 15683  		b = mergePoint(b, x0, x1, x2)
 15684  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15685  		v.reset(OpCopy)
 15686  		v.AddArg(v0)
 15687  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15688  		v1.AuxInt = i0
 15689  		v1.Aux = s
 15690  		v1.AddArg(p)
 15691  		v0.AddArg(v1)
 15692  		v0.AddArg(mem)
 15693  		return true
 15694  	}
 15695  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 15696  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15697  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15698  	for {
 15699  		t := v.Type
 15700  		_ = v.Args[1]
 15701  		o0 := v.Args[0]
 15702  		if o0.Op != OpPPC64OR {
 15703  			break
 15704  		}
 15705  		if o0.Type != t {
 15706  			break
 15707  		}
 15708  		_ = o0.Args[1]
 15709  		s1 := o0.Args[0]
 15710  		if s1.Op != OpPPC64SLDconst {
 15711  			break
 15712  		}
 15713  		if s1.AuxInt != 16 {
 15714  			break
 15715  		}
 15716  		x2 := s1.Args[0]
 15717  		if x2.Op != OpPPC64MOVHBRload {
 15718  			break
 15719  		}
 15720  		if x2.Type != t {
 15721  			break
 15722  		}
 15723  		_ = x2.Args[1]
 15724  		x2_0 := x2.Args[0]
 15725  		if x2_0.Op != OpPPC64MOVDaddr {
 15726  			break
 15727  		}
 15728  		if x2_0.Type != typ.Uintptr {
 15729  			break
 15730  		}
 15731  		i0 := x2_0.AuxInt
 15732  		s := x2_0.Aux
 15733  		p := x2_0.Args[0]
 15734  		mem := x2.Args[1]
 15735  		s0 := o0.Args[1]
 15736  		if s0.Op != OpPPC64SLDconst {
 15737  			break
 15738  		}
 15739  		if s0.AuxInt != 8 {
 15740  			break
 15741  		}
 15742  		x1 := s0.Args[0]
 15743  		if x1.Op != OpPPC64MOVBZload {
 15744  			break
 15745  		}
 15746  		i2 := x1.AuxInt
 15747  		if x1.Aux != s {
 15748  			break
 15749  		}
 15750  		_ = x1.Args[1]
 15751  		if p != x1.Args[0] {
 15752  			break
 15753  		}
 15754  		if mem != x1.Args[1] {
 15755  			break
 15756  		}
 15757  		x0 := v.Args[1]
 15758  		if x0.Op != OpPPC64MOVBZload {
 15759  			break
 15760  		}
 15761  		i3 := x0.AuxInt
 15762  		if x0.Aux != s {
 15763  			break
 15764  		}
 15765  		_ = x0.Args[1]
 15766  		if p != x0.Args[0] {
 15767  			break
 15768  		}
 15769  		if mem != x0.Args[1] {
 15770  			break
 15771  		}
 15772  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15773  			break
 15774  		}
 15775  		b = mergePoint(b, x0, x1, x2)
 15776  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15777  		v.reset(OpCopy)
 15778  		v.AddArg(v0)
 15779  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15780  		v1.AuxInt = i0
 15781  		v1.Aux = s
 15782  		v1.AddArg(p)
 15783  		v0.AddArg(v1)
 15784  		v0.AddArg(mem)
 15785  		return true
 15786  	}
 15787  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])))
 15788  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15789  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15790  	for {
 15791  		t := v.Type
 15792  		_ = v.Args[1]
 15793  		s2 := v.Args[0]
 15794  		if s2.Op != OpPPC64SLDconst {
 15795  			break
 15796  		}
 15797  		if s2.AuxInt != 32 {
 15798  			break
 15799  		}
 15800  		x2 := s2.Args[0]
 15801  		if x2.Op != OpPPC64MOVBZload {
 15802  			break
 15803  		}
 15804  		i3 := x2.AuxInt
 15805  		s := x2.Aux
 15806  		_ = x2.Args[1]
 15807  		p := x2.Args[0]
 15808  		mem := x2.Args[1]
 15809  		o0 := v.Args[1]
 15810  		if o0.Op != OpPPC64OR {
 15811  			break
 15812  		}
 15813  		if o0.Type != t {
 15814  			break
 15815  		}
 15816  		_ = o0.Args[1]
 15817  		s1 := o0.Args[0]
 15818  		if s1.Op != OpPPC64SLDconst {
 15819  			break
 15820  		}
 15821  		if s1.AuxInt != 40 {
 15822  			break
 15823  		}
 15824  		x1 := s1.Args[0]
 15825  		if x1.Op != OpPPC64MOVBZload {
 15826  			break
 15827  		}
 15828  		i2 := x1.AuxInt
 15829  		if x1.Aux != s {
 15830  			break
 15831  		}
 15832  		_ = x1.Args[1]
 15833  		if p != x1.Args[0] {
 15834  			break
 15835  		}
 15836  		if mem != x1.Args[1] {
 15837  			break
 15838  		}
 15839  		s0 := o0.Args[1]
 15840  		if s0.Op != OpPPC64SLDconst {
 15841  			break
 15842  		}
 15843  		if s0.AuxInt != 48 {
 15844  			break
 15845  		}
 15846  		x0 := s0.Args[0]
 15847  		if x0.Op != OpPPC64MOVHBRload {
 15848  			break
 15849  		}
 15850  		if x0.Type != t {
 15851  			break
 15852  		}
 15853  		_ = x0.Args[1]
 15854  		x0_0 := x0.Args[0]
 15855  		if x0_0.Op != OpPPC64MOVDaddr {
 15856  			break
 15857  		}
 15858  		if x0_0.Type != typ.Uintptr {
 15859  			break
 15860  		}
 15861  		i0 := x0_0.AuxInt
 15862  		if x0_0.Aux != s {
 15863  			break
 15864  		}
 15865  		if p != x0_0.Args[0] {
 15866  			break
 15867  		}
 15868  		if mem != x0.Args[1] {
 15869  			break
 15870  		}
 15871  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15872  			break
 15873  		}
 15874  		b = mergePoint(b, x0, x1, x2)
 15875  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 15876  		v.reset(OpCopy)
 15877  		v.AddArg(v0)
 15878  		v0.AuxInt = 32
 15879  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15880  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15881  		v2.AuxInt = i0
 15882  		v2.Aux = s
 15883  		v2.AddArg(p)
 15884  		v1.AddArg(v2)
 15885  		v1.AddArg(mem)
 15886  		v0.AddArg(v1)
 15887  		return true
 15888  	}
 15889  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])))
 15890  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15891  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15892  	for {
 15893  		t := v.Type
 15894  		_ = v.Args[1]
 15895  		s2 := v.Args[0]
 15896  		if s2.Op != OpPPC64SLDconst {
 15897  			break
 15898  		}
 15899  		if s2.AuxInt != 32 {
 15900  			break
 15901  		}
 15902  		x2 := s2.Args[0]
 15903  		if x2.Op != OpPPC64MOVBZload {
 15904  			break
 15905  		}
 15906  		i3 := x2.AuxInt
 15907  		s := x2.Aux
 15908  		_ = x2.Args[1]
 15909  		p := x2.Args[0]
 15910  		mem := x2.Args[1]
 15911  		o0 := v.Args[1]
 15912  		if o0.Op != OpPPC64OR {
 15913  			break
 15914  		}
 15915  		if o0.Type != t {
 15916  			break
 15917  		}
 15918  		_ = o0.Args[1]
 15919  		s0 := o0.Args[0]
 15920  		if s0.Op != OpPPC64SLDconst {
 15921  			break
 15922  		}
 15923  		if s0.AuxInt != 48 {
 15924  			break
 15925  		}
 15926  		x0 := s0.Args[0]
 15927  		if x0.Op != OpPPC64MOVHBRload {
 15928  			break
 15929  		}
 15930  		if x0.Type != t {
 15931  			break
 15932  		}
 15933  		_ = x0.Args[1]
 15934  		x0_0 := x0.Args[0]
 15935  		if x0_0.Op != OpPPC64MOVDaddr {
 15936  			break
 15937  		}
 15938  		if x0_0.Type != typ.Uintptr {
 15939  			break
 15940  		}
 15941  		i0 := x0_0.AuxInt
 15942  		if x0_0.Aux != s {
 15943  			break
 15944  		}
 15945  		if p != x0_0.Args[0] {
 15946  			break
 15947  		}
 15948  		if mem != x0.Args[1] {
 15949  			break
 15950  		}
 15951  		s1 := o0.Args[1]
 15952  		if s1.Op != OpPPC64SLDconst {
 15953  			break
 15954  		}
 15955  		if s1.AuxInt != 40 {
 15956  			break
 15957  		}
 15958  		x1 := s1.Args[0]
 15959  		if x1.Op != OpPPC64MOVBZload {
 15960  			break
 15961  		}
 15962  		i2 := x1.AuxInt
 15963  		if x1.Aux != s {
 15964  			break
 15965  		}
 15966  		_ = x1.Args[1]
 15967  		if p != x1.Args[0] {
 15968  			break
 15969  		}
 15970  		if mem != x1.Args[1] {
 15971  			break
 15972  		}
 15973  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15974  			break
 15975  		}
 15976  		b = mergePoint(b, x0, x1, x2)
 15977  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 15978  		v.reset(OpCopy)
 15979  		v.AddArg(v0)
 15980  		v0.AuxInt = 32
 15981  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 15982  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15983  		v2.AuxInt = i0
 15984  		v2.Aux = s
 15985  		v2.AddArg(p)
 15986  		v1.AddArg(v2)
 15987  		v1.AddArg(mem)
 15988  		v0.AddArg(v1)
 15989  		return true
 15990  	}
 15991  	return false
 15992  }
 15993  func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
 15994  	b := v.Block
 15995  	_ = b
 15996  	config := b.Func.Config
 15997  	_ = config
 15998  	typ := &b.Func.Config.Types
 15999  	_ = typ
 16000  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 16001  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16002  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16003  	for {
 16004  		t := v.Type
 16005  		_ = v.Args[1]
 16006  		o0 := v.Args[0]
 16007  		if o0.Op != OpPPC64OR {
 16008  			break
 16009  		}
 16010  		if o0.Type != t {
 16011  			break
 16012  		}
 16013  		_ = o0.Args[1]
 16014  		s1 := o0.Args[0]
 16015  		if s1.Op != OpPPC64SLDconst {
 16016  			break
 16017  		}
 16018  		if s1.AuxInt != 40 {
 16019  			break
 16020  		}
 16021  		x1 := s1.Args[0]
 16022  		if x1.Op != OpPPC64MOVBZload {
 16023  			break
 16024  		}
 16025  		i2 := x1.AuxInt
 16026  		s := x1.Aux
 16027  		_ = x1.Args[1]
 16028  		p := x1.Args[0]
 16029  		mem := x1.Args[1]
 16030  		s0 := o0.Args[1]
 16031  		if s0.Op != OpPPC64SLDconst {
 16032  			break
 16033  		}
 16034  		if s0.AuxInt != 48 {
 16035  			break
 16036  		}
 16037  		x0 := s0.Args[0]
 16038  		if x0.Op != OpPPC64MOVHBRload {
 16039  			break
 16040  		}
 16041  		if x0.Type != t {
 16042  			break
 16043  		}
 16044  		_ = x0.Args[1]
 16045  		x0_0 := x0.Args[0]
 16046  		if x0_0.Op != OpPPC64MOVDaddr {
 16047  			break
 16048  		}
 16049  		if x0_0.Type != typ.Uintptr {
 16050  			break
 16051  		}
 16052  		i0 := x0_0.AuxInt
 16053  		if x0_0.Aux != s {
 16054  			break
 16055  		}
 16056  		if p != x0_0.Args[0] {
 16057  			break
 16058  		}
 16059  		if mem != x0.Args[1] {
 16060  			break
 16061  		}
 16062  		s2 := v.Args[1]
 16063  		if s2.Op != OpPPC64SLDconst {
 16064  			break
 16065  		}
 16066  		if s2.AuxInt != 32 {
 16067  			break
 16068  		}
 16069  		x2 := s2.Args[0]
 16070  		if x2.Op != OpPPC64MOVBZload {
 16071  			break
 16072  		}
 16073  		i3 := x2.AuxInt
 16074  		if x2.Aux != s {
 16075  			break
 16076  		}
 16077  		_ = x2.Args[1]
 16078  		if p != x2.Args[0] {
 16079  			break
 16080  		}
 16081  		if mem != x2.Args[1] {
 16082  			break
 16083  		}
 16084  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16085  			break
 16086  		}
 16087  		b = mergePoint(b, x0, x1, x2)
 16088  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16089  		v.reset(OpCopy)
 16090  		v.AddArg(v0)
 16091  		v0.AuxInt = 32
 16092  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16093  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16094  		v2.AuxInt = i0
 16095  		v2.Aux = s
 16096  		v2.AddArg(p)
 16097  		v1.AddArg(v2)
 16098  		v1.AddArg(mem)
 16099  		v0.AddArg(v1)
 16100  		return true
 16101  	}
 16102  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 16103  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16104  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16105  	for {
 16106  		t := v.Type
 16107  		_ = v.Args[1]
 16108  		o0 := v.Args[0]
 16109  		if o0.Op != OpPPC64OR {
 16110  			break
 16111  		}
 16112  		if o0.Type != t {
 16113  			break
 16114  		}
 16115  		_ = o0.Args[1]
 16116  		s0 := o0.Args[0]
 16117  		if s0.Op != OpPPC64SLDconst {
 16118  			break
 16119  		}
 16120  		if s0.AuxInt != 48 {
 16121  			break
 16122  		}
 16123  		x0 := s0.Args[0]
 16124  		if x0.Op != OpPPC64MOVHBRload {
 16125  			break
 16126  		}
 16127  		if x0.Type != t {
 16128  			break
 16129  		}
 16130  		_ = x0.Args[1]
 16131  		x0_0 := x0.Args[0]
 16132  		if x0_0.Op != OpPPC64MOVDaddr {
 16133  			break
 16134  		}
 16135  		if x0_0.Type != typ.Uintptr {
 16136  			break
 16137  		}
 16138  		i0 := x0_0.AuxInt
 16139  		s := x0_0.Aux
 16140  		p := x0_0.Args[0]
 16141  		mem := x0.Args[1]
 16142  		s1 := o0.Args[1]
 16143  		if s1.Op != OpPPC64SLDconst {
 16144  			break
 16145  		}
 16146  		if s1.AuxInt != 40 {
 16147  			break
 16148  		}
 16149  		x1 := s1.Args[0]
 16150  		if x1.Op != OpPPC64MOVBZload {
 16151  			break
 16152  		}
 16153  		i2 := x1.AuxInt
 16154  		if x1.Aux != s {
 16155  			break
 16156  		}
 16157  		_ = x1.Args[1]
 16158  		if p != x1.Args[0] {
 16159  			break
 16160  		}
 16161  		if mem != x1.Args[1] {
 16162  			break
 16163  		}
 16164  		s2 := v.Args[1]
 16165  		if s2.Op != OpPPC64SLDconst {
 16166  			break
 16167  		}
 16168  		if s2.AuxInt != 32 {
 16169  			break
 16170  		}
 16171  		x2 := s2.Args[0]
 16172  		if x2.Op != OpPPC64MOVBZload {
 16173  			break
 16174  		}
 16175  		i3 := x2.AuxInt
 16176  		if x2.Aux != s {
 16177  			break
 16178  		}
 16179  		_ = x2.Args[1]
 16180  		if p != x2.Args[0] {
 16181  			break
 16182  		}
 16183  		if mem != x2.Args[1] {
 16184  			break
 16185  		}
 16186  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16187  			break
 16188  		}
 16189  		b = mergePoint(b, x0, x1, x2)
 16190  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16191  		v.reset(OpCopy)
 16192  		v.AddArg(v0)
 16193  		v0.AuxInt = 32
 16194  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16195  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16196  		v2.AuxInt = i0
 16197  		v2.Aux = s
 16198  		v2.AddArg(p)
 16199  		v1.AddArg(v2)
 16200  		v1.AddArg(mem)
 16201  		v0.AddArg(v1)
 16202  		return true
 16203  	}
 16204  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])))
 16205  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16206  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16207  	for {
 16208  		t := v.Type
 16209  		_ = v.Args[1]
 16210  		s2 := v.Args[0]
 16211  		if s2.Op != OpPPC64SLDconst {
 16212  			break
 16213  		}
 16214  		if s2.AuxInt != 56 {
 16215  			break
 16216  		}
 16217  		x2 := s2.Args[0]
 16218  		if x2.Op != OpPPC64MOVBZload {
 16219  			break
 16220  		}
 16221  		i0 := x2.AuxInt
 16222  		s := x2.Aux
 16223  		_ = x2.Args[1]
 16224  		p := x2.Args[0]
 16225  		mem := x2.Args[1]
 16226  		o0 := v.Args[1]
 16227  		if o0.Op != OpPPC64OR {
 16228  			break
 16229  		}
 16230  		if o0.Type != t {
 16231  			break
 16232  		}
 16233  		_ = o0.Args[1]
 16234  		s1 := o0.Args[0]
 16235  		if s1.Op != OpPPC64SLDconst {
 16236  			break
 16237  		}
 16238  		if s1.AuxInt != 48 {
 16239  			break
 16240  		}
 16241  		x1 := s1.Args[0]
 16242  		if x1.Op != OpPPC64MOVBZload {
 16243  			break
 16244  		}
 16245  		i1 := x1.AuxInt
 16246  		if x1.Aux != s {
 16247  			break
 16248  		}
 16249  		_ = x1.Args[1]
 16250  		if p != x1.Args[0] {
 16251  			break
 16252  		}
 16253  		if mem != x1.Args[1] {
 16254  			break
 16255  		}
 16256  		s0 := o0.Args[1]
 16257  		if s0.Op != OpPPC64SLDconst {
 16258  			break
 16259  		}
 16260  		if s0.AuxInt != 32 {
 16261  			break
 16262  		}
 16263  		x0 := s0.Args[0]
 16264  		if x0.Op != OpPPC64MOVHBRload {
 16265  			break
 16266  		}
 16267  		if x0.Type != t {
 16268  			break
 16269  		}
 16270  		_ = x0.Args[1]
 16271  		x0_0 := x0.Args[0]
 16272  		if x0_0.Op != OpPPC64MOVDaddr {
 16273  			break
 16274  		}
 16275  		if x0_0.Type != typ.Uintptr {
 16276  			break
 16277  		}
 16278  		i2 := x0_0.AuxInt
 16279  		if x0_0.Aux != s {
 16280  			break
 16281  		}
 16282  		if p != x0_0.Args[0] {
 16283  			break
 16284  		}
 16285  		if mem != x0.Args[1] {
 16286  			break
 16287  		}
 16288  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16289  			break
 16290  		}
 16291  		b = mergePoint(b, x0, x1, x2)
 16292  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16293  		v.reset(OpCopy)
 16294  		v.AddArg(v0)
 16295  		v0.AuxInt = 32
 16296  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16297  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16298  		v2.AuxInt = i0
 16299  		v2.Aux = s
 16300  		v2.AddArg(p)
 16301  		v1.AddArg(v2)
 16302  		v1.AddArg(mem)
 16303  		v0.AddArg(v1)
 16304  		return true
 16305  	}
 16306  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 16307  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16308  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16309  	for {
 16310  		t := v.Type
 16311  		_ = v.Args[1]
 16312  		s2 := v.Args[0]
 16313  		if s2.Op != OpPPC64SLDconst {
 16314  			break
 16315  		}
 16316  		if s2.AuxInt != 56 {
 16317  			break
 16318  		}
 16319  		x2 := s2.Args[0]
 16320  		if x2.Op != OpPPC64MOVBZload {
 16321  			break
 16322  		}
 16323  		i0 := x2.AuxInt
 16324  		s := x2.Aux
 16325  		_ = x2.Args[1]
 16326  		p := x2.Args[0]
 16327  		mem := x2.Args[1]
 16328  		o0 := v.Args[1]
 16329  		if o0.Op != OpPPC64OR {
 16330  			break
 16331  		}
 16332  		if o0.Type != t {
 16333  			break
 16334  		}
 16335  		_ = o0.Args[1]
 16336  		s0 := o0.Args[0]
 16337  		if s0.Op != OpPPC64SLDconst {
 16338  			break
 16339  		}
 16340  		if s0.AuxInt != 32 {
 16341  			break
 16342  		}
 16343  		x0 := s0.Args[0]
 16344  		if x0.Op != OpPPC64MOVHBRload {
 16345  			break
 16346  		}
 16347  		if x0.Type != t {
 16348  			break
 16349  		}
 16350  		_ = x0.Args[1]
 16351  		x0_0 := x0.Args[0]
 16352  		if x0_0.Op != OpPPC64MOVDaddr {
 16353  			break
 16354  		}
 16355  		if x0_0.Type != typ.Uintptr {
 16356  			break
 16357  		}
 16358  		i2 := x0_0.AuxInt
 16359  		if x0_0.Aux != s {
 16360  			break
 16361  		}
 16362  		if p != x0_0.Args[0] {
 16363  			break
 16364  		}
 16365  		if mem != x0.Args[1] {
 16366  			break
 16367  		}
 16368  		s1 := o0.Args[1]
 16369  		if s1.Op != OpPPC64SLDconst {
 16370  			break
 16371  		}
 16372  		if s1.AuxInt != 48 {
 16373  			break
 16374  		}
 16375  		x1 := s1.Args[0]
 16376  		if x1.Op != OpPPC64MOVBZload {
 16377  			break
 16378  		}
 16379  		i1 := x1.AuxInt
 16380  		if x1.Aux != s {
 16381  			break
 16382  		}
 16383  		_ = x1.Args[1]
 16384  		if p != x1.Args[0] {
 16385  			break
 16386  		}
 16387  		if mem != x1.Args[1] {
 16388  			break
 16389  		}
 16390  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16391  			break
 16392  		}
 16393  		b = mergePoint(b, x0, x1, x2)
 16394  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16395  		v.reset(OpCopy)
 16396  		v.AddArg(v0)
 16397  		v0.AuxInt = 32
 16398  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16399  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16400  		v2.AuxInt = i0
 16401  		v2.Aux = s
 16402  		v2.AddArg(p)
 16403  		v1.AddArg(v2)
 16404  		v1.AddArg(mem)
 16405  		v0.AddArg(v1)
 16406  		return true
 16407  	}
 16408  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 16409  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16410  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16411  	for {
 16412  		t := v.Type
 16413  		_ = v.Args[1]
 16414  		o0 := v.Args[0]
 16415  		if o0.Op != OpPPC64OR {
 16416  			break
 16417  		}
 16418  		if o0.Type != t {
 16419  			break
 16420  		}
 16421  		_ = o0.Args[1]
 16422  		s1 := o0.Args[0]
 16423  		if s1.Op != OpPPC64SLDconst {
 16424  			break
 16425  		}
 16426  		if s1.AuxInt != 48 {
 16427  			break
 16428  		}
 16429  		x1 := s1.Args[0]
 16430  		if x1.Op != OpPPC64MOVBZload {
 16431  			break
 16432  		}
 16433  		i1 := x1.AuxInt
 16434  		s := x1.Aux
 16435  		_ = x1.Args[1]
 16436  		p := x1.Args[0]
 16437  		mem := x1.Args[1]
 16438  		s0 := o0.Args[1]
 16439  		if s0.Op != OpPPC64SLDconst {
 16440  			break
 16441  		}
 16442  		if s0.AuxInt != 32 {
 16443  			break
 16444  		}
 16445  		x0 := s0.Args[0]
 16446  		if x0.Op != OpPPC64MOVHBRload {
 16447  			break
 16448  		}
 16449  		if x0.Type != t {
 16450  			break
 16451  		}
 16452  		_ = x0.Args[1]
 16453  		x0_0 := x0.Args[0]
 16454  		if x0_0.Op != OpPPC64MOVDaddr {
 16455  			break
 16456  		}
 16457  		if x0_0.Type != typ.Uintptr {
 16458  			break
 16459  		}
 16460  		i2 := x0_0.AuxInt
 16461  		if x0_0.Aux != s {
 16462  			break
 16463  		}
 16464  		if p != x0_0.Args[0] {
 16465  			break
 16466  		}
 16467  		if mem != x0.Args[1] {
 16468  			break
 16469  		}
 16470  		s2 := v.Args[1]
 16471  		if s2.Op != OpPPC64SLDconst {
 16472  			break
 16473  		}
 16474  		if s2.AuxInt != 56 {
 16475  			break
 16476  		}
 16477  		x2 := s2.Args[0]
 16478  		if x2.Op != OpPPC64MOVBZload {
 16479  			break
 16480  		}
 16481  		i0 := x2.AuxInt
 16482  		if x2.Aux != s {
 16483  			break
 16484  		}
 16485  		_ = x2.Args[1]
 16486  		if p != x2.Args[0] {
 16487  			break
 16488  		}
 16489  		if mem != x2.Args[1] {
 16490  			break
 16491  		}
 16492  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16493  			break
 16494  		}
 16495  		b = mergePoint(b, x0, x1, x2)
 16496  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16497  		v.reset(OpCopy)
 16498  		v.AddArg(v0)
 16499  		v0.AuxInt = 32
 16500  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16501  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16502  		v2.AuxInt = i0
 16503  		v2.Aux = s
 16504  		v2.AddArg(p)
 16505  		v1.AddArg(v2)
 16506  		v1.AddArg(mem)
 16507  		v0.AddArg(v1)
 16508  		return true
 16509  	}
 16510  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 16511  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16512  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16513  	for {
 16514  		t := v.Type
 16515  		_ = v.Args[1]
 16516  		o0 := v.Args[0]
 16517  		if o0.Op != OpPPC64OR {
 16518  			break
 16519  		}
 16520  		if o0.Type != t {
 16521  			break
 16522  		}
 16523  		_ = o0.Args[1]
 16524  		s0 := o0.Args[0]
 16525  		if s0.Op != OpPPC64SLDconst {
 16526  			break
 16527  		}
 16528  		if s0.AuxInt != 32 {
 16529  			break
 16530  		}
 16531  		x0 := s0.Args[0]
 16532  		if x0.Op != OpPPC64MOVHBRload {
 16533  			break
 16534  		}
 16535  		if x0.Type != t {
 16536  			break
 16537  		}
 16538  		_ = x0.Args[1]
 16539  		x0_0 := x0.Args[0]
 16540  		if x0_0.Op != OpPPC64MOVDaddr {
 16541  			break
 16542  		}
 16543  		if x0_0.Type != typ.Uintptr {
 16544  			break
 16545  		}
 16546  		i2 := x0_0.AuxInt
 16547  		s := x0_0.Aux
 16548  		p := x0_0.Args[0]
 16549  		mem := x0.Args[1]
 16550  		s1 := o0.Args[1]
 16551  		if s1.Op != OpPPC64SLDconst {
 16552  			break
 16553  		}
 16554  		if s1.AuxInt != 48 {
 16555  			break
 16556  		}
 16557  		x1 := s1.Args[0]
 16558  		if x1.Op != OpPPC64MOVBZload {
 16559  			break
 16560  		}
 16561  		i1 := x1.AuxInt
 16562  		if x1.Aux != s {
 16563  			break
 16564  		}
 16565  		_ = x1.Args[1]
 16566  		if p != x1.Args[0] {
 16567  			break
 16568  		}
 16569  		if mem != x1.Args[1] {
 16570  			break
 16571  		}
 16572  		s2 := v.Args[1]
 16573  		if s2.Op != OpPPC64SLDconst {
 16574  			break
 16575  		}
 16576  		if s2.AuxInt != 56 {
 16577  			break
 16578  		}
 16579  		x2 := s2.Args[0]
 16580  		if x2.Op != OpPPC64MOVBZload {
 16581  			break
 16582  		}
 16583  		i0 := x2.AuxInt
 16584  		if x2.Aux != s {
 16585  			break
 16586  		}
 16587  		_ = x2.Args[1]
 16588  		if p != x2.Args[0] {
 16589  			break
 16590  		}
 16591  		if mem != x2.Args[1] {
 16592  			break
 16593  		}
 16594  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16595  			break
 16596  		}
 16597  		b = mergePoint(b, x0, x1, x2)
 16598  		v0 := b.NewValue0(v.Pos, OpPPC64SLDconst, t)
 16599  		v.reset(OpCopy)
 16600  		v.AddArg(v0)
 16601  		v0.AuxInt = 32
 16602  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWBRload, t)
 16603  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16604  		v2.AuxInt = i0
 16605  		v2.Aux = s
 16606  		v2.AddArg(p)
 16607  		v1.AddArg(v2)
 16608  		v1.AddArg(mem)
 16609  		v0.AddArg(v1)
 16610  		return true
 16611  	}
 16612  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))))
 16613  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16614  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16615  	for {
 16616  		t := v.Type
 16617  		_ = v.Args[1]
 16618  		s6 := v.Args[0]
 16619  		if s6.Op != OpPPC64SLDconst {
 16620  			break
 16621  		}
 16622  		if s6.AuxInt != 56 {
 16623  			break
 16624  		}
 16625  		x7 := s6.Args[0]
 16626  		if x7.Op != OpPPC64MOVBZload {
 16627  			break
 16628  		}
 16629  		i7 := x7.AuxInt
 16630  		s := x7.Aux
 16631  		_ = x7.Args[1]
 16632  		p := x7.Args[0]
 16633  		mem := x7.Args[1]
 16634  		o5 := v.Args[1]
 16635  		if o5.Op != OpPPC64OR {
 16636  			break
 16637  		}
 16638  		if o5.Type != t {
 16639  			break
 16640  		}
 16641  		_ = o5.Args[1]
 16642  		s5 := o5.Args[0]
 16643  		if s5.Op != OpPPC64SLDconst {
 16644  			break
 16645  		}
 16646  		if s5.AuxInt != 48 {
 16647  			break
 16648  		}
 16649  		x6 := s5.Args[0]
 16650  		if x6.Op != OpPPC64MOVBZload {
 16651  			break
 16652  		}
 16653  		i6 := x6.AuxInt
 16654  		if x6.Aux != s {
 16655  			break
 16656  		}
 16657  		_ = x6.Args[1]
 16658  		if p != x6.Args[0] {
 16659  			break
 16660  		}
 16661  		if mem != x6.Args[1] {
 16662  			break
 16663  		}
 16664  		o4 := o5.Args[1]
 16665  		if o4.Op != OpPPC64OR {
 16666  			break
 16667  		}
 16668  		if o4.Type != t {
 16669  			break
 16670  		}
 16671  		_ = o4.Args[1]
 16672  		s4 := o4.Args[0]
 16673  		if s4.Op != OpPPC64SLDconst {
 16674  			break
 16675  		}
 16676  		if s4.AuxInt != 40 {
 16677  			break
 16678  		}
 16679  		x5 := s4.Args[0]
 16680  		if x5.Op != OpPPC64MOVBZload {
 16681  			break
 16682  		}
 16683  		i5 := x5.AuxInt
 16684  		if x5.Aux != s {
 16685  			break
 16686  		}
 16687  		_ = x5.Args[1]
 16688  		if p != x5.Args[0] {
 16689  			break
 16690  		}
 16691  		if mem != x5.Args[1] {
 16692  			break
 16693  		}
 16694  		o3 := o4.Args[1]
 16695  		if o3.Op != OpPPC64OR {
 16696  			break
 16697  		}
 16698  		if o3.Type != t {
 16699  			break
 16700  		}
 16701  		_ = o3.Args[1]
 16702  		s3 := o3.Args[0]
 16703  		if s3.Op != OpPPC64SLDconst {
 16704  			break
 16705  		}
 16706  		if s3.AuxInt != 32 {
 16707  			break
 16708  		}
 16709  		x4 := s3.Args[0]
 16710  		if x4.Op != OpPPC64MOVBZload {
 16711  			break
 16712  		}
 16713  		i4 := x4.AuxInt
 16714  		if x4.Aux != s {
 16715  			break
 16716  		}
 16717  		_ = x4.Args[1]
 16718  		if p != x4.Args[0] {
 16719  			break
 16720  		}
 16721  		if mem != x4.Args[1] {
 16722  			break
 16723  		}
 16724  		x0 := o3.Args[1]
 16725  		if x0.Op != OpPPC64MOVWZload {
 16726  			break
 16727  		}
 16728  		i0 := x0.AuxInt
 16729  		if x0.Aux != s {
 16730  			break
 16731  		}
 16732  		_ = x0.Args[1]
 16733  		if p != x0.Args[0] {
 16734  			break
 16735  		}
 16736  		if mem != x0.Args[1] {
 16737  			break
 16738  		}
 16739  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16740  			break
 16741  		}
 16742  		b = mergePoint(b, x0, x4, x5, x6, x7)
 16743  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16744  		v.reset(OpCopy)
 16745  		v.AddArg(v0)
 16746  		v0.AuxInt = i0
 16747  		v0.Aux = s
 16748  		v0.AddArg(p)
 16749  		v0.AddArg(mem)
 16750  		return true
 16751  	}
 16752  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 16753  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16754  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16755  	for {
 16756  		t := v.Type
 16757  		_ = v.Args[1]
 16758  		s6 := v.Args[0]
 16759  		if s6.Op != OpPPC64SLDconst {
 16760  			break
 16761  		}
 16762  		if s6.AuxInt != 56 {
 16763  			break
 16764  		}
 16765  		x7 := s6.Args[0]
 16766  		if x7.Op != OpPPC64MOVBZload {
 16767  			break
 16768  		}
 16769  		i7 := x7.AuxInt
 16770  		s := x7.Aux
 16771  		_ = x7.Args[1]
 16772  		p := x7.Args[0]
 16773  		mem := x7.Args[1]
 16774  		o5 := v.Args[1]
 16775  		if o5.Op != OpPPC64OR {
 16776  			break
 16777  		}
 16778  		if o5.Type != t {
 16779  			break
 16780  		}
 16781  		_ = o5.Args[1]
 16782  		s5 := o5.Args[0]
 16783  		if s5.Op != OpPPC64SLDconst {
 16784  			break
 16785  		}
 16786  		if s5.AuxInt != 48 {
 16787  			break
 16788  		}
 16789  		x6 := s5.Args[0]
 16790  		if x6.Op != OpPPC64MOVBZload {
 16791  			break
 16792  		}
 16793  		i6 := x6.AuxInt
 16794  		if x6.Aux != s {
 16795  			break
 16796  		}
 16797  		_ = x6.Args[1]
 16798  		if p != x6.Args[0] {
 16799  			break
 16800  		}
 16801  		if mem != x6.Args[1] {
 16802  			break
 16803  		}
 16804  		o4 := o5.Args[1]
 16805  		if o4.Op != OpPPC64OR {
 16806  			break
 16807  		}
 16808  		if o4.Type != t {
 16809  			break
 16810  		}
 16811  		_ = o4.Args[1]
 16812  		s4 := o4.Args[0]
 16813  		if s4.Op != OpPPC64SLDconst {
 16814  			break
 16815  		}
 16816  		if s4.AuxInt != 40 {
 16817  			break
 16818  		}
 16819  		x5 := s4.Args[0]
 16820  		if x5.Op != OpPPC64MOVBZload {
 16821  			break
 16822  		}
 16823  		i5 := x5.AuxInt
 16824  		if x5.Aux != s {
 16825  			break
 16826  		}
 16827  		_ = x5.Args[1]
 16828  		if p != x5.Args[0] {
 16829  			break
 16830  		}
 16831  		if mem != x5.Args[1] {
 16832  			break
 16833  		}
 16834  		o3 := o4.Args[1]
 16835  		if o3.Op != OpPPC64OR {
 16836  			break
 16837  		}
 16838  		if o3.Type != t {
 16839  			break
 16840  		}
 16841  		_ = o3.Args[1]
 16842  		x0 := o3.Args[0]
 16843  		if x0.Op != OpPPC64MOVWZload {
 16844  			break
 16845  		}
 16846  		i0 := x0.AuxInt
 16847  		if x0.Aux != s {
 16848  			break
 16849  		}
 16850  		_ = x0.Args[1]
 16851  		if p != x0.Args[0] {
 16852  			break
 16853  		}
 16854  		if mem != x0.Args[1] {
 16855  			break
 16856  		}
 16857  		s3 := o3.Args[1]
 16858  		if s3.Op != OpPPC64SLDconst {
 16859  			break
 16860  		}
 16861  		if s3.AuxInt != 32 {
 16862  			break
 16863  		}
 16864  		x4 := s3.Args[0]
 16865  		if x4.Op != OpPPC64MOVBZload {
 16866  			break
 16867  		}
 16868  		i4 := x4.AuxInt
 16869  		if x4.Aux != s {
 16870  			break
 16871  		}
 16872  		_ = x4.Args[1]
 16873  		if p != x4.Args[0] {
 16874  			break
 16875  		}
 16876  		if mem != x4.Args[1] {
 16877  			break
 16878  		}
 16879  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16880  			break
 16881  		}
 16882  		b = mergePoint(b, x0, x4, x5, x6, x7)
 16883  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16884  		v.reset(OpCopy)
 16885  		v.AddArg(v0)
 16886  		v0.AuxInt = i0
 16887  		v0.Aux = s
 16888  		v0.AddArg(p)
 16889  		v0.AddArg(mem)
 16890  		return true
 16891  	}
 16892  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16893  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16894  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16895  	for {
 16896  		t := v.Type
 16897  		_ = v.Args[1]
 16898  		s6 := v.Args[0]
 16899  		if s6.Op != OpPPC64SLDconst {
 16900  			break
 16901  		}
 16902  		if s6.AuxInt != 56 {
 16903  			break
 16904  		}
 16905  		x7 := s6.Args[0]
 16906  		if x7.Op != OpPPC64MOVBZload {
 16907  			break
 16908  		}
 16909  		i7 := x7.AuxInt
 16910  		s := x7.Aux
 16911  		_ = x7.Args[1]
 16912  		p := x7.Args[0]
 16913  		mem := x7.Args[1]
 16914  		o5 := v.Args[1]
 16915  		if o5.Op != OpPPC64OR {
 16916  			break
 16917  		}
 16918  		if o5.Type != t {
 16919  			break
 16920  		}
 16921  		_ = o5.Args[1]
 16922  		s5 := o5.Args[0]
 16923  		if s5.Op != OpPPC64SLDconst {
 16924  			break
 16925  		}
 16926  		if s5.AuxInt != 48 {
 16927  			break
 16928  		}
 16929  		x6 := s5.Args[0]
 16930  		if x6.Op != OpPPC64MOVBZload {
 16931  			break
 16932  		}
 16933  		i6 := x6.AuxInt
 16934  		if x6.Aux != s {
 16935  			break
 16936  		}
 16937  		_ = x6.Args[1]
 16938  		if p != x6.Args[0] {
 16939  			break
 16940  		}
 16941  		if mem != x6.Args[1] {
 16942  			break
 16943  		}
 16944  		o4 := o5.Args[1]
 16945  		if o4.Op != OpPPC64OR {
 16946  			break
 16947  		}
 16948  		if o4.Type != t {
 16949  			break
 16950  		}
 16951  		_ = o4.Args[1]
 16952  		o3 := o4.Args[0]
 16953  		if o3.Op != OpPPC64OR {
 16954  			break
 16955  		}
 16956  		if o3.Type != t {
 16957  			break
 16958  		}
 16959  		_ = o3.Args[1]
 16960  		s3 := o3.Args[0]
 16961  		if s3.Op != OpPPC64SLDconst {
 16962  			break
 16963  		}
 16964  		if s3.AuxInt != 32 {
 16965  			break
 16966  		}
 16967  		x4 := s3.Args[0]
 16968  		if x4.Op != OpPPC64MOVBZload {
 16969  			break
 16970  		}
 16971  		i4 := x4.AuxInt
 16972  		if x4.Aux != s {
 16973  			break
 16974  		}
 16975  		_ = x4.Args[1]
 16976  		if p != x4.Args[0] {
 16977  			break
 16978  		}
 16979  		if mem != x4.Args[1] {
 16980  			break
 16981  		}
 16982  		x0 := o3.Args[1]
 16983  		if x0.Op != OpPPC64MOVWZload {
 16984  			break
 16985  		}
 16986  		i0 := x0.AuxInt
 16987  		if x0.Aux != s {
 16988  			break
 16989  		}
 16990  		_ = x0.Args[1]
 16991  		if p != x0.Args[0] {
 16992  			break
 16993  		}
 16994  		if mem != x0.Args[1] {
 16995  			break
 16996  		}
 16997  		s4 := o4.Args[1]
 16998  		if s4.Op != OpPPC64SLDconst {
 16999  			break
 17000  		}
 17001  		if s4.AuxInt != 40 {
 17002  			break
 17003  		}
 17004  		x5 := s4.Args[0]
 17005  		if x5.Op != OpPPC64MOVBZload {
 17006  			break
 17007  		}
 17008  		i5 := x5.AuxInt
 17009  		if x5.Aux != s {
 17010  			break
 17011  		}
 17012  		_ = x5.Args[1]
 17013  		if p != x5.Args[0] {
 17014  			break
 17015  		}
 17016  		if mem != x5.Args[1] {
 17017  			break
 17018  		}
 17019  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17020  			break
 17021  		}
 17022  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17023  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17024  		v.reset(OpCopy)
 17025  		v.AddArg(v0)
 17026  		v0.AuxInt = i0
 17027  		v0.Aux = s
 17028  		v0.AddArg(p)
 17029  		v0.AddArg(mem)
 17030  		return true
 17031  	}
 17032  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 17033  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17034  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17035  	for {
 17036  		t := v.Type
 17037  		_ = v.Args[1]
 17038  		s6 := v.Args[0]
 17039  		if s6.Op != OpPPC64SLDconst {
 17040  			break
 17041  		}
 17042  		if s6.AuxInt != 56 {
 17043  			break
 17044  		}
 17045  		x7 := s6.Args[0]
 17046  		if x7.Op != OpPPC64MOVBZload {
 17047  			break
 17048  		}
 17049  		i7 := x7.AuxInt
 17050  		s := x7.Aux
 17051  		_ = x7.Args[1]
 17052  		p := x7.Args[0]
 17053  		mem := x7.Args[1]
 17054  		o5 := v.Args[1]
 17055  		if o5.Op != OpPPC64OR {
 17056  			break
 17057  		}
 17058  		if o5.Type != t {
 17059  			break
 17060  		}
 17061  		_ = o5.Args[1]
 17062  		s5 := o5.Args[0]
 17063  		if s5.Op != OpPPC64SLDconst {
 17064  			break
 17065  		}
 17066  		if s5.AuxInt != 48 {
 17067  			break
 17068  		}
 17069  		x6 := s5.Args[0]
 17070  		if x6.Op != OpPPC64MOVBZload {
 17071  			break
 17072  		}
 17073  		i6 := x6.AuxInt
 17074  		if x6.Aux != s {
 17075  			break
 17076  		}
 17077  		_ = x6.Args[1]
 17078  		if p != x6.Args[0] {
 17079  			break
 17080  		}
 17081  		if mem != x6.Args[1] {
 17082  			break
 17083  		}
 17084  		o4 := o5.Args[1]
 17085  		if o4.Op != OpPPC64OR {
 17086  			break
 17087  		}
 17088  		if o4.Type != t {
 17089  			break
 17090  		}
 17091  		_ = o4.Args[1]
 17092  		o3 := o4.Args[0]
 17093  		if o3.Op != OpPPC64OR {
 17094  			break
 17095  		}
 17096  		if o3.Type != t {
 17097  			break
 17098  		}
 17099  		_ = o3.Args[1]
 17100  		x0 := o3.Args[0]
 17101  		if x0.Op != OpPPC64MOVWZload {
 17102  			break
 17103  		}
 17104  		i0 := x0.AuxInt
 17105  		if x0.Aux != s {
 17106  			break
 17107  		}
 17108  		_ = x0.Args[1]
 17109  		if p != x0.Args[0] {
 17110  			break
 17111  		}
 17112  		if mem != x0.Args[1] {
 17113  			break
 17114  		}
 17115  		s3 := o3.Args[1]
 17116  		if s3.Op != OpPPC64SLDconst {
 17117  			break
 17118  		}
 17119  		if s3.AuxInt != 32 {
 17120  			break
 17121  		}
 17122  		x4 := s3.Args[0]
 17123  		if x4.Op != OpPPC64MOVBZload {
 17124  			break
 17125  		}
 17126  		i4 := x4.AuxInt
 17127  		if x4.Aux != s {
 17128  			break
 17129  		}
 17130  		_ = x4.Args[1]
 17131  		if p != x4.Args[0] {
 17132  			break
 17133  		}
 17134  		if mem != x4.Args[1] {
 17135  			break
 17136  		}
 17137  		s4 := o4.Args[1]
 17138  		if s4.Op != OpPPC64SLDconst {
 17139  			break
 17140  		}
 17141  		if s4.AuxInt != 40 {
 17142  			break
 17143  		}
 17144  		x5 := s4.Args[0]
 17145  		if x5.Op != OpPPC64MOVBZload {
 17146  			break
 17147  		}
 17148  		i5 := x5.AuxInt
 17149  		if x5.Aux != s {
 17150  			break
 17151  		}
 17152  		_ = x5.Args[1]
 17153  		if p != x5.Args[0] {
 17154  			break
 17155  		}
 17156  		if mem != x5.Args[1] {
 17157  			break
 17158  		}
 17159  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17160  			break
 17161  		}
 17162  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17163  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17164  		v.reset(OpCopy)
 17165  		v.AddArg(v0)
 17166  		v0.AuxInt = i0
 17167  		v0.Aux = s
 17168  		v0.AddArg(p)
 17169  		v0.AddArg(mem)
 17170  		return true
 17171  	}
 17172  	return false
 17173  }
 17174  func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
 17175  	b := v.Block
 17176  	_ = b
 17177  	config := b.Func.Config
 17178  	_ = config
 17179  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17180  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17181  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17182  	for {
 17183  		t := v.Type
 17184  		_ = v.Args[1]
 17185  		s6 := v.Args[0]
 17186  		if s6.Op != OpPPC64SLDconst {
 17187  			break
 17188  		}
 17189  		if s6.AuxInt != 56 {
 17190  			break
 17191  		}
 17192  		x7 := s6.Args[0]
 17193  		if x7.Op != OpPPC64MOVBZload {
 17194  			break
 17195  		}
 17196  		i7 := x7.AuxInt
 17197  		s := x7.Aux
 17198  		_ = x7.Args[1]
 17199  		p := x7.Args[0]
 17200  		mem := x7.Args[1]
 17201  		o5 := v.Args[1]
 17202  		if o5.Op != OpPPC64OR {
 17203  			break
 17204  		}
 17205  		if o5.Type != t {
 17206  			break
 17207  		}
 17208  		_ = o5.Args[1]
 17209  		o4 := o5.Args[0]
 17210  		if o4.Op != OpPPC64OR {
 17211  			break
 17212  		}
 17213  		if o4.Type != t {
 17214  			break
 17215  		}
 17216  		_ = o4.Args[1]
 17217  		s4 := o4.Args[0]
 17218  		if s4.Op != OpPPC64SLDconst {
 17219  			break
 17220  		}
 17221  		if s4.AuxInt != 40 {
 17222  			break
 17223  		}
 17224  		x5 := s4.Args[0]
 17225  		if x5.Op != OpPPC64MOVBZload {
 17226  			break
 17227  		}
 17228  		i5 := x5.AuxInt
 17229  		if x5.Aux != s {
 17230  			break
 17231  		}
 17232  		_ = x5.Args[1]
 17233  		if p != x5.Args[0] {
 17234  			break
 17235  		}
 17236  		if mem != x5.Args[1] {
 17237  			break
 17238  		}
 17239  		o3 := o4.Args[1]
 17240  		if o3.Op != OpPPC64OR {
 17241  			break
 17242  		}
 17243  		if o3.Type != t {
 17244  			break
 17245  		}
 17246  		_ = o3.Args[1]
 17247  		s3 := o3.Args[0]
 17248  		if s3.Op != OpPPC64SLDconst {
 17249  			break
 17250  		}
 17251  		if s3.AuxInt != 32 {
 17252  			break
 17253  		}
 17254  		x4 := s3.Args[0]
 17255  		if x4.Op != OpPPC64MOVBZload {
 17256  			break
 17257  		}
 17258  		i4 := x4.AuxInt
 17259  		if x4.Aux != s {
 17260  			break
 17261  		}
 17262  		_ = x4.Args[1]
 17263  		if p != x4.Args[0] {
 17264  			break
 17265  		}
 17266  		if mem != x4.Args[1] {
 17267  			break
 17268  		}
 17269  		x0 := o3.Args[1]
 17270  		if x0.Op != OpPPC64MOVWZload {
 17271  			break
 17272  		}
 17273  		i0 := x0.AuxInt
 17274  		if x0.Aux != s {
 17275  			break
 17276  		}
 17277  		_ = x0.Args[1]
 17278  		if p != x0.Args[0] {
 17279  			break
 17280  		}
 17281  		if mem != x0.Args[1] {
 17282  			break
 17283  		}
 17284  		s5 := o5.Args[1]
 17285  		if s5.Op != OpPPC64SLDconst {
 17286  			break
 17287  		}
 17288  		if s5.AuxInt != 48 {
 17289  			break
 17290  		}
 17291  		x6 := s5.Args[0]
 17292  		if x6.Op != OpPPC64MOVBZload {
 17293  			break
 17294  		}
 17295  		i6 := x6.AuxInt
 17296  		if x6.Aux != s {
 17297  			break
 17298  		}
 17299  		_ = x6.Args[1]
 17300  		if p != x6.Args[0] {
 17301  			break
 17302  		}
 17303  		if mem != x6.Args[1] {
 17304  			break
 17305  		}
 17306  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17307  			break
 17308  		}
 17309  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17310  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17311  		v.reset(OpCopy)
 17312  		v.AddArg(v0)
 17313  		v0.AuxInt = i0
 17314  		v0.Aux = s
 17315  		v0.AddArg(p)
 17316  		v0.AddArg(mem)
 17317  		return true
 17318  	}
 17319  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17320  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17321  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17322  	for {
 17323  		t := v.Type
 17324  		_ = v.Args[1]
 17325  		s6 := v.Args[0]
 17326  		if s6.Op != OpPPC64SLDconst {
 17327  			break
 17328  		}
 17329  		if s6.AuxInt != 56 {
 17330  			break
 17331  		}
 17332  		x7 := s6.Args[0]
 17333  		if x7.Op != OpPPC64MOVBZload {
 17334  			break
 17335  		}
 17336  		i7 := x7.AuxInt
 17337  		s := x7.Aux
 17338  		_ = x7.Args[1]
 17339  		p := x7.Args[0]
 17340  		mem := x7.Args[1]
 17341  		o5 := v.Args[1]
 17342  		if o5.Op != OpPPC64OR {
 17343  			break
 17344  		}
 17345  		if o5.Type != t {
 17346  			break
 17347  		}
 17348  		_ = o5.Args[1]
 17349  		o4 := o5.Args[0]
 17350  		if o4.Op != OpPPC64OR {
 17351  			break
 17352  		}
 17353  		if o4.Type != t {
 17354  			break
 17355  		}
 17356  		_ = o4.Args[1]
 17357  		s4 := o4.Args[0]
 17358  		if s4.Op != OpPPC64SLDconst {
 17359  			break
 17360  		}
 17361  		if s4.AuxInt != 40 {
 17362  			break
 17363  		}
 17364  		x5 := s4.Args[0]
 17365  		if x5.Op != OpPPC64MOVBZload {
 17366  			break
 17367  		}
 17368  		i5 := x5.AuxInt
 17369  		if x5.Aux != s {
 17370  			break
 17371  		}
 17372  		_ = x5.Args[1]
 17373  		if p != x5.Args[0] {
 17374  			break
 17375  		}
 17376  		if mem != x5.Args[1] {
 17377  			break
 17378  		}
 17379  		o3 := o4.Args[1]
 17380  		if o3.Op != OpPPC64OR {
 17381  			break
 17382  		}
 17383  		if o3.Type != t {
 17384  			break
 17385  		}
 17386  		_ = o3.Args[1]
 17387  		x0 := o3.Args[0]
 17388  		if x0.Op != OpPPC64MOVWZload {
 17389  			break
 17390  		}
 17391  		i0 := x0.AuxInt
 17392  		if x0.Aux != s {
 17393  			break
 17394  		}
 17395  		_ = x0.Args[1]
 17396  		if p != x0.Args[0] {
 17397  			break
 17398  		}
 17399  		if mem != x0.Args[1] {
 17400  			break
 17401  		}
 17402  		s3 := o3.Args[1]
 17403  		if s3.Op != OpPPC64SLDconst {
 17404  			break
 17405  		}
 17406  		if s3.AuxInt != 32 {
 17407  			break
 17408  		}
 17409  		x4 := s3.Args[0]
 17410  		if x4.Op != OpPPC64MOVBZload {
 17411  			break
 17412  		}
 17413  		i4 := x4.AuxInt
 17414  		if x4.Aux != s {
 17415  			break
 17416  		}
 17417  		_ = x4.Args[1]
 17418  		if p != x4.Args[0] {
 17419  			break
 17420  		}
 17421  		if mem != x4.Args[1] {
 17422  			break
 17423  		}
 17424  		s5 := o5.Args[1]
 17425  		if s5.Op != OpPPC64SLDconst {
 17426  			break
 17427  		}
 17428  		if s5.AuxInt != 48 {
 17429  			break
 17430  		}
 17431  		x6 := s5.Args[0]
 17432  		if x6.Op != OpPPC64MOVBZload {
 17433  			break
 17434  		}
 17435  		i6 := x6.AuxInt
 17436  		if x6.Aux != s {
 17437  			break
 17438  		}
 17439  		_ = x6.Args[1]
 17440  		if p != x6.Args[0] {
 17441  			break
 17442  		}
 17443  		if mem != x6.Args[1] {
 17444  			break
 17445  		}
 17446  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17447  			break
 17448  		}
 17449  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17450  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17451  		v.reset(OpCopy)
 17452  		v.AddArg(v0)
 17453  		v0.AuxInt = i0
 17454  		v0.Aux = s
 17455  		v0.AddArg(p)
 17456  		v0.AddArg(mem)
 17457  		return true
 17458  	}
 17459  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17460  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17461  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17462  	for {
 17463  		t := v.Type
 17464  		_ = v.Args[1]
 17465  		s6 := v.Args[0]
 17466  		if s6.Op != OpPPC64SLDconst {
 17467  			break
 17468  		}
 17469  		if s6.AuxInt != 56 {
 17470  			break
 17471  		}
 17472  		x7 := s6.Args[0]
 17473  		if x7.Op != OpPPC64MOVBZload {
 17474  			break
 17475  		}
 17476  		i7 := x7.AuxInt
 17477  		s := x7.Aux
 17478  		_ = x7.Args[1]
 17479  		p := x7.Args[0]
 17480  		mem := x7.Args[1]
 17481  		o5 := v.Args[1]
 17482  		if o5.Op != OpPPC64OR {
 17483  			break
 17484  		}
 17485  		if o5.Type != t {
 17486  			break
 17487  		}
 17488  		_ = o5.Args[1]
 17489  		o4 := o5.Args[0]
 17490  		if o4.Op != OpPPC64OR {
 17491  			break
 17492  		}
 17493  		if o4.Type != t {
 17494  			break
 17495  		}
 17496  		_ = o4.Args[1]
 17497  		o3 := o4.Args[0]
 17498  		if o3.Op != OpPPC64OR {
 17499  			break
 17500  		}
 17501  		if o3.Type != t {
 17502  			break
 17503  		}
 17504  		_ = o3.Args[1]
 17505  		s3 := o3.Args[0]
 17506  		if s3.Op != OpPPC64SLDconst {
 17507  			break
 17508  		}
 17509  		if s3.AuxInt != 32 {
 17510  			break
 17511  		}
 17512  		x4 := s3.Args[0]
 17513  		if x4.Op != OpPPC64MOVBZload {
 17514  			break
 17515  		}
 17516  		i4 := x4.AuxInt
 17517  		if x4.Aux != s {
 17518  			break
 17519  		}
 17520  		_ = x4.Args[1]
 17521  		if p != x4.Args[0] {
 17522  			break
 17523  		}
 17524  		if mem != x4.Args[1] {
 17525  			break
 17526  		}
 17527  		x0 := o3.Args[1]
 17528  		if x0.Op != OpPPC64MOVWZload {
 17529  			break
 17530  		}
 17531  		i0 := x0.AuxInt
 17532  		if x0.Aux != s {
 17533  			break
 17534  		}
 17535  		_ = x0.Args[1]
 17536  		if p != x0.Args[0] {
 17537  			break
 17538  		}
 17539  		if mem != x0.Args[1] {
 17540  			break
 17541  		}
 17542  		s4 := o4.Args[1]
 17543  		if s4.Op != OpPPC64SLDconst {
 17544  			break
 17545  		}
 17546  		if s4.AuxInt != 40 {
 17547  			break
 17548  		}
 17549  		x5 := s4.Args[0]
 17550  		if x5.Op != OpPPC64MOVBZload {
 17551  			break
 17552  		}
 17553  		i5 := x5.AuxInt
 17554  		if x5.Aux != s {
 17555  			break
 17556  		}
 17557  		_ = x5.Args[1]
 17558  		if p != x5.Args[0] {
 17559  			break
 17560  		}
 17561  		if mem != x5.Args[1] {
 17562  			break
 17563  		}
 17564  		s5 := o5.Args[1]
 17565  		if s5.Op != OpPPC64SLDconst {
 17566  			break
 17567  		}
 17568  		if s5.AuxInt != 48 {
 17569  			break
 17570  		}
 17571  		x6 := s5.Args[0]
 17572  		if x6.Op != OpPPC64MOVBZload {
 17573  			break
 17574  		}
 17575  		i6 := x6.AuxInt
 17576  		if x6.Aux != s {
 17577  			break
 17578  		}
 17579  		_ = x6.Args[1]
 17580  		if p != x6.Args[0] {
 17581  			break
 17582  		}
 17583  		if mem != x6.Args[1] {
 17584  			break
 17585  		}
 17586  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17587  			break
 17588  		}
 17589  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17590  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17591  		v.reset(OpCopy)
 17592  		v.AddArg(v0)
 17593  		v0.AuxInt = i0
 17594  		v0.Aux = s
 17595  		v0.AddArg(p)
 17596  		v0.AddArg(mem)
 17597  		return true
 17598  	}
 17599  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17600  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17601  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17602  	for {
 17603  		t := v.Type
 17604  		_ = v.Args[1]
 17605  		s6 := v.Args[0]
 17606  		if s6.Op != OpPPC64SLDconst {
 17607  			break
 17608  		}
 17609  		if s6.AuxInt != 56 {
 17610  			break
 17611  		}
 17612  		x7 := s6.Args[0]
 17613  		if x7.Op != OpPPC64MOVBZload {
 17614  			break
 17615  		}
 17616  		i7 := x7.AuxInt
 17617  		s := x7.Aux
 17618  		_ = x7.Args[1]
 17619  		p := x7.Args[0]
 17620  		mem := x7.Args[1]
 17621  		o5 := v.Args[1]
 17622  		if o5.Op != OpPPC64OR {
 17623  			break
 17624  		}
 17625  		if o5.Type != t {
 17626  			break
 17627  		}
 17628  		_ = o5.Args[1]
 17629  		o4 := o5.Args[0]
 17630  		if o4.Op != OpPPC64OR {
 17631  			break
 17632  		}
 17633  		if o4.Type != t {
 17634  			break
 17635  		}
 17636  		_ = o4.Args[1]
 17637  		o3 := o4.Args[0]
 17638  		if o3.Op != OpPPC64OR {
 17639  			break
 17640  		}
 17641  		if o3.Type != t {
 17642  			break
 17643  		}
 17644  		_ = o3.Args[1]
 17645  		x0 := o3.Args[0]
 17646  		if x0.Op != OpPPC64MOVWZload {
 17647  			break
 17648  		}
 17649  		i0 := x0.AuxInt
 17650  		if x0.Aux != s {
 17651  			break
 17652  		}
 17653  		_ = x0.Args[1]
 17654  		if p != x0.Args[0] {
 17655  			break
 17656  		}
 17657  		if mem != x0.Args[1] {
 17658  			break
 17659  		}
 17660  		s3 := o3.Args[1]
 17661  		if s3.Op != OpPPC64SLDconst {
 17662  			break
 17663  		}
 17664  		if s3.AuxInt != 32 {
 17665  			break
 17666  		}
 17667  		x4 := s3.Args[0]
 17668  		if x4.Op != OpPPC64MOVBZload {
 17669  			break
 17670  		}
 17671  		i4 := x4.AuxInt
 17672  		if x4.Aux != s {
 17673  			break
 17674  		}
 17675  		_ = x4.Args[1]
 17676  		if p != x4.Args[0] {
 17677  			break
 17678  		}
 17679  		if mem != x4.Args[1] {
 17680  			break
 17681  		}
 17682  		s4 := o4.Args[1]
 17683  		if s4.Op != OpPPC64SLDconst {
 17684  			break
 17685  		}
 17686  		if s4.AuxInt != 40 {
 17687  			break
 17688  		}
 17689  		x5 := s4.Args[0]
 17690  		if x5.Op != OpPPC64MOVBZload {
 17691  			break
 17692  		}
 17693  		i5 := x5.AuxInt
 17694  		if x5.Aux != s {
 17695  			break
 17696  		}
 17697  		_ = x5.Args[1]
 17698  		if p != x5.Args[0] {
 17699  			break
 17700  		}
 17701  		if mem != x5.Args[1] {
 17702  			break
 17703  		}
 17704  		s5 := o5.Args[1]
 17705  		if s5.Op != OpPPC64SLDconst {
 17706  			break
 17707  		}
 17708  		if s5.AuxInt != 48 {
 17709  			break
 17710  		}
 17711  		x6 := s5.Args[0]
 17712  		if x6.Op != OpPPC64MOVBZload {
 17713  			break
 17714  		}
 17715  		i6 := x6.AuxInt
 17716  		if x6.Aux != s {
 17717  			break
 17718  		}
 17719  		_ = x6.Args[1]
 17720  		if p != x6.Args[0] {
 17721  			break
 17722  		}
 17723  		if mem != x6.Args[1] {
 17724  			break
 17725  		}
 17726  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17727  			break
 17728  		}
 17729  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17730  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17731  		v.reset(OpCopy)
 17732  		v.AddArg(v0)
 17733  		v0.AuxInt = i0
 17734  		v0.Aux = s
 17735  		v0.AddArg(p)
 17736  		v0.AddArg(mem)
 17737  		return true
 17738  	}
 17739  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17740  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17741  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17742  	for {
 17743  		t := v.Type
 17744  		_ = v.Args[1]
 17745  		o5 := v.Args[0]
 17746  		if o5.Op != OpPPC64OR {
 17747  			break
 17748  		}
 17749  		if o5.Type != t {
 17750  			break
 17751  		}
 17752  		_ = o5.Args[1]
 17753  		s5 := o5.Args[0]
 17754  		if s5.Op != OpPPC64SLDconst {
 17755  			break
 17756  		}
 17757  		if s5.AuxInt != 48 {
 17758  			break
 17759  		}
 17760  		x6 := s5.Args[0]
 17761  		if x6.Op != OpPPC64MOVBZload {
 17762  			break
 17763  		}
 17764  		i6 := x6.AuxInt
 17765  		s := x6.Aux
 17766  		_ = x6.Args[1]
 17767  		p := x6.Args[0]
 17768  		mem := x6.Args[1]
 17769  		o4 := o5.Args[1]
 17770  		if o4.Op != OpPPC64OR {
 17771  			break
 17772  		}
 17773  		if o4.Type != t {
 17774  			break
 17775  		}
 17776  		_ = o4.Args[1]
 17777  		s4 := o4.Args[0]
 17778  		if s4.Op != OpPPC64SLDconst {
 17779  			break
 17780  		}
 17781  		if s4.AuxInt != 40 {
 17782  			break
 17783  		}
 17784  		x5 := s4.Args[0]
 17785  		if x5.Op != OpPPC64MOVBZload {
 17786  			break
 17787  		}
 17788  		i5 := x5.AuxInt
 17789  		if x5.Aux != s {
 17790  			break
 17791  		}
 17792  		_ = x5.Args[1]
 17793  		if p != x5.Args[0] {
 17794  			break
 17795  		}
 17796  		if mem != x5.Args[1] {
 17797  			break
 17798  		}
 17799  		o3 := o4.Args[1]
 17800  		if o3.Op != OpPPC64OR {
 17801  			break
 17802  		}
 17803  		if o3.Type != t {
 17804  			break
 17805  		}
 17806  		_ = o3.Args[1]
 17807  		s3 := o3.Args[0]
 17808  		if s3.Op != OpPPC64SLDconst {
 17809  			break
 17810  		}
 17811  		if s3.AuxInt != 32 {
 17812  			break
 17813  		}
 17814  		x4 := s3.Args[0]
 17815  		if x4.Op != OpPPC64MOVBZload {
 17816  			break
 17817  		}
 17818  		i4 := x4.AuxInt
 17819  		if x4.Aux != s {
 17820  			break
 17821  		}
 17822  		_ = x4.Args[1]
 17823  		if p != x4.Args[0] {
 17824  			break
 17825  		}
 17826  		if mem != x4.Args[1] {
 17827  			break
 17828  		}
 17829  		x0 := o3.Args[1]
 17830  		if x0.Op != OpPPC64MOVWZload {
 17831  			break
 17832  		}
 17833  		i0 := x0.AuxInt
 17834  		if x0.Aux != s {
 17835  			break
 17836  		}
 17837  		_ = x0.Args[1]
 17838  		if p != x0.Args[0] {
 17839  			break
 17840  		}
 17841  		if mem != x0.Args[1] {
 17842  			break
 17843  		}
 17844  		s6 := v.Args[1]
 17845  		if s6.Op != OpPPC64SLDconst {
 17846  			break
 17847  		}
 17848  		if s6.AuxInt != 56 {
 17849  			break
 17850  		}
 17851  		x7 := s6.Args[0]
 17852  		if x7.Op != OpPPC64MOVBZload {
 17853  			break
 17854  		}
 17855  		i7 := x7.AuxInt
 17856  		if x7.Aux != s {
 17857  			break
 17858  		}
 17859  		_ = x7.Args[1]
 17860  		if p != x7.Args[0] {
 17861  			break
 17862  		}
 17863  		if mem != x7.Args[1] {
 17864  			break
 17865  		}
 17866  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17867  			break
 17868  		}
 17869  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17870  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17871  		v.reset(OpCopy)
 17872  		v.AddArg(v0)
 17873  		v0.AuxInt = i0
 17874  		v0.Aux = s
 17875  		v0.AddArg(p)
 17876  		v0.AddArg(mem)
 17877  		return true
 17878  	}
 17879  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17880  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17881  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17882  	for {
 17883  		t := v.Type
 17884  		_ = v.Args[1]
 17885  		o5 := v.Args[0]
 17886  		if o5.Op != OpPPC64OR {
 17887  			break
 17888  		}
 17889  		if o5.Type != t {
 17890  			break
 17891  		}
 17892  		_ = o5.Args[1]
 17893  		s5 := o5.Args[0]
 17894  		if s5.Op != OpPPC64SLDconst {
 17895  			break
 17896  		}
 17897  		if s5.AuxInt != 48 {
 17898  			break
 17899  		}
 17900  		x6 := s5.Args[0]
 17901  		if x6.Op != OpPPC64MOVBZload {
 17902  			break
 17903  		}
 17904  		i6 := x6.AuxInt
 17905  		s := x6.Aux
 17906  		_ = x6.Args[1]
 17907  		p := x6.Args[0]
 17908  		mem := x6.Args[1]
 17909  		o4 := o5.Args[1]
 17910  		if o4.Op != OpPPC64OR {
 17911  			break
 17912  		}
 17913  		if o4.Type != t {
 17914  			break
 17915  		}
 17916  		_ = o4.Args[1]
 17917  		s4 := o4.Args[0]
 17918  		if s4.Op != OpPPC64SLDconst {
 17919  			break
 17920  		}
 17921  		if s4.AuxInt != 40 {
 17922  			break
 17923  		}
 17924  		x5 := s4.Args[0]
 17925  		if x5.Op != OpPPC64MOVBZload {
 17926  			break
 17927  		}
 17928  		i5 := x5.AuxInt
 17929  		if x5.Aux != s {
 17930  			break
 17931  		}
 17932  		_ = x5.Args[1]
 17933  		if p != x5.Args[0] {
 17934  			break
 17935  		}
 17936  		if mem != x5.Args[1] {
 17937  			break
 17938  		}
 17939  		o3 := o4.Args[1]
 17940  		if o3.Op != OpPPC64OR {
 17941  			break
 17942  		}
 17943  		if o3.Type != t {
 17944  			break
 17945  		}
 17946  		_ = o3.Args[1]
 17947  		x0 := o3.Args[0]
 17948  		if x0.Op != OpPPC64MOVWZload {
 17949  			break
 17950  		}
 17951  		i0 := x0.AuxInt
 17952  		if x0.Aux != s {
 17953  			break
 17954  		}
 17955  		_ = x0.Args[1]
 17956  		if p != x0.Args[0] {
 17957  			break
 17958  		}
 17959  		if mem != x0.Args[1] {
 17960  			break
 17961  		}
 17962  		s3 := o3.Args[1]
 17963  		if s3.Op != OpPPC64SLDconst {
 17964  			break
 17965  		}
 17966  		if s3.AuxInt != 32 {
 17967  			break
 17968  		}
 17969  		x4 := s3.Args[0]
 17970  		if x4.Op != OpPPC64MOVBZload {
 17971  			break
 17972  		}
 17973  		i4 := x4.AuxInt
 17974  		if x4.Aux != s {
 17975  			break
 17976  		}
 17977  		_ = x4.Args[1]
 17978  		if p != x4.Args[0] {
 17979  			break
 17980  		}
 17981  		if mem != x4.Args[1] {
 17982  			break
 17983  		}
 17984  		s6 := v.Args[1]
 17985  		if s6.Op != OpPPC64SLDconst {
 17986  			break
 17987  		}
 17988  		if s6.AuxInt != 56 {
 17989  			break
 17990  		}
 17991  		x7 := s6.Args[0]
 17992  		if x7.Op != OpPPC64MOVBZload {
 17993  			break
 17994  		}
 17995  		i7 := x7.AuxInt
 17996  		if x7.Aux != s {
 17997  			break
 17998  		}
 17999  		_ = x7.Args[1]
 18000  		if p != x7.Args[0] {
 18001  			break
 18002  		}
 18003  		if mem != x7.Args[1] {
 18004  			break
 18005  		}
 18006  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18007  			break
 18008  		}
 18009  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18010  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18011  		v.reset(OpCopy)
 18012  		v.AddArg(v0)
 18013  		v0.AuxInt = i0
 18014  		v0.Aux = s
 18015  		v0.AddArg(p)
 18016  		v0.AddArg(mem)
 18017  		return true
 18018  	}
 18019  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18020  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18021  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18022  	for {
 18023  		t := v.Type
 18024  		_ = v.Args[1]
 18025  		o5 := v.Args[0]
 18026  		if o5.Op != OpPPC64OR {
 18027  			break
 18028  		}
 18029  		if o5.Type != t {
 18030  			break
 18031  		}
 18032  		_ = o5.Args[1]
 18033  		s5 := o5.Args[0]
 18034  		if s5.Op != OpPPC64SLDconst {
 18035  			break
 18036  		}
 18037  		if s5.AuxInt != 48 {
 18038  			break
 18039  		}
 18040  		x6 := s5.Args[0]
 18041  		if x6.Op != OpPPC64MOVBZload {
 18042  			break
 18043  		}
 18044  		i6 := x6.AuxInt
 18045  		s := x6.Aux
 18046  		_ = x6.Args[1]
 18047  		p := x6.Args[0]
 18048  		mem := x6.Args[1]
 18049  		o4 := o5.Args[1]
 18050  		if o4.Op != OpPPC64OR {
 18051  			break
 18052  		}
 18053  		if o4.Type != t {
 18054  			break
 18055  		}
 18056  		_ = o4.Args[1]
 18057  		o3 := o4.Args[0]
 18058  		if o3.Op != OpPPC64OR {
 18059  			break
 18060  		}
 18061  		if o3.Type != t {
 18062  			break
 18063  		}
 18064  		_ = o3.Args[1]
 18065  		s3 := o3.Args[0]
 18066  		if s3.Op != OpPPC64SLDconst {
 18067  			break
 18068  		}
 18069  		if s3.AuxInt != 32 {
 18070  			break
 18071  		}
 18072  		x4 := s3.Args[0]
 18073  		if x4.Op != OpPPC64MOVBZload {
 18074  			break
 18075  		}
 18076  		i4 := x4.AuxInt
 18077  		if x4.Aux != s {
 18078  			break
 18079  		}
 18080  		_ = x4.Args[1]
 18081  		if p != x4.Args[0] {
 18082  			break
 18083  		}
 18084  		if mem != x4.Args[1] {
 18085  			break
 18086  		}
 18087  		x0 := o3.Args[1]
 18088  		if x0.Op != OpPPC64MOVWZload {
 18089  			break
 18090  		}
 18091  		i0 := x0.AuxInt
 18092  		if x0.Aux != s {
 18093  			break
 18094  		}
 18095  		_ = x0.Args[1]
 18096  		if p != x0.Args[0] {
 18097  			break
 18098  		}
 18099  		if mem != x0.Args[1] {
 18100  			break
 18101  		}
 18102  		s4 := o4.Args[1]
 18103  		if s4.Op != OpPPC64SLDconst {
 18104  			break
 18105  		}
 18106  		if s4.AuxInt != 40 {
 18107  			break
 18108  		}
 18109  		x5 := s4.Args[0]
 18110  		if x5.Op != OpPPC64MOVBZload {
 18111  			break
 18112  		}
 18113  		i5 := x5.AuxInt
 18114  		if x5.Aux != s {
 18115  			break
 18116  		}
 18117  		_ = x5.Args[1]
 18118  		if p != x5.Args[0] {
 18119  			break
 18120  		}
 18121  		if mem != x5.Args[1] {
 18122  			break
 18123  		}
 18124  		s6 := v.Args[1]
 18125  		if s6.Op != OpPPC64SLDconst {
 18126  			break
 18127  		}
 18128  		if s6.AuxInt != 56 {
 18129  			break
 18130  		}
 18131  		x7 := s6.Args[0]
 18132  		if x7.Op != OpPPC64MOVBZload {
 18133  			break
 18134  		}
 18135  		i7 := x7.AuxInt
 18136  		if x7.Aux != s {
 18137  			break
 18138  		}
 18139  		_ = x7.Args[1]
 18140  		if p != x7.Args[0] {
 18141  			break
 18142  		}
 18143  		if mem != x7.Args[1] {
 18144  			break
 18145  		}
 18146  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18147  			break
 18148  		}
 18149  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18150  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18151  		v.reset(OpCopy)
 18152  		v.AddArg(v0)
 18153  		v0.AuxInt = i0
 18154  		v0.Aux = s
 18155  		v0.AddArg(p)
 18156  		v0.AddArg(mem)
 18157  		return true
 18158  	}
 18159  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18160  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18161  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18162  	for {
 18163  		t := v.Type
 18164  		_ = v.Args[1]
 18165  		o5 := v.Args[0]
 18166  		if o5.Op != OpPPC64OR {
 18167  			break
 18168  		}
 18169  		if o5.Type != t {
 18170  			break
 18171  		}
 18172  		_ = o5.Args[1]
 18173  		s5 := o5.Args[0]
 18174  		if s5.Op != OpPPC64SLDconst {
 18175  			break
 18176  		}
 18177  		if s5.AuxInt != 48 {
 18178  			break
 18179  		}
 18180  		x6 := s5.Args[0]
 18181  		if x6.Op != OpPPC64MOVBZload {
 18182  			break
 18183  		}
 18184  		i6 := x6.AuxInt
 18185  		s := x6.Aux
 18186  		_ = x6.Args[1]
 18187  		p := x6.Args[0]
 18188  		mem := x6.Args[1]
 18189  		o4 := o5.Args[1]
 18190  		if o4.Op != OpPPC64OR {
 18191  			break
 18192  		}
 18193  		if o4.Type != t {
 18194  			break
 18195  		}
 18196  		_ = o4.Args[1]
 18197  		o3 := o4.Args[0]
 18198  		if o3.Op != OpPPC64OR {
 18199  			break
 18200  		}
 18201  		if o3.Type != t {
 18202  			break
 18203  		}
 18204  		_ = o3.Args[1]
 18205  		x0 := o3.Args[0]
 18206  		if x0.Op != OpPPC64MOVWZload {
 18207  			break
 18208  		}
 18209  		i0 := x0.AuxInt
 18210  		if x0.Aux != s {
 18211  			break
 18212  		}
 18213  		_ = x0.Args[1]
 18214  		if p != x0.Args[0] {
 18215  			break
 18216  		}
 18217  		if mem != x0.Args[1] {
 18218  			break
 18219  		}
 18220  		s3 := o3.Args[1]
 18221  		if s3.Op != OpPPC64SLDconst {
 18222  			break
 18223  		}
 18224  		if s3.AuxInt != 32 {
 18225  			break
 18226  		}
 18227  		x4 := s3.Args[0]
 18228  		if x4.Op != OpPPC64MOVBZload {
 18229  			break
 18230  		}
 18231  		i4 := x4.AuxInt
 18232  		if x4.Aux != s {
 18233  			break
 18234  		}
 18235  		_ = x4.Args[1]
 18236  		if p != x4.Args[0] {
 18237  			break
 18238  		}
 18239  		if mem != x4.Args[1] {
 18240  			break
 18241  		}
 18242  		s4 := o4.Args[1]
 18243  		if s4.Op != OpPPC64SLDconst {
 18244  			break
 18245  		}
 18246  		if s4.AuxInt != 40 {
 18247  			break
 18248  		}
 18249  		x5 := s4.Args[0]
 18250  		if x5.Op != OpPPC64MOVBZload {
 18251  			break
 18252  		}
 18253  		i5 := x5.AuxInt
 18254  		if x5.Aux != s {
 18255  			break
 18256  		}
 18257  		_ = x5.Args[1]
 18258  		if p != x5.Args[0] {
 18259  			break
 18260  		}
 18261  		if mem != x5.Args[1] {
 18262  			break
 18263  		}
 18264  		s6 := v.Args[1]
 18265  		if s6.Op != OpPPC64SLDconst {
 18266  			break
 18267  		}
 18268  		if s6.AuxInt != 56 {
 18269  			break
 18270  		}
 18271  		x7 := s6.Args[0]
 18272  		if x7.Op != OpPPC64MOVBZload {
 18273  			break
 18274  		}
 18275  		i7 := x7.AuxInt
 18276  		if x7.Aux != s {
 18277  			break
 18278  		}
 18279  		_ = x7.Args[1]
 18280  		if p != x7.Args[0] {
 18281  			break
 18282  		}
 18283  		if mem != x7.Args[1] {
 18284  			break
 18285  		}
 18286  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18287  			break
 18288  		}
 18289  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18290  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18291  		v.reset(OpCopy)
 18292  		v.AddArg(v0)
 18293  		v0.AuxInt = i0
 18294  		v0.Aux = s
 18295  		v0.AddArg(p)
 18296  		v0.AddArg(mem)
 18297  		return true
 18298  	}
 18299  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18300  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18301  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18302  	for {
 18303  		t := v.Type
 18304  		_ = v.Args[1]
 18305  		o5 := v.Args[0]
 18306  		if o5.Op != OpPPC64OR {
 18307  			break
 18308  		}
 18309  		if o5.Type != t {
 18310  			break
 18311  		}
 18312  		_ = o5.Args[1]
 18313  		o4 := o5.Args[0]
 18314  		if o4.Op != OpPPC64OR {
 18315  			break
 18316  		}
 18317  		if o4.Type != t {
 18318  			break
 18319  		}
 18320  		_ = o4.Args[1]
 18321  		s4 := o4.Args[0]
 18322  		if s4.Op != OpPPC64SLDconst {
 18323  			break
 18324  		}
 18325  		if s4.AuxInt != 40 {
 18326  			break
 18327  		}
 18328  		x5 := s4.Args[0]
 18329  		if x5.Op != OpPPC64MOVBZload {
 18330  			break
 18331  		}
 18332  		i5 := x5.AuxInt
 18333  		s := x5.Aux
 18334  		_ = x5.Args[1]
 18335  		p := x5.Args[0]
 18336  		mem := x5.Args[1]
 18337  		o3 := o4.Args[1]
 18338  		if o3.Op != OpPPC64OR {
 18339  			break
 18340  		}
 18341  		if o3.Type != t {
 18342  			break
 18343  		}
 18344  		_ = o3.Args[1]
 18345  		s3 := o3.Args[0]
 18346  		if s3.Op != OpPPC64SLDconst {
 18347  			break
 18348  		}
 18349  		if s3.AuxInt != 32 {
 18350  			break
 18351  		}
 18352  		x4 := s3.Args[0]
 18353  		if x4.Op != OpPPC64MOVBZload {
 18354  			break
 18355  		}
 18356  		i4 := x4.AuxInt
 18357  		if x4.Aux != s {
 18358  			break
 18359  		}
 18360  		_ = x4.Args[1]
 18361  		if p != x4.Args[0] {
 18362  			break
 18363  		}
 18364  		if mem != x4.Args[1] {
 18365  			break
 18366  		}
 18367  		x0 := o3.Args[1]
 18368  		if x0.Op != OpPPC64MOVWZload {
 18369  			break
 18370  		}
 18371  		i0 := x0.AuxInt
 18372  		if x0.Aux != s {
 18373  			break
 18374  		}
 18375  		_ = x0.Args[1]
 18376  		if p != x0.Args[0] {
 18377  			break
 18378  		}
 18379  		if mem != x0.Args[1] {
 18380  			break
 18381  		}
 18382  		s5 := o5.Args[1]
 18383  		if s5.Op != OpPPC64SLDconst {
 18384  			break
 18385  		}
 18386  		if s5.AuxInt != 48 {
 18387  			break
 18388  		}
 18389  		x6 := s5.Args[0]
 18390  		if x6.Op != OpPPC64MOVBZload {
 18391  			break
 18392  		}
 18393  		i6 := x6.AuxInt
 18394  		if x6.Aux != s {
 18395  			break
 18396  		}
 18397  		_ = x6.Args[1]
 18398  		if p != x6.Args[0] {
 18399  			break
 18400  		}
 18401  		if mem != x6.Args[1] {
 18402  			break
 18403  		}
 18404  		s6 := v.Args[1]
 18405  		if s6.Op != OpPPC64SLDconst {
 18406  			break
 18407  		}
 18408  		if s6.AuxInt != 56 {
 18409  			break
 18410  		}
 18411  		x7 := s6.Args[0]
 18412  		if x7.Op != OpPPC64MOVBZload {
 18413  			break
 18414  		}
 18415  		i7 := x7.AuxInt
 18416  		if x7.Aux != s {
 18417  			break
 18418  		}
 18419  		_ = x7.Args[1]
 18420  		if p != x7.Args[0] {
 18421  			break
 18422  		}
 18423  		if mem != x7.Args[1] {
 18424  			break
 18425  		}
 18426  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18427  			break
 18428  		}
 18429  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18430  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18431  		v.reset(OpCopy)
 18432  		v.AddArg(v0)
 18433  		v0.AuxInt = i0
 18434  		v0.Aux = s
 18435  		v0.AddArg(p)
 18436  		v0.AddArg(mem)
 18437  		return true
 18438  	}
 18439  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18440  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18441  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18442  	for {
 18443  		t := v.Type
 18444  		_ = v.Args[1]
 18445  		o5 := v.Args[0]
 18446  		if o5.Op != OpPPC64OR {
 18447  			break
 18448  		}
 18449  		if o5.Type != t {
 18450  			break
 18451  		}
 18452  		_ = o5.Args[1]
 18453  		o4 := o5.Args[0]
 18454  		if o4.Op != OpPPC64OR {
 18455  			break
 18456  		}
 18457  		if o4.Type != t {
 18458  			break
 18459  		}
 18460  		_ = o4.Args[1]
 18461  		s4 := o4.Args[0]
 18462  		if s4.Op != OpPPC64SLDconst {
 18463  			break
 18464  		}
 18465  		if s4.AuxInt != 40 {
 18466  			break
 18467  		}
 18468  		x5 := s4.Args[0]
 18469  		if x5.Op != OpPPC64MOVBZload {
 18470  			break
 18471  		}
 18472  		i5 := x5.AuxInt
 18473  		s := x5.Aux
 18474  		_ = x5.Args[1]
 18475  		p := x5.Args[0]
 18476  		mem := x5.Args[1]
 18477  		o3 := o4.Args[1]
 18478  		if o3.Op != OpPPC64OR {
 18479  			break
 18480  		}
 18481  		if o3.Type != t {
 18482  			break
 18483  		}
 18484  		_ = o3.Args[1]
 18485  		x0 := o3.Args[0]
 18486  		if x0.Op != OpPPC64MOVWZload {
 18487  			break
 18488  		}
 18489  		i0 := x0.AuxInt
 18490  		if x0.Aux != s {
 18491  			break
 18492  		}
 18493  		_ = x0.Args[1]
 18494  		if p != x0.Args[0] {
 18495  			break
 18496  		}
 18497  		if mem != x0.Args[1] {
 18498  			break
 18499  		}
 18500  		s3 := o3.Args[1]
 18501  		if s3.Op != OpPPC64SLDconst {
 18502  			break
 18503  		}
 18504  		if s3.AuxInt != 32 {
 18505  			break
 18506  		}
 18507  		x4 := s3.Args[0]
 18508  		if x4.Op != OpPPC64MOVBZload {
 18509  			break
 18510  		}
 18511  		i4 := x4.AuxInt
 18512  		if x4.Aux != s {
 18513  			break
 18514  		}
 18515  		_ = x4.Args[1]
 18516  		if p != x4.Args[0] {
 18517  			break
 18518  		}
 18519  		if mem != x4.Args[1] {
 18520  			break
 18521  		}
 18522  		s5 := o5.Args[1]
 18523  		if s5.Op != OpPPC64SLDconst {
 18524  			break
 18525  		}
 18526  		if s5.AuxInt != 48 {
 18527  			break
 18528  		}
 18529  		x6 := s5.Args[0]
 18530  		if x6.Op != OpPPC64MOVBZload {
 18531  			break
 18532  		}
 18533  		i6 := x6.AuxInt
 18534  		if x6.Aux != s {
 18535  			break
 18536  		}
 18537  		_ = x6.Args[1]
 18538  		if p != x6.Args[0] {
 18539  			break
 18540  		}
 18541  		if mem != x6.Args[1] {
 18542  			break
 18543  		}
 18544  		s6 := v.Args[1]
 18545  		if s6.Op != OpPPC64SLDconst {
 18546  			break
 18547  		}
 18548  		if s6.AuxInt != 56 {
 18549  			break
 18550  		}
 18551  		x7 := s6.Args[0]
 18552  		if x7.Op != OpPPC64MOVBZload {
 18553  			break
 18554  		}
 18555  		i7 := x7.AuxInt
 18556  		if x7.Aux != s {
 18557  			break
 18558  		}
 18559  		_ = x7.Args[1]
 18560  		if p != x7.Args[0] {
 18561  			break
 18562  		}
 18563  		if mem != x7.Args[1] {
 18564  			break
 18565  		}
 18566  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18567  			break
 18568  		}
 18569  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18570  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18571  		v.reset(OpCopy)
 18572  		v.AddArg(v0)
 18573  		v0.AuxInt = i0
 18574  		v0.Aux = s
 18575  		v0.AddArg(p)
 18576  		v0.AddArg(mem)
 18577  		return true
 18578  	}
 18579  	return false
 18580  }
 18581  func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
 18582  	b := v.Block
 18583  	_ = b
 18584  	config := b.Func.Config
 18585  	_ = config
 18586  	typ := &b.Func.Config.Types
 18587  	_ = typ
 18588  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18589  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18590  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18591  	for {
 18592  		t := v.Type
 18593  		_ = v.Args[1]
 18594  		o5 := v.Args[0]
 18595  		if o5.Op != OpPPC64OR {
 18596  			break
 18597  		}
 18598  		if o5.Type != t {
 18599  			break
 18600  		}
 18601  		_ = o5.Args[1]
 18602  		o4 := o5.Args[0]
 18603  		if o4.Op != OpPPC64OR {
 18604  			break
 18605  		}
 18606  		if o4.Type != t {
 18607  			break
 18608  		}
 18609  		_ = o4.Args[1]
 18610  		o3 := o4.Args[0]
 18611  		if o3.Op != OpPPC64OR {
 18612  			break
 18613  		}
 18614  		if o3.Type != t {
 18615  			break
 18616  		}
 18617  		_ = o3.Args[1]
 18618  		s3 := o3.Args[0]
 18619  		if s3.Op != OpPPC64SLDconst {
 18620  			break
 18621  		}
 18622  		if s3.AuxInt != 32 {
 18623  			break
 18624  		}
 18625  		x4 := s3.Args[0]
 18626  		if x4.Op != OpPPC64MOVBZload {
 18627  			break
 18628  		}
 18629  		i4 := x4.AuxInt
 18630  		s := x4.Aux
 18631  		_ = x4.Args[1]
 18632  		p := x4.Args[0]
 18633  		mem := x4.Args[1]
 18634  		x0 := o3.Args[1]
 18635  		if x0.Op != OpPPC64MOVWZload {
 18636  			break
 18637  		}
 18638  		i0 := x0.AuxInt
 18639  		if x0.Aux != s {
 18640  			break
 18641  		}
 18642  		_ = x0.Args[1]
 18643  		if p != x0.Args[0] {
 18644  			break
 18645  		}
 18646  		if mem != x0.Args[1] {
 18647  			break
 18648  		}
 18649  		s4 := o4.Args[1]
 18650  		if s4.Op != OpPPC64SLDconst {
 18651  			break
 18652  		}
 18653  		if s4.AuxInt != 40 {
 18654  			break
 18655  		}
 18656  		x5 := s4.Args[0]
 18657  		if x5.Op != OpPPC64MOVBZload {
 18658  			break
 18659  		}
 18660  		i5 := x5.AuxInt
 18661  		if x5.Aux != s {
 18662  			break
 18663  		}
 18664  		_ = x5.Args[1]
 18665  		if p != x5.Args[0] {
 18666  			break
 18667  		}
 18668  		if mem != x5.Args[1] {
 18669  			break
 18670  		}
 18671  		s5 := o5.Args[1]
 18672  		if s5.Op != OpPPC64SLDconst {
 18673  			break
 18674  		}
 18675  		if s5.AuxInt != 48 {
 18676  			break
 18677  		}
 18678  		x6 := s5.Args[0]
 18679  		if x6.Op != OpPPC64MOVBZload {
 18680  			break
 18681  		}
 18682  		i6 := x6.AuxInt
 18683  		if x6.Aux != s {
 18684  			break
 18685  		}
 18686  		_ = x6.Args[1]
 18687  		if p != x6.Args[0] {
 18688  			break
 18689  		}
 18690  		if mem != x6.Args[1] {
 18691  			break
 18692  		}
 18693  		s6 := v.Args[1]
 18694  		if s6.Op != OpPPC64SLDconst {
 18695  			break
 18696  		}
 18697  		if s6.AuxInt != 56 {
 18698  			break
 18699  		}
 18700  		x7 := s6.Args[0]
 18701  		if x7.Op != OpPPC64MOVBZload {
 18702  			break
 18703  		}
 18704  		i7 := x7.AuxInt
 18705  		if x7.Aux != s {
 18706  			break
 18707  		}
 18708  		_ = x7.Args[1]
 18709  		if p != x7.Args[0] {
 18710  			break
 18711  		}
 18712  		if mem != x7.Args[1] {
 18713  			break
 18714  		}
 18715  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18716  			break
 18717  		}
 18718  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18719  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18720  		v.reset(OpCopy)
 18721  		v.AddArg(v0)
 18722  		v0.AuxInt = i0
 18723  		v0.Aux = s
 18724  		v0.AddArg(p)
 18725  		v0.AddArg(mem)
 18726  		return true
 18727  	}
 18728  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18729  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18730  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18731  	for {
 18732  		t := v.Type
 18733  		_ = v.Args[1]
 18734  		o5 := v.Args[0]
 18735  		if o5.Op != OpPPC64OR {
 18736  			break
 18737  		}
 18738  		if o5.Type != t {
 18739  			break
 18740  		}
 18741  		_ = o5.Args[1]
 18742  		o4 := o5.Args[0]
 18743  		if o4.Op != OpPPC64OR {
 18744  			break
 18745  		}
 18746  		if o4.Type != t {
 18747  			break
 18748  		}
 18749  		_ = o4.Args[1]
 18750  		o3 := o4.Args[0]
 18751  		if o3.Op != OpPPC64OR {
 18752  			break
 18753  		}
 18754  		if o3.Type != t {
 18755  			break
 18756  		}
 18757  		_ = o3.Args[1]
 18758  		x0 := o3.Args[0]
 18759  		if x0.Op != OpPPC64MOVWZload {
 18760  			break
 18761  		}
 18762  		i0 := x0.AuxInt
 18763  		s := x0.Aux
 18764  		_ = x0.Args[1]
 18765  		p := x0.Args[0]
 18766  		mem := x0.Args[1]
 18767  		s3 := o3.Args[1]
 18768  		if s3.Op != OpPPC64SLDconst {
 18769  			break
 18770  		}
 18771  		if s3.AuxInt != 32 {
 18772  			break
 18773  		}
 18774  		x4 := s3.Args[0]
 18775  		if x4.Op != OpPPC64MOVBZload {
 18776  			break
 18777  		}
 18778  		i4 := x4.AuxInt
 18779  		if x4.Aux != s {
 18780  			break
 18781  		}
 18782  		_ = x4.Args[1]
 18783  		if p != x4.Args[0] {
 18784  			break
 18785  		}
 18786  		if mem != x4.Args[1] {
 18787  			break
 18788  		}
 18789  		s4 := o4.Args[1]
 18790  		if s4.Op != OpPPC64SLDconst {
 18791  			break
 18792  		}
 18793  		if s4.AuxInt != 40 {
 18794  			break
 18795  		}
 18796  		x5 := s4.Args[0]
 18797  		if x5.Op != OpPPC64MOVBZload {
 18798  			break
 18799  		}
 18800  		i5 := x5.AuxInt
 18801  		if x5.Aux != s {
 18802  			break
 18803  		}
 18804  		_ = x5.Args[1]
 18805  		if p != x5.Args[0] {
 18806  			break
 18807  		}
 18808  		if mem != x5.Args[1] {
 18809  			break
 18810  		}
 18811  		s5 := o5.Args[1]
 18812  		if s5.Op != OpPPC64SLDconst {
 18813  			break
 18814  		}
 18815  		if s5.AuxInt != 48 {
 18816  			break
 18817  		}
 18818  		x6 := s5.Args[0]
 18819  		if x6.Op != OpPPC64MOVBZload {
 18820  			break
 18821  		}
 18822  		i6 := x6.AuxInt
 18823  		if x6.Aux != s {
 18824  			break
 18825  		}
 18826  		_ = x6.Args[1]
 18827  		if p != x6.Args[0] {
 18828  			break
 18829  		}
 18830  		if mem != x6.Args[1] {
 18831  			break
 18832  		}
 18833  		s6 := v.Args[1]
 18834  		if s6.Op != OpPPC64SLDconst {
 18835  			break
 18836  		}
 18837  		if s6.AuxInt != 56 {
 18838  			break
 18839  		}
 18840  		x7 := s6.Args[0]
 18841  		if x7.Op != OpPPC64MOVBZload {
 18842  			break
 18843  		}
 18844  		i7 := x7.AuxInt
 18845  		if x7.Aux != s {
 18846  			break
 18847  		}
 18848  		_ = x7.Args[1]
 18849  		if p != x7.Args[0] {
 18850  			break
 18851  		}
 18852  		if mem != x7.Args[1] {
 18853  			break
 18854  		}
 18855  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18856  			break
 18857  		}
 18858  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18859  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18860  		v.reset(OpCopy)
 18861  		v.AddArg(v0)
 18862  		v0.AuxInt = i0
 18863  		v0.Aux = s
 18864  		v0.AddArg(p)
 18865  		v0.AddArg(mem)
 18866  		return true
 18867  	}
 18868  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))))
 18869  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18870  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18871  	for {
 18872  		t := v.Type
 18873  		_ = v.Args[1]
 18874  		s0 := v.Args[0]
 18875  		if s0.Op != OpPPC64SLDconst {
 18876  			break
 18877  		}
 18878  		if s0.AuxInt != 56 {
 18879  			break
 18880  		}
 18881  		x0 := s0.Args[0]
 18882  		if x0.Op != OpPPC64MOVBZload {
 18883  			break
 18884  		}
 18885  		i0 := x0.AuxInt
 18886  		s := x0.Aux
 18887  		_ = x0.Args[1]
 18888  		p := x0.Args[0]
 18889  		mem := x0.Args[1]
 18890  		o0 := v.Args[1]
 18891  		if o0.Op != OpPPC64OR {
 18892  			break
 18893  		}
 18894  		if o0.Type != t {
 18895  			break
 18896  		}
 18897  		_ = o0.Args[1]
 18898  		s1 := o0.Args[0]
 18899  		if s1.Op != OpPPC64SLDconst {
 18900  			break
 18901  		}
 18902  		if s1.AuxInt != 48 {
 18903  			break
 18904  		}
 18905  		x1 := s1.Args[0]
 18906  		if x1.Op != OpPPC64MOVBZload {
 18907  			break
 18908  		}
 18909  		i1 := x1.AuxInt
 18910  		if x1.Aux != s {
 18911  			break
 18912  		}
 18913  		_ = x1.Args[1]
 18914  		if p != x1.Args[0] {
 18915  			break
 18916  		}
 18917  		if mem != x1.Args[1] {
 18918  			break
 18919  		}
 18920  		o1 := o0.Args[1]
 18921  		if o1.Op != OpPPC64OR {
 18922  			break
 18923  		}
 18924  		if o1.Type != t {
 18925  			break
 18926  		}
 18927  		_ = o1.Args[1]
 18928  		s2 := o1.Args[0]
 18929  		if s2.Op != OpPPC64SLDconst {
 18930  			break
 18931  		}
 18932  		if s2.AuxInt != 40 {
 18933  			break
 18934  		}
 18935  		x2 := s2.Args[0]
 18936  		if x2.Op != OpPPC64MOVBZload {
 18937  			break
 18938  		}
 18939  		i2 := x2.AuxInt
 18940  		if x2.Aux != s {
 18941  			break
 18942  		}
 18943  		_ = x2.Args[1]
 18944  		if p != x2.Args[0] {
 18945  			break
 18946  		}
 18947  		if mem != x2.Args[1] {
 18948  			break
 18949  		}
 18950  		o2 := o1.Args[1]
 18951  		if o2.Op != OpPPC64OR {
 18952  			break
 18953  		}
 18954  		if o2.Type != t {
 18955  			break
 18956  		}
 18957  		_ = o2.Args[1]
 18958  		s3 := o2.Args[0]
 18959  		if s3.Op != OpPPC64SLDconst {
 18960  			break
 18961  		}
 18962  		if s3.AuxInt != 32 {
 18963  			break
 18964  		}
 18965  		x3 := s3.Args[0]
 18966  		if x3.Op != OpPPC64MOVBZload {
 18967  			break
 18968  		}
 18969  		i3 := x3.AuxInt
 18970  		if x3.Aux != s {
 18971  			break
 18972  		}
 18973  		_ = x3.Args[1]
 18974  		if p != x3.Args[0] {
 18975  			break
 18976  		}
 18977  		if mem != x3.Args[1] {
 18978  			break
 18979  		}
 18980  		x4 := o2.Args[1]
 18981  		if x4.Op != OpPPC64MOVWBRload {
 18982  			break
 18983  		}
 18984  		if x4.Type != t {
 18985  			break
 18986  		}
 18987  		_ = x4.Args[1]
 18988  		x4_0 := x4.Args[0]
 18989  		if x4_0.Op != OpPPC64MOVDaddr {
 18990  			break
 18991  		}
 18992  		if x4_0.Type != typ.Uintptr {
 18993  			break
 18994  		}
 18995  		i4 := x4_0.AuxInt
 18996  		if p != x4_0.Args[0] {
 18997  			break
 18998  		}
 18999  		if mem != x4.Args[1] {
 19000  			break
 19001  		}
 19002  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19003  			break
 19004  		}
 19005  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19006  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19007  		v.reset(OpCopy)
 19008  		v.AddArg(v0)
 19009  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19010  		v1.AuxInt = i0
 19011  		v1.Aux = s
 19012  		v1.AddArg(p)
 19013  		v0.AddArg(v1)
 19014  		v0.AddArg(mem)
 19015  		return true
 19016  	}
 19017  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))))
 19018  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19019  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19020  	for {
 19021  		t := v.Type
 19022  		_ = v.Args[1]
 19023  		s0 := v.Args[0]
 19024  		if s0.Op != OpPPC64SLDconst {
 19025  			break
 19026  		}
 19027  		if s0.AuxInt != 56 {
 19028  			break
 19029  		}
 19030  		x0 := s0.Args[0]
 19031  		if x0.Op != OpPPC64MOVBZload {
 19032  			break
 19033  		}
 19034  		i0 := x0.AuxInt
 19035  		s := x0.Aux
 19036  		_ = x0.Args[1]
 19037  		p := x0.Args[0]
 19038  		mem := x0.Args[1]
 19039  		o0 := v.Args[1]
 19040  		if o0.Op != OpPPC64OR {
 19041  			break
 19042  		}
 19043  		if o0.Type != t {
 19044  			break
 19045  		}
 19046  		_ = o0.Args[1]
 19047  		s1 := o0.Args[0]
 19048  		if s1.Op != OpPPC64SLDconst {
 19049  			break
 19050  		}
 19051  		if s1.AuxInt != 48 {
 19052  			break
 19053  		}
 19054  		x1 := s1.Args[0]
 19055  		if x1.Op != OpPPC64MOVBZload {
 19056  			break
 19057  		}
 19058  		i1 := x1.AuxInt
 19059  		if x1.Aux != s {
 19060  			break
 19061  		}
 19062  		_ = x1.Args[1]
 19063  		if p != x1.Args[0] {
 19064  			break
 19065  		}
 19066  		if mem != x1.Args[1] {
 19067  			break
 19068  		}
 19069  		o1 := o0.Args[1]
 19070  		if o1.Op != OpPPC64OR {
 19071  			break
 19072  		}
 19073  		if o1.Type != t {
 19074  			break
 19075  		}
 19076  		_ = o1.Args[1]
 19077  		s2 := o1.Args[0]
 19078  		if s2.Op != OpPPC64SLDconst {
 19079  			break
 19080  		}
 19081  		if s2.AuxInt != 40 {
 19082  			break
 19083  		}
 19084  		x2 := s2.Args[0]
 19085  		if x2.Op != OpPPC64MOVBZload {
 19086  			break
 19087  		}
 19088  		i2 := x2.AuxInt
 19089  		if x2.Aux != s {
 19090  			break
 19091  		}
 19092  		_ = x2.Args[1]
 19093  		if p != x2.Args[0] {
 19094  			break
 19095  		}
 19096  		if mem != x2.Args[1] {
 19097  			break
 19098  		}
 19099  		o2 := o1.Args[1]
 19100  		if o2.Op != OpPPC64OR {
 19101  			break
 19102  		}
 19103  		if o2.Type != t {
 19104  			break
 19105  		}
 19106  		_ = o2.Args[1]
 19107  		x4 := o2.Args[0]
 19108  		if x4.Op != OpPPC64MOVWBRload {
 19109  			break
 19110  		}
 19111  		if x4.Type != t {
 19112  			break
 19113  		}
 19114  		_ = x4.Args[1]
 19115  		x4_0 := x4.Args[0]
 19116  		if x4_0.Op != OpPPC64MOVDaddr {
 19117  			break
 19118  		}
 19119  		if x4_0.Type != typ.Uintptr {
 19120  			break
 19121  		}
 19122  		i4 := x4_0.AuxInt
 19123  		if p != x4_0.Args[0] {
 19124  			break
 19125  		}
 19126  		if mem != x4.Args[1] {
 19127  			break
 19128  		}
 19129  		s3 := o2.Args[1]
 19130  		if s3.Op != OpPPC64SLDconst {
 19131  			break
 19132  		}
 19133  		if s3.AuxInt != 32 {
 19134  			break
 19135  		}
 19136  		x3 := s3.Args[0]
 19137  		if x3.Op != OpPPC64MOVBZload {
 19138  			break
 19139  		}
 19140  		i3 := x3.AuxInt
 19141  		if x3.Aux != s {
 19142  			break
 19143  		}
 19144  		_ = x3.Args[1]
 19145  		if p != x3.Args[0] {
 19146  			break
 19147  		}
 19148  		if mem != x3.Args[1] {
 19149  			break
 19150  		}
 19151  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19152  			break
 19153  		}
 19154  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19155  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19156  		v.reset(OpCopy)
 19157  		v.AddArg(v0)
 19158  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19159  		v1.AuxInt = i0
 19160  		v1.Aux = s
 19161  		v1.AddArg(p)
 19162  		v0.AddArg(v1)
 19163  		v0.AddArg(mem)
 19164  		return true
 19165  	}
 19166  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 19167  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19168  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19169  	for {
 19170  		t := v.Type
 19171  		_ = v.Args[1]
 19172  		s0 := v.Args[0]
 19173  		if s0.Op != OpPPC64SLDconst {
 19174  			break
 19175  		}
 19176  		if s0.AuxInt != 56 {
 19177  			break
 19178  		}
 19179  		x0 := s0.Args[0]
 19180  		if x0.Op != OpPPC64MOVBZload {
 19181  			break
 19182  		}
 19183  		i0 := x0.AuxInt
 19184  		s := x0.Aux
 19185  		_ = x0.Args[1]
 19186  		p := x0.Args[0]
 19187  		mem := x0.Args[1]
 19188  		o0 := v.Args[1]
 19189  		if o0.Op != OpPPC64OR {
 19190  			break
 19191  		}
 19192  		if o0.Type != t {
 19193  			break
 19194  		}
 19195  		_ = o0.Args[1]
 19196  		s1 := o0.Args[0]
 19197  		if s1.Op != OpPPC64SLDconst {
 19198  			break
 19199  		}
 19200  		if s1.AuxInt != 48 {
 19201  			break
 19202  		}
 19203  		x1 := s1.Args[0]
 19204  		if x1.Op != OpPPC64MOVBZload {
 19205  			break
 19206  		}
 19207  		i1 := x1.AuxInt
 19208  		if x1.Aux != s {
 19209  			break
 19210  		}
 19211  		_ = x1.Args[1]
 19212  		if p != x1.Args[0] {
 19213  			break
 19214  		}
 19215  		if mem != x1.Args[1] {
 19216  			break
 19217  		}
 19218  		o1 := o0.Args[1]
 19219  		if o1.Op != OpPPC64OR {
 19220  			break
 19221  		}
 19222  		if o1.Type != t {
 19223  			break
 19224  		}
 19225  		_ = o1.Args[1]
 19226  		o2 := o1.Args[0]
 19227  		if o2.Op != OpPPC64OR {
 19228  			break
 19229  		}
 19230  		if o2.Type != t {
 19231  			break
 19232  		}
 19233  		_ = o2.Args[1]
 19234  		s3 := o2.Args[0]
 19235  		if s3.Op != OpPPC64SLDconst {
 19236  			break
 19237  		}
 19238  		if s3.AuxInt != 32 {
 19239  			break
 19240  		}
 19241  		x3 := s3.Args[0]
 19242  		if x3.Op != OpPPC64MOVBZload {
 19243  			break
 19244  		}
 19245  		i3 := x3.AuxInt
 19246  		if x3.Aux != s {
 19247  			break
 19248  		}
 19249  		_ = x3.Args[1]
 19250  		if p != x3.Args[0] {
 19251  			break
 19252  		}
 19253  		if mem != x3.Args[1] {
 19254  			break
 19255  		}
 19256  		x4 := o2.Args[1]
 19257  		if x4.Op != OpPPC64MOVWBRload {
 19258  			break
 19259  		}
 19260  		if x4.Type != t {
 19261  			break
 19262  		}
 19263  		_ = x4.Args[1]
 19264  		x4_0 := x4.Args[0]
 19265  		if x4_0.Op != OpPPC64MOVDaddr {
 19266  			break
 19267  		}
 19268  		if x4_0.Type != typ.Uintptr {
 19269  			break
 19270  		}
 19271  		i4 := x4_0.AuxInt
 19272  		if p != x4_0.Args[0] {
 19273  			break
 19274  		}
 19275  		if mem != x4.Args[1] {
 19276  			break
 19277  		}
 19278  		s2 := o1.Args[1]
 19279  		if s2.Op != OpPPC64SLDconst {
 19280  			break
 19281  		}
 19282  		if s2.AuxInt != 40 {
 19283  			break
 19284  		}
 19285  		x2 := s2.Args[0]
 19286  		if x2.Op != OpPPC64MOVBZload {
 19287  			break
 19288  		}
 19289  		i2 := x2.AuxInt
 19290  		if x2.Aux != s {
 19291  			break
 19292  		}
 19293  		_ = x2.Args[1]
 19294  		if p != x2.Args[0] {
 19295  			break
 19296  		}
 19297  		if mem != x2.Args[1] {
 19298  			break
 19299  		}
 19300  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19301  			break
 19302  		}
 19303  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19304  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19305  		v.reset(OpCopy)
 19306  		v.AddArg(v0)
 19307  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19308  		v1.AuxInt = i0
 19309  		v1.Aux = s
 19310  		v1.AddArg(p)
 19311  		v0.AddArg(v1)
 19312  		v0.AddArg(mem)
 19313  		return true
 19314  	}
 19315  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 19316  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19317  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19318  	for {
 19319  		t := v.Type
 19320  		_ = v.Args[1]
 19321  		s0 := v.Args[0]
 19322  		if s0.Op != OpPPC64SLDconst {
 19323  			break
 19324  		}
 19325  		if s0.AuxInt != 56 {
 19326  			break
 19327  		}
 19328  		x0 := s0.Args[0]
 19329  		if x0.Op != OpPPC64MOVBZload {
 19330  			break
 19331  		}
 19332  		i0 := x0.AuxInt
 19333  		s := x0.Aux
 19334  		_ = x0.Args[1]
 19335  		p := x0.Args[0]
 19336  		mem := x0.Args[1]
 19337  		o0 := v.Args[1]
 19338  		if o0.Op != OpPPC64OR {
 19339  			break
 19340  		}
 19341  		if o0.Type != t {
 19342  			break
 19343  		}
 19344  		_ = o0.Args[1]
 19345  		s1 := o0.Args[0]
 19346  		if s1.Op != OpPPC64SLDconst {
 19347  			break
 19348  		}
 19349  		if s1.AuxInt != 48 {
 19350  			break
 19351  		}
 19352  		x1 := s1.Args[0]
 19353  		if x1.Op != OpPPC64MOVBZload {
 19354  			break
 19355  		}
 19356  		i1 := x1.AuxInt
 19357  		if x1.Aux != s {
 19358  			break
 19359  		}
 19360  		_ = x1.Args[1]
 19361  		if p != x1.Args[0] {
 19362  			break
 19363  		}
 19364  		if mem != x1.Args[1] {
 19365  			break
 19366  		}
 19367  		o1 := o0.Args[1]
 19368  		if o1.Op != OpPPC64OR {
 19369  			break
 19370  		}
 19371  		if o1.Type != t {
 19372  			break
 19373  		}
 19374  		_ = o1.Args[1]
 19375  		o2 := o1.Args[0]
 19376  		if o2.Op != OpPPC64OR {
 19377  			break
 19378  		}
 19379  		if o2.Type != t {
 19380  			break
 19381  		}
 19382  		_ = o2.Args[1]
 19383  		x4 := o2.Args[0]
 19384  		if x4.Op != OpPPC64MOVWBRload {
 19385  			break
 19386  		}
 19387  		if x4.Type != t {
 19388  			break
 19389  		}
 19390  		_ = x4.Args[1]
 19391  		x4_0 := x4.Args[0]
 19392  		if x4_0.Op != OpPPC64MOVDaddr {
 19393  			break
 19394  		}
 19395  		if x4_0.Type != typ.Uintptr {
 19396  			break
 19397  		}
 19398  		i4 := x4_0.AuxInt
 19399  		if p != x4_0.Args[0] {
 19400  			break
 19401  		}
 19402  		if mem != x4.Args[1] {
 19403  			break
 19404  		}
 19405  		s3 := o2.Args[1]
 19406  		if s3.Op != OpPPC64SLDconst {
 19407  			break
 19408  		}
 19409  		if s3.AuxInt != 32 {
 19410  			break
 19411  		}
 19412  		x3 := s3.Args[0]
 19413  		if x3.Op != OpPPC64MOVBZload {
 19414  			break
 19415  		}
 19416  		i3 := x3.AuxInt
 19417  		if x3.Aux != s {
 19418  			break
 19419  		}
 19420  		_ = x3.Args[1]
 19421  		if p != x3.Args[0] {
 19422  			break
 19423  		}
 19424  		if mem != x3.Args[1] {
 19425  			break
 19426  		}
 19427  		s2 := o1.Args[1]
 19428  		if s2.Op != OpPPC64SLDconst {
 19429  			break
 19430  		}
 19431  		if s2.AuxInt != 40 {
 19432  			break
 19433  		}
 19434  		x2 := s2.Args[0]
 19435  		if x2.Op != OpPPC64MOVBZload {
 19436  			break
 19437  		}
 19438  		i2 := x2.AuxInt
 19439  		if x2.Aux != s {
 19440  			break
 19441  		}
 19442  		_ = x2.Args[1]
 19443  		if p != x2.Args[0] {
 19444  			break
 19445  		}
 19446  		if mem != x2.Args[1] {
 19447  			break
 19448  		}
 19449  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19450  			break
 19451  		}
 19452  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19453  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19454  		v.reset(OpCopy)
 19455  		v.AddArg(v0)
 19456  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19457  		v1.AuxInt = i0
 19458  		v1.Aux = s
 19459  		v1.AddArg(p)
 19460  		v0.AddArg(v1)
 19461  		v0.AddArg(mem)
 19462  		return true
 19463  	}
 19464  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19465  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19466  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19467  	for {
 19468  		t := v.Type
 19469  		_ = v.Args[1]
 19470  		s0 := v.Args[0]
 19471  		if s0.Op != OpPPC64SLDconst {
 19472  			break
 19473  		}
 19474  		if s0.AuxInt != 56 {
 19475  			break
 19476  		}
 19477  		x0 := s0.Args[0]
 19478  		if x0.Op != OpPPC64MOVBZload {
 19479  			break
 19480  		}
 19481  		i0 := x0.AuxInt
 19482  		s := x0.Aux
 19483  		_ = x0.Args[1]
 19484  		p := x0.Args[0]
 19485  		mem := x0.Args[1]
 19486  		o0 := v.Args[1]
 19487  		if o0.Op != OpPPC64OR {
 19488  			break
 19489  		}
 19490  		if o0.Type != t {
 19491  			break
 19492  		}
 19493  		_ = o0.Args[1]
 19494  		o1 := o0.Args[0]
 19495  		if o1.Op != OpPPC64OR {
 19496  			break
 19497  		}
 19498  		if o1.Type != t {
 19499  			break
 19500  		}
 19501  		_ = o1.Args[1]
 19502  		s2 := o1.Args[0]
 19503  		if s2.Op != OpPPC64SLDconst {
 19504  			break
 19505  		}
 19506  		if s2.AuxInt != 40 {
 19507  			break
 19508  		}
 19509  		x2 := s2.Args[0]
 19510  		if x2.Op != OpPPC64MOVBZload {
 19511  			break
 19512  		}
 19513  		i2 := x2.AuxInt
 19514  		if x2.Aux != s {
 19515  			break
 19516  		}
 19517  		_ = x2.Args[1]
 19518  		if p != x2.Args[0] {
 19519  			break
 19520  		}
 19521  		if mem != x2.Args[1] {
 19522  			break
 19523  		}
 19524  		o2 := o1.Args[1]
 19525  		if o2.Op != OpPPC64OR {
 19526  			break
 19527  		}
 19528  		if o2.Type != t {
 19529  			break
 19530  		}
 19531  		_ = o2.Args[1]
 19532  		s3 := o2.Args[0]
 19533  		if s3.Op != OpPPC64SLDconst {
 19534  			break
 19535  		}
 19536  		if s3.AuxInt != 32 {
 19537  			break
 19538  		}
 19539  		x3 := s3.Args[0]
 19540  		if x3.Op != OpPPC64MOVBZload {
 19541  			break
 19542  		}
 19543  		i3 := x3.AuxInt
 19544  		if x3.Aux != s {
 19545  			break
 19546  		}
 19547  		_ = x3.Args[1]
 19548  		if p != x3.Args[0] {
 19549  			break
 19550  		}
 19551  		if mem != x3.Args[1] {
 19552  			break
 19553  		}
 19554  		x4 := o2.Args[1]
 19555  		if x4.Op != OpPPC64MOVWBRload {
 19556  			break
 19557  		}
 19558  		if x4.Type != t {
 19559  			break
 19560  		}
 19561  		_ = x4.Args[1]
 19562  		x4_0 := x4.Args[0]
 19563  		if x4_0.Op != OpPPC64MOVDaddr {
 19564  			break
 19565  		}
 19566  		if x4_0.Type != typ.Uintptr {
 19567  			break
 19568  		}
 19569  		i4 := x4_0.AuxInt
 19570  		if p != x4_0.Args[0] {
 19571  			break
 19572  		}
 19573  		if mem != x4.Args[1] {
 19574  			break
 19575  		}
 19576  		s1 := o0.Args[1]
 19577  		if s1.Op != OpPPC64SLDconst {
 19578  			break
 19579  		}
 19580  		if s1.AuxInt != 48 {
 19581  			break
 19582  		}
 19583  		x1 := s1.Args[0]
 19584  		if x1.Op != OpPPC64MOVBZload {
 19585  			break
 19586  		}
 19587  		i1 := x1.AuxInt
 19588  		if x1.Aux != s {
 19589  			break
 19590  		}
 19591  		_ = x1.Args[1]
 19592  		if p != x1.Args[0] {
 19593  			break
 19594  		}
 19595  		if mem != x1.Args[1] {
 19596  			break
 19597  		}
 19598  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19599  			break
 19600  		}
 19601  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19602  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19603  		v.reset(OpCopy)
 19604  		v.AddArg(v0)
 19605  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19606  		v1.AuxInt = i0
 19607  		v1.Aux = s
 19608  		v1.AddArg(p)
 19609  		v0.AddArg(v1)
 19610  		v0.AddArg(mem)
 19611  		return true
 19612  	}
 19613  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19614  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19615  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19616  	for {
 19617  		t := v.Type
 19618  		_ = v.Args[1]
 19619  		s0 := v.Args[0]
 19620  		if s0.Op != OpPPC64SLDconst {
 19621  			break
 19622  		}
 19623  		if s0.AuxInt != 56 {
 19624  			break
 19625  		}
 19626  		x0 := s0.Args[0]
 19627  		if x0.Op != OpPPC64MOVBZload {
 19628  			break
 19629  		}
 19630  		i0 := x0.AuxInt
 19631  		s := x0.Aux
 19632  		_ = x0.Args[1]
 19633  		p := x0.Args[0]
 19634  		mem := x0.Args[1]
 19635  		o0 := v.Args[1]
 19636  		if o0.Op != OpPPC64OR {
 19637  			break
 19638  		}
 19639  		if o0.Type != t {
 19640  			break
 19641  		}
 19642  		_ = o0.Args[1]
 19643  		o1 := o0.Args[0]
 19644  		if o1.Op != OpPPC64OR {
 19645  			break
 19646  		}
 19647  		if o1.Type != t {
 19648  			break
 19649  		}
 19650  		_ = o1.Args[1]
 19651  		s2 := o1.Args[0]
 19652  		if s2.Op != OpPPC64SLDconst {
 19653  			break
 19654  		}
 19655  		if s2.AuxInt != 40 {
 19656  			break
 19657  		}
 19658  		x2 := s2.Args[0]
 19659  		if x2.Op != OpPPC64MOVBZload {
 19660  			break
 19661  		}
 19662  		i2 := x2.AuxInt
 19663  		if x2.Aux != s {
 19664  			break
 19665  		}
 19666  		_ = x2.Args[1]
 19667  		if p != x2.Args[0] {
 19668  			break
 19669  		}
 19670  		if mem != x2.Args[1] {
 19671  			break
 19672  		}
 19673  		o2 := o1.Args[1]
 19674  		if o2.Op != OpPPC64OR {
 19675  			break
 19676  		}
 19677  		if o2.Type != t {
 19678  			break
 19679  		}
 19680  		_ = o2.Args[1]
 19681  		x4 := o2.Args[0]
 19682  		if x4.Op != OpPPC64MOVWBRload {
 19683  			break
 19684  		}
 19685  		if x4.Type != t {
 19686  			break
 19687  		}
 19688  		_ = x4.Args[1]
 19689  		x4_0 := x4.Args[0]
 19690  		if x4_0.Op != OpPPC64MOVDaddr {
 19691  			break
 19692  		}
 19693  		if x4_0.Type != typ.Uintptr {
 19694  			break
 19695  		}
 19696  		i4 := x4_0.AuxInt
 19697  		if p != x4_0.Args[0] {
 19698  			break
 19699  		}
 19700  		if mem != x4.Args[1] {
 19701  			break
 19702  		}
 19703  		s3 := o2.Args[1]
 19704  		if s3.Op != OpPPC64SLDconst {
 19705  			break
 19706  		}
 19707  		if s3.AuxInt != 32 {
 19708  			break
 19709  		}
 19710  		x3 := s3.Args[0]
 19711  		if x3.Op != OpPPC64MOVBZload {
 19712  			break
 19713  		}
 19714  		i3 := x3.AuxInt
 19715  		if x3.Aux != s {
 19716  			break
 19717  		}
 19718  		_ = x3.Args[1]
 19719  		if p != x3.Args[0] {
 19720  			break
 19721  		}
 19722  		if mem != x3.Args[1] {
 19723  			break
 19724  		}
 19725  		s1 := o0.Args[1]
 19726  		if s1.Op != OpPPC64SLDconst {
 19727  			break
 19728  		}
 19729  		if s1.AuxInt != 48 {
 19730  			break
 19731  		}
 19732  		x1 := s1.Args[0]
 19733  		if x1.Op != OpPPC64MOVBZload {
 19734  			break
 19735  		}
 19736  		i1 := x1.AuxInt
 19737  		if x1.Aux != s {
 19738  			break
 19739  		}
 19740  		_ = x1.Args[1]
 19741  		if p != x1.Args[0] {
 19742  			break
 19743  		}
 19744  		if mem != x1.Args[1] {
 19745  			break
 19746  		}
 19747  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19748  			break
 19749  		}
 19750  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19751  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19752  		v.reset(OpCopy)
 19753  		v.AddArg(v0)
 19754  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19755  		v1.AuxInt = i0
 19756  		v1.Aux = s
 19757  		v1.AddArg(p)
 19758  		v0.AddArg(v1)
 19759  		v0.AddArg(mem)
 19760  		return true
 19761  	}
 19762  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19763  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19764  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19765  	for {
 19766  		t := v.Type
 19767  		_ = v.Args[1]
 19768  		s0 := v.Args[0]
 19769  		if s0.Op != OpPPC64SLDconst {
 19770  			break
 19771  		}
 19772  		if s0.AuxInt != 56 {
 19773  			break
 19774  		}
 19775  		x0 := s0.Args[0]
 19776  		if x0.Op != OpPPC64MOVBZload {
 19777  			break
 19778  		}
 19779  		i0 := x0.AuxInt
 19780  		s := x0.Aux
 19781  		_ = x0.Args[1]
 19782  		p := x0.Args[0]
 19783  		mem := x0.Args[1]
 19784  		o0 := v.Args[1]
 19785  		if o0.Op != OpPPC64OR {
 19786  			break
 19787  		}
 19788  		if o0.Type != t {
 19789  			break
 19790  		}
 19791  		_ = o0.Args[1]
 19792  		o1 := o0.Args[0]
 19793  		if o1.Op != OpPPC64OR {
 19794  			break
 19795  		}
 19796  		if o1.Type != t {
 19797  			break
 19798  		}
 19799  		_ = o1.Args[1]
 19800  		o2 := o1.Args[0]
 19801  		if o2.Op != OpPPC64OR {
 19802  			break
 19803  		}
 19804  		if o2.Type != t {
 19805  			break
 19806  		}
 19807  		_ = o2.Args[1]
 19808  		s3 := o2.Args[0]
 19809  		if s3.Op != OpPPC64SLDconst {
 19810  			break
 19811  		}
 19812  		if s3.AuxInt != 32 {
 19813  			break
 19814  		}
 19815  		x3 := s3.Args[0]
 19816  		if x3.Op != OpPPC64MOVBZload {
 19817  			break
 19818  		}
 19819  		i3 := x3.AuxInt
 19820  		if x3.Aux != s {
 19821  			break
 19822  		}
 19823  		_ = x3.Args[1]
 19824  		if p != x3.Args[0] {
 19825  			break
 19826  		}
 19827  		if mem != x3.Args[1] {
 19828  			break
 19829  		}
 19830  		x4 := o2.Args[1]
 19831  		if x4.Op != OpPPC64MOVWBRload {
 19832  			break
 19833  		}
 19834  		if x4.Type != t {
 19835  			break
 19836  		}
 19837  		_ = x4.Args[1]
 19838  		x4_0 := x4.Args[0]
 19839  		if x4_0.Op != OpPPC64MOVDaddr {
 19840  			break
 19841  		}
 19842  		if x4_0.Type != typ.Uintptr {
 19843  			break
 19844  		}
 19845  		i4 := x4_0.AuxInt
 19846  		if p != x4_0.Args[0] {
 19847  			break
 19848  		}
 19849  		if mem != x4.Args[1] {
 19850  			break
 19851  		}
 19852  		s2 := o1.Args[1]
 19853  		if s2.Op != OpPPC64SLDconst {
 19854  			break
 19855  		}
 19856  		if s2.AuxInt != 40 {
 19857  			break
 19858  		}
 19859  		x2 := s2.Args[0]
 19860  		if x2.Op != OpPPC64MOVBZload {
 19861  			break
 19862  		}
 19863  		i2 := x2.AuxInt
 19864  		if x2.Aux != s {
 19865  			break
 19866  		}
 19867  		_ = x2.Args[1]
 19868  		if p != x2.Args[0] {
 19869  			break
 19870  		}
 19871  		if mem != x2.Args[1] {
 19872  			break
 19873  		}
 19874  		s1 := o0.Args[1]
 19875  		if s1.Op != OpPPC64SLDconst {
 19876  			break
 19877  		}
 19878  		if s1.AuxInt != 48 {
 19879  			break
 19880  		}
 19881  		x1 := s1.Args[0]
 19882  		if x1.Op != OpPPC64MOVBZload {
 19883  			break
 19884  		}
 19885  		i1 := x1.AuxInt
 19886  		if x1.Aux != s {
 19887  			break
 19888  		}
 19889  		_ = x1.Args[1]
 19890  		if p != x1.Args[0] {
 19891  			break
 19892  		}
 19893  		if mem != x1.Args[1] {
 19894  			break
 19895  		}
 19896  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19897  			break
 19898  		}
 19899  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19900  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 19901  		v.reset(OpCopy)
 19902  		v.AddArg(v0)
 19903  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19904  		v1.AuxInt = i0
 19905  		v1.Aux = s
 19906  		v1.AddArg(p)
 19907  		v0.AddArg(v1)
 19908  		v0.AddArg(mem)
 19909  		return true
 19910  	}
 19911  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19912  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19913  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19914  	for {
 19915  		t := v.Type
 19916  		_ = v.Args[1]
 19917  		s0 := v.Args[0]
 19918  		if s0.Op != OpPPC64SLDconst {
 19919  			break
 19920  		}
 19921  		if s0.AuxInt != 56 {
 19922  			break
 19923  		}
 19924  		x0 := s0.Args[0]
 19925  		if x0.Op != OpPPC64MOVBZload {
 19926  			break
 19927  		}
 19928  		i0 := x0.AuxInt
 19929  		s := x0.Aux
 19930  		_ = x0.Args[1]
 19931  		p := x0.Args[0]
 19932  		mem := x0.Args[1]
 19933  		o0 := v.Args[1]
 19934  		if o0.Op != OpPPC64OR {
 19935  			break
 19936  		}
 19937  		if o0.Type != t {
 19938  			break
 19939  		}
 19940  		_ = o0.Args[1]
 19941  		o1 := o0.Args[0]
 19942  		if o1.Op != OpPPC64OR {
 19943  			break
 19944  		}
 19945  		if o1.Type != t {
 19946  			break
 19947  		}
 19948  		_ = o1.Args[1]
 19949  		o2 := o1.Args[0]
 19950  		if o2.Op != OpPPC64OR {
 19951  			break
 19952  		}
 19953  		if o2.Type != t {
 19954  			break
 19955  		}
 19956  		_ = o2.Args[1]
 19957  		x4 := o2.Args[0]
 19958  		if x4.Op != OpPPC64MOVWBRload {
 19959  			break
 19960  		}
 19961  		if x4.Type != t {
 19962  			break
 19963  		}
 19964  		_ = x4.Args[1]
 19965  		x4_0 := x4.Args[0]
 19966  		if x4_0.Op != OpPPC64MOVDaddr {
 19967  			break
 19968  		}
 19969  		if x4_0.Type != typ.Uintptr {
 19970  			break
 19971  		}
 19972  		i4 := x4_0.AuxInt
 19973  		if p != x4_0.Args[0] {
 19974  			break
 19975  		}
 19976  		if mem != x4.Args[1] {
 19977  			break
 19978  		}
 19979  		s3 := o2.Args[1]
 19980  		if s3.Op != OpPPC64SLDconst {
 19981  			break
 19982  		}
 19983  		if s3.AuxInt != 32 {
 19984  			break
 19985  		}
 19986  		x3 := s3.Args[0]
 19987  		if x3.Op != OpPPC64MOVBZload {
 19988  			break
 19989  		}
 19990  		i3 := x3.AuxInt
 19991  		if x3.Aux != s {
 19992  			break
 19993  		}
 19994  		_ = x3.Args[1]
 19995  		if p != x3.Args[0] {
 19996  			break
 19997  		}
 19998  		if mem != x3.Args[1] {
 19999  			break
 20000  		}
 20001  		s2 := o1.Args[1]
 20002  		if s2.Op != OpPPC64SLDconst {
 20003  			break
 20004  		}
 20005  		if s2.AuxInt != 40 {
 20006  			break
 20007  		}
 20008  		x2 := s2.Args[0]
 20009  		if x2.Op != OpPPC64MOVBZload {
 20010  			break
 20011  		}
 20012  		i2 := x2.AuxInt
 20013  		if x2.Aux != s {
 20014  			break
 20015  		}
 20016  		_ = x2.Args[1]
 20017  		if p != x2.Args[0] {
 20018  			break
 20019  		}
 20020  		if mem != x2.Args[1] {
 20021  			break
 20022  		}
 20023  		s1 := o0.Args[1]
 20024  		if s1.Op != OpPPC64SLDconst {
 20025  			break
 20026  		}
 20027  		if s1.AuxInt != 48 {
 20028  			break
 20029  		}
 20030  		x1 := s1.Args[0]
 20031  		if x1.Op != OpPPC64MOVBZload {
 20032  			break
 20033  		}
 20034  		i1 := x1.AuxInt
 20035  		if x1.Aux != s {
 20036  			break
 20037  		}
 20038  		_ = x1.Args[1]
 20039  		if p != x1.Args[0] {
 20040  			break
 20041  		}
 20042  		if mem != x1.Args[1] {
 20043  			break
 20044  		}
 20045  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20046  			break
 20047  		}
 20048  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20049  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20050  		v.reset(OpCopy)
 20051  		v.AddArg(v0)
 20052  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20053  		v1.AuxInt = i0
 20054  		v1.Aux = s
 20055  		v1.AddArg(p)
 20056  		v0.AddArg(v1)
 20057  		v0.AddArg(mem)
 20058  		return true
 20059  	}
 20060  	return false
 20061  }
 20062  func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
 20063  	b := v.Block
 20064  	_ = b
 20065  	config := b.Func.Config
 20066  	_ = config
 20067  	typ := &b.Func.Config.Types
 20068  	_ = typ
 20069  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20070  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20071  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20072  	for {
 20073  		t := v.Type
 20074  		_ = v.Args[1]
 20075  		o0 := v.Args[0]
 20076  		if o0.Op != OpPPC64OR {
 20077  			break
 20078  		}
 20079  		if o0.Type != t {
 20080  			break
 20081  		}
 20082  		_ = o0.Args[1]
 20083  		s1 := o0.Args[0]
 20084  		if s1.Op != OpPPC64SLDconst {
 20085  			break
 20086  		}
 20087  		if s1.AuxInt != 48 {
 20088  			break
 20089  		}
 20090  		x1 := s1.Args[0]
 20091  		if x1.Op != OpPPC64MOVBZload {
 20092  			break
 20093  		}
 20094  		i1 := x1.AuxInt
 20095  		s := x1.Aux
 20096  		_ = x1.Args[1]
 20097  		p := x1.Args[0]
 20098  		mem := x1.Args[1]
 20099  		o1 := o0.Args[1]
 20100  		if o1.Op != OpPPC64OR {
 20101  			break
 20102  		}
 20103  		if o1.Type != t {
 20104  			break
 20105  		}
 20106  		_ = o1.Args[1]
 20107  		s2 := o1.Args[0]
 20108  		if s2.Op != OpPPC64SLDconst {
 20109  			break
 20110  		}
 20111  		if s2.AuxInt != 40 {
 20112  			break
 20113  		}
 20114  		x2 := s2.Args[0]
 20115  		if x2.Op != OpPPC64MOVBZload {
 20116  			break
 20117  		}
 20118  		i2 := x2.AuxInt
 20119  		if x2.Aux != s {
 20120  			break
 20121  		}
 20122  		_ = x2.Args[1]
 20123  		if p != x2.Args[0] {
 20124  			break
 20125  		}
 20126  		if mem != x2.Args[1] {
 20127  			break
 20128  		}
 20129  		o2 := o1.Args[1]
 20130  		if o2.Op != OpPPC64OR {
 20131  			break
 20132  		}
 20133  		if o2.Type != t {
 20134  			break
 20135  		}
 20136  		_ = o2.Args[1]
 20137  		s3 := o2.Args[0]
 20138  		if s3.Op != OpPPC64SLDconst {
 20139  			break
 20140  		}
 20141  		if s3.AuxInt != 32 {
 20142  			break
 20143  		}
 20144  		x3 := s3.Args[0]
 20145  		if x3.Op != OpPPC64MOVBZload {
 20146  			break
 20147  		}
 20148  		i3 := x3.AuxInt
 20149  		if x3.Aux != s {
 20150  			break
 20151  		}
 20152  		_ = x3.Args[1]
 20153  		if p != x3.Args[0] {
 20154  			break
 20155  		}
 20156  		if mem != x3.Args[1] {
 20157  			break
 20158  		}
 20159  		x4 := o2.Args[1]
 20160  		if x4.Op != OpPPC64MOVWBRload {
 20161  			break
 20162  		}
 20163  		if x4.Type != t {
 20164  			break
 20165  		}
 20166  		_ = x4.Args[1]
 20167  		x4_0 := x4.Args[0]
 20168  		if x4_0.Op != OpPPC64MOVDaddr {
 20169  			break
 20170  		}
 20171  		if x4_0.Type != typ.Uintptr {
 20172  			break
 20173  		}
 20174  		i4 := x4_0.AuxInt
 20175  		if p != x4_0.Args[0] {
 20176  			break
 20177  		}
 20178  		if mem != x4.Args[1] {
 20179  			break
 20180  		}
 20181  		s0 := v.Args[1]
 20182  		if s0.Op != OpPPC64SLDconst {
 20183  			break
 20184  		}
 20185  		if s0.AuxInt != 56 {
 20186  			break
 20187  		}
 20188  		x0 := s0.Args[0]
 20189  		if x0.Op != OpPPC64MOVBZload {
 20190  			break
 20191  		}
 20192  		i0 := x0.AuxInt
 20193  		if x0.Aux != s {
 20194  			break
 20195  		}
 20196  		_ = x0.Args[1]
 20197  		if p != x0.Args[0] {
 20198  			break
 20199  		}
 20200  		if mem != x0.Args[1] {
 20201  			break
 20202  		}
 20203  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20204  			break
 20205  		}
 20206  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20207  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20208  		v.reset(OpCopy)
 20209  		v.AddArg(v0)
 20210  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20211  		v1.AuxInt = i0
 20212  		v1.Aux = s
 20213  		v1.AddArg(p)
 20214  		v0.AddArg(v1)
 20215  		v0.AddArg(mem)
 20216  		return true
 20217  	}
 20218  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20219  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20220  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20221  	for {
 20222  		t := v.Type
 20223  		_ = v.Args[1]
 20224  		o0 := v.Args[0]
 20225  		if o0.Op != OpPPC64OR {
 20226  			break
 20227  		}
 20228  		if o0.Type != t {
 20229  			break
 20230  		}
 20231  		_ = o0.Args[1]
 20232  		s1 := o0.Args[0]
 20233  		if s1.Op != OpPPC64SLDconst {
 20234  			break
 20235  		}
 20236  		if s1.AuxInt != 48 {
 20237  			break
 20238  		}
 20239  		x1 := s1.Args[0]
 20240  		if x1.Op != OpPPC64MOVBZload {
 20241  			break
 20242  		}
 20243  		i1 := x1.AuxInt
 20244  		s := x1.Aux
 20245  		_ = x1.Args[1]
 20246  		p := x1.Args[0]
 20247  		mem := x1.Args[1]
 20248  		o1 := o0.Args[1]
 20249  		if o1.Op != OpPPC64OR {
 20250  			break
 20251  		}
 20252  		if o1.Type != t {
 20253  			break
 20254  		}
 20255  		_ = o1.Args[1]
 20256  		s2 := o1.Args[0]
 20257  		if s2.Op != OpPPC64SLDconst {
 20258  			break
 20259  		}
 20260  		if s2.AuxInt != 40 {
 20261  			break
 20262  		}
 20263  		x2 := s2.Args[0]
 20264  		if x2.Op != OpPPC64MOVBZload {
 20265  			break
 20266  		}
 20267  		i2 := x2.AuxInt
 20268  		if x2.Aux != s {
 20269  			break
 20270  		}
 20271  		_ = x2.Args[1]
 20272  		if p != x2.Args[0] {
 20273  			break
 20274  		}
 20275  		if mem != x2.Args[1] {
 20276  			break
 20277  		}
 20278  		o2 := o1.Args[1]
 20279  		if o2.Op != OpPPC64OR {
 20280  			break
 20281  		}
 20282  		if o2.Type != t {
 20283  			break
 20284  		}
 20285  		_ = o2.Args[1]
 20286  		x4 := o2.Args[0]
 20287  		if x4.Op != OpPPC64MOVWBRload {
 20288  			break
 20289  		}
 20290  		if x4.Type != t {
 20291  			break
 20292  		}
 20293  		_ = x4.Args[1]
 20294  		x4_0 := x4.Args[0]
 20295  		if x4_0.Op != OpPPC64MOVDaddr {
 20296  			break
 20297  		}
 20298  		if x4_0.Type != typ.Uintptr {
 20299  			break
 20300  		}
 20301  		i4 := x4_0.AuxInt
 20302  		if p != x4_0.Args[0] {
 20303  			break
 20304  		}
 20305  		if mem != x4.Args[1] {
 20306  			break
 20307  		}
 20308  		s3 := o2.Args[1]
 20309  		if s3.Op != OpPPC64SLDconst {
 20310  			break
 20311  		}
 20312  		if s3.AuxInt != 32 {
 20313  			break
 20314  		}
 20315  		x3 := s3.Args[0]
 20316  		if x3.Op != OpPPC64MOVBZload {
 20317  			break
 20318  		}
 20319  		i3 := x3.AuxInt
 20320  		if x3.Aux != s {
 20321  			break
 20322  		}
 20323  		_ = x3.Args[1]
 20324  		if p != x3.Args[0] {
 20325  			break
 20326  		}
 20327  		if mem != x3.Args[1] {
 20328  			break
 20329  		}
 20330  		s0 := v.Args[1]
 20331  		if s0.Op != OpPPC64SLDconst {
 20332  			break
 20333  		}
 20334  		if s0.AuxInt != 56 {
 20335  			break
 20336  		}
 20337  		x0 := s0.Args[0]
 20338  		if x0.Op != OpPPC64MOVBZload {
 20339  			break
 20340  		}
 20341  		i0 := x0.AuxInt
 20342  		if x0.Aux != s {
 20343  			break
 20344  		}
 20345  		_ = x0.Args[1]
 20346  		if p != x0.Args[0] {
 20347  			break
 20348  		}
 20349  		if mem != x0.Args[1] {
 20350  			break
 20351  		}
 20352  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20353  			break
 20354  		}
 20355  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20356  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20357  		v.reset(OpCopy)
 20358  		v.AddArg(v0)
 20359  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20360  		v1.AuxInt = i0
 20361  		v1.Aux = s
 20362  		v1.AddArg(p)
 20363  		v0.AddArg(v1)
 20364  		v0.AddArg(mem)
 20365  		return true
 20366  	}
 20367  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20368  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20369  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20370  	for {
 20371  		t := v.Type
 20372  		_ = v.Args[1]
 20373  		o0 := v.Args[0]
 20374  		if o0.Op != OpPPC64OR {
 20375  			break
 20376  		}
 20377  		if o0.Type != t {
 20378  			break
 20379  		}
 20380  		_ = o0.Args[1]
 20381  		s1 := o0.Args[0]
 20382  		if s1.Op != OpPPC64SLDconst {
 20383  			break
 20384  		}
 20385  		if s1.AuxInt != 48 {
 20386  			break
 20387  		}
 20388  		x1 := s1.Args[0]
 20389  		if x1.Op != OpPPC64MOVBZload {
 20390  			break
 20391  		}
 20392  		i1 := x1.AuxInt
 20393  		s := x1.Aux
 20394  		_ = x1.Args[1]
 20395  		p := x1.Args[0]
 20396  		mem := x1.Args[1]
 20397  		o1 := o0.Args[1]
 20398  		if o1.Op != OpPPC64OR {
 20399  			break
 20400  		}
 20401  		if o1.Type != t {
 20402  			break
 20403  		}
 20404  		_ = o1.Args[1]
 20405  		o2 := o1.Args[0]
 20406  		if o2.Op != OpPPC64OR {
 20407  			break
 20408  		}
 20409  		if o2.Type != t {
 20410  			break
 20411  		}
 20412  		_ = o2.Args[1]
 20413  		s3 := o2.Args[0]
 20414  		if s3.Op != OpPPC64SLDconst {
 20415  			break
 20416  		}
 20417  		if s3.AuxInt != 32 {
 20418  			break
 20419  		}
 20420  		x3 := s3.Args[0]
 20421  		if x3.Op != OpPPC64MOVBZload {
 20422  			break
 20423  		}
 20424  		i3 := x3.AuxInt
 20425  		if x3.Aux != s {
 20426  			break
 20427  		}
 20428  		_ = x3.Args[1]
 20429  		if p != x3.Args[0] {
 20430  			break
 20431  		}
 20432  		if mem != x3.Args[1] {
 20433  			break
 20434  		}
 20435  		x4 := o2.Args[1]
 20436  		if x4.Op != OpPPC64MOVWBRload {
 20437  			break
 20438  		}
 20439  		if x4.Type != t {
 20440  			break
 20441  		}
 20442  		_ = x4.Args[1]
 20443  		x4_0 := x4.Args[0]
 20444  		if x4_0.Op != OpPPC64MOVDaddr {
 20445  			break
 20446  		}
 20447  		if x4_0.Type != typ.Uintptr {
 20448  			break
 20449  		}
 20450  		i4 := x4_0.AuxInt
 20451  		if p != x4_0.Args[0] {
 20452  			break
 20453  		}
 20454  		if mem != x4.Args[1] {
 20455  			break
 20456  		}
 20457  		s2 := o1.Args[1]
 20458  		if s2.Op != OpPPC64SLDconst {
 20459  			break
 20460  		}
 20461  		if s2.AuxInt != 40 {
 20462  			break
 20463  		}
 20464  		x2 := s2.Args[0]
 20465  		if x2.Op != OpPPC64MOVBZload {
 20466  			break
 20467  		}
 20468  		i2 := x2.AuxInt
 20469  		if x2.Aux != s {
 20470  			break
 20471  		}
 20472  		_ = x2.Args[1]
 20473  		if p != x2.Args[0] {
 20474  			break
 20475  		}
 20476  		if mem != x2.Args[1] {
 20477  			break
 20478  		}
 20479  		s0 := v.Args[1]
 20480  		if s0.Op != OpPPC64SLDconst {
 20481  			break
 20482  		}
 20483  		if s0.AuxInt != 56 {
 20484  			break
 20485  		}
 20486  		x0 := s0.Args[0]
 20487  		if x0.Op != OpPPC64MOVBZload {
 20488  			break
 20489  		}
 20490  		i0 := x0.AuxInt
 20491  		if x0.Aux != s {
 20492  			break
 20493  		}
 20494  		_ = x0.Args[1]
 20495  		if p != x0.Args[0] {
 20496  			break
 20497  		}
 20498  		if mem != x0.Args[1] {
 20499  			break
 20500  		}
 20501  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20502  			break
 20503  		}
 20504  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20505  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20506  		v.reset(OpCopy)
 20507  		v.AddArg(v0)
 20508  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20509  		v1.AuxInt = i0
 20510  		v1.Aux = s
 20511  		v1.AddArg(p)
 20512  		v0.AddArg(v1)
 20513  		v0.AddArg(mem)
 20514  		return true
 20515  	}
 20516  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20517  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20518  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20519  	for {
 20520  		t := v.Type
 20521  		_ = v.Args[1]
 20522  		o0 := v.Args[0]
 20523  		if o0.Op != OpPPC64OR {
 20524  			break
 20525  		}
 20526  		if o0.Type != t {
 20527  			break
 20528  		}
 20529  		_ = o0.Args[1]
 20530  		s1 := o0.Args[0]
 20531  		if s1.Op != OpPPC64SLDconst {
 20532  			break
 20533  		}
 20534  		if s1.AuxInt != 48 {
 20535  			break
 20536  		}
 20537  		x1 := s1.Args[0]
 20538  		if x1.Op != OpPPC64MOVBZload {
 20539  			break
 20540  		}
 20541  		i1 := x1.AuxInt
 20542  		s := x1.Aux
 20543  		_ = x1.Args[1]
 20544  		p := x1.Args[0]
 20545  		mem := x1.Args[1]
 20546  		o1 := o0.Args[1]
 20547  		if o1.Op != OpPPC64OR {
 20548  			break
 20549  		}
 20550  		if o1.Type != t {
 20551  			break
 20552  		}
 20553  		_ = o1.Args[1]
 20554  		o2 := o1.Args[0]
 20555  		if o2.Op != OpPPC64OR {
 20556  			break
 20557  		}
 20558  		if o2.Type != t {
 20559  			break
 20560  		}
 20561  		_ = o2.Args[1]
 20562  		x4 := o2.Args[0]
 20563  		if x4.Op != OpPPC64MOVWBRload {
 20564  			break
 20565  		}
 20566  		if x4.Type != t {
 20567  			break
 20568  		}
 20569  		_ = x4.Args[1]
 20570  		x4_0 := x4.Args[0]
 20571  		if x4_0.Op != OpPPC64MOVDaddr {
 20572  			break
 20573  		}
 20574  		if x4_0.Type != typ.Uintptr {
 20575  			break
 20576  		}
 20577  		i4 := x4_0.AuxInt
 20578  		if p != x4_0.Args[0] {
 20579  			break
 20580  		}
 20581  		if mem != x4.Args[1] {
 20582  			break
 20583  		}
 20584  		s3 := o2.Args[1]
 20585  		if s3.Op != OpPPC64SLDconst {
 20586  			break
 20587  		}
 20588  		if s3.AuxInt != 32 {
 20589  			break
 20590  		}
 20591  		x3 := s3.Args[0]
 20592  		if x3.Op != OpPPC64MOVBZload {
 20593  			break
 20594  		}
 20595  		i3 := x3.AuxInt
 20596  		if x3.Aux != s {
 20597  			break
 20598  		}
 20599  		_ = x3.Args[1]
 20600  		if p != x3.Args[0] {
 20601  			break
 20602  		}
 20603  		if mem != x3.Args[1] {
 20604  			break
 20605  		}
 20606  		s2 := o1.Args[1]
 20607  		if s2.Op != OpPPC64SLDconst {
 20608  			break
 20609  		}
 20610  		if s2.AuxInt != 40 {
 20611  			break
 20612  		}
 20613  		x2 := s2.Args[0]
 20614  		if x2.Op != OpPPC64MOVBZload {
 20615  			break
 20616  		}
 20617  		i2 := x2.AuxInt
 20618  		if x2.Aux != s {
 20619  			break
 20620  		}
 20621  		_ = x2.Args[1]
 20622  		if p != x2.Args[0] {
 20623  			break
 20624  		}
 20625  		if mem != x2.Args[1] {
 20626  			break
 20627  		}
 20628  		s0 := v.Args[1]
 20629  		if s0.Op != OpPPC64SLDconst {
 20630  			break
 20631  		}
 20632  		if s0.AuxInt != 56 {
 20633  			break
 20634  		}
 20635  		x0 := s0.Args[0]
 20636  		if x0.Op != OpPPC64MOVBZload {
 20637  			break
 20638  		}
 20639  		i0 := x0.AuxInt
 20640  		if x0.Aux != s {
 20641  			break
 20642  		}
 20643  		_ = x0.Args[1]
 20644  		if p != x0.Args[0] {
 20645  			break
 20646  		}
 20647  		if mem != x0.Args[1] {
 20648  			break
 20649  		}
 20650  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20651  			break
 20652  		}
 20653  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20654  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20655  		v.reset(OpCopy)
 20656  		v.AddArg(v0)
 20657  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20658  		v1.AuxInt = i0
 20659  		v1.Aux = s
 20660  		v1.AddArg(p)
 20661  		v0.AddArg(v1)
 20662  		v0.AddArg(mem)
 20663  		return true
 20664  	}
 20665  	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20666  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20667  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20668  	for {
 20669  		t := v.Type
 20670  		_ = v.Args[1]
 20671  		o0 := v.Args[0]
 20672  		if o0.Op != OpPPC64OR {
 20673  			break
 20674  		}
 20675  		if o0.Type != t {
 20676  			break
 20677  		}
 20678  		_ = o0.Args[1]
 20679  		o1 := o0.Args[0]
 20680  		if o1.Op != OpPPC64OR {
 20681  			break
 20682  		}
 20683  		if o1.Type != t {
 20684  			break
 20685  		}
 20686  		_ = o1.Args[1]
 20687  		s2 := o1.Args[0]
 20688  		if s2.Op != OpPPC64SLDconst {
 20689  			break
 20690  		}
 20691  		if s2.AuxInt != 40 {
 20692  			break
 20693  		}
 20694  		x2 := s2.Args[0]
 20695  		if x2.Op != OpPPC64MOVBZload {
 20696  			break
 20697  		}
 20698  		i2 := x2.AuxInt
 20699  		s := x2.Aux
 20700  		_ = x2.Args[1]
 20701  		p := x2.Args[0]
 20702  		mem := x2.Args[1]
 20703  		o2 := o1.Args[1]
 20704  		if o2.Op != OpPPC64OR {
 20705  			break
 20706  		}
 20707  		if o2.Type != t {
 20708  			break
 20709  		}
 20710  		_ = o2.Args[1]
 20711  		s3 := o2.Args[0]
 20712  		if s3.Op != OpPPC64SLDconst {
 20713  			break
 20714  		}
 20715  		if s3.AuxInt != 32 {
 20716  			break
 20717  		}
 20718  		x3 := s3.Args[0]
 20719  		if x3.Op != OpPPC64MOVBZload {
 20720  			break
 20721  		}
 20722  		i3 := x3.AuxInt
 20723  		if x3.Aux != s {
 20724  			break
 20725  		}
 20726  		_ = x3.Args[1]
 20727  		if p != x3.Args[0] {
 20728  			break
 20729  		}
 20730  		if mem != x3.Args[1] {
 20731  			break
 20732  		}
 20733  		x4 := o2.Args[1]
 20734  		if x4.Op != OpPPC64MOVWBRload {
 20735  			break
 20736  		}
 20737  		if x4.Type != t {
 20738  			break
 20739  		}
 20740  		_ = x4.Args[1]
 20741  		x4_0 := x4.Args[0]
 20742  		if x4_0.Op != OpPPC64MOVDaddr {
 20743  			break
 20744  		}
 20745  		if x4_0.Type != typ.Uintptr {
 20746  			break
 20747  		}
 20748  		i4 := x4_0.AuxInt
 20749  		if p != x4_0.Args[0] {
 20750  			break
 20751  		}
 20752  		if mem != x4.Args[1] {
 20753  			break
 20754  		}
 20755  		s1 := o0.Args[1]
 20756  		if s1.Op != OpPPC64SLDconst {
 20757  			break
 20758  		}
 20759  		if s1.AuxInt != 48 {
 20760  			break
 20761  		}
 20762  		x1 := s1.Args[0]
 20763  		if x1.Op != OpPPC64MOVBZload {
 20764  			break
 20765  		}
 20766  		i1 := x1.AuxInt
 20767  		if x1.Aux != s {
 20768  			break
 20769  		}
 20770  		_ = x1.Args[1]
 20771  		if p != x1.Args[0] {
 20772  			break
 20773  		}
 20774  		if mem != x1.Args[1] {
 20775  			break
 20776  		}
 20777  		s0 := v.Args[1]
 20778  		if s0.Op != OpPPC64SLDconst {
 20779  			break
 20780  		}
 20781  		if s0.AuxInt != 56 {
 20782  			break
 20783  		}
 20784  		x0 := s0.Args[0]
 20785  		if x0.Op != OpPPC64MOVBZload {
 20786  			break
 20787  		}
 20788  		i0 := x0.AuxInt
 20789  		if x0.Aux != s {
 20790  			break
 20791  		}
 20792  		_ = x0.Args[1]
 20793  		if p != x0.Args[0] {
 20794  			break
 20795  		}
 20796  		if mem != x0.Args[1] {
 20797  			break
 20798  		}
 20799  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20800  			break
 20801  		}
 20802  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20803  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20804  		v.reset(OpCopy)
 20805  		v.AddArg(v0)
 20806  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20807  		v1.AuxInt = i0
 20808  		v1.Aux = s
 20809  		v1.AddArg(p)
 20810  		v0.AddArg(v1)
 20811  		v0.AddArg(mem)
 20812  		return true
 20813  	}
 20814  	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20815  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20816  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20817  	for {
 20818  		t := v.Type
 20819  		_ = v.Args[1]
 20820  		o0 := v.Args[0]
 20821  		if o0.Op != OpPPC64OR {
 20822  			break
 20823  		}
 20824  		if o0.Type != t {
 20825  			break
 20826  		}
 20827  		_ = o0.Args[1]
 20828  		o1 := o0.Args[0]
 20829  		if o1.Op != OpPPC64OR {
 20830  			break
 20831  		}
 20832  		if o1.Type != t {
 20833  			break
 20834  		}
 20835  		_ = o1.Args[1]
 20836  		s2 := o1.Args[0]
 20837  		if s2.Op != OpPPC64SLDconst {
 20838  			break
 20839  		}
 20840  		if s2.AuxInt != 40 {
 20841  			break
 20842  		}
 20843  		x2 := s2.Args[0]
 20844  		if x2.Op != OpPPC64MOVBZload {
 20845  			break
 20846  		}
 20847  		i2 := x2.AuxInt
 20848  		s := x2.Aux
 20849  		_ = x2.Args[1]
 20850  		p := x2.Args[0]
 20851  		mem := x2.Args[1]
 20852  		o2 := o1.Args[1]
 20853  		if o2.Op != OpPPC64OR {
 20854  			break
 20855  		}
 20856  		if o2.Type != t {
 20857  			break
 20858  		}
 20859  		_ = o2.Args[1]
 20860  		x4 := o2.Args[0]
 20861  		if x4.Op != OpPPC64MOVWBRload {
 20862  			break
 20863  		}
 20864  		if x4.Type != t {
 20865  			break
 20866  		}
 20867  		_ = x4.Args[1]
 20868  		x4_0 := x4.Args[0]
 20869  		if x4_0.Op != OpPPC64MOVDaddr {
 20870  			break
 20871  		}
 20872  		if x4_0.Type != typ.Uintptr {
 20873  			break
 20874  		}
 20875  		i4 := x4_0.AuxInt
 20876  		if p != x4_0.Args[0] {
 20877  			break
 20878  		}
 20879  		if mem != x4.Args[1] {
 20880  			break
 20881  		}
 20882  		s3 := o2.Args[1]
 20883  		if s3.Op != OpPPC64SLDconst {
 20884  			break
 20885  		}
 20886  		if s3.AuxInt != 32 {
 20887  			break
 20888  		}
 20889  		x3 := s3.Args[0]
 20890  		if x3.Op != OpPPC64MOVBZload {
 20891  			break
 20892  		}
 20893  		i3 := x3.AuxInt
 20894  		if x3.Aux != s {
 20895  			break
 20896  		}
 20897  		_ = x3.Args[1]
 20898  		if p != x3.Args[0] {
 20899  			break
 20900  		}
 20901  		if mem != x3.Args[1] {
 20902  			break
 20903  		}
 20904  		s1 := o0.Args[1]
 20905  		if s1.Op != OpPPC64SLDconst {
 20906  			break
 20907  		}
 20908  		if s1.AuxInt != 48 {
 20909  			break
 20910  		}
 20911  		x1 := s1.Args[0]
 20912  		if x1.Op != OpPPC64MOVBZload {
 20913  			break
 20914  		}
 20915  		i1 := x1.AuxInt
 20916  		if x1.Aux != s {
 20917  			break
 20918  		}
 20919  		_ = x1.Args[1]
 20920  		if p != x1.Args[0] {
 20921  			break
 20922  		}
 20923  		if mem != x1.Args[1] {
 20924  			break
 20925  		}
 20926  		s0 := v.Args[1]
 20927  		if s0.Op != OpPPC64SLDconst {
 20928  			break
 20929  		}
 20930  		if s0.AuxInt != 56 {
 20931  			break
 20932  		}
 20933  		x0 := s0.Args[0]
 20934  		if x0.Op != OpPPC64MOVBZload {
 20935  			break
 20936  		}
 20937  		i0 := x0.AuxInt
 20938  		if x0.Aux != s {
 20939  			break
 20940  		}
 20941  		_ = x0.Args[1]
 20942  		if p != x0.Args[0] {
 20943  			break
 20944  		}
 20945  		if mem != x0.Args[1] {
 20946  			break
 20947  		}
 20948  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20949  			break
 20950  		}
 20951  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20952  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 20953  		v.reset(OpCopy)
 20954  		v.AddArg(v0)
 20955  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20956  		v1.AuxInt = i0
 20957  		v1.Aux = s
 20958  		v1.AddArg(p)
 20959  		v0.AddArg(v1)
 20960  		v0.AddArg(mem)
 20961  		return true
 20962  	}
 20963  	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20964  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20965  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20966  	for {
 20967  		t := v.Type
 20968  		_ = v.Args[1]
 20969  		o0 := v.Args[0]
 20970  		if o0.Op != OpPPC64OR {
 20971  			break
 20972  		}
 20973  		if o0.Type != t {
 20974  			break
 20975  		}
 20976  		_ = o0.Args[1]
 20977  		o1 := o0.Args[0]
 20978  		if o1.Op != OpPPC64OR {
 20979  			break
 20980  		}
 20981  		if o1.Type != t {
 20982  			break
 20983  		}
 20984  		_ = o1.Args[1]
 20985  		o2 := o1.Args[0]
 20986  		if o2.Op != OpPPC64OR {
 20987  			break
 20988  		}
 20989  		if o2.Type != t {
 20990  			break
 20991  		}
 20992  		_ = o2.Args[1]
 20993  		s3 := o2.Args[0]
 20994  		if s3.Op != OpPPC64SLDconst {
 20995  			break
 20996  		}
 20997  		if s3.AuxInt != 32 {
 20998  			break
 20999  		}
 21000  		x3 := s3.Args[0]
 21001  		if x3.Op != OpPPC64MOVBZload {
 21002  			break
 21003  		}
 21004  		i3 := x3.AuxInt
 21005  		s := x3.Aux
 21006  		_ = x3.Args[1]
 21007  		p := x3.Args[0]
 21008  		mem := x3.Args[1]
 21009  		x4 := o2.Args[1]
 21010  		if x4.Op != OpPPC64MOVWBRload {
 21011  			break
 21012  		}
 21013  		if x4.Type != t {
 21014  			break
 21015  		}
 21016  		_ = x4.Args[1]
 21017  		x4_0 := x4.Args[0]
 21018  		if x4_0.Op != OpPPC64MOVDaddr {
 21019  			break
 21020  		}
 21021  		if x4_0.Type != typ.Uintptr {
 21022  			break
 21023  		}
 21024  		i4 := x4_0.AuxInt
 21025  		if p != x4_0.Args[0] {
 21026  			break
 21027  		}
 21028  		if mem != x4.Args[1] {
 21029  			break
 21030  		}
 21031  		s2 := o1.Args[1]
 21032  		if s2.Op != OpPPC64SLDconst {
 21033  			break
 21034  		}
 21035  		if s2.AuxInt != 40 {
 21036  			break
 21037  		}
 21038  		x2 := s2.Args[0]
 21039  		if x2.Op != OpPPC64MOVBZload {
 21040  			break
 21041  		}
 21042  		i2 := x2.AuxInt
 21043  		if x2.Aux != s {
 21044  			break
 21045  		}
 21046  		_ = x2.Args[1]
 21047  		if p != x2.Args[0] {
 21048  			break
 21049  		}
 21050  		if mem != x2.Args[1] {
 21051  			break
 21052  		}
 21053  		s1 := o0.Args[1]
 21054  		if s1.Op != OpPPC64SLDconst {
 21055  			break
 21056  		}
 21057  		if s1.AuxInt != 48 {
 21058  			break
 21059  		}
 21060  		x1 := s1.Args[0]
 21061  		if x1.Op != OpPPC64MOVBZload {
 21062  			break
 21063  		}
 21064  		i1 := x1.AuxInt
 21065  		if x1.Aux != s {
 21066  			break
 21067  		}
 21068  		_ = x1.Args[1]
 21069  		if p != x1.Args[0] {
 21070  			break
 21071  		}
 21072  		if mem != x1.Args[1] {
 21073  			break
 21074  		}
 21075  		s0 := v.Args[1]
 21076  		if s0.Op != OpPPC64SLDconst {
 21077  			break
 21078  		}
 21079  		if s0.AuxInt != 56 {
 21080  			break
 21081  		}
 21082  		x0 := s0.Args[0]
 21083  		if x0.Op != OpPPC64MOVBZload {
 21084  			break
 21085  		}
 21086  		i0 := x0.AuxInt
 21087  		if x0.Aux != s {
 21088  			break
 21089  		}
 21090  		_ = x0.Args[1]
 21091  		if p != x0.Args[0] {
 21092  			break
 21093  		}
 21094  		if mem != x0.Args[1] {
 21095  			break
 21096  		}
 21097  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 21098  			break
 21099  		}
 21100  		b = mergePoint(b, x0, x1, x2, x3, x4)
 21101  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21102  		v.reset(OpCopy)
 21103  		v.AddArg(v0)
 21104  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21105  		v1.AuxInt = i0
 21106  		v1.Aux = s
 21107  		v1.AddArg(p)
 21108  		v0.AddArg(v1)
 21109  		v0.AddArg(mem)
 21110  		return true
 21111  	}
 21112  	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 21113  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 21114  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21115  	for {
 21116  		t := v.Type
 21117  		_ = v.Args[1]
 21118  		o0 := v.Args[0]
 21119  		if o0.Op != OpPPC64OR {
 21120  			break
 21121  		}
 21122  		if o0.Type != t {
 21123  			break
 21124  		}
 21125  		_ = o0.Args[1]
 21126  		o1 := o0.Args[0]
 21127  		if o1.Op != OpPPC64OR {
 21128  			break
 21129  		}
 21130  		if o1.Type != t {
 21131  			break
 21132  		}
 21133  		_ = o1.Args[1]
 21134  		o2 := o1.Args[0]
 21135  		if o2.Op != OpPPC64OR {
 21136  			break
 21137  		}
 21138  		if o2.Type != t {
 21139  			break
 21140  		}
 21141  		_ = o2.Args[1]
 21142  		x4 := o2.Args[0]
 21143  		if x4.Op != OpPPC64MOVWBRload {
 21144  			break
 21145  		}
 21146  		if x4.Type != t {
 21147  			break
 21148  		}
 21149  		_ = x4.Args[1]
 21150  		x4_0 := x4.Args[0]
 21151  		if x4_0.Op != OpPPC64MOVDaddr {
 21152  			break
 21153  		}
 21154  		if x4_0.Type != typ.Uintptr {
 21155  			break
 21156  		}
 21157  		i4 := x4_0.AuxInt
 21158  		p := x4_0.Args[0]
 21159  		mem := x4.Args[1]
 21160  		s3 := o2.Args[1]
 21161  		if s3.Op != OpPPC64SLDconst {
 21162  			break
 21163  		}
 21164  		if s3.AuxInt != 32 {
 21165  			break
 21166  		}
 21167  		x3 := s3.Args[0]
 21168  		if x3.Op != OpPPC64MOVBZload {
 21169  			break
 21170  		}
 21171  		i3 := x3.AuxInt
 21172  		s := x3.Aux
 21173  		_ = x3.Args[1]
 21174  		if p != x3.Args[0] {
 21175  			break
 21176  		}
 21177  		if mem != x3.Args[1] {
 21178  			break
 21179  		}
 21180  		s2 := o1.Args[1]
 21181  		if s2.Op != OpPPC64SLDconst {
 21182  			break
 21183  		}
 21184  		if s2.AuxInt != 40 {
 21185  			break
 21186  		}
 21187  		x2 := s2.Args[0]
 21188  		if x2.Op != OpPPC64MOVBZload {
 21189  			break
 21190  		}
 21191  		i2 := x2.AuxInt
 21192  		if x2.Aux != s {
 21193  			break
 21194  		}
 21195  		_ = x2.Args[1]
 21196  		if p != x2.Args[0] {
 21197  			break
 21198  		}
 21199  		if mem != x2.Args[1] {
 21200  			break
 21201  		}
 21202  		s1 := o0.Args[1]
 21203  		if s1.Op != OpPPC64SLDconst {
 21204  			break
 21205  		}
 21206  		if s1.AuxInt != 48 {
 21207  			break
 21208  		}
 21209  		x1 := s1.Args[0]
 21210  		if x1.Op != OpPPC64MOVBZload {
 21211  			break
 21212  		}
 21213  		i1 := x1.AuxInt
 21214  		if x1.Aux != s {
 21215  			break
 21216  		}
 21217  		_ = x1.Args[1]
 21218  		if p != x1.Args[0] {
 21219  			break
 21220  		}
 21221  		if mem != x1.Args[1] {
 21222  			break
 21223  		}
 21224  		s0 := v.Args[1]
 21225  		if s0.Op != OpPPC64SLDconst {
 21226  			break
 21227  		}
 21228  		if s0.AuxInt != 56 {
 21229  			break
 21230  		}
 21231  		x0 := s0.Args[0]
 21232  		if x0.Op != OpPPC64MOVBZload {
 21233  			break
 21234  		}
 21235  		i0 := x0.AuxInt
 21236  		if x0.Aux != s {
 21237  			break
 21238  		}
 21239  		_ = x0.Args[1]
 21240  		if p != x0.Args[0] {
 21241  			break
 21242  		}
 21243  		if mem != x0.Args[1] {
 21244  			break
 21245  		}
 21246  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 21247  			break
 21248  		}
 21249  		b = mergePoint(b, x0, x1, x2, x3, x4)
 21250  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21251  		v.reset(OpCopy)
 21252  		v.AddArg(v0)
 21253  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21254  		v1.AuxInt = i0
 21255  		v1.Aux = s
 21256  		v1.AddArg(p)
 21257  		v0.AddArg(v1)
 21258  		v0.AddArg(mem)
 21259  		return true
 21260  	}
 21261  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 21262  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21263  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21264  	for {
 21265  		t := v.Type
 21266  		_ = v.Args[1]
 21267  		x7 := v.Args[0]
 21268  		if x7.Op != OpPPC64MOVBZload {
 21269  			break
 21270  		}
 21271  		i7 := x7.AuxInt
 21272  		s := x7.Aux
 21273  		_ = x7.Args[1]
 21274  		p := x7.Args[0]
 21275  		mem := x7.Args[1]
 21276  		o5 := v.Args[1]
 21277  		if o5.Op != OpPPC64OR {
 21278  			break
 21279  		}
 21280  		if o5.Type != t {
 21281  			break
 21282  		}
 21283  		_ = o5.Args[1]
 21284  		s6 := o5.Args[0]
 21285  		if s6.Op != OpPPC64SLDconst {
 21286  			break
 21287  		}
 21288  		if s6.AuxInt != 8 {
 21289  			break
 21290  		}
 21291  		x6 := s6.Args[0]
 21292  		if x6.Op != OpPPC64MOVBZload {
 21293  			break
 21294  		}
 21295  		i6 := x6.AuxInt
 21296  		if x6.Aux != s {
 21297  			break
 21298  		}
 21299  		_ = x6.Args[1]
 21300  		if p != x6.Args[0] {
 21301  			break
 21302  		}
 21303  		if mem != x6.Args[1] {
 21304  			break
 21305  		}
 21306  		o4 := o5.Args[1]
 21307  		if o4.Op != OpPPC64OR {
 21308  			break
 21309  		}
 21310  		if o4.Type != t {
 21311  			break
 21312  		}
 21313  		_ = o4.Args[1]
 21314  		s5 := o4.Args[0]
 21315  		if s5.Op != OpPPC64SLDconst {
 21316  			break
 21317  		}
 21318  		if s5.AuxInt != 16 {
 21319  			break
 21320  		}
 21321  		x5 := s5.Args[0]
 21322  		if x5.Op != OpPPC64MOVBZload {
 21323  			break
 21324  		}
 21325  		i5 := x5.AuxInt
 21326  		if x5.Aux != s {
 21327  			break
 21328  		}
 21329  		_ = x5.Args[1]
 21330  		if p != x5.Args[0] {
 21331  			break
 21332  		}
 21333  		if mem != x5.Args[1] {
 21334  			break
 21335  		}
 21336  		o3 := o4.Args[1]
 21337  		if o3.Op != OpPPC64OR {
 21338  			break
 21339  		}
 21340  		if o3.Type != t {
 21341  			break
 21342  		}
 21343  		_ = o3.Args[1]
 21344  		s4 := o3.Args[0]
 21345  		if s4.Op != OpPPC64SLDconst {
 21346  			break
 21347  		}
 21348  		if s4.AuxInt != 24 {
 21349  			break
 21350  		}
 21351  		x4 := s4.Args[0]
 21352  		if x4.Op != OpPPC64MOVBZload {
 21353  			break
 21354  		}
 21355  		i4 := x4.AuxInt
 21356  		if x4.Aux != s {
 21357  			break
 21358  		}
 21359  		_ = x4.Args[1]
 21360  		if p != x4.Args[0] {
 21361  			break
 21362  		}
 21363  		if mem != x4.Args[1] {
 21364  			break
 21365  		}
 21366  		s0 := o3.Args[1]
 21367  		if s0.Op != OpPPC64SLWconst {
 21368  			break
 21369  		}
 21370  		if s0.AuxInt != 32 {
 21371  			break
 21372  		}
 21373  		x3 := s0.Args[0]
 21374  		if x3.Op != OpPPC64MOVWBRload {
 21375  			break
 21376  		}
 21377  		if x3.Type != t {
 21378  			break
 21379  		}
 21380  		_ = x3.Args[1]
 21381  		x3_0 := x3.Args[0]
 21382  		if x3_0.Op != OpPPC64MOVDaddr {
 21383  			break
 21384  		}
 21385  		if x3_0.Type != typ.Uintptr {
 21386  			break
 21387  		}
 21388  		i0 := x3_0.AuxInt
 21389  		if x3_0.Aux != s {
 21390  			break
 21391  		}
 21392  		if p != x3_0.Args[0] {
 21393  			break
 21394  		}
 21395  		if mem != x3.Args[1] {
 21396  			break
 21397  		}
 21398  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21399  			break
 21400  		}
 21401  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21402  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21403  		v.reset(OpCopy)
 21404  		v.AddArg(v0)
 21405  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21406  		v1.AuxInt = i0
 21407  		v1.Aux = s
 21408  		v1.AddArg(p)
 21409  		v0.AddArg(v1)
 21410  		v0.AddArg(mem)
 21411  		return true
 21412  	}
 21413  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 21414  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21415  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21416  	for {
 21417  		t := v.Type
 21418  		_ = v.Args[1]
 21419  		x7 := v.Args[0]
 21420  		if x7.Op != OpPPC64MOVBZload {
 21421  			break
 21422  		}
 21423  		i7 := x7.AuxInt
 21424  		s := x7.Aux
 21425  		_ = x7.Args[1]
 21426  		p := x7.Args[0]
 21427  		mem := x7.Args[1]
 21428  		o5 := v.Args[1]
 21429  		if o5.Op != OpPPC64OR {
 21430  			break
 21431  		}
 21432  		if o5.Type != t {
 21433  			break
 21434  		}
 21435  		_ = o5.Args[1]
 21436  		s6 := o5.Args[0]
 21437  		if s6.Op != OpPPC64SLDconst {
 21438  			break
 21439  		}
 21440  		if s6.AuxInt != 8 {
 21441  			break
 21442  		}
 21443  		x6 := s6.Args[0]
 21444  		if x6.Op != OpPPC64MOVBZload {
 21445  			break
 21446  		}
 21447  		i6 := x6.AuxInt
 21448  		if x6.Aux != s {
 21449  			break
 21450  		}
 21451  		_ = x6.Args[1]
 21452  		if p != x6.Args[0] {
 21453  			break
 21454  		}
 21455  		if mem != x6.Args[1] {
 21456  			break
 21457  		}
 21458  		o4 := o5.Args[1]
 21459  		if o4.Op != OpPPC64OR {
 21460  			break
 21461  		}
 21462  		if o4.Type != t {
 21463  			break
 21464  		}
 21465  		_ = o4.Args[1]
 21466  		s5 := o4.Args[0]
 21467  		if s5.Op != OpPPC64SLDconst {
 21468  			break
 21469  		}
 21470  		if s5.AuxInt != 16 {
 21471  			break
 21472  		}
 21473  		x5 := s5.Args[0]
 21474  		if x5.Op != OpPPC64MOVBZload {
 21475  			break
 21476  		}
 21477  		i5 := x5.AuxInt
 21478  		if x5.Aux != s {
 21479  			break
 21480  		}
 21481  		_ = x5.Args[1]
 21482  		if p != x5.Args[0] {
 21483  			break
 21484  		}
 21485  		if mem != x5.Args[1] {
 21486  			break
 21487  		}
 21488  		o3 := o4.Args[1]
 21489  		if o3.Op != OpPPC64OR {
 21490  			break
 21491  		}
 21492  		if o3.Type != t {
 21493  			break
 21494  		}
 21495  		_ = o3.Args[1]
 21496  		s0 := o3.Args[0]
 21497  		if s0.Op != OpPPC64SLWconst {
 21498  			break
 21499  		}
 21500  		if s0.AuxInt != 32 {
 21501  			break
 21502  		}
 21503  		x3 := s0.Args[0]
 21504  		if x3.Op != OpPPC64MOVWBRload {
 21505  			break
 21506  		}
 21507  		if x3.Type != t {
 21508  			break
 21509  		}
 21510  		_ = x3.Args[1]
 21511  		x3_0 := x3.Args[0]
 21512  		if x3_0.Op != OpPPC64MOVDaddr {
 21513  			break
 21514  		}
 21515  		if x3_0.Type != typ.Uintptr {
 21516  			break
 21517  		}
 21518  		i0 := x3_0.AuxInt
 21519  		if x3_0.Aux != s {
 21520  			break
 21521  		}
 21522  		if p != x3_0.Args[0] {
 21523  			break
 21524  		}
 21525  		if mem != x3.Args[1] {
 21526  			break
 21527  		}
 21528  		s4 := o3.Args[1]
 21529  		if s4.Op != OpPPC64SLDconst {
 21530  			break
 21531  		}
 21532  		if s4.AuxInt != 24 {
 21533  			break
 21534  		}
 21535  		x4 := s4.Args[0]
 21536  		if x4.Op != OpPPC64MOVBZload {
 21537  			break
 21538  		}
 21539  		i4 := x4.AuxInt
 21540  		if x4.Aux != s {
 21541  			break
 21542  		}
 21543  		_ = x4.Args[1]
 21544  		if p != x4.Args[0] {
 21545  			break
 21546  		}
 21547  		if mem != x4.Args[1] {
 21548  			break
 21549  		}
 21550  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21551  			break
 21552  		}
 21553  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21554  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21555  		v.reset(OpCopy)
 21556  		v.AddArg(v0)
 21557  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21558  		v1.AuxInt = i0
 21559  		v1.Aux = s
 21560  		v1.AddArg(p)
 21561  		v0.AddArg(v1)
 21562  		v0.AddArg(mem)
 21563  		return true
 21564  	}
 21565  	return false
 21566  }
 21567  func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
 21568  	b := v.Block
 21569  	_ = b
 21570  	config := b.Func.Config
 21571  	_ = config
 21572  	typ := &b.Func.Config.Types
 21573  	_ = typ
 21574  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21575  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21576  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21577  	for {
 21578  		t := v.Type
 21579  		_ = v.Args[1]
 21580  		x7 := v.Args[0]
 21581  		if x7.Op != OpPPC64MOVBZload {
 21582  			break
 21583  		}
 21584  		i7 := x7.AuxInt
 21585  		s := x7.Aux
 21586  		_ = x7.Args[1]
 21587  		p := x7.Args[0]
 21588  		mem := x7.Args[1]
 21589  		o5 := v.Args[1]
 21590  		if o5.Op != OpPPC64OR {
 21591  			break
 21592  		}
 21593  		if o5.Type != t {
 21594  			break
 21595  		}
 21596  		_ = o5.Args[1]
 21597  		s6 := o5.Args[0]
 21598  		if s6.Op != OpPPC64SLDconst {
 21599  			break
 21600  		}
 21601  		if s6.AuxInt != 8 {
 21602  			break
 21603  		}
 21604  		x6 := s6.Args[0]
 21605  		if x6.Op != OpPPC64MOVBZload {
 21606  			break
 21607  		}
 21608  		i6 := x6.AuxInt
 21609  		if x6.Aux != s {
 21610  			break
 21611  		}
 21612  		_ = x6.Args[1]
 21613  		if p != x6.Args[0] {
 21614  			break
 21615  		}
 21616  		if mem != x6.Args[1] {
 21617  			break
 21618  		}
 21619  		o4 := o5.Args[1]
 21620  		if o4.Op != OpPPC64OR {
 21621  			break
 21622  		}
 21623  		if o4.Type != t {
 21624  			break
 21625  		}
 21626  		_ = o4.Args[1]
 21627  		o3 := o4.Args[0]
 21628  		if o3.Op != OpPPC64OR {
 21629  			break
 21630  		}
 21631  		if o3.Type != t {
 21632  			break
 21633  		}
 21634  		_ = o3.Args[1]
 21635  		s4 := o3.Args[0]
 21636  		if s4.Op != OpPPC64SLDconst {
 21637  			break
 21638  		}
 21639  		if s4.AuxInt != 24 {
 21640  			break
 21641  		}
 21642  		x4 := s4.Args[0]
 21643  		if x4.Op != OpPPC64MOVBZload {
 21644  			break
 21645  		}
 21646  		i4 := x4.AuxInt
 21647  		if x4.Aux != s {
 21648  			break
 21649  		}
 21650  		_ = x4.Args[1]
 21651  		if p != x4.Args[0] {
 21652  			break
 21653  		}
 21654  		if mem != x4.Args[1] {
 21655  			break
 21656  		}
 21657  		s0 := o3.Args[1]
 21658  		if s0.Op != OpPPC64SLWconst {
 21659  			break
 21660  		}
 21661  		if s0.AuxInt != 32 {
 21662  			break
 21663  		}
 21664  		x3 := s0.Args[0]
 21665  		if x3.Op != OpPPC64MOVWBRload {
 21666  			break
 21667  		}
 21668  		if x3.Type != t {
 21669  			break
 21670  		}
 21671  		_ = x3.Args[1]
 21672  		x3_0 := x3.Args[0]
 21673  		if x3_0.Op != OpPPC64MOVDaddr {
 21674  			break
 21675  		}
 21676  		if x3_0.Type != typ.Uintptr {
 21677  			break
 21678  		}
 21679  		i0 := x3_0.AuxInt
 21680  		if x3_0.Aux != s {
 21681  			break
 21682  		}
 21683  		if p != x3_0.Args[0] {
 21684  			break
 21685  		}
 21686  		if mem != x3.Args[1] {
 21687  			break
 21688  		}
 21689  		s5 := o4.Args[1]
 21690  		if s5.Op != OpPPC64SLDconst {
 21691  			break
 21692  		}
 21693  		if s5.AuxInt != 16 {
 21694  			break
 21695  		}
 21696  		x5 := s5.Args[0]
 21697  		if x5.Op != OpPPC64MOVBZload {
 21698  			break
 21699  		}
 21700  		i5 := x5.AuxInt
 21701  		if x5.Aux != s {
 21702  			break
 21703  		}
 21704  		_ = x5.Args[1]
 21705  		if p != x5.Args[0] {
 21706  			break
 21707  		}
 21708  		if mem != x5.Args[1] {
 21709  			break
 21710  		}
 21711  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21712  			break
 21713  		}
 21714  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21715  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21716  		v.reset(OpCopy)
 21717  		v.AddArg(v0)
 21718  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21719  		v1.AuxInt = i0
 21720  		v1.Aux = s
 21721  		v1.AddArg(p)
 21722  		v0.AddArg(v1)
 21723  		v0.AddArg(mem)
 21724  		return true
 21725  	}
 21726  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21727  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21728  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21729  	for {
 21730  		t := v.Type
 21731  		_ = v.Args[1]
 21732  		x7 := v.Args[0]
 21733  		if x7.Op != OpPPC64MOVBZload {
 21734  			break
 21735  		}
 21736  		i7 := x7.AuxInt
 21737  		s := x7.Aux
 21738  		_ = x7.Args[1]
 21739  		p := x7.Args[0]
 21740  		mem := x7.Args[1]
 21741  		o5 := v.Args[1]
 21742  		if o5.Op != OpPPC64OR {
 21743  			break
 21744  		}
 21745  		if o5.Type != t {
 21746  			break
 21747  		}
 21748  		_ = o5.Args[1]
 21749  		s6 := o5.Args[0]
 21750  		if s6.Op != OpPPC64SLDconst {
 21751  			break
 21752  		}
 21753  		if s6.AuxInt != 8 {
 21754  			break
 21755  		}
 21756  		x6 := s6.Args[0]
 21757  		if x6.Op != OpPPC64MOVBZload {
 21758  			break
 21759  		}
 21760  		i6 := x6.AuxInt
 21761  		if x6.Aux != s {
 21762  			break
 21763  		}
 21764  		_ = x6.Args[1]
 21765  		if p != x6.Args[0] {
 21766  			break
 21767  		}
 21768  		if mem != x6.Args[1] {
 21769  			break
 21770  		}
 21771  		o4 := o5.Args[1]
 21772  		if o4.Op != OpPPC64OR {
 21773  			break
 21774  		}
 21775  		if o4.Type != t {
 21776  			break
 21777  		}
 21778  		_ = o4.Args[1]
 21779  		o3 := o4.Args[0]
 21780  		if o3.Op != OpPPC64OR {
 21781  			break
 21782  		}
 21783  		if o3.Type != t {
 21784  			break
 21785  		}
 21786  		_ = o3.Args[1]
 21787  		s0 := o3.Args[0]
 21788  		if s0.Op != OpPPC64SLWconst {
 21789  			break
 21790  		}
 21791  		if s0.AuxInt != 32 {
 21792  			break
 21793  		}
 21794  		x3 := s0.Args[0]
 21795  		if x3.Op != OpPPC64MOVWBRload {
 21796  			break
 21797  		}
 21798  		if x3.Type != t {
 21799  			break
 21800  		}
 21801  		_ = x3.Args[1]
 21802  		x3_0 := x3.Args[0]
 21803  		if x3_0.Op != OpPPC64MOVDaddr {
 21804  			break
 21805  		}
 21806  		if x3_0.Type != typ.Uintptr {
 21807  			break
 21808  		}
 21809  		i0 := x3_0.AuxInt
 21810  		if x3_0.Aux != s {
 21811  			break
 21812  		}
 21813  		if p != x3_0.Args[0] {
 21814  			break
 21815  		}
 21816  		if mem != x3.Args[1] {
 21817  			break
 21818  		}
 21819  		s4 := o3.Args[1]
 21820  		if s4.Op != OpPPC64SLDconst {
 21821  			break
 21822  		}
 21823  		if s4.AuxInt != 24 {
 21824  			break
 21825  		}
 21826  		x4 := s4.Args[0]
 21827  		if x4.Op != OpPPC64MOVBZload {
 21828  			break
 21829  		}
 21830  		i4 := x4.AuxInt
 21831  		if x4.Aux != s {
 21832  			break
 21833  		}
 21834  		_ = x4.Args[1]
 21835  		if p != x4.Args[0] {
 21836  			break
 21837  		}
 21838  		if mem != x4.Args[1] {
 21839  			break
 21840  		}
 21841  		s5 := o4.Args[1]
 21842  		if s5.Op != OpPPC64SLDconst {
 21843  			break
 21844  		}
 21845  		if s5.AuxInt != 16 {
 21846  			break
 21847  		}
 21848  		x5 := s5.Args[0]
 21849  		if x5.Op != OpPPC64MOVBZload {
 21850  			break
 21851  		}
 21852  		i5 := x5.AuxInt
 21853  		if x5.Aux != s {
 21854  			break
 21855  		}
 21856  		_ = x5.Args[1]
 21857  		if p != x5.Args[0] {
 21858  			break
 21859  		}
 21860  		if mem != x5.Args[1] {
 21861  			break
 21862  		}
 21863  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21864  			break
 21865  		}
 21866  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21867  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 21868  		v.reset(OpCopy)
 21869  		v.AddArg(v0)
 21870  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21871  		v1.AuxInt = i0
 21872  		v1.Aux = s
 21873  		v1.AddArg(p)
 21874  		v0.AddArg(v1)
 21875  		v0.AddArg(mem)
 21876  		return true
 21877  	}
 21878  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21879  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21880  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21881  	for {
 21882  		t := v.Type
 21883  		_ = v.Args[1]
 21884  		x7 := v.Args[0]
 21885  		if x7.Op != OpPPC64MOVBZload {
 21886  			break
 21887  		}
 21888  		i7 := x7.AuxInt
 21889  		s := x7.Aux
 21890  		_ = x7.Args[1]
 21891  		p := x7.Args[0]
 21892  		mem := x7.Args[1]
 21893  		o5 := v.Args[1]
 21894  		if o5.Op != OpPPC64OR {
 21895  			break
 21896  		}
 21897  		if o5.Type != t {
 21898  			break
 21899  		}
 21900  		_ = o5.Args[1]
 21901  		o4 := o5.Args[0]
 21902  		if o4.Op != OpPPC64OR {
 21903  			break
 21904  		}
 21905  		if o4.Type != t {
 21906  			break
 21907  		}
 21908  		_ = o4.Args[1]
 21909  		s5 := o4.Args[0]
 21910  		if s5.Op != OpPPC64SLDconst {
 21911  			break
 21912  		}
 21913  		if s5.AuxInt != 16 {
 21914  			break
 21915  		}
 21916  		x5 := s5.Args[0]
 21917  		if x5.Op != OpPPC64MOVBZload {
 21918  			break
 21919  		}
 21920  		i5 := x5.AuxInt
 21921  		if x5.Aux != s {
 21922  			break
 21923  		}
 21924  		_ = x5.Args[1]
 21925  		if p != x5.Args[0] {
 21926  			break
 21927  		}
 21928  		if mem != x5.Args[1] {
 21929  			break
 21930  		}
 21931  		o3 := o4.Args[1]
 21932  		if o3.Op != OpPPC64OR {
 21933  			break
 21934  		}
 21935  		if o3.Type != t {
 21936  			break
 21937  		}
 21938  		_ = o3.Args[1]
 21939  		s4 := o3.Args[0]
 21940  		if s4.Op != OpPPC64SLDconst {
 21941  			break
 21942  		}
 21943  		if s4.AuxInt != 24 {
 21944  			break
 21945  		}
 21946  		x4 := s4.Args[0]
 21947  		if x4.Op != OpPPC64MOVBZload {
 21948  			break
 21949  		}
 21950  		i4 := x4.AuxInt
 21951  		if x4.Aux != s {
 21952  			break
 21953  		}
 21954  		_ = x4.Args[1]
 21955  		if p != x4.Args[0] {
 21956  			break
 21957  		}
 21958  		if mem != x4.Args[1] {
 21959  			break
 21960  		}
 21961  		s0 := o3.Args[1]
 21962  		if s0.Op != OpPPC64SLWconst {
 21963  			break
 21964  		}
 21965  		if s0.AuxInt != 32 {
 21966  			break
 21967  		}
 21968  		x3 := s0.Args[0]
 21969  		if x3.Op != OpPPC64MOVWBRload {
 21970  			break
 21971  		}
 21972  		if x3.Type != t {
 21973  			break
 21974  		}
 21975  		_ = x3.Args[1]
 21976  		x3_0 := x3.Args[0]
 21977  		if x3_0.Op != OpPPC64MOVDaddr {
 21978  			break
 21979  		}
 21980  		if x3_0.Type != typ.Uintptr {
 21981  			break
 21982  		}
 21983  		i0 := x3_0.AuxInt
 21984  		if x3_0.Aux != s {
 21985  			break
 21986  		}
 21987  		if p != x3_0.Args[0] {
 21988  			break
 21989  		}
 21990  		if mem != x3.Args[1] {
 21991  			break
 21992  		}
 21993  		s6 := o5.Args[1]
 21994  		if s6.Op != OpPPC64SLDconst {
 21995  			break
 21996  		}
 21997  		if s6.AuxInt != 8 {
 21998  			break
 21999  		}
 22000  		x6 := s6.Args[0]
 22001  		if x6.Op != OpPPC64MOVBZload {
 22002  			break
 22003  		}
 22004  		i6 := x6.AuxInt
 22005  		if x6.Aux != s {
 22006  			break
 22007  		}
 22008  		_ = x6.Args[1]
 22009  		if p != x6.Args[0] {
 22010  			break
 22011  		}
 22012  		if mem != x6.Args[1] {
 22013  			break
 22014  		}
 22015  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22016  			break
 22017  		}
 22018  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22019  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22020  		v.reset(OpCopy)
 22021  		v.AddArg(v0)
 22022  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22023  		v1.AuxInt = i0
 22024  		v1.Aux = s
 22025  		v1.AddArg(p)
 22026  		v0.AddArg(v1)
 22027  		v0.AddArg(mem)
 22028  		return true
 22029  	}
 22030  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22031  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22032  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22033  	for {
 22034  		t := v.Type
 22035  		_ = v.Args[1]
 22036  		x7 := v.Args[0]
 22037  		if x7.Op != OpPPC64MOVBZload {
 22038  			break
 22039  		}
 22040  		i7 := x7.AuxInt
 22041  		s := x7.Aux
 22042  		_ = x7.Args[1]
 22043  		p := x7.Args[0]
 22044  		mem := x7.Args[1]
 22045  		o5 := v.Args[1]
 22046  		if o5.Op != OpPPC64OR {
 22047  			break
 22048  		}
 22049  		if o5.Type != t {
 22050  			break
 22051  		}
 22052  		_ = o5.Args[1]
 22053  		o4 := o5.Args[0]
 22054  		if o4.Op != OpPPC64OR {
 22055  			break
 22056  		}
 22057  		if o4.Type != t {
 22058  			break
 22059  		}
 22060  		_ = o4.Args[1]
 22061  		s5 := o4.Args[0]
 22062  		if s5.Op != OpPPC64SLDconst {
 22063  			break
 22064  		}
 22065  		if s5.AuxInt != 16 {
 22066  			break
 22067  		}
 22068  		x5 := s5.Args[0]
 22069  		if x5.Op != OpPPC64MOVBZload {
 22070  			break
 22071  		}
 22072  		i5 := x5.AuxInt
 22073  		if x5.Aux != s {
 22074  			break
 22075  		}
 22076  		_ = x5.Args[1]
 22077  		if p != x5.Args[0] {
 22078  			break
 22079  		}
 22080  		if mem != x5.Args[1] {
 22081  			break
 22082  		}
 22083  		o3 := o4.Args[1]
 22084  		if o3.Op != OpPPC64OR {
 22085  			break
 22086  		}
 22087  		if o3.Type != t {
 22088  			break
 22089  		}
 22090  		_ = o3.Args[1]
 22091  		s0 := o3.Args[0]
 22092  		if s0.Op != OpPPC64SLWconst {
 22093  			break
 22094  		}
 22095  		if s0.AuxInt != 32 {
 22096  			break
 22097  		}
 22098  		x3 := s0.Args[0]
 22099  		if x3.Op != OpPPC64MOVWBRload {
 22100  			break
 22101  		}
 22102  		if x3.Type != t {
 22103  			break
 22104  		}
 22105  		_ = x3.Args[1]
 22106  		x3_0 := x3.Args[0]
 22107  		if x3_0.Op != OpPPC64MOVDaddr {
 22108  			break
 22109  		}
 22110  		if x3_0.Type != typ.Uintptr {
 22111  			break
 22112  		}
 22113  		i0 := x3_0.AuxInt
 22114  		if x3_0.Aux != s {
 22115  			break
 22116  		}
 22117  		if p != x3_0.Args[0] {
 22118  			break
 22119  		}
 22120  		if mem != x3.Args[1] {
 22121  			break
 22122  		}
 22123  		s4 := o3.Args[1]
 22124  		if s4.Op != OpPPC64SLDconst {
 22125  			break
 22126  		}
 22127  		if s4.AuxInt != 24 {
 22128  			break
 22129  		}
 22130  		x4 := s4.Args[0]
 22131  		if x4.Op != OpPPC64MOVBZload {
 22132  			break
 22133  		}
 22134  		i4 := x4.AuxInt
 22135  		if x4.Aux != s {
 22136  			break
 22137  		}
 22138  		_ = x4.Args[1]
 22139  		if p != x4.Args[0] {
 22140  			break
 22141  		}
 22142  		if mem != x4.Args[1] {
 22143  			break
 22144  		}
 22145  		s6 := o5.Args[1]
 22146  		if s6.Op != OpPPC64SLDconst {
 22147  			break
 22148  		}
 22149  		if s6.AuxInt != 8 {
 22150  			break
 22151  		}
 22152  		x6 := s6.Args[0]
 22153  		if x6.Op != OpPPC64MOVBZload {
 22154  			break
 22155  		}
 22156  		i6 := x6.AuxInt
 22157  		if x6.Aux != s {
 22158  			break
 22159  		}
 22160  		_ = x6.Args[1]
 22161  		if p != x6.Args[0] {
 22162  			break
 22163  		}
 22164  		if mem != x6.Args[1] {
 22165  			break
 22166  		}
 22167  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22168  			break
 22169  		}
 22170  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22171  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22172  		v.reset(OpCopy)
 22173  		v.AddArg(v0)
 22174  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22175  		v1.AuxInt = i0
 22176  		v1.Aux = s
 22177  		v1.AddArg(p)
 22178  		v0.AddArg(v1)
 22179  		v0.AddArg(mem)
 22180  		return true
 22181  	}
 22182  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22183  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22184  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22185  	for {
 22186  		t := v.Type
 22187  		_ = v.Args[1]
 22188  		x7 := v.Args[0]
 22189  		if x7.Op != OpPPC64MOVBZload {
 22190  			break
 22191  		}
 22192  		i7 := x7.AuxInt
 22193  		s := x7.Aux
 22194  		_ = x7.Args[1]
 22195  		p := x7.Args[0]
 22196  		mem := x7.Args[1]
 22197  		o5 := v.Args[1]
 22198  		if o5.Op != OpPPC64OR {
 22199  			break
 22200  		}
 22201  		if o5.Type != t {
 22202  			break
 22203  		}
 22204  		_ = o5.Args[1]
 22205  		o4 := o5.Args[0]
 22206  		if o4.Op != OpPPC64OR {
 22207  			break
 22208  		}
 22209  		if o4.Type != t {
 22210  			break
 22211  		}
 22212  		_ = o4.Args[1]
 22213  		o3 := o4.Args[0]
 22214  		if o3.Op != OpPPC64OR {
 22215  			break
 22216  		}
 22217  		if o3.Type != t {
 22218  			break
 22219  		}
 22220  		_ = o3.Args[1]
 22221  		s4 := o3.Args[0]
 22222  		if s4.Op != OpPPC64SLDconst {
 22223  			break
 22224  		}
 22225  		if s4.AuxInt != 24 {
 22226  			break
 22227  		}
 22228  		x4 := s4.Args[0]
 22229  		if x4.Op != OpPPC64MOVBZload {
 22230  			break
 22231  		}
 22232  		i4 := x4.AuxInt
 22233  		if x4.Aux != s {
 22234  			break
 22235  		}
 22236  		_ = x4.Args[1]
 22237  		if p != x4.Args[0] {
 22238  			break
 22239  		}
 22240  		if mem != x4.Args[1] {
 22241  			break
 22242  		}
 22243  		s0 := o3.Args[1]
 22244  		if s0.Op != OpPPC64SLWconst {
 22245  			break
 22246  		}
 22247  		if s0.AuxInt != 32 {
 22248  			break
 22249  		}
 22250  		x3 := s0.Args[0]
 22251  		if x3.Op != OpPPC64MOVWBRload {
 22252  			break
 22253  		}
 22254  		if x3.Type != t {
 22255  			break
 22256  		}
 22257  		_ = x3.Args[1]
 22258  		x3_0 := x3.Args[0]
 22259  		if x3_0.Op != OpPPC64MOVDaddr {
 22260  			break
 22261  		}
 22262  		if x3_0.Type != typ.Uintptr {
 22263  			break
 22264  		}
 22265  		i0 := x3_0.AuxInt
 22266  		if x3_0.Aux != s {
 22267  			break
 22268  		}
 22269  		if p != x3_0.Args[0] {
 22270  			break
 22271  		}
 22272  		if mem != x3.Args[1] {
 22273  			break
 22274  		}
 22275  		s5 := o4.Args[1]
 22276  		if s5.Op != OpPPC64SLDconst {
 22277  			break
 22278  		}
 22279  		if s5.AuxInt != 16 {
 22280  			break
 22281  		}
 22282  		x5 := s5.Args[0]
 22283  		if x5.Op != OpPPC64MOVBZload {
 22284  			break
 22285  		}
 22286  		i5 := x5.AuxInt
 22287  		if x5.Aux != s {
 22288  			break
 22289  		}
 22290  		_ = x5.Args[1]
 22291  		if p != x5.Args[0] {
 22292  			break
 22293  		}
 22294  		if mem != x5.Args[1] {
 22295  			break
 22296  		}
 22297  		s6 := o5.Args[1]
 22298  		if s6.Op != OpPPC64SLDconst {
 22299  			break
 22300  		}
 22301  		if s6.AuxInt != 8 {
 22302  			break
 22303  		}
 22304  		x6 := s6.Args[0]
 22305  		if x6.Op != OpPPC64MOVBZload {
 22306  			break
 22307  		}
 22308  		i6 := x6.AuxInt
 22309  		if x6.Aux != s {
 22310  			break
 22311  		}
 22312  		_ = x6.Args[1]
 22313  		if p != x6.Args[0] {
 22314  			break
 22315  		}
 22316  		if mem != x6.Args[1] {
 22317  			break
 22318  		}
 22319  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22320  			break
 22321  		}
 22322  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22323  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22324  		v.reset(OpCopy)
 22325  		v.AddArg(v0)
 22326  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22327  		v1.AuxInt = i0
 22328  		v1.Aux = s
 22329  		v1.AddArg(p)
 22330  		v0.AddArg(v1)
 22331  		v0.AddArg(mem)
 22332  		return true
 22333  	}
 22334  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22335  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22336  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22337  	for {
 22338  		t := v.Type
 22339  		_ = v.Args[1]
 22340  		x7 := v.Args[0]
 22341  		if x7.Op != OpPPC64MOVBZload {
 22342  			break
 22343  		}
 22344  		i7 := x7.AuxInt
 22345  		s := x7.Aux
 22346  		_ = x7.Args[1]
 22347  		p := x7.Args[0]
 22348  		mem := x7.Args[1]
 22349  		o5 := v.Args[1]
 22350  		if o5.Op != OpPPC64OR {
 22351  			break
 22352  		}
 22353  		if o5.Type != t {
 22354  			break
 22355  		}
 22356  		_ = o5.Args[1]
 22357  		o4 := o5.Args[0]
 22358  		if o4.Op != OpPPC64OR {
 22359  			break
 22360  		}
 22361  		if o4.Type != t {
 22362  			break
 22363  		}
 22364  		_ = o4.Args[1]
 22365  		o3 := o4.Args[0]
 22366  		if o3.Op != OpPPC64OR {
 22367  			break
 22368  		}
 22369  		if o3.Type != t {
 22370  			break
 22371  		}
 22372  		_ = o3.Args[1]
 22373  		s0 := o3.Args[0]
 22374  		if s0.Op != OpPPC64SLWconst {
 22375  			break
 22376  		}
 22377  		if s0.AuxInt != 32 {
 22378  			break
 22379  		}
 22380  		x3 := s0.Args[0]
 22381  		if x3.Op != OpPPC64MOVWBRload {
 22382  			break
 22383  		}
 22384  		if x3.Type != t {
 22385  			break
 22386  		}
 22387  		_ = x3.Args[1]
 22388  		x3_0 := x3.Args[0]
 22389  		if x3_0.Op != OpPPC64MOVDaddr {
 22390  			break
 22391  		}
 22392  		if x3_0.Type != typ.Uintptr {
 22393  			break
 22394  		}
 22395  		i0 := x3_0.AuxInt
 22396  		if x3_0.Aux != s {
 22397  			break
 22398  		}
 22399  		if p != x3_0.Args[0] {
 22400  			break
 22401  		}
 22402  		if mem != x3.Args[1] {
 22403  			break
 22404  		}
 22405  		s4 := o3.Args[1]
 22406  		if s4.Op != OpPPC64SLDconst {
 22407  			break
 22408  		}
 22409  		if s4.AuxInt != 24 {
 22410  			break
 22411  		}
 22412  		x4 := s4.Args[0]
 22413  		if x4.Op != OpPPC64MOVBZload {
 22414  			break
 22415  		}
 22416  		i4 := x4.AuxInt
 22417  		if x4.Aux != s {
 22418  			break
 22419  		}
 22420  		_ = x4.Args[1]
 22421  		if p != x4.Args[0] {
 22422  			break
 22423  		}
 22424  		if mem != x4.Args[1] {
 22425  			break
 22426  		}
 22427  		s5 := o4.Args[1]
 22428  		if s5.Op != OpPPC64SLDconst {
 22429  			break
 22430  		}
 22431  		if s5.AuxInt != 16 {
 22432  			break
 22433  		}
 22434  		x5 := s5.Args[0]
 22435  		if x5.Op != OpPPC64MOVBZload {
 22436  			break
 22437  		}
 22438  		i5 := x5.AuxInt
 22439  		if x5.Aux != s {
 22440  			break
 22441  		}
 22442  		_ = x5.Args[1]
 22443  		if p != x5.Args[0] {
 22444  			break
 22445  		}
 22446  		if mem != x5.Args[1] {
 22447  			break
 22448  		}
 22449  		s6 := o5.Args[1]
 22450  		if s6.Op != OpPPC64SLDconst {
 22451  			break
 22452  		}
 22453  		if s6.AuxInt != 8 {
 22454  			break
 22455  		}
 22456  		x6 := s6.Args[0]
 22457  		if x6.Op != OpPPC64MOVBZload {
 22458  			break
 22459  		}
 22460  		i6 := x6.AuxInt
 22461  		if x6.Aux != s {
 22462  			break
 22463  		}
 22464  		_ = x6.Args[1]
 22465  		if p != x6.Args[0] {
 22466  			break
 22467  		}
 22468  		if mem != x6.Args[1] {
 22469  			break
 22470  		}
 22471  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22472  			break
 22473  		}
 22474  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22475  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22476  		v.reset(OpCopy)
 22477  		v.AddArg(v0)
 22478  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22479  		v1.AuxInt = i0
 22480  		v1.Aux = s
 22481  		v1.AddArg(p)
 22482  		v0.AddArg(v1)
 22483  		v0.AddArg(mem)
 22484  		return true
 22485  	}
 22486  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 22487  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22488  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22489  	for {
 22490  		t := v.Type
 22491  		_ = v.Args[1]
 22492  		o5 := v.Args[0]
 22493  		if o5.Op != OpPPC64OR {
 22494  			break
 22495  		}
 22496  		if o5.Type != t {
 22497  			break
 22498  		}
 22499  		_ = o5.Args[1]
 22500  		s6 := o5.Args[0]
 22501  		if s6.Op != OpPPC64SLDconst {
 22502  			break
 22503  		}
 22504  		if s6.AuxInt != 8 {
 22505  			break
 22506  		}
 22507  		x6 := s6.Args[0]
 22508  		if x6.Op != OpPPC64MOVBZload {
 22509  			break
 22510  		}
 22511  		i6 := x6.AuxInt
 22512  		s := x6.Aux
 22513  		_ = x6.Args[1]
 22514  		p := x6.Args[0]
 22515  		mem := x6.Args[1]
 22516  		o4 := o5.Args[1]
 22517  		if o4.Op != OpPPC64OR {
 22518  			break
 22519  		}
 22520  		if o4.Type != t {
 22521  			break
 22522  		}
 22523  		_ = o4.Args[1]
 22524  		s5 := o4.Args[0]
 22525  		if s5.Op != OpPPC64SLDconst {
 22526  			break
 22527  		}
 22528  		if s5.AuxInt != 16 {
 22529  			break
 22530  		}
 22531  		x5 := s5.Args[0]
 22532  		if x5.Op != OpPPC64MOVBZload {
 22533  			break
 22534  		}
 22535  		i5 := x5.AuxInt
 22536  		if x5.Aux != s {
 22537  			break
 22538  		}
 22539  		_ = x5.Args[1]
 22540  		if p != x5.Args[0] {
 22541  			break
 22542  		}
 22543  		if mem != x5.Args[1] {
 22544  			break
 22545  		}
 22546  		o3 := o4.Args[1]
 22547  		if o3.Op != OpPPC64OR {
 22548  			break
 22549  		}
 22550  		if o3.Type != t {
 22551  			break
 22552  		}
 22553  		_ = o3.Args[1]
 22554  		s4 := o3.Args[0]
 22555  		if s4.Op != OpPPC64SLDconst {
 22556  			break
 22557  		}
 22558  		if s4.AuxInt != 24 {
 22559  			break
 22560  		}
 22561  		x4 := s4.Args[0]
 22562  		if x4.Op != OpPPC64MOVBZload {
 22563  			break
 22564  		}
 22565  		i4 := x4.AuxInt
 22566  		if x4.Aux != s {
 22567  			break
 22568  		}
 22569  		_ = x4.Args[1]
 22570  		if p != x4.Args[0] {
 22571  			break
 22572  		}
 22573  		if mem != x4.Args[1] {
 22574  			break
 22575  		}
 22576  		s0 := o3.Args[1]
 22577  		if s0.Op != OpPPC64SLWconst {
 22578  			break
 22579  		}
 22580  		if s0.AuxInt != 32 {
 22581  			break
 22582  		}
 22583  		x3 := s0.Args[0]
 22584  		if x3.Op != OpPPC64MOVWBRload {
 22585  			break
 22586  		}
 22587  		if x3.Type != t {
 22588  			break
 22589  		}
 22590  		_ = x3.Args[1]
 22591  		x3_0 := x3.Args[0]
 22592  		if x3_0.Op != OpPPC64MOVDaddr {
 22593  			break
 22594  		}
 22595  		if x3_0.Type != typ.Uintptr {
 22596  			break
 22597  		}
 22598  		i0 := x3_0.AuxInt
 22599  		if x3_0.Aux != s {
 22600  			break
 22601  		}
 22602  		if p != x3_0.Args[0] {
 22603  			break
 22604  		}
 22605  		if mem != x3.Args[1] {
 22606  			break
 22607  		}
 22608  		x7 := v.Args[1]
 22609  		if x7.Op != OpPPC64MOVBZload {
 22610  			break
 22611  		}
 22612  		i7 := x7.AuxInt
 22613  		if x7.Aux != s {
 22614  			break
 22615  		}
 22616  		_ = x7.Args[1]
 22617  		if p != x7.Args[0] {
 22618  			break
 22619  		}
 22620  		if mem != x7.Args[1] {
 22621  			break
 22622  		}
 22623  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22624  			break
 22625  		}
 22626  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22627  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22628  		v.reset(OpCopy)
 22629  		v.AddArg(v0)
 22630  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22631  		v1.AuxInt = i0
 22632  		v1.Aux = s
 22633  		v1.AddArg(p)
 22634  		v0.AddArg(v1)
 22635  		v0.AddArg(mem)
 22636  		return true
 22637  	}
 22638  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 22639  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22640  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22641  	for {
 22642  		t := v.Type
 22643  		_ = v.Args[1]
 22644  		o5 := v.Args[0]
 22645  		if o5.Op != OpPPC64OR {
 22646  			break
 22647  		}
 22648  		if o5.Type != t {
 22649  			break
 22650  		}
 22651  		_ = o5.Args[1]
 22652  		s6 := o5.Args[0]
 22653  		if s6.Op != OpPPC64SLDconst {
 22654  			break
 22655  		}
 22656  		if s6.AuxInt != 8 {
 22657  			break
 22658  		}
 22659  		x6 := s6.Args[0]
 22660  		if x6.Op != OpPPC64MOVBZload {
 22661  			break
 22662  		}
 22663  		i6 := x6.AuxInt
 22664  		s := x6.Aux
 22665  		_ = x6.Args[1]
 22666  		p := x6.Args[0]
 22667  		mem := x6.Args[1]
 22668  		o4 := o5.Args[1]
 22669  		if o4.Op != OpPPC64OR {
 22670  			break
 22671  		}
 22672  		if o4.Type != t {
 22673  			break
 22674  		}
 22675  		_ = o4.Args[1]
 22676  		s5 := o4.Args[0]
 22677  		if s5.Op != OpPPC64SLDconst {
 22678  			break
 22679  		}
 22680  		if s5.AuxInt != 16 {
 22681  			break
 22682  		}
 22683  		x5 := s5.Args[0]
 22684  		if x5.Op != OpPPC64MOVBZload {
 22685  			break
 22686  		}
 22687  		i5 := x5.AuxInt
 22688  		if x5.Aux != s {
 22689  			break
 22690  		}
 22691  		_ = x5.Args[1]
 22692  		if p != x5.Args[0] {
 22693  			break
 22694  		}
 22695  		if mem != x5.Args[1] {
 22696  			break
 22697  		}
 22698  		o3 := o4.Args[1]
 22699  		if o3.Op != OpPPC64OR {
 22700  			break
 22701  		}
 22702  		if o3.Type != t {
 22703  			break
 22704  		}
 22705  		_ = o3.Args[1]
 22706  		s0 := o3.Args[0]
 22707  		if s0.Op != OpPPC64SLWconst {
 22708  			break
 22709  		}
 22710  		if s0.AuxInt != 32 {
 22711  			break
 22712  		}
 22713  		x3 := s0.Args[0]
 22714  		if x3.Op != OpPPC64MOVWBRload {
 22715  			break
 22716  		}
 22717  		if x3.Type != t {
 22718  			break
 22719  		}
 22720  		_ = x3.Args[1]
 22721  		x3_0 := x3.Args[0]
 22722  		if x3_0.Op != OpPPC64MOVDaddr {
 22723  			break
 22724  		}
 22725  		if x3_0.Type != typ.Uintptr {
 22726  			break
 22727  		}
 22728  		i0 := x3_0.AuxInt
 22729  		if x3_0.Aux != s {
 22730  			break
 22731  		}
 22732  		if p != x3_0.Args[0] {
 22733  			break
 22734  		}
 22735  		if mem != x3.Args[1] {
 22736  			break
 22737  		}
 22738  		s4 := o3.Args[1]
 22739  		if s4.Op != OpPPC64SLDconst {
 22740  			break
 22741  		}
 22742  		if s4.AuxInt != 24 {
 22743  			break
 22744  		}
 22745  		x4 := s4.Args[0]
 22746  		if x4.Op != OpPPC64MOVBZload {
 22747  			break
 22748  		}
 22749  		i4 := x4.AuxInt
 22750  		if x4.Aux != s {
 22751  			break
 22752  		}
 22753  		_ = x4.Args[1]
 22754  		if p != x4.Args[0] {
 22755  			break
 22756  		}
 22757  		if mem != x4.Args[1] {
 22758  			break
 22759  		}
 22760  		x7 := v.Args[1]
 22761  		if x7.Op != OpPPC64MOVBZload {
 22762  			break
 22763  		}
 22764  		i7 := x7.AuxInt
 22765  		if x7.Aux != s {
 22766  			break
 22767  		}
 22768  		_ = x7.Args[1]
 22769  		if p != x7.Args[0] {
 22770  			break
 22771  		}
 22772  		if mem != x7.Args[1] {
 22773  			break
 22774  		}
 22775  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22776  			break
 22777  		}
 22778  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22779  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22780  		v.reset(OpCopy)
 22781  		v.AddArg(v0)
 22782  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22783  		v1.AuxInt = i0
 22784  		v1.Aux = s
 22785  		v1.AddArg(p)
 22786  		v0.AddArg(v1)
 22787  		v0.AddArg(mem)
 22788  		return true
 22789  	}
 22790  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22791  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22792  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22793  	for {
 22794  		t := v.Type
 22795  		_ = v.Args[1]
 22796  		o5 := v.Args[0]
 22797  		if o5.Op != OpPPC64OR {
 22798  			break
 22799  		}
 22800  		if o5.Type != t {
 22801  			break
 22802  		}
 22803  		_ = o5.Args[1]
 22804  		s6 := o5.Args[0]
 22805  		if s6.Op != OpPPC64SLDconst {
 22806  			break
 22807  		}
 22808  		if s6.AuxInt != 8 {
 22809  			break
 22810  		}
 22811  		x6 := s6.Args[0]
 22812  		if x6.Op != OpPPC64MOVBZload {
 22813  			break
 22814  		}
 22815  		i6 := x6.AuxInt
 22816  		s := x6.Aux
 22817  		_ = x6.Args[1]
 22818  		p := x6.Args[0]
 22819  		mem := x6.Args[1]
 22820  		o4 := o5.Args[1]
 22821  		if o4.Op != OpPPC64OR {
 22822  			break
 22823  		}
 22824  		if o4.Type != t {
 22825  			break
 22826  		}
 22827  		_ = o4.Args[1]
 22828  		o3 := o4.Args[0]
 22829  		if o3.Op != OpPPC64OR {
 22830  			break
 22831  		}
 22832  		if o3.Type != t {
 22833  			break
 22834  		}
 22835  		_ = o3.Args[1]
 22836  		s4 := o3.Args[0]
 22837  		if s4.Op != OpPPC64SLDconst {
 22838  			break
 22839  		}
 22840  		if s4.AuxInt != 24 {
 22841  			break
 22842  		}
 22843  		x4 := s4.Args[0]
 22844  		if x4.Op != OpPPC64MOVBZload {
 22845  			break
 22846  		}
 22847  		i4 := x4.AuxInt
 22848  		if x4.Aux != s {
 22849  			break
 22850  		}
 22851  		_ = x4.Args[1]
 22852  		if p != x4.Args[0] {
 22853  			break
 22854  		}
 22855  		if mem != x4.Args[1] {
 22856  			break
 22857  		}
 22858  		s0 := o3.Args[1]
 22859  		if s0.Op != OpPPC64SLWconst {
 22860  			break
 22861  		}
 22862  		if s0.AuxInt != 32 {
 22863  			break
 22864  		}
 22865  		x3 := s0.Args[0]
 22866  		if x3.Op != OpPPC64MOVWBRload {
 22867  			break
 22868  		}
 22869  		if x3.Type != t {
 22870  			break
 22871  		}
 22872  		_ = x3.Args[1]
 22873  		x3_0 := x3.Args[0]
 22874  		if x3_0.Op != OpPPC64MOVDaddr {
 22875  			break
 22876  		}
 22877  		if x3_0.Type != typ.Uintptr {
 22878  			break
 22879  		}
 22880  		i0 := x3_0.AuxInt
 22881  		if x3_0.Aux != s {
 22882  			break
 22883  		}
 22884  		if p != x3_0.Args[0] {
 22885  			break
 22886  		}
 22887  		if mem != x3.Args[1] {
 22888  			break
 22889  		}
 22890  		s5 := o4.Args[1]
 22891  		if s5.Op != OpPPC64SLDconst {
 22892  			break
 22893  		}
 22894  		if s5.AuxInt != 16 {
 22895  			break
 22896  		}
 22897  		x5 := s5.Args[0]
 22898  		if x5.Op != OpPPC64MOVBZload {
 22899  			break
 22900  		}
 22901  		i5 := x5.AuxInt
 22902  		if x5.Aux != s {
 22903  			break
 22904  		}
 22905  		_ = x5.Args[1]
 22906  		if p != x5.Args[0] {
 22907  			break
 22908  		}
 22909  		if mem != x5.Args[1] {
 22910  			break
 22911  		}
 22912  		x7 := v.Args[1]
 22913  		if x7.Op != OpPPC64MOVBZload {
 22914  			break
 22915  		}
 22916  		i7 := x7.AuxInt
 22917  		if x7.Aux != s {
 22918  			break
 22919  		}
 22920  		_ = x7.Args[1]
 22921  		if p != x7.Args[0] {
 22922  			break
 22923  		}
 22924  		if mem != x7.Args[1] {
 22925  			break
 22926  		}
 22927  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22928  			break
 22929  		}
 22930  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22931  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 22932  		v.reset(OpCopy)
 22933  		v.AddArg(v0)
 22934  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22935  		v1.AuxInt = i0
 22936  		v1.Aux = s
 22937  		v1.AddArg(p)
 22938  		v0.AddArg(v1)
 22939  		v0.AddArg(mem)
 22940  		return true
 22941  	}
 22942  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22943  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22944  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22945  	for {
 22946  		t := v.Type
 22947  		_ = v.Args[1]
 22948  		o5 := v.Args[0]
 22949  		if o5.Op != OpPPC64OR {
 22950  			break
 22951  		}
 22952  		if o5.Type != t {
 22953  			break
 22954  		}
 22955  		_ = o5.Args[1]
 22956  		s6 := o5.Args[0]
 22957  		if s6.Op != OpPPC64SLDconst {
 22958  			break
 22959  		}
 22960  		if s6.AuxInt != 8 {
 22961  			break
 22962  		}
 22963  		x6 := s6.Args[0]
 22964  		if x6.Op != OpPPC64MOVBZload {
 22965  			break
 22966  		}
 22967  		i6 := x6.AuxInt
 22968  		s := x6.Aux
 22969  		_ = x6.Args[1]
 22970  		p := x6.Args[0]
 22971  		mem := x6.Args[1]
 22972  		o4 := o5.Args[1]
 22973  		if o4.Op != OpPPC64OR {
 22974  			break
 22975  		}
 22976  		if o4.Type != t {
 22977  			break
 22978  		}
 22979  		_ = o4.Args[1]
 22980  		o3 := o4.Args[0]
 22981  		if o3.Op != OpPPC64OR {
 22982  			break
 22983  		}
 22984  		if o3.Type != t {
 22985  			break
 22986  		}
 22987  		_ = o3.Args[1]
 22988  		s0 := o3.Args[0]
 22989  		if s0.Op != OpPPC64SLWconst {
 22990  			break
 22991  		}
 22992  		if s0.AuxInt != 32 {
 22993  			break
 22994  		}
 22995  		x3 := s0.Args[0]
 22996  		if x3.Op != OpPPC64MOVWBRload {
 22997  			break
 22998  		}
 22999  		if x3.Type != t {
 23000  			break
 23001  		}
 23002  		_ = x3.Args[1]
 23003  		x3_0 := x3.Args[0]
 23004  		if x3_0.Op != OpPPC64MOVDaddr {
 23005  			break
 23006  		}
 23007  		if x3_0.Type != typ.Uintptr {
 23008  			break
 23009  		}
 23010  		i0 := x3_0.AuxInt
 23011  		if x3_0.Aux != s {
 23012  			break
 23013  		}
 23014  		if p != x3_0.Args[0] {
 23015  			break
 23016  		}
 23017  		if mem != x3.Args[1] {
 23018  			break
 23019  		}
 23020  		s4 := o3.Args[1]
 23021  		if s4.Op != OpPPC64SLDconst {
 23022  			break
 23023  		}
 23024  		if s4.AuxInt != 24 {
 23025  			break
 23026  		}
 23027  		x4 := s4.Args[0]
 23028  		if x4.Op != OpPPC64MOVBZload {
 23029  			break
 23030  		}
 23031  		i4 := x4.AuxInt
 23032  		if x4.Aux != s {
 23033  			break
 23034  		}
 23035  		_ = x4.Args[1]
 23036  		if p != x4.Args[0] {
 23037  			break
 23038  		}
 23039  		if mem != x4.Args[1] {
 23040  			break
 23041  		}
 23042  		s5 := o4.Args[1]
 23043  		if s5.Op != OpPPC64SLDconst {
 23044  			break
 23045  		}
 23046  		if s5.AuxInt != 16 {
 23047  			break
 23048  		}
 23049  		x5 := s5.Args[0]
 23050  		if x5.Op != OpPPC64MOVBZload {
 23051  			break
 23052  		}
 23053  		i5 := x5.AuxInt
 23054  		if x5.Aux != s {
 23055  			break
 23056  		}
 23057  		_ = x5.Args[1]
 23058  		if p != x5.Args[0] {
 23059  			break
 23060  		}
 23061  		if mem != x5.Args[1] {
 23062  			break
 23063  		}
 23064  		x7 := v.Args[1]
 23065  		if x7.Op != OpPPC64MOVBZload {
 23066  			break
 23067  		}
 23068  		i7 := x7.AuxInt
 23069  		if x7.Aux != s {
 23070  			break
 23071  		}
 23072  		_ = x7.Args[1]
 23073  		if p != x7.Args[0] {
 23074  			break
 23075  		}
 23076  		if mem != x7.Args[1] {
 23077  			break
 23078  		}
 23079  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23080  			break
 23081  		}
 23082  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23083  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23084  		v.reset(OpCopy)
 23085  		v.AddArg(v0)
 23086  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23087  		v1.AuxInt = i0
 23088  		v1.Aux = s
 23089  		v1.AddArg(p)
 23090  		v0.AddArg(v1)
 23091  		v0.AddArg(mem)
 23092  		return true
 23093  	}
 23094  	return false
 23095  }
 23096  func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
 23097  	b := v.Block
 23098  	_ = b
 23099  	config := b.Func.Config
 23100  	_ = config
 23101  	typ := &b.Func.Config.Types
 23102  	_ = typ
 23103  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23104  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23105  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23106  	for {
 23107  		t := v.Type
 23108  		_ = v.Args[1]
 23109  		o5 := v.Args[0]
 23110  		if o5.Op != OpPPC64OR {
 23111  			break
 23112  		}
 23113  		if o5.Type != t {
 23114  			break
 23115  		}
 23116  		_ = o5.Args[1]
 23117  		o4 := o5.Args[0]
 23118  		if o4.Op != OpPPC64OR {
 23119  			break
 23120  		}
 23121  		if o4.Type != t {
 23122  			break
 23123  		}
 23124  		_ = o4.Args[1]
 23125  		s5 := o4.Args[0]
 23126  		if s5.Op != OpPPC64SLDconst {
 23127  			break
 23128  		}
 23129  		if s5.AuxInt != 16 {
 23130  			break
 23131  		}
 23132  		x5 := s5.Args[0]
 23133  		if x5.Op != OpPPC64MOVBZload {
 23134  			break
 23135  		}
 23136  		i5 := x5.AuxInt
 23137  		s := x5.Aux
 23138  		_ = x5.Args[1]
 23139  		p := x5.Args[0]
 23140  		mem := x5.Args[1]
 23141  		o3 := o4.Args[1]
 23142  		if o3.Op != OpPPC64OR {
 23143  			break
 23144  		}
 23145  		if o3.Type != t {
 23146  			break
 23147  		}
 23148  		_ = o3.Args[1]
 23149  		s4 := o3.Args[0]
 23150  		if s4.Op != OpPPC64SLDconst {
 23151  			break
 23152  		}
 23153  		if s4.AuxInt != 24 {
 23154  			break
 23155  		}
 23156  		x4 := s4.Args[0]
 23157  		if x4.Op != OpPPC64MOVBZload {
 23158  			break
 23159  		}
 23160  		i4 := x4.AuxInt
 23161  		if x4.Aux != s {
 23162  			break
 23163  		}
 23164  		_ = x4.Args[1]
 23165  		if p != x4.Args[0] {
 23166  			break
 23167  		}
 23168  		if mem != x4.Args[1] {
 23169  			break
 23170  		}
 23171  		s0 := o3.Args[1]
 23172  		if s0.Op != OpPPC64SLWconst {
 23173  			break
 23174  		}
 23175  		if s0.AuxInt != 32 {
 23176  			break
 23177  		}
 23178  		x3 := s0.Args[0]
 23179  		if x3.Op != OpPPC64MOVWBRload {
 23180  			break
 23181  		}
 23182  		if x3.Type != t {
 23183  			break
 23184  		}
 23185  		_ = x3.Args[1]
 23186  		x3_0 := x3.Args[0]
 23187  		if x3_0.Op != OpPPC64MOVDaddr {
 23188  			break
 23189  		}
 23190  		if x3_0.Type != typ.Uintptr {
 23191  			break
 23192  		}
 23193  		i0 := x3_0.AuxInt
 23194  		if x3_0.Aux != s {
 23195  			break
 23196  		}
 23197  		if p != x3_0.Args[0] {
 23198  			break
 23199  		}
 23200  		if mem != x3.Args[1] {
 23201  			break
 23202  		}
 23203  		s6 := o5.Args[1]
 23204  		if s6.Op != OpPPC64SLDconst {
 23205  			break
 23206  		}
 23207  		if s6.AuxInt != 8 {
 23208  			break
 23209  		}
 23210  		x6 := s6.Args[0]
 23211  		if x6.Op != OpPPC64MOVBZload {
 23212  			break
 23213  		}
 23214  		i6 := x6.AuxInt
 23215  		if x6.Aux != s {
 23216  			break
 23217  		}
 23218  		_ = x6.Args[1]
 23219  		if p != x6.Args[0] {
 23220  			break
 23221  		}
 23222  		if mem != x6.Args[1] {
 23223  			break
 23224  		}
 23225  		x7 := v.Args[1]
 23226  		if x7.Op != OpPPC64MOVBZload {
 23227  			break
 23228  		}
 23229  		i7 := x7.AuxInt
 23230  		if x7.Aux != s {
 23231  			break
 23232  		}
 23233  		_ = x7.Args[1]
 23234  		if p != x7.Args[0] {
 23235  			break
 23236  		}
 23237  		if mem != x7.Args[1] {
 23238  			break
 23239  		}
 23240  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23241  			break
 23242  		}
 23243  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23244  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23245  		v.reset(OpCopy)
 23246  		v.AddArg(v0)
 23247  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23248  		v1.AuxInt = i0
 23249  		v1.Aux = s
 23250  		v1.AddArg(p)
 23251  		v0.AddArg(v1)
 23252  		v0.AddArg(mem)
 23253  		return true
 23254  	}
 23255  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23256  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23257  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23258  	for {
 23259  		t := v.Type
 23260  		_ = v.Args[1]
 23261  		o5 := v.Args[0]
 23262  		if o5.Op != OpPPC64OR {
 23263  			break
 23264  		}
 23265  		if o5.Type != t {
 23266  			break
 23267  		}
 23268  		_ = o5.Args[1]
 23269  		o4 := o5.Args[0]
 23270  		if o4.Op != OpPPC64OR {
 23271  			break
 23272  		}
 23273  		if o4.Type != t {
 23274  			break
 23275  		}
 23276  		_ = o4.Args[1]
 23277  		s5 := o4.Args[0]
 23278  		if s5.Op != OpPPC64SLDconst {
 23279  			break
 23280  		}
 23281  		if s5.AuxInt != 16 {
 23282  			break
 23283  		}
 23284  		x5 := s5.Args[0]
 23285  		if x5.Op != OpPPC64MOVBZload {
 23286  			break
 23287  		}
 23288  		i5 := x5.AuxInt
 23289  		s := x5.Aux
 23290  		_ = x5.Args[1]
 23291  		p := x5.Args[0]
 23292  		mem := x5.Args[1]
 23293  		o3 := o4.Args[1]
 23294  		if o3.Op != OpPPC64OR {
 23295  			break
 23296  		}
 23297  		if o3.Type != t {
 23298  			break
 23299  		}
 23300  		_ = o3.Args[1]
 23301  		s0 := o3.Args[0]
 23302  		if s0.Op != OpPPC64SLWconst {
 23303  			break
 23304  		}
 23305  		if s0.AuxInt != 32 {
 23306  			break
 23307  		}
 23308  		x3 := s0.Args[0]
 23309  		if x3.Op != OpPPC64MOVWBRload {
 23310  			break
 23311  		}
 23312  		if x3.Type != t {
 23313  			break
 23314  		}
 23315  		_ = x3.Args[1]
 23316  		x3_0 := x3.Args[0]
 23317  		if x3_0.Op != OpPPC64MOVDaddr {
 23318  			break
 23319  		}
 23320  		if x3_0.Type != typ.Uintptr {
 23321  			break
 23322  		}
 23323  		i0 := x3_0.AuxInt
 23324  		if x3_0.Aux != s {
 23325  			break
 23326  		}
 23327  		if p != x3_0.Args[0] {
 23328  			break
 23329  		}
 23330  		if mem != x3.Args[1] {
 23331  			break
 23332  		}
 23333  		s4 := o3.Args[1]
 23334  		if s4.Op != OpPPC64SLDconst {
 23335  			break
 23336  		}
 23337  		if s4.AuxInt != 24 {
 23338  			break
 23339  		}
 23340  		x4 := s4.Args[0]
 23341  		if x4.Op != OpPPC64MOVBZload {
 23342  			break
 23343  		}
 23344  		i4 := x4.AuxInt
 23345  		if x4.Aux != s {
 23346  			break
 23347  		}
 23348  		_ = x4.Args[1]
 23349  		if p != x4.Args[0] {
 23350  			break
 23351  		}
 23352  		if mem != x4.Args[1] {
 23353  			break
 23354  		}
 23355  		s6 := o5.Args[1]
 23356  		if s6.Op != OpPPC64SLDconst {
 23357  			break
 23358  		}
 23359  		if s6.AuxInt != 8 {
 23360  			break
 23361  		}
 23362  		x6 := s6.Args[0]
 23363  		if x6.Op != OpPPC64MOVBZload {
 23364  			break
 23365  		}
 23366  		i6 := x6.AuxInt
 23367  		if x6.Aux != s {
 23368  			break
 23369  		}
 23370  		_ = x6.Args[1]
 23371  		if p != x6.Args[0] {
 23372  			break
 23373  		}
 23374  		if mem != x6.Args[1] {
 23375  			break
 23376  		}
 23377  		x7 := v.Args[1]
 23378  		if x7.Op != OpPPC64MOVBZload {
 23379  			break
 23380  		}
 23381  		i7 := x7.AuxInt
 23382  		if x7.Aux != s {
 23383  			break
 23384  		}
 23385  		_ = x7.Args[1]
 23386  		if p != x7.Args[0] {
 23387  			break
 23388  		}
 23389  		if mem != x7.Args[1] {
 23390  			break
 23391  		}
 23392  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23393  			break
 23394  		}
 23395  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23396  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23397  		v.reset(OpCopy)
 23398  		v.AddArg(v0)
 23399  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23400  		v1.AuxInt = i0
 23401  		v1.Aux = s
 23402  		v1.AddArg(p)
 23403  		v0.AddArg(v1)
 23404  		v0.AddArg(mem)
 23405  		return true
 23406  	}
 23407  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23408  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23409  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23410  	for {
 23411  		t := v.Type
 23412  		_ = v.Args[1]
 23413  		o5 := v.Args[0]
 23414  		if o5.Op != OpPPC64OR {
 23415  			break
 23416  		}
 23417  		if o5.Type != t {
 23418  			break
 23419  		}
 23420  		_ = o5.Args[1]
 23421  		o4 := o5.Args[0]
 23422  		if o4.Op != OpPPC64OR {
 23423  			break
 23424  		}
 23425  		if o4.Type != t {
 23426  			break
 23427  		}
 23428  		_ = o4.Args[1]
 23429  		o3 := o4.Args[0]
 23430  		if o3.Op != OpPPC64OR {
 23431  			break
 23432  		}
 23433  		if o3.Type != t {
 23434  			break
 23435  		}
 23436  		_ = o3.Args[1]
 23437  		s4 := o3.Args[0]
 23438  		if s4.Op != OpPPC64SLDconst {
 23439  			break
 23440  		}
 23441  		if s4.AuxInt != 24 {
 23442  			break
 23443  		}
 23444  		x4 := s4.Args[0]
 23445  		if x4.Op != OpPPC64MOVBZload {
 23446  			break
 23447  		}
 23448  		i4 := x4.AuxInt
 23449  		s := x4.Aux
 23450  		_ = x4.Args[1]
 23451  		p := x4.Args[0]
 23452  		mem := x4.Args[1]
 23453  		s0 := o3.Args[1]
 23454  		if s0.Op != OpPPC64SLWconst {
 23455  			break
 23456  		}
 23457  		if s0.AuxInt != 32 {
 23458  			break
 23459  		}
 23460  		x3 := s0.Args[0]
 23461  		if x3.Op != OpPPC64MOVWBRload {
 23462  			break
 23463  		}
 23464  		if x3.Type != t {
 23465  			break
 23466  		}
 23467  		_ = x3.Args[1]
 23468  		x3_0 := x3.Args[0]
 23469  		if x3_0.Op != OpPPC64MOVDaddr {
 23470  			break
 23471  		}
 23472  		if x3_0.Type != typ.Uintptr {
 23473  			break
 23474  		}
 23475  		i0 := x3_0.AuxInt
 23476  		if x3_0.Aux != s {
 23477  			break
 23478  		}
 23479  		if p != x3_0.Args[0] {
 23480  			break
 23481  		}
 23482  		if mem != x3.Args[1] {
 23483  			break
 23484  		}
 23485  		s5 := o4.Args[1]
 23486  		if s5.Op != OpPPC64SLDconst {
 23487  			break
 23488  		}
 23489  		if s5.AuxInt != 16 {
 23490  			break
 23491  		}
 23492  		x5 := s5.Args[0]
 23493  		if x5.Op != OpPPC64MOVBZload {
 23494  			break
 23495  		}
 23496  		i5 := x5.AuxInt
 23497  		if x5.Aux != s {
 23498  			break
 23499  		}
 23500  		_ = x5.Args[1]
 23501  		if p != x5.Args[0] {
 23502  			break
 23503  		}
 23504  		if mem != x5.Args[1] {
 23505  			break
 23506  		}
 23507  		s6 := o5.Args[1]
 23508  		if s6.Op != OpPPC64SLDconst {
 23509  			break
 23510  		}
 23511  		if s6.AuxInt != 8 {
 23512  			break
 23513  		}
 23514  		x6 := s6.Args[0]
 23515  		if x6.Op != OpPPC64MOVBZload {
 23516  			break
 23517  		}
 23518  		i6 := x6.AuxInt
 23519  		if x6.Aux != s {
 23520  			break
 23521  		}
 23522  		_ = x6.Args[1]
 23523  		if p != x6.Args[0] {
 23524  			break
 23525  		}
 23526  		if mem != x6.Args[1] {
 23527  			break
 23528  		}
 23529  		x7 := v.Args[1]
 23530  		if x7.Op != OpPPC64MOVBZload {
 23531  			break
 23532  		}
 23533  		i7 := x7.AuxInt
 23534  		if x7.Aux != s {
 23535  			break
 23536  		}
 23537  		_ = x7.Args[1]
 23538  		if p != x7.Args[0] {
 23539  			break
 23540  		}
 23541  		if mem != x7.Args[1] {
 23542  			break
 23543  		}
 23544  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23545  			break
 23546  		}
 23547  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23548  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23549  		v.reset(OpCopy)
 23550  		v.AddArg(v0)
 23551  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23552  		v1.AuxInt = i0
 23553  		v1.Aux = s
 23554  		v1.AddArg(p)
 23555  		v0.AddArg(v1)
 23556  		v0.AddArg(mem)
 23557  		return true
 23558  	}
 23559  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23560  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23561  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23562  	for {
 23563  		t := v.Type
 23564  		_ = v.Args[1]
 23565  		o5 := v.Args[0]
 23566  		if o5.Op != OpPPC64OR {
 23567  			break
 23568  		}
 23569  		if o5.Type != t {
 23570  			break
 23571  		}
 23572  		_ = o5.Args[1]
 23573  		o4 := o5.Args[0]
 23574  		if o4.Op != OpPPC64OR {
 23575  			break
 23576  		}
 23577  		if o4.Type != t {
 23578  			break
 23579  		}
 23580  		_ = o4.Args[1]
 23581  		o3 := o4.Args[0]
 23582  		if o3.Op != OpPPC64OR {
 23583  			break
 23584  		}
 23585  		if o3.Type != t {
 23586  			break
 23587  		}
 23588  		_ = o3.Args[1]
 23589  		s0 := o3.Args[0]
 23590  		if s0.Op != OpPPC64SLWconst {
 23591  			break
 23592  		}
 23593  		if s0.AuxInt != 32 {
 23594  			break
 23595  		}
 23596  		x3 := s0.Args[0]
 23597  		if x3.Op != OpPPC64MOVWBRload {
 23598  			break
 23599  		}
 23600  		if x3.Type != t {
 23601  			break
 23602  		}
 23603  		_ = x3.Args[1]
 23604  		x3_0 := x3.Args[0]
 23605  		if x3_0.Op != OpPPC64MOVDaddr {
 23606  			break
 23607  		}
 23608  		if x3_0.Type != typ.Uintptr {
 23609  			break
 23610  		}
 23611  		i0 := x3_0.AuxInt
 23612  		s := x3_0.Aux
 23613  		p := x3_0.Args[0]
 23614  		mem := x3.Args[1]
 23615  		s4 := o3.Args[1]
 23616  		if s4.Op != OpPPC64SLDconst {
 23617  			break
 23618  		}
 23619  		if s4.AuxInt != 24 {
 23620  			break
 23621  		}
 23622  		x4 := s4.Args[0]
 23623  		if x4.Op != OpPPC64MOVBZload {
 23624  			break
 23625  		}
 23626  		i4 := x4.AuxInt
 23627  		if x4.Aux != s {
 23628  			break
 23629  		}
 23630  		_ = x4.Args[1]
 23631  		if p != x4.Args[0] {
 23632  			break
 23633  		}
 23634  		if mem != x4.Args[1] {
 23635  			break
 23636  		}
 23637  		s5 := o4.Args[1]
 23638  		if s5.Op != OpPPC64SLDconst {
 23639  			break
 23640  		}
 23641  		if s5.AuxInt != 16 {
 23642  			break
 23643  		}
 23644  		x5 := s5.Args[0]
 23645  		if x5.Op != OpPPC64MOVBZload {
 23646  			break
 23647  		}
 23648  		i5 := x5.AuxInt
 23649  		if x5.Aux != s {
 23650  			break
 23651  		}
 23652  		_ = x5.Args[1]
 23653  		if p != x5.Args[0] {
 23654  			break
 23655  		}
 23656  		if mem != x5.Args[1] {
 23657  			break
 23658  		}
 23659  		s6 := o5.Args[1]
 23660  		if s6.Op != OpPPC64SLDconst {
 23661  			break
 23662  		}
 23663  		if s6.AuxInt != 8 {
 23664  			break
 23665  		}
 23666  		x6 := s6.Args[0]
 23667  		if x6.Op != OpPPC64MOVBZload {
 23668  			break
 23669  		}
 23670  		i6 := x6.AuxInt
 23671  		if x6.Aux != s {
 23672  			break
 23673  		}
 23674  		_ = x6.Args[1]
 23675  		if p != x6.Args[0] {
 23676  			break
 23677  		}
 23678  		if mem != x6.Args[1] {
 23679  			break
 23680  		}
 23681  		x7 := v.Args[1]
 23682  		if x7.Op != OpPPC64MOVBZload {
 23683  			break
 23684  		}
 23685  		i7 := x7.AuxInt
 23686  		if x7.Aux != s {
 23687  			break
 23688  		}
 23689  		_ = x7.Args[1]
 23690  		if p != x7.Args[0] {
 23691  			break
 23692  		}
 23693  		if mem != x7.Args[1] {
 23694  			break
 23695  		}
 23696  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23697  			break
 23698  		}
 23699  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23700  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23701  		v.reset(OpCopy)
 23702  		v.AddArg(v0)
 23703  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23704  		v1.AuxInt = i0
 23705  		v1.Aux = s
 23706  		v1.AddArg(p)
 23707  		v0.AddArg(v1)
 23708  		v0.AddArg(mem)
 23709  		return true
 23710  	}
 23711  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 23712  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23713  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23714  	for {
 23715  		t := v.Type
 23716  		_ = v.Args[1]
 23717  		x7 := v.Args[0]
 23718  		if x7.Op != OpPPC64MOVBZload {
 23719  			break
 23720  		}
 23721  		i7 := x7.AuxInt
 23722  		s := x7.Aux
 23723  		_ = x7.Args[1]
 23724  		p := x7.Args[0]
 23725  		mem := x7.Args[1]
 23726  		o5 := v.Args[1]
 23727  		if o5.Op != OpPPC64OR {
 23728  			break
 23729  		}
 23730  		if o5.Type != t {
 23731  			break
 23732  		}
 23733  		_ = o5.Args[1]
 23734  		s6 := o5.Args[0]
 23735  		if s6.Op != OpPPC64SLDconst {
 23736  			break
 23737  		}
 23738  		if s6.AuxInt != 8 {
 23739  			break
 23740  		}
 23741  		x6 := s6.Args[0]
 23742  		if x6.Op != OpPPC64MOVBZload {
 23743  			break
 23744  		}
 23745  		i6 := x6.AuxInt
 23746  		if x6.Aux != s {
 23747  			break
 23748  		}
 23749  		_ = x6.Args[1]
 23750  		if p != x6.Args[0] {
 23751  			break
 23752  		}
 23753  		if mem != x6.Args[1] {
 23754  			break
 23755  		}
 23756  		o4 := o5.Args[1]
 23757  		if o4.Op != OpPPC64OR {
 23758  			break
 23759  		}
 23760  		if o4.Type != t {
 23761  			break
 23762  		}
 23763  		_ = o4.Args[1]
 23764  		s5 := o4.Args[0]
 23765  		if s5.Op != OpPPC64SLDconst {
 23766  			break
 23767  		}
 23768  		if s5.AuxInt != 16 {
 23769  			break
 23770  		}
 23771  		x5 := s5.Args[0]
 23772  		if x5.Op != OpPPC64MOVBZload {
 23773  			break
 23774  		}
 23775  		i5 := x5.AuxInt
 23776  		if x5.Aux != s {
 23777  			break
 23778  		}
 23779  		_ = x5.Args[1]
 23780  		if p != x5.Args[0] {
 23781  			break
 23782  		}
 23783  		if mem != x5.Args[1] {
 23784  			break
 23785  		}
 23786  		o3 := o4.Args[1]
 23787  		if o3.Op != OpPPC64OR {
 23788  			break
 23789  		}
 23790  		if o3.Type != t {
 23791  			break
 23792  		}
 23793  		_ = o3.Args[1]
 23794  		s4 := o3.Args[0]
 23795  		if s4.Op != OpPPC64SLDconst {
 23796  			break
 23797  		}
 23798  		if s4.AuxInt != 24 {
 23799  			break
 23800  		}
 23801  		x4 := s4.Args[0]
 23802  		if x4.Op != OpPPC64MOVBZload {
 23803  			break
 23804  		}
 23805  		i4 := x4.AuxInt
 23806  		if x4.Aux != s {
 23807  			break
 23808  		}
 23809  		_ = x4.Args[1]
 23810  		if p != x4.Args[0] {
 23811  			break
 23812  		}
 23813  		if mem != x4.Args[1] {
 23814  			break
 23815  		}
 23816  		s0 := o3.Args[1]
 23817  		if s0.Op != OpPPC64SLDconst {
 23818  			break
 23819  		}
 23820  		if s0.AuxInt != 32 {
 23821  			break
 23822  		}
 23823  		x3 := s0.Args[0]
 23824  		if x3.Op != OpPPC64MOVWBRload {
 23825  			break
 23826  		}
 23827  		if x3.Type != t {
 23828  			break
 23829  		}
 23830  		_ = x3.Args[1]
 23831  		x3_0 := x3.Args[0]
 23832  		if x3_0.Op != OpPPC64MOVDaddr {
 23833  			break
 23834  		}
 23835  		if x3_0.Type != typ.Uintptr {
 23836  			break
 23837  		}
 23838  		i0 := x3_0.AuxInt
 23839  		if x3_0.Aux != s {
 23840  			break
 23841  		}
 23842  		if p != x3_0.Args[0] {
 23843  			break
 23844  		}
 23845  		if mem != x3.Args[1] {
 23846  			break
 23847  		}
 23848  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23849  			break
 23850  		}
 23851  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23852  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 23853  		v.reset(OpCopy)
 23854  		v.AddArg(v0)
 23855  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23856  		v1.AuxInt = i0
 23857  		v1.Aux = s
 23858  		v1.AddArg(p)
 23859  		v0.AddArg(v1)
 23860  		v0.AddArg(mem)
 23861  		return true
 23862  	}
 23863  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 23864  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23865  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23866  	for {
 23867  		t := v.Type
 23868  		_ = v.Args[1]
 23869  		x7 := v.Args[0]
 23870  		if x7.Op != OpPPC64MOVBZload {
 23871  			break
 23872  		}
 23873  		i7 := x7.AuxInt
 23874  		s := x7.Aux
 23875  		_ = x7.Args[1]
 23876  		p := x7.Args[0]
 23877  		mem := x7.Args[1]
 23878  		o5 := v.Args[1]
 23879  		if o5.Op != OpPPC64OR {
 23880  			break
 23881  		}
 23882  		if o5.Type != t {
 23883  			break
 23884  		}
 23885  		_ = o5.Args[1]
 23886  		s6 := o5.Args[0]
 23887  		if s6.Op != OpPPC64SLDconst {
 23888  			break
 23889  		}
 23890  		if s6.AuxInt != 8 {
 23891  			break
 23892  		}
 23893  		x6 := s6.Args[0]
 23894  		if x6.Op != OpPPC64MOVBZload {
 23895  			break
 23896  		}
 23897  		i6 := x6.AuxInt
 23898  		if x6.Aux != s {
 23899  			break
 23900  		}
 23901  		_ = x6.Args[1]
 23902  		if p != x6.Args[0] {
 23903  			break
 23904  		}
 23905  		if mem != x6.Args[1] {
 23906  			break
 23907  		}
 23908  		o4 := o5.Args[1]
 23909  		if o4.Op != OpPPC64OR {
 23910  			break
 23911  		}
 23912  		if o4.Type != t {
 23913  			break
 23914  		}
 23915  		_ = o4.Args[1]
 23916  		s5 := o4.Args[0]
 23917  		if s5.Op != OpPPC64SLDconst {
 23918  			break
 23919  		}
 23920  		if s5.AuxInt != 16 {
 23921  			break
 23922  		}
 23923  		x5 := s5.Args[0]
 23924  		if x5.Op != OpPPC64MOVBZload {
 23925  			break
 23926  		}
 23927  		i5 := x5.AuxInt
 23928  		if x5.Aux != s {
 23929  			break
 23930  		}
 23931  		_ = x5.Args[1]
 23932  		if p != x5.Args[0] {
 23933  			break
 23934  		}
 23935  		if mem != x5.Args[1] {
 23936  			break
 23937  		}
 23938  		o3 := o4.Args[1]
 23939  		if o3.Op != OpPPC64OR {
 23940  			break
 23941  		}
 23942  		if o3.Type != t {
 23943  			break
 23944  		}
 23945  		_ = o3.Args[1]
 23946  		s0 := o3.Args[0]
 23947  		if s0.Op != OpPPC64SLDconst {
 23948  			break
 23949  		}
 23950  		if s0.AuxInt != 32 {
 23951  			break
 23952  		}
 23953  		x3 := s0.Args[0]
 23954  		if x3.Op != OpPPC64MOVWBRload {
 23955  			break
 23956  		}
 23957  		if x3.Type != t {
 23958  			break
 23959  		}
 23960  		_ = x3.Args[1]
 23961  		x3_0 := x3.Args[0]
 23962  		if x3_0.Op != OpPPC64MOVDaddr {
 23963  			break
 23964  		}
 23965  		if x3_0.Type != typ.Uintptr {
 23966  			break
 23967  		}
 23968  		i0 := x3_0.AuxInt
 23969  		if x3_0.Aux != s {
 23970  			break
 23971  		}
 23972  		if p != x3_0.Args[0] {
 23973  			break
 23974  		}
 23975  		if mem != x3.Args[1] {
 23976  			break
 23977  		}
 23978  		s4 := o3.Args[1]
 23979  		if s4.Op != OpPPC64SLDconst {
 23980  			break
 23981  		}
 23982  		if s4.AuxInt != 24 {
 23983  			break
 23984  		}
 23985  		x4 := s4.Args[0]
 23986  		if x4.Op != OpPPC64MOVBZload {
 23987  			break
 23988  		}
 23989  		i4 := x4.AuxInt
 23990  		if x4.Aux != s {
 23991  			break
 23992  		}
 23993  		_ = x4.Args[1]
 23994  		if p != x4.Args[0] {
 23995  			break
 23996  		}
 23997  		if mem != x4.Args[1] {
 23998  			break
 23999  		}
 24000  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24001  			break
 24002  		}
 24003  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24004  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24005  		v.reset(OpCopy)
 24006  		v.AddArg(v0)
 24007  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24008  		v1.AuxInt = i0
 24009  		v1.Aux = s
 24010  		v1.AddArg(p)
 24011  		v0.AddArg(v1)
 24012  		v0.AddArg(mem)
 24013  		return true
 24014  	}
 24015  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 24016  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24017  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24018  	for {
 24019  		t := v.Type
 24020  		_ = v.Args[1]
 24021  		x7 := v.Args[0]
 24022  		if x7.Op != OpPPC64MOVBZload {
 24023  			break
 24024  		}
 24025  		i7 := x7.AuxInt
 24026  		s := x7.Aux
 24027  		_ = x7.Args[1]
 24028  		p := x7.Args[0]
 24029  		mem := x7.Args[1]
 24030  		o5 := v.Args[1]
 24031  		if o5.Op != OpPPC64OR {
 24032  			break
 24033  		}
 24034  		if o5.Type != t {
 24035  			break
 24036  		}
 24037  		_ = o5.Args[1]
 24038  		s6 := o5.Args[0]
 24039  		if s6.Op != OpPPC64SLDconst {
 24040  			break
 24041  		}
 24042  		if s6.AuxInt != 8 {
 24043  			break
 24044  		}
 24045  		x6 := s6.Args[0]
 24046  		if x6.Op != OpPPC64MOVBZload {
 24047  			break
 24048  		}
 24049  		i6 := x6.AuxInt
 24050  		if x6.Aux != s {
 24051  			break
 24052  		}
 24053  		_ = x6.Args[1]
 24054  		if p != x6.Args[0] {
 24055  			break
 24056  		}
 24057  		if mem != x6.Args[1] {
 24058  			break
 24059  		}
 24060  		o4 := o5.Args[1]
 24061  		if o4.Op != OpPPC64OR {
 24062  			break
 24063  		}
 24064  		if o4.Type != t {
 24065  			break
 24066  		}
 24067  		_ = o4.Args[1]
 24068  		o3 := o4.Args[0]
 24069  		if o3.Op != OpPPC64OR {
 24070  			break
 24071  		}
 24072  		if o3.Type != t {
 24073  			break
 24074  		}
 24075  		_ = o3.Args[1]
 24076  		s4 := o3.Args[0]
 24077  		if s4.Op != OpPPC64SLDconst {
 24078  			break
 24079  		}
 24080  		if s4.AuxInt != 24 {
 24081  			break
 24082  		}
 24083  		x4 := s4.Args[0]
 24084  		if x4.Op != OpPPC64MOVBZload {
 24085  			break
 24086  		}
 24087  		i4 := x4.AuxInt
 24088  		if x4.Aux != s {
 24089  			break
 24090  		}
 24091  		_ = x4.Args[1]
 24092  		if p != x4.Args[0] {
 24093  			break
 24094  		}
 24095  		if mem != x4.Args[1] {
 24096  			break
 24097  		}
 24098  		s0 := o3.Args[1]
 24099  		if s0.Op != OpPPC64SLDconst {
 24100  			break
 24101  		}
 24102  		if s0.AuxInt != 32 {
 24103  			break
 24104  		}
 24105  		x3 := s0.Args[0]
 24106  		if x3.Op != OpPPC64MOVWBRload {
 24107  			break
 24108  		}
 24109  		if x3.Type != t {
 24110  			break
 24111  		}
 24112  		_ = x3.Args[1]
 24113  		x3_0 := x3.Args[0]
 24114  		if x3_0.Op != OpPPC64MOVDaddr {
 24115  			break
 24116  		}
 24117  		if x3_0.Type != typ.Uintptr {
 24118  			break
 24119  		}
 24120  		i0 := x3_0.AuxInt
 24121  		if x3_0.Aux != s {
 24122  			break
 24123  		}
 24124  		if p != x3_0.Args[0] {
 24125  			break
 24126  		}
 24127  		if mem != x3.Args[1] {
 24128  			break
 24129  		}
 24130  		s5 := o4.Args[1]
 24131  		if s5.Op != OpPPC64SLDconst {
 24132  			break
 24133  		}
 24134  		if s5.AuxInt != 16 {
 24135  			break
 24136  		}
 24137  		x5 := s5.Args[0]
 24138  		if x5.Op != OpPPC64MOVBZload {
 24139  			break
 24140  		}
 24141  		i5 := x5.AuxInt
 24142  		if x5.Aux != s {
 24143  			break
 24144  		}
 24145  		_ = x5.Args[1]
 24146  		if p != x5.Args[0] {
 24147  			break
 24148  		}
 24149  		if mem != x5.Args[1] {
 24150  			break
 24151  		}
 24152  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24153  			break
 24154  		}
 24155  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24156  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24157  		v.reset(OpCopy)
 24158  		v.AddArg(v0)
 24159  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24160  		v1.AuxInt = i0
 24161  		v1.Aux = s
 24162  		v1.AddArg(p)
 24163  		v0.AddArg(v1)
 24164  		v0.AddArg(mem)
 24165  		return true
 24166  	}
 24167  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 24168  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24169  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24170  	for {
 24171  		t := v.Type
 24172  		_ = v.Args[1]
 24173  		x7 := v.Args[0]
 24174  		if x7.Op != OpPPC64MOVBZload {
 24175  			break
 24176  		}
 24177  		i7 := x7.AuxInt
 24178  		s := x7.Aux
 24179  		_ = x7.Args[1]
 24180  		p := x7.Args[0]
 24181  		mem := x7.Args[1]
 24182  		o5 := v.Args[1]
 24183  		if o5.Op != OpPPC64OR {
 24184  			break
 24185  		}
 24186  		if o5.Type != t {
 24187  			break
 24188  		}
 24189  		_ = o5.Args[1]
 24190  		s6 := o5.Args[0]
 24191  		if s6.Op != OpPPC64SLDconst {
 24192  			break
 24193  		}
 24194  		if s6.AuxInt != 8 {
 24195  			break
 24196  		}
 24197  		x6 := s6.Args[0]
 24198  		if x6.Op != OpPPC64MOVBZload {
 24199  			break
 24200  		}
 24201  		i6 := x6.AuxInt
 24202  		if x6.Aux != s {
 24203  			break
 24204  		}
 24205  		_ = x6.Args[1]
 24206  		if p != x6.Args[0] {
 24207  			break
 24208  		}
 24209  		if mem != x6.Args[1] {
 24210  			break
 24211  		}
 24212  		o4 := o5.Args[1]
 24213  		if o4.Op != OpPPC64OR {
 24214  			break
 24215  		}
 24216  		if o4.Type != t {
 24217  			break
 24218  		}
 24219  		_ = o4.Args[1]
 24220  		o3 := o4.Args[0]
 24221  		if o3.Op != OpPPC64OR {
 24222  			break
 24223  		}
 24224  		if o3.Type != t {
 24225  			break
 24226  		}
 24227  		_ = o3.Args[1]
 24228  		s0 := o3.Args[0]
 24229  		if s0.Op != OpPPC64SLDconst {
 24230  			break
 24231  		}
 24232  		if s0.AuxInt != 32 {
 24233  			break
 24234  		}
 24235  		x3 := s0.Args[0]
 24236  		if x3.Op != OpPPC64MOVWBRload {
 24237  			break
 24238  		}
 24239  		if x3.Type != t {
 24240  			break
 24241  		}
 24242  		_ = x3.Args[1]
 24243  		x3_0 := x3.Args[0]
 24244  		if x3_0.Op != OpPPC64MOVDaddr {
 24245  			break
 24246  		}
 24247  		if x3_0.Type != typ.Uintptr {
 24248  			break
 24249  		}
 24250  		i0 := x3_0.AuxInt
 24251  		if x3_0.Aux != s {
 24252  			break
 24253  		}
 24254  		if p != x3_0.Args[0] {
 24255  			break
 24256  		}
 24257  		if mem != x3.Args[1] {
 24258  			break
 24259  		}
 24260  		s4 := o3.Args[1]
 24261  		if s4.Op != OpPPC64SLDconst {
 24262  			break
 24263  		}
 24264  		if s4.AuxInt != 24 {
 24265  			break
 24266  		}
 24267  		x4 := s4.Args[0]
 24268  		if x4.Op != OpPPC64MOVBZload {
 24269  			break
 24270  		}
 24271  		i4 := x4.AuxInt
 24272  		if x4.Aux != s {
 24273  			break
 24274  		}
 24275  		_ = x4.Args[1]
 24276  		if p != x4.Args[0] {
 24277  			break
 24278  		}
 24279  		if mem != x4.Args[1] {
 24280  			break
 24281  		}
 24282  		s5 := o4.Args[1]
 24283  		if s5.Op != OpPPC64SLDconst {
 24284  			break
 24285  		}
 24286  		if s5.AuxInt != 16 {
 24287  			break
 24288  		}
 24289  		x5 := s5.Args[0]
 24290  		if x5.Op != OpPPC64MOVBZload {
 24291  			break
 24292  		}
 24293  		i5 := x5.AuxInt
 24294  		if x5.Aux != s {
 24295  			break
 24296  		}
 24297  		_ = x5.Args[1]
 24298  		if p != x5.Args[0] {
 24299  			break
 24300  		}
 24301  		if mem != x5.Args[1] {
 24302  			break
 24303  		}
 24304  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24305  			break
 24306  		}
 24307  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24308  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24309  		v.reset(OpCopy)
 24310  		v.AddArg(v0)
 24311  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24312  		v1.AuxInt = i0
 24313  		v1.Aux = s
 24314  		v1.AddArg(p)
 24315  		v0.AddArg(v1)
 24316  		v0.AddArg(mem)
 24317  		return true
 24318  	}
 24319  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24320  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24321  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24322  	for {
 24323  		t := v.Type
 24324  		_ = v.Args[1]
 24325  		x7 := v.Args[0]
 24326  		if x7.Op != OpPPC64MOVBZload {
 24327  			break
 24328  		}
 24329  		i7 := x7.AuxInt
 24330  		s := x7.Aux
 24331  		_ = x7.Args[1]
 24332  		p := x7.Args[0]
 24333  		mem := x7.Args[1]
 24334  		o5 := v.Args[1]
 24335  		if o5.Op != OpPPC64OR {
 24336  			break
 24337  		}
 24338  		if o5.Type != t {
 24339  			break
 24340  		}
 24341  		_ = o5.Args[1]
 24342  		o4 := o5.Args[0]
 24343  		if o4.Op != OpPPC64OR {
 24344  			break
 24345  		}
 24346  		if o4.Type != t {
 24347  			break
 24348  		}
 24349  		_ = o4.Args[1]
 24350  		s5 := o4.Args[0]
 24351  		if s5.Op != OpPPC64SLDconst {
 24352  			break
 24353  		}
 24354  		if s5.AuxInt != 16 {
 24355  			break
 24356  		}
 24357  		x5 := s5.Args[0]
 24358  		if x5.Op != OpPPC64MOVBZload {
 24359  			break
 24360  		}
 24361  		i5 := x5.AuxInt
 24362  		if x5.Aux != s {
 24363  			break
 24364  		}
 24365  		_ = x5.Args[1]
 24366  		if p != x5.Args[0] {
 24367  			break
 24368  		}
 24369  		if mem != x5.Args[1] {
 24370  			break
 24371  		}
 24372  		o3 := o4.Args[1]
 24373  		if o3.Op != OpPPC64OR {
 24374  			break
 24375  		}
 24376  		if o3.Type != t {
 24377  			break
 24378  		}
 24379  		_ = o3.Args[1]
 24380  		s4 := o3.Args[0]
 24381  		if s4.Op != OpPPC64SLDconst {
 24382  			break
 24383  		}
 24384  		if s4.AuxInt != 24 {
 24385  			break
 24386  		}
 24387  		x4 := s4.Args[0]
 24388  		if x4.Op != OpPPC64MOVBZload {
 24389  			break
 24390  		}
 24391  		i4 := x4.AuxInt
 24392  		if x4.Aux != s {
 24393  			break
 24394  		}
 24395  		_ = x4.Args[1]
 24396  		if p != x4.Args[0] {
 24397  			break
 24398  		}
 24399  		if mem != x4.Args[1] {
 24400  			break
 24401  		}
 24402  		s0 := o3.Args[1]
 24403  		if s0.Op != OpPPC64SLDconst {
 24404  			break
 24405  		}
 24406  		if s0.AuxInt != 32 {
 24407  			break
 24408  		}
 24409  		x3 := s0.Args[0]
 24410  		if x3.Op != OpPPC64MOVWBRload {
 24411  			break
 24412  		}
 24413  		if x3.Type != t {
 24414  			break
 24415  		}
 24416  		_ = x3.Args[1]
 24417  		x3_0 := x3.Args[0]
 24418  		if x3_0.Op != OpPPC64MOVDaddr {
 24419  			break
 24420  		}
 24421  		if x3_0.Type != typ.Uintptr {
 24422  			break
 24423  		}
 24424  		i0 := x3_0.AuxInt
 24425  		if x3_0.Aux != s {
 24426  			break
 24427  		}
 24428  		if p != x3_0.Args[0] {
 24429  			break
 24430  		}
 24431  		if mem != x3.Args[1] {
 24432  			break
 24433  		}
 24434  		s6 := o5.Args[1]
 24435  		if s6.Op != OpPPC64SLDconst {
 24436  			break
 24437  		}
 24438  		if s6.AuxInt != 8 {
 24439  			break
 24440  		}
 24441  		x6 := s6.Args[0]
 24442  		if x6.Op != OpPPC64MOVBZload {
 24443  			break
 24444  		}
 24445  		i6 := x6.AuxInt
 24446  		if x6.Aux != s {
 24447  			break
 24448  		}
 24449  		_ = x6.Args[1]
 24450  		if p != x6.Args[0] {
 24451  			break
 24452  		}
 24453  		if mem != x6.Args[1] {
 24454  			break
 24455  		}
 24456  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24457  			break
 24458  		}
 24459  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24460  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24461  		v.reset(OpCopy)
 24462  		v.AddArg(v0)
 24463  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24464  		v1.AuxInt = i0
 24465  		v1.Aux = s
 24466  		v1.AddArg(p)
 24467  		v0.AddArg(v1)
 24468  		v0.AddArg(mem)
 24469  		return true
 24470  	}
 24471  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24472  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24473  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24474  	for {
 24475  		t := v.Type
 24476  		_ = v.Args[1]
 24477  		x7 := v.Args[0]
 24478  		if x7.Op != OpPPC64MOVBZload {
 24479  			break
 24480  		}
 24481  		i7 := x7.AuxInt
 24482  		s := x7.Aux
 24483  		_ = x7.Args[1]
 24484  		p := x7.Args[0]
 24485  		mem := x7.Args[1]
 24486  		o5 := v.Args[1]
 24487  		if o5.Op != OpPPC64OR {
 24488  			break
 24489  		}
 24490  		if o5.Type != t {
 24491  			break
 24492  		}
 24493  		_ = o5.Args[1]
 24494  		o4 := o5.Args[0]
 24495  		if o4.Op != OpPPC64OR {
 24496  			break
 24497  		}
 24498  		if o4.Type != t {
 24499  			break
 24500  		}
 24501  		_ = o4.Args[1]
 24502  		s5 := o4.Args[0]
 24503  		if s5.Op != OpPPC64SLDconst {
 24504  			break
 24505  		}
 24506  		if s5.AuxInt != 16 {
 24507  			break
 24508  		}
 24509  		x5 := s5.Args[0]
 24510  		if x5.Op != OpPPC64MOVBZload {
 24511  			break
 24512  		}
 24513  		i5 := x5.AuxInt
 24514  		if x5.Aux != s {
 24515  			break
 24516  		}
 24517  		_ = x5.Args[1]
 24518  		if p != x5.Args[0] {
 24519  			break
 24520  		}
 24521  		if mem != x5.Args[1] {
 24522  			break
 24523  		}
 24524  		o3 := o4.Args[1]
 24525  		if o3.Op != OpPPC64OR {
 24526  			break
 24527  		}
 24528  		if o3.Type != t {
 24529  			break
 24530  		}
 24531  		_ = o3.Args[1]
 24532  		s0 := o3.Args[0]
 24533  		if s0.Op != OpPPC64SLDconst {
 24534  			break
 24535  		}
 24536  		if s0.AuxInt != 32 {
 24537  			break
 24538  		}
 24539  		x3 := s0.Args[0]
 24540  		if x3.Op != OpPPC64MOVWBRload {
 24541  			break
 24542  		}
 24543  		if x3.Type != t {
 24544  			break
 24545  		}
 24546  		_ = x3.Args[1]
 24547  		x3_0 := x3.Args[0]
 24548  		if x3_0.Op != OpPPC64MOVDaddr {
 24549  			break
 24550  		}
 24551  		if x3_0.Type != typ.Uintptr {
 24552  			break
 24553  		}
 24554  		i0 := x3_0.AuxInt
 24555  		if x3_0.Aux != s {
 24556  			break
 24557  		}
 24558  		if p != x3_0.Args[0] {
 24559  			break
 24560  		}
 24561  		if mem != x3.Args[1] {
 24562  			break
 24563  		}
 24564  		s4 := o3.Args[1]
 24565  		if s4.Op != OpPPC64SLDconst {
 24566  			break
 24567  		}
 24568  		if s4.AuxInt != 24 {
 24569  			break
 24570  		}
 24571  		x4 := s4.Args[0]
 24572  		if x4.Op != OpPPC64MOVBZload {
 24573  			break
 24574  		}
 24575  		i4 := x4.AuxInt
 24576  		if x4.Aux != s {
 24577  			break
 24578  		}
 24579  		_ = x4.Args[1]
 24580  		if p != x4.Args[0] {
 24581  			break
 24582  		}
 24583  		if mem != x4.Args[1] {
 24584  			break
 24585  		}
 24586  		s6 := o5.Args[1]
 24587  		if s6.Op != OpPPC64SLDconst {
 24588  			break
 24589  		}
 24590  		if s6.AuxInt != 8 {
 24591  			break
 24592  		}
 24593  		x6 := s6.Args[0]
 24594  		if x6.Op != OpPPC64MOVBZload {
 24595  			break
 24596  		}
 24597  		i6 := x6.AuxInt
 24598  		if x6.Aux != s {
 24599  			break
 24600  		}
 24601  		_ = x6.Args[1]
 24602  		if p != x6.Args[0] {
 24603  			break
 24604  		}
 24605  		if mem != x6.Args[1] {
 24606  			break
 24607  		}
 24608  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24609  			break
 24610  		}
 24611  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24612  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24613  		v.reset(OpCopy)
 24614  		v.AddArg(v0)
 24615  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24616  		v1.AuxInt = i0
 24617  		v1.Aux = s
 24618  		v1.AddArg(p)
 24619  		v0.AddArg(v1)
 24620  		v0.AddArg(mem)
 24621  		return true
 24622  	}
 24623  	return false
 24624  }
 24625  func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
 24626  	b := v.Block
 24627  	_ = b
 24628  	config := b.Func.Config
 24629  	_ = config
 24630  	typ := &b.Func.Config.Types
 24631  	_ = typ
 24632  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24633  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24634  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24635  	for {
 24636  		t := v.Type
 24637  		_ = v.Args[1]
 24638  		x7 := v.Args[0]
 24639  		if x7.Op != OpPPC64MOVBZload {
 24640  			break
 24641  		}
 24642  		i7 := x7.AuxInt
 24643  		s := x7.Aux
 24644  		_ = x7.Args[1]
 24645  		p := x7.Args[0]
 24646  		mem := x7.Args[1]
 24647  		o5 := v.Args[1]
 24648  		if o5.Op != OpPPC64OR {
 24649  			break
 24650  		}
 24651  		if o5.Type != t {
 24652  			break
 24653  		}
 24654  		_ = o5.Args[1]
 24655  		o4 := o5.Args[0]
 24656  		if o4.Op != OpPPC64OR {
 24657  			break
 24658  		}
 24659  		if o4.Type != t {
 24660  			break
 24661  		}
 24662  		_ = o4.Args[1]
 24663  		o3 := o4.Args[0]
 24664  		if o3.Op != OpPPC64OR {
 24665  			break
 24666  		}
 24667  		if o3.Type != t {
 24668  			break
 24669  		}
 24670  		_ = o3.Args[1]
 24671  		s4 := o3.Args[0]
 24672  		if s4.Op != OpPPC64SLDconst {
 24673  			break
 24674  		}
 24675  		if s4.AuxInt != 24 {
 24676  			break
 24677  		}
 24678  		x4 := s4.Args[0]
 24679  		if x4.Op != OpPPC64MOVBZload {
 24680  			break
 24681  		}
 24682  		i4 := x4.AuxInt
 24683  		if x4.Aux != s {
 24684  			break
 24685  		}
 24686  		_ = x4.Args[1]
 24687  		if p != x4.Args[0] {
 24688  			break
 24689  		}
 24690  		if mem != x4.Args[1] {
 24691  			break
 24692  		}
 24693  		s0 := o3.Args[1]
 24694  		if s0.Op != OpPPC64SLDconst {
 24695  			break
 24696  		}
 24697  		if s0.AuxInt != 32 {
 24698  			break
 24699  		}
 24700  		x3 := s0.Args[0]
 24701  		if x3.Op != OpPPC64MOVWBRload {
 24702  			break
 24703  		}
 24704  		if x3.Type != t {
 24705  			break
 24706  		}
 24707  		_ = x3.Args[1]
 24708  		x3_0 := x3.Args[0]
 24709  		if x3_0.Op != OpPPC64MOVDaddr {
 24710  			break
 24711  		}
 24712  		if x3_0.Type != typ.Uintptr {
 24713  			break
 24714  		}
 24715  		i0 := x3_0.AuxInt
 24716  		if x3_0.Aux != s {
 24717  			break
 24718  		}
 24719  		if p != x3_0.Args[0] {
 24720  			break
 24721  		}
 24722  		if mem != x3.Args[1] {
 24723  			break
 24724  		}
 24725  		s5 := o4.Args[1]
 24726  		if s5.Op != OpPPC64SLDconst {
 24727  			break
 24728  		}
 24729  		if s5.AuxInt != 16 {
 24730  			break
 24731  		}
 24732  		x5 := s5.Args[0]
 24733  		if x5.Op != OpPPC64MOVBZload {
 24734  			break
 24735  		}
 24736  		i5 := x5.AuxInt
 24737  		if x5.Aux != s {
 24738  			break
 24739  		}
 24740  		_ = x5.Args[1]
 24741  		if p != x5.Args[0] {
 24742  			break
 24743  		}
 24744  		if mem != x5.Args[1] {
 24745  			break
 24746  		}
 24747  		s6 := o5.Args[1]
 24748  		if s6.Op != OpPPC64SLDconst {
 24749  			break
 24750  		}
 24751  		if s6.AuxInt != 8 {
 24752  			break
 24753  		}
 24754  		x6 := s6.Args[0]
 24755  		if x6.Op != OpPPC64MOVBZload {
 24756  			break
 24757  		}
 24758  		i6 := x6.AuxInt
 24759  		if x6.Aux != s {
 24760  			break
 24761  		}
 24762  		_ = x6.Args[1]
 24763  		if p != x6.Args[0] {
 24764  			break
 24765  		}
 24766  		if mem != x6.Args[1] {
 24767  			break
 24768  		}
 24769  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24770  			break
 24771  		}
 24772  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24773  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24774  		v.reset(OpCopy)
 24775  		v.AddArg(v0)
 24776  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24777  		v1.AuxInt = i0
 24778  		v1.Aux = s
 24779  		v1.AddArg(p)
 24780  		v0.AddArg(v1)
 24781  		v0.AddArg(mem)
 24782  		return true
 24783  	}
 24784  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24785  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24786  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24787  	for {
 24788  		t := v.Type
 24789  		_ = v.Args[1]
 24790  		x7 := v.Args[0]
 24791  		if x7.Op != OpPPC64MOVBZload {
 24792  			break
 24793  		}
 24794  		i7 := x7.AuxInt
 24795  		s := x7.Aux
 24796  		_ = x7.Args[1]
 24797  		p := x7.Args[0]
 24798  		mem := x7.Args[1]
 24799  		o5 := v.Args[1]
 24800  		if o5.Op != OpPPC64OR {
 24801  			break
 24802  		}
 24803  		if o5.Type != t {
 24804  			break
 24805  		}
 24806  		_ = o5.Args[1]
 24807  		o4 := o5.Args[0]
 24808  		if o4.Op != OpPPC64OR {
 24809  			break
 24810  		}
 24811  		if o4.Type != t {
 24812  			break
 24813  		}
 24814  		_ = o4.Args[1]
 24815  		o3 := o4.Args[0]
 24816  		if o3.Op != OpPPC64OR {
 24817  			break
 24818  		}
 24819  		if o3.Type != t {
 24820  			break
 24821  		}
 24822  		_ = o3.Args[1]
 24823  		s0 := o3.Args[0]
 24824  		if s0.Op != OpPPC64SLDconst {
 24825  			break
 24826  		}
 24827  		if s0.AuxInt != 32 {
 24828  			break
 24829  		}
 24830  		x3 := s0.Args[0]
 24831  		if x3.Op != OpPPC64MOVWBRload {
 24832  			break
 24833  		}
 24834  		if x3.Type != t {
 24835  			break
 24836  		}
 24837  		_ = x3.Args[1]
 24838  		x3_0 := x3.Args[0]
 24839  		if x3_0.Op != OpPPC64MOVDaddr {
 24840  			break
 24841  		}
 24842  		if x3_0.Type != typ.Uintptr {
 24843  			break
 24844  		}
 24845  		i0 := x3_0.AuxInt
 24846  		if x3_0.Aux != s {
 24847  			break
 24848  		}
 24849  		if p != x3_0.Args[0] {
 24850  			break
 24851  		}
 24852  		if mem != x3.Args[1] {
 24853  			break
 24854  		}
 24855  		s4 := o3.Args[1]
 24856  		if s4.Op != OpPPC64SLDconst {
 24857  			break
 24858  		}
 24859  		if s4.AuxInt != 24 {
 24860  			break
 24861  		}
 24862  		x4 := s4.Args[0]
 24863  		if x4.Op != OpPPC64MOVBZload {
 24864  			break
 24865  		}
 24866  		i4 := x4.AuxInt
 24867  		if x4.Aux != s {
 24868  			break
 24869  		}
 24870  		_ = x4.Args[1]
 24871  		if p != x4.Args[0] {
 24872  			break
 24873  		}
 24874  		if mem != x4.Args[1] {
 24875  			break
 24876  		}
 24877  		s5 := o4.Args[1]
 24878  		if s5.Op != OpPPC64SLDconst {
 24879  			break
 24880  		}
 24881  		if s5.AuxInt != 16 {
 24882  			break
 24883  		}
 24884  		x5 := s5.Args[0]
 24885  		if x5.Op != OpPPC64MOVBZload {
 24886  			break
 24887  		}
 24888  		i5 := x5.AuxInt
 24889  		if x5.Aux != s {
 24890  			break
 24891  		}
 24892  		_ = x5.Args[1]
 24893  		if p != x5.Args[0] {
 24894  			break
 24895  		}
 24896  		if mem != x5.Args[1] {
 24897  			break
 24898  		}
 24899  		s6 := o5.Args[1]
 24900  		if s6.Op != OpPPC64SLDconst {
 24901  			break
 24902  		}
 24903  		if s6.AuxInt != 8 {
 24904  			break
 24905  		}
 24906  		x6 := s6.Args[0]
 24907  		if x6.Op != OpPPC64MOVBZload {
 24908  			break
 24909  		}
 24910  		i6 := x6.AuxInt
 24911  		if x6.Aux != s {
 24912  			break
 24913  		}
 24914  		_ = x6.Args[1]
 24915  		if p != x6.Args[0] {
 24916  			break
 24917  		}
 24918  		if mem != x6.Args[1] {
 24919  			break
 24920  		}
 24921  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24922  			break
 24923  		}
 24924  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24925  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 24926  		v.reset(OpCopy)
 24927  		v.AddArg(v0)
 24928  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24929  		v1.AuxInt = i0
 24930  		v1.Aux = s
 24931  		v1.AddArg(p)
 24932  		v0.AddArg(v1)
 24933  		v0.AddArg(mem)
 24934  		return true
 24935  	}
 24936  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 24937  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24938  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24939  	for {
 24940  		t := v.Type
 24941  		_ = v.Args[1]
 24942  		o5 := v.Args[0]
 24943  		if o5.Op != OpPPC64OR {
 24944  			break
 24945  		}
 24946  		if o5.Type != t {
 24947  			break
 24948  		}
 24949  		_ = o5.Args[1]
 24950  		s6 := o5.Args[0]
 24951  		if s6.Op != OpPPC64SLDconst {
 24952  			break
 24953  		}
 24954  		if s6.AuxInt != 8 {
 24955  			break
 24956  		}
 24957  		x6 := s6.Args[0]
 24958  		if x6.Op != OpPPC64MOVBZload {
 24959  			break
 24960  		}
 24961  		i6 := x6.AuxInt
 24962  		s := x6.Aux
 24963  		_ = x6.Args[1]
 24964  		p := x6.Args[0]
 24965  		mem := x6.Args[1]
 24966  		o4 := o5.Args[1]
 24967  		if o4.Op != OpPPC64OR {
 24968  			break
 24969  		}
 24970  		if o4.Type != t {
 24971  			break
 24972  		}
 24973  		_ = o4.Args[1]
 24974  		s5 := o4.Args[0]
 24975  		if s5.Op != OpPPC64SLDconst {
 24976  			break
 24977  		}
 24978  		if s5.AuxInt != 16 {
 24979  			break
 24980  		}
 24981  		x5 := s5.Args[0]
 24982  		if x5.Op != OpPPC64MOVBZload {
 24983  			break
 24984  		}
 24985  		i5 := x5.AuxInt
 24986  		if x5.Aux != s {
 24987  			break
 24988  		}
 24989  		_ = x5.Args[1]
 24990  		if p != x5.Args[0] {
 24991  			break
 24992  		}
 24993  		if mem != x5.Args[1] {
 24994  			break
 24995  		}
 24996  		o3 := o4.Args[1]
 24997  		if o3.Op != OpPPC64OR {
 24998  			break
 24999  		}
 25000  		if o3.Type != t {
 25001  			break
 25002  		}
 25003  		_ = o3.Args[1]
 25004  		s4 := o3.Args[0]
 25005  		if s4.Op != OpPPC64SLDconst {
 25006  			break
 25007  		}
 25008  		if s4.AuxInt != 24 {
 25009  			break
 25010  		}
 25011  		x4 := s4.Args[0]
 25012  		if x4.Op != OpPPC64MOVBZload {
 25013  			break
 25014  		}
 25015  		i4 := x4.AuxInt
 25016  		if x4.Aux != s {
 25017  			break
 25018  		}
 25019  		_ = x4.Args[1]
 25020  		if p != x4.Args[0] {
 25021  			break
 25022  		}
 25023  		if mem != x4.Args[1] {
 25024  			break
 25025  		}
 25026  		s0 := o3.Args[1]
 25027  		if s0.Op != OpPPC64SLDconst {
 25028  			break
 25029  		}
 25030  		if s0.AuxInt != 32 {
 25031  			break
 25032  		}
 25033  		x3 := s0.Args[0]
 25034  		if x3.Op != OpPPC64MOVWBRload {
 25035  			break
 25036  		}
 25037  		if x3.Type != t {
 25038  			break
 25039  		}
 25040  		_ = x3.Args[1]
 25041  		x3_0 := x3.Args[0]
 25042  		if x3_0.Op != OpPPC64MOVDaddr {
 25043  			break
 25044  		}
 25045  		if x3_0.Type != typ.Uintptr {
 25046  			break
 25047  		}
 25048  		i0 := x3_0.AuxInt
 25049  		if x3_0.Aux != s {
 25050  			break
 25051  		}
 25052  		if p != x3_0.Args[0] {
 25053  			break
 25054  		}
 25055  		if mem != x3.Args[1] {
 25056  			break
 25057  		}
 25058  		x7 := v.Args[1]
 25059  		if x7.Op != OpPPC64MOVBZload {
 25060  			break
 25061  		}
 25062  		i7 := x7.AuxInt
 25063  		if x7.Aux != s {
 25064  			break
 25065  		}
 25066  		_ = x7.Args[1]
 25067  		if p != x7.Args[0] {
 25068  			break
 25069  		}
 25070  		if mem != x7.Args[1] {
 25071  			break
 25072  		}
 25073  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25074  			break
 25075  		}
 25076  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25077  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25078  		v.reset(OpCopy)
 25079  		v.AddArg(v0)
 25080  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25081  		v1.AuxInt = i0
 25082  		v1.Aux = s
 25083  		v1.AddArg(p)
 25084  		v0.AddArg(v1)
 25085  		v0.AddArg(mem)
 25086  		return true
 25087  	}
 25088  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 25089  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25090  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25091  	for {
 25092  		t := v.Type
 25093  		_ = v.Args[1]
 25094  		o5 := v.Args[0]
 25095  		if o5.Op != OpPPC64OR {
 25096  			break
 25097  		}
 25098  		if o5.Type != t {
 25099  			break
 25100  		}
 25101  		_ = o5.Args[1]
 25102  		s6 := o5.Args[0]
 25103  		if s6.Op != OpPPC64SLDconst {
 25104  			break
 25105  		}
 25106  		if s6.AuxInt != 8 {
 25107  			break
 25108  		}
 25109  		x6 := s6.Args[0]
 25110  		if x6.Op != OpPPC64MOVBZload {
 25111  			break
 25112  		}
 25113  		i6 := x6.AuxInt
 25114  		s := x6.Aux
 25115  		_ = x6.Args[1]
 25116  		p := x6.Args[0]
 25117  		mem := x6.Args[1]
 25118  		o4 := o5.Args[1]
 25119  		if o4.Op != OpPPC64OR {
 25120  			break
 25121  		}
 25122  		if o4.Type != t {
 25123  			break
 25124  		}
 25125  		_ = o4.Args[1]
 25126  		s5 := o4.Args[0]
 25127  		if s5.Op != OpPPC64SLDconst {
 25128  			break
 25129  		}
 25130  		if s5.AuxInt != 16 {
 25131  			break
 25132  		}
 25133  		x5 := s5.Args[0]
 25134  		if x5.Op != OpPPC64MOVBZload {
 25135  			break
 25136  		}
 25137  		i5 := x5.AuxInt
 25138  		if x5.Aux != s {
 25139  			break
 25140  		}
 25141  		_ = x5.Args[1]
 25142  		if p != x5.Args[0] {
 25143  			break
 25144  		}
 25145  		if mem != x5.Args[1] {
 25146  			break
 25147  		}
 25148  		o3 := o4.Args[1]
 25149  		if o3.Op != OpPPC64OR {
 25150  			break
 25151  		}
 25152  		if o3.Type != t {
 25153  			break
 25154  		}
 25155  		_ = o3.Args[1]
 25156  		s0 := o3.Args[0]
 25157  		if s0.Op != OpPPC64SLDconst {
 25158  			break
 25159  		}
 25160  		if s0.AuxInt != 32 {
 25161  			break
 25162  		}
 25163  		x3 := s0.Args[0]
 25164  		if x3.Op != OpPPC64MOVWBRload {
 25165  			break
 25166  		}
 25167  		if x3.Type != t {
 25168  			break
 25169  		}
 25170  		_ = x3.Args[1]
 25171  		x3_0 := x3.Args[0]
 25172  		if x3_0.Op != OpPPC64MOVDaddr {
 25173  			break
 25174  		}
 25175  		if x3_0.Type != typ.Uintptr {
 25176  			break
 25177  		}
 25178  		i0 := x3_0.AuxInt
 25179  		if x3_0.Aux != s {
 25180  			break
 25181  		}
 25182  		if p != x3_0.Args[0] {
 25183  			break
 25184  		}
 25185  		if mem != x3.Args[1] {
 25186  			break
 25187  		}
 25188  		s4 := o3.Args[1]
 25189  		if s4.Op != OpPPC64SLDconst {
 25190  			break
 25191  		}
 25192  		if s4.AuxInt != 24 {
 25193  			break
 25194  		}
 25195  		x4 := s4.Args[0]
 25196  		if x4.Op != OpPPC64MOVBZload {
 25197  			break
 25198  		}
 25199  		i4 := x4.AuxInt
 25200  		if x4.Aux != s {
 25201  			break
 25202  		}
 25203  		_ = x4.Args[1]
 25204  		if p != x4.Args[0] {
 25205  			break
 25206  		}
 25207  		if mem != x4.Args[1] {
 25208  			break
 25209  		}
 25210  		x7 := v.Args[1]
 25211  		if x7.Op != OpPPC64MOVBZload {
 25212  			break
 25213  		}
 25214  		i7 := x7.AuxInt
 25215  		if x7.Aux != s {
 25216  			break
 25217  		}
 25218  		_ = x7.Args[1]
 25219  		if p != x7.Args[0] {
 25220  			break
 25221  		}
 25222  		if mem != x7.Args[1] {
 25223  			break
 25224  		}
 25225  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25226  			break
 25227  		}
 25228  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25229  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25230  		v.reset(OpCopy)
 25231  		v.AddArg(v0)
 25232  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25233  		v1.AuxInt = i0
 25234  		v1.Aux = s
 25235  		v1.AddArg(p)
 25236  		v0.AddArg(v1)
 25237  		v0.AddArg(mem)
 25238  		return true
 25239  	}
 25240  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 25241  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25242  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25243  	for {
 25244  		t := v.Type
 25245  		_ = v.Args[1]
 25246  		o5 := v.Args[0]
 25247  		if o5.Op != OpPPC64OR {
 25248  			break
 25249  		}
 25250  		if o5.Type != t {
 25251  			break
 25252  		}
 25253  		_ = o5.Args[1]
 25254  		s6 := o5.Args[0]
 25255  		if s6.Op != OpPPC64SLDconst {
 25256  			break
 25257  		}
 25258  		if s6.AuxInt != 8 {
 25259  			break
 25260  		}
 25261  		x6 := s6.Args[0]
 25262  		if x6.Op != OpPPC64MOVBZload {
 25263  			break
 25264  		}
 25265  		i6 := x6.AuxInt
 25266  		s := x6.Aux
 25267  		_ = x6.Args[1]
 25268  		p := x6.Args[0]
 25269  		mem := x6.Args[1]
 25270  		o4 := o5.Args[1]
 25271  		if o4.Op != OpPPC64OR {
 25272  			break
 25273  		}
 25274  		if o4.Type != t {
 25275  			break
 25276  		}
 25277  		_ = o4.Args[1]
 25278  		o3 := o4.Args[0]
 25279  		if o3.Op != OpPPC64OR {
 25280  			break
 25281  		}
 25282  		if o3.Type != t {
 25283  			break
 25284  		}
 25285  		_ = o3.Args[1]
 25286  		s4 := o3.Args[0]
 25287  		if s4.Op != OpPPC64SLDconst {
 25288  			break
 25289  		}
 25290  		if s4.AuxInt != 24 {
 25291  			break
 25292  		}
 25293  		x4 := s4.Args[0]
 25294  		if x4.Op != OpPPC64MOVBZload {
 25295  			break
 25296  		}
 25297  		i4 := x4.AuxInt
 25298  		if x4.Aux != s {
 25299  			break
 25300  		}
 25301  		_ = x4.Args[1]
 25302  		if p != x4.Args[0] {
 25303  			break
 25304  		}
 25305  		if mem != x4.Args[1] {
 25306  			break
 25307  		}
 25308  		s0 := o3.Args[1]
 25309  		if s0.Op != OpPPC64SLDconst {
 25310  			break
 25311  		}
 25312  		if s0.AuxInt != 32 {
 25313  			break
 25314  		}
 25315  		x3 := s0.Args[0]
 25316  		if x3.Op != OpPPC64MOVWBRload {
 25317  			break
 25318  		}
 25319  		if x3.Type != t {
 25320  			break
 25321  		}
 25322  		_ = x3.Args[1]
 25323  		x3_0 := x3.Args[0]
 25324  		if x3_0.Op != OpPPC64MOVDaddr {
 25325  			break
 25326  		}
 25327  		if x3_0.Type != typ.Uintptr {
 25328  			break
 25329  		}
 25330  		i0 := x3_0.AuxInt
 25331  		if x3_0.Aux != s {
 25332  			break
 25333  		}
 25334  		if p != x3_0.Args[0] {
 25335  			break
 25336  		}
 25337  		if mem != x3.Args[1] {
 25338  			break
 25339  		}
 25340  		s5 := o4.Args[1]
 25341  		if s5.Op != OpPPC64SLDconst {
 25342  			break
 25343  		}
 25344  		if s5.AuxInt != 16 {
 25345  			break
 25346  		}
 25347  		x5 := s5.Args[0]
 25348  		if x5.Op != OpPPC64MOVBZload {
 25349  			break
 25350  		}
 25351  		i5 := x5.AuxInt
 25352  		if x5.Aux != s {
 25353  			break
 25354  		}
 25355  		_ = x5.Args[1]
 25356  		if p != x5.Args[0] {
 25357  			break
 25358  		}
 25359  		if mem != x5.Args[1] {
 25360  			break
 25361  		}
 25362  		x7 := v.Args[1]
 25363  		if x7.Op != OpPPC64MOVBZload {
 25364  			break
 25365  		}
 25366  		i7 := x7.AuxInt
 25367  		if x7.Aux != s {
 25368  			break
 25369  		}
 25370  		_ = x7.Args[1]
 25371  		if p != x7.Args[0] {
 25372  			break
 25373  		}
 25374  		if mem != x7.Args[1] {
 25375  			break
 25376  		}
 25377  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25378  			break
 25379  		}
 25380  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25381  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25382  		v.reset(OpCopy)
 25383  		v.AddArg(v0)
 25384  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25385  		v1.AuxInt = i0
 25386  		v1.Aux = s
 25387  		v1.AddArg(p)
 25388  		v0.AddArg(v1)
 25389  		v0.AddArg(mem)
 25390  		return true
 25391  	}
 25392  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 25393  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25394  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25395  	for {
 25396  		t := v.Type
 25397  		_ = v.Args[1]
 25398  		o5 := v.Args[0]
 25399  		if o5.Op != OpPPC64OR {
 25400  			break
 25401  		}
 25402  		if o5.Type != t {
 25403  			break
 25404  		}
 25405  		_ = o5.Args[1]
 25406  		s6 := o5.Args[0]
 25407  		if s6.Op != OpPPC64SLDconst {
 25408  			break
 25409  		}
 25410  		if s6.AuxInt != 8 {
 25411  			break
 25412  		}
 25413  		x6 := s6.Args[0]
 25414  		if x6.Op != OpPPC64MOVBZload {
 25415  			break
 25416  		}
 25417  		i6 := x6.AuxInt
 25418  		s := x6.Aux
 25419  		_ = x6.Args[1]
 25420  		p := x6.Args[0]
 25421  		mem := x6.Args[1]
 25422  		o4 := o5.Args[1]
 25423  		if o4.Op != OpPPC64OR {
 25424  			break
 25425  		}
 25426  		if o4.Type != t {
 25427  			break
 25428  		}
 25429  		_ = o4.Args[1]
 25430  		o3 := o4.Args[0]
 25431  		if o3.Op != OpPPC64OR {
 25432  			break
 25433  		}
 25434  		if o3.Type != t {
 25435  			break
 25436  		}
 25437  		_ = o3.Args[1]
 25438  		s0 := o3.Args[0]
 25439  		if s0.Op != OpPPC64SLDconst {
 25440  			break
 25441  		}
 25442  		if s0.AuxInt != 32 {
 25443  			break
 25444  		}
 25445  		x3 := s0.Args[0]
 25446  		if x3.Op != OpPPC64MOVWBRload {
 25447  			break
 25448  		}
 25449  		if x3.Type != t {
 25450  			break
 25451  		}
 25452  		_ = x3.Args[1]
 25453  		x3_0 := x3.Args[0]
 25454  		if x3_0.Op != OpPPC64MOVDaddr {
 25455  			break
 25456  		}
 25457  		if x3_0.Type != typ.Uintptr {
 25458  			break
 25459  		}
 25460  		i0 := x3_0.AuxInt
 25461  		if x3_0.Aux != s {
 25462  			break
 25463  		}
 25464  		if p != x3_0.Args[0] {
 25465  			break
 25466  		}
 25467  		if mem != x3.Args[1] {
 25468  			break
 25469  		}
 25470  		s4 := o3.Args[1]
 25471  		if s4.Op != OpPPC64SLDconst {
 25472  			break
 25473  		}
 25474  		if s4.AuxInt != 24 {
 25475  			break
 25476  		}
 25477  		x4 := s4.Args[0]
 25478  		if x4.Op != OpPPC64MOVBZload {
 25479  			break
 25480  		}
 25481  		i4 := x4.AuxInt
 25482  		if x4.Aux != s {
 25483  			break
 25484  		}
 25485  		_ = x4.Args[1]
 25486  		if p != x4.Args[0] {
 25487  			break
 25488  		}
 25489  		if mem != x4.Args[1] {
 25490  			break
 25491  		}
 25492  		s5 := o4.Args[1]
 25493  		if s5.Op != OpPPC64SLDconst {
 25494  			break
 25495  		}
 25496  		if s5.AuxInt != 16 {
 25497  			break
 25498  		}
 25499  		x5 := s5.Args[0]
 25500  		if x5.Op != OpPPC64MOVBZload {
 25501  			break
 25502  		}
 25503  		i5 := x5.AuxInt
 25504  		if x5.Aux != s {
 25505  			break
 25506  		}
 25507  		_ = x5.Args[1]
 25508  		if p != x5.Args[0] {
 25509  			break
 25510  		}
 25511  		if mem != x5.Args[1] {
 25512  			break
 25513  		}
 25514  		x7 := v.Args[1]
 25515  		if x7.Op != OpPPC64MOVBZload {
 25516  			break
 25517  		}
 25518  		i7 := x7.AuxInt
 25519  		if x7.Aux != s {
 25520  			break
 25521  		}
 25522  		_ = x7.Args[1]
 25523  		if p != x7.Args[0] {
 25524  			break
 25525  		}
 25526  		if mem != x7.Args[1] {
 25527  			break
 25528  		}
 25529  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25530  			break
 25531  		}
 25532  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25533  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25534  		v.reset(OpCopy)
 25535  		v.AddArg(v0)
 25536  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25537  		v1.AuxInt = i0
 25538  		v1.Aux = s
 25539  		v1.AddArg(p)
 25540  		v0.AddArg(v1)
 25541  		v0.AddArg(mem)
 25542  		return true
 25543  	}
 25544  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25545  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25546  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25547  	for {
 25548  		t := v.Type
 25549  		_ = v.Args[1]
 25550  		o5 := v.Args[0]
 25551  		if o5.Op != OpPPC64OR {
 25552  			break
 25553  		}
 25554  		if o5.Type != t {
 25555  			break
 25556  		}
 25557  		_ = o5.Args[1]
 25558  		o4 := o5.Args[0]
 25559  		if o4.Op != OpPPC64OR {
 25560  			break
 25561  		}
 25562  		if o4.Type != t {
 25563  			break
 25564  		}
 25565  		_ = o4.Args[1]
 25566  		s5 := o4.Args[0]
 25567  		if s5.Op != OpPPC64SLDconst {
 25568  			break
 25569  		}
 25570  		if s5.AuxInt != 16 {
 25571  			break
 25572  		}
 25573  		x5 := s5.Args[0]
 25574  		if x5.Op != OpPPC64MOVBZload {
 25575  			break
 25576  		}
 25577  		i5 := x5.AuxInt
 25578  		s := x5.Aux
 25579  		_ = x5.Args[1]
 25580  		p := x5.Args[0]
 25581  		mem := x5.Args[1]
 25582  		o3 := o4.Args[1]
 25583  		if o3.Op != OpPPC64OR {
 25584  			break
 25585  		}
 25586  		if o3.Type != t {
 25587  			break
 25588  		}
 25589  		_ = o3.Args[1]
 25590  		s4 := o3.Args[0]
 25591  		if s4.Op != OpPPC64SLDconst {
 25592  			break
 25593  		}
 25594  		if s4.AuxInt != 24 {
 25595  			break
 25596  		}
 25597  		x4 := s4.Args[0]
 25598  		if x4.Op != OpPPC64MOVBZload {
 25599  			break
 25600  		}
 25601  		i4 := x4.AuxInt
 25602  		if x4.Aux != s {
 25603  			break
 25604  		}
 25605  		_ = x4.Args[1]
 25606  		if p != x4.Args[0] {
 25607  			break
 25608  		}
 25609  		if mem != x4.Args[1] {
 25610  			break
 25611  		}
 25612  		s0 := o3.Args[1]
 25613  		if s0.Op != OpPPC64SLDconst {
 25614  			break
 25615  		}
 25616  		if s0.AuxInt != 32 {
 25617  			break
 25618  		}
 25619  		x3 := s0.Args[0]
 25620  		if x3.Op != OpPPC64MOVWBRload {
 25621  			break
 25622  		}
 25623  		if x3.Type != t {
 25624  			break
 25625  		}
 25626  		_ = x3.Args[1]
 25627  		x3_0 := x3.Args[0]
 25628  		if x3_0.Op != OpPPC64MOVDaddr {
 25629  			break
 25630  		}
 25631  		if x3_0.Type != typ.Uintptr {
 25632  			break
 25633  		}
 25634  		i0 := x3_0.AuxInt
 25635  		if x3_0.Aux != s {
 25636  			break
 25637  		}
 25638  		if p != x3_0.Args[0] {
 25639  			break
 25640  		}
 25641  		if mem != x3.Args[1] {
 25642  			break
 25643  		}
 25644  		s6 := o5.Args[1]
 25645  		if s6.Op != OpPPC64SLDconst {
 25646  			break
 25647  		}
 25648  		if s6.AuxInt != 8 {
 25649  			break
 25650  		}
 25651  		x6 := s6.Args[0]
 25652  		if x6.Op != OpPPC64MOVBZload {
 25653  			break
 25654  		}
 25655  		i6 := x6.AuxInt
 25656  		if x6.Aux != s {
 25657  			break
 25658  		}
 25659  		_ = x6.Args[1]
 25660  		if p != x6.Args[0] {
 25661  			break
 25662  		}
 25663  		if mem != x6.Args[1] {
 25664  			break
 25665  		}
 25666  		x7 := v.Args[1]
 25667  		if x7.Op != OpPPC64MOVBZload {
 25668  			break
 25669  		}
 25670  		i7 := x7.AuxInt
 25671  		if x7.Aux != s {
 25672  			break
 25673  		}
 25674  		_ = x7.Args[1]
 25675  		if p != x7.Args[0] {
 25676  			break
 25677  		}
 25678  		if mem != x7.Args[1] {
 25679  			break
 25680  		}
 25681  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25682  			break
 25683  		}
 25684  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25685  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25686  		v.reset(OpCopy)
 25687  		v.AddArg(v0)
 25688  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25689  		v1.AuxInt = i0
 25690  		v1.Aux = s
 25691  		v1.AddArg(p)
 25692  		v0.AddArg(v1)
 25693  		v0.AddArg(mem)
 25694  		return true
 25695  	}
 25696  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25697  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25698  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25699  	for {
 25700  		t := v.Type
 25701  		_ = v.Args[1]
 25702  		o5 := v.Args[0]
 25703  		if o5.Op != OpPPC64OR {
 25704  			break
 25705  		}
 25706  		if o5.Type != t {
 25707  			break
 25708  		}
 25709  		_ = o5.Args[1]
 25710  		o4 := o5.Args[0]
 25711  		if o4.Op != OpPPC64OR {
 25712  			break
 25713  		}
 25714  		if o4.Type != t {
 25715  			break
 25716  		}
 25717  		_ = o4.Args[1]
 25718  		s5 := o4.Args[0]
 25719  		if s5.Op != OpPPC64SLDconst {
 25720  			break
 25721  		}
 25722  		if s5.AuxInt != 16 {
 25723  			break
 25724  		}
 25725  		x5 := s5.Args[0]
 25726  		if x5.Op != OpPPC64MOVBZload {
 25727  			break
 25728  		}
 25729  		i5 := x5.AuxInt
 25730  		s := x5.Aux
 25731  		_ = x5.Args[1]
 25732  		p := x5.Args[0]
 25733  		mem := x5.Args[1]
 25734  		o3 := o4.Args[1]
 25735  		if o3.Op != OpPPC64OR {
 25736  			break
 25737  		}
 25738  		if o3.Type != t {
 25739  			break
 25740  		}
 25741  		_ = o3.Args[1]
 25742  		s0 := o3.Args[0]
 25743  		if s0.Op != OpPPC64SLDconst {
 25744  			break
 25745  		}
 25746  		if s0.AuxInt != 32 {
 25747  			break
 25748  		}
 25749  		x3 := s0.Args[0]
 25750  		if x3.Op != OpPPC64MOVWBRload {
 25751  			break
 25752  		}
 25753  		if x3.Type != t {
 25754  			break
 25755  		}
 25756  		_ = x3.Args[1]
 25757  		x3_0 := x3.Args[0]
 25758  		if x3_0.Op != OpPPC64MOVDaddr {
 25759  			break
 25760  		}
 25761  		if x3_0.Type != typ.Uintptr {
 25762  			break
 25763  		}
 25764  		i0 := x3_0.AuxInt
 25765  		if x3_0.Aux != s {
 25766  			break
 25767  		}
 25768  		if p != x3_0.Args[0] {
 25769  			break
 25770  		}
 25771  		if mem != x3.Args[1] {
 25772  			break
 25773  		}
 25774  		s4 := o3.Args[1]
 25775  		if s4.Op != OpPPC64SLDconst {
 25776  			break
 25777  		}
 25778  		if s4.AuxInt != 24 {
 25779  			break
 25780  		}
 25781  		x4 := s4.Args[0]
 25782  		if x4.Op != OpPPC64MOVBZload {
 25783  			break
 25784  		}
 25785  		i4 := x4.AuxInt
 25786  		if x4.Aux != s {
 25787  			break
 25788  		}
 25789  		_ = x4.Args[1]
 25790  		if p != x4.Args[0] {
 25791  			break
 25792  		}
 25793  		if mem != x4.Args[1] {
 25794  			break
 25795  		}
 25796  		s6 := o5.Args[1]
 25797  		if s6.Op != OpPPC64SLDconst {
 25798  			break
 25799  		}
 25800  		if s6.AuxInt != 8 {
 25801  			break
 25802  		}
 25803  		x6 := s6.Args[0]
 25804  		if x6.Op != OpPPC64MOVBZload {
 25805  			break
 25806  		}
 25807  		i6 := x6.AuxInt
 25808  		if x6.Aux != s {
 25809  			break
 25810  		}
 25811  		_ = x6.Args[1]
 25812  		if p != x6.Args[0] {
 25813  			break
 25814  		}
 25815  		if mem != x6.Args[1] {
 25816  			break
 25817  		}
 25818  		x7 := v.Args[1]
 25819  		if x7.Op != OpPPC64MOVBZload {
 25820  			break
 25821  		}
 25822  		i7 := x7.AuxInt
 25823  		if x7.Aux != s {
 25824  			break
 25825  		}
 25826  		_ = x7.Args[1]
 25827  		if p != x7.Args[0] {
 25828  			break
 25829  		}
 25830  		if mem != x7.Args[1] {
 25831  			break
 25832  		}
 25833  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25834  			break
 25835  		}
 25836  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25837  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25838  		v.reset(OpCopy)
 25839  		v.AddArg(v0)
 25840  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25841  		v1.AuxInt = i0
 25842  		v1.Aux = s
 25843  		v1.AddArg(p)
 25844  		v0.AddArg(v1)
 25845  		v0.AddArg(mem)
 25846  		return true
 25847  	}
 25848  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25849  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25850  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25851  	for {
 25852  		t := v.Type
 25853  		_ = v.Args[1]
 25854  		o5 := v.Args[0]
 25855  		if o5.Op != OpPPC64OR {
 25856  			break
 25857  		}
 25858  		if o5.Type != t {
 25859  			break
 25860  		}
 25861  		_ = o5.Args[1]
 25862  		o4 := o5.Args[0]
 25863  		if o4.Op != OpPPC64OR {
 25864  			break
 25865  		}
 25866  		if o4.Type != t {
 25867  			break
 25868  		}
 25869  		_ = o4.Args[1]
 25870  		o3 := o4.Args[0]
 25871  		if o3.Op != OpPPC64OR {
 25872  			break
 25873  		}
 25874  		if o3.Type != t {
 25875  			break
 25876  		}
 25877  		_ = o3.Args[1]
 25878  		s4 := o3.Args[0]
 25879  		if s4.Op != OpPPC64SLDconst {
 25880  			break
 25881  		}
 25882  		if s4.AuxInt != 24 {
 25883  			break
 25884  		}
 25885  		x4 := s4.Args[0]
 25886  		if x4.Op != OpPPC64MOVBZload {
 25887  			break
 25888  		}
 25889  		i4 := x4.AuxInt
 25890  		s := x4.Aux
 25891  		_ = x4.Args[1]
 25892  		p := x4.Args[0]
 25893  		mem := x4.Args[1]
 25894  		s0 := o3.Args[1]
 25895  		if s0.Op != OpPPC64SLDconst {
 25896  			break
 25897  		}
 25898  		if s0.AuxInt != 32 {
 25899  			break
 25900  		}
 25901  		x3 := s0.Args[0]
 25902  		if x3.Op != OpPPC64MOVWBRload {
 25903  			break
 25904  		}
 25905  		if x3.Type != t {
 25906  			break
 25907  		}
 25908  		_ = x3.Args[1]
 25909  		x3_0 := x3.Args[0]
 25910  		if x3_0.Op != OpPPC64MOVDaddr {
 25911  			break
 25912  		}
 25913  		if x3_0.Type != typ.Uintptr {
 25914  			break
 25915  		}
 25916  		i0 := x3_0.AuxInt
 25917  		if x3_0.Aux != s {
 25918  			break
 25919  		}
 25920  		if p != x3_0.Args[0] {
 25921  			break
 25922  		}
 25923  		if mem != x3.Args[1] {
 25924  			break
 25925  		}
 25926  		s5 := o4.Args[1]
 25927  		if s5.Op != OpPPC64SLDconst {
 25928  			break
 25929  		}
 25930  		if s5.AuxInt != 16 {
 25931  			break
 25932  		}
 25933  		x5 := s5.Args[0]
 25934  		if x5.Op != OpPPC64MOVBZload {
 25935  			break
 25936  		}
 25937  		i5 := x5.AuxInt
 25938  		if x5.Aux != s {
 25939  			break
 25940  		}
 25941  		_ = x5.Args[1]
 25942  		if p != x5.Args[0] {
 25943  			break
 25944  		}
 25945  		if mem != x5.Args[1] {
 25946  			break
 25947  		}
 25948  		s6 := o5.Args[1]
 25949  		if s6.Op != OpPPC64SLDconst {
 25950  			break
 25951  		}
 25952  		if s6.AuxInt != 8 {
 25953  			break
 25954  		}
 25955  		x6 := s6.Args[0]
 25956  		if x6.Op != OpPPC64MOVBZload {
 25957  			break
 25958  		}
 25959  		i6 := x6.AuxInt
 25960  		if x6.Aux != s {
 25961  			break
 25962  		}
 25963  		_ = x6.Args[1]
 25964  		if p != x6.Args[0] {
 25965  			break
 25966  		}
 25967  		if mem != x6.Args[1] {
 25968  			break
 25969  		}
 25970  		x7 := v.Args[1]
 25971  		if x7.Op != OpPPC64MOVBZload {
 25972  			break
 25973  		}
 25974  		i7 := x7.AuxInt
 25975  		if x7.Aux != s {
 25976  			break
 25977  		}
 25978  		_ = x7.Args[1]
 25979  		if p != x7.Args[0] {
 25980  			break
 25981  		}
 25982  		if mem != x7.Args[1] {
 25983  			break
 25984  		}
 25985  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25986  			break
 25987  		}
 25988  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25989  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 25990  		v.reset(OpCopy)
 25991  		v.AddArg(v0)
 25992  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25993  		v1.AuxInt = i0
 25994  		v1.Aux = s
 25995  		v1.AddArg(p)
 25996  		v0.AddArg(v1)
 25997  		v0.AddArg(mem)
 25998  		return true
 25999  	}
 26000  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 26001  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 26002  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 26003  	for {
 26004  		t := v.Type
 26005  		_ = v.Args[1]
 26006  		o5 := v.Args[0]
 26007  		if o5.Op != OpPPC64OR {
 26008  			break
 26009  		}
 26010  		if o5.Type != t {
 26011  			break
 26012  		}
 26013  		_ = o5.Args[1]
 26014  		o4 := o5.Args[0]
 26015  		if o4.Op != OpPPC64OR {
 26016  			break
 26017  		}
 26018  		if o4.Type != t {
 26019  			break
 26020  		}
 26021  		_ = o4.Args[1]
 26022  		o3 := o4.Args[0]
 26023  		if o3.Op != OpPPC64OR {
 26024  			break
 26025  		}
 26026  		if o3.Type != t {
 26027  			break
 26028  		}
 26029  		_ = o3.Args[1]
 26030  		s0 := o3.Args[0]
 26031  		if s0.Op != OpPPC64SLDconst {
 26032  			break
 26033  		}
 26034  		if s0.AuxInt != 32 {
 26035  			break
 26036  		}
 26037  		x3 := s0.Args[0]
 26038  		if x3.Op != OpPPC64MOVWBRload {
 26039  			break
 26040  		}
 26041  		if x3.Type != t {
 26042  			break
 26043  		}
 26044  		_ = x3.Args[1]
 26045  		x3_0 := x3.Args[0]
 26046  		if x3_0.Op != OpPPC64MOVDaddr {
 26047  			break
 26048  		}
 26049  		if x3_0.Type != typ.Uintptr {
 26050  			break
 26051  		}
 26052  		i0 := x3_0.AuxInt
 26053  		s := x3_0.Aux
 26054  		p := x3_0.Args[0]
 26055  		mem := x3.Args[1]
 26056  		s4 := o3.Args[1]
 26057  		if s4.Op != OpPPC64SLDconst {
 26058  			break
 26059  		}
 26060  		if s4.AuxInt != 24 {
 26061  			break
 26062  		}
 26063  		x4 := s4.Args[0]
 26064  		if x4.Op != OpPPC64MOVBZload {
 26065  			break
 26066  		}
 26067  		i4 := x4.AuxInt
 26068  		if x4.Aux != s {
 26069  			break
 26070  		}
 26071  		_ = x4.Args[1]
 26072  		if p != x4.Args[0] {
 26073  			break
 26074  		}
 26075  		if mem != x4.Args[1] {
 26076  			break
 26077  		}
 26078  		s5 := o4.Args[1]
 26079  		if s5.Op != OpPPC64SLDconst {
 26080  			break
 26081  		}
 26082  		if s5.AuxInt != 16 {
 26083  			break
 26084  		}
 26085  		x5 := s5.Args[0]
 26086  		if x5.Op != OpPPC64MOVBZload {
 26087  			break
 26088  		}
 26089  		i5 := x5.AuxInt
 26090  		if x5.Aux != s {
 26091  			break
 26092  		}
 26093  		_ = x5.Args[1]
 26094  		if p != x5.Args[0] {
 26095  			break
 26096  		}
 26097  		if mem != x5.Args[1] {
 26098  			break
 26099  		}
 26100  		s6 := o5.Args[1]
 26101  		if s6.Op != OpPPC64SLDconst {
 26102  			break
 26103  		}
 26104  		if s6.AuxInt != 8 {
 26105  			break
 26106  		}
 26107  		x6 := s6.Args[0]
 26108  		if x6.Op != OpPPC64MOVBZload {
 26109  			break
 26110  		}
 26111  		i6 := x6.AuxInt
 26112  		if x6.Aux != s {
 26113  			break
 26114  		}
 26115  		_ = x6.Args[1]
 26116  		if p != x6.Args[0] {
 26117  			break
 26118  		}
 26119  		if mem != x6.Args[1] {
 26120  			break
 26121  		}
 26122  		x7 := v.Args[1]
 26123  		if x7.Op != OpPPC64MOVBZload {
 26124  			break
 26125  		}
 26126  		i7 := x7.AuxInt
 26127  		if x7.Aux != s {
 26128  			break
 26129  		}
 26130  		_ = x7.Args[1]
 26131  		if p != x7.Args[0] {
 26132  			break
 26133  		}
 26134  		if mem != x7.Args[1] {
 26135  			break
 26136  		}
 26137  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 26138  			break
 26139  		}
 26140  		b = mergePoint(b, x3, x4, x5, x6, x7)
 26141  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRload, t)
 26142  		v.reset(OpCopy)
 26143  		v.AddArg(v0)
 26144  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 26145  		v1.AuxInt = i0
 26146  		v1.Aux = s
 26147  		v1.AddArg(p)
 26148  		v0.AddArg(v1)
 26149  		v0.AddArg(mem)
 26150  		return true
 26151  	}
 26152  	return false
 26153  }
 26154  func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
 26155  	// match: (ORN x (MOVDconst [-1]))
 26156  	// cond:
 26157  	// result: x
 26158  	for {
 26159  		_ = v.Args[1]
 26160  		x := v.Args[0]
 26161  		v_1 := v.Args[1]
 26162  		if v_1.Op != OpPPC64MOVDconst {
 26163  			break
 26164  		}
 26165  		if v_1.AuxInt != -1 {
 26166  			break
 26167  		}
 26168  		v.reset(OpCopy)
 26169  		v.Type = x.Type
 26170  		v.AddArg(x)
 26171  		return true
 26172  	}
 26173  	return false
 26174  }
 26175  func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
 26176  	// match: (ORconst [c] (ORconst [d] x))
 26177  	// cond:
 26178  	// result: (ORconst [c|d] x)
 26179  	for {
 26180  		c := v.AuxInt
 26181  		v_0 := v.Args[0]
 26182  		if v_0.Op != OpPPC64ORconst {
 26183  			break
 26184  		}
 26185  		d := v_0.AuxInt
 26186  		x := v_0.Args[0]
 26187  		v.reset(OpPPC64ORconst)
 26188  		v.AuxInt = c | d
 26189  		v.AddArg(x)
 26190  		return true
 26191  	}
 26192  	// match: (ORconst [-1] _)
 26193  	// cond:
 26194  	// result: (MOVDconst [-1])
 26195  	for {
 26196  		if v.AuxInt != -1 {
 26197  			break
 26198  		}
 26199  		v.reset(OpPPC64MOVDconst)
 26200  		v.AuxInt = -1
 26201  		return true
 26202  	}
 26203  	// match: (ORconst [0] x)
 26204  	// cond:
 26205  	// result: x
 26206  	for {
 26207  		if v.AuxInt != 0 {
 26208  			break
 26209  		}
 26210  		x := v.Args[0]
 26211  		v.reset(OpCopy)
 26212  		v.Type = x.Type
 26213  		v.AddArg(x)
 26214  		return true
 26215  	}
 26216  	return false
 26217  }
 26218  func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
 26219  	// match: (SUB x (MOVDconst [c]))
 26220  	// cond: is32Bit(-c)
 26221  	// result: (ADDconst [-c] x)
 26222  	for {
 26223  		_ = v.Args[1]
 26224  		x := v.Args[0]
 26225  		v_1 := v.Args[1]
 26226  		if v_1.Op != OpPPC64MOVDconst {
 26227  			break
 26228  		}
 26229  		c := v_1.AuxInt
 26230  		if !(is32Bit(-c)) {
 26231  			break
 26232  		}
 26233  		v.reset(OpPPC64ADDconst)
 26234  		v.AuxInt = -c
 26235  		v.AddArg(x)
 26236  		return true
 26237  	}
 26238  	return false
 26239  }
 26240  func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
 26241  	b := v.Block
 26242  	_ = b
 26243  	typ := &b.Func.Config.Types
 26244  	_ = typ
 26245  	// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
 26246  	// cond: d == 64-c
 26247  	// result: (ROTLconst [c] x)
 26248  	for {
 26249  		_ = v.Args[1]
 26250  		v_0 := v.Args[0]
 26251  		if v_0.Op != OpPPC64SLDconst {
 26252  			break
 26253  		}
 26254  		c := v_0.AuxInt
 26255  		x := v_0.Args[0]
 26256  		v_1 := v.Args[1]
 26257  		if v_1.Op != OpPPC64SRDconst {
 26258  			break
 26259  		}
 26260  		d := v_1.AuxInt
 26261  		if x != v_1.Args[0] {
 26262  			break
 26263  		}
 26264  		if !(d == 64-c) {
 26265  			break
 26266  		}
 26267  		v.reset(OpPPC64ROTLconst)
 26268  		v.AuxInt = c
 26269  		v.AddArg(x)
 26270  		return true
 26271  	}
 26272  	// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
 26273  	// cond: d == 64-c
 26274  	// result: (ROTLconst [c] x)
 26275  	for {
 26276  		_ = v.Args[1]
 26277  		v_0 := v.Args[0]
 26278  		if v_0.Op != OpPPC64SRDconst {
 26279  			break
 26280  		}
 26281  		d := v_0.AuxInt
 26282  		x := v_0.Args[0]
 26283  		v_1 := v.Args[1]
 26284  		if v_1.Op != OpPPC64SLDconst {
 26285  			break
 26286  		}
 26287  		c := v_1.AuxInt
 26288  		if x != v_1.Args[0] {
 26289  			break
 26290  		}
 26291  		if !(d == 64-c) {
 26292  			break
 26293  		}
 26294  		v.reset(OpPPC64ROTLconst)
 26295  		v.AuxInt = c
 26296  		v.AddArg(x)
 26297  		return true
 26298  	}
 26299  	// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
 26300  	// cond: d == 32-c
 26301  	// result: (ROTLWconst [c] x)
 26302  	for {
 26303  		_ = v.Args[1]
 26304  		v_0 := v.Args[0]
 26305  		if v_0.Op != OpPPC64SLWconst {
 26306  			break
 26307  		}
 26308  		c := v_0.AuxInt
 26309  		x := v_0.Args[0]
 26310  		v_1 := v.Args[1]
 26311  		if v_1.Op != OpPPC64SRWconst {
 26312  			break
 26313  		}
 26314  		d := v_1.AuxInt
 26315  		if x != v_1.Args[0] {
 26316  			break
 26317  		}
 26318  		if !(d == 32-c) {
 26319  			break
 26320  		}
 26321  		v.reset(OpPPC64ROTLWconst)
 26322  		v.AuxInt = c
 26323  		v.AddArg(x)
 26324  		return true
 26325  	}
 26326  	// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
 26327  	// cond: d == 32-c
 26328  	// result: (ROTLWconst [c] x)
 26329  	for {
 26330  		_ = v.Args[1]
 26331  		v_0 := v.Args[0]
 26332  		if v_0.Op != OpPPC64SRWconst {
 26333  			break
 26334  		}
 26335  		d := v_0.AuxInt
 26336  		x := v_0.Args[0]
 26337  		v_1 := v.Args[1]
 26338  		if v_1.Op != OpPPC64SLWconst {
 26339  			break
 26340  		}
 26341  		c := v_1.AuxInt
 26342  		if x != v_1.Args[0] {
 26343  			break
 26344  		}
 26345  		if !(d == 32-c) {
 26346  			break
 26347  		}
 26348  		v.reset(OpPPC64ROTLWconst)
 26349  		v.AuxInt = c
 26350  		v.AddArg(x)
 26351  		return true
 26352  	}
 26353  	// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 26354  	// cond:
 26355  	// result: (ROTL x y)
 26356  	for {
 26357  		_ = v.Args[1]
 26358  		v_0 := v.Args[0]
 26359  		if v_0.Op != OpPPC64SLD {
 26360  			break
 26361  		}
 26362  		_ = v_0.Args[1]
 26363  		x := v_0.Args[0]
 26364  		v_0_1 := v_0.Args[1]
 26365  		if v_0_1.Op != OpPPC64ANDconst {
 26366  			break
 26367  		}
 26368  		if v_0_1.Type != typ.Int64 {
 26369  			break
 26370  		}
 26371  		if v_0_1.AuxInt != 63 {
 26372  			break
 26373  		}
 26374  		y := v_0_1.Args[0]
 26375  		v_1 := v.Args[1]
 26376  		if v_1.Op != OpPPC64SRD {
 26377  			break
 26378  		}
 26379  		_ = v_1.Args[1]
 26380  		if x != v_1.Args[0] {
 26381  			break
 26382  		}
 26383  		v_1_1 := v_1.Args[1]
 26384  		if v_1_1.Op != OpPPC64SUB {
 26385  			break
 26386  		}
 26387  		if v_1_1.Type != typ.UInt {
 26388  			break
 26389  		}
 26390  		_ = v_1_1.Args[1]
 26391  		v_1_1_0 := v_1_1.Args[0]
 26392  		if v_1_1_0.Op != OpPPC64MOVDconst {
 26393  			break
 26394  		}
 26395  		if v_1_1_0.AuxInt != 64 {
 26396  			break
 26397  		}
 26398  		v_1_1_1 := v_1_1.Args[1]
 26399  		if v_1_1_1.Op != OpPPC64ANDconst {
 26400  			break
 26401  		}
 26402  		if v_1_1_1.Type != typ.UInt {
 26403  			break
 26404  		}
 26405  		if v_1_1_1.AuxInt != 63 {
 26406  			break
 26407  		}
 26408  		if y != v_1_1_1.Args[0] {
 26409  			break
 26410  		}
 26411  		v.reset(OpPPC64ROTL)
 26412  		v.AddArg(x)
 26413  		v.AddArg(y)
 26414  		return true
 26415  	}
 26416  	// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 26417  	// cond:
 26418  	// result: (ROTL x y)
 26419  	for {
 26420  		_ = v.Args[1]
 26421  		v_0 := v.Args[0]
 26422  		if v_0.Op != OpPPC64SRD {
 26423  			break
 26424  		}
 26425  		_ = v_0.Args[1]
 26426  		x := v_0.Args[0]
 26427  		v_0_1 := v_0.Args[1]
 26428  		if v_0_1.Op != OpPPC64SUB {
 26429  			break
 26430  		}
 26431  		if v_0_1.Type != typ.UInt {
 26432  			break
 26433  		}
 26434  		_ = v_0_1.Args[1]
 26435  		v_0_1_0 := v_0_1.Args[0]
 26436  		if v_0_1_0.Op != OpPPC64MOVDconst {
 26437  			break
 26438  		}
 26439  		if v_0_1_0.AuxInt != 64 {
 26440  			break
 26441  		}
 26442  		v_0_1_1 := v_0_1.Args[1]
 26443  		if v_0_1_1.Op != OpPPC64ANDconst {
 26444  			break
 26445  		}
 26446  		if v_0_1_1.Type != typ.UInt {
 26447  			break
 26448  		}
 26449  		if v_0_1_1.AuxInt != 63 {
 26450  			break
 26451  		}
 26452  		y := v_0_1_1.Args[0]
 26453  		v_1 := v.Args[1]
 26454  		if v_1.Op != OpPPC64SLD {
 26455  			break
 26456  		}
 26457  		_ = v_1.Args[1]
 26458  		if x != v_1.Args[0] {
 26459  			break
 26460  		}
 26461  		v_1_1 := v_1.Args[1]
 26462  		if v_1_1.Op != OpPPC64ANDconst {
 26463  			break
 26464  		}
 26465  		if v_1_1.Type != typ.Int64 {
 26466  			break
 26467  		}
 26468  		if v_1_1.AuxInt != 63 {
 26469  			break
 26470  		}
 26471  		if y != v_1_1.Args[0] {
 26472  			break
 26473  		}
 26474  		v.reset(OpPPC64ROTL)
 26475  		v.AddArg(x)
 26476  		v.AddArg(y)
 26477  		return true
 26478  	}
 26479  	// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 26480  	// cond:
 26481  	// result: (ROTLW x y)
 26482  	for {
 26483  		_ = v.Args[1]
 26484  		v_0 := v.Args[0]
 26485  		if v_0.Op != OpPPC64SLW {
 26486  			break
 26487  		}
 26488  		_ = v_0.Args[1]
 26489  		x := v_0.Args[0]
 26490  		v_0_1 := v_0.Args[1]
 26491  		if v_0_1.Op != OpPPC64ANDconst {
 26492  			break
 26493  		}
 26494  		if v_0_1.Type != typ.Int32 {
 26495  			break
 26496  		}
 26497  		if v_0_1.AuxInt != 31 {
 26498  			break
 26499  		}
 26500  		y := v_0_1.Args[0]
 26501  		v_1 := v.Args[1]
 26502  		if v_1.Op != OpPPC64SRW {
 26503  			break
 26504  		}
 26505  		_ = v_1.Args[1]
 26506  		if x != v_1.Args[0] {
 26507  			break
 26508  		}
 26509  		v_1_1 := v_1.Args[1]
 26510  		if v_1_1.Op != OpPPC64SUB {
 26511  			break
 26512  		}
 26513  		if v_1_1.Type != typ.UInt {
 26514  			break
 26515  		}
 26516  		_ = v_1_1.Args[1]
 26517  		v_1_1_0 := v_1_1.Args[0]
 26518  		if v_1_1_0.Op != OpPPC64MOVDconst {
 26519  			break
 26520  		}
 26521  		if v_1_1_0.AuxInt != 32 {
 26522  			break
 26523  		}
 26524  		v_1_1_1 := v_1_1.Args[1]
 26525  		if v_1_1_1.Op != OpPPC64ANDconst {
 26526  			break
 26527  		}
 26528  		if v_1_1_1.Type != typ.UInt {
 26529  			break
 26530  		}
 26531  		if v_1_1_1.AuxInt != 31 {
 26532  			break
 26533  		}
 26534  		if y != v_1_1_1.Args[0] {
 26535  			break
 26536  		}
 26537  		v.reset(OpPPC64ROTLW)
 26538  		v.AddArg(x)
 26539  		v.AddArg(y)
 26540  		return true
 26541  	}
 26542  	// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 26543  	// cond:
 26544  	// result: (ROTLW x y)
 26545  	for {
 26546  		_ = v.Args[1]
 26547  		v_0 := v.Args[0]
 26548  		if v_0.Op != OpPPC64SRW {
 26549  			break
 26550  		}
 26551  		_ = v_0.Args[1]
 26552  		x := v_0.Args[0]
 26553  		v_0_1 := v_0.Args[1]
 26554  		if v_0_1.Op != OpPPC64SUB {
 26555  			break
 26556  		}
 26557  		if v_0_1.Type != typ.UInt {
 26558  			break
 26559  		}
 26560  		_ = v_0_1.Args[1]
 26561  		v_0_1_0 := v_0_1.Args[0]
 26562  		if v_0_1_0.Op != OpPPC64MOVDconst {
 26563  			break
 26564  		}
 26565  		if v_0_1_0.AuxInt != 32 {
 26566  			break
 26567  		}
 26568  		v_0_1_1 := v_0_1.Args[1]
 26569  		if v_0_1_1.Op != OpPPC64ANDconst {
 26570  			break
 26571  		}
 26572  		if v_0_1_1.Type != typ.UInt {
 26573  			break
 26574  		}
 26575  		if v_0_1_1.AuxInt != 31 {
 26576  			break
 26577  		}
 26578  		y := v_0_1_1.Args[0]
 26579  		v_1 := v.Args[1]
 26580  		if v_1.Op != OpPPC64SLW {
 26581  			break
 26582  		}
 26583  		_ = v_1.Args[1]
 26584  		if x != v_1.Args[0] {
 26585  			break
 26586  		}
 26587  		v_1_1 := v_1.Args[1]
 26588  		if v_1_1.Op != OpPPC64ANDconst {
 26589  			break
 26590  		}
 26591  		if v_1_1.Type != typ.Int32 {
 26592  			break
 26593  		}
 26594  		if v_1_1.AuxInt != 31 {
 26595  			break
 26596  		}
 26597  		if y != v_1_1.Args[0] {
 26598  			break
 26599  		}
 26600  		v.reset(OpPPC64ROTLW)
 26601  		v.AddArg(x)
 26602  		v.AddArg(y)
 26603  		return true
 26604  	}
 26605  	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
 26606  	// cond:
 26607  	// result: (MOVDconst [c^d])
 26608  	for {
 26609  		_ = v.Args[1]
 26610  		v_0 := v.Args[0]
 26611  		if v_0.Op != OpPPC64MOVDconst {
 26612  			break
 26613  		}
 26614  		c := v_0.AuxInt
 26615  		v_1 := v.Args[1]
 26616  		if v_1.Op != OpPPC64MOVDconst {
 26617  			break
 26618  		}
 26619  		d := v_1.AuxInt
 26620  		v.reset(OpPPC64MOVDconst)
 26621  		v.AuxInt = c ^ d
 26622  		return true
 26623  	}
 26624  	// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
 26625  	// cond:
 26626  	// result: (MOVDconst [c^d])
 26627  	for {
 26628  		_ = v.Args[1]
 26629  		v_0 := v.Args[0]
 26630  		if v_0.Op != OpPPC64MOVDconst {
 26631  			break
 26632  		}
 26633  		d := v_0.AuxInt
 26634  		v_1 := v.Args[1]
 26635  		if v_1.Op != OpPPC64MOVDconst {
 26636  			break
 26637  		}
 26638  		c := v_1.AuxInt
 26639  		v.reset(OpPPC64MOVDconst)
 26640  		v.AuxInt = c ^ d
 26641  		return true
 26642  	}
 26643  	return false
 26644  }
 26645  func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
 26646  	// match: (XOR x (MOVDconst [c]))
 26647  	// cond: isU32Bit(c)
 26648  	// result: (XORconst [c] x)
 26649  	for {
 26650  		_ = v.Args[1]
 26651  		x := v.Args[0]
 26652  		v_1 := v.Args[1]
 26653  		if v_1.Op != OpPPC64MOVDconst {
 26654  			break
 26655  		}
 26656  		c := v_1.AuxInt
 26657  		if !(isU32Bit(c)) {
 26658  			break
 26659  		}
 26660  		v.reset(OpPPC64XORconst)
 26661  		v.AuxInt = c
 26662  		v.AddArg(x)
 26663  		return true
 26664  	}
 26665  	// match: (XOR (MOVDconst [c]) x)
 26666  	// cond: isU32Bit(c)
 26667  	// result: (XORconst [c] x)
 26668  	for {
 26669  		_ = v.Args[1]
 26670  		v_0 := v.Args[0]
 26671  		if v_0.Op != OpPPC64MOVDconst {
 26672  			break
 26673  		}
 26674  		c := v_0.AuxInt
 26675  		x := v.Args[1]
 26676  		if !(isU32Bit(c)) {
 26677  			break
 26678  		}
 26679  		v.reset(OpPPC64XORconst)
 26680  		v.AuxInt = c
 26681  		v.AddArg(x)
 26682  		return true
 26683  	}
 26684  	return false
 26685  }
 26686  func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
 26687  	// match: (XORconst [c] (XORconst [d] x))
 26688  	// cond:
 26689  	// result: (XORconst [c^d] x)
 26690  	for {
 26691  		c := v.AuxInt
 26692  		v_0 := v.Args[0]
 26693  		if v_0.Op != OpPPC64XORconst {
 26694  			break
 26695  		}
 26696  		d := v_0.AuxInt
 26697  		x := v_0.Args[0]
 26698  		v.reset(OpPPC64XORconst)
 26699  		v.AuxInt = c ^ d
 26700  		v.AddArg(x)
 26701  		return true
 26702  	}
 26703  	// match: (XORconst [0] x)
 26704  	// cond:
 26705  	// result: x
 26706  	for {
 26707  		if v.AuxInt != 0 {
 26708  			break
 26709  		}
 26710  		x := v.Args[0]
 26711  		v.reset(OpCopy)
 26712  		v.Type = x.Type
 26713  		v.AddArg(x)
 26714  		return true
 26715  	}
 26716  	return false
 26717  }
 26718  func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
 26719  	b := v.Block
 26720  	_ = b
 26721  	typ := &b.Func.Config.Types
 26722  	_ = typ
 26723  	// match: (PopCount16 x)
 26724  	// cond:
 26725  	// result: (POPCNTW (MOVHZreg x))
 26726  	for {
 26727  		x := v.Args[0]
 26728  		v.reset(OpPPC64POPCNTW)
 26729  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26730  		v0.AddArg(x)
 26731  		v.AddArg(v0)
 26732  		return true
 26733  	}
 26734  }
 26735  func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
 26736  	b := v.Block
 26737  	_ = b
 26738  	typ := &b.Func.Config.Types
 26739  	_ = typ
 26740  	// match: (PopCount32 x)
 26741  	// cond:
 26742  	// result: (POPCNTW (MOVWZreg x))
 26743  	for {
 26744  		x := v.Args[0]
 26745  		v.reset(OpPPC64POPCNTW)
 26746  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 26747  		v0.AddArg(x)
 26748  		v.AddArg(v0)
 26749  		return true
 26750  	}
 26751  }
 26752  func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
 26753  	// match: (PopCount64 x)
 26754  	// cond:
 26755  	// result: (POPCNTD x)
 26756  	for {
 26757  		x := v.Args[0]
 26758  		v.reset(OpPPC64POPCNTD)
 26759  		v.AddArg(x)
 26760  		return true
 26761  	}
 26762  }
 26763  func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
 26764  	b := v.Block
 26765  	_ = b
 26766  	typ := &b.Func.Config.Types
 26767  	_ = typ
 26768  	// match: (PopCount8 x)
 26769  	// cond:
 26770  	// result: (POPCNTB (MOVBZreg x))
 26771  	for {
 26772  		x := v.Args[0]
 26773  		v.reset(OpPPC64POPCNTB)
 26774  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 26775  		v0.AddArg(x)
 26776  		v.AddArg(v0)
 26777  		return true
 26778  	}
 26779  }
 26780  func rewriteValuePPC64_OpRound_0(v *Value) bool {
 26781  	// match: (Round x)
 26782  	// cond:
 26783  	// result: (FROUND x)
 26784  	for {
 26785  		x := v.Args[0]
 26786  		v.reset(OpPPC64FROUND)
 26787  		v.AddArg(x)
 26788  		return true
 26789  	}
 26790  }
 26791  func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
 26792  	// match: (Round32F x)
 26793  	// cond:
 26794  	// result: (LoweredRound32F x)
 26795  	for {
 26796  		x := v.Args[0]
 26797  		v.reset(OpPPC64LoweredRound32F)
 26798  		v.AddArg(x)
 26799  		return true
 26800  	}
 26801  }
 26802  func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
 26803  	// match: (Round64F x)
 26804  	// cond:
 26805  	// result: (LoweredRound64F x)
 26806  	for {
 26807  		x := v.Args[0]
 26808  		v.reset(OpPPC64LoweredRound64F)
 26809  		v.AddArg(x)
 26810  		return true
 26811  	}
 26812  }
 26813  func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
 26814  	b := v.Block
 26815  	_ = b
 26816  	typ := &b.Func.Config.Types
 26817  	_ = typ
 26818  	// match: (Rsh16Ux16 x y)
 26819  	// cond: shiftIsBounded(v)
 26820  	// result: (SRW (MOVHZreg x) y)
 26821  	for {
 26822  		_ = v.Args[1]
 26823  		x := v.Args[0]
 26824  		y := v.Args[1]
 26825  		if !(shiftIsBounded(v)) {
 26826  			break
 26827  		}
 26828  		v.reset(OpPPC64SRW)
 26829  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26830  		v0.AddArg(x)
 26831  		v.AddArg(v0)
 26832  		v.AddArg(y)
 26833  		return true
 26834  	}
 26835  	// match: (Rsh16Ux16 x y)
 26836  	// cond:
 26837  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 26838  	for {
 26839  		_ = v.Args[1]
 26840  		x := v.Args[0]
 26841  		y := v.Args[1]
 26842  		v.reset(OpPPC64SRW)
 26843  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26844  		v0.AddArg(x)
 26845  		v.AddArg(v0)
 26846  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26847  		v1.AddArg(y)
 26848  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26849  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26850  		v3.AuxInt = -16
 26851  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 26852  		v4.AddArg(y)
 26853  		v3.AddArg(v4)
 26854  		v2.AddArg(v3)
 26855  		v1.AddArg(v2)
 26856  		v.AddArg(v1)
 26857  		return true
 26858  	}
 26859  }
 26860  func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
 26861  	b := v.Block
 26862  	_ = b
 26863  	typ := &b.Func.Config.Types
 26864  	_ = typ
 26865  	// match: (Rsh16Ux32 x (Const64 [c]))
 26866  	// cond: uint32(c) < 16
 26867  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26868  	for {
 26869  		_ = v.Args[1]
 26870  		x := v.Args[0]
 26871  		v_1 := v.Args[1]
 26872  		if v_1.Op != OpConst64 {
 26873  			break
 26874  		}
 26875  		c := v_1.AuxInt
 26876  		if !(uint32(c) < 16) {
 26877  			break
 26878  		}
 26879  		v.reset(OpPPC64SRWconst)
 26880  		v.AuxInt = c
 26881  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26882  		v0.AddArg(x)
 26883  		v.AddArg(v0)
 26884  		return true
 26885  	}
 26886  	// match: (Rsh16Ux32 x (MOVDconst [c]))
 26887  	// cond: uint32(c) < 16
 26888  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26889  	for {
 26890  		_ = v.Args[1]
 26891  		x := v.Args[0]
 26892  		v_1 := v.Args[1]
 26893  		if v_1.Op != OpPPC64MOVDconst {
 26894  			break
 26895  		}
 26896  		c := v_1.AuxInt
 26897  		if !(uint32(c) < 16) {
 26898  			break
 26899  		}
 26900  		v.reset(OpPPC64SRWconst)
 26901  		v.AuxInt = c
 26902  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26903  		v0.AddArg(x)
 26904  		v.AddArg(v0)
 26905  		return true
 26906  	}
 26907  	// match: (Rsh16Ux32 x y)
 26908  	// cond: shiftIsBounded(v)
 26909  	// result: (SRW (MOVHZreg x) y)
 26910  	for {
 26911  		_ = v.Args[1]
 26912  		x := v.Args[0]
 26913  		y := v.Args[1]
 26914  		if !(shiftIsBounded(v)) {
 26915  			break
 26916  		}
 26917  		v.reset(OpPPC64SRW)
 26918  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26919  		v0.AddArg(x)
 26920  		v.AddArg(v0)
 26921  		v.AddArg(y)
 26922  		return true
 26923  	}
 26924  	// match: (Rsh16Ux32 x y)
 26925  	// cond:
 26926  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 26927  	for {
 26928  		_ = v.Args[1]
 26929  		x := v.Args[0]
 26930  		y := v.Args[1]
 26931  		v.reset(OpPPC64SRW)
 26932  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26933  		v0.AddArg(x)
 26934  		v.AddArg(v0)
 26935  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26936  		v1.AddArg(y)
 26937  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26938  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26939  		v3.AuxInt = -16
 26940  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 26941  		v4.AddArg(y)
 26942  		v3.AddArg(v4)
 26943  		v2.AddArg(v3)
 26944  		v1.AddArg(v2)
 26945  		v.AddArg(v1)
 26946  		return true
 26947  	}
 26948  }
 26949  func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
 26950  	b := v.Block
 26951  	_ = b
 26952  	typ := &b.Func.Config.Types
 26953  	_ = typ
 26954  	// match: (Rsh16Ux64 x (Const64 [c]))
 26955  	// cond: uint64(c) < 16
 26956  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26957  	for {
 26958  		_ = v.Args[1]
 26959  		x := v.Args[0]
 26960  		v_1 := v.Args[1]
 26961  		if v_1.Op != OpConst64 {
 26962  			break
 26963  		}
 26964  		c := v_1.AuxInt
 26965  		if !(uint64(c) < 16) {
 26966  			break
 26967  		}
 26968  		v.reset(OpPPC64SRWconst)
 26969  		v.AuxInt = c
 26970  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26971  		v0.AddArg(x)
 26972  		v.AddArg(v0)
 26973  		return true
 26974  	}
 26975  	// match: (Rsh16Ux64 _ (Const64 [c]))
 26976  	// cond: uint64(c) >= 16
 26977  	// result: (MOVDconst [0])
 26978  	for {
 26979  		_ = v.Args[1]
 26980  		v_1 := v.Args[1]
 26981  		if v_1.Op != OpConst64 {
 26982  			break
 26983  		}
 26984  		c := v_1.AuxInt
 26985  		if !(uint64(c) >= 16) {
 26986  			break
 26987  		}
 26988  		v.reset(OpPPC64MOVDconst)
 26989  		v.AuxInt = 0
 26990  		return true
 26991  	}
 26992  	// match: (Rsh16Ux64 x (MOVDconst [c]))
 26993  	// cond: uint64(c) < 16
 26994  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26995  	for {
 26996  		_ = v.Args[1]
 26997  		x := v.Args[0]
 26998  		v_1 := v.Args[1]
 26999  		if v_1.Op != OpPPC64MOVDconst {
 27000  			break
 27001  		}
 27002  		c := v_1.AuxInt
 27003  		if !(uint64(c) < 16) {
 27004  			break
 27005  		}
 27006  		v.reset(OpPPC64SRWconst)
 27007  		v.AuxInt = c
 27008  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27009  		v0.AddArg(x)
 27010  		v.AddArg(v0)
 27011  		return true
 27012  	}
 27013  	// match: (Rsh16Ux64 x y)
 27014  	// cond: shiftIsBounded(v)
 27015  	// result: (SRW (MOVHZreg x) y)
 27016  	for {
 27017  		_ = v.Args[1]
 27018  		x := v.Args[0]
 27019  		y := v.Args[1]
 27020  		if !(shiftIsBounded(v)) {
 27021  			break
 27022  		}
 27023  		v.reset(OpPPC64SRW)
 27024  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 27025  		v0.AddArg(x)
 27026  		v.AddArg(v0)
 27027  		v.AddArg(y)
 27028  		return true
 27029  	}
 27030  	// match: (Rsh16Ux64 x y)
 27031  	// cond:
 27032  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 27033  	for {
 27034  		_ = v.Args[1]
 27035  		x := v.Args[0]
 27036  		y := v.Args[1]
 27037  		v.reset(OpPPC64SRW)
 27038  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27039  		v0.AddArg(x)
 27040  		v.AddArg(v0)
 27041  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27042  		v1.AddArg(y)
 27043  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27044  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27045  		v3.AuxInt = -16
 27046  		v3.AddArg(y)
 27047  		v2.AddArg(v3)
 27048  		v1.AddArg(v2)
 27049  		v.AddArg(v1)
 27050  		return true
 27051  	}
 27052  }
 27053  func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
 27054  	b := v.Block
 27055  	_ = b
 27056  	typ := &b.Func.Config.Types
 27057  	_ = typ
 27058  	// match: (Rsh16Ux8 x y)
 27059  	// cond: shiftIsBounded(v)
 27060  	// result: (SRW (MOVHZreg x) y)
 27061  	for {
 27062  		_ = v.Args[1]
 27063  		x := v.Args[0]
 27064  		y := v.Args[1]
 27065  		if !(shiftIsBounded(v)) {
 27066  			break
 27067  		}
 27068  		v.reset(OpPPC64SRW)
 27069  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 27070  		v0.AddArg(x)
 27071  		v.AddArg(v0)
 27072  		v.AddArg(y)
 27073  		return true
 27074  	}
 27075  	// match: (Rsh16Ux8 x y)
 27076  	// cond:
 27077  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 27078  	for {
 27079  		_ = v.Args[1]
 27080  		x := v.Args[0]
 27081  		y := v.Args[1]
 27082  		v.reset(OpPPC64SRW)
 27083  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27084  		v0.AddArg(x)
 27085  		v.AddArg(v0)
 27086  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27087  		v1.AddArg(y)
 27088  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27089  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27090  		v3.AuxInt = -16
 27091  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27092  		v4.AddArg(y)
 27093  		v3.AddArg(v4)
 27094  		v2.AddArg(v3)
 27095  		v1.AddArg(v2)
 27096  		v.AddArg(v1)
 27097  		return true
 27098  	}
 27099  }
 27100  func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
 27101  	b := v.Block
 27102  	_ = b
 27103  	typ := &b.Func.Config.Types
 27104  	_ = typ
 27105  	// match: (Rsh16x16 x y)
 27106  	// cond: shiftIsBounded(v)
 27107  	// result: (SRAW (MOVHreg x) y)
 27108  	for {
 27109  		_ = v.Args[1]
 27110  		x := v.Args[0]
 27111  		y := v.Args[1]
 27112  		if !(shiftIsBounded(v)) {
 27113  			break
 27114  		}
 27115  		v.reset(OpPPC64SRAW)
 27116  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27117  		v0.AddArg(x)
 27118  		v.AddArg(v0)
 27119  		v.AddArg(y)
 27120  		return true
 27121  	}
 27122  	// match: (Rsh16x16 x y)
 27123  	// cond:
 27124  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 27125  	for {
 27126  		_ = v.Args[1]
 27127  		x := v.Args[0]
 27128  		y := v.Args[1]
 27129  		v.reset(OpPPC64SRAW)
 27130  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27131  		v0.AddArg(x)
 27132  		v.AddArg(v0)
 27133  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27134  		v1.AddArg(y)
 27135  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27136  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27137  		v3.AuxInt = -16
 27138  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27139  		v4.AddArg(y)
 27140  		v3.AddArg(v4)
 27141  		v2.AddArg(v3)
 27142  		v1.AddArg(v2)
 27143  		v.AddArg(v1)
 27144  		return true
 27145  	}
 27146  }
 27147  func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
 27148  	b := v.Block
 27149  	_ = b
 27150  	typ := &b.Func.Config.Types
 27151  	_ = typ
 27152  	// match: (Rsh16x32 x (Const64 [c]))
 27153  	// cond: uint32(c) < 16
 27154  	// result: (SRAWconst (SignExt16to32 x) [c])
 27155  	for {
 27156  		_ = v.Args[1]
 27157  		x := v.Args[0]
 27158  		v_1 := v.Args[1]
 27159  		if v_1.Op != OpConst64 {
 27160  			break
 27161  		}
 27162  		c := v_1.AuxInt
 27163  		if !(uint32(c) < 16) {
 27164  			break
 27165  		}
 27166  		v.reset(OpPPC64SRAWconst)
 27167  		v.AuxInt = c
 27168  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27169  		v0.AddArg(x)
 27170  		v.AddArg(v0)
 27171  		return true
 27172  	}
 27173  	// match: (Rsh16x32 x (MOVDconst [c]))
 27174  	// cond: uint32(c) < 16
 27175  	// result: (SRAWconst (SignExt16to32 x) [c])
 27176  	for {
 27177  		_ = v.Args[1]
 27178  		x := v.Args[0]
 27179  		v_1 := v.Args[1]
 27180  		if v_1.Op != OpPPC64MOVDconst {
 27181  			break
 27182  		}
 27183  		c := v_1.AuxInt
 27184  		if !(uint32(c) < 16) {
 27185  			break
 27186  		}
 27187  		v.reset(OpPPC64SRAWconst)
 27188  		v.AuxInt = c
 27189  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27190  		v0.AddArg(x)
 27191  		v.AddArg(v0)
 27192  		return true
 27193  	}
 27194  	// match: (Rsh16x32 x y)
 27195  	// cond: shiftIsBounded(v)
 27196  	// result: (SRAW (MOVHreg x) y)
 27197  	for {
 27198  		_ = v.Args[1]
 27199  		x := v.Args[0]
 27200  		y := v.Args[1]
 27201  		if !(shiftIsBounded(v)) {
 27202  			break
 27203  		}
 27204  		v.reset(OpPPC64SRAW)
 27205  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27206  		v0.AddArg(x)
 27207  		v.AddArg(v0)
 27208  		v.AddArg(y)
 27209  		return true
 27210  	}
 27211  	// match: (Rsh16x32 x y)
 27212  	// cond:
 27213  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 27214  	for {
 27215  		_ = v.Args[1]
 27216  		x := v.Args[0]
 27217  		y := v.Args[1]
 27218  		v.reset(OpPPC64SRAW)
 27219  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27220  		v0.AddArg(x)
 27221  		v.AddArg(v0)
 27222  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27223  		v1.AddArg(y)
 27224  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27225  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27226  		v3.AuxInt = -16
 27227  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27228  		v4.AddArg(y)
 27229  		v3.AddArg(v4)
 27230  		v2.AddArg(v3)
 27231  		v1.AddArg(v2)
 27232  		v.AddArg(v1)
 27233  		return true
 27234  	}
 27235  }
 27236  func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
 27237  	b := v.Block
 27238  	_ = b
 27239  	typ := &b.Func.Config.Types
 27240  	_ = typ
 27241  	// match: (Rsh16x64 x (Const64 [c]))
 27242  	// cond: uint64(c) < 16
 27243  	// result: (SRAWconst (SignExt16to32 x) [c])
 27244  	for {
 27245  		_ = v.Args[1]
 27246  		x := v.Args[0]
 27247  		v_1 := v.Args[1]
 27248  		if v_1.Op != OpConst64 {
 27249  			break
 27250  		}
 27251  		c := v_1.AuxInt
 27252  		if !(uint64(c) < 16) {
 27253  			break
 27254  		}
 27255  		v.reset(OpPPC64SRAWconst)
 27256  		v.AuxInt = c
 27257  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27258  		v0.AddArg(x)
 27259  		v.AddArg(v0)
 27260  		return true
 27261  	}
 27262  	// match: (Rsh16x64 x (Const64 [c]))
 27263  	// cond: uint64(c) >= 16
 27264  	// result: (SRAWconst (SignExt16to32 x) [63])
 27265  	for {
 27266  		_ = v.Args[1]
 27267  		x := v.Args[0]
 27268  		v_1 := v.Args[1]
 27269  		if v_1.Op != OpConst64 {
 27270  			break
 27271  		}
 27272  		c := v_1.AuxInt
 27273  		if !(uint64(c) >= 16) {
 27274  			break
 27275  		}
 27276  		v.reset(OpPPC64SRAWconst)
 27277  		v.AuxInt = 63
 27278  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27279  		v0.AddArg(x)
 27280  		v.AddArg(v0)
 27281  		return true
 27282  	}
 27283  	// match: (Rsh16x64 x (MOVDconst [c]))
 27284  	// cond: uint64(c) < 16
 27285  	// result: (SRAWconst (SignExt16to32 x) [c])
 27286  	for {
 27287  		_ = v.Args[1]
 27288  		x := v.Args[0]
 27289  		v_1 := v.Args[1]
 27290  		if v_1.Op != OpPPC64MOVDconst {
 27291  			break
 27292  		}
 27293  		c := v_1.AuxInt
 27294  		if !(uint64(c) < 16) {
 27295  			break
 27296  		}
 27297  		v.reset(OpPPC64SRAWconst)
 27298  		v.AuxInt = c
 27299  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27300  		v0.AddArg(x)
 27301  		v.AddArg(v0)
 27302  		return true
 27303  	}
 27304  	// match: (Rsh16x64 x y)
 27305  	// cond: shiftIsBounded(v)
 27306  	// result: (SRAW (MOVHreg x) y)
 27307  	for {
 27308  		_ = v.Args[1]
 27309  		x := v.Args[0]
 27310  		y := v.Args[1]
 27311  		if !(shiftIsBounded(v)) {
 27312  			break
 27313  		}
 27314  		v.reset(OpPPC64SRAW)
 27315  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27316  		v0.AddArg(x)
 27317  		v.AddArg(v0)
 27318  		v.AddArg(y)
 27319  		return true
 27320  	}
 27321  	// match: (Rsh16x64 x y)
 27322  	// cond:
 27323  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 27324  	for {
 27325  		_ = v.Args[1]
 27326  		x := v.Args[0]
 27327  		y := v.Args[1]
 27328  		v.reset(OpPPC64SRAW)
 27329  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27330  		v0.AddArg(x)
 27331  		v.AddArg(v0)
 27332  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27333  		v1.AddArg(y)
 27334  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27335  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27336  		v3.AuxInt = -16
 27337  		v3.AddArg(y)
 27338  		v2.AddArg(v3)
 27339  		v1.AddArg(v2)
 27340  		v.AddArg(v1)
 27341  		return true
 27342  	}
 27343  }
 27344  func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
 27345  	b := v.Block
 27346  	_ = b
 27347  	typ := &b.Func.Config.Types
 27348  	_ = typ
 27349  	// match: (Rsh16x8 x y)
 27350  	// cond: shiftIsBounded(v)
 27351  	// result: (SRAW (MOVHreg x) y)
 27352  	for {
 27353  		_ = v.Args[1]
 27354  		x := v.Args[0]
 27355  		y := v.Args[1]
 27356  		if !(shiftIsBounded(v)) {
 27357  			break
 27358  		}
 27359  		v.reset(OpPPC64SRAW)
 27360  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27361  		v0.AddArg(x)
 27362  		v.AddArg(v0)
 27363  		v.AddArg(y)
 27364  		return true
 27365  	}
 27366  	// match: (Rsh16x8 x y)
 27367  	// cond:
 27368  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 27369  	for {
 27370  		_ = v.Args[1]
 27371  		x := v.Args[0]
 27372  		y := v.Args[1]
 27373  		v.reset(OpPPC64SRAW)
 27374  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27375  		v0.AddArg(x)
 27376  		v.AddArg(v0)
 27377  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27378  		v1.AddArg(y)
 27379  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27380  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27381  		v3.AuxInt = -16
 27382  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27383  		v4.AddArg(y)
 27384  		v3.AddArg(v4)
 27385  		v2.AddArg(v3)
 27386  		v1.AddArg(v2)
 27387  		v.AddArg(v1)
 27388  		return true
 27389  	}
 27390  }
 27391  func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
 27392  	b := v.Block
 27393  	_ = b
 27394  	typ := &b.Func.Config.Types
 27395  	_ = typ
 27396  	// match: (Rsh32Ux16 x y)
 27397  	// cond: shiftIsBounded(v)
 27398  	// result: (SRW x y)
 27399  	for {
 27400  		_ = v.Args[1]
 27401  		x := v.Args[0]
 27402  		y := v.Args[1]
 27403  		if !(shiftIsBounded(v)) {
 27404  			break
 27405  		}
 27406  		v.reset(OpPPC64SRW)
 27407  		v.AddArg(x)
 27408  		v.AddArg(y)
 27409  		return true
 27410  	}
 27411  	// match: (Rsh32Ux16 x y)
 27412  	// cond:
 27413  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 27414  	for {
 27415  		_ = v.Args[1]
 27416  		x := v.Args[0]
 27417  		y := v.Args[1]
 27418  		v.reset(OpPPC64SRW)
 27419  		v.AddArg(x)
 27420  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27421  		v0.AddArg(y)
 27422  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27423  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27424  		v2.AuxInt = -32
 27425  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27426  		v3.AddArg(y)
 27427  		v2.AddArg(v3)
 27428  		v1.AddArg(v2)
 27429  		v0.AddArg(v1)
 27430  		v.AddArg(v0)
 27431  		return true
 27432  	}
 27433  }
 27434  func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
 27435  	b := v.Block
 27436  	_ = b
 27437  	typ := &b.Func.Config.Types
 27438  	_ = typ
 27439  	// match: (Rsh32Ux32 x (Const64 [c]))
 27440  	// cond: uint32(c) < 32
 27441  	// result: (SRWconst x [c])
 27442  	for {
 27443  		_ = v.Args[1]
 27444  		x := v.Args[0]
 27445  		v_1 := v.Args[1]
 27446  		if v_1.Op != OpConst64 {
 27447  			break
 27448  		}
 27449  		c := v_1.AuxInt
 27450  		if !(uint32(c) < 32) {
 27451  			break
 27452  		}
 27453  		v.reset(OpPPC64SRWconst)
 27454  		v.AuxInt = c
 27455  		v.AddArg(x)
 27456  		return true
 27457  	}
 27458  	// match: (Rsh32Ux32 x (MOVDconst [c]))
 27459  	// cond: uint32(c) < 32
 27460  	// result: (SRWconst x [c])
 27461  	for {
 27462  		_ = v.Args[1]
 27463  		x := v.Args[0]
 27464  		v_1 := v.Args[1]
 27465  		if v_1.Op != OpPPC64MOVDconst {
 27466  			break
 27467  		}
 27468  		c := v_1.AuxInt
 27469  		if !(uint32(c) < 32) {
 27470  			break
 27471  		}
 27472  		v.reset(OpPPC64SRWconst)
 27473  		v.AuxInt = c
 27474  		v.AddArg(x)
 27475  		return true
 27476  	}
 27477  	// match: (Rsh32Ux32 x y)
 27478  	// cond: shiftIsBounded(v)
 27479  	// result: (SRW x y)
 27480  	for {
 27481  		_ = v.Args[1]
 27482  		x := v.Args[0]
 27483  		y := v.Args[1]
 27484  		if !(shiftIsBounded(v)) {
 27485  			break
 27486  		}
 27487  		v.reset(OpPPC64SRW)
 27488  		v.AddArg(x)
 27489  		v.AddArg(y)
 27490  		return true
 27491  	}
 27492  	// match: (Rsh32Ux32 x y)
 27493  	// cond:
 27494  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27495  	for {
 27496  		_ = v.Args[1]
 27497  		x := v.Args[0]
 27498  		y := v.Args[1]
 27499  		v.reset(OpPPC64SRW)
 27500  		v.AddArg(x)
 27501  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27502  		v0.AddArg(y)
 27503  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27504  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27505  		v2.AuxInt = -32
 27506  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27507  		v3.AddArg(y)
 27508  		v2.AddArg(v3)
 27509  		v1.AddArg(v2)
 27510  		v0.AddArg(v1)
 27511  		v.AddArg(v0)
 27512  		return true
 27513  	}
 27514  }
 27515  func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
 27516  	b := v.Block
 27517  	_ = b
 27518  	typ := &b.Func.Config.Types
 27519  	_ = typ
 27520  	// match: (Rsh32Ux64 x (Const64 [c]))
 27521  	// cond: uint64(c) < 32
 27522  	// result: (SRWconst x [c])
 27523  	for {
 27524  		_ = v.Args[1]
 27525  		x := v.Args[0]
 27526  		v_1 := v.Args[1]
 27527  		if v_1.Op != OpConst64 {
 27528  			break
 27529  		}
 27530  		c := v_1.AuxInt
 27531  		if !(uint64(c) < 32) {
 27532  			break
 27533  		}
 27534  		v.reset(OpPPC64SRWconst)
 27535  		v.AuxInt = c
 27536  		v.AddArg(x)
 27537  		return true
 27538  	}
 27539  	// match: (Rsh32Ux64 _ (Const64 [c]))
 27540  	// cond: uint64(c) >= 32
 27541  	// result: (MOVDconst [0])
 27542  	for {
 27543  		_ = v.Args[1]
 27544  		v_1 := v.Args[1]
 27545  		if v_1.Op != OpConst64 {
 27546  			break
 27547  		}
 27548  		c := v_1.AuxInt
 27549  		if !(uint64(c) >= 32) {
 27550  			break
 27551  		}
 27552  		v.reset(OpPPC64MOVDconst)
 27553  		v.AuxInt = 0
 27554  		return true
 27555  	}
 27556  	// match: (Rsh32Ux64 x (MOVDconst [c]))
 27557  	// cond: uint64(c) < 32
 27558  	// result: (SRWconst x [c])
 27559  	for {
 27560  		_ = v.Args[1]
 27561  		x := v.Args[0]
 27562  		v_1 := v.Args[1]
 27563  		if v_1.Op != OpPPC64MOVDconst {
 27564  			break
 27565  		}
 27566  		c := v_1.AuxInt
 27567  		if !(uint64(c) < 32) {
 27568  			break
 27569  		}
 27570  		v.reset(OpPPC64SRWconst)
 27571  		v.AuxInt = c
 27572  		v.AddArg(x)
 27573  		return true
 27574  	}
 27575  	// match: (Rsh32Ux64 x y)
 27576  	// cond: shiftIsBounded(v)
 27577  	// result: (SRW x y)
 27578  	for {
 27579  		_ = v.Args[1]
 27580  		x := v.Args[0]
 27581  		y := v.Args[1]
 27582  		if !(shiftIsBounded(v)) {
 27583  			break
 27584  		}
 27585  		v.reset(OpPPC64SRW)
 27586  		v.AddArg(x)
 27587  		v.AddArg(y)
 27588  		return true
 27589  	}
 27590  	// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
 27591  	// cond:
 27592  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27593  	for {
 27594  		_ = v.Args[1]
 27595  		x := v.Args[0]
 27596  		v_1 := v.Args[1]
 27597  		if v_1.Op != OpPPC64AND {
 27598  			break
 27599  		}
 27600  		_ = v_1.Args[1]
 27601  		y := v_1.Args[0]
 27602  		v_1_1 := v_1.Args[1]
 27603  		if v_1_1.Op != OpPPC64MOVDconst {
 27604  			break
 27605  		}
 27606  		if v_1_1.AuxInt != 31 {
 27607  			break
 27608  		}
 27609  		v.reset(OpPPC64SRW)
 27610  		v.AddArg(x)
 27611  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27612  		v0.AuxInt = 31
 27613  		v0.AddArg(y)
 27614  		v.AddArg(v0)
 27615  		return true
 27616  	}
 27617  	// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
 27618  	// cond:
 27619  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27620  	for {
 27621  		_ = v.Args[1]
 27622  		x := v.Args[0]
 27623  		v_1 := v.Args[1]
 27624  		if v_1.Op != OpPPC64AND {
 27625  			break
 27626  		}
 27627  		_ = v_1.Args[1]
 27628  		v_1_0 := v_1.Args[0]
 27629  		if v_1_0.Op != OpPPC64MOVDconst {
 27630  			break
 27631  		}
 27632  		if v_1_0.AuxInt != 31 {
 27633  			break
 27634  		}
 27635  		y := v_1.Args[1]
 27636  		v.reset(OpPPC64SRW)
 27637  		v.AddArg(x)
 27638  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27639  		v0.AuxInt = 31
 27640  		v0.AddArg(y)
 27641  		v.AddArg(v0)
 27642  		return true
 27643  	}
 27644  	// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
 27645  	// cond:
 27646  	// result: (SRW x (ANDconst <typ.UInt> [31] y))
 27647  	for {
 27648  		_ = v.Args[1]
 27649  		x := v.Args[0]
 27650  		v_1 := v.Args[1]
 27651  		if v_1.Op != OpPPC64ANDconst {
 27652  			break
 27653  		}
 27654  		if v_1.Type != typ.UInt {
 27655  			break
 27656  		}
 27657  		if v_1.AuxInt != 31 {
 27658  			break
 27659  		}
 27660  		y := v_1.Args[0]
 27661  		v.reset(OpPPC64SRW)
 27662  		v.AddArg(x)
 27663  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27664  		v0.AuxInt = 31
 27665  		v0.AddArg(y)
 27666  		v.AddArg(v0)
 27667  		return true
 27668  	}
 27669  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27670  	// cond:
 27671  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27672  	for {
 27673  		_ = v.Args[1]
 27674  		x := v.Args[0]
 27675  		v_1 := v.Args[1]
 27676  		if v_1.Op != OpPPC64SUB {
 27677  			break
 27678  		}
 27679  		if v_1.Type != typ.UInt {
 27680  			break
 27681  		}
 27682  		_ = v_1.Args[1]
 27683  		v_1_0 := v_1.Args[0]
 27684  		if v_1_0.Op != OpPPC64MOVDconst {
 27685  			break
 27686  		}
 27687  		if v_1_0.AuxInt != 32 {
 27688  			break
 27689  		}
 27690  		v_1_1 := v_1.Args[1]
 27691  		if v_1_1.Op != OpPPC64ANDconst {
 27692  			break
 27693  		}
 27694  		if v_1_1.Type != typ.UInt {
 27695  			break
 27696  		}
 27697  		if v_1_1.AuxInt != 31 {
 27698  			break
 27699  		}
 27700  		y := v_1_1.Args[0]
 27701  		v.reset(OpPPC64SRW)
 27702  		v.AddArg(x)
 27703  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27704  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27705  		v1.AuxInt = 32
 27706  		v0.AddArg(v1)
 27707  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27708  		v2.AuxInt = 31
 27709  		v2.AddArg(y)
 27710  		v0.AddArg(v2)
 27711  		v.AddArg(v0)
 27712  		return true
 27713  	}
 27714  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 27715  	// cond:
 27716  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27717  	for {
 27718  		_ = v.Args[1]
 27719  		x := v.Args[0]
 27720  		v_1 := v.Args[1]
 27721  		if v_1.Op != OpPPC64SUB {
 27722  			break
 27723  		}
 27724  		if v_1.Type != typ.UInt {
 27725  			break
 27726  		}
 27727  		_ = v_1.Args[1]
 27728  		v_1_0 := v_1.Args[0]
 27729  		if v_1_0.Op != OpPPC64MOVDconst {
 27730  			break
 27731  		}
 27732  		if v_1_0.AuxInt != 32 {
 27733  			break
 27734  		}
 27735  		v_1_1 := v_1.Args[1]
 27736  		if v_1_1.Op != OpPPC64AND {
 27737  			break
 27738  		}
 27739  		if v_1_1.Type != typ.UInt {
 27740  			break
 27741  		}
 27742  		_ = v_1_1.Args[1]
 27743  		y := v_1_1.Args[0]
 27744  		v_1_1_1 := v_1_1.Args[1]
 27745  		if v_1_1_1.Op != OpPPC64MOVDconst {
 27746  			break
 27747  		}
 27748  		if v_1_1_1.AuxInt != 31 {
 27749  			break
 27750  		}
 27751  		v.reset(OpPPC64SRW)
 27752  		v.AddArg(x)
 27753  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27754  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27755  		v1.AuxInt = 32
 27756  		v0.AddArg(v1)
 27757  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27758  		v2.AuxInt = 31
 27759  		v2.AddArg(y)
 27760  		v0.AddArg(v2)
 27761  		v.AddArg(v0)
 27762  		return true
 27763  	}
 27764  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 27765  	// cond:
 27766  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27767  	for {
 27768  		_ = v.Args[1]
 27769  		x := v.Args[0]
 27770  		v_1 := v.Args[1]
 27771  		if v_1.Op != OpPPC64SUB {
 27772  			break
 27773  		}
 27774  		if v_1.Type != typ.UInt {
 27775  			break
 27776  		}
 27777  		_ = v_1.Args[1]
 27778  		v_1_0 := v_1.Args[0]
 27779  		if v_1_0.Op != OpPPC64MOVDconst {
 27780  			break
 27781  		}
 27782  		if v_1_0.AuxInt != 32 {
 27783  			break
 27784  		}
 27785  		v_1_1 := v_1.Args[1]
 27786  		if v_1_1.Op != OpPPC64AND {
 27787  			break
 27788  		}
 27789  		if v_1_1.Type != typ.UInt {
 27790  			break
 27791  		}
 27792  		_ = v_1_1.Args[1]
 27793  		v_1_1_0 := v_1_1.Args[0]
 27794  		if v_1_1_0.Op != OpPPC64MOVDconst {
 27795  			break
 27796  		}
 27797  		if v_1_1_0.AuxInt != 31 {
 27798  			break
 27799  		}
 27800  		y := v_1_1.Args[1]
 27801  		v.reset(OpPPC64SRW)
 27802  		v.AddArg(x)
 27803  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27804  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27805  		v1.AuxInt = 32
 27806  		v0.AddArg(v1)
 27807  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27808  		v2.AuxInt = 31
 27809  		v2.AddArg(y)
 27810  		v0.AddArg(v2)
 27811  		v.AddArg(v0)
 27812  		return true
 27813  	}
 27814  	return false
 27815  }
 27816  func rewriteValuePPC64_OpRsh32Ux64_10(v *Value) bool {
 27817  	b := v.Block
 27818  	_ = b
 27819  	typ := &b.Func.Config.Types
 27820  	_ = typ
 27821  	// match: (Rsh32Ux64 x y)
 27822  	// cond:
 27823  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 27824  	for {
 27825  		_ = v.Args[1]
 27826  		x := v.Args[0]
 27827  		y := v.Args[1]
 27828  		v.reset(OpPPC64SRW)
 27829  		v.AddArg(x)
 27830  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27831  		v0.AddArg(y)
 27832  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27833  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27834  		v2.AuxInt = -32
 27835  		v2.AddArg(y)
 27836  		v1.AddArg(v2)
 27837  		v0.AddArg(v1)
 27838  		v.AddArg(v0)
 27839  		return true
 27840  	}
 27841  }
 27842  func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
 27843  	b := v.Block
 27844  	_ = b
 27845  	typ := &b.Func.Config.Types
 27846  	_ = typ
 27847  	// match: (Rsh32Ux8 x y)
 27848  	// cond: shiftIsBounded(v)
 27849  	// result: (SRW x y)
 27850  	for {
 27851  		_ = v.Args[1]
 27852  		x := v.Args[0]
 27853  		y := v.Args[1]
 27854  		if !(shiftIsBounded(v)) {
 27855  			break
 27856  		}
 27857  		v.reset(OpPPC64SRW)
 27858  		v.AddArg(x)
 27859  		v.AddArg(y)
 27860  		return true
 27861  	}
 27862  	// match: (Rsh32Ux8 x y)
 27863  	// cond:
 27864  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 27865  	for {
 27866  		_ = v.Args[1]
 27867  		x := v.Args[0]
 27868  		y := v.Args[1]
 27869  		v.reset(OpPPC64SRW)
 27870  		v.AddArg(x)
 27871  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27872  		v0.AddArg(y)
 27873  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27874  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27875  		v2.AuxInt = -32
 27876  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27877  		v3.AddArg(y)
 27878  		v2.AddArg(v3)
 27879  		v1.AddArg(v2)
 27880  		v0.AddArg(v1)
 27881  		v.AddArg(v0)
 27882  		return true
 27883  	}
 27884  }
 27885  func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
 27886  	b := v.Block
 27887  	_ = b
 27888  	typ := &b.Func.Config.Types
 27889  	_ = typ
 27890  	// match: (Rsh32x16 x y)
 27891  	// cond: shiftIsBounded(v)
 27892  	// result: (SRAW x y)
 27893  	for {
 27894  		_ = v.Args[1]
 27895  		x := v.Args[0]
 27896  		y := v.Args[1]
 27897  		if !(shiftIsBounded(v)) {
 27898  			break
 27899  		}
 27900  		v.reset(OpPPC64SRAW)
 27901  		v.AddArg(x)
 27902  		v.AddArg(y)
 27903  		return true
 27904  	}
 27905  	// match: (Rsh32x16 x y)
 27906  	// cond:
 27907  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 27908  	for {
 27909  		_ = v.Args[1]
 27910  		x := v.Args[0]
 27911  		y := v.Args[1]
 27912  		v.reset(OpPPC64SRAW)
 27913  		v.AddArg(x)
 27914  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27915  		v0.AddArg(y)
 27916  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27917  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27918  		v2.AuxInt = -32
 27919  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27920  		v3.AddArg(y)
 27921  		v2.AddArg(v3)
 27922  		v1.AddArg(v2)
 27923  		v0.AddArg(v1)
 27924  		v.AddArg(v0)
 27925  		return true
 27926  	}
 27927  }
 27928  func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
 27929  	b := v.Block
 27930  	_ = b
 27931  	typ := &b.Func.Config.Types
 27932  	_ = typ
 27933  	// match: (Rsh32x32 x (Const64 [c]))
 27934  	// cond: uint32(c) < 32
 27935  	// result: (SRAWconst x [c])
 27936  	for {
 27937  		_ = v.Args[1]
 27938  		x := v.Args[0]
 27939  		v_1 := v.Args[1]
 27940  		if v_1.Op != OpConst64 {
 27941  			break
 27942  		}
 27943  		c := v_1.AuxInt
 27944  		if !(uint32(c) < 32) {
 27945  			break
 27946  		}
 27947  		v.reset(OpPPC64SRAWconst)
 27948  		v.AuxInt = c
 27949  		v.AddArg(x)
 27950  		return true
 27951  	}
 27952  	// match: (Rsh32x32 x (MOVDconst [c]))
 27953  	// cond: uint32(c) < 32
 27954  	// result: (SRAWconst x [c])
 27955  	for {
 27956  		_ = v.Args[1]
 27957  		x := v.Args[0]
 27958  		v_1 := v.Args[1]
 27959  		if v_1.Op != OpPPC64MOVDconst {
 27960  			break
 27961  		}
 27962  		c := v_1.AuxInt
 27963  		if !(uint32(c) < 32) {
 27964  			break
 27965  		}
 27966  		v.reset(OpPPC64SRAWconst)
 27967  		v.AuxInt = c
 27968  		v.AddArg(x)
 27969  		return true
 27970  	}
 27971  	// match: (Rsh32x32 x y)
 27972  	// cond: shiftIsBounded(v)
 27973  	// result: (SRAW x y)
 27974  	for {
 27975  		_ = v.Args[1]
 27976  		x := v.Args[0]
 27977  		y := v.Args[1]
 27978  		if !(shiftIsBounded(v)) {
 27979  			break
 27980  		}
 27981  		v.reset(OpPPC64SRAW)
 27982  		v.AddArg(x)
 27983  		v.AddArg(y)
 27984  		return true
 27985  	}
 27986  	// match: (Rsh32x32 x y)
 27987  	// cond:
 27988  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27989  	for {
 27990  		_ = v.Args[1]
 27991  		x := v.Args[0]
 27992  		y := v.Args[1]
 27993  		v.reset(OpPPC64SRAW)
 27994  		v.AddArg(x)
 27995  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27996  		v0.AddArg(y)
 27997  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27998  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27999  		v2.AuxInt = -32
 28000  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28001  		v3.AddArg(y)
 28002  		v2.AddArg(v3)
 28003  		v1.AddArg(v2)
 28004  		v0.AddArg(v1)
 28005  		v.AddArg(v0)
 28006  		return true
 28007  	}
 28008  }
 28009  func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
 28010  	b := v.Block
 28011  	_ = b
 28012  	typ := &b.Func.Config.Types
 28013  	_ = typ
 28014  	// match: (Rsh32x64 x (Const64 [c]))
 28015  	// cond: uint64(c) < 32
 28016  	// result: (SRAWconst x [c])
 28017  	for {
 28018  		_ = v.Args[1]
 28019  		x := v.Args[0]
 28020  		v_1 := v.Args[1]
 28021  		if v_1.Op != OpConst64 {
 28022  			break
 28023  		}
 28024  		c := v_1.AuxInt
 28025  		if !(uint64(c) < 32) {
 28026  			break
 28027  		}
 28028  		v.reset(OpPPC64SRAWconst)
 28029  		v.AuxInt = c
 28030  		v.AddArg(x)
 28031  		return true
 28032  	}
 28033  	// match: (Rsh32x64 x (Const64 [c]))
 28034  	// cond: uint64(c) >= 32
 28035  	// result: (SRAWconst x [63])
 28036  	for {
 28037  		_ = v.Args[1]
 28038  		x := v.Args[0]
 28039  		v_1 := v.Args[1]
 28040  		if v_1.Op != OpConst64 {
 28041  			break
 28042  		}
 28043  		c := v_1.AuxInt
 28044  		if !(uint64(c) >= 32) {
 28045  			break
 28046  		}
 28047  		v.reset(OpPPC64SRAWconst)
 28048  		v.AuxInt = 63
 28049  		v.AddArg(x)
 28050  		return true
 28051  	}
 28052  	// match: (Rsh32x64 x (MOVDconst [c]))
 28053  	// cond: uint64(c) < 32
 28054  	// result: (SRAWconst x [c])
 28055  	for {
 28056  		_ = v.Args[1]
 28057  		x := v.Args[0]
 28058  		v_1 := v.Args[1]
 28059  		if v_1.Op != OpPPC64MOVDconst {
 28060  			break
 28061  		}
 28062  		c := v_1.AuxInt
 28063  		if !(uint64(c) < 32) {
 28064  			break
 28065  		}
 28066  		v.reset(OpPPC64SRAWconst)
 28067  		v.AuxInt = c
 28068  		v.AddArg(x)
 28069  		return true
 28070  	}
 28071  	// match: (Rsh32x64 x y)
 28072  	// cond: shiftIsBounded(v)
 28073  	// result: (SRAW x y)
 28074  	for {
 28075  		_ = v.Args[1]
 28076  		x := v.Args[0]
 28077  		y := v.Args[1]
 28078  		if !(shiftIsBounded(v)) {
 28079  			break
 28080  		}
 28081  		v.reset(OpPPC64SRAW)
 28082  		v.AddArg(x)
 28083  		v.AddArg(y)
 28084  		return true
 28085  	}
 28086  	// match: (Rsh32x64 x (AND y (MOVDconst [31])))
 28087  	// cond:
 28088  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 28089  	for {
 28090  		_ = v.Args[1]
 28091  		x := v.Args[0]
 28092  		v_1 := v.Args[1]
 28093  		if v_1.Op != OpPPC64AND {
 28094  			break
 28095  		}
 28096  		_ = v_1.Args[1]
 28097  		y := v_1.Args[0]
 28098  		v_1_1 := v_1.Args[1]
 28099  		if v_1_1.Op != OpPPC64MOVDconst {
 28100  			break
 28101  		}
 28102  		if v_1_1.AuxInt != 31 {
 28103  			break
 28104  		}
 28105  		v.reset(OpPPC64SRAW)
 28106  		v.AddArg(x)
 28107  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 28108  		v0.AuxInt = 31
 28109  		v0.AddArg(y)
 28110  		v.AddArg(v0)
 28111  		return true
 28112  	}
 28113  	// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
 28114  	// cond:
 28115  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 28116  	for {
 28117  		_ = v.Args[1]
 28118  		x := v.Args[0]
 28119  		v_1 := v.Args[1]
 28120  		if v_1.Op != OpPPC64AND {
 28121  			break
 28122  		}
 28123  		_ = v_1.Args[1]
 28124  		v_1_0 := v_1.Args[0]
 28125  		if v_1_0.Op != OpPPC64MOVDconst {
 28126  			break
 28127  		}
 28128  		if v_1_0.AuxInt != 31 {
 28129  			break
 28130  		}
 28131  		y := v_1.Args[1]
 28132  		v.reset(OpPPC64SRAW)
 28133  		v.AddArg(x)
 28134  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 28135  		v0.AuxInt = 31
 28136  		v0.AddArg(y)
 28137  		v.AddArg(v0)
 28138  		return true
 28139  	}
 28140  	// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
 28141  	// cond:
 28142  	// result: (SRAW x (ANDconst <typ.UInt> [31] y))
 28143  	for {
 28144  		_ = v.Args[1]
 28145  		x := v.Args[0]
 28146  		v_1 := v.Args[1]
 28147  		if v_1.Op != OpPPC64ANDconst {
 28148  			break
 28149  		}
 28150  		if v_1.Type != typ.UInt {
 28151  			break
 28152  		}
 28153  		if v_1.AuxInt != 31 {
 28154  			break
 28155  		}
 28156  		y := v_1.Args[0]
 28157  		v.reset(OpPPC64SRAW)
 28158  		v.AddArg(x)
 28159  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28160  		v0.AuxInt = 31
 28161  		v0.AddArg(y)
 28162  		v.AddArg(v0)
 28163  		return true
 28164  	}
 28165  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28166  	// cond:
 28167  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28168  	for {
 28169  		_ = v.Args[1]
 28170  		x := v.Args[0]
 28171  		v_1 := v.Args[1]
 28172  		if v_1.Op != OpPPC64SUB {
 28173  			break
 28174  		}
 28175  		if v_1.Type != typ.UInt {
 28176  			break
 28177  		}
 28178  		_ = v_1.Args[1]
 28179  		v_1_0 := v_1.Args[0]
 28180  		if v_1_0.Op != OpPPC64MOVDconst {
 28181  			break
 28182  		}
 28183  		if v_1_0.AuxInt != 32 {
 28184  			break
 28185  		}
 28186  		v_1_1 := v_1.Args[1]
 28187  		if v_1_1.Op != OpPPC64ANDconst {
 28188  			break
 28189  		}
 28190  		if v_1_1.Type != typ.UInt {
 28191  			break
 28192  		}
 28193  		if v_1_1.AuxInt != 31 {
 28194  			break
 28195  		}
 28196  		y := v_1_1.Args[0]
 28197  		v.reset(OpPPC64SRAW)
 28198  		v.AddArg(x)
 28199  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28200  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28201  		v1.AuxInt = 32
 28202  		v0.AddArg(v1)
 28203  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28204  		v2.AuxInt = 31
 28205  		v2.AddArg(y)
 28206  		v0.AddArg(v2)
 28207  		v.AddArg(v0)
 28208  		return true
 28209  	}
 28210  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 28211  	// cond:
 28212  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28213  	for {
 28214  		_ = v.Args[1]
 28215  		x := v.Args[0]
 28216  		v_1 := v.Args[1]
 28217  		if v_1.Op != OpPPC64SUB {
 28218  			break
 28219  		}
 28220  		if v_1.Type != typ.UInt {
 28221  			break
 28222  		}
 28223  		_ = v_1.Args[1]
 28224  		v_1_0 := v_1.Args[0]
 28225  		if v_1_0.Op != OpPPC64MOVDconst {
 28226  			break
 28227  		}
 28228  		if v_1_0.AuxInt != 32 {
 28229  			break
 28230  		}
 28231  		v_1_1 := v_1.Args[1]
 28232  		if v_1_1.Op != OpPPC64AND {
 28233  			break
 28234  		}
 28235  		if v_1_1.Type != typ.UInt {
 28236  			break
 28237  		}
 28238  		_ = v_1_1.Args[1]
 28239  		y := v_1_1.Args[0]
 28240  		v_1_1_1 := v_1_1.Args[1]
 28241  		if v_1_1_1.Op != OpPPC64MOVDconst {
 28242  			break
 28243  		}
 28244  		if v_1_1_1.AuxInt != 31 {
 28245  			break
 28246  		}
 28247  		v.reset(OpPPC64SRAW)
 28248  		v.AddArg(x)
 28249  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28250  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28251  		v1.AuxInt = 32
 28252  		v0.AddArg(v1)
 28253  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28254  		v2.AuxInt = 31
 28255  		v2.AddArg(y)
 28256  		v0.AddArg(v2)
 28257  		v.AddArg(v0)
 28258  		return true
 28259  	}
 28260  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 28261  	// cond:
 28262  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28263  	for {
 28264  		_ = v.Args[1]
 28265  		x := v.Args[0]
 28266  		v_1 := v.Args[1]
 28267  		if v_1.Op != OpPPC64SUB {
 28268  			break
 28269  		}
 28270  		if v_1.Type != typ.UInt {
 28271  			break
 28272  		}
 28273  		_ = v_1.Args[1]
 28274  		v_1_0 := v_1.Args[0]
 28275  		if v_1_0.Op != OpPPC64MOVDconst {
 28276  			break
 28277  		}
 28278  		if v_1_0.AuxInt != 32 {
 28279  			break
 28280  		}
 28281  		v_1_1 := v_1.Args[1]
 28282  		if v_1_1.Op != OpPPC64AND {
 28283  			break
 28284  		}
 28285  		if v_1_1.Type != typ.UInt {
 28286  			break
 28287  		}
 28288  		_ = v_1_1.Args[1]
 28289  		v_1_1_0 := v_1_1.Args[0]
 28290  		if v_1_1_0.Op != OpPPC64MOVDconst {
 28291  			break
 28292  		}
 28293  		if v_1_1_0.AuxInt != 31 {
 28294  			break
 28295  		}
 28296  		y := v_1_1.Args[1]
 28297  		v.reset(OpPPC64SRAW)
 28298  		v.AddArg(x)
 28299  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28300  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28301  		v1.AuxInt = 32
 28302  		v0.AddArg(v1)
 28303  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28304  		v2.AuxInt = 31
 28305  		v2.AddArg(y)
 28306  		v0.AddArg(v2)
 28307  		v.AddArg(v0)
 28308  		return true
 28309  	}
 28310  	return false
 28311  }
 28312  func rewriteValuePPC64_OpRsh32x64_10(v *Value) bool {
 28313  	b := v.Block
 28314  	_ = b
 28315  	typ := &b.Func.Config.Types
 28316  	_ = typ
 28317  	// match: (Rsh32x64 x y)
 28318  	// cond:
 28319  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 28320  	for {
 28321  		_ = v.Args[1]
 28322  		x := v.Args[0]
 28323  		y := v.Args[1]
 28324  		v.reset(OpPPC64SRAW)
 28325  		v.AddArg(x)
 28326  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28327  		v0.AddArg(y)
 28328  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28329  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28330  		v2.AuxInt = -32
 28331  		v2.AddArg(y)
 28332  		v1.AddArg(v2)
 28333  		v0.AddArg(v1)
 28334  		v.AddArg(v0)
 28335  		return true
 28336  	}
 28337  }
 28338  func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
 28339  	b := v.Block
 28340  	_ = b
 28341  	typ := &b.Func.Config.Types
 28342  	_ = typ
 28343  	// match: (Rsh32x8 x y)
 28344  	// cond: shiftIsBounded(v)
 28345  	// result: (SRAW x y)
 28346  	for {
 28347  		_ = v.Args[1]
 28348  		x := v.Args[0]
 28349  		y := v.Args[1]
 28350  		if !(shiftIsBounded(v)) {
 28351  			break
 28352  		}
 28353  		v.reset(OpPPC64SRAW)
 28354  		v.AddArg(x)
 28355  		v.AddArg(y)
 28356  		return true
 28357  	}
 28358  	// match: (Rsh32x8 x y)
 28359  	// cond:
 28360  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 28361  	for {
 28362  		_ = v.Args[1]
 28363  		x := v.Args[0]
 28364  		y := v.Args[1]
 28365  		v.reset(OpPPC64SRAW)
 28366  		v.AddArg(x)
 28367  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28368  		v0.AddArg(y)
 28369  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28370  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28371  		v2.AuxInt = -32
 28372  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28373  		v3.AddArg(y)
 28374  		v2.AddArg(v3)
 28375  		v1.AddArg(v2)
 28376  		v0.AddArg(v1)
 28377  		v.AddArg(v0)
 28378  		return true
 28379  	}
 28380  }
 28381  func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
 28382  	b := v.Block
 28383  	_ = b
 28384  	typ := &b.Func.Config.Types
 28385  	_ = typ
 28386  	// match: (Rsh64Ux16 x y)
 28387  	// cond: shiftIsBounded(v)
 28388  	// result: (SRD x y)
 28389  	for {
 28390  		_ = v.Args[1]
 28391  		x := v.Args[0]
 28392  		y := v.Args[1]
 28393  		if !(shiftIsBounded(v)) {
 28394  			break
 28395  		}
 28396  		v.reset(OpPPC64SRD)
 28397  		v.AddArg(x)
 28398  		v.AddArg(y)
 28399  		return true
 28400  	}
 28401  	// match: (Rsh64Ux16 x y)
 28402  	// cond:
 28403  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 28404  	for {
 28405  		_ = v.Args[1]
 28406  		x := v.Args[0]
 28407  		y := v.Args[1]
 28408  		v.reset(OpPPC64SRD)
 28409  		v.AddArg(x)
 28410  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28411  		v0.AddArg(y)
 28412  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28413  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28414  		v2.AuxInt = -64
 28415  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28416  		v3.AddArg(y)
 28417  		v2.AddArg(v3)
 28418  		v1.AddArg(v2)
 28419  		v0.AddArg(v1)
 28420  		v.AddArg(v0)
 28421  		return true
 28422  	}
 28423  }
 28424  func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
 28425  	b := v.Block
 28426  	_ = b
 28427  	typ := &b.Func.Config.Types
 28428  	_ = typ
 28429  	// match: (Rsh64Ux32 x (Const64 [c]))
 28430  	// cond: uint32(c) < 64
 28431  	// result: (SRDconst x [c])
 28432  	for {
 28433  		_ = v.Args[1]
 28434  		x := v.Args[0]
 28435  		v_1 := v.Args[1]
 28436  		if v_1.Op != OpConst64 {
 28437  			break
 28438  		}
 28439  		c := v_1.AuxInt
 28440  		if !(uint32(c) < 64) {
 28441  			break
 28442  		}
 28443  		v.reset(OpPPC64SRDconst)
 28444  		v.AuxInt = c
 28445  		v.AddArg(x)
 28446  		return true
 28447  	}
 28448  	// match: (Rsh64Ux32 x (MOVDconst [c]))
 28449  	// cond: uint32(c) < 64
 28450  	// result: (SRDconst x [c])
 28451  	for {
 28452  		_ = v.Args[1]
 28453  		x := v.Args[0]
 28454  		v_1 := v.Args[1]
 28455  		if v_1.Op != OpPPC64MOVDconst {
 28456  			break
 28457  		}
 28458  		c := v_1.AuxInt
 28459  		if !(uint32(c) < 64) {
 28460  			break
 28461  		}
 28462  		v.reset(OpPPC64SRDconst)
 28463  		v.AuxInt = c
 28464  		v.AddArg(x)
 28465  		return true
 28466  	}
 28467  	// match: (Rsh64Ux32 x y)
 28468  	// cond: shiftIsBounded(v)
 28469  	// result: (SRD x y)
 28470  	for {
 28471  		_ = v.Args[1]
 28472  		x := v.Args[0]
 28473  		y := v.Args[1]
 28474  		if !(shiftIsBounded(v)) {
 28475  			break
 28476  		}
 28477  		v.reset(OpPPC64SRD)
 28478  		v.AddArg(x)
 28479  		v.AddArg(y)
 28480  		return true
 28481  	}
 28482  	// match: (Rsh64Ux32 x y)
 28483  	// cond:
 28484  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28485  	for {
 28486  		_ = v.Args[1]
 28487  		x := v.Args[0]
 28488  		y := v.Args[1]
 28489  		v.reset(OpPPC64SRD)
 28490  		v.AddArg(x)
 28491  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28492  		v0.AddArg(y)
 28493  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28494  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28495  		v2.AuxInt = -64
 28496  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28497  		v3.AddArg(y)
 28498  		v2.AddArg(v3)
 28499  		v1.AddArg(v2)
 28500  		v0.AddArg(v1)
 28501  		v.AddArg(v0)
 28502  		return true
 28503  	}
 28504  }
 28505  func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
 28506  	b := v.Block
 28507  	_ = b
 28508  	typ := &b.Func.Config.Types
 28509  	_ = typ
 28510  	// match: (Rsh64Ux64 x (Const64 [c]))
 28511  	// cond: uint64(c) < 64
 28512  	// result: (SRDconst x [c])
 28513  	for {
 28514  		_ = v.Args[1]
 28515  		x := v.Args[0]
 28516  		v_1 := v.Args[1]
 28517  		if v_1.Op != OpConst64 {
 28518  			break
 28519  		}
 28520  		c := v_1.AuxInt
 28521  		if !(uint64(c) < 64) {
 28522  			break
 28523  		}
 28524  		v.reset(OpPPC64SRDconst)
 28525  		v.AuxInt = c
 28526  		v.AddArg(x)
 28527  		return true
 28528  	}
 28529  	// match: (Rsh64Ux64 _ (Const64 [c]))
 28530  	// cond: uint64(c) >= 64
 28531  	// result: (MOVDconst [0])
 28532  	for {
 28533  		_ = v.Args[1]
 28534  		v_1 := v.Args[1]
 28535  		if v_1.Op != OpConst64 {
 28536  			break
 28537  		}
 28538  		c := v_1.AuxInt
 28539  		if !(uint64(c) >= 64) {
 28540  			break
 28541  		}
 28542  		v.reset(OpPPC64MOVDconst)
 28543  		v.AuxInt = 0
 28544  		return true
 28545  	}
 28546  	// match: (Rsh64Ux64 x (MOVDconst [c]))
 28547  	// cond: uint64(c) < 64
 28548  	// result: (SRDconst x [c])
 28549  	for {
 28550  		_ = v.Args[1]
 28551  		x := v.Args[0]
 28552  		v_1 := v.Args[1]
 28553  		if v_1.Op != OpPPC64MOVDconst {
 28554  			break
 28555  		}
 28556  		c := v_1.AuxInt
 28557  		if !(uint64(c) < 64) {
 28558  			break
 28559  		}
 28560  		v.reset(OpPPC64SRDconst)
 28561  		v.AuxInt = c
 28562  		v.AddArg(x)
 28563  		return true
 28564  	}
 28565  	// match: (Rsh64Ux64 x y)
 28566  	// cond: shiftIsBounded(v)
 28567  	// result: (SRD x y)
 28568  	for {
 28569  		_ = v.Args[1]
 28570  		x := v.Args[0]
 28571  		y := v.Args[1]
 28572  		if !(shiftIsBounded(v)) {
 28573  			break
 28574  		}
 28575  		v.reset(OpPPC64SRD)
 28576  		v.AddArg(x)
 28577  		v.AddArg(y)
 28578  		return true
 28579  	}
 28580  	// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
 28581  	// cond:
 28582  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28583  	for {
 28584  		_ = v.Args[1]
 28585  		x := v.Args[0]
 28586  		v_1 := v.Args[1]
 28587  		if v_1.Op != OpPPC64AND {
 28588  			break
 28589  		}
 28590  		_ = v_1.Args[1]
 28591  		y := v_1.Args[0]
 28592  		v_1_1 := v_1.Args[1]
 28593  		if v_1_1.Op != OpPPC64MOVDconst {
 28594  			break
 28595  		}
 28596  		if v_1_1.AuxInt != 63 {
 28597  			break
 28598  		}
 28599  		v.reset(OpPPC64SRD)
 28600  		v.AddArg(x)
 28601  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28602  		v0.AuxInt = 63
 28603  		v0.AddArg(y)
 28604  		v.AddArg(v0)
 28605  		return true
 28606  	}
 28607  	// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
 28608  	// cond:
 28609  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28610  	for {
 28611  		_ = v.Args[1]
 28612  		x := v.Args[0]
 28613  		v_1 := v.Args[1]
 28614  		if v_1.Op != OpPPC64AND {
 28615  			break
 28616  		}
 28617  		_ = v_1.Args[1]
 28618  		v_1_0 := v_1.Args[0]
 28619  		if v_1_0.Op != OpPPC64MOVDconst {
 28620  			break
 28621  		}
 28622  		if v_1_0.AuxInt != 63 {
 28623  			break
 28624  		}
 28625  		y := v_1.Args[1]
 28626  		v.reset(OpPPC64SRD)
 28627  		v.AddArg(x)
 28628  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28629  		v0.AuxInt = 63
 28630  		v0.AddArg(y)
 28631  		v.AddArg(v0)
 28632  		return true
 28633  	}
 28634  	// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
 28635  	// cond:
 28636  	// result: (SRD x (ANDconst <typ.UInt> [63] y))
 28637  	for {
 28638  		_ = v.Args[1]
 28639  		x := v.Args[0]
 28640  		v_1 := v.Args[1]
 28641  		if v_1.Op != OpPPC64ANDconst {
 28642  			break
 28643  		}
 28644  		if v_1.Type != typ.UInt {
 28645  			break
 28646  		}
 28647  		if v_1.AuxInt != 63 {
 28648  			break
 28649  		}
 28650  		y := v_1.Args[0]
 28651  		v.reset(OpPPC64SRD)
 28652  		v.AddArg(x)
 28653  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28654  		v0.AuxInt = 63
 28655  		v0.AddArg(y)
 28656  		v.AddArg(v0)
 28657  		return true
 28658  	}
 28659  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28660  	// cond:
 28661  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28662  	for {
 28663  		_ = v.Args[1]
 28664  		x := v.Args[0]
 28665  		v_1 := v.Args[1]
 28666  		if v_1.Op != OpPPC64SUB {
 28667  			break
 28668  		}
 28669  		if v_1.Type != typ.UInt {
 28670  			break
 28671  		}
 28672  		_ = v_1.Args[1]
 28673  		v_1_0 := v_1.Args[0]
 28674  		if v_1_0.Op != OpPPC64MOVDconst {
 28675  			break
 28676  		}
 28677  		if v_1_0.AuxInt != 64 {
 28678  			break
 28679  		}
 28680  		v_1_1 := v_1.Args[1]
 28681  		if v_1_1.Op != OpPPC64ANDconst {
 28682  			break
 28683  		}
 28684  		if v_1_1.Type != typ.UInt {
 28685  			break
 28686  		}
 28687  		if v_1_1.AuxInt != 63 {
 28688  			break
 28689  		}
 28690  		y := v_1_1.Args[0]
 28691  		v.reset(OpPPC64SRD)
 28692  		v.AddArg(x)
 28693  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28694  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28695  		v1.AuxInt = 64
 28696  		v0.AddArg(v1)
 28697  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28698  		v2.AuxInt = 63
 28699  		v2.AddArg(y)
 28700  		v0.AddArg(v2)
 28701  		v.AddArg(v0)
 28702  		return true
 28703  	}
 28704  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 28705  	// cond:
 28706  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28707  	for {
 28708  		_ = v.Args[1]
 28709  		x := v.Args[0]
 28710  		v_1 := v.Args[1]
 28711  		if v_1.Op != OpPPC64SUB {
 28712  			break
 28713  		}
 28714  		if v_1.Type != typ.UInt {
 28715  			break
 28716  		}
 28717  		_ = v_1.Args[1]
 28718  		v_1_0 := v_1.Args[0]
 28719  		if v_1_0.Op != OpPPC64MOVDconst {
 28720  			break
 28721  		}
 28722  		if v_1_0.AuxInt != 64 {
 28723  			break
 28724  		}
 28725  		v_1_1 := v_1.Args[1]
 28726  		if v_1_1.Op != OpPPC64AND {
 28727  			break
 28728  		}
 28729  		if v_1_1.Type != typ.UInt {
 28730  			break
 28731  		}
 28732  		_ = v_1_1.Args[1]
 28733  		y := v_1_1.Args[0]
 28734  		v_1_1_1 := v_1_1.Args[1]
 28735  		if v_1_1_1.Op != OpPPC64MOVDconst {
 28736  			break
 28737  		}
 28738  		if v_1_1_1.AuxInt != 63 {
 28739  			break
 28740  		}
 28741  		v.reset(OpPPC64SRD)
 28742  		v.AddArg(x)
 28743  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28744  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28745  		v1.AuxInt = 64
 28746  		v0.AddArg(v1)
 28747  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28748  		v2.AuxInt = 63
 28749  		v2.AddArg(y)
 28750  		v0.AddArg(v2)
 28751  		v.AddArg(v0)
 28752  		return true
 28753  	}
 28754  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 28755  	// cond:
 28756  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28757  	for {
 28758  		_ = v.Args[1]
 28759  		x := v.Args[0]
 28760  		v_1 := v.Args[1]
 28761  		if v_1.Op != OpPPC64SUB {
 28762  			break
 28763  		}
 28764  		if v_1.Type != typ.UInt {
 28765  			break
 28766  		}
 28767  		_ = v_1.Args[1]
 28768  		v_1_0 := v_1.Args[0]
 28769  		if v_1_0.Op != OpPPC64MOVDconst {
 28770  			break
 28771  		}
 28772  		if v_1_0.AuxInt != 64 {
 28773  			break
 28774  		}
 28775  		v_1_1 := v_1.Args[1]
 28776  		if v_1_1.Op != OpPPC64AND {
 28777  			break
 28778  		}
 28779  		if v_1_1.Type != typ.UInt {
 28780  			break
 28781  		}
 28782  		_ = v_1_1.Args[1]
 28783  		v_1_1_0 := v_1_1.Args[0]
 28784  		if v_1_1_0.Op != OpPPC64MOVDconst {
 28785  			break
 28786  		}
 28787  		if v_1_1_0.AuxInt != 63 {
 28788  			break
 28789  		}
 28790  		y := v_1_1.Args[1]
 28791  		v.reset(OpPPC64SRD)
 28792  		v.AddArg(x)
 28793  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28794  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28795  		v1.AuxInt = 64
 28796  		v0.AddArg(v1)
 28797  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28798  		v2.AuxInt = 63
 28799  		v2.AddArg(y)
 28800  		v0.AddArg(v2)
 28801  		v.AddArg(v0)
 28802  		return true
 28803  	}
 28804  	return false
 28805  }
 28806  func rewriteValuePPC64_OpRsh64Ux64_10(v *Value) bool {
 28807  	b := v.Block
 28808  	_ = b
 28809  	typ := &b.Func.Config.Types
 28810  	_ = typ
 28811  	// match: (Rsh64Ux64 x y)
 28812  	// cond:
 28813  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 28814  	for {
 28815  		_ = v.Args[1]
 28816  		x := v.Args[0]
 28817  		y := v.Args[1]
 28818  		v.reset(OpPPC64SRD)
 28819  		v.AddArg(x)
 28820  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28821  		v0.AddArg(y)
 28822  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28823  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28824  		v2.AuxInt = -64
 28825  		v2.AddArg(y)
 28826  		v1.AddArg(v2)
 28827  		v0.AddArg(v1)
 28828  		v.AddArg(v0)
 28829  		return true
 28830  	}
 28831  }
 28832  func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
 28833  	b := v.Block
 28834  	_ = b
 28835  	typ := &b.Func.Config.Types
 28836  	_ = typ
 28837  	// match: (Rsh64Ux8 x y)
 28838  	// cond: shiftIsBounded(v)
 28839  	// result: (SRD x y)
 28840  	for {
 28841  		_ = v.Args[1]
 28842  		x := v.Args[0]
 28843  		y := v.Args[1]
 28844  		if !(shiftIsBounded(v)) {
 28845  			break
 28846  		}
 28847  		v.reset(OpPPC64SRD)
 28848  		v.AddArg(x)
 28849  		v.AddArg(y)
 28850  		return true
 28851  	}
 28852  	// match: (Rsh64Ux8 x y)
 28853  	// cond:
 28854  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 28855  	for {
 28856  		_ = v.Args[1]
 28857  		x := v.Args[0]
 28858  		y := v.Args[1]
 28859  		v.reset(OpPPC64SRD)
 28860  		v.AddArg(x)
 28861  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28862  		v0.AddArg(y)
 28863  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28864  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28865  		v2.AuxInt = -64
 28866  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28867  		v3.AddArg(y)
 28868  		v2.AddArg(v3)
 28869  		v1.AddArg(v2)
 28870  		v0.AddArg(v1)
 28871  		v.AddArg(v0)
 28872  		return true
 28873  	}
 28874  }
 28875  func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
 28876  	b := v.Block
 28877  	_ = b
 28878  	typ := &b.Func.Config.Types
 28879  	_ = typ
 28880  	// match: (Rsh64x16 x y)
 28881  	// cond: shiftIsBounded(v)
 28882  	// result: (SRAD x y)
 28883  	for {
 28884  		_ = v.Args[1]
 28885  		x := v.Args[0]
 28886  		y := v.Args[1]
 28887  		if !(shiftIsBounded(v)) {
 28888  			break
 28889  		}
 28890  		v.reset(OpPPC64SRAD)
 28891  		v.AddArg(x)
 28892  		v.AddArg(y)
 28893  		return true
 28894  	}
 28895  	// match: (Rsh64x16 x y)
 28896  	// cond:
 28897  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 28898  	for {
 28899  		_ = v.Args[1]
 28900  		x := v.Args[0]
 28901  		y := v.Args[1]
 28902  		v.reset(OpPPC64SRAD)
 28903  		v.AddArg(x)
 28904  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28905  		v0.AddArg(y)
 28906  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28907  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28908  		v2.AuxInt = -64
 28909  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28910  		v3.AddArg(y)
 28911  		v2.AddArg(v3)
 28912  		v1.AddArg(v2)
 28913  		v0.AddArg(v1)
 28914  		v.AddArg(v0)
 28915  		return true
 28916  	}
 28917  }
 28918  func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
 28919  	b := v.Block
 28920  	_ = b
 28921  	typ := &b.Func.Config.Types
 28922  	_ = typ
 28923  	// match: (Rsh64x32 x (Const64 [c]))
 28924  	// cond: uint32(c) < 64
 28925  	// result: (SRADconst x [c])
 28926  	for {
 28927  		_ = v.Args[1]
 28928  		x := v.Args[0]
 28929  		v_1 := v.Args[1]
 28930  		if v_1.Op != OpConst64 {
 28931  			break
 28932  		}
 28933  		c := v_1.AuxInt
 28934  		if !(uint32(c) < 64) {
 28935  			break
 28936  		}
 28937  		v.reset(OpPPC64SRADconst)
 28938  		v.AuxInt = c
 28939  		v.AddArg(x)
 28940  		return true
 28941  	}
 28942  	// match: (Rsh64x32 x (MOVDconst [c]))
 28943  	// cond: uint32(c) < 64
 28944  	// result: (SRADconst x [c])
 28945  	for {
 28946  		_ = v.Args[1]
 28947  		x := v.Args[0]
 28948  		v_1 := v.Args[1]
 28949  		if v_1.Op != OpPPC64MOVDconst {
 28950  			break
 28951  		}
 28952  		c := v_1.AuxInt
 28953  		if !(uint32(c) < 64) {
 28954  			break
 28955  		}
 28956  		v.reset(OpPPC64SRADconst)
 28957  		v.AuxInt = c
 28958  		v.AddArg(x)
 28959  		return true
 28960  	}
 28961  	// match: (Rsh64x32 x y)
 28962  	// cond: shiftIsBounded(v)
 28963  	// result: (SRAD x y)
 28964  	for {
 28965  		_ = v.Args[1]
 28966  		x := v.Args[0]
 28967  		y := v.Args[1]
 28968  		if !(shiftIsBounded(v)) {
 28969  			break
 28970  		}
 28971  		v.reset(OpPPC64SRAD)
 28972  		v.AddArg(x)
 28973  		v.AddArg(y)
 28974  		return true
 28975  	}
 28976  	// match: (Rsh64x32 x y)
 28977  	// cond:
 28978  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28979  	for {
 28980  		_ = v.Args[1]
 28981  		x := v.Args[0]
 28982  		y := v.Args[1]
 28983  		v.reset(OpPPC64SRAD)
 28984  		v.AddArg(x)
 28985  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28986  		v0.AddArg(y)
 28987  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28988  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28989  		v2.AuxInt = -64
 28990  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28991  		v3.AddArg(y)
 28992  		v2.AddArg(v3)
 28993  		v1.AddArg(v2)
 28994  		v0.AddArg(v1)
 28995  		v.AddArg(v0)
 28996  		return true
 28997  	}
 28998  }
 28999  func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
 29000  	b := v.Block
 29001  	_ = b
 29002  	typ := &b.Func.Config.Types
 29003  	_ = typ
 29004  	// match: (Rsh64x64 x (Const64 [c]))
 29005  	// cond: uint64(c) < 64
 29006  	// result: (SRADconst x [c])
 29007  	for {
 29008  		_ = v.Args[1]
 29009  		x := v.Args[0]
 29010  		v_1 := v.Args[1]
 29011  		if v_1.Op != OpConst64 {
 29012  			break
 29013  		}
 29014  		c := v_1.AuxInt
 29015  		if !(uint64(c) < 64) {
 29016  			break
 29017  		}
 29018  		v.reset(OpPPC64SRADconst)
 29019  		v.AuxInt = c
 29020  		v.AddArg(x)
 29021  		return true
 29022  	}
 29023  	// match: (Rsh64x64 x (Const64 [c]))
 29024  	// cond: uint64(c) >= 64
 29025  	// result: (SRADconst x [63])
 29026  	for {
 29027  		_ = v.Args[1]
 29028  		x := v.Args[0]
 29029  		v_1 := v.Args[1]
 29030  		if v_1.Op != OpConst64 {
 29031  			break
 29032  		}
 29033  		c := v_1.AuxInt
 29034  		if !(uint64(c) >= 64) {
 29035  			break
 29036  		}
 29037  		v.reset(OpPPC64SRADconst)
 29038  		v.AuxInt = 63
 29039  		v.AddArg(x)
 29040  		return true
 29041  	}
 29042  	// match: (Rsh64x64 x (MOVDconst [c]))
 29043  	// cond: uint64(c) < 64
 29044  	// result: (SRADconst x [c])
 29045  	for {
 29046  		_ = v.Args[1]
 29047  		x := v.Args[0]
 29048  		v_1 := v.Args[1]
 29049  		if v_1.Op != OpPPC64MOVDconst {
 29050  			break
 29051  		}
 29052  		c := v_1.AuxInt
 29053  		if !(uint64(c) < 64) {
 29054  			break
 29055  		}
 29056  		v.reset(OpPPC64SRADconst)
 29057  		v.AuxInt = c
 29058  		v.AddArg(x)
 29059  		return true
 29060  	}
 29061  	// match: (Rsh64x64 x y)
 29062  	// cond: shiftIsBounded(v)
 29063  	// result: (SRAD x y)
 29064  	for {
 29065  		_ = v.Args[1]
 29066  		x := v.Args[0]
 29067  		y := v.Args[1]
 29068  		if !(shiftIsBounded(v)) {
 29069  			break
 29070  		}
 29071  		v.reset(OpPPC64SRAD)
 29072  		v.AddArg(x)
 29073  		v.AddArg(y)
 29074  		return true
 29075  	}
 29076  	// match: (Rsh64x64 x (AND y (MOVDconst [63])))
 29077  	// cond:
 29078  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 29079  	for {
 29080  		_ = v.Args[1]
 29081  		x := v.Args[0]
 29082  		v_1 := v.Args[1]
 29083  		if v_1.Op != OpPPC64AND {
 29084  			break
 29085  		}
 29086  		_ = v_1.Args[1]
 29087  		y := v_1.Args[0]
 29088  		v_1_1 := v_1.Args[1]
 29089  		if v_1_1.Op != OpPPC64MOVDconst {
 29090  			break
 29091  		}
 29092  		if v_1_1.AuxInt != 63 {
 29093  			break
 29094  		}
 29095  		v.reset(OpPPC64SRAD)
 29096  		v.AddArg(x)
 29097  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 29098  		v0.AuxInt = 63
 29099  		v0.AddArg(y)
 29100  		v.AddArg(v0)
 29101  		return true
 29102  	}
 29103  	// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
 29104  	// cond:
 29105  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 29106  	for {
 29107  		_ = v.Args[1]
 29108  		x := v.Args[0]
 29109  		v_1 := v.Args[1]
 29110  		if v_1.Op != OpPPC64AND {
 29111  			break
 29112  		}
 29113  		_ = v_1.Args[1]
 29114  		v_1_0 := v_1.Args[0]
 29115  		if v_1_0.Op != OpPPC64MOVDconst {
 29116  			break
 29117  		}
 29118  		if v_1_0.AuxInt != 63 {
 29119  			break
 29120  		}
 29121  		y := v_1.Args[1]
 29122  		v.reset(OpPPC64SRAD)
 29123  		v.AddArg(x)
 29124  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 29125  		v0.AuxInt = 63
 29126  		v0.AddArg(y)
 29127  		v.AddArg(v0)
 29128  		return true
 29129  	}
 29130  	// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
 29131  	// cond:
 29132  	// result: (SRAD x (ANDconst <typ.UInt> [63] y))
 29133  	for {
 29134  		_ = v.Args[1]
 29135  		x := v.Args[0]
 29136  		v_1 := v.Args[1]
 29137  		if v_1.Op != OpPPC64ANDconst {
 29138  			break
 29139  		}
 29140  		if v_1.Type != typ.UInt {
 29141  			break
 29142  		}
 29143  		if v_1.AuxInt != 63 {
 29144  			break
 29145  		}
 29146  		y := v_1.Args[0]
 29147  		v.reset(OpPPC64SRAD)
 29148  		v.AddArg(x)
 29149  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29150  		v0.AuxInt = 63
 29151  		v0.AddArg(y)
 29152  		v.AddArg(v0)
 29153  		return true
 29154  	}
 29155  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29156  	// cond:
 29157  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29158  	for {
 29159  		_ = v.Args[1]
 29160  		x := v.Args[0]
 29161  		v_1 := v.Args[1]
 29162  		if v_1.Op != OpPPC64SUB {
 29163  			break
 29164  		}
 29165  		if v_1.Type != typ.UInt {
 29166  			break
 29167  		}
 29168  		_ = v_1.Args[1]
 29169  		v_1_0 := v_1.Args[0]
 29170  		if v_1_0.Op != OpPPC64MOVDconst {
 29171  			break
 29172  		}
 29173  		if v_1_0.AuxInt != 64 {
 29174  			break
 29175  		}
 29176  		v_1_1 := v_1.Args[1]
 29177  		if v_1_1.Op != OpPPC64ANDconst {
 29178  			break
 29179  		}
 29180  		if v_1_1.Type != typ.UInt {
 29181  			break
 29182  		}
 29183  		if v_1_1.AuxInt != 63 {
 29184  			break
 29185  		}
 29186  		y := v_1_1.Args[0]
 29187  		v.reset(OpPPC64SRAD)
 29188  		v.AddArg(x)
 29189  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29190  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29191  		v1.AuxInt = 64
 29192  		v0.AddArg(v1)
 29193  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29194  		v2.AuxInt = 63
 29195  		v2.AddArg(y)
 29196  		v0.AddArg(v2)
 29197  		v.AddArg(v0)
 29198  		return true
 29199  	}
 29200  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 29201  	// cond:
 29202  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29203  	for {
 29204  		_ = v.Args[1]
 29205  		x := v.Args[0]
 29206  		v_1 := v.Args[1]
 29207  		if v_1.Op != OpPPC64SUB {
 29208  			break
 29209  		}
 29210  		if v_1.Type != typ.UInt {
 29211  			break
 29212  		}
 29213  		_ = v_1.Args[1]
 29214  		v_1_0 := v_1.Args[0]
 29215  		if v_1_0.Op != OpPPC64MOVDconst {
 29216  			break
 29217  		}
 29218  		if v_1_0.AuxInt != 64 {
 29219  			break
 29220  		}
 29221  		v_1_1 := v_1.Args[1]
 29222  		if v_1_1.Op != OpPPC64AND {
 29223  			break
 29224  		}
 29225  		if v_1_1.Type != typ.UInt {
 29226  			break
 29227  		}
 29228  		_ = v_1_1.Args[1]
 29229  		y := v_1_1.Args[0]
 29230  		v_1_1_1 := v_1_1.Args[1]
 29231  		if v_1_1_1.Op != OpPPC64MOVDconst {
 29232  			break
 29233  		}
 29234  		if v_1_1_1.AuxInt != 63 {
 29235  			break
 29236  		}
 29237  		v.reset(OpPPC64SRAD)
 29238  		v.AddArg(x)
 29239  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29240  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29241  		v1.AuxInt = 64
 29242  		v0.AddArg(v1)
 29243  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29244  		v2.AuxInt = 63
 29245  		v2.AddArg(y)
 29246  		v0.AddArg(v2)
 29247  		v.AddArg(v0)
 29248  		return true
 29249  	}
 29250  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 29251  	// cond:
 29252  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29253  	for {
 29254  		_ = v.Args[1]
 29255  		x := v.Args[0]
 29256  		v_1 := v.Args[1]
 29257  		if v_1.Op != OpPPC64SUB {
 29258  			break
 29259  		}
 29260  		if v_1.Type != typ.UInt {
 29261  			break
 29262  		}
 29263  		_ = v_1.Args[1]
 29264  		v_1_0 := v_1.Args[0]
 29265  		if v_1_0.Op != OpPPC64MOVDconst {
 29266  			break
 29267  		}
 29268  		if v_1_0.AuxInt != 64 {
 29269  			break
 29270  		}
 29271  		v_1_1 := v_1.Args[1]
 29272  		if v_1_1.Op != OpPPC64AND {
 29273  			break
 29274  		}
 29275  		if v_1_1.Type != typ.UInt {
 29276  			break
 29277  		}
 29278  		_ = v_1_1.Args[1]
 29279  		v_1_1_0 := v_1_1.Args[0]
 29280  		if v_1_1_0.Op != OpPPC64MOVDconst {
 29281  			break
 29282  		}
 29283  		if v_1_1_0.AuxInt != 63 {
 29284  			break
 29285  		}
 29286  		y := v_1_1.Args[1]
 29287  		v.reset(OpPPC64SRAD)
 29288  		v.AddArg(x)
 29289  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29290  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29291  		v1.AuxInt = 64
 29292  		v0.AddArg(v1)
 29293  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29294  		v2.AuxInt = 63
 29295  		v2.AddArg(y)
 29296  		v0.AddArg(v2)
 29297  		v.AddArg(v0)
 29298  		return true
 29299  	}
 29300  	return false
 29301  }
 29302  func rewriteValuePPC64_OpRsh64x64_10(v *Value) bool {
 29303  	b := v.Block
 29304  	_ = b
 29305  	typ := &b.Func.Config.Types
 29306  	_ = typ
 29307  	// match: (Rsh64x64 x y)
 29308  	// cond:
 29309  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 29310  	for {
 29311  		_ = v.Args[1]
 29312  		x := v.Args[0]
 29313  		y := v.Args[1]
 29314  		v.reset(OpPPC64SRAD)
 29315  		v.AddArg(x)
 29316  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29317  		v0.AddArg(y)
 29318  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29319  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29320  		v2.AuxInt = -64
 29321  		v2.AddArg(y)
 29322  		v1.AddArg(v2)
 29323  		v0.AddArg(v1)
 29324  		v.AddArg(v0)
 29325  		return true
 29326  	}
 29327  }
 29328  func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
 29329  	b := v.Block
 29330  	_ = b
 29331  	typ := &b.Func.Config.Types
 29332  	_ = typ
 29333  	// match: (Rsh64x8 x y)
 29334  	// cond: shiftIsBounded(v)
 29335  	// result: (SRAD x y)
 29336  	for {
 29337  		_ = v.Args[1]
 29338  		x := v.Args[0]
 29339  		y := v.Args[1]
 29340  		if !(shiftIsBounded(v)) {
 29341  			break
 29342  		}
 29343  		v.reset(OpPPC64SRAD)
 29344  		v.AddArg(x)
 29345  		v.AddArg(y)
 29346  		return true
 29347  	}
 29348  	// match: (Rsh64x8 x y)
 29349  	// cond:
 29350  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 29351  	for {
 29352  		_ = v.Args[1]
 29353  		x := v.Args[0]
 29354  		y := v.Args[1]
 29355  		v.reset(OpPPC64SRAD)
 29356  		v.AddArg(x)
 29357  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29358  		v0.AddArg(y)
 29359  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29360  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29361  		v2.AuxInt = -64
 29362  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29363  		v3.AddArg(y)
 29364  		v2.AddArg(v3)
 29365  		v1.AddArg(v2)
 29366  		v0.AddArg(v1)
 29367  		v.AddArg(v0)
 29368  		return true
 29369  	}
 29370  }
 29371  func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
 29372  	b := v.Block
 29373  	_ = b
 29374  	typ := &b.Func.Config.Types
 29375  	_ = typ
 29376  	// match: (Rsh8Ux16 x y)
 29377  	// cond: shiftIsBounded(v)
 29378  	// result: (SRW (MOVBZreg x) y)
 29379  	for {
 29380  		_ = v.Args[1]
 29381  		x := v.Args[0]
 29382  		y := v.Args[1]
 29383  		if !(shiftIsBounded(v)) {
 29384  			break
 29385  		}
 29386  		v.reset(OpPPC64SRW)
 29387  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29388  		v0.AddArg(x)
 29389  		v.AddArg(v0)
 29390  		v.AddArg(y)
 29391  		return true
 29392  	}
 29393  	// match: (Rsh8Ux16 x y)
 29394  	// cond:
 29395  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 29396  	for {
 29397  		_ = v.Args[1]
 29398  		x := v.Args[0]
 29399  		y := v.Args[1]
 29400  		v.reset(OpPPC64SRW)
 29401  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29402  		v0.AddArg(x)
 29403  		v.AddArg(v0)
 29404  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29405  		v1.AddArg(y)
 29406  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29407  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29408  		v3.AuxInt = -8
 29409  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 29410  		v4.AddArg(y)
 29411  		v3.AddArg(v4)
 29412  		v2.AddArg(v3)
 29413  		v1.AddArg(v2)
 29414  		v.AddArg(v1)
 29415  		return true
 29416  	}
 29417  }
 29418  func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
 29419  	b := v.Block
 29420  	_ = b
 29421  	typ := &b.Func.Config.Types
 29422  	_ = typ
 29423  	// match: (Rsh8Ux32 x (Const64 [c]))
 29424  	// cond: uint32(c) < 8
 29425  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29426  	for {
 29427  		_ = v.Args[1]
 29428  		x := v.Args[0]
 29429  		v_1 := v.Args[1]
 29430  		if v_1.Op != OpConst64 {
 29431  			break
 29432  		}
 29433  		c := v_1.AuxInt
 29434  		if !(uint32(c) < 8) {
 29435  			break
 29436  		}
 29437  		v.reset(OpPPC64SRWconst)
 29438  		v.AuxInt = c
 29439  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29440  		v0.AddArg(x)
 29441  		v.AddArg(v0)
 29442  		return true
 29443  	}
 29444  	// match: (Rsh8Ux32 x (MOVDconst [c]))
 29445  	// cond: uint32(c) < 8
 29446  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29447  	for {
 29448  		_ = v.Args[1]
 29449  		x := v.Args[0]
 29450  		v_1 := v.Args[1]
 29451  		if v_1.Op != OpPPC64MOVDconst {
 29452  			break
 29453  		}
 29454  		c := v_1.AuxInt
 29455  		if !(uint32(c) < 8) {
 29456  			break
 29457  		}
 29458  		v.reset(OpPPC64SRWconst)
 29459  		v.AuxInt = c
 29460  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29461  		v0.AddArg(x)
 29462  		v.AddArg(v0)
 29463  		return true
 29464  	}
 29465  	// match: (Rsh8Ux32 x y)
 29466  	// cond: shiftIsBounded(v)
 29467  	// result: (SRW (MOVBZreg x) y)
 29468  	for {
 29469  		_ = v.Args[1]
 29470  		x := v.Args[0]
 29471  		y := v.Args[1]
 29472  		if !(shiftIsBounded(v)) {
 29473  			break
 29474  		}
 29475  		v.reset(OpPPC64SRW)
 29476  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29477  		v0.AddArg(x)
 29478  		v.AddArg(v0)
 29479  		v.AddArg(y)
 29480  		return true
 29481  	}
 29482  	// match: (Rsh8Ux32 x y)
 29483  	// cond:
 29484  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 29485  	for {
 29486  		_ = v.Args[1]
 29487  		x := v.Args[0]
 29488  		y := v.Args[1]
 29489  		v.reset(OpPPC64SRW)
 29490  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29491  		v0.AddArg(x)
 29492  		v.AddArg(v0)
 29493  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29494  		v1.AddArg(y)
 29495  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29496  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29497  		v3.AuxInt = -8
 29498  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 29499  		v4.AddArg(y)
 29500  		v3.AddArg(v4)
 29501  		v2.AddArg(v3)
 29502  		v1.AddArg(v2)
 29503  		v.AddArg(v1)
 29504  		return true
 29505  	}
 29506  }
 29507  func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
 29508  	b := v.Block
 29509  	_ = b
 29510  	typ := &b.Func.Config.Types
 29511  	_ = typ
 29512  	// match: (Rsh8Ux64 x (Const64 [c]))
 29513  	// cond: uint64(c) < 8
 29514  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29515  	for {
 29516  		_ = v.Args[1]
 29517  		x := v.Args[0]
 29518  		v_1 := v.Args[1]
 29519  		if v_1.Op != OpConst64 {
 29520  			break
 29521  		}
 29522  		c := v_1.AuxInt
 29523  		if !(uint64(c) < 8) {
 29524  			break
 29525  		}
 29526  		v.reset(OpPPC64SRWconst)
 29527  		v.AuxInt = c
 29528  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29529  		v0.AddArg(x)
 29530  		v.AddArg(v0)
 29531  		return true
 29532  	}
 29533  	// match: (Rsh8Ux64 _ (Const64 [c]))
 29534  	// cond: uint64(c) >= 8
 29535  	// result: (MOVDconst [0])
 29536  	for {
 29537  		_ = v.Args[1]
 29538  		v_1 := v.Args[1]
 29539  		if v_1.Op != OpConst64 {
 29540  			break
 29541  		}
 29542  		c := v_1.AuxInt
 29543  		if !(uint64(c) >= 8) {
 29544  			break
 29545  		}
 29546  		v.reset(OpPPC64MOVDconst)
 29547  		v.AuxInt = 0
 29548  		return true
 29549  	}
 29550  	// match: (Rsh8Ux64 x (MOVDconst [c]))
 29551  	// cond: uint64(c) < 8
 29552  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29553  	for {
 29554  		_ = v.Args[1]
 29555  		x := v.Args[0]
 29556  		v_1 := v.Args[1]
 29557  		if v_1.Op != OpPPC64MOVDconst {
 29558  			break
 29559  		}
 29560  		c := v_1.AuxInt
 29561  		if !(uint64(c) < 8) {
 29562  			break
 29563  		}
 29564  		v.reset(OpPPC64SRWconst)
 29565  		v.AuxInt = c
 29566  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29567  		v0.AddArg(x)
 29568  		v.AddArg(v0)
 29569  		return true
 29570  	}
 29571  	// match: (Rsh8Ux64 x y)
 29572  	// cond: shiftIsBounded(v)
 29573  	// result: (SRW (MOVBZreg x) y)
 29574  	for {
 29575  		_ = v.Args[1]
 29576  		x := v.Args[0]
 29577  		y := v.Args[1]
 29578  		if !(shiftIsBounded(v)) {
 29579  			break
 29580  		}
 29581  		v.reset(OpPPC64SRW)
 29582  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29583  		v0.AddArg(x)
 29584  		v.AddArg(v0)
 29585  		v.AddArg(y)
 29586  		return true
 29587  	}
 29588  	// match: (Rsh8Ux64 x y)
 29589  	// cond:
 29590  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29591  	for {
 29592  		_ = v.Args[1]
 29593  		x := v.Args[0]
 29594  		y := v.Args[1]
 29595  		v.reset(OpPPC64SRW)
 29596  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29597  		v0.AddArg(x)
 29598  		v.AddArg(v0)
 29599  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29600  		v1.AddArg(y)
 29601  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29602  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29603  		v3.AuxInt = -8
 29604  		v3.AddArg(y)
 29605  		v2.AddArg(v3)
 29606  		v1.AddArg(v2)
 29607  		v.AddArg(v1)
 29608  		return true
 29609  	}
 29610  }
 29611  func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
 29612  	b := v.Block
 29613  	_ = b
 29614  	typ := &b.Func.Config.Types
 29615  	_ = typ
 29616  	// match: (Rsh8Ux8 x y)
 29617  	// cond: shiftIsBounded(v)
 29618  	// result: (SRW (MOVBZreg x) y)
 29619  	for {
 29620  		_ = v.Args[1]
 29621  		x := v.Args[0]
 29622  		y := v.Args[1]
 29623  		if !(shiftIsBounded(v)) {
 29624  			break
 29625  		}
 29626  		v.reset(OpPPC64SRW)
 29627  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29628  		v0.AddArg(x)
 29629  		v.AddArg(v0)
 29630  		v.AddArg(y)
 29631  		return true
 29632  	}
 29633  	// match: (Rsh8Ux8 x y)
 29634  	// cond:
 29635  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29636  	for {
 29637  		_ = v.Args[1]
 29638  		x := v.Args[0]
 29639  		y := v.Args[1]
 29640  		v.reset(OpPPC64SRW)
 29641  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29642  		v0.AddArg(x)
 29643  		v.AddArg(v0)
 29644  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29645  		v1.AddArg(y)
 29646  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29647  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29648  		v3.AuxInt = -8
 29649  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29650  		v4.AddArg(y)
 29651  		v3.AddArg(v4)
 29652  		v2.AddArg(v3)
 29653  		v1.AddArg(v2)
 29654  		v.AddArg(v1)
 29655  		return true
 29656  	}
 29657  }
 29658  func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
 29659  	b := v.Block
 29660  	_ = b
 29661  	typ := &b.Func.Config.Types
 29662  	_ = typ
 29663  	// match: (Rsh8x16 x y)
 29664  	// cond: shiftIsBounded(v)
 29665  	// result: (SRAW (MOVBreg x) y)
 29666  	for {
 29667  		_ = v.Args[1]
 29668  		x := v.Args[0]
 29669  		y := v.Args[1]
 29670  		if !(shiftIsBounded(v)) {
 29671  			break
 29672  		}
 29673  		v.reset(OpPPC64SRAW)
 29674  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29675  		v0.AddArg(x)
 29676  		v.AddArg(v0)
 29677  		v.AddArg(y)
 29678  		return true
 29679  	}
 29680  	// match: (Rsh8x16 x y)
 29681  	// cond:
 29682  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 29683  	for {
 29684  		_ = v.Args[1]
 29685  		x := v.Args[0]
 29686  		y := v.Args[1]
 29687  		v.reset(OpPPC64SRAW)
 29688  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29689  		v0.AddArg(x)
 29690  		v.AddArg(v0)
 29691  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29692  		v1.AddArg(y)
 29693  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29694  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29695  		v3.AuxInt = -8
 29696  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 29697  		v4.AddArg(y)
 29698  		v3.AddArg(v4)
 29699  		v2.AddArg(v3)
 29700  		v1.AddArg(v2)
 29701  		v.AddArg(v1)
 29702  		return true
 29703  	}
 29704  }
 29705  func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
 29706  	b := v.Block
 29707  	_ = b
 29708  	typ := &b.Func.Config.Types
 29709  	_ = typ
 29710  	// match: (Rsh8x32 x (Const64 [c]))
 29711  	// cond: uint32(c) < 8
 29712  	// result: (SRAWconst (SignExt8to32 x) [c])
 29713  	for {
 29714  		_ = v.Args[1]
 29715  		x := v.Args[0]
 29716  		v_1 := v.Args[1]
 29717  		if v_1.Op != OpConst64 {
 29718  			break
 29719  		}
 29720  		c := v_1.AuxInt
 29721  		if !(uint32(c) < 8) {
 29722  			break
 29723  		}
 29724  		v.reset(OpPPC64SRAWconst)
 29725  		v.AuxInt = c
 29726  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29727  		v0.AddArg(x)
 29728  		v.AddArg(v0)
 29729  		return true
 29730  	}
 29731  	// match: (Rsh8x32 x (MOVDconst [c]))
 29732  	// cond: uint32(c) < 8
 29733  	// result: (SRAWconst (SignExt8to32 x) [c])
 29734  	for {
 29735  		_ = v.Args[1]
 29736  		x := v.Args[0]
 29737  		v_1 := v.Args[1]
 29738  		if v_1.Op != OpPPC64MOVDconst {
 29739  			break
 29740  		}
 29741  		c := v_1.AuxInt
 29742  		if !(uint32(c) < 8) {
 29743  			break
 29744  		}
 29745  		v.reset(OpPPC64SRAWconst)
 29746  		v.AuxInt = c
 29747  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29748  		v0.AddArg(x)
 29749  		v.AddArg(v0)
 29750  		return true
 29751  	}
 29752  	// match: (Rsh8x32 x y)
 29753  	// cond: shiftIsBounded(v)
 29754  	// result: (SRAW (MOVBreg x) y)
 29755  	for {
 29756  		_ = v.Args[1]
 29757  		x := v.Args[0]
 29758  		y := v.Args[1]
 29759  		if !(shiftIsBounded(v)) {
 29760  			break
 29761  		}
 29762  		v.reset(OpPPC64SRAW)
 29763  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29764  		v0.AddArg(x)
 29765  		v.AddArg(v0)
 29766  		v.AddArg(y)
 29767  		return true
 29768  	}
 29769  	// match: (Rsh8x32 x y)
 29770  	// cond:
 29771  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 29772  	for {
 29773  		_ = v.Args[1]
 29774  		x := v.Args[0]
 29775  		y := v.Args[1]
 29776  		v.reset(OpPPC64SRAW)
 29777  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29778  		v0.AddArg(x)
 29779  		v.AddArg(v0)
 29780  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29781  		v1.AddArg(y)
 29782  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29783  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29784  		v3.AuxInt = -8
 29785  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 29786  		v4.AddArg(y)
 29787  		v3.AddArg(v4)
 29788  		v2.AddArg(v3)
 29789  		v1.AddArg(v2)
 29790  		v.AddArg(v1)
 29791  		return true
 29792  	}
 29793  }
 29794  func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
 29795  	b := v.Block
 29796  	_ = b
 29797  	typ := &b.Func.Config.Types
 29798  	_ = typ
 29799  	// match: (Rsh8x64 x (Const64 [c]))
 29800  	// cond: uint64(c) < 8
 29801  	// result: (SRAWconst (SignExt8to32 x) [c])
 29802  	for {
 29803  		_ = v.Args[1]
 29804  		x := v.Args[0]
 29805  		v_1 := v.Args[1]
 29806  		if v_1.Op != OpConst64 {
 29807  			break
 29808  		}
 29809  		c := v_1.AuxInt
 29810  		if !(uint64(c) < 8) {
 29811  			break
 29812  		}
 29813  		v.reset(OpPPC64SRAWconst)
 29814  		v.AuxInt = c
 29815  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29816  		v0.AddArg(x)
 29817  		v.AddArg(v0)
 29818  		return true
 29819  	}
 29820  	// match: (Rsh8x64 x (Const64 [c]))
 29821  	// cond: uint64(c) >= 8
 29822  	// result: (SRAWconst (SignExt8to32 x) [63])
 29823  	for {
 29824  		_ = v.Args[1]
 29825  		x := v.Args[0]
 29826  		v_1 := v.Args[1]
 29827  		if v_1.Op != OpConst64 {
 29828  			break
 29829  		}
 29830  		c := v_1.AuxInt
 29831  		if !(uint64(c) >= 8) {
 29832  			break
 29833  		}
 29834  		v.reset(OpPPC64SRAWconst)
 29835  		v.AuxInt = 63
 29836  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29837  		v0.AddArg(x)
 29838  		v.AddArg(v0)
 29839  		return true
 29840  	}
 29841  	// match: (Rsh8x64 x (MOVDconst [c]))
 29842  	// cond: uint64(c) < 8
 29843  	// result: (SRAWconst (SignExt8to32 x) [c])
 29844  	for {
 29845  		_ = v.Args[1]
 29846  		x := v.Args[0]
 29847  		v_1 := v.Args[1]
 29848  		if v_1.Op != OpPPC64MOVDconst {
 29849  			break
 29850  		}
 29851  		c := v_1.AuxInt
 29852  		if !(uint64(c) < 8) {
 29853  			break
 29854  		}
 29855  		v.reset(OpPPC64SRAWconst)
 29856  		v.AuxInt = c
 29857  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29858  		v0.AddArg(x)
 29859  		v.AddArg(v0)
 29860  		return true
 29861  	}
 29862  	// match: (Rsh8x64 x y)
 29863  	// cond: shiftIsBounded(v)
 29864  	// result: (SRAW (MOVBreg x) y)
 29865  	for {
 29866  		_ = v.Args[1]
 29867  		x := v.Args[0]
 29868  		y := v.Args[1]
 29869  		if !(shiftIsBounded(v)) {
 29870  			break
 29871  		}
 29872  		v.reset(OpPPC64SRAW)
 29873  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29874  		v0.AddArg(x)
 29875  		v.AddArg(v0)
 29876  		v.AddArg(y)
 29877  		return true
 29878  	}
 29879  	// match: (Rsh8x64 x y)
 29880  	// cond:
 29881  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29882  	for {
 29883  		_ = v.Args[1]
 29884  		x := v.Args[0]
 29885  		y := v.Args[1]
 29886  		v.reset(OpPPC64SRAW)
 29887  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29888  		v0.AddArg(x)
 29889  		v.AddArg(v0)
 29890  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29891  		v1.AddArg(y)
 29892  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29893  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29894  		v3.AuxInt = -8
 29895  		v3.AddArg(y)
 29896  		v2.AddArg(v3)
 29897  		v1.AddArg(v2)
 29898  		v.AddArg(v1)
 29899  		return true
 29900  	}
 29901  }
 29902  func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
 29903  	b := v.Block
 29904  	_ = b
 29905  	typ := &b.Func.Config.Types
 29906  	_ = typ
 29907  	// match: (Rsh8x8 x y)
 29908  	// cond: shiftIsBounded(v)
 29909  	// result: (SRAW (MOVBreg x) y)
 29910  	for {
 29911  		_ = v.Args[1]
 29912  		x := v.Args[0]
 29913  		y := v.Args[1]
 29914  		if !(shiftIsBounded(v)) {
 29915  			break
 29916  		}
 29917  		v.reset(OpPPC64SRAW)
 29918  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29919  		v0.AddArg(x)
 29920  		v.AddArg(v0)
 29921  		v.AddArg(y)
 29922  		return true
 29923  	}
 29924  	// match: (Rsh8x8 x y)
 29925  	// cond:
 29926  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29927  	for {
 29928  		_ = v.Args[1]
 29929  		x := v.Args[0]
 29930  		y := v.Args[1]
 29931  		v.reset(OpPPC64SRAW)
 29932  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29933  		v0.AddArg(x)
 29934  		v.AddArg(v0)
 29935  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29936  		v1.AddArg(y)
 29937  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29938  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29939  		v3.AuxInt = -8
 29940  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29941  		v4.AddArg(y)
 29942  		v3.AddArg(v4)
 29943  		v2.AddArg(v3)
 29944  		v1.AddArg(v2)
 29945  		v.AddArg(v1)
 29946  		return true
 29947  	}
 29948  }
 29949  func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
 29950  	// match: (SignExt16to32 x)
 29951  	// cond:
 29952  	// result: (MOVHreg x)
 29953  	for {
 29954  		x := v.Args[0]
 29955  		v.reset(OpPPC64MOVHreg)
 29956  		v.AddArg(x)
 29957  		return true
 29958  	}
 29959  }
 29960  func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
 29961  	// match: (SignExt16to64 x)
 29962  	// cond:
 29963  	// result: (MOVHreg x)
 29964  	for {
 29965  		x := v.Args[0]
 29966  		v.reset(OpPPC64MOVHreg)
 29967  		v.AddArg(x)
 29968  		return true
 29969  	}
 29970  }
 29971  func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
 29972  	// match: (SignExt32to64 x)
 29973  	// cond:
 29974  	// result: (MOVWreg x)
 29975  	for {
 29976  		x := v.Args[0]
 29977  		v.reset(OpPPC64MOVWreg)
 29978  		v.AddArg(x)
 29979  		return true
 29980  	}
 29981  }
 29982  func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
 29983  	// match: (SignExt8to16 x)
 29984  	// cond:
 29985  	// result: (MOVBreg x)
 29986  	for {
 29987  		x := v.Args[0]
 29988  		v.reset(OpPPC64MOVBreg)
 29989  		v.AddArg(x)
 29990  		return true
 29991  	}
 29992  }
 29993  func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
 29994  	// match: (SignExt8to32 x)
 29995  	// cond:
 29996  	// result: (MOVBreg x)
 29997  	for {
 29998  		x := v.Args[0]
 29999  		v.reset(OpPPC64MOVBreg)
 30000  		v.AddArg(x)
 30001  		return true
 30002  	}
 30003  }
 30004  func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
 30005  	// match: (SignExt8to64 x)
 30006  	// cond:
 30007  	// result: (MOVBreg x)
 30008  	for {
 30009  		x := v.Args[0]
 30010  		v.reset(OpPPC64MOVBreg)
 30011  		v.AddArg(x)
 30012  		return true
 30013  	}
 30014  }
 30015  func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
 30016  	b := v.Block
 30017  	_ = b
 30018  	// match: (Slicemask <t> x)
 30019  	// cond:
 30020  	// result: (SRADconst (NEG <t> x) [63])
 30021  	for {
 30022  		t := v.Type
 30023  		x := v.Args[0]
 30024  		v.reset(OpPPC64SRADconst)
 30025  		v.AuxInt = 63
 30026  		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
 30027  		v0.AddArg(x)
 30028  		v.AddArg(v0)
 30029  		return true
 30030  	}
 30031  }
 30032  func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
 30033  	// match: (Sqrt x)
 30034  	// cond:
 30035  	// result: (FSQRT x)
 30036  	for {
 30037  		x := v.Args[0]
 30038  		v.reset(OpPPC64FSQRT)
 30039  		v.AddArg(x)
 30040  		return true
 30041  	}
 30042  }
 30043  func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
 30044  	// match: (StaticCall [argwid] {target} mem)
 30045  	// cond:
 30046  	// result: (CALLstatic [argwid] {target} mem)
 30047  	for {
 30048  		argwid := v.AuxInt
 30049  		target := v.Aux
 30050  		mem := v.Args[0]
 30051  		v.reset(OpPPC64CALLstatic)
 30052  		v.AuxInt = argwid
 30053  		v.Aux = target
 30054  		v.AddArg(mem)
 30055  		return true
 30056  	}
 30057  }
 30058  func rewriteValuePPC64_OpStore_0(v *Value) bool {
 30059  	// match: (Store {t} ptr val mem)
 30060  	// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
 30061  	// result: (FMOVDstore ptr val mem)
 30062  	for {
 30063  		t := v.Aux
 30064  		_ = v.Args[2]
 30065  		ptr := v.Args[0]
 30066  		val := v.Args[1]
 30067  		mem := v.Args[2]
 30068  		if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
 30069  			break
 30070  		}
 30071  		v.reset(OpPPC64FMOVDstore)
 30072  		v.AddArg(ptr)
 30073  		v.AddArg(val)
 30074  		v.AddArg(mem)
 30075  		return true
 30076  	}
 30077  	// match: (Store {t} ptr val mem)
 30078  	// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
 30079  	// result: (FMOVDstore ptr val mem)
 30080  	for {
 30081  		t := v.Aux
 30082  		_ = v.Args[2]
 30083  		ptr := v.Args[0]
 30084  		val := v.Args[1]
 30085  		mem := v.Args[2]
 30086  		if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
 30087  			break
 30088  		}
 30089  		v.reset(OpPPC64FMOVDstore)
 30090  		v.AddArg(ptr)
 30091  		v.AddArg(val)
 30092  		v.AddArg(mem)
 30093  		return true
 30094  	}
 30095  	// match: (Store {t} ptr val mem)
 30096  	// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
 30097  	// result: (FMOVSstore ptr val mem)
 30098  	for {
 30099  		t := v.Aux
 30100  		_ = v.Args[2]
 30101  		ptr := v.Args[0]
 30102  		val := v.Args[1]
 30103  		mem := v.Args[2]
 30104  		if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
 30105  			break
 30106  		}
 30107  		v.reset(OpPPC64FMOVSstore)
 30108  		v.AddArg(ptr)
 30109  		v.AddArg(val)
 30110  		v.AddArg(mem)
 30111  		return true
 30112  	}
 30113  	// match: (Store {t} ptr val mem)
 30114  	// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
 30115  	// result: (MOVDstore ptr val mem)
 30116  	for {
 30117  		t := v.Aux
 30118  		_ = v.Args[2]
 30119  		ptr := v.Args[0]
 30120  		val := v.Args[1]
 30121  		mem := v.Args[2]
 30122  		if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
 30123  			break
 30124  		}
 30125  		v.reset(OpPPC64MOVDstore)
 30126  		v.AddArg(ptr)
 30127  		v.AddArg(val)
 30128  		v.AddArg(mem)
 30129  		return true
 30130  	}
 30131  	// match: (Store {t} ptr val mem)
 30132  	// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
 30133  	// result: (MOVWstore ptr val mem)
 30134  	for {
 30135  		t := v.Aux
 30136  		_ = v.Args[2]
 30137  		ptr := v.Args[0]
 30138  		val := v.Args[1]
 30139  		mem := v.Args[2]
 30140  		if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
 30141  			break
 30142  		}
 30143  		v.reset(OpPPC64MOVWstore)
 30144  		v.AddArg(ptr)
 30145  		v.AddArg(val)
 30146  		v.AddArg(mem)
 30147  		return true
 30148  	}
 30149  	// match: (Store {t} ptr val mem)
 30150  	// cond: t.(*types.Type).Size() == 2
 30151  	// result: (MOVHstore ptr val mem)
 30152  	for {
 30153  		t := v.Aux
 30154  		_ = v.Args[2]
 30155  		ptr := v.Args[0]
 30156  		val := v.Args[1]
 30157  		mem := v.Args[2]
 30158  		if !(t.(*types.Type).Size() == 2) {
 30159  			break
 30160  		}
 30161  		v.reset(OpPPC64MOVHstore)
 30162  		v.AddArg(ptr)
 30163  		v.AddArg(val)
 30164  		v.AddArg(mem)
 30165  		return true
 30166  	}
 30167  	// match: (Store {t} ptr val mem)
 30168  	// cond: t.(*types.Type).Size() == 1
 30169  	// result: (MOVBstore ptr val mem)
 30170  	for {
 30171  		t := v.Aux
 30172  		_ = v.Args[2]
 30173  		ptr := v.Args[0]
 30174  		val := v.Args[1]
 30175  		mem := v.Args[2]
 30176  		if !(t.(*types.Type).Size() == 1) {
 30177  			break
 30178  		}
 30179  		v.reset(OpPPC64MOVBstore)
 30180  		v.AddArg(ptr)
 30181  		v.AddArg(val)
 30182  		v.AddArg(mem)
 30183  		return true
 30184  	}
 30185  	return false
 30186  }
 30187  func rewriteValuePPC64_OpSub16_0(v *Value) bool {
 30188  	// match: (Sub16 x y)
 30189  	// cond:
 30190  	// result: (SUB x y)
 30191  	for {
 30192  		_ = v.Args[1]
 30193  		x := v.Args[0]
 30194  		y := v.Args[1]
 30195  		v.reset(OpPPC64SUB)
 30196  		v.AddArg(x)
 30197  		v.AddArg(y)
 30198  		return true
 30199  	}
 30200  }
 30201  func rewriteValuePPC64_OpSub32_0(v *Value) bool {
 30202  	// match: (Sub32 x y)
 30203  	// cond:
 30204  	// result: (SUB x y)
 30205  	for {
 30206  		_ = v.Args[1]
 30207  		x := v.Args[0]
 30208  		y := v.Args[1]
 30209  		v.reset(OpPPC64SUB)
 30210  		v.AddArg(x)
 30211  		v.AddArg(y)
 30212  		return true
 30213  	}
 30214  }
 30215  func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
 30216  	// match: (Sub32F x y)
 30217  	// cond:
 30218  	// result: (FSUBS x y)
 30219  	for {
 30220  		_ = v.Args[1]
 30221  		x := v.Args[0]
 30222  		y := v.Args[1]
 30223  		v.reset(OpPPC64FSUBS)
 30224  		v.AddArg(x)
 30225  		v.AddArg(y)
 30226  		return true
 30227  	}
 30228  }
 30229  func rewriteValuePPC64_OpSub64_0(v *Value) bool {
 30230  	// match: (Sub64 x y)
 30231  	// cond:
 30232  	// result: (SUB x y)
 30233  	for {
 30234  		_ = v.Args[1]
 30235  		x := v.Args[0]
 30236  		y := v.Args[1]
 30237  		v.reset(OpPPC64SUB)
 30238  		v.AddArg(x)
 30239  		v.AddArg(y)
 30240  		return true
 30241  	}
 30242  }
 30243  func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
 30244  	// match: (Sub64F x y)
 30245  	// cond:
 30246  	// result: (FSUB x y)
 30247  	for {
 30248  		_ = v.Args[1]
 30249  		x := v.Args[0]
 30250  		y := v.Args[1]
 30251  		v.reset(OpPPC64FSUB)
 30252  		v.AddArg(x)
 30253  		v.AddArg(y)
 30254  		return true
 30255  	}
 30256  }
 30257  func rewriteValuePPC64_OpSub8_0(v *Value) bool {
 30258  	// match: (Sub8 x y)
 30259  	// cond:
 30260  	// result: (SUB x y)
 30261  	for {
 30262  		_ = v.Args[1]
 30263  		x := v.Args[0]
 30264  		y := v.Args[1]
 30265  		v.reset(OpPPC64SUB)
 30266  		v.AddArg(x)
 30267  		v.AddArg(y)
 30268  		return true
 30269  	}
 30270  }
 30271  func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
 30272  	// match: (SubPtr x y)
 30273  	// cond:
 30274  	// result: (SUB x y)
 30275  	for {
 30276  		_ = v.Args[1]
 30277  		x := v.Args[0]
 30278  		y := v.Args[1]
 30279  		v.reset(OpPPC64SUB)
 30280  		v.AddArg(x)
 30281  		v.AddArg(y)
 30282  		return true
 30283  	}
 30284  }
 30285  func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
 30286  	// match: (Trunc x)
 30287  	// cond:
 30288  	// result: (FTRUNC x)
 30289  	for {
 30290  		x := v.Args[0]
 30291  		v.reset(OpPPC64FTRUNC)
 30292  		v.AddArg(x)
 30293  		return true
 30294  	}
 30295  }
 30296  func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
 30297  	// match: (Trunc16to8 x)
 30298  	// cond: isSigned(x.Type)
 30299  	// result: (MOVBreg x)
 30300  	for {
 30301  		x := v.Args[0]
 30302  		if !(isSigned(x.Type)) {
 30303  			break
 30304  		}
 30305  		v.reset(OpPPC64MOVBreg)
 30306  		v.AddArg(x)
 30307  		return true
 30308  	}
 30309  	// match: (Trunc16to8 x)
 30310  	// cond:
 30311  	// result: (MOVBZreg x)
 30312  	for {
 30313  		x := v.Args[0]
 30314  		v.reset(OpPPC64MOVBZreg)
 30315  		v.AddArg(x)
 30316  		return true
 30317  	}
 30318  }
 30319  func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
 30320  	// match: (Trunc32to16 x)
 30321  	// cond: isSigned(x.Type)
 30322  	// result: (MOVHreg x)
 30323  	for {
 30324  		x := v.Args[0]
 30325  		if !(isSigned(x.Type)) {
 30326  			break
 30327  		}
 30328  		v.reset(OpPPC64MOVHreg)
 30329  		v.AddArg(x)
 30330  		return true
 30331  	}
 30332  	// match: (Trunc32to16 x)
 30333  	// cond:
 30334  	// result: (MOVHZreg x)
 30335  	for {
 30336  		x := v.Args[0]
 30337  		v.reset(OpPPC64MOVHZreg)
 30338  		v.AddArg(x)
 30339  		return true
 30340  	}
 30341  }
 30342  func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
 30343  	// match: (Trunc32to8 x)
 30344  	// cond: isSigned(x.Type)
 30345  	// result: (MOVBreg x)
 30346  	for {
 30347  		x := v.Args[0]
 30348  		if !(isSigned(x.Type)) {
 30349  			break
 30350  		}
 30351  		v.reset(OpPPC64MOVBreg)
 30352  		v.AddArg(x)
 30353  		return true
 30354  	}
 30355  	// match: (Trunc32to8 x)
 30356  	// cond:
 30357  	// result: (MOVBZreg x)
 30358  	for {
 30359  		x := v.Args[0]
 30360  		v.reset(OpPPC64MOVBZreg)
 30361  		v.AddArg(x)
 30362  		return true
 30363  	}
 30364  }
 30365  func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
 30366  	// match: (Trunc64to16 x)
 30367  	// cond: isSigned(x.Type)
 30368  	// result: (MOVHreg x)
 30369  	for {
 30370  		x := v.Args[0]
 30371  		if !(isSigned(x.Type)) {
 30372  			break
 30373  		}
 30374  		v.reset(OpPPC64MOVHreg)
 30375  		v.AddArg(x)
 30376  		return true
 30377  	}
 30378  	// match: (Trunc64to16 x)
 30379  	// cond:
 30380  	// result: (MOVHZreg x)
 30381  	for {
 30382  		x := v.Args[0]
 30383  		v.reset(OpPPC64MOVHZreg)
 30384  		v.AddArg(x)
 30385  		return true
 30386  	}
 30387  }
 30388  func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
 30389  	// match: (Trunc64to32 x)
 30390  	// cond: isSigned(x.Type)
 30391  	// result: (MOVWreg x)
 30392  	for {
 30393  		x := v.Args[0]
 30394  		if !(isSigned(x.Type)) {
 30395  			break
 30396  		}
 30397  		v.reset(OpPPC64MOVWreg)
 30398  		v.AddArg(x)
 30399  		return true
 30400  	}
 30401  	// match: (Trunc64to32 x)
 30402  	// cond:
 30403  	// result: (MOVWZreg x)
 30404  	for {
 30405  		x := v.Args[0]
 30406  		v.reset(OpPPC64MOVWZreg)
 30407  		v.AddArg(x)
 30408  		return true
 30409  	}
 30410  }
 30411  func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
 30412  	// match: (Trunc64to8 x)
 30413  	// cond: isSigned(x.Type)
 30414  	// result: (MOVBreg x)
 30415  	for {
 30416  		x := v.Args[0]
 30417  		if !(isSigned(x.Type)) {
 30418  			break
 30419  		}
 30420  		v.reset(OpPPC64MOVBreg)
 30421  		v.AddArg(x)
 30422  		return true
 30423  	}
 30424  	// match: (Trunc64to8 x)
 30425  	// cond:
 30426  	// result: (MOVBZreg x)
 30427  	for {
 30428  		x := v.Args[0]
 30429  		v.reset(OpPPC64MOVBZreg)
 30430  		v.AddArg(x)
 30431  		return true
 30432  	}
 30433  }
 30434  func rewriteValuePPC64_OpWB_0(v *Value) bool {
 30435  	// match: (WB {fn} destptr srcptr mem)
 30436  	// cond:
 30437  	// result: (LoweredWB {fn} destptr srcptr mem)
 30438  	for {
 30439  		fn := v.Aux
 30440  		_ = v.Args[2]
 30441  		destptr := v.Args[0]
 30442  		srcptr := v.Args[1]
 30443  		mem := v.Args[2]
 30444  		v.reset(OpPPC64LoweredWB)
 30445  		v.Aux = fn
 30446  		v.AddArg(destptr)
 30447  		v.AddArg(srcptr)
 30448  		v.AddArg(mem)
 30449  		return true
 30450  	}
 30451  }
 30452  func rewriteValuePPC64_OpXor16_0(v *Value) bool {
 30453  	// match: (Xor16 x y)
 30454  	// cond:
 30455  	// result: (XOR x y)
 30456  	for {
 30457  		_ = v.Args[1]
 30458  		x := v.Args[0]
 30459  		y := v.Args[1]
 30460  		v.reset(OpPPC64XOR)
 30461  		v.AddArg(x)
 30462  		v.AddArg(y)
 30463  		return true
 30464  	}
 30465  }
 30466  func rewriteValuePPC64_OpXor32_0(v *Value) bool {
 30467  	// match: (Xor32 x y)
 30468  	// cond:
 30469  	// result: (XOR x y)
 30470  	for {
 30471  		_ = v.Args[1]
 30472  		x := v.Args[0]
 30473  		y := v.Args[1]
 30474  		v.reset(OpPPC64XOR)
 30475  		v.AddArg(x)
 30476  		v.AddArg(y)
 30477  		return true
 30478  	}
 30479  }
 30480  func rewriteValuePPC64_OpXor64_0(v *Value) bool {
 30481  	// match: (Xor64 x y)
 30482  	// cond:
 30483  	// result: (XOR x y)
 30484  	for {
 30485  		_ = v.Args[1]
 30486  		x := v.Args[0]
 30487  		y := v.Args[1]
 30488  		v.reset(OpPPC64XOR)
 30489  		v.AddArg(x)
 30490  		v.AddArg(y)
 30491  		return true
 30492  	}
 30493  }
 30494  func rewriteValuePPC64_OpXor8_0(v *Value) bool {
 30495  	// match: (Xor8 x y)
 30496  	// cond:
 30497  	// result: (XOR x y)
 30498  	for {
 30499  		_ = v.Args[1]
 30500  		x := v.Args[0]
 30501  		y := v.Args[1]
 30502  		v.reset(OpPPC64XOR)
 30503  		v.AddArg(x)
 30504  		v.AddArg(y)
 30505  		return true
 30506  	}
 30507  }
 30508  func rewriteValuePPC64_OpZero_0(v *Value) bool {
 30509  	b := v.Block
 30510  	_ = b
 30511  	// match: (Zero [0] _ mem)
 30512  	// cond:
 30513  	// result: mem
 30514  	for {
 30515  		if v.AuxInt != 0 {
 30516  			break
 30517  		}
 30518  		_ = v.Args[1]
 30519  		mem := v.Args[1]
 30520  		v.reset(OpCopy)
 30521  		v.Type = mem.Type
 30522  		v.AddArg(mem)
 30523  		return true
 30524  	}
 30525  	// match: (Zero [1] destptr mem)
 30526  	// cond:
 30527  	// result: (MOVBstorezero destptr mem)
 30528  	for {
 30529  		if v.AuxInt != 1 {
 30530  			break
 30531  		}
 30532  		_ = v.Args[1]
 30533  		destptr := v.Args[0]
 30534  		mem := v.Args[1]
 30535  		v.reset(OpPPC64MOVBstorezero)
 30536  		v.AddArg(destptr)
 30537  		v.AddArg(mem)
 30538  		return true
 30539  	}
 30540  	// match: (Zero [2] destptr mem)
 30541  	// cond:
 30542  	// result: (MOVHstorezero destptr mem)
 30543  	for {
 30544  		if v.AuxInt != 2 {
 30545  			break
 30546  		}
 30547  		_ = v.Args[1]
 30548  		destptr := v.Args[0]
 30549  		mem := v.Args[1]
 30550  		v.reset(OpPPC64MOVHstorezero)
 30551  		v.AddArg(destptr)
 30552  		v.AddArg(mem)
 30553  		return true
 30554  	}
 30555  	// match: (Zero [3] destptr mem)
 30556  	// cond:
 30557  	// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
 30558  	for {
 30559  		if v.AuxInt != 3 {
 30560  			break
 30561  		}
 30562  		_ = v.Args[1]
 30563  		destptr := v.Args[0]
 30564  		mem := v.Args[1]
 30565  		v.reset(OpPPC64MOVBstorezero)
 30566  		v.AuxInt = 2
 30567  		v.AddArg(destptr)
 30568  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30569  		v0.AddArg(destptr)
 30570  		v0.AddArg(mem)
 30571  		v.AddArg(v0)
 30572  		return true
 30573  	}
 30574  	// match: (Zero [4] destptr mem)
 30575  	// cond:
 30576  	// result: (MOVWstorezero destptr mem)
 30577  	for {
 30578  		if v.AuxInt != 4 {
 30579  			break
 30580  		}
 30581  		_ = v.Args[1]
 30582  		destptr := v.Args[0]
 30583  		mem := v.Args[1]
 30584  		v.reset(OpPPC64MOVWstorezero)
 30585  		v.AddArg(destptr)
 30586  		v.AddArg(mem)
 30587  		return true
 30588  	}
 30589  	// match: (Zero [5] destptr mem)
 30590  	// cond:
 30591  	// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
 30592  	for {
 30593  		if v.AuxInt != 5 {
 30594  			break
 30595  		}
 30596  		_ = v.Args[1]
 30597  		destptr := v.Args[0]
 30598  		mem := v.Args[1]
 30599  		v.reset(OpPPC64MOVBstorezero)
 30600  		v.AuxInt = 4
 30601  		v.AddArg(destptr)
 30602  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30603  		v0.AddArg(destptr)
 30604  		v0.AddArg(mem)
 30605  		v.AddArg(v0)
 30606  		return true
 30607  	}
 30608  	// match: (Zero [6] destptr mem)
 30609  	// cond:
 30610  	// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
 30611  	for {
 30612  		if v.AuxInt != 6 {
 30613  			break
 30614  		}
 30615  		_ = v.Args[1]
 30616  		destptr := v.Args[0]
 30617  		mem := v.Args[1]
 30618  		v.reset(OpPPC64MOVHstorezero)
 30619  		v.AuxInt = 4
 30620  		v.AddArg(destptr)
 30621  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30622  		v0.AddArg(destptr)
 30623  		v0.AddArg(mem)
 30624  		v.AddArg(v0)
 30625  		return true
 30626  	}
 30627  	// match: (Zero [7] destptr mem)
 30628  	// cond:
 30629  	// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
 30630  	for {
 30631  		if v.AuxInt != 7 {
 30632  			break
 30633  		}
 30634  		_ = v.Args[1]
 30635  		destptr := v.Args[0]
 30636  		mem := v.Args[1]
 30637  		v.reset(OpPPC64MOVBstorezero)
 30638  		v.AuxInt = 6
 30639  		v.AddArg(destptr)
 30640  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30641  		v0.AuxInt = 4
 30642  		v0.AddArg(destptr)
 30643  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30644  		v1.AddArg(destptr)
 30645  		v1.AddArg(mem)
 30646  		v0.AddArg(v1)
 30647  		v.AddArg(v0)
 30648  		return true
 30649  	}
 30650  	// match: (Zero [8] {t} destptr mem)
 30651  	// cond: t.(*types.Type).Alignment()%4 == 0
 30652  	// result: (MOVDstorezero destptr mem)
 30653  	for {
 30654  		if v.AuxInt != 8 {
 30655  			break
 30656  		}
 30657  		t := v.Aux
 30658  		_ = v.Args[1]
 30659  		destptr := v.Args[0]
 30660  		mem := v.Args[1]
 30661  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30662  			break
 30663  		}
 30664  		v.reset(OpPPC64MOVDstorezero)
 30665  		v.AddArg(destptr)
 30666  		v.AddArg(mem)
 30667  		return true
 30668  	}
 30669  	// match: (Zero [8] destptr mem)
 30670  	// cond:
 30671  	// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
 30672  	for {
 30673  		if v.AuxInt != 8 {
 30674  			break
 30675  		}
 30676  		_ = v.Args[1]
 30677  		destptr := v.Args[0]
 30678  		mem := v.Args[1]
 30679  		v.reset(OpPPC64MOVWstorezero)
 30680  		v.AuxInt = 4
 30681  		v.AddArg(destptr)
 30682  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30683  		v0.AuxInt = 0
 30684  		v0.AddArg(destptr)
 30685  		v0.AddArg(mem)
 30686  		v.AddArg(v0)
 30687  		return true
 30688  	}
 30689  	return false
 30690  }
 30691  func rewriteValuePPC64_OpZero_10(v *Value) bool {
 30692  	b := v.Block
 30693  	_ = b
 30694  	// match: (Zero [12] {t} destptr mem)
 30695  	// cond: t.(*types.Type).Alignment()%4 == 0
 30696  	// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30697  	for {
 30698  		if v.AuxInt != 12 {
 30699  			break
 30700  		}
 30701  		t := v.Aux
 30702  		_ = v.Args[1]
 30703  		destptr := v.Args[0]
 30704  		mem := v.Args[1]
 30705  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30706  			break
 30707  		}
 30708  		v.reset(OpPPC64MOVWstorezero)
 30709  		v.AuxInt = 8
 30710  		v.AddArg(destptr)
 30711  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30712  		v0.AuxInt = 0
 30713  		v0.AddArg(destptr)
 30714  		v0.AddArg(mem)
 30715  		v.AddArg(v0)
 30716  		return true
 30717  	}
 30718  	// match: (Zero [16] {t} destptr mem)
 30719  	// cond: t.(*types.Type).Alignment()%4 == 0
 30720  	// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30721  	for {
 30722  		if v.AuxInt != 16 {
 30723  			break
 30724  		}
 30725  		t := v.Aux
 30726  		_ = v.Args[1]
 30727  		destptr := v.Args[0]
 30728  		mem := v.Args[1]
 30729  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30730  			break
 30731  		}
 30732  		v.reset(OpPPC64MOVDstorezero)
 30733  		v.AuxInt = 8
 30734  		v.AddArg(destptr)
 30735  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30736  		v0.AuxInt = 0
 30737  		v0.AddArg(destptr)
 30738  		v0.AddArg(mem)
 30739  		v.AddArg(v0)
 30740  		return true
 30741  	}
 30742  	// match: (Zero [24] {t} destptr mem)
 30743  	// cond: t.(*types.Type).Alignment()%4 == 0
 30744  	// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
 30745  	for {
 30746  		if v.AuxInt != 24 {
 30747  			break
 30748  		}
 30749  		t := v.Aux
 30750  		_ = v.Args[1]
 30751  		destptr := v.Args[0]
 30752  		mem := v.Args[1]
 30753  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30754  			break
 30755  		}
 30756  		v.reset(OpPPC64MOVDstorezero)
 30757  		v.AuxInt = 16
 30758  		v.AddArg(destptr)
 30759  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30760  		v0.AuxInt = 8
 30761  		v0.AddArg(destptr)
 30762  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30763  		v1.AuxInt = 0
 30764  		v1.AddArg(destptr)
 30765  		v1.AddArg(mem)
 30766  		v0.AddArg(v1)
 30767  		v.AddArg(v0)
 30768  		return true
 30769  	}
 30770  	// match: (Zero [32] {t} destptr mem)
 30771  	// cond: t.(*types.Type).Alignment()%4 == 0
 30772  	// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
 30773  	for {
 30774  		if v.AuxInt != 32 {
 30775  			break
 30776  		}
 30777  		t := v.Aux
 30778  		_ = v.Args[1]
 30779  		destptr := v.Args[0]
 30780  		mem := v.Args[1]
 30781  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30782  			break
 30783  		}
 30784  		v.reset(OpPPC64MOVDstorezero)
 30785  		v.AuxInt = 24
 30786  		v.AddArg(destptr)
 30787  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30788  		v0.AuxInt = 16
 30789  		v0.AddArg(destptr)
 30790  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30791  		v1.AuxInt = 8
 30792  		v1.AddArg(destptr)
 30793  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30794  		v2.AuxInt = 0
 30795  		v2.AddArg(destptr)
 30796  		v2.AddArg(mem)
 30797  		v1.AddArg(v2)
 30798  		v0.AddArg(v1)
 30799  		v.AddArg(v0)
 30800  		return true
 30801  	}
 30802  	// match: (Zero [s] ptr mem)
 30803  	// cond:
 30804  	// result: (LoweredZero [s] ptr mem)
 30805  	for {
 30806  		s := v.AuxInt
 30807  		_ = v.Args[1]
 30808  		ptr := v.Args[0]
 30809  		mem := v.Args[1]
 30810  		v.reset(OpPPC64LoweredZero)
 30811  		v.AuxInt = s
 30812  		v.AddArg(ptr)
 30813  		v.AddArg(mem)
 30814  		return true
 30815  	}
 30816  }
 30817  func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
 30818  	// match: (ZeroExt16to32 x)
 30819  	// cond:
 30820  	// result: (MOVHZreg x)
 30821  	for {
 30822  		x := v.Args[0]
 30823  		v.reset(OpPPC64MOVHZreg)
 30824  		v.AddArg(x)
 30825  		return true
 30826  	}
 30827  }
 30828  func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
 30829  	// match: (ZeroExt16to64 x)
 30830  	// cond:
 30831  	// result: (MOVHZreg x)
 30832  	for {
 30833  		x := v.Args[0]
 30834  		v.reset(OpPPC64MOVHZreg)
 30835  		v.AddArg(x)
 30836  		return true
 30837  	}
 30838  }
 30839  func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
 30840  	// match: (ZeroExt32to64 x)
 30841  	// cond:
 30842  	// result: (MOVWZreg x)
 30843  	for {
 30844  		x := v.Args[0]
 30845  		v.reset(OpPPC64MOVWZreg)
 30846  		v.AddArg(x)
 30847  		return true
 30848  	}
 30849  }
 30850  func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
 30851  	// match: (ZeroExt8to16 x)
 30852  	// cond:
 30853  	// result: (MOVBZreg x)
 30854  	for {
 30855  		x := v.Args[0]
 30856  		v.reset(OpPPC64MOVBZreg)
 30857  		v.AddArg(x)
 30858  		return true
 30859  	}
 30860  }
 30861  func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
 30862  	// match: (ZeroExt8to32 x)
 30863  	// cond:
 30864  	// result: (MOVBZreg x)
 30865  	for {
 30866  		x := v.Args[0]
 30867  		v.reset(OpPPC64MOVBZreg)
 30868  		v.AddArg(x)
 30869  		return true
 30870  	}
 30871  }
 30872  func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
 30873  	// match: (ZeroExt8to64 x)
 30874  	// cond:
 30875  	// result: (MOVBZreg x)
 30876  	for {
 30877  		x := v.Args[0]
 30878  		v.reset(OpPPC64MOVBZreg)
 30879  		v.AddArg(x)
 30880  		return true
 30881  	}
 30882  }
 30883  func rewriteBlockPPC64(b *Block) bool {
 30884  	config := b.Func.Config
 30885  	_ = config
 30886  	fe := b.Func.fe
 30887  	_ = fe
 30888  	typ := &config.Types
 30889  	_ = typ
 30890  	switch b.Kind {
 30891  	case BlockPPC64EQ:
 30892  		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 30893  		// cond:
 30894  		// result: (EQ (ANDCCconst [c] x) yes no)
 30895  		for {
 30896  			v := b.Control
 30897  			if v.Op != OpPPC64CMPconst {
 30898  				break
 30899  			}
 30900  			if v.AuxInt != 0 {
 30901  				break
 30902  			}
 30903  			v_0 := v.Args[0]
 30904  			if v_0.Op != OpPPC64ANDconst {
 30905  				break
 30906  			}
 30907  			c := v_0.AuxInt
 30908  			x := v_0.Args[0]
 30909  			b.Kind = BlockPPC64EQ
 30910  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30911  			v0.AuxInt = c
 30912  			v0.AddArg(x)
 30913  			b.SetControl(v0)
 30914  			b.Aux = nil
 30915  			return true
 30916  		}
 30917  		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 30918  		// cond:
 30919  		// result: (EQ (ANDCCconst [c] x) yes no)
 30920  		for {
 30921  			v := b.Control
 30922  			if v.Op != OpPPC64CMPWconst {
 30923  				break
 30924  			}
 30925  			if v.AuxInt != 0 {
 30926  				break
 30927  			}
 30928  			v_0 := v.Args[0]
 30929  			if v_0.Op != OpPPC64ANDconst {
 30930  				break
 30931  			}
 30932  			c := v_0.AuxInt
 30933  			x := v_0.Args[0]
 30934  			b.Kind = BlockPPC64EQ
 30935  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30936  			v0.AuxInt = c
 30937  			v0.AddArg(x)
 30938  			b.SetControl(v0)
 30939  			b.Aux = nil
 30940  			return true
 30941  		}
 30942  		// match: (EQ (FlagEQ) yes no)
 30943  		// cond:
 30944  		// result: (First nil yes no)
 30945  		for {
 30946  			v := b.Control
 30947  			if v.Op != OpPPC64FlagEQ {
 30948  				break
 30949  			}
 30950  			b.Kind = BlockFirst
 30951  			b.SetControl(nil)
 30952  			b.Aux = nil
 30953  			return true
 30954  		}
 30955  		// match: (EQ (FlagLT) yes no)
 30956  		// cond:
 30957  		// result: (First nil no yes)
 30958  		for {
 30959  			v := b.Control
 30960  			if v.Op != OpPPC64FlagLT {
 30961  				break
 30962  			}
 30963  			b.Kind = BlockFirst
 30964  			b.SetControl(nil)
 30965  			b.Aux = nil
 30966  			b.swapSuccessors()
 30967  			return true
 30968  		}
 30969  		// match: (EQ (FlagGT) yes no)
 30970  		// cond:
 30971  		// result: (First nil no yes)
 30972  		for {
 30973  			v := b.Control
 30974  			if v.Op != OpPPC64FlagGT {
 30975  				break
 30976  			}
 30977  			b.Kind = BlockFirst
 30978  			b.SetControl(nil)
 30979  			b.Aux = nil
 30980  			b.swapSuccessors()
 30981  			return true
 30982  		}
 30983  		// match: (EQ (InvertFlags cmp) yes no)
 30984  		// cond:
 30985  		// result: (EQ cmp yes no)
 30986  		for {
 30987  			v := b.Control
 30988  			if v.Op != OpPPC64InvertFlags {
 30989  				break
 30990  			}
 30991  			cmp := v.Args[0]
 30992  			b.Kind = BlockPPC64EQ
 30993  			b.SetControl(cmp)
 30994  			b.Aux = nil
 30995  			return true
 30996  		}
 30997  	case BlockPPC64GE:
 30998  		// match: (GE (FlagEQ) yes no)
 30999  		// cond:
 31000  		// result: (First nil yes no)
 31001  		for {
 31002  			v := b.Control
 31003  			if v.Op != OpPPC64FlagEQ {
 31004  				break
 31005  			}
 31006  			b.Kind = BlockFirst
 31007  			b.SetControl(nil)
 31008  			b.Aux = nil
 31009  			return true
 31010  		}
 31011  		// match: (GE (FlagLT) yes no)
 31012  		// cond:
 31013  		// result: (First nil no yes)
 31014  		for {
 31015  			v := b.Control
 31016  			if v.Op != OpPPC64FlagLT {
 31017  				break
 31018  			}
 31019  			b.Kind = BlockFirst
 31020  			b.SetControl(nil)
 31021  			b.Aux = nil
 31022  			b.swapSuccessors()
 31023  			return true
 31024  		}
 31025  		// match: (GE (FlagGT) yes no)
 31026  		// cond:
 31027  		// result: (First nil yes no)
 31028  		for {
 31029  			v := b.Control
 31030  			if v.Op != OpPPC64FlagGT {
 31031  				break
 31032  			}
 31033  			b.Kind = BlockFirst
 31034  			b.SetControl(nil)
 31035  			b.Aux = nil
 31036  			return true
 31037  		}
 31038  		// match: (GE (InvertFlags cmp) yes no)
 31039  		// cond:
 31040  		// result: (LE cmp yes no)
 31041  		for {
 31042  			v := b.Control
 31043  			if v.Op != OpPPC64InvertFlags {
 31044  				break
 31045  			}
 31046  			cmp := v.Args[0]
 31047  			b.Kind = BlockPPC64LE
 31048  			b.SetControl(cmp)
 31049  			b.Aux = nil
 31050  			return true
 31051  		}
 31052  	case BlockPPC64GT:
 31053  		// match: (GT (FlagEQ) yes no)
 31054  		// cond:
 31055  		// result: (First nil no yes)
 31056  		for {
 31057  			v := b.Control
 31058  			if v.Op != OpPPC64FlagEQ {
 31059  				break
 31060  			}
 31061  			b.Kind = BlockFirst
 31062  			b.SetControl(nil)
 31063  			b.Aux = nil
 31064  			b.swapSuccessors()
 31065  			return true
 31066  		}
 31067  		// match: (GT (FlagLT) yes no)
 31068  		// cond:
 31069  		// result: (First nil no yes)
 31070  		for {
 31071  			v := b.Control
 31072  			if v.Op != OpPPC64FlagLT {
 31073  				break
 31074  			}
 31075  			b.Kind = BlockFirst
 31076  			b.SetControl(nil)
 31077  			b.Aux = nil
 31078  			b.swapSuccessors()
 31079  			return true
 31080  		}
 31081  		// match: (GT (FlagGT) yes no)
 31082  		// cond:
 31083  		// result: (First nil yes no)
 31084  		for {
 31085  			v := b.Control
 31086  			if v.Op != OpPPC64FlagGT {
 31087  				break
 31088  			}
 31089  			b.Kind = BlockFirst
 31090  			b.SetControl(nil)
 31091  			b.Aux = nil
 31092  			return true
 31093  		}
 31094  		// match: (GT (InvertFlags cmp) yes no)
 31095  		// cond:
 31096  		// result: (LT cmp yes no)
 31097  		for {
 31098  			v := b.Control
 31099  			if v.Op != OpPPC64InvertFlags {
 31100  				break
 31101  			}
 31102  			cmp := v.Args[0]
 31103  			b.Kind = BlockPPC64LT
 31104  			b.SetControl(cmp)
 31105  			b.Aux = nil
 31106  			return true
 31107  		}
 31108  	case BlockIf:
 31109  		// match: (If (Equal cc) yes no)
 31110  		// cond:
 31111  		// result: (EQ cc yes no)
 31112  		for {
 31113  			v := b.Control
 31114  			if v.Op != OpPPC64Equal {
 31115  				break
 31116  			}
 31117  			cc := v.Args[0]
 31118  			b.Kind = BlockPPC64EQ
 31119  			b.SetControl(cc)
 31120  			b.Aux = nil
 31121  			return true
 31122  		}
 31123  		// match: (If (NotEqual cc) yes no)
 31124  		// cond:
 31125  		// result: (NE cc yes no)
 31126  		for {
 31127  			v := b.Control
 31128  			if v.Op != OpPPC64NotEqual {
 31129  				break
 31130  			}
 31131  			cc := v.Args[0]
 31132  			b.Kind = BlockPPC64NE
 31133  			b.SetControl(cc)
 31134  			b.Aux = nil
 31135  			return true
 31136  		}
 31137  		// match: (If (LessThan cc) yes no)
 31138  		// cond:
 31139  		// result: (LT cc yes no)
 31140  		for {
 31141  			v := b.Control
 31142  			if v.Op != OpPPC64LessThan {
 31143  				break
 31144  			}
 31145  			cc := v.Args[0]
 31146  			b.Kind = BlockPPC64LT
 31147  			b.SetControl(cc)
 31148  			b.Aux = nil
 31149  			return true
 31150  		}
 31151  		// match: (If (LessEqual cc) yes no)
 31152  		// cond:
 31153  		// result: (LE cc yes no)
 31154  		for {
 31155  			v := b.Control
 31156  			if v.Op != OpPPC64LessEqual {
 31157  				break
 31158  			}
 31159  			cc := v.Args[0]
 31160  			b.Kind = BlockPPC64LE
 31161  			b.SetControl(cc)
 31162  			b.Aux = nil
 31163  			return true
 31164  		}
 31165  		// match: (If (GreaterThan cc) yes no)
 31166  		// cond:
 31167  		// result: (GT cc yes no)
 31168  		for {
 31169  			v := b.Control
 31170  			if v.Op != OpPPC64GreaterThan {
 31171  				break
 31172  			}
 31173  			cc := v.Args[0]
 31174  			b.Kind = BlockPPC64GT
 31175  			b.SetControl(cc)
 31176  			b.Aux = nil
 31177  			return true
 31178  		}
 31179  		// match: (If (GreaterEqual cc) yes no)
 31180  		// cond:
 31181  		// result: (GE cc yes no)
 31182  		for {
 31183  			v := b.Control
 31184  			if v.Op != OpPPC64GreaterEqual {
 31185  				break
 31186  			}
 31187  			cc := v.Args[0]
 31188  			b.Kind = BlockPPC64GE
 31189  			b.SetControl(cc)
 31190  			b.Aux = nil
 31191  			return true
 31192  		}
 31193  		// match: (If (FLessThan cc) yes no)
 31194  		// cond:
 31195  		// result: (FLT cc yes no)
 31196  		for {
 31197  			v := b.Control
 31198  			if v.Op != OpPPC64FLessThan {
 31199  				break
 31200  			}
 31201  			cc := v.Args[0]
 31202  			b.Kind = BlockPPC64FLT
 31203  			b.SetControl(cc)
 31204  			b.Aux = nil
 31205  			return true
 31206  		}
 31207  		// match: (If (FLessEqual cc) yes no)
 31208  		// cond:
 31209  		// result: (FLE cc yes no)
 31210  		for {
 31211  			v := b.Control
 31212  			if v.Op != OpPPC64FLessEqual {
 31213  				break
 31214  			}
 31215  			cc := v.Args[0]
 31216  			b.Kind = BlockPPC64FLE
 31217  			b.SetControl(cc)
 31218  			b.Aux = nil
 31219  			return true
 31220  		}
 31221  		// match: (If (FGreaterThan cc) yes no)
 31222  		// cond:
 31223  		// result: (FGT cc yes no)
 31224  		for {
 31225  			v := b.Control
 31226  			if v.Op != OpPPC64FGreaterThan {
 31227  				break
 31228  			}
 31229  			cc := v.Args[0]
 31230  			b.Kind = BlockPPC64FGT
 31231  			b.SetControl(cc)
 31232  			b.Aux = nil
 31233  			return true
 31234  		}
 31235  		// match: (If (FGreaterEqual cc) yes no)
 31236  		// cond:
 31237  		// result: (FGE cc yes no)
 31238  		for {
 31239  			v := b.Control
 31240  			if v.Op != OpPPC64FGreaterEqual {
 31241  				break
 31242  			}
 31243  			cc := v.Args[0]
 31244  			b.Kind = BlockPPC64FGE
 31245  			b.SetControl(cc)
 31246  			b.Aux = nil
 31247  			return true
 31248  		}
 31249  		// match: (If cond yes no)
 31250  		// cond:
 31251  		// result: (NE (CMPWconst [0] cond) yes no)
 31252  		for {
 31253  			v := b.Control
 31254  			_ = v
 31255  			cond := b.Control
 31256  			b.Kind = BlockPPC64NE
 31257  			v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
 31258  			v0.AuxInt = 0
 31259  			v0.AddArg(cond)
 31260  			b.SetControl(v0)
 31261  			b.Aux = nil
 31262  			return true
 31263  		}
 31264  	case BlockPPC64LE:
 31265  		// match: (LE (FlagEQ) yes no)
 31266  		// cond:
 31267  		// result: (First nil yes no)
 31268  		for {
 31269  			v := b.Control
 31270  			if v.Op != OpPPC64FlagEQ {
 31271  				break
 31272  			}
 31273  			b.Kind = BlockFirst
 31274  			b.SetControl(nil)
 31275  			b.Aux = nil
 31276  			return true
 31277  		}
 31278  		// match: (LE (FlagLT) yes no)
 31279  		// cond:
 31280  		// result: (First nil yes no)
 31281  		for {
 31282  			v := b.Control
 31283  			if v.Op != OpPPC64FlagLT {
 31284  				break
 31285  			}
 31286  			b.Kind = BlockFirst
 31287  			b.SetControl(nil)
 31288  			b.Aux = nil
 31289  			return true
 31290  		}
 31291  		// match: (LE (FlagGT) yes no)
 31292  		// cond:
 31293  		// result: (First nil no yes)
 31294  		for {
 31295  			v := b.Control
 31296  			if v.Op != OpPPC64FlagGT {
 31297  				break
 31298  			}
 31299  			b.Kind = BlockFirst
 31300  			b.SetControl(nil)
 31301  			b.Aux = nil
 31302  			b.swapSuccessors()
 31303  			return true
 31304  		}
 31305  		// match: (LE (InvertFlags cmp) yes no)
 31306  		// cond:
 31307  		// result: (GE cmp yes no)
 31308  		for {
 31309  			v := b.Control
 31310  			if v.Op != OpPPC64InvertFlags {
 31311  				break
 31312  			}
 31313  			cmp := v.Args[0]
 31314  			b.Kind = BlockPPC64GE
 31315  			b.SetControl(cmp)
 31316  			b.Aux = nil
 31317  			return true
 31318  		}
 31319  	case BlockPPC64LT:
 31320  		// match: (LT (FlagEQ) yes no)
 31321  		// cond:
 31322  		// result: (First nil no yes)
 31323  		for {
 31324  			v := b.Control
 31325  			if v.Op != OpPPC64FlagEQ {
 31326  				break
 31327  			}
 31328  			b.Kind = BlockFirst
 31329  			b.SetControl(nil)
 31330  			b.Aux = nil
 31331  			b.swapSuccessors()
 31332  			return true
 31333  		}
 31334  		// match: (LT (FlagLT) yes no)
 31335  		// cond:
 31336  		// result: (First nil yes no)
 31337  		for {
 31338  			v := b.Control
 31339  			if v.Op != OpPPC64FlagLT {
 31340  				break
 31341  			}
 31342  			b.Kind = BlockFirst
 31343  			b.SetControl(nil)
 31344  			b.Aux = nil
 31345  			return true
 31346  		}
 31347  		// match: (LT (FlagGT) yes no)
 31348  		// cond:
 31349  		// result: (First nil no yes)
 31350  		for {
 31351  			v := b.Control
 31352  			if v.Op != OpPPC64FlagGT {
 31353  				break
 31354  			}
 31355  			b.Kind = BlockFirst
 31356  			b.SetControl(nil)
 31357  			b.Aux = nil
 31358  			b.swapSuccessors()
 31359  			return true
 31360  		}
 31361  		// match: (LT (InvertFlags cmp) yes no)
 31362  		// cond:
 31363  		// result: (GT cmp yes no)
 31364  		for {
 31365  			v := b.Control
 31366  			if v.Op != OpPPC64InvertFlags {
 31367  				break
 31368  			}
 31369  			cmp := v.Args[0]
 31370  			b.Kind = BlockPPC64GT
 31371  			b.SetControl(cmp)
 31372  			b.Aux = nil
 31373  			return true
 31374  		}
 31375  	case BlockPPC64NE:
 31376  		// match: (NE (CMPWconst [0] (Equal cc)) yes no)
 31377  		// cond:
 31378  		// result: (EQ cc yes no)
 31379  		for {
 31380  			v := b.Control
 31381  			if v.Op != OpPPC64CMPWconst {
 31382  				break
 31383  			}
 31384  			if v.AuxInt != 0 {
 31385  				break
 31386  			}
 31387  			v_0 := v.Args[0]
 31388  			if v_0.Op != OpPPC64Equal {
 31389  				break
 31390  			}
 31391  			cc := v_0.Args[0]
 31392  			b.Kind = BlockPPC64EQ
 31393  			b.SetControl(cc)
 31394  			b.Aux = nil
 31395  			return true
 31396  		}
 31397  		// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
 31398  		// cond:
 31399  		// result: (NE cc yes no)
 31400  		for {
 31401  			v := b.Control
 31402  			if v.Op != OpPPC64CMPWconst {
 31403  				break
 31404  			}
 31405  			if v.AuxInt != 0 {
 31406  				break
 31407  			}
 31408  			v_0 := v.Args[0]
 31409  			if v_0.Op != OpPPC64NotEqual {
 31410  				break
 31411  			}
 31412  			cc := v_0.Args[0]
 31413  			b.Kind = BlockPPC64NE
 31414  			b.SetControl(cc)
 31415  			b.Aux = nil
 31416  			return true
 31417  		}
 31418  		// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
 31419  		// cond:
 31420  		// result: (LT cc yes no)
 31421  		for {
 31422  			v := b.Control
 31423  			if v.Op != OpPPC64CMPWconst {
 31424  				break
 31425  			}
 31426  			if v.AuxInt != 0 {
 31427  				break
 31428  			}
 31429  			v_0 := v.Args[0]
 31430  			if v_0.Op != OpPPC64LessThan {
 31431  				break
 31432  			}
 31433  			cc := v_0.Args[0]
 31434  			b.Kind = BlockPPC64LT
 31435  			b.SetControl(cc)
 31436  			b.Aux = nil
 31437  			return true
 31438  		}
 31439  		// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
 31440  		// cond:
 31441  		// result: (LE cc yes no)
 31442  		for {
 31443  			v := b.Control
 31444  			if v.Op != OpPPC64CMPWconst {
 31445  				break
 31446  			}
 31447  			if v.AuxInt != 0 {
 31448  				break
 31449  			}
 31450  			v_0 := v.Args[0]
 31451  			if v_0.Op != OpPPC64LessEqual {
 31452  				break
 31453  			}
 31454  			cc := v_0.Args[0]
 31455  			b.Kind = BlockPPC64LE
 31456  			b.SetControl(cc)
 31457  			b.Aux = nil
 31458  			return true
 31459  		}
 31460  		// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
 31461  		// cond:
 31462  		// result: (GT cc yes no)
 31463  		for {
 31464  			v := b.Control
 31465  			if v.Op != OpPPC64CMPWconst {
 31466  				break
 31467  			}
 31468  			if v.AuxInt != 0 {
 31469  				break
 31470  			}
 31471  			v_0 := v.Args[0]
 31472  			if v_0.Op != OpPPC64GreaterThan {
 31473  				break
 31474  			}
 31475  			cc := v_0.Args[0]
 31476  			b.Kind = BlockPPC64GT
 31477  			b.SetControl(cc)
 31478  			b.Aux = nil
 31479  			return true
 31480  		}
 31481  		// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
 31482  		// cond:
 31483  		// result: (GE cc yes no)
 31484  		for {
 31485  			v := b.Control
 31486  			if v.Op != OpPPC64CMPWconst {
 31487  				break
 31488  			}
 31489  			if v.AuxInt != 0 {
 31490  				break
 31491  			}
 31492  			v_0 := v.Args[0]
 31493  			if v_0.Op != OpPPC64GreaterEqual {
 31494  				break
 31495  			}
 31496  			cc := v_0.Args[0]
 31497  			b.Kind = BlockPPC64GE
 31498  			b.SetControl(cc)
 31499  			b.Aux = nil
 31500  			return true
 31501  		}
 31502  		// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
 31503  		// cond:
 31504  		// result: (FLT cc yes no)
 31505  		for {
 31506  			v := b.Control
 31507  			if v.Op != OpPPC64CMPWconst {
 31508  				break
 31509  			}
 31510  			if v.AuxInt != 0 {
 31511  				break
 31512  			}
 31513  			v_0 := v.Args[0]
 31514  			if v_0.Op != OpPPC64FLessThan {
 31515  				break
 31516  			}
 31517  			cc := v_0.Args[0]
 31518  			b.Kind = BlockPPC64FLT
 31519  			b.SetControl(cc)
 31520  			b.Aux = nil
 31521  			return true
 31522  		}
 31523  		// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
 31524  		// cond:
 31525  		// result: (FLE cc yes no)
 31526  		for {
 31527  			v := b.Control
 31528  			if v.Op != OpPPC64CMPWconst {
 31529  				break
 31530  			}
 31531  			if v.AuxInt != 0 {
 31532  				break
 31533  			}
 31534  			v_0 := v.Args[0]
 31535  			if v_0.Op != OpPPC64FLessEqual {
 31536  				break
 31537  			}
 31538  			cc := v_0.Args[0]
 31539  			b.Kind = BlockPPC64FLE
 31540  			b.SetControl(cc)
 31541  			b.Aux = nil
 31542  			return true
 31543  		}
 31544  		// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
 31545  		// cond:
 31546  		// result: (FGT cc yes no)
 31547  		for {
 31548  			v := b.Control
 31549  			if v.Op != OpPPC64CMPWconst {
 31550  				break
 31551  			}
 31552  			if v.AuxInt != 0 {
 31553  				break
 31554  			}
 31555  			v_0 := v.Args[0]
 31556  			if v_0.Op != OpPPC64FGreaterThan {
 31557  				break
 31558  			}
 31559  			cc := v_0.Args[0]
 31560  			b.Kind = BlockPPC64FGT
 31561  			b.SetControl(cc)
 31562  			b.Aux = nil
 31563  			return true
 31564  		}
 31565  		// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
 31566  		// cond:
 31567  		// result: (FGE cc yes no)
 31568  		for {
 31569  			v := b.Control
 31570  			if v.Op != OpPPC64CMPWconst {
 31571  				break
 31572  			}
 31573  			if v.AuxInt != 0 {
 31574  				break
 31575  			}
 31576  			v_0 := v.Args[0]
 31577  			if v_0.Op != OpPPC64FGreaterEqual {
 31578  				break
 31579  			}
 31580  			cc := v_0.Args[0]
 31581  			b.Kind = BlockPPC64FGE
 31582  			b.SetControl(cc)
 31583  			b.Aux = nil
 31584  			return true
 31585  		}
 31586  		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 31587  		// cond:
 31588  		// result: (NE (ANDCCconst [c] x) yes no)
 31589  		for {
 31590  			v := b.Control
 31591  			if v.Op != OpPPC64CMPconst {
 31592  				break
 31593  			}
 31594  			if v.AuxInt != 0 {
 31595  				break
 31596  			}
 31597  			v_0 := v.Args[0]
 31598  			if v_0.Op != OpPPC64ANDconst {
 31599  				break
 31600  			}
 31601  			c := v_0.AuxInt
 31602  			x := v_0.Args[0]
 31603  			b.Kind = BlockPPC64NE
 31604  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31605  			v0.AuxInt = c
 31606  			v0.AddArg(x)
 31607  			b.SetControl(v0)
 31608  			b.Aux = nil
 31609  			return true
 31610  		}
 31611  		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 31612  		// cond:
 31613  		// result: (NE (ANDCCconst [c] x) yes no)
 31614  		for {
 31615  			v := b.Control
 31616  			if v.Op != OpPPC64CMPWconst {
 31617  				break
 31618  			}
 31619  			if v.AuxInt != 0 {
 31620  				break
 31621  			}
 31622  			v_0 := v.Args[0]
 31623  			if v_0.Op != OpPPC64ANDconst {
 31624  				break
 31625  			}
 31626  			c := v_0.AuxInt
 31627  			x := v_0.Args[0]
 31628  			b.Kind = BlockPPC64NE
 31629  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31630  			v0.AuxInt = c
 31631  			v0.AddArg(x)
 31632  			b.SetControl(v0)
 31633  			b.Aux = nil
 31634  			return true
 31635  		}
 31636  		// match: (NE (FlagEQ) yes no)
 31637  		// cond:
 31638  		// result: (First nil no yes)
 31639  		for {
 31640  			v := b.Control
 31641  			if v.Op != OpPPC64FlagEQ {
 31642  				break
 31643  			}
 31644  			b.Kind = BlockFirst
 31645  			b.SetControl(nil)
 31646  			b.Aux = nil
 31647  			b.swapSuccessors()
 31648  			return true
 31649  		}
 31650  		// match: (NE (FlagLT) yes no)
 31651  		// cond:
 31652  		// result: (First nil yes no)
 31653  		for {
 31654  			v := b.Control
 31655  			if v.Op != OpPPC64FlagLT {
 31656  				break
 31657  			}
 31658  			b.Kind = BlockFirst
 31659  			b.SetControl(nil)
 31660  			b.Aux = nil
 31661  			return true
 31662  		}
 31663  		// match: (NE (FlagGT) yes no)
 31664  		// cond:
 31665  		// result: (First nil yes no)
 31666  		for {
 31667  			v := b.Control
 31668  			if v.Op != OpPPC64FlagGT {
 31669  				break
 31670  			}
 31671  			b.Kind = BlockFirst
 31672  			b.SetControl(nil)
 31673  			b.Aux = nil
 31674  			return true
 31675  		}
 31676  		// match: (NE (InvertFlags cmp) yes no)
 31677  		// cond:
 31678  		// result: (NE cmp yes no)
 31679  		for {
 31680  			v := b.Control
 31681  			if v.Op != OpPPC64InvertFlags {
 31682  				break
 31683  			}
 31684  			cmp := v.Args[0]
 31685  			b.Kind = BlockPPC64NE
 31686  			b.SetControl(cmp)
 31687  			b.Aux = nil
 31688  			return true
 31689  		}
 31690  	}
 31691  	return false
 31692  }