github.com/huandu/go@v0.0.0-20151114150818-04e615e41150/src/cmd/compile/internal/x86/prog.go (about) 1 // Copyright 2013 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 package x86 6 7 import ( 8 "cmd/compile/internal/gc" 9 "cmd/internal/obj" 10 "cmd/internal/obj/x86" 11 ) 12 13 var ( 14 AX = RtoB(x86.REG_AX) 15 BX = RtoB(x86.REG_BX) 16 CX = RtoB(x86.REG_CX) 17 DX = RtoB(x86.REG_DX) 18 DI = RtoB(x86.REG_DI) 19 SI = RtoB(x86.REG_SI) 20 LeftRdwr uint32 = gc.LeftRead | gc.LeftWrite 21 RightRdwr uint32 = gc.RightRead | gc.RightWrite 22 ) 23 24 // This table gives the basic information about instruction 25 // generated by the compiler and processed in the optimizer. 26 // See opt.h for bit definitions. 27 // 28 // Instructions not generated need not be listed. 29 // As an exception to that rule, we typically write down all the 30 // size variants of an operation even if we just use a subset. 31 // 32 // The table is formatted for 8-space tabs. 33 var progtable = [x86.ALAST]obj.ProgInfo{ 34 obj.ATYPE: {gc.Pseudo | gc.Skip, 0, 0, 0}, 35 obj.ATEXT: {gc.Pseudo, 0, 0, 0}, 36 obj.AFUNCDATA: {gc.Pseudo, 0, 0, 0}, 37 obj.APCDATA: {gc.Pseudo, 0, 0, 0}, 38 obj.AUNDEF: {gc.Break, 0, 0, 0}, 39 obj.AUSEFIELD: {gc.OK, 0, 0, 0}, 40 obj.ACHECKNIL: {gc.LeftRead, 0, 0, 0}, 41 obj.AVARDEF: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 42 obj.AVARKILL: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 43 44 // NOP is an internal no-op that also stands 45 // for USED and SET annotations, not the Intel opcode. 46 obj.ANOP: {gc.LeftRead | gc.RightWrite, 0, 0, 0}, 47 x86.AADCL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 48 x86.AADCW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 49 x86.AADDB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 50 x86.AADDL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 51 x86.AADDW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 52 x86.AADDSD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 53 x86.AADDSS: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 54 x86.AANDB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 55 x86.AANDL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 56 x86.AANDW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 57 obj.ACALL: {gc.RightAddr | gc.Call | gc.KillCarry, 0, 0, 0}, 58 x86.ACDQ: {gc.OK, AX, AX | DX, 0}, 59 x86.ACWD: {gc.OK, AX, AX | DX, 0}, 60 x86.ACLD: {gc.OK, 0, 0, 0}, 61 x86.ASTD: {gc.OK, 0, 0, 0}, 62 x86.ACMPB: {gc.SizeB | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 63 x86.ACMPL: {gc.SizeL | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 64 x86.ACMPW: {gc.SizeW | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 65 x86.ACOMISD: {gc.SizeD | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 66 x86.ACOMISS: {gc.SizeF | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 67 x86.ACVTSD2SL: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 68 x86.ACVTSD2SS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 69 x86.ACVTSL2SD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 70 x86.ACVTSL2SS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 71 x86.ACVTSS2SD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 72 x86.ACVTSS2SL: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 73 x86.ACVTTSD2SL: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 74 x86.ACVTTSS2SL: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 75 x86.ADECB: {gc.SizeB | RightRdwr, 0, 0, 0}, 76 x86.ADECL: {gc.SizeL | RightRdwr, 0, 0, 0}, 77 x86.ADECW: {gc.SizeW | RightRdwr, 0, 0, 0}, 78 x86.ADIVB: {gc.SizeB | gc.LeftRead | gc.SetCarry, AX, AX, 0}, 79 x86.ADIVL: {gc.SizeL | gc.LeftRead | gc.SetCarry, AX | DX, AX | DX, 0}, 80 x86.ADIVW: {gc.SizeW | gc.LeftRead | gc.SetCarry, AX | DX, AX | DX, 0}, 81 x86.ADIVSD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 82 x86.ADIVSS: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 83 x86.AFLDCW: {gc.SizeW | gc.LeftAddr, 0, 0, 0}, 84 x86.AFSTCW: {gc.SizeW | gc.RightAddr, 0, 0, 0}, 85 x86.AFSTSW: {gc.SizeW | gc.RightAddr | gc.RightWrite, 0, 0, 0}, 86 x86.AFADDD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 87 x86.AFADDDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 88 x86.AFADDF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 89 x86.AFCOMD: {gc.SizeD | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 90 x86.AFCOMDP: {gc.SizeD | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 91 x86.AFCOMDPP: {gc.SizeD | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 92 x86.AFCOMF: {gc.SizeF | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 93 x86.AFCOMFP: {gc.SizeF | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 94 x86.AFUCOMIP: {gc.SizeF | gc.LeftAddr | gc.RightRead, 0, 0, 0}, 95 x86.AFCHS: {gc.SizeD | RightRdwr, 0, 0, 0}, // also SizeF 96 97 x86.AFDIVDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 98 x86.AFDIVF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 99 x86.AFDIVD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 100 x86.AFDIVRDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 101 x86.AFDIVRF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 102 x86.AFDIVRD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 103 x86.AFXCHD: {gc.SizeD | LeftRdwr | RightRdwr, 0, 0, 0}, 104 x86.AFSUBD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 105 x86.AFSUBDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 106 x86.AFSUBF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 107 x86.AFSUBRD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 108 x86.AFSUBRDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 109 x86.AFSUBRF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 110 x86.AFMOVD: {gc.SizeD | gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 111 x86.AFMOVF: {gc.SizeF | gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 112 x86.AFMOVL: {gc.SizeL | gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 113 x86.AFMOVW: {gc.SizeW | gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 114 x86.AFMOVV: {gc.SizeQ | gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 115 116 // These instructions are marked as RightAddr 117 // so that the register optimizer does not try to replace the 118 // memory references with integer register references. 119 // But they do not use the previous value at the address, so 120 // we also mark them RightWrite. 121 x86.AFMOVDP: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.RightAddr, 0, 0, 0}, 122 x86.AFMOVFP: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.RightAddr, 0, 0, 0}, 123 x86.AFMOVLP: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.RightAddr, 0, 0, 0}, 124 x86.AFMOVWP: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.RightAddr, 0, 0, 0}, 125 x86.AFMOVVP: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.RightAddr, 0, 0, 0}, 126 x86.AFMULD: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 127 x86.AFMULDP: {gc.SizeD | gc.LeftAddr | RightRdwr, 0, 0, 0}, 128 x86.AFMULF: {gc.SizeF | gc.LeftAddr | RightRdwr, 0, 0, 0}, 129 x86.AIDIVB: {gc.SizeB | gc.LeftRead | gc.SetCarry, AX, AX, 0}, 130 x86.AIDIVL: {gc.SizeL | gc.LeftRead | gc.SetCarry, AX | DX, AX | DX, 0}, 131 x86.AIDIVW: {gc.SizeW | gc.LeftRead | gc.SetCarry, AX | DX, AX | DX, 0}, 132 x86.AIMULB: {gc.SizeB | gc.LeftRead | gc.SetCarry, AX, AX, 0}, 133 x86.AIMULL: {gc.SizeL | gc.LeftRead | gc.ImulAXDX | gc.SetCarry, 0, 0, 0}, 134 x86.AIMULW: {gc.SizeW | gc.LeftRead | gc.ImulAXDX | gc.SetCarry, 0, 0, 0}, 135 x86.AINCB: {gc.SizeB | RightRdwr, 0, 0, 0}, 136 x86.AINCL: {gc.SizeL | RightRdwr, 0, 0, 0}, 137 x86.AINCW: {gc.SizeW | RightRdwr, 0, 0, 0}, 138 x86.AJCC: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 139 x86.AJCS: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 140 x86.AJEQ: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 141 x86.AJGE: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 142 x86.AJGT: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 143 x86.AJHI: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 144 x86.AJLE: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 145 x86.AJLS: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 146 x86.AJLT: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 147 x86.AJMI: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 148 x86.AJNE: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 149 x86.AJOC: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 150 x86.AJOS: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 151 x86.AJPC: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 152 x86.AJPL: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 153 x86.AJPS: {gc.Cjmp | gc.UseCarry, 0, 0, 0}, 154 obj.AJMP: {gc.Jump | gc.Break | gc.KillCarry, 0, 0, 0}, 155 x86.ALEAL: {gc.LeftAddr | gc.RightWrite, 0, 0, 0}, 156 x86.AMOVBLSX: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 157 x86.AMOVBLZX: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 158 x86.AMOVBWSX: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 159 x86.AMOVBWZX: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 160 x86.AMOVWLSX: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 161 x86.AMOVWLZX: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 162 x86.AMOVB: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 163 x86.AMOVL: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 164 x86.AMOVW: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 165 x86.AMOVSB: {gc.OK, DI | SI, DI | SI, 0}, 166 x86.AMOVSL: {gc.OK, DI | SI, DI | SI, 0}, 167 x86.AMOVSW: {gc.OK, DI | SI, DI | SI, 0}, 168 obj.ADUFFCOPY: {gc.OK, DI | SI, DI | SI | CX, 0}, 169 x86.AMOVSD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 170 x86.AMOVSS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 171 172 // We use MOVAPD as a faster synonym for MOVSD. 173 x86.AMOVAPD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 174 x86.AMULB: {gc.SizeB | gc.LeftRead | gc.SetCarry, AX, AX, 0}, 175 x86.AMULL: {gc.SizeL | gc.LeftRead | gc.SetCarry, AX, AX | DX, 0}, 176 x86.AMULW: {gc.SizeW | gc.LeftRead | gc.SetCarry, AX, AX | DX, 0}, 177 x86.AMULSD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 178 x86.AMULSS: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 179 x86.ANEGB: {gc.SizeB | RightRdwr | gc.SetCarry, 0, 0, 0}, 180 x86.ANEGL: {gc.SizeL | RightRdwr | gc.SetCarry, 0, 0, 0}, 181 x86.ANEGW: {gc.SizeW | RightRdwr | gc.SetCarry, 0, 0, 0}, 182 x86.ANOTB: {gc.SizeB | RightRdwr, 0, 0, 0}, 183 x86.ANOTL: {gc.SizeL | RightRdwr, 0, 0, 0}, 184 x86.ANOTW: {gc.SizeW | RightRdwr, 0, 0, 0}, 185 x86.AORB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 186 x86.AORL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 187 x86.AORW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 188 x86.APOPL: {gc.SizeL | gc.RightWrite, 0, 0, 0}, 189 x86.APUSHL: {gc.SizeL | gc.LeftRead, 0, 0, 0}, 190 x86.ARCLB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 191 x86.ARCLL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 192 x86.ARCLW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 193 x86.ARCRB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 194 x86.ARCRL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 195 x86.ARCRW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 196 x86.AREP: {gc.OK, CX, CX, 0}, 197 x86.AREPN: {gc.OK, CX, CX, 0}, 198 obj.ARET: {gc.Break | gc.KillCarry, 0, 0, 0}, 199 x86.AROLB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 200 x86.AROLL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 201 x86.AROLW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 202 x86.ARORB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 203 x86.ARORL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 204 x86.ARORW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 205 x86.ASAHF: {gc.OK, AX, AX, 0}, 206 x86.ASALB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 207 x86.ASALL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 208 x86.ASALW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 209 x86.ASARB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 210 x86.ASARL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 211 x86.ASARW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 212 x86.ASBBB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 213 x86.ASBBL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 214 x86.ASBBW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry | gc.UseCarry, 0, 0, 0}, 215 x86.ASETCC: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 216 x86.ASETCS: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 217 x86.ASETEQ: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 218 x86.ASETGE: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 219 x86.ASETGT: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 220 x86.ASETHI: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 221 x86.ASETLE: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 222 x86.ASETLS: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 223 x86.ASETLT: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 224 x86.ASETMI: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 225 x86.ASETNE: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 226 x86.ASETOC: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 227 x86.ASETOS: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 228 x86.ASETPC: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 229 x86.ASETPL: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 230 x86.ASETPS: {gc.SizeB | RightRdwr | gc.UseCarry, 0, 0, 0}, 231 x86.ASHLB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 232 x86.ASHLL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 233 x86.ASHLW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 234 x86.ASHRB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 235 x86.ASHRL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 236 x86.ASHRW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.ShiftCX | gc.SetCarry, 0, 0, 0}, 237 x86.ASTOSB: {gc.OK, AX | DI, DI, 0}, 238 x86.ASTOSL: {gc.OK, AX | DI, DI, 0}, 239 x86.ASTOSW: {gc.OK, AX | DI, DI, 0}, 240 obj.ADUFFZERO: {gc.OK, AX | DI, DI, 0}, 241 x86.ASUBB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 242 x86.ASUBL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 243 x86.ASUBW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 244 x86.ASUBSD: {gc.SizeD | gc.LeftRead | RightRdwr, 0, 0, 0}, 245 x86.ASUBSS: {gc.SizeF | gc.LeftRead | RightRdwr, 0, 0, 0}, 246 x86.ATESTB: {gc.SizeB | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 247 x86.ATESTL: {gc.SizeL | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 248 x86.ATESTW: {gc.SizeW | gc.LeftRead | gc.RightRead | gc.SetCarry, 0, 0, 0}, 249 x86.AUCOMISD: {gc.SizeD | gc.LeftRead | gc.RightRead, 0, 0, 0}, 250 x86.AUCOMISS: {gc.SizeF | gc.LeftRead | gc.RightRead, 0, 0, 0}, 251 x86.AXCHGB: {gc.SizeB | LeftRdwr | RightRdwr, 0, 0, 0}, 252 x86.AXCHGL: {gc.SizeL | LeftRdwr | RightRdwr, 0, 0, 0}, 253 x86.AXCHGW: {gc.SizeW | LeftRdwr | RightRdwr, 0, 0, 0}, 254 x86.AXORB: {gc.SizeB | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 255 x86.AXORL: {gc.SizeL | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 256 x86.AXORW: {gc.SizeW | gc.LeftRead | RightRdwr | gc.SetCarry, 0, 0, 0}, 257 } 258 259 func proginfo(p *obj.Prog) { 260 info := &p.Info 261 *info = progtable[p.As] 262 if info.Flags == 0 { 263 gc.Fatal("unknown instruction %v", p) 264 } 265 266 if (info.Flags&gc.ShiftCX != 0) && p.From.Type != obj.TYPE_CONST { 267 info.Reguse |= CX 268 } 269 270 if info.Flags&gc.ImulAXDX != 0 { 271 if p.To.Type == obj.TYPE_NONE { 272 info.Reguse |= AX 273 info.Regset |= AX | DX 274 } else { 275 info.Flags |= RightRdwr 276 } 277 } 278 279 // Addressing makes some registers used. 280 if p.From.Type == obj.TYPE_MEM && p.From.Name == obj.NAME_NONE { 281 info.Regindex |= RtoB(int(p.From.Reg)) 282 } 283 if p.From.Index != x86.REG_NONE { 284 info.Regindex |= RtoB(int(p.From.Index)) 285 } 286 if p.To.Type == obj.TYPE_MEM && p.To.Name == obj.NAME_NONE { 287 info.Regindex |= RtoB(int(p.To.Reg)) 288 } 289 if p.To.Index != x86.REG_NONE { 290 info.Regindex |= RtoB(int(p.To.Index)) 291 } 292 }