github.com/jlmucb/cloudproxy@v0.0.0-20170830161738-b5aa0b619bc4/cpvmm/vmm/bootstrap/msr.h (about)

     1  /*-
     2   * Copyright (c) 1993 The Regents of the University of California.
     3   * All rights reserved.
     4   *
     5   * Redistribution and use in source and binary forms, with or without
     6   * modification, are permitted provided that the following conditions
     7   * are met:
     8   * 1. Redistributions of source code must retain the above copyright
     9   *    notice, this list of conditions and the following disclaimer.
    10   * 2. Redistributions in binary form must reproduce the above copyright
    11   *    notice, this list of conditions and the following disclaimer in the
    12   *    documentation and/or other materials provided with the distribution.
    13   * 4. Neither the name of the University nor the names of its contributors
    14   *    may be used to endorse or promote products derived from this software
    15   *    without specific prior written permission.
    16   *
    17   * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
    18   * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    19   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    20   * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
    21   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    22   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    23   * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    24   * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    25   * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    26   * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    27   * SUCH DAMAGE.
    28   *
    29   * Portions copyright (c) 2010-2011, Intel Corporation
    30   */
    31  
    32  
    33  #ifndef __MSR_H__
    34  #define __MSR_H__
    35  
    36  #ifndef __ASSEMBLY__
    37  
    38  /* from:
    39   * $FreeBSD: src/sys/i386/include/cpufunc.h,v 1.155.2.3 2009/11/25 01:52:36 kmacy Exp $
    40   */
    41  
    42  static inline uint64_t rdmsr(uint32_t msr)
    43  {
    44      uint64_t rv;
    45  
    46      __asm__ __volatile__ ("rdmsr" : "=A" (rv) : "c" (msr));
    47      return (rv);
    48  }
    49  
    50  static inline void wrmsr(uint32_t msr, uint64_t newval)
    51  {
    52      __asm__ __volatile__ ("wrmsr" : : "A" (newval), "c" (msr));
    53  }
    54  
    55  #endif /* !__ASSEMBLY__ */
    56  
    57  /*
    58   * from: @(#)specialreg.h     7.1 (Berkeley) 5/9/91
    59   * $FreeBSD: src/sys/i386/include/specialreg.h,v 1.53.2.1.2.2 2009/11/06 17:09:04 attilio Exp $
    60   */
    61  
    62  #define MSR_IA32_PLATFORM_ID                   0x017
    63  #define MSR_APICBASE                           0x01b
    64  #define MSR_IA32_FEATURE_CONTROL               0x03a
    65  #define MSR_IA32_SMM_MONITOR_CTL               0x09b
    66  #define MSR_MTRRcap                            0x0fe
    67  #define MSR_MCG_CAP                            0x179
    68  #define MSR_MCG_STATUS                         0x17a
    69  #define MSR_IA32_MISC_ENABLE                   0x1a0
    70  #define MSR_IA32_MISC_ENABLE_MONITOR_FSM       (1<<18)
    71  #define MSR_MTRRdefType                        0x2ff
    72  #define MSR_MC0_STATUS                         0x401
    73  #define MSR_IA32_VMX_BASIC_MSR                 0x480
    74  #define MSR_IA32_VMX_PINBASED_CTLS_MSR         0x481
    75  #define MSR_IA32_VMX_PROCBASED_CTLS_MSR        0x482
    76  #define MSR_IA32_VMX_EXIT_CTLS_MSR             0x483
    77  #define MSR_IA32_VMX_ENTRY_CTLS_MSR            0x484
    78  
    79  /*
    80   * Constants related to MSR's.
    81   */
    82  #define APICBASE_BSP                                  0x00000100
    83  
    84  #define MSR_IA32_SMM_MONITOR_CTL_VALID                1
    85  #define MSR_IA32_SMM_MONITOR_CTL_MSEG_BASE(x)         (x>>12)
    86  
    87  /* MSRs & bits used for VMX enabling */
    88  #define IA32_FEATURE_CONTROL_MSR_LOCK                 0x1
    89  #define IA32_FEATURE_CONTROL_MSR_ENABLE_VMX_IN_SMX    0x2
    90  #define IA32_FEATURE_CONTROL_MSR_SENTER_PARAM_CTL     0x7f00
    91  #define IA32_FEATURE_CONTROL_MSR_ENABLE_SENTER        0x8000
    92  
    93  /* AMD64 MSR's */
    94  #define MSR_EFER        0xc0000080      /* extended features */
    95  
    96  /* EFER bits */
    97  #define _EFER_LME     8               /* Long mode enable */
    98  
    99  #define MTRR_TYPE_UNCACHABLE     0
   100  #define MTRR_TYPE_WRTHROUGH      4
   101  #define MTRR_TYPE_WRBACK         6
   102  
   103  
   104  #endif /* __MSR_H__ */