github.com/jlmucb/cloudproxy@v0.0.0-20170830161738-b5aa0b619bc4/cpvmm/vmm/vmexit/vmexit_dtr_tr_access.c (about)

     1  /*
     2   * Copyright (c) 2013 Intel Corporation
     3   *
     4   * Licensed under the Apache License, Version 2.0 (the "License");
     5   * you may not use this file except in compliance with the License.
     6   * You may obtain a copy of the License at
     7   *     http://www.apache.org/licenses/LICENSE-2.0
     8   * Unless required by applicable law or agreed to in writing, software
     9   * distributed under the License is distributed on an "AS IS" BASIS,
    10   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    11   * See the License for the specific language governing permissions and
    12   * limitations under the License.
    13   */
    14  
    15  #include "vmm_defs.h"
    16  #include "guest_cpu.h"
    17  #include "vmm_dbg.h"
    18  #include "vmexit_dtr_tr.h"
    19  #include "ia32_defs.h"
    20  #include "host_memory_manager_api.h"
    21  #include "vmm_callback.h"
    22  #include "file_codes.h"
    23  #define VMM_DEADLOOP()          VMM_DEADLOOP_LOG(VMEXIT_DTR_TR_ACCESS_C)
    24  #define VMM_ASSERT(__condition) VMM_ASSERT_LOG(VMEXIT_DTR_TR_ACCESS_C, __condition)
    25  #ifdef JLMDEBUG
    26  #include "jlmdebug.h"
    27  #endif
    28  
    29  #define _MTF_SINGLE_STEP_
    30  
    31  // Utils
    32  
    33  #ifdef DEBUG
    34  // Disabling unreferenced formal parameter warnings
    35  #pragma warning ( push )
    36  #pragma warning ( disable : 4100 )
    37  void print_instruction_info(IA32_VMX_VMCS_VM_EXIT_INFO_INSTRUCTION_INFO *instruction_info)
    38  {
    39      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits                      = %08X\n\n", instruction_info->Bits);
    40      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Scaling              = %08X\n", instruction_info->Bits.Scaling);
    41      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Reserved_0           = %08X\n", instruction_info->Bits.Reserved_0);
    42      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Register1            = %08X\n", instruction_info->Bits.Register1);
    43      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.AddressSize          = %08X\n", instruction_info->Bits.AddressSize);
    44      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.RegisterMemory       = %08X\n", instruction_info->Bits.RegisterMemory);
    45      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.OperandSize           = %08X\n", instruction_info->Bits.OperandSize);
    46      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Reserved_2           = %08X\n", instruction_info->Bits.Reserved_2);
    47      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Segment              = %08X\n", instruction_info->Bits.Segment);
    48      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.IndexRegister        = %08X\n", instruction_info->Bits.IndexRegister);
    49      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.IndexRegisterInvalid = %08X\n", instruction_info->Bits.IndexRegisterInvalid);
    50      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.BaseRegister         = %08X\n", instruction_info->Bits.BaseRegister);
    51      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.BaseRegisterInvalid  = %08X\n", instruction_info->Bits.BaseRegisterInvalid);
    52      VMM_LOG(mask_anonymous, level_trace,"instruction_info.Bits.Register2            = %08X\n", instruction_info->Bits.Register2);
    53  }
    54  
    55  void print_guest_gprs(GUEST_CPU_HANDLE gcpu)
    56  {
    57      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RCX = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RCX));
    58      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RDX = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RDX));
    59      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RBX = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RBX));
    60      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RBP = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RBP));
    61      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RSI = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RSI));
    62      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_RDI = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_RDI));
    63      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R8  = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R8));
    64      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R9  = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R9));
    65      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R10 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R10));
    66      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R11 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R11));
    67      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R12 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R12));
    68      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R13 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R13));
    69      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R14 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R14));
    70      VMM_LOG(mask_anonymous, level_trace,"IA32_REG_R15 = %08X\n", gcpu_get_gp_reg(gcpu, IA32_REG_R15));
    71  }
    72  #pragma warning ( pop )
    73  #endif
    74  
    75  // VMEXIT Handlers
    76  
    77  VMEXIT_HANDLING_STATUS vmexit_dr_access(GUEST_CPU_HANDLE gcpu)
    78  {
    79      VMCS_OBJECT* vmcs = gcpu_get_vmcs(gcpu);
    80      REPORT_CR_DR_LOAD_ACCESS_DATA dr_load_access_data;
    81  
    82      dr_load_access_data.qualification = vmcs_read(vmcs, VMCS_EXIT_INFO_QUALIFICATION);
    83  
    84      if (!report_uvmm_event(UVMM_EVENT_DR_LOAD_ACCESS, (VMM_IDENTIFICATION_DATA)gcpu, (const GUEST_VCPU*)guest_vcpu(gcpu), (void *)&dr_load_access_data)) {
    85          VMM_LOG(mask_anonymous, level_trace, "report_dr_load_access failed\n");
    86      }
    87      return VMEXIT_HANDLED;
    88  }
    89  
    90  VMEXIT_HANDLING_STATUS vmexit_gdtr_idtr_access(GUEST_CPU_HANDLE gcpu)
    91  {
    92      VMCS_OBJECT* vmcs = gcpu_get_vmcs(gcpu);
    93      REPORT_DTR_ACCESS_DATA gdtr_idtr_access_data;
    94  
    95      gdtr_idtr_access_data.qualification = vmcs_read(vmcs, VMCS_EXIT_INFO_QUALIFICATION);
    96      gdtr_idtr_access_data.instruction_info = (UINT32) vmcs_read(vmcs, VMCS_EXIT_INFO_INSTRUCTION_INFO);
    97  
    98      if (!report_uvmm_event(UVMM_EVENT_GDTR_IDTR_ACCESS, (VMM_IDENTIFICATION_DATA)gcpu, (const GUEST_VCPU*)guest_vcpu(gcpu), (void *)&gdtr_idtr_access_data)) {
    99          VMM_LOG(mask_anonymous, level_trace, "report_gdtr_idtr_access failed\n");
   100      }
   101      return VMEXIT_HANDLED;
   102  }
   103  
   104  VMEXIT_HANDLING_STATUS vmexit_ldtr_tr_access(GUEST_CPU_HANDLE gcpu)
   105  {
   106      VMCS_OBJECT* vmcs = gcpu_get_vmcs(gcpu);
   107      REPORT_DTR_ACCESS_DATA ldtr_load_access_data;
   108  
   109      ldtr_load_access_data.qualification= vmcs_read(vmcs, VMCS_EXIT_INFO_QUALIFICATION);
   110      ldtr_load_access_data.instruction_info = (UINT32) vmcs_read(vmcs, VMCS_EXIT_INFO_INSTRUCTION_INFO);
   111  
   112      if (!report_uvmm_event(UVMM_EVENT_LDTR_LOAD_ACCESS, (VMM_IDENTIFICATION_DATA)gcpu, (const GUEST_VCPU*)guest_vcpu(gcpu), (void *)&ldtr_load_access_data)) {
   113          VMM_LOG(mask_anonymous, level_trace, "report_ldtr_load_access failed\n");
   114      }
   115  
   116      return VMEXIT_HANDLED;
   117  }