github.com/karrick/go@v0.0.0-20170817181416-d5b0ec858b37/src/cmd/internal/obj/x86/a.out.go (about) 1 // Inferno utils/6c/6.out.h 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/utils/6c/6.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package x86 32 33 import "cmd/internal/obj" 34 35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p x86 36 37 const ( 38 /* mark flags */ 39 DONE = 1 << iota 40 PRESERVEFLAGS // not allowed to clobber flags 41 ) 42 43 /* 44 * amd64 45 */ 46 const ( 47 AAAA = obj.ABaseAMD64 + obj.A_ARCHSPECIFIC + iota 48 AAAD 49 AAAM 50 AAAS 51 AADCB 52 AADCL 53 AADCW 54 AADDB 55 AADDL 56 AADDW 57 AADJSP 58 AANDB 59 AANDL 60 AANDW 61 AARPL 62 ABOUNDL 63 ABOUNDW 64 ABSFL 65 ABSFW 66 ABSRL 67 ABSRW 68 ABTL 69 ABTW 70 ABTCL 71 ABTCW 72 ABTRL 73 ABTRW 74 ABTSL 75 ABTSW 76 ABYTE 77 ACLC 78 ACLD 79 ACLI 80 ACLTS 81 ACMC 82 ACMPB 83 ACMPL 84 ACMPW 85 ACMPSB 86 ACMPSL 87 ACMPSW 88 ADAA 89 ADAS 90 ADECB 91 ADECL 92 ADECQ 93 ADECW 94 ADIVB 95 ADIVL 96 ADIVW 97 AENTER 98 AHADDPD 99 AHADDPS 100 AHLT 101 AHSUBPD 102 AHSUBPS 103 AIDIVB 104 AIDIVL 105 AIDIVW 106 AIMULB 107 AIMULL 108 AIMULW 109 AINB 110 AINL 111 AINW 112 AINCB 113 AINCL 114 AINCQ 115 AINCW 116 AINSB 117 AINSL 118 AINSW 119 AINT 120 AINTO 121 AIRETL 122 AIRETW 123 AJCC // >= unsigned 124 AJCS // < unsigned 125 AJCXZL 126 AJEQ // == (zero) 127 AJGE // >= signed 128 AJGT // > signed 129 AJHI // > unsigned 130 AJLE // <= signed 131 AJLS // <= unsigned 132 AJLT // < signed 133 AJMI // sign bit set (negative) 134 AJNE // != (nonzero) 135 AJOC // overflow clear 136 AJOS // overflow set 137 AJPC // parity clear 138 AJPL // sign bit clear (positive) 139 AJPS // parity set 140 ALAHF 141 ALARL 142 ALARW 143 ALEAL 144 ALEAW 145 ALEAVEL 146 ALEAVEW 147 ALOCK 148 ALODSB 149 ALODSL 150 ALODSW 151 ALONG 152 ALOOP 153 ALOOPEQ 154 ALOOPNE 155 ALSLL 156 ALSLW 157 AMOVB 158 AMOVL 159 AMOVW 160 AMOVBLSX 161 AMOVBLZX 162 AMOVBQSX 163 AMOVBQZX 164 AMOVBWSX 165 AMOVBWZX 166 AMOVWLSX 167 AMOVWLZX 168 AMOVWQSX 169 AMOVWQZX 170 AMOVSB 171 AMOVSL 172 AMOVSW 173 AMULB 174 AMULL 175 AMULW 176 ANEGB 177 ANEGL 178 ANEGW 179 ANOTB 180 ANOTL 181 ANOTW 182 AORB 183 AORL 184 AORW 185 AOUTB 186 AOUTL 187 AOUTW 188 AOUTSB 189 AOUTSL 190 AOUTSW 191 APAUSE 192 APOPAL 193 APOPAW 194 APOPCNTW 195 APOPCNTL 196 APOPCNTQ 197 APOPFL 198 APOPFW 199 APOPL 200 APOPW 201 APUSHAL 202 APUSHAW 203 APUSHFL 204 APUSHFW 205 APUSHL 206 APUSHW 207 ARCLB 208 ARCLL 209 ARCLW 210 ARCRB 211 ARCRL 212 ARCRW 213 AREP 214 AREPN 215 AROLB 216 AROLL 217 AROLW 218 ARORB 219 ARORL 220 ARORW 221 ASAHF 222 ASALB 223 ASALL 224 ASALW 225 ASARB 226 ASARL 227 ASARW 228 ASBBB 229 ASBBL 230 ASBBW 231 ASCASB 232 ASCASL 233 ASCASW 234 ASETCC 235 ASETCS 236 ASETEQ 237 ASETGE 238 ASETGT 239 ASETHI 240 ASETLE 241 ASETLS 242 ASETLT 243 ASETMI 244 ASETNE 245 ASETOC 246 ASETOS 247 ASETPC 248 ASETPL 249 ASETPS 250 ACDQ 251 ACWD 252 ASHLB 253 ASHLL 254 ASHLW 255 ASHRB 256 ASHRL 257 ASHRW 258 ASTC 259 ASTD 260 ASTI 261 ASTOSB 262 ASTOSL 263 ASTOSW 264 ASUBB 265 ASUBL 266 ASUBW 267 ASYSCALL 268 ATESTB 269 ATESTL 270 ATESTW 271 AVERR 272 AVERW 273 AWAIT 274 AWORD 275 AXCHGB 276 AXCHGL 277 AXCHGW 278 AXLAT 279 AXORB 280 AXORL 281 AXORW 282 283 AFMOVB 284 AFMOVBP 285 AFMOVD 286 AFMOVDP 287 AFMOVF 288 AFMOVFP 289 AFMOVL 290 AFMOVLP 291 AFMOVV 292 AFMOVVP 293 AFMOVW 294 AFMOVWP 295 AFMOVX 296 AFMOVXP 297 298 AFCOMD 299 AFCOMDP 300 AFCOMDPP 301 AFCOMF 302 AFCOMFP 303 AFCOML 304 AFCOMLP 305 AFCOMW 306 AFCOMWP 307 AFUCOM 308 AFUCOMP 309 AFUCOMPP 310 311 AFADDDP 312 AFADDW 313 AFADDL 314 AFADDF 315 AFADDD 316 317 AFMULDP 318 AFMULW 319 AFMULL 320 AFMULF 321 AFMULD 322 323 AFSUBDP 324 AFSUBW 325 AFSUBL 326 AFSUBF 327 AFSUBD 328 329 AFSUBRDP 330 AFSUBRW 331 AFSUBRL 332 AFSUBRF 333 AFSUBRD 334 335 AFDIVDP 336 AFDIVW 337 AFDIVL 338 AFDIVF 339 AFDIVD 340 341 AFDIVRDP 342 AFDIVRW 343 AFDIVRL 344 AFDIVRF 345 AFDIVRD 346 347 AFXCHD 348 AFFREE 349 350 AFLDCW 351 AFLDENV 352 AFRSTOR 353 AFSAVE 354 AFSTCW 355 AFSTENV 356 AFSTSW 357 358 AF2XM1 359 AFABS 360 AFCHS 361 AFCLEX 362 AFCOS 363 AFDECSTP 364 AFINCSTP 365 AFINIT 366 AFLD1 367 AFLDL2E 368 AFLDL2T 369 AFLDLG2 370 AFLDLN2 371 AFLDPI 372 AFLDZ 373 AFNOP 374 AFPATAN 375 AFPREM 376 AFPREM1 377 AFPTAN 378 AFRNDINT 379 AFSCALE 380 AFSIN 381 AFSINCOS 382 AFSQRT 383 AFTST 384 AFXAM 385 AFXTRACT 386 AFYL2X 387 AFYL2XP1 388 389 // extra 32-bit operations 390 ACMPXCHGB 391 ACMPXCHGL 392 ACMPXCHGW 393 ACMPXCHG8B 394 ACPUID 395 AINVD 396 AINVLPG 397 ALFENCE 398 AMFENCE 399 AMOVNTIL 400 ARDMSR 401 ARDPMC 402 ARDTSC 403 ARSM 404 ASFENCE 405 ASYSRET 406 AWBINVD 407 AWRMSR 408 AXADDB 409 AXADDL 410 AXADDW 411 412 // conditional move 413 ACMOVLCC 414 ACMOVLCS 415 ACMOVLEQ 416 ACMOVLGE 417 ACMOVLGT 418 ACMOVLHI 419 ACMOVLLE 420 ACMOVLLS 421 ACMOVLLT 422 ACMOVLMI 423 ACMOVLNE 424 ACMOVLOC 425 ACMOVLOS 426 ACMOVLPC 427 ACMOVLPL 428 ACMOVLPS 429 ACMOVQCC 430 ACMOVQCS 431 ACMOVQEQ 432 ACMOVQGE 433 ACMOVQGT 434 ACMOVQHI 435 ACMOVQLE 436 ACMOVQLS 437 ACMOVQLT 438 ACMOVQMI 439 ACMOVQNE 440 ACMOVQOC 441 ACMOVQOS 442 ACMOVQPC 443 ACMOVQPL 444 ACMOVQPS 445 ACMOVWCC 446 ACMOVWCS 447 ACMOVWEQ 448 ACMOVWGE 449 ACMOVWGT 450 ACMOVWHI 451 ACMOVWLE 452 ACMOVWLS 453 ACMOVWLT 454 ACMOVWMI 455 ACMOVWNE 456 ACMOVWOC 457 ACMOVWOS 458 ACMOVWPC 459 ACMOVWPL 460 ACMOVWPS 461 462 // 64-bit 463 AADCQ 464 AADDQ 465 AANDQ 466 ABSFQ 467 ABSRQ 468 ABTCQ 469 ABTQ 470 ABTRQ 471 ABTSQ 472 ACMPQ 473 ACMPSQ 474 ACMPXCHGQ 475 ACQO 476 ADIVQ 477 AIDIVQ 478 AIMULQ 479 AIRETQ 480 AJCXZQ 481 ALEAQ 482 ALEAVEQ 483 ALODSQ 484 AMOVQ 485 AMOVLQSX 486 AMOVLQZX 487 AMOVNTIQ 488 AMOVSQ 489 AMULQ 490 ANEGQ 491 ANOTQ 492 AORQ 493 APOPFQ 494 APOPQ 495 APUSHFQ 496 APUSHQ 497 ARCLQ 498 ARCRQ 499 AROLQ 500 ARORQ 501 AQUAD 502 ASALQ 503 ASARQ 504 ASBBQ 505 ASCASQ 506 ASHLQ 507 ASHRQ 508 ASTOSQ 509 ASUBQ 510 ATESTQ 511 AXADDQ 512 AXCHGQ 513 AXORQ 514 AXGETBV 515 516 // media 517 AADDPD 518 AADDPS 519 AADDSD 520 AADDSS 521 AANDNL 522 AANDNQ 523 AANDNPD 524 AANDNPS 525 AANDPD 526 AANDPS 527 ABEXTRL 528 ABEXTRQ 529 ABLSIL 530 ABLSIQ 531 ABLSMSKL 532 ABLSMSKQ 533 ABLSRL 534 ABLSRQ 535 ABZHIL 536 ABZHIQ 537 ACMPPD 538 ACMPPS 539 ACMPSD 540 ACMPSS 541 ACOMISD 542 ACOMISS 543 ACVTPD2PL 544 ACVTPD2PS 545 ACVTPL2PD 546 ACVTPL2PS 547 ACVTPS2PD 548 ACVTPS2PL 549 ACVTSD2SL 550 ACVTSD2SQ 551 ACVTSD2SS 552 ACVTSL2SD 553 ACVTSL2SS 554 ACVTSQ2SD 555 ACVTSQ2SS 556 ACVTSS2SD 557 ACVTSS2SL 558 ACVTSS2SQ 559 ACVTTPD2PL 560 ACVTTPS2PL 561 ACVTTSD2SL 562 ACVTTSD2SQ 563 ACVTTSS2SL 564 ACVTTSS2SQ 565 ADIVPD 566 ADIVPS 567 ADIVSD 568 ADIVSS 569 AEMMS 570 AFXRSTOR 571 AFXRSTOR64 572 AFXSAVE 573 AFXSAVE64 574 ALDDQU 575 ALDMXCSR 576 AMASKMOVOU 577 AMASKMOVQ 578 AMAXPD 579 AMAXPS 580 AMAXSD 581 AMAXSS 582 AMINPD 583 AMINPS 584 AMINSD 585 AMINSS 586 AMOVAPD 587 AMOVAPS 588 AMOVOU 589 AMOVHLPS 590 AMOVHPD 591 AMOVHPS 592 AMOVLHPS 593 AMOVLPD 594 AMOVLPS 595 AMOVMSKPD 596 AMOVMSKPS 597 AMOVNTO 598 AMOVNTPD 599 AMOVNTPS 600 AMOVNTQ 601 AMOVO 602 AMOVQOZX 603 AMOVSD 604 AMOVSS 605 AMOVUPD 606 AMOVUPS 607 AMULPD 608 AMULPS 609 AMULSD 610 AMULSS 611 AMULXL 612 AMULXQ 613 AORPD 614 AORPS 615 APACKSSLW 616 APACKSSWB 617 APACKUSWB 618 APADDB 619 APADDL 620 APADDQ 621 APADDSB 622 APADDSW 623 APADDUSB 624 APADDUSW 625 APADDW 626 APAND 627 APANDN 628 APAVGB 629 APAVGW 630 APCMPEQB 631 APCMPEQL 632 APCMPEQW 633 APCMPGTB 634 APCMPGTL 635 APCMPGTW 636 APDEPL 637 APDEPQ 638 APEXTL 639 APEXTQ 640 APEXTRB 641 APEXTRD 642 APEXTRQ 643 APEXTRW 644 APHADDD 645 APHADDSW 646 APHADDW 647 APHMINPOSUW 648 APHSUBD 649 APHSUBSW 650 APHSUBW 651 APINSRB 652 APINSRD 653 APINSRQ 654 APINSRW 655 APMADDWL 656 APMAXSW 657 APMAXUB 658 APMINSW 659 APMINUB 660 APMOVMSKB 661 APMOVSXBD 662 APMOVSXBQ 663 APMOVSXBW 664 APMOVSXDQ 665 APMOVSXWD 666 APMOVSXWQ 667 APMOVZXBD 668 APMOVZXBQ 669 APMOVZXBW 670 APMOVZXDQ 671 APMOVZXWD 672 APMOVZXWQ 673 APMULDQ 674 APMULHUW 675 APMULHW 676 APMULLD 677 APMULLW 678 APMULULQ 679 APOR 680 APSADBW 681 APSHUFB 682 APSHUFHW 683 APSHUFL 684 APSHUFLW 685 APSHUFW 686 APSLLL 687 APSLLO 688 APSLLQ 689 APSLLW 690 APSRAL 691 APSRAW 692 APSRLL 693 APSRLO 694 APSRLQ 695 APSRLW 696 APSUBB 697 APSUBL 698 APSUBQ 699 APSUBSB 700 APSUBSW 701 APSUBUSB 702 APSUBUSW 703 APSUBW 704 APUNPCKHBW 705 APUNPCKHLQ 706 APUNPCKHQDQ 707 APUNPCKHWL 708 APUNPCKLBW 709 APUNPCKLLQ 710 APUNPCKLQDQ 711 APUNPCKLWL 712 APXOR 713 ARCPPS 714 ARCPSS 715 ARSQRTPS 716 ARSQRTSS 717 ASARXL 718 ASARXQ 719 ASHLXL 720 ASHLXQ 721 ASHRXL 722 ASHRXQ 723 ASHUFPD 724 ASHUFPS 725 ASQRTPD 726 ASQRTPS 727 ASQRTSD 728 ASQRTSS 729 ASTMXCSR 730 ASUBPD 731 ASUBPS 732 ASUBSD 733 ASUBSS 734 AUCOMISD 735 AUCOMISS 736 AUNPCKHPD 737 AUNPCKHPS 738 AUNPCKLPD 739 AUNPCKLPS 740 AXORPD 741 AXORPS 742 APCMPESTRI 743 744 ARETFW 745 ARETFL 746 ARETFQ 747 ASWAPGS 748 749 ACRC32B 750 ACRC32Q 751 AIMUL3Q 752 753 APREFETCHT0 754 APREFETCHT1 755 APREFETCHT2 756 APREFETCHNTA 757 758 AMOVQL 759 ABSWAPL 760 ABSWAPQ 761 762 AAESENC 763 AAESENCLAST 764 AAESDEC 765 AAESDECLAST 766 AAESIMC 767 AAESKEYGENASSIST 768 769 AROUNDPS 770 AROUNDSS 771 AROUNDPD 772 AROUNDSD 773 AMOVDDUP 774 AMOVSHDUP 775 AMOVSLDUP 776 777 APSHUFD 778 APCLMULQDQ 779 780 AVZEROUPPER 781 AVMOVDQU 782 AVMOVNTDQ 783 AVMOVDQA 784 AVPCMPEQB 785 AVPXOR 786 AVPMOVMSKB 787 AVPAND 788 AVPTEST 789 AVPBROADCASTB 790 AVPSHUFB 791 AVPSHUFD 792 AVPERM2F128 793 AVPALIGNR 794 AVPADDQ 795 AVPADDD 796 AVPSRLDQ 797 AVPSLLDQ 798 AVPSRLQ 799 AVPSLLQ 800 AVPSRLD 801 AVPSLLD 802 AVPOR 803 AVPBLENDD 804 AVINSERTI128 805 AVPERM2I128 806 ARORXL 807 ARORXQ 808 AVBROADCASTSS 809 AVBROADCASTSD 810 AVMOVDDUP 811 AVMOVSHDUP 812 AVMOVSLDUP 813 814 // from 386 815 AJCXZW 816 AFCMOVCC 817 AFCMOVCS 818 AFCMOVEQ 819 AFCMOVHI 820 AFCMOVLS 821 AFCMOVNE 822 AFCMOVNU 823 AFCMOVUN 824 AFCOMI 825 AFCOMIP 826 AFUCOMI 827 AFUCOMIP 828 829 // TSX 830 AXACQUIRE 831 AXRELEASE 832 AXBEGIN 833 AXEND 834 AXABORT 835 AXTEST 836 837 ALAST 838 ) 839 840 const ( 841 REG_NONE = 0 842 ) 843 844 const ( 845 REG_AL = obj.RBaseAMD64 + iota 846 REG_CL 847 REG_DL 848 REG_BL 849 REG_SPB 850 REG_BPB 851 REG_SIB 852 REG_DIB 853 REG_R8B 854 REG_R9B 855 REG_R10B 856 REG_R11B 857 REG_R12B 858 REG_R13B 859 REG_R14B 860 REG_R15B 861 862 REG_AX 863 REG_CX 864 REG_DX 865 REG_BX 866 REG_SP 867 REG_BP 868 REG_SI 869 REG_DI 870 REG_R8 871 REG_R9 872 REG_R10 873 REG_R11 874 REG_R12 875 REG_R13 876 REG_R14 877 REG_R15 878 879 REG_AH 880 REG_CH 881 REG_DH 882 REG_BH 883 884 REG_F0 885 REG_F1 886 REG_F2 887 REG_F3 888 REG_F4 889 REG_F5 890 REG_F6 891 REG_F7 892 893 REG_M0 894 REG_M1 895 REG_M2 896 REG_M3 897 REG_M4 898 REG_M5 899 REG_M6 900 REG_M7 901 902 REG_X0 903 REG_X1 904 REG_X2 905 REG_X3 906 REG_X4 907 REG_X5 908 REG_X6 909 REG_X7 910 REG_X8 911 REG_X9 912 REG_X10 913 REG_X11 914 REG_X12 915 REG_X13 916 REG_X14 917 REG_X15 918 919 REG_Y0 920 REG_Y1 921 REG_Y2 922 REG_Y3 923 REG_Y4 924 REG_Y5 925 REG_Y6 926 REG_Y7 927 REG_Y8 928 REG_Y9 929 REG_Y10 930 REG_Y11 931 REG_Y12 932 REG_Y13 933 REG_Y14 934 REG_Y15 935 936 REG_CS 937 REG_SS 938 REG_DS 939 REG_ES 940 REG_FS 941 REG_GS 942 943 REG_GDTR /* global descriptor table register */ 944 REG_IDTR /* interrupt descriptor table register */ 945 REG_LDTR /* local descriptor table register */ 946 REG_MSW /* machine status word */ 947 REG_TASK /* task register */ 948 949 REG_CR0 950 REG_CR1 951 REG_CR2 952 REG_CR3 953 REG_CR4 954 REG_CR5 955 REG_CR6 956 REG_CR7 957 REG_CR8 958 REG_CR9 959 REG_CR10 960 REG_CR11 961 REG_CR12 962 REG_CR13 963 REG_CR14 964 REG_CR15 965 966 REG_DR0 967 REG_DR1 968 REG_DR2 969 REG_DR3 970 REG_DR4 971 REG_DR5 972 REG_DR6 973 REG_DR7 974 975 REG_TR0 976 REG_TR1 977 REG_TR2 978 REG_TR3 979 REG_TR4 980 REG_TR5 981 REG_TR6 982 REG_TR7 983 984 REG_TLS 985 986 MAXREG 987 988 REG_CR = REG_CR0 989 REG_DR = REG_DR0 990 REG_TR = REG_TR0 991 992 REGARG = -1 993 REGRET = REG_AX 994 FREGRET = REG_X0 995 REGSP = REG_SP 996 REGCTXT = REG_DX 997 REGEXT = REG_R15 /* compiler allocates external registers R15 down */ 998 FREGMIN = REG_X0 + 5 /* first register variable */ 999 FREGEXT = REG_X0 + 15 /* first external register */ 1000 T_TYPE = 1 << 0 1001 T_INDEX = 1 << 1 1002 T_OFFSET = 1 << 2 1003 T_FCONST = 1 << 3 1004 T_SYM = 1 << 4 1005 T_SCONST = 1 << 5 1006 T_64 = 1 << 6 1007 T_GOTYPE = 1 << 7 1008 ) 1009 1010 // https://www.uclibc.org/docs/psABI-x86_64.pdf, figure 3.36 1011 var AMD64DWARFRegisters = map[int16]int16{ 1012 REG_AX: 0, 1013 REG_DX: 1, 1014 REG_CX: 2, 1015 REG_BX: 3, 1016 REG_SI: 4, 1017 REG_DI: 5, 1018 REG_BP: 6, 1019 REG_SP: 7, 1020 REG_R8: 8, 1021 REG_R9: 9, 1022 REG_R10: 10, 1023 REG_R11: 11, 1024 REG_R12: 12, 1025 REG_R13: 13, 1026 REG_R14: 14, 1027 REG_R15: 15, 1028 // 16 is "Return Address RA", whatever that is. 1029 // XMM registers. %xmmN => XN. 1030 REG_X0: 17, 1031 REG_X1: 18, 1032 REG_X2: 19, 1033 REG_X3: 20, 1034 REG_X4: 21, 1035 REG_X5: 22, 1036 REG_X6: 23, 1037 REG_X7: 24, 1038 REG_X8: 25, 1039 REG_X9: 26, 1040 REG_X10: 27, 1041 REG_X11: 28, 1042 REG_X12: 29, 1043 REG_X13: 30, 1044 REG_X14: 31, 1045 REG_X15: 32, 1046 // ST registers. %stN => FN. 1047 REG_F0: 33, 1048 REG_F1: 34, 1049 REG_F2: 35, 1050 REG_F3: 36, 1051 REG_F4: 37, 1052 REG_F5: 38, 1053 REG_F6: 39, 1054 REG_F7: 40, 1055 // MMX registers. %mmN => MN. 1056 REG_M0: 41, 1057 REG_M1: 42, 1058 REG_M2: 43, 1059 REG_M3: 44, 1060 REG_M4: 45, 1061 REG_M5: 46, 1062 REG_M6: 47, 1063 REG_M7: 48, 1064 // 48 is flags, which doesn't have a name. 1065 REG_ES: 50, 1066 REG_CS: 51, 1067 REG_SS: 52, 1068 REG_DS: 53, 1069 REG_FS: 54, 1070 REG_GS: 55, 1071 // 58 and 59 are {fs,gs}base, which don't have names. 1072 REG_TR: 62, 1073 REG_LDTR: 63, 1074 // 64-66 are mxcsr, fcw, fsw, which don't have names. 1075 } 1076 1077 // https://www.uclibc.org/docs/psABI-i386.pdf, table 2.14 1078 var X86DWARFRegisters = map[int16]int16{ 1079 REG_AX: 0, 1080 REG_CX: 1, 1081 REG_DX: 2, 1082 REG_BX: 3, 1083 REG_SP: 4, 1084 REG_BP: 5, 1085 REG_SI: 6, 1086 REG_DI: 7, 1087 // 8 is "Return Address RA", whatever that is. 1088 // 9 is flags, which doesn't have a name. 1089 // ST registers. %stN => FN. 1090 REG_F0: 11, 1091 REG_F1: 12, 1092 REG_F2: 13, 1093 REG_F3: 14, 1094 REG_F4: 15, 1095 REG_F5: 16, 1096 REG_F6: 17, 1097 REG_F7: 18, 1098 // XMM registers. %xmmN => XN. 1099 REG_X0: 21, 1100 REG_X1: 22, 1101 REG_X2: 23, 1102 REG_X3: 24, 1103 REG_X4: 25, 1104 REG_X5: 26, 1105 REG_X6: 27, 1106 REG_X7: 28, 1107 // MMX registers. %mmN => MN. 1108 REG_M0: 29, 1109 REG_M1: 30, 1110 REG_M2: 31, 1111 REG_M3: 32, 1112 REG_M4: 33, 1113 REG_M5: 34, 1114 REG_M6: 35, 1115 REG_M7: 36, 1116 // 39 is mxcsr, which doesn't have a name. 1117 REG_ES: 40, 1118 REG_CS: 41, 1119 REG_SS: 42, 1120 REG_DS: 43, 1121 REG_FS: 44, 1122 REG_GS: 45, 1123 REG_TR: 48, 1124 REG_LDTR: 49, 1125 }