github.com/kdevb0x/go@v0.0.0-20180115030120-39687051e9e7/src/sync/atomic/asm_plan9_arm.s (about)

     1  // Copyright 2012 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  #include "textflag.h"
     6  
     7  #define DMB_ISH_7 \
     8  	MOVB	runtime·goarm(SB), R11; \
     9  	CMP	$7, R11; \
    10  	BLT	2(PC); \
    11  	WORD	$0xf57ff05b	// dmb ish
    12  
    13  // Plan9/ARM atomic operations.
    14  // TODO(minux): this only supports ARMv6K or higher.
    15  
    16  TEXT ·CompareAndSwapInt32(SB),NOSPLIT,$0
    17  	B ·CompareAndSwapUint32(SB)
    18  
    19  TEXT ·CompareAndSwapUint32(SB),NOSPLIT,$0
    20  	B ·armCompareAndSwapUint32(SB)
    21  
    22  TEXT ·CompareAndSwapUintptr(SB),NOSPLIT,$0
    23  	B ·CompareAndSwapUint32(SB)
    24  
    25  TEXT ·AddInt32(SB),NOSPLIT,$0
    26  	B ·AddUint32(SB)
    27  
    28  TEXT ·AddUint32(SB),NOSPLIT,$0
    29  	B ·armAddUint32(SB)
    30  
    31  TEXT ·AddUintptr(SB),NOSPLIT,$0
    32  	B ·AddUint32(SB)
    33  
    34  TEXT ·SwapInt32(SB),NOSPLIT,$0
    35  	B ·SwapUint32(SB)
    36  
    37  TEXT ·SwapUint32(SB),NOSPLIT,$0
    38  	B ·armSwapUint32(SB)
    39  
    40  TEXT ·SwapUintptr(SB),NOSPLIT,$0
    41  	B ·SwapUint32(SB)
    42  
    43  TEXT ·CompareAndSwapInt64(SB),NOSPLIT,$0
    44  	B ·CompareAndSwapUint64(SB)
    45  
    46  TEXT ·CompareAndSwapUint64(SB),NOSPLIT,$-4
    47  	B ·armCompareAndSwapUint64(SB)
    48  
    49  TEXT ·AddInt64(SB),NOSPLIT,$0
    50  	B ·addUint64(SB)
    51  
    52  TEXT ·AddUint64(SB),NOSPLIT,$0
    53  	B ·addUint64(SB)
    54  
    55  TEXT ·SwapInt64(SB),NOSPLIT,$0
    56  	B ·swapUint64(SB)
    57  
    58  TEXT ·SwapUint64(SB),NOSPLIT,$0
    59  	B ·swapUint64(SB)
    60  
    61  TEXT ·LoadInt32(SB),NOSPLIT,$0
    62  	B ·LoadUint32(SB)
    63  
    64  TEXT ·LoadUint32(SB),NOSPLIT,$0-8
    65  	MOVW addr+0(FP), R1
    66  load32loop:
    67  	LDREX (R1), R2		// loads R2
    68  	STREX R2, (R1), R0	// stores R2
    69  	CMP $0, R0
    70  	BNE load32loop
    71  	MOVW R2, val+4(FP)
    72  	DMB_ISH_7
    73  	RET
    74  
    75  TEXT ·LoadInt64(SB),NOSPLIT,$0
    76  	B ·loadUint64(SB)
    77  
    78  TEXT ·LoadUint64(SB),NOSPLIT,$0
    79  	B ·loadUint64(SB)
    80  
    81  TEXT ·LoadUintptr(SB),NOSPLIT,$0
    82  	B ·LoadUint32(SB)
    83  
    84  TEXT ·LoadPointer(SB),NOSPLIT,$0
    85  	B ·LoadUint32(SB)
    86  
    87  TEXT ·StoreInt32(SB),NOSPLIT,$0
    88  	B ·StoreUint32(SB)
    89  
    90  TEXT ·StoreUint32(SB),NOSPLIT,$0-8
    91  	MOVW addr+0(FP), R1
    92  	MOVW val+4(FP), R2
    93  	DMB_ISH_7
    94  storeloop:
    95  	LDREX (R1), R4		// loads R4
    96  	STREX R2, (R1), R0	// stores R2
    97  	CMP $0, R0
    98  	BNE storeloop
    99  	RET
   100  
   101  TEXT ·StoreInt64(SB),NOSPLIT,$0
   102  	B ·storeUint64(SB)
   103  
   104  TEXT ·StoreUint64(SB),NOSPLIT,$0
   105  	B ·storeUint64(SB)
   106  
   107  TEXT ·StoreUintptr(SB),NOSPLIT,$0
   108  	B ·StoreUint32(SB)