github.com/mattn/go@v0.0.0-20171011075504-07f7db3ea99f/src/cmd/compile/internal/ssa/gen/ARM.rules (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (AddPtr x y) -> (ADD x y) 6 (Add32 x y) -> (ADD x y) 7 (Add16 x y) -> (ADD x y) 8 (Add8 x y) -> (ADD x y) 9 (Add32F x y) -> (ADDF x y) 10 (Add64F x y) -> (ADDD x y) 11 12 (Add32carry x y) -> (ADDS x y) 13 (Add32withcarry x y c) -> (ADC x y c) 14 15 (SubPtr x y) -> (SUB x y) 16 (Sub32 x y) -> (SUB x y) 17 (Sub16 x y) -> (SUB x y) 18 (Sub8 x y) -> (SUB x y) 19 (Sub32F x y) -> (SUBF x y) 20 (Sub64F x y) -> (SUBD x y) 21 22 (Sub32carry x y) -> (SUBS x y) 23 (Sub32withcarry x y c) -> (SBC x y c) 24 25 (Mul32 x y) -> (MUL x y) 26 (Mul16 x y) -> (MUL x y) 27 (Mul8 x y) -> (MUL x y) 28 (Mul32F x y) -> (MULF x y) 29 (Mul64F x y) -> (MULD x y) 30 31 (Hmul32 x y) -> (HMUL x y) 32 (Hmul32u x y) -> (HMULU x y) 33 34 (Mul32uhilo x y) -> (MULLU x y) 35 36 (Div32 x y) -> 37 (SUB (XOR <typ.UInt32> // negate the result if one operand is negative 38 (Select0 <typ.UInt32> (CALLudiv 39 (SUB <typ.UInt32> (XOR x <typ.UInt32> (Signmask x)) (Signmask x)) // negate x if negative 40 (SUB <typ.UInt32> (XOR y <typ.UInt32> (Signmask y)) (Signmask y)))) // negate y if negative 41 (Signmask (XOR <typ.UInt32> x y))) (Signmask (XOR <typ.UInt32> x y))) 42 (Div32u x y) -> (Select0 <typ.UInt32> (CALLudiv x y)) 43 (Div16 x y) -> (Div32 (SignExt16to32 x) (SignExt16to32 y)) 44 (Div16u x y) -> (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 45 (Div8 x y) -> (Div32 (SignExt8to32 x) (SignExt8to32 y)) 46 (Div8u x y) -> (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 47 (Div32F x y) -> (DIVF x y) 48 (Div64F x y) -> (DIVD x y) 49 50 (Mod32 x y) -> 51 (SUB (XOR <typ.UInt32> // negate the result if x is negative 52 (Select1 <typ.UInt32> (CALLudiv 53 (SUB <typ.UInt32> (XOR <typ.UInt32> x (Signmask x)) (Signmask x)) // negate x if negative 54 (SUB <typ.UInt32> (XOR <typ.UInt32> y (Signmask y)) (Signmask y)))) // negate y if negative 55 (Signmask x)) (Signmask x)) 56 (Mod32u x y) -> (Select1 <typ.UInt32> (CALLudiv x y)) 57 (Mod16 x y) -> (Mod32 (SignExt16to32 x) (SignExt16to32 y)) 58 (Mod16u x y) -> (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 59 (Mod8 x y) -> (Mod32 (SignExt8to32 x) (SignExt8to32 y)) 60 (Mod8u x y) -> (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 61 62 // (x + y) / 2 with x>=y -> (x - y) / 2 + y 63 (Avg32u <t> x y) -> (ADD (SRLconst <t> (SUB <t> x y) [1]) y) 64 65 (And32 x y) -> (AND x y) 66 (And16 x y) -> (AND x y) 67 (And8 x y) -> (AND x y) 68 69 (Or32 x y) -> (OR x y) 70 (Or16 x y) -> (OR x y) 71 (Or8 x y) -> (OR x y) 72 73 (Xor32 x y) -> (XOR x y) 74 (Xor16 x y) -> (XOR x y) 75 (Xor8 x y) -> (XOR x y) 76 77 // unary ops 78 (Neg32 x) -> (RSBconst [0] x) 79 (Neg16 x) -> (RSBconst [0] x) 80 (Neg8 x) -> (RSBconst [0] x) 81 (Neg32F x) -> (NEGF x) 82 (Neg64F x) -> (NEGD x) 83 84 (Com32 x) -> (MVN x) 85 (Com16 x) -> (MVN x) 86 (Com8 x) -> (MVN x) 87 88 (Sqrt x) -> (SQRTD x) 89 90 // count trailing zero for ARMv5 and ARMv6 91 // 32 - CLZ(x&-x - 1) 92 (Ctz32 <t> x) && objabi.GOARM<=6 -> (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1]))) 93 94 // count trailing zero for ARMv7 95 (Ctz32 <t> x) && objabi.GOARM==7 -> (CLZ <t> (RBIT <t> x)) 96 97 // bit length 98 (BitLen32 <t> x) -> (RSBconst [32] (CLZ <t> x)) 99 100 // byte swap for ARMv5 101 // let (a, b, c, d) be the bytes of x from high to low 102 // t1 = x right rotate 16 bits -- (c, d, a, b ) 103 // t2 = x ^ t1 -- (a^c, b^d, a^c, b^d) 104 // t3 = t2 &^ 0xff0000 -- (a^c, 0, a^c, b^d) 105 // t4 = t3 >> 8 -- (0, a^c, 0, a^c) 106 // t5 = x right rotate 8 bits -- (d, a, b, c ) 107 // result = t4 ^ t5 -- (d, c, b, a ) 108 // using shifted ops this can be done in 4 instructions. 109 (Bswap32 <t> x) && objabi.GOARM==5 -> 110 (XOR <t> 111 (SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8]) 112 (SRRconst <t> x [8])) 113 114 // byte swap for ARMv6 and above 115 (Bswap32 x) && objabi.GOARM>=6 -> (REV x) 116 117 // boolean ops -- booleans are represented with 0=false, 1=true 118 (AndB x y) -> (AND x y) 119 (OrB x y) -> (OR x y) 120 (EqB x y) -> (XORconst [1] (XOR <typ.Bool> x y)) 121 (NeqB x y) -> (XOR x y) 122 (Not x) -> (XORconst [1] x) 123 124 // shifts 125 // hardware instruction uses only the low byte of the shift 126 // we compare to 256 to ensure Go semantics for large shifts 127 (Lsh32x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 128 (Lsh32x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 129 (Lsh32x8 x y) -> (SLL x (ZeroExt8to32 y)) 130 131 (Lsh16x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 132 (Lsh16x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 133 (Lsh16x8 x y) -> (SLL x (ZeroExt8to32 y)) 134 135 (Lsh8x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 136 (Lsh8x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 137 (Lsh8x8 x y) -> (SLL x (ZeroExt8to32 y)) 138 139 (Rsh32Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0]) 140 (Rsh32Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 141 (Rsh32Ux8 x y) -> (SRL x (ZeroExt8to32 y)) 142 143 (Rsh16Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0]) 144 (Rsh16Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 145 (Rsh16Ux8 x y) -> (SRL (ZeroExt16to32 x) (ZeroExt8to32 y)) 146 147 (Rsh8Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0]) 148 (Rsh8Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 149 (Rsh8Ux8 x y) -> (SRL (ZeroExt8to32 x) (ZeroExt8to32 y)) 150 151 (Rsh32x32 x y) -> (SRAcond x y (CMPconst [256] y)) 152 (Rsh32x16 x y) -> (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 153 (Rsh32x8 x y) -> (SRA x (ZeroExt8to32 y)) 154 155 (Rsh16x32 x y) -> (SRAcond (SignExt16to32 x) y (CMPconst [256] y)) 156 (Rsh16x16 x y) -> (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 157 (Rsh16x8 x y) -> (SRA (SignExt16to32 x) (ZeroExt8to32 y)) 158 159 (Rsh8x32 x y) -> (SRAcond (SignExt8to32 x) y (CMPconst [256] y)) 160 (Rsh8x16 x y) -> (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 161 (Rsh8x8 x y) -> (SRA (SignExt8to32 x) (ZeroExt8to32 y)) 162 163 // constant shifts 164 // generic opt rewrites all constant shifts to shift by Const64 165 (Lsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SLLconst x [c]) 166 (Rsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SRAconst x [c]) 167 (Rsh32Ux64 x (Const64 [c])) && uint64(c) < 32 -> (SRLconst x [c]) 168 (Lsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SLLconst x [c]) 169 (Rsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [c+16]) 170 (Rsh16Ux64 x (Const64 [c])) && uint64(c) < 16 -> (SRLconst (SLLconst <typ.UInt32> x [16]) [c+16]) 171 (Lsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SLLconst x [c]) 172 (Rsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [c+24]) 173 (Rsh8Ux64 x (Const64 [c])) && uint64(c) < 8 -> (SRLconst (SLLconst <typ.UInt32> x [24]) [c+24]) 174 175 // large constant shifts 176 (Lsh32x64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 177 (Rsh32Ux64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 178 (Lsh16x64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 179 (Rsh16Ux64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 180 (Lsh8x64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 181 (Rsh8Ux64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 182 183 // large constant signed right shift, we leave the sign bit 184 (Rsh32x64 x (Const64 [c])) && uint64(c) >= 32 -> (SRAconst x [31]) 185 (Rsh16x64 x (Const64 [c])) && uint64(c) >= 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [31]) 186 (Rsh8x64 x (Const64 [c])) && uint64(c) >= 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [31]) 187 188 // constants 189 (Const8 [val]) -> (MOVWconst [val]) 190 (Const16 [val]) -> (MOVWconst [val]) 191 (Const32 [val]) -> (MOVWconst [val]) 192 (Const32F [val]) -> (MOVFconst [val]) 193 (Const64F [val]) -> (MOVDconst [val]) 194 (ConstNil) -> (MOVWconst [0]) 195 (ConstBool [b]) -> (MOVWconst [b]) 196 197 // truncations 198 // Because we ignore high parts of registers, truncates are just copies. 199 (Trunc16to8 x) -> x 200 (Trunc32to8 x) -> x 201 (Trunc32to16 x) -> x 202 203 // Zero-/Sign-extensions 204 (ZeroExt8to16 x) -> (MOVBUreg x) 205 (ZeroExt8to32 x) -> (MOVBUreg x) 206 (ZeroExt16to32 x) -> (MOVHUreg x) 207 208 (SignExt8to16 x) -> (MOVBreg x) 209 (SignExt8to32 x) -> (MOVBreg x) 210 (SignExt16to32 x) -> (MOVHreg x) 211 212 (Signmask x) -> (SRAconst x [31]) 213 (Zeromask x) -> (SRAconst (RSBshiftRL <typ.Int32> x x [1]) [31]) // sign bit of uint32(x)>>1 - x 214 (Slicemask <t> x) -> (SRAconst (RSBconst <t> [0] x) [31]) 215 216 // float <-> int conversion 217 (Cvt32to32F x) -> (MOVWF x) 218 (Cvt32to64F x) -> (MOVWD x) 219 (Cvt32Uto32F x) -> (MOVWUF x) 220 (Cvt32Uto64F x) -> (MOVWUD x) 221 (Cvt32Fto32 x) -> (MOVFW x) 222 (Cvt64Fto32 x) -> (MOVDW x) 223 (Cvt32Fto32U x) -> (MOVFWU x) 224 (Cvt64Fto32U x) -> (MOVDWU x) 225 (Cvt32Fto64F x) -> (MOVFD x) 226 (Cvt64Fto32F x) -> (MOVDF x) 227 228 (Round32F x) -> x 229 (Round64F x) -> x 230 231 // comparisons 232 (Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 233 (Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 234 (Eq32 x y) -> (Equal (CMP x y)) 235 (EqPtr x y) -> (Equal (CMP x y)) 236 (Eq32F x y) -> (Equal (CMPF x y)) 237 (Eq64F x y) -> (Equal (CMPD x y)) 238 239 (Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 240 (Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 241 (Neq32 x y) -> (NotEqual (CMP x y)) 242 (NeqPtr x y) -> (NotEqual (CMP x y)) 243 (Neq32F x y) -> (NotEqual (CMPF x y)) 244 (Neq64F x y) -> (NotEqual (CMPD x y)) 245 246 (Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 247 (Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 248 (Less32 x y) -> (LessThan (CMP x y)) 249 (Less32F x y) -> (GreaterThan (CMPF y x)) // reverse operands to work around NaN 250 (Less64F x y) -> (GreaterThan (CMPD y x)) // reverse operands to work around NaN 251 252 (Less8U x y) -> (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 253 (Less16U x y) -> (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 254 (Less32U x y) -> (LessThanU (CMP x y)) 255 256 (Leq8 x y) -> (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 257 (Leq16 x y) -> (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 258 (Leq32 x y) -> (LessEqual (CMP x y)) 259 (Leq32F x y) -> (GreaterEqual (CMPF y x)) // reverse operands to work around NaN 260 (Leq64F x y) -> (GreaterEqual (CMPD y x)) // reverse operands to work around NaN 261 262 (Leq8U x y) -> (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 263 (Leq16U x y) -> (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 264 (Leq32U x y) -> (LessEqualU (CMP x y)) 265 266 (Greater8 x y) -> (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 267 (Greater16 x y) -> (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 268 (Greater32 x y) -> (GreaterThan (CMP x y)) 269 (Greater32F x y) -> (GreaterThan (CMPF x y)) 270 (Greater64F x y) -> (GreaterThan (CMPD x y)) 271 272 (Greater8U x y) -> (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 273 (Greater16U x y) -> (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 274 (Greater32U x y) -> (GreaterThanU (CMP x y)) 275 276 (Geq8 x y) -> (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 277 (Geq16 x y) -> (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 278 (Geq32 x y) -> (GreaterEqual (CMP x y)) 279 (Geq32F x y) -> (GreaterEqual (CMPF x y)) 280 (Geq64F x y) -> (GreaterEqual (CMPD x y)) 281 282 (Geq8U x y) -> (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 283 (Geq16U x y) -> (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 284 (Geq32U x y) -> (GreaterEqualU (CMP x y)) 285 286 (OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr) 287 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 288 289 (Addr {sym} base) -> (MOVWaddr {sym} base) 290 291 // loads 292 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 293 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 294 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 295 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 296 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 297 (Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem) 298 (Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem) 299 (Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem) 300 301 // stores 302 (Store {t} ptr val mem) && t.(*types.Type).Size() == 1 -> (MOVBstore ptr val mem) 303 (Store {t} ptr val mem) && t.(*types.Type).Size() == 2 -> (MOVHstore ptr val mem) 304 (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 305 (Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && is32BitFloat(val.Type) -> (MOVFstore ptr val mem) 306 (Store {t} ptr val mem) && t.(*types.Type).Size() == 8 && is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 307 308 // zero instructions 309 (Zero [0] _ mem) -> mem 310 (Zero [1] ptr mem) -> (MOVBstore ptr (MOVWconst [0]) mem) 311 (Zero [2] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> 312 (MOVHstore ptr (MOVWconst [0]) mem) 313 (Zero [2] ptr mem) -> 314 (MOVBstore [1] ptr (MOVWconst [0]) 315 (MOVBstore [0] ptr (MOVWconst [0]) mem)) 316 (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 -> 317 (MOVWstore ptr (MOVWconst [0]) mem) 318 (Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 -> 319 (MOVHstore [2] ptr (MOVWconst [0]) 320 (MOVHstore [0] ptr (MOVWconst [0]) mem)) 321 (Zero [4] ptr mem) -> 322 (MOVBstore [3] ptr (MOVWconst [0]) 323 (MOVBstore [2] ptr (MOVWconst [0]) 324 (MOVBstore [1] ptr (MOVWconst [0]) 325 (MOVBstore [0] ptr (MOVWconst [0]) mem)))) 326 327 (Zero [3] ptr mem) -> 328 (MOVBstore [2] ptr (MOVWconst [0]) 329 (MOVBstore [1] ptr (MOVWconst [0]) 330 (MOVBstore [0] ptr (MOVWconst [0]) mem))) 331 332 // Medium zeroing uses a duff device 333 // 4 and 128 are magic constants, see runtime/mkduff.go 334 (Zero [s] {t} ptr mem) 335 && s%4 == 0 && s > 4 && s <= 512 336 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> 337 (DUFFZERO [4 * (128 - int64(s/4))] ptr (MOVWconst [0]) mem) 338 339 // Large zeroing uses a loop 340 (Zero [s] {t} ptr mem) 341 && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> 342 (LoweredZero [t.(*types.Type).Alignment()] 343 ptr 344 (ADDconst <ptr.Type> ptr [s-moveSize(t.(*types.Type).Alignment(), config)]) 345 (MOVWconst [0]) 346 mem) 347 348 // moves 349 (Move [0] _ _ mem) -> mem 350 (Move [1] dst src mem) -> (MOVBstore dst (MOVBUload src mem) mem) 351 (Move [2] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> 352 (MOVHstore dst (MOVHUload src mem) mem) 353 (Move [2] dst src mem) -> 354 (MOVBstore [1] dst (MOVBUload [1] src mem) 355 (MOVBstore dst (MOVBUload src mem) mem)) 356 (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 -> 357 (MOVWstore dst (MOVWload src mem) mem) 358 (Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 -> 359 (MOVHstore [2] dst (MOVHUload [2] src mem) 360 (MOVHstore dst (MOVHUload src mem) mem)) 361 (Move [4] dst src mem) -> 362 (MOVBstore [3] dst (MOVBUload [3] src mem) 363 (MOVBstore [2] dst (MOVBUload [2] src mem) 364 (MOVBstore [1] dst (MOVBUload [1] src mem) 365 (MOVBstore dst (MOVBUload src mem) mem)))) 366 367 (Move [3] dst src mem) -> 368 (MOVBstore [2] dst (MOVBUload [2] src mem) 369 (MOVBstore [1] dst (MOVBUload [1] src mem) 370 (MOVBstore dst (MOVBUload src mem) mem))) 371 372 // Medium move uses a duff device 373 // 8 and 128 are magic constants, see runtime/mkduff.go 374 (Move [s] {t} dst src mem) 375 && s%4 == 0 && s > 4 && s <= 512 376 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice -> 377 (DUFFCOPY [8 * (128 - int64(s/4))] dst src mem) 378 379 // Large move uses a loop 380 (Move [s] {t} dst src mem) 381 && (s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0 -> 382 (LoweredMove [t.(*types.Type).Alignment()] 383 dst 384 src 385 (ADDconst <src.Type> src [s-moveSize(t.(*types.Type).Alignment(), config)]) 386 mem) 387 388 // calls 389 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 390 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 391 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 392 393 // checks 394 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 395 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 396 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 397 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 398 399 // pseudo-ops 400 (GetClosurePtr) -> (LoweredGetClosurePtr) 401 (GetCallerSP) -> (LoweredGetCallerSP) 402 (Convert x mem) -> (MOVWconvert x mem) 403 404 // Absorb pseudo-ops into blocks. 405 (If (Equal cc) yes no) -> (EQ cc yes no) 406 (If (NotEqual cc) yes no) -> (NE cc yes no) 407 (If (LessThan cc) yes no) -> (LT cc yes no) 408 (If (LessThanU cc) yes no) -> (ULT cc yes no) 409 (If (LessEqual cc) yes no) -> (LE cc yes no) 410 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 411 (If (GreaterThan cc) yes no) -> (GT cc yes no) 412 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 413 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 414 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 415 416 (If cond yes no) -> (NE (CMPconst [0] cond) yes no) 417 418 // Absorb boolean tests into block 419 (NE (CMPconst [0] (Equal cc)) yes no) -> (EQ cc yes no) 420 (NE (CMPconst [0] (NotEqual cc)) yes no) -> (NE cc yes no) 421 (NE (CMPconst [0] (LessThan cc)) yes no) -> (LT cc yes no) 422 (NE (CMPconst [0] (LessThanU cc)) yes no) -> (ULT cc yes no) 423 (NE (CMPconst [0] (LessEqual cc)) yes no) -> (LE cc yes no) 424 (NE (CMPconst [0] (LessEqualU cc)) yes no) -> (ULE cc yes no) 425 (NE (CMPconst [0] (GreaterThan cc)) yes no) -> (GT cc yes no) 426 (NE (CMPconst [0] (GreaterThanU cc)) yes no) -> (UGT cc yes no) 427 (NE (CMPconst [0] (GreaterEqual cc)) yes no) -> (GE cc yes no) 428 (NE (CMPconst [0] (GreaterEqualU cc)) yes no) -> (UGE cc yes no) 429 430 // Optimizations 431 432 // fold offset into address 433 (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off1+off2] {sym} ptr) 434 (SUBconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off2-off1] {sym} ptr) 435 436 // fold address into load/store 437 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBload [off1+off2] {sym} ptr mem) 438 (MOVBload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBload [off1-off2] {sym} ptr mem) 439 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBUload [off1+off2] {sym} ptr mem) 440 (MOVBUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVBUload [off1-off2] {sym} ptr mem) 441 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHload [off1+off2] {sym} ptr mem) 442 (MOVHload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHload [off1-off2] {sym} ptr mem) 443 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHUload [off1+off2] {sym} ptr mem) 444 (MOVHUload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVHUload [off1-off2] {sym} ptr mem) 445 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVWload [off1+off2] {sym} ptr mem) 446 (MOVWload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVWload [off1-off2] {sym} ptr mem) 447 (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVFload [off1+off2] {sym} ptr mem) 448 (MOVFload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVFload [off1-off2] {sym} ptr mem) 449 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVDload [off1+off2] {sym} ptr mem) 450 (MOVDload [off1] {sym} (SUBconst [off2] ptr) mem) -> (MOVDload [off1-off2] {sym} ptr mem) 451 452 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVBstore [off1+off2] {sym} ptr val mem) 453 (MOVBstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVBstore [off1-off2] {sym} ptr val mem) 454 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVHstore [off1+off2] {sym} ptr val mem) 455 (MOVHstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVHstore [off1-off2] {sym} ptr val mem) 456 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVWstore [off1+off2] {sym} ptr val mem) 457 (MOVWstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVWstore [off1-off2] {sym} ptr val mem) 458 (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVFstore [off1+off2] {sym} ptr val mem) 459 (MOVFstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVFstore [off1-off2] {sym} ptr val mem) 460 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVDstore [off1+off2] {sym} ptr val mem) 461 (MOVDstore [off1] {sym} (SUBconst [off2] ptr) val mem) -> (MOVDstore [off1-off2] {sym} ptr val mem) 462 463 (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 464 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 465 (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 466 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 467 (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 468 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 469 (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 470 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 471 (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 472 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 473 (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 474 (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 475 (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 476 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 477 478 (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 479 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 480 (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 481 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 482 (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 483 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 484 (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 485 (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 486 (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 487 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 488 489 // replace load from same location as preceding store with zero/sign extension (or copy in case of full width) 490 (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBreg x) 491 (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVBUreg x) 492 (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHreg x) 493 (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVHUreg x) 494 (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 495 496 (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 497 (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 498 499 (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> x 500 (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 501 (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 502 (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 503 (MOVBUloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBUreg x) 504 (MOVBloadidx ptr idx (MOVBstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVBreg x) 505 (MOVHUloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHUreg x) 506 (MOVHloadidx ptr idx (MOVHstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> (MOVHreg x) 507 508 // fold constant into arithmatic ops 509 (ADD x (MOVWconst [c])) -> (ADDconst [c] x) 510 (SUB (MOVWconst [c]) x) -> (RSBconst [c] x) 511 (SUB x (MOVWconst [c])) -> (SUBconst [c] x) 512 (RSB (MOVWconst [c]) x) -> (SUBconst [c] x) 513 (RSB x (MOVWconst [c])) -> (RSBconst [c] x) 514 515 (ADDS x (MOVWconst [c])) -> (ADDSconst [c] x) 516 (SUBS x (MOVWconst [c])) -> (SUBSconst [c] x) 517 518 (ADC (MOVWconst [c]) x flags) -> (ADCconst [c] x flags) 519 (ADC x (MOVWconst [c]) flags) -> (ADCconst [c] x flags) 520 (SBC (MOVWconst [c]) x flags) -> (RSCconst [c] x flags) 521 (SBC x (MOVWconst [c]) flags) -> (SBCconst [c] x flags) 522 523 (AND x (MOVWconst [c])) -> (ANDconst [c] x) 524 (OR x (MOVWconst [c])) -> (ORconst [c] x) 525 (XOR x (MOVWconst [c])) -> (XORconst [c] x) 526 (BIC x (MOVWconst [c])) -> (BICconst [c] x) 527 528 (SLL x (MOVWconst [c])) -> (SLLconst x [c&31]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=32) 529 (SRL x (MOVWconst [c])) -> (SRLconst x [c&31]) 530 (SRA x (MOVWconst [c])) -> (SRAconst x [c&31]) 531 532 (CMP x (MOVWconst [c])) -> (CMPconst [c] x) 533 (CMP (MOVWconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 534 535 // don't extend after proper load 536 // MOVWreg instruction is not emitted if src and dst registers are same, but it ensures the type. 537 (MOVBreg x:(MOVBload _ _)) -> (MOVWreg x) 538 (MOVBUreg x:(MOVBUload _ _)) -> (MOVWreg x) 539 (MOVHreg x:(MOVBload _ _)) -> (MOVWreg x) 540 (MOVHreg x:(MOVBUload _ _)) -> (MOVWreg x) 541 (MOVHreg x:(MOVHload _ _)) -> (MOVWreg x) 542 (MOVHUreg x:(MOVBUload _ _)) -> (MOVWreg x) 543 (MOVHUreg x:(MOVHUload _ _)) -> (MOVWreg x) 544 545 // fold extensions and ANDs together 546 (MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&0xff] x) 547 (MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&0xffff] x) 548 (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 -> (ANDconst [c&0x7f] x) 549 (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 -> (ANDconst [c&0x7fff] x) 550 551 // fold double extensions 552 (MOVBreg x:(MOVBreg _)) -> (MOVWreg x) 553 (MOVBUreg x:(MOVBUreg _)) -> (MOVWreg x) 554 (MOVHreg x:(MOVBreg _)) -> (MOVWreg x) 555 (MOVHreg x:(MOVBUreg _)) -> (MOVWreg x) 556 (MOVHreg x:(MOVHreg _)) -> (MOVWreg x) 557 (MOVHUreg x:(MOVBUreg _)) -> (MOVWreg x) 558 (MOVHUreg x:(MOVHUreg _)) -> (MOVWreg x) 559 560 // don't extend before store 561 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 562 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 563 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 564 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 565 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 566 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 567 568 // if a register move has only 1 use, just use the same register without emitting instruction 569 // MOVWnop doesn't emit instruction, only for ensuring the type. 570 (MOVWreg x) && x.Uses == 1 -> (MOVWnop x) 571 572 // mul by constant 573 (MUL x (MOVWconst [c])) && int32(c) == -1 -> (RSBconst [0] x) 574 (MUL _ (MOVWconst [0])) -> (MOVWconst [0]) 575 (MUL x (MOVWconst [1])) -> x 576 (MUL x (MOVWconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 577 (MUL x (MOVWconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 578 (MUL x (MOVWconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 579 (MUL x (MOVWconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 580 (MUL x (MOVWconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 581 (MUL x (MOVWconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 582 (MUL x (MOVWconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 583 584 (MULA x (MOVWconst [c]) a) && int32(c) == -1 -> (SUB a x) 585 (MULA _ (MOVWconst [0]) a) -> a 586 (MULA x (MOVWconst [1]) a) -> (ADD x a) 587 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 588 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 589 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 590 (MULA x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 591 (MULA x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 592 (MULA x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 593 (MULA x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 594 595 (MULA (MOVWconst [c]) x a) && int32(c) == -1 -> (SUB a x) 596 (MULA (MOVWconst [0]) _ a) -> a 597 (MULA (MOVWconst [1]) x a) -> (ADD x a) 598 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 599 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 600 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 601 (MULA (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 602 (MULA (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 603 (MULA (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 604 (MULA (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 605 606 (MULS x (MOVWconst [c]) a) && int32(c) == -1 -> (ADD a x) 607 (MULS _ (MOVWconst [0]) a) -> a 608 (MULS x (MOVWconst [1]) a) -> (RSB x a) 609 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) 610 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 611 (MULS x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 612 (MULS x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 613 (MULS x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 614 (MULS x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 615 (MULS x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 616 617 (MULS (MOVWconst [c]) x a) && int32(c) == -1 -> (ADD a x) 618 (MULS (MOVWconst [0]) _ a) -> a 619 (MULS (MOVWconst [1]) x a) -> (RSB x a) 620 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (RSB (SLLconst <x.Type> [log2(c)] x) a) 621 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 622 (MULS (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 623 (MULS (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 624 (MULS (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 625 (MULS (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 626 (MULS (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 627 628 // div by constant 629 (Select0 (CALLudiv x (MOVWconst [1]))) -> x 630 (Select1 (CALLudiv _ (MOVWconst [1]))) -> (MOVWconst [0]) 631 (Select0 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 632 (Select1 (CALLudiv x (MOVWconst [c]))) && isPowerOfTwo(c) -> (ANDconst [c-1] x) 633 634 // constant comparisons 635 (CMPconst (MOVWconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 636 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 637 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 638 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 639 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 640 641 // other known comparisons 642 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 643 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 644 (CMPconst (ANDconst _ [m]) [n]) && 0 <= int32(m) && int32(m) < int32(n) -> (FlagLT_ULT) 645 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n) -> (FlagLT_ULT) 646 647 // absorb flag constants into branches 648 (EQ (FlagEQ) yes no) -> (First nil yes no) 649 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 650 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 651 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 652 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 653 654 (NE (FlagEQ) yes no) -> (First nil no yes) 655 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 656 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 657 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 658 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 659 660 (LT (FlagEQ) yes no) -> (First nil no yes) 661 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 662 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 663 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 664 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 665 666 (LE (FlagEQ) yes no) -> (First nil yes no) 667 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 668 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 669 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 670 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 671 672 (GT (FlagEQ) yes no) -> (First nil no yes) 673 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 674 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 675 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 676 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 677 678 (GE (FlagEQ) yes no) -> (First nil yes no) 679 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 680 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 681 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 682 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 683 684 (ULT (FlagEQ) yes no) -> (First nil no yes) 685 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 686 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 687 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 688 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 689 690 (ULE (FlagEQ) yes no) -> (First nil yes no) 691 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 692 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 693 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 694 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 695 696 (UGT (FlagEQ) yes no) -> (First nil no yes) 697 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 698 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 699 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 700 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 701 702 (UGE (FlagEQ) yes no) -> (First nil yes no) 703 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 704 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 705 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 706 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 707 708 // absorb InvertFlags into branches 709 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 710 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 711 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 712 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 713 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 714 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 715 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 716 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 717 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 718 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 719 720 // absorb flag constants into boolean values 721 (Equal (FlagEQ)) -> (MOVWconst [1]) 722 (Equal (FlagLT_ULT)) -> (MOVWconst [0]) 723 (Equal (FlagLT_UGT)) -> (MOVWconst [0]) 724 (Equal (FlagGT_ULT)) -> (MOVWconst [0]) 725 (Equal (FlagGT_UGT)) -> (MOVWconst [0]) 726 727 (NotEqual (FlagEQ)) -> (MOVWconst [0]) 728 (NotEqual (FlagLT_ULT)) -> (MOVWconst [1]) 729 (NotEqual (FlagLT_UGT)) -> (MOVWconst [1]) 730 (NotEqual (FlagGT_ULT)) -> (MOVWconst [1]) 731 (NotEqual (FlagGT_UGT)) -> (MOVWconst [1]) 732 733 (LessThan (FlagEQ)) -> (MOVWconst [0]) 734 (LessThan (FlagLT_ULT)) -> (MOVWconst [1]) 735 (LessThan (FlagLT_UGT)) -> (MOVWconst [1]) 736 (LessThan (FlagGT_ULT)) -> (MOVWconst [0]) 737 (LessThan (FlagGT_UGT)) -> (MOVWconst [0]) 738 739 (LessThanU (FlagEQ)) -> (MOVWconst [0]) 740 (LessThanU (FlagLT_ULT)) -> (MOVWconst [1]) 741 (LessThanU (FlagLT_UGT)) -> (MOVWconst [0]) 742 (LessThanU (FlagGT_ULT)) -> (MOVWconst [1]) 743 (LessThanU (FlagGT_UGT)) -> (MOVWconst [0]) 744 745 (LessEqual (FlagEQ)) -> (MOVWconst [1]) 746 (LessEqual (FlagLT_ULT)) -> (MOVWconst [1]) 747 (LessEqual (FlagLT_UGT)) -> (MOVWconst [1]) 748 (LessEqual (FlagGT_ULT)) -> (MOVWconst [0]) 749 (LessEqual (FlagGT_UGT)) -> (MOVWconst [0]) 750 751 (LessEqualU (FlagEQ)) -> (MOVWconst [1]) 752 (LessEqualU (FlagLT_ULT)) -> (MOVWconst [1]) 753 (LessEqualU (FlagLT_UGT)) -> (MOVWconst [0]) 754 (LessEqualU (FlagGT_ULT)) -> (MOVWconst [1]) 755 (LessEqualU (FlagGT_UGT)) -> (MOVWconst [0]) 756 757 (GreaterThan (FlagEQ)) -> (MOVWconst [0]) 758 (GreaterThan (FlagLT_ULT)) -> (MOVWconst [0]) 759 (GreaterThan (FlagLT_UGT)) -> (MOVWconst [0]) 760 (GreaterThan (FlagGT_ULT)) -> (MOVWconst [1]) 761 (GreaterThan (FlagGT_UGT)) -> (MOVWconst [1]) 762 763 (GreaterThanU (FlagEQ)) -> (MOVWconst [0]) 764 (GreaterThanU (FlagLT_ULT)) -> (MOVWconst [0]) 765 (GreaterThanU (FlagLT_UGT)) -> (MOVWconst [1]) 766 (GreaterThanU (FlagGT_ULT)) -> (MOVWconst [0]) 767 (GreaterThanU (FlagGT_UGT)) -> (MOVWconst [1]) 768 769 (GreaterEqual (FlagEQ)) -> (MOVWconst [1]) 770 (GreaterEqual (FlagLT_ULT)) -> (MOVWconst [0]) 771 (GreaterEqual (FlagLT_UGT)) -> (MOVWconst [0]) 772 (GreaterEqual (FlagGT_ULT)) -> (MOVWconst [1]) 773 (GreaterEqual (FlagGT_UGT)) -> (MOVWconst [1]) 774 775 (GreaterEqualU (FlagEQ)) -> (MOVWconst [1]) 776 (GreaterEqualU (FlagLT_ULT)) -> (MOVWconst [0]) 777 (GreaterEqualU (FlagLT_UGT)) -> (MOVWconst [1]) 778 (GreaterEqualU (FlagGT_ULT)) -> (MOVWconst [0]) 779 (GreaterEqualU (FlagGT_UGT)) -> (MOVWconst [1]) 780 781 // absorb InvertFlags into boolean values 782 (Equal (InvertFlags x)) -> (Equal x) 783 (NotEqual (InvertFlags x)) -> (NotEqual x) 784 (LessThan (InvertFlags x)) -> (GreaterThan x) 785 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 786 (GreaterThan (InvertFlags x)) -> (LessThan x) 787 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 788 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 789 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 790 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 791 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 792 793 // absorb flag constants into conditional instructions 794 (CMOVWLSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 795 (CMOVWLSconst _ (FlagLT_ULT) [c]) -> (MOVWconst [c]) 796 (CMOVWLSconst x (FlagLT_UGT)) -> x 797 (CMOVWLSconst _ (FlagGT_ULT) [c]) -> (MOVWconst [c]) 798 (CMOVWLSconst x (FlagGT_UGT)) -> x 799 800 (CMOVWHSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 801 (CMOVWHSconst x (FlagLT_ULT)) -> x 802 (CMOVWHSconst _ (FlagLT_UGT) [c]) -> (MOVWconst [c]) 803 (CMOVWHSconst x (FlagGT_ULT)) -> x 804 (CMOVWHSconst _ (FlagGT_UGT) [c]) -> (MOVWconst [c]) 805 806 (CMOVWLSconst x (InvertFlags flags) [c]) -> (CMOVWHSconst x flags [c]) 807 (CMOVWHSconst x (InvertFlags flags) [c]) -> (CMOVWLSconst x flags [c]) 808 809 (SRAcond x _ (FlagEQ)) -> (SRAconst x [31]) 810 (SRAcond x y (FlagLT_ULT)) -> (SRA x y) 811 (SRAcond x _ (FlagLT_UGT)) -> (SRAconst x [31]) 812 (SRAcond x y (FlagGT_ULT)) -> (SRA x y) 813 (SRAcond x _ (FlagGT_UGT)) -> (SRAconst x [31]) 814 815 // remove redundant *const ops 816 (ADDconst [0] x) -> x 817 (SUBconst [0] x) -> x 818 (ANDconst [0] _) -> (MOVWconst [0]) 819 (ANDconst [c] x) && int32(c)==-1 -> x 820 (ORconst [0] x) -> x 821 (ORconst [c] _) && int32(c)==-1 -> (MOVWconst [-1]) 822 (XORconst [0] x) -> x 823 (BICconst [0] x) -> x 824 (BICconst [c] _) && int32(c)==-1 -> (MOVWconst [0]) 825 826 // generic constant folding 827 (ADDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (SUBconst [int64(int32(-c))] x) 828 (SUBconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) -> (ADDconst [int64(int32(-c))] x) 829 (ANDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (BICconst [int64(^uint32(c))] x) 830 (BICconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) -> (ANDconst [int64(^uint32(c))] x) 831 (ADDconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c+d))]) 832 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(c+d))] x) 833 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 834 (ADDconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 835 (ADCconst [c] (ADDconst [d] x) flags) -> (ADCconst [int64(int32(c+d))] x flags) 836 (ADCconst [c] (SUBconst [d] x) flags) -> (ADCconst [int64(int32(c-d))] x flags) 837 (SUBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d-c))]) 838 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(-c-d))] x) 839 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(-c+d))] x) 840 (SUBconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(-c+d))] x) 841 (SBCconst [c] (ADDconst [d] x) flags) -> (SBCconst [int64(int32(c-d))] x flags) 842 (SBCconst [c] (SUBconst [d] x) flags) -> (SBCconst [int64(int32(c+d))] x flags) 843 (RSBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c-d))]) 844 (RSBconst [c] (RSBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 845 (RSBconst [c] (ADDconst [d] x)) -> (RSBconst [int64(int32(c-d))] x) 846 (RSBconst [c] (SUBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 847 (RSCconst [c] (ADDconst [d] x) flags) -> (RSCconst [int64(int32(c-d))] x flags) 848 (RSCconst [c] (SUBconst [d] x) flags) -> (RSCconst [int64(int32(c+d))] x flags) 849 (SLLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<uint64(c))]) 850 (SRLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)>>uint64(c))]) 851 (SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))]) 852 (MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))]) 853 (MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a) 854 (MULS (MOVWconst [c]) (MOVWconst [d]) a) -> (SUBconst [int64(int32(c*d))] a) 855 (Select0 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)/uint32(d))]) 856 (Select1 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)%uint32(d))]) 857 (ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d]) 858 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 859 (ORconst [c] (MOVWconst [d])) -> (MOVWconst [c|d]) 860 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 861 (XORconst [c] (MOVWconst [d])) -> (MOVWconst [c^d]) 862 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 863 (BICconst [c] (MOVWconst [d])) -> (MOVWconst [d&^c]) 864 (BICconst [c] (BICconst [d] x)) -> (BICconst [int64(int32(c|d))] x) 865 (MVN (MOVWconst [c])) -> (MOVWconst [^c]) 866 (MOVBreg (MOVWconst [c])) -> (MOVWconst [int64(int8(c))]) 867 (MOVBUreg (MOVWconst [c])) -> (MOVWconst [int64(uint8(c))]) 868 (MOVHreg (MOVWconst [c])) -> (MOVWconst [int64(int16(c))]) 869 (MOVHUreg (MOVWconst [c])) -> (MOVWconst [int64(uint16(c))]) 870 (MOVWreg (MOVWconst [c])) -> (MOVWconst [c]) 871 // BFX: Width = c >> 8, LSB = c & 0xff, result = d << (32 - Width - LSB) >> (32 - Width) 872 (BFX [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) 873 (BFXU [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))]) 874 875 // absorb shifts into ops 876 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 877 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 878 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 879 (ADD x (SLL y z)) -> (ADDshiftLLreg x y z) 880 (ADD x (SRL y z)) -> (ADDshiftRLreg x y z) 881 (ADD x (SRA y z)) -> (ADDshiftRAreg x y z) 882 (ADC x (SLLconst [c] y) flags) -> (ADCshiftLL x y [c] flags) 883 (ADC (SLLconst [c] y) x flags) -> (ADCshiftLL x y [c] flags) 884 (ADC x (SRLconst [c] y) flags) -> (ADCshiftRL x y [c] flags) 885 (ADC (SRLconst [c] y) x flags) -> (ADCshiftRL x y [c] flags) 886 (ADC x (SRAconst [c] y) flags) -> (ADCshiftRA x y [c] flags) 887 (ADC (SRAconst [c] y) x flags) -> (ADCshiftRA x y [c] flags) 888 (ADC x (SLL y z) flags) -> (ADCshiftLLreg x y z flags) 889 (ADC (SLL y z) x flags) -> (ADCshiftLLreg x y z flags) 890 (ADC x (SRL y z) flags) -> (ADCshiftRLreg x y z flags) 891 (ADC (SRL y z) x flags) -> (ADCshiftRLreg x y z flags) 892 (ADC x (SRA y z) flags) -> (ADCshiftRAreg x y z flags) 893 (ADC (SRA y z) x flags) -> (ADCshiftRAreg x y z flags) 894 (ADDS x (SLLconst [c] y)) -> (ADDSshiftLL x y [c]) 895 (ADDS x (SRLconst [c] y)) -> (ADDSshiftRL x y [c]) 896 (ADDS x (SRAconst [c] y)) -> (ADDSshiftRA x y [c]) 897 (ADDS x (SLL y z)) -> (ADDSshiftLLreg x y z) 898 (ADDS x (SRL y z)) -> (ADDSshiftRLreg x y z) 899 (ADDS x (SRA y z)) -> (ADDSshiftRAreg x y z) 900 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 901 (SUB (SLLconst [c] y) x) -> (RSBshiftLL x y [c]) 902 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 903 (SUB (SRLconst [c] y) x) -> (RSBshiftRL x y [c]) 904 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 905 (SUB (SRAconst [c] y) x) -> (RSBshiftRA x y [c]) 906 (SUB x (SLL y z)) -> (SUBshiftLLreg x y z) 907 (SUB (SLL y z) x) -> (RSBshiftLLreg x y z) 908 (SUB x (SRL y z)) -> (SUBshiftRLreg x y z) 909 (SUB (SRL y z) x) -> (RSBshiftRLreg x y z) 910 (SUB x (SRA y z)) -> (SUBshiftRAreg x y z) 911 (SUB (SRA y z) x) -> (RSBshiftRAreg x y z) 912 (SBC x (SLLconst [c] y) flags) -> (SBCshiftLL x y [c] flags) 913 (SBC (SLLconst [c] y) x flags) -> (RSCshiftLL x y [c] flags) 914 (SBC x (SRLconst [c] y) flags) -> (SBCshiftRL x y [c] flags) 915 (SBC (SRLconst [c] y) x flags) -> (RSCshiftRL x y [c] flags) 916 (SBC x (SRAconst [c] y) flags) -> (SBCshiftRA x y [c] flags) 917 (SBC (SRAconst [c] y) x flags) -> (RSCshiftRA x y [c] flags) 918 (SBC x (SLL y z) flags) -> (SBCshiftLLreg x y z flags) 919 (SBC (SLL y z) x flags) -> (RSCshiftLLreg x y z flags) 920 (SBC x (SRL y z) flags) -> (SBCshiftRLreg x y z flags) 921 (SBC (SRL y z) x flags) -> (RSCshiftRLreg x y z flags) 922 (SBC x (SRA y z) flags) -> (SBCshiftRAreg x y z flags) 923 (SBC (SRA y z) x flags) -> (RSCshiftRAreg x y z flags) 924 (SUBS x (SLLconst [c] y)) -> (SUBSshiftLL x y [c]) 925 (SUBS (SLLconst [c] y) x) -> (RSBSshiftLL x y [c]) 926 (SUBS x (SRLconst [c] y)) -> (SUBSshiftRL x y [c]) 927 (SUBS (SRLconst [c] y) x) -> (RSBSshiftRL x y [c]) 928 (SUBS x (SRAconst [c] y)) -> (SUBSshiftRA x y [c]) 929 (SUBS (SRAconst [c] y) x) -> (RSBSshiftRA x y [c]) 930 (SUBS x (SLL y z)) -> (SUBSshiftLLreg x y z) 931 (SUBS (SLL y z) x) -> (RSBSshiftLLreg x y z) 932 (SUBS x (SRL y z)) -> (SUBSshiftRLreg x y z) 933 (SUBS (SRL y z) x) -> (RSBSshiftRLreg x y z) 934 (SUBS x (SRA y z)) -> (SUBSshiftRAreg x y z) 935 (SUBS (SRA y z) x) -> (RSBSshiftRAreg x y z) 936 (RSB x (SLLconst [c] y)) -> (RSBshiftLL x y [c]) 937 (RSB (SLLconst [c] y) x) -> (SUBshiftLL x y [c]) 938 (RSB x (SRLconst [c] y)) -> (RSBshiftRL x y [c]) 939 (RSB (SRLconst [c] y) x) -> (SUBshiftRL x y [c]) 940 (RSB x (SRAconst [c] y)) -> (RSBshiftRA x y [c]) 941 (RSB (SRAconst [c] y) x) -> (SUBshiftRA x y [c]) 942 (RSB x (SLL y z)) -> (RSBshiftLLreg x y z) 943 (RSB (SLL y z) x) -> (SUBshiftLLreg x y z) 944 (RSB x (SRL y z)) -> (RSBshiftRLreg x y z) 945 (RSB (SRL y z) x) -> (SUBshiftRLreg x y z) 946 (RSB x (SRA y z)) -> (RSBshiftRAreg x y z) 947 (RSB (SRA y z) x) -> (SUBshiftRAreg x y z) 948 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 949 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 950 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 951 (AND x (SLL y z)) -> (ANDshiftLLreg x y z) 952 (AND x (SRL y z)) -> (ANDshiftRLreg x y z) 953 (AND x (SRA y z)) -> (ANDshiftRAreg x y z) 954 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 955 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 956 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 957 (OR x (SLL y z)) -> (ORshiftLLreg x y z) 958 (OR x (SRL y z)) -> (ORshiftRLreg x y z) 959 (OR x (SRA y z)) -> (ORshiftRAreg x y z) 960 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 961 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 962 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 963 (XOR x (SRRconst [c] y)) -> (XORshiftRR x y [c]) 964 (XOR x (SLL y z)) -> (XORshiftLLreg x y z) 965 (XOR x (SRL y z)) -> (XORshiftRLreg x y z) 966 (XOR x (SRA y z)) -> (XORshiftRAreg x y z) 967 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 968 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 969 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 970 (BIC x (SLL y z)) -> (BICshiftLLreg x y z) 971 (BIC x (SRL y z)) -> (BICshiftRLreg x y z) 972 (BIC x (SRA y z)) -> (BICshiftRAreg x y z) 973 (MVN (SLLconst [c] x)) -> (MVNshiftLL x [c]) 974 (MVN (SRLconst [c] x)) -> (MVNshiftRL x [c]) 975 (MVN (SRAconst [c] x)) -> (MVNshiftRA x [c]) 976 (MVN (SLL x y)) -> (MVNshiftLLreg x y) 977 (MVN (SRL x y)) -> (MVNshiftRLreg x y) 978 (MVN (SRA x y)) -> (MVNshiftRAreg x y) 979 980 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 981 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 982 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 983 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 984 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 985 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 986 (CMP x (SLL y z)) -> (CMPshiftLLreg x y z) 987 (CMP (SLL y z) x) -> (InvertFlags (CMPshiftLLreg x y z)) 988 (CMP x (SRL y z)) -> (CMPshiftRLreg x y z) 989 (CMP (SRL y z) x) -> (InvertFlags (CMPshiftRLreg x y z)) 990 (CMP x (SRA y z)) -> (CMPshiftRAreg x y z) 991 (CMP (SRA y z) x) -> (InvertFlags (CMPshiftRAreg x y z)) 992 993 // prefer *const ops to *shift ops 994 (ADDshiftLL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 995 (ADDshiftRL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 996 (ADDshiftRA (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 997 (ADCshiftLL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SLLconst <x.Type> x [d]) flags) 998 (ADCshiftRL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRLconst <x.Type> x [d]) flags) 999 (ADCshiftRA (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRAconst <x.Type> x [d]) flags) 1000 (ADDSshiftLL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SLLconst <x.Type> x [d])) 1001 (ADDSshiftRL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRLconst <x.Type> x [d])) 1002 (ADDSshiftRA (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRAconst <x.Type> x [d])) 1003 (SUBshiftLL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SLLconst <x.Type> x [d])) 1004 (SUBshiftRL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRLconst <x.Type> x [d])) 1005 (SUBshiftRA (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRAconst <x.Type> x [d])) 1006 (SBCshiftLL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SLLconst <x.Type> x [d]) flags) 1007 (SBCshiftRL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRLconst <x.Type> x [d]) flags) 1008 (SBCshiftRA (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRAconst <x.Type> x [d]) flags) 1009 (SUBSshiftLL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SLLconst <x.Type> x [d])) 1010 (SUBSshiftRL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRLconst <x.Type> x [d])) 1011 (SUBSshiftRA (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRAconst <x.Type> x [d])) 1012 (RSBshiftLL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SLLconst <x.Type> x [d])) 1013 (RSBshiftRL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRLconst <x.Type> x [d])) 1014 (RSBshiftRA (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRAconst <x.Type> x [d])) 1015 (RSCshiftLL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SLLconst <x.Type> x [d]) flags) 1016 (RSCshiftRL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRLconst <x.Type> x [d]) flags) 1017 (RSCshiftRA (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRAconst <x.Type> x [d]) flags) 1018 (RSBSshiftLL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SLLconst <x.Type> x [d])) 1019 (RSBSshiftRL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRLconst <x.Type> x [d])) 1020 (RSBSshiftRA (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRAconst <x.Type> x [d])) 1021 (ANDshiftLL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 1022 (ANDshiftRL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 1023 (ANDshiftRA (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 1024 (ORshiftLL (MOVWconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 1025 (ORshiftRL (MOVWconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 1026 (ORshiftRA (MOVWconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 1027 (XORshiftLL (MOVWconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 1028 (XORshiftRL (MOVWconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 1029 (XORshiftRA (MOVWconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 1030 (XORshiftRR (MOVWconst [c]) x [d]) -> (XORconst [c] (SRRconst <x.Type> x [d])) 1031 (CMPshiftLL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 1032 (CMPshiftRL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 1033 (CMPshiftRA (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 1034 1035 (ADDshiftLLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SLL <x.Type> x y)) 1036 (ADDshiftRLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRL <x.Type> x y)) 1037 (ADDshiftRAreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRA <x.Type> x y)) 1038 (ADCshiftLLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SLL <x.Type> x y) flags) 1039 (ADCshiftRLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRL <x.Type> x y) flags) 1040 (ADCshiftRAreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRA <x.Type> x y) flags) 1041 (ADDSshiftLLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SLL <x.Type> x y)) 1042 (ADDSshiftRLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRL <x.Type> x y)) 1043 (ADDSshiftRAreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRA <x.Type> x y)) 1044 (SUBshiftLLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SLL <x.Type> x y)) 1045 (SUBshiftRLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRL <x.Type> x y)) 1046 (SUBshiftRAreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRA <x.Type> x y)) 1047 (SBCshiftLLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SLL <x.Type> x y) flags) 1048 (SBCshiftRLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRL <x.Type> x y) flags) 1049 (SBCshiftRAreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRA <x.Type> x y) flags) 1050 (SUBSshiftLLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SLL <x.Type> x y)) 1051 (SUBSshiftRLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRL <x.Type> x y)) 1052 (SUBSshiftRAreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRA <x.Type> x y)) 1053 (RSBshiftLLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SLL <x.Type> x y)) 1054 (RSBshiftRLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRL <x.Type> x y)) 1055 (RSBshiftRAreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRA <x.Type> x y)) 1056 (RSCshiftLLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SLL <x.Type> x y) flags) 1057 (RSCshiftRLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRL <x.Type> x y) flags) 1058 (RSCshiftRAreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRA <x.Type> x y) flags) 1059 (RSBSshiftLLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SLL <x.Type> x y)) 1060 (RSBSshiftRLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRL <x.Type> x y)) 1061 (RSBSshiftRAreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRA <x.Type> x y)) 1062 (ANDshiftLLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SLL <x.Type> x y)) 1063 (ANDshiftRLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRL <x.Type> x y)) 1064 (ANDshiftRAreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRA <x.Type> x y)) 1065 (ORshiftLLreg (MOVWconst [c]) x y) -> (ORconst [c] (SLL <x.Type> x y)) 1066 (ORshiftRLreg (MOVWconst [c]) x y) -> (ORconst [c] (SRL <x.Type> x y)) 1067 (ORshiftRAreg (MOVWconst [c]) x y) -> (ORconst [c] (SRA <x.Type> x y)) 1068 (XORshiftLLreg (MOVWconst [c]) x y) -> (XORconst [c] (SLL <x.Type> x y)) 1069 (XORshiftRLreg (MOVWconst [c]) x y) -> (XORconst [c] (SRL <x.Type> x y)) 1070 (XORshiftRAreg (MOVWconst [c]) x y) -> (XORconst [c] (SRA <x.Type> x y)) 1071 (CMPshiftLLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SLL <x.Type> x y))) 1072 (CMPshiftRLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRL <x.Type> x y))) 1073 (CMPshiftRAreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRA <x.Type> x y))) 1074 1075 // constant folding in *shift ops 1076 (ADDshiftLL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)<<uint64(d))]) 1077 (ADDshiftRL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)>>uint64(d))]) 1078 (ADDshiftRA x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(c)>>uint64(d))]) 1079 (ADCshiftLL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)<<uint64(d))] flags) 1080 (ADCshiftRL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)>>uint64(d))] flags) 1081 (ADCshiftRA x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(c)>>uint64(d))] flags) 1082 (ADDSshiftLL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)<<uint64(d))]) 1083 (ADDSshiftRL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)>>uint64(d))]) 1084 (ADDSshiftRA x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(c)>>uint64(d))]) 1085 (SUBshiftLL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)<<uint64(d))]) 1086 (SUBshiftRL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)>>uint64(d))]) 1087 (SUBshiftRA x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(c)>>uint64(d))]) 1088 (SBCshiftLL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)<<uint64(d))] flags) 1089 (SBCshiftRL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)>>uint64(d))] flags) 1090 (SBCshiftRA x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(c)>>uint64(d))] flags) 1091 (SUBSshiftLL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)<<uint64(d))]) 1092 (SUBSshiftRL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)>>uint64(d))]) 1093 (SUBSshiftRA x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(c)>>uint64(d))]) 1094 (RSBshiftLL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)<<uint64(d))]) 1095 (RSBshiftRL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)>>uint64(d))]) 1096 (RSBshiftRA x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(c)>>uint64(d))]) 1097 (RSCshiftLL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)<<uint64(d))] flags) 1098 (RSCshiftRL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)>>uint64(d))] flags) 1099 (RSCshiftRA x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(c)>>uint64(d))] flags) 1100 (RSBSshiftLL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)<<uint64(d))]) 1101 (RSBSshiftRL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)>>uint64(d))]) 1102 (RSBSshiftRA x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(c)>>uint64(d))]) 1103 (ANDshiftLL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)<<uint64(d))]) 1104 (ANDshiftRL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)>>uint64(d))]) 1105 (ANDshiftRA x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(c)>>uint64(d))]) 1106 (ORshiftLL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)<<uint64(d))]) 1107 (ORshiftRL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)>>uint64(d))]) 1108 (ORshiftRA x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(c)>>uint64(d))]) 1109 (XORshiftLL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)<<uint64(d))]) 1110 (XORshiftRL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)>>uint64(d))]) 1111 (XORshiftRA x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(c)>>uint64(d))]) 1112 (XORshiftRR x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)>>uint64(d)|uint32(c)<<uint64(32-d))]) 1113 (BICshiftLL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)<<uint64(d))]) 1114 (BICshiftRL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)>>uint64(d))]) 1115 (BICshiftRA x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(c)>>uint64(d))]) 1116 (MVNshiftLL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)<<uint64(d))]) 1117 (MVNshiftRL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)>>uint64(d))]) 1118 (MVNshiftRA (MOVWconst [c]) [d]) -> (MOVWconst [^int64(int32(c)>>uint64(d))]) 1119 (CMPshiftLL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)<<uint64(d))]) 1120 (CMPshiftRL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)>>uint64(d))]) 1121 (CMPshiftRA x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(c)>>uint64(d))]) 1122 1123 (ADDshiftLLreg x y (MOVWconst [c])) -> (ADDshiftLL x y [c]) 1124 (ADDshiftRLreg x y (MOVWconst [c])) -> (ADDshiftRL x y [c]) 1125 (ADDshiftRAreg x y (MOVWconst [c])) -> (ADDshiftRA x y [c]) 1126 (ADCshiftLLreg x y (MOVWconst [c]) flags) -> (ADCshiftLL x y [c] flags) 1127 (ADCshiftRLreg x y (MOVWconst [c]) flags) -> (ADCshiftRL x y [c] flags) 1128 (ADCshiftRAreg x y (MOVWconst [c]) flags) -> (ADCshiftRA x y [c] flags) 1129 (ADDSshiftLLreg x y (MOVWconst [c])) -> (ADDSshiftLL x y [c]) 1130 (ADDSshiftRLreg x y (MOVWconst [c])) -> (ADDSshiftRL x y [c]) 1131 (ADDSshiftRAreg x y (MOVWconst [c])) -> (ADDSshiftRA x y [c]) 1132 (SUBshiftLLreg x y (MOVWconst [c])) -> (SUBshiftLL x y [c]) 1133 (SUBshiftRLreg x y (MOVWconst [c])) -> (SUBshiftRL x y [c]) 1134 (SUBshiftRAreg x y (MOVWconst [c])) -> (SUBshiftRA x y [c]) 1135 (SBCshiftLLreg x y (MOVWconst [c]) flags) -> (SBCshiftLL x y [c] flags) 1136 (SBCshiftRLreg x y (MOVWconst [c]) flags) -> (SBCshiftRL x y [c] flags) 1137 (SBCshiftRAreg x y (MOVWconst [c]) flags) -> (SBCshiftRA x y [c] flags) 1138 (SUBSshiftLLreg x y (MOVWconst [c])) -> (SUBSshiftLL x y [c]) 1139 (SUBSshiftRLreg x y (MOVWconst [c])) -> (SUBSshiftRL x y [c]) 1140 (SUBSshiftRAreg x y (MOVWconst [c])) -> (SUBSshiftRA x y [c]) 1141 (RSBshiftLLreg x y (MOVWconst [c])) -> (RSBshiftLL x y [c]) 1142 (RSBshiftRLreg x y (MOVWconst [c])) -> (RSBshiftRL x y [c]) 1143 (RSBshiftRAreg x y (MOVWconst [c])) -> (RSBshiftRA x y [c]) 1144 (RSCshiftLLreg x y (MOVWconst [c]) flags) -> (RSCshiftLL x y [c] flags) 1145 (RSCshiftRLreg x y (MOVWconst [c]) flags) -> (RSCshiftRL x y [c] flags) 1146 (RSCshiftRAreg x y (MOVWconst [c]) flags) -> (RSCshiftRA x y [c] flags) 1147 (RSBSshiftLLreg x y (MOVWconst [c])) -> (RSBSshiftLL x y [c]) 1148 (RSBSshiftRLreg x y (MOVWconst [c])) -> (RSBSshiftRL x y [c]) 1149 (RSBSshiftRAreg x y (MOVWconst [c])) -> (RSBSshiftRA x y [c]) 1150 (ANDshiftLLreg x y (MOVWconst [c])) -> (ANDshiftLL x y [c]) 1151 (ANDshiftRLreg x y (MOVWconst [c])) -> (ANDshiftRL x y [c]) 1152 (ANDshiftRAreg x y (MOVWconst [c])) -> (ANDshiftRA x y [c]) 1153 (ORshiftLLreg x y (MOVWconst [c])) -> (ORshiftLL x y [c]) 1154 (ORshiftRLreg x y (MOVWconst [c])) -> (ORshiftRL x y [c]) 1155 (ORshiftRAreg x y (MOVWconst [c])) -> (ORshiftRA x y [c]) 1156 (XORshiftLLreg x y (MOVWconst [c])) -> (XORshiftLL x y [c]) 1157 (XORshiftRLreg x y (MOVWconst [c])) -> (XORshiftRL x y [c]) 1158 (XORshiftRAreg x y (MOVWconst [c])) -> (XORshiftRA x y [c]) 1159 (BICshiftLLreg x y (MOVWconst [c])) -> (BICshiftLL x y [c]) 1160 (BICshiftRLreg x y (MOVWconst [c])) -> (BICshiftRL x y [c]) 1161 (BICshiftRAreg x y (MOVWconst [c])) -> (BICshiftRA x y [c]) 1162 (MVNshiftLLreg x (MOVWconst [c])) -> (MVNshiftLL x [c]) 1163 (MVNshiftRLreg x (MOVWconst [c])) -> (MVNshiftRL x [c]) 1164 (MVNshiftRAreg x (MOVWconst [c])) -> (MVNshiftRA x [c]) 1165 (CMPshiftLLreg x y (MOVWconst [c])) -> (CMPshiftLL x y [c]) 1166 (CMPshiftRLreg x y (MOVWconst [c])) -> (CMPshiftRL x y [c]) 1167 (CMPshiftRAreg x y (MOVWconst [c])) -> (CMPshiftRA x y [c]) 1168 1169 // Generate rotates 1170 (ADDshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1171 ( ORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1172 (XORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1173 (ADDshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1174 ( ORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1175 (XORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1176 1177 // use indexed loads and stores 1178 (MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVWloadidx ptr idx mem) 1179 (MOVWstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVWstoreidx ptr idx val mem) 1180 (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftLL ptr idx [c] mem) 1181 (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRL ptr idx [c] mem) 1182 (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRA ptr idx [c] mem) 1183 (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftLL ptr idx [c] val mem) 1184 (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRL ptr idx [c] val mem) 1185 (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRA ptr idx [c] val mem) 1186 (MOVBUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBUloadidx ptr idx mem) 1187 (MOVBload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVBloadidx ptr idx mem) 1188 (MOVBstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVBstoreidx ptr idx val mem) 1189 (MOVHUload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHUloadidx ptr idx mem) 1190 (MOVHload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVHloadidx ptr idx mem) 1191 (MOVHstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVHstoreidx ptr idx val mem) 1192 1193 // constant folding in indexed loads and stores 1194 (MOVWloadidx ptr (MOVWconst [c]) mem) -> (MOVWload [c] ptr mem) 1195 (MOVWloadidx (MOVWconst [c]) ptr mem) -> (MOVWload [c] ptr mem) 1196 (MOVBloadidx ptr (MOVWconst [c]) mem) -> (MOVBload [c] ptr mem) 1197 (MOVBloadidx (MOVWconst [c]) ptr mem) -> (MOVBload [c] ptr mem) 1198 (MOVBUloadidx ptr (MOVWconst [c]) mem) -> (MOVBUload [c] ptr mem) 1199 (MOVBUloadidx (MOVWconst [c]) ptr mem) -> (MOVBUload [c] ptr mem) 1200 (MOVHUloadidx ptr (MOVWconst [c]) mem) -> (MOVHUload [c] ptr mem) 1201 (MOVHUloadidx (MOVWconst [c]) ptr mem) -> (MOVHUload [c] ptr mem) 1202 (MOVHloadidx ptr (MOVWconst [c]) mem) -> (MOVHload [c] ptr mem) 1203 (MOVHloadidx (MOVWconst [c]) ptr mem) -> (MOVHload [c] ptr mem) 1204 1205 (MOVWstoreidx ptr (MOVWconst [c]) val mem) -> (MOVWstore [c] ptr val mem) 1206 (MOVWstoreidx (MOVWconst [c]) ptr val mem) -> (MOVWstore [c] ptr val mem) 1207 (MOVBstoreidx ptr (MOVWconst [c]) val mem) -> (MOVBstore [c] ptr val mem) 1208 (MOVBstoreidx (MOVWconst [c]) ptr val mem) -> (MOVBstore [c] ptr val mem) 1209 (MOVHstoreidx ptr (MOVWconst [c]) val mem) -> (MOVHstore [c] ptr val mem) 1210 (MOVHstoreidx (MOVWconst [c]) ptr val mem) -> (MOVHstore [c] ptr val mem) 1211 1212 (MOVWloadidx ptr (SLLconst idx [c]) mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1213 (MOVWloadidx (SLLconst idx [c]) ptr mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1214 (MOVWloadidx ptr (SRLconst idx [c]) mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1215 (MOVWloadidx (SRLconst idx [c]) ptr mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1216 (MOVWloadidx ptr (SRAconst idx [c]) mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1217 (MOVWloadidx (SRAconst idx [c]) ptr mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1218 1219 (MOVWstoreidx ptr (SLLconst idx [c]) val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1220 (MOVWstoreidx (SLLconst idx [c]) ptr val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1221 (MOVWstoreidx ptr (SRLconst idx [c]) val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1222 (MOVWstoreidx (SRLconst idx [c]) ptr val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1223 (MOVWstoreidx ptr (SRAconst idx [c]) val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1224 (MOVWstoreidx (SRAconst idx [c]) ptr val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1225 1226 (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem) 1227 (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem) 1228 (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(int32(c)>>uint64(d))] ptr mem) 1229 1230 (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem) 1231 (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem) 1232 (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem) 1233 1234 // generic simplifications 1235 (ADD x (RSBconst [0] y)) -> (SUB x y) 1236 (ADD <t> (RSBconst [c] x) (RSBconst [d] y)) -> (RSBconst [c+d] (ADD <t> x y)) 1237 (SUB x x) -> (MOVWconst [0]) 1238 (RSB x x) -> (MOVWconst [0]) 1239 (AND x x) -> x 1240 (OR x x) -> x 1241 (XOR x x) -> (MOVWconst [0]) 1242 (BIC x x) -> (MOVWconst [0]) 1243 1244 (ADD (MUL x y) a) -> (MULA x y a) 1245 (SUB a (MUL x y)) && objabi.GOARM == 7 -> (MULS x y a) 1246 (RSB (MUL x y) a) && objabi.GOARM == 7 -> (MULS x y a) 1247 1248 (NEGF (MULF x y)) && objabi.GOARM >= 6 -> (NMULF x y) 1249 (NEGD (MULD x y)) && objabi.GOARM >= 6 -> (NMULD x y) 1250 (MULF (NEGF x) y) && objabi.GOARM >= 6 -> (NMULF x y) 1251 (MULD (NEGD x) y) && objabi.GOARM >= 6 -> (NMULD x y) 1252 (NMULF (NEGF x) y) -> (MULF x y) 1253 (NMULD (NEGD x) y) -> (MULD x y) 1254 1255 // the result will overwrite the addend, since they are in the same register 1256 (ADDF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) 1257 (ADDF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) 1258 (ADDD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) 1259 (ADDD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) 1260 (SUBF a (MULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSF a x y) 1261 (SUBF a (NMULF x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAF a x y) 1262 (SUBD a (MULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULSD a x y) 1263 (SUBD a (NMULD x y)) && a.Uses == 1 && objabi.GOARM >= 6 -> (MULAD a x y) 1264 1265 (AND x (MVN y)) -> (BIC x y) 1266 1267 // simplification with *shift ops 1268 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1269 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1270 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1271 (RSBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1272 (RSBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1273 (RSBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1274 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1275 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1276 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1277 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1278 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1279 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1280 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1281 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1282 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1283 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1284 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1285 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1286 (AND x (MVNshiftLL y [c])) -> (BICshiftLL x y [c]) 1287 (AND x (MVNshiftRL y [c])) -> (BICshiftRL x y [c]) 1288 (AND x (MVNshiftRA y [c])) -> (BICshiftRA x y [c]) 1289 1290 // floating point optimizations 1291 (CMPF x (MOVFconst [0])) -> (CMPF0 x) 1292 (CMPD x (MOVDconst [0])) -> (CMPD0 x) 1293 1294 // bit extraction 1295 (SRAconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFX [(d-c)|(32-d)<<8] x) 1296 (SRLconst (SLLconst x [c]) [d]) && objabi.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 -> (BFXU [(d-c)|(32-d)<<8] x)