github.com/megatontech/mynoteforgo@v0.0.0-20200507084910-5d0c6ea6e890/源码/cmd/compile/internal/ssa/rewritePPC64.go (about)

     1  // Code generated from gen/PPC64.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "fmt"
     7  import "math"
     8  import "cmd/internal/obj"
     9  import "cmd/internal/objabi"
    10  import "cmd/compile/internal/types"
    11  
    12  var _ = fmt.Println   // in case not otherwise used
    13  var _ = math.MinInt8  // in case not otherwise used
    14  var _ = obj.ANOP      // in case not otherwise used
    15  var _ = objabi.GOROOT // in case not otherwise used
    16  var _ = types.TypeMem // in case not otherwise used
    17  
    18  func rewriteValuePPC64(v *Value) bool {
    19  	switch v.Op {
    20  	case OpAbs:
    21  		return rewriteValuePPC64_OpAbs_0(v)
    22  	case OpAdd16:
    23  		return rewriteValuePPC64_OpAdd16_0(v)
    24  	case OpAdd32:
    25  		return rewriteValuePPC64_OpAdd32_0(v)
    26  	case OpAdd32F:
    27  		return rewriteValuePPC64_OpAdd32F_0(v)
    28  	case OpAdd64:
    29  		return rewriteValuePPC64_OpAdd64_0(v)
    30  	case OpAdd64F:
    31  		return rewriteValuePPC64_OpAdd64F_0(v)
    32  	case OpAdd8:
    33  		return rewriteValuePPC64_OpAdd8_0(v)
    34  	case OpAddPtr:
    35  		return rewriteValuePPC64_OpAddPtr_0(v)
    36  	case OpAddr:
    37  		return rewriteValuePPC64_OpAddr_0(v)
    38  	case OpAnd16:
    39  		return rewriteValuePPC64_OpAnd16_0(v)
    40  	case OpAnd32:
    41  		return rewriteValuePPC64_OpAnd32_0(v)
    42  	case OpAnd64:
    43  		return rewriteValuePPC64_OpAnd64_0(v)
    44  	case OpAnd8:
    45  		return rewriteValuePPC64_OpAnd8_0(v)
    46  	case OpAndB:
    47  		return rewriteValuePPC64_OpAndB_0(v)
    48  	case OpAtomicAdd32:
    49  		return rewriteValuePPC64_OpAtomicAdd32_0(v)
    50  	case OpAtomicAdd64:
    51  		return rewriteValuePPC64_OpAtomicAdd64_0(v)
    52  	case OpAtomicAnd8:
    53  		return rewriteValuePPC64_OpAtomicAnd8_0(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
    56  	case OpAtomicCompareAndSwap64:
    57  		return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
    58  	case OpAtomicCompareAndSwapRel32:
    59  		return rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v)
    60  	case OpAtomicExchange32:
    61  		return rewriteValuePPC64_OpAtomicExchange32_0(v)
    62  	case OpAtomicExchange64:
    63  		return rewriteValuePPC64_OpAtomicExchange64_0(v)
    64  	case OpAtomicLoad32:
    65  		return rewriteValuePPC64_OpAtomicLoad32_0(v)
    66  	case OpAtomicLoad64:
    67  		return rewriteValuePPC64_OpAtomicLoad64_0(v)
    68  	case OpAtomicLoadAcq32:
    69  		return rewriteValuePPC64_OpAtomicLoadAcq32_0(v)
    70  	case OpAtomicLoadPtr:
    71  		return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
    72  	case OpAtomicOr8:
    73  		return rewriteValuePPC64_OpAtomicOr8_0(v)
    74  	case OpAtomicStore32:
    75  		return rewriteValuePPC64_OpAtomicStore32_0(v)
    76  	case OpAtomicStore64:
    77  		return rewriteValuePPC64_OpAtomicStore64_0(v)
    78  	case OpAtomicStoreRel32:
    79  		return rewriteValuePPC64_OpAtomicStoreRel32_0(v)
    80  	case OpAvg64u:
    81  		return rewriteValuePPC64_OpAvg64u_0(v)
    82  	case OpBitLen32:
    83  		return rewriteValuePPC64_OpBitLen32_0(v)
    84  	case OpBitLen64:
    85  		return rewriteValuePPC64_OpBitLen64_0(v)
    86  	case OpCeil:
    87  		return rewriteValuePPC64_OpCeil_0(v)
    88  	case OpClosureCall:
    89  		return rewriteValuePPC64_OpClosureCall_0(v)
    90  	case OpCom16:
    91  		return rewriteValuePPC64_OpCom16_0(v)
    92  	case OpCom32:
    93  		return rewriteValuePPC64_OpCom32_0(v)
    94  	case OpCom64:
    95  		return rewriteValuePPC64_OpCom64_0(v)
    96  	case OpCom8:
    97  		return rewriteValuePPC64_OpCom8_0(v)
    98  	case OpConst16:
    99  		return rewriteValuePPC64_OpConst16_0(v)
   100  	case OpConst32:
   101  		return rewriteValuePPC64_OpConst32_0(v)
   102  	case OpConst32F:
   103  		return rewriteValuePPC64_OpConst32F_0(v)
   104  	case OpConst64:
   105  		return rewriteValuePPC64_OpConst64_0(v)
   106  	case OpConst64F:
   107  		return rewriteValuePPC64_OpConst64F_0(v)
   108  	case OpConst8:
   109  		return rewriteValuePPC64_OpConst8_0(v)
   110  	case OpConstBool:
   111  		return rewriteValuePPC64_OpConstBool_0(v)
   112  	case OpConstNil:
   113  		return rewriteValuePPC64_OpConstNil_0(v)
   114  	case OpCopysign:
   115  		return rewriteValuePPC64_OpCopysign_0(v)
   116  	case OpCtz16:
   117  		return rewriteValuePPC64_OpCtz16_0(v)
   118  	case OpCtz32:
   119  		return rewriteValuePPC64_OpCtz32_0(v)
   120  	case OpCtz32NonZero:
   121  		return rewriteValuePPC64_OpCtz32NonZero_0(v)
   122  	case OpCtz64:
   123  		return rewriteValuePPC64_OpCtz64_0(v)
   124  	case OpCtz64NonZero:
   125  		return rewriteValuePPC64_OpCtz64NonZero_0(v)
   126  	case OpCtz8:
   127  		return rewriteValuePPC64_OpCtz8_0(v)
   128  	case OpCvt32Fto32:
   129  		return rewriteValuePPC64_OpCvt32Fto32_0(v)
   130  	case OpCvt32Fto64:
   131  		return rewriteValuePPC64_OpCvt32Fto64_0(v)
   132  	case OpCvt32Fto64F:
   133  		return rewriteValuePPC64_OpCvt32Fto64F_0(v)
   134  	case OpCvt32to32F:
   135  		return rewriteValuePPC64_OpCvt32to32F_0(v)
   136  	case OpCvt32to64F:
   137  		return rewriteValuePPC64_OpCvt32to64F_0(v)
   138  	case OpCvt64Fto32:
   139  		return rewriteValuePPC64_OpCvt64Fto32_0(v)
   140  	case OpCvt64Fto32F:
   141  		return rewriteValuePPC64_OpCvt64Fto32F_0(v)
   142  	case OpCvt64Fto64:
   143  		return rewriteValuePPC64_OpCvt64Fto64_0(v)
   144  	case OpCvt64to32F:
   145  		return rewriteValuePPC64_OpCvt64to32F_0(v)
   146  	case OpCvt64to64F:
   147  		return rewriteValuePPC64_OpCvt64to64F_0(v)
   148  	case OpDiv16:
   149  		return rewriteValuePPC64_OpDiv16_0(v)
   150  	case OpDiv16u:
   151  		return rewriteValuePPC64_OpDiv16u_0(v)
   152  	case OpDiv32:
   153  		return rewriteValuePPC64_OpDiv32_0(v)
   154  	case OpDiv32F:
   155  		return rewriteValuePPC64_OpDiv32F_0(v)
   156  	case OpDiv32u:
   157  		return rewriteValuePPC64_OpDiv32u_0(v)
   158  	case OpDiv64:
   159  		return rewriteValuePPC64_OpDiv64_0(v)
   160  	case OpDiv64F:
   161  		return rewriteValuePPC64_OpDiv64F_0(v)
   162  	case OpDiv64u:
   163  		return rewriteValuePPC64_OpDiv64u_0(v)
   164  	case OpDiv8:
   165  		return rewriteValuePPC64_OpDiv8_0(v)
   166  	case OpDiv8u:
   167  		return rewriteValuePPC64_OpDiv8u_0(v)
   168  	case OpEq16:
   169  		return rewriteValuePPC64_OpEq16_0(v)
   170  	case OpEq32:
   171  		return rewriteValuePPC64_OpEq32_0(v)
   172  	case OpEq32F:
   173  		return rewriteValuePPC64_OpEq32F_0(v)
   174  	case OpEq64:
   175  		return rewriteValuePPC64_OpEq64_0(v)
   176  	case OpEq64F:
   177  		return rewriteValuePPC64_OpEq64F_0(v)
   178  	case OpEq8:
   179  		return rewriteValuePPC64_OpEq8_0(v)
   180  	case OpEqB:
   181  		return rewriteValuePPC64_OpEqB_0(v)
   182  	case OpEqPtr:
   183  		return rewriteValuePPC64_OpEqPtr_0(v)
   184  	case OpFloor:
   185  		return rewriteValuePPC64_OpFloor_0(v)
   186  	case OpGeq16:
   187  		return rewriteValuePPC64_OpGeq16_0(v)
   188  	case OpGeq16U:
   189  		return rewriteValuePPC64_OpGeq16U_0(v)
   190  	case OpGeq32:
   191  		return rewriteValuePPC64_OpGeq32_0(v)
   192  	case OpGeq32F:
   193  		return rewriteValuePPC64_OpGeq32F_0(v)
   194  	case OpGeq32U:
   195  		return rewriteValuePPC64_OpGeq32U_0(v)
   196  	case OpGeq64:
   197  		return rewriteValuePPC64_OpGeq64_0(v)
   198  	case OpGeq64F:
   199  		return rewriteValuePPC64_OpGeq64F_0(v)
   200  	case OpGeq64U:
   201  		return rewriteValuePPC64_OpGeq64U_0(v)
   202  	case OpGeq8:
   203  		return rewriteValuePPC64_OpGeq8_0(v)
   204  	case OpGeq8U:
   205  		return rewriteValuePPC64_OpGeq8U_0(v)
   206  	case OpGetCallerPC:
   207  		return rewriteValuePPC64_OpGetCallerPC_0(v)
   208  	case OpGetCallerSP:
   209  		return rewriteValuePPC64_OpGetCallerSP_0(v)
   210  	case OpGetClosurePtr:
   211  		return rewriteValuePPC64_OpGetClosurePtr_0(v)
   212  	case OpGreater16:
   213  		return rewriteValuePPC64_OpGreater16_0(v)
   214  	case OpGreater16U:
   215  		return rewriteValuePPC64_OpGreater16U_0(v)
   216  	case OpGreater32:
   217  		return rewriteValuePPC64_OpGreater32_0(v)
   218  	case OpGreater32F:
   219  		return rewriteValuePPC64_OpGreater32F_0(v)
   220  	case OpGreater32U:
   221  		return rewriteValuePPC64_OpGreater32U_0(v)
   222  	case OpGreater64:
   223  		return rewriteValuePPC64_OpGreater64_0(v)
   224  	case OpGreater64F:
   225  		return rewriteValuePPC64_OpGreater64F_0(v)
   226  	case OpGreater64U:
   227  		return rewriteValuePPC64_OpGreater64U_0(v)
   228  	case OpGreater8:
   229  		return rewriteValuePPC64_OpGreater8_0(v)
   230  	case OpGreater8U:
   231  		return rewriteValuePPC64_OpGreater8U_0(v)
   232  	case OpHmul32:
   233  		return rewriteValuePPC64_OpHmul32_0(v)
   234  	case OpHmul32u:
   235  		return rewriteValuePPC64_OpHmul32u_0(v)
   236  	case OpHmul64:
   237  		return rewriteValuePPC64_OpHmul64_0(v)
   238  	case OpHmul64u:
   239  		return rewriteValuePPC64_OpHmul64u_0(v)
   240  	case OpInterCall:
   241  		return rewriteValuePPC64_OpInterCall_0(v)
   242  	case OpIsInBounds:
   243  		return rewriteValuePPC64_OpIsInBounds_0(v)
   244  	case OpIsNonNil:
   245  		return rewriteValuePPC64_OpIsNonNil_0(v)
   246  	case OpIsSliceInBounds:
   247  		return rewriteValuePPC64_OpIsSliceInBounds_0(v)
   248  	case OpLeq16:
   249  		return rewriteValuePPC64_OpLeq16_0(v)
   250  	case OpLeq16U:
   251  		return rewriteValuePPC64_OpLeq16U_0(v)
   252  	case OpLeq32:
   253  		return rewriteValuePPC64_OpLeq32_0(v)
   254  	case OpLeq32F:
   255  		return rewriteValuePPC64_OpLeq32F_0(v)
   256  	case OpLeq32U:
   257  		return rewriteValuePPC64_OpLeq32U_0(v)
   258  	case OpLeq64:
   259  		return rewriteValuePPC64_OpLeq64_0(v)
   260  	case OpLeq64F:
   261  		return rewriteValuePPC64_OpLeq64F_0(v)
   262  	case OpLeq64U:
   263  		return rewriteValuePPC64_OpLeq64U_0(v)
   264  	case OpLeq8:
   265  		return rewriteValuePPC64_OpLeq8_0(v)
   266  	case OpLeq8U:
   267  		return rewriteValuePPC64_OpLeq8U_0(v)
   268  	case OpLess16:
   269  		return rewriteValuePPC64_OpLess16_0(v)
   270  	case OpLess16U:
   271  		return rewriteValuePPC64_OpLess16U_0(v)
   272  	case OpLess32:
   273  		return rewriteValuePPC64_OpLess32_0(v)
   274  	case OpLess32F:
   275  		return rewriteValuePPC64_OpLess32F_0(v)
   276  	case OpLess32U:
   277  		return rewriteValuePPC64_OpLess32U_0(v)
   278  	case OpLess64:
   279  		return rewriteValuePPC64_OpLess64_0(v)
   280  	case OpLess64F:
   281  		return rewriteValuePPC64_OpLess64F_0(v)
   282  	case OpLess64U:
   283  		return rewriteValuePPC64_OpLess64U_0(v)
   284  	case OpLess8:
   285  		return rewriteValuePPC64_OpLess8_0(v)
   286  	case OpLess8U:
   287  		return rewriteValuePPC64_OpLess8U_0(v)
   288  	case OpLoad:
   289  		return rewriteValuePPC64_OpLoad_0(v)
   290  	case OpLocalAddr:
   291  		return rewriteValuePPC64_OpLocalAddr_0(v)
   292  	case OpLsh16x16:
   293  		return rewriteValuePPC64_OpLsh16x16_0(v)
   294  	case OpLsh16x32:
   295  		return rewriteValuePPC64_OpLsh16x32_0(v)
   296  	case OpLsh16x64:
   297  		return rewriteValuePPC64_OpLsh16x64_0(v)
   298  	case OpLsh16x8:
   299  		return rewriteValuePPC64_OpLsh16x8_0(v)
   300  	case OpLsh32x16:
   301  		return rewriteValuePPC64_OpLsh32x16_0(v)
   302  	case OpLsh32x32:
   303  		return rewriteValuePPC64_OpLsh32x32_0(v)
   304  	case OpLsh32x64:
   305  		return rewriteValuePPC64_OpLsh32x64_0(v)
   306  	case OpLsh32x8:
   307  		return rewriteValuePPC64_OpLsh32x8_0(v)
   308  	case OpLsh64x16:
   309  		return rewriteValuePPC64_OpLsh64x16_0(v)
   310  	case OpLsh64x32:
   311  		return rewriteValuePPC64_OpLsh64x32_0(v)
   312  	case OpLsh64x64:
   313  		return rewriteValuePPC64_OpLsh64x64_0(v)
   314  	case OpLsh64x8:
   315  		return rewriteValuePPC64_OpLsh64x8_0(v)
   316  	case OpLsh8x16:
   317  		return rewriteValuePPC64_OpLsh8x16_0(v)
   318  	case OpLsh8x32:
   319  		return rewriteValuePPC64_OpLsh8x32_0(v)
   320  	case OpLsh8x64:
   321  		return rewriteValuePPC64_OpLsh8x64_0(v)
   322  	case OpLsh8x8:
   323  		return rewriteValuePPC64_OpLsh8x8_0(v)
   324  	case OpMod16:
   325  		return rewriteValuePPC64_OpMod16_0(v)
   326  	case OpMod16u:
   327  		return rewriteValuePPC64_OpMod16u_0(v)
   328  	case OpMod32:
   329  		return rewriteValuePPC64_OpMod32_0(v)
   330  	case OpMod32u:
   331  		return rewriteValuePPC64_OpMod32u_0(v)
   332  	case OpMod64:
   333  		return rewriteValuePPC64_OpMod64_0(v)
   334  	case OpMod64u:
   335  		return rewriteValuePPC64_OpMod64u_0(v)
   336  	case OpMod8:
   337  		return rewriteValuePPC64_OpMod8_0(v)
   338  	case OpMod8u:
   339  		return rewriteValuePPC64_OpMod8u_0(v)
   340  	case OpMove:
   341  		return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
   342  	case OpMul16:
   343  		return rewriteValuePPC64_OpMul16_0(v)
   344  	case OpMul32:
   345  		return rewriteValuePPC64_OpMul32_0(v)
   346  	case OpMul32F:
   347  		return rewriteValuePPC64_OpMul32F_0(v)
   348  	case OpMul64:
   349  		return rewriteValuePPC64_OpMul64_0(v)
   350  	case OpMul64F:
   351  		return rewriteValuePPC64_OpMul64F_0(v)
   352  	case OpMul64uhilo:
   353  		return rewriteValuePPC64_OpMul64uhilo_0(v)
   354  	case OpMul8:
   355  		return rewriteValuePPC64_OpMul8_0(v)
   356  	case OpNeg16:
   357  		return rewriteValuePPC64_OpNeg16_0(v)
   358  	case OpNeg32:
   359  		return rewriteValuePPC64_OpNeg32_0(v)
   360  	case OpNeg32F:
   361  		return rewriteValuePPC64_OpNeg32F_0(v)
   362  	case OpNeg64:
   363  		return rewriteValuePPC64_OpNeg64_0(v)
   364  	case OpNeg64F:
   365  		return rewriteValuePPC64_OpNeg64F_0(v)
   366  	case OpNeg8:
   367  		return rewriteValuePPC64_OpNeg8_0(v)
   368  	case OpNeq16:
   369  		return rewriteValuePPC64_OpNeq16_0(v)
   370  	case OpNeq32:
   371  		return rewriteValuePPC64_OpNeq32_0(v)
   372  	case OpNeq32F:
   373  		return rewriteValuePPC64_OpNeq32F_0(v)
   374  	case OpNeq64:
   375  		return rewriteValuePPC64_OpNeq64_0(v)
   376  	case OpNeq64F:
   377  		return rewriteValuePPC64_OpNeq64F_0(v)
   378  	case OpNeq8:
   379  		return rewriteValuePPC64_OpNeq8_0(v)
   380  	case OpNeqB:
   381  		return rewriteValuePPC64_OpNeqB_0(v)
   382  	case OpNeqPtr:
   383  		return rewriteValuePPC64_OpNeqPtr_0(v)
   384  	case OpNilCheck:
   385  		return rewriteValuePPC64_OpNilCheck_0(v)
   386  	case OpNot:
   387  		return rewriteValuePPC64_OpNot_0(v)
   388  	case OpOffPtr:
   389  		return rewriteValuePPC64_OpOffPtr_0(v)
   390  	case OpOr16:
   391  		return rewriteValuePPC64_OpOr16_0(v)
   392  	case OpOr32:
   393  		return rewriteValuePPC64_OpOr32_0(v)
   394  	case OpOr64:
   395  		return rewriteValuePPC64_OpOr64_0(v)
   396  	case OpOr8:
   397  		return rewriteValuePPC64_OpOr8_0(v)
   398  	case OpOrB:
   399  		return rewriteValuePPC64_OpOrB_0(v)
   400  	case OpPPC64ADD:
   401  		return rewriteValuePPC64_OpPPC64ADD_0(v)
   402  	case OpPPC64ADDconst:
   403  		return rewriteValuePPC64_OpPPC64ADDconst_0(v)
   404  	case OpPPC64AND:
   405  		return rewriteValuePPC64_OpPPC64AND_0(v) || rewriteValuePPC64_OpPPC64AND_10(v)
   406  	case OpPPC64ANDconst:
   407  		return rewriteValuePPC64_OpPPC64ANDconst_0(v) || rewriteValuePPC64_OpPPC64ANDconst_10(v)
   408  	case OpPPC64CMP:
   409  		return rewriteValuePPC64_OpPPC64CMP_0(v)
   410  	case OpPPC64CMPU:
   411  		return rewriteValuePPC64_OpPPC64CMPU_0(v)
   412  	case OpPPC64CMPUconst:
   413  		return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
   414  	case OpPPC64CMPW:
   415  		return rewriteValuePPC64_OpPPC64CMPW_0(v)
   416  	case OpPPC64CMPWU:
   417  		return rewriteValuePPC64_OpPPC64CMPWU_0(v)
   418  	case OpPPC64CMPWUconst:
   419  		return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
   420  	case OpPPC64CMPWconst:
   421  		return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
   422  	case OpPPC64CMPconst:
   423  		return rewriteValuePPC64_OpPPC64CMPconst_0(v)
   424  	case OpPPC64Equal:
   425  		return rewriteValuePPC64_OpPPC64Equal_0(v)
   426  	case OpPPC64FABS:
   427  		return rewriteValuePPC64_OpPPC64FABS_0(v)
   428  	case OpPPC64FADD:
   429  		return rewriteValuePPC64_OpPPC64FADD_0(v)
   430  	case OpPPC64FADDS:
   431  		return rewriteValuePPC64_OpPPC64FADDS_0(v)
   432  	case OpPPC64FCEIL:
   433  		return rewriteValuePPC64_OpPPC64FCEIL_0(v)
   434  	case OpPPC64FFLOOR:
   435  		return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
   436  	case OpPPC64FMOVDload:
   437  		return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
   438  	case OpPPC64FMOVDstore:
   439  		return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
   440  	case OpPPC64FMOVSload:
   441  		return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
   442  	case OpPPC64FMOVSstore:
   443  		return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
   444  	case OpPPC64FNEG:
   445  		return rewriteValuePPC64_OpPPC64FNEG_0(v)
   446  	case OpPPC64FSQRT:
   447  		return rewriteValuePPC64_OpPPC64FSQRT_0(v)
   448  	case OpPPC64FSUB:
   449  		return rewriteValuePPC64_OpPPC64FSUB_0(v)
   450  	case OpPPC64FSUBS:
   451  		return rewriteValuePPC64_OpPPC64FSUBS_0(v)
   452  	case OpPPC64FTRUNC:
   453  		return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
   454  	case OpPPC64GreaterEqual:
   455  		return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
   456  	case OpPPC64GreaterThan:
   457  		return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
   458  	case OpPPC64LessEqual:
   459  		return rewriteValuePPC64_OpPPC64LessEqual_0(v)
   460  	case OpPPC64LessThan:
   461  		return rewriteValuePPC64_OpPPC64LessThan_0(v)
   462  	case OpPPC64MFVSRD:
   463  		return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
   464  	case OpPPC64MOVBZload:
   465  		return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
   466  	case OpPPC64MOVBZloadidx:
   467  		return rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v)
   468  	case OpPPC64MOVBZreg:
   469  		return rewriteValuePPC64_OpPPC64MOVBZreg_0(v) || rewriteValuePPC64_OpPPC64MOVBZreg_10(v)
   470  	case OpPPC64MOVBreg:
   471  		return rewriteValuePPC64_OpPPC64MOVBreg_0(v) || rewriteValuePPC64_OpPPC64MOVBreg_10(v)
   472  	case OpPPC64MOVBstore:
   473  		return rewriteValuePPC64_OpPPC64MOVBstore_0(v) || rewriteValuePPC64_OpPPC64MOVBstore_10(v) || rewriteValuePPC64_OpPPC64MOVBstore_20(v)
   474  	case OpPPC64MOVBstoreidx:
   475  		return rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v) || rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v)
   476  	case OpPPC64MOVBstorezero:
   477  		return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
   478  	case OpPPC64MOVDload:
   479  		return rewriteValuePPC64_OpPPC64MOVDload_0(v)
   480  	case OpPPC64MOVDloadidx:
   481  		return rewriteValuePPC64_OpPPC64MOVDloadidx_0(v)
   482  	case OpPPC64MOVDstore:
   483  		return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
   484  	case OpPPC64MOVDstoreidx:
   485  		return rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v)
   486  	case OpPPC64MOVDstorezero:
   487  		return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
   488  	case OpPPC64MOVHBRstore:
   489  		return rewriteValuePPC64_OpPPC64MOVHBRstore_0(v)
   490  	case OpPPC64MOVHZload:
   491  		return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
   492  	case OpPPC64MOVHZloadidx:
   493  		return rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v)
   494  	case OpPPC64MOVHZreg:
   495  		return rewriteValuePPC64_OpPPC64MOVHZreg_0(v) || rewriteValuePPC64_OpPPC64MOVHZreg_10(v)
   496  	case OpPPC64MOVHload:
   497  		return rewriteValuePPC64_OpPPC64MOVHload_0(v)
   498  	case OpPPC64MOVHloadidx:
   499  		return rewriteValuePPC64_OpPPC64MOVHloadidx_0(v)
   500  	case OpPPC64MOVHreg:
   501  		return rewriteValuePPC64_OpPPC64MOVHreg_0(v) || rewriteValuePPC64_OpPPC64MOVHreg_10(v)
   502  	case OpPPC64MOVHstore:
   503  		return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
   504  	case OpPPC64MOVHstoreidx:
   505  		return rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v)
   506  	case OpPPC64MOVHstorezero:
   507  		return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
   508  	case OpPPC64MOVWBRstore:
   509  		return rewriteValuePPC64_OpPPC64MOVWBRstore_0(v)
   510  	case OpPPC64MOVWZload:
   511  		return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
   512  	case OpPPC64MOVWZloadidx:
   513  		return rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v)
   514  	case OpPPC64MOVWZreg:
   515  		return rewriteValuePPC64_OpPPC64MOVWZreg_0(v) || rewriteValuePPC64_OpPPC64MOVWZreg_10(v) || rewriteValuePPC64_OpPPC64MOVWZreg_20(v)
   516  	case OpPPC64MOVWload:
   517  		return rewriteValuePPC64_OpPPC64MOVWload_0(v)
   518  	case OpPPC64MOVWloadidx:
   519  		return rewriteValuePPC64_OpPPC64MOVWloadidx_0(v)
   520  	case OpPPC64MOVWreg:
   521  		return rewriteValuePPC64_OpPPC64MOVWreg_0(v) || rewriteValuePPC64_OpPPC64MOVWreg_10(v)
   522  	case OpPPC64MOVWstore:
   523  		return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
   524  	case OpPPC64MOVWstoreidx:
   525  		return rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v)
   526  	case OpPPC64MOVWstorezero:
   527  		return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
   528  	case OpPPC64MTVSRD:
   529  		return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
   530  	case OpPPC64MaskIfNotCarry:
   531  		return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
   532  	case OpPPC64NotEqual:
   533  		return rewriteValuePPC64_OpPPC64NotEqual_0(v)
   534  	case OpPPC64OR:
   535  		return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v)
   536  	case OpPPC64ORN:
   537  		return rewriteValuePPC64_OpPPC64ORN_0(v)
   538  	case OpPPC64ORconst:
   539  		return rewriteValuePPC64_OpPPC64ORconst_0(v)
   540  	case OpPPC64SUB:
   541  		return rewriteValuePPC64_OpPPC64SUB_0(v)
   542  	case OpPPC64XOR:
   543  		return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
   544  	case OpPPC64XORconst:
   545  		return rewriteValuePPC64_OpPPC64XORconst_0(v)
   546  	case OpPopCount16:
   547  		return rewriteValuePPC64_OpPopCount16_0(v)
   548  	case OpPopCount32:
   549  		return rewriteValuePPC64_OpPopCount32_0(v)
   550  	case OpPopCount64:
   551  		return rewriteValuePPC64_OpPopCount64_0(v)
   552  	case OpPopCount8:
   553  		return rewriteValuePPC64_OpPopCount8_0(v)
   554  	case OpRound:
   555  		return rewriteValuePPC64_OpRound_0(v)
   556  	case OpRound32F:
   557  		return rewriteValuePPC64_OpRound32F_0(v)
   558  	case OpRound64F:
   559  		return rewriteValuePPC64_OpRound64F_0(v)
   560  	case OpRsh16Ux16:
   561  		return rewriteValuePPC64_OpRsh16Ux16_0(v)
   562  	case OpRsh16Ux32:
   563  		return rewriteValuePPC64_OpRsh16Ux32_0(v)
   564  	case OpRsh16Ux64:
   565  		return rewriteValuePPC64_OpRsh16Ux64_0(v)
   566  	case OpRsh16Ux8:
   567  		return rewriteValuePPC64_OpRsh16Ux8_0(v)
   568  	case OpRsh16x16:
   569  		return rewriteValuePPC64_OpRsh16x16_0(v)
   570  	case OpRsh16x32:
   571  		return rewriteValuePPC64_OpRsh16x32_0(v)
   572  	case OpRsh16x64:
   573  		return rewriteValuePPC64_OpRsh16x64_0(v)
   574  	case OpRsh16x8:
   575  		return rewriteValuePPC64_OpRsh16x8_0(v)
   576  	case OpRsh32Ux16:
   577  		return rewriteValuePPC64_OpRsh32Ux16_0(v)
   578  	case OpRsh32Ux32:
   579  		return rewriteValuePPC64_OpRsh32Ux32_0(v)
   580  	case OpRsh32Ux64:
   581  		return rewriteValuePPC64_OpRsh32Ux64_0(v) || rewriteValuePPC64_OpRsh32Ux64_10(v)
   582  	case OpRsh32Ux8:
   583  		return rewriteValuePPC64_OpRsh32Ux8_0(v)
   584  	case OpRsh32x16:
   585  		return rewriteValuePPC64_OpRsh32x16_0(v)
   586  	case OpRsh32x32:
   587  		return rewriteValuePPC64_OpRsh32x32_0(v)
   588  	case OpRsh32x64:
   589  		return rewriteValuePPC64_OpRsh32x64_0(v) || rewriteValuePPC64_OpRsh32x64_10(v)
   590  	case OpRsh32x8:
   591  		return rewriteValuePPC64_OpRsh32x8_0(v)
   592  	case OpRsh64Ux16:
   593  		return rewriteValuePPC64_OpRsh64Ux16_0(v)
   594  	case OpRsh64Ux32:
   595  		return rewriteValuePPC64_OpRsh64Ux32_0(v)
   596  	case OpRsh64Ux64:
   597  		return rewriteValuePPC64_OpRsh64Ux64_0(v) || rewriteValuePPC64_OpRsh64Ux64_10(v)
   598  	case OpRsh64Ux8:
   599  		return rewriteValuePPC64_OpRsh64Ux8_0(v)
   600  	case OpRsh64x16:
   601  		return rewriteValuePPC64_OpRsh64x16_0(v)
   602  	case OpRsh64x32:
   603  		return rewriteValuePPC64_OpRsh64x32_0(v)
   604  	case OpRsh64x64:
   605  		return rewriteValuePPC64_OpRsh64x64_0(v) || rewriteValuePPC64_OpRsh64x64_10(v)
   606  	case OpRsh64x8:
   607  		return rewriteValuePPC64_OpRsh64x8_0(v)
   608  	case OpRsh8Ux16:
   609  		return rewriteValuePPC64_OpRsh8Ux16_0(v)
   610  	case OpRsh8Ux32:
   611  		return rewriteValuePPC64_OpRsh8Ux32_0(v)
   612  	case OpRsh8Ux64:
   613  		return rewriteValuePPC64_OpRsh8Ux64_0(v)
   614  	case OpRsh8Ux8:
   615  		return rewriteValuePPC64_OpRsh8Ux8_0(v)
   616  	case OpRsh8x16:
   617  		return rewriteValuePPC64_OpRsh8x16_0(v)
   618  	case OpRsh8x32:
   619  		return rewriteValuePPC64_OpRsh8x32_0(v)
   620  	case OpRsh8x64:
   621  		return rewriteValuePPC64_OpRsh8x64_0(v)
   622  	case OpRsh8x8:
   623  		return rewriteValuePPC64_OpRsh8x8_0(v)
   624  	case OpSignExt16to32:
   625  		return rewriteValuePPC64_OpSignExt16to32_0(v)
   626  	case OpSignExt16to64:
   627  		return rewriteValuePPC64_OpSignExt16to64_0(v)
   628  	case OpSignExt32to64:
   629  		return rewriteValuePPC64_OpSignExt32to64_0(v)
   630  	case OpSignExt8to16:
   631  		return rewriteValuePPC64_OpSignExt8to16_0(v)
   632  	case OpSignExt8to32:
   633  		return rewriteValuePPC64_OpSignExt8to32_0(v)
   634  	case OpSignExt8to64:
   635  		return rewriteValuePPC64_OpSignExt8to64_0(v)
   636  	case OpSlicemask:
   637  		return rewriteValuePPC64_OpSlicemask_0(v)
   638  	case OpSqrt:
   639  		return rewriteValuePPC64_OpSqrt_0(v)
   640  	case OpStaticCall:
   641  		return rewriteValuePPC64_OpStaticCall_0(v)
   642  	case OpStore:
   643  		return rewriteValuePPC64_OpStore_0(v)
   644  	case OpSub16:
   645  		return rewriteValuePPC64_OpSub16_0(v)
   646  	case OpSub32:
   647  		return rewriteValuePPC64_OpSub32_0(v)
   648  	case OpSub32F:
   649  		return rewriteValuePPC64_OpSub32F_0(v)
   650  	case OpSub64:
   651  		return rewriteValuePPC64_OpSub64_0(v)
   652  	case OpSub64F:
   653  		return rewriteValuePPC64_OpSub64F_0(v)
   654  	case OpSub8:
   655  		return rewriteValuePPC64_OpSub8_0(v)
   656  	case OpSubPtr:
   657  		return rewriteValuePPC64_OpSubPtr_0(v)
   658  	case OpTrunc:
   659  		return rewriteValuePPC64_OpTrunc_0(v)
   660  	case OpTrunc16to8:
   661  		return rewriteValuePPC64_OpTrunc16to8_0(v)
   662  	case OpTrunc32to16:
   663  		return rewriteValuePPC64_OpTrunc32to16_0(v)
   664  	case OpTrunc32to8:
   665  		return rewriteValuePPC64_OpTrunc32to8_0(v)
   666  	case OpTrunc64to16:
   667  		return rewriteValuePPC64_OpTrunc64to16_0(v)
   668  	case OpTrunc64to32:
   669  		return rewriteValuePPC64_OpTrunc64to32_0(v)
   670  	case OpTrunc64to8:
   671  		return rewriteValuePPC64_OpTrunc64to8_0(v)
   672  	case OpWB:
   673  		return rewriteValuePPC64_OpWB_0(v)
   674  	case OpXor16:
   675  		return rewriteValuePPC64_OpXor16_0(v)
   676  	case OpXor32:
   677  		return rewriteValuePPC64_OpXor32_0(v)
   678  	case OpXor64:
   679  		return rewriteValuePPC64_OpXor64_0(v)
   680  	case OpXor8:
   681  		return rewriteValuePPC64_OpXor8_0(v)
   682  	case OpZero:
   683  		return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
   684  	case OpZeroExt16to32:
   685  		return rewriteValuePPC64_OpZeroExt16to32_0(v)
   686  	case OpZeroExt16to64:
   687  		return rewriteValuePPC64_OpZeroExt16to64_0(v)
   688  	case OpZeroExt32to64:
   689  		return rewriteValuePPC64_OpZeroExt32to64_0(v)
   690  	case OpZeroExt8to16:
   691  		return rewriteValuePPC64_OpZeroExt8to16_0(v)
   692  	case OpZeroExt8to32:
   693  		return rewriteValuePPC64_OpZeroExt8to32_0(v)
   694  	case OpZeroExt8to64:
   695  		return rewriteValuePPC64_OpZeroExt8to64_0(v)
   696  	}
   697  	return false
   698  }
   699  func rewriteValuePPC64_OpAbs_0(v *Value) bool {
   700  	// match: (Abs x)
   701  	// cond:
   702  	// result: (FABS x)
   703  	for {
   704  		x := v.Args[0]
   705  		v.reset(OpPPC64FABS)
   706  		v.AddArg(x)
   707  		return true
   708  	}
   709  }
   710  func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
   711  	// match: (Add16 x y)
   712  	// cond:
   713  	// result: (ADD x y)
   714  	for {
   715  		_ = v.Args[1]
   716  		x := v.Args[0]
   717  		y := v.Args[1]
   718  		v.reset(OpPPC64ADD)
   719  		v.AddArg(x)
   720  		v.AddArg(y)
   721  		return true
   722  	}
   723  }
   724  func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
   725  	// match: (Add32 x y)
   726  	// cond:
   727  	// result: (ADD x y)
   728  	for {
   729  		_ = v.Args[1]
   730  		x := v.Args[0]
   731  		y := v.Args[1]
   732  		v.reset(OpPPC64ADD)
   733  		v.AddArg(x)
   734  		v.AddArg(y)
   735  		return true
   736  	}
   737  }
   738  func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
   739  	// match: (Add32F x y)
   740  	// cond:
   741  	// result: (FADDS x y)
   742  	for {
   743  		_ = v.Args[1]
   744  		x := v.Args[0]
   745  		y := v.Args[1]
   746  		v.reset(OpPPC64FADDS)
   747  		v.AddArg(x)
   748  		v.AddArg(y)
   749  		return true
   750  	}
   751  }
   752  func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
   753  	// match: (Add64 x y)
   754  	// cond:
   755  	// result: (ADD x y)
   756  	for {
   757  		_ = v.Args[1]
   758  		x := v.Args[0]
   759  		y := v.Args[1]
   760  		v.reset(OpPPC64ADD)
   761  		v.AddArg(x)
   762  		v.AddArg(y)
   763  		return true
   764  	}
   765  }
   766  func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
   767  	// match: (Add64F x y)
   768  	// cond:
   769  	// result: (FADD x y)
   770  	for {
   771  		_ = v.Args[1]
   772  		x := v.Args[0]
   773  		y := v.Args[1]
   774  		v.reset(OpPPC64FADD)
   775  		v.AddArg(x)
   776  		v.AddArg(y)
   777  		return true
   778  	}
   779  }
   780  func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
   781  	// match: (Add8 x y)
   782  	// cond:
   783  	// result: (ADD x y)
   784  	for {
   785  		_ = v.Args[1]
   786  		x := v.Args[0]
   787  		y := v.Args[1]
   788  		v.reset(OpPPC64ADD)
   789  		v.AddArg(x)
   790  		v.AddArg(y)
   791  		return true
   792  	}
   793  }
   794  func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
   795  	// match: (AddPtr x y)
   796  	// cond:
   797  	// result: (ADD x y)
   798  	for {
   799  		_ = v.Args[1]
   800  		x := v.Args[0]
   801  		y := v.Args[1]
   802  		v.reset(OpPPC64ADD)
   803  		v.AddArg(x)
   804  		v.AddArg(y)
   805  		return true
   806  	}
   807  }
   808  func rewriteValuePPC64_OpAddr_0(v *Value) bool {
   809  	// match: (Addr {sym} base)
   810  	// cond:
   811  	// result: (MOVDaddr {sym} base)
   812  	for {
   813  		sym := v.Aux
   814  		base := v.Args[0]
   815  		v.reset(OpPPC64MOVDaddr)
   816  		v.Aux = sym
   817  		v.AddArg(base)
   818  		return true
   819  	}
   820  }
   821  func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
   822  	// match: (And16 x y)
   823  	// cond:
   824  	// result: (AND x y)
   825  	for {
   826  		_ = v.Args[1]
   827  		x := v.Args[0]
   828  		y := v.Args[1]
   829  		v.reset(OpPPC64AND)
   830  		v.AddArg(x)
   831  		v.AddArg(y)
   832  		return true
   833  	}
   834  }
   835  func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
   836  	// match: (And32 x y)
   837  	// cond:
   838  	// result: (AND x y)
   839  	for {
   840  		_ = v.Args[1]
   841  		x := v.Args[0]
   842  		y := v.Args[1]
   843  		v.reset(OpPPC64AND)
   844  		v.AddArg(x)
   845  		v.AddArg(y)
   846  		return true
   847  	}
   848  }
   849  func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
   850  	// match: (And64 x y)
   851  	// cond:
   852  	// result: (AND x y)
   853  	for {
   854  		_ = v.Args[1]
   855  		x := v.Args[0]
   856  		y := v.Args[1]
   857  		v.reset(OpPPC64AND)
   858  		v.AddArg(x)
   859  		v.AddArg(y)
   860  		return true
   861  	}
   862  }
   863  func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
   864  	// match: (And8 x y)
   865  	// cond:
   866  	// result: (AND x y)
   867  	for {
   868  		_ = v.Args[1]
   869  		x := v.Args[0]
   870  		y := v.Args[1]
   871  		v.reset(OpPPC64AND)
   872  		v.AddArg(x)
   873  		v.AddArg(y)
   874  		return true
   875  	}
   876  }
   877  func rewriteValuePPC64_OpAndB_0(v *Value) bool {
   878  	// match: (AndB x y)
   879  	// cond:
   880  	// result: (AND x y)
   881  	for {
   882  		_ = v.Args[1]
   883  		x := v.Args[0]
   884  		y := v.Args[1]
   885  		v.reset(OpPPC64AND)
   886  		v.AddArg(x)
   887  		v.AddArg(y)
   888  		return true
   889  	}
   890  }
   891  func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
   892  	// match: (AtomicAdd32 ptr val mem)
   893  	// cond:
   894  	// result: (LoweredAtomicAdd32 ptr val mem)
   895  	for {
   896  		_ = v.Args[2]
   897  		ptr := v.Args[0]
   898  		val := v.Args[1]
   899  		mem := v.Args[2]
   900  		v.reset(OpPPC64LoweredAtomicAdd32)
   901  		v.AddArg(ptr)
   902  		v.AddArg(val)
   903  		v.AddArg(mem)
   904  		return true
   905  	}
   906  }
   907  func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
   908  	// match: (AtomicAdd64 ptr val mem)
   909  	// cond:
   910  	// result: (LoweredAtomicAdd64 ptr val mem)
   911  	for {
   912  		_ = v.Args[2]
   913  		ptr := v.Args[0]
   914  		val := v.Args[1]
   915  		mem := v.Args[2]
   916  		v.reset(OpPPC64LoweredAtomicAdd64)
   917  		v.AddArg(ptr)
   918  		v.AddArg(val)
   919  		v.AddArg(mem)
   920  		return true
   921  	}
   922  }
   923  func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
   924  	// match: (AtomicAnd8 ptr val mem)
   925  	// cond:
   926  	// result: (LoweredAtomicAnd8 ptr val mem)
   927  	for {
   928  		_ = v.Args[2]
   929  		ptr := v.Args[0]
   930  		val := v.Args[1]
   931  		mem := v.Args[2]
   932  		v.reset(OpPPC64LoweredAtomicAnd8)
   933  		v.AddArg(ptr)
   934  		v.AddArg(val)
   935  		v.AddArg(mem)
   936  		return true
   937  	}
   938  }
   939  func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
   940  	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   941  	// cond:
   942  	// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
   943  	for {
   944  		_ = v.Args[3]
   945  		ptr := v.Args[0]
   946  		old := v.Args[1]
   947  		new_ := v.Args[2]
   948  		mem := v.Args[3]
   949  		v.reset(OpPPC64LoweredAtomicCas32)
   950  		v.AuxInt = 1
   951  		v.AddArg(ptr)
   952  		v.AddArg(old)
   953  		v.AddArg(new_)
   954  		v.AddArg(mem)
   955  		return true
   956  	}
   957  }
   958  func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
   959  	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
   960  	// cond:
   961  	// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
   962  	for {
   963  		_ = v.Args[3]
   964  		ptr := v.Args[0]
   965  		old := v.Args[1]
   966  		new_ := v.Args[2]
   967  		mem := v.Args[3]
   968  		v.reset(OpPPC64LoweredAtomicCas64)
   969  		v.AuxInt = 1
   970  		v.AddArg(ptr)
   971  		v.AddArg(old)
   972  		v.AddArg(new_)
   973  		v.AddArg(mem)
   974  		return true
   975  	}
   976  }
   977  func rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v *Value) bool {
   978  	// match: (AtomicCompareAndSwapRel32 ptr old new_ mem)
   979  	// cond:
   980  	// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
   981  	for {
   982  		_ = v.Args[3]
   983  		ptr := v.Args[0]
   984  		old := v.Args[1]
   985  		new_ := v.Args[2]
   986  		mem := v.Args[3]
   987  		v.reset(OpPPC64LoweredAtomicCas32)
   988  		v.AuxInt = 0
   989  		v.AddArg(ptr)
   990  		v.AddArg(old)
   991  		v.AddArg(new_)
   992  		v.AddArg(mem)
   993  		return true
   994  	}
   995  }
   996  func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
   997  	// match: (AtomicExchange32 ptr val mem)
   998  	// cond:
   999  	// result: (LoweredAtomicExchange32 ptr val mem)
  1000  	for {
  1001  		_ = v.Args[2]
  1002  		ptr := v.Args[0]
  1003  		val := v.Args[1]
  1004  		mem := v.Args[2]
  1005  		v.reset(OpPPC64LoweredAtomicExchange32)
  1006  		v.AddArg(ptr)
  1007  		v.AddArg(val)
  1008  		v.AddArg(mem)
  1009  		return true
  1010  	}
  1011  }
  1012  func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
  1013  	// match: (AtomicExchange64 ptr val mem)
  1014  	// cond:
  1015  	// result: (LoweredAtomicExchange64 ptr val mem)
  1016  	for {
  1017  		_ = v.Args[2]
  1018  		ptr := v.Args[0]
  1019  		val := v.Args[1]
  1020  		mem := v.Args[2]
  1021  		v.reset(OpPPC64LoweredAtomicExchange64)
  1022  		v.AddArg(ptr)
  1023  		v.AddArg(val)
  1024  		v.AddArg(mem)
  1025  		return true
  1026  	}
  1027  }
  1028  func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
  1029  	// match: (AtomicLoad32 ptr mem)
  1030  	// cond:
  1031  	// result: (LoweredAtomicLoad32 [1] ptr mem)
  1032  	for {
  1033  		_ = v.Args[1]
  1034  		ptr := v.Args[0]
  1035  		mem := v.Args[1]
  1036  		v.reset(OpPPC64LoweredAtomicLoad32)
  1037  		v.AuxInt = 1
  1038  		v.AddArg(ptr)
  1039  		v.AddArg(mem)
  1040  		return true
  1041  	}
  1042  }
  1043  func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
  1044  	// match: (AtomicLoad64 ptr mem)
  1045  	// cond:
  1046  	// result: (LoweredAtomicLoad64 [1] ptr mem)
  1047  	for {
  1048  		_ = v.Args[1]
  1049  		ptr := v.Args[0]
  1050  		mem := v.Args[1]
  1051  		v.reset(OpPPC64LoweredAtomicLoad64)
  1052  		v.AuxInt = 1
  1053  		v.AddArg(ptr)
  1054  		v.AddArg(mem)
  1055  		return true
  1056  	}
  1057  }
  1058  func rewriteValuePPC64_OpAtomicLoadAcq32_0(v *Value) bool {
  1059  	// match: (AtomicLoadAcq32 ptr mem)
  1060  	// cond:
  1061  	// result: (LoweredAtomicLoad32 [0] ptr mem)
  1062  	for {
  1063  		_ = v.Args[1]
  1064  		ptr := v.Args[0]
  1065  		mem := v.Args[1]
  1066  		v.reset(OpPPC64LoweredAtomicLoad32)
  1067  		v.AuxInt = 0
  1068  		v.AddArg(ptr)
  1069  		v.AddArg(mem)
  1070  		return true
  1071  	}
  1072  }
  1073  func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
  1074  	// match: (AtomicLoadPtr ptr mem)
  1075  	// cond:
  1076  	// result: (LoweredAtomicLoadPtr [1] ptr mem)
  1077  	for {
  1078  		_ = v.Args[1]
  1079  		ptr := v.Args[0]
  1080  		mem := v.Args[1]
  1081  		v.reset(OpPPC64LoweredAtomicLoadPtr)
  1082  		v.AuxInt = 1
  1083  		v.AddArg(ptr)
  1084  		v.AddArg(mem)
  1085  		return true
  1086  	}
  1087  }
  1088  func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
  1089  	// match: (AtomicOr8 ptr val mem)
  1090  	// cond:
  1091  	// result: (LoweredAtomicOr8 ptr val mem)
  1092  	for {
  1093  		_ = v.Args[2]
  1094  		ptr := v.Args[0]
  1095  		val := v.Args[1]
  1096  		mem := v.Args[2]
  1097  		v.reset(OpPPC64LoweredAtomicOr8)
  1098  		v.AddArg(ptr)
  1099  		v.AddArg(val)
  1100  		v.AddArg(mem)
  1101  		return true
  1102  	}
  1103  }
  1104  func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
  1105  	// match: (AtomicStore32 ptr val mem)
  1106  	// cond:
  1107  	// result: (LoweredAtomicStore32 [1] ptr val mem)
  1108  	for {
  1109  		_ = v.Args[2]
  1110  		ptr := v.Args[0]
  1111  		val := v.Args[1]
  1112  		mem := v.Args[2]
  1113  		v.reset(OpPPC64LoweredAtomicStore32)
  1114  		v.AuxInt = 1
  1115  		v.AddArg(ptr)
  1116  		v.AddArg(val)
  1117  		v.AddArg(mem)
  1118  		return true
  1119  	}
  1120  }
  1121  func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
  1122  	// match: (AtomicStore64 ptr val mem)
  1123  	// cond:
  1124  	// result: (LoweredAtomicStore64 [1] ptr val mem)
  1125  	for {
  1126  		_ = v.Args[2]
  1127  		ptr := v.Args[0]
  1128  		val := v.Args[1]
  1129  		mem := v.Args[2]
  1130  		v.reset(OpPPC64LoweredAtomicStore64)
  1131  		v.AuxInt = 1
  1132  		v.AddArg(ptr)
  1133  		v.AddArg(val)
  1134  		v.AddArg(mem)
  1135  		return true
  1136  	}
  1137  }
  1138  func rewriteValuePPC64_OpAtomicStoreRel32_0(v *Value) bool {
  1139  	// match: (AtomicStoreRel32 ptr val mem)
  1140  	// cond:
  1141  	// result: (LoweredAtomicStore32 [0] ptr val mem)
  1142  	for {
  1143  		_ = v.Args[2]
  1144  		ptr := v.Args[0]
  1145  		val := v.Args[1]
  1146  		mem := v.Args[2]
  1147  		v.reset(OpPPC64LoweredAtomicStore32)
  1148  		v.AuxInt = 0
  1149  		v.AddArg(ptr)
  1150  		v.AddArg(val)
  1151  		v.AddArg(mem)
  1152  		return true
  1153  	}
  1154  }
  1155  func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
  1156  	b := v.Block
  1157  	_ = b
  1158  	// match: (Avg64u <t> x y)
  1159  	// cond:
  1160  	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
  1161  	for {
  1162  		t := v.Type
  1163  		_ = v.Args[1]
  1164  		x := v.Args[0]
  1165  		y := v.Args[1]
  1166  		v.reset(OpPPC64ADD)
  1167  		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
  1168  		v0.AuxInt = 1
  1169  		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
  1170  		v1.AddArg(x)
  1171  		v1.AddArg(y)
  1172  		v0.AddArg(v1)
  1173  		v.AddArg(v0)
  1174  		v.AddArg(y)
  1175  		return true
  1176  	}
  1177  }
  1178  func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
  1179  	b := v.Block
  1180  	_ = b
  1181  	typ := &b.Func.Config.Types
  1182  	_ = typ
  1183  	// match: (BitLen32 x)
  1184  	// cond:
  1185  	// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
  1186  	for {
  1187  		x := v.Args[0]
  1188  		v.reset(OpPPC64SUB)
  1189  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1190  		v0.AuxInt = 32
  1191  		v.AddArg(v0)
  1192  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
  1193  		v1.AddArg(x)
  1194  		v.AddArg(v1)
  1195  		return true
  1196  	}
  1197  }
  1198  func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
  1199  	b := v.Block
  1200  	_ = b
  1201  	typ := &b.Func.Config.Types
  1202  	_ = typ
  1203  	// match: (BitLen64 x)
  1204  	// cond:
  1205  	// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
  1206  	for {
  1207  		x := v.Args[0]
  1208  		v.reset(OpPPC64SUB)
  1209  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1210  		v0.AuxInt = 64
  1211  		v.AddArg(v0)
  1212  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
  1213  		v1.AddArg(x)
  1214  		v.AddArg(v1)
  1215  		return true
  1216  	}
  1217  }
  1218  func rewriteValuePPC64_OpCeil_0(v *Value) bool {
  1219  	// match: (Ceil x)
  1220  	// cond:
  1221  	// result: (FCEIL x)
  1222  	for {
  1223  		x := v.Args[0]
  1224  		v.reset(OpPPC64FCEIL)
  1225  		v.AddArg(x)
  1226  		return true
  1227  	}
  1228  }
  1229  func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
  1230  	// match: (ClosureCall [argwid] entry closure mem)
  1231  	// cond:
  1232  	// result: (CALLclosure [argwid] entry closure mem)
  1233  	for {
  1234  		argwid := v.AuxInt
  1235  		_ = v.Args[2]
  1236  		entry := v.Args[0]
  1237  		closure := v.Args[1]
  1238  		mem := v.Args[2]
  1239  		v.reset(OpPPC64CALLclosure)
  1240  		v.AuxInt = argwid
  1241  		v.AddArg(entry)
  1242  		v.AddArg(closure)
  1243  		v.AddArg(mem)
  1244  		return true
  1245  	}
  1246  }
  1247  func rewriteValuePPC64_OpCom16_0(v *Value) bool {
  1248  	// match: (Com16 x)
  1249  	// cond:
  1250  	// result: (NOR x x)
  1251  	for {
  1252  		x := v.Args[0]
  1253  		v.reset(OpPPC64NOR)
  1254  		v.AddArg(x)
  1255  		v.AddArg(x)
  1256  		return true
  1257  	}
  1258  }
  1259  func rewriteValuePPC64_OpCom32_0(v *Value) bool {
  1260  	// match: (Com32 x)
  1261  	// cond:
  1262  	// result: (NOR x x)
  1263  	for {
  1264  		x := v.Args[0]
  1265  		v.reset(OpPPC64NOR)
  1266  		v.AddArg(x)
  1267  		v.AddArg(x)
  1268  		return true
  1269  	}
  1270  }
  1271  func rewriteValuePPC64_OpCom64_0(v *Value) bool {
  1272  	// match: (Com64 x)
  1273  	// cond:
  1274  	// result: (NOR x x)
  1275  	for {
  1276  		x := v.Args[0]
  1277  		v.reset(OpPPC64NOR)
  1278  		v.AddArg(x)
  1279  		v.AddArg(x)
  1280  		return true
  1281  	}
  1282  }
  1283  func rewriteValuePPC64_OpCom8_0(v *Value) bool {
  1284  	// match: (Com8 x)
  1285  	// cond:
  1286  	// result: (NOR x x)
  1287  	for {
  1288  		x := v.Args[0]
  1289  		v.reset(OpPPC64NOR)
  1290  		v.AddArg(x)
  1291  		v.AddArg(x)
  1292  		return true
  1293  	}
  1294  }
  1295  func rewriteValuePPC64_OpConst16_0(v *Value) bool {
  1296  	// match: (Const16 [val])
  1297  	// cond:
  1298  	// result: (MOVDconst [val])
  1299  	for {
  1300  		val := v.AuxInt
  1301  		v.reset(OpPPC64MOVDconst)
  1302  		v.AuxInt = val
  1303  		return true
  1304  	}
  1305  }
  1306  func rewriteValuePPC64_OpConst32_0(v *Value) bool {
  1307  	// match: (Const32 [val])
  1308  	// cond:
  1309  	// result: (MOVDconst [val])
  1310  	for {
  1311  		val := v.AuxInt
  1312  		v.reset(OpPPC64MOVDconst)
  1313  		v.AuxInt = val
  1314  		return true
  1315  	}
  1316  }
  1317  func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
  1318  	// match: (Const32F [val])
  1319  	// cond:
  1320  	// result: (FMOVSconst [val])
  1321  	for {
  1322  		val := v.AuxInt
  1323  		v.reset(OpPPC64FMOVSconst)
  1324  		v.AuxInt = val
  1325  		return true
  1326  	}
  1327  }
  1328  func rewriteValuePPC64_OpConst64_0(v *Value) bool {
  1329  	// match: (Const64 [val])
  1330  	// cond:
  1331  	// result: (MOVDconst [val])
  1332  	for {
  1333  		val := v.AuxInt
  1334  		v.reset(OpPPC64MOVDconst)
  1335  		v.AuxInt = val
  1336  		return true
  1337  	}
  1338  }
  1339  func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
  1340  	// match: (Const64F [val])
  1341  	// cond:
  1342  	// result: (FMOVDconst [val])
  1343  	for {
  1344  		val := v.AuxInt
  1345  		v.reset(OpPPC64FMOVDconst)
  1346  		v.AuxInt = val
  1347  		return true
  1348  	}
  1349  }
  1350  func rewriteValuePPC64_OpConst8_0(v *Value) bool {
  1351  	// match: (Const8 [val])
  1352  	// cond:
  1353  	// result: (MOVDconst [val])
  1354  	for {
  1355  		val := v.AuxInt
  1356  		v.reset(OpPPC64MOVDconst)
  1357  		v.AuxInt = val
  1358  		return true
  1359  	}
  1360  }
  1361  func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
  1362  	// match: (ConstBool [b])
  1363  	// cond:
  1364  	// result: (MOVDconst [b])
  1365  	for {
  1366  		b := v.AuxInt
  1367  		v.reset(OpPPC64MOVDconst)
  1368  		v.AuxInt = b
  1369  		return true
  1370  	}
  1371  }
  1372  func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
  1373  	// match: (ConstNil)
  1374  	// cond:
  1375  	// result: (MOVDconst [0])
  1376  	for {
  1377  		v.reset(OpPPC64MOVDconst)
  1378  		v.AuxInt = 0
  1379  		return true
  1380  	}
  1381  }
  1382  func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
  1383  	// match: (Copysign x y)
  1384  	// cond:
  1385  	// result: (FCPSGN y x)
  1386  	for {
  1387  		_ = v.Args[1]
  1388  		x := v.Args[0]
  1389  		y := v.Args[1]
  1390  		v.reset(OpPPC64FCPSGN)
  1391  		v.AddArg(y)
  1392  		v.AddArg(x)
  1393  		return true
  1394  	}
  1395  }
  1396  func rewriteValuePPC64_OpCtz16_0(v *Value) bool {
  1397  	b := v.Block
  1398  	_ = b
  1399  	typ := &b.Func.Config.Types
  1400  	_ = typ
  1401  	// match: (Ctz16 x)
  1402  	// cond:
  1403  	// result: (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
  1404  	for {
  1405  		x := v.Args[0]
  1406  		v.reset(OpPPC64POPCNTW)
  1407  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
  1408  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int16)
  1409  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int16)
  1410  		v2.AuxInt = -1
  1411  		v2.AddArg(x)
  1412  		v1.AddArg(v2)
  1413  		v1.AddArg(x)
  1414  		v0.AddArg(v1)
  1415  		v.AddArg(v0)
  1416  		return true
  1417  	}
  1418  }
  1419  func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
  1420  	b := v.Block
  1421  	_ = b
  1422  	typ := &b.Func.Config.Types
  1423  	_ = typ
  1424  	// match: (Ctz32 x)
  1425  	// cond:
  1426  	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
  1427  	for {
  1428  		x := v.Args[0]
  1429  		v.reset(OpPPC64POPCNTW)
  1430  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1431  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
  1432  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
  1433  		v2.AuxInt = -1
  1434  		v2.AddArg(x)
  1435  		v1.AddArg(v2)
  1436  		v1.AddArg(x)
  1437  		v0.AddArg(v1)
  1438  		v.AddArg(v0)
  1439  		return true
  1440  	}
  1441  }
  1442  func rewriteValuePPC64_OpCtz32NonZero_0(v *Value) bool {
  1443  	// match: (Ctz32NonZero x)
  1444  	// cond:
  1445  	// result: (Ctz32 x)
  1446  	for {
  1447  		x := v.Args[0]
  1448  		v.reset(OpCtz32)
  1449  		v.AddArg(x)
  1450  		return true
  1451  	}
  1452  }
  1453  func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
  1454  	b := v.Block
  1455  	_ = b
  1456  	typ := &b.Func.Config.Types
  1457  	_ = typ
  1458  	// match: (Ctz64 x)
  1459  	// cond:
  1460  	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
  1461  	for {
  1462  		x := v.Args[0]
  1463  		v.reset(OpPPC64POPCNTD)
  1464  		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
  1465  		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
  1466  		v1.AuxInt = -1
  1467  		v1.AddArg(x)
  1468  		v0.AddArg(v1)
  1469  		v0.AddArg(x)
  1470  		v.AddArg(v0)
  1471  		return true
  1472  	}
  1473  }
  1474  func rewriteValuePPC64_OpCtz64NonZero_0(v *Value) bool {
  1475  	// match: (Ctz64NonZero x)
  1476  	// cond:
  1477  	// result: (Ctz64 x)
  1478  	for {
  1479  		x := v.Args[0]
  1480  		v.reset(OpCtz64)
  1481  		v.AddArg(x)
  1482  		return true
  1483  	}
  1484  }
  1485  func rewriteValuePPC64_OpCtz8_0(v *Value) bool {
  1486  	b := v.Block
  1487  	_ = b
  1488  	typ := &b.Func.Config.Types
  1489  	_ = typ
  1490  	// match: (Ctz8 x)
  1491  	// cond:
  1492  	// result: (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))
  1493  	for {
  1494  		x := v.Args[0]
  1495  		v.reset(OpPPC64POPCNTB)
  1496  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  1497  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.UInt8)
  1498  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.UInt8)
  1499  		v2.AuxInt = -1
  1500  		v2.AddArg(x)
  1501  		v1.AddArg(v2)
  1502  		v1.AddArg(x)
  1503  		v0.AddArg(v1)
  1504  		v.AddArg(v0)
  1505  		return true
  1506  	}
  1507  }
  1508  func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
  1509  	b := v.Block
  1510  	_ = b
  1511  	typ := &b.Func.Config.Types
  1512  	_ = typ
  1513  	// match: (Cvt32Fto32 x)
  1514  	// cond:
  1515  	// result: (MFVSRD (FCTIWZ x))
  1516  	for {
  1517  		x := v.Args[0]
  1518  		v.reset(OpPPC64MFVSRD)
  1519  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1520  		v0.AddArg(x)
  1521  		v.AddArg(v0)
  1522  		return true
  1523  	}
  1524  }
  1525  func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
  1526  	b := v.Block
  1527  	_ = b
  1528  	typ := &b.Func.Config.Types
  1529  	_ = typ
  1530  	// match: (Cvt32Fto64 x)
  1531  	// cond:
  1532  	// result: (MFVSRD (FCTIDZ x))
  1533  	for {
  1534  		x := v.Args[0]
  1535  		v.reset(OpPPC64MFVSRD)
  1536  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1537  		v0.AddArg(x)
  1538  		v.AddArg(v0)
  1539  		return true
  1540  	}
  1541  }
  1542  func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
  1543  	// match: (Cvt32Fto64F x)
  1544  	// cond:
  1545  	// result: x
  1546  	for {
  1547  		x := v.Args[0]
  1548  		v.reset(OpCopy)
  1549  		v.Type = x.Type
  1550  		v.AddArg(x)
  1551  		return true
  1552  	}
  1553  }
  1554  func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
  1555  	b := v.Block
  1556  	_ = b
  1557  	typ := &b.Func.Config.Types
  1558  	_ = typ
  1559  	// match: (Cvt32to32F x)
  1560  	// cond:
  1561  	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
  1562  	for {
  1563  		x := v.Args[0]
  1564  		v.reset(OpPPC64FCFIDS)
  1565  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1566  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1567  		v1.AddArg(x)
  1568  		v0.AddArg(v1)
  1569  		v.AddArg(v0)
  1570  		return true
  1571  	}
  1572  }
  1573  func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
  1574  	b := v.Block
  1575  	_ = b
  1576  	typ := &b.Func.Config.Types
  1577  	_ = typ
  1578  	// match: (Cvt32to64F x)
  1579  	// cond:
  1580  	// result: (FCFID (MTVSRD (SignExt32to64 x)))
  1581  	for {
  1582  		x := v.Args[0]
  1583  		v.reset(OpPPC64FCFID)
  1584  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1585  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1586  		v1.AddArg(x)
  1587  		v0.AddArg(v1)
  1588  		v.AddArg(v0)
  1589  		return true
  1590  	}
  1591  }
  1592  func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
  1593  	b := v.Block
  1594  	_ = b
  1595  	typ := &b.Func.Config.Types
  1596  	_ = typ
  1597  	// match: (Cvt64Fto32 x)
  1598  	// cond:
  1599  	// result: (MFVSRD (FCTIWZ x))
  1600  	for {
  1601  		x := v.Args[0]
  1602  		v.reset(OpPPC64MFVSRD)
  1603  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1604  		v0.AddArg(x)
  1605  		v.AddArg(v0)
  1606  		return true
  1607  	}
  1608  }
  1609  func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
  1610  	// match: (Cvt64Fto32F x)
  1611  	// cond:
  1612  	// result: (FRSP x)
  1613  	for {
  1614  		x := v.Args[0]
  1615  		v.reset(OpPPC64FRSP)
  1616  		v.AddArg(x)
  1617  		return true
  1618  	}
  1619  }
  1620  func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
  1621  	b := v.Block
  1622  	_ = b
  1623  	typ := &b.Func.Config.Types
  1624  	_ = typ
  1625  	// match: (Cvt64Fto64 x)
  1626  	// cond:
  1627  	// result: (MFVSRD (FCTIDZ x))
  1628  	for {
  1629  		x := v.Args[0]
  1630  		v.reset(OpPPC64MFVSRD)
  1631  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1632  		v0.AddArg(x)
  1633  		v.AddArg(v0)
  1634  		return true
  1635  	}
  1636  }
  1637  func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
  1638  	b := v.Block
  1639  	_ = b
  1640  	typ := &b.Func.Config.Types
  1641  	_ = typ
  1642  	// match: (Cvt64to32F x)
  1643  	// cond:
  1644  	// result: (FCFIDS (MTVSRD x))
  1645  	for {
  1646  		x := v.Args[0]
  1647  		v.reset(OpPPC64FCFIDS)
  1648  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1649  		v0.AddArg(x)
  1650  		v.AddArg(v0)
  1651  		return true
  1652  	}
  1653  }
  1654  func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
  1655  	b := v.Block
  1656  	_ = b
  1657  	typ := &b.Func.Config.Types
  1658  	_ = typ
  1659  	// match: (Cvt64to64F x)
  1660  	// cond:
  1661  	// result: (FCFID (MTVSRD x))
  1662  	for {
  1663  		x := v.Args[0]
  1664  		v.reset(OpPPC64FCFID)
  1665  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1666  		v0.AddArg(x)
  1667  		v.AddArg(v0)
  1668  		return true
  1669  	}
  1670  }
  1671  func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
  1672  	b := v.Block
  1673  	_ = b
  1674  	typ := &b.Func.Config.Types
  1675  	_ = typ
  1676  	// match: (Div16 x y)
  1677  	// cond:
  1678  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
  1679  	for {
  1680  		_ = v.Args[1]
  1681  		x := v.Args[0]
  1682  		y := v.Args[1]
  1683  		v.reset(OpPPC64DIVW)
  1684  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1685  		v0.AddArg(x)
  1686  		v.AddArg(v0)
  1687  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1688  		v1.AddArg(y)
  1689  		v.AddArg(v1)
  1690  		return true
  1691  	}
  1692  }
  1693  func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
  1694  	b := v.Block
  1695  	_ = b
  1696  	typ := &b.Func.Config.Types
  1697  	_ = typ
  1698  	// match: (Div16u x y)
  1699  	// cond:
  1700  	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1701  	for {
  1702  		_ = v.Args[1]
  1703  		x := v.Args[0]
  1704  		y := v.Args[1]
  1705  		v.reset(OpPPC64DIVWU)
  1706  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1707  		v0.AddArg(x)
  1708  		v.AddArg(v0)
  1709  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1710  		v1.AddArg(y)
  1711  		v.AddArg(v1)
  1712  		return true
  1713  	}
  1714  }
  1715  func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
  1716  	// match: (Div32 x y)
  1717  	// cond:
  1718  	// result: (DIVW x y)
  1719  	for {
  1720  		_ = v.Args[1]
  1721  		x := v.Args[0]
  1722  		y := v.Args[1]
  1723  		v.reset(OpPPC64DIVW)
  1724  		v.AddArg(x)
  1725  		v.AddArg(y)
  1726  		return true
  1727  	}
  1728  }
  1729  func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
  1730  	// match: (Div32F x y)
  1731  	// cond:
  1732  	// result: (FDIVS x y)
  1733  	for {
  1734  		_ = v.Args[1]
  1735  		x := v.Args[0]
  1736  		y := v.Args[1]
  1737  		v.reset(OpPPC64FDIVS)
  1738  		v.AddArg(x)
  1739  		v.AddArg(y)
  1740  		return true
  1741  	}
  1742  }
  1743  func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
  1744  	// match: (Div32u x y)
  1745  	// cond:
  1746  	// result: (DIVWU x y)
  1747  	for {
  1748  		_ = v.Args[1]
  1749  		x := v.Args[0]
  1750  		y := v.Args[1]
  1751  		v.reset(OpPPC64DIVWU)
  1752  		v.AddArg(x)
  1753  		v.AddArg(y)
  1754  		return true
  1755  	}
  1756  }
  1757  func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
  1758  	// match: (Div64 x y)
  1759  	// cond:
  1760  	// result: (DIVD x y)
  1761  	for {
  1762  		_ = v.Args[1]
  1763  		x := v.Args[0]
  1764  		y := v.Args[1]
  1765  		v.reset(OpPPC64DIVD)
  1766  		v.AddArg(x)
  1767  		v.AddArg(y)
  1768  		return true
  1769  	}
  1770  }
  1771  func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
  1772  	// match: (Div64F x y)
  1773  	// cond:
  1774  	// result: (FDIV x y)
  1775  	for {
  1776  		_ = v.Args[1]
  1777  		x := v.Args[0]
  1778  		y := v.Args[1]
  1779  		v.reset(OpPPC64FDIV)
  1780  		v.AddArg(x)
  1781  		v.AddArg(y)
  1782  		return true
  1783  	}
  1784  }
  1785  func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
  1786  	// match: (Div64u x y)
  1787  	// cond:
  1788  	// result: (DIVDU x y)
  1789  	for {
  1790  		_ = v.Args[1]
  1791  		x := v.Args[0]
  1792  		y := v.Args[1]
  1793  		v.reset(OpPPC64DIVDU)
  1794  		v.AddArg(x)
  1795  		v.AddArg(y)
  1796  		return true
  1797  	}
  1798  }
  1799  func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
  1800  	b := v.Block
  1801  	_ = b
  1802  	typ := &b.Func.Config.Types
  1803  	_ = typ
  1804  	// match: (Div8 x y)
  1805  	// cond:
  1806  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
  1807  	for {
  1808  		_ = v.Args[1]
  1809  		x := v.Args[0]
  1810  		y := v.Args[1]
  1811  		v.reset(OpPPC64DIVW)
  1812  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1813  		v0.AddArg(x)
  1814  		v.AddArg(v0)
  1815  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1816  		v1.AddArg(y)
  1817  		v.AddArg(v1)
  1818  		return true
  1819  	}
  1820  }
  1821  func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
  1822  	b := v.Block
  1823  	_ = b
  1824  	typ := &b.Func.Config.Types
  1825  	_ = typ
  1826  	// match: (Div8u x y)
  1827  	// cond:
  1828  	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1829  	for {
  1830  		_ = v.Args[1]
  1831  		x := v.Args[0]
  1832  		y := v.Args[1]
  1833  		v.reset(OpPPC64DIVWU)
  1834  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1835  		v0.AddArg(x)
  1836  		v.AddArg(v0)
  1837  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1838  		v1.AddArg(y)
  1839  		v.AddArg(v1)
  1840  		return true
  1841  	}
  1842  }
  1843  func rewriteValuePPC64_OpEq16_0(v *Value) bool {
  1844  	b := v.Block
  1845  	_ = b
  1846  	typ := &b.Func.Config.Types
  1847  	_ = typ
  1848  	// match: (Eq16 x y)
  1849  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1850  	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1851  	for {
  1852  		_ = v.Args[1]
  1853  		x := v.Args[0]
  1854  		y := v.Args[1]
  1855  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1856  			break
  1857  		}
  1858  		v.reset(OpPPC64Equal)
  1859  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1860  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1861  		v1.AddArg(x)
  1862  		v0.AddArg(v1)
  1863  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1864  		v2.AddArg(y)
  1865  		v0.AddArg(v2)
  1866  		v.AddArg(v0)
  1867  		return true
  1868  	}
  1869  	// match: (Eq16 x y)
  1870  	// cond:
  1871  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1872  	for {
  1873  		_ = v.Args[1]
  1874  		x := v.Args[0]
  1875  		y := v.Args[1]
  1876  		v.reset(OpPPC64Equal)
  1877  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1878  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1879  		v1.AddArg(x)
  1880  		v0.AddArg(v1)
  1881  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1882  		v2.AddArg(y)
  1883  		v0.AddArg(v2)
  1884  		v.AddArg(v0)
  1885  		return true
  1886  	}
  1887  }
  1888  func rewriteValuePPC64_OpEq32_0(v *Value) bool {
  1889  	b := v.Block
  1890  	_ = b
  1891  	// match: (Eq32 x y)
  1892  	// cond:
  1893  	// result: (Equal (CMPW x y))
  1894  	for {
  1895  		_ = v.Args[1]
  1896  		x := v.Args[0]
  1897  		y := v.Args[1]
  1898  		v.reset(OpPPC64Equal)
  1899  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1900  		v0.AddArg(x)
  1901  		v0.AddArg(y)
  1902  		v.AddArg(v0)
  1903  		return true
  1904  	}
  1905  }
  1906  func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
  1907  	b := v.Block
  1908  	_ = b
  1909  	// match: (Eq32F x y)
  1910  	// cond:
  1911  	// result: (Equal (FCMPU x y))
  1912  	for {
  1913  		_ = v.Args[1]
  1914  		x := v.Args[0]
  1915  		y := v.Args[1]
  1916  		v.reset(OpPPC64Equal)
  1917  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1918  		v0.AddArg(x)
  1919  		v0.AddArg(y)
  1920  		v.AddArg(v0)
  1921  		return true
  1922  	}
  1923  }
  1924  func rewriteValuePPC64_OpEq64_0(v *Value) bool {
  1925  	b := v.Block
  1926  	_ = b
  1927  	// match: (Eq64 x y)
  1928  	// cond:
  1929  	// result: (Equal (CMP x y))
  1930  	for {
  1931  		_ = v.Args[1]
  1932  		x := v.Args[0]
  1933  		y := v.Args[1]
  1934  		v.reset(OpPPC64Equal)
  1935  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1936  		v0.AddArg(x)
  1937  		v0.AddArg(y)
  1938  		v.AddArg(v0)
  1939  		return true
  1940  	}
  1941  }
  1942  func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
  1943  	b := v.Block
  1944  	_ = b
  1945  	// match: (Eq64F x y)
  1946  	// cond:
  1947  	// result: (Equal (FCMPU x y))
  1948  	for {
  1949  		_ = v.Args[1]
  1950  		x := v.Args[0]
  1951  		y := v.Args[1]
  1952  		v.reset(OpPPC64Equal)
  1953  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1954  		v0.AddArg(x)
  1955  		v0.AddArg(y)
  1956  		v.AddArg(v0)
  1957  		return true
  1958  	}
  1959  }
  1960  func rewriteValuePPC64_OpEq8_0(v *Value) bool {
  1961  	b := v.Block
  1962  	_ = b
  1963  	typ := &b.Func.Config.Types
  1964  	_ = typ
  1965  	// match: (Eq8 x y)
  1966  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1967  	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  1968  	for {
  1969  		_ = v.Args[1]
  1970  		x := v.Args[0]
  1971  		y := v.Args[1]
  1972  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1973  			break
  1974  		}
  1975  		v.reset(OpPPC64Equal)
  1976  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1977  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1978  		v1.AddArg(x)
  1979  		v0.AddArg(v1)
  1980  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1981  		v2.AddArg(y)
  1982  		v0.AddArg(v2)
  1983  		v.AddArg(v0)
  1984  		return true
  1985  	}
  1986  	// match: (Eq8 x y)
  1987  	// cond:
  1988  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1989  	for {
  1990  		_ = v.Args[1]
  1991  		x := v.Args[0]
  1992  		y := v.Args[1]
  1993  		v.reset(OpPPC64Equal)
  1994  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1995  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1996  		v1.AddArg(x)
  1997  		v0.AddArg(v1)
  1998  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1999  		v2.AddArg(y)
  2000  		v0.AddArg(v2)
  2001  		v.AddArg(v0)
  2002  		return true
  2003  	}
  2004  }
  2005  func rewriteValuePPC64_OpEqB_0(v *Value) bool {
  2006  	b := v.Block
  2007  	_ = b
  2008  	typ := &b.Func.Config.Types
  2009  	_ = typ
  2010  	// match: (EqB x y)
  2011  	// cond:
  2012  	// result: (ANDconst [1] (EQV x y))
  2013  	for {
  2014  		_ = v.Args[1]
  2015  		x := v.Args[0]
  2016  		y := v.Args[1]
  2017  		v.reset(OpPPC64ANDconst)
  2018  		v.AuxInt = 1
  2019  		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
  2020  		v0.AddArg(x)
  2021  		v0.AddArg(y)
  2022  		v.AddArg(v0)
  2023  		return true
  2024  	}
  2025  }
  2026  func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
  2027  	b := v.Block
  2028  	_ = b
  2029  	// match: (EqPtr x y)
  2030  	// cond:
  2031  	// result: (Equal (CMP x y))
  2032  	for {
  2033  		_ = v.Args[1]
  2034  		x := v.Args[0]
  2035  		y := v.Args[1]
  2036  		v.reset(OpPPC64Equal)
  2037  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2038  		v0.AddArg(x)
  2039  		v0.AddArg(y)
  2040  		v.AddArg(v0)
  2041  		return true
  2042  	}
  2043  }
  2044  func rewriteValuePPC64_OpFloor_0(v *Value) bool {
  2045  	// match: (Floor x)
  2046  	// cond:
  2047  	// result: (FFLOOR x)
  2048  	for {
  2049  		x := v.Args[0]
  2050  		v.reset(OpPPC64FFLOOR)
  2051  		v.AddArg(x)
  2052  		return true
  2053  	}
  2054  }
  2055  func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
  2056  	b := v.Block
  2057  	_ = b
  2058  	typ := &b.Func.Config.Types
  2059  	_ = typ
  2060  	// match: (Geq16 x y)
  2061  	// cond:
  2062  	// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2063  	for {
  2064  		_ = v.Args[1]
  2065  		x := v.Args[0]
  2066  		y := v.Args[1]
  2067  		v.reset(OpPPC64GreaterEqual)
  2068  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2069  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2070  		v1.AddArg(x)
  2071  		v0.AddArg(v1)
  2072  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2073  		v2.AddArg(y)
  2074  		v0.AddArg(v2)
  2075  		v.AddArg(v0)
  2076  		return true
  2077  	}
  2078  }
  2079  func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
  2080  	b := v.Block
  2081  	_ = b
  2082  	typ := &b.Func.Config.Types
  2083  	_ = typ
  2084  	// match: (Geq16U x y)
  2085  	// cond:
  2086  	// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2087  	for {
  2088  		_ = v.Args[1]
  2089  		x := v.Args[0]
  2090  		y := v.Args[1]
  2091  		v.reset(OpPPC64GreaterEqual)
  2092  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2093  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2094  		v1.AddArg(x)
  2095  		v0.AddArg(v1)
  2096  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2097  		v2.AddArg(y)
  2098  		v0.AddArg(v2)
  2099  		v.AddArg(v0)
  2100  		return true
  2101  	}
  2102  }
  2103  func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
  2104  	b := v.Block
  2105  	_ = b
  2106  	// match: (Geq32 x y)
  2107  	// cond:
  2108  	// result: (GreaterEqual (CMPW x y))
  2109  	for {
  2110  		_ = v.Args[1]
  2111  		x := v.Args[0]
  2112  		y := v.Args[1]
  2113  		v.reset(OpPPC64GreaterEqual)
  2114  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2115  		v0.AddArg(x)
  2116  		v0.AddArg(y)
  2117  		v.AddArg(v0)
  2118  		return true
  2119  	}
  2120  }
  2121  func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
  2122  	b := v.Block
  2123  	_ = b
  2124  	// match: (Geq32F x y)
  2125  	// cond:
  2126  	// result: (FGreaterEqual (FCMPU x y))
  2127  	for {
  2128  		_ = v.Args[1]
  2129  		x := v.Args[0]
  2130  		y := v.Args[1]
  2131  		v.reset(OpPPC64FGreaterEqual)
  2132  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2133  		v0.AddArg(x)
  2134  		v0.AddArg(y)
  2135  		v.AddArg(v0)
  2136  		return true
  2137  	}
  2138  }
  2139  func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
  2140  	b := v.Block
  2141  	_ = b
  2142  	// match: (Geq32U x y)
  2143  	// cond:
  2144  	// result: (GreaterEqual (CMPWU x y))
  2145  	for {
  2146  		_ = v.Args[1]
  2147  		x := v.Args[0]
  2148  		y := v.Args[1]
  2149  		v.reset(OpPPC64GreaterEqual)
  2150  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2151  		v0.AddArg(x)
  2152  		v0.AddArg(y)
  2153  		v.AddArg(v0)
  2154  		return true
  2155  	}
  2156  }
  2157  func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
  2158  	b := v.Block
  2159  	_ = b
  2160  	// match: (Geq64 x y)
  2161  	// cond:
  2162  	// result: (GreaterEqual (CMP x y))
  2163  	for {
  2164  		_ = v.Args[1]
  2165  		x := v.Args[0]
  2166  		y := v.Args[1]
  2167  		v.reset(OpPPC64GreaterEqual)
  2168  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2169  		v0.AddArg(x)
  2170  		v0.AddArg(y)
  2171  		v.AddArg(v0)
  2172  		return true
  2173  	}
  2174  }
  2175  func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
  2176  	b := v.Block
  2177  	_ = b
  2178  	// match: (Geq64F x y)
  2179  	// cond:
  2180  	// result: (FGreaterEqual (FCMPU x y))
  2181  	for {
  2182  		_ = v.Args[1]
  2183  		x := v.Args[0]
  2184  		y := v.Args[1]
  2185  		v.reset(OpPPC64FGreaterEqual)
  2186  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2187  		v0.AddArg(x)
  2188  		v0.AddArg(y)
  2189  		v.AddArg(v0)
  2190  		return true
  2191  	}
  2192  }
  2193  func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
  2194  	b := v.Block
  2195  	_ = b
  2196  	// match: (Geq64U x y)
  2197  	// cond:
  2198  	// result: (GreaterEqual (CMPU x y))
  2199  	for {
  2200  		_ = v.Args[1]
  2201  		x := v.Args[0]
  2202  		y := v.Args[1]
  2203  		v.reset(OpPPC64GreaterEqual)
  2204  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2205  		v0.AddArg(x)
  2206  		v0.AddArg(y)
  2207  		v.AddArg(v0)
  2208  		return true
  2209  	}
  2210  }
  2211  func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
  2212  	b := v.Block
  2213  	_ = b
  2214  	typ := &b.Func.Config.Types
  2215  	_ = typ
  2216  	// match: (Geq8 x y)
  2217  	// cond:
  2218  	// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2219  	for {
  2220  		_ = v.Args[1]
  2221  		x := v.Args[0]
  2222  		y := v.Args[1]
  2223  		v.reset(OpPPC64GreaterEqual)
  2224  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2225  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2226  		v1.AddArg(x)
  2227  		v0.AddArg(v1)
  2228  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2229  		v2.AddArg(y)
  2230  		v0.AddArg(v2)
  2231  		v.AddArg(v0)
  2232  		return true
  2233  	}
  2234  }
  2235  func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
  2236  	b := v.Block
  2237  	_ = b
  2238  	typ := &b.Func.Config.Types
  2239  	_ = typ
  2240  	// match: (Geq8U x y)
  2241  	// cond:
  2242  	// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2243  	for {
  2244  		_ = v.Args[1]
  2245  		x := v.Args[0]
  2246  		y := v.Args[1]
  2247  		v.reset(OpPPC64GreaterEqual)
  2248  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2249  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2250  		v1.AddArg(x)
  2251  		v0.AddArg(v1)
  2252  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2253  		v2.AddArg(y)
  2254  		v0.AddArg(v2)
  2255  		v.AddArg(v0)
  2256  		return true
  2257  	}
  2258  }
  2259  func rewriteValuePPC64_OpGetCallerPC_0(v *Value) bool {
  2260  	// match: (GetCallerPC)
  2261  	// cond:
  2262  	// result: (LoweredGetCallerPC)
  2263  	for {
  2264  		v.reset(OpPPC64LoweredGetCallerPC)
  2265  		return true
  2266  	}
  2267  }
  2268  func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
  2269  	// match: (GetCallerSP)
  2270  	// cond:
  2271  	// result: (LoweredGetCallerSP)
  2272  	for {
  2273  		v.reset(OpPPC64LoweredGetCallerSP)
  2274  		return true
  2275  	}
  2276  }
  2277  func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
  2278  	// match: (GetClosurePtr)
  2279  	// cond:
  2280  	// result: (LoweredGetClosurePtr)
  2281  	for {
  2282  		v.reset(OpPPC64LoweredGetClosurePtr)
  2283  		return true
  2284  	}
  2285  }
  2286  func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
  2287  	b := v.Block
  2288  	_ = b
  2289  	typ := &b.Func.Config.Types
  2290  	_ = typ
  2291  	// match: (Greater16 x y)
  2292  	// cond:
  2293  	// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2294  	for {
  2295  		_ = v.Args[1]
  2296  		x := v.Args[0]
  2297  		y := v.Args[1]
  2298  		v.reset(OpPPC64GreaterThan)
  2299  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2300  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2301  		v1.AddArg(x)
  2302  		v0.AddArg(v1)
  2303  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2304  		v2.AddArg(y)
  2305  		v0.AddArg(v2)
  2306  		v.AddArg(v0)
  2307  		return true
  2308  	}
  2309  }
  2310  func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
  2311  	b := v.Block
  2312  	_ = b
  2313  	typ := &b.Func.Config.Types
  2314  	_ = typ
  2315  	// match: (Greater16U x y)
  2316  	// cond:
  2317  	// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2318  	for {
  2319  		_ = v.Args[1]
  2320  		x := v.Args[0]
  2321  		y := v.Args[1]
  2322  		v.reset(OpPPC64GreaterThan)
  2323  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2324  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2325  		v1.AddArg(x)
  2326  		v0.AddArg(v1)
  2327  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2328  		v2.AddArg(y)
  2329  		v0.AddArg(v2)
  2330  		v.AddArg(v0)
  2331  		return true
  2332  	}
  2333  }
  2334  func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
  2335  	b := v.Block
  2336  	_ = b
  2337  	// match: (Greater32 x y)
  2338  	// cond:
  2339  	// result: (GreaterThan (CMPW x y))
  2340  	for {
  2341  		_ = v.Args[1]
  2342  		x := v.Args[0]
  2343  		y := v.Args[1]
  2344  		v.reset(OpPPC64GreaterThan)
  2345  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2346  		v0.AddArg(x)
  2347  		v0.AddArg(y)
  2348  		v.AddArg(v0)
  2349  		return true
  2350  	}
  2351  }
  2352  func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
  2353  	b := v.Block
  2354  	_ = b
  2355  	// match: (Greater32F x y)
  2356  	// cond:
  2357  	// result: (FGreaterThan (FCMPU x y))
  2358  	for {
  2359  		_ = v.Args[1]
  2360  		x := v.Args[0]
  2361  		y := v.Args[1]
  2362  		v.reset(OpPPC64FGreaterThan)
  2363  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2364  		v0.AddArg(x)
  2365  		v0.AddArg(y)
  2366  		v.AddArg(v0)
  2367  		return true
  2368  	}
  2369  }
  2370  func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
  2371  	b := v.Block
  2372  	_ = b
  2373  	// match: (Greater32U x y)
  2374  	// cond:
  2375  	// result: (GreaterThan (CMPWU x y))
  2376  	for {
  2377  		_ = v.Args[1]
  2378  		x := v.Args[0]
  2379  		y := v.Args[1]
  2380  		v.reset(OpPPC64GreaterThan)
  2381  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2382  		v0.AddArg(x)
  2383  		v0.AddArg(y)
  2384  		v.AddArg(v0)
  2385  		return true
  2386  	}
  2387  }
  2388  func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
  2389  	b := v.Block
  2390  	_ = b
  2391  	// match: (Greater64 x y)
  2392  	// cond:
  2393  	// result: (GreaterThan (CMP x y))
  2394  	for {
  2395  		_ = v.Args[1]
  2396  		x := v.Args[0]
  2397  		y := v.Args[1]
  2398  		v.reset(OpPPC64GreaterThan)
  2399  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2400  		v0.AddArg(x)
  2401  		v0.AddArg(y)
  2402  		v.AddArg(v0)
  2403  		return true
  2404  	}
  2405  }
  2406  func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
  2407  	b := v.Block
  2408  	_ = b
  2409  	// match: (Greater64F x y)
  2410  	// cond:
  2411  	// result: (FGreaterThan (FCMPU x y))
  2412  	for {
  2413  		_ = v.Args[1]
  2414  		x := v.Args[0]
  2415  		y := v.Args[1]
  2416  		v.reset(OpPPC64FGreaterThan)
  2417  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2418  		v0.AddArg(x)
  2419  		v0.AddArg(y)
  2420  		v.AddArg(v0)
  2421  		return true
  2422  	}
  2423  }
  2424  func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
  2425  	b := v.Block
  2426  	_ = b
  2427  	// match: (Greater64U x y)
  2428  	// cond:
  2429  	// result: (GreaterThan (CMPU x y))
  2430  	for {
  2431  		_ = v.Args[1]
  2432  		x := v.Args[0]
  2433  		y := v.Args[1]
  2434  		v.reset(OpPPC64GreaterThan)
  2435  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2436  		v0.AddArg(x)
  2437  		v0.AddArg(y)
  2438  		v.AddArg(v0)
  2439  		return true
  2440  	}
  2441  }
  2442  func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
  2443  	b := v.Block
  2444  	_ = b
  2445  	typ := &b.Func.Config.Types
  2446  	_ = typ
  2447  	// match: (Greater8 x y)
  2448  	// cond:
  2449  	// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2450  	for {
  2451  		_ = v.Args[1]
  2452  		x := v.Args[0]
  2453  		y := v.Args[1]
  2454  		v.reset(OpPPC64GreaterThan)
  2455  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2456  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2457  		v1.AddArg(x)
  2458  		v0.AddArg(v1)
  2459  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2460  		v2.AddArg(y)
  2461  		v0.AddArg(v2)
  2462  		v.AddArg(v0)
  2463  		return true
  2464  	}
  2465  }
  2466  func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
  2467  	b := v.Block
  2468  	_ = b
  2469  	typ := &b.Func.Config.Types
  2470  	_ = typ
  2471  	// match: (Greater8U x y)
  2472  	// cond:
  2473  	// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2474  	for {
  2475  		_ = v.Args[1]
  2476  		x := v.Args[0]
  2477  		y := v.Args[1]
  2478  		v.reset(OpPPC64GreaterThan)
  2479  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2480  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2481  		v1.AddArg(x)
  2482  		v0.AddArg(v1)
  2483  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2484  		v2.AddArg(y)
  2485  		v0.AddArg(v2)
  2486  		v.AddArg(v0)
  2487  		return true
  2488  	}
  2489  }
  2490  func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
  2491  	// match: (Hmul32 x y)
  2492  	// cond:
  2493  	// result: (MULHW x y)
  2494  	for {
  2495  		_ = v.Args[1]
  2496  		x := v.Args[0]
  2497  		y := v.Args[1]
  2498  		v.reset(OpPPC64MULHW)
  2499  		v.AddArg(x)
  2500  		v.AddArg(y)
  2501  		return true
  2502  	}
  2503  }
  2504  func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
  2505  	// match: (Hmul32u x y)
  2506  	// cond:
  2507  	// result: (MULHWU x y)
  2508  	for {
  2509  		_ = v.Args[1]
  2510  		x := v.Args[0]
  2511  		y := v.Args[1]
  2512  		v.reset(OpPPC64MULHWU)
  2513  		v.AddArg(x)
  2514  		v.AddArg(y)
  2515  		return true
  2516  	}
  2517  }
  2518  func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
  2519  	// match: (Hmul64 x y)
  2520  	// cond:
  2521  	// result: (MULHD x y)
  2522  	for {
  2523  		_ = v.Args[1]
  2524  		x := v.Args[0]
  2525  		y := v.Args[1]
  2526  		v.reset(OpPPC64MULHD)
  2527  		v.AddArg(x)
  2528  		v.AddArg(y)
  2529  		return true
  2530  	}
  2531  }
  2532  func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
  2533  	// match: (Hmul64u x y)
  2534  	// cond:
  2535  	// result: (MULHDU x y)
  2536  	for {
  2537  		_ = v.Args[1]
  2538  		x := v.Args[0]
  2539  		y := v.Args[1]
  2540  		v.reset(OpPPC64MULHDU)
  2541  		v.AddArg(x)
  2542  		v.AddArg(y)
  2543  		return true
  2544  	}
  2545  }
  2546  func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
  2547  	// match: (InterCall [argwid] entry mem)
  2548  	// cond:
  2549  	// result: (CALLinter [argwid] entry mem)
  2550  	for {
  2551  		argwid := v.AuxInt
  2552  		_ = v.Args[1]
  2553  		entry := v.Args[0]
  2554  		mem := v.Args[1]
  2555  		v.reset(OpPPC64CALLinter)
  2556  		v.AuxInt = argwid
  2557  		v.AddArg(entry)
  2558  		v.AddArg(mem)
  2559  		return true
  2560  	}
  2561  }
  2562  func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
  2563  	b := v.Block
  2564  	_ = b
  2565  	// match: (IsInBounds idx len)
  2566  	// cond:
  2567  	// result: (LessThan (CMPU idx len))
  2568  	for {
  2569  		_ = v.Args[1]
  2570  		idx := v.Args[0]
  2571  		len := v.Args[1]
  2572  		v.reset(OpPPC64LessThan)
  2573  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2574  		v0.AddArg(idx)
  2575  		v0.AddArg(len)
  2576  		v.AddArg(v0)
  2577  		return true
  2578  	}
  2579  }
  2580  func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
  2581  	b := v.Block
  2582  	_ = b
  2583  	// match: (IsNonNil ptr)
  2584  	// cond:
  2585  	// result: (NotEqual (CMPconst [0] ptr))
  2586  	for {
  2587  		ptr := v.Args[0]
  2588  		v.reset(OpPPC64NotEqual)
  2589  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  2590  		v0.AuxInt = 0
  2591  		v0.AddArg(ptr)
  2592  		v.AddArg(v0)
  2593  		return true
  2594  	}
  2595  }
  2596  func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
  2597  	b := v.Block
  2598  	_ = b
  2599  	// match: (IsSliceInBounds idx len)
  2600  	// cond:
  2601  	// result: (LessEqual (CMPU idx len))
  2602  	for {
  2603  		_ = v.Args[1]
  2604  		idx := v.Args[0]
  2605  		len := v.Args[1]
  2606  		v.reset(OpPPC64LessEqual)
  2607  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2608  		v0.AddArg(idx)
  2609  		v0.AddArg(len)
  2610  		v.AddArg(v0)
  2611  		return true
  2612  	}
  2613  }
  2614  func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
  2615  	b := v.Block
  2616  	_ = b
  2617  	typ := &b.Func.Config.Types
  2618  	_ = typ
  2619  	// match: (Leq16 x y)
  2620  	// cond:
  2621  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2622  	for {
  2623  		_ = v.Args[1]
  2624  		x := v.Args[0]
  2625  		y := v.Args[1]
  2626  		v.reset(OpPPC64LessEqual)
  2627  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2628  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2629  		v1.AddArg(x)
  2630  		v0.AddArg(v1)
  2631  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2632  		v2.AddArg(y)
  2633  		v0.AddArg(v2)
  2634  		v.AddArg(v0)
  2635  		return true
  2636  	}
  2637  }
  2638  func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
  2639  	b := v.Block
  2640  	_ = b
  2641  	typ := &b.Func.Config.Types
  2642  	_ = typ
  2643  	// match: (Leq16U x y)
  2644  	// cond:
  2645  	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2646  	for {
  2647  		_ = v.Args[1]
  2648  		x := v.Args[0]
  2649  		y := v.Args[1]
  2650  		v.reset(OpPPC64LessEqual)
  2651  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2652  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2653  		v1.AddArg(x)
  2654  		v0.AddArg(v1)
  2655  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2656  		v2.AddArg(y)
  2657  		v0.AddArg(v2)
  2658  		v.AddArg(v0)
  2659  		return true
  2660  	}
  2661  }
  2662  func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
  2663  	b := v.Block
  2664  	_ = b
  2665  	// match: (Leq32 x y)
  2666  	// cond:
  2667  	// result: (LessEqual (CMPW x y))
  2668  	for {
  2669  		_ = v.Args[1]
  2670  		x := v.Args[0]
  2671  		y := v.Args[1]
  2672  		v.reset(OpPPC64LessEqual)
  2673  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2674  		v0.AddArg(x)
  2675  		v0.AddArg(y)
  2676  		v.AddArg(v0)
  2677  		return true
  2678  	}
  2679  }
  2680  func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
  2681  	b := v.Block
  2682  	_ = b
  2683  	// match: (Leq32F x y)
  2684  	// cond:
  2685  	// result: (FLessEqual (FCMPU x y))
  2686  	for {
  2687  		_ = v.Args[1]
  2688  		x := v.Args[0]
  2689  		y := v.Args[1]
  2690  		v.reset(OpPPC64FLessEqual)
  2691  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2692  		v0.AddArg(x)
  2693  		v0.AddArg(y)
  2694  		v.AddArg(v0)
  2695  		return true
  2696  	}
  2697  }
  2698  func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
  2699  	b := v.Block
  2700  	_ = b
  2701  	// match: (Leq32U x y)
  2702  	// cond:
  2703  	// result: (LessEqual (CMPWU x y))
  2704  	for {
  2705  		_ = v.Args[1]
  2706  		x := v.Args[0]
  2707  		y := v.Args[1]
  2708  		v.reset(OpPPC64LessEqual)
  2709  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2710  		v0.AddArg(x)
  2711  		v0.AddArg(y)
  2712  		v.AddArg(v0)
  2713  		return true
  2714  	}
  2715  }
  2716  func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
  2717  	b := v.Block
  2718  	_ = b
  2719  	// match: (Leq64 x y)
  2720  	// cond:
  2721  	// result: (LessEqual (CMP x y))
  2722  	for {
  2723  		_ = v.Args[1]
  2724  		x := v.Args[0]
  2725  		y := v.Args[1]
  2726  		v.reset(OpPPC64LessEqual)
  2727  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2728  		v0.AddArg(x)
  2729  		v0.AddArg(y)
  2730  		v.AddArg(v0)
  2731  		return true
  2732  	}
  2733  }
  2734  func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
  2735  	b := v.Block
  2736  	_ = b
  2737  	// match: (Leq64F x y)
  2738  	// cond:
  2739  	// result: (FLessEqual (FCMPU x y))
  2740  	for {
  2741  		_ = v.Args[1]
  2742  		x := v.Args[0]
  2743  		y := v.Args[1]
  2744  		v.reset(OpPPC64FLessEqual)
  2745  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2746  		v0.AddArg(x)
  2747  		v0.AddArg(y)
  2748  		v.AddArg(v0)
  2749  		return true
  2750  	}
  2751  }
  2752  func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
  2753  	b := v.Block
  2754  	_ = b
  2755  	// match: (Leq64U x y)
  2756  	// cond:
  2757  	// result: (LessEqual (CMPU x y))
  2758  	for {
  2759  		_ = v.Args[1]
  2760  		x := v.Args[0]
  2761  		y := v.Args[1]
  2762  		v.reset(OpPPC64LessEqual)
  2763  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2764  		v0.AddArg(x)
  2765  		v0.AddArg(y)
  2766  		v.AddArg(v0)
  2767  		return true
  2768  	}
  2769  }
  2770  func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
  2771  	b := v.Block
  2772  	_ = b
  2773  	typ := &b.Func.Config.Types
  2774  	_ = typ
  2775  	// match: (Leq8 x y)
  2776  	// cond:
  2777  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2778  	for {
  2779  		_ = v.Args[1]
  2780  		x := v.Args[0]
  2781  		y := v.Args[1]
  2782  		v.reset(OpPPC64LessEqual)
  2783  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2784  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2785  		v1.AddArg(x)
  2786  		v0.AddArg(v1)
  2787  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2788  		v2.AddArg(y)
  2789  		v0.AddArg(v2)
  2790  		v.AddArg(v0)
  2791  		return true
  2792  	}
  2793  }
  2794  func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
  2795  	b := v.Block
  2796  	_ = b
  2797  	typ := &b.Func.Config.Types
  2798  	_ = typ
  2799  	// match: (Leq8U x y)
  2800  	// cond:
  2801  	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2802  	for {
  2803  		_ = v.Args[1]
  2804  		x := v.Args[0]
  2805  		y := v.Args[1]
  2806  		v.reset(OpPPC64LessEqual)
  2807  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2808  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2809  		v1.AddArg(x)
  2810  		v0.AddArg(v1)
  2811  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2812  		v2.AddArg(y)
  2813  		v0.AddArg(v2)
  2814  		v.AddArg(v0)
  2815  		return true
  2816  	}
  2817  }
  2818  func rewriteValuePPC64_OpLess16_0(v *Value) bool {
  2819  	b := v.Block
  2820  	_ = b
  2821  	typ := &b.Func.Config.Types
  2822  	_ = typ
  2823  	// match: (Less16 x y)
  2824  	// cond:
  2825  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2826  	for {
  2827  		_ = v.Args[1]
  2828  		x := v.Args[0]
  2829  		y := v.Args[1]
  2830  		v.reset(OpPPC64LessThan)
  2831  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2832  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2833  		v1.AddArg(x)
  2834  		v0.AddArg(v1)
  2835  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2836  		v2.AddArg(y)
  2837  		v0.AddArg(v2)
  2838  		v.AddArg(v0)
  2839  		return true
  2840  	}
  2841  }
  2842  func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
  2843  	b := v.Block
  2844  	_ = b
  2845  	typ := &b.Func.Config.Types
  2846  	_ = typ
  2847  	// match: (Less16U x y)
  2848  	// cond:
  2849  	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2850  	for {
  2851  		_ = v.Args[1]
  2852  		x := v.Args[0]
  2853  		y := v.Args[1]
  2854  		v.reset(OpPPC64LessThan)
  2855  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2856  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2857  		v1.AddArg(x)
  2858  		v0.AddArg(v1)
  2859  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2860  		v2.AddArg(y)
  2861  		v0.AddArg(v2)
  2862  		v.AddArg(v0)
  2863  		return true
  2864  	}
  2865  }
  2866  func rewriteValuePPC64_OpLess32_0(v *Value) bool {
  2867  	b := v.Block
  2868  	_ = b
  2869  	// match: (Less32 x y)
  2870  	// cond:
  2871  	// result: (LessThan (CMPW x y))
  2872  	for {
  2873  		_ = v.Args[1]
  2874  		x := v.Args[0]
  2875  		y := v.Args[1]
  2876  		v.reset(OpPPC64LessThan)
  2877  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2878  		v0.AddArg(x)
  2879  		v0.AddArg(y)
  2880  		v.AddArg(v0)
  2881  		return true
  2882  	}
  2883  }
  2884  func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
  2885  	b := v.Block
  2886  	_ = b
  2887  	// match: (Less32F x y)
  2888  	// cond:
  2889  	// result: (FLessThan (FCMPU x y))
  2890  	for {
  2891  		_ = v.Args[1]
  2892  		x := v.Args[0]
  2893  		y := v.Args[1]
  2894  		v.reset(OpPPC64FLessThan)
  2895  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2896  		v0.AddArg(x)
  2897  		v0.AddArg(y)
  2898  		v.AddArg(v0)
  2899  		return true
  2900  	}
  2901  }
  2902  func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
  2903  	b := v.Block
  2904  	_ = b
  2905  	// match: (Less32U x y)
  2906  	// cond:
  2907  	// result: (LessThan (CMPWU x y))
  2908  	for {
  2909  		_ = v.Args[1]
  2910  		x := v.Args[0]
  2911  		y := v.Args[1]
  2912  		v.reset(OpPPC64LessThan)
  2913  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2914  		v0.AddArg(x)
  2915  		v0.AddArg(y)
  2916  		v.AddArg(v0)
  2917  		return true
  2918  	}
  2919  }
  2920  func rewriteValuePPC64_OpLess64_0(v *Value) bool {
  2921  	b := v.Block
  2922  	_ = b
  2923  	// match: (Less64 x y)
  2924  	// cond:
  2925  	// result: (LessThan (CMP x y))
  2926  	for {
  2927  		_ = v.Args[1]
  2928  		x := v.Args[0]
  2929  		y := v.Args[1]
  2930  		v.reset(OpPPC64LessThan)
  2931  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2932  		v0.AddArg(x)
  2933  		v0.AddArg(y)
  2934  		v.AddArg(v0)
  2935  		return true
  2936  	}
  2937  }
  2938  func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
  2939  	b := v.Block
  2940  	_ = b
  2941  	// match: (Less64F x y)
  2942  	// cond:
  2943  	// result: (FLessThan (FCMPU x y))
  2944  	for {
  2945  		_ = v.Args[1]
  2946  		x := v.Args[0]
  2947  		y := v.Args[1]
  2948  		v.reset(OpPPC64FLessThan)
  2949  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2950  		v0.AddArg(x)
  2951  		v0.AddArg(y)
  2952  		v.AddArg(v0)
  2953  		return true
  2954  	}
  2955  }
  2956  func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
  2957  	b := v.Block
  2958  	_ = b
  2959  	// match: (Less64U x y)
  2960  	// cond:
  2961  	// result: (LessThan (CMPU x y))
  2962  	for {
  2963  		_ = v.Args[1]
  2964  		x := v.Args[0]
  2965  		y := v.Args[1]
  2966  		v.reset(OpPPC64LessThan)
  2967  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2968  		v0.AddArg(x)
  2969  		v0.AddArg(y)
  2970  		v.AddArg(v0)
  2971  		return true
  2972  	}
  2973  }
  2974  func rewriteValuePPC64_OpLess8_0(v *Value) bool {
  2975  	b := v.Block
  2976  	_ = b
  2977  	typ := &b.Func.Config.Types
  2978  	_ = typ
  2979  	// match: (Less8 x y)
  2980  	// cond:
  2981  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2982  	for {
  2983  		_ = v.Args[1]
  2984  		x := v.Args[0]
  2985  		y := v.Args[1]
  2986  		v.reset(OpPPC64LessThan)
  2987  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2988  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2989  		v1.AddArg(x)
  2990  		v0.AddArg(v1)
  2991  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2992  		v2.AddArg(y)
  2993  		v0.AddArg(v2)
  2994  		v.AddArg(v0)
  2995  		return true
  2996  	}
  2997  }
  2998  func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
  2999  	b := v.Block
  3000  	_ = b
  3001  	typ := &b.Func.Config.Types
  3002  	_ = typ
  3003  	// match: (Less8U x y)
  3004  	// cond:
  3005  	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  3006  	for {
  3007  		_ = v.Args[1]
  3008  		x := v.Args[0]
  3009  		y := v.Args[1]
  3010  		v.reset(OpPPC64LessThan)
  3011  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  3012  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  3013  		v1.AddArg(x)
  3014  		v0.AddArg(v1)
  3015  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  3016  		v2.AddArg(y)
  3017  		v0.AddArg(v2)
  3018  		v.AddArg(v0)
  3019  		return true
  3020  	}
  3021  }
  3022  func rewriteValuePPC64_OpLoad_0(v *Value) bool {
  3023  	b := v.Block
  3024  	_ = b
  3025  	typ := &b.Func.Config.Types
  3026  	_ = typ
  3027  	// match: (Load <t> ptr mem)
  3028  	// cond: (is64BitInt(t) || isPtr(t))
  3029  	// result: (MOVDload ptr mem)
  3030  	for {
  3031  		t := v.Type
  3032  		_ = v.Args[1]
  3033  		ptr := v.Args[0]
  3034  		mem := v.Args[1]
  3035  		if !(is64BitInt(t) || isPtr(t)) {
  3036  			break
  3037  		}
  3038  		v.reset(OpPPC64MOVDload)
  3039  		v.AddArg(ptr)
  3040  		v.AddArg(mem)
  3041  		return true
  3042  	}
  3043  	// match: (Load <t> ptr mem)
  3044  	// cond: is32BitInt(t) && isSigned(t)
  3045  	// result: (MOVWload ptr mem)
  3046  	for {
  3047  		t := v.Type
  3048  		_ = v.Args[1]
  3049  		ptr := v.Args[0]
  3050  		mem := v.Args[1]
  3051  		if !(is32BitInt(t) && isSigned(t)) {
  3052  			break
  3053  		}
  3054  		v.reset(OpPPC64MOVWload)
  3055  		v.AddArg(ptr)
  3056  		v.AddArg(mem)
  3057  		return true
  3058  	}
  3059  	// match: (Load <t> ptr mem)
  3060  	// cond: is32BitInt(t) && !isSigned(t)
  3061  	// result: (MOVWZload ptr mem)
  3062  	for {
  3063  		t := v.Type
  3064  		_ = v.Args[1]
  3065  		ptr := v.Args[0]
  3066  		mem := v.Args[1]
  3067  		if !(is32BitInt(t) && !isSigned(t)) {
  3068  			break
  3069  		}
  3070  		v.reset(OpPPC64MOVWZload)
  3071  		v.AddArg(ptr)
  3072  		v.AddArg(mem)
  3073  		return true
  3074  	}
  3075  	// match: (Load <t> ptr mem)
  3076  	// cond: is16BitInt(t) && isSigned(t)
  3077  	// result: (MOVHload ptr mem)
  3078  	for {
  3079  		t := v.Type
  3080  		_ = v.Args[1]
  3081  		ptr := v.Args[0]
  3082  		mem := v.Args[1]
  3083  		if !(is16BitInt(t) && isSigned(t)) {
  3084  			break
  3085  		}
  3086  		v.reset(OpPPC64MOVHload)
  3087  		v.AddArg(ptr)
  3088  		v.AddArg(mem)
  3089  		return true
  3090  	}
  3091  	// match: (Load <t> ptr mem)
  3092  	// cond: is16BitInt(t) && !isSigned(t)
  3093  	// result: (MOVHZload ptr mem)
  3094  	for {
  3095  		t := v.Type
  3096  		_ = v.Args[1]
  3097  		ptr := v.Args[0]
  3098  		mem := v.Args[1]
  3099  		if !(is16BitInt(t) && !isSigned(t)) {
  3100  			break
  3101  		}
  3102  		v.reset(OpPPC64MOVHZload)
  3103  		v.AddArg(ptr)
  3104  		v.AddArg(mem)
  3105  		return true
  3106  	}
  3107  	// match: (Load <t> ptr mem)
  3108  	// cond: t.IsBoolean()
  3109  	// result: (MOVBZload ptr mem)
  3110  	for {
  3111  		t := v.Type
  3112  		_ = v.Args[1]
  3113  		ptr := v.Args[0]
  3114  		mem := v.Args[1]
  3115  		if !(t.IsBoolean()) {
  3116  			break
  3117  		}
  3118  		v.reset(OpPPC64MOVBZload)
  3119  		v.AddArg(ptr)
  3120  		v.AddArg(mem)
  3121  		return true
  3122  	}
  3123  	// match: (Load <t> ptr mem)
  3124  	// cond: is8BitInt(t) && isSigned(t)
  3125  	// result: (MOVBreg (MOVBZload ptr mem))
  3126  	for {
  3127  		t := v.Type
  3128  		_ = v.Args[1]
  3129  		ptr := v.Args[0]
  3130  		mem := v.Args[1]
  3131  		if !(is8BitInt(t) && isSigned(t)) {
  3132  			break
  3133  		}
  3134  		v.reset(OpPPC64MOVBreg)
  3135  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  3136  		v0.AddArg(ptr)
  3137  		v0.AddArg(mem)
  3138  		v.AddArg(v0)
  3139  		return true
  3140  	}
  3141  	// match: (Load <t> ptr mem)
  3142  	// cond: is8BitInt(t) && !isSigned(t)
  3143  	// result: (MOVBZload ptr mem)
  3144  	for {
  3145  		t := v.Type
  3146  		_ = v.Args[1]
  3147  		ptr := v.Args[0]
  3148  		mem := v.Args[1]
  3149  		if !(is8BitInt(t) && !isSigned(t)) {
  3150  			break
  3151  		}
  3152  		v.reset(OpPPC64MOVBZload)
  3153  		v.AddArg(ptr)
  3154  		v.AddArg(mem)
  3155  		return true
  3156  	}
  3157  	// match: (Load <t> ptr mem)
  3158  	// cond: is32BitFloat(t)
  3159  	// result: (FMOVSload ptr mem)
  3160  	for {
  3161  		t := v.Type
  3162  		_ = v.Args[1]
  3163  		ptr := v.Args[0]
  3164  		mem := v.Args[1]
  3165  		if !(is32BitFloat(t)) {
  3166  			break
  3167  		}
  3168  		v.reset(OpPPC64FMOVSload)
  3169  		v.AddArg(ptr)
  3170  		v.AddArg(mem)
  3171  		return true
  3172  	}
  3173  	// match: (Load <t> ptr mem)
  3174  	// cond: is64BitFloat(t)
  3175  	// result: (FMOVDload ptr mem)
  3176  	for {
  3177  		t := v.Type
  3178  		_ = v.Args[1]
  3179  		ptr := v.Args[0]
  3180  		mem := v.Args[1]
  3181  		if !(is64BitFloat(t)) {
  3182  			break
  3183  		}
  3184  		v.reset(OpPPC64FMOVDload)
  3185  		v.AddArg(ptr)
  3186  		v.AddArg(mem)
  3187  		return true
  3188  	}
  3189  	return false
  3190  }
  3191  func rewriteValuePPC64_OpLocalAddr_0(v *Value) bool {
  3192  	// match: (LocalAddr {sym} base _)
  3193  	// cond:
  3194  	// result: (MOVDaddr {sym} base)
  3195  	for {
  3196  		sym := v.Aux
  3197  		_ = v.Args[1]
  3198  		base := v.Args[0]
  3199  		v.reset(OpPPC64MOVDaddr)
  3200  		v.Aux = sym
  3201  		v.AddArg(base)
  3202  		return true
  3203  	}
  3204  }
  3205  func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
  3206  	b := v.Block
  3207  	_ = b
  3208  	typ := &b.Func.Config.Types
  3209  	_ = typ
  3210  	// match: (Lsh16x16 x y)
  3211  	// cond: shiftIsBounded(v)
  3212  	// result: (SLW x y)
  3213  	for {
  3214  		_ = v.Args[1]
  3215  		x := v.Args[0]
  3216  		y := v.Args[1]
  3217  		if !(shiftIsBounded(v)) {
  3218  			break
  3219  		}
  3220  		v.reset(OpPPC64SLW)
  3221  		v.AddArg(x)
  3222  		v.AddArg(y)
  3223  		return true
  3224  	}
  3225  	// match: (Lsh16x16 x y)
  3226  	// cond:
  3227  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
  3228  	for {
  3229  		_ = v.Args[1]
  3230  		x := v.Args[0]
  3231  		y := v.Args[1]
  3232  		v.reset(OpPPC64SLW)
  3233  		v.AddArg(x)
  3234  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3235  		v0.AddArg(y)
  3236  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3237  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3238  		v2.AuxInt = -16
  3239  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3240  		v3.AddArg(y)
  3241  		v2.AddArg(v3)
  3242  		v1.AddArg(v2)
  3243  		v0.AddArg(v1)
  3244  		v.AddArg(v0)
  3245  		return true
  3246  	}
  3247  }
  3248  func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
  3249  	b := v.Block
  3250  	_ = b
  3251  	typ := &b.Func.Config.Types
  3252  	_ = typ
  3253  	// match: (Lsh16x32 x (Const64 [c]))
  3254  	// cond: uint32(c) < 16
  3255  	// result: (SLWconst x [c])
  3256  	for {
  3257  		_ = v.Args[1]
  3258  		x := v.Args[0]
  3259  		v_1 := v.Args[1]
  3260  		if v_1.Op != OpConst64 {
  3261  			break
  3262  		}
  3263  		c := v_1.AuxInt
  3264  		if !(uint32(c) < 16) {
  3265  			break
  3266  		}
  3267  		v.reset(OpPPC64SLWconst)
  3268  		v.AuxInt = c
  3269  		v.AddArg(x)
  3270  		return true
  3271  	}
  3272  	// match: (Lsh16x32 x (MOVDconst [c]))
  3273  	// cond: uint32(c) < 16
  3274  	// result: (SLWconst x [c])
  3275  	for {
  3276  		_ = v.Args[1]
  3277  		x := v.Args[0]
  3278  		v_1 := v.Args[1]
  3279  		if v_1.Op != OpPPC64MOVDconst {
  3280  			break
  3281  		}
  3282  		c := v_1.AuxInt
  3283  		if !(uint32(c) < 16) {
  3284  			break
  3285  		}
  3286  		v.reset(OpPPC64SLWconst)
  3287  		v.AuxInt = c
  3288  		v.AddArg(x)
  3289  		return true
  3290  	}
  3291  	// match: (Lsh16x32 x y)
  3292  	// cond: shiftIsBounded(v)
  3293  	// result: (SLW x y)
  3294  	for {
  3295  		_ = v.Args[1]
  3296  		x := v.Args[0]
  3297  		y := v.Args[1]
  3298  		if !(shiftIsBounded(v)) {
  3299  			break
  3300  		}
  3301  		v.reset(OpPPC64SLW)
  3302  		v.AddArg(x)
  3303  		v.AddArg(y)
  3304  		return true
  3305  	}
  3306  	// match: (Lsh16x32 x y)
  3307  	// cond:
  3308  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
  3309  	for {
  3310  		_ = v.Args[1]
  3311  		x := v.Args[0]
  3312  		y := v.Args[1]
  3313  		v.reset(OpPPC64SLW)
  3314  		v.AddArg(x)
  3315  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3316  		v0.AddArg(y)
  3317  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3318  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3319  		v2.AuxInt = -16
  3320  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3321  		v3.AddArg(y)
  3322  		v2.AddArg(v3)
  3323  		v1.AddArg(v2)
  3324  		v0.AddArg(v1)
  3325  		v.AddArg(v0)
  3326  		return true
  3327  	}
  3328  }
  3329  func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
  3330  	b := v.Block
  3331  	_ = b
  3332  	typ := &b.Func.Config.Types
  3333  	_ = typ
  3334  	// match: (Lsh16x64 x (Const64 [c]))
  3335  	// cond: uint64(c) < 16
  3336  	// result: (SLWconst x [c])
  3337  	for {
  3338  		_ = v.Args[1]
  3339  		x := v.Args[0]
  3340  		v_1 := v.Args[1]
  3341  		if v_1.Op != OpConst64 {
  3342  			break
  3343  		}
  3344  		c := v_1.AuxInt
  3345  		if !(uint64(c) < 16) {
  3346  			break
  3347  		}
  3348  		v.reset(OpPPC64SLWconst)
  3349  		v.AuxInt = c
  3350  		v.AddArg(x)
  3351  		return true
  3352  	}
  3353  	// match: (Lsh16x64 _ (Const64 [c]))
  3354  	// cond: uint64(c) >= 16
  3355  	// result: (MOVDconst [0])
  3356  	for {
  3357  		_ = v.Args[1]
  3358  		v_1 := v.Args[1]
  3359  		if v_1.Op != OpConst64 {
  3360  			break
  3361  		}
  3362  		c := v_1.AuxInt
  3363  		if !(uint64(c) >= 16) {
  3364  			break
  3365  		}
  3366  		v.reset(OpPPC64MOVDconst)
  3367  		v.AuxInt = 0
  3368  		return true
  3369  	}
  3370  	// match: (Lsh16x64 x (MOVDconst [c]))
  3371  	// cond: uint64(c) < 16
  3372  	// result: (SLWconst x [c])
  3373  	for {
  3374  		_ = v.Args[1]
  3375  		x := v.Args[0]
  3376  		v_1 := v.Args[1]
  3377  		if v_1.Op != OpPPC64MOVDconst {
  3378  			break
  3379  		}
  3380  		c := v_1.AuxInt
  3381  		if !(uint64(c) < 16) {
  3382  			break
  3383  		}
  3384  		v.reset(OpPPC64SLWconst)
  3385  		v.AuxInt = c
  3386  		v.AddArg(x)
  3387  		return true
  3388  	}
  3389  	// match: (Lsh16x64 x y)
  3390  	// cond: shiftIsBounded(v)
  3391  	// result: (SLW x y)
  3392  	for {
  3393  		_ = v.Args[1]
  3394  		x := v.Args[0]
  3395  		y := v.Args[1]
  3396  		if !(shiftIsBounded(v)) {
  3397  			break
  3398  		}
  3399  		v.reset(OpPPC64SLW)
  3400  		v.AddArg(x)
  3401  		v.AddArg(y)
  3402  		return true
  3403  	}
  3404  	// match: (Lsh16x64 x y)
  3405  	// cond:
  3406  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
  3407  	for {
  3408  		_ = v.Args[1]
  3409  		x := v.Args[0]
  3410  		y := v.Args[1]
  3411  		v.reset(OpPPC64SLW)
  3412  		v.AddArg(x)
  3413  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3414  		v0.AddArg(y)
  3415  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3416  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3417  		v2.AuxInt = -16
  3418  		v2.AddArg(y)
  3419  		v1.AddArg(v2)
  3420  		v0.AddArg(v1)
  3421  		v.AddArg(v0)
  3422  		return true
  3423  	}
  3424  }
  3425  func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
  3426  	b := v.Block
  3427  	_ = b
  3428  	typ := &b.Func.Config.Types
  3429  	_ = typ
  3430  	// match: (Lsh16x8 x y)
  3431  	// cond: shiftIsBounded(v)
  3432  	// result: (SLW x y)
  3433  	for {
  3434  		_ = v.Args[1]
  3435  		x := v.Args[0]
  3436  		y := v.Args[1]
  3437  		if !(shiftIsBounded(v)) {
  3438  			break
  3439  		}
  3440  		v.reset(OpPPC64SLW)
  3441  		v.AddArg(x)
  3442  		v.AddArg(y)
  3443  		return true
  3444  	}
  3445  	// match: (Lsh16x8 x y)
  3446  	// cond:
  3447  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
  3448  	for {
  3449  		_ = v.Args[1]
  3450  		x := v.Args[0]
  3451  		y := v.Args[1]
  3452  		v.reset(OpPPC64SLW)
  3453  		v.AddArg(x)
  3454  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3455  		v0.AddArg(y)
  3456  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3457  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3458  		v2.AuxInt = -16
  3459  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3460  		v3.AddArg(y)
  3461  		v2.AddArg(v3)
  3462  		v1.AddArg(v2)
  3463  		v0.AddArg(v1)
  3464  		v.AddArg(v0)
  3465  		return true
  3466  	}
  3467  }
  3468  func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
  3469  	b := v.Block
  3470  	_ = b
  3471  	typ := &b.Func.Config.Types
  3472  	_ = typ
  3473  	// match: (Lsh32x16 x y)
  3474  	// cond: shiftIsBounded(v)
  3475  	// result: (SLW x y)
  3476  	for {
  3477  		_ = v.Args[1]
  3478  		x := v.Args[0]
  3479  		y := v.Args[1]
  3480  		if !(shiftIsBounded(v)) {
  3481  			break
  3482  		}
  3483  		v.reset(OpPPC64SLW)
  3484  		v.AddArg(x)
  3485  		v.AddArg(y)
  3486  		return true
  3487  	}
  3488  	// match: (Lsh32x16 x y)
  3489  	// cond:
  3490  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
  3491  	for {
  3492  		_ = v.Args[1]
  3493  		x := v.Args[0]
  3494  		y := v.Args[1]
  3495  		v.reset(OpPPC64SLW)
  3496  		v.AddArg(x)
  3497  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3498  		v0.AddArg(y)
  3499  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3500  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3501  		v2.AuxInt = -32
  3502  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3503  		v3.AddArg(y)
  3504  		v2.AddArg(v3)
  3505  		v1.AddArg(v2)
  3506  		v0.AddArg(v1)
  3507  		v.AddArg(v0)
  3508  		return true
  3509  	}
  3510  }
  3511  func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
  3512  	b := v.Block
  3513  	_ = b
  3514  	typ := &b.Func.Config.Types
  3515  	_ = typ
  3516  	// match: (Lsh32x32 x (Const64 [c]))
  3517  	// cond: uint32(c) < 32
  3518  	// result: (SLWconst x [c])
  3519  	for {
  3520  		_ = v.Args[1]
  3521  		x := v.Args[0]
  3522  		v_1 := v.Args[1]
  3523  		if v_1.Op != OpConst64 {
  3524  			break
  3525  		}
  3526  		c := v_1.AuxInt
  3527  		if !(uint32(c) < 32) {
  3528  			break
  3529  		}
  3530  		v.reset(OpPPC64SLWconst)
  3531  		v.AuxInt = c
  3532  		v.AddArg(x)
  3533  		return true
  3534  	}
  3535  	// match: (Lsh32x32 x (MOVDconst [c]))
  3536  	// cond: uint32(c) < 32
  3537  	// result: (SLWconst x [c])
  3538  	for {
  3539  		_ = v.Args[1]
  3540  		x := v.Args[0]
  3541  		v_1 := v.Args[1]
  3542  		if v_1.Op != OpPPC64MOVDconst {
  3543  			break
  3544  		}
  3545  		c := v_1.AuxInt
  3546  		if !(uint32(c) < 32) {
  3547  			break
  3548  		}
  3549  		v.reset(OpPPC64SLWconst)
  3550  		v.AuxInt = c
  3551  		v.AddArg(x)
  3552  		return true
  3553  	}
  3554  	// match: (Lsh32x32 x y)
  3555  	// cond: shiftIsBounded(v)
  3556  	// result: (SLW x y)
  3557  	for {
  3558  		_ = v.Args[1]
  3559  		x := v.Args[0]
  3560  		y := v.Args[1]
  3561  		if !(shiftIsBounded(v)) {
  3562  			break
  3563  		}
  3564  		v.reset(OpPPC64SLW)
  3565  		v.AddArg(x)
  3566  		v.AddArg(y)
  3567  		return true
  3568  	}
  3569  	// match: (Lsh32x32 x y)
  3570  	// cond:
  3571  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
  3572  	for {
  3573  		_ = v.Args[1]
  3574  		x := v.Args[0]
  3575  		y := v.Args[1]
  3576  		v.reset(OpPPC64SLW)
  3577  		v.AddArg(x)
  3578  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3579  		v0.AddArg(y)
  3580  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3581  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3582  		v2.AuxInt = -32
  3583  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3584  		v3.AddArg(y)
  3585  		v2.AddArg(v3)
  3586  		v1.AddArg(v2)
  3587  		v0.AddArg(v1)
  3588  		v.AddArg(v0)
  3589  		return true
  3590  	}
  3591  }
  3592  func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
  3593  	b := v.Block
  3594  	_ = b
  3595  	typ := &b.Func.Config.Types
  3596  	_ = typ
  3597  	// match: (Lsh32x64 x (Const64 [c]))
  3598  	// cond: uint64(c) < 32
  3599  	// result: (SLWconst x [c])
  3600  	for {
  3601  		_ = v.Args[1]
  3602  		x := v.Args[0]
  3603  		v_1 := v.Args[1]
  3604  		if v_1.Op != OpConst64 {
  3605  			break
  3606  		}
  3607  		c := v_1.AuxInt
  3608  		if !(uint64(c) < 32) {
  3609  			break
  3610  		}
  3611  		v.reset(OpPPC64SLWconst)
  3612  		v.AuxInt = c
  3613  		v.AddArg(x)
  3614  		return true
  3615  	}
  3616  	// match: (Lsh32x64 _ (Const64 [c]))
  3617  	// cond: uint64(c) >= 32
  3618  	// result: (MOVDconst [0])
  3619  	for {
  3620  		_ = v.Args[1]
  3621  		v_1 := v.Args[1]
  3622  		if v_1.Op != OpConst64 {
  3623  			break
  3624  		}
  3625  		c := v_1.AuxInt
  3626  		if !(uint64(c) >= 32) {
  3627  			break
  3628  		}
  3629  		v.reset(OpPPC64MOVDconst)
  3630  		v.AuxInt = 0
  3631  		return true
  3632  	}
  3633  	// match: (Lsh32x64 x (MOVDconst [c]))
  3634  	// cond: uint64(c) < 32
  3635  	// result: (SLWconst x [c])
  3636  	for {
  3637  		_ = v.Args[1]
  3638  		x := v.Args[0]
  3639  		v_1 := v.Args[1]
  3640  		if v_1.Op != OpPPC64MOVDconst {
  3641  			break
  3642  		}
  3643  		c := v_1.AuxInt
  3644  		if !(uint64(c) < 32) {
  3645  			break
  3646  		}
  3647  		v.reset(OpPPC64SLWconst)
  3648  		v.AuxInt = c
  3649  		v.AddArg(x)
  3650  		return true
  3651  	}
  3652  	// match: (Lsh32x64 x y)
  3653  	// cond: shiftIsBounded(v)
  3654  	// result: (SLW x y)
  3655  	for {
  3656  		_ = v.Args[1]
  3657  		x := v.Args[0]
  3658  		y := v.Args[1]
  3659  		if !(shiftIsBounded(v)) {
  3660  			break
  3661  		}
  3662  		v.reset(OpPPC64SLW)
  3663  		v.AddArg(x)
  3664  		v.AddArg(y)
  3665  		return true
  3666  	}
  3667  	// match: (Lsh32x64 x (AND y (MOVDconst [31])))
  3668  	// cond:
  3669  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3670  	for {
  3671  		_ = v.Args[1]
  3672  		x := v.Args[0]
  3673  		v_1 := v.Args[1]
  3674  		if v_1.Op != OpPPC64AND {
  3675  			break
  3676  		}
  3677  		_ = v_1.Args[1]
  3678  		y := v_1.Args[0]
  3679  		v_1_1 := v_1.Args[1]
  3680  		if v_1_1.Op != OpPPC64MOVDconst {
  3681  			break
  3682  		}
  3683  		if v_1_1.AuxInt != 31 {
  3684  			break
  3685  		}
  3686  		v.reset(OpPPC64SLW)
  3687  		v.AddArg(x)
  3688  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3689  		v0.AuxInt = 31
  3690  		v0.AddArg(y)
  3691  		v.AddArg(v0)
  3692  		return true
  3693  	}
  3694  	// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
  3695  	// cond:
  3696  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3697  	for {
  3698  		_ = v.Args[1]
  3699  		x := v.Args[0]
  3700  		v_1 := v.Args[1]
  3701  		if v_1.Op != OpPPC64AND {
  3702  			break
  3703  		}
  3704  		_ = v_1.Args[1]
  3705  		v_1_0 := v_1.Args[0]
  3706  		if v_1_0.Op != OpPPC64MOVDconst {
  3707  			break
  3708  		}
  3709  		if v_1_0.AuxInt != 31 {
  3710  			break
  3711  		}
  3712  		y := v_1.Args[1]
  3713  		v.reset(OpPPC64SLW)
  3714  		v.AddArg(x)
  3715  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3716  		v0.AuxInt = 31
  3717  		v0.AddArg(y)
  3718  		v.AddArg(v0)
  3719  		return true
  3720  	}
  3721  	// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
  3722  	// cond:
  3723  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3724  	for {
  3725  		_ = v.Args[1]
  3726  		x := v.Args[0]
  3727  		v_1 := v.Args[1]
  3728  		if v_1.Op != OpPPC64ANDconst {
  3729  			break
  3730  		}
  3731  		if v_1.Type != typ.Int32 {
  3732  			break
  3733  		}
  3734  		if v_1.AuxInt != 31 {
  3735  			break
  3736  		}
  3737  		y := v_1.Args[0]
  3738  		v.reset(OpPPC64SLW)
  3739  		v.AddArg(x)
  3740  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3741  		v0.AuxInt = 31
  3742  		v0.AddArg(y)
  3743  		v.AddArg(v0)
  3744  		return true
  3745  	}
  3746  	// match: (Lsh32x64 x y)
  3747  	// cond:
  3748  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
  3749  	for {
  3750  		_ = v.Args[1]
  3751  		x := v.Args[0]
  3752  		y := v.Args[1]
  3753  		v.reset(OpPPC64SLW)
  3754  		v.AddArg(x)
  3755  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3756  		v0.AddArg(y)
  3757  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3758  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3759  		v2.AuxInt = -32
  3760  		v2.AddArg(y)
  3761  		v1.AddArg(v2)
  3762  		v0.AddArg(v1)
  3763  		v.AddArg(v0)
  3764  		return true
  3765  	}
  3766  }
  3767  func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
  3768  	b := v.Block
  3769  	_ = b
  3770  	typ := &b.Func.Config.Types
  3771  	_ = typ
  3772  	// match: (Lsh32x8 x y)
  3773  	// cond: shiftIsBounded(v)
  3774  	// result: (SLW x y)
  3775  	for {
  3776  		_ = v.Args[1]
  3777  		x := v.Args[0]
  3778  		y := v.Args[1]
  3779  		if !(shiftIsBounded(v)) {
  3780  			break
  3781  		}
  3782  		v.reset(OpPPC64SLW)
  3783  		v.AddArg(x)
  3784  		v.AddArg(y)
  3785  		return true
  3786  	}
  3787  	// match: (Lsh32x8 x y)
  3788  	// cond:
  3789  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
  3790  	for {
  3791  		_ = v.Args[1]
  3792  		x := v.Args[0]
  3793  		y := v.Args[1]
  3794  		v.reset(OpPPC64SLW)
  3795  		v.AddArg(x)
  3796  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3797  		v0.AddArg(y)
  3798  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3799  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3800  		v2.AuxInt = -32
  3801  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3802  		v3.AddArg(y)
  3803  		v2.AddArg(v3)
  3804  		v1.AddArg(v2)
  3805  		v0.AddArg(v1)
  3806  		v.AddArg(v0)
  3807  		return true
  3808  	}
  3809  }
  3810  func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
  3811  	b := v.Block
  3812  	_ = b
  3813  	typ := &b.Func.Config.Types
  3814  	_ = typ
  3815  	// match: (Lsh64x16 x y)
  3816  	// cond: shiftIsBounded(v)
  3817  	// result: (SLD x y)
  3818  	for {
  3819  		_ = v.Args[1]
  3820  		x := v.Args[0]
  3821  		y := v.Args[1]
  3822  		if !(shiftIsBounded(v)) {
  3823  			break
  3824  		}
  3825  		v.reset(OpPPC64SLD)
  3826  		v.AddArg(x)
  3827  		v.AddArg(y)
  3828  		return true
  3829  	}
  3830  	// match: (Lsh64x16 x y)
  3831  	// cond:
  3832  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
  3833  	for {
  3834  		_ = v.Args[1]
  3835  		x := v.Args[0]
  3836  		y := v.Args[1]
  3837  		v.reset(OpPPC64SLD)
  3838  		v.AddArg(x)
  3839  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3840  		v0.AddArg(y)
  3841  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3842  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3843  		v2.AuxInt = -64
  3844  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3845  		v3.AddArg(y)
  3846  		v2.AddArg(v3)
  3847  		v1.AddArg(v2)
  3848  		v0.AddArg(v1)
  3849  		v.AddArg(v0)
  3850  		return true
  3851  	}
  3852  }
  3853  func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
  3854  	b := v.Block
  3855  	_ = b
  3856  	typ := &b.Func.Config.Types
  3857  	_ = typ
  3858  	// match: (Lsh64x32 x (Const64 [c]))
  3859  	// cond: uint32(c) < 64
  3860  	// result: (SLDconst x [c])
  3861  	for {
  3862  		_ = v.Args[1]
  3863  		x := v.Args[0]
  3864  		v_1 := v.Args[1]
  3865  		if v_1.Op != OpConst64 {
  3866  			break
  3867  		}
  3868  		c := v_1.AuxInt
  3869  		if !(uint32(c) < 64) {
  3870  			break
  3871  		}
  3872  		v.reset(OpPPC64SLDconst)
  3873  		v.AuxInt = c
  3874  		v.AddArg(x)
  3875  		return true
  3876  	}
  3877  	// match: (Lsh64x32 x (MOVDconst [c]))
  3878  	// cond: uint32(c) < 64
  3879  	// result: (SLDconst x [c])
  3880  	for {
  3881  		_ = v.Args[1]
  3882  		x := v.Args[0]
  3883  		v_1 := v.Args[1]
  3884  		if v_1.Op != OpPPC64MOVDconst {
  3885  			break
  3886  		}
  3887  		c := v_1.AuxInt
  3888  		if !(uint32(c) < 64) {
  3889  			break
  3890  		}
  3891  		v.reset(OpPPC64SLDconst)
  3892  		v.AuxInt = c
  3893  		v.AddArg(x)
  3894  		return true
  3895  	}
  3896  	// match: (Lsh64x32 x y)
  3897  	// cond: shiftIsBounded(v)
  3898  	// result: (SLD x y)
  3899  	for {
  3900  		_ = v.Args[1]
  3901  		x := v.Args[0]
  3902  		y := v.Args[1]
  3903  		if !(shiftIsBounded(v)) {
  3904  			break
  3905  		}
  3906  		v.reset(OpPPC64SLD)
  3907  		v.AddArg(x)
  3908  		v.AddArg(y)
  3909  		return true
  3910  	}
  3911  	// match: (Lsh64x32 x y)
  3912  	// cond:
  3913  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
  3914  	for {
  3915  		_ = v.Args[1]
  3916  		x := v.Args[0]
  3917  		y := v.Args[1]
  3918  		v.reset(OpPPC64SLD)
  3919  		v.AddArg(x)
  3920  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3921  		v0.AddArg(y)
  3922  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3923  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3924  		v2.AuxInt = -64
  3925  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3926  		v3.AddArg(y)
  3927  		v2.AddArg(v3)
  3928  		v1.AddArg(v2)
  3929  		v0.AddArg(v1)
  3930  		v.AddArg(v0)
  3931  		return true
  3932  	}
  3933  }
  3934  func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
  3935  	b := v.Block
  3936  	_ = b
  3937  	typ := &b.Func.Config.Types
  3938  	_ = typ
  3939  	// match: (Lsh64x64 x (Const64 [c]))
  3940  	// cond: uint64(c) < 64
  3941  	// result: (SLDconst x [c])
  3942  	for {
  3943  		_ = v.Args[1]
  3944  		x := v.Args[0]
  3945  		v_1 := v.Args[1]
  3946  		if v_1.Op != OpConst64 {
  3947  			break
  3948  		}
  3949  		c := v_1.AuxInt
  3950  		if !(uint64(c) < 64) {
  3951  			break
  3952  		}
  3953  		v.reset(OpPPC64SLDconst)
  3954  		v.AuxInt = c
  3955  		v.AddArg(x)
  3956  		return true
  3957  	}
  3958  	// match: (Lsh64x64 _ (Const64 [c]))
  3959  	// cond: uint64(c) >= 64
  3960  	// result: (MOVDconst [0])
  3961  	for {
  3962  		_ = v.Args[1]
  3963  		v_1 := v.Args[1]
  3964  		if v_1.Op != OpConst64 {
  3965  			break
  3966  		}
  3967  		c := v_1.AuxInt
  3968  		if !(uint64(c) >= 64) {
  3969  			break
  3970  		}
  3971  		v.reset(OpPPC64MOVDconst)
  3972  		v.AuxInt = 0
  3973  		return true
  3974  	}
  3975  	// match: (Lsh64x64 x (MOVDconst [c]))
  3976  	// cond: uint64(c) < 64
  3977  	// result: (SLDconst x [c])
  3978  	for {
  3979  		_ = v.Args[1]
  3980  		x := v.Args[0]
  3981  		v_1 := v.Args[1]
  3982  		if v_1.Op != OpPPC64MOVDconst {
  3983  			break
  3984  		}
  3985  		c := v_1.AuxInt
  3986  		if !(uint64(c) < 64) {
  3987  			break
  3988  		}
  3989  		v.reset(OpPPC64SLDconst)
  3990  		v.AuxInt = c
  3991  		v.AddArg(x)
  3992  		return true
  3993  	}
  3994  	// match: (Lsh64x64 x y)
  3995  	// cond: shiftIsBounded(v)
  3996  	// result: (SLD x y)
  3997  	for {
  3998  		_ = v.Args[1]
  3999  		x := v.Args[0]
  4000  		y := v.Args[1]
  4001  		if !(shiftIsBounded(v)) {
  4002  			break
  4003  		}
  4004  		v.reset(OpPPC64SLD)
  4005  		v.AddArg(x)
  4006  		v.AddArg(y)
  4007  		return true
  4008  	}
  4009  	// match: (Lsh64x64 x (AND y (MOVDconst [63])))
  4010  	// cond:
  4011  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4012  	for {
  4013  		_ = v.Args[1]
  4014  		x := v.Args[0]
  4015  		v_1 := v.Args[1]
  4016  		if v_1.Op != OpPPC64AND {
  4017  			break
  4018  		}
  4019  		_ = v_1.Args[1]
  4020  		y := v_1.Args[0]
  4021  		v_1_1 := v_1.Args[1]
  4022  		if v_1_1.Op != OpPPC64MOVDconst {
  4023  			break
  4024  		}
  4025  		if v_1_1.AuxInt != 63 {
  4026  			break
  4027  		}
  4028  		v.reset(OpPPC64SLD)
  4029  		v.AddArg(x)
  4030  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4031  		v0.AuxInt = 63
  4032  		v0.AddArg(y)
  4033  		v.AddArg(v0)
  4034  		return true
  4035  	}
  4036  	// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
  4037  	// cond:
  4038  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4039  	for {
  4040  		_ = v.Args[1]
  4041  		x := v.Args[0]
  4042  		v_1 := v.Args[1]
  4043  		if v_1.Op != OpPPC64AND {
  4044  			break
  4045  		}
  4046  		_ = v_1.Args[1]
  4047  		v_1_0 := v_1.Args[0]
  4048  		if v_1_0.Op != OpPPC64MOVDconst {
  4049  			break
  4050  		}
  4051  		if v_1_0.AuxInt != 63 {
  4052  			break
  4053  		}
  4054  		y := v_1.Args[1]
  4055  		v.reset(OpPPC64SLD)
  4056  		v.AddArg(x)
  4057  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4058  		v0.AuxInt = 63
  4059  		v0.AddArg(y)
  4060  		v.AddArg(v0)
  4061  		return true
  4062  	}
  4063  	// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
  4064  	// cond:
  4065  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  4066  	for {
  4067  		_ = v.Args[1]
  4068  		x := v.Args[0]
  4069  		v_1 := v.Args[1]
  4070  		if v_1.Op != OpPPC64ANDconst {
  4071  			break
  4072  		}
  4073  		if v_1.Type != typ.Int64 {
  4074  			break
  4075  		}
  4076  		if v_1.AuxInt != 63 {
  4077  			break
  4078  		}
  4079  		y := v_1.Args[0]
  4080  		v.reset(OpPPC64SLD)
  4081  		v.AddArg(x)
  4082  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  4083  		v0.AuxInt = 63
  4084  		v0.AddArg(y)
  4085  		v.AddArg(v0)
  4086  		return true
  4087  	}
  4088  	// match: (Lsh64x64 x y)
  4089  	// cond:
  4090  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
  4091  	for {
  4092  		_ = v.Args[1]
  4093  		x := v.Args[0]
  4094  		y := v.Args[1]
  4095  		v.reset(OpPPC64SLD)
  4096  		v.AddArg(x)
  4097  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4098  		v0.AddArg(y)
  4099  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4100  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4101  		v2.AuxInt = -64
  4102  		v2.AddArg(y)
  4103  		v1.AddArg(v2)
  4104  		v0.AddArg(v1)
  4105  		v.AddArg(v0)
  4106  		return true
  4107  	}
  4108  }
  4109  func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
  4110  	b := v.Block
  4111  	_ = b
  4112  	typ := &b.Func.Config.Types
  4113  	_ = typ
  4114  	// match: (Lsh64x8 x y)
  4115  	// cond: shiftIsBounded(v)
  4116  	// result: (SLD x y)
  4117  	for {
  4118  		_ = v.Args[1]
  4119  		x := v.Args[0]
  4120  		y := v.Args[1]
  4121  		if !(shiftIsBounded(v)) {
  4122  			break
  4123  		}
  4124  		v.reset(OpPPC64SLD)
  4125  		v.AddArg(x)
  4126  		v.AddArg(y)
  4127  		return true
  4128  	}
  4129  	// match: (Lsh64x8 x y)
  4130  	// cond:
  4131  	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
  4132  	for {
  4133  		_ = v.Args[1]
  4134  		x := v.Args[0]
  4135  		y := v.Args[1]
  4136  		v.reset(OpPPC64SLD)
  4137  		v.AddArg(x)
  4138  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4139  		v0.AddArg(y)
  4140  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4141  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4142  		v2.AuxInt = -64
  4143  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  4144  		v3.AddArg(y)
  4145  		v2.AddArg(v3)
  4146  		v1.AddArg(v2)
  4147  		v0.AddArg(v1)
  4148  		v.AddArg(v0)
  4149  		return true
  4150  	}
  4151  }
  4152  func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
  4153  	b := v.Block
  4154  	_ = b
  4155  	typ := &b.Func.Config.Types
  4156  	_ = typ
  4157  	// match: (Lsh8x16 x y)
  4158  	// cond: shiftIsBounded(v)
  4159  	// result: (SLW x y)
  4160  	for {
  4161  		_ = v.Args[1]
  4162  		x := v.Args[0]
  4163  		y := v.Args[1]
  4164  		if !(shiftIsBounded(v)) {
  4165  			break
  4166  		}
  4167  		v.reset(OpPPC64SLW)
  4168  		v.AddArg(x)
  4169  		v.AddArg(y)
  4170  		return true
  4171  	}
  4172  	// match: (Lsh8x16 x y)
  4173  	// cond:
  4174  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
  4175  	for {
  4176  		_ = v.Args[1]
  4177  		x := v.Args[0]
  4178  		y := v.Args[1]
  4179  		v.reset(OpPPC64SLW)
  4180  		v.AddArg(x)
  4181  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4182  		v0.AddArg(y)
  4183  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4184  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4185  		v2.AuxInt = -8
  4186  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  4187  		v3.AddArg(y)
  4188  		v2.AddArg(v3)
  4189  		v1.AddArg(v2)
  4190  		v0.AddArg(v1)
  4191  		v.AddArg(v0)
  4192  		return true
  4193  	}
  4194  }
  4195  func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
  4196  	b := v.Block
  4197  	_ = b
  4198  	typ := &b.Func.Config.Types
  4199  	_ = typ
  4200  	// match: (Lsh8x32 x (Const64 [c]))
  4201  	// cond: uint32(c) < 8
  4202  	// result: (SLWconst x [c])
  4203  	for {
  4204  		_ = v.Args[1]
  4205  		x := v.Args[0]
  4206  		v_1 := v.Args[1]
  4207  		if v_1.Op != OpConst64 {
  4208  			break
  4209  		}
  4210  		c := v_1.AuxInt
  4211  		if !(uint32(c) < 8) {
  4212  			break
  4213  		}
  4214  		v.reset(OpPPC64SLWconst)
  4215  		v.AuxInt = c
  4216  		v.AddArg(x)
  4217  		return true
  4218  	}
  4219  	// match: (Lsh8x32 x (MOVDconst [c]))
  4220  	// cond: uint32(c) < 8
  4221  	// result: (SLWconst x [c])
  4222  	for {
  4223  		_ = v.Args[1]
  4224  		x := v.Args[0]
  4225  		v_1 := v.Args[1]
  4226  		if v_1.Op != OpPPC64MOVDconst {
  4227  			break
  4228  		}
  4229  		c := v_1.AuxInt
  4230  		if !(uint32(c) < 8) {
  4231  			break
  4232  		}
  4233  		v.reset(OpPPC64SLWconst)
  4234  		v.AuxInt = c
  4235  		v.AddArg(x)
  4236  		return true
  4237  	}
  4238  	// match: (Lsh8x32 x y)
  4239  	// cond: shiftIsBounded(v)
  4240  	// result: (SLW x y)
  4241  	for {
  4242  		_ = v.Args[1]
  4243  		x := v.Args[0]
  4244  		y := v.Args[1]
  4245  		if !(shiftIsBounded(v)) {
  4246  			break
  4247  		}
  4248  		v.reset(OpPPC64SLW)
  4249  		v.AddArg(x)
  4250  		v.AddArg(y)
  4251  		return true
  4252  	}
  4253  	// match: (Lsh8x32 x y)
  4254  	// cond:
  4255  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
  4256  	for {
  4257  		_ = v.Args[1]
  4258  		x := v.Args[0]
  4259  		y := v.Args[1]
  4260  		v.reset(OpPPC64SLW)
  4261  		v.AddArg(x)
  4262  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4263  		v0.AddArg(y)
  4264  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4265  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4266  		v2.AuxInt = -8
  4267  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  4268  		v3.AddArg(y)
  4269  		v2.AddArg(v3)
  4270  		v1.AddArg(v2)
  4271  		v0.AddArg(v1)
  4272  		v.AddArg(v0)
  4273  		return true
  4274  	}
  4275  }
  4276  func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
  4277  	b := v.Block
  4278  	_ = b
  4279  	typ := &b.Func.Config.Types
  4280  	_ = typ
  4281  	// match: (Lsh8x64 x (Const64 [c]))
  4282  	// cond: uint64(c) < 8
  4283  	// result: (SLWconst x [c])
  4284  	for {
  4285  		_ = v.Args[1]
  4286  		x := v.Args[0]
  4287  		v_1 := v.Args[1]
  4288  		if v_1.Op != OpConst64 {
  4289  			break
  4290  		}
  4291  		c := v_1.AuxInt
  4292  		if !(uint64(c) < 8) {
  4293  			break
  4294  		}
  4295  		v.reset(OpPPC64SLWconst)
  4296  		v.AuxInt = c
  4297  		v.AddArg(x)
  4298  		return true
  4299  	}
  4300  	// match: (Lsh8x64 _ (Const64 [c]))
  4301  	// cond: uint64(c) >= 8
  4302  	// result: (MOVDconst [0])
  4303  	for {
  4304  		_ = v.Args[1]
  4305  		v_1 := v.Args[1]
  4306  		if v_1.Op != OpConst64 {
  4307  			break
  4308  		}
  4309  		c := v_1.AuxInt
  4310  		if !(uint64(c) >= 8) {
  4311  			break
  4312  		}
  4313  		v.reset(OpPPC64MOVDconst)
  4314  		v.AuxInt = 0
  4315  		return true
  4316  	}
  4317  	// match: (Lsh8x64 x (MOVDconst [c]))
  4318  	// cond: uint64(c) < 8
  4319  	// result: (SLWconst x [c])
  4320  	for {
  4321  		_ = v.Args[1]
  4322  		x := v.Args[0]
  4323  		v_1 := v.Args[1]
  4324  		if v_1.Op != OpPPC64MOVDconst {
  4325  			break
  4326  		}
  4327  		c := v_1.AuxInt
  4328  		if !(uint64(c) < 8) {
  4329  			break
  4330  		}
  4331  		v.reset(OpPPC64SLWconst)
  4332  		v.AuxInt = c
  4333  		v.AddArg(x)
  4334  		return true
  4335  	}
  4336  	// match: (Lsh8x64 x y)
  4337  	// cond: shiftIsBounded(v)
  4338  	// result: (SLW x y)
  4339  	for {
  4340  		_ = v.Args[1]
  4341  		x := v.Args[0]
  4342  		y := v.Args[1]
  4343  		if !(shiftIsBounded(v)) {
  4344  			break
  4345  		}
  4346  		v.reset(OpPPC64SLW)
  4347  		v.AddArg(x)
  4348  		v.AddArg(y)
  4349  		return true
  4350  	}
  4351  	// match: (Lsh8x64 x y)
  4352  	// cond:
  4353  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
  4354  	for {
  4355  		_ = v.Args[1]
  4356  		x := v.Args[0]
  4357  		y := v.Args[1]
  4358  		v.reset(OpPPC64SLW)
  4359  		v.AddArg(x)
  4360  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4361  		v0.AddArg(y)
  4362  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4363  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4364  		v2.AuxInt = -8
  4365  		v2.AddArg(y)
  4366  		v1.AddArg(v2)
  4367  		v0.AddArg(v1)
  4368  		v.AddArg(v0)
  4369  		return true
  4370  	}
  4371  }
  4372  func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
  4373  	b := v.Block
  4374  	_ = b
  4375  	typ := &b.Func.Config.Types
  4376  	_ = typ
  4377  	// match: (Lsh8x8 x y)
  4378  	// cond: shiftIsBounded(v)
  4379  	// result: (SLW x y)
  4380  	for {
  4381  		_ = v.Args[1]
  4382  		x := v.Args[0]
  4383  		y := v.Args[1]
  4384  		if !(shiftIsBounded(v)) {
  4385  			break
  4386  		}
  4387  		v.reset(OpPPC64SLW)
  4388  		v.AddArg(x)
  4389  		v.AddArg(y)
  4390  		return true
  4391  	}
  4392  	// match: (Lsh8x8 x y)
  4393  	// cond:
  4394  	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
  4395  	for {
  4396  		_ = v.Args[1]
  4397  		x := v.Args[0]
  4398  		y := v.Args[1]
  4399  		v.reset(OpPPC64SLW)
  4400  		v.AddArg(x)
  4401  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4402  		v0.AddArg(y)
  4403  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4404  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4405  		v2.AuxInt = -8
  4406  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  4407  		v3.AddArg(y)
  4408  		v2.AddArg(v3)
  4409  		v1.AddArg(v2)
  4410  		v0.AddArg(v1)
  4411  		v.AddArg(v0)
  4412  		return true
  4413  	}
  4414  }
  4415  func rewriteValuePPC64_OpMod16_0(v *Value) bool {
  4416  	b := v.Block
  4417  	_ = b
  4418  	typ := &b.Func.Config.Types
  4419  	_ = typ
  4420  	// match: (Mod16 x y)
  4421  	// cond:
  4422  	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
  4423  	for {
  4424  		_ = v.Args[1]
  4425  		x := v.Args[0]
  4426  		y := v.Args[1]
  4427  		v.reset(OpMod32)
  4428  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4429  		v0.AddArg(x)
  4430  		v.AddArg(v0)
  4431  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4432  		v1.AddArg(y)
  4433  		v.AddArg(v1)
  4434  		return true
  4435  	}
  4436  }
  4437  func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
  4438  	b := v.Block
  4439  	_ = b
  4440  	typ := &b.Func.Config.Types
  4441  	_ = typ
  4442  	// match: (Mod16u x y)
  4443  	// cond:
  4444  	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
  4445  	for {
  4446  		_ = v.Args[1]
  4447  		x := v.Args[0]
  4448  		y := v.Args[1]
  4449  		v.reset(OpMod32u)
  4450  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4451  		v0.AddArg(x)
  4452  		v.AddArg(v0)
  4453  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4454  		v1.AddArg(y)
  4455  		v.AddArg(v1)
  4456  		return true
  4457  	}
  4458  }
  4459  func rewriteValuePPC64_OpMod32_0(v *Value) bool {
  4460  	b := v.Block
  4461  	_ = b
  4462  	typ := &b.Func.Config.Types
  4463  	_ = typ
  4464  	// match: (Mod32 x y)
  4465  	// cond:
  4466  	// result: (SUB x (MULLW y (DIVW x y)))
  4467  	for {
  4468  		_ = v.Args[1]
  4469  		x := v.Args[0]
  4470  		y := v.Args[1]
  4471  		v.reset(OpPPC64SUB)
  4472  		v.AddArg(x)
  4473  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4474  		v0.AddArg(y)
  4475  		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
  4476  		v1.AddArg(x)
  4477  		v1.AddArg(y)
  4478  		v0.AddArg(v1)
  4479  		v.AddArg(v0)
  4480  		return true
  4481  	}
  4482  }
  4483  func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
  4484  	b := v.Block
  4485  	_ = b
  4486  	typ := &b.Func.Config.Types
  4487  	_ = typ
  4488  	// match: (Mod32u x y)
  4489  	// cond:
  4490  	// result: (SUB x (MULLW y (DIVWU x y)))
  4491  	for {
  4492  		_ = v.Args[1]
  4493  		x := v.Args[0]
  4494  		y := v.Args[1]
  4495  		v.reset(OpPPC64SUB)
  4496  		v.AddArg(x)
  4497  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4498  		v0.AddArg(y)
  4499  		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
  4500  		v1.AddArg(x)
  4501  		v1.AddArg(y)
  4502  		v0.AddArg(v1)
  4503  		v.AddArg(v0)
  4504  		return true
  4505  	}
  4506  }
  4507  func rewriteValuePPC64_OpMod64_0(v *Value) bool {
  4508  	b := v.Block
  4509  	_ = b
  4510  	typ := &b.Func.Config.Types
  4511  	_ = typ
  4512  	// match: (Mod64 x y)
  4513  	// cond:
  4514  	// result: (SUB x (MULLD y (DIVD x y)))
  4515  	for {
  4516  		_ = v.Args[1]
  4517  		x := v.Args[0]
  4518  		y := v.Args[1]
  4519  		v.reset(OpPPC64SUB)
  4520  		v.AddArg(x)
  4521  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4522  		v0.AddArg(y)
  4523  		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
  4524  		v1.AddArg(x)
  4525  		v1.AddArg(y)
  4526  		v0.AddArg(v1)
  4527  		v.AddArg(v0)
  4528  		return true
  4529  	}
  4530  }
  4531  func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
  4532  	b := v.Block
  4533  	_ = b
  4534  	typ := &b.Func.Config.Types
  4535  	_ = typ
  4536  	// match: (Mod64u x y)
  4537  	// cond:
  4538  	// result: (SUB x (MULLD y (DIVDU x y)))
  4539  	for {
  4540  		_ = v.Args[1]
  4541  		x := v.Args[0]
  4542  		y := v.Args[1]
  4543  		v.reset(OpPPC64SUB)
  4544  		v.AddArg(x)
  4545  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4546  		v0.AddArg(y)
  4547  		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
  4548  		v1.AddArg(x)
  4549  		v1.AddArg(y)
  4550  		v0.AddArg(v1)
  4551  		v.AddArg(v0)
  4552  		return true
  4553  	}
  4554  }
  4555  func rewriteValuePPC64_OpMod8_0(v *Value) bool {
  4556  	b := v.Block
  4557  	_ = b
  4558  	typ := &b.Func.Config.Types
  4559  	_ = typ
  4560  	// match: (Mod8 x y)
  4561  	// cond:
  4562  	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
  4563  	for {
  4564  		_ = v.Args[1]
  4565  		x := v.Args[0]
  4566  		y := v.Args[1]
  4567  		v.reset(OpMod32)
  4568  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4569  		v0.AddArg(x)
  4570  		v.AddArg(v0)
  4571  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4572  		v1.AddArg(y)
  4573  		v.AddArg(v1)
  4574  		return true
  4575  	}
  4576  }
  4577  func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
  4578  	b := v.Block
  4579  	_ = b
  4580  	typ := &b.Func.Config.Types
  4581  	_ = typ
  4582  	// match: (Mod8u x y)
  4583  	// cond:
  4584  	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
  4585  	for {
  4586  		_ = v.Args[1]
  4587  		x := v.Args[0]
  4588  		y := v.Args[1]
  4589  		v.reset(OpMod32u)
  4590  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4591  		v0.AddArg(x)
  4592  		v.AddArg(v0)
  4593  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4594  		v1.AddArg(y)
  4595  		v.AddArg(v1)
  4596  		return true
  4597  	}
  4598  }
  4599  func rewriteValuePPC64_OpMove_0(v *Value) bool {
  4600  	b := v.Block
  4601  	_ = b
  4602  	typ := &b.Func.Config.Types
  4603  	_ = typ
  4604  	// match: (Move [0] _ _ mem)
  4605  	// cond:
  4606  	// result: mem
  4607  	for {
  4608  		if v.AuxInt != 0 {
  4609  			break
  4610  		}
  4611  		_ = v.Args[2]
  4612  		mem := v.Args[2]
  4613  		v.reset(OpCopy)
  4614  		v.Type = mem.Type
  4615  		v.AddArg(mem)
  4616  		return true
  4617  	}
  4618  	// match: (Move [1] dst src mem)
  4619  	// cond:
  4620  	// result: (MOVBstore dst (MOVBZload src mem) mem)
  4621  	for {
  4622  		if v.AuxInt != 1 {
  4623  			break
  4624  		}
  4625  		_ = v.Args[2]
  4626  		dst := v.Args[0]
  4627  		src := v.Args[1]
  4628  		mem := v.Args[2]
  4629  		v.reset(OpPPC64MOVBstore)
  4630  		v.AddArg(dst)
  4631  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4632  		v0.AddArg(src)
  4633  		v0.AddArg(mem)
  4634  		v.AddArg(v0)
  4635  		v.AddArg(mem)
  4636  		return true
  4637  	}
  4638  	// match: (Move [2] dst src mem)
  4639  	// cond:
  4640  	// result: (MOVHstore dst (MOVHZload src mem) mem)
  4641  	for {
  4642  		if v.AuxInt != 2 {
  4643  			break
  4644  		}
  4645  		_ = v.Args[2]
  4646  		dst := v.Args[0]
  4647  		src := v.Args[1]
  4648  		mem := v.Args[2]
  4649  		v.reset(OpPPC64MOVHstore)
  4650  		v.AddArg(dst)
  4651  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4652  		v0.AddArg(src)
  4653  		v0.AddArg(mem)
  4654  		v.AddArg(v0)
  4655  		v.AddArg(mem)
  4656  		return true
  4657  	}
  4658  	// match: (Move [4] dst src mem)
  4659  	// cond:
  4660  	// result: (MOVWstore dst (MOVWZload src mem) mem)
  4661  	for {
  4662  		if v.AuxInt != 4 {
  4663  			break
  4664  		}
  4665  		_ = v.Args[2]
  4666  		dst := v.Args[0]
  4667  		src := v.Args[1]
  4668  		mem := v.Args[2]
  4669  		v.reset(OpPPC64MOVWstore)
  4670  		v.AddArg(dst)
  4671  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4672  		v0.AddArg(src)
  4673  		v0.AddArg(mem)
  4674  		v.AddArg(v0)
  4675  		v.AddArg(mem)
  4676  		return true
  4677  	}
  4678  	// match: (Move [8] {t} dst src mem)
  4679  	// cond: t.(*types.Type).Alignment()%4 == 0
  4680  	// result: (MOVDstore dst (MOVDload src mem) mem)
  4681  	for {
  4682  		if v.AuxInt != 8 {
  4683  			break
  4684  		}
  4685  		t := v.Aux
  4686  		_ = v.Args[2]
  4687  		dst := v.Args[0]
  4688  		src := v.Args[1]
  4689  		mem := v.Args[2]
  4690  		if !(t.(*types.Type).Alignment()%4 == 0) {
  4691  			break
  4692  		}
  4693  		v.reset(OpPPC64MOVDstore)
  4694  		v.AddArg(dst)
  4695  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  4696  		v0.AddArg(src)
  4697  		v0.AddArg(mem)
  4698  		v.AddArg(v0)
  4699  		v.AddArg(mem)
  4700  		return true
  4701  	}
  4702  	// match: (Move [8] dst src mem)
  4703  	// cond:
  4704  	// result: (MOVWstore [4] dst (MOVWZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4705  	for {
  4706  		if v.AuxInt != 8 {
  4707  			break
  4708  		}
  4709  		_ = v.Args[2]
  4710  		dst := v.Args[0]
  4711  		src := v.Args[1]
  4712  		mem := v.Args[2]
  4713  		v.reset(OpPPC64MOVWstore)
  4714  		v.AuxInt = 4
  4715  		v.AddArg(dst)
  4716  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4717  		v0.AuxInt = 4
  4718  		v0.AddArg(src)
  4719  		v0.AddArg(mem)
  4720  		v.AddArg(v0)
  4721  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4722  		v1.AddArg(dst)
  4723  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4724  		v2.AddArg(src)
  4725  		v2.AddArg(mem)
  4726  		v1.AddArg(v2)
  4727  		v1.AddArg(mem)
  4728  		v.AddArg(v1)
  4729  		return true
  4730  	}
  4731  	// match: (Move [3] dst src mem)
  4732  	// cond:
  4733  	// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  4734  	for {
  4735  		if v.AuxInt != 3 {
  4736  			break
  4737  		}
  4738  		_ = v.Args[2]
  4739  		dst := v.Args[0]
  4740  		src := v.Args[1]
  4741  		mem := v.Args[2]
  4742  		v.reset(OpPPC64MOVBstore)
  4743  		v.AuxInt = 2
  4744  		v.AddArg(dst)
  4745  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4746  		v0.AuxInt = 2
  4747  		v0.AddArg(src)
  4748  		v0.AddArg(mem)
  4749  		v.AddArg(v0)
  4750  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4751  		v1.AddArg(dst)
  4752  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
  4753  		v2.AddArg(src)
  4754  		v2.AddArg(mem)
  4755  		v1.AddArg(v2)
  4756  		v1.AddArg(mem)
  4757  		v.AddArg(v1)
  4758  		return true
  4759  	}
  4760  	// match: (Move [5] dst src mem)
  4761  	// cond:
  4762  	// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4763  	for {
  4764  		if v.AuxInt != 5 {
  4765  			break
  4766  		}
  4767  		_ = v.Args[2]
  4768  		dst := v.Args[0]
  4769  		src := v.Args[1]
  4770  		mem := v.Args[2]
  4771  		v.reset(OpPPC64MOVBstore)
  4772  		v.AuxInt = 4
  4773  		v.AddArg(dst)
  4774  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4775  		v0.AuxInt = 4
  4776  		v0.AddArg(src)
  4777  		v0.AddArg(mem)
  4778  		v.AddArg(v0)
  4779  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4780  		v1.AddArg(dst)
  4781  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4782  		v2.AddArg(src)
  4783  		v2.AddArg(mem)
  4784  		v1.AddArg(v2)
  4785  		v1.AddArg(mem)
  4786  		v.AddArg(v1)
  4787  		return true
  4788  	}
  4789  	// match: (Move [6] dst src mem)
  4790  	// cond:
  4791  	// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4792  	for {
  4793  		if v.AuxInt != 6 {
  4794  			break
  4795  		}
  4796  		_ = v.Args[2]
  4797  		dst := v.Args[0]
  4798  		src := v.Args[1]
  4799  		mem := v.Args[2]
  4800  		v.reset(OpPPC64MOVHstore)
  4801  		v.AuxInt = 4
  4802  		v.AddArg(dst)
  4803  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4804  		v0.AuxInt = 4
  4805  		v0.AddArg(src)
  4806  		v0.AddArg(mem)
  4807  		v.AddArg(v0)
  4808  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4809  		v1.AddArg(dst)
  4810  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4811  		v2.AddArg(src)
  4812  		v2.AddArg(mem)
  4813  		v1.AddArg(v2)
  4814  		v1.AddArg(mem)
  4815  		v.AddArg(v1)
  4816  		return true
  4817  	}
  4818  	// match: (Move [7] dst src mem)
  4819  	// cond:
  4820  	// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
  4821  	for {
  4822  		if v.AuxInt != 7 {
  4823  			break
  4824  		}
  4825  		_ = v.Args[2]
  4826  		dst := v.Args[0]
  4827  		src := v.Args[1]
  4828  		mem := v.Args[2]
  4829  		v.reset(OpPPC64MOVBstore)
  4830  		v.AuxInt = 6
  4831  		v.AddArg(dst)
  4832  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4833  		v0.AuxInt = 6
  4834  		v0.AddArg(src)
  4835  		v0.AddArg(mem)
  4836  		v.AddArg(v0)
  4837  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4838  		v1.AuxInt = 4
  4839  		v1.AddArg(dst)
  4840  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4841  		v2.AuxInt = 4
  4842  		v2.AddArg(src)
  4843  		v2.AddArg(mem)
  4844  		v1.AddArg(v2)
  4845  		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4846  		v3.AddArg(dst)
  4847  		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4848  		v4.AddArg(src)
  4849  		v4.AddArg(mem)
  4850  		v3.AddArg(v4)
  4851  		v3.AddArg(mem)
  4852  		v1.AddArg(v3)
  4853  		v.AddArg(v1)
  4854  		return true
  4855  	}
  4856  	return false
  4857  }
  4858  func rewriteValuePPC64_OpMove_10(v *Value) bool {
  4859  	// match: (Move [s] dst src mem)
  4860  	// cond: s > 8
  4861  	// result: (LoweredMove [s] dst src mem)
  4862  	for {
  4863  		s := v.AuxInt
  4864  		_ = v.Args[2]
  4865  		dst := v.Args[0]
  4866  		src := v.Args[1]
  4867  		mem := v.Args[2]
  4868  		if !(s > 8) {
  4869  			break
  4870  		}
  4871  		v.reset(OpPPC64LoweredMove)
  4872  		v.AuxInt = s
  4873  		v.AddArg(dst)
  4874  		v.AddArg(src)
  4875  		v.AddArg(mem)
  4876  		return true
  4877  	}
  4878  	return false
  4879  }
  4880  func rewriteValuePPC64_OpMul16_0(v *Value) bool {
  4881  	// match: (Mul16 x y)
  4882  	// cond:
  4883  	// result: (MULLW x y)
  4884  	for {
  4885  		_ = v.Args[1]
  4886  		x := v.Args[0]
  4887  		y := v.Args[1]
  4888  		v.reset(OpPPC64MULLW)
  4889  		v.AddArg(x)
  4890  		v.AddArg(y)
  4891  		return true
  4892  	}
  4893  }
  4894  func rewriteValuePPC64_OpMul32_0(v *Value) bool {
  4895  	// match: (Mul32 x y)
  4896  	// cond:
  4897  	// result: (MULLW x y)
  4898  	for {
  4899  		_ = v.Args[1]
  4900  		x := v.Args[0]
  4901  		y := v.Args[1]
  4902  		v.reset(OpPPC64MULLW)
  4903  		v.AddArg(x)
  4904  		v.AddArg(y)
  4905  		return true
  4906  	}
  4907  }
  4908  func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
  4909  	// match: (Mul32F x y)
  4910  	// cond:
  4911  	// result: (FMULS x y)
  4912  	for {
  4913  		_ = v.Args[1]
  4914  		x := v.Args[0]
  4915  		y := v.Args[1]
  4916  		v.reset(OpPPC64FMULS)
  4917  		v.AddArg(x)
  4918  		v.AddArg(y)
  4919  		return true
  4920  	}
  4921  }
  4922  func rewriteValuePPC64_OpMul64_0(v *Value) bool {
  4923  	// match: (Mul64 x y)
  4924  	// cond:
  4925  	// result: (MULLD x y)
  4926  	for {
  4927  		_ = v.Args[1]
  4928  		x := v.Args[0]
  4929  		y := v.Args[1]
  4930  		v.reset(OpPPC64MULLD)
  4931  		v.AddArg(x)
  4932  		v.AddArg(y)
  4933  		return true
  4934  	}
  4935  }
  4936  func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
  4937  	// match: (Mul64F x y)
  4938  	// cond:
  4939  	// result: (FMUL x y)
  4940  	for {
  4941  		_ = v.Args[1]
  4942  		x := v.Args[0]
  4943  		y := v.Args[1]
  4944  		v.reset(OpPPC64FMUL)
  4945  		v.AddArg(x)
  4946  		v.AddArg(y)
  4947  		return true
  4948  	}
  4949  }
  4950  func rewriteValuePPC64_OpMul64uhilo_0(v *Value) bool {
  4951  	// match: (Mul64uhilo x y)
  4952  	// cond:
  4953  	// result: (LoweredMuluhilo x y)
  4954  	for {
  4955  		_ = v.Args[1]
  4956  		x := v.Args[0]
  4957  		y := v.Args[1]
  4958  		v.reset(OpPPC64LoweredMuluhilo)
  4959  		v.AddArg(x)
  4960  		v.AddArg(y)
  4961  		return true
  4962  	}
  4963  }
  4964  func rewriteValuePPC64_OpMul8_0(v *Value) bool {
  4965  	// match: (Mul8 x y)
  4966  	// cond:
  4967  	// result: (MULLW x y)
  4968  	for {
  4969  		_ = v.Args[1]
  4970  		x := v.Args[0]
  4971  		y := v.Args[1]
  4972  		v.reset(OpPPC64MULLW)
  4973  		v.AddArg(x)
  4974  		v.AddArg(y)
  4975  		return true
  4976  	}
  4977  }
  4978  func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
  4979  	// match: (Neg16 x)
  4980  	// cond:
  4981  	// result: (NEG x)
  4982  	for {
  4983  		x := v.Args[0]
  4984  		v.reset(OpPPC64NEG)
  4985  		v.AddArg(x)
  4986  		return true
  4987  	}
  4988  }
  4989  func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
  4990  	// match: (Neg32 x)
  4991  	// cond:
  4992  	// result: (NEG x)
  4993  	for {
  4994  		x := v.Args[0]
  4995  		v.reset(OpPPC64NEG)
  4996  		v.AddArg(x)
  4997  		return true
  4998  	}
  4999  }
  5000  func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
  5001  	// match: (Neg32F x)
  5002  	// cond:
  5003  	// result: (FNEG x)
  5004  	for {
  5005  		x := v.Args[0]
  5006  		v.reset(OpPPC64FNEG)
  5007  		v.AddArg(x)
  5008  		return true
  5009  	}
  5010  }
  5011  func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
  5012  	// match: (Neg64 x)
  5013  	// cond:
  5014  	// result: (NEG x)
  5015  	for {
  5016  		x := v.Args[0]
  5017  		v.reset(OpPPC64NEG)
  5018  		v.AddArg(x)
  5019  		return true
  5020  	}
  5021  }
  5022  func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
  5023  	// match: (Neg64F x)
  5024  	// cond:
  5025  	// result: (FNEG x)
  5026  	for {
  5027  		x := v.Args[0]
  5028  		v.reset(OpPPC64FNEG)
  5029  		v.AddArg(x)
  5030  		return true
  5031  	}
  5032  }
  5033  func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
  5034  	// match: (Neg8 x)
  5035  	// cond:
  5036  	// result: (NEG x)
  5037  	for {
  5038  		x := v.Args[0]
  5039  		v.reset(OpPPC64NEG)
  5040  		v.AddArg(x)
  5041  		return true
  5042  	}
  5043  }
  5044  func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
  5045  	b := v.Block
  5046  	_ = b
  5047  	typ := &b.Func.Config.Types
  5048  	_ = typ
  5049  	// match: (Neq16 x y)
  5050  	// cond: isSigned(x.Type) && isSigned(y.Type)
  5051  	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  5052  	for {
  5053  		_ = v.Args[1]
  5054  		x := v.Args[0]
  5055  		y := v.Args[1]
  5056  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  5057  			break
  5058  		}
  5059  		v.reset(OpPPC64NotEqual)
  5060  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5061  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5062  		v1.AddArg(x)
  5063  		v0.AddArg(v1)
  5064  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5065  		v2.AddArg(y)
  5066  		v0.AddArg(v2)
  5067  		v.AddArg(v0)
  5068  		return true
  5069  	}
  5070  	// match: (Neq16 x y)
  5071  	// cond:
  5072  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  5073  	for {
  5074  		_ = v.Args[1]
  5075  		x := v.Args[0]
  5076  		y := v.Args[1]
  5077  		v.reset(OpPPC64NotEqual)
  5078  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5079  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5080  		v1.AddArg(x)
  5081  		v0.AddArg(v1)
  5082  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5083  		v2.AddArg(y)
  5084  		v0.AddArg(v2)
  5085  		v.AddArg(v0)
  5086  		return true
  5087  	}
  5088  }
  5089  func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
  5090  	b := v.Block
  5091  	_ = b
  5092  	// match: (Neq32 x y)
  5093  	// cond:
  5094  	// result: (NotEqual (CMPW x y))
  5095  	for {
  5096  		_ = v.Args[1]
  5097  		x := v.Args[0]
  5098  		y := v.Args[1]
  5099  		v.reset(OpPPC64NotEqual)
  5100  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5101  		v0.AddArg(x)
  5102  		v0.AddArg(y)
  5103  		v.AddArg(v0)
  5104  		return true
  5105  	}
  5106  }
  5107  func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
  5108  	b := v.Block
  5109  	_ = b
  5110  	// match: (Neq32F x y)
  5111  	// cond:
  5112  	// result: (NotEqual (FCMPU x y))
  5113  	for {
  5114  		_ = v.Args[1]
  5115  		x := v.Args[0]
  5116  		y := v.Args[1]
  5117  		v.reset(OpPPC64NotEqual)
  5118  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  5119  		v0.AddArg(x)
  5120  		v0.AddArg(y)
  5121  		v.AddArg(v0)
  5122  		return true
  5123  	}
  5124  }
  5125  func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
  5126  	b := v.Block
  5127  	_ = b
  5128  	// match: (Neq64 x y)
  5129  	// cond:
  5130  	// result: (NotEqual (CMP x y))
  5131  	for {
  5132  		_ = v.Args[1]
  5133  		x := v.Args[0]
  5134  		y := v.Args[1]
  5135  		v.reset(OpPPC64NotEqual)
  5136  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  5137  		v0.AddArg(x)
  5138  		v0.AddArg(y)
  5139  		v.AddArg(v0)
  5140  		return true
  5141  	}
  5142  }
  5143  func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
  5144  	b := v.Block
  5145  	_ = b
  5146  	// match: (Neq64F x y)
  5147  	// cond:
  5148  	// result: (NotEqual (FCMPU x y))
  5149  	for {
  5150  		_ = v.Args[1]
  5151  		x := v.Args[0]
  5152  		y := v.Args[1]
  5153  		v.reset(OpPPC64NotEqual)
  5154  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  5155  		v0.AddArg(x)
  5156  		v0.AddArg(y)
  5157  		v.AddArg(v0)
  5158  		return true
  5159  	}
  5160  }
  5161  func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
  5162  	b := v.Block
  5163  	_ = b
  5164  	typ := &b.Func.Config.Types
  5165  	_ = typ
  5166  	// match: (Neq8 x y)
  5167  	// cond: isSigned(x.Type) && isSigned(y.Type)
  5168  	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  5169  	for {
  5170  		_ = v.Args[1]
  5171  		x := v.Args[0]
  5172  		y := v.Args[1]
  5173  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  5174  			break
  5175  		}
  5176  		v.reset(OpPPC64NotEqual)
  5177  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5178  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5179  		v1.AddArg(x)
  5180  		v0.AddArg(v1)
  5181  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5182  		v2.AddArg(y)
  5183  		v0.AddArg(v2)
  5184  		v.AddArg(v0)
  5185  		return true
  5186  	}
  5187  	// match: (Neq8 x y)
  5188  	// cond:
  5189  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5190  	for {
  5191  		_ = v.Args[1]
  5192  		x := v.Args[0]
  5193  		y := v.Args[1]
  5194  		v.reset(OpPPC64NotEqual)
  5195  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  5196  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5197  		v1.AddArg(x)
  5198  		v0.AddArg(v1)
  5199  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5200  		v2.AddArg(y)
  5201  		v0.AddArg(v2)
  5202  		v.AddArg(v0)
  5203  		return true
  5204  	}
  5205  }
  5206  func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
  5207  	// match: (NeqB x y)
  5208  	// cond:
  5209  	// result: (XOR x y)
  5210  	for {
  5211  		_ = v.Args[1]
  5212  		x := v.Args[0]
  5213  		y := v.Args[1]
  5214  		v.reset(OpPPC64XOR)
  5215  		v.AddArg(x)
  5216  		v.AddArg(y)
  5217  		return true
  5218  	}
  5219  }
  5220  func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
  5221  	b := v.Block
  5222  	_ = b
  5223  	// match: (NeqPtr x y)
  5224  	// cond:
  5225  	// result: (NotEqual (CMP x y))
  5226  	for {
  5227  		_ = v.Args[1]
  5228  		x := v.Args[0]
  5229  		y := v.Args[1]
  5230  		v.reset(OpPPC64NotEqual)
  5231  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  5232  		v0.AddArg(x)
  5233  		v0.AddArg(y)
  5234  		v.AddArg(v0)
  5235  		return true
  5236  	}
  5237  }
  5238  func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
  5239  	// match: (NilCheck ptr mem)
  5240  	// cond:
  5241  	// result: (LoweredNilCheck ptr mem)
  5242  	for {
  5243  		_ = v.Args[1]
  5244  		ptr := v.Args[0]
  5245  		mem := v.Args[1]
  5246  		v.reset(OpPPC64LoweredNilCheck)
  5247  		v.AddArg(ptr)
  5248  		v.AddArg(mem)
  5249  		return true
  5250  	}
  5251  }
  5252  func rewriteValuePPC64_OpNot_0(v *Value) bool {
  5253  	// match: (Not x)
  5254  	// cond:
  5255  	// result: (XORconst [1] x)
  5256  	for {
  5257  		x := v.Args[0]
  5258  		v.reset(OpPPC64XORconst)
  5259  		v.AuxInt = 1
  5260  		v.AddArg(x)
  5261  		return true
  5262  	}
  5263  }
  5264  func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
  5265  	b := v.Block
  5266  	_ = b
  5267  	typ := &b.Func.Config.Types
  5268  	_ = typ
  5269  	// match: (OffPtr [off] ptr)
  5270  	// cond:
  5271  	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
  5272  	for {
  5273  		off := v.AuxInt
  5274  		ptr := v.Args[0]
  5275  		v.reset(OpPPC64ADD)
  5276  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  5277  		v0.AuxInt = off
  5278  		v.AddArg(v0)
  5279  		v.AddArg(ptr)
  5280  		return true
  5281  	}
  5282  }
  5283  func rewriteValuePPC64_OpOr16_0(v *Value) bool {
  5284  	// match: (Or16 x y)
  5285  	// cond:
  5286  	// result: (OR x y)
  5287  	for {
  5288  		_ = v.Args[1]
  5289  		x := v.Args[0]
  5290  		y := v.Args[1]
  5291  		v.reset(OpPPC64OR)
  5292  		v.AddArg(x)
  5293  		v.AddArg(y)
  5294  		return true
  5295  	}
  5296  }
  5297  func rewriteValuePPC64_OpOr32_0(v *Value) bool {
  5298  	// match: (Or32 x y)
  5299  	// cond:
  5300  	// result: (OR x y)
  5301  	for {
  5302  		_ = v.Args[1]
  5303  		x := v.Args[0]
  5304  		y := v.Args[1]
  5305  		v.reset(OpPPC64OR)
  5306  		v.AddArg(x)
  5307  		v.AddArg(y)
  5308  		return true
  5309  	}
  5310  }
  5311  func rewriteValuePPC64_OpOr64_0(v *Value) bool {
  5312  	// match: (Or64 x y)
  5313  	// cond:
  5314  	// result: (OR x y)
  5315  	for {
  5316  		_ = v.Args[1]
  5317  		x := v.Args[0]
  5318  		y := v.Args[1]
  5319  		v.reset(OpPPC64OR)
  5320  		v.AddArg(x)
  5321  		v.AddArg(y)
  5322  		return true
  5323  	}
  5324  }
  5325  func rewriteValuePPC64_OpOr8_0(v *Value) bool {
  5326  	// match: (Or8 x y)
  5327  	// cond:
  5328  	// result: (OR x y)
  5329  	for {
  5330  		_ = v.Args[1]
  5331  		x := v.Args[0]
  5332  		y := v.Args[1]
  5333  		v.reset(OpPPC64OR)
  5334  		v.AddArg(x)
  5335  		v.AddArg(y)
  5336  		return true
  5337  	}
  5338  }
  5339  func rewriteValuePPC64_OpOrB_0(v *Value) bool {
  5340  	// match: (OrB x y)
  5341  	// cond:
  5342  	// result: (OR x y)
  5343  	for {
  5344  		_ = v.Args[1]
  5345  		x := v.Args[0]
  5346  		y := v.Args[1]
  5347  		v.reset(OpPPC64OR)
  5348  		v.AddArg(x)
  5349  		v.AddArg(y)
  5350  		return true
  5351  	}
  5352  }
  5353  func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
  5354  	b := v.Block
  5355  	_ = b
  5356  	typ := &b.Func.Config.Types
  5357  	_ = typ
  5358  	// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
  5359  	// cond: d == 64-c
  5360  	// result: (ROTLconst [c] x)
  5361  	for {
  5362  		_ = v.Args[1]
  5363  		v_0 := v.Args[0]
  5364  		if v_0.Op != OpPPC64SLDconst {
  5365  			break
  5366  		}
  5367  		c := v_0.AuxInt
  5368  		x := v_0.Args[0]
  5369  		v_1 := v.Args[1]
  5370  		if v_1.Op != OpPPC64SRDconst {
  5371  			break
  5372  		}
  5373  		d := v_1.AuxInt
  5374  		if x != v_1.Args[0] {
  5375  			break
  5376  		}
  5377  		if !(d == 64-c) {
  5378  			break
  5379  		}
  5380  		v.reset(OpPPC64ROTLconst)
  5381  		v.AuxInt = c
  5382  		v.AddArg(x)
  5383  		return true
  5384  	}
  5385  	// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
  5386  	// cond: d == 64-c
  5387  	// result: (ROTLconst [c] x)
  5388  	for {
  5389  		_ = v.Args[1]
  5390  		v_0 := v.Args[0]
  5391  		if v_0.Op != OpPPC64SRDconst {
  5392  			break
  5393  		}
  5394  		d := v_0.AuxInt
  5395  		x := v_0.Args[0]
  5396  		v_1 := v.Args[1]
  5397  		if v_1.Op != OpPPC64SLDconst {
  5398  			break
  5399  		}
  5400  		c := v_1.AuxInt
  5401  		if x != v_1.Args[0] {
  5402  			break
  5403  		}
  5404  		if !(d == 64-c) {
  5405  			break
  5406  		}
  5407  		v.reset(OpPPC64ROTLconst)
  5408  		v.AuxInt = c
  5409  		v.AddArg(x)
  5410  		return true
  5411  	}
  5412  	// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
  5413  	// cond: d == 32-c
  5414  	// result: (ROTLWconst [c] x)
  5415  	for {
  5416  		_ = v.Args[1]
  5417  		v_0 := v.Args[0]
  5418  		if v_0.Op != OpPPC64SLWconst {
  5419  			break
  5420  		}
  5421  		c := v_0.AuxInt
  5422  		x := v_0.Args[0]
  5423  		v_1 := v.Args[1]
  5424  		if v_1.Op != OpPPC64SRWconst {
  5425  			break
  5426  		}
  5427  		d := v_1.AuxInt
  5428  		if x != v_1.Args[0] {
  5429  			break
  5430  		}
  5431  		if !(d == 32-c) {
  5432  			break
  5433  		}
  5434  		v.reset(OpPPC64ROTLWconst)
  5435  		v.AuxInt = c
  5436  		v.AddArg(x)
  5437  		return true
  5438  	}
  5439  	// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
  5440  	// cond: d == 32-c
  5441  	// result: (ROTLWconst [c] x)
  5442  	for {
  5443  		_ = v.Args[1]
  5444  		v_0 := v.Args[0]
  5445  		if v_0.Op != OpPPC64SRWconst {
  5446  			break
  5447  		}
  5448  		d := v_0.AuxInt
  5449  		x := v_0.Args[0]
  5450  		v_1 := v.Args[1]
  5451  		if v_1.Op != OpPPC64SLWconst {
  5452  			break
  5453  		}
  5454  		c := v_1.AuxInt
  5455  		if x != v_1.Args[0] {
  5456  			break
  5457  		}
  5458  		if !(d == 32-c) {
  5459  			break
  5460  		}
  5461  		v.reset(OpPPC64ROTLWconst)
  5462  		v.AuxInt = c
  5463  		v.AddArg(x)
  5464  		return true
  5465  	}
  5466  	// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  5467  	// cond:
  5468  	// result: (ROTL x y)
  5469  	for {
  5470  		_ = v.Args[1]
  5471  		v_0 := v.Args[0]
  5472  		if v_0.Op != OpPPC64SLD {
  5473  			break
  5474  		}
  5475  		_ = v_0.Args[1]
  5476  		x := v_0.Args[0]
  5477  		v_0_1 := v_0.Args[1]
  5478  		if v_0_1.Op != OpPPC64ANDconst {
  5479  			break
  5480  		}
  5481  		if v_0_1.Type != typ.Int64 {
  5482  			break
  5483  		}
  5484  		if v_0_1.AuxInt != 63 {
  5485  			break
  5486  		}
  5487  		y := v_0_1.Args[0]
  5488  		v_1 := v.Args[1]
  5489  		if v_1.Op != OpPPC64SRD {
  5490  			break
  5491  		}
  5492  		_ = v_1.Args[1]
  5493  		if x != v_1.Args[0] {
  5494  			break
  5495  		}
  5496  		v_1_1 := v_1.Args[1]
  5497  		if v_1_1.Op != OpPPC64SUB {
  5498  			break
  5499  		}
  5500  		if v_1_1.Type != typ.UInt {
  5501  			break
  5502  		}
  5503  		_ = v_1_1.Args[1]
  5504  		v_1_1_0 := v_1_1.Args[0]
  5505  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5506  			break
  5507  		}
  5508  		if v_1_1_0.AuxInt != 64 {
  5509  			break
  5510  		}
  5511  		v_1_1_1 := v_1_1.Args[1]
  5512  		if v_1_1_1.Op != OpPPC64ANDconst {
  5513  			break
  5514  		}
  5515  		if v_1_1_1.Type != typ.UInt {
  5516  			break
  5517  		}
  5518  		if v_1_1_1.AuxInt != 63 {
  5519  			break
  5520  		}
  5521  		if y != v_1_1_1.Args[0] {
  5522  			break
  5523  		}
  5524  		v.reset(OpPPC64ROTL)
  5525  		v.AddArg(x)
  5526  		v.AddArg(y)
  5527  		return true
  5528  	}
  5529  	// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  5530  	// cond:
  5531  	// result: (ROTL x y)
  5532  	for {
  5533  		_ = v.Args[1]
  5534  		v_0 := v.Args[0]
  5535  		if v_0.Op != OpPPC64SRD {
  5536  			break
  5537  		}
  5538  		_ = v_0.Args[1]
  5539  		x := v_0.Args[0]
  5540  		v_0_1 := v_0.Args[1]
  5541  		if v_0_1.Op != OpPPC64SUB {
  5542  			break
  5543  		}
  5544  		if v_0_1.Type != typ.UInt {
  5545  			break
  5546  		}
  5547  		_ = v_0_1.Args[1]
  5548  		v_0_1_0 := v_0_1.Args[0]
  5549  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5550  			break
  5551  		}
  5552  		if v_0_1_0.AuxInt != 64 {
  5553  			break
  5554  		}
  5555  		v_0_1_1 := v_0_1.Args[1]
  5556  		if v_0_1_1.Op != OpPPC64ANDconst {
  5557  			break
  5558  		}
  5559  		if v_0_1_1.Type != typ.UInt {
  5560  			break
  5561  		}
  5562  		if v_0_1_1.AuxInt != 63 {
  5563  			break
  5564  		}
  5565  		y := v_0_1_1.Args[0]
  5566  		v_1 := v.Args[1]
  5567  		if v_1.Op != OpPPC64SLD {
  5568  			break
  5569  		}
  5570  		_ = v_1.Args[1]
  5571  		if x != v_1.Args[0] {
  5572  			break
  5573  		}
  5574  		v_1_1 := v_1.Args[1]
  5575  		if v_1_1.Op != OpPPC64ANDconst {
  5576  			break
  5577  		}
  5578  		if v_1_1.Type != typ.Int64 {
  5579  			break
  5580  		}
  5581  		if v_1_1.AuxInt != 63 {
  5582  			break
  5583  		}
  5584  		if y != v_1_1.Args[0] {
  5585  			break
  5586  		}
  5587  		v.reset(OpPPC64ROTL)
  5588  		v.AddArg(x)
  5589  		v.AddArg(y)
  5590  		return true
  5591  	}
  5592  	// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  5593  	// cond:
  5594  	// result: (ROTLW x y)
  5595  	for {
  5596  		_ = v.Args[1]
  5597  		v_0 := v.Args[0]
  5598  		if v_0.Op != OpPPC64SLW {
  5599  			break
  5600  		}
  5601  		_ = v_0.Args[1]
  5602  		x := v_0.Args[0]
  5603  		v_0_1 := v_0.Args[1]
  5604  		if v_0_1.Op != OpPPC64ANDconst {
  5605  			break
  5606  		}
  5607  		if v_0_1.Type != typ.Int32 {
  5608  			break
  5609  		}
  5610  		if v_0_1.AuxInt != 31 {
  5611  			break
  5612  		}
  5613  		y := v_0_1.Args[0]
  5614  		v_1 := v.Args[1]
  5615  		if v_1.Op != OpPPC64SRW {
  5616  			break
  5617  		}
  5618  		_ = v_1.Args[1]
  5619  		if x != v_1.Args[0] {
  5620  			break
  5621  		}
  5622  		v_1_1 := v_1.Args[1]
  5623  		if v_1_1.Op != OpPPC64SUB {
  5624  			break
  5625  		}
  5626  		if v_1_1.Type != typ.UInt {
  5627  			break
  5628  		}
  5629  		_ = v_1_1.Args[1]
  5630  		v_1_1_0 := v_1_1.Args[0]
  5631  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5632  			break
  5633  		}
  5634  		if v_1_1_0.AuxInt != 32 {
  5635  			break
  5636  		}
  5637  		v_1_1_1 := v_1_1.Args[1]
  5638  		if v_1_1_1.Op != OpPPC64ANDconst {
  5639  			break
  5640  		}
  5641  		if v_1_1_1.Type != typ.UInt {
  5642  			break
  5643  		}
  5644  		if v_1_1_1.AuxInt != 31 {
  5645  			break
  5646  		}
  5647  		if y != v_1_1_1.Args[0] {
  5648  			break
  5649  		}
  5650  		v.reset(OpPPC64ROTLW)
  5651  		v.AddArg(x)
  5652  		v.AddArg(y)
  5653  		return true
  5654  	}
  5655  	// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  5656  	// cond:
  5657  	// result: (ROTLW x y)
  5658  	for {
  5659  		_ = v.Args[1]
  5660  		v_0 := v.Args[0]
  5661  		if v_0.Op != OpPPC64SRW {
  5662  			break
  5663  		}
  5664  		_ = v_0.Args[1]
  5665  		x := v_0.Args[0]
  5666  		v_0_1 := v_0.Args[1]
  5667  		if v_0_1.Op != OpPPC64SUB {
  5668  			break
  5669  		}
  5670  		if v_0_1.Type != typ.UInt {
  5671  			break
  5672  		}
  5673  		_ = v_0_1.Args[1]
  5674  		v_0_1_0 := v_0_1.Args[0]
  5675  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5676  			break
  5677  		}
  5678  		if v_0_1_0.AuxInt != 32 {
  5679  			break
  5680  		}
  5681  		v_0_1_1 := v_0_1.Args[1]
  5682  		if v_0_1_1.Op != OpPPC64ANDconst {
  5683  			break
  5684  		}
  5685  		if v_0_1_1.Type != typ.UInt {
  5686  			break
  5687  		}
  5688  		if v_0_1_1.AuxInt != 31 {
  5689  			break
  5690  		}
  5691  		y := v_0_1_1.Args[0]
  5692  		v_1 := v.Args[1]
  5693  		if v_1.Op != OpPPC64SLW {
  5694  			break
  5695  		}
  5696  		_ = v_1.Args[1]
  5697  		if x != v_1.Args[0] {
  5698  			break
  5699  		}
  5700  		v_1_1 := v_1.Args[1]
  5701  		if v_1_1.Op != OpPPC64ANDconst {
  5702  			break
  5703  		}
  5704  		if v_1_1.Type != typ.Int32 {
  5705  			break
  5706  		}
  5707  		if v_1_1.AuxInt != 31 {
  5708  			break
  5709  		}
  5710  		if y != v_1_1.Args[0] {
  5711  			break
  5712  		}
  5713  		v.reset(OpPPC64ROTLW)
  5714  		v.AddArg(x)
  5715  		v.AddArg(y)
  5716  		return true
  5717  	}
  5718  	// match: (ADD x (MOVDconst [c]))
  5719  	// cond: is32Bit(c)
  5720  	// result: (ADDconst [c] x)
  5721  	for {
  5722  		_ = v.Args[1]
  5723  		x := v.Args[0]
  5724  		v_1 := v.Args[1]
  5725  		if v_1.Op != OpPPC64MOVDconst {
  5726  			break
  5727  		}
  5728  		c := v_1.AuxInt
  5729  		if !(is32Bit(c)) {
  5730  			break
  5731  		}
  5732  		v.reset(OpPPC64ADDconst)
  5733  		v.AuxInt = c
  5734  		v.AddArg(x)
  5735  		return true
  5736  	}
  5737  	// match: (ADD (MOVDconst [c]) x)
  5738  	// cond: is32Bit(c)
  5739  	// result: (ADDconst [c] x)
  5740  	for {
  5741  		_ = v.Args[1]
  5742  		v_0 := v.Args[0]
  5743  		if v_0.Op != OpPPC64MOVDconst {
  5744  			break
  5745  		}
  5746  		c := v_0.AuxInt
  5747  		x := v.Args[1]
  5748  		if !(is32Bit(c)) {
  5749  			break
  5750  		}
  5751  		v.reset(OpPPC64ADDconst)
  5752  		v.AuxInt = c
  5753  		v.AddArg(x)
  5754  		return true
  5755  	}
  5756  	return false
  5757  }
  5758  func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
  5759  	// match: (ADDconst [c] (ADDconst [d] x))
  5760  	// cond: is32Bit(c+d)
  5761  	// result: (ADDconst [c+d] x)
  5762  	for {
  5763  		c := v.AuxInt
  5764  		v_0 := v.Args[0]
  5765  		if v_0.Op != OpPPC64ADDconst {
  5766  			break
  5767  		}
  5768  		d := v_0.AuxInt
  5769  		x := v_0.Args[0]
  5770  		if !(is32Bit(c + d)) {
  5771  			break
  5772  		}
  5773  		v.reset(OpPPC64ADDconst)
  5774  		v.AuxInt = c + d
  5775  		v.AddArg(x)
  5776  		return true
  5777  	}
  5778  	// match: (ADDconst [0] x)
  5779  	// cond:
  5780  	// result: x
  5781  	for {
  5782  		if v.AuxInt != 0 {
  5783  			break
  5784  		}
  5785  		x := v.Args[0]
  5786  		v.reset(OpCopy)
  5787  		v.Type = x.Type
  5788  		v.AddArg(x)
  5789  		return true
  5790  	}
  5791  	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
  5792  	// cond:
  5793  	// result: (MOVDaddr [c+d] {sym} x)
  5794  	for {
  5795  		c := v.AuxInt
  5796  		v_0 := v.Args[0]
  5797  		if v_0.Op != OpPPC64MOVDaddr {
  5798  			break
  5799  		}
  5800  		d := v_0.AuxInt
  5801  		sym := v_0.Aux
  5802  		x := v_0.Args[0]
  5803  		v.reset(OpPPC64MOVDaddr)
  5804  		v.AuxInt = c + d
  5805  		v.Aux = sym
  5806  		v.AddArg(x)
  5807  		return true
  5808  	}
  5809  	return false
  5810  }
  5811  func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
  5812  	// match: (AND x (NOR y y))
  5813  	// cond:
  5814  	// result: (ANDN x y)
  5815  	for {
  5816  		_ = v.Args[1]
  5817  		x := v.Args[0]
  5818  		v_1 := v.Args[1]
  5819  		if v_1.Op != OpPPC64NOR {
  5820  			break
  5821  		}
  5822  		_ = v_1.Args[1]
  5823  		y := v_1.Args[0]
  5824  		if y != v_1.Args[1] {
  5825  			break
  5826  		}
  5827  		v.reset(OpPPC64ANDN)
  5828  		v.AddArg(x)
  5829  		v.AddArg(y)
  5830  		return true
  5831  	}
  5832  	// match: (AND (NOR y y) x)
  5833  	// cond:
  5834  	// result: (ANDN x y)
  5835  	for {
  5836  		_ = v.Args[1]
  5837  		v_0 := v.Args[0]
  5838  		if v_0.Op != OpPPC64NOR {
  5839  			break
  5840  		}
  5841  		_ = v_0.Args[1]
  5842  		y := v_0.Args[0]
  5843  		if y != v_0.Args[1] {
  5844  			break
  5845  		}
  5846  		x := v.Args[1]
  5847  		v.reset(OpPPC64ANDN)
  5848  		v.AddArg(x)
  5849  		v.AddArg(y)
  5850  		return true
  5851  	}
  5852  	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
  5853  	// cond:
  5854  	// result: (MOVDconst [c&d])
  5855  	for {
  5856  		_ = v.Args[1]
  5857  		v_0 := v.Args[0]
  5858  		if v_0.Op != OpPPC64MOVDconst {
  5859  			break
  5860  		}
  5861  		c := v_0.AuxInt
  5862  		v_1 := v.Args[1]
  5863  		if v_1.Op != OpPPC64MOVDconst {
  5864  			break
  5865  		}
  5866  		d := v_1.AuxInt
  5867  		v.reset(OpPPC64MOVDconst)
  5868  		v.AuxInt = c & d
  5869  		return true
  5870  	}
  5871  	// match: (AND (MOVDconst [d]) (MOVDconst [c]))
  5872  	// cond:
  5873  	// result: (MOVDconst [c&d])
  5874  	for {
  5875  		_ = v.Args[1]
  5876  		v_0 := v.Args[0]
  5877  		if v_0.Op != OpPPC64MOVDconst {
  5878  			break
  5879  		}
  5880  		d := v_0.AuxInt
  5881  		v_1 := v.Args[1]
  5882  		if v_1.Op != OpPPC64MOVDconst {
  5883  			break
  5884  		}
  5885  		c := v_1.AuxInt
  5886  		v.reset(OpPPC64MOVDconst)
  5887  		v.AuxInt = c & d
  5888  		return true
  5889  	}
  5890  	// match: (AND x (MOVDconst [c]))
  5891  	// cond: isU16Bit(c)
  5892  	// result: (ANDconst [c] x)
  5893  	for {
  5894  		_ = v.Args[1]
  5895  		x := v.Args[0]
  5896  		v_1 := v.Args[1]
  5897  		if v_1.Op != OpPPC64MOVDconst {
  5898  			break
  5899  		}
  5900  		c := v_1.AuxInt
  5901  		if !(isU16Bit(c)) {
  5902  			break
  5903  		}
  5904  		v.reset(OpPPC64ANDconst)
  5905  		v.AuxInt = c
  5906  		v.AddArg(x)
  5907  		return true
  5908  	}
  5909  	// match: (AND (MOVDconst [c]) x)
  5910  	// cond: isU16Bit(c)
  5911  	// result: (ANDconst [c] x)
  5912  	for {
  5913  		_ = v.Args[1]
  5914  		v_0 := v.Args[0]
  5915  		if v_0.Op != OpPPC64MOVDconst {
  5916  			break
  5917  		}
  5918  		c := v_0.AuxInt
  5919  		x := v.Args[1]
  5920  		if !(isU16Bit(c)) {
  5921  			break
  5922  		}
  5923  		v.reset(OpPPC64ANDconst)
  5924  		v.AuxInt = c
  5925  		v.AddArg(x)
  5926  		return true
  5927  	}
  5928  	// match: (AND (MOVDconst [c]) y:(MOVWZreg _))
  5929  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5930  	// result: y
  5931  	for {
  5932  		_ = v.Args[1]
  5933  		v_0 := v.Args[0]
  5934  		if v_0.Op != OpPPC64MOVDconst {
  5935  			break
  5936  		}
  5937  		c := v_0.AuxInt
  5938  		y := v.Args[1]
  5939  		if y.Op != OpPPC64MOVWZreg {
  5940  			break
  5941  		}
  5942  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5943  			break
  5944  		}
  5945  		v.reset(OpCopy)
  5946  		v.Type = y.Type
  5947  		v.AddArg(y)
  5948  		return true
  5949  	}
  5950  	// match: (AND y:(MOVWZreg _) (MOVDconst [c]))
  5951  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5952  	// result: y
  5953  	for {
  5954  		_ = v.Args[1]
  5955  		y := v.Args[0]
  5956  		if y.Op != OpPPC64MOVWZreg {
  5957  			break
  5958  		}
  5959  		v_1 := v.Args[1]
  5960  		if v_1.Op != OpPPC64MOVDconst {
  5961  			break
  5962  		}
  5963  		c := v_1.AuxInt
  5964  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5965  			break
  5966  		}
  5967  		v.reset(OpCopy)
  5968  		v.Type = y.Type
  5969  		v.AddArg(y)
  5970  		return true
  5971  	}
  5972  	// match: (AND (MOVDconst [0xFFFFFFFF]) y:(MOVWreg x))
  5973  	// cond:
  5974  	// result: (MOVWZreg x)
  5975  	for {
  5976  		_ = v.Args[1]
  5977  		v_0 := v.Args[0]
  5978  		if v_0.Op != OpPPC64MOVDconst {
  5979  			break
  5980  		}
  5981  		if v_0.AuxInt != 0xFFFFFFFF {
  5982  			break
  5983  		}
  5984  		y := v.Args[1]
  5985  		if y.Op != OpPPC64MOVWreg {
  5986  			break
  5987  		}
  5988  		x := y.Args[0]
  5989  		v.reset(OpPPC64MOVWZreg)
  5990  		v.AddArg(x)
  5991  		return true
  5992  	}
  5993  	// match: (AND y:(MOVWreg x) (MOVDconst [0xFFFFFFFF]))
  5994  	// cond:
  5995  	// result: (MOVWZreg x)
  5996  	for {
  5997  		_ = v.Args[1]
  5998  		y := v.Args[0]
  5999  		if y.Op != OpPPC64MOVWreg {
  6000  			break
  6001  		}
  6002  		x := y.Args[0]
  6003  		v_1 := v.Args[1]
  6004  		if v_1.Op != OpPPC64MOVDconst {
  6005  			break
  6006  		}
  6007  		if v_1.AuxInt != 0xFFFFFFFF {
  6008  			break
  6009  		}
  6010  		v.reset(OpPPC64MOVWZreg)
  6011  		v.AddArg(x)
  6012  		return true
  6013  	}
  6014  	return false
  6015  }
  6016  func rewriteValuePPC64_OpPPC64AND_10(v *Value) bool {
  6017  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  6018  	// cond:
  6019  	// result: (ANDconst [c&0xFF] x)
  6020  	for {
  6021  		_ = v.Args[1]
  6022  		v_0 := v.Args[0]
  6023  		if v_0.Op != OpPPC64MOVDconst {
  6024  			break
  6025  		}
  6026  		c := v_0.AuxInt
  6027  		x := v.Args[1]
  6028  		if x.Op != OpPPC64MOVBZload {
  6029  			break
  6030  		}
  6031  		_ = x.Args[1]
  6032  		v.reset(OpPPC64ANDconst)
  6033  		v.AuxInt = c & 0xFF
  6034  		v.AddArg(x)
  6035  		return true
  6036  	}
  6037  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  6038  	// cond:
  6039  	// result: (ANDconst [c&0xFF] x)
  6040  	for {
  6041  		_ = v.Args[1]
  6042  		x := v.Args[0]
  6043  		if x.Op != OpPPC64MOVBZload {
  6044  			break
  6045  		}
  6046  		_ = x.Args[1]
  6047  		v_1 := v.Args[1]
  6048  		if v_1.Op != OpPPC64MOVDconst {
  6049  			break
  6050  		}
  6051  		c := v_1.AuxInt
  6052  		v.reset(OpPPC64ANDconst)
  6053  		v.AuxInt = c & 0xFF
  6054  		v.AddArg(x)
  6055  		return true
  6056  	}
  6057  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  6058  	// cond:
  6059  	// result: (ANDconst [c&0xFF] x)
  6060  	for {
  6061  		_ = v.Args[1]
  6062  		x := v.Args[0]
  6063  		if x.Op != OpPPC64MOVBZload {
  6064  			break
  6065  		}
  6066  		_ = x.Args[1]
  6067  		v_1 := v.Args[1]
  6068  		if v_1.Op != OpPPC64MOVDconst {
  6069  			break
  6070  		}
  6071  		c := v_1.AuxInt
  6072  		v.reset(OpPPC64ANDconst)
  6073  		v.AuxInt = c & 0xFF
  6074  		v.AddArg(x)
  6075  		return true
  6076  	}
  6077  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  6078  	// cond:
  6079  	// result: (ANDconst [c&0xFF] x)
  6080  	for {
  6081  		_ = v.Args[1]
  6082  		v_0 := v.Args[0]
  6083  		if v_0.Op != OpPPC64MOVDconst {
  6084  			break
  6085  		}
  6086  		c := v_0.AuxInt
  6087  		x := v.Args[1]
  6088  		if x.Op != OpPPC64MOVBZload {
  6089  			break
  6090  		}
  6091  		_ = x.Args[1]
  6092  		v.reset(OpPPC64ANDconst)
  6093  		v.AuxInt = c & 0xFF
  6094  		v.AddArg(x)
  6095  		return true
  6096  	}
  6097  	return false
  6098  }
  6099  func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
  6100  	// match: (ANDconst [c] (ANDconst [d] x))
  6101  	// cond:
  6102  	// result: (ANDconst [c&d] x)
  6103  	for {
  6104  		c := v.AuxInt
  6105  		v_0 := v.Args[0]
  6106  		if v_0.Op != OpPPC64ANDconst {
  6107  			break
  6108  		}
  6109  		d := v_0.AuxInt
  6110  		x := v_0.Args[0]
  6111  		v.reset(OpPPC64ANDconst)
  6112  		v.AuxInt = c & d
  6113  		v.AddArg(x)
  6114  		return true
  6115  	}
  6116  	// match: (ANDconst [-1] x)
  6117  	// cond:
  6118  	// result: x
  6119  	for {
  6120  		if v.AuxInt != -1 {
  6121  			break
  6122  		}
  6123  		x := v.Args[0]
  6124  		v.reset(OpCopy)
  6125  		v.Type = x.Type
  6126  		v.AddArg(x)
  6127  		return true
  6128  	}
  6129  	// match: (ANDconst [0] _)
  6130  	// cond:
  6131  	// result: (MOVDconst [0])
  6132  	for {
  6133  		if v.AuxInt != 0 {
  6134  			break
  6135  		}
  6136  		v.reset(OpPPC64MOVDconst)
  6137  		v.AuxInt = 0
  6138  		return true
  6139  	}
  6140  	// match: (ANDconst [c] y:(MOVBZreg _))
  6141  	// cond: c&0xFF == 0xFF
  6142  	// result: y
  6143  	for {
  6144  		c := v.AuxInt
  6145  		y := v.Args[0]
  6146  		if y.Op != OpPPC64MOVBZreg {
  6147  			break
  6148  		}
  6149  		if !(c&0xFF == 0xFF) {
  6150  			break
  6151  		}
  6152  		v.reset(OpCopy)
  6153  		v.Type = y.Type
  6154  		v.AddArg(y)
  6155  		return true
  6156  	}
  6157  	// match: (ANDconst [0xFF] y:(MOVBreg _))
  6158  	// cond:
  6159  	// result: y
  6160  	for {
  6161  		if v.AuxInt != 0xFF {
  6162  			break
  6163  		}
  6164  		y := v.Args[0]
  6165  		if y.Op != OpPPC64MOVBreg {
  6166  			break
  6167  		}
  6168  		v.reset(OpCopy)
  6169  		v.Type = y.Type
  6170  		v.AddArg(y)
  6171  		return true
  6172  	}
  6173  	// match: (ANDconst [c] y:(MOVHZreg _))
  6174  	// cond: c&0xFFFF == 0xFFFF
  6175  	// result: y
  6176  	for {
  6177  		c := v.AuxInt
  6178  		y := v.Args[0]
  6179  		if y.Op != OpPPC64MOVHZreg {
  6180  			break
  6181  		}
  6182  		if !(c&0xFFFF == 0xFFFF) {
  6183  			break
  6184  		}
  6185  		v.reset(OpCopy)
  6186  		v.Type = y.Type
  6187  		v.AddArg(y)
  6188  		return true
  6189  	}
  6190  	// match: (ANDconst [0xFFFF] y:(MOVHreg _))
  6191  	// cond:
  6192  	// result: y
  6193  	for {
  6194  		if v.AuxInt != 0xFFFF {
  6195  			break
  6196  		}
  6197  		y := v.Args[0]
  6198  		if y.Op != OpPPC64MOVHreg {
  6199  			break
  6200  		}
  6201  		v.reset(OpCopy)
  6202  		v.Type = y.Type
  6203  		v.AddArg(y)
  6204  		return true
  6205  	}
  6206  	// match: (ANDconst [c] (MOVBreg x))
  6207  	// cond:
  6208  	// result: (ANDconst [c&0xFF] x)
  6209  	for {
  6210  		c := v.AuxInt
  6211  		v_0 := v.Args[0]
  6212  		if v_0.Op != OpPPC64MOVBreg {
  6213  			break
  6214  		}
  6215  		x := v_0.Args[0]
  6216  		v.reset(OpPPC64ANDconst)
  6217  		v.AuxInt = c & 0xFF
  6218  		v.AddArg(x)
  6219  		return true
  6220  	}
  6221  	// match: (ANDconst [c] (MOVBZreg x))
  6222  	// cond:
  6223  	// result: (ANDconst [c&0xFF] x)
  6224  	for {
  6225  		c := v.AuxInt
  6226  		v_0 := v.Args[0]
  6227  		if v_0.Op != OpPPC64MOVBZreg {
  6228  			break
  6229  		}
  6230  		x := v_0.Args[0]
  6231  		v.reset(OpPPC64ANDconst)
  6232  		v.AuxInt = c & 0xFF
  6233  		v.AddArg(x)
  6234  		return true
  6235  	}
  6236  	// match: (ANDconst [c] (MOVHreg x))
  6237  	// cond:
  6238  	// result: (ANDconst [c&0xFFFF] x)
  6239  	for {
  6240  		c := v.AuxInt
  6241  		v_0 := v.Args[0]
  6242  		if v_0.Op != OpPPC64MOVHreg {
  6243  			break
  6244  		}
  6245  		x := v_0.Args[0]
  6246  		v.reset(OpPPC64ANDconst)
  6247  		v.AuxInt = c & 0xFFFF
  6248  		v.AddArg(x)
  6249  		return true
  6250  	}
  6251  	return false
  6252  }
  6253  func rewriteValuePPC64_OpPPC64ANDconst_10(v *Value) bool {
  6254  	// match: (ANDconst [c] (MOVHZreg x))
  6255  	// cond:
  6256  	// result: (ANDconst [c&0xFFFF] x)
  6257  	for {
  6258  		c := v.AuxInt
  6259  		v_0 := v.Args[0]
  6260  		if v_0.Op != OpPPC64MOVHZreg {
  6261  			break
  6262  		}
  6263  		x := v_0.Args[0]
  6264  		v.reset(OpPPC64ANDconst)
  6265  		v.AuxInt = c & 0xFFFF
  6266  		v.AddArg(x)
  6267  		return true
  6268  	}
  6269  	// match: (ANDconst [c] (MOVWreg x))
  6270  	// cond:
  6271  	// result: (ANDconst [c&0xFFFFFFFF] x)
  6272  	for {
  6273  		c := v.AuxInt
  6274  		v_0 := v.Args[0]
  6275  		if v_0.Op != OpPPC64MOVWreg {
  6276  			break
  6277  		}
  6278  		x := v_0.Args[0]
  6279  		v.reset(OpPPC64ANDconst)
  6280  		v.AuxInt = c & 0xFFFFFFFF
  6281  		v.AddArg(x)
  6282  		return true
  6283  	}
  6284  	// match: (ANDconst [c] (MOVWZreg x))
  6285  	// cond:
  6286  	// result: (ANDconst [c&0xFFFFFFFF] x)
  6287  	for {
  6288  		c := v.AuxInt
  6289  		v_0 := v.Args[0]
  6290  		if v_0.Op != OpPPC64MOVWZreg {
  6291  			break
  6292  		}
  6293  		x := v_0.Args[0]
  6294  		v.reset(OpPPC64ANDconst)
  6295  		v.AuxInt = c & 0xFFFFFFFF
  6296  		v.AddArg(x)
  6297  		return true
  6298  	}
  6299  	return false
  6300  }
  6301  func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
  6302  	b := v.Block
  6303  	_ = b
  6304  	// match: (CMP x (MOVDconst [c]))
  6305  	// cond: is16Bit(c)
  6306  	// result: (CMPconst x [c])
  6307  	for {
  6308  		_ = v.Args[1]
  6309  		x := v.Args[0]
  6310  		v_1 := v.Args[1]
  6311  		if v_1.Op != OpPPC64MOVDconst {
  6312  			break
  6313  		}
  6314  		c := v_1.AuxInt
  6315  		if !(is16Bit(c)) {
  6316  			break
  6317  		}
  6318  		v.reset(OpPPC64CMPconst)
  6319  		v.AuxInt = c
  6320  		v.AddArg(x)
  6321  		return true
  6322  	}
  6323  	// match: (CMP (MOVDconst [c]) y)
  6324  	// cond: is16Bit(c)
  6325  	// result: (InvertFlags (CMPconst y [c]))
  6326  	for {
  6327  		_ = v.Args[1]
  6328  		v_0 := v.Args[0]
  6329  		if v_0.Op != OpPPC64MOVDconst {
  6330  			break
  6331  		}
  6332  		c := v_0.AuxInt
  6333  		y := v.Args[1]
  6334  		if !(is16Bit(c)) {
  6335  			break
  6336  		}
  6337  		v.reset(OpPPC64InvertFlags)
  6338  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  6339  		v0.AuxInt = c
  6340  		v0.AddArg(y)
  6341  		v.AddArg(v0)
  6342  		return true
  6343  	}
  6344  	return false
  6345  }
  6346  func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
  6347  	b := v.Block
  6348  	_ = b
  6349  	// match: (CMPU x (MOVDconst [c]))
  6350  	// cond: isU16Bit(c)
  6351  	// result: (CMPUconst x [c])
  6352  	for {
  6353  		_ = v.Args[1]
  6354  		x := v.Args[0]
  6355  		v_1 := v.Args[1]
  6356  		if v_1.Op != OpPPC64MOVDconst {
  6357  			break
  6358  		}
  6359  		c := v_1.AuxInt
  6360  		if !(isU16Bit(c)) {
  6361  			break
  6362  		}
  6363  		v.reset(OpPPC64CMPUconst)
  6364  		v.AuxInt = c
  6365  		v.AddArg(x)
  6366  		return true
  6367  	}
  6368  	// match: (CMPU (MOVDconst [c]) y)
  6369  	// cond: isU16Bit(c)
  6370  	// result: (InvertFlags (CMPUconst y [c]))
  6371  	for {
  6372  		_ = v.Args[1]
  6373  		v_0 := v.Args[0]
  6374  		if v_0.Op != OpPPC64MOVDconst {
  6375  			break
  6376  		}
  6377  		c := v_0.AuxInt
  6378  		y := v.Args[1]
  6379  		if !(isU16Bit(c)) {
  6380  			break
  6381  		}
  6382  		v.reset(OpPPC64InvertFlags)
  6383  		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
  6384  		v0.AuxInt = c
  6385  		v0.AddArg(y)
  6386  		v.AddArg(v0)
  6387  		return true
  6388  	}
  6389  	return false
  6390  }
  6391  func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
  6392  	// match: (CMPUconst (MOVDconst [x]) [y])
  6393  	// cond: x==y
  6394  	// result: (FlagEQ)
  6395  	for {
  6396  		y := v.AuxInt
  6397  		v_0 := v.Args[0]
  6398  		if v_0.Op != OpPPC64MOVDconst {
  6399  			break
  6400  		}
  6401  		x := v_0.AuxInt
  6402  		if !(x == y) {
  6403  			break
  6404  		}
  6405  		v.reset(OpPPC64FlagEQ)
  6406  		return true
  6407  	}
  6408  	// match: (CMPUconst (MOVDconst [x]) [y])
  6409  	// cond: uint64(x)<uint64(y)
  6410  	// result: (FlagLT)
  6411  	for {
  6412  		y := v.AuxInt
  6413  		v_0 := v.Args[0]
  6414  		if v_0.Op != OpPPC64MOVDconst {
  6415  			break
  6416  		}
  6417  		x := v_0.AuxInt
  6418  		if !(uint64(x) < uint64(y)) {
  6419  			break
  6420  		}
  6421  		v.reset(OpPPC64FlagLT)
  6422  		return true
  6423  	}
  6424  	// match: (CMPUconst (MOVDconst [x]) [y])
  6425  	// cond: uint64(x)>uint64(y)
  6426  	// result: (FlagGT)
  6427  	for {
  6428  		y := v.AuxInt
  6429  		v_0 := v.Args[0]
  6430  		if v_0.Op != OpPPC64MOVDconst {
  6431  			break
  6432  		}
  6433  		x := v_0.AuxInt
  6434  		if !(uint64(x) > uint64(y)) {
  6435  			break
  6436  		}
  6437  		v.reset(OpPPC64FlagGT)
  6438  		return true
  6439  	}
  6440  	return false
  6441  }
  6442  func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
  6443  	b := v.Block
  6444  	_ = b
  6445  	// match: (CMPW x (MOVWreg y))
  6446  	// cond:
  6447  	// result: (CMPW x y)
  6448  	for {
  6449  		_ = v.Args[1]
  6450  		x := v.Args[0]
  6451  		v_1 := v.Args[1]
  6452  		if v_1.Op != OpPPC64MOVWreg {
  6453  			break
  6454  		}
  6455  		y := v_1.Args[0]
  6456  		v.reset(OpPPC64CMPW)
  6457  		v.AddArg(x)
  6458  		v.AddArg(y)
  6459  		return true
  6460  	}
  6461  	// match: (CMPW (MOVWreg x) y)
  6462  	// cond:
  6463  	// result: (CMPW x y)
  6464  	for {
  6465  		_ = v.Args[1]
  6466  		v_0 := v.Args[0]
  6467  		if v_0.Op != OpPPC64MOVWreg {
  6468  			break
  6469  		}
  6470  		x := v_0.Args[0]
  6471  		y := v.Args[1]
  6472  		v.reset(OpPPC64CMPW)
  6473  		v.AddArg(x)
  6474  		v.AddArg(y)
  6475  		return true
  6476  	}
  6477  	// match: (CMPW x (MOVDconst [c]))
  6478  	// cond: is16Bit(c)
  6479  	// result: (CMPWconst x [c])
  6480  	for {
  6481  		_ = v.Args[1]
  6482  		x := v.Args[0]
  6483  		v_1 := v.Args[1]
  6484  		if v_1.Op != OpPPC64MOVDconst {
  6485  			break
  6486  		}
  6487  		c := v_1.AuxInt
  6488  		if !(is16Bit(c)) {
  6489  			break
  6490  		}
  6491  		v.reset(OpPPC64CMPWconst)
  6492  		v.AuxInt = c
  6493  		v.AddArg(x)
  6494  		return true
  6495  	}
  6496  	// match: (CMPW (MOVDconst [c]) y)
  6497  	// cond: is16Bit(c)
  6498  	// result: (InvertFlags (CMPWconst y [c]))
  6499  	for {
  6500  		_ = v.Args[1]
  6501  		v_0 := v.Args[0]
  6502  		if v_0.Op != OpPPC64MOVDconst {
  6503  			break
  6504  		}
  6505  		c := v_0.AuxInt
  6506  		y := v.Args[1]
  6507  		if !(is16Bit(c)) {
  6508  			break
  6509  		}
  6510  		v.reset(OpPPC64InvertFlags)
  6511  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
  6512  		v0.AuxInt = c
  6513  		v0.AddArg(y)
  6514  		v.AddArg(v0)
  6515  		return true
  6516  	}
  6517  	return false
  6518  }
  6519  func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
  6520  	b := v.Block
  6521  	_ = b
  6522  	// match: (CMPWU x (MOVWZreg y))
  6523  	// cond:
  6524  	// result: (CMPWU x y)
  6525  	for {
  6526  		_ = v.Args[1]
  6527  		x := v.Args[0]
  6528  		v_1 := v.Args[1]
  6529  		if v_1.Op != OpPPC64MOVWZreg {
  6530  			break
  6531  		}
  6532  		y := v_1.Args[0]
  6533  		v.reset(OpPPC64CMPWU)
  6534  		v.AddArg(x)
  6535  		v.AddArg(y)
  6536  		return true
  6537  	}
  6538  	// match: (CMPWU (MOVWZreg x) y)
  6539  	// cond:
  6540  	// result: (CMPWU x y)
  6541  	for {
  6542  		_ = v.Args[1]
  6543  		v_0 := v.Args[0]
  6544  		if v_0.Op != OpPPC64MOVWZreg {
  6545  			break
  6546  		}
  6547  		x := v_0.Args[0]
  6548  		y := v.Args[1]
  6549  		v.reset(OpPPC64CMPWU)
  6550  		v.AddArg(x)
  6551  		v.AddArg(y)
  6552  		return true
  6553  	}
  6554  	// match: (CMPWU x (MOVDconst [c]))
  6555  	// cond: isU16Bit(c)
  6556  	// result: (CMPWUconst x [c])
  6557  	for {
  6558  		_ = v.Args[1]
  6559  		x := v.Args[0]
  6560  		v_1 := v.Args[1]
  6561  		if v_1.Op != OpPPC64MOVDconst {
  6562  			break
  6563  		}
  6564  		c := v_1.AuxInt
  6565  		if !(isU16Bit(c)) {
  6566  			break
  6567  		}
  6568  		v.reset(OpPPC64CMPWUconst)
  6569  		v.AuxInt = c
  6570  		v.AddArg(x)
  6571  		return true
  6572  	}
  6573  	// match: (CMPWU (MOVDconst [c]) y)
  6574  	// cond: isU16Bit(c)
  6575  	// result: (InvertFlags (CMPWUconst y [c]))
  6576  	for {
  6577  		_ = v.Args[1]
  6578  		v_0 := v.Args[0]
  6579  		if v_0.Op != OpPPC64MOVDconst {
  6580  			break
  6581  		}
  6582  		c := v_0.AuxInt
  6583  		y := v.Args[1]
  6584  		if !(isU16Bit(c)) {
  6585  			break
  6586  		}
  6587  		v.reset(OpPPC64InvertFlags)
  6588  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
  6589  		v0.AuxInt = c
  6590  		v0.AddArg(y)
  6591  		v.AddArg(v0)
  6592  		return true
  6593  	}
  6594  	return false
  6595  }
  6596  func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
  6597  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6598  	// cond: int32(x)==int32(y)
  6599  	// result: (FlagEQ)
  6600  	for {
  6601  		y := v.AuxInt
  6602  		v_0 := v.Args[0]
  6603  		if v_0.Op != OpPPC64MOVDconst {
  6604  			break
  6605  		}
  6606  		x := v_0.AuxInt
  6607  		if !(int32(x) == int32(y)) {
  6608  			break
  6609  		}
  6610  		v.reset(OpPPC64FlagEQ)
  6611  		return true
  6612  	}
  6613  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6614  	// cond: uint32(x)<uint32(y)
  6615  	// result: (FlagLT)
  6616  	for {
  6617  		y := v.AuxInt
  6618  		v_0 := v.Args[0]
  6619  		if v_0.Op != OpPPC64MOVDconst {
  6620  			break
  6621  		}
  6622  		x := v_0.AuxInt
  6623  		if !(uint32(x) < uint32(y)) {
  6624  			break
  6625  		}
  6626  		v.reset(OpPPC64FlagLT)
  6627  		return true
  6628  	}
  6629  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6630  	// cond: uint32(x)>uint32(y)
  6631  	// result: (FlagGT)
  6632  	for {
  6633  		y := v.AuxInt
  6634  		v_0 := v.Args[0]
  6635  		if v_0.Op != OpPPC64MOVDconst {
  6636  			break
  6637  		}
  6638  		x := v_0.AuxInt
  6639  		if !(uint32(x) > uint32(y)) {
  6640  			break
  6641  		}
  6642  		v.reset(OpPPC64FlagGT)
  6643  		return true
  6644  	}
  6645  	return false
  6646  }
  6647  func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
  6648  	// match: (CMPWconst (MOVDconst [x]) [y])
  6649  	// cond: int32(x)==int32(y)
  6650  	// result: (FlagEQ)
  6651  	for {
  6652  		y := v.AuxInt
  6653  		v_0 := v.Args[0]
  6654  		if v_0.Op != OpPPC64MOVDconst {
  6655  			break
  6656  		}
  6657  		x := v_0.AuxInt
  6658  		if !(int32(x) == int32(y)) {
  6659  			break
  6660  		}
  6661  		v.reset(OpPPC64FlagEQ)
  6662  		return true
  6663  	}
  6664  	// match: (CMPWconst (MOVDconst [x]) [y])
  6665  	// cond: int32(x)<int32(y)
  6666  	// result: (FlagLT)
  6667  	for {
  6668  		y := v.AuxInt
  6669  		v_0 := v.Args[0]
  6670  		if v_0.Op != OpPPC64MOVDconst {
  6671  			break
  6672  		}
  6673  		x := v_0.AuxInt
  6674  		if !(int32(x) < int32(y)) {
  6675  			break
  6676  		}
  6677  		v.reset(OpPPC64FlagLT)
  6678  		return true
  6679  	}
  6680  	// match: (CMPWconst (MOVDconst [x]) [y])
  6681  	// cond: int32(x)>int32(y)
  6682  	// result: (FlagGT)
  6683  	for {
  6684  		y := v.AuxInt
  6685  		v_0 := v.Args[0]
  6686  		if v_0.Op != OpPPC64MOVDconst {
  6687  			break
  6688  		}
  6689  		x := v_0.AuxInt
  6690  		if !(int32(x) > int32(y)) {
  6691  			break
  6692  		}
  6693  		v.reset(OpPPC64FlagGT)
  6694  		return true
  6695  	}
  6696  	return false
  6697  }
  6698  func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
  6699  	// match: (CMPconst (MOVDconst [x]) [y])
  6700  	// cond: x==y
  6701  	// result: (FlagEQ)
  6702  	for {
  6703  		y := v.AuxInt
  6704  		v_0 := v.Args[0]
  6705  		if v_0.Op != OpPPC64MOVDconst {
  6706  			break
  6707  		}
  6708  		x := v_0.AuxInt
  6709  		if !(x == y) {
  6710  			break
  6711  		}
  6712  		v.reset(OpPPC64FlagEQ)
  6713  		return true
  6714  	}
  6715  	// match: (CMPconst (MOVDconst [x]) [y])
  6716  	// cond: x<y
  6717  	// result: (FlagLT)
  6718  	for {
  6719  		y := v.AuxInt
  6720  		v_0 := v.Args[0]
  6721  		if v_0.Op != OpPPC64MOVDconst {
  6722  			break
  6723  		}
  6724  		x := v_0.AuxInt
  6725  		if !(x < y) {
  6726  			break
  6727  		}
  6728  		v.reset(OpPPC64FlagLT)
  6729  		return true
  6730  	}
  6731  	// match: (CMPconst (MOVDconst [x]) [y])
  6732  	// cond: x>y
  6733  	// result: (FlagGT)
  6734  	for {
  6735  		y := v.AuxInt
  6736  		v_0 := v.Args[0]
  6737  		if v_0.Op != OpPPC64MOVDconst {
  6738  			break
  6739  		}
  6740  		x := v_0.AuxInt
  6741  		if !(x > y) {
  6742  			break
  6743  		}
  6744  		v.reset(OpPPC64FlagGT)
  6745  		return true
  6746  	}
  6747  	return false
  6748  }
  6749  func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
  6750  	// match: (Equal (FlagEQ))
  6751  	// cond:
  6752  	// result: (MOVDconst [1])
  6753  	for {
  6754  		v_0 := v.Args[0]
  6755  		if v_0.Op != OpPPC64FlagEQ {
  6756  			break
  6757  		}
  6758  		v.reset(OpPPC64MOVDconst)
  6759  		v.AuxInt = 1
  6760  		return true
  6761  	}
  6762  	// match: (Equal (FlagLT))
  6763  	// cond:
  6764  	// result: (MOVDconst [0])
  6765  	for {
  6766  		v_0 := v.Args[0]
  6767  		if v_0.Op != OpPPC64FlagLT {
  6768  			break
  6769  		}
  6770  		v.reset(OpPPC64MOVDconst)
  6771  		v.AuxInt = 0
  6772  		return true
  6773  	}
  6774  	// match: (Equal (FlagGT))
  6775  	// cond:
  6776  	// result: (MOVDconst [0])
  6777  	for {
  6778  		v_0 := v.Args[0]
  6779  		if v_0.Op != OpPPC64FlagGT {
  6780  			break
  6781  		}
  6782  		v.reset(OpPPC64MOVDconst)
  6783  		v.AuxInt = 0
  6784  		return true
  6785  	}
  6786  	// match: (Equal (InvertFlags x))
  6787  	// cond:
  6788  	// result: (Equal x)
  6789  	for {
  6790  		v_0 := v.Args[0]
  6791  		if v_0.Op != OpPPC64InvertFlags {
  6792  			break
  6793  		}
  6794  		x := v_0.Args[0]
  6795  		v.reset(OpPPC64Equal)
  6796  		v.AddArg(x)
  6797  		return true
  6798  	}
  6799  	return false
  6800  }
  6801  func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
  6802  	// match: (FABS (FMOVDconst [x]))
  6803  	// cond:
  6804  	// result: (FMOVDconst [auxFrom64F(math.Abs(auxTo64F(x)))])
  6805  	for {
  6806  		v_0 := v.Args[0]
  6807  		if v_0.Op != OpPPC64FMOVDconst {
  6808  			break
  6809  		}
  6810  		x := v_0.AuxInt
  6811  		v.reset(OpPPC64FMOVDconst)
  6812  		v.AuxInt = auxFrom64F(math.Abs(auxTo64F(x)))
  6813  		return true
  6814  	}
  6815  	return false
  6816  }
  6817  func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
  6818  	// match: (FADD (FMUL x y) z)
  6819  	// cond:
  6820  	// result: (FMADD x y z)
  6821  	for {
  6822  		_ = v.Args[1]
  6823  		v_0 := v.Args[0]
  6824  		if v_0.Op != OpPPC64FMUL {
  6825  			break
  6826  		}
  6827  		_ = v_0.Args[1]
  6828  		x := v_0.Args[0]
  6829  		y := v_0.Args[1]
  6830  		z := v.Args[1]
  6831  		v.reset(OpPPC64FMADD)
  6832  		v.AddArg(x)
  6833  		v.AddArg(y)
  6834  		v.AddArg(z)
  6835  		return true
  6836  	}
  6837  	// match: (FADD z (FMUL x y))
  6838  	// cond:
  6839  	// result: (FMADD x y z)
  6840  	for {
  6841  		_ = v.Args[1]
  6842  		z := v.Args[0]
  6843  		v_1 := v.Args[1]
  6844  		if v_1.Op != OpPPC64FMUL {
  6845  			break
  6846  		}
  6847  		_ = v_1.Args[1]
  6848  		x := v_1.Args[0]
  6849  		y := v_1.Args[1]
  6850  		v.reset(OpPPC64FMADD)
  6851  		v.AddArg(x)
  6852  		v.AddArg(y)
  6853  		v.AddArg(z)
  6854  		return true
  6855  	}
  6856  	return false
  6857  }
  6858  func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
  6859  	// match: (FADDS (FMULS x y) z)
  6860  	// cond:
  6861  	// result: (FMADDS x y z)
  6862  	for {
  6863  		_ = v.Args[1]
  6864  		v_0 := v.Args[0]
  6865  		if v_0.Op != OpPPC64FMULS {
  6866  			break
  6867  		}
  6868  		_ = v_0.Args[1]
  6869  		x := v_0.Args[0]
  6870  		y := v_0.Args[1]
  6871  		z := v.Args[1]
  6872  		v.reset(OpPPC64FMADDS)
  6873  		v.AddArg(x)
  6874  		v.AddArg(y)
  6875  		v.AddArg(z)
  6876  		return true
  6877  	}
  6878  	// match: (FADDS z (FMULS x y))
  6879  	// cond:
  6880  	// result: (FMADDS x y z)
  6881  	for {
  6882  		_ = v.Args[1]
  6883  		z := v.Args[0]
  6884  		v_1 := v.Args[1]
  6885  		if v_1.Op != OpPPC64FMULS {
  6886  			break
  6887  		}
  6888  		_ = v_1.Args[1]
  6889  		x := v_1.Args[0]
  6890  		y := v_1.Args[1]
  6891  		v.reset(OpPPC64FMADDS)
  6892  		v.AddArg(x)
  6893  		v.AddArg(y)
  6894  		v.AddArg(z)
  6895  		return true
  6896  	}
  6897  	return false
  6898  }
  6899  func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
  6900  	// match: (FCEIL (FMOVDconst [x]))
  6901  	// cond:
  6902  	// result: (FMOVDconst [auxFrom64F(math.Ceil(auxTo64F(x)))])
  6903  	for {
  6904  		v_0 := v.Args[0]
  6905  		if v_0.Op != OpPPC64FMOVDconst {
  6906  			break
  6907  		}
  6908  		x := v_0.AuxInt
  6909  		v.reset(OpPPC64FMOVDconst)
  6910  		v.AuxInt = auxFrom64F(math.Ceil(auxTo64F(x)))
  6911  		return true
  6912  	}
  6913  	return false
  6914  }
  6915  func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
  6916  	// match: (FFLOOR (FMOVDconst [x]))
  6917  	// cond:
  6918  	// result: (FMOVDconst [auxFrom64F(math.Floor(auxTo64F(x)))])
  6919  	for {
  6920  		v_0 := v.Args[0]
  6921  		if v_0.Op != OpPPC64FMOVDconst {
  6922  			break
  6923  		}
  6924  		x := v_0.AuxInt
  6925  		v.reset(OpPPC64FMOVDconst)
  6926  		v.AuxInt = auxFrom64F(math.Floor(auxTo64F(x)))
  6927  		return true
  6928  	}
  6929  	return false
  6930  }
  6931  func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
  6932  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
  6933  	// cond:
  6934  	// result: (MTVSRD x)
  6935  	for {
  6936  		off := v.AuxInt
  6937  		sym := v.Aux
  6938  		_ = v.Args[1]
  6939  		ptr := v.Args[0]
  6940  		v_1 := v.Args[1]
  6941  		if v_1.Op != OpPPC64MOVDstore {
  6942  			break
  6943  		}
  6944  		if v_1.AuxInt != off {
  6945  			break
  6946  		}
  6947  		if v_1.Aux != sym {
  6948  			break
  6949  		}
  6950  		_ = v_1.Args[2]
  6951  		if ptr != v_1.Args[0] {
  6952  			break
  6953  		}
  6954  		x := v_1.Args[1]
  6955  		v.reset(OpPPC64MTVSRD)
  6956  		v.AddArg(x)
  6957  		return true
  6958  	}
  6959  	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6960  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6961  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6962  	for {
  6963  		off1 := v.AuxInt
  6964  		sym1 := v.Aux
  6965  		_ = v.Args[1]
  6966  		p := v.Args[0]
  6967  		if p.Op != OpPPC64MOVDaddr {
  6968  			break
  6969  		}
  6970  		off2 := p.AuxInt
  6971  		sym2 := p.Aux
  6972  		ptr := p.Args[0]
  6973  		mem := v.Args[1]
  6974  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6975  			break
  6976  		}
  6977  		v.reset(OpPPC64FMOVDload)
  6978  		v.AuxInt = off1 + off2
  6979  		v.Aux = mergeSym(sym1, sym2)
  6980  		v.AddArg(ptr)
  6981  		v.AddArg(mem)
  6982  		return true
  6983  	}
  6984  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6985  	// cond: is16Bit(off1+off2)
  6986  	// result: (FMOVDload [off1+off2] {sym} ptr mem)
  6987  	for {
  6988  		off1 := v.AuxInt
  6989  		sym := v.Aux
  6990  		_ = v.Args[1]
  6991  		v_0 := v.Args[0]
  6992  		if v_0.Op != OpPPC64ADDconst {
  6993  			break
  6994  		}
  6995  		off2 := v_0.AuxInt
  6996  		ptr := v_0.Args[0]
  6997  		mem := v.Args[1]
  6998  		if !(is16Bit(off1 + off2)) {
  6999  			break
  7000  		}
  7001  		v.reset(OpPPC64FMOVDload)
  7002  		v.AuxInt = off1 + off2
  7003  		v.Aux = sym
  7004  		v.AddArg(ptr)
  7005  		v.AddArg(mem)
  7006  		return true
  7007  	}
  7008  	return false
  7009  }
  7010  func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
  7011  	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
  7012  	// cond:
  7013  	// result: (MOVDstore [off] {sym} ptr x mem)
  7014  	for {
  7015  		off := v.AuxInt
  7016  		sym := v.Aux
  7017  		_ = v.Args[2]
  7018  		ptr := v.Args[0]
  7019  		v_1 := v.Args[1]
  7020  		if v_1.Op != OpPPC64MTVSRD {
  7021  			break
  7022  		}
  7023  		x := v_1.Args[0]
  7024  		mem := v.Args[2]
  7025  		v.reset(OpPPC64MOVDstore)
  7026  		v.AuxInt = off
  7027  		v.Aux = sym
  7028  		v.AddArg(ptr)
  7029  		v.AddArg(x)
  7030  		v.AddArg(mem)
  7031  		return true
  7032  	}
  7033  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7034  	// cond: is16Bit(off1+off2)
  7035  	// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
  7036  	for {
  7037  		off1 := v.AuxInt
  7038  		sym := v.Aux
  7039  		_ = v.Args[2]
  7040  		v_0 := v.Args[0]
  7041  		if v_0.Op != OpPPC64ADDconst {
  7042  			break
  7043  		}
  7044  		off2 := v_0.AuxInt
  7045  		ptr := v_0.Args[0]
  7046  		val := v.Args[1]
  7047  		mem := v.Args[2]
  7048  		if !(is16Bit(off1 + off2)) {
  7049  			break
  7050  		}
  7051  		v.reset(OpPPC64FMOVDstore)
  7052  		v.AuxInt = off1 + off2
  7053  		v.Aux = sym
  7054  		v.AddArg(ptr)
  7055  		v.AddArg(val)
  7056  		v.AddArg(mem)
  7057  		return true
  7058  	}
  7059  	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7060  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7061  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7062  	for {
  7063  		off1 := v.AuxInt
  7064  		sym1 := v.Aux
  7065  		_ = v.Args[2]
  7066  		p := v.Args[0]
  7067  		if p.Op != OpPPC64MOVDaddr {
  7068  			break
  7069  		}
  7070  		off2 := p.AuxInt
  7071  		sym2 := p.Aux
  7072  		ptr := p.Args[0]
  7073  		val := v.Args[1]
  7074  		mem := v.Args[2]
  7075  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7076  			break
  7077  		}
  7078  		v.reset(OpPPC64FMOVDstore)
  7079  		v.AuxInt = off1 + off2
  7080  		v.Aux = mergeSym(sym1, sym2)
  7081  		v.AddArg(ptr)
  7082  		v.AddArg(val)
  7083  		v.AddArg(mem)
  7084  		return true
  7085  	}
  7086  	return false
  7087  }
  7088  func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
  7089  	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7090  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7091  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7092  	for {
  7093  		off1 := v.AuxInt
  7094  		sym1 := v.Aux
  7095  		_ = v.Args[1]
  7096  		p := v.Args[0]
  7097  		if p.Op != OpPPC64MOVDaddr {
  7098  			break
  7099  		}
  7100  		off2 := p.AuxInt
  7101  		sym2 := p.Aux
  7102  		ptr := p.Args[0]
  7103  		mem := v.Args[1]
  7104  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7105  			break
  7106  		}
  7107  		v.reset(OpPPC64FMOVSload)
  7108  		v.AuxInt = off1 + off2
  7109  		v.Aux = mergeSym(sym1, sym2)
  7110  		v.AddArg(ptr)
  7111  		v.AddArg(mem)
  7112  		return true
  7113  	}
  7114  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  7115  	// cond: is16Bit(off1+off2)
  7116  	// result: (FMOVSload [off1+off2] {sym} ptr mem)
  7117  	for {
  7118  		off1 := v.AuxInt
  7119  		sym := v.Aux
  7120  		_ = v.Args[1]
  7121  		v_0 := v.Args[0]
  7122  		if v_0.Op != OpPPC64ADDconst {
  7123  			break
  7124  		}
  7125  		off2 := v_0.AuxInt
  7126  		ptr := v_0.Args[0]
  7127  		mem := v.Args[1]
  7128  		if !(is16Bit(off1 + off2)) {
  7129  			break
  7130  		}
  7131  		v.reset(OpPPC64FMOVSload)
  7132  		v.AuxInt = off1 + off2
  7133  		v.Aux = sym
  7134  		v.AddArg(ptr)
  7135  		v.AddArg(mem)
  7136  		return true
  7137  	}
  7138  	return false
  7139  }
  7140  func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
  7141  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7142  	// cond: is16Bit(off1+off2)
  7143  	// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
  7144  	for {
  7145  		off1 := v.AuxInt
  7146  		sym := v.Aux
  7147  		_ = v.Args[2]
  7148  		v_0 := v.Args[0]
  7149  		if v_0.Op != OpPPC64ADDconst {
  7150  			break
  7151  		}
  7152  		off2 := v_0.AuxInt
  7153  		ptr := v_0.Args[0]
  7154  		val := v.Args[1]
  7155  		mem := v.Args[2]
  7156  		if !(is16Bit(off1 + off2)) {
  7157  			break
  7158  		}
  7159  		v.reset(OpPPC64FMOVSstore)
  7160  		v.AuxInt = off1 + off2
  7161  		v.Aux = sym
  7162  		v.AddArg(ptr)
  7163  		v.AddArg(val)
  7164  		v.AddArg(mem)
  7165  		return true
  7166  	}
  7167  	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7168  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7169  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7170  	for {
  7171  		off1 := v.AuxInt
  7172  		sym1 := v.Aux
  7173  		_ = v.Args[2]
  7174  		p := v.Args[0]
  7175  		if p.Op != OpPPC64MOVDaddr {
  7176  			break
  7177  		}
  7178  		off2 := p.AuxInt
  7179  		sym2 := p.Aux
  7180  		ptr := p.Args[0]
  7181  		val := v.Args[1]
  7182  		mem := v.Args[2]
  7183  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7184  			break
  7185  		}
  7186  		v.reset(OpPPC64FMOVSstore)
  7187  		v.AuxInt = off1 + off2
  7188  		v.Aux = mergeSym(sym1, sym2)
  7189  		v.AddArg(ptr)
  7190  		v.AddArg(val)
  7191  		v.AddArg(mem)
  7192  		return true
  7193  	}
  7194  	return false
  7195  }
  7196  func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
  7197  	// match: (FNEG (FABS x))
  7198  	// cond:
  7199  	// result: (FNABS x)
  7200  	for {
  7201  		v_0 := v.Args[0]
  7202  		if v_0.Op != OpPPC64FABS {
  7203  			break
  7204  		}
  7205  		x := v_0.Args[0]
  7206  		v.reset(OpPPC64FNABS)
  7207  		v.AddArg(x)
  7208  		return true
  7209  	}
  7210  	// match: (FNEG (FNABS x))
  7211  	// cond:
  7212  	// result: (FABS x)
  7213  	for {
  7214  		v_0 := v.Args[0]
  7215  		if v_0.Op != OpPPC64FNABS {
  7216  			break
  7217  		}
  7218  		x := v_0.Args[0]
  7219  		v.reset(OpPPC64FABS)
  7220  		v.AddArg(x)
  7221  		return true
  7222  	}
  7223  	return false
  7224  }
  7225  func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
  7226  	// match: (FSQRT (FMOVDconst [x]))
  7227  	// cond:
  7228  	// result: (FMOVDconst [auxFrom64F(math.Sqrt(auxTo64F(x)))])
  7229  	for {
  7230  		v_0 := v.Args[0]
  7231  		if v_0.Op != OpPPC64FMOVDconst {
  7232  			break
  7233  		}
  7234  		x := v_0.AuxInt
  7235  		v.reset(OpPPC64FMOVDconst)
  7236  		v.AuxInt = auxFrom64F(math.Sqrt(auxTo64F(x)))
  7237  		return true
  7238  	}
  7239  	return false
  7240  }
  7241  func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
  7242  	// match: (FSUB (FMUL x y) z)
  7243  	// cond:
  7244  	// result: (FMSUB x y z)
  7245  	for {
  7246  		_ = v.Args[1]
  7247  		v_0 := v.Args[0]
  7248  		if v_0.Op != OpPPC64FMUL {
  7249  			break
  7250  		}
  7251  		_ = v_0.Args[1]
  7252  		x := v_0.Args[0]
  7253  		y := v_0.Args[1]
  7254  		z := v.Args[1]
  7255  		v.reset(OpPPC64FMSUB)
  7256  		v.AddArg(x)
  7257  		v.AddArg(y)
  7258  		v.AddArg(z)
  7259  		return true
  7260  	}
  7261  	return false
  7262  }
  7263  func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
  7264  	// match: (FSUBS (FMULS x y) z)
  7265  	// cond:
  7266  	// result: (FMSUBS x y z)
  7267  	for {
  7268  		_ = v.Args[1]
  7269  		v_0 := v.Args[0]
  7270  		if v_0.Op != OpPPC64FMULS {
  7271  			break
  7272  		}
  7273  		_ = v_0.Args[1]
  7274  		x := v_0.Args[0]
  7275  		y := v_0.Args[1]
  7276  		z := v.Args[1]
  7277  		v.reset(OpPPC64FMSUBS)
  7278  		v.AddArg(x)
  7279  		v.AddArg(y)
  7280  		v.AddArg(z)
  7281  		return true
  7282  	}
  7283  	return false
  7284  }
  7285  func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
  7286  	// match: (FTRUNC (FMOVDconst [x]))
  7287  	// cond:
  7288  	// result: (FMOVDconst [auxFrom64F(math.Trunc(auxTo64F(x)))])
  7289  	for {
  7290  		v_0 := v.Args[0]
  7291  		if v_0.Op != OpPPC64FMOVDconst {
  7292  			break
  7293  		}
  7294  		x := v_0.AuxInt
  7295  		v.reset(OpPPC64FMOVDconst)
  7296  		v.AuxInt = auxFrom64F(math.Trunc(auxTo64F(x)))
  7297  		return true
  7298  	}
  7299  	return false
  7300  }
  7301  func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
  7302  	// match: (GreaterEqual (FlagEQ))
  7303  	// cond:
  7304  	// result: (MOVDconst [1])
  7305  	for {
  7306  		v_0 := v.Args[0]
  7307  		if v_0.Op != OpPPC64FlagEQ {
  7308  			break
  7309  		}
  7310  		v.reset(OpPPC64MOVDconst)
  7311  		v.AuxInt = 1
  7312  		return true
  7313  	}
  7314  	// match: (GreaterEqual (FlagLT))
  7315  	// cond:
  7316  	// result: (MOVDconst [0])
  7317  	for {
  7318  		v_0 := v.Args[0]
  7319  		if v_0.Op != OpPPC64FlagLT {
  7320  			break
  7321  		}
  7322  		v.reset(OpPPC64MOVDconst)
  7323  		v.AuxInt = 0
  7324  		return true
  7325  	}
  7326  	// match: (GreaterEqual (FlagGT))
  7327  	// cond:
  7328  	// result: (MOVDconst [1])
  7329  	for {
  7330  		v_0 := v.Args[0]
  7331  		if v_0.Op != OpPPC64FlagGT {
  7332  			break
  7333  		}
  7334  		v.reset(OpPPC64MOVDconst)
  7335  		v.AuxInt = 1
  7336  		return true
  7337  	}
  7338  	// match: (GreaterEqual (InvertFlags x))
  7339  	// cond:
  7340  	// result: (LessEqual x)
  7341  	for {
  7342  		v_0 := v.Args[0]
  7343  		if v_0.Op != OpPPC64InvertFlags {
  7344  			break
  7345  		}
  7346  		x := v_0.Args[0]
  7347  		v.reset(OpPPC64LessEqual)
  7348  		v.AddArg(x)
  7349  		return true
  7350  	}
  7351  	return false
  7352  }
  7353  func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
  7354  	// match: (GreaterThan (FlagEQ))
  7355  	// cond:
  7356  	// result: (MOVDconst [0])
  7357  	for {
  7358  		v_0 := v.Args[0]
  7359  		if v_0.Op != OpPPC64FlagEQ {
  7360  			break
  7361  		}
  7362  		v.reset(OpPPC64MOVDconst)
  7363  		v.AuxInt = 0
  7364  		return true
  7365  	}
  7366  	// match: (GreaterThan (FlagLT))
  7367  	// cond:
  7368  	// result: (MOVDconst [0])
  7369  	for {
  7370  		v_0 := v.Args[0]
  7371  		if v_0.Op != OpPPC64FlagLT {
  7372  			break
  7373  		}
  7374  		v.reset(OpPPC64MOVDconst)
  7375  		v.AuxInt = 0
  7376  		return true
  7377  	}
  7378  	// match: (GreaterThan (FlagGT))
  7379  	// cond:
  7380  	// result: (MOVDconst [1])
  7381  	for {
  7382  		v_0 := v.Args[0]
  7383  		if v_0.Op != OpPPC64FlagGT {
  7384  			break
  7385  		}
  7386  		v.reset(OpPPC64MOVDconst)
  7387  		v.AuxInt = 1
  7388  		return true
  7389  	}
  7390  	// match: (GreaterThan (InvertFlags x))
  7391  	// cond:
  7392  	// result: (LessThan x)
  7393  	for {
  7394  		v_0 := v.Args[0]
  7395  		if v_0.Op != OpPPC64InvertFlags {
  7396  			break
  7397  		}
  7398  		x := v_0.Args[0]
  7399  		v.reset(OpPPC64LessThan)
  7400  		v.AddArg(x)
  7401  		return true
  7402  	}
  7403  	return false
  7404  }
  7405  func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
  7406  	// match: (LessEqual (FlagEQ))
  7407  	// cond:
  7408  	// result: (MOVDconst [1])
  7409  	for {
  7410  		v_0 := v.Args[0]
  7411  		if v_0.Op != OpPPC64FlagEQ {
  7412  			break
  7413  		}
  7414  		v.reset(OpPPC64MOVDconst)
  7415  		v.AuxInt = 1
  7416  		return true
  7417  	}
  7418  	// match: (LessEqual (FlagLT))
  7419  	// cond:
  7420  	// result: (MOVDconst [1])
  7421  	for {
  7422  		v_0 := v.Args[0]
  7423  		if v_0.Op != OpPPC64FlagLT {
  7424  			break
  7425  		}
  7426  		v.reset(OpPPC64MOVDconst)
  7427  		v.AuxInt = 1
  7428  		return true
  7429  	}
  7430  	// match: (LessEqual (FlagGT))
  7431  	// cond:
  7432  	// result: (MOVDconst [0])
  7433  	for {
  7434  		v_0 := v.Args[0]
  7435  		if v_0.Op != OpPPC64FlagGT {
  7436  			break
  7437  		}
  7438  		v.reset(OpPPC64MOVDconst)
  7439  		v.AuxInt = 0
  7440  		return true
  7441  	}
  7442  	// match: (LessEqual (InvertFlags x))
  7443  	// cond:
  7444  	// result: (GreaterEqual x)
  7445  	for {
  7446  		v_0 := v.Args[0]
  7447  		if v_0.Op != OpPPC64InvertFlags {
  7448  			break
  7449  		}
  7450  		x := v_0.Args[0]
  7451  		v.reset(OpPPC64GreaterEqual)
  7452  		v.AddArg(x)
  7453  		return true
  7454  	}
  7455  	return false
  7456  }
  7457  func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
  7458  	// match: (LessThan (FlagEQ))
  7459  	// cond:
  7460  	// result: (MOVDconst [0])
  7461  	for {
  7462  		v_0 := v.Args[0]
  7463  		if v_0.Op != OpPPC64FlagEQ {
  7464  			break
  7465  		}
  7466  		v.reset(OpPPC64MOVDconst)
  7467  		v.AuxInt = 0
  7468  		return true
  7469  	}
  7470  	// match: (LessThan (FlagLT))
  7471  	// cond:
  7472  	// result: (MOVDconst [1])
  7473  	for {
  7474  		v_0 := v.Args[0]
  7475  		if v_0.Op != OpPPC64FlagLT {
  7476  			break
  7477  		}
  7478  		v.reset(OpPPC64MOVDconst)
  7479  		v.AuxInt = 1
  7480  		return true
  7481  	}
  7482  	// match: (LessThan (FlagGT))
  7483  	// cond:
  7484  	// result: (MOVDconst [0])
  7485  	for {
  7486  		v_0 := v.Args[0]
  7487  		if v_0.Op != OpPPC64FlagGT {
  7488  			break
  7489  		}
  7490  		v.reset(OpPPC64MOVDconst)
  7491  		v.AuxInt = 0
  7492  		return true
  7493  	}
  7494  	// match: (LessThan (InvertFlags x))
  7495  	// cond:
  7496  	// result: (GreaterThan x)
  7497  	for {
  7498  		v_0 := v.Args[0]
  7499  		if v_0.Op != OpPPC64InvertFlags {
  7500  			break
  7501  		}
  7502  		x := v_0.Args[0]
  7503  		v.reset(OpPPC64GreaterThan)
  7504  		v.AddArg(x)
  7505  		return true
  7506  	}
  7507  	return false
  7508  }
  7509  func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
  7510  	b := v.Block
  7511  	_ = b
  7512  	typ := &b.Func.Config.Types
  7513  	_ = typ
  7514  	// match: (MFVSRD (FMOVDconst [c]))
  7515  	// cond:
  7516  	// result: (MOVDconst [c])
  7517  	for {
  7518  		v_0 := v.Args[0]
  7519  		if v_0.Op != OpPPC64FMOVDconst {
  7520  			break
  7521  		}
  7522  		c := v_0.AuxInt
  7523  		v.reset(OpPPC64MOVDconst)
  7524  		v.AuxInt = c
  7525  		return true
  7526  	}
  7527  	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
  7528  	// cond: x.Uses == 1 && clobber(x)
  7529  	// result: @x.Block (MOVDload [off] {sym} ptr mem)
  7530  	for {
  7531  		x := v.Args[0]
  7532  		if x.Op != OpPPC64FMOVDload {
  7533  			break
  7534  		}
  7535  		off := x.AuxInt
  7536  		sym := x.Aux
  7537  		_ = x.Args[1]
  7538  		ptr := x.Args[0]
  7539  		mem := x.Args[1]
  7540  		if !(x.Uses == 1 && clobber(x)) {
  7541  			break
  7542  		}
  7543  		b = x.Block
  7544  		v0 := b.NewValue0(x.Pos, OpPPC64MOVDload, typ.Int64)
  7545  		v.reset(OpCopy)
  7546  		v.AddArg(v0)
  7547  		v0.AuxInt = off
  7548  		v0.Aux = sym
  7549  		v0.AddArg(ptr)
  7550  		v0.AddArg(mem)
  7551  		return true
  7552  	}
  7553  	return false
  7554  }
  7555  func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
  7556  	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7557  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7558  	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7559  	for {
  7560  		off1 := v.AuxInt
  7561  		sym1 := v.Aux
  7562  		_ = v.Args[1]
  7563  		p := v.Args[0]
  7564  		if p.Op != OpPPC64MOVDaddr {
  7565  			break
  7566  		}
  7567  		off2 := p.AuxInt
  7568  		sym2 := p.Aux
  7569  		ptr := p.Args[0]
  7570  		mem := v.Args[1]
  7571  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7572  			break
  7573  		}
  7574  		v.reset(OpPPC64MOVBZload)
  7575  		v.AuxInt = off1 + off2
  7576  		v.Aux = mergeSym(sym1, sym2)
  7577  		v.AddArg(ptr)
  7578  		v.AddArg(mem)
  7579  		return true
  7580  	}
  7581  	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
  7582  	// cond: is16Bit(off1+off2)
  7583  	// result: (MOVBZload [off1+off2] {sym} x mem)
  7584  	for {
  7585  		off1 := v.AuxInt
  7586  		sym := v.Aux
  7587  		_ = v.Args[1]
  7588  		v_0 := v.Args[0]
  7589  		if v_0.Op != OpPPC64ADDconst {
  7590  			break
  7591  		}
  7592  		off2 := v_0.AuxInt
  7593  		x := v_0.Args[0]
  7594  		mem := v.Args[1]
  7595  		if !(is16Bit(off1 + off2)) {
  7596  			break
  7597  		}
  7598  		v.reset(OpPPC64MOVBZload)
  7599  		v.AuxInt = off1 + off2
  7600  		v.Aux = sym
  7601  		v.AddArg(x)
  7602  		v.AddArg(mem)
  7603  		return true
  7604  	}
  7605  	// match: (MOVBZload [0] {sym} p:(ADD ptr idx) mem)
  7606  	// cond: sym == nil && p.Uses == 1
  7607  	// result: (MOVBZloadidx ptr idx mem)
  7608  	for {
  7609  		if v.AuxInt != 0 {
  7610  			break
  7611  		}
  7612  		sym := v.Aux
  7613  		_ = v.Args[1]
  7614  		p := v.Args[0]
  7615  		if p.Op != OpPPC64ADD {
  7616  			break
  7617  		}
  7618  		_ = p.Args[1]
  7619  		ptr := p.Args[0]
  7620  		idx := p.Args[1]
  7621  		mem := v.Args[1]
  7622  		if !(sym == nil && p.Uses == 1) {
  7623  			break
  7624  		}
  7625  		v.reset(OpPPC64MOVBZloadidx)
  7626  		v.AddArg(ptr)
  7627  		v.AddArg(idx)
  7628  		v.AddArg(mem)
  7629  		return true
  7630  	}
  7631  	return false
  7632  }
  7633  func rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v *Value) bool {
  7634  	// match: (MOVBZloadidx ptr (MOVDconst [c]) mem)
  7635  	// cond: is16Bit(c)
  7636  	// result: (MOVBZload [c] ptr mem)
  7637  	for {
  7638  		_ = v.Args[2]
  7639  		ptr := v.Args[0]
  7640  		v_1 := v.Args[1]
  7641  		if v_1.Op != OpPPC64MOVDconst {
  7642  			break
  7643  		}
  7644  		c := v_1.AuxInt
  7645  		mem := v.Args[2]
  7646  		if !(is16Bit(c)) {
  7647  			break
  7648  		}
  7649  		v.reset(OpPPC64MOVBZload)
  7650  		v.AuxInt = c
  7651  		v.AddArg(ptr)
  7652  		v.AddArg(mem)
  7653  		return true
  7654  	}
  7655  	// match: (MOVBZloadidx (MOVDconst [c]) ptr mem)
  7656  	// cond: is16Bit(c)
  7657  	// result: (MOVBZload [c] ptr mem)
  7658  	for {
  7659  		_ = v.Args[2]
  7660  		v_0 := v.Args[0]
  7661  		if v_0.Op != OpPPC64MOVDconst {
  7662  			break
  7663  		}
  7664  		c := v_0.AuxInt
  7665  		ptr := v.Args[1]
  7666  		mem := v.Args[2]
  7667  		if !(is16Bit(c)) {
  7668  			break
  7669  		}
  7670  		v.reset(OpPPC64MOVBZload)
  7671  		v.AuxInt = c
  7672  		v.AddArg(ptr)
  7673  		v.AddArg(mem)
  7674  		return true
  7675  	}
  7676  	return false
  7677  }
  7678  func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
  7679  	b := v.Block
  7680  	_ = b
  7681  	typ := &b.Func.Config.Types
  7682  	_ = typ
  7683  	// match: (MOVBZreg y:(ANDconst [c] _))
  7684  	// cond: uint64(c) <= 0xFF
  7685  	// result: y
  7686  	for {
  7687  		y := v.Args[0]
  7688  		if y.Op != OpPPC64ANDconst {
  7689  			break
  7690  		}
  7691  		c := y.AuxInt
  7692  		if !(uint64(c) <= 0xFF) {
  7693  			break
  7694  		}
  7695  		v.reset(OpCopy)
  7696  		v.Type = y.Type
  7697  		v.AddArg(y)
  7698  		return true
  7699  	}
  7700  	// match: (MOVBZreg (SRWconst [c] (MOVBZreg x)))
  7701  	// cond:
  7702  	// result: (SRWconst [c] (MOVBZreg x))
  7703  	for {
  7704  		v_0 := v.Args[0]
  7705  		if v_0.Op != OpPPC64SRWconst {
  7706  			break
  7707  		}
  7708  		c := v_0.AuxInt
  7709  		v_0_0 := v_0.Args[0]
  7710  		if v_0_0.Op != OpPPC64MOVBZreg {
  7711  			break
  7712  		}
  7713  		x := v_0_0.Args[0]
  7714  		v.reset(OpPPC64SRWconst)
  7715  		v.AuxInt = c
  7716  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  7717  		v0.AddArg(x)
  7718  		v.AddArg(v0)
  7719  		return true
  7720  	}
  7721  	// match: (MOVBZreg (SRWconst [c] x))
  7722  	// cond: sizeof(x.Type) == 8
  7723  	// result: (SRWconst [c] x)
  7724  	for {
  7725  		v_0 := v.Args[0]
  7726  		if v_0.Op != OpPPC64SRWconst {
  7727  			break
  7728  		}
  7729  		c := v_0.AuxInt
  7730  		x := v_0.Args[0]
  7731  		if !(sizeof(x.Type) == 8) {
  7732  			break
  7733  		}
  7734  		v.reset(OpPPC64SRWconst)
  7735  		v.AuxInt = c
  7736  		v.AddArg(x)
  7737  		return true
  7738  	}
  7739  	// match: (MOVBZreg (SRDconst [c] x))
  7740  	// cond: c>=56
  7741  	// result: (SRDconst [c] x)
  7742  	for {
  7743  		v_0 := v.Args[0]
  7744  		if v_0.Op != OpPPC64SRDconst {
  7745  			break
  7746  		}
  7747  		c := v_0.AuxInt
  7748  		x := v_0.Args[0]
  7749  		if !(c >= 56) {
  7750  			break
  7751  		}
  7752  		v.reset(OpPPC64SRDconst)
  7753  		v.AuxInt = c
  7754  		v.AddArg(x)
  7755  		return true
  7756  	}
  7757  	// match: (MOVBZreg (SRWconst [c] x))
  7758  	// cond: c>=24
  7759  	// result: (SRWconst [c] x)
  7760  	for {
  7761  		v_0 := v.Args[0]
  7762  		if v_0.Op != OpPPC64SRWconst {
  7763  			break
  7764  		}
  7765  		c := v_0.AuxInt
  7766  		x := v_0.Args[0]
  7767  		if !(c >= 24) {
  7768  			break
  7769  		}
  7770  		v.reset(OpPPC64SRWconst)
  7771  		v.AuxInt = c
  7772  		v.AddArg(x)
  7773  		return true
  7774  	}
  7775  	// match: (MOVBZreg y:(MOVBZreg _))
  7776  	// cond:
  7777  	// result: y
  7778  	for {
  7779  		y := v.Args[0]
  7780  		if y.Op != OpPPC64MOVBZreg {
  7781  			break
  7782  		}
  7783  		v.reset(OpCopy)
  7784  		v.Type = y.Type
  7785  		v.AddArg(y)
  7786  		return true
  7787  	}
  7788  	// match: (MOVBZreg (MOVBreg x))
  7789  	// cond:
  7790  	// result: (MOVBZreg x)
  7791  	for {
  7792  		v_0 := v.Args[0]
  7793  		if v_0.Op != OpPPC64MOVBreg {
  7794  			break
  7795  		}
  7796  		x := v_0.Args[0]
  7797  		v.reset(OpPPC64MOVBZreg)
  7798  		v.AddArg(x)
  7799  		return true
  7800  	}
  7801  	// match: (MOVBZreg x:(MOVBZload _ _))
  7802  	// cond:
  7803  	// result: x
  7804  	for {
  7805  		x := v.Args[0]
  7806  		if x.Op != OpPPC64MOVBZload {
  7807  			break
  7808  		}
  7809  		_ = x.Args[1]
  7810  		v.reset(OpCopy)
  7811  		v.Type = x.Type
  7812  		v.AddArg(x)
  7813  		return true
  7814  	}
  7815  	// match: (MOVBZreg x:(MOVBZloadidx _ _ _))
  7816  	// cond:
  7817  	// result: x
  7818  	for {
  7819  		x := v.Args[0]
  7820  		if x.Op != OpPPC64MOVBZloadidx {
  7821  			break
  7822  		}
  7823  		_ = x.Args[2]
  7824  		v.reset(OpCopy)
  7825  		v.Type = x.Type
  7826  		v.AddArg(x)
  7827  		return true
  7828  	}
  7829  	// match: (MOVBZreg x:(Arg <t>))
  7830  	// cond: is8BitInt(t) && !isSigned(t)
  7831  	// result: x
  7832  	for {
  7833  		x := v.Args[0]
  7834  		if x.Op != OpArg {
  7835  			break
  7836  		}
  7837  		t := x.Type
  7838  		if !(is8BitInt(t) && !isSigned(t)) {
  7839  			break
  7840  		}
  7841  		v.reset(OpCopy)
  7842  		v.Type = x.Type
  7843  		v.AddArg(x)
  7844  		return true
  7845  	}
  7846  	return false
  7847  }
  7848  func rewriteValuePPC64_OpPPC64MOVBZreg_10(v *Value) bool {
  7849  	// match: (MOVBZreg (MOVDconst [c]))
  7850  	// cond:
  7851  	// result: (MOVDconst [int64(uint8(c))])
  7852  	for {
  7853  		v_0 := v.Args[0]
  7854  		if v_0.Op != OpPPC64MOVDconst {
  7855  			break
  7856  		}
  7857  		c := v_0.AuxInt
  7858  		v.reset(OpPPC64MOVDconst)
  7859  		v.AuxInt = int64(uint8(c))
  7860  		return true
  7861  	}
  7862  	return false
  7863  }
  7864  func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
  7865  	b := v.Block
  7866  	_ = b
  7867  	typ := &b.Func.Config.Types
  7868  	_ = typ
  7869  	// match: (MOVBreg y:(ANDconst [c] _))
  7870  	// cond: uint64(c) <= 0x7F
  7871  	// result: y
  7872  	for {
  7873  		y := v.Args[0]
  7874  		if y.Op != OpPPC64ANDconst {
  7875  			break
  7876  		}
  7877  		c := y.AuxInt
  7878  		if !(uint64(c) <= 0x7F) {
  7879  			break
  7880  		}
  7881  		v.reset(OpCopy)
  7882  		v.Type = y.Type
  7883  		v.AddArg(y)
  7884  		return true
  7885  	}
  7886  	// match: (MOVBreg (SRAWconst [c] (MOVBreg x)))
  7887  	// cond:
  7888  	// result: (SRAWconst [c] (MOVBreg x))
  7889  	for {
  7890  		v_0 := v.Args[0]
  7891  		if v_0.Op != OpPPC64SRAWconst {
  7892  			break
  7893  		}
  7894  		c := v_0.AuxInt
  7895  		v_0_0 := v_0.Args[0]
  7896  		if v_0_0.Op != OpPPC64MOVBreg {
  7897  			break
  7898  		}
  7899  		x := v_0_0.Args[0]
  7900  		v.reset(OpPPC64SRAWconst)
  7901  		v.AuxInt = c
  7902  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
  7903  		v0.AddArg(x)
  7904  		v.AddArg(v0)
  7905  		return true
  7906  	}
  7907  	// match: (MOVBreg (SRAWconst [c] x))
  7908  	// cond: sizeof(x.Type) == 8
  7909  	// result: (SRAWconst [c] x)
  7910  	for {
  7911  		v_0 := v.Args[0]
  7912  		if v_0.Op != OpPPC64SRAWconst {
  7913  			break
  7914  		}
  7915  		c := v_0.AuxInt
  7916  		x := v_0.Args[0]
  7917  		if !(sizeof(x.Type) == 8) {
  7918  			break
  7919  		}
  7920  		v.reset(OpPPC64SRAWconst)
  7921  		v.AuxInt = c
  7922  		v.AddArg(x)
  7923  		return true
  7924  	}
  7925  	// match: (MOVBreg (SRDconst [c] x))
  7926  	// cond: c>56
  7927  	// result: (SRDconst [c] x)
  7928  	for {
  7929  		v_0 := v.Args[0]
  7930  		if v_0.Op != OpPPC64SRDconst {
  7931  			break
  7932  		}
  7933  		c := v_0.AuxInt
  7934  		x := v_0.Args[0]
  7935  		if !(c > 56) {
  7936  			break
  7937  		}
  7938  		v.reset(OpPPC64SRDconst)
  7939  		v.AuxInt = c
  7940  		v.AddArg(x)
  7941  		return true
  7942  	}
  7943  	// match: (MOVBreg (SRDconst [c] x))
  7944  	// cond: c==56
  7945  	// result: (SRADconst [c] x)
  7946  	for {
  7947  		v_0 := v.Args[0]
  7948  		if v_0.Op != OpPPC64SRDconst {
  7949  			break
  7950  		}
  7951  		c := v_0.AuxInt
  7952  		x := v_0.Args[0]
  7953  		if !(c == 56) {
  7954  			break
  7955  		}
  7956  		v.reset(OpPPC64SRADconst)
  7957  		v.AuxInt = c
  7958  		v.AddArg(x)
  7959  		return true
  7960  	}
  7961  	// match: (MOVBreg (SRWconst [c] x))
  7962  	// cond: c>24
  7963  	// result: (SRWconst [c] x)
  7964  	for {
  7965  		v_0 := v.Args[0]
  7966  		if v_0.Op != OpPPC64SRWconst {
  7967  			break
  7968  		}
  7969  		c := v_0.AuxInt
  7970  		x := v_0.Args[0]
  7971  		if !(c > 24) {
  7972  			break
  7973  		}
  7974  		v.reset(OpPPC64SRWconst)
  7975  		v.AuxInt = c
  7976  		v.AddArg(x)
  7977  		return true
  7978  	}
  7979  	// match: (MOVBreg (SRWconst [c] x))
  7980  	// cond: c==24
  7981  	// result: (SRAWconst [c] x)
  7982  	for {
  7983  		v_0 := v.Args[0]
  7984  		if v_0.Op != OpPPC64SRWconst {
  7985  			break
  7986  		}
  7987  		c := v_0.AuxInt
  7988  		x := v_0.Args[0]
  7989  		if !(c == 24) {
  7990  			break
  7991  		}
  7992  		v.reset(OpPPC64SRAWconst)
  7993  		v.AuxInt = c
  7994  		v.AddArg(x)
  7995  		return true
  7996  	}
  7997  	// match: (MOVBreg y:(MOVBreg _))
  7998  	// cond:
  7999  	// result: y
  8000  	for {
  8001  		y := v.Args[0]
  8002  		if y.Op != OpPPC64MOVBreg {
  8003  			break
  8004  		}
  8005  		v.reset(OpCopy)
  8006  		v.Type = y.Type
  8007  		v.AddArg(y)
  8008  		return true
  8009  	}
  8010  	// match: (MOVBreg (MOVBZreg x))
  8011  	// cond:
  8012  	// result: (MOVBreg x)
  8013  	for {
  8014  		v_0 := v.Args[0]
  8015  		if v_0.Op != OpPPC64MOVBZreg {
  8016  			break
  8017  		}
  8018  		x := v_0.Args[0]
  8019  		v.reset(OpPPC64MOVBreg)
  8020  		v.AddArg(x)
  8021  		return true
  8022  	}
  8023  	// match: (MOVBreg x:(Arg <t>))
  8024  	// cond: is8BitInt(t) && isSigned(t)
  8025  	// result: x
  8026  	for {
  8027  		x := v.Args[0]
  8028  		if x.Op != OpArg {
  8029  			break
  8030  		}
  8031  		t := x.Type
  8032  		if !(is8BitInt(t) && isSigned(t)) {
  8033  			break
  8034  		}
  8035  		v.reset(OpCopy)
  8036  		v.Type = x.Type
  8037  		v.AddArg(x)
  8038  		return true
  8039  	}
  8040  	return false
  8041  }
  8042  func rewriteValuePPC64_OpPPC64MOVBreg_10(v *Value) bool {
  8043  	// match: (MOVBreg (MOVDconst [c]))
  8044  	// cond:
  8045  	// result: (MOVDconst [int64(int8(c))])
  8046  	for {
  8047  		v_0 := v.Args[0]
  8048  		if v_0.Op != OpPPC64MOVDconst {
  8049  			break
  8050  		}
  8051  		c := v_0.AuxInt
  8052  		v.reset(OpPPC64MOVDconst)
  8053  		v.AuxInt = int64(int8(c))
  8054  		return true
  8055  	}
  8056  	return false
  8057  }
  8058  func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
  8059  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
  8060  	// cond: is16Bit(off1+off2)
  8061  	// result: (MOVBstore [off1+off2] {sym} x val mem)
  8062  	for {
  8063  		off1 := v.AuxInt
  8064  		sym := v.Aux
  8065  		_ = v.Args[2]
  8066  		v_0 := v.Args[0]
  8067  		if v_0.Op != OpPPC64ADDconst {
  8068  			break
  8069  		}
  8070  		off2 := v_0.AuxInt
  8071  		x := v_0.Args[0]
  8072  		val := v.Args[1]
  8073  		mem := v.Args[2]
  8074  		if !(is16Bit(off1 + off2)) {
  8075  			break
  8076  		}
  8077  		v.reset(OpPPC64MOVBstore)
  8078  		v.AuxInt = off1 + off2
  8079  		v.Aux = sym
  8080  		v.AddArg(x)
  8081  		v.AddArg(val)
  8082  		v.AddArg(mem)
  8083  		return true
  8084  	}
  8085  	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8086  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  8087  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8088  	for {
  8089  		off1 := v.AuxInt
  8090  		sym1 := v.Aux
  8091  		_ = v.Args[2]
  8092  		p := v.Args[0]
  8093  		if p.Op != OpPPC64MOVDaddr {
  8094  			break
  8095  		}
  8096  		off2 := p.AuxInt
  8097  		sym2 := p.Aux
  8098  		ptr := p.Args[0]
  8099  		val := v.Args[1]
  8100  		mem := v.Args[2]
  8101  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8102  			break
  8103  		}
  8104  		v.reset(OpPPC64MOVBstore)
  8105  		v.AuxInt = off1 + off2
  8106  		v.Aux = mergeSym(sym1, sym2)
  8107  		v.AddArg(ptr)
  8108  		v.AddArg(val)
  8109  		v.AddArg(mem)
  8110  		return true
  8111  	}
  8112  	// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
  8113  	// cond:
  8114  	// result: (MOVBstorezero [off] {sym} ptr mem)
  8115  	for {
  8116  		off := v.AuxInt
  8117  		sym := v.Aux
  8118  		_ = v.Args[2]
  8119  		ptr := v.Args[0]
  8120  		v_1 := v.Args[1]
  8121  		if v_1.Op != OpPPC64MOVDconst {
  8122  			break
  8123  		}
  8124  		if v_1.AuxInt != 0 {
  8125  			break
  8126  		}
  8127  		mem := v.Args[2]
  8128  		v.reset(OpPPC64MOVBstorezero)
  8129  		v.AuxInt = off
  8130  		v.Aux = sym
  8131  		v.AddArg(ptr)
  8132  		v.AddArg(mem)
  8133  		return true
  8134  	}
  8135  	// match: (MOVBstore [off] {sym} p:(ADD ptr idx) val mem)
  8136  	// cond: off == 0 && sym == nil && p.Uses == 1
  8137  	// result: (MOVBstoreidx ptr idx val mem)
  8138  	for {
  8139  		off := v.AuxInt
  8140  		sym := v.Aux
  8141  		_ = v.Args[2]
  8142  		p := v.Args[0]
  8143  		if p.Op != OpPPC64ADD {
  8144  			break
  8145  		}
  8146  		_ = p.Args[1]
  8147  		ptr := p.Args[0]
  8148  		idx := p.Args[1]
  8149  		val := v.Args[1]
  8150  		mem := v.Args[2]
  8151  		if !(off == 0 && sym == nil && p.Uses == 1) {
  8152  			break
  8153  		}
  8154  		v.reset(OpPPC64MOVBstoreidx)
  8155  		v.AddArg(ptr)
  8156  		v.AddArg(idx)
  8157  		v.AddArg(val)
  8158  		v.AddArg(mem)
  8159  		return true
  8160  	}
  8161  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  8162  	// cond:
  8163  	// result: (MOVBstore [off] {sym} ptr x mem)
  8164  	for {
  8165  		off := v.AuxInt
  8166  		sym := v.Aux
  8167  		_ = v.Args[2]
  8168  		ptr := v.Args[0]
  8169  		v_1 := v.Args[1]
  8170  		if v_1.Op != OpPPC64MOVBreg {
  8171  			break
  8172  		}
  8173  		x := v_1.Args[0]
  8174  		mem := v.Args[2]
  8175  		v.reset(OpPPC64MOVBstore)
  8176  		v.AuxInt = off
  8177  		v.Aux = sym
  8178  		v.AddArg(ptr)
  8179  		v.AddArg(x)
  8180  		v.AddArg(mem)
  8181  		return true
  8182  	}
  8183  	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
  8184  	// cond:
  8185  	// result: (MOVBstore [off] {sym} ptr x mem)
  8186  	for {
  8187  		off := v.AuxInt
  8188  		sym := v.Aux
  8189  		_ = v.Args[2]
  8190  		ptr := v.Args[0]
  8191  		v_1 := v.Args[1]
  8192  		if v_1.Op != OpPPC64MOVBZreg {
  8193  			break
  8194  		}
  8195  		x := v_1.Args[0]
  8196  		mem := v.Args[2]
  8197  		v.reset(OpPPC64MOVBstore)
  8198  		v.AuxInt = off
  8199  		v.Aux = sym
  8200  		v.AddArg(ptr)
  8201  		v.AddArg(x)
  8202  		v.AddArg(mem)
  8203  		return true
  8204  	}
  8205  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  8206  	// cond:
  8207  	// result: (MOVBstore [off] {sym} ptr x mem)
  8208  	for {
  8209  		off := v.AuxInt
  8210  		sym := v.Aux
  8211  		_ = v.Args[2]
  8212  		ptr := v.Args[0]
  8213  		v_1 := v.Args[1]
  8214  		if v_1.Op != OpPPC64MOVHreg {
  8215  			break
  8216  		}
  8217  		x := v_1.Args[0]
  8218  		mem := v.Args[2]
  8219  		v.reset(OpPPC64MOVBstore)
  8220  		v.AuxInt = off
  8221  		v.Aux = sym
  8222  		v.AddArg(ptr)
  8223  		v.AddArg(x)
  8224  		v.AddArg(mem)
  8225  		return true
  8226  	}
  8227  	// match: (MOVBstore [off] {sym} ptr (MOVHZreg x) mem)
  8228  	// cond:
  8229  	// result: (MOVBstore [off] {sym} ptr x mem)
  8230  	for {
  8231  		off := v.AuxInt
  8232  		sym := v.Aux
  8233  		_ = v.Args[2]
  8234  		ptr := v.Args[0]
  8235  		v_1 := v.Args[1]
  8236  		if v_1.Op != OpPPC64MOVHZreg {
  8237  			break
  8238  		}
  8239  		x := v_1.Args[0]
  8240  		mem := v.Args[2]
  8241  		v.reset(OpPPC64MOVBstore)
  8242  		v.AuxInt = off
  8243  		v.Aux = sym
  8244  		v.AddArg(ptr)
  8245  		v.AddArg(x)
  8246  		v.AddArg(mem)
  8247  		return true
  8248  	}
  8249  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  8250  	// cond:
  8251  	// result: (MOVBstore [off] {sym} ptr x mem)
  8252  	for {
  8253  		off := v.AuxInt
  8254  		sym := v.Aux
  8255  		_ = v.Args[2]
  8256  		ptr := v.Args[0]
  8257  		v_1 := v.Args[1]
  8258  		if v_1.Op != OpPPC64MOVWreg {
  8259  			break
  8260  		}
  8261  		x := v_1.Args[0]
  8262  		mem := v.Args[2]
  8263  		v.reset(OpPPC64MOVBstore)
  8264  		v.AuxInt = off
  8265  		v.Aux = sym
  8266  		v.AddArg(ptr)
  8267  		v.AddArg(x)
  8268  		v.AddArg(mem)
  8269  		return true
  8270  	}
  8271  	// match: (MOVBstore [off] {sym} ptr (MOVWZreg x) mem)
  8272  	// cond:
  8273  	// result: (MOVBstore [off] {sym} ptr x mem)
  8274  	for {
  8275  		off := v.AuxInt
  8276  		sym := v.Aux
  8277  		_ = v.Args[2]
  8278  		ptr := v.Args[0]
  8279  		v_1 := v.Args[1]
  8280  		if v_1.Op != OpPPC64MOVWZreg {
  8281  			break
  8282  		}
  8283  		x := v_1.Args[0]
  8284  		mem := v.Args[2]
  8285  		v.reset(OpPPC64MOVBstore)
  8286  		v.AuxInt = off
  8287  		v.Aux = sym
  8288  		v.AddArg(ptr)
  8289  		v.AddArg(x)
  8290  		v.AddArg(mem)
  8291  		return true
  8292  	}
  8293  	return false
  8294  }
  8295  func rewriteValuePPC64_OpPPC64MOVBstore_10(v *Value) bool {
  8296  	b := v.Block
  8297  	_ = b
  8298  	config := b.Func.Config
  8299  	_ = config
  8300  	typ := &b.Func.Config.Types
  8301  	_ = typ
  8302  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHreg x) [c]) mem)
  8303  	// cond: c <= 8
  8304  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8305  	for {
  8306  		off := v.AuxInt
  8307  		sym := v.Aux
  8308  		_ = v.Args[2]
  8309  		ptr := v.Args[0]
  8310  		v_1 := v.Args[1]
  8311  		if v_1.Op != OpPPC64SRWconst {
  8312  			break
  8313  		}
  8314  		c := v_1.AuxInt
  8315  		v_1_0 := v_1.Args[0]
  8316  		if v_1_0.Op != OpPPC64MOVHreg {
  8317  			break
  8318  		}
  8319  		x := v_1_0.Args[0]
  8320  		mem := v.Args[2]
  8321  		if !(c <= 8) {
  8322  			break
  8323  		}
  8324  		v.reset(OpPPC64MOVBstore)
  8325  		v.AuxInt = off
  8326  		v.Aux = sym
  8327  		v.AddArg(ptr)
  8328  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8329  		v0.AuxInt = c
  8330  		v0.AddArg(x)
  8331  		v.AddArg(v0)
  8332  		v.AddArg(mem)
  8333  		return true
  8334  	}
  8335  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHZreg x) [c]) mem)
  8336  	// cond: c <= 8
  8337  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8338  	for {
  8339  		off := v.AuxInt
  8340  		sym := v.Aux
  8341  		_ = v.Args[2]
  8342  		ptr := v.Args[0]
  8343  		v_1 := v.Args[1]
  8344  		if v_1.Op != OpPPC64SRWconst {
  8345  			break
  8346  		}
  8347  		c := v_1.AuxInt
  8348  		v_1_0 := v_1.Args[0]
  8349  		if v_1_0.Op != OpPPC64MOVHZreg {
  8350  			break
  8351  		}
  8352  		x := v_1_0.Args[0]
  8353  		mem := v.Args[2]
  8354  		if !(c <= 8) {
  8355  			break
  8356  		}
  8357  		v.reset(OpPPC64MOVBstore)
  8358  		v.AuxInt = off
  8359  		v.Aux = sym
  8360  		v.AddArg(ptr)
  8361  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8362  		v0.AuxInt = c
  8363  		v0.AddArg(x)
  8364  		v.AddArg(v0)
  8365  		v.AddArg(mem)
  8366  		return true
  8367  	}
  8368  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWreg x) [c]) mem)
  8369  	// cond: c <= 24
  8370  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8371  	for {
  8372  		off := v.AuxInt
  8373  		sym := v.Aux
  8374  		_ = v.Args[2]
  8375  		ptr := v.Args[0]
  8376  		v_1 := v.Args[1]
  8377  		if v_1.Op != OpPPC64SRWconst {
  8378  			break
  8379  		}
  8380  		c := v_1.AuxInt
  8381  		v_1_0 := v_1.Args[0]
  8382  		if v_1_0.Op != OpPPC64MOVWreg {
  8383  			break
  8384  		}
  8385  		x := v_1_0.Args[0]
  8386  		mem := v.Args[2]
  8387  		if !(c <= 24) {
  8388  			break
  8389  		}
  8390  		v.reset(OpPPC64MOVBstore)
  8391  		v.AuxInt = off
  8392  		v.Aux = sym
  8393  		v.AddArg(ptr)
  8394  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8395  		v0.AuxInt = c
  8396  		v0.AddArg(x)
  8397  		v.AddArg(v0)
  8398  		v.AddArg(mem)
  8399  		return true
  8400  	}
  8401  	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWZreg x) [c]) mem)
  8402  	// cond: c <= 24
  8403  	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8404  	for {
  8405  		off := v.AuxInt
  8406  		sym := v.Aux
  8407  		_ = v.Args[2]
  8408  		ptr := v.Args[0]
  8409  		v_1 := v.Args[1]
  8410  		if v_1.Op != OpPPC64SRWconst {
  8411  			break
  8412  		}
  8413  		c := v_1.AuxInt
  8414  		v_1_0 := v_1.Args[0]
  8415  		if v_1_0.Op != OpPPC64MOVWZreg {
  8416  			break
  8417  		}
  8418  		x := v_1_0.Args[0]
  8419  		mem := v.Args[2]
  8420  		if !(c <= 24) {
  8421  			break
  8422  		}
  8423  		v.reset(OpPPC64MOVBstore)
  8424  		v.AuxInt = off
  8425  		v.Aux = sym
  8426  		v.AddArg(ptr)
  8427  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8428  		v0.AuxInt = c
  8429  		v0.AddArg(x)
  8430  		v.AddArg(v0)
  8431  		v.AddArg(mem)
  8432  		return true
  8433  	}
  8434  	// match: (MOVBstore [i1] {s} p (SRWconst w [24]) x0:(MOVBstore [i0] {s} p (SRWconst w [16]) mem))
  8435  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8436  	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8437  	for {
  8438  		i1 := v.AuxInt
  8439  		s := v.Aux
  8440  		_ = v.Args[2]
  8441  		p := v.Args[0]
  8442  		v_1 := v.Args[1]
  8443  		if v_1.Op != OpPPC64SRWconst {
  8444  			break
  8445  		}
  8446  		if v_1.AuxInt != 24 {
  8447  			break
  8448  		}
  8449  		w := v_1.Args[0]
  8450  		x0 := v.Args[2]
  8451  		if x0.Op != OpPPC64MOVBstore {
  8452  			break
  8453  		}
  8454  		i0 := x0.AuxInt
  8455  		if x0.Aux != s {
  8456  			break
  8457  		}
  8458  		_ = x0.Args[2]
  8459  		if p != x0.Args[0] {
  8460  			break
  8461  		}
  8462  		x0_1 := x0.Args[1]
  8463  		if x0_1.Op != OpPPC64SRWconst {
  8464  			break
  8465  		}
  8466  		if x0_1.AuxInt != 16 {
  8467  			break
  8468  		}
  8469  		if w != x0_1.Args[0] {
  8470  			break
  8471  		}
  8472  		mem := x0.Args[2]
  8473  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8474  			break
  8475  		}
  8476  		v.reset(OpPPC64MOVHstore)
  8477  		v.AuxInt = i0
  8478  		v.Aux = s
  8479  		v.AddArg(p)
  8480  		v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
  8481  		v0.AuxInt = 16
  8482  		v0.AddArg(w)
  8483  		v.AddArg(v0)
  8484  		v.AddArg(mem)
  8485  		return true
  8486  	}
  8487  	// match: (MOVBstore [i1] {s} p (SRDconst w [24]) x0:(MOVBstore [i0] {s} p (SRDconst w [16]) mem))
  8488  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8489  	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8490  	for {
  8491  		i1 := v.AuxInt
  8492  		s := v.Aux
  8493  		_ = v.Args[2]
  8494  		p := v.Args[0]
  8495  		v_1 := v.Args[1]
  8496  		if v_1.Op != OpPPC64SRDconst {
  8497  			break
  8498  		}
  8499  		if v_1.AuxInt != 24 {
  8500  			break
  8501  		}
  8502  		w := v_1.Args[0]
  8503  		x0 := v.Args[2]
  8504  		if x0.Op != OpPPC64MOVBstore {
  8505  			break
  8506  		}
  8507  		i0 := x0.AuxInt
  8508  		if x0.Aux != s {
  8509  			break
  8510  		}
  8511  		_ = x0.Args[2]
  8512  		if p != x0.Args[0] {
  8513  			break
  8514  		}
  8515  		x0_1 := x0.Args[1]
  8516  		if x0_1.Op != OpPPC64SRDconst {
  8517  			break
  8518  		}
  8519  		if x0_1.AuxInt != 16 {
  8520  			break
  8521  		}
  8522  		if w != x0_1.Args[0] {
  8523  			break
  8524  		}
  8525  		mem := x0.Args[2]
  8526  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8527  			break
  8528  		}
  8529  		v.reset(OpPPC64MOVHstore)
  8530  		v.AuxInt = i0
  8531  		v.Aux = s
  8532  		v.AddArg(p)
  8533  		v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
  8534  		v0.AuxInt = 16
  8535  		v0.AddArg(w)
  8536  		v.AddArg(v0)
  8537  		v.AddArg(mem)
  8538  		return true
  8539  	}
  8540  	// match: (MOVBstore [i1] {s} p (SRWconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8541  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8542  	// result: (MOVHstore [i0] {s} p w mem)
  8543  	for {
  8544  		i1 := v.AuxInt
  8545  		s := v.Aux
  8546  		_ = v.Args[2]
  8547  		p := v.Args[0]
  8548  		v_1 := v.Args[1]
  8549  		if v_1.Op != OpPPC64SRWconst {
  8550  			break
  8551  		}
  8552  		if v_1.AuxInt != 8 {
  8553  			break
  8554  		}
  8555  		w := v_1.Args[0]
  8556  		x0 := v.Args[2]
  8557  		if x0.Op != OpPPC64MOVBstore {
  8558  			break
  8559  		}
  8560  		i0 := x0.AuxInt
  8561  		if x0.Aux != s {
  8562  			break
  8563  		}
  8564  		_ = x0.Args[2]
  8565  		if p != x0.Args[0] {
  8566  			break
  8567  		}
  8568  		if w != x0.Args[1] {
  8569  			break
  8570  		}
  8571  		mem := x0.Args[2]
  8572  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8573  			break
  8574  		}
  8575  		v.reset(OpPPC64MOVHstore)
  8576  		v.AuxInt = i0
  8577  		v.Aux = s
  8578  		v.AddArg(p)
  8579  		v.AddArg(w)
  8580  		v.AddArg(mem)
  8581  		return true
  8582  	}
  8583  	// match: (MOVBstore [i1] {s} p (SRDconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8584  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8585  	// result: (MOVHstore [i0] {s} p w mem)
  8586  	for {
  8587  		i1 := v.AuxInt
  8588  		s := v.Aux
  8589  		_ = v.Args[2]
  8590  		p := v.Args[0]
  8591  		v_1 := v.Args[1]
  8592  		if v_1.Op != OpPPC64SRDconst {
  8593  			break
  8594  		}
  8595  		if v_1.AuxInt != 8 {
  8596  			break
  8597  		}
  8598  		w := v_1.Args[0]
  8599  		x0 := v.Args[2]
  8600  		if x0.Op != OpPPC64MOVBstore {
  8601  			break
  8602  		}
  8603  		i0 := x0.AuxInt
  8604  		if x0.Aux != s {
  8605  			break
  8606  		}
  8607  		_ = x0.Args[2]
  8608  		if p != x0.Args[0] {
  8609  			break
  8610  		}
  8611  		if w != x0.Args[1] {
  8612  			break
  8613  		}
  8614  		mem := x0.Args[2]
  8615  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8616  			break
  8617  		}
  8618  		v.reset(OpPPC64MOVHstore)
  8619  		v.AuxInt = i0
  8620  		v.Aux = s
  8621  		v.AddArg(p)
  8622  		v.AddArg(w)
  8623  		v.AddArg(mem)
  8624  		return true
  8625  	}
  8626  	// match: (MOVBstore [i3] {s} p w x0:(MOVBstore [i2] {s} p (SRWconst w [8]) x1:(MOVBstore [i1] {s} p (SRWconst w [16]) x2:(MOVBstore [i0] {s} p (SRWconst w [24]) mem))))
  8627  	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)
  8628  	// result: (MOVWBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8629  	for {
  8630  		i3 := v.AuxInt
  8631  		s := v.Aux
  8632  		_ = v.Args[2]
  8633  		p := v.Args[0]
  8634  		w := v.Args[1]
  8635  		x0 := v.Args[2]
  8636  		if x0.Op != OpPPC64MOVBstore {
  8637  			break
  8638  		}
  8639  		i2 := x0.AuxInt
  8640  		if x0.Aux != s {
  8641  			break
  8642  		}
  8643  		_ = x0.Args[2]
  8644  		if p != x0.Args[0] {
  8645  			break
  8646  		}
  8647  		x0_1 := x0.Args[1]
  8648  		if x0_1.Op != OpPPC64SRWconst {
  8649  			break
  8650  		}
  8651  		if x0_1.AuxInt != 8 {
  8652  			break
  8653  		}
  8654  		if w != x0_1.Args[0] {
  8655  			break
  8656  		}
  8657  		x1 := x0.Args[2]
  8658  		if x1.Op != OpPPC64MOVBstore {
  8659  			break
  8660  		}
  8661  		i1 := x1.AuxInt
  8662  		if x1.Aux != s {
  8663  			break
  8664  		}
  8665  		_ = x1.Args[2]
  8666  		if p != x1.Args[0] {
  8667  			break
  8668  		}
  8669  		x1_1 := x1.Args[1]
  8670  		if x1_1.Op != OpPPC64SRWconst {
  8671  			break
  8672  		}
  8673  		if x1_1.AuxInt != 16 {
  8674  			break
  8675  		}
  8676  		if w != x1_1.Args[0] {
  8677  			break
  8678  		}
  8679  		x2 := x1.Args[2]
  8680  		if x2.Op != OpPPC64MOVBstore {
  8681  			break
  8682  		}
  8683  		i0 := x2.AuxInt
  8684  		if x2.Aux != s {
  8685  			break
  8686  		}
  8687  		_ = x2.Args[2]
  8688  		if p != x2.Args[0] {
  8689  			break
  8690  		}
  8691  		x2_1 := x2.Args[1]
  8692  		if x2_1.Op != OpPPC64SRWconst {
  8693  			break
  8694  		}
  8695  		if x2_1.AuxInt != 24 {
  8696  			break
  8697  		}
  8698  		if w != x2_1.Args[0] {
  8699  			break
  8700  		}
  8701  		mem := x2.Args[2]
  8702  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
  8703  			break
  8704  		}
  8705  		v.reset(OpPPC64MOVWBRstore)
  8706  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8707  		v0.AuxInt = i0
  8708  		v0.Aux = s
  8709  		v0.AddArg(p)
  8710  		v.AddArg(v0)
  8711  		v.AddArg(w)
  8712  		v.AddArg(mem)
  8713  		return true
  8714  	}
  8715  	// match: (MOVBstore [i1] {s} p w x0:(MOVBstore [i0] {s} p (SRWconst w [8]) mem))
  8716  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8717  	// result: (MOVHBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8718  	for {
  8719  		i1 := v.AuxInt
  8720  		s := v.Aux
  8721  		_ = v.Args[2]
  8722  		p := v.Args[0]
  8723  		w := v.Args[1]
  8724  		x0 := v.Args[2]
  8725  		if x0.Op != OpPPC64MOVBstore {
  8726  			break
  8727  		}
  8728  		i0 := x0.AuxInt
  8729  		if x0.Aux != s {
  8730  			break
  8731  		}
  8732  		_ = x0.Args[2]
  8733  		if p != x0.Args[0] {
  8734  			break
  8735  		}
  8736  		x0_1 := x0.Args[1]
  8737  		if x0_1.Op != OpPPC64SRWconst {
  8738  			break
  8739  		}
  8740  		if x0_1.AuxInt != 8 {
  8741  			break
  8742  		}
  8743  		if w != x0_1.Args[0] {
  8744  			break
  8745  		}
  8746  		mem := x0.Args[2]
  8747  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8748  			break
  8749  		}
  8750  		v.reset(OpPPC64MOVHBRstore)
  8751  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8752  		v0.AuxInt = i0
  8753  		v0.Aux = s
  8754  		v0.AddArg(p)
  8755  		v.AddArg(v0)
  8756  		v.AddArg(w)
  8757  		v.AddArg(mem)
  8758  		return true
  8759  	}
  8760  	return false
  8761  }
  8762  func rewriteValuePPC64_OpPPC64MOVBstore_20(v *Value) bool {
  8763  	b := v.Block
  8764  	_ = b
  8765  	config := b.Func.Config
  8766  	_ = config
  8767  	typ := &b.Func.Config.Types
  8768  	_ = typ
  8769  	// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVWstore [i0] {s} p w mem)))))
  8770  	// cond: !config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)
  8771  	// result: (MOVDstore [i0] {s} p w mem)
  8772  	for {
  8773  		i7 := v.AuxInt
  8774  		s := v.Aux
  8775  		_ = v.Args[2]
  8776  		p := v.Args[0]
  8777  		v_1 := v.Args[1]
  8778  		if v_1.Op != OpPPC64SRDconst {
  8779  			break
  8780  		}
  8781  		if v_1.AuxInt != 56 {
  8782  			break
  8783  		}
  8784  		w := v_1.Args[0]
  8785  		x0 := v.Args[2]
  8786  		if x0.Op != OpPPC64MOVBstore {
  8787  			break
  8788  		}
  8789  		i6 := x0.AuxInt
  8790  		if x0.Aux != s {
  8791  			break
  8792  		}
  8793  		_ = x0.Args[2]
  8794  		if p != x0.Args[0] {
  8795  			break
  8796  		}
  8797  		x0_1 := x0.Args[1]
  8798  		if x0_1.Op != OpPPC64SRDconst {
  8799  			break
  8800  		}
  8801  		if x0_1.AuxInt != 48 {
  8802  			break
  8803  		}
  8804  		if w != x0_1.Args[0] {
  8805  			break
  8806  		}
  8807  		x1 := x0.Args[2]
  8808  		if x1.Op != OpPPC64MOVBstore {
  8809  			break
  8810  		}
  8811  		i5 := x1.AuxInt
  8812  		if x1.Aux != s {
  8813  			break
  8814  		}
  8815  		_ = x1.Args[2]
  8816  		if p != x1.Args[0] {
  8817  			break
  8818  		}
  8819  		x1_1 := x1.Args[1]
  8820  		if x1_1.Op != OpPPC64SRDconst {
  8821  			break
  8822  		}
  8823  		if x1_1.AuxInt != 40 {
  8824  			break
  8825  		}
  8826  		if w != x1_1.Args[0] {
  8827  			break
  8828  		}
  8829  		x2 := x1.Args[2]
  8830  		if x2.Op != OpPPC64MOVBstore {
  8831  			break
  8832  		}
  8833  		i4 := x2.AuxInt
  8834  		if x2.Aux != s {
  8835  			break
  8836  		}
  8837  		_ = x2.Args[2]
  8838  		if p != x2.Args[0] {
  8839  			break
  8840  		}
  8841  		x2_1 := x2.Args[1]
  8842  		if x2_1.Op != OpPPC64SRDconst {
  8843  			break
  8844  		}
  8845  		if x2_1.AuxInt != 32 {
  8846  			break
  8847  		}
  8848  		if w != x2_1.Args[0] {
  8849  			break
  8850  		}
  8851  		x3 := x2.Args[2]
  8852  		if x3.Op != OpPPC64MOVWstore {
  8853  			break
  8854  		}
  8855  		i0 := x3.AuxInt
  8856  		if x3.Aux != s {
  8857  			break
  8858  		}
  8859  		_ = x3.Args[2]
  8860  		if p != x3.Args[0] {
  8861  			break
  8862  		}
  8863  		if w != x3.Args[1] {
  8864  			break
  8865  		}
  8866  		mem := x3.Args[2]
  8867  		if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)) {
  8868  			break
  8869  		}
  8870  		v.reset(OpPPC64MOVDstore)
  8871  		v.AuxInt = i0
  8872  		v.Aux = s
  8873  		v.AddArg(p)
  8874  		v.AddArg(w)
  8875  		v.AddArg(mem)
  8876  		return true
  8877  	}
  8878  	// match: (MOVBstore [i7] {s} p w x0:(MOVBstore [i6] {s} p (SRDconst w [8]) x1:(MOVBstore [i5] {s} p (SRDconst w [16]) x2:(MOVBstore [i4] {s} p (SRDconst w [24]) x3:(MOVBstore [i3] {s} p (SRDconst w [32]) x4:(MOVBstore [i2] {s} p (SRDconst w [40]) x5:(MOVBstore [i1] {s} p (SRDconst w [48]) x6:(MOVBstore [i0] {s} p (SRDconst w [56]) mem))))))))
  8879  	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
  8880  	// result: (MOVDBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8881  	for {
  8882  		i7 := v.AuxInt
  8883  		s := v.Aux
  8884  		_ = v.Args[2]
  8885  		p := v.Args[0]
  8886  		w := v.Args[1]
  8887  		x0 := v.Args[2]
  8888  		if x0.Op != OpPPC64MOVBstore {
  8889  			break
  8890  		}
  8891  		i6 := x0.AuxInt
  8892  		if x0.Aux != s {
  8893  			break
  8894  		}
  8895  		_ = x0.Args[2]
  8896  		if p != x0.Args[0] {
  8897  			break
  8898  		}
  8899  		x0_1 := x0.Args[1]
  8900  		if x0_1.Op != OpPPC64SRDconst {
  8901  			break
  8902  		}
  8903  		if x0_1.AuxInt != 8 {
  8904  			break
  8905  		}
  8906  		if w != x0_1.Args[0] {
  8907  			break
  8908  		}
  8909  		x1 := x0.Args[2]
  8910  		if x1.Op != OpPPC64MOVBstore {
  8911  			break
  8912  		}
  8913  		i5 := x1.AuxInt
  8914  		if x1.Aux != s {
  8915  			break
  8916  		}
  8917  		_ = x1.Args[2]
  8918  		if p != x1.Args[0] {
  8919  			break
  8920  		}
  8921  		x1_1 := x1.Args[1]
  8922  		if x1_1.Op != OpPPC64SRDconst {
  8923  			break
  8924  		}
  8925  		if x1_1.AuxInt != 16 {
  8926  			break
  8927  		}
  8928  		if w != x1_1.Args[0] {
  8929  			break
  8930  		}
  8931  		x2 := x1.Args[2]
  8932  		if x2.Op != OpPPC64MOVBstore {
  8933  			break
  8934  		}
  8935  		i4 := x2.AuxInt
  8936  		if x2.Aux != s {
  8937  			break
  8938  		}
  8939  		_ = x2.Args[2]
  8940  		if p != x2.Args[0] {
  8941  			break
  8942  		}
  8943  		x2_1 := x2.Args[1]
  8944  		if x2_1.Op != OpPPC64SRDconst {
  8945  			break
  8946  		}
  8947  		if x2_1.AuxInt != 24 {
  8948  			break
  8949  		}
  8950  		if w != x2_1.Args[0] {
  8951  			break
  8952  		}
  8953  		x3 := x2.Args[2]
  8954  		if x3.Op != OpPPC64MOVBstore {
  8955  			break
  8956  		}
  8957  		i3 := x3.AuxInt
  8958  		if x3.Aux != s {
  8959  			break
  8960  		}
  8961  		_ = x3.Args[2]
  8962  		if p != x3.Args[0] {
  8963  			break
  8964  		}
  8965  		x3_1 := x3.Args[1]
  8966  		if x3_1.Op != OpPPC64SRDconst {
  8967  			break
  8968  		}
  8969  		if x3_1.AuxInt != 32 {
  8970  			break
  8971  		}
  8972  		if w != x3_1.Args[0] {
  8973  			break
  8974  		}
  8975  		x4 := x3.Args[2]
  8976  		if x4.Op != OpPPC64MOVBstore {
  8977  			break
  8978  		}
  8979  		i2 := x4.AuxInt
  8980  		if x4.Aux != s {
  8981  			break
  8982  		}
  8983  		_ = x4.Args[2]
  8984  		if p != x4.Args[0] {
  8985  			break
  8986  		}
  8987  		x4_1 := x4.Args[1]
  8988  		if x4_1.Op != OpPPC64SRDconst {
  8989  			break
  8990  		}
  8991  		if x4_1.AuxInt != 40 {
  8992  			break
  8993  		}
  8994  		if w != x4_1.Args[0] {
  8995  			break
  8996  		}
  8997  		x5 := x4.Args[2]
  8998  		if x5.Op != OpPPC64MOVBstore {
  8999  			break
  9000  		}
  9001  		i1 := x5.AuxInt
  9002  		if x5.Aux != s {
  9003  			break
  9004  		}
  9005  		_ = x5.Args[2]
  9006  		if p != x5.Args[0] {
  9007  			break
  9008  		}
  9009  		x5_1 := x5.Args[1]
  9010  		if x5_1.Op != OpPPC64SRDconst {
  9011  			break
  9012  		}
  9013  		if x5_1.AuxInt != 48 {
  9014  			break
  9015  		}
  9016  		if w != x5_1.Args[0] {
  9017  			break
  9018  		}
  9019  		x6 := x5.Args[2]
  9020  		if x6.Op != OpPPC64MOVBstore {
  9021  			break
  9022  		}
  9023  		i0 := x6.AuxInt
  9024  		if x6.Aux != s {
  9025  			break
  9026  		}
  9027  		_ = x6.Args[2]
  9028  		if p != x6.Args[0] {
  9029  			break
  9030  		}
  9031  		x6_1 := x6.Args[1]
  9032  		if x6_1.Op != OpPPC64SRDconst {
  9033  			break
  9034  		}
  9035  		if x6_1.AuxInt != 56 {
  9036  			break
  9037  		}
  9038  		if w != x6_1.Args[0] {
  9039  			break
  9040  		}
  9041  		mem := x6.Args[2]
  9042  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
  9043  			break
  9044  		}
  9045  		v.reset(OpPPC64MOVDBRstore)
  9046  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  9047  		v0.AuxInt = i0
  9048  		v0.Aux = s
  9049  		v0.AddArg(p)
  9050  		v.AddArg(v0)
  9051  		v.AddArg(w)
  9052  		v.AddArg(mem)
  9053  		return true
  9054  	}
  9055  	return false
  9056  }
  9057  func rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v *Value) bool {
  9058  	b := v.Block
  9059  	_ = b
  9060  	typ := &b.Func.Config.Types
  9061  	_ = typ
  9062  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
  9063  	// cond: is16Bit(c)
  9064  	// result: (MOVBstore [c] ptr val mem)
  9065  	for {
  9066  		_ = v.Args[3]
  9067  		ptr := v.Args[0]
  9068  		v_1 := v.Args[1]
  9069  		if v_1.Op != OpPPC64MOVDconst {
  9070  			break
  9071  		}
  9072  		c := v_1.AuxInt
  9073  		val := v.Args[2]
  9074  		mem := v.Args[3]
  9075  		if !(is16Bit(c)) {
  9076  			break
  9077  		}
  9078  		v.reset(OpPPC64MOVBstore)
  9079  		v.AuxInt = c
  9080  		v.AddArg(ptr)
  9081  		v.AddArg(val)
  9082  		v.AddArg(mem)
  9083  		return true
  9084  	}
  9085  	// match: (MOVBstoreidx (MOVDconst [c]) ptr val mem)
  9086  	// cond: is16Bit(c)
  9087  	// result: (MOVBstore [c] ptr val mem)
  9088  	for {
  9089  		_ = v.Args[3]
  9090  		v_0 := v.Args[0]
  9091  		if v_0.Op != OpPPC64MOVDconst {
  9092  			break
  9093  		}
  9094  		c := v_0.AuxInt
  9095  		ptr := v.Args[1]
  9096  		val := v.Args[2]
  9097  		mem := v.Args[3]
  9098  		if !(is16Bit(c)) {
  9099  			break
  9100  		}
  9101  		v.reset(OpPPC64MOVBstore)
  9102  		v.AuxInt = c
  9103  		v.AddArg(ptr)
  9104  		v.AddArg(val)
  9105  		v.AddArg(mem)
  9106  		return true
  9107  	}
  9108  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBreg x) mem)
  9109  	// cond:
  9110  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9111  	for {
  9112  		off := v.AuxInt
  9113  		sym := v.Aux
  9114  		_ = v.Args[3]
  9115  		ptr := v.Args[0]
  9116  		idx := v.Args[1]
  9117  		v_2 := v.Args[2]
  9118  		if v_2.Op != OpPPC64MOVBreg {
  9119  			break
  9120  		}
  9121  		x := v_2.Args[0]
  9122  		mem := v.Args[3]
  9123  		v.reset(OpPPC64MOVBstoreidx)
  9124  		v.AuxInt = off
  9125  		v.Aux = sym
  9126  		v.AddArg(ptr)
  9127  		v.AddArg(idx)
  9128  		v.AddArg(x)
  9129  		v.AddArg(mem)
  9130  		return true
  9131  	}
  9132  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBZreg x) mem)
  9133  	// cond:
  9134  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9135  	for {
  9136  		off := v.AuxInt
  9137  		sym := v.Aux
  9138  		_ = v.Args[3]
  9139  		ptr := v.Args[0]
  9140  		idx := v.Args[1]
  9141  		v_2 := v.Args[2]
  9142  		if v_2.Op != OpPPC64MOVBZreg {
  9143  			break
  9144  		}
  9145  		x := v_2.Args[0]
  9146  		mem := v.Args[3]
  9147  		v.reset(OpPPC64MOVBstoreidx)
  9148  		v.AuxInt = off
  9149  		v.Aux = sym
  9150  		v.AddArg(ptr)
  9151  		v.AddArg(idx)
  9152  		v.AddArg(x)
  9153  		v.AddArg(mem)
  9154  		return true
  9155  	}
  9156  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
  9157  	// cond:
  9158  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9159  	for {
  9160  		off := v.AuxInt
  9161  		sym := v.Aux
  9162  		_ = v.Args[3]
  9163  		ptr := v.Args[0]
  9164  		idx := v.Args[1]
  9165  		v_2 := v.Args[2]
  9166  		if v_2.Op != OpPPC64MOVHreg {
  9167  			break
  9168  		}
  9169  		x := v_2.Args[0]
  9170  		mem := v.Args[3]
  9171  		v.reset(OpPPC64MOVBstoreidx)
  9172  		v.AuxInt = off
  9173  		v.Aux = sym
  9174  		v.AddArg(ptr)
  9175  		v.AddArg(idx)
  9176  		v.AddArg(x)
  9177  		v.AddArg(mem)
  9178  		return true
  9179  	}
  9180  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
  9181  	// cond:
  9182  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9183  	for {
  9184  		off := v.AuxInt
  9185  		sym := v.Aux
  9186  		_ = v.Args[3]
  9187  		ptr := v.Args[0]
  9188  		idx := v.Args[1]
  9189  		v_2 := v.Args[2]
  9190  		if v_2.Op != OpPPC64MOVHZreg {
  9191  			break
  9192  		}
  9193  		x := v_2.Args[0]
  9194  		mem := v.Args[3]
  9195  		v.reset(OpPPC64MOVBstoreidx)
  9196  		v.AuxInt = off
  9197  		v.Aux = sym
  9198  		v.AddArg(ptr)
  9199  		v.AddArg(idx)
  9200  		v.AddArg(x)
  9201  		v.AddArg(mem)
  9202  		return true
  9203  	}
  9204  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
  9205  	// cond:
  9206  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9207  	for {
  9208  		off := v.AuxInt
  9209  		sym := v.Aux
  9210  		_ = v.Args[3]
  9211  		ptr := v.Args[0]
  9212  		idx := v.Args[1]
  9213  		v_2 := v.Args[2]
  9214  		if v_2.Op != OpPPC64MOVWreg {
  9215  			break
  9216  		}
  9217  		x := v_2.Args[0]
  9218  		mem := v.Args[3]
  9219  		v.reset(OpPPC64MOVBstoreidx)
  9220  		v.AuxInt = off
  9221  		v.Aux = sym
  9222  		v.AddArg(ptr)
  9223  		v.AddArg(idx)
  9224  		v.AddArg(x)
  9225  		v.AddArg(mem)
  9226  		return true
  9227  	}
  9228  	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
  9229  	// cond:
  9230  	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  9231  	for {
  9232  		off := v.AuxInt
  9233  		sym := v.Aux
  9234  		_ = v.Args[3]
  9235  		ptr := v.Args[0]
  9236  		idx := v.Args[1]
  9237  		v_2 := v.Args[2]
  9238  		if v_2.Op != OpPPC64MOVWZreg {
  9239  			break
  9240  		}
  9241  		x := v_2.Args[0]
  9242  		mem := v.Args[3]
  9243  		v.reset(OpPPC64MOVBstoreidx)
  9244  		v.AuxInt = off
  9245  		v.Aux = sym
  9246  		v.AddArg(ptr)
  9247  		v.AddArg(idx)
  9248  		v.AddArg(x)
  9249  		v.AddArg(mem)
  9250  		return true
  9251  	}
  9252  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHreg x) [c]) mem)
  9253  	// cond: c <= 8
  9254  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9255  	for {
  9256  		off := v.AuxInt
  9257  		sym := v.Aux
  9258  		_ = v.Args[3]
  9259  		ptr := v.Args[0]
  9260  		idx := v.Args[1]
  9261  		v_2 := v.Args[2]
  9262  		if v_2.Op != OpPPC64SRWconst {
  9263  			break
  9264  		}
  9265  		c := v_2.AuxInt
  9266  		v_2_0 := v_2.Args[0]
  9267  		if v_2_0.Op != OpPPC64MOVHreg {
  9268  			break
  9269  		}
  9270  		x := v_2_0.Args[0]
  9271  		mem := v.Args[3]
  9272  		if !(c <= 8) {
  9273  			break
  9274  		}
  9275  		v.reset(OpPPC64MOVBstoreidx)
  9276  		v.AuxInt = off
  9277  		v.Aux = sym
  9278  		v.AddArg(ptr)
  9279  		v.AddArg(idx)
  9280  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9281  		v0.AuxInt = c
  9282  		v0.AddArg(x)
  9283  		v.AddArg(v0)
  9284  		v.AddArg(mem)
  9285  		return true
  9286  	}
  9287  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHZreg x) [c]) mem)
  9288  	// cond: c <= 8
  9289  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9290  	for {
  9291  		off := v.AuxInt
  9292  		sym := v.Aux
  9293  		_ = v.Args[3]
  9294  		ptr := v.Args[0]
  9295  		idx := v.Args[1]
  9296  		v_2 := v.Args[2]
  9297  		if v_2.Op != OpPPC64SRWconst {
  9298  			break
  9299  		}
  9300  		c := v_2.AuxInt
  9301  		v_2_0 := v_2.Args[0]
  9302  		if v_2_0.Op != OpPPC64MOVHZreg {
  9303  			break
  9304  		}
  9305  		x := v_2_0.Args[0]
  9306  		mem := v.Args[3]
  9307  		if !(c <= 8) {
  9308  			break
  9309  		}
  9310  		v.reset(OpPPC64MOVBstoreidx)
  9311  		v.AuxInt = off
  9312  		v.Aux = sym
  9313  		v.AddArg(ptr)
  9314  		v.AddArg(idx)
  9315  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9316  		v0.AuxInt = c
  9317  		v0.AddArg(x)
  9318  		v.AddArg(v0)
  9319  		v.AddArg(mem)
  9320  		return true
  9321  	}
  9322  	return false
  9323  }
  9324  func rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v *Value) bool {
  9325  	b := v.Block
  9326  	_ = b
  9327  	typ := &b.Func.Config.Types
  9328  	_ = typ
  9329  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWreg x) [c]) mem)
  9330  	// cond: c <= 24
  9331  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9332  	for {
  9333  		off := v.AuxInt
  9334  		sym := v.Aux
  9335  		_ = v.Args[3]
  9336  		ptr := v.Args[0]
  9337  		idx := v.Args[1]
  9338  		v_2 := v.Args[2]
  9339  		if v_2.Op != OpPPC64SRWconst {
  9340  			break
  9341  		}
  9342  		c := v_2.AuxInt
  9343  		v_2_0 := v_2.Args[0]
  9344  		if v_2_0.Op != OpPPC64MOVWreg {
  9345  			break
  9346  		}
  9347  		x := v_2_0.Args[0]
  9348  		mem := v.Args[3]
  9349  		if !(c <= 24) {
  9350  			break
  9351  		}
  9352  		v.reset(OpPPC64MOVBstoreidx)
  9353  		v.AuxInt = off
  9354  		v.Aux = sym
  9355  		v.AddArg(ptr)
  9356  		v.AddArg(idx)
  9357  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9358  		v0.AuxInt = c
  9359  		v0.AddArg(x)
  9360  		v.AddArg(v0)
  9361  		v.AddArg(mem)
  9362  		return true
  9363  	}
  9364  	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWZreg x) [c]) mem)
  9365  	// cond: c <= 24
  9366  	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  9367  	for {
  9368  		off := v.AuxInt
  9369  		sym := v.Aux
  9370  		_ = v.Args[3]
  9371  		ptr := v.Args[0]
  9372  		idx := v.Args[1]
  9373  		v_2 := v.Args[2]
  9374  		if v_2.Op != OpPPC64SRWconst {
  9375  			break
  9376  		}
  9377  		c := v_2.AuxInt
  9378  		v_2_0 := v_2.Args[0]
  9379  		if v_2_0.Op != OpPPC64MOVWZreg {
  9380  			break
  9381  		}
  9382  		x := v_2_0.Args[0]
  9383  		mem := v.Args[3]
  9384  		if !(c <= 24) {
  9385  			break
  9386  		}
  9387  		v.reset(OpPPC64MOVBstoreidx)
  9388  		v.AuxInt = off
  9389  		v.Aux = sym
  9390  		v.AddArg(ptr)
  9391  		v.AddArg(idx)
  9392  		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9393  		v0.AuxInt = c
  9394  		v0.AddArg(x)
  9395  		v.AddArg(v0)
  9396  		v.AddArg(mem)
  9397  		return true
  9398  	}
  9399  	return false
  9400  }
  9401  func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
  9402  	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9403  	// cond: is16Bit(off1+off2)
  9404  	// result: (MOVBstorezero [off1+off2] {sym} x mem)
  9405  	for {
  9406  		off1 := v.AuxInt
  9407  		sym := v.Aux
  9408  		_ = v.Args[1]
  9409  		v_0 := v.Args[0]
  9410  		if v_0.Op != OpPPC64ADDconst {
  9411  			break
  9412  		}
  9413  		off2 := v_0.AuxInt
  9414  		x := v_0.Args[0]
  9415  		mem := v.Args[1]
  9416  		if !(is16Bit(off1 + off2)) {
  9417  			break
  9418  		}
  9419  		v.reset(OpPPC64MOVBstorezero)
  9420  		v.AuxInt = off1 + off2
  9421  		v.Aux = sym
  9422  		v.AddArg(x)
  9423  		v.AddArg(mem)
  9424  		return true
  9425  	}
  9426  	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9427  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9428  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9429  	for {
  9430  		off1 := v.AuxInt
  9431  		sym1 := v.Aux
  9432  		_ = v.Args[1]
  9433  		p := v.Args[0]
  9434  		if p.Op != OpPPC64MOVDaddr {
  9435  			break
  9436  		}
  9437  		off2 := p.AuxInt
  9438  		sym2 := p.Aux
  9439  		x := p.Args[0]
  9440  		mem := v.Args[1]
  9441  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9442  			break
  9443  		}
  9444  		v.reset(OpPPC64MOVBstorezero)
  9445  		v.AuxInt = off1 + off2
  9446  		v.Aux = mergeSym(sym1, sym2)
  9447  		v.AddArg(x)
  9448  		v.AddArg(mem)
  9449  		return true
  9450  	}
  9451  	return false
  9452  }
  9453  func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
  9454  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
  9455  	// cond:
  9456  	// result: (MFVSRD x)
  9457  	for {
  9458  		off := v.AuxInt
  9459  		sym := v.Aux
  9460  		_ = v.Args[1]
  9461  		ptr := v.Args[0]
  9462  		v_1 := v.Args[1]
  9463  		if v_1.Op != OpPPC64FMOVDstore {
  9464  			break
  9465  		}
  9466  		if v_1.AuxInt != off {
  9467  			break
  9468  		}
  9469  		if v_1.Aux != sym {
  9470  			break
  9471  		}
  9472  		_ = v_1.Args[2]
  9473  		if ptr != v_1.Args[0] {
  9474  			break
  9475  		}
  9476  		x := v_1.Args[1]
  9477  		v.reset(OpPPC64MFVSRD)
  9478  		v.AddArg(x)
  9479  		return true
  9480  	}
  9481  	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9482  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9483  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9484  	for {
  9485  		off1 := v.AuxInt
  9486  		sym1 := v.Aux
  9487  		_ = v.Args[1]
  9488  		p := v.Args[0]
  9489  		if p.Op != OpPPC64MOVDaddr {
  9490  			break
  9491  		}
  9492  		off2 := p.AuxInt
  9493  		sym2 := p.Aux
  9494  		ptr := p.Args[0]
  9495  		mem := v.Args[1]
  9496  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9497  			break
  9498  		}
  9499  		v.reset(OpPPC64MOVDload)
  9500  		v.AuxInt = off1 + off2
  9501  		v.Aux = mergeSym(sym1, sym2)
  9502  		v.AddArg(ptr)
  9503  		v.AddArg(mem)
  9504  		return true
  9505  	}
  9506  	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
  9507  	// cond: is16Bit(off1+off2)
  9508  	// result: (MOVDload [off1+off2] {sym} x mem)
  9509  	for {
  9510  		off1 := v.AuxInt
  9511  		sym := v.Aux
  9512  		_ = v.Args[1]
  9513  		v_0 := v.Args[0]
  9514  		if v_0.Op != OpPPC64ADDconst {
  9515  			break
  9516  		}
  9517  		off2 := v_0.AuxInt
  9518  		x := v_0.Args[0]
  9519  		mem := v.Args[1]
  9520  		if !(is16Bit(off1 + off2)) {
  9521  			break
  9522  		}
  9523  		v.reset(OpPPC64MOVDload)
  9524  		v.AuxInt = off1 + off2
  9525  		v.Aux = sym
  9526  		v.AddArg(x)
  9527  		v.AddArg(mem)
  9528  		return true
  9529  	}
  9530  	// match: (MOVDload [0] {sym} p:(ADD ptr idx) mem)
  9531  	// cond: sym == nil && p.Uses == 1
  9532  	// result: (MOVDloadidx ptr idx mem)
  9533  	for {
  9534  		if v.AuxInt != 0 {
  9535  			break
  9536  		}
  9537  		sym := v.Aux
  9538  		_ = v.Args[1]
  9539  		p := v.Args[0]
  9540  		if p.Op != OpPPC64ADD {
  9541  			break
  9542  		}
  9543  		_ = p.Args[1]
  9544  		ptr := p.Args[0]
  9545  		idx := p.Args[1]
  9546  		mem := v.Args[1]
  9547  		if !(sym == nil && p.Uses == 1) {
  9548  			break
  9549  		}
  9550  		v.reset(OpPPC64MOVDloadidx)
  9551  		v.AddArg(ptr)
  9552  		v.AddArg(idx)
  9553  		v.AddArg(mem)
  9554  		return true
  9555  	}
  9556  	return false
  9557  }
  9558  func rewriteValuePPC64_OpPPC64MOVDloadidx_0(v *Value) bool {
  9559  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
  9560  	// cond: is16Bit(c)
  9561  	// result: (MOVDload [c] ptr mem)
  9562  	for {
  9563  		_ = v.Args[2]
  9564  		ptr := v.Args[0]
  9565  		v_1 := v.Args[1]
  9566  		if v_1.Op != OpPPC64MOVDconst {
  9567  			break
  9568  		}
  9569  		c := v_1.AuxInt
  9570  		mem := v.Args[2]
  9571  		if !(is16Bit(c)) {
  9572  			break
  9573  		}
  9574  		v.reset(OpPPC64MOVDload)
  9575  		v.AuxInt = c
  9576  		v.AddArg(ptr)
  9577  		v.AddArg(mem)
  9578  		return true
  9579  	}
  9580  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
  9581  	// cond: is16Bit(c)
  9582  	// result: (MOVDload [c] ptr mem)
  9583  	for {
  9584  		_ = v.Args[2]
  9585  		v_0 := v.Args[0]
  9586  		if v_0.Op != OpPPC64MOVDconst {
  9587  			break
  9588  		}
  9589  		c := v_0.AuxInt
  9590  		ptr := v.Args[1]
  9591  		mem := v.Args[2]
  9592  		if !(is16Bit(c)) {
  9593  			break
  9594  		}
  9595  		v.reset(OpPPC64MOVDload)
  9596  		v.AuxInt = c
  9597  		v.AddArg(ptr)
  9598  		v.AddArg(mem)
  9599  		return true
  9600  	}
  9601  	return false
  9602  }
  9603  func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
  9604  	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
  9605  	// cond:
  9606  	// result: (FMOVDstore [off] {sym} ptr x mem)
  9607  	for {
  9608  		off := v.AuxInt
  9609  		sym := v.Aux
  9610  		_ = v.Args[2]
  9611  		ptr := v.Args[0]
  9612  		v_1 := v.Args[1]
  9613  		if v_1.Op != OpPPC64MFVSRD {
  9614  			break
  9615  		}
  9616  		x := v_1.Args[0]
  9617  		mem := v.Args[2]
  9618  		v.reset(OpPPC64FMOVDstore)
  9619  		v.AuxInt = off
  9620  		v.Aux = sym
  9621  		v.AddArg(ptr)
  9622  		v.AddArg(x)
  9623  		v.AddArg(mem)
  9624  		return true
  9625  	}
  9626  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
  9627  	// cond: is16Bit(off1+off2)
  9628  	// result: (MOVDstore [off1+off2] {sym} x val mem)
  9629  	for {
  9630  		off1 := v.AuxInt
  9631  		sym := v.Aux
  9632  		_ = v.Args[2]
  9633  		v_0 := v.Args[0]
  9634  		if v_0.Op != OpPPC64ADDconst {
  9635  			break
  9636  		}
  9637  		off2 := v_0.AuxInt
  9638  		x := v_0.Args[0]
  9639  		val := v.Args[1]
  9640  		mem := v.Args[2]
  9641  		if !(is16Bit(off1 + off2)) {
  9642  			break
  9643  		}
  9644  		v.reset(OpPPC64MOVDstore)
  9645  		v.AuxInt = off1 + off2
  9646  		v.Aux = sym
  9647  		v.AddArg(x)
  9648  		v.AddArg(val)
  9649  		v.AddArg(mem)
  9650  		return true
  9651  	}
  9652  	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  9653  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9654  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9655  	for {
  9656  		off1 := v.AuxInt
  9657  		sym1 := v.Aux
  9658  		_ = v.Args[2]
  9659  		p := v.Args[0]
  9660  		if p.Op != OpPPC64MOVDaddr {
  9661  			break
  9662  		}
  9663  		off2 := p.AuxInt
  9664  		sym2 := p.Aux
  9665  		ptr := p.Args[0]
  9666  		val := v.Args[1]
  9667  		mem := v.Args[2]
  9668  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9669  			break
  9670  		}
  9671  		v.reset(OpPPC64MOVDstore)
  9672  		v.AuxInt = off1 + off2
  9673  		v.Aux = mergeSym(sym1, sym2)
  9674  		v.AddArg(ptr)
  9675  		v.AddArg(val)
  9676  		v.AddArg(mem)
  9677  		return true
  9678  	}
  9679  	// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
  9680  	// cond:
  9681  	// result: (MOVDstorezero [off] {sym} ptr mem)
  9682  	for {
  9683  		off := v.AuxInt
  9684  		sym := v.Aux
  9685  		_ = v.Args[2]
  9686  		ptr := v.Args[0]
  9687  		v_1 := v.Args[1]
  9688  		if v_1.Op != OpPPC64MOVDconst {
  9689  			break
  9690  		}
  9691  		if v_1.AuxInt != 0 {
  9692  			break
  9693  		}
  9694  		mem := v.Args[2]
  9695  		v.reset(OpPPC64MOVDstorezero)
  9696  		v.AuxInt = off
  9697  		v.Aux = sym
  9698  		v.AddArg(ptr)
  9699  		v.AddArg(mem)
  9700  		return true
  9701  	}
  9702  	// match: (MOVDstore [off] {sym} p:(ADD ptr idx) val mem)
  9703  	// cond: off == 0 && sym == nil && p.Uses == 1
  9704  	// result: (MOVDstoreidx ptr idx val mem)
  9705  	for {
  9706  		off := v.AuxInt
  9707  		sym := v.Aux
  9708  		_ = v.Args[2]
  9709  		p := v.Args[0]
  9710  		if p.Op != OpPPC64ADD {
  9711  			break
  9712  		}
  9713  		_ = p.Args[1]
  9714  		ptr := p.Args[0]
  9715  		idx := p.Args[1]
  9716  		val := v.Args[1]
  9717  		mem := v.Args[2]
  9718  		if !(off == 0 && sym == nil && p.Uses == 1) {
  9719  			break
  9720  		}
  9721  		v.reset(OpPPC64MOVDstoreidx)
  9722  		v.AddArg(ptr)
  9723  		v.AddArg(idx)
  9724  		v.AddArg(val)
  9725  		v.AddArg(mem)
  9726  		return true
  9727  	}
  9728  	return false
  9729  }
  9730  func rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v *Value) bool {
  9731  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
  9732  	// cond: is16Bit(c)
  9733  	// result: (MOVDstore [c] ptr val mem)
  9734  	for {
  9735  		_ = v.Args[3]
  9736  		ptr := v.Args[0]
  9737  		v_1 := v.Args[1]
  9738  		if v_1.Op != OpPPC64MOVDconst {
  9739  			break
  9740  		}
  9741  		c := v_1.AuxInt
  9742  		val := v.Args[2]
  9743  		mem := v.Args[3]
  9744  		if !(is16Bit(c)) {
  9745  			break
  9746  		}
  9747  		v.reset(OpPPC64MOVDstore)
  9748  		v.AuxInt = c
  9749  		v.AddArg(ptr)
  9750  		v.AddArg(val)
  9751  		v.AddArg(mem)
  9752  		return true
  9753  	}
  9754  	// match: (MOVDstoreidx (MOVDconst [c]) ptr val mem)
  9755  	// cond: is16Bit(c)
  9756  	// result: (MOVDstore [c] ptr val mem)
  9757  	for {
  9758  		_ = v.Args[3]
  9759  		v_0 := v.Args[0]
  9760  		if v_0.Op != OpPPC64MOVDconst {
  9761  			break
  9762  		}
  9763  		c := v_0.AuxInt
  9764  		ptr := v.Args[1]
  9765  		val := v.Args[2]
  9766  		mem := v.Args[3]
  9767  		if !(is16Bit(c)) {
  9768  			break
  9769  		}
  9770  		v.reset(OpPPC64MOVDstore)
  9771  		v.AuxInt = c
  9772  		v.AddArg(ptr)
  9773  		v.AddArg(val)
  9774  		v.AddArg(mem)
  9775  		return true
  9776  	}
  9777  	return false
  9778  }
  9779  func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
  9780  	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9781  	// cond: is16Bit(off1+off2)
  9782  	// result: (MOVDstorezero [off1+off2] {sym} x mem)
  9783  	for {
  9784  		off1 := v.AuxInt
  9785  		sym := v.Aux
  9786  		_ = v.Args[1]
  9787  		v_0 := v.Args[0]
  9788  		if v_0.Op != OpPPC64ADDconst {
  9789  			break
  9790  		}
  9791  		off2 := v_0.AuxInt
  9792  		x := v_0.Args[0]
  9793  		mem := v.Args[1]
  9794  		if !(is16Bit(off1 + off2)) {
  9795  			break
  9796  		}
  9797  		v.reset(OpPPC64MOVDstorezero)
  9798  		v.AuxInt = off1 + off2
  9799  		v.Aux = sym
  9800  		v.AddArg(x)
  9801  		v.AddArg(mem)
  9802  		return true
  9803  	}
  9804  	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9805  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9806  	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9807  	for {
  9808  		off1 := v.AuxInt
  9809  		sym1 := v.Aux
  9810  		_ = v.Args[1]
  9811  		p := v.Args[0]
  9812  		if p.Op != OpPPC64MOVDaddr {
  9813  			break
  9814  		}
  9815  		off2 := p.AuxInt
  9816  		sym2 := p.Aux
  9817  		x := p.Args[0]
  9818  		mem := v.Args[1]
  9819  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9820  			break
  9821  		}
  9822  		v.reset(OpPPC64MOVDstorezero)
  9823  		v.AuxInt = off1 + off2
  9824  		v.Aux = mergeSym(sym1, sym2)
  9825  		v.AddArg(x)
  9826  		v.AddArg(mem)
  9827  		return true
  9828  	}
  9829  	return false
  9830  }
  9831  func rewriteValuePPC64_OpPPC64MOVHBRstore_0(v *Value) bool {
  9832  	// match: (MOVHBRstore {sym} ptr (MOVHreg x) mem)
  9833  	// cond:
  9834  	// result: (MOVHBRstore {sym} ptr x mem)
  9835  	for {
  9836  		sym := v.Aux
  9837  		_ = v.Args[2]
  9838  		ptr := v.Args[0]
  9839  		v_1 := v.Args[1]
  9840  		if v_1.Op != OpPPC64MOVHreg {
  9841  			break
  9842  		}
  9843  		x := v_1.Args[0]
  9844  		mem := v.Args[2]
  9845  		v.reset(OpPPC64MOVHBRstore)
  9846  		v.Aux = sym
  9847  		v.AddArg(ptr)
  9848  		v.AddArg(x)
  9849  		v.AddArg(mem)
  9850  		return true
  9851  	}
  9852  	// match: (MOVHBRstore {sym} ptr (MOVHZreg x) mem)
  9853  	// cond:
  9854  	// result: (MOVHBRstore {sym} ptr x mem)
  9855  	for {
  9856  		sym := v.Aux
  9857  		_ = v.Args[2]
  9858  		ptr := v.Args[0]
  9859  		v_1 := v.Args[1]
  9860  		if v_1.Op != OpPPC64MOVHZreg {
  9861  			break
  9862  		}
  9863  		x := v_1.Args[0]
  9864  		mem := v.Args[2]
  9865  		v.reset(OpPPC64MOVHBRstore)
  9866  		v.Aux = sym
  9867  		v.AddArg(ptr)
  9868  		v.AddArg(x)
  9869  		v.AddArg(mem)
  9870  		return true
  9871  	}
  9872  	// match: (MOVHBRstore {sym} ptr (MOVWreg x) mem)
  9873  	// cond:
  9874  	// result: (MOVHBRstore {sym} ptr x mem)
  9875  	for {
  9876  		sym := v.Aux
  9877  		_ = v.Args[2]
  9878  		ptr := v.Args[0]
  9879  		v_1 := v.Args[1]
  9880  		if v_1.Op != OpPPC64MOVWreg {
  9881  			break
  9882  		}
  9883  		x := v_1.Args[0]
  9884  		mem := v.Args[2]
  9885  		v.reset(OpPPC64MOVHBRstore)
  9886  		v.Aux = sym
  9887  		v.AddArg(ptr)
  9888  		v.AddArg(x)
  9889  		v.AddArg(mem)
  9890  		return true
  9891  	}
  9892  	// match: (MOVHBRstore {sym} ptr (MOVWZreg x) mem)
  9893  	// cond:
  9894  	// result: (MOVHBRstore {sym} ptr x mem)
  9895  	for {
  9896  		sym := v.Aux
  9897  		_ = v.Args[2]
  9898  		ptr := v.Args[0]
  9899  		v_1 := v.Args[1]
  9900  		if v_1.Op != OpPPC64MOVWZreg {
  9901  			break
  9902  		}
  9903  		x := v_1.Args[0]
  9904  		mem := v.Args[2]
  9905  		v.reset(OpPPC64MOVHBRstore)
  9906  		v.Aux = sym
  9907  		v.AddArg(ptr)
  9908  		v.AddArg(x)
  9909  		v.AddArg(mem)
  9910  		return true
  9911  	}
  9912  	return false
  9913  }
  9914  func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
  9915  	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9916  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9917  	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9918  	for {
  9919  		off1 := v.AuxInt
  9920  		sym1 := v.Aux
  9921  		_ = v.Args[1]
  9922  		p := v.Args[0]
  9923  		if p.Op != OpPPC64MOVDaddr {
  9924  			break
  9925  		}
  9926  		off2 := p.AuxInt
  9927  		sym2 := p.Aux
  9928  		ptr := p.Args[0]
  9929  		mem := v.Args[1]
  9930  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9931  			break
  9932  		}
  9933  		v.reset(OpPPC64MOVHZload)
  9934  		v.AuxInt = off1 + off2
  9935  		v.Aux = mergeSym(sym1, sym2)
  9936  		v.AddArg(ptr)
  9937  		v.AddArg(mem)
  9938  		return true
  9939  	}
  9940  	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
  9941  	// cond: is16Bit(off1+off2)
  9942  	// result: (MOVHZload [off1+off2] {sym} x mem)
  9943  	for {
  9944  		off1 := v.AuxInt
  9945  		sym := v.Aux
  9946  		_ = v.Args[1]
  9947  		v_0 := v.Args[0]
  9948  		if v_0.Op != OpPPC64ADDconst {
  9949  			break
  9950  		}
  9951  		off2 := v_0.AuxInt
  9952  		x := v_0.Args[0]
  9953  		mem := v.Args[1]
  9954  		if !(is16Bit(off1 + off2)) {
  9955  			break
  9956  		}
  9957  		v.reset(OpPPC64MOVHZload)
  9958  		v.AuxInt = off1 + off2
  9959  		v.Aux = sym
  9960  		v.AddArg(x)
  9961  		v.AddArg(mem)
  9962  		return true
  9963  	}
  9964  	// match: (MOVHZload [0] {sym} p:(ADD ptr idx) mem)
  9965  	// cond: sym == nil && p.Uses == 1
  9966  	// result: (MOVHZloadidx ptr idx mem)
  9967  	for {
  9968  		if v.AuxInt != 0 {
  9969  			break
  9970  		}
  9971  		sym := v.Aux
  9972  		_ = v.Args[1]
  9973  		p := v.Args[0]
  9974  		if p.Op != OpPPC64ADD {
  9975  			break
  9976  		}
  9977  		_ = p.Args[1]
  9978  		ptr := p.Args[0]
  9979  		idx := p.Args[1]
  9980  		mem := v.Args[1]
  9981  		if !(sym == nil && p.Uses == 1) {
  9982  			break
  9983  		}
  9984  		v.reset(OpPPC64MOVHZloadidx)
  9985  		v.AddArg(ptr)
  9986  		v.AddArg(idx)
  9987  		v.AddArg(mem)
  9988  		return true
  9989  	}
  9990  	return false
  9991  }
  9992  func rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v *Value) bool {
  9993  	// match: (MOVHZloadidx ptr (MOVDconst [c]) mem)
  9994  	// cond: is16Bit(c)
  9995  	// result: (MOVHZload [c] ptr mem)
  9996  	for {
  9997  		_ = v.Args[2]
  9998  		ptr := v.Args[0]
  9999  		v_1 := v.Args[1]
 10000  		if v_1.Op != OpPPC64MOVDconst {
 10001  			break
 10002  		}
 10003  		c := v_1.AuxInt
 10004  		mem := v.Args[2]
 10005  		if !(is16Bit(c)) {
 10006  			break
 10007  		}
 10008  		v.reset(OpPPC64MOVHZload)
 10009  		v.AuxInt = c
 10010  		v.AddArg(ptr)
 10011  		v.AddArg(mem)
 10012  		return true
 10013  	}
 10014  	// match: (MOVHZloadidx (MOVDconst [c]) ptr mem)
 10015  	// cond: is16Bit(c)
 10016  	// result: (MOVHZload [c] ptr mem)
 10017  	for {
 10018  		_ = v.Args[2]
 10019  		v_0 := v.Args[0]
 10020  		if v_0.Op != OpPPC64MOVDconst {
 10021  			break
 10022  		}
 10023  		c := v_0.AuxInt
 10024  		ptr := v.Args[1]
 10025  		mem := v.Args[2]
 10026  		if !(is16Bit(c)) {
 10027  			break
 10028  		}
 10029  		v.reset(OpPPC64MOVHZload)
 10030  		v.AuxInt = c
 10031  		v.AddArg(ptr)
 10032  		v.AddArg(mem)
 10033  		return true
 10034  	}
 10035  	return false
 10036  }
 10037  func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
 10038  	b := v.Block
 10039  	_ = b
 10040  	typ := &b.Func.Config.Types
 10041  	_ = typ
 10042  	// match: (MOVHZreg y:(ANDconst [c] _))
 10043  	// cond: uint64(c) <= 0xFFFF
 10044  	// result: y
 10045  	for {
 10046  		y := v.Args[0]
 10047  		if y.Op != OpPPC64ANDconst {
 10048  			break
 10049  		}
 10050  		c := y.AuxInt
 10051  		if !(uint64(c) <= 0xFFFF) {
 10052  			break
 10053  		}
 10054  		v.reset(OpCopy)
 10055  		v.Type = y.Type
 10056  		v.AddArg(y)
 10057  		return true
 10058  	}
 10059  	// match: (MOVHZreg (SRWconst [c] (MOVBZreg x)))
 10060  	// cond:
 10061  	// result: (SRWconst [c] (MOVBZreg x))
 10062  	for {
 10063  		v_0 := v.Args[0]
 10064  		if v_0.Op != OpPPC64SRWconst {
 10065  			break
 10066  		}
 10067  		c := v_0.AuxInt
 10068  		v_0_0 := v_0.Args[0]
 10069  		if v_0_0.Op != OpPPC64MOVBZreg {
 10070  			break
 10071  		}
 10072  		x := v_0_0.Args[0]
 10073  		v.reset(OpPPC64SRWconst)
 10074  		v.AuxInt = c
 10075  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 10076  		v0.AddArg(x)
 10077  		v.AddArg(v0)
 10078  		return true
 10079  	}
 10080  	// match: (MOVHZreg (SRWconst [c] (MOVHZreg x)))
 10081  	// cond:
 10082  	// result: (SRWconst [c] (MOVHZreg x))
 10083  	for {
 10084  		v_0 := v.Args[0]
 10085  		if v_0.Op != OpPPC64SRWconst {
 10086  			break
 10087  		}
 10088  		c := v_0.AuxInt
 10089  		v_0_0 := v_0.Args[0]
 10090  		if v_0_0.Op != OpPPC64MOVHZreg {
 10091  			break
 10092  		}
 10093  		x := v_0_0.Args[0]
 10094  		v.reset(OpPPC64SRWconst)
 10095  		v.AuxInt = c
 10096  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 10097  		v0.AddArg(x)
 10098  		v.AddArg(v0)
 10099  		return true
 10100  	}
 10101  	// match: (MOVHZreg (SRWconst [c] x))
 10102  	// cond: sizeof(x.Type) <= 16
 10103  	// result: (SRWconst [c] x)
 10104  	for {
 10105  		v_0 := v.Args[0]
 10106  		if v_0.Op != OpPPC64SRWconst {
 10107  			break
 10108  		}
 10109  		c := v_0.AuxInt
 10110  		x := v_0.Args[0]
 10111  		if !(sizeof(x.Type) <= 16) {
 10112  			break
 10113  		}
 10114  		v.reset(OpPPC64SRWconst)
 10115  		v.AuxInt = c
 10116  		v.AddArg(x)
 10117  		return true
 10118  	}
 10119  	// match: (MOVHZreg (SRDconst [c] x))
 10120  	// cond: c>=48
 10121  	// result: (SRDconst [c] x)
 10122  	for {
 10123  		v_0 := v.Args[0]
 10124  		if v_0.Op != OpPPC64SRDconst {
 10125  			break
 10126  		}
 10127  		c := v_0.AuxInt
 10128  		x := v_0.Args[0]
 10129  		if !(c >= 48) {
 10130  			break
 10131  		}
 10132  		v.reset(OpPPC64SRDconst)
 10133  		v.AuxInt = c
 10134  		v.AddArg(x)
 10135  		return true
 10136  	}
 10137  	// match: (MOVHZreg (SRWconst [c] x))
 10138  	// cond: c>=16
 10139  	// result: (SRWconst [c] x)
 10140  	for {
 10141  		v_0 := v.Args[0]
 10142  		if v_0.Op != OpPPC64SRWconst {
 10143  			break
 10144  		}
 10145  		c := v_0.AuxInt
 10146  		x := v_0.Args[0]
 10147  		if !(c >= 16) {
 10148  			break
 10149  		}
 10150  		v.reset(OpPPC64SRWconst)
 10151  		v.AuxInt = c
 10152  		v.AddArg(x)
 10153  		return true
 10154  	}
 10155  	// match: (MOVHZreg y:(MOVHZreg _))
 10156  	// cond:
 10157  	// result: y
 10158  	for {
 10159  		y := v.Args[0]
 10160  		if y.Op != OpPPC64MOVHZreg {
 10161  			break
 10162  		}
 10163  		v.reset(OpCopy)
 10164  		v.Type = y.Type
 10165  		v.AddArg(y)
 10166  		return true
 10167  	}
 10168  	// match: (MOVHZreg y:(MOVBZreg _))
 10169  	// cond:
 10170  	// result: y
 10171  	for {
 10172  		y := v.Args[0]
 10173  		if y.Op != OpPPC64MOVBZreg {
 10174  			break
 10175  		}
 10176  		v.reset(OpCopy)
 10177  		v.Type = y.Type
 10178  		v.AddArg(y)
 10179  		return true
 10180  	}
 10181  	// match: (MOVHZreg y:(MOVHBRload _ _))
 10182  	// cond:
 10183  	// result: y
 10184  	for {
 10185  		y := v.Args[0]
 10186  		if y.Op != OpPPC64MOVHBRload {
 10187  			break
 10188  		}
 10189  		_ = y.Args[1]
 10190  		v.reset(OpCopy)
 10191  		v.Type = y.Type
 10192  		v.AddArg(y)
 10193  		return true
 10194  	}
 10195  	// match: (MOVHZreg y:(MOVHreg x))
 10196  	// cond:
 10197  	// result: (MOVHZreg x)
 10198  	for {
 10199  		y := v.Args[0]
 10200  		if y.Op != OpPPC64MOVHreg {
 10201  			break
 10202  		}
 10203  		x := y.Args[0]
 10204  		v.reset(OpPPC64MOVHZreg)
 10205  		v.AddArg(x)
 10206  		return true
 10207  	}
 10208  	return false
 10209  }
 10210  func rewriteValuePPC64_OpPPC64MOVHZreg_10(v *Value) bool {
 10211  	// match: (MOVHZreg x:(MOVBZload _ _))
 10212  	// cond:
 10213  	// result: x
 10214  	for {
 10215  		x := v.Args[0]
 10216  		if x.Op != OpPPC64MOVBZload {
 10217  			break
 10218  		}
 10219  		_ = x.Args[1]
 10220  		v.reset(OpCopy)
 10221  		v.Type = x.Type
 10222  		v.AddArg(x)
 10223  		return true
 10224  	}
 10225  	// match: (MOVHZreg x:(MOVBZloadidx _ _ _))
 10226  	// cond:
 10227  	// result: x
 10228  	for {
 10229  		x := v.Args[0]
 10230  		if x.Op != OpPPC64MOVBZloadidx {
 10231  			break
 10232  		}
 10233  		_ = x.Args[2]
 10234  		v.reset(OpCopy)
 10235  		v.Type = x.Type
 10236  		v.AddArg(x)
 10237  		return true
 10238  	}
 10239  	// match: (MOVHZreg x:(MOVHZload _ _))
 10240  	// cond:
 10241  	// result: x
 10242  	for {
 10243  		x := v.Args[0]
 10244  		if x.Op != OpPPC64MOVHZload {
 10245  			break
 10246  		}
 10247  		_ = x.Args[1]
 10248  		v.reset(OpCopy)
 10249  		v.Type = x.Type
 10250  		v.AddArg(x)
 10251  		return true
 10252  	}
 10253  	// match: (MOVHZreg x:(MOVHZloadidx _ _ _))
 10254  	// cond:
 10255  	// result: x
 10256  	for {
 10257  		x := v.Args[0]
 10258  		if x.Op != OpPPC64MOVHZloadidx {
 10259  			break
 10260  		}
 10261  		_ = x.Args[2]
 10262  		v.reset(OpCopy)
 10263  		v.Type = x.Type
 10264  		v.AddArg(x)
 10265  		return true
 10266  	}
 10267  	// match: (MOVHZreg x:(Arg <t>))
 10268  	// cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t)
 10269  	// result: x
 10270  	for {
 10271  		x := v.Args[0]
 10272  		if x.Op != OpArg {
 10273  			break
 10274  		}
 10275  		t := x.Type
 10276  		if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) {
 10277  			break
 10278  		}
 10279  		v.reset(OpCopy)
 10280  		v.Type = x.Type
 10281  		v.AddArg(x)
 10282  		return true
 10283  	}
 10284  	// match: (MOVHZreg (MOVDconst [c]))
 10285  	// cond:
 10286  	// result: (MOVDconst [int64(uint16(c))])
 10287  	for {
 10288  		v_0 := v.Args[0]
 10289  		if v_0.Op != OpPPC64MOVDconst {
 10290  			break
 10291  		}
 10292  		c := v_0.AuxInt
 10293  		v.reset(OpPPC64MOVDconst)
 10294  		v.AuxInt = int64(uint16(c))
 10295  		return true
 10296  	}
 10297  	return false
 10298  }
 10299  func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
 10300  	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 10301  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10302  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10303  	for {
 10304  		off1 := v.AuxInt
 10305  		sym1 := v.Aux
 10306  		_ = v.Args[1]
 10307  		p := v.Args[0]
 10308  		if p.Op != OpPPC64MOVDaddr {
 10309  			break
 10310  		}
 10311  		off2 := p.AuxInt
 10312  		sym2 := p.Aux
 10313  		ptr := p.Args[0]
 10314  		mem := v.Args[1]
 10315  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10316  			break
 10317  		}
 10318  		v.reset(OpPPC64MOVHload)
 10319  		v.AuxInt = off1 + off2
 10320  		v.Aux = mergeSym(sym1, sym2)
 10321  		v.AddArg(ptr)
 10322  		v.AddArg(mem)
 10323  		return true
 10324  	}
 10325  	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
 10326  	// cond: is16Bit(off1+off2)
 10327  	// result: (MOVHload [off1+off2] {sym} x mem)
 10328  	for {
 10329  		off1 := v.AuxInt
 10330  		sym := v.Aux
 10331  		_ = v.Args[1]
 10332  		v_0 := v.Args[0]
 10333  		if v_0.Op != OpPPC64ADDconst {
 10334  			break
 10335  		}
 10336  		off2 := v_0.AuxInt
 10337  		x := v_0.Args[0]
 10338  		mem := v.Args[1]
 10339  		if !(is16Bit(off1 + off2)) {
 10340  			break
 10341  		}
 10342  		v.reset(OpPPC64MOVHload)
 10343  		v.AuxInt = off1 + off2
 10344  		v.Aux = sym
 10345  		v.AddArg(x)
 10346  		v.AddArg(mem)
 10347  		return true
 10348  	}
 10349  	// match: (MOVHload [0] {sym} p:(ADD ptr idx) mem)
 10350  	// cond: sym == nil && p.Uses == 1
 10351  	// result: (MOVHloadidx ptr idx mem)
 10352  	for {
 10353  		if v.AuxInt != 0 {
 10354  			break
 10355  		}
 10356  		sym := v.Aux
 10357  		_ = v.Args[1]
 10358  		p := v.Args[0]
 10359  		if p.Op != OpPPC64ADD {
 10360  			break
 10361  		}
 10362  		_ = p.Args[1]
 10363  		ptr := p.Args[0]
 10364  		idx := p.Args[1]
 10365  		mem := v.Args[1]
 10366  		if !(sym == nil && p.Uses == 1) {
 10367  			break
 10368  		}
 10369  		v.reset(OpPPC64MOVHloadidx)
 10370  		v.AddArg(ptr)
 10371  		v.AddArg(idx)
 10372  		v.AddArg(mem)
 10373  		return true
 10374  	}
 10375  	return false
 10376  }
 10377  func rewriteValuePPC64_OpPPC64MOVHloadidx_0(v *Value) bool {
 10378  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 10379  	// cond: is16Bit(c)
 10380  	// result: (MOVHload [c] ptr mem)
 10381  	for {
 10382  		_ = v.Args[2]
 10383  		ptr := v.Args[0]
 10384  		v_1 := v.Args[1]
 10385  		if v_1.Op != OpPPC64MOVDconst {
 10386  			break
 10387  		}
 10388  		c := v_1.AuxInt
 10389  		mem := v.Args[2]
 10390  		if !(is16Bit(c)) {
 10391  			break
 10392  		}
 10393  		v.reset(OpPPC64MOVHload)
 10394  		v.AuxInt = c
 10395  		v.AddArg(ptr)
 10396  		v.AddArg(mem)
 10397  		return true
 10398  	}
 10399  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 10400  	// cond: is16Bit(c)
 10401  	// result: (MOVHload [c] ptr mem)
 10402  	for {
 10403  		_ = v.Args[2]
 10404  		v_0 := v.Args[0]
 10405  		if v_0.Op != OpPPC64MOVDconst {
 10406  			break
 10407  		}
 10408  		c := v_0.AuxInt
 10409  		ptr := v.Args[1]
 10410  		mem := v.Args[2]
 10411  		if !(is16Bit(c)) {
 10412  			break
 10413  		}
 10414  		v.reset(OpPPC64MOVHload)
 10415  		v.AuxInt = c
 10416  		v.AddArg(ptr)
 10417  		v.AddArg(mem)
 10418  		return true
 10419  	}
 10420  	return false
 10421  }
 10422  func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
 10423  	b := v.Block
 10424  	_ = b
 10425  	typ := &b.Func.Config.Types
 10426  	_ = typ
 10427  	// match: (MOVHreg y:(ANDconst [c] _))
 10428  	// cond: uint64(c) <= 0x7FFF
 10429  	// result: y
 10430  	for {
 10431  		y := v.Args[0]
 10432  		if y.Op != OpPPC64ANDconst {
 10433  			break
 10434  		}
 10435  		c := y.AuxInt
 10436  		if !(uint64(c) <= 0x7FFF) {
 10437  			break
 10438  		}
 10439  		v.reset(OpCopy)
 10440  		v.Type = y.Type
 10441  		v.AddArg(y)
 10442  		return true
 10443  	}
 10444  	// match: (MOVHreg (SRAWconst [c] (MOVBreg x)))
 10445  	// cond:
 10446  	// result: (SRAWconst [c] (MOVBreg x))
 10447  	for {
 10448  		v_0 := v.Args[0]
 10449  		if v_0.Op != OpPPC64SRAWconst {
 10450  			break
 10451  		}
 10452  		c := v_0.AuxInt
 10453  		v_0_0 := v_0.Args[0]
 10454  		if v_0_0.Op != OpPPC64MOVBreg {
 10455  			break
 10456  		}
 10457  		x := v_0_0.Args[0]
 10458  		v.reset(OpPPC64SRAWconst)
 10459  		v.AuxInt = c
 10460  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 10461  		v0.AddArg(x)
 10462  		v.AddArg(v0)
 10463  		return true
 10464  	}
 10465  	// match: (MOVHreg (SRAWconst [c] (MOVHreg x)))
 10466  	// cond:
 10467  	// result: (SRAWconst [c] (MOVHreg x))
 10468  	for {
 10469  		v_0 := v.Args[0]
 10470  		if v_0.Op != OpPPC64SRAWconst {
 10471  			break
 10472  		}
 10473  		c := v_0.AuxInt
 10474  		v_0_0 := v_0.Args[0]
 10475  		if v_0_0.Op != OpPPC64MOVHreg {
 10476  			break
 10477  		}
 10478  		x := v_0_0.Args[0]
 10479  		v.reset(OpPPC64SRAWconst)
 10480  		v.AuxInt = c
 10481  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 10482  		v0.AddArg(x)
 10483  		v.AddArg(v0)
 10484  		return true
 10485  	}
 10486  	// match: (MOVHreg (SRAWconst [c] x))
 10487  	// cond: sizeof(x.Type) <= 16
 10488  	// result: (SRAWconst [c] x)
 10489  	for {
 10490  		v_0 := v.Args[0]
 10491  		if v_0.Op != OpPPC64SRAWconst {
 10492  			break
 10493  		}
 10494  		c := v_0.AuxInt
 10495  		x := v_0.Args[0]
 10496  		if !(sizeof(x.Type) <= 16) {
 10497  			break
 10498  		}
 10499  		v.reset(OpPPC64SRAWconst)
 10500  		v.AuxInt = c
 10501  		v.AddArg(x)
 10502  		return true
 10503  	}
 10504  	// match: (MOVHreg (SRDconst [c] x))
 10505  	// cond: c>48
 10506  	// result: (SRDconst [c] x)
 10507  	for {
 10508  		v_0 := v.Args[0]
 10509  		if v_0.Op != OpPPC64SRDconst {
 10510  			break
 10511  		}
 10512  		c := v_0.AuxInt
 10513  		x := v_0.Args[0]
 10514  		if !(c > 48) {
 10515  			break
 10516  		}
 10517  		v.reset(OpPPC64SRDconst)
 10518  		v.AuxInt = c
 10519  		v.AddArg(x)
 10520  		return true
 10521  	}
 10522  	// match: (MOVHreg (SRDconst [c] x))
 10523  	// cond: c==48
 10524  	// result: (SRADconst [c] x)
 10525  	for {
 10526  		v_0 := v.Args[0]
 10527  		if v_0.Op != OpPPC64SRDconst {
 10528  			break
 10529  		}
 10530  		c := v_0.AuxInt
 10531  		x := v_0.Args[0]
 10532  		if !(c == 48) {
 10533  			break
 10534  		}
 10535  		v.reset(OpPPC64SRADconst)
 10536  		v.AuxInt = c
 10537  		v.AddArg(x)
 10538  		return true
 10539  	}
 10540  	// match: (MOVHreg (SRWconst [c] x))
 10541  	// cond: c>16
 10542  	// result: (SRWconst [c] x)
 10543  	for {
 10544  		v_0 := v.Args[0]
 10545  		if v_0.Op != OpPPC64SRWconst {
 10546  			break
 10547  		}
 10548  		c := v_0.AuxInt
 10549  		x := v_0.Args[0]
 10550  		if !(c > 16) {
 10551  			break
 10552  		}
 10553  		v.reset(OpPPC64SRWconst)
 10554  		v.AuxInt = c
 10555  		v.AddArg(x)
 10556  		return true
 10557  	}
 10558  	// match: (MOVHreg (SRWconst [c] x))
 10559  	// cond: c==16
 10560  	// result: (SRAWconst [c] x)
 10561  	for {
 10562  		v_0 := v.Args[0]
 10563  		if v_0.Op != OpPPC64SRWconst {
 10564  			break
 10565  		}
 10566  		c := v_0.AuxInt
 10567  		x := v_0.Args[0]
 10568  		if !(c == 16) {
 10569  			break
 10570  		}
 10571  		v.reset(OpPPC64SRAWconst)
 10572  		v.AuxInt = c
 10573  		v.AddArg(x)
 10574  		return true
 10575  	}
 10576  	// match: (MOVHreg y:(MOVHreg _))
 10577  	// cond:
 10578  	// result: y
 10579  	for {
 10580  		y := v.Args[0]
 10581  		if y.Op != OpPPC64MOVHreg {
 10582  			break
 10583  		}
 10584  		v.reset(OpCopy)
 10585  		v.Type = y.Type
 10586  		v.AddArg(y)
 10587  		return true
 10588  	}
 10589  	// match: (MOVHreg y:(MOVBreg _))
 10590  	// cond:
 10591  	// result: y
 10592  	for {
 10593  		y := v.Args[0]
 10594  		if y.Op != OpPPC64MOVBreg {
 10595  			break
 10596  		}
 10597  		v.reset(OpCopy)
 10598  		v.Type = y.Type
 10599  		v.AddArg(y)
 10600  		return true
 10601  	}
 10602  	return false
 10603  }
 10604  func rewriteValuePPC64_OpPPC64MOVHreg_10(v *Value) bool {
 10605  	// match: (MOVHreg y:(MOVHZreg x))
 10606  	// cond:
 10607  	// result: (MOVHreg x)
 10608  	for {
 10609  		y := v.Args[0]
 10610  		if y.Op != OpPPC64MOVHZreg {
 10611  			break
 10612  		}
 10613  		x := y.Args[0]
 10614  		v.reset(OpPPC64MOVHreg)
 10615  		v.AddArg(x)
 10616  		return true
 10617  	}
 10618  	// match: (MOVHreg x:(MOVHload _ _))
 10619  	// cond:
 10620  	// result: x
 10621  	for {
 10622  		x := v.Args[0]
 10623  		if x.Op != OpPPC64MOVHload {
 10624  			break
 10625  		}
 10626  		_ = x.Args[1]
 10627  		v.reset(OpCopy)
 10628  		v.Type = x.Type
 10629  		v.AddArg(x)
 10630  		return true
 10631  	}
 10632  	// match: (MOVHreg x:(MOVHloadidx _ _ _))
 10633  	// cond:
 10634  	// result: x
 10635  	for {
 10636  		x := v.Args[0]
 10637  		if x.Op != OpPPC64MOVHloadidx {
 10638  			break
 10639  		}
 10640  		_ = x.Args[2]
 10641  		v.reset(OpCopy)
 10642  		v.Type = x.Type
 10643  		v.AddArg(x)
 10644  		return true
 10645  	}
 10646  	// match: (MOVHreg x:(Arg <t>))
 10647  	// cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t)
 10648  	// result: x
 10649  	for {
 10650  		x := v.Args[0]
 10651  		if x.Op != OpArg {
 10652  			break
 10653  		}
 10654  		t := x.Type
 10655  		if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) {
 10656  			break
 10657  		}
 10658  		v.reset(OpCopy)
 10659  		v.Type = x.Type
 10660  		v.AddArg(x)
 10661  		return true
 10662  	}
 10663  	// match: (MOVHreg (MOVDconst [c]))
 10664  	// cond:
 10665  	// result: (MOVDconst [int64(int16(c))])
 10666  	for {
 10667  		v_0 := v.Args[0]
 10668  		if v_0.Op != OpPPC64MOVDconst {
 10669  			break
 10670  		}
 10671  		c := v_0.AuxInt
 10672  		v.reset(OpPPC64MOVDconst)
 10673  		v.AuxInt = int64(int16(c))
 10674  		return true
 10675  	}
 10676  	return false
 10677  }
 10678  func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
 10679  	b := v.Block
 10680  	_ = b
 10681  	config := b.Func.Config
 10682  	_ = config
 10683  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
 10684  	// cond: is16Bit(off1+off2)
 10685  	// result: (MOVHstore [off1+off2] {sym} x val mem)
 10686  	for {
 10687  		off1 := v.AuxInt
 10688  		sym := v.Aux
 10689  		_ = v.Args[2]
 10690  		v_0 := v.Args[0]
 10691  		if v_0.Op != OpPPC64ADDconst {
 10692  			break
 10693  		}
 10694  		off2 := v_0.AuxInt
 10695  		x := v_0.Args[0]
 10696  		val := v.Args[1]
 10697  		mem := v.Args[2]
 10698  		if !(is16Bit(off1 + off2)) {
 10699  			break
 10700  		}
 10701  		v.reset(OpPPC64MOVHstore)
 10702  		v.AuxInt = off1 + off2
 10703  		v.Aux = sym
 10704  		v.AddArg(x)
 10705  		v.AddArg(val)
 10706  		v.AddArg(mem)
 10707  		return true
 10708  	}
 10709  	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 10710  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10711  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 10712  	for {
 10713  		off1 := v.AuxInt
 10714  		sym1 := v.Aux
 10715  		_ = v.Args[2]
 10716  		p := v.Args[0]
 10717  		if p.Op != OpPPC64MOVDaddr {
 10718  			break
 10719  		}
 10720  		off2 := p.AuxInt
 10721  		sym2 := p.Aux
 10722  		ptr := p.Args[0]
 10723  		val := v.Args[1]
 10724  		mem := v.Args[2]
 10725  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10726  			break
 10727  		}
 10728  		v.reset(OpPPC64MOVHstore)
 10729  		v.AuxInt = off1 + off2
 10730  		v.Aux = mergeSym(sym1, sym2)
 10731  		v.AddArg(ptr)
 10732  		v.AddArg(val)
 10733  		v.AddArg(mem)
 10734  		return true
 10735  	}
 10736  	// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
 10737  	// cond:
 10738  	// result: (MOVHstorezero [off] {sym} ptr mem)
 10739  	for {
 10740  		off := v.AuxInt
 10741  		sym := v.Aux
 10742  		_ = v.Args[2]
 10743  		ptr := v.Args[0]
 10744  		v_1 := v.Args[1]
 10745  		if v_1.Op != OpPPC64MOVDconst {
 10746  			break
 10747  		}
 10748  		if v_1.AuxInt != 0 {
 10749  			break
 10750  		}
 10751  		mem := v.Args[2]
 10752  		v.reset(OpPPC64MOVHstorezero)
 10753  		v.AuxInt = off
 10754  		v.Aux = sym
 10755  		v.AddArg(ptr)
 10756  		v.AddArg(mem)
 10757  		return true
 10758  	}
 10759  	// match: (MOVHstore [off] {sym} p:(ADD ptr idx) val mem)
 10760  	// cond: off == 0 && sym == nil && p.Uses == 1
 10761  	// result: (MOVHstoreidx ptr idx val mem)
 10762  	for {
 10763  		off := v.AuxInt
 10764  		sym := v.Aux
 10765  		_ = v.Args[2]
 10766  		p := v.Args[0]
 10767  		if p.Op != OpPPC64ADD {
 10768  			break
 10769  		}
 10770  		_ = p.Args[1]
 10771  		ptr := p.Args[0]
 10772  		idx := p.Args[1]
 10773  		val := v.Args[1]
 10774  		mem := v.Args[2]
 10775  		if !(off == 0 && sym == nil && p.Uses == 1) {
 10776  			break
 10777  		}
 10778  		v.reset(OpPPC64MOVHstoreidx)
 10779  		v.AddArg(ptr)
 10780  		v.AddArg(idx)
 10781  		v.AddArg(val)
 10782  		v.AddArg(mem)
 10783  		return true
 10784  	}
 10785  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 10786  	// cond:
 10787  	// result: (MOVHstore [off] {sym} ptr x mem)
 10788  	for {
 10789  		off := v.AuxInt
 10790  		sym := v.Aux
 10791  		_ = v.Args[2]
 10792  		ptr := v.Args[0]
 10793  		v_1 := v.Args[1]
 10794  		if v_1.Op != OpPPC64MOVHreg {
 10795  			break
 10796  		}
 10797  		x := v_1.Args[0]
 10798  		mem := v.Args[2]
 10799  		v.reset(OpPPC64MOVHstore)
 10800  		v.AuxInt = off
 10801  		v.Aux = sym
 10802  		v.AddArg(ptr)
 10803  		v.AddArg(x)
 10804  		v.AddArg(mem)
 10805  		return true
 10806  	}
 10807  	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
 10808  	// cond:
 10809  	// result: (MOVHstore [off] {sym} ptr x mem)
 10810  	for {
 10811  		off := v.AuxInt
 10812  		sym := v.Aux
 10813  		_ = v.Args[2]
 10814  		ptr := v.Args[0]
 10815  		v_1 := v.Args[1]
 10816  		if v_1.Op != OpPPC64MOVHZreg {
 10817  			break
 10818  		}
 10819  		x := v_1.Args[0]
 10820  		mem := v.Args[2]
 10821  		v.reset(OpPPC64MOVHstore)
 10822  		v.AuxInt = off
 10823  		v.Aux = sym
 10824  		v.AddArg(ptr)
 10825  		v.AddArg(x)
 10826  		v.AddArg(mem)
 10827  		return true
 10828  	}
 10829  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 10830  	// cond:
 10831  	// result: (MOVHstore [off] {sym} ptr x mem)
 10832  	for {
 10833  		off := v.AuxInt
 10834  		sym := v.Aux
 10835  		_ = v.Args[2]
 10836  		ptr := v.Args[0]
 10837  		v_1 := v.Args[1]
 10838  		if v_1.Op != OpPPC64MOVWreg {
 10839  			break
 10840  		}
 10841  		x := v_1.Args[0]
 10842  		mem := v.Args[2]
 10843  		v.reset(OpPPC64MOVHstore)
 10844  		v.AuxInt = off
 10845  		v.Aux = sym
 10846  		v.AddArg(ptr)
 10847  		v.AddArg(x)
 10848  		v.AddArg(mem)
 10849  		return true
 10850  	}
 10851  	// match: (MOVHstore [off] {sym} ptr (MOVWZreg x) mem)
 10852  	// cond:
 10853  	// result: (MOVHstore [off] {sym} ptr x mem)
 10854  	for {
 10855  		off := v.AuxInt
 10856  		sym := v.Aux
 10857  		_ = v.Args[2]
 10858  		ptr := v.Args[0]
 10859  		v_1 := v.Args[1]
 10860  		if v_1.Op != OpPPC64MOVWZreg {
 10861  			break
 10862  		}
 10863  		x := v_1.Args[0]
 10864  		mem := v.Args[2]
 10865  		v.reset(OpPPC64MOVHstore)
 10866  		v.AuxInt = off
 10867  		v.Aux = sym
 10868  		v.AddArg(ptr)
 10869  		v.AddArg(x)
 10870  		v.AddArg(mem)
 10871  		return true
 10872  	}
 10873  	// match: (MOVHstore [i1] {s} p (SRWconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10874  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10875  	// result: (MOVWstore [i0] {s} p w mem)
 10876  	for {
 10877  		i1 := v.AuxInt
 10878  		s := v.Aux
 10879  		_ = v.Args[2]
 10880  		p := v.Args[0]
 10881  		v_1 := v.Args[1]
 10882  		if v_1.Op != OpPPC64SRWconst {
 10883  			break
 10884  		}
 10885  		if v_1.AuxInt != 16 {
 10886  			break
 10887  		}
 10888  		w := v_1.Args[0]
 10889  		x0 := v.Args[2]
 10890  		if x0.Op != OpPPC64MOVHstore {
 10891  			break
 10892  		}
 10893  		i0 := x0.AuxInt
 10894  		if x0.Aux != s {
 10895  			break
 10896  		}
 10897  		_ = x0.Args[2]
 10898  		if p != x0.Args[0] {
 10899  			break
 10900  		}
 10901  		if w != x0.Args[1] {
 10902  			break
 10903  		}
 10904  		mem := x0.Args[2]
 10905  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10906  			break
 10907  		}
 10908  		v.reset(OpPPC64MOVWstore)
 10909  		v.AuxInt = i0
 10910  		v.Aux = s
 10911  		v.AddArg(p)
 10912  		v.AddArg(w)
 10913  		v.AddArg(mem)
 10914  		return true
 10915  	}
 10916  	// match: (MOVHstore [i1] {s} p (SRDconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10917  	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10918  	// result: (MOVWstore [i0] {s} p w mem)
 10919  	for {
 10920  		i1 := v.AuxInt
 10921  		s := v.Aux
 10922  		_ = v.Args[2]
 10923  		p := v.Args[0]
 10924  		v_1 := v.Args[1]
 10925  		if v_1.Op != OpPPC64SRDconst {
 10926  			break
 10927  		}
 10928  		if v_1.AuxInt != 16 {
 10929  			break
 10930  		}
 10931  		w := v_1.Args[0]
 10932  		x0 := v.Args[2]
 10933  		if x0.Op != OpPPC64MOVHstore {
 10934  			break
 10935  		}
 10936  		i0 := x0.AuxInt
 10937  		if x0.Aux != s {
 10938  			break
 10939  		}
 10940  		_ = x0.Args[2]
 10941  		if p != x0.Args[0] {
 10942  			break
 10943  		}
 10944  		if w != x0.Args[1] {
 10945  			break
 10946  		}
 10947  		mem := x0.Args[2]
 10948  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10949  			break
 10950  		}
 10951  		v.reset(OpPPC64MOVWstore)
 10952  		v.AuxInt = i0
 10953  		v.Aux = s
 10954  		v.AddArg(p)
 10955  		v.AddArg(w)
 10956  		v.AddArg(mem)
 10957  		return true
 10958  	}
 10959  	return false
 10960  }
 10961  func rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v *Value) bool {
 10962  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 10963  	// cond: is16Bit(c)
 10964  	// result: (MOVHstore [c] ptr val mem)
 10965  	for {
 10966  		_ = v.Args[3]
 10967  		ptr := v.Args[0]
 10968  		v_1 := v.Args[1]
 10969  		if v_1.Op != OpPPC64MOVDconst {
 10970  			break
 10971  		}
 10972  		c := v_1.AuxInt
 10973  		val := v.Args[2]
 10974  		mem := v.Args[3]
 10975  		if !(is16Bit(c)) {
 10976  			break
 10977  		}
 10978  		v.reset(OpPPC64MOVHstore)
 10979  		v.AuxInt = c
 10980  		v.AddArg(ptr)
 10981  		v.AddArg(val)
 10982  		v.AddArg(mem)
 10983  		return true
 10984  	}
 10985  	// match: (MOVHstoreidx (MOVDconst [c]) ptr val mem)
 10986  	// cond: is16Bit(c)
 10987  	// result: (MOVHstore [c] ptr val mem)
 10988  	for {
 10989  		_ = v.Args[3]
 10990  		v_0 := v.Args[0]
 10991  		if v_0.Op != OpPPC64MOVDconst {
 10992  			break
 10993  		}
 10994  		c := v_0.AuxInt
 10995  		ptr := v.Args[1]
 10996  		val := v.Args[2]
 10997  		mem := v.Args[3]
 10998  		if !(is16Bit(c)) {
 10999  			break
 11000  		}
 11001  		v.reset(OpPPC64MOVHstore)
 11002  		v.AuxInt = c
 11003  		v.AddArg(ptr)
 11004  		v.AddArg(val)
 11005  		v.AddArg(mem)
 11006  		return true
 11007  	}
 11008  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
 11009  	// cond:
 11010  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11011  	for {
 11012  		off := v.AuxInt
 11013  		sym := v.Aux
 11014  		_ = v.Args[3]
 11015  		ptr := v.Args[0]
 11016  		idx := v.Args[1]
 11017  		v_2 := v.Args[2]
 11018  		if v_2.Op != OpPPC64MOVHreg {
 11019  			break
 11020  		}
 11021  		x := v_2.Args[0]
 11022  		mem := v.Args[3]
 11023  		v.reset(OpPPC64MOVHstoreidx)
 11024  		v.AuxInt = off
 11025  		v.Aux = sym
 11026  		v.AddArg(ptr)
 11027  		v.AddArg(idx)
 11028  		v.AddArg(x)
 11029  		v.AddArg(mem)
 11030  		return true
 11031  	}
 11032  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
 11033  	// cond:
 11034  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11035  	for {
 11036  		off := v.AuxInt
 11037  		sym := v.Aux
 11038  		_ = v.Args[3]
 11039  		ptr := v.Args[0]
 11040  		idx := v.Args[1]
 11041  		v_2 := v.Args[2]
 11042  		if v_2.Op != OpPPC64MOVHZreg {
 11043  			break
 11044  		}
 11045  		x := v_2.Args[0]
 11046  		mem := v.Args[3]
 11047  		v.reset(OpPPC64MOVHstoreidx)
 11048  		v.AuxInt = off
 11049  		v.Aux = sym
 11050  		v.AddArg(ptr)
 11051  		v.AddArg(idx)
 11052  		v.AddArg(x)
 11053  		v.AddArg(mem)
 11054  		return true
 11055  	}
 11056  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 11057  	// cond:
 11058  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11059  	for {
 11060  		off := v.AuxInt
 11061  		sym := v.Aux
 11062  		_ = v.Args[3]
 11063  		ptr := v.Args[0]
 11064  		idx := v.Args[1]
 11065  		v_2 := v.Args[2]
 11066  		if v_2.Op != OpPPC64MOVWreg {
 11067  			break
 11068  		}
 11069  		x := v_2.Args[0]
 11070  		mem := v.Args[3]
 11071  		v.reset(OpPPC64MOVHstoreidx)
 11072  		v.AuxInt = off
 11073  		v.Aux = sym
 11074  		v.AddArg(ptr)
 11075  		v.AddArg(idx)
 11076  		v.AddArg(x)
 11077  		v.AddArg(mem)
 11078  		return true
 11079  	}
 11080  	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 11081  	// cond:
 11082  	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 11083  	for {
 11084  		off := v.AuxInt
 11085  		sym := v.Aux
 11086  		_ = v.Args[3]
 11087  		ptr := v.Args[0]
 11088  		idx := v.Args[1]
 11089  		v_2 := v.Args[2]
 11090  		if v_2.Op != OpPPC64MOVWZreg {
 11091  			break
 11092  		}
 11093  		x := v_2.Args[0]
 11094  		mem := v.Args[3]
 11095  		v.reset(OpPPC64MOVHstoreidx)
 11096  		v.AuxInt = off
 11097  		v.Aux = sym
 11098  		v.AddArg(ptr)
 11099  		v.AddArg(idx)
 11100  		v.AddArg(x)
 11101  		v.AddArg(mem)
 11102  		return true
 11103  	}
 11104  	return false
 11105  }
 11106  func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
 11107  	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
 11108  	// cond: is16Bit(off1+off2)
 11109  	// result: (MOVHstorezero [off1+off2] {sym} x mem)
 11110  	for {
 11111  		off1 := v.AuxInt
 11112  		sym := v.Aux
 11113  		_ = v.Args[1]
 11114  		v_0 := v.Args[0]
 11115  		if v_0.Op != OpPPC64ADDconst {
 11116  			break
 11117  		}
 11118  		off2 := v_0.AuxInt
 11119  		x := v_0.Args[0]
 11120  		mem := v.Args[1]
 11121  		if !(is16Bit(off1 + off2)) {
 11122  			break
 11123  		}
 11124  		v.reset(OpPPC64MOVHstorezero)
 11125  		v.AuxInt = off1 + off2
 11126  		v.Aux = sym
 11127  		v.AddArg(x)
 11128  		v.AddArg(mem)
 11129  		return true
 11130  	}
 11131  	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 11132  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 11133  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 11134  	for {
 11135  		off1 := v.AuxInt
 11136  		sym1 := v.Aux
 11137  		_ = v.Args[1]
 11138  		p := v.Args[0]
 11139  		if p.Op != OpPPC64MOVDaddr {
 11140  			break
 11141  		}
 11142  		off2 := p.AuxInt
 11143  		sym2 := p.Aux
 11144  		x := p.Args[0]
 11145  		mem := v.Args[1]
 11146  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 11147  			break
 11148  		}
 11149  		v.reset(OpPPC64MOVHstorezero)
 11150  		v.AuxInt = off1 + off2
 11151  		v.Aux = mergeSym(sym1, sym2)
 11152  		v.AddArg(x)
 11153  		v.AddArg(mem)
 11154  		return true
 11155  	}
 11156  	return false
 11157  }
 11158  func rewriteValuePPC64_OpPPC64MOVWBRstore_0(v *Value) bool {
 11159  	// match: (MOVWBRstore {sym} ptr (MOVWreg x) mem)
 11160  	// cond:
 11161  	// result: (MOVWBRstore {sym} ptr x mem)
 11162  	for {
 11163  		sym := v.Aux
 11164  		_ = v.Args[2]
 11165  		ptr := v.Args[0]
 11166  		v_1 := v.Args[1]
 11167  		if v_1.Op != OpPPC64MOVWreg {
 11168  			break
 11169  		}
 11170  		x := v_1.Args[0]
 11171  		mem := v.Args[2]
 11172  		v.reset(OpPPC64MOVWBRstore)
 11173  		v.Aux = sym
 11174  		v.AddArg(ptr)
 11175  		v.AddArg(x)
 11176  		v.AddArg(mem)
 11177  		return true
 11178  	}
 11179  	// match: (MOVWBRstore {sym} ptr (MOVWZreg x) mem)
 11180  	// cond:
 11181  	// result: (MOVWBRstore {sym} ptr x mem)
 11182  	for {
 11183  		sym := v.Aux
 11184  		_ = v.Args[2]
 11185  		ptr := v.Args[0]
 11186  		v_1 := v.Args[1]
 11187  		if v_1.Op != OpPPC64MOVWZreg {
 11188  			break
 11189  		}
 11190  		x := v_1.Args[0]
 11191  		mem := v.Args[2]
 11192  		v.reset(OpPPC64MOVWBRstore)
 11193  		v.Aux = sym
 11194  		v.AddArg(ptr)
 11195  		v.AddArg(x)
 11196  		v.AddArg(mem)
 11197  		return true
 11198  	}
 11199  	return false
 11200  }
 11201  func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
 11202  	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 11203  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11204  	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11205  	for {
 11206  		off1 := v.AuxInt
 11207  		sym1 := v.Aux
 11208  		_ = v.Args[1]
 11209  		p := v.Args[0]
 11210  		if p.Op != OpPPC64MOVDaddr {
 11211  			break
 11212  		}
 11213  		off2 := p.AuxInt
 11214  		sym2 := p.Aux
 11215  		ptr := p.Args[0]
 11216  		mem := v.Args[1]
 11217  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11218  			break
 11219  		}
 11220  		v.reset(OpPPC64MOVWZload)
 11221  		v.AuxInt = off1 + off2
 11222  		v.Aux = mergeSym(sym1, sym2)
 11223  		v.AddArg(ptr)
 11224  		v.AddArg(mem)
 11225  		return true
 11226  	}
 11227  	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
 11228  	// cond: is16Bit(off1+off2)
 11229  	// result: (MOVWZload [off1+off2] {sym} x mem)
 11230  	for {
 11231  		off1 := v.AuxInt
 11232  		sym := v.Aux
 11233  		_ = v.Args[1]
 11234  		v_0 := v.Args[0]
 11235  		if v_0.Op != OpPPC64ADDconst {
 11236  			break
 11237  		}
 11238  		off2 := v_0.AuxInt
 11239  		x := v_0.Args[0]
 11240  		mem := v.Args[1]
 11241  		if !(is16Bit(off1 + off2)) {
 11242  			break
 11243  		}
 11244  		v.reset(OpPPC64MOVWZload)
 11245  		v.AuxInt = off1 + off2
 11246  		v.Aux = sym
 11247  		v.AddArg(x)
 11248  		v.AddArg(mem)
 11249  		return true
 11250  	}
 11251  	// match: (MOVWZload [0] {sym} p:(ADD ptr idx) mem)
 11252  	// cond: sym == nil && p.Uses == 1
 11253  	// result: (MOVWZloadidx ptr idx mem)
 11254  	for {
 11255  		if v.AuxInt != 0 {
 11256  			break
 11257  		}
 11258  		sym := v.Aux
 11259  		_ = v.Args[1]
 11260  		p := v.Args[0]
 11261  		if p.Op != OpPPC64ADD {
 11262  			break
 11263  		}
 11264  		_ = p.Args[1]
 11265  		ptr := p.Args[0]
 11266  		idx := p.Args[1]
 11267  		mem := v.Args[1]
 11268  		if !(sym == nil && p.Uses == 1) {
 11269  			break
 11270  		}
 11271  		v.reset(OpPPC64MOVWZloadidx)
 11272  		v.AddArg(ptr)
 11273  		v.AddArg(idx)
 11274  		v.AddArg(mem)
 11275  		return true
 11276  	}
 11277  	return false
 11278  }
 11279  func rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v *Value) bool {
 11280  	// match: (MOVWZloadidx ptr (MOVDconst [c]) mem)
 11281  	// cond: is16Bit(c)
 11282  	// result: (MOVWZload [c] ptr mem)
 11283  	for {
 11284  		_ = v.Args[2]
 11285  		ptr := v.Args[0]
 11286  		v_1 := v.Args[1]
 11287  		if v_1.Op != OpPPC64MOVDconst {
 11288  			break
 11289  		}
 11290  		c := v_1.AuxInt
 11291  		mem := v.Args[2]
 11292  		if !(is16Bit(c)) {
 11293  			break
 11294  		}
 11295  		v.reset(OpPPC64MOVWZload)
 11296  		v.AuxInt = c
 11297  		v.AddArg(ptr)
 11298  		v.AddArg(mem)
 11299  		return true
 11300  	}
 11301  	// match: (MOVWZloadidx (MOVDconst [c]) ptr mem)
 11302  	// cond: is16Bit(c)
 11303  	// result: (MOVWZload [c] ptr mem)
 11304  	for {
 11305  		_ = v.Args[2]
 11306  		v_0 := v.Args[0]
 11307  		if v_0.Op != OpPPC64MOVDconst {
 11308  			break
 11309  		}
 11310  		c := v_0.AuxInt
 11311  		ptr := v.Args[1]
 11312  		mem := v.Args[2]
 11313  		if !(is16Bit(c)) {
 11314  			break
 11315  		}
 11316  		v.reset(OpPPC64MOVWZload)
 11317  		v.AuxInt = c
 11318  		v.AddArg(ptr)
 11319  		v.AddArg(mem)
 11320  		return true
 11321  	}
 11322  	return false
 11323  }
 11324  func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
 11325  	b := v.Block
 11326  	_ = b
 11327  	typ := &b.Func.Config.Types
 11328  	_ = typ
 11329  	// match: (MOVWZreg y:(ANDconst [c] _))
 11330  	// cond: uint64(c) <= 0xFFFFFFFF
 11331  	// result: y
 11332  	for {
 11333  		y := v.Args[0]
 11334  		if y.Op != OpPPC64ANDconst {
 11335  			break
 11336  		}
 11337  		c := y.AuxInt
 11338  		if !(uint64(c) <= 0xFFFFFFFF) {
 11339  			break
 11340  		}
 11341  		v.reset(OpCopy)
 11342  		v.Type = y.Type
 11343  		v.AddArg(y)
 11344  		return true
 11345  	}
 11346  	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
 11347  	// cond: uint64(c) <= 0xFFFFFFFF
 11348  	// result: y
 11349  	for {
 11350  		y := v.Args[0]
 11351  		if y.Op != OpPPC64AND {
 11352  			break
 11353  		}
 11354  		_ = y.Args[1]
 11355  		y_0 := y.Args[0]
 11356  		if y_0.Op != OpPPC64MOVDconst {
 11357  			break
 11358  		}
 11359  		c := y_0.AuxInt
 11360  		if !(uint64(c) <= 0xFFFFFFFF) {
 11361  			break
 11362  		}
 11363  		v.reset(OpCopy)
 11364  		v.Type = y.Type
 11365  		v.AddArg(y)
 11366  		return true
 11367  	}
 11368  	// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
 11369  	// cond: uint64(c) <= 0xFFFFFFFF
 11370  	// result: y
 11371  	for {
 11372  		y := v.Args[0]
 11373  		if y.Op != OpPPC64AND {
 11374  			break
 11375  		}
 11376  		_ = y.Args[1]
 11377  		y_1 := y.Args[1]
 11378  		if y_1.Op != OpPPC64MOVDconst {
 11379  			break
 11380  		}
 11381  		c := y_1.AuxInt
 11382  		if !(uint64(c) <= 0xFFFFFFFF) {
 11383  			break
 11384  		}
 11385  		v.reset(OpCopy)
 11386  		v.Type = y.Type
 11387  		v.AddArg(y)
 11388  		return true
 11389  	}
 11390  	// match: (MOVWZreg (SRWconst [c] (MOVBZreg x)))
 11391  	// cond:
 11392  	// result: (SRWconst [c] (MOVBZreg x))
 11393  	for {
 11394  		v_0 := v.Args[0]
 11395  		if v_0.Op != OpPPC64SRWconst {
 11396  			break
 11397  		}
 11398  		c := v_0.AuxInt
 11399  		v_0_0 := v_0.Args[0]
 11400  		if v_0_0.Op != OpPPC64MOVBZreg {
 11401  			break
 11402  		}
 11403  		x := v_0_0.Args[0]
 11404  		v.reset(OpPPC64SRWconst)
 11405  		v.AuxInt = c
 11406  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 11407  		v0.AddArg(x)
 11408  		v.AddArg(v0)
 11409  		return true
 11410  	}
 11411  	// match: (MOVWZreg (SRWconst [c] (MOVHZreg x)))
 11412  	// cond:
 11413  	// result: (SRWconst [c] (MOVHZreg x))
 11414  	for {
 11415  		v_0 := v.Args[0]
 11416  		if v_0.Op != OpPPC64SRWconst {
 11417  			break
 11418  		}
 11419  		c := v_0.AuxInt
 11420  		v_0_0 := v_0.Args[0]
 11421  		if v_0_0.Op != OpPPC64MOVHZreg {
 11422  			break
 11423  		}
 11424  		x := v_0_0.Args[0]
 11425  		v.reset(OpPPC64SRWconst)
 11426  		v.AuxInt = c
 11427  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 11428  		v0.AddArg(x)
 11429  		v.AddArg(v0)
 11430  		return true
 11431  	}
 11432  	// match: (MOVWZreg (SRWconst [c] (MOVWZreg x)))
 11433  	// cond:
 11434  	// result: (SRWconst [c] (MOVWZreg x))
 11435  	for {
 11436  		v_0 := v.Args[0]
 11437  		if v_0.Op != OpPPC64SRWconst {
 11438  			break
 11439  		}
 11440  		c := v_0.AuxInt
 11441  		v_0_0 := v_0.Args[0]
 11442  		if v_0_0.Op != OpPPC64MOVWZreg {
 11443  			break
 11444  		}
 11445  		x := v_0_0.Args[0]
 11446  		v.reset(OpPPC64SRWconst)
 11447  		v.AuxInt = c
 11448  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 11449  		v0.AddArg(x)
 11450  		v.AddArg(v0)
 11451  		return true
 11452  	}
 11453  	// match: (MOVWZreg (SRWconst [c] x))
 11454  	// cond: sizeof(x.Type) <= 32
 11455  	// result: (SRWconst [c] x)
 11456  	for {
 11457  		v_0 := v.Args[0]
 11458  		if v_0.Op != OpPPC64SRWconst {
 11459  			break
 11460  		}
 11461  		c := v_0.AuxInt
 11462  		x := v_0.Args[0]
 11463  		if !(sizeof(x.Type) <= 32) {
 11464  			break
 11465  		}
 11466  		v.reset(OpPPC64SRWconst)
 11467  		v.AuxInt = c
 11468  		v.AddArg(x)
 11469  		return true
 11470  	}
 11471  	// match: (MOVWZreg (SRDconst [c] x))
 11472  	// cond: c>=32
 11473  	// result: (SRDconst [c] x)
 11474  	for {
 11475  		v_0 := v.Args[0]
 11476  		if v_0.Op != OpPPC64SRDconst {
 11477  			break
 11478  		}
 11479  		c := v_0.AuxInt
 11480  		x := v_0.Args[0]
 11481  		if !(c >= 32) {
 11482  			break
 11483  		}
 11484  		v.reset(OpPPC64SRDconst)
 11485  		v.AuxInt = c
 11486  		v.AddArg(x)
 11487  		return true
 11488  	}
 11489  	// match: (MOVWZreg y:(MOVWZreg _))
 11490  	// cond:
 11491  	// result: y
 11492  	for {
 11493  		y := v.Args[0]
 11494  		if y.Op != OpPPC64MOVWZreg {
 11495  			break
 11496  		}
 11497  		v.reset(OpCopy)
 11498  		v.Type = y.Type
 11499  		v.AddArg(y)
 11500  		return true
 11501  	}
 11502  	// match: (MOVWZreg y:(MOVHZreg _))
 11503  	// cond:
 11504  	// result: y
 11505  	for {
 11506  		y := v.Args[0]
 11507  		if y.Op != OpPPC64MOVHZreg {
 11508  			break
 11509  		}
 11510  		v.reset(OpCopy)
 11511  		v.Type = y.Type
 11512  		v.AddArg(y)
 11513  		return true
 11514  	}
 11515  	return false
 11516  }
 11517  func rewriteValuePPC64_OpPPC64MOVWZreg_10(v *Value) bool {
 11518  	// match: (MOVWZreg y:(MOVBZreg _))
 11519  	// cond:
 11520  	// result: y
 11521  	for {
 11522  		y := v.Args[0]
 11523  		if y.Op != OpPPC64MOVBZreg {
 11524  			break
 11525  		}
 11526  		v.reset(OpCopy)
 11527  		v.Type = y.Type
 11528  		v.AddArg(y)
 11529  		return true
 11530  	}
 11531  	// match: (MOVWZreg y:(MOVHBRload _ _))
 11532  	// cond:
 11533  	// result: y
 11534  	for {
 11535  		y := v.Args[0]
 11536  		if y.Op != OpPPC64MOVHBRload {
 11537  			break
 11538  		}
 11539  		_ = y.Args[1]
 11540  		v.reset(OpCopy)
 11541  		v.Type = y.Type
 11542  		v.AddArg(y)
 11543  		return true
 11544  	}
 11545  	// match: (MOVWZreg y:(MOVWBRload _ _))
 11546  	// cond:
 11547  	// result: y
 11548  	for {
 11549  		y := v.Args[0]
 11550  		if y.Op != OpPPC64MOVWBRload {
 11551  			break
 11552  		}
 11553  		_ = y.Args[1]
 11554  		v.reset(OpCopy)
 11555  		v.Type = y.Type
 11556  		v.AddArg(y)
 11557  		return true
 11558  	}
 11559  	// match: (MOVWZreg y:(MOVWreg x))
 11560  	// cond:
 11561  	// result: (MOVWZreg x)
 11562  	for {
 11563  		y := v.Args[0]
 11564  		if y.Op != OpPPC64MOVWreg {
 11565  			break
 11566  		}
 11567  		x := y.Args[0]
 11568  		v.reset(OpPPC64MOVWZreg)
 11569  		v.AddArg(x)
 11570  		return true
 11571  	}
 11572  	// match: (MOVWZreg x:(MOVBZload _ _))
 11573  	// cond:
 11574  	// result: x
 11575  	for {
 11576  		x := v.Args[0]
 11577  		if x.Op != OpPPC64MOVBZload {
 11578  			break
 11579  		}
 11580  		_ = x.Args[1]
 11581  		v.reset(OpCopy)
 11582  		v.Type = x.Type
 11583  		v.AddArg(x)
 11584  		return true
 11585  	}
 11586  	// match: (MOVWZreg x:(MOVBZloadidx _ _ _))
 11587  	// cond:
 11588  	// result: x
 11589  	for {
 11590  		x := v.Args[0]
 11591  		if x.Op != OpPPC64MOVBZloadidx {
 11592  			break
 11593  		}
 11594  		_ = x.Args[2]
 11595  		v.reset(OpCopy)
 11596  		v.Type = x.Type
 11597  		v.AddArg(x)
 11598  		return true
 11599  	}
 11600  	// match: (MOVWZreg x:(MOVHZload _ _))
 11601  	// cond:
 11602  	// result: x
 11603  	for {
 11604  		x := v.Args[0]
 11605  		if x.Op != OpPPC64MOVHZload {
 11606  			break
 11607  		}
 11608  		_ = x.Args[1]
 11609  		v.reset(OpCopy)
 11610  		v.Type = x.Type
 11611  		v.AddArg(x)
 11612  		return true
 11613  	}
 11614  	// match: (MOVWZreg x:(MOVHZloadidx _ _ _))
 11615  	// cond:
 11616  	// result: x
 11617  	for {
 11618  		x := v.Args[0]
 11619  		if x.Op != OpPPC64MOVHZloadidx {
 11620  			break
 11621  		}
 11622  		_ = x.Args[2]
 11623  		v.reset(OpCopy)
 11624  		v.Type = x.Type
 11625  		v.AddArg(x)
 11626  		return true
 11627  	}
 11628  	// match: (MOVWZreg x:(MOVWZload _ _))
 11629  	// cond:
 11630  	// result: x
 11631  	for {
 11632  		x := v.Args[0]
 11633  		if x.Op != OpPPC64MOVWZload {
 11634  			break
 11635  		}
 11636  		_ = x.Args[1]
 11637  		v.reset(OpCopy)
 11638  		v.Type = x.Type
 11639  		v.AddArg(x)
 11640  		return true
 11641  	}
 11642  	// match: (MOVWZreg x:(MOVWZloadidx _ _ _))
 11643  	// cond:
 11644  	// result: x
 11645  	for {
 11646  		x := v.Args[0]
 11647  		if x.Op != OpPPC64MOVWZloadidx {
 11648  			break
 11649  		}
 11650  		_ = x.Args[2]
 11651  		v.reset(OpCopy)
 11652  		v.Type = x.Type
 11653  		v.AddArg(x)
 11654  		return true
 11655  	}
 11656  	return false
 11657  }
 11658  func rewriteValuePPC64_OpPPC64MOVWZreg_20(v *Value) bool {
 11659  	// match: (MOVWZreg x:(Arg <t>))
 11660  	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)
 11661  	// result: x
 11662  	for {
 11663  		x := v.Args[0]
 11664  		if x.Op != OpArg {
 11665  			break
 11666  		}
 11667  		t := x.Type
 11668  		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) {
 11669  			break
 11670  		}
 11671  		v.reset(OpCopy)
 11672  		v.Type = x.Type
 11673  		v.AddArg(x)
 11674  		return true
 11675  	}
 11676  	// match: (MOVWZreg (MOVDconst [c]))
 11677  	// cond:
 11678  	// result: (MOVDconst [int64(uint32(c))])
 11679  	for {
 11680  		v_0 := v.Args[0]
 11681  		if v_0.Op != OpPPC64MOVDconst {
 11682  			break
 11683  		}
 11684  		c := v_0.AuxInt
 11685  		v.reset(OpPPC64MOVDconst)
 11686  		v.AuxInt = int64(uint32(c))
 11687  		return true
 11688  	}
 11689  	return false
 11690  }
 11691  func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
 11692  	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 11693  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11694  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11695  	for {
 11696  		off1 := v.AuxInt
 11697  		sym1 := v.Aux
 11698  		_ = v.Args[1]
 11699  		p := v.Args[0]
 11700  		if p.Op != OpPPC64MOVDaddr {
 11701  			break
 11702  		}
 11703  		off2 := p.AuxInt
 11704  		sym2 := p.Aux
 11705  		ptr := p.Args[0]
 11706  		mem := v.Args[1]
 11707  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11708  			break
 11709  		}
 11710  		v.reset(OpPPC64MOVWload)
 11711  		v.AuxInt = off1 + off2
 11712  		v.Aux = mergeSym(sym1, sym2)
 11713  		v.AddArg(ptr)
 11714  		v.AddArg(mem)
 11715  		return true
 11716  	}
 11717  	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
 11718  	// cond: is16Bit(off1+off2)
 11719  	// result: (MOVWload [off1+off2] {sym} x mem)
 11720  	for {
 11721  		off1 := v.AuxInt
 11722  		sym := v.Aux
 11723  		_ = v.Args[1]
 11724  		v_0 := v.Args[0]
 11725  		if v_0.Op != OpPPC64ADDconst {
 11726  			break
 11727  		}
 11728  		off2 := v_0.AuxInt
 11729  		x := v_0.Args[0]
 11730  		mem := v.Args[1]
 11731  		if !(is16Bit(off1 + off2)) {
 11732  			break
 11733  		}
 11734  		v.reset(OpPPC64MOVWload)
 11735  		v.AuxInt = off1 + off2
 11736  		v.Aux = sym
 11737  		v.AddArg(x)
 11738  		v.AddArg(mem)
 11739  		return true
 11740  	}
 11741  	// match: (MOVWload [0] {sym} p:(ADD ptr idx) mem)
 11742  	// cond: sym == nil && p.Uses == 1
 11743  	// result: (MOVWloadidx ptr idx mem)
 11744  	for {
 11745  		if v.AuxInt != 0 {
 11746  			break
 11747  		}
 11748  		sym := v.Aux
 11749  		_ = v.Args[1]
 11750  		p := v.Args[0]
 11751  		if p.Op != OpPPC64ADD {
 11752  			break
 11753  		}
 11754  		_ = p.Args[1]
 11755  		ptr := p.Args[0]
 11756  		idx := p.Args[1]
 11757  		mem := v.Args[1]
 11758  		if !(sym == nil && p.Uses == 1) {
 11759  			break
 11760  		}
 11761  		v.reset(OpPPC64MOVWloadidx)
 11762  		v.AddArg(ptr)
 11763  		v.AddArg(idx)
 11764  		v.AddArg(mem)
 11765  		return true
 11766  	}
 11767  	return false
 11768  }
 11769  func rewriteValuePPC64_OpPPC64MOVWloadidx_0(v *Value) bool {
 11770  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 11771  	// cond: is16Bit(c)
 11772  	// result: (MOVWload [c] ptr mem)
 11773  	for {
 11774  		_ = v.Args[2]
 11775  		ptr := v.Args[0]
 11776  		v_1 := v.Args[1]
 11777  		if v_1.Op != OpPPC64MOVDconst {
 11778  			break
 11779  		}
 11780  		c := v_1.AuxInt
 11781  		mem := v.Args[2]
 11782  		if !(is16Bit(c)) {
 11783  			break
 11784  		}
 11785  		v.reset(OpPPC64MOVWload)
 11786  		v.AuxInt = c
 11787  		v.AddArg(ptr)
 11788  		v.AddArg(mem)
 11789  		return true
 11790  	}
 11791  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 11792  	// cond: is16Bit(c)
 11793  	// result: (MOVWload [c] ptr mem)
 11794  	for {
 11795  		_ = v.Args[2]
 11796  		v_0 := v.Args[0]
 11797  		if v_0.Op != OpPPC64MOVDconst {
 11798  			break
 11799  		}
 11800  		c := v_0.AuxInt
 11801  		ptr := v.Args[1]
 11802  		mem := v.Args[2]
 11803  		if !(is16Bit(c)) {
 11804  			break
 11805  		}
 11806  		v.reset(OpPPC64MOVWload)
 11807  		v.AuxInt = c
 11808  		v.AddArg(ptr)
 11809  		v.AddArg(mem)
 11810  		return true
 11811  	}
 11812  	return false
 11813  }
 11814  func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
 11815  	b := v.Block
 11816  	_ = b
 11817  	typ := &b.Func.Config.Types
 11818  	_ = typ
 11819  	// match: (MOVWreg y:(ANDconst [c] _))
 11820  	// cond: uint64(c) <= 0xFFFF
 11821  	// result: y
 11822  	for {
 11823  		y := v.Args[0]
 11824  		if y.Op != OpPPC64ANDconst {
 11825  			break
 11826  		}
 11827  		c := y.AuxInt
 11828  		if !(uint64(c) <= 0xFFFF) {
 11829  			break
 11830  		}
 11831  		v.reset(OpCopy)
 11832  		v.Type = y.Type
 11833  		v.AddArg(y)
 11834  		return true
 11835  	}
 11836  	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
 11837  	// cond: uint64(c) <= 0x7FFFFFFF
 11838  	// result: y
 11839  	for {
 11840  		y := v.Args[0]
 11841  		if y.Op != OpPPC64AND {
 11842  			break
 11843  		}
 11844  		_ = y.Args[1]
 11845  		y_0 := y.Args[0]
 11846  		if y_0.Op != OpPPC64MOVDconst {
 11847  			break
 11848  		}
 11849  		c := y_0.AuxInt
 11850  		if !(uint64(c) <= 0x7FFFFFFF) {
 11851  			break
 11852  		}
 11853  		v.reset(OpCopy)
 11854  		v.Type = y.Type
 11855  		v.AddArg(y)
 11856  		return true
 11857  	}
 11858  	// match: (MOVWreg y:(AND _ (MOVDconst [c])))
 11859  	// cond: uint64(c) <= 0x7FFFFFFF
 11860  	// result: y
 11861  	for {
 11862  		y := v.Args[0]
 11863  		if y.Op != OpPPC64AND {
 11864  			break
 11865  		}
 11866  		_ = y.Args[1]
 11867  		y_1 := y.Args[1]
 11868  		if y_1.Op != OpPPC64MOVDconst {
 11869  			break
 11870  		}
 11871  		c := y_1.AuxInt
 11872  		if !(uint64(c) <= 0x7FFFFFFF) {
 11873  			break
 11874  		}
 11875  		v.reset(OpCopy)
 11876  		v.Type = y.Type
 11877  		v.AddArg(y)
 11878  		return true
 11879  	}
 11880  	// match: (MOVWreg (SRAWconst [c] (MOVBreg x)))
 11881  	// cond:
 11882  	// result: (SRAWconst [c] (MOVBreg x))
 11883  	for {
 11884  		v_0 := v.Args[0]
 11885  		if v_0.Op != OpPPC64SRAWconst {
 11886  			break
 11887  		}
 11888  		c := v_0.AuxInt
 11889  		v_0_0 := v_0.Args[0]
 11890  		if v_0_0.Op != OpPPC64MOVBreg {
 11891  			break
 11892  		}
 11893  		x := v_0_0.Args[0]
 11894  		v.reset(OpPPC64SRAWconst)
 11895  		v.AuxInt = c
 11896  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 11897  		v0.AddArg(x)
 11898  		v.AddArg(v0)
 11899  		return true
 11900  	}
 11901  	// match: (MOVWreg (SRAWconst [c] (MOVHreg x)))
 11902  	// cond:
 11903  	// result: (SRAWconst [c] (MOVHreg x))
 11904  	for {
 11905  		v_0 := v.Args[0]
 11906  		if v_0.Op != OpPPC64SRAWconst {
 11907  			break
 11908  		}
 11909  		c := v_0.AuxInt
 11910  		v_0_0 := v_0.Args[0]
 11911  		if v_0_0.Op != OpPPC64MOVHreg {
 11912  			break
 11913  		}
 11914  		x := v_0_0.Args[0]
 11915  		v.reset(OpPPC64SRAWconst)
 11916  		v.AuxInt = c
 11917  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 11918  		v0.AddArg(x)
 11919  		v.AddArg(v0)
 11920  		return true
 11921  	}
 11922  	// match: (MOVWreg (SRAWconst [c] (MOVWreg x)))
 11923  	// cond:
 11924  	// result: (SRAWconst [c] (MOVWreg x))
 11925  	for {
 11926  		v_0 := v.Args[0]
 11927  		if v_0.Op != OpPPC64SRAWconst {
 11928  			break
 11929  		}
 11930  		c := v_0.AuxInt
 11931  		v_0_0 := v_0.Args[0]
 11932  		if v_0_0.Op != OpPPC64MOVWreg {
 11933  			break
 11934  		}
 11935  		x := v_0_0.Args[0]
 11936  		v.reset(OpPPC64SRAWconst)
 11937  		v.AuxInt = c
 11938  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWreg, typ.Int64)
 11939  		v0.AddArg(x)
 11940  		v.AddArg(v0)
 11941  		return true
 11942  	}
 11943  	// match: (MOVWreg (SRAWconst [c] x))
 11944  	// cond: sizeof(x.Type) <= 32
 11945  	// result: (SRAWconst [c] x)
 11946  	for {
 11947  		v_0 := v.Args[0]
 11948  		if v_0.Op != OpPPC64SRAWconst {
 11949  			break
 11950  		}
 11951  		c := v_0.AuxInt
 11952  		x := v_0.Args[0]
 11953  		if !(sizeof(x.Type) <= 32) {
 11954  			break
 11955  		}
 11956  		v.reset(OpPPC64SRAWconst)
 11957  		v.AuxInt = c
 11958  		v.AddArg(x)
 11959  		return true
 11960  	}
 11961  	// match: (MOVWreg (SRDconst [c] x))
 11962  	// cond: c>32
 11963  	// result: (SRDconst [c] x)
 11964  	for {
 11965  		v_0 := v.Args[0]
 11966  		if v_0.Op != OpPPC64SRDconst {
 11967  			break
 11968  		}
 11969  		c := v_0.AuxInt
 11970  		x := v_0.Args[0]
 11971  		if !(c > 32) {
 11972  			break
 11973  		}
 11974  		v.reset(OpPPC64SRDconst)
 11975  		v.AuxInt = c
 11976  		v.AddArg(x)
 11977  		return true
 11978  	}
 11979  	// match: (MOVWreg (SRDconst [c] x))
 11980  	// cond: c==32
 11981  	// result: (SRADconst [c] x)
 11982  	for {
 11983  		v_0 := v.Args[0]
 11984  		if v_0.Op != OpPPC64SRDconst {
 11985  			break
 11986  		}
 11987  		c := v_0.AuxInt
 11988  		x := v_0.Args[0]
 11989  		if !(c == 32) {
 11990  			break
 11991  		}
 11992  		v.reset(OpPPC64SRADconst)
 11993  		v.AuxInt = c
 11994  		v.AddArg(x)
 11995  		return true
 11996  	}
 11997  	// match: (MOVWreg y:(MOVWreg _))
 11998  	// cond:
 11999  	// result: y
 12000  	for {
 12001  		y := v.Args[0]
 12002  		if y.Op != OpPPC64MOVWreg {
 12003  			break
 12004  		}
 12005  		v.reset(OpCopy)
 12006  		v.Type = y.Type
 12007  		v.AddArg(y)
 12008  		return true
 12009  	}
 12010  	return false
 12011  }
 12012  func rewriteValuePPC64_OpPPC64MOVWreg_10(v *Value) bool {
 12013  	// match: (MOVWreg y:(MOVHreg _))
 12014  	// cond:
 12015  	// result: y
 12016  	for {
 12017  		y := v.Args[0]
 12018  		if y.Op != OpPPC64MOVHreg {
 12019  			break
 12020  		}
 12021  		v.reset(OpCopy)
 12022  		v.Type = y.Type
 12023  		v.AddArg(y)
 12024  		return true
 12025  	}
 12026  	// match: (MOVWreg y:(MOVBreg _))
 12027  	// cond:
 12028  	// result: y
 12029  	for {
 12030  		y := v.Args[0]
 12031  		if y.Op != OpPPC64MOVBreg {
 12032  			break
 12033  		}
 12034  		v.reset(OpCopy)
 12035  		v.Type = y.Type
 12036  		v.AddArg(y)
 12037  		return true
 12038  	}
 12039  	// match: (MOVWreg y:(MOVWZreg x))
 12040  	// cond:
 12041  	// result: (MOVWreg x)
 12042  	for {
 12043  		y := v.Args[0]
 12044  		if y.Op != OpPPC64MOVWZreg {
 12045  			break
 12046  		}
 12047  		x := y.Args[0]
 12048  		v.reset(OpPPC64MOVWreg)
 12049  		v.AddArg(x)
 12050  		return true
 12051  	}
 12052  	// match: (MOVWreg x:(MOVHload _ _))
 12053  	// cond:
 12054  	// result: x
 12055  	for {
 12056  		x := v.Args[0]
 12057  		if x.Op != OpPPC64MOVHload {
 12058  			break
 12059  		}
 12060  		_ = x.Args[1]
 12061  		v.reset(OpCopy)
 12062  		v.Type = x.Type
 12063  		v.AddArg(x)
 12064  		return true
 12065  	}
 12066  	// match: (MOVWreg x:(MOVHloadidx _ _ _))
 12067  	// cond:
 12068  	// result: x
 12069  	for {
 12070  		x := v.Args[0]
 12071  		if x.Op != OpPPC64MOVHloadidx {
 12072  			break
 12073  		}
 12074  		_ = x.Args[2]
 12075  		v.reset(OpCopy)
 12076  		v.Type = x.Type
 12077  		v.AddArg(x)
 12078  		return true
 12079  	}
 12080  	// match: (MOVWreg x:(MOVWload _ _))
 12081  	// cond:
 12082  	// result: x
 12083  	for {
 12084  		x := v.Args[0]
 12085  		if x.Op != OpPPC64MOVWload {
 12086  			break
 12087  		}
 12088  		_ = x.Args[1]
 12089  		v.reset(OpCopy)
 12090  		v.Type = x.Type
 12091  		v.AddArg(x)
 12092  		return true
 12093  	}
 12094  	// match: (MOVWreg x:(MOVWloadidx _ _ _))
 12095  	// cond:
 12096  	// result: x
 12097  	for {
 12098  		x := v.Args[0]
 12099  		if x.Op != OpPPC64MOVWloadidx {
 12100  			break
 12101  		}
 12102  		_ = x.Args[2]
 12103  		v.reset(OpCopy)
 12104  		v.Type = x.Type
 12105  		v.AddArg(x)
 12106  		return true
 12107  	}
 12108  	// match: (MOVWreg x:(Arg <t>))
 12109  	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)
 12110  	// result: x
 12111  	for {
 12112  		x := v.Args[0]
 12113  		if x.Op != OpArg {
 12114  			break
 12115  		}
 12116  		t := x.Type
 12117  		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) {
 12118  			break
 12119  		}
 12120  		v.reset(OpCopy)
 12121  		v.Type = x.Type
 12122  		v.AddArg(x)
 12123  		return true
 12124  	}
 12125  	// match: (MOVWreg (MOVDconst [c]))
 12126  	// cond:
 12127  	// result: (MOVDconst [int64(int32(c))])
 12128  	for {
 12129  		v_0 := v.Args[0]
 12130  		if v_0.Op != OpPPC64MOVDconst {
 12131  			break
 12132  		}
 12133  		c := v_0.AuxInt
 12134  		v.reset(OpPPC64MOVDconst)
 12135  		v.AuxInt = int64(int32(c))
 12136  		return true
 12137  	}
 12138  	return false
 12139  }
 12140  func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
 12141  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
 12142  	// cond: is16Bit(off1+off2)
 12143  	// result: (MOVWstore [off1+off2] {sym} x val mem)
 12144  	for {
 12145  		off1 := v.AuxInt
 12146  		sym := v.Aux
 12147  		_ = v.Args[2]
 12148  		v_0 := v.Args[0]
 12149  		if v_0.Op != OpPPC64ADDconst {
 12150  			break
 12151  		}
 12152  		off2 := v_0.AuxInt
 12153  		x := v_0.Args[0]
 12154  		val := v.Args[1]
 12155  		mem := v.Args[2]
 12156  		if !(is16Bit(off1 + off2)) {
 12157  			break
 12158  		}
 12159  		v.reset(OpPPC64MOVWstore)
 12160  		v.AuxInt = off1 + off2
 12161  		v.Aux = sym
 12162  		v.AddArg(x)
 12163  		v.AddArg(val)
 12164  		v.AddArg(mem)
 12165  		return true
 12166  	}
 12167  	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 12168  	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 12169  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 12170  	for {
 12171  		off1 := v.AuxInt
 12172  		sym1 := v.Aux
 12173  		_ = v.Args[2]
 12174  		p := v.Args[0]
 12175  		if p.Op != OpPPC64MOVDaddr {
 12176  			break
 12177  		}
 12178  		off2 := p.AuxInt
 12179  		sym2 := p.Aux
 12180  		ptr := p.Args[0]
 12181  		val := v.Args[1]
 12182  		mem := v.Args[2]
 12183  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 12184  			break
 12185  		}
 12186  		v.reset(OpPPC64MOVWstore)
 12187  		v.AuxInt = off1 + off2
 12188  		v.Aux = mergeSym(sym1, sym2)
 12189  		v.AddArg(ptr)
 12190  		v.AddArg(val)
 12191  		v.AddArg(mem)
 12192  		return true
 12193  	}
 12194  	// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
 12195  	// cond:
 12196  	// result: (MOVWstorezero [off] {sym} ptr mem)
 12197  	for {
 12198  		off := v.AuxInt
 12199  		sym := v.Aux
 12200  		_ = v.Args[2]
 12201  		ptr := v.Args[0]
 12202  		v_1 := v.Args[1]
 12203  		if v_1.Op != OpPPC64MOVDconst {
 12204  			break
 12205  		}
 12206  		if v_1.AuxInt != 0 {
 12207  			break
 12208  		}
 12209  		mem := v.Args[2]
 12210  		v.reset(OpPPC64MOVWstorezero)
 12211  		v.AuxInt = off
 12212  		v.Aux = sym
 12213  		v.AddArg(ptr)
 12214  		v.AddArg(mem)
 12215  		return true
 12216  	}
 12217  	// match: (MOVWstore [off] {sym} p:(ADD ptr idx) val mem)
 12218  	// cond: off == 0 && sym == nil && p.Uses == 1
 12219  	// result: (MOVWstoreidx ptr idx val mem)
 12220  	for {
 12221  		off := v.AuxInt
 12222  		sym := v.Aux
 12223  		_ = v.Args[2]
 12224  		p := v.Args[0]
 12225  		if p.Op != OpPPC64ADD {
 12226  			break
 12227  		}
 12228  		_ = p.Args[1]
 12229  		ptr := p.Args[0]
 12230  		idx := p.Args[1]
 12231  		val := v.Args[1]
 12232  		mem := v.Args[2]
 12233  		if !(off == 0 && sym == nil && p.Uses == 1) {
 12234  			break
 12235  		}
 12236  		v.reset(OpPPC64MOVWstoreidx)
 12237  		v.AddArg(ptr)
 12238  		v.AddArg(idx)
 12239  		v.AddArg(val)
 12240  		v.AddArg(mem)
 12241  		return true
 12242  	}
 12243  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 12244  	// cond:
 12245  	// result: (MOVWstore [off] {sym} ptr x mem)
 12246  	for {
 12247  		off := v.AuxInt
 12248  		sym := v.Aux
 12249  		_ = v.Args[2]
 12250  		ptr := v.Args[0]
 12251  		v_1 := v.Args[1]
 12252  		if v_1.Op != OpPPC64MOVWreg {
 12253  			break
 12254  		}
 12255  		x := v_1.Args[0]
 12256  		mem := v.Args[2]
 12257  		v.reset(OpPPC64MOVWstore)
 12258  		v.AuxInt = off
 12259  		v.Aux = sym
 12260  		v.AddArg(ptr)
 12261  		v.AddArg(x)
 12262  		v.AddArg(mem)
 12263  		return true
 12264  	}
 12265  	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
 12266  	// cond:
 12267  	// result: (MOVWstore [off] {sym} ptr x mem)
 12268  	for {
 12269  		off := v.AuxInt
 12270  		sym := v.Aux
 12271  		_ = v.Args[2]
 12272  		ptr := v.Args[0]
 12273  		v_1 := v.Args[1]
 12274  		if v_1.Op != OpPPC64MOVWZreg {
 12275  			break
 12276  		}
 12277  		x := v_1.Args[0]
 12278  		mem := v.Args[2]
 12279  		v.reset(OpPPC64MOVWstore)
 12280  		v.AuxInt = off
 12281  		v.Aux = sym
 12282  		v.AddArg(ptr)
 12283  		v.AddArg(x)
 12284  		v.AddArg(mem)
 12285  		return true
 12286  	}
 12287  	return false
 12288  }
 12289  func rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v *Value) bool {
 12290  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 12291  	// cond: is16Bit(c)
 12292  	// result: (MOVWstore [c] ptr val mem)
 12293  	for {
 12294  		_ = v.Args[3]
 12295  		ptr := v.Args[0]
 12296  		v_1 := v.Args[1]
 12297  		if v_1.Op != OpPPC64MOVDconst {
 12298  			break
 12299  		}
 12300  		c := v_1.AuxInt
 12301  		val := v.Args[2]
 12302  		mem := v.Args[3]
 12303  		if !(is16Bit(c)) {
 12304  			break
 12305  		}
 12306  		v.reset(OpPPC64MOVWstore)
 12307  		v.AuxInt = c
 12308  		v.AddArg(ptr)
 12309  		v.AddArg(val)
 12310  		v.AddArg(mem)
 12311  		return true
 12312  	}
 12313  	// match: (MOVWstoreidx (MOVDconst [c]) ptr val mem)
 12314  	// cond: is16Bit(c)
 12315  	// result: (MOVWstore [c] ptr val mem)
 12316  	for {
 12317  		_ = v.Args[3]
 12318  		v_0 := v.Args[0]
 12319  		if v_0.Op != OpPPC64MOVDconst {
 12320  			break
 12321  		}
 12322  		c := v_0.AuxInt
 12323  		ptr := v.Args[1]
 12324  		val := v.Args[2]
 12325  		mem := v.Args[3]
 12326  		if !(is16Bit(c)) {
 12327  			break
 12328  		}
 12329  		v.reset(OpPPC64MOVWstore)
 12330  		v.AuxInt = c
 12331  		v.AddArg(ptr)
 12332  		v.AddArg(val)
 12333  		v.AddArg(mem)
 12334  		return true
 12335  	}
 12336  	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 12337  	// cond:
 12338  	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 12339  	for {
 12340  		off := v.AuxInt
 12341  		sym := v.Aux
 12342  		_ = v.Args[3]
 12343  		ptr := v.Args[0]
 12344  		idx := v.Args[1]
 12345  		v_2 := v.Args[2]
 12346  		if v_2.Op != OpPPC64MOVWreg {
 12347  			break
 12348  		}
 12349  		x := v_2.Args[0]
 12350  		mem := v.Args[3]
 12351  		v.reset(OpPPC64MOVWstoreidx)
 12352  		v.AuxInt = off
 12353  		v.Aux = sym
 12354  		v.AddArg(ptr)
 12355  		v.AddArg(idx)
 12356  		v.AddArg(x)
 12357  		v.AddArg(mem)
 12358  		return true
 12359  	}
 12360  	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 12361  	// cond:
 12362  	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 12363  	for {
 12364  		off := v.AuxInt
 12365  		sym := v.Aux
 12366  		_ = v.Args[3]
 12367  		ptr := v.Args[0]
 12368  		idx := v.Args[1]
 12369  		v_2 := v.Args[2]
 12370  		if v_2.Op != OpPPC64MOVWZreg {
 12371  			break
 12372  		}
 12373  		x := v_2.Args[0]
 12374  		mem := v.Args[3]
 12375  		v.reset(OpPPC64MOVWstoreidx)
 12376  		v.AuxInt = off
 12377  		v.Aux = sym
 12378  		v.AddArg(ptr)
 12379  		v.AddArg(idx)
 12380  		v.AddArg(x)
 12381  		v.AddArg(mem)
 12382  		return true
 12383  	}
 12384  	return false
 12385  }
 12386  func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
 12387  	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
 12388  	// cond: is16Bit(off1+off2)
 12389  	// result: (MOVWstorezero [off1+off2] {sym} x mem)
 12390  	for {
 12391  		off1 := v.AuxInt
 12392  		sym := v.Aux
 12393  		_ = v.Args[1]
 12394  		v_0 := v.Args[0]
 12395  		if v_0.Op != OpPPC64ADDconst {
 12396  			break
 12397  		}
 12398  		off2 := v_0.AuxInt
 12399  		x := v_0.Args[0]
 12400  		mem := v.Args[1]
 12401  		if !(is16Bit(off1 + off2)) {
 12402  			break
 12403  		}
 12404  		v.reset(OpPPC64MOVWstorezero)
 12405  		v.AuxInt = off1 + off2
 12406  		v.Aux = sym
 12407  		v.AddArg(x)
 12408  		v.AddArg(mem)
 12409  		return true
 12410  	}
 12411  	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 12412  	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 12413  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 12414  	for {
 12415  		off1 := v.AuxInt
 12416  		sym1 := v.Aux
 12417  		_ = v.Args[1]
 12418  		p := v.Args[0]
 12419  		if p.Op != OpPPC64MOVDaddr {
 12420  			break
 12421  		}
 12422  		off2 := p.AuxInt
 12423  		sym2 := p.Aux
 12424  		x := p.Args[0]
 12425  		mem := v.Args[1]
 12426  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 12427  			break
 12428  		}
 12429  		v.reset(OpPPC64MOVWstorezero)
 12430  		v.AuxInt = off1 + off2
 12431  		v.Aux = mergeSym(sym1, sym2)
 12432  		v.AddArg(x)
 12433  		v.AddArg(mem)
 12434  		return true
 12435  	}
 12436  	return false
 12437  }
 12438  func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
 12439  	b := v.Block
 12440  	_ = b
 12441  	typ := &b.Func.Config.Types
 12442  	_ = typ
 12443  	// match: (MTVSRD (MOVDconst [c]))
 12444  	// cond:
 12445  	// result: (FMOVDconst [c])
 12446  	for {
 12447  		v_0 := v.Args[0]
 12448  		if v_0.Op != OpPPC64MOVDconst {
 12449  			break
 12450  		}
 12451  		c := v_0.AuxInt
 12452  		v.reset(OpPPC64FMOVDconst)
 12453  		v.AuxInt = c
 12454  		return true
 12455  	}
 12456  	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
 12457  	// cond: x.Uses == 1 && clobber(x)
 12458  	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
 12459  	for {
 12460  		x := v.Args[0]
 12461  		if x.Op != OpPPC64MOVDload {
 12462  			break
 12463  		}
 12464  		off := x.AuxInt
 12465  		sym := x.Aux
 12466  		_ = x.Args[1]
 12467  		ptr := x.Args[0]
 12468  		mem := x.Args[1]
 12469  		if !(x.Uses == 1 && clobber(x)) {
 12470  			break
 12471  		}
 12472  		b = x.Block
 12473  		v0 := b.NewValue0(x.Pos, OpPPC64FMOVDload, typ.Float64)
 12474  		v.reset(OpCopy)
 12475  		v.AddArg(v0)
 12476  		v0.AuxInt = off
 12477  		v0.Aux = sym
 12478  		v0.AddArg(ptr)
 12479  		v0.AddArg(mem)
 12480  		return true
 12481  	}
 12482  	return false
 12483  }
 12484  func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
 12485  	// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
 12486  	// cond: c < 0 && d > 0 && c + d < 0
 12487  	// result: (MOVDconst [-1])
 12488  	for {
 12489  		v_0 := v.Args[0]
 12490  		if v_0.Op != OpPPC64ADDconstForCarry {
 12491  			break
 12492  		}
 12493  		c := v_0.AuxInt
 12494  		v_0_0 := v_0.Args[0]
 12495  		if v_0_0.Op != OpPPC64ANDconst {
 12496  			break
 12497  		}
 12498  		d := v_0_0.AuxInt
 12499  		if !(c < 0 && d > 0 && c+d < 0) {
 12500  			break
 12501  		}
 12502  		v.reset(OpPPC64MOVDconst)
 12503  		v.AuxInt = -1
 12504  		return true
 12505  	}
 12506  	return false
 12507  }
 12508  func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
 12509  	// match: (NotEqual (FlagEQ))
 12510  	// cond:
 12511  	// result: (MOVDconst [0])
 12512  	for {
 12513  		v_0 := v.Args[0]
 12514  		if v_0.Op != OpPPC64FlagEQ {
 12515  			break
 12516  		}
 12517  		v.reset(OpPPC64MOVDconst)
 12518  		v.AuxInt = 0
 12519  		return true
 12520  	}
 12521  	// match: (NotEqual (FlagLT))
 12522  	// cond:
 12523  	// result: (MOVDconst [1])
 12524  	for {
 12525  		v_0 := v.Args[0]
 12526  		if v_0.Op != OpPPC64FlagLT {
 12527  			break
 12528  		}
 12529  		v.reset(OpPPC64MOVDconst)
 12530  		v.AuxInt = 1
 12531  		return true
 12532  	}
 12533  	// match: (NotEqual (FlagGT))
 12534  	// cond:
 12535  	// result: (MOVDconst [1])
 12536  	for {
 12537  		v_0 := v.Args[0]
 12538  		if v_0.Op != OpPPC64FlagGT {
 12539  			break
 12540  		}
 12541  		v.reset(OpPPC64MOVDconst)
 12542  		v.AuxInt = 1
 12543  		return true
 12544  	}
 12545  	// match: (NotEqual (InvertFlags x))
 12546  	// cond:
 12547  	// result: (NotEqual x)
 12548  	for {
 12549  		v_0 := v.Args[0]
 12550  		if v_0.Op != OpPPC64InvertFlags {
 12551  			break
 12552  		}
 12553  		x := v_0.Args[0]
 12554  		v.reset(OpPPC64NotEqual)
 12555  		v.AddArg(x)
 12556  		return true
 12557  	}
 12558  	return false
 12559  }
 12560  func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
 12561  	b := v.Block
 12562  	_ = b
 12563  	typ := &b.Func.Config.Types
 12564  	_ = typ
 12565  	// match: (OR (SLDconst x [c]) (SRDconst x [d]))
 12566  	// cond: d == 64-c
 12567  	// result: (ROTLconst [c] x)
 12568  	for {
 12569  		_ = v.Args[1]
 12570  		v_0 := v.Args[0]
 12571  		if v_0.Op != OpPPC64SLDconst {
 12572  			break
 12573  		}
 12574  		c := v_0.AuxInt
 12575  		x := v_0.Args[0]
 12576  		v_1 := v.Args[1]
 12577  		if v_1.Op != OpPPC64SRDconst {
 12578  			break
 12579  		}
 12580  		d := v_1.AuxInt
 12581  		if x != v_1.Args[0] {
 12582  			break
 12583  		}
 12584  		if !(d == 64-c) {
 12585  			break
 12586  		}
 12587  		v.reset(OpPPC64ROTLconst)
 12588  		v.AuxInt = c
 12589  		v.AddArg(x)
 12590  		return true
 12591  	}
 12592  	// match: (OR (SRDconst x [d]) (SLDconst x [c]))
 12593  	// cond: d == 64-c
 12594  	// result: (ROTLconst [c] x)
 12595  	for {
 12596  		_ = v.Args[1]
 12597  		v_0 := v.Args[0]
 12598  		if v_0.Op != OpPPC64SRDconst {
 12599  			break
 12600  		}
 12601  		d := v_0.AuxInt
 12602  		x := v_0.Args[0]
 12603  		v_1 := v.Args[1]
 12604  		if v_1.Op != OpPPC64SLDconst {
 12605  			break
 12606  		}
 12607  		c := v_1.AuxInt
 12608  		if x != v_1.Args[0] {
 12609  			break
 12610  		}
 12611  		if !(d == 64-c) {
 12612  			break
 12613  		}
 12614  		v.reset(OpPPC64ROTLconst)
 12615  		v.AuxInt = c
 12616  		v.AddArg(x)
 12617  		return true
 12618  	}
 12619  	// match: (OR (SLWconst x [c]) (SRWconst x [d]))
 12620  	// cond: d == 32-c
 12621  	// result: (ROTLWconst [c] x)
 12622  	for {
 12623  		_ = v.Args[1]
 12624  		v_0 := v.Args[0]
 12625  		if v_0.Op != OpPPC64SLWconst {
 12626  			break
 12627  		}
 12628  		c := v_0.AuxInt
 12629  		x := v_0.Args[0]
 12630  		v_1 := v.Args[1]
 12631  		if v_1.Op != OpPPC64SRWconst {
 12632  			break
 12633  		}
 12634  		d := v_1.AuxInt
 12635  		if x != v_1.Args[0] {
 12636  			break
 12637  		}
 12638  		if !(d == 32-c) {
 12639  			break
 12640  		}
 12641  		v.reset(OpPPC64ROTLWconst)
 12642  		v.AuxInt = c
 12643  		v.AddArg(x)
 12644  		return true
 12645  	}
 12646  	// match: (OR (SRWconst x [d]) (SLWconst x [c]))
 12647  	// cond: d == 32-c
 12648  	// result: (ROTLWconst [c] x)
 12649  	for {
 12650  		_ = v.Args[1]
 12651  		v_0 := v.Args[0]
 12652  		if v_0.Op != OpPPC64SRWconst {
 12653  			break
 12654  		}
 12655  		d := v_0.AuxInt
 12656  		x := v_0.Args[0]
 12657  		v_1 := v.Args[1]
 12658  		if v_1.Op != OpPPC64SLWconst {
 12659  			break
 12660  		}
 12661  		c := v_1.AuxInt
 12662  		if x != v_1.Args[0] {
 12663  			break
 12664  		}
 12665  		if !(d == 32-c) {
 12666  			break
 12667  		}
 12668  		v.reset(OpPPC64ROTLWconst)
 12669  		v.AuxInt = c
 12670  		v.AddArg(x)
 12671  		return true
 12672  	}
 12673  	// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 12674  	// cond:
 12675  	// result: (ROTL x y)
 12676  	for {
 12677  		_ = v.Args[1]
 12678  		v_0 := v.Args[0]
 12679  		if v_0.Op != OpPPC64SLD {
 12680  			break
 12681  		}
 12682  		_ = v_0.Args[1]
 12683  		x := v_0.Args[0]
 12684  		v_0_1 := v_0.Args[1]
 12685  		if v_0_1.Op != OpPPC64ANDconst {
 12686  			break
 12687  		}
 12688  		if v_0_1.Type != typ.Int64 {
 12689  			break
 12690  		}
 12691  		if v_0_1.AuxInt != 63 {
 12692  			break
 12693  		}
 12694  		y := v_0_1.Args[0]
 12695  		v_1 := v.Args[1]
 12696  		if v_1.Op != OpPPC64SRD {
 12697  			break
 12698  		}
 12699  		_ = v_1.Args[1]
 12700  		if x != v_1.Args[0] {
 12701  			break
 12702  		}
 12703  		v_1_1 := v_1.Args[1]
 12704  		if v_1_1.Op != OpPPC64SUB {
 12705  			break
 12706  		}
 12707  		if v_1_1.Type != typ.UInt {
 12708  			break
 12709  		}
 12710  		_ = v_1_1.Args[1]
 12711  		v_1_1_0 := v_1_1.Args[0]
 12712  		if v_1_1_0.Op != OpPPC64MOVDconst {
 12713  			break
 12714  		}
 12715  		if v_1_1_0.AuxInt != 64 {
 12716  			break
 12717  		}
 12718  		v_1_1_1 := v_1_1.Args[1]
 12719  		if v_1_1_1.Op != OpPPC64ANDconst {
 12720  			break
 12721  		}
 12722  		if v_1_1_1.Type != typ.UInt {
 12723  			break
 12724  		}
 12725  		if v_1_1_1.AuxInt != 63 {
 12726  			break
 12727  		}
 12728  		if y != v_1_1_1.Args[0] {
 12729  			break
 12730  		}
 12731  		v.reset(OpPPC64ROTL)
 12732  		v.AddArg(x)
 12733  		v.AddArg(y)
 12734  		return true
 12735  	}
 12736  	// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 12737  	// cond:
 12738  	// result: (ROTL x y)
 12739  	for {
 12740  		_ = v.Args[1]
 12741  		v_0 := v.Args[0]
 12742  		if v_0.Op != OpPPC64SRD {
 12743  			break
 12744  		}
 12745  		_ = v_0.Args[1]
 12746  		x := v_0.Args[0]
 12747  		v_0_1 := v_0.Args[1]
 12748  		if v_0_1.Op != OpPPC64SUB {
 12749  			break
 12750  		}
 12751  		if v_0_1.Type != typ.UInt {
 12752  			break
 12753  		}
 12754  		_ = v_0_1.Args[1]
 12755  		v_0_1_0 := v_0_1.Args[0]
 12756  		if v_0_1_0.Op != OpPPC64MOVDconst {
 12757  			break
 12758  		}
 12759  		if v_0_1_0.AuxInt != 64 {
 12760  			break
 12761  		}
 12762  		v_0_1_1 := v_0_1.Args[1]
 12763  		if v_0_1_1.Op != OpPPC64ANDconst {
 12764  			break
 12765  		}
 12766  		if v_0_1_1.Type != typ.UInt {
 12767  			break
 12768  		}
 12769  		if v_0_1_1.AuxInt != 63 {
 12770  			break
 12771  		}
 12772  		y := v_0_1_1.Args[0]
 12773  		v_1 := v.Args[1]
 12774  		if v_1.Op != OpPPC64SLD {
 12775  			break
 12776  		}
 12777  		_ = v_1.Args[1]
 12778  		if x != v_1.Args[0] {
 12779  			break
 12780  		}
 12781  		v_1_1 := v_1.Args[1]
 12782  		if v_1_1.Op != OpPPC64ANDconst {
 12783  			break
 12784  		}
 12785  		if v_1_1.Type != typ.Int64 {
 12786  			break
 12787  		}
 12788  		if v_1_1.AuxInt != 63 {
 12789  			break
 12790  		}
 12791  		if y != v_1_1.Args[0] {
 12792  			break
 12793  		}
 12794  		v.reset(OpPPC64ROTL)
 12795  		v.AddArg(x)
 12796  		v.AddArg(y)
 12797  		return true
 12798  	}
 12799  	// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 12800  	// cond:
 12801  	// result: (ROTLW x y)
 12802  	for {
 12803  		_ = v.Args[1]
 12804  		v_0 := v.Args[0]
 12805  		if v_0.Op != OpPPC64SLW {
 12806  			break
 12807  		}
 12808  		_ = v_0.Args[1]
 12809  		x := v_0.Args[0]
 12810  		v_0_1 := v_0.Args[1]
 12811  		if v_0_1.Op != OpPPC64ANDconst {
 12812  			break
 12813  		}
 12814  		if v_0_1.Type != typ.Int32 {
 12815  			break
 12816  		}
 12817  		if v_0_1.AuxInt != 31 {
 12818  			break
 12819  		}
 12820  		y := v_0_1.Args[0]
 12821  		v_1 := v.Args[1]
 12822  		if v_1.Op != OpPPC64SRW {
 12823  			break
 12824  		}
 12825  		_ = v_1.Args[1]
 12826  		if x != v_1.Args[0] {
 12827  			break
 12828  		}
 12829  		v_1_1 := v_1.Args[1]
 12830  		if v_1_1.Op != OpPPC64SUB {
 12831  			break
 12832  		}
 12833  		if v_1_1.Type != typ.UInt {
 12834  			break
 12835  		}
 12836  		_ = v_1_1.Args[1]
 12837  		v_1_1_0 := v_1_1.Args[0]
 12838  		if v_1_1_0.Op != OpPPC64MOVDconst {
 12839  			break
 12840  		}
 12841  		if v_1_1_0.AuxInt != 32 {
 12842  			break
 12843  		}
 12844  		v_1_1_1 := v_1_1.Args[1]
 12845  		if v_1_1_1.Op != OpPPC64ANDconst {
 12846  			break
 12847  		}
 12848  		if v_1_1_1.Type != typ.UInt {
 12849  			break
 12850  		}
 12851  		if v_1_1_1.AuxInt != 31 {
 12852  			break
 12853  		}
 12854  		if y != v_1_1_1.Args[0] {
 12855  			break
 12856  		}
 12857  		v.reset(OpPPC64ROTLW)
 12858  		v.AddArg(x)
 12859  		v.AddArg(y)
 12860  		return true
 12861  	}
 12862  	// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 12863  	// cond:
 12864  	// result: (ROTLW x y)
 12865  	for {
 12866  		_ = v.Args[1]
 12867  		v_0 := v.Args[0]
 12868  		if v_0.Op != OpPPC64SRW {
 12869  			break
 12870  		}
 12871  		_ = v_0.Args[1]
 12872  		x := v_0.Args[0]
 12873  		v_0_1 := v_0.Args[1]
 12874  		if v_0_1.Op != OpPPC64SUB {
 12875  			break
 12876  		}
 12877  		if v_0_1.Type != typ.UInt {
 12878  			break
 12879  		}
 12880  		_ = v_0_1.Args[1]
 12881  		v_0_1_0 := v_0_1.Args[0]
 12882  		if v_0_1_0.Op != OpPPC64MOVDconst {
 12883  			break
 12884  		}
 12885  		if v_0_1_0.AuxInt != 32 {
 12886  			break
 12887  		}
 12888  		v_0_1_1 := v_0_1.Args[1]
 12889  		if v_0_1_1.Op != OpPPC64ANDconst {
 12890  			break
 12891  		}
 12892  		if v_0_1_1.Type != typ.UInt {
 12893  			break
 12894  		}
 12895  		if v_0_1_1.AuxInt != 31 {
 12896  			break
 12897  		}
 12898  		y := v_0_1_1.Args[0]
 12899  		v_1 := v.Args[1]
 12900  		if v_1.Op != OpPPC64SLW {
 12901  			break
 12902  		}
 12903  		_ = v_1.Args[1]
 12904  		if x != v_1.Args[0] {
 12905  			break
 12906  		}
 12907  		v_1_1 := v_1.Args[1]
 12908  		if v_1_1.Op != OpPPC64ANDconst {
 12909  			break
 12910  		}
 12911  		if v_1_1.Type != typ.Int32 {
 12912  			break
 12913  		}
 12914  		if v_1_1.AuxInt != 31 {
 12915  			break
 12916  		}
 12917  		if y != v_1_1.Args[0] {
 12918  			break
 12919  		}
 12920  		v.reset(OpPPC64ROTLW)
 12921  		v.AddArg(x)
 12922  		v.AddArg(y)
 12923  		return true
 12924  	}
 12925  	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
 12926  	// cond:
 12927  	// result: (MOVDconst [c|d])
 12928  	for {
 12929  		_ = v.Args[1]
 12930  		v_0 := v.Args[0]
 12931  		if v_0.Op != OpPPC64MOVDconst {
 12932  			break
 12933  		}
 12934  		c := v_0.AuxInt
 12935  		v_1 := v.Args[1]
 12936  		if v_1.Op != OpPPC64MOVDconst {
 12937  			break
 12938  		}
 12939  		d := v_1.AuxInt
 12940  		v.reset(OpPPC64MOVDconst)
 12941  		v.AuxInt = c | d
 12942  		return true
 12943  	}
 12944  	// match: (OR (MOVDconst [d]) (MOVDconst [c]))
 12945  	// cond:
 12946  	// result: (MOVDconst [c|d])
 12947  	for {
 12948  		_ = v.Args[1]
 12949  		v_0 := v.Args[0]
 12950  		if v_0.Op != OpPPC64MOVDconst {
 12951  			break
 12952  		}
 12953  		d := v_0.AuxInt
 12954  		v_1 := v.Args[1]
 12955  		if v_1.Op != OpPPC64MOVDconst {
 12956  			break
 12957  		}
 12958  		c := v_1.AuxInt
 12959  		v.reset(OpPPC64MOVDconst)
 12960  		v.AuxInt = c | d
 12961  		return true
 12962  	}
 12963  	return false
 12964  }
 12965  func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
 12966  	b := v.Block
 12967  	_ = b
 12968  	config := b.Func.Config
 12969  	_ = config
 12970  	typ := &b.Func.Config.Types
 12971  	_ = typ
 12972  	// match: (OR x (MOVDconst [c]))
 12973  	// cond: isU32Bit(c)
 12974  	// result: (ORconst [c] x)
 12975  	for {
 12976  		_ = v.Args[1]
 12977  		x := v.Args[0]
 12978  		v_1 := v.Args[1]
 12979  		if v_1.Op != OpPPC64MOVDconst {
 12980  			break
 12981  		}
 12982  		c := v_1.AuxInt
 12983  		if !(isU32Bit(c)) {
 12984  			break
 12985  		}
 12986  		v.reset(OpPPC64ORconst)
 12987  		v.AuxInt = c
 12988  		v.AddArg(x)
 12989  		return true
 12990  	}
 12991  	// match: (OR (MOVDconst [c]) x)
 12992  	// cond: isU32Bit(c)
 12993  	// result: (ORconst [c] x)
 12994  	for {
 12995  		_ = v.Args[1]
 12996  		v_0 := v.Args[0]
 12997  		if v_0.Op != OpPPC64MOVDconst {
 12998  			break
 12999  		}
 13000  		c := v_0.AuxInt
 13001  		x := v.Args[1]
 13002  		if !(isU32Bit(c)) {
 13003  			break
 13004  		}
 13005  		v.reset(OpPPC64ORconst)
 13006  		v.AuxInt = c
 13007  		v.AddArg(x)
 13008  		return true
 13009  	}
 13010  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
 13011  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13012  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13013  	for {
 13014  		t := v.Type
 13015  		_ = v.Args[1]
 13016  		x0 := v.Args[0]
 13017  		if x0.Op != OpPPC64MOVBZload {
 13018  			break
 13019  		}
 13020  		i0 := x0.AuxInt
 13021  		s := x0.Aux
 13022  		_ = x0.Args[1]
 13023  		p := x0.Args[0]
 13024  		mem := x0.Args[1]
 13025  		o1 := v.Args[1]
 13026  		if o1.Op != OpPPC64SLWconst {
 13027  			break
 13028  		}
 13029  		if o1.AuxInt != 8 {
 13030  			break
 13031  		}
 13032  		x1 := o1.Args[0]
 13033  		if x1.Op != OpPPC64MOVBZload {
 13034  			break
 13035  		}
 13036  		i1 := x1.AuxInt
 13037  		if x1.Aux != s {
 13038  			break
 13039  		}
 13040  		_ = x1.Args[1]
 13041  		if p != x1.Args[0] {
 13042  			break
 13043  		}
 13044  		if mem != x1.Args[1] {
 13045  			break
 13046  		}
 13047  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13048  			break
 13049  		}
 13050  		b = mergePoint(b, x0, x1)
 13051  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
 13052  		v.reset(OpCopy)
 13053  		v.AddArg(v0)
 13054  		v0.AuxInt = i0
 13055  		v0.Aux = s
 13056  		v0.AddArg(p)
 13057  		v0.AddArg(mem)
 13058  		return true
 13059  	}
 13060  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 13061  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13062  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13063  	for {
 13064  		t := v.Type
 13065  		_ = v.Args[1]
 13066  		o1 := v.Args[0]
 13067  		if o1.Op != OpPPC64SLWconst {
 13068  			break
 13069  		}
 13070  		if o1.AuxInt != 8 {
 13071  			break
 13072  		}
 13073  		x1 := o1.Args[0]
 13074  		if x1.Op != OpPPC64MOVBZload {
 13075  			break
 13076  		}
 13077  		i1 := x1.AuxInt
 13078  		s := x1.Aux
 13079  		_ = x1.Args[1]
 13080  		p := x1.Args[0]
 13081  		mem := x1.Args[1]
 13082  		x0 := v.Args[1]
 13083  		if x0.Op != OpPPC64MOVBZload {
 13084  			break
 13085  		}
 13086  		i0 := x0.AuxInt
 13087  		if x0.Aux != s {
 13088  			break
 13089  		}
 13090  		_ = x0.Args[1]
 13091  		if p != x0.Args[0] {
 13092  			break
 13093  		}
 13094  		if mem != x0.Args[1] {
 13095  			break
 13096  		}
 13097  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13098  			break
 13099  		}
 13100  		b = mergePoint(b, x0, x1)
 13101  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
 13102  		v.reset(OpCopy)
 13103  		v.AddArg(v0)
 13104  		v0.AuxInt = i0
 13105  		v0.Aux = s
 13106  		v0.AddArg(p)
 13107  		v0.AddArg(mem)
 13108  		return true
 13109  	}
 13110  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))
 13111  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13112  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13113  	for {
 13114  		t := v.Type
 13115  		_ = v.Args[1]
 13116  		x0 := v.Args[0]
 13117  		if x0.Op != OpPPC64MOVBZload {
 13118  			break
 13119  		}
 13120  		i0 := x0.AuxInt
 13121  		s := x0.Aux
 13122  		_ = x0.Args[1]
 13123  		p := x0.Args[0]
 13124  		mem := x0.Args[1]
 13125  		o1 := v.Args[1]
 13126  		if o1.Op != OpPPC64SLDconst {
 13127  			break
 13128  		}
 13129  		if o1.AuxInt != 8 {
 13130  			break
 13131  		}
 13132  		x1 := o1.Args[0]
 13133  		if x1.Op != OpPPC64MOVBZload {
 13134  			break
 13135  		}
 13136  		i1 := x1.AuxInt
 13137  		if x1.Aux != s {
 13138  			break
 13139  		}
 13140  		_ = x1.Args[1]
 13141  		if p != x1.Args[0] {
 13142  			break
 13143  		}
 13144  		if mem != x1.Args[1] {
 13145  			break
 13146  		}
 13147  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13148  			break
 13149  		}
 13150  		b = mergePoint(b, x0, x1)
 13151  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
 13152  		v.reset(OpCopy)
 13153  		v.AddArg(v0)
 13154  		v0.AuxInt = i0
 13155  		v0.Aux = s
 13156  		v0.AddArg(p)
 13157  		v0.AddArg(mem)
 13158  		return true
 13159  	}
 13160  	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 13161  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13162  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 13163  	for {
 13164  		t := v.Type
 13165  		_ = v.Args[1]
 13166  		o1 := v.Args[0]
 13167  		if o1.Op != OpPPC64SLDconst {
 13168  			break
 13169  		}
 13170  		if o1.AuxInt != 8 {
 13171  			break
 13172  		}
 13173  		x1 := o1.Args[0]
 13174  		if x1.Op != OpPPC64MOVBZload {
 13175  			break
 13176  		}
 13177  		i1 := x1.AuxInt
 13178  		s := x1.Aux
 13179  		_ = x1.Args[1]
 13180  		p := x1.Args[0]
 13181  		mem := x1.Args[1]
 13182  		x0 := v.Args[1]
 13183  		if x0.Op != OpPPC64MOVBZload {
 13184  			break
 13185  		}
 13186  		i0 := x0.AuxInt
 13187  		if x0.Aux != s {
 13188  			break
 13189  		}
 13190  		_ = x0.Args[1]
 13191  		if p != x0.Args[0] {
 13192  			break
 13193  		}
 13194  		if mem != x0.Args[1] {
 13195  			break
 13196  		}
 13197  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13198  			break
 13199  		}
 13200  		b = mergePoint(b, x0, x1)
 13201  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
 13202  		v.reset(OpCopy)
 13203  		v.AddArg(v0)
 13204  		v0.AuxInt = i0
 13205  		v0.Aux = s
 13206  		v0.AddArg(p)
 13207  		v0.AddArg(mem)
 13208  		return true
 13209  	}
 13210  	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]))
 13211  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13212  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13213  	for {
 13214  		t := v.Type
 13215  		_ = v.Args[1]
 13216  		x0 := v.Args[0]
 13217  		if x0.Op != OpPPC64MOVBZload {
 13218  			break
 13219  		}
 13220  		i1 := x0.AuxInt
 13221  		s := x0.Aux
 13222  		_ = x0.Args[1]
 13223  		p := x0.Args[0]
 13224  		mem := x0.Args[1]
 13225  		o1 := v.Args[1]
 13226  		if o1.Op != OpPPC64SLWconst {
 13227  			break
 13228  		}
 13229  		if o1.AuxInt != 8 {
 13230  			break
 13231  		}
 13232  		x1 := o1.Args[0]
 13233  		if x1.Op != OpPPC64MOVBZload {
 13234  			break
 13235  		}
 13236  		i0 := x1.AuxInt
 13237  		if x1.Aux != s {
 13238  			break
 13239  		}
 13240  		_ = x1.Args[1]
 13241  		if p != x1.Args[0] {
 13242  			break
 13243  		}
 13244  		if mem != x1.Args[1] {
 13245  			break
 13246  		}
 13247  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13248  			break
 13249  		}
 13250  		b = mergePoint(b, x0, x1)
 13251  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 13252  		v.reset(OpCopy)
 13253  		v.AddArg(v0)
 13254  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13255  		v1.AuxInt = i0
 13256  		v1.Aux = s
 13257  		v1.AddArg(p)
 13258  		v0.AddArg(v1)
 13259  		v0.AddArg(mem)
 13260  		return true
 13261  	}
 13262  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 13263  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13264  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13265  	for {
 13266  		t := v.Type
 13267  		_ = v.Args[1]
 13268  		o1 := v.Args[0]
 13269  		if o1.Op != OpPPC64SLWconst {
 13270  			break
 13271  		}
 13272  		if o1.AuxInt != 8 {
 13273  			break
 13274  		}
 13275  		x1 := o1.Args[0]
 13276  		if x1.Op != OpPPC64MOVBZload {
 13277  			break
 13278  		}
 13279  		i0 := x1.AuxInt
 13280  		s := x1.Aux
 13281  		_ = x1.Args[1]
 13282  		p := x1.Args[0]
 13283  		mem := x1.Args[1]
 13284  		x0 := v.Args[1]
 13285  		if x0.Op != OpPPC64MOVBZload {
 13286  			break
 13287  		}
 13288  		i1 := x0.AuxInt
 13289  		if x0.Aux != s {
 13290  			break
 13291  		}
 13292  		_ = x0.Args[1]
 13293  		if p != x0.Args[0] {
 13294  			break
 13295  		}
 13296  		if mem != x0.Args[1] {
 13297  			break
 13298  		}
 13299  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13300  			break
 13301  		}
 13302  		b = mergePoint(b, x0, x1)
 13303  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13304  		v.reset(OpCopy)
 13305  		v.AddArg(v0)
 13306  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13307  		v1.AuxInt = i0
 13308  		v1.Aux = s
 13309  		v1.AddArg(p)
 13310  		v0.AddArg(v1)
 13311  		v0.AddArg(mem)
 13312  		return true
 13313  	}
 13314  	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]))
 13315  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13316  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13317  	for {
 13318  		t := v.Type
 13319  		_ = v.Args[1]
 13320  		x0 := v.Args[0]
 13321  		if x0.Op != OpPPC64MOVBZload {
 13322  			break
 13323  		}
 13324  		i1 := x0.AuxInt
 13325  		s := x0.Aux
 13326  		_ = x0.Args[1]
 13327  		p := x0.Args[0]
 13328  		mem := x0.Args[1]
 13329  		o1 := v.Args[1]
 13330  		if o1.Op != OpPPC64SLDconst {
 13331  			break
 13332  		}
 13333  		if o1.AuxInt != 8 {
 13334  			break
 13335  		}
 13336  		x1 := o1.Args[0]
 13337  		if x1.Op != OpPPC64MOVBZload {
 13338  			break
 13339  		}
 13340  		i0 := x1.AuxInt
 13341  		if x1.Aux != s {
 13342  			break
 13343  		}
 13344  		_ = x1.Args[1]
 13345  		if p != x1.Args[0] {
 13346  			break
 13347  		}
 13348  		if mem != x1.Args[1] {
 13349  			break
 13350  		}
 13351  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13352  			break
 13353  		}
 13354  		b = mergePoint(b, x0, x1)
 13355  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 13356  		v.reset(OpCopy)
 13357  		v.AddArg(v0)
 13358  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13359  		v1.AuxInt = i0
 13360  		v1.Aux = s
 13361  		v1.AddArg(p)
 13362  		v0.AddArg(v1)
 13363  		v0.AddArg(mem)
 13364  		return true
 13365  	}
 13366  	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 13367  	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 13368  	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13369  	for {
 13370  		t := v.Type
 13371  		_ = v.Args[1]
 13372  		o1 := v.Args[0]
 13373  		if o1.Op != OpPPC64SLDconst {
 13374  			break
 13375  		}
 13376  		if o1.AuxInt != 8 {
 13377  			break
 13378  		}
 13379  		x1 := o1.Args[0]
 13380  		if x1.Op != OpPPC64MOVBZload {
 13381  			break
 13382  		}
 13383  		i0 := x1.AuxInt
 13384  		s := x1.Aux
 13385  		_ = x1.Args[1]
 13386  		p := x1.Args[0]
 13387  		mem := x1.Args[1]
 13388  		x0 := v.Args[1]
 13389  		if x0.Op != OpPPC64MOVBZload {
 13390  			break
 13391  		}
 13392  		i1 := x0.AuxInt
 13393  		if x0.Aux != s {
 13394  			break
 13395  		}
 13396  		_ = x0.Args[1]
 13397  		if p != x0.Args[0] {
 13398  			break
 13399  		}
 13400  		if mem != x0.Args[1] {
 13401  			break
 13402  		}
 13403  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 13404  			break
 13405  		}
 13406  		b = mergePoint(b, x0, x1)
 13407  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13408  		v.reset(OpCopy)
 13409  		v.AddArg(v0)
 13410  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13411  		v1.AuxInt = i0
 13412  		v1.Aux = s
 13413  		v1.AddArg(p)
 13414  		v0.AddArg(v1)
 13415  		v0.AddArg(mem)
 13416  		return true
 13417  	}
 13418  	return false
 13419  }
 13420  func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
 13421  	b := v.Block
 13422  	_ = b
 13423  	config := b.Func.Config
 13424  	_ = config
 13425  	typ := &b.Func.Config.Types
 13426  	_ = typ
 13427  	// match: (OR <t> s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 13428  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13429  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13430  	for {
 13431  		t := v.Type
 13432  		_ = v.Args[1]
 13433  		s0 := v.Args[0]
 13434  		if s0.Op != OpPPC64SLWconst {
 13435  			break
 13436  		}
 13437  		n1 := s0.AuxInt
 13438  		x0 := s0.Args[0]
 13439  		if x0.Op != OpPPC64MOVBZload {
 13440  			break
 13441  		}
 13442  		i1 := x0.AuxInt
 13443  		s := x0.Aux
 13444  		_ = x0.Args[1]
 13445  		p := x0.Args[0]
 13446  		mem := x0.Args[1]
 13447  		s1 := v.Args[1]
 13448  		if s1.Op != OpPPC64SLWconst {
 13449  			break
 13450  		}
 13451  		n2 := s1.AuxInt
 13452  		x1 := s1.Args[0]
 13453  		if x1.Op != OpPPC64MOVBZload {
 13454  			break
 13455  		}
 13456  		i0 := x1.AuxInt
 13457  		if x1.Aux != s {
 13458  			break
 13459  		}
 13460  		_ = x1.Args[1]
 13461  		if p != x1.Args[0] {
 13462  			break
 13463  		}
 13464  		if mem != x1.Args[1] {
 13465  			break
 13466  		}
 13467  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13468  			break
 13469  		}
 13470  		b = mergePoint(b, x0, x1)
 13471  		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 13472  		v.reset(OpCopy)
 13473  		v.AddArg(v0)
 13474  		v0.AuxInt = n1
 13475  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 13476  		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13477  		v2.AuxInt = i0
 13478  		v2.Aux = s
 13479  		v2.AddArg(p)
 13480  		v1.AddArg(v2)
 13481  		v1.AddArg(mem)
 13482  		v0.AddArg(v1)
 13483  		return true
 13484  	}
 13485  	// match: (OR <t> s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13486  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13487  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13488  	for {
 13489  		t := v.Type
 13490  		_ = v.Args[1]
 13491  		s1 := v.Args[0]
 13492  		if s1.Op != OpPPC64SLWconst {
 13493  			break
 13494  		}
 13495  		n2 := s1.AuxInt
 13496  		x1 := s1.Args[0]
 13497  		if x1.Op != OpPPC64MOVBZload {
 13498  			break
 13499  		}
 13500  		i0 := x1.AuxInt
 13501  		s := x1.Aux
 13502  		_ = x1.Args[1]
 13503  		p := x1.Args[0]
 13504  		mem := x1.Args[1]
 13505  		s0 := v.Args[1]
 13506  		if s0.Op != OpPPC64SLWconst {
 13507  			break
 13508  		}
 13509  		n1 := s0.AuxInt
 13510  		x0 := s0.Args[0]
 13511  		if x0.Op != OpPPC64MOVBZload {
 13512  			break
 13513  		}
 13514  		i1 := x0.AuxInt
 13515  		if x0.Aux != s {
 13516  			break
 13517  		}
 13518  		_ = x0.Args[1]
 13519  		if p != x0.Args[0] {
 13520  			break
 13521  		}
 13522  		if mem != x0.Args[1] {
 13523  			break
 13524  		}
 13525  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13526  			break
 13527  		}
 13528  		b = mergePoint(b, x0, x1)
 13529  		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 13530  		v.reset(OpCopy)
 13531  		v.AddArg(v0)
 13532  		v0.AuxInt = n1
 13533  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13534  		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13535  		v2.AuxInt = i0
 13536  		v2.Aux = s
 13537  		v2.AddArg(p)
 13538  		v1.AddArg(v2)
 13539  		v1.AddArg(mem)
 13540  		v0.AddArg(v1)
 13541  		return true
 13542  	}
 13543  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 13544  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13545  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13546  	for {
 13547  		t := v.Type
 13548  		_ = v.Args[1]
 13549  		s0 := v.Args[0]
 13550  		if s0.Op != OpPPC64SLDconst {
 13551  			break
 13552  		}
 13553  		n1 := s0.AuxInt
 13554  		x0 := s0.Args[0]
 13555  		if x0.Op != OpPPC64MOVBZload {
 13556  			break
 13557  		}
 13558  		i1 := x0.AuxInt
 13559  		s := x0.Aux
 13560  		_ = x0.Args[1]
 13561  		p := x0.Args[0]
 13562  		mem := x0.Args[1]
 13563  		s1 := v.Args[1]
 13564  		if s1.Op != OpPPC64SLDconst {
 13565  			break
 13566  		}
 13567  		n2 := s1.AuxInt
 13568  		x1 := s1.Args[0]
 13569  		if x1.Op != OpPPC64MOVBZload {
 13570  			break
 13571  		}
 13572  		i0 := x1.AuxInt
 13573  		if x1.Aux != s {
 13574  			break
 13575  		}
 13576  		_ = x1.Args[1]
 13577  		if p != x1.Args[0] {
 13578  			break
 13579  		}
 13580  		if mem != x1.Args[1] {
 13581  			break
 13582  		}
 13583  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13584  			break
 13585  		}
 13586  		b = mergePoint(b, x0, x1)
 13587  		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 13588  		v.reset(OpCopy)
 13589  		v.AddArg(v0)
 13590  		v0.AuxInt = n1
 13591  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 13592  		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13593  		v2.AuxInt = i0
 13594  		v2.Aux = s
 13595  		v2.AddArg(p)
 13596  		v1.AddArg(v2)
 13597  		v1.AddArg(mem)
 13598  		v0.AddArg(v1)
 13599  		return true
 13600  	}
 13601  	// match: (OR <t> s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13602  	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13603  	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13604  	for {
 13605  		t := v.Type
 13606  		_ = v.Args[1]
 13607  		s1 := v.Args[0]
 13608  		if s1.Op != OpPPC64SLDconst {
 13609  			break
 13610  		}
 13611  		n2 := s1.AuxInt
 13612  		x1 := s1.Args[0]
 13613  		if x1.Op != OpPPC64MOVBZload {
 13614  			break
 13615  		}
 13616  		i0 := x1.AuxInt
 13617  		s := x1.Aux
 13618  		_ = x1.Args[1]
 13619  		p := x1.Args[0]
 13620  		mem := x1.Args[1]
 13621  		s0 := v.Args[1]
 13622  		if s0.Op != OpPPC64SLDconst {
 13623  			break
 13624  		}
 13625  		n1 := s0.AuxInt
 13626  		x0 := s0.Args[0]
 13627  		if x0.Op != OpPPC64MOVBZload {
 13628  			break
 13629  		}
 13630  		i1 := x0.AuxInt
 13631  		if x0.Aux != s {
 13632  			break
 13633  		}
 13634  		_ = x0.Args[1]
 13635  		if p != x0.Args[0] {
 13636  			break
 13637  		}
 13638  		if mem != x0.Args[1] {
 13639  			break
 13640  		}
 13641  		if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13642  			break
 13643  		}
 13644  		b = mergePoint(b, x0, x1)
 13645  		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 13646  		v.reset(OpCopy)
 13647  		v.AddArg(v0)
 13648  		v0.AuxInt = n1
 13649  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13650  		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13651  		v2.AuxInt = i0
 13652  		v2.Aux = s
 13653  		v2.AddArg(p)
 13654  		v1.AddArg(v2)
 13655  		v1.AddArg(mem)
 13656  		v0.AddArg(v1)
 13657  		return true
 13658  	}
 13659  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13660  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13661  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13662  	for {
 13663  		t := v.Type
 13664  		_ = v.Args[1]
 13665  		s1 := v.Args[0]
 13666  		if s1.Op != OpPPC64SLWconst {
 13667  			break
 13668  		}
 13669  		if s1.AuxInt != 24 {
 13670  			break
 13671  		}
 13672  		x2 := s1.Args[0]
 13673  		if x2.Op != OpPPC64MOVBZload {
 13674  			break
 13675  		}
 13676  		i3 := x2.AuxInt
 13677  		s := x2.Aux
 13678  		_ = x2.Args[1]
 13679  		p := x2.Args[0]
 13680  		mem := x2.Args[1]
 13681  		o0 := v.Args[1]
 13682  		if o0.Op != OpPPC64OR {
 13683  			break
 13684  		}
 13685  		if o0.Type != t {
 13686  			break
 13687  		}
 13688  		_ = o0.Args[1]
 13689  		s0 := o0.Args[0]
 13690  		if s0.Op != OpPPC64SLWconst {
 13691  			break
 13692  		}
 13693  		if s0.AuxInt != 16 {
 13694  			break
 13695  		}
 13696  		x1 := s0.Args[0]
 13697  		if x1.Op != OpPPC64MOVBZload {
 13698  			break
 13699  		}
 13700  		i2 := x1.AuxInt
 13701  		if x1.Aux != s {
 13702  			break
 13703  		}
 13704  		_ = x1.Args[1]
 13705  		if p != x1.Args[0] {
 13706  			break
 13707  		}
 13708  		if mem != x1.Args[1] {
 13709  			break
 13710  		}
 13711  		x0 := o0.Args[1]
 13712  		if x0.Op != OpPPC64MOVHZload {
 13713  			break
 13714  		}
 13715  		i0 := x0.AuxInt
 13716  		if x0.Aux != s {
 13717  			break
 13718  		}
 13719  		_ = x0.Args[1]
 13720  		if p != x0.Args[0] {
 13721  			break
 13722  		}
 13723  		if mem != x0.Args[1] {
 13724  			break
 13725  		}
 13726  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13727  			break
 13728  		}
 13729  		b = mergePoint(b, x0, x1, x2)
 13730  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
 13731  		v.reset(OpCopy)
 13732  		v.AddArg(v0)
 13733  		v0.AuxInt = i0
 13734  		v0.Aux = s
 13735  		v0.AddArg(p)
 13736  		v0.AddArg(mem)
 13737  		return true
 13738  	}
 13739  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
 13740  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13741  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13742  	for {
 13743  		t := v.Type
 13744  		_ = v.Args[1]
 13745  		s1 := v.Args[0]
 13746  		if s1.Op != OpPPC64SLWconst {
 13747  			break
 13748  		}
 13749  		if s1.AuxInt != 24 {
 13750  			break
 13751  		}
 13752  		x2 := s1.Args[0]
 13753  		if x2.Op != OpPPC64MOVBZload {
 13754  			break
 13755  		}
 13756  		i3 := x2.AuxInt
 13757  		s := x2.Aux
 13758  		_ = x2.Args[1]
 13759  		p := x2.Args[0]
 13760  		mem := x2.Args[1]
 13761  		o0 := v.Args[1]
 13762  		if o0.Op != OpPPC64OR {
 13763  			break
 13764  		}
 13765  		if o0.Type != t {
 13766  			break
 13767  		}
 13768  		_ = o0.Args[1]
 13769  		x0 := o0.Args[0]
 13770  		if x0.Op != OpPPC64MOVHZload {
 13771  			break
 13772  		}
 13773  		i0 := x0.AuxInt
 13774  		if x0.Aux != s {
 13775  			break
 13776  		}
 13777  		_ = x0.Args[1]
 13778  		if p != x0.Args[0] {
 13779  			break
 13780  		}
 13781  		if mem != x0.Args[1] {
 13782  			break
 13783  		}
 13784  		s0 := o0.Args[1]
 13785  		if s0.Op != OpPPC64SLWconst {
 13786  			break
 13787  		}
 13788  		if s0.AuxInt != 16 {
 13789  			break
 13790  		}
 13791  		x1 := s0.Args[0]
 13792  		if x1.Op != OpPPC64MOVBZload {
 13793  			break
 13794  		}
 13795  		i2 := x1.AuxInt
 13796  		if x1.Aux != s {
 13797  			break
 13798  		}
 13799  		_ = x1.Args[1]
 13800  		if p != x1.Args[0] {
 13801  			break
 13802  		}
 13803  		if mem != x1.Args[1] {
 13804  			break
 13805  		}
 13806  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13807  			break
 13808  		}
 13809  		b = mergePoint(b, x0, x1, x2)
 13810  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
 13811  		v.reset(OpCopy)
 13812  		v.AddArg(v0)
 13813  		v0.AuxInt = i0
 13814  		v0.Aux = s
 13815  		v0.AddArg(p)
 13816  		v0.AddArg(mem)
 13817  		return true
 13818  	}
 13819  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13820  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13821  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13822  	for {
 13823  		t := v.Type
 13824  		_ = v.Args[1]
 13825  		o0 := v.Args[0]
 13826  		if o0.Op != OpPPC64OR {
 13827  			break
 13828  		}
 13829  		if o0.Type != t {
 13830  			break
 13831  		}
 13832  		_ = o0.Args[1]
 13833  		s0 := o0.Args[0]
 13834  		if s0.Op != OpPPC64SLWconst {
 13835  			break
 13836  		}
 13837  		if s0.AuxInt != 16 {
 13838  			break
 13839  		}
 13840  		x1 := s0.Args[0]
 13841  		if x1.Op != OpPPC64MOVBZload {
 13842  			break
 13843  		}
 13844  		i2 := x1.AuxInt
 13845  		s := x1.Aux
 13846  		_ = x1.Args[1]
 13847  		p := x1.Args[0]
 13848  		mem := x1.Args[1]
 13849  		x0 := o0.Args[1]
 13850  		if x0.Op != OpPPC64MOVHZload {
 13851  			break
 13852  		}
 13853  		i0 := x0.AuxInt
 13854  		if x0.Aux != s {
 13855  			break
 13856  		}
 13857  		_ = x0.Args[1]
 13858  		if p != x0.Args[0] {
 13859  			break
 13860  		}
 13861  		if mem != x0.Args[1] {
 13862  			break
 13863  		}
 13864  		s1 := v.Args[1]
 13865  		if s1.Op != OpPPC64SLWconst {
 13866  			break
 13867  		}
 13868  		if s1.AuxInt != 24 {
 13869  			break
 13870  		}
 13871  		x2 := s1.Args[0]
 13872  		if x2.Op != OpPPC64MOVBZload {
 13873  			break
 13874  		}
 13875  		i3 := x2.AuxInt
 13876  		if x2.Aux != s {
 13877  			break
 13878  		}
 13879  		_ = x2.Args[1]
 13880  		if p != x2.Args[0] {
 13881  			break
 13882  		}
 13883  		if mem != x2.Args[1] {
 13884  			break
 13885  		}
 13886  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13887  			break
 13888  		}
 13889  		b = mergePoint(b, x0, x1, x2)
 13890  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13891  		v.reset(OpCopy)
 13892  		v.AddArg(v0)
 13893  		v0.AuxInt = i0
 13894  		v0.Aux = s
 13895  		v0.AddArg(p)
 13896  		v0.AddArg(mem)
 13897  		return true
 13898  	}
 13899  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13900  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13901  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13902  	for {
 13903  		t := v.Type
 13904  		_ = v.Args[1]
 13905  		o0 := v.Args[0]
 13906  		if o0.Op != OpPPC64OR {
 13907  			break
 13908  		}
 13909  		if o0.Type != t {
 13910  			break
 13911  		}
 13912  		_ = o0.Args[1]
 13913  		x0 := o0.Args[0]
 13914  		if x0.Op != OpPPC64MOVHZload {
 13915  			break
 13916  		}
 13917  		i0 := x0.AuxInt
 13918  		s := x0.Aux
 13919  		_ = x0.Args[1]
 13920  		p := x0.Args[0]
 13921  		mem := x0.Args[1]
 13922  		s0 := o0.Args[1]
 13923  		if s0.Op != OpPPC64SLWconst {
 13924  			break
 13925  		}
 13926  		if s0.AuxInt != 16 {
 13927  			break
 13928  		}
 13929  		x1 := s0.Args[0]
 13930  		if x1.Op != OpPPC64MOVBZload {
 13931  			break
 13932  		}
 13933  		i2 := x1.AuxInt
 13934  		if x1.Aux != s {
 13935  			break
 13936  		}
 13937  		_ = x1.Args[1]
 13938  		if p != x1.Args[0] {
 13939  			break
 13940  		}
 13941  		if mem != x1.Args[1] {
 13942  			break
 13943  		}
 13944  		s1 := v.Args[1]
 13945  		if s1.Op != OpPPC64SLWconst {
 13946  			break
 13947  		}
 13948  		if s1.AuxInt != 24 {
 13949  			break
 13950  		}
 13951  		x2 := s1.Args[0]
 13952  		if x2.Op != OpPPC64MOVBZload {
 13953  			break
 13954  		}
 13955  		i3 := x2.AuxInt
 13956  		if x2.Aux != s {
 13957  			break
 13958  		}
 13959  		_ = x2.Args[1]
 13960  		if p != x2.Args[0] {
 13961  			break
 13962  		}
 13963  		if mem != x2.Args[1] {
 13964  			break
 13965  		}
 13966  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13967  			break
 13968  		}
 13969  		b = mergePoint(b, x0, x1, x2)
 13970  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13971  		v.reset(OpCopy)
 13972  		v.AddArg(v0)
 13973  		v0.AuxInt = i0
 13974  		v0.Aux = s
 13975  		v0.AddArg(p)
 13976  		v0.AddArg(mem)
 13977  		return true
 13978  	}
 13979  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13980  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13981  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13982  	for {
 13983  		t := v.Type
 13984  		_ = v.Args[1]
 13985  		s1 := v.Args[0]
 13986  		if s1.Op != OpPPC64SLDconst {
 13987  			break
 13988  		}
 13989  		if s1.AuxInt != 24 {
 13990  			break
 13991  		}
 13992  		x2 := s1.Args[0]
 13993  		if x2.Op != OpPPC64MOVBZload {
 13994  			break
 13995  		}
 13996  		i3 := x2.AuxInt
 13997  		s := x2.Aux
 13998  		_ = x2.Args[1]
 13999  		p := x2.Args[0]
 14000  		mem := x2.Args[1]
 14001  		o0 := v.Args[1]
 14002  		if o0.Op != OpPPC64OR {
 14003  			break
 14004  		}
 14005  		if o0.Type != t {
 14006  			break
 14007  		}
 14008  		_ = o0.Args[1]
 14009  		s0 := o0.Args[0]
 14010  		if s0.Op != OpPPC64SLDconst {
 14011  			break
 14012  		}
 14013  		if s0.AuxInt != 16 {
 14014  			break
 14015  		}
 14016  		x1 := s0.Args[0]
 14017  		if x1.Op != OpPPC64MOVBZload {
 14018  			break
 14019  		}
 14020  		i2 := x1.AuxInt
 14021  		if x1.Aux != s {
 14022  			break
 14023  		}
 14024  		_ = x1.Args[1]
 14025  		if p != x1.Args[0] {
 14026  			break
 14027  		}
 14028  		if mem != x1.Args[1] {
 14029  			break
 14030  		}
 14031  		x0 := o0.Args[1]
 14032  		if x0.Op != OpPPC64MOVHZload {
 14033  			break
 14034  		}
 14035  		i0 := x0.AuxInt
 14036  		if x0.Aux != s {
 14037  			break
 14038  		}
 14039  		_ = x0.Args[1]
 14040  		if p != x0.Args[0] {
 14041  			break
 14042  		}
 14043  		if mem != x0.Args[1] {
 14044  			break
 14045  		}
 14046  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14047  			break
 14048  		}
 14049  		b = mergePoint(b, x0, x1, x2)
 14050  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
 14051  		v.reset(OpCopy)
 14052  		v.AddArg(v0)
 14053  		v0.AuxInt = i0
 14054  		v0.Aux = s
 14055  		v0.AddArg(p)
 14056  		v0.AddArg(mem)
 14057  		return true
 14058  	}
 14059  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])))
 14060  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14061  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14062  	for {
 14063  		t := v.Type
 14064  		_ = v.Args[1]
 14065  		s1 := v.Args[0]
 14066  		if s1.Op != OpPPC64SLDconst {
 14067  			break
 14068  		}
 14069  		if s1.AuxInt != 24 {
 14070  			break
 14071  		}
 14072  		x2 := s1.Args[0]
 14073  		if x2.Op != OpPPC64MOVBZload {
 14074  			break
 14075  		}
 14076  		i3 := x2.AuxInt
 14077  		s := x2.Aux
 14078  		_ = x2.Args[1]
 14079  		p := x2.Args[0]
 14080  		mem := x2.Args[1]
 14081  		o0 := v.Args[1]
 14082  		if o0.Op != OpPPC64OR {
 14083  			break
 14084  		}
 14085  		if o0.Type != t {
 14086  			break
 14087  		}
 14088  		_ = o0.Args[1]
 14089  		x0 := o0.Args[0]
 14090  		if x0.Op != OpPPC64MOVHZload {
 14091  			break
 14092  		}
 14093  		i0 := x0.AuxInt
 14094  		if x0.Aux != s {
 14095  			break
 14096  		}
 14097  		_ = x0.Args[1]
 14098  		if p != x0.Args[0] {
 14099  			break
 14100  		}
 14101  		if mem != x0.Args[1] {
 14102  			break
 14103  		}
 14104  		s0 := o0.Args[1]
 14105  		if s0.Op != OpPPC64SLDconst {
 14106  			break
 14107  		}
 14108  		if s0.AuxInt != 16 {
 14109  			break
 14110  		}
 14111  		x1 := s0.Args[0]
 14112  		if x1.Op != OpPPC64MOVBZload {
 14113  			break
 14114  		}
 14115  		i2 := x1.AuxInt
 14116  		if x1.Aux != s {
 14117  			break
 14118  		}
 14119  		_ = x1.Args[1]
 14120  		if p != x1.Args[0] {
 14121  			break
 14122  		}
 14123  		if mem != x1.Args[1] {
 14124  			break
 14125  		}
 14126  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14127  			break
 14128  		}
 14129  		b = mergePoint(b, x0, x1, x2)
 14130  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
 14131  		v.reset(OpCopy)
 14132  		v.AddArg(v0)
 14133  		v0.AuxInt = i0
 14134  		v0.Aux = s
 14135  		v0.AddArg(p)
 14136  		v0.AddArg(mem)
 14137  		return true
 14138  	}
 14139  	return false
 14140  }
 14141  func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
 14142  	b := v.Block
 14143  	_ = b
 14144  	config := b.Func.Config
 14145  	_ = config
 14146  	typ := &b.Func.Config.Types
 14147  	_ = typ
 14148  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 14149  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14150  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14151  	for {
 14152  		t := v.Type
 14153  		_ = v.Args[1]
 14154  		o0 := v.Args[0]
 14155  		if o0.Op != OpPPC64OR {
 14156  			break
 14157  		}
 14158  		if o0.Type != t {
 14159  			break
 14160  		}
 14161  		_ = o0.Args[1]
 14162  		s0 := o0.Args[0]
 14163  		if s0.Op != OpPPC64SLDconst {
 14164  			break
 14165  		}
 14166  		if s0.AuxInt != 16 {
 14167  			break
 14168  		}
 14169  		x1 := s0.Args[0]
 14170  		if x1.Op != OpPPC64MOVBZload {
 14171  			break
 14172  		}
 14173  		i2 := x1.AuxInt
 14174  		s := x1.Aux
 14175  		_ = x1.Args[1]
 14176  		p := x1.Args[0]
 14177  		mem := x1.Args[1]
 14178  		x0 := o0.Args[1]
 14179  		if x0.Op != OpPPC64MOVHZload {
 14180  			break
 14181  		}
 14182  		i0 := x0.AuxInt
 14183  		if x0.Aux != s {
 14184  			break
 14185  		}
 14186  		_ = x0.Args[1]
 14187  		if p != x0.Args[0] {
 14188  			break
 14189  		}
 14190  		if mem != x0.Args[1] {
 14191  			break
 14192  		}
 14193  		s1 := v.Args[1]
 14194  		if s1.Op != OpPPC64SLDconst {
 14195  			break
 14196  		}
 14197  		if s1.AuxInt != 24 {
 14198  			break
 14199  		}
 14200  		x2 := s1.Args[0]
 14201  		if x2.Op != OpPPC64MOVBZload {
 14202  			break
 14203  		}
 14204  		i3 := x2.AuxInt
 14205  		if x2.Aux != s {
 14206  			break
 14207  		}
 14208  		_ = x2.Args[1]
 14209  		if p != x2.Args[0] {
 14210  			break
 14211  		}
 14212  		if mem != x2.Args[1] {
 14213  			break
 14214  		}
 14215  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14216  			break
 14217  		}
 14218  		b = mergePoint(b, x0, x1, x2)
 14219  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 14220  		v.reset(OpCopy)
 14221  		v.AddArg(v0)
 14222  		v0.AuxInt = i0
 14223  		v0.Aux = s
 14224  		v0.AddArg(p)
 14225  		v0.AddArg(mem)
 14226  		return true
 14227  	}
 14228  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 14229  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14230  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 14231  	for {
 14232  		t := v.Type
 14233  		_ = v.Args[1]
 14234  		o0 := v.Args[0]
 14235  		if o0.Op != OpPPC64OR {
 14236  			break
 14237  		}
 14238  		if o0.Type != t {
 14239  			break
 14240  		}
 14241  		_ = o0.Args[1]
 14242  		x0 := o0.Args[0]
 14243  		if x0.Op != OpPPC64MOVHZload {
 14244  			break
 14245  		}
 14246  		i0 := x0.AuxInt
 14247  		s := x0.Aux
 14248  		_ = x0.Args[1]
 14249  		p := x0.Args[0]
 14250  		mem := x0.Args[1]
 14251  		s0 := o0.Args[1]
 14252  		if s0.Op != OpPPC64SLDconst {
 14253  			break
 14254  		}
 14255  		if s0.AuxInt != 16 {
 14256  			break
 14257  		}
 14258  		x1 := s0.Args[0]
 14259  		if x1.Op != OpPPC64MOVBZload {
 14260  			break
 14261  		}
 14262  		i2 := x1.AuxInt
 14263  		if x1.Aux != s {
 14264  			break
 14265  		}
 14266  		_ = x1.Args[1]
 14267  		if p != x1.Args[0] {
 14268  			break
 14269  		}
 14270  		if mem != x1.Args[1] {
 14271  			break
 14272  		}
 14273  		s1 := v.Args[1]
 14274  		if s1.Op != OpPPC64SLDconst {
 14275  			break
 14276  		}
 14277  		if s1.AuxInt != 24 {
 14278  			break
 14279  		}
 14280  		x2 := s1.Args[0]
 14281  		if x2.Op != OpPPC64MOVBZload {
 14282  			break
 14283  		}
 14284  		i3 := x2.AuxInt
 14285  		if x2.Aux != s {
 14286  			break
 14287  		}
 14288  		_ = x2.Args[1]
 14289  		if p != x2.Args[0] {
 14290  			break
 14291  		}
 14292  		if mem != x2.Args[1] {
 14293  			break
 14294  		}
 14295  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14296  			break
 14297  		}
 14298  		b = mergePoint(b, x0, x1, x2)
 14299  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 14300  		v.reset(OpCopy)
 14301  		v.AddArg(v0)
 14302  		v0.AuxInt = i0
 14303  		v0.Aux = s
 14304  		v0.AddArg(p)
 14305  		v0.AddArg(mem)
 14306  		return true
 14307  	}
 14308  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 14309  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14310  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14311  	for {
 14312  		t := v.Type
 14313  		_ = v.Args[1]
 14314  		s1 := v.Args[0]
 14315  		if s1.Op != OpPPC64SLWconst {
 14316  			break
 14317  		}
 14318  		if s1.AuxInt != 24 {
 14319  			break
 14320  		}
 14321  		x2 := s1.Args[0]
 14322  		if x2.Op != OpPPC64MOVBZload {
 14323  			break
 14324  		}
 14325  		i0 := x2.AuxInt
 14326  		s := x2.Aux
 14327  		_ = x2.Args[1]
 14328  		p := x2.Args[0]
 14329  		mem := x2.Args[1]
 14330  		o0 := v.Args[1]
 14331  		if o0.Op != OpPPC64OR {
 14332  			break
 14333  		}
 14334  		if o0.Type != t {
 14335  			break
 14336  		}
 14337  		_ = o0.Args[1]
 14338  		s0 := o0.Args[0]
 14339  		if s0.Op != OpPPC64SLWconst {
 14340  			break
 14341  		}
 14342  		if s0.AuxInt != 16 {
 14343  			break
 14344  		}
 14345  		x1 := s0.Args[0]
 14346  		if x1.Op != OpPPC64MOVBZload {
 14347  			break
 14348  		}
 14349  		i1 := x1.AuxInt
 14350  		if x1.Aux != s {
 14351  			break
 14352  		}
 14353  		_ = x1.Args[1]
 14354  		if p != x1.Args[0] {
 14355  			break
 14356  		}
 14357  		if mem != x1.Args[1] {
 14358  			break
 14359  		}
 14360  		x0 := o0.Args[1]
 14361  		if x0.Op != OpPPC64MOVHBRload {
 14362  			break
 14363  		}
 14364  		if x0.Type != t {
 14365  			break
 14366  		}
 14367  		_ = x0.Args[1]
 14368  		x0_0 := x0.Args[0]
 14369  		if x0_0.Op != OpPPC64MOVDaddr {
 14370  			break
 14371  		}
 14372  		if x0_0.Type != typ.Uintptr {
 14373  			break
 14374  		}
 14375  		i2 := x0_0.AuxInt
 14376  		if x0_0.Aux != s {
 14377  			break
 14378  		}
 14379  		if p != x0_0.Args[0] {
 14380  			break
 14381  		}
 14382  		if mem != x0.Args[1] {
 14383  			break
 14384  		}
 14385  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14386  			break
 14387  		}
 14388  		b = mergePoint(b, x0, x1, x2)
 14389  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 14390  		v.reset(OpCopy)
 14391  		v.AddArg(v0)
 14392  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14393  		v1.AuxInt = i0
 14394  		v1.Aux = s
 14395  		v1.AddArg(p)
 14396  		v0.AddArg(v1)
 14397  		v0.AddArg(mem)
 14398  		return true
 14399  	}
 14400  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])))
 14401  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14402  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14403  	for {
 14404  		t := v.Type
 14405  		_ = v.Args[1]
 14406  		s1 := v.Args[0]
 14407  		if s1.Op != OpPPC64SLWconst {
 14408  			break
 14409  		}
 14410  		if s1.AuxInt != 24 {
 14411  			break
 14412  		}
 14413  		x2 := s1.Args[0]
 14414  		if x2.Op != OpPPC64MOVBZload {
 14415  			break
 14416  		}
 14417  		i0 := x2.AuxInt
 14418  		s := x2.Aux
 14419  		_ = x2.Args[1]
 14420  		p := x2.Args[0]
 14421  		mem := x2.Args[1]
 14422  		o0 := v.Args[1]
 14423  		if o0.Op != OpPPC64OR {
 14424  			break
 14425  		}
 14426  		if o0.Type != t {
 14427  			break
 14428  		}
 14429  		_ = o0.Args[1]
 14430  		x0 := o0.Args[0]
 14431  		if x0.Op != OpPPC64MOVHBRload {
 14432  			break
 14433  		}
 14434  		if x0.Type != t {
 14435  			break
 14436  		}
 14437  		_ = x0.Args[1]
 14438  		x0_0 := x0.Args[0]
 14439  		if x0_0.Op != OpPPC64MOVDaddr {
 14440  			break
 14441  		}
 14442  		if x0_0.Type != typ.Uintptr {
 14443  			break
 14444  		}
 14445  		i2 := x0_0.AuxInt
 14446  		if x0_0.Aux != s {
 14447  			break
 14448  		}
 14449  		if p != x0_0.Args[0] {
 14450  			break
 14451  		}
 14452  		if mem != x0.Args[1] {
 14453  			break
 14454  		}
 14455  		s0 := o0.Args[1]
 14456  		if s0.Op != OpPPC64SLWconst {
 14457  			break
 14458  		}
 14459  		if s0.AuxInt != 16 {
 14460  			break
 14461  		}
 14462  		x1 := s0.Args[0]
 14463  		if x1.Op != OpPPC64MOVBZload {
 14464  			break
 14465  		}
 14466  		i1 := x1.AuxInt
 14467  		if x1.Aux != s {
 14468  			break
 14469  		}
 14470  		_ = x1.Args[1]
 14471  		if p != x1.Args[0] {
 14472  			break
 14473  		}
 14474  		if mem != x1.Args[1] {
 14475  			break
 14476  		}
 14477  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14478  			break
 14479  		}
 14480  		b = mergePoint(b, x0, x1, x2)
 14481  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 14482  		v.reset(OpCopy)
 14483  		v.AddArg(v0)
 14484  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14485  		v1.AuxInt = i0
 14486  		v1.Aux = s
 14487  		v1.AddArg(p)
 14488  		v0.AddArg(v1)
 14489  		v0.AddArg(mem)
 14490  		return true
 14491  	}
 14492  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14493  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14494  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14495  	for {
 14496  		t := v.Type
 14497  		_ = v.Args[1]
 14498  		o0 := v.Args[0]
 14499  		if o0.Op != OpPPC64OR {
 14500  			break
 14501  		}
 14502  		if o0.Type != t {
 14503  			break
 14504  		}
 14505  		_ = o0.Args[1]
 14506  		s0 := o0.Args[0]
 14507  		if s0.Op != OpPPC64SLWconst {
 14508  			break
 14509  		}
 14510  		if s0.AuxInt != 16 {
 14511  			break
 14512  		}
 14513  		x1 := s0.Args[0]
 14514  		if x1.Op != OpPPC64MOVBZload {
 14515  			break
 14516  		}
 14517  		i1 := x1.AuxInt
 14518  		s := x1.Aux
 14519  		_ = x1.Args[1]
 14520  		p := x1.Args[0]
 14521  		mem := x1.Args[1]
 14522  		x0 := o0.Args[1]
 14523  		if x0.Op != OpPPC64MOVHBRload {
 14524  			break
 14525  		}
 14526  		if x0.Type != t {
 14527  			break
 14528  		}
 14529  		_ = x0.Args[1]
 14530  		x0_0 := x0.Args[0]
 14531  		if x0_0.Op != OpPPC64MOVDaddr {
 14532  			break
 14533  		}
 14534  		if x0_0.Type != typ.Uintptr {
 14535  			break
 14536  		}
 14537  		i2 := x0_0.AuxInt
 14538  		if x0_0.Aux != s {
 14539  			break
 14540  		}
 14541  		if p != x0_0.Args[0] {
 14542  			break
 14543  		}
 14544  		if mem != x0.Args[1] {
 14545  			break
 14546  		}
 14547  		s1 := v.Args[1]
 14548  		if s1.Op != OpPPC64SLWconst {
 14549  			break
 14550  		}
 14551  		if s1.AuxInt != 24 {
 14552  			break
 14553  		}
 14554  		x2 := s1.Args[0]
 14555  		if x2.Op != OpPPC64MOVBZload {
 14556  			break
 14557  		}
 14558  		i0 := x2.AuxInt
 14559  		if x2.Aux != s {
 14560  			break
 14561  		}
 14562  		_ = x2.Args[1]
 14563  		if p != x2.Args[0] {
 14564  			break
 14565  		}
 14566  		if mem != x2.Args[1] {
 14567  			break
 14568  		}
 14569  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14570  			break
 14571  		}
 14572  		b = mergePoint(b, x0, x1, x2)
 14573  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14574  		v.reset(OpCopy)
 14575  		v.AddArg(v0)
 14576  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14577  		v1.AuxInt = i0
 14578  		v1.Aux = s
 14579  		v1.AddArg(p)
 14580  		v0.AddArg(v1)
 14581  		v0.AddArg(mem)
 14582  		return true
 14583  	}
 14584  	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14585  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14586  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14587  	for {
 14588  		t := v.Type
 14589  		_ = v.Args[1]
 14590  		o0 := v.Args[0]
 14591  		if o0.Op != OpPPC64OR {
 14592  			break
 14593  		}
 14594  		if o0.Type != t {
 14595  			break
 14596  		}
 14597  		_ = o0.Args[1]
 14598  		x0 := o0.Args[0]
 14599  		if x0.Op != OpPPC64MOVHBRload {
 14600  			break
 14601  		}
 14602  		if x0.Type != t {
 14603  			break
 14604  		}
 14605  		_ = x0.Args[1]
 14606  		x0_0 := x0.Args[0]
 14607  		if x0_0.Op != OpPPC64MOVDaddr {
 14608  			break
 14609  		}
 14610  		if x0_0.Type != typ.Uintptr {
 14611  			break
 14612  		}
 14613  		i2 := x0_0.AuxInt
 14614  		s := x0_0.Aux
 14615  		p := x0_0.Args[0]
 14616  		mem := x0.Args[1]
 14617  		s0 := o0.Args[1]
 14618  		if s0.Op != OpPPC64SLWconst {
 14619  			break
 14620  		}
 14621  		if s0.AuxInt != 16 {
 14622  			break
 14623  		}
 14624  		x1 := s0.Args[0]
 14625  		if x1.Op != OpPPC64MOVBZload {
 14626  			break
 14627  		}
 14628  		i1 := x1.AuxInt
 14629  		if x1.Aux != s {
 14630  			break
 14631  		}
 14632  		_ = x1.Args[1]
 14633  		if p != x1.Args[0] {
 14634  			break
 14635  		}
 14636  		if mem != x1.Args[1] {
 14637  			break
 14638  		}
 14639  		s1 := v.Args[1]
 14640  		if s1.Op != OpPPC64SLWconst {
 14641  			break
 14642  		}
 14643  		if s1.AuxInt != 24 {
 14644  			break
 14645  		}
 14646  		x2 := s1.Args[0]
 14647  		if x2.Op != OpPPC64MOVBZload {
 14648  			break
 14649  		}
 14650  		i0 := x2.AuxInt
 14651  		if x2.Aux != s {
 14652  			break
 14653  		}
 14654  		_ = x2.Args[1]
 14655  		if p != x2.Args[0] {
 14656  			break
 14657  		}
 14658  		if mem != x2.Args[1] {
 14659  			break
 14660  		}
 14661  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14662  			break
 14663  		}
 14664  		b = mergePoint(b, x0, x1, x2)
 14665  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14666  		v.reset(OpCopy)
 14667  		v.AddArg(v0)
 14668  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14669  		v1.AuxInt = i0
 14670  		v1.Aux = s
 14671  		v1.AddArg(p)
 14672  		v0.AddArg(v1)
 14673  		v0.AddArg(mem)
 14674  		return true
 14675  	}
 14676  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 14677  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14678  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14679  	for {
 14680  		t := v.Type
 14681  		_ = v.Args[1]
 14682  		s1 := v.Args[0]
 14683  		if s1.Op != OpPPC64SLDconst {
 14684  			break
 14685  		}
 14686  		if s1.AuxInt != 24 {
 14687  			break
 14688  		}
 14689  		x2 := s1.Args[0]
 14690  		if x2.Op != OpPPC64MOVBZload {
 14691  			break
 14692  		}
 14693  		i0 := x2.AuxInt
 14694  		s := x2.Aux
 14695  		_ = x2.Args[1]
 14696  		p := x2.Args[0]
 14697  		mem := x2.Args[1]
 14698  		o0 := v.Args[1]
 14699  		if o0.Op != OpPPC64OR {
 14700  			break
 14701  		}
 14702  		if o0.Type != t {
 14703  			break
 14704  		}
 14705  		_ = o0.Args[1]
 14706  		s0 := o0.Args[0]
 14707  		if s0.Op != OpPPC64SLDconst {
 14708  			break
 14709  		}
 14710  		if s0.AuxInt != 16 {
 14711  			break
 14712  		}
 14713  		x1 := s0.Args[0]
 14714  		if x1.Op != OpPPC64MOVBZload {
 14715  			break
 14716  		}
 14717  		i1 := x1.AuxInt
 14718  		if x1.Aux != s {
 14719  			break
 14720  		}
 14721  		_ = x1.Args[1]
 14722  		if p != x1.Args[0] {
 14723  			break
 14724  		}
 14725  		if mem != x1.Args[1] {
 14726  			break
 14727  		}
 14728  		x0 := o0.Args[1]
 14729  		if x0.Op != OpPPC64MOVHBRload {
 14730  			break
 14731  		}
 14732  		if x0.Type != t {
 14733  			break
 14734  		}
 14735  		_ = x0.Args[1]
 14736  		x0_0 := x0.Args[0]
 14737  		if x0_0.Op != OpPPC64MOVDaddr {
 14738  			break
 14739  		}
 14740  		if x0_0.Type != typ.Uintptr {
 14741  			break
 14742  		}
 14743  		i2 := x0_0.AuxInt
 14744  		if x0_0.Aux != s {
 14745  			break
 14746  		}
 14747  		if p != x0_0.Args[0] {
 14748  			break
 14749  		}
 14750  		if mem != x0.Args[1] {
 14751  			break
 14752  		}
 14753  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14754  			break
 14755  		}
 14756  		b = mergePoint(b, x0, x1, x2)
 14757  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 14758  		v.reset(OpCopy)
 14759  		v.AddArg(v0)
 14760  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14761  		v1.AuxInt = i0
 14762  		v1.Aux = s
 14763  		v1.AddArg(p)
 14764  		v0.AddArg(v1)
 14765  		v0.AddArg(mem)
 14766  		return true
 14767  	}
 14768  	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])))
 14769  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14770  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14771  	for {
 14772  		t := v.Type
 14773  		_ = v.Args[1]
 14774  		s1 := v.Args[0]
 14775  		if s1.Op != OpPPC64SLDconst {
 14776  			break
 14777  		}
 14778  		if s1.AuxInt != 24 {
 14779  			break
 14780  		}
 14781  		x2 := s1.Args[0]
 14782  		if x2.Op != OpPPC64MOVBZload {
 14783  			break
 14784  		}
 14785  		i0 := x2.AuxInt
 14786  		s := x2.Aux
 14787  		_ = x2.Args[1]
 14788  		p := x2.Args[0]
 14789  		mem := x2.Args[1]
 14790  		o0 := v.Args[1]
 14791  		if o0.Op != OpPPC64OR {
 14792  			break
 14793  		}
 14794  		if o0.Type != t {
 14795  			break
 14796  		}
 14797  		_ = o0.Args[1]
 14798  		x0 := o0.Args[0]
 14799  		if x0.Op != OpPPC64MOVHBRload {
 14800  			break
 14801  		}
 14802  		if x0.Type != t {
 14803  			break
 14804  		}
 14805  		_ = x0.Args[1]
 14806  		x0_0 := x0.Args[0]
 14807  		if x0_0.Op != OpPPC64MOVDaddr {
 14808  			break
 14809  		}
 14810  		if x0_0.Type != typ.Uintptr {
 14811  			break
 14812  		}
 14813  		i2 := x0_0.AuxInt
 14814  		if x0_0.Aux != s {
 14815  			break
 14816  		}
 14817  		if p != x0_0.Args[0] {
 14818  			break
 14819  		}
 14820  		if mem != x0.Args[1] {
 14821  			break
 14822  		}
 14823  		s0 := o0.Args[1]
 14824  		if s0.Op != OpPPC64SLDconst {
 14825  			break
 14826  		}
 14827  		if s0.AuxInt != 16 {
 14828  			break
 14829  		}
 14830  		x1 := s0.Args[0]
 14831  		if x1.Op != OpPPC64MOVBZload {
 14832  			break
 14833  		}
 14834  		i1 := x1.AuxInt
 14835  		if x1.Aux != s {
 14836  			break
 14837  		}
 14838  		_ = x1.Args[1]
 14839  		if p != x1.Args[0] {
 14840  			break
 14841  		}
 14842  		if mem != x1.Args[1] {
 14843  			break
 14844  		}
 14845  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14846  			break
 14847  		}
 14848  		b = mergePoint(b, x0, x1, x2)
 14849  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 14850  		v.reset(OpCopy)
 14851  		v.AddArg(v0)
 14852  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14853  		v1.AuxInt = i0
 14854  		v1.Aux = s
 14855  		v1.AddArg(p)
 14856  		v0.AddArg(v1)
 14857  		v0.AddArg(mem)
 14858  		return true
 14859  	}
 14860  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14861  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14862  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14863  	for {
 14864  		t := v.Type
 14865  		_ = v.Args[1]
 14866  		o0 := v.Args[0]
 14867  		if o0.Op != OpPPC64OR {
 14868  			break
 14869  		}
 14870  		if o0.Type != t {
 14871  			break
 14872  		}
 14873  		_ = o0.Args[1]
 14874  		s0 := o0.Args[0]
 14875  		if s0.Op != OpPPC64SLDconst {
 14876  			break
 14877  		}
 14878  		if s0.AuxInt != 16 {
 14879  			break
 14880  		}
 14881  		x1 := s0.Args[0]
 14882  		if x1.Op != OpPPC64MOVBZload {
 14883  			break
 14884  		}
 14885  		i1 := x1.AuxInt
 14886  		s := x1.Aux
 14887  		_ = x1.Args[1]
 14888  		p := x1.Args[0]
 14889  		mem := x1.Args[1]
 14890  		x0 := o0.Args[1]
 14891  		if x0.Op != OpPPC64MOVHBRload {
 14892  			break
 14893  		}
 14894  		if x0.Type != t {
 14895  			break
 14896  		}
 14897  		_ = x0.Args[1]
 14898  		x0_0 := x0.Args[0]
 14899  		if x0_0.Op != OpPPC64MOVDaddr {
 14900  			break
 14901  		}
 14902  		if x0_0.Type != typ.Uintptr {
 14903  			break
 14904  		}
 14905  		i2 := x0_0.AuxInt
 14906  		if x0_0.Aux != s {
 14907  			break
 14908  		}
 14909  		if p != x0_0.Args[0] {
 14910  			break
 14911  		}
 14912  		if mem != x0.Args[1] {
 14913  			break
 14914  		}
 14915  		s1 := v.Args[1]
 14916  		if s1.Op != OpPPC64SLDconst {
 14917  			break
 14918  		}
 14919  		if s1.AuxInt != 24 {
 14920  			break
 14921  		}
 14922  		x2 := s1.Args[0]
 14923  		if x2.Op != OpPPC64MOVBZload {
 14924  			break
 14925  		}
 14926  		i0 := x2.AuxInt
 14927  		if x2.Aux != s {
 14928  			break
 14929  		}
 14930  		_ = x2.Args[1]
 14931  		if p != x2.Args[0] {
 14932  			break
 14933  		}
 14934  		if mem != x2.Args[1] {
 14935  			break
 14936  		}
 14937  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14938  			break
 14939  		}
 14940  		b = mergePoint(b, x0, x1, x2)
 14941  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14942  		v.reset(OpCopy)
 14943  		v.AddArg(v0)
 14944  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14945  		v1.AuxInt = i0
 14946  		v1.Aux = s
 14947  		v1.AddArg(p)
 14948  		v0.AddArg(v1)
 14949  		v0.AddArg(mem)
 14950  		return true
 14951  	}
 14952  	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14953  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14954  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14955  	for {
 14956  		t := v.Type
 14957  		_ = v.Args[1]
 14958  		o0 := v.Args[0]
 14959  		if o0.Op != OpPPC64OR {
 14960  			break
 14961  		}
 14962  		if o0.Type != t {
 14963  			break
 14964  		}
 14965  		_ = o0.Args[1]
 14966  		x0 := o0.Args[0]
 14967  		if x0.Op != OpPPC64MOVHBRload {
 14968  			break
 14969  		}
 14970  		if x0.Type != t {
 14971  			break
 14972  		}
 14973  		_ = x0.Args[1]
 14974  		x0_0 := x0.Args[0]
 14975  		if x0_0.Op != OpPPC64MOVDaddr {
 14976  			break
 14977  		}
 14978  		if x0_0.Type != typ.Uintptr {
 14979  			break
 14980  		}
 14981  		i2 := x0_0.AuxInt
 14982  		s := x0_0.Aux
 14983  		p := x0_0.Args[0]
 14984  		mem := x0.Args[1]
 14985  		s0 := o0.Args[1]
 14986  		if s0.Op != OpPPC64SLDconst {
 14987  			break
 14988  		}
 14989  		if s0.AuxInt != 16 {
 14990  			break
 14991  		}
 14992  		x1 := s0.Args[0]
 14993  		if x1.Op != OpPPC64MOVBZload {
 14994  			break
 14995  		}
 14996  		i1 := x1.AuxInt
 14997  		if x1.Aux != s {
 14998  			break
 14999  		}
 15000  		_ = x1.Args[1]
 15001  		if p != x1.Args[0] {
 15002  			break
 15003  		}
 15004  		if mem != x1.Args[1] {
 15005  			break
 15006  		}
 15007  		s1 := v.Args[1]
 15008  		if s1.Op != OpPPC64SLDconst {
 15009  			break
 15010  		}
 15011  		if s1.AuxInt != 24 {
 15012  			break
 15013  		}
 15014  		x2 := s1.Args[0]
 15015  		if x2.Op != OpPPC64MOVBZload {
 15016  			break
 15017  		}
 15018  		i0 := x2.AuxInt
 15019  		if x2.Aux != s {
 15020  			break
 15021  		}
 15022  		_ = x2.Args[1]
 15023  		if p != x2.Args[0] {
 15024  			break
 15025  		}
 15026  		if mem != x2.Args[1] {
 15027  			break
 15028  		}
 15029  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15030  			break
 15031  		}
 15032  		b = mergePoint(b, x0, x1, x2)
 15033  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15034  		v.reset(OpCopy)
 15035  		v.AddArg(v0)
 15036  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15037  		v1.AuxInt = i0
 15038  		v1.Aux = s
 15039  		v1.AddArg(p)
 15040  		v0.AddArg(v1)
 15041  		v0.AddArg(mem)
 15042  		return true
 15043  	}
 15044  	return false
 15045  }
 15046  func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
 15047  	b := v.Block
 15048  	_ = b
 15049  	config := b.Func.Config
 15050  	_ = config
 15051  	typ := &b.Func.Config.Types
 15052  	_ = typ
 15053  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 15054  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15055  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15056  	for {
 15057  		t := v.Type
 15058  		_ = v.Args[1]
 15059  		x0 := v.Args[0]
 15060  		if x0.Op != OpPPC64MOVBZload {
 15061  			break
 15062  		}
 15063  		i3 := x0.AuxInt
 15064  		s := x0.Aux
 15065  		_ = x0.Args[1]
 15066  		p := x0.Args[0]
 15067  		mem := x0.Args[1]
 15068  		o0 := v.Args[1]
 15069  		if o0.Op != OpPPC64OR {
 15070  			break
 15071  		}
 15072  		if o0.Type != t {
 15073  			break
 15074  		}
 15075  		_ = o0.Args[1]
 15076  		s0 := o0.Args[0]
 15077  		if s0.Op != OpPPC64SLWconst {
 15078  			break
 15079  		}
 15080  		if s0.AuxInt != 8 {
 15081  			break
 15082  		}
 15083  		x1 := s0.Args[0]
 15084  		if x1.Op != OpPPC64MOVBZload {
 15085  			break
 15086  		}
 15087  		i2 := x1.AuxInt
 15088  		if x1.Aux != s {
 15089  			break
 15090  		}
 15091  		_ = x1.Args[1]
 15092  		if p != x1.Args[0] {
 15093  			break
 15094  		}
 15095  		if mem != x1.Args[1] {
 15096  			break
 15097  		}
 15098  		s1 := o0.Args[1]
 15099  		if s1.Op != OpPPC64SLWconst {
 15100  			break
 15101  		}
 15102  		if s1.AuxInt != 16 {
 15103  			break
 15104  		}
 15105  		x2 := s1.Args[0]
 15106  		if x2.Op != OpPPC64MOVHBRload {
 15107  			break
 15108  		}
 15109  		if x2.Type != t {
 15110  			break
 15111  		}
 15112  		_ = x2.Args[1]
 15113  		x2_0 := x2.Args[0]
 15114  		if x2_0.Op != OpPPC64MOVDaddr {
 15115  			break
 15116  		}
 15117  		if x2_0.Type != typ.Uintptr {
 15118  			break
 15119  		}
 15120  		i0 := x2_0.AuxInt
 15121  		if x2_0.Aux != s {
 15122  			break
 15123  		}
 15124  		if p != x2_0.Args[0] {
 15125  			break
 15126  		}
 15127  		if mem != x2.Args[1] {
 15128  			break
 15129  		}
 15130  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15131  			break
 15132  		}
 15133  		b = mergePoint(b, x0, x1, x2)
 15134  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15135  		v.reset(OpCopy)
 15136  		v.AddArg(v0)
 15137  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15138  		v1.AuxInt = i0
 15139  		v1.Aux = s
 15140  		v1.AddArg(p)
 15141  		v0.AddArg(v1)
 15142  		v0.AddArg(mem)
 15143  		return true
 15144  	}
 15145  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])))
 15146  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15147  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15148  	for {
 15149  		t := v.Type
 15150  		_ = v.Args[1]
 15151  		x0 := v.Args[0]
 15152  		if x0.Op != OpPPC64MOVBZload {
 15153  			break
 15154  		}
 15155  		i3 := x0.AuxInt
 15156  		s := x0.Aux
 15157  		_ = x0.Args[1]
 15158  		p := x0.Args[0]
 15159  		mem := x0.Args[1]
 15160  		o0 := v.Args[1]
 15161  		if o0.Op != OpPPC64OR {
 15162  			break
 15163  		}
 15164  		if o0.Type != t {
 15165  			break
 15166  		}
 15167  		_ = o0.Args[1]
 15168  		s1 := o0.Args[0]
 15169  		if s1.Op != OpPPC64SLWconst {
 15170  			break
 15171  		}
 15172  		if s1.AuxInt != 16 {
 15173  			break
 15174  		}
 15175  		x2 := s1.Args[0]
 15176  		if x2.Op != OpPPC64MOVHBRload {
 15177  			break
 15178  		}
 15179  		if x2.Type != t {
 15180  			break
 15181  		}
 15182  		_ = x2.Args[1]
 15183  		x2_0 := x2.Args[0]
 15184  		if x2_0.Op != OpPPC64MOVDaddr {
 15185  			break
 15186  		}
 15187  		if x2_0.Type != typ.Uintptr {
 15188  			break
 15189  		}
 15190  		i0 := x2_0.AuxInt
 15191  		if x2_0.Aux != s {
 15192  			break
 15193  		}
 15194  		if p != x2_0.Args[0] {
 15195  			break
 15196  		}
 15197  		if mem != x2.Args[1] {
 15198  			break
 15199  		}
 15200  		s0 := o0.Args[1]
 15201  		if s0.Op != OpPPC64SLWconst {
 15202  			break
 15203  		}
 15204  		if s0.AuxInt != 8 {
 15205  			break
 15206  		}
 15207  		x1 := s0.Args[0]
 15208  		if x1.Op != OpPPC64MOVBZload {
 15209  			break
 15210  		}
 15211  		i2 := x1.AuxInt
 15212  		if x1.Aux != s {
 15213  			break
 15214  		}
 15215  		_ = x1.Args[1]
 15216  		if p != x1.Args[0] {
 15217  			break
 15218  		}
 15219  		if mem != x1.Args[1] {
 15220  			break
 15221  		}
 15222  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15223  			break
 15224  		}
 15225  		b = mergePoint(b, x0, x1, x2)
 15226  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15227  		v.reset(OpCopy)
 15228  		v.AddArg(v0)
 15229  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15230  		v1.AuxInt = i0
 15231  		v1.Aux = s
 15232  		v1.AddArg(p)
 15233  		v0.AddArg(v1)
 15234  		v0.AddArg(mem)
 15235  		return true
 15236  	}
 15237  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 15238  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15239  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15240  	for {
 15241  		t := v.Type
 15242  		_ = v.Args[1]
 15243  		o0 := v.Args[0]
 15244  		if o0.Op != OpPPC64OR {
 15245  			break
 15246  		}
 15247  		if o0.Type != t {
 15248  			break
 15249  		}
 15250  		_ = o0.Args[1]
 15251  		s0 := o0.Args[0]
 15252  		if s0.Op != OpPPC64SLWconst {
 15253  			break
 15254  		}
 15255  		if s0.AuxInt != 8 {
 15256  			break
 15257  		}
 15258  		x1 := s0.Args[0]
 15259  		if x1.Op != OpPPC64MOVBZload {
 15260  			break
 15261  		}
 15262  		i2 := x1.AuxInt
 15263  		s := x1.Aux
 15264  		_ = x1.Args[1]
 15265  		p := x1.Args[0]
 15266  		mem := x1.Args[1]
 15267  		s1 := o0.Args[1]
 15268  		if s1.Op != OpPPC64SLWconst {
 15269  			break
 15270  		}
 15271  		if s1.AuxInt != 16 {
 15272  			break
 15273  		}
 15274  		x2 := s1.Args[0]
 15275  		if x2.Op != OpPPC64MOVHBRload {
 15276  			break
 15277  		}
 15278  		if x2.Type != t {
 15279  			break
 15280  		}
 15281  		_ = x2.Args[1]
 15282  		x2_0 := x2.Args[0]
 15283  		if x2_0.Op != OpPPC64MOVDaddr {
 15284  			break
 15285  		}
 15286  		if x2_0.Type != typ.Uintptr {
 15287  			break
 15288  		}
 15289  		i0 := x2_0.AuxInt
 15290  		if x2_0.Aux != s {
 15291  			break
 15292  		}
 15293  		if p != x2_0.Args[0] {
 15294  			break
 15295  		}
 15296  		if mem != x2.Args[1] {
 15297  			break
 15298  		}
 15299  		x0 := v.Args[1]
 15300  		if x0.Op != OpPPC64MOVBZload {
 15301  			break
 15302  		}
 15303  		i3 := x0.AuxInt
 15304  		if x0.Aux != s {
 15305  			break
 15306  		}
 15307  		_ = x0.Args[1]
 15308  		if p != x0.Args[0] {
 15309  			break
 15310  		}
 15311  		if mem != x0.Args[1] {
 15312  			break
 15313  		}
 15314  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15315  			break
 15316  		}
 15317  		b = mergePoint(b, x0, x1, x2)
 15318  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15319  		v.reset(OpCopy)
 15320  		v.AddArg(v0)
 15321  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15322  		v1.AuxInt = i0
 15323  		v1.Aux = s
 15324  		v1.AddArg(p)
 15325  		v0.AddArg(v1)
 15326  		v0.AddArg(mem)
 15327  		return true
 15328  	}
 15329  	// match: (OR <t> o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 15330  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15331  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15332  	for {
 15333  		t := v.Type
 15334  		_ = v.Args[1]
 15335  		o0 := v.Args[0]
 15336  		if o0.Op != OpPPC64OR {
 15337  			break
 15338  		}
 15339  		if o0.Type != t {
 15340  			break
 15341  		}
 15342  		_ = o0.Args[1]
 15343  		s1 := o0.Args[0]
 15344  		if s1.Op != OpPPC64SLWconst {
 15345  			break
 15346  		}
 15347  		if s1.AuxInt != 16 {
 15348  			break
 15349  		}
 15350  		x2 := s1.Args[0]
 15351  		if x2.Op != OpPPC64MOVHBRload {
 15352  			break
 15353  		}
 15354  		if x2.Type != t {
 15355  			break
 15356  		}
 15357  		_ = x2.Args[1]
 15358  		x2_0 := x2.Args[0]
 15359  		if x2_0.Op != OpPPC64MOVDaddr {
 15360  			break
 15361  		}
 15362  		if x2_0.Type != typ.Uintptr {
 15363  			break
 15364  		}
 15365  		i0 := x2_0.AuxInt
 15366  		s := x2_0.Aux
 15367  		p := x2_0.Args[0]
 15368  		mem := x2.Args[1]
 15369  		s0 := o0.Args[1]
 15370  		if s0.Op != OpPPC64SLWconst {
 15371  			break
 15372  		}
 15373  		if s0.AuxInt != 8 {
 15374  			break
 15375  		}
 15376  		x1 := s0.Args[0]
 15377  		if x1.Op != OpPPC64MOVBZload {
 15378  			break
 15379  		}
 15380  		i2 := x1.AuxInt
 15381  		if x1.Aux != s {
 15382  			break
 15383  		}
 15384  		_ = x1.Args[1]
 15385  		if p != x1.Args[0] {
 15386  			break
 15387  		}
 15388  		if mem != x1.Args[1] {
 15389  			break
 15390  		}
 15391  		x0 := v.Args[1]
 15392  		if x0.Op != OpPPC64MOVBZload {
 15393  			break
 15394  		}
 15395  		i3 := x0.AuxInt
 15396  		if x0.Aux != s {
 15397  			break
 15398  		}
 15399  		_ = x0.Args[1]
 15400  		if p != x0.Args[0] {
 15401  			break
 15402  		}
 15403  		if mem != x0.Args[1] {
 15404  			break
 15405  		}
 15406  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15407  			break
 15408  		}
 15409  		b = mergePoint(b, x0, x1, x2)
 15410  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15411  		v.reset(OpCopy)
 15412  		v.AddArg(v0)
 15413  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15414  		v1.AuxInt = i0
 15415  		v1.Aux = s
 15416  		v1.AddArg(p)
 15417  		v0.AddArg(v1)
 15418  		v0.AddArg(mem)
 15419  		return true
 15420  	}
 15421  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 15422  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15423  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15424  	for {
 15425  		t := v.Type
 15426  		_ = v.Args[1]
 15427  		x0 := v.Args[0]
 15428  		if x0.Op != OpPPC64MOVBZload {
 15429  			break
 15430  		}
 15431  		i3 := x0.AuxInt
 15432  		s := x0.Aux
 15433  		_ = x0.Args[1]
 15434  		p := x0.Args[0]
 15435  		mem := x0.Args[1]
 15436  		o0 := v.Args[1]
 15437  		if o0.Op != OpPPC64OR {
 15438  			break
 15439  		}
 15440  		if o0.Type != t {
 15441  			break
 15442  		}
 15443  		_ = o0.Args[1]
 15444  		s0 := o0.Args[0]
 15445  		if s0.Op != OpPPC64SLDconst {
 15446  			break
 15447  		}
 15448  		if s0.AuxInt != 8 {
 15449  			break
 15450  		}
 15451  		x1 := s0.Args[0]
 15452  		if x1.Op != OpPPC64MOVBZload {
 15453  			break
 15454  		}
 15455  		i2 := x1.AuxInt
 15456  		if x1.Aux != s {
 15457  			break
 15458  		}
 15459  		_ = x1.Args[1]
 15460  		if p != x1.Args[0] {
 15461  			break
 15462  		}
 15463  		if mem != x1.Args[1] {
 15464  			break
 15465  		}
 15466  		s1 := o0.Args[1]
 15467  		if s1.Op != OpPPC64SLDconst {
 15468  			break
 15469  		}
 15470  		if s1.AuxInt != 16 {
 15471  			break
 15472  		}
 15473  		x2 := s1.Args[0]
 15474  		if x2.Op != OpPPC64MOVHBRload {
 15475  			break
 15476  		}
 15477  		if x2.Type != t {
 15478  			break
 15479  		}
 15480  		_ = x2.Args[1]
 15481  		x2_0 := x2.Args[0]
 15482  		if x2_0.Op != OpPPC64MOVDaddr {
 15483  			break
 15484  		}
 15485  		if x2_0.Type != typ.Uintptr {
 15486  			break
 15487  		}
 15488  		i0 := x2_0.AuxInt
 15489  		if x2_0.Aux != s {
 15490  			break
 15491  		}
 15492  		if p != x2_0.Args[0] {
 15493  			break
 15494  		}
 15495  		if mem != x2.Args[1] {
 15496  			break
 15497  		}
 15498  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15499  			break
 15500  		}
 15501  		b = mergePoint(b, x0, x1, x2)
 15502  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15503  		v.reset(OpCopy)
 15504  		v.AddArg(v0)
 15505  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15506  		v1.AuxInt = i0
 15507  		v1.Aux = s
 15508  		v1.AddArg(p)
 15509  		v0.AddArg(v1)
 15510  		v0.AddArg(mem)
 15511  		return true
 15512  	}
 15513  	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])))
 15514  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15515  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15516  	for {
 15517  		t := v.Type
 15518  		_ = v.Args[1]
 15519  		x0 := v.Args[0]
 15520  		if x0.Op != OpPPC64MOVBZload {
 15521  			break
 15522  		}
 15523  		i3 := x0.AuxInt
 15524  		s := x0.Aux
 15525  		_ = x0.Args[1]
 15526  		p := x0.Args[0]
 15527  		mem := x0.Args[1]
 15528  		o0 := v.Args[1]
 15529  		if o0.Op != OpPPC64OR {
 15530  			break
 15531  		}
 15532  		if o0.Type != t {
 15533  			break
 15534  		}
 15535  		_ = o0.Args[1]
 15536  		s1 := o0.Args[0]
 15537  		if s1.Op != OpPPC64SLDconst {
 15538  			break
 15539  		}
 15540  		if s1.AuxInt != 16 {
 15541  			break
 15542  		}
 15543  		x2 := s1.Args[0]
 15544  		if x2.Op != OpPPC64MOVHBRload {
 15545  			break
 15546  		}
 15547  		if x2.Type != t {
 15548  			break
 15549  		}
 15550  		_ = x2.Args[1]
 15551  		x2_0 := x2.Args[0]
 15552  		if x2_0.Op != OpPPC64MOVDaddr {
 15553  			break
 15554  		}
 15555  		if x2_0.Type != typ.Uintptr {
 15556  			break
 15557  		}
 15558  		i0 := x2_0.AuxInt
 15559  		if x2_0.Aux != s {
 15560  			break
 15561  		}
 15562  		if p != x2_0.Args[0] {
 15563  			break
 15564  		}
 15565  		if mem != x2.Args[1] {
 15566  			break
 15567  		}
 15568  		s0 := o0.Args[1]
 15569  		if s0.Op != OpPPC64SLDconst {
 15570  			break
 15571  		}
 15572  		if s0.AuxInt != 8 {
 15573  			break
 15574  		}
 15575  		x1 := s0.Args[0]
 15576  		if x1.Op != OpPPC64MOVBZload {
 15577  			break
 15578  		}
 15579  		i2 := x1.AuxInt
 15580  		if x1.Aux != s {
 15581  			break
 15582  		}
 15583  		_ = x1.Args[1]
 15584  		if p != x1.Args[0] {
 15585  			break
 15586  		}
 15587  		if mem != x1.Args[1] {
 15588  			break
 15589  		}
 15590  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15591  			break
 15592  		}
 15593  		b = mergePoint(b, x0, x1, x2)
 15594  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15595  		v.reset(OpCopy)
 15596  		v.AddArg(v0)
 15597  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15598  		v1.AuxInt = i0
 15599  		v1.Aux = s
 15600  		v1.AddArg(p)
 15601  		v0.AddArg(v1)
 15602  		v0.AddArg(mem)
 15603  		return true
 15604  	}
 15605  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 15606  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15607  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15608  	for {
 15609  		t := v.Type
 15610  		_ = v.Args[1]
 15611  		o0 := v.Args[0]
 15612  		if o0.Op != OpPPC64OR {
 15613  			break
 15614  		}
 15615  		if o0.Type != t {
 15616  			break
 15617  		}
 15618  		_ = o0.Args[1]
 15619  		s0 := o0.Args[0]
 15620  		if s0.Op != OpPPC64SLDconst {
 15621  			break
 15622  		}
 15623  		if s0.AuxInt != 8 {
 15624  			break
 15625  		}
 15626  		x1 := s0.Args[0]
 15627  		if x1.Op != OpPPC64MOVBZload {
 15628  			break
 15629  		}
 15630  		i2 := x1.AuxInt
 15631  		s := x1.Aux
 15632  		_ = x1.Args[1]
 15633  		p := x1.Args[0]
 15634  		mem := x1.Args[1]
 15635  		s1 := o0.Args[1]
 15636  		if s1.Op != OpPPC64SLDconst {
 15637  			break
 15638  		}
 15639  		if s1.AuxInt != 16 {
 15640  			break
 15641  		}
 15642  		x2 := s1.Args[0]
 15643  		if x2.Op != OpPPC64MOVHBRload {
 15644  			break
 15645  		}
 15646  		if x2.Type != t {
 15647  			break
 15648  		}
 15649  		_ = x2.Args[1]
 15650  		x2_0 := x2.Args[0]
 15651  		if x2_0.Op != OpPPC64MOVDaddr {
 15652  			break
 15653  		}
 15654  		if x2_0.Type != typ.Uintptr {
 15655  			break
 15656  		}
 15657  		i0 := x2_0.AuxInt
 15658  		if x2_0.Aux != s {
 15659  			break
 15660  		}
 15661  		if p != x2_0.Args[0] {
 15662  			break
 15663  		}
 15664  		if mem != x2.Args[1] {
 15665  			break
 15666  		}
 15667  		x0 := v.Args[1]
 15668  		if x0.Op != OpPPC64MOVBZload {
 15669  			break
 15670  		}
 15671  		i3 := x0.AuxInt
 15672  		if x0.Aux != s {
 15673  			break
 15674  		}
 15675  		_ = x0.Args[1]
 15676  		if p != x0.Args[0] {
 15677  			break
 15678  		}
 15679  		if mem != x0.Args[1] {
 15680  			break
 15681  		}
 15682  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15683  			break
 15684  		}
 15685  		b = mergePoint(b, x0, x1, x2)
 15686  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15687  		v.reset(OpCopy)
 15688  		v.AddArg(v0)
 15689  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15690  		v1.AuxInt = i0
 15691  		v1.Aux = s
 15692  		v1.AddArg(p)
 15693  		v0.AddArg(v1)
 15694  		v0.AddArg(mem)
 15695  		return true
 15696  	}
 15697  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 15698  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15699  	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15700  	for {
 15701  		t := v.Type
 15702  		_ = v.Args[1]
 15703  		o0 := v.Args[0]
 15704  		if o0.Op != OpPPC64OR {
 15705  			break
 15706  		}
 15707  		if o0.Type != t {
 15708  			break
 15709  		}
 15710  		_ = o0.Args[1]
 15711  		s1 := o0.Args[0]
 15712  		if s1.Op != OpPPC64SLDconst {
 15713  			break
 15714  		}
 15715  		if s1.AuxInt != 16 {
 15716  			break
 15717  		}
 15718  		x2 := s1.Args[0]
 15719  		if x2.Op != OpPPC64MOVHBRload {
 15720  			break
 15721  		}
 15722  		if x2.Type != t {
 15723  			break
 15724  		}
 15725  		_ = x2.Args[1]
 15726  		x2_0 := x2.Args[0]
 15727  		if x2_0.Op != OpPPC64MOVDaddr {
 15728  			break
 15729  		}
 15730  		if x2_0.Type != typ.Uintptr {
 15731  			break
 15732  		}
 15733  		i0 := x2_0.AuxInt
 15734  		s := x2_0.Aux
 15735  		p := x2_0.Args[0]
 15736  		mem := x2.Args[1]
 15737  		s0 := o0.Args[1]
 15738  		if s0.Op != OpPPC64SLDconst {
 15739  			break
 15740  		}
 15741  		if s0.AuxInt != 8 {
 15742  			break
 15743  		}
 15744  		x1 := s0.Args[0]
 15745  		if x1.Op != OpPPC64MOVBZload {
 15746  			break
 15747  		}
 15748  		i2 := x1.AuxInt
 15749  		if x1.Aux != s {
 15750  			break
 15751  		}
 15752  		_ = x1.Args[1]
 15753  		if p != x1.Args[0] {
 15754  			break
 15755  		}
 15756  		if mem != x1.Args[1] {
 15757  			break
 15758  		}
 15759  		x0 := v.Args[1]
 15760  		if x0.Op != OpPPC64MOVBZload {
 15761  			break
 15762  		}
 15763  		i3 := x0.AuxInt
 15764  		if x0.Aux != s {
 15765  			break
 15766  		}
 15767  		_ = x0.Args[1]
 15768  		if p != x0.Args[0] {
 15769  			break
 15770  		}
 15771  		if mem != x0.Args[1] {
 15772  			break
 15773  		}
 15774  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15775  			break
 15776  		}
 15777  		b = mergePoint(b, x0, x1, x2)
 15778  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15779  		v.reset(OpCopy)
 15780  		v.AddArg(v0)
 15781  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15782  		v1.AuxInt = i0
 15783  		v1.Aux = s
 15784  		v1.AddArg(p)
 15785  		v0.AddArg(v1)
 15786  		v0.AddArg(mem)
 15787  		return true
 15788  	}
 15789  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])))
 15790  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15791  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15792  	for {
 15793  		t := v.Type
 15794  		_ = v.Args[1]
 15795  		s2 := v.Args[0]
 15796  		if s2.Op != OpPPC64SLDconst {
 15797  			break
 15798  		}
 15799  		if s2.AuxInt != 32 {
 15800  			break
 15801  		}
 15802  		x2 := s2.Args[0]
 15803  		if x2.Op != OpPPC64MOVBZload {
 15804  			break
 15805  		}
 15806  		i3 := x2.AuxInt
 15807  		s := x2.Aux
 15808  		_ = x2.Args[1]
 15809  		p := x2.Args[0]
 15810  		mem := x2.Args[1]
 15811  		o0 := v.Args[1]
 15812  		if o0.Op != OpPPC64OR {
 15813  			break
 15814  		}
 15815  		if o0.Type != t {
 15816  			break
 15817  		}
 15818  		_ = o0.Args[1]
 15819  		s1 := o0.Args[0]
 15820  		if s1.Op != OpPPC64SLDconst {
 15821  			break
 15822  		}
 15823  		if s1.AuxInt != 40 {
 15824  			break
 15825  		}
 15826  		x1 := s1.Args[0]
 15827  		if x1.Op != OpPPC64MOVBZload {
 15828  			break
 15829  		}
 15830  		i2 := x1.AuxInt
 15831  		if x1.Aux != s {
 15832  			break
 15833  		}
 15834  		_ = x1.Args[1]
 15835  		if p != x1.Args[0] {
 15836  			break
 15837  		}
 15838  		if mem != x1.Args[1] {
 15839  			break
 15840  		}
 15841  		s0 := o0.Args[1]
 15842  		if s0.Op != OpPPC64SLDconst {
 15843  			break
 15844  		}
 15845  		if s0.AuxInt != 48 {
 15846  			break
 15847  		}
 15848  		x0 := s0.Args[0]
 15849  		if x0.Op != OpPPC64MOVHBRload {
 15850  			break
 15851  		}
 15852  		if x0.Type != t {
 15853  			break
 15854  		}
 15855  		_ = x0.Args[1]
 15856  		x0_0 := x0.Args[0]
 15857  		if x0_0.Op != OpPPC64MOVDaddr {
 15858  			break
 15859  		}
 15860  		if x0_0.Type != typ.Uintptr {
 15861  			break
 15862  		}
 15863  		i0 := x0_0.AuxInt
 15864  		if x0_0.Aux != s {
 15865  			break
 15866  		}
 15867  		if p != x0_0.Args[0] {
 15868  			break
 15869  		}
 15870  		if mem != x0.Args[1] {
 15871  			break
 15872  		}
 15873  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15874  			break
 15875  		}
 15876  		b = mergePoint(b, x0, x1, x2)
 15877  		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 15878  		v.reset(OpCopy)
 15879  		v.AddArg(v0)
 15880  		v0.AuxInt = 32
 15881  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15882  		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15883  		v2.AuxInt = i0
 15884  		v2.Aux = s
 15885  		v2.AddArg(p)
 15886  		v1.AddArg(v2)
 15887  		v1.AddArg(mem)
 15888  		v0.AddArg(v1)
 15889  		return true
 15890  	}
 15891  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])))
 15892  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15893  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15894  	for {
 15895  		t := v.Type
 15896  		_ = v.Args[1]
 15897  		s2 := v.Args[0]
 15898  		if s2.Op != OpPPC64SLDconst {
 15899  			break
 15900  		}
 15901  		if s2.AuxInt != 32 {
 15902  			break
 15903  		}
 15904  		x2 := s2.Args[0]
 15905  		if x2.Op != OpPPC64MOVBZload {
 15906  			break
 15907  		}
 15908  		i3 := x2.AuxInt
 15909  		s := x2.Aux
 15910  		_ = x2.Args[1]
 15911  		p := x2.Args[0]
 15912  		mem := x2.Args[1]
 15913  		o0 := v.Args[1]
 15914  		if o0.Op != OpPPC64OR {
 15915  			break
 15916  		}
 15917  		if o0.Type != t {
 15918  			break
 15919  		}
 15920  		_ = o0.Args[1]
 15921  		s0 := o0.Args[0]
 15922  		if s0.Op != OpPPC64SLDconst {
 15923  			break
 15924  		}
 15925  		if s0.AuxInt != 48 {
 15926  			break
 15927  		}
 15928  		x0 := s0.Args[0]
 15929  		if x0.Op != OpPPC64MOVHBRload {
 15930  			break
 15931  		}
 15932  		if x0.Type != t {
 15933  			break
 15934  		}
 15935  		_ = x0.Args[1]
 15936  		x0_0 := x0.Args[0]
 15937  		if x0_0.Op != OpPPC64MOVDaddr {
 15938  			break
 15939  		}
 15940  		if x0_0.Type != typ.Uintptr {
 15941  			break
 15942  		}
 15943  		i0 := x0_0.AuxInt
 15944  		if x0_0.Aux != s {
 15945  			break
 15946  		}
 15947  		if p != x0_0.Args[0] {
 15948  			break
 15949  		}
 15950  		if mem != x0.Args[1] {
 15951  			break
 15952  		}
 15953  		s1 := o0.Args[1]
 15954  		if s1.Op != OpPPC64SLDconst {
 15955  			break
 15956  		}
 15957  		if s1.AuxInt != 40 {
 15958  			break
 15959  		}
 15960  		x1 := s1.Args[0]
 15961  		if x1.Op != OpPPC64MOVBZload {
 15962  			break
 15963  		}
 15964  		i2 := x1.AuxInt
 15965  		if x1.Aux != s {
 15966  			break
 15967  		}
 15968  		_ = x1.Args[1]
 15969  		if p != x1.Args[0] {
 15970  			break
 15971  		}
 15972  		if mem != x1.Args[1] {
 15973  			break
 15974  		}
 15975  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15976  			break
 15977  		}
 15978  		b = mergePoint(b, x0, x1, x2)
 15979  		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 15980  		v.reset(OpCopy)
 15981  		v.AddArg(v0)
 15982  		v0.AuxInt = 32
 15983  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15984  		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15985  		v2.AuxInt = i0
 15986  		v2.Aux = s
 15987  		v2.AddArg(p)
 15988  		v1.AddArg(v2)
 15989  		v1.AddArg(mem)
 15990  		v0.AddArg(v1)
 15991  		return true
 15992  	}
 15993  	return false
 15994  }
 15995  func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
 15996  	b := v.Block
 15997  	_ = b
 15998  	config := b.Func.Config
 15999  	_ = config
 16000  	typ := &b.Func.Config.Types
 16001  	_ = typ
 16002  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 16003  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16004  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16005  	for {
 16006  		t := v.Type
 16007  		_ = v.Args[1]
 16008  		o0 := v.Args[0]
 16009  		if o0.Op != OpPPC64OR {
 16010  			break
 16011  		}
 16012  		if o0.Type != t {
 16013  			break
 16014  		}
 16015  		_ = o0.Args[1]
 16016  		s1 := o0.Args[0]
 16017  		if s1.Op != OpPPC64SLDconst {
 16018  			break
 16019  		}
 16020  		if s1.AuxInt != 40 {
 16021  			break
 16022  		}
 16023  		x1 := s1.Args[0]
 16024  		if x1.Op != OpPPC64MOVBZload {
 16025  			break
 16026  		}
 16027  		i2 := x1.AuxInt
 16028  		s := x1.Aux
 16029  		_ = x1.Args[1]
 16030  		p := x1.Args[0]
 16031  		mem := x1.Args[1]
 16032  		s0 := o0.Args[1]
 16033  		if s0.Op != OpPPC64SLDconst {
 16034  			break
 16035  		}
 16036  		if s0.AuxInt != 48 {
 16037  			break
 16038  		}
 16039  		x0 := s0.Args[0]
 16040  		if x0.Op != OpPPC64MOVHBRload {
 16041  			break
 16042  		}
 16043  		if x0.Type != t {
 16044  			break
 16045  		}
 16046  		_ = x0.Args[1]
 16047  		x0_0 := x0.Args[0]
 16048  		if x0_0.Op != OpPPC64MOVDaddr {
 16049  			break
 16050  		}
 16051  		if x0_0.Type != typ.Uintptr {
 16052  			break
 16053  		}
 16054  		i0 := x0_0.AuxInt
 16055  		if x0_0.Aux != s {
 16056  			break
 16057  		}
 16058  		if p != x0_0.Args[0] {
 16059  			break
 16060  		}
 16061  		if mem != x0.Args[1] {
 16062  			break
 16063  		}
 16064  		s2 := v.Args[1]
 16065  		if s2.Op != OpPPC64SLDconst {
 16066  			break
 16067  		}
 16068  		if s2.AuxInt != 32 {
 16069  			break
 16070  		}
 16071  		x2 := s2.Args[0]
 16072  		if x2.Op != OpPPC64MOVBZload {
 16073  			break
 16074  		}
 16075  		i3 := x2.AuxInt
 16076  		if x2.Aux != s {
 16077  			break
 16078  		}
 16079  		_ = x2.Args[1]
 16080  		if p != x2.Args[0] {
 16081  			break
 16082  		}
 16083  		if mem != x2.Args[1] {
 16084  			break
 16085  		}
 16086  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16087  			break
 16088  		}
 16089  		b = mergePoint(b, x0, x1, x2)
 16090  		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 16091  		v.reset(OpCopy)
 16092  		v.AddArg(v0)
 16093  		v0.AuxInt = 32
 16094  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 16095  		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16096  		v2.AuxInt = i0
 16097  		v2.Aux = s
 16098  		v2.AddArg(p)
 16099  		v1.AddArg(v2)
 16100  		v1.AddArg(mem)
 16101  		v0.AddArg(v1)
 16102  		return true
 16103  	}
 16104  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 16105  	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16106  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16107  	for {
 16108  		t := v.Type
 16109  		_ = v.Args[1]
 16110  		o0 := v.Args[0]
 16111  		if o0.Op != OpPPC64OR {
 16112  			break
 16113  		}
 16114  		if o0.Type != t {
 16115  			break
 16116  		}
 16117  		_ = o0.Args[1]
 16118  		s0 := o0.Args[0]
 16119  		if s0.Op != OpPPC64SLDconst {
 16120  			break
 16121  		}
 16122  		if s0.AuxInt != 48 {
 16123  			break
 16124  		}
 16125  		x0 := s0.Args[0]
 16126  		if x0.Op != OpPPC64MOVHBRload {
 16127  			break
 16128  		}
 16129  		if x0.Type != t {
 16130  			break
 16131  		}
 16132  		_ = x0.Args[1]
 16133  		x0_0 := x0.Args[0]
 16134  		if x0_0.Op != OpPPC64MOVDaddr {
 16135  			break
 16136  		}
 16137  		if x0_0.Type != typ.Uintptr {
 16138  			break
 16139  		}
 16140  		i0 := x0_0.AuxInt
 16141  		s := x0_0.Aux
 16142  		p := x0_0.Args[0]
 16143  		mem := x0.Args[1]
 16144  		s1 := o0.Args[1]
 16145  		if s1.Op != OpPPC64SLDconst {
 16146  			break
 16147  		}
 16148  		if s1.AuxInt != 40 {
 16149  			break
 16150  		}
 16151  		x1 := s1.Args[0]
 16152  		if x1.Op != OpPPC64MOVBZload {
 16153  			break
 16154  		}
 16155  		i2 := x1.AuxInt
 16156  		if x1.Aux != s {
 16157  			break
 16158  		}
 16159  		_ = x1.Args[1]
 16160  		if p != x1.Args[0] {
 16161  			break
 16162  		}
 16163  		if mem != x1.Args[1] {
 16164  			break
 16165  		}
 16166  		s2 := v.Args[1]
 16167  		if s2.Op != OpPPC64SLDconst {
 16168  			break
 16169  		}
 16170  		if s2.AuxInt != 32 {
 16171  			break
 16172  		}
 16173  		x2 := s2.Args[0]
 16174  		if x2.Op != OpPPC64MOVBZload {
 16175  			break
 16176  		}
 16177  		i3 := x2.AuxInt
 16178  		if x2.Aux != s {
 16179  			break
 16180  		}
 16181  		_ = x2.Args[1]
 16182  		if p != x2.Args[0] {
 16183  			break
 16184  		}
 16185  		if mem != x2.Args[1] {
 16186  			break
 16187  		}
 16188  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16189  			break
 16190  		}
 16191  		b = mergePoint(b, x0, x1, x2)
 16192  		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 16193  		v.reset(OpCopy)
 16194  		v.AddArg(v0)
 16195  		v0.AuxInt = 32
 16196  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 16197  		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16198  		v2.AuxInt = i0
 16199  		v2.Aux = s
 16200  		v2.AddArg(p)
 16201  		v1.AddArg(v2)
 16202  		v1.AddArg(mem)
 16203  		v0.AddArg(v1)
 16204  		return true
 16205  	}
 16206  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])))
 16207  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16208  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16209  	for {
 16210  		t := v.Type
 16211  		_ = v.Args[1]
 16212  		s2 := v.Args[0]
 16213  		if s2.Op != OpPPC64SLDconst {
 16214  			break
 16215  		}
 16216  		if s2.AuxInt != 56 {
 16217  			break
 16218  		}
 16219  		x2 := s2.Args[0]
 16220  		if x2.Op != OpPPC64MOVBZload {
 16221  			break
 16222  		}
 16223  		i0 := x2.AuxInt
 16224  		s := x2.Aux
 16225  		_ = x2.Args[1]
 16226  		p := x2.Args[0]
 16227  		mem := x2.Args[1]
 16228  		o0 := v.Args[1]
 16229  		if o0.Op != OpPPC64OR {
 16230  			break
 16231  		}
 16232  		if o0.Type != t {
 16233  			break
 16234  		}
 16235  		_ = o0.Args[1]
 16236  		s1 := o0.Args[0]
 16237  		if s1.Op != OpPPC64SLDconst {
 16238  			break
 16239  		}
 16240  		if s1.AuxInt != 48 {
 16241  			break
 16242  		}
 16243  		x1 := s1.Args[0]
 16244  		if x1.Op != OpPPC64MOVBZload {
 16245  			break
 16246  		}
 16247  		i1 := x1.AuxInt
 16248  		if x1.Aux != s {
 16249  			break
 16250  		}
 16251  		_ = x1.Args[1]
 16252  		if p != x1.Args[0] {
 16253  			break
 16254  		}
 16255  		if mem != x1.Args[1] {
 16256  			break
 16257  		}
 16258  		s0 := o0.Args[1]
 16259  		if s0.Op != OpPPC64SLDconst {
 16260  			break
 16261  		}
 16262  		if s0.AuxInt != 32 {
 16263  			break
 16264  		}
 16265  		x0 := s0.Args[0]
 16266  		if x0.Op != OpPPC64MOVHBRload {
 16267  			break
 16268  		}
 16269  		if x0.Type != t {
 16270  			break
 16271  		}
 16272  		_ = x0.Args[1]
 16273  		x0_0 := x0.Args[0]
 16274  		if x0_0.Op != OpPPC64MOVDaddr {
 16275  			break
 16276  		}
 16277  		if x0_0.Type != typ.Uintptr {
 16278  			break
 16279  		}
 16280  		i2 := x0_0.AuxInt
 16281  		if x0_0.Aux != s {
 16282  			break
 16283  		}
 16284  		if p != x0_0.Args[0] {
 16285  			break
 16286  		}
 16287  		if mem != x0.Args[1] {
 16288  			break
 16289  		}
 16290  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16291  			break
 16292  		}
 16293  		b = mergePoint(b, x0, x1, x2)
 16294  		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 16295  		v.reset(OpCopy)
 16296  		v.AddArg(v0)
 16297  		v0.AuxInt = 32
 16298  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 16299  		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16300  		v2.AuxInt = i0
 16301  		v2.Aux = s
 16302  		v2.AddArg(p)
 16303  		v1.AddArg(v2)
 16304  		v1.AddArg(mem)
 16305  		v0.AddArg(v1)
 16306  		return true
 16307  	}
 16308  	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 16309  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16310  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16311  	for {
 16312  		t := v.Type
 16313  		_ = v.Args[1]
 16314  		s2 := v.Args[0]
 16315  		if s2.Op != OpPPC64SLDconst {
 16316  			break
 16317  		}
 16318  		if s2.AuxInt != 56 {
 16319  			break
 16320  		}
 16321  		x2 := s2.Args[0]
 16322  		if x2.Op != OpPPC64MOVBZload {
 16323  			break
 16324  		}
 16325  		i0 := x2.AuxInt
 16326  		s := x2.Aux
 16327  		_ = x2.Args[1]
 16328  		p := x2.Args[0]
 16329  		mem := x2.Args[1]
 16330  		o0 := v.Args[1]
 16331  		if o0.Op != OpPPC64OR {
 16332  			break
 16333  		}
 16334  		if o0.Type != t {
 16335  			break
 16336  		}
 16337  		_ = o0.Args[1]
 16338  		s0 := o0.Args[0]
 16339  		if s0.Op != OpPPC64SLDconst {
 16340  			break
 16341  		}
 16342  		if s0.AuxInt != 32 {
 16343  			break
 16344  		}
 16345  		x0 := s0.Args[0]
 16346  		if x0.Op != OpPPC64MOVHBRload {
 16347  			break
 16348  		}
 16349  		if x0.Type != t {
 16350  			break
 16351  		}
 16352  		_ = x0.Args[1]
 16353  		x0_0 := x0.Args[0]
 16354  		if x0_0.Op != OpPPC64MOVDaddr {
 16355  			break
 16356  		}
 16357  		if x0_0.Type != typ.Uintptr {
 16358  			break
 16359  		}
 16360  		i2 := x0_0.AuxInt
 16361  		if x0_0.Aux != s {
 16362  			break
 16363  		}
 16364  		if p != x0_0.Args[0] {
 16365  			break
 16366  		}
 16367  		if mem != x0.Args[1] {
 16368  			break
 16369  		}
 16370  		s1 := o0.Args[1]
 16371  		if s1.Op != OpPPC64SLDconst {
 16372  			break
 16373  		}
 16374  		if s1.AuxInt != 48 {
 16375  			break
 16376  		}
 16377  		x1 := s1.Args[0]
 16378  		if x1.Op != OpPPC64MOVBZload {
 16379  			break
 16380  		}
 16381  		i1 := x1.AuxInt
 16382  		if x1.Aux != s {
 16383  			break
 16384  		}
 16385  		_ = x1.Args[1]
 16386  		if p != x1.Args[0] {
 16387  			break
 16388  		}
 16389  		if mem != x1.Args[1] {
 16390  			break
 16391  		}
 16392  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16393  			break
 16394  		}
 16395  		b = mergePoint(b, x0, x1, x2)
 16396  		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 16397  		v.reset(OpCopy)
 16398  		v.AddArg(v0)
 16399  		v0.AuxInt = 32
 16400  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 16401  		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16402  		v2.AuxInt = i0
 16403  		v2.Aux = s
 16404  		v2.AddArg(p)
 16405  		v1.AddArg(v2)
 16406  		v1.AddArg(mem)
 16407  		v0.AddArg(v1)
 16408  		return true
 16409  	}
 16410  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 16411  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16412  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16413  	for {
 16414  		t := v.Type
 16415  		_ = v.Args[1]
 16416  		o0 := v.Args[0]
 16417  		if o0.Op != OpPPC64OR {
 16418  			break
 16419  		}
 16420  		if o0.Type != t {
 16421  			break
 16422  		}
 16423  		_ = o0.Args[1]
 16424  		s1 := o0.Args[0]
 16425  		if s1.Op != OpPPC64SLDconst {
 16426  			break
 16427  		}
 16428  		if s1.AuxInt != 48 {
 16429  			break
 16430  		}
 16431  		x1 := s1.Args[0]
 16432  		if x1.Op != OpPPC64MOVBZload {
 16433  			break
 16434  		}
 16435  		i1 := x1.AuxInt
 16436  		s := x1.Aux
 16437  		_ = x1.Args[1]
 16438  		p := x1.Args[0]
 16439  		mem := x1.Args[1]
 16440  		s0 := o0.Args[1]
 16441  		if s0.Op != OpPPC64SLDconst {
 16442  			break
 16443  		}
 16444  		if s0.AuxInt != 32 {
 16445  			break
 16446  		}
 16447  		x0 := s0.Args[0]
 16448  		if x0.Op != OpPPC64MOVHBRload {
 16449  			break
 16450  		}
 16451  		if x0.Type != t {
 16452  			break
 16453  		}
 16454  		_ = x0.Args[1]
 16455  		x0_0 := x0.Args[0]
 16456  		if x0_0.Op != OpPPC64MOVDaddr {
 16457  			break
 16458  		}
 16459  		if x0_0.Type != typ.Uintptr {
 16460  			break
 16461  		}
 16462  		i2 := x0_0.AuxInt
 16463  		if x0_0.Aux != s {
 16464  			break
 16465  		}
 16466  		if p != x0_0.Args[0] {
 16467  			break
 16468  		}
 16469  		if mem != x0.Args[1] {
 16470  			break
 16471  		}
 16472  		s2 := v.Args[1]
 16473  		if s2.Op != OpPPC64SLDconst {
 16474  			break
 16475  		}
 16476  		if s2.AuxInt != 56 {
 16477  			break
 16478  		}
 16479  		x2 := s2.Args[0]
 16480  		if x2.Op != OpPPC64MOVBZload {
 16481  			break
 16482  		}
 16483  		i0 := x2.AuxInt
 16484  		if x2.Aux != s {
 16485  			break
 16486  		}
 16487  		_ = x2.Args[1]
 16488  		if p != x2.Args[0] {
 16489  			break
 16490  		}
 16491  		if mem != x2.Args[1] {
 16492  			break
 16493  		}
 16494  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16495  			break
 16496  		}
 16497  		b = mergePoint(b, x0, x1, x2)
 16498  		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 16499  		v.reset(OpCopy)
 16500  		v.AddArg(v0)
 16501  		v0.AuxInt = 32
 16502  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 16503  		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16504  		v2.AuxInt = i0
 16505  		v2.Aux = s
 16506  		v2.AddArg(p)
 16507  		v1.AddArg(v2)
 16508  		v1.AddArg(mem)
 16509  		v0.AddArg(v1)
 16510  		return true
 16511  	}
 16512  	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 16513  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 16514  	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 16515  	for {
 16516  		t := v.Type
 16517  		_ = v.Args[1]
 16518  		o0 := v.Args[0]
 16519  		if o0.Op != OpPPC64OR {
 16520  			break
 16521  		}
 16522  		if o0.Type != t {
 16523  			break
 16524  		}
 16525  		_ = o0.Args[1]
 16526  		s0 := o0.Args[0]
 16527  		if s0.Op != OpPPC64SLDconst {
 16528  			break
 16529  		}
 16530  		if s0.AuxInt != 32 {
 16531  			break
 16532  		}
 16533  		x0 := s0.Args[0]
 16534  		if x0.Op != OpPPC64MOVHBRload {
 16535  			break
 16536  		}
 16537  		if x0.Type != t {
 16538  			break
 16539  		}
 16540  		_ = x0.Args[1]
 16541  		x0_0 := x0.Args[0]
 16542  		if x0_0.Op != OpPPC64MOVDaddr {
 16543  			break
 16544  		}
 16545  		if x0_0.Type != typ.Uintptr {
 16546  			break
 16547  		}
 16548  		i2 := x0_0.AuxInt
 16549  		s := x0_0.Aux
 16550  		p := x0_0.Args[0]
 16551  		mem := x0.Args[1]
 16552  		s1 := o0.Args[1]
 16553  		if s1.Op != OpPPC64SLDconst {
 16554  			break
 16555  		}
 16556  		if s1.AuxInt != 48 {
 16557  			break
 16558  		}
 16559  		x1 := s1.Args[0]
 16560  		if x1.Op != OpPPC64MOVBZload {
 16561  			break
 16562  		}
 16563  		i1 := x1.AuxInt
 16564  		if x1.Aux != s {
 16565  			break
 16566  		}
 16567  		_ = x1.Args[1]
 16568  		if p != x1.Args[0] {
 16569  			break
 16570  		}
 16571  		if mem != x1.Args[1] {
 16572  			break
 16573  		}
 16574  		s2 := v.Args[1]
 16575  		if s2.Op != OpPPC64SLDconst {
 16576  			break
 16577  		}
 16578  		if s2.AuxInt != 56 {
 16579  			break
 16580  		}
 16581  		x2 := s2.Args[0]
 16582  		if x2.Op != OpPPC64MOVBZload {
 16583  			break
 16584  		}
 16585  		i0 := x2.AuxInt
 16586  		if x2.Aux != s {
 16587  			break
 16588  		}
 16589  		_ = x2.Args[1]
 16590  		if p != x2.Args[0] {
 16591  			break
 16592  		}
 16593  		if mem != x2.Args[1] {
 16594  			break
 16595  		}
 16596  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16597  			break
 16598  		}
 16599  		b = mergePoint(b, x0, x1, x2)
 16600  		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 16601  		v.reset(OpCopy)
 16602  		v.AddArg(v0)
 16603  		v0.AuxInt = 32
 16604  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 16605  		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16606  		v2.AuxInt = i0
 16607  		v2.Aux = s
 16608  		v2.AddArg(p)
 16609  		v1.AddArg(v2)
 16610  		v1.AddArg(mem)
 16611  		v0.AddArg(v1)
 16612  		return true
 16613  	}
 16614  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))))
 16615  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16616  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16617  	for {
 16618  		t := v.Type
 16619  		_ = v.Args[1]
 16620  		s6 := v.Args[0]
 16621  		if s6.Op != OpPPC64SLDconst {
 16622  			break
 16623  		}
 16624  		if s6.AuxInt != 56 {
 16625  			break
 16626  		}
 16627  		x7 := s6.Args[0]
 16628  		if x7.Op != OpPPC64MOVBZload {
 16629  			break
 16630  		}
 16631  		i7 := x7.AuxInt
 16632  		s := x7.Aux
 16633  		_ = x7.Args[1]
 16634  		p := x7.Args[0]
 16635  		mem := x7.Args[1]
 16636  		o5 := v.Args[1]
 16637  		if o5.Op != OpPPC64OR {
 16638  			break
 16639  		}
 16640  		if o5.Type != t {
 16641  			break
 16642  		}
 16643  		_ = o5.Args[1]
 16644  		s5 := o5.Args[0]
 16645  		if s5.Op != OpPPC64SLDconst {
 16646  			break
 16647  		}
 16648  		if s5.AuxInt != 48 {
 16649  			break
 16650  		}
 16651  		x6 := s5.Args[0]
 16652  		if x6.Op != OpPPC64MOVBZload {
 16653  			break
 16654  		}
 16655  		i6 := x6.AuxInt
 16656  		if x6.Aux != s {
 16657  			break
 16658  		}
 16659  		_ = x6.Args[1]
 16660  		if p != x6.Args[0] {
 16661  			break
 16662  		}
 16663  		if mem != x6.Args[1] {
 16664  			break
 16665  		}
 16666  		o4 := o5.Args[1]
 16667  		if o4.Op != OpPPC64OR {
 16668  			break
 16669  		}
 16670  		if o4.Type != t {
 16671  			break
 16672  		}
 16673  		_ = o4.Args[1]
 16674  		s4 := o4.Args[0]
 16675  		if s4.Op != OpPPC64SLDconst {
 16676  			break
 16677  		}
 16678  		if s4.AuxInt != 40 {
 16679  			break
 16680  		}
 16681  		x5 := s4.Args[0]
 16682  		if x5.Op != OpPPC64MOVBZload {
 16683  			break
 16684  		}
 16685  		i5 := x5.AuxInt
 16686  		if x5.Aux != s {
 16687  			break
 16688  		}
 16689  		_ = x5.Args[1]
 16690  		if p != x5.Args[0] {
 16691  			break
 16692  		}
 16693  		if mem != x5.Args[1] {
 16694  			break
 16695  		}
 16696  		o3 := o4.Args[1]
 16697  		if o3.Op != OpPPC64OR {
 16698  			break
 16699  		}
 16700  		if o3.Type != t {
 16701  			break
 16702  		}
 16703  		_ = o3.Args[1]
 16704  		s3 := o3.Args[0]
 16705  		if s3.Op != OpPPC64SLDconst {
 16706  			break
 16707  		}
 16708  		if s3.AuxInt != 32 {
 16709  			break
 16710  		}
 16711  		x4 := s3.Args[0]
 16712  		if x4.Op != OpPPC64MOVBZload {
 16713  			break
 16714  		}
 16715  		i4 := x4.AuxInt
 16716  		if x4.Aux != s {
 16717  			break
 16718  		}
 16719  		_ = x4.Args[1]
 16720  		if p != x4.Args[0] {
 16721  			break
 16722  		}
 16723  		if mem != x4.Args[1] {
 16724  			break
 16725  		}
 16726  		x0 := o3.Args[1]
 16727  		if x0.Op != OpPPC64MOVWZload {
 16728  			break
 16729  		}
 16730  		i0 := x0.AuxInt
 16731  		if x0.Aux != s {
 16732  			break
 16733  		}
 16734  		_ = x0.Args[1]
 16735  		if p != x0.Args[0] {
 16736  			break
 16737  		}
 16738  		if mem != x0.Args[1] {
 16739  			break
 16740  		}
 16741  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16742  			break
 16743  		}
 16744  		b = mergePoint(b, x0, x4, x5, x6, x7)
 16745  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDload, t)
 16746  		v.reset(OpCopy)
 16747  		v.AddArg(v0)
 16748  		v0.AuxInt = i0
 16749  		v0.Aux = s
 16750  		v0.AddArg(p)
 16751  		v0.AddArg(mem)
 16752  		return true
 16753  	}
 16754  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 16755  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16756  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16757  	for {
 16758  		t := v.Type
 16759  		_ = v.Args[1]
 16760  		s6 := v.Args[0]
 16761  		if s6.Op != OpPPC64SLDconst {
 16762  			break
 16763  		}
 16764  		if s6.AuxInt != 56 {
 16765  			break
 16766  		}
 16767  		x7 := s6.Args[0]
 16768  		if x7.Op != OpPPC64MOVBZload {
 16769  			break
 16770  		}
 16771  		i7 := x7.AuxInt
 16772  		s := x7.Aux
 16773  		_ = x7.Args[1]
 16774  		p := x7.Args[0]
 16775  		mem := x7.Args[1]
 16776  		o5 := v.Args[1]
 16777  		if o5.Op != OpPPC64OR {
 16778  			break
 16779  		}
 16780  		if o5.Type != t {
 16781  			break
 16782  		}
 16783  		_ = o5.Args[1]
 16784  		s5 := o5.Args[0]
 16785  		if s5.Op != OpPPC64SLDconst {
 16786  			break
 16787  		}
 16788  		if s5.AuxInt != 48 {
 16789  			break
 16790  		}
 16791  		x6 := s5.Args[0]
 16792  		if x6.Op != OpPPC64MOVBZload {
 16793  			break
 16794  		}
 16795  		i6 := x6.AuxInt
 16796  		if x6.Aux != s {
 16797  			break
 16798  		}
 16799  		_ = x6.Args[1]
 16800  		if p != x6.Args[0] {
 16801  			break
 16802  		}
 16803  		if mem != x6.Args[1] {
 16804  			break
 16805  		}
 16806  		o4 := o5.Args[1]
 16807  		if o4.Op != OpPPC64OR {
 16808  			break
 16809  		}
 16810  		if o4.Type != t {
 16811  			break
 16812  		}
 16813  		_ = o4.Args[1]
 16814  		s4 := o4.Args[0]
 16815  		if s4.Op != OpPPC64SLDconst {
 16816  			break
 16817  		}
 16818  		if s4.AuxInt != 40 {
 16819  			break
 16820  		}
 16821  		x5 := s4.Args[0]
 16822  		if x5.Op != OpPPC64MOVBZload {
 16823  			break
 16824  		}
 16825  		i5 := x5.AuxInt
 16826  		if x5.Aux != s {
 16827  			break
 16828  		}
 16829  		_ = x5.Args[1]
 16830  		if p != x5.Args[0] {
 16831  			break
 16832  		}
 16833  		if mem != x5.Args[1] {
 16834  			break
 16835  		}
 16836  		o3 := o4.Args[1]
 16837  		if o3.Op != OpPPC64OR {
 16838  			break
 16839  		}
 16840  		if o3.Type != t {
 16841  			break
 16842  		}
 16843  		_ = o3.Args[1]
 16844  		x0 := o3.Args[0]
 16845  		if x0.Op != OpPPC64MOVWZload {
 16846  			break
 16847  		}
 16848  		i0 := x0.AuxInt
 16849  		if x0.Aux != s {
 16850  			break
 16851  		}
 16852  		_ = x0.Args[1]
 16853  		if p != x0.Args[0] {
 16854  			break
 16855  		}
 16856  		if mem != x0.Args[1] {
 16857  			break
 16858  		}
 16859  		s3 := o3.Args[1]
 16860  		if s3.Op != OpPPC64SLDconst {
 16861  			break
 16862  		}
 16863  		if s3.AuxInt != 32 {
 16864  			break
 16865  		}
 16866  		x4 := s3.Args[0]
 16867  		if x4.Op != OpPPC64MOVBZload {
 16868  			break
 16869  		}
 16870  		i4 := x4.AuxInt
 16871  		if x4.Aux != s {
 16872  			break
 16873  		}
 16874  		_ = x4.Args[1]
 16875  		if p != x4.Args[0] {
 16876  			break
 16877  		}
 16878  		if mem != x4.Args[1] {
 16879  			break
 16880  		}
 16881  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16882  			break
 16883  		}
 16884  		b = mergePoint(b, x0, x4, x5, x6, x7)
 16885  		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDload, t)
 16886  		v.reset(OpCopy)
 16887  		v.AddArg(v0)
 16888  		v0.AuxInt = i0
 16889  		v0.Aux = s
 16890  		v0.AddArg(p)
 16891  		v0.AddArg(mem)
 16892  		return true
 16893  	}
 16894  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16895  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16896  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16897  	for {
 16898  		t := v.Type
 16899  		_ = v.Args[1]
 16900  		s6 := v.Args[0]
 16901  		if s6.Op != OpPPC64SLDconst {
 16902  			break
 16903  		}
 16904  		if s6.AuxInt != 56 {
 16905  			break
 16906  		}
 16907  		x7 := s6.Args[0]
 16908  		if x7.Op != OpPPC64MOVBZload {
 16909  			break
 16910  		}
 16911  		i7 := x7.AuxInt
 16912  		s := x7.Aux
 16913  		_ = x7.Args[1]
 16914  		p := x7.Args[0]
 16915  		mem := x7.Args[1]
 16916  		o5 := v.Args[1]
 16917  		if o5.Op != OpPPC64OR {
 16918  			break
 16919  		}
 16920  		if o5.Type != t {
 16921  			break
 16922  		}
 16923  		_ = o5.Args[1]
 16924  		s5 := o5.Args[0]
 16925  		if s5.Op != OpPPC64SLDconst {
 16926  			break
 16927  		}
 16928  		if s5.AuxInt != 48 {
 16929  			break
 16930  		}
 16931  		x6 := s5.Args[0]
 16932  		if x6.Op != OpPPC64MOVBZload {
 16933  			break
 16934  		}
 16935  		i6 := x6.AuxInt
 16936  		if x6.Aux != s {
 16937  			break
 16938  		}
 16939  		_ = x6.Args[1]
 16940  		if p != x6.Args[0] {
 16941  			break
 16942  		}
 16943  		if mem != x6.Args[1] {
 16944  			break
 16945  		}
 16946  		o4 := o5.Args[1]
 16947  		if o4.Op != OpPPC64OR {
 16948  			break
 16949  		}
 16950  		if o4.Type != t {
 16951  			break
 16952  		}
 16953  		_ = o4.Args[1]
 16954  		o3 := o4.Args[0]
 16955  		if o3.Op != OpPPC64OR {
 16956  			break
 16957  		}
 16958  		if o3.Type != t {
 16959  			break
 16960  		}
 16961  		_ = o3.Args[1]
 16962  		s3 := o3.Args[0]
 16963  		if s3.Op != OpPPC64SLDconst {
 16964  			break
 16965  		}
 16966  		if s3.AuxInt != 32 {
 16967  			break
 16968  		}
 16969  		x4 := s3.Args[0]
 16970  		if x4.Op != OpPPC64MOVBZload {
 16971  			break
 16972  		}
 16973  		i4 := x4.AuxInt
 16974  		if x4.Aux != s {
 16975  			break
 16976  		}
 16977  		_ = x4.Args[1]
 16978  		if p != x4.Args[0] {
 16979  			break
 16980  		}
 16981  		if mem != x4.Args[1] {
 16982  			break
 16983  		}
 16984  		x0 := o3.Args[1]
 16985  		if x0.Op != OpPPC64MOVWZload {
 16986  			break
 16987  		}
 16988  		i0 := x0.AuxInt
 16989  		if x0.Aux != s {
 16990  			break
 16991  		}
 16992  		_ = x0.Args[1]
 16993  		if p != x0.Args[0] {
 16994  			break
 16995  		}
 16996  		if mem != x0.Args[1] {
 16997  			break
 16998  		}
 16999  		s4 := o4.Args[1]
 17000  		if s4.Op != OpPPC64SLDconst {
 17001  			break
 17002  		}
 17003  		if s4.AuxInt != 40 {
 17004  			break
 17005  		}
 17006  		x5 := s4.Args[0]
 17007  		if x5.Op != OpPPC64MOVBZload {
 17008  			break
 17009  		}
 17010  		i5 := x5.AuxInt
 17011  		if x5.Aux != s {
 17012  			break
 17013  		}
 17014  		_ = x5.Args[1]
 17015  		if p != x5.Args[0] {
 17016  			break
 17017  		}
 17018  		if mem != x5.Args[1] {
 17019  			break
 17020  		}
 17021  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17022  			break
 17023  		}
 17024  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17025  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
 17026  		v.reset(OpCopy)
 17027  		v.AddArg(v0)
 17028  		v0.AuxInt = i0
 17029  		v0.Aux = s
 17030  		v0.AddArg(p)
 17031  		v0.AddArg(mem)
 17032  		return true
 17033  	}
 17034  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 17035  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17036  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17037  	for {
 17038  		t := v.Type
 17039  		_ = v.Args[1]
 17040  		s6 := v.Args[0]
 17041  		if s6.Op != OpPPC64SLDconst {
 17042  			break
 17043  		}
 17044  		if s6.AuxInt != 56 {
 17045  			break
 17046  		}
 17047  		x7 := s6.Args[0]
 17048  		if x7.Op != OpPPC64MOVBZload {
 17049  			break
 17050  		}
 17051  		i7 := x7.AuxInt
 17052  		s := x7.Aux
 17053  		_ = x7.Args[1]
 17054  		p := x7.Args[0]
 17055  		mem := x7.Args[1]
 17056  		o5 := v.Args[1]
 17057  		if o5.Op != OpPPC64OR {
 17058  			break
 17059  		}
 17060  		if o5.Type != t {
 17061  			break
 17062  		}
 17063  		_ = o5.Args[1]
 17064  		s5 := o5.Args[0]
 17065  		if s5.Op != OpPPC64SLDconst {
 17066  			break
 17067  		}
 17068  		if s5.AuxInt != 48 {
 17069  			break
 17070  		}
 17071  		x6 := s5.Args[0]
 17072  		if x6.Op != OpPPC64MOVBZload {
 17073  			break
 17074  		}
 17075  		i6 := x6.AuxInt
 17076  		if x6.Aux != s {
 17077  			break
 17078  		}
 17079  		_ = x6.Args[1]
 17080  		if p != x6.Args[0] {
 17081  			break
 17082  		}
 17083  		if mem != x6.Args[1] {
 17084  			break
 17085  		}
 17086  		o4 := o5.Args[1]
 17087  		if o4.Op != OpPPC64OR {
 17088  			break
 17089  		}
 17090  		if o4.Type != t {
 17091  			break
 17092  		}
 17093  		_ = o4.Args[1]
 17094  		o3 := o4.Args[0]
 17095  		if o3.Op != OpPPC64OR {
 17096  			break
 17097  		}
 17098  		if o3.Type != t {
 17099  			break
 17100  		}
 17101  		_ = o3.Args[1]
 17102  		x0 := o3.Args[0]
 17103  		if x0.Op != OpPPC64MOVWZload {
 17104  			break
 17105  		}
 17106  		i0 := x0.AuxInt
 17107  		if x0.Aux != s {
 17108  			break
 17109  		}
 17110  		_ = x0.Args[1]
 17111  		if p != x0.Args[0] {
 17112  			break
 17113  		}
 17114  		if mem != x0.Args[1] {
 17115  			break
 17116  		}
 17117  		s3 := o3.Args[1]
 17118  		if s3.Op != OpPPC64SLDconst {
 17119  			break
 17120  		}
 17121  		if s3.AuxInt != 32 {
 17122  			break
 17123  		}
 17124  		x4 := s3.Args[0]
 17125  		if x4.Op != OpPPC64MOVBZload {
 17126  			break
 17127  		}
 17128  		i4 := x4.AuxInt
 17129  		if x4.Aux != s {
 17130  			break
 17131  		}
 17132  		_ = x4.Args[1]
 17133  		if p != x4.Args[0] {
 17134  			break
 17135  		}
 17136  		if mem != x4.Args[1] {
 17137  			break
 17138  		}
 17139  		s4 := o4.Args[1]
 17140  		if s4.Op != OpPPC64SLDconst {
 17141  			break
 17142  		}
 17143  		if s4.AuxInt != 40 {
 17144  			break
 17145  		}
 17146  		x5 := s4.Args[0]
 17147  		if x5.Op != OpPPC64MOVBZload {
 17148  			break
 17149  		}
 17150  		i5 := x5.AuxInt
 17151  		if x5.Aux != s {
 17152  			break
 17153  		}
 17154  		_ = x5.Args[1]
 17155  		if p != x5.Args[0] {
 17156  			break
 17157  		}
 17158  		if mem != x5.Args[1] {
 17159  			break
 17160  		}
 17161  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17162  			break
 17163  		}
 17164  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17165  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
 17166  		v.reset(OpCopy)
 17167  		v.AddArg(v0)
 17168  		v0.AuxInt = i0
 17169  		v0.Aux = s
 17170  		v0.AddArg(p)
 17171  		v0.AddArg(mem)
 17172  		return true
 17173  	}
 17174  	return false
 17175  }
 17176  func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
 17177  	b := v.Block
 17178  	_ = b
 17179  	config := b.Func.Config
 17180  	_ = config
 17181  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17182  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17183  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17184  	for {
 17185  		t := v.Type
 17186  		_ = v.Args[1]
 17187  		s6 := v.Args[0]
 17188  		if s6.Op != OpPPC64SLDconst {
 17189  			break
 17190  		}
 17191  		if s6.AuxInt != 56 {
 17192  			break
 17193  		}
 17194  		x7 := s6.Args[0]
 17195  		if x7.Op != OpPPC64MOVBZload {
 17196  			break
 17197  		}
 17198  		i7 := x7.AuxInt
 17199  		s := x7.Aux
 17200  		_ = x7.Args[1]
 17201  		p := x7.Args[0]
 17202  		mem := x7.Args[1]
 17203  		o5 := v.Args[1]
 17204  		if o5.Op != OpPPC64OR {
 17205  			break
 17206  		}
 17207  		if o5.Type != t {
 17208  			break
 17209  		}
 17210  		_ = o5.Args[1]
 17211  		o4 := o5.Args[0]
 17212  		if o4.Op != OpPPC64OR {
 17213  			break
 17214  		}
 17215  		if o4.Type != t {
 17216  			break
 17217  		}
 17218  		_ = o4.Args[1]
 17219  		s4 := o4.Args[0]
 17220  		if s4.Op != OpPPC64SLDconst {
 17221  			break
 17222  		}
 17223  		if s4.AuxInt != 40 {
 17224  			break
 17225  		}
 17226  		x5 := s4.Args[0]
 17227  		if x5.Op != OpPPC64MOVBZload {
 17228  			break
 17229  		}
 17230  		i5 := x5.AuxInt
 17231  		if x5.Aux != s {
 17232  			break
 17233  		}
 17234  		_ = x5.Args[1]
 17235  		if p != x5.Args[0] {
 17236  			break
 17237  		}
 17238  		if mem != x5.Args[1] {
 17239  			break
 17240  		}
 17241  		o3 := o4.Args[1]
 17242  		if o3.Op != OpPPC64OR {
 17243  			break
 17244  		}
 17245  		if o3.Type != t {
 17246  			break
 17247  		}
 17248  		_ = o3.Args[1]
 17249  		s3 := o3.Args[0]
 17250  		if s3.Op != OpPPC64SLDconst {
 17251  			break
 17252  		}
 17253  		if s3.AuxInt != 32 {
 17254  			break
 17255  		}
 17256  		x4 := s3.Args[0]
 17257  		if x4.Op != OpPPC64MOVBZload {
 17258  			break
 17259  		}
 17260  		i4 := x4.AuxInt
 17261  		if x4.Aux != s {
 17262  			break
 17263  		}
 17264  		_ = x4.Args[1]
 17265  		if p != x4.Args[0] {
 17266  			break
 17267  		}
 17268  		if mem != x4.Args[1] {
 17269  			break
 17270  		}
 17271  		x0 := o3.Args[1]
 17272  		if x0.Op != OpPPC64MOVWZload {
 17273  			break
 17274  		}
 17275  		i0 := x0.AuxInt
 17276  		if x0.Aux != s {
 17277  			break
 17278  		}
 17279  		_ = x0.Args[1]
 17280  		if p != x0.Args[0] {
 17281  			break
 17282  		}
 17283  		if mem != x0.Args[1] {
 17284  			break
 17285  		}
 17286  		s5 := o5.Args[1]
 17287  		if s5.Op != OpPPC64SLDconst {
 17288  			break
 17289  		}
 17290  		if s5.AuxInt != 48 {
 17291  			break
 17292  		}
 17293  		x6 := s5.Args[0]
 17294  		if x6.Op != OpPPC64MOVBZload {
 17295  			break
 17296  		}
 17297  		i6 := x6.AuxInt
 17298  		if x6.Aux != s {
 17299  			break
 17300  		}
 17301  		_ = x6.Args[1]
 17302  		if p != x6.Args[0] {
 17303  			break
 17304  		}
 17305  		if mem != x6.Args[1] {
 17306  			break
 17307  		}
 17308  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17309  			break
 17310  		}
 17311  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17312  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17313  		v.reset(OpCopy)
 17314  		v.AddArg(v0)
 17315  		v0.AuxInt = i0
 17316  		v0.Aux = s
 17317  		v0.AddArg(p)
 17318  		v0.AddArg(mem)
 17319  		return true
 17320  	}
 17321  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17322  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17323  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17324  	for {
 17325  		t := v.Type
 17326  		_ = v.Args[1]
 17327  		s6 := v.Args[0]
 17328  		if s6.Op != OpPPC64SLDconst {
 17329  			break
 17330  		}
 17331  		if s6.AuxInt != 56 {
 17332  			break
 17333  		}
 17334  		x7 := s6.Args[0]
 17335  		if x7.Op != OpPPC64MOVBZload {
 17336  			break
 17337  		}
 17338  		i7 := x7.AuxInt
 17339  		s := x7.Aux
 17340  		_ = x7.Args[1]
 17341  		p := x7.Args[0]
 17342  		mem := x7.Args[1]
 17343  		o5 := v.Args[1]
 17344  		if o5.Op != OpPPC64OR {
 17345  			break
 17346  		}
 17347  		if o5.Type != t {
 17348  			break
 17349  		}
 17350  		_ = o5.Args[1]
 17351  		o4 := o5.Args[0]
 17352  		if o4.Op != OpPPC64OR {
 17353  			break
 17354  		}
 17355  		if o4.Type != t {
 17356  			break
 17357  		}
 17358  		_ = o4.Args[1]
 17359  		s4 := o4.Args[0]
 17360  		if s4.Op != OpPPC64SLDconst {
 17361  			break
 17362  		}
 17363  		if s4.AuxInt != 40 {
 17364  			break
 17365  		}
 17366  		x5 := s4.Args[0]
 17367  		if x5.Op != OpPPC64MOVBZload {
 17368  			break
 17369  		}
 17370  		i5 := x5.AuxInt
 17371  		if x5.Aux != s {
 17372  			break
 17373  		}
 17374  		_ = x5.Args[1]
 17375  		if p != x5.Args[0] {
 17376  			break
 17377  		}
 17378  		if mem != x5.Args[1] {
 17379  			break
 17380  		}
 17381  		o3 := o4.Args[1]
 17382  		if o3.Op != OpPPC64OR {
 17383  			break
 17384  		}
 17385  		if o3.Type != t {
 17386  			break
 17387  		}
 17388  		_ = o3.Args[1]
 17389  		x0 := o3.Args[0]
 17390  		if x0.Op != OpPPC64MOVWZload {
 17391  			break
 17392  		}
 17393  		i0 := x0.AuxInt
 17394  		if x0.Aux != s {
 17395  			break
 17396  		}
 17397  		_ = x0.Args[1]
 17398  		if p != x0.Args[0] {
 17399  			break
 17400  		}
 17401  		if mem != x0.Args[1] {
 17402  			break
 17403  		}
 17404  		s3 := o3.Args[1]
 17405  		if s3.Op != OpPPC64SLDconst {
 17406  			break
 17407  		}
 17408  		if s3.AuxInt != 32 {
 17409  			break
 17410  		}
 17411  		x4 := s3.Args[0]
 17412  		if x4.Op != OpPPC64MOVBZload {
 17413  			break
 17414  		}
 17415  		i4 := x4.AuxInt
 17416  		if x4.Aux != s {
 17417  			break
 17418  		}
 17419  		_ = x4.Args[1]
 17420  		if p != x4.Args[0] {
 17421  			break
 17422  		}
 17423  		if mem != x4.Args[1] {
 17424  			break
 17425  		}
 17426  		s5 := o5.Args[1]
 17427  		if s5.Op != OpPPC64SLDconst {
 17428  			break
 17429  		}
 17430  		if s5.AuxInt != 48 {
 17431  			break
 17432  		}
 17433  		x6 := s5.Args[0]
 17434  		if x6.Op != OpPPC64MOVBZload {
 17435  			break
 17436  		}
 17437  		i6 := x6.AuxInt
 17438  		if x6.Aux != s {
 17439  			break
 17440  		}
 17441  		_ = x6.Args[1]
 17442  		if p != x6.Args[0] {
 17443  			break
 17444  		}
 17445  		if mem != x6.Args[1] {
 17446  			break
 17447  		}
 17448  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17449  			break
 17450  		}
 17451  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17452  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17453  		v.reset(OpCopy)
 17454  		v.AddArg(v0)
 17455  		v0.AuxInt = i0
 17456  		v0.Aux = s
 17457  		v0.AddArg(p)
 17458  		v0.AddArg(mem)
 17459  		return true
 17460  	}
 17461  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17462  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17463  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17464  	for {
 17465  		t := v.Type
 17466  		_ = v.Args[1]
 17467  		s6 := v.Args[0]
 17468  		if s6.Op != OpPPC64SLDconst {
 17469  			break
 17470  		}
 17471  		if s6.AuxInt != 56 {
 17472  			break
 17473  		}
 17474  		x7 := s6.Args[0]
 17475  		if x7.Op != OpPPC64MOVBZload {
 17476  			break
 17477  		}
 17478  		i7 := x7.AuxInt
 17479  		s := x7.Aux
 17480  		_ = x7.Args[1]
 17481  		p := x7.Args[0]
 17482  		mem := x7.Args[1]
 17483  		o5 := v.Args[1]
 17484  		if o5.Op != OpPPC64OR {
 17485  			break
 17486  		}
 17487  		if o5.Type != t {
 17488  			break
 17489  		}
 17490  		_ = o5.Args[1]
 17491  		o4 := o5.Args[0]
 17492  		if o4.Op != OpPPC64OR {
 17493  			break
 17494  		}
 17495  		if o4.Type != t {
 17496  			break
 17497  		}
 17498  		_ = o4.Args[1]
 17499  		o3 := o4.Args[0]
 17500  		if o3.Op != OpPPC64OR {
 17501  			break
 17502  		}
 17503  		if o3.Type != t {
 17504  			break
 17505  		}
 17506  		_ = o3.Args[1]
 17507  		s3 := o3.Args[0]
 17508  		if s3.Op != OpPPC64SLDconst {
 17509  			break
 17510  		}
 17511  		if s3.AuxInt != 32 {
 17512  			break
 17513  		}
 17514  		x4 := s3.Args[0]
 17515  		if x4.Op != OpPPC64MOVBZload {
 17516  			break
 17517  		}
 17518  		i4 := x4.AuxInt
 17519  		if x4.Aux != s {
 17520  			break
 17521  		}
 17522  		_ = x4.Args[1]
 17523  		if p != x4.Args[0] {
 17524  			break
 17525  		}
 17526  		if mem != x4.Args[1] {
 17527  			break
 17528  		}
 17529  		x0 := o3.Args[1]
 17530  		if x0.Op != OpPPC64MOVWZload {
 17531  			break
 17532  		}
 17533  		i0 := x0.AuxInt
 17534  		if x0.Aux != s {
 17535  			break
 17536  		}
 17537  		_ = x0.Args[1]
 17538  		if p != x0.Args[0] {
 17539  			break
 17540  		}
 17541  		if mem != x0.Args[1] {
 17542  			break
 17543  		}
 17544  		s4 := o4.Args[1]
 17545  		if s4.Op != OpPPC64SLDconst {
 17546  			break
 17547  		}
 17548  		if s4.AuxInt != 40 {
 17549  			break
 17550  		}
 17551  		x5 := s4.Args[0]
 17552  		if x5.Op != OpPPC64MOVBZload {
 17553  			break
 17554  		}
 17555  		i5 := x5.AuxInt
 17556  		if x5.Aux != s {
 17557  			break
 17558  		}
 17559  		_ = x5.Args[1]
 17560  		if p != x5.Args[0] {
 17561  			break
 17562  		}
 17563  		if mem != x5.Args[1] {
 17564  			break
 17565  		}
 17566  		s5 := o5.Args[1]
 17567  		if s5.Op != OpPPC64SLDconst {
 17568  			break
 17569  		}
 17570  		if s5.AuxInt != 48 {
 17571  			break
 17572  		}
 17573  		x6 := s5.Args[0]
 17574  		if x6.Op != OpPPC64MOVBZload {
 17575  			break
 17576  		}
 17577  		i6 := x6.AuxInt
 17578  		if x6.Aux != s {
 17579  			break
 17580  		}
 17581  		_ = x6.Args[1]
 17582  		if p != x6.Args[0] {
 17583  			break
 17584  		}
 17585  		if mem != x6.Args[1] {
 17586  			break
 17587  		}
 17588  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17589  			break
 17590  		}
 17591  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17592  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17593  		v.reset(OpCopy)
 17594  		v.AddArg(v0)
 17595  		v0.AuxInt = i0
 17596  		v0.Aux = s
 17597  		v0.AddArg(p)
 17598  		v0.AddArg(mem)
 17599  		return true
 17600  	}
 17601  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17602  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17603  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17604  	for {
 17605  		t := v.Type
 17606  		_ = v.Args[1]
 17607  		s6 := v.Args[0]
 17608  		if s6.Op != OpPPC64SLDconst {
 17609  			break
 17610  		}
 17611  		if s6.AuxInt != 56 {
 17612  			break
 17613  		}
 17614  		x7 := s6.Args[0]
 17615  		if x7.Op != OpPPC64MOVBZload {
 17616  			break
 17617  		}
 17618  		i7 := x7.AuxInt
 17619  		s := x7.Aux
 17620  		_ = x7.Args[1]
 17621  		p := x7.Args[0]
 17622  		mem := x7.Args[1]
 17623  		o5 := v.Args[1]
 17624  		if o5.Op != OpPPC64OR {
 17625  			break
 17626  		}
 17627  		if o5.Type != t {
 17628  			break
 17629  		}
 17630  		_ = o5.Args[1]
 17631  		o4 := o5.Args[0]
 17632  		if o4.Op != OpPPC64OR {
 17633  			break
 17634  		}
 17635  		if o4.Type != t {
 17636  			break
 17637  		}
 17638  		_ = o4.Args[1]
 17639  		o3 := o4.Args[0]
 17640  		if o3.Op != OpPPC64OR {
 17641  			break
 17642  		}
 17643  		if o3.Type != t {
 17644  			break
 17645  		}
 17646  		_ = o3.Args[1]
 17647  		x0 := o3.Args[0]
 17648  		if x0.Op != OpPPC64MOVWZload {
 17649  			break
 17650  		}
 17651  		i0 := x0.AuxInt
 17652  		if x0.Aux != s {
 17653  			break
 17654  		}
 17655  		_ = x0.Args[1]
 17656  		if p != x0.Args[0] {
 17657  			break
 17658  		}
 17659  		if mem != x0.Args[1] {
 17660  			break
 17661  		}
 17662  		s3 := o3.Args[1]
 17663  		if s3.Op != OpPPC64SLDconst {
 17664  			break
 17665  		}
 17666  		if s3.AuxInt != 32 {
 17667  			break
 17668  		}
 17669  		x4 := s3.Args[0]
 17670  		if x4.Op != OpPPC64MOVBZload {
 17671  			break
 17672  		}
 17673  		i4 := x4.AuxInt
 17674  		if x4.Aux != s {
 17675  			break
 17676  		}
 17677  		_ = x4.Args[1]
 17678  		if p != x4.Args[0] {
 17679  			break
 17680  		}
 17681  		if mem != x4.Args[1] {
 17682  			break
 17683  		}
 17684  		s4 := o4.Args[1]
 17685  		if s4.Op != OpPPC64SLDconst {
 17686  			break
 17687  		}
 17688  		if s4.AuxInt != 40 {
 17689  			break
 17690  		}
 17691  		x5 := s4.Args[0]
 17692  		if x5.Op != OpPPC64MOVBZload {
 17693  			break
 17694  		}
 17695  		i5 := x5.AuxInt
 17696  		if x5.Aux != s {
 17697  			break
 17698  		}
 17699  		_ = x5.Args[1]
 17700  		if p != x5.Args[0] {
 17701  			break
 17702  		}
 17703  		if mem != x5.Args[1] {
 17704  			break
 17705  		}
 17706  		s5 := o5.Args[1]
 17707  		if s5.Op != OpPPC64SLDconst {
 17708  			break
 17709  		}
 17710  		if s5.AuxInt != 48 {
 17711  			break
 17712  		}
 17713  		x6 := s5.Args[0]
 17714  		if x6.Op != OpPPC64MOVBZload {
 17715  			break
 17716  		}
 17717  		i6 := x6.AuxInt
 17718  		if x6.Aux != s {
 17719  			break
 17720  		}
 17721  		_ = x6.Args[1]
 17722  		if p != x6.Args[0] {
 17723  			break
 17724  		}
 17725  		if mem != x6.Args[1] {
 17726  			break
 17727  		}
 17728  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17729  			break
 17730  		}
 17731  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17732  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17733  		v.reset(OpCopy)
 17734  		v.AddArg(v0)
 17735  		v0.AuxInt = i0
 17736  		v0.Aux = s
 17737  		v0.AddArg(p)
 17738  		v0.AddArg(mem)
 17739  		return true
 17740  	}
 17741  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17742  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17743  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17744  	for {
 17745  		t := v.Type
 17746  		_ = v.Args[1]
 17747  		o5 := v.Args[0]
 17748  		if o5.Op != OpPPC64OR {
 17749  			break
 17750  		}
 17751  		if o5.Type != t {
 17752  			break
 17753  		}
 17754  		_ = o5.Args[1]
 17755  		s5 := o5.Args[0]
 17756  		if s5.Op != OpPPC64SLDconst {
 17757  			break
 17758  		}
 17759  		if s5.AuxInt != 48 {
 17760  			break
 17761  		}
 17762  		x6 := s5.Args[0]
 17763  		if x6.Op != OpPPC64MOVBZload {
 17764  			break
 17765  		}
 17766  		i6 := x6.AuxInt
 17767  		s := x6.Aux
 17768  		_ = x6.Args[1]
 17769  		p := x6.Args[0]
 17770  		mem := x6.Args[1]
 17771  		o4 := o5.Args[1]
 17772  		if o4.Op != OpPPC64OR {
 17773  			break
 17774  		}
 17775  		if o4.Type != t {
 17776  			break
 17777  		}
 17778  		_ = o4.Args[1]
 17779  		s4 := o4.Args[0]
 17780  		if s4.Op != OpPPC64SLDconst {
 17781  			break
 17782  		}
 17783  		if s4.AuxInt != 40 {
 17784  			break
 17785  		}
 17786  		x5 := s4.Args[0]
 17787  		if x5.Op != OpPPC64MOVBZload {
 17788  			break
 17789  		}
 17790  		i5 := x5.AuxInt
 17791  		if x5.Aux != s {
 17792  			break
 17793  		}
 17794  		_ = x5.Args[1]
 17795  		if p != x5.Args[0] {
 17796  			break
 17797  		}
 17798  		if mem != x5.Args[1] {
 17799  			break
 17800  		}
 17801  		o3 := o4.Args[1]
 17802  		if o3.Op != OpPPC64OR {
 17803  			break
 17804  		}
 17805  		if o3.Type != t {
 17806  			break
 17807  		}
 17808  		_ = o3.Args[1]
 17809  		s3 := o3.Args[0]
 17810  		if s3.Op != OpPPC64SLDconst {
 17811  			break
 17812  		}
 17813  		if s3.AuxInt != 32 {
 17814  			break
 17815  		}
 17816  		x4 := s3.Args[0]
 17817  		if x4.Op != OpPPC64MOVBZload {
 17818  			break
 17819  		}
 17820  		i4 := x4.AuxInt
 17821  		if x4.Aux != s {
 17822  			break
 17823  		}
 17824  		_ = x4.Args[1]
 17825  		if p != x4.Args[0] {
 17826  			break
 17827  		}
 17828  		if mem != x4.Args[1] {
 17829  			break
 17830  		}
 17831  		x0 := o3.Args[1]
 17832  		if x0.Op != OpPPC64MOVWZload {
 17833  			break
 17834  		}
 17835  		i0 := x0.AuxInt
 17836  		if x0.Aux != s {
 17837  			break
 17838  		}
 17839  		_ = x0.Args[1]
 17840  		if p != x0.Args[0] {
 17841  			break
 17842  		}
 17843  		if mem != x0.Args[1] {
 17844  			break
 17845  		}
 17846  		s6 := v.Args[1]
 17847  		if s6.Op != OpPPC64SLDconst {
 17848  			break
 17849  		}
 17850  		if s6.AuxInt != 56 {
 17851  			break
 17852  		}
 17853  		x7 := s6.Args[0]
 17854  		if x7.Op != OpPPC64MOVBZload {
 17855  			break
 17856  		}
 17857  		i7 := x7.AuxInt
 17858  		if x7.Aux != s {
 17859  			break
 17860  		}
 17861  		_ = x7.Args[1]
 17862  		if p != x7.Args[0] {
 17863  			break
 17864  		}
 17865  		if mem != x7.Args[1] {
 17866  			break
 17867  		}
 17868  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17869  			break
 17870  		}
 17871  		b = mergePoint(b, x0, x4, x5, x6, x7)
 17872  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17873  		v.reset(OpCopy)
 17874  		v.AddArg(v0)
 17875  		v0.AuxInt = i0
 17876  		v0.Aux = s
 17877  		v0.AddArg(p)
 17878  		v0.AddArg(mem)
 17879  		return true
 17880  	}
 17881  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17882  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17883  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17884  	for {
 17885  		t := v.Type
 17886  		_ = v.Args[1]
 17887  		o5 := v.Args[0]
 17888  		if o5.Op != OpPPC64OR {
 17889  			break
 17890  		}
 17891  		if o5.Type != t {
 17892  			break
 17893  		}
 17894  		_ = o5.Args[1]
 17895  		s5 := o5.Args[0]
 17896  		if s5.Op != OpPPC64SLDconst {
 17897  			break
 17898  		}
 17899  		if s5.AuxInt != 48 {
 17900  			break
 17901  		}
 17902  		x6 := s5.Args[0]
 17903  		if x6.Op != OpPPC64MOVBZload {
 17904  			break
 17905  		}
 17906  		i6 := x6.AuxInt
 17907  		s := x6.Aux
 17908  		_ = x6.Args[1]
 17909  		p := x6.Args[0]
 17910  		mem := x6.Args[1]
 17911  		o4 := o5.Args[1]
 17912  		if o4.Op != OpPPC64OR {
 17913  			break
 17914  		}
 17915  		if o4.Type != t {
 17916  			break
 17917  		}
 17918  		_ = o4.Args[1]
 17919  		s4 := o4.Args[0]
 17920  		if s4.Op != OpPPC64SLDconst {
 17921  			break
 17922  		}
 17923  		if s4.AuxInt != 40 {
 17924  			break
 17925  		}
 17926  		x5 := s4.Args[0]
 17927  		if x5.Op != OpPPC64MOVBZload {
 17928  			break
 17929  		}
 17930  		i5 := x5.AuxInt
 17931  		if x5.Aux != s {
 17932  			break
 17933  		}
 17934  		_ = x5.Args[1]
 17935  		if p != x5.Args[0] {
 17936  			break
 17937  		}
 17938  		if mem != x5.Args[1] {
 17939  			break
 17940  		}
 17941  		o3 := o4.Args[1]
 17942  		if o3.Op != OpPPC64OR {
 17943  			break
 17944  		}
 17945  		if o3.Type != t {
 17946  			break
 17947  		}
 17948  		_ = o3.Args[1]
 17949  		x0 := o3.Args[0]
 17950  		if x0.Op != OpPPC64MOVWZload {
 17951  			break
 17952  		}
 17953  		i0 := x0.AuxInt
 17954  		if x0.Aux != s {
 17955  			break
 17956  		}
 17957  		_ = x0.Args[1]
 17958  		if p != x0.Args[0] {
 17959  			break
 17960  		}
 17961  		if mem != x0.Args[1] {
 17962  			break
 17963  		}
 17964  		s3 := o3.Args[1]
 17965  		if s3.Op != OpPPC64SLDconst {
 17966  			break
 17967  		}
 17968  		if s3.AuxInt != 32 {
 17969  			break
 17970  		}
 17971  		x4 := s3.Args[0]
 17972  		if x4.Op != OpPPC64MOVBZload {
 17973  			break
 17974  		}
 17975  		i4 := x4.AuxInt
 17976  		if x4.Aux != s {
 17977  			break
 17978  		}
 17979  		_ = x4.Args[1]
 17980  		if p != x4.Args[0] {
 17981  			break
 17982  		}
 17983  		if mem != x4.Args[1] {
 17984  			break
 17985  		}
 17986  		s6 := v.Args[1]
 17987  		if s6.Op != OpPPC64SLDconst {
 17988  			break
 17989  		}
 17990  		if s6.AuxInt != 56 {
 17991  			break
 17992  		}
 17993  		x7 := s6.Args[0]
 17994  		if x7.Op != OpPPC64MOVBZload {
 17995  			break
 17996  		}
 17997  		i7 := x7.AuxInt
 17998  		if x7.Aux != s {
 17999  			break
 18000  		}
 18001  		_ = x7.Args[1]
 18002  		if p != x7.Args[0] {
 18003  			break
 18004  		}
 18005  		if mem != x7.Args[1] {
 18006  			break
 18007  		}
 18008  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18009  			break
 18010  		}
 18011  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18012  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18013  		v.reset(OpCopy)
 18014  		v.AddArg(v0)
 18015  		v0.AuxInt = i0
 18016  		v0.Aux = s
 18017  		v0.AddArg(p)
 18018  		v0.AddArg(mem)
 18019  		return true
 18020  	}
 18021  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18022  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18023  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18024  	for {
 18025  		t := v.Type
 18026  		_ = v.Args[1]
 18027  		o5 := v.Args[0]
 18028  		if o5.Op != OpPPC64OR {
 18029  			break
 18030  		}
 18031  		if o5.Type != t {
 18032  			break
 18033  		}
 18034  		_ = o5.Args[1]
 18035  		s5 := o5.Args[0]
 18036  		if s5.Op != OpPPC64SLDconst {
 18037  			break
 18038  		}
 18039  		if s5.AuxInt != 48 {
 18040  			break
 18041  		}
 18042  		x6 := s5.Args[0]
 18043  		if x6.Op != OpPPC64MOVBZload {
 18044  			break
 18045  		}
 18046  		i6 := x6.AuxInt
 18047  		s := x6.Aux
 18048  		_ = x6.Args[1]
 18049  		p := x6.Args[0]
 18050  		mem := x6.Args[1]
 18051  		o4 := o5.Args[1]
 18052  		if o4.Op != OpPPC64OR {
 18053  			break
 18054  		}
 18055  		if o4.Type != t {
 18056  			break
 18057  		}
 18058  		_ = o4.Args[1]
 18059  		o3 := o4.Args[0]
 18060  		if o3.Op != OpPPC64OR {
 18061  			break
 18062  		}
 18063  		if o3.Type != t {
 18064  			break
 18065  		}
 18066  		_ = o3.Args[1]
 18067  		s3 := o3.Args[0]
 18068  		if s3.Op != OpPPC64SLDconst {
 18069  			break
 18070  		}
 18071  		if s3.AuxInt != 32 {
 18072  			break
 18073  		}
 18074  		x4 := s3.Args[0]
 18075  		if x4.Op != OpPPC64MOVBZload {
 18076  			break
 18077  		}
 18078  		i4 := x4.AuxInt
 18079  		if x4.Aux != s {
 18080  			break
 18081  		}
 18082  		_ = x4.Args[1]
 18083  		if p != x4.Args[0] {
 18084  			break
 18085  		}
 18086  		if mem != x4.Args[1] {
 18087  			break
 18088  		}
 18089  		x0 := o3.Args[1]
 18090  		if x0.Op != OpPPC64MOVWZload {
 18091  			break
 18092  		}
 18093  		i0 := x0.AuxInt
 18094  		if x0.Aux != s {
 18095  			break
 18096  		}
 18097  		_ = x0.Args[1]
 18098  		if p != x0.Args[0] {
 18099  			break
 18100  		}
 18101  		if mem != x0.Args[1] {
 18102  			break
 18103  		}
 18104  		s4 := o4.Args[1]
 18105  		if s4.Op != OpPPC64SLDconst {
 18106  			break
 18107  		}
 18108  		if s4.AuxInt != 40 {
 18109  			break
 18110  		}
 18111  		x5 := s4.Args[0]
 18112  		if x5.Op != OpPPC64MOVBZload {
 18113  			break
 18114  		}
 18115  		i5 := x5.AuxInt
 18116  		if x5.Aux != s {
 18117  			break
 18118  		}
 18119  		_ = x5.Args[1]
 18120  		if p != x5.Args[0] {
 18121  			break
 18122  		}
 18123  		if mem != x5.Args[1] {
 18124  			break
 18125  		}
 18126  		s6 := v.Args[1]
 18127  		if s6.Op != OpPPC64SLDconst {
 18128  			break
 18129  		}
 18130  		if s6.AuxInt != 56 {
 18131  			break
 18132  		}
 18133  		x7 := s6.Args[0]
 18134  		if x7.Op != OpPPC64MOVBZload {
 18135  			break
 18136  		}
 18137  		i7 := x7.AuxInt
 18138  		if x7.Aux != s {
 18139  			break
 18140  		}
 18141  		_ = x7.Args[1]
 18142  		if p != x7.Args[0] {
 18143  			break
 18144  		}
 18145  		if mem != x7.Args[1] {
 18146  			break
 18147  		}
 18148  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18149  			break
 18150  		}
 18151  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18152  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18153  		v.reset(OpCopy)
 18154  		v.AddArg(v0)
 18155  		v0.AuxInt = i0
 18156  		v0.Aux = s
 18157  		v0.AddArg(p)
 18158  		v0.AddArg(mem)
 18159  		return true
 18160  	}
 18161  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18162  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18163  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18164  	for {
 18165  		t := v.Type
 18166  		_ = v.Args[1]
 18167  		o5 := v.Args[0]
 18168  		if o5.Op != OpPPC64OR {
 18169  			break
 18170  		}
 18171  		if o5.Type != t {
 18172  			break
 18173  		}
 18174  		_ = o5.Args[1]
 18175  		s5 := o5.Args[0]
 18176  		if s5.Op != OpPPC64SLDconst {
 18177  			break
 18178  		}
 18179  		if s5.AuxInt != 48 {
 18180  			break
 18181  		}
 18182  		x6 := s5.Args[0]
 18183  		if x6.Op != OpPPC64MOVBZload {
 18184  			break
 18185  		}
 18186  		i6 := x6.AuxInt
 18187  		s := x6.Aux
 18188  		_ = x6.Args[1]
 18189  		p := x6.Args[0]
 18190  		mem := x6.Args[1]
 18191  		o4 := o5.Args[1]
 18192  		if o4.Op != OpPPC64OR {
 18193  			break
 18194  		}
 18195  		if o4.Type != t {
 18196  			break
 18197  		}
 18198  		_ = o4.Args[1]
 18199  		o3 := o4.Args[0]
 18200  		if o3.Op != OpPPC64OR {
 18201  			break
 18202  		}
 18203  		if o3.Type != t {
 18204  			break
 18205  		}
 18206  		_ = o3.Args[1]
 18207  		x0 := o3.Args[0]
 18208  		if x0.Op != OpPPC64MOVWZload {
 18209  			break
 18210  		}
 18211  		i0 := x0.AuxInt
 18212  		if x0.Aux != s {
 18213  			break
 18214  		}
 18215  		_ = x0.Args[1]
 18216  		if p != x0.Args[0] {
 18217  			break
 18218  		}
 18219  		if mem != x0.Args[1] {
 18220  			break
 18221  		}
 18222  		s3 := o3.Args[1]
 18223  		if s3.Op != OpPPC64SLDconst {
 18224  			break
 18225  		}
 18226  		if s3.AuxInt != 32 {
 18227  			break
 18228  		}
 18229  		x4 := s3.Args[0]
 18230  		if x4.Op != OpPPC64MOVBZload {
 18231  			break
 18232  		}
 18233  		i4 := x4.AuxInt
 18234  		if x4.Aux != s {
 18235  			break
 18236  		}
 18237  		_ = x4.Args[1]
 18238  		if p != x4.Args[0] {
 18239  			break
 18240  		}
 18241  		if mem != x4.Args[1] {
 18242  			break
 18243  		}
 18244  		s4 := o4.Args[1]
 18245  		if s4.Op != OpPPC64SLDconst {
 18246  			break
 18247  		}
 18248  		if s4.AuxInt != 40 {
 18249  			break
 18250  		}
 18251  		x5 := s4.Args[0]
 18252  		if x5.Op != OpPPC64MOVBZload {
 18253  			break
 18254  		}
 18255  		i5 := x5.AuxInt
 18256  		if x5.Aux != s {
 18257  			break
 18258  		}
 18259  		_ = x5.Args[1]
 18260  		if p != x5.Args[0] {
 18261  			break
 18262  		}
 18263  		if mem != x5.Args[1] {
 18264  			break
 18265  		}
 18266  		s6 := v.Args[1]
 18267  		if s6.Op != OpPPC64SLDconst {
 18268  			break
 18269  		}
 18270  		if s6.AuxInt != 56 {
 18271  			break
 18272  		}
 18273  		x7 := s6.Args[0]
 18274  		if x7.Op != OpPPC64MOVBZload {
 18275  			break
 18276  		}
 18277  		i7 := x7.AuxInt
 18278  		if x7.Aux != s {
 18279  			break
 18280  		}
 18281  		_ = x7.Args[1]
 18282  		if p != x7.Args[0] {
 18283  			break
 18284  		}
 18285  		if mem != x7.Args[1] {
 18286  			break
 18287  		}
 18288  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18289  			break
 18290  		}
 18291  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18292  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18293  		v.reset(OpCopy)
 18294  		v.AddArg(v0)
 18295  		v0.AuxInt = i0
 18296  		v0.Aux = s
 18297  		v0.AddArg(p)
 18298  		v0.AddArg(mem)
 18299  		return true
 18300  	}
 18301  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18302  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18303  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18304  	for {
 18305  		t := v.Type
 18306  		_ = v.Args[1]
 18307  		o5 := v.Args[0]
 18308  		if o5.Op != OpPPC64OR {
 18309  			break
 18310  		}
 18311  		if o5.Type != t {
 18312  			break
 18313  		}
 18314  		_ = o5.Args[1]
 18315  		o4 := o5.Args[0]
 18316  		if o4.Op != OpPPC64OR {
 18317  			break
 18318  		}
 18319  		if o4.Type != t {
 18320  			break
 18321  		}
 18322  		_ = o4.Args[1]
 18323  		s4 := o4.Args[0]
 18324  		if s4.Op != OpPPC64SLDconst {
 18325  			break
 18326  		}
 18327  		if s4.AuxInt != 40 {
 18328  			break
 18329  		}
 18330  		x5 := s4.Args[0]
 18331  		if x5.Op != OpPPC64MOVBZload {
 18332  			break
 18333  		}
 18334  		i5 := x5.AuxInt
 18335  		s := x5.Aux
 18336  		_ = x5.Args[1]
 18337  		p := x5.Args[0]
 18338  		mem := x5.Args[1]
 18339  		o3 := o4.Args[1]
 18340  		if o3.Op != OpPPC64OR {
 18341  			break
 18342  		}
 18343  		if o3.Type != t {
 18344  			break
 18345  		}
 18346  		_ = o3.Args[1]
 18347  		s3 := o3.Args[0]
 18348  		if s3.Op != OpPPC64SLDconst {
 18349  			break
 18350  		}
 18351  		if s3.AuxInt != 32 {
 18352  			break
 18353  		}
 18354  		x4 := s3.Args[0]
 18355  		if x4.Op != OpPPC64MOVBZload {
 18356  			break
 18357  		}
 18358  		i4 := x4.AuxInt
 18359  		if x4.Aux != s {
 18360  			break
 18361  		}
 18362  		_ = x4.Args[1]
 18363  		if p != x4.Args[0] {
 18364  			break
 18365  		}
 18366  		if mem != x4.Args[1] {
 18367  			break
 18368  		}
 18369  		x0 := o3.Args[1]
 18370  		if x0.Op != OpPPC64MOVWZload {
 18371  			break
 18372  		}
 18373  		i0 := x0.AuxInt
 18374  		if x0.Aux != s {
 18375  			break
 18376  		}
 18377  		_ = x0.Args[1]
 18378  		if p != x0.Args[0] {
 18379  			break
 18380  		}
 18381  		if mem != x0.Args[1] {
 18382  			break
 18383  		}
 18384  		s5 := o5.Args[1]
 18385  		if s5.Op != OpPPC64SLDconst {
 18386  			break
 18387  		}
 18388  		if s5.AuxInt != 48 {
 18389  			break
 18390  		}
 18391  		x6 := s5.Args[0]
 18392  		if x6.Op != OpPPC64MOVBZload {
 18393  			break
 18394  		}
 18395  		i6 := x6.AuxInt
 18396  		if x6.Aux != s {
 18397  			break
 18398  		}
 18399  		_ = x6.Args[1]
 18400  		if p != x6.Args[0] {
 18401  			break
 18402  		}
 18403  		if mem != x6.Args[1] {
 18404  			break
 18405  		}
 18406  		s6 := v.Args[1]
 18407  		if s6.Op != OpPPC64SLDconst {
 18408  			break
 18409  		}
 18410  		if s6.AuxInt != 56 {
 18411  			break
 18412  		}
 18413  		x7 := s6.Args[0]
 18414  		if x7.Op != OpPPC64MOVBZload {
 18415  			break
 18416  		}
 18417  		i7 := x7.AuxInt
 18418  		if x7.Aux != s {
 18419  			break
 18420  		}
 18421  		_ = x7.Args[1]
 18422  		if p != x7.Args[0] {
 18423  			break
 18424  		}
 18425  		if mem != x7.Args[1] {
 18426  			break
 18427  		}
 18428  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18429  			break
 18430  		}
 18431  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18432  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18433  		v.reset(OpCopy)
 18434  		v.AddArg(v0)
 18435  		v0.AuxInt = i0
 18436  		v0.Aux = s
 18437  		v0.AddArg(p)
 18438  		v0.AddArg(mem)
 18439  		return true
 18440  	}
 18441  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18442  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18443  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18444  	for {
 18445  		t := v.Type
 18446  		_ = v.Args[1]
 18447  		o5 := v.Args[0]
 18448  		if o5.Op != OpPPC64OR {
 18449  			break
 18450  		}
 18451  		if o5.Type != t {
 18452  			break
 18453  		}
 18454  		_ = o5.Args[1]
 18455  		o4 := o5.Args[0]
 18456  		if o4.Op != OpPPC64OR {
 18457  			break
 18458  		}
 18459  		if o4.Type != t {
 18460  			break
 18461  		}
 18462  		_ = o4.Args[1]
 18463  		s4 := o4.Args[0]
 18464  		if s4.Op != OpPPC64SLDconst {
 18465  			break
 18466  		}
 18467  		if s4.AuxInt != 40 {
 18468  			break
 18469  		}
 18470  		x5 := s4.Args[0]
 18471  		if x5.Op != OpPPC64MOVBZload {
 18472  			break
 18473  		}
 18474  		i5 := x5.AuxInt
 18475  		s := x5.Aux
 18476  		_ = x5.Args[1]
 18477  		p := x5.Args[0]
 18478  		mem := x5.Args[1]
 18479  		o3 := o4.Args[1]
 18480  		if o3.Op != OpPPC64OR {
 18481  			break
 18482  		}
 18483  		if o3.Type != t {
 18484  			break
 18485  		}
 18486  		_ = o3.Args[1]
 18487  		x0 := o3.Args[0]
 18488  		if x0.Op != OpPPC64MOVWZload {
 18489  			break
 18490  		}
 18491  		i0 := x0.AuxInt
 18492  		if x0.Aux != s {
 18493  			break
 18494  		}
 18495  		_ = x0.Args[1]
 18496  		if p != x0.Args[0] {
 18497  			break
 18498  		}
 18499  		if mem != x0.Args[1] {
 18500  			break
 18501  		}
 18502  		s3 := o3.Args[1]
 18503  		if s3.Op != OpPPC64SLDconst {
 18504  			break
 18505  		}
 18506  		if s3.AuxInt != 32 {
 18507  			break
 18508  		}
 18509  		x4 := s3.Args[0]
 18510  		if x4.Op != OpPPC64MOVBZload {
 18511  			break
 18512  		}
 18513  		i4 := x4.AuxInt
 18514  		if x4.Aux != s {
 18515  			break
 18516  		}
 18517  		_ = x4.Args[1]
 18518  		if p != x4.Args[0] {
 18519  			break
 18520  		}
 18521  		if mem != x4.Args[1] {
 18522  			break
 18523  		}
 18524  		s5 := o5.Args[1]
 18525  		if s5.Op != OpPPC64SLDconst {
 18526  			break
 18527  		}
 18528  		if s5.AuxInt != 48 {
 18529  			break
 18530  		}
 18531  		x6 := s5.Args[0]
 18532  		if x6.Op != OpPPC64MOVBZload {
 18533  			break
 18534  		}
 18535  		i6 := x6.AuxInt
 18536  		if x6.Aux != s {
 18537  			break
 18538  		}
 18539  		_ = x6.Args[1]
 18540  		if p != x6.Args[0] {
 18541  			break
 18542  		}
 18543  		if mem != x6.Args[1] {
 18544  			break
 18545  		}
 18546  		s6 := v.Args[1]
 18547  		if s6.Op != OpPPC64SLDconst {
 18548  			break
 18549  		}
 18550  		if s6.AuxInt != 56 {
 18551  			break
 18552  		}
 18553  		x7 := s6.Args[0]
 18554  		if x7.Op != OpPPC64MOVBZload {
 18555  			break
 18556  		}
 18557  		i7 := x7.AuxInt
 18558  		if x7.Aux != s {
 18559  			break
 18560  		}
 18561  		_ = x7.Args[1]
 18562  		if p != x7.Args[0] {
 18563  			break
 18564  		}
 18565  		if mem != x7.Args[1] {
 18566  			break
 18567  		}
 18568  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18569  			break
 18570  		}
 18571  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18572  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18573  		v.reset(OpCopy)
 18574  		v.AddArg(v0)
 18575  		v0.AuxInt = i0
 18576  		v0.Aux = s
 18577  		v0.AddArg(p)
 18578  		v0.AddArg(mem)
 18579  		return true
 18580  	}
 18581  	return false
 18582  }
 18583  func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
 18584  	b := v.Block
 18585  	_ = b
 18586  	config := b.Func.Config
 18587  	_ = config
 18588  	typ := &b.Func.Config.Types
 18589  	_ = typ
 18590  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18591  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18592  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18593  	for {
 18594  		t := v.Type
 18595  		_ = v.Args[1]
 18596  		o5 := v.Args[0]
 18597  		if o5.Op != OpPPC64OR {
 18598  			break
 18599  		}
 18600  		if o5.Type != t {
 18601  			break
 18602  		}
 18603  		_ = o5.Args[1]
 18604  		o4 := o5.Args[0]
 18605  		if o4.Op != OpPPC64OR {
 18606  			break
 18607  		}
 18608  		if o4.Type != t {
 18609  			break
 18610  		}
 18611  		_ = o4.Args[1]
 18612  		o3 := o4.Args[0]
 18613  		if o3.Op != OpPPC64OR {
 18614  			break
 18615  		}
 18616  		if o3.Type != t {
 18617  			break
 18618  		}
 18619  		_ = o3.Args[1]
 18620  		s3 := o3.Args[0]
 18621  		if s3.Op != OpPPC64SLDconst {
 18622  			break
 18623  		}
 18624  		if s3.AuxInt != 32 {
 18625  			break
 18626  		}
 18627  		x4 := s3.Args[0]
 18628  		if x4.Op != OpPPC64MOVBZload {
 18629  			break
 18630  		}
 18631  		i4 := x4.AuxInt
 18632  		s := x4.Aux
 18633  		_ = x4.Args[1]
 18634  		p := x4.Args[0]
 18635  		mem := x4.Args[1]
 18636  		x0 := o3.Args[1]
 18637  		if x0.Op != OpPPC64MOVWZload {
 18638  			break
 18639  		}
 18640  		i0 := x0.AuxInt
 18641  		if x0.Aux != s {
 18642  			break
 18643  		}
 18644  		_ = x0.Args[1]
 18645  		if p != x0.Args[0] {
 18646  			break
 18647  		}
 18648  		if mem != x0.Args[1] {
 18649  			break
 18650  		}
 18651  		s4 := o4.Args[1]
 18652  		if s4.Op != OpPPC64SLDconst {
 18653  			break
 18654  		}
 18655  		if s4.AuxInt != 40 {
 18656  			break
 18657  		}
 18658  		x5 := s4.Args[0]
 18659  		if x5.Op != OpPPC64MOVBZload {
 18660  			break
 18661  		}
 18662  		i5 := x5.AuxInt
 18663  		if x5.Aux != s {
 18664  			break
 18665  		}
 18666  		_ = x5.Args[1]
 18667  		if p != x5.Args[0] {
 18668  			break
 18669  		}
 18670  		if mem != x5.Args[1] {
 18671  			break
 18672  		}
 18673  		s5 := o5.Args[1]
 18674  		if s5.Op != OpPPC64SLDconst {
 18675  			break
 18676  		}
 18677  		if s5.AuxInt != 48 {
 18678  			break
 18679  		}
 18680  		x6 := s5.Args[0]
 18681  		if x6.Op != OpPPC64MOVBZload {
 18682  			break
 18683  		}
 18684  		i6 := x6.AuxInt
 18685  		if x6.Aux != s {
 18686  			break
 18687  		}
 18688  		_ = x6.Args[1]
 18689  		if p != x6.Args[0] {
 18690  			break
 18691  		}
 18692  		if mem != x6.Args[1] {
 18693  			break
 18694  		}
 18695  		s6 := v.Args[1]
 18696  		if s6.Op != OpPPC64SLDconst {
 18697  			break
 18698  		}
 18699  		if s6.AuxInt != 56 {
 18700  			break
 18701  		}
 18702  		x7 := s6.Args[0]
 18703  		if x7.Op != OpPPC64MOVBZload {
 18704  			break
 18705  		}
 18706  		i7 := x7.AuxInt
 18707  		if x7.Aux != s {
 18708  			break
 18709  		}
 18710  		_ = x7.Args[1]
 18711  		if p != x7.Args[0] {
 18712  			break
 18713  		}
 18714  		if mem != x7.Args[1] {
 18715  			break
 18716  		}
 18717  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18718  			break
 18719  		}
 18720  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18721  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18722  		v.reset(OpCopy)
 18723  		v.AddArg(v0)
 18724  		v0.AuxInt = i0
 18725  		v0.Aux = s
 18726  		v0.AddArg(p)
 18727  		v0.AddArg(mem)
 18728  		return true
 18729  	}
 18730  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18731  	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18732  	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18733  	for {
 18734  		t := v.Type
 18735  		_ = v.Args[1]
 18736  		o5 := v.Args[0]
 18737  		if o5.Op != OpPPC64OR {
 18738  			break
 18739  		}
 18740  		if o5.Type != t {
 18741  			break
 18742  		}
 18743  		_ = o5.Args[1]
 18744  		o4 := o5.Args[0]
 18745  		if o4.Op != OpPPC64OR {
 18746  			break
 18747  		}
 18748  		if o4.Type != t {
 18749  			break
 18750  		}
 18751  		_ = o4.Args[1]
 18752  		o3 := o4.Args[0]
 18753  		if o3.Op != OpPPC64OR {
 18754  			break
 18755  		}
 18756  		if o3.Type != t {
 18757  			break
 18758  		}
 18759  		_ = o3.Args[1]
 18760  		x0 := o3.Args[0]
 18761  		if x0.Op != OpPPC64MOVWZload {
 18762  			break
 18763  		}
 18764  		i0 := x0.AuxInt
 18765  		s := x0.Aux
 18766  		_ = x0.Args[1]
 18767  		p := x0.Args[0]
 18768  		mem := x0.Args[1]
 18769  		s3 := o3.Args[1]
 18770  		if s3.Op != OpPPC64SLDconst {
 18771  			break
 18772  		}
 18773  		if s3.AuxInt != 32 {
 18774  			break
 18775  		}
 18776  		x4 := s3.Args[0]
 18777  		if x4.Op != OpPPC64MOVBZload {
 18778  			break
 18779  		}
 18780  		i4 := x4.AuxInt
 18781  		if x4.Aux != s {
 18782  			break
 18783  		}
 18784  		_ = x4.Args[1]
 18785  		if p != x4.Args[0] {
 18786  			break
 18787  		}
 18788  		if mem != x4.Args[1] {
 18789  			break
 18790  		}
 18791  		s4 := o4.Args[1]
 18792  		if s4.Op != OpPPC64SLDconst {
 18793  			break
 18794  		}
 18795  		if s4.AuxInt != 40 {
 18796  			break
 18797  		}
 18798  		x5 := s4.Args[0]
 18799  		if x5.Op != OpPPC64MOVBZload {
 18800  			break
 18801  		}
 18802  		i5 := x5.AuxInt
 18803  		if x5.Aux != s {
 18804  			break
 18805  		}
 18806  		_ = x5.Args[1]
 18807  		if p != x5.Args[0] {
 18808  			break
 18809  		}
 18810  		if mem != x5.Args[1] {
 18811  			break
 18812  		}
 18813  		s5 := o5.Args[1]
 18814  		if s5.Op != OpPPC64SLDconst {
 18815  			break
 18816  		}
 18817  		if s5.AuxInt != 48 {
 18818  			break
 18819  		}
 18820  		x6 := s5.Args[0]
 18821  		if x6.Op != OpPPC64MOVBZload {
 18822  			break
 18823  		}
 18824  		i6 := x6.AuxInt
 18825  		if x6.Aux != s {
 18826  			break
 18827  		}
 18828  		_ = x6.Args[1]
 18829  		if p != x6.Args[0] {
 18830  			break
 18831  		}
 18832  		if mem != x6.Args[1] {
 18833  			break
 18834  		}
 18835  		s6 := v.Args[1]
 18836  		if s6.Op != OpPPC64SLDconst {
 18837  			break
 18838  		}
 18839  		if s6.AuxInt != 56 {
 18840  			break
 18841  		}
 18842  		x7 := s6.Args[0]
 18843  		if x7.Op != OpPPC64MOVBZload {
 18844  			break
 18845  		}
 18846  		i7 := x7.AuxInt
 18847  		if x7.Aux != s {
 18848  			break
 18849  		}
 18850  		_ = x7.Args[1]
 18851  		if p != x7.Args[0] {
 18852  			break
 18853  		}
 18854  		if mem != x7.Args[1] {
 18855  			break
 18856  		}
 18857  		if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18858  			break
 18859  		}
 18860  		b = mergePoint(b, x0, x4, x5, x6, x7)
 18861  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18862  		v.reset(OpCopy)
 18863  		v.AddArg(v0)
 18864  		v0.AuxInt = i0
 18865  		v0.Aux = s
 18866  		v0.AddArg(p)
 18867  		v0.AddArg(mem)
 18868  		return true
 18869  	}
 18870  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))))
 18871  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18872  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18873  	for {
 18874  		t := v.Type
 18875  		_ = v.Args[1]
 18876  		s0 := v.Args[0]
 18877  		if s0.Op != OpPPC64SLDconst {
 18878  			break
 18879  		}
 18880  		if s0.AuxInt != 56 {
 18881  			break
 18882  		}
 18883  		x0 := s0.Args[0]
 18884  		if x0.Op != OpPPC64MOVBZload {
 18885  			break
 18886  		}
 18887  		i0 := x0.AuxInt
 18888  		s := x0.Aux
 18889  		_ = x0.Args[1]
 18890  		p := x0.Args[0]
 18891  		mem := x0.Args[1]
 18892  		o0 := v.Args[1]
 18893  		if o0.Op != OpPPC64OR {
 18894  			break
 18895  		}
 18896  		if o0.Type != t {
 18897  			break
 18898  		}
 18899  		_ = o0.Args[1]
 18900  		s1 := o0.Args[0]
 18901  		if s1.Op != OpPPC64SLDconst {
 18902  			break
 18903  		}
 18904  		if s1.AuxInt != 48 {
 18905  			break
 18906  		}
 18907  		x1 := s1.Args[0]
 18908  		if x1.Op != OpPPC64MOVBZload {
 18909  			break
 18910  		}
 18911  		i1 := x1.AuxInt
 18912  		if x1.Aux != s {
 18913  			break
 18914  		}
 18915  		_ = x1.Args[1]
 18916  		if p != x1.Args[0] {
 18917  			break
 18918  		}
 18919  		if mem != x1.Args[1] {
 18920  			break
 18921  		}
 18922  		o1 := o0.Args[1]
 18923  		if o1.Op != OpPPC64OR {
 18924  			break
 18925  		}
 18926  		if o1.Type != t {
 18927  			break
 18928  		}
 18929  		_ = o1.Args[1]
 18930  		s2 := o1.Args[0]
 18931  		if s2.Op != OpPPC64SLDconst {
 18932  			break
 18933  		}
 18934  		if s2.AuxInt != 40 {
 18935  			break
 18936  		}
 18937  		x2 := s2.Args[0]
 18938  		if x2.Op != OpPPC64MOVBZload {
 18939  			break
 18940  		}
 18941  		i2 := x2.AuxInt
 18942  		if x2.Aux != s {
 18943  			break
 18944  		}
 18945  		_ = x2.Args[1]
 18946  		if p != x2.Args[0] {
 18947  			break
 18948  		}
 18949  		if mem != x2.Args[1] {
 18950  			break
 18951  		}
 18952  		o2 := o1.Args[1]
 18953  		if o2.Op != OpPPC64OR {
 18954  			break
 18955  		}
 18956  		if o2.Type != t {
 18957  			break
 18958  		}
 18959  		_ = o2.Args[1]
 18960  		s3 := o2.Args[0]
 18961  		if s3.Op != OpPPC64SLDconst {
 18962  			break
 18963  		}
 18964  		if s3.AuxInt != 32 {
 18965  			break
 18966  		}
 18967  		x3 := s3.Args[0]
 18968  		if x3.Op != OpPPC64MOVBZload {
 18969  			break
 18970  		}
 18971  		i3 := x3.AuxInt
 18972  		if x3.Aux != s {
 18973  			break
 18974  		}
 18975  		_ = x3.Args[1]
 18976  		if p != x3.Args[0] {
 18977  			break
 18978  		}
 18979  		if mem != x3.Args[1] {
 18980  			break
 18981  		}
 18982  		x4 := o2.Args[1]
 18983  		if x4.Op != OpPPC64MOVWBRload {
 18984  			break
 18985  		}
 18986  		if x4.Type != t {
 18987  			break
 18988  		}
 18989  		_ = x4.Args[1]
 18990  		x4_0 := x4.Args[0]
 18991  		if x4_0.Op != OpPPC64MOVDaddr {
 18992  			break
 18993  		}
 18994  		if x4_0.Type != typ.Uintptr {
 18995  			break
 18996  		}
 18997  		i4 := x4_0.AuxInt
 18998  		if p != x4_0.Args[0] {
 18999  			break
 19000  		}
 19001  		if mem != x4.Args[1] {
 19002  			break
 19003  		}
 19004  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19005  			break
 19006  		}
 19007  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19008  		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 19009  		v.reset(OpCopy)
 19010  		v.AddArg(v0)
 19011  		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19012  		v1.AuxInt = i0
 19013  		v1.Aux = s
 19014  		v1.AddArg(p)
 19015  		v0.AddArg(v1)
 19016  		v0.AddArg(mem)
 19017  		return true
 19018  	}
 19019  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))))
 19020  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19021  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19022  	for {
 19023  		t := v.Type
 19024  		_ = v.Args[1]
 19025  		s0 := v.Args[0]
 19026  		if s0.Op != OpPPC64SLDconst {
 19027  			break
 19028  		}
 19029  		if s0.AuxInt != 56 {
 19030  			break
 19031  		}
 19032  		x0 := s0.Args[0]
 19033  		if x0.Op != OpPPC64MOVBZload {
 19034  			break
 19035  		}
 19036  		i0 := x0.AuxInt
 19037  		s := x0.Aux
 19038  		_ = x0.Args[1]
 19039  		p := x0.Args[0]
 19040  		mem := x0.Args[1]
 19041  		o0 := v.Args[1]
 19042  		if o0.Op != OpPPC64OR {
 19043  			break
 19044  		}
 19045  		if o0.Type != t {
 19046  			break
 19047  		}
 19048  		_ = o0.Args[1]
 19049  		s1 := o0.Args[0]
 19050  		if s1.Op != OpPPC64SLDconst {
 19051  			break
 19052  		}
 19053  		if s1.AuxInt != 48 {
 19054  			break
 19055  		}
 19056  		x1 := s1.Args[0]
 19057  		if x1.Op != OpPPC64MOVBZload {
 19058  			break
 19059  		}
 19060  		i1 := x1.AuxInt
 19061  		if x1.Aux != s {
 19062  			break
 19063  		}
 19064  		_ = x1.Args[1]
 19065  		if p != x1.Args[0] {
 19066  			break
 19067  		}
 19068  		if mem != x1.Args[1] {
 19069  			break
 19070  		}
 19071  		o1 := o0.Args[1]
 19072  		if o1.Op != OpPPC64OR {
 19073  			break
 19074  		}
 19075  		if o1.Type != t {
 19076  			break
 19077  		}
 19078  		_ = o1.Args[1]
 19079  		s2 := o1.Args[0]
 19080  		if s2.Op != OpPPC64SLDconst {
 19081  			break
 19082  		}
 19083  		if s2.AuxInt != 40 {
 19084  			break
 19085  		}
 19086  		x2 := s2.Args[0]
 19087  		if x2.Op != OpPPC64MOVBZload {
 19088  			break
 19089  		}
 19090  		i2 := x2.AuxInt
 19091  		if x2.Aux != s {
 19092  			break
 19093  		}
 19094  		_ = x2.Args[1]
 19095  		if p != x2.Args[0] {
 19096  			break
 19097  		}
 19098  		if mem != x2.Args[1] {
 19099  			break
 19100  		}
 19101  		o2 := o1.Args[1]
 19102  		if o2.Op != OpPPC64OR {
 19103  			break
 19104  		}
 19105  		if o2.Type != t {
 19106  			break
 19107  		}
 19108  		_ = o2.Args[1]
 19109  		x4 := o2.Args[0]
 19110  		if x4.Op != OpPPC64MOVWBRload {
 19111  			break
 19112  		}
 19113  		if x4.Type != t {
 19114  			break
 19115  		}
 19116  		_ = x4.Args[1]
 19117  		x4_0 := x4.Args[0]
 19118  		if x4_0.Op != OpPPC64MOVDaddr {
 19119  			break
 19120  		}
 19121  		if x4_0.Type != typ.Uintptr {
 19122  			break
 19123  		}
 19124  		i4 := x4_0.AuxInt
 19125  		if p != x4_0.Args[0] {
 19126  			break
 19127  		}
 19128  		if mem != x4.Args[1] {
 19129  			break
 19130  		}
 19131  		s3 := o2.Args[1]
 19132  		if s3.Op != OpPPC64SLDconst {
 19133  			break
 19134  		}
 19135  		if s3.AuxInt != 32 {
 19136  			break
 19137  		}
 19138  		x3 := s3.Args[0]
 19139  		if x3.Op != OpPPC64MOVBZload {
 19140  			break
 19141  		}
 19142  		i3 := x3.AuxInt
 19143  		if x3.Aux != s {
 19144  			break
 19145  		}
 19146  		_ = x3.Args[1]
 19147  		if p != x3.Args[0] {
 19148  			break
 19149  		}
 19150  		if mem != x3.Args[1] {
 19151  			break
 19152  		}
 19153  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19154  			break
 19155  		}
 19156  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19157  		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 19158  		v.reset(OpCopy)
 19159  		v.AddArg(v0)
 19160  		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19161  		v1.AuxInt = i0
 19162  		v1.Aux = s
 19163  		v1.AddArg(p)
 19164  		v0.AddArg(v1)
 19165  		v0.AddArg(mem)
 19166  		return true
 19167  	}
 19168  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 19169  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19170  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19171  	for {
 19172  		t := v.Type
 19173  		_ = v.Args[1]
 19174  		s0 := v.Args[0]
 19175  		if s0.Op != OpPPC64SLDconst {
 19176  			break
 19177  		}
 19178  		if s0.AuxInt != 56 {
 19179  			break
 19180  		}
 19181  		x0 := s0.Args[0]
 19182  		if x0.Op != OpPPC64MOVBZload {
 19183  			break
 19184  		}
 19185  		i0 := x0.AuxInt
 19186  		s := x0.Aux
 19187  		_ = x0.Args[1]
 19188  		p := x0.Args[0]
 19189  		mem := x0.Args[1]
 19190  		o0 := v.Args[1]
 19191  		if o0.Op != OpPPC64OR {
 19192  			break
 19193  		}
 19194  		if o0.Type != t {
 19195  			break
 19196  		}
 19197  		_ = o0.Args[1]
 19198  		s1 := o0.Args[0]
 19199  		if s1.Op != OpPPC64SLDconst {
 19200  			break
 19201  		}
 19202  		if s1.AuxInt != 48 {
 19203  			break
 19204  		}
 19205  		x1 := s1.Args[0]
 19206  		if x1.Op != OpPPC64MOVBZload {
 19207  			break
 19208  		}
 19209  		i1 := x1.AuxInt
 19210  		if x1.Aux != s {
 19211  			break
 19212  		}
 19213  		_ = x1.Args[1]
 19214  		if p != x1.Args[0] {
 19215  			break
 19216  		}
 19217  		if mem != x1.Args[1] {
 19218  			break
 19219  		}
 19220  		o1 := o0.Args[1]
 19221  		if o1.Op != OpPPC64OR {
 19222  			break
 19223  		}
 19224  		if o1.Type != t {
 19225  			break
 19226  		}
 19227  		_ = o1.Args[1]
 19228  		o2 := o1.Args[0]
 19229  		if o2.Op != OpPPC64OR {
 19230  			break
 19231  		}
 19232  		if o2.Type != t {
 19233  			break
 19234  		}
 19235  		_ = o2.Args[1]
 19236  		s3 := o2.Args[0]
 19237  		if s3.Op != OpPPC64SLDconst {
 19238  			break
 19239  		}
 19240  		if s3.AuxInt != 32 {
 19241  			break
 19242  		}
 19243  		x3 := s3.Args[0]
 19244  		if x3.Op != OpPPC64MOVBZload {
 19245  			break
 19246  		}
 19247  		i3 := x3.AuxInt
 19248  		if x3.Aux != s {
 19249  			break
 19250  		}
 19251  		_ = x3.Args[1]
 19252  		if p != x3.Args[0] {
 19253  			break
 19254  		}
 19255  		if mem != x3.Args[1] {
 19256  			break
 19257  		}
 19258  		x4 := o2.Args[1]
 19259  		if x4.Op != OpPPC64MOVWBRload {
 19260  			break
 19261  		}
 19262  		if x4.Type != t {
 19263  			break
 19264  		}
 19265  		_ = x4.Args[1]
 19266  		x4_0 := x4.Args[0]
 19267  		if x4_0.Op != OpPPC64MOVDaddr {
 19268  			break
 19269  		}
 19270  		if x4_0.Type != typ.Uintptr {
 19271  			break
 19272  		}
 19273  		i4 := x4_0.AuxInt
 19274  		if p != x4_0.Args[0] {
 19275  			break
 19276  		}
 19277  		if mem != x4.Args[1] {
 19278  			break
 19279  		}
 19280  		s2 := o1.Args[1]
 19281  		if s2.Op != OpPPC64SLDconst {
 19282  			break
 19283  		}
 19284  		if s2.AuxInt != 40 {
 19285  			break
 19286  		}
 19287  		x2 := s2.Args[0]
 19288  		if x2.Op != OpPPC64MOVBZload {
 19289  			break
 19290  		}
 19291  		i2 := x2.AuxInt
 19292  		if x2.Aux != s {
 19293  			break
 19294  		}
 19295  		_ = x2.Args[1]
 19296  		if p != x2.Args[0] {
 19297  			break
 19298  		}
 19299  		if mem != x2.Args[1] {
 19300  			break
 19301  		}
 19302  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19303  			break
 19304  		}
 19305  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19306  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
 19307  		v.reset(OpCopy)
 19308  		v.AddArg(v0)
 19309  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19310  		v1.AuxInt = i0
 19311  		v1.Aux = s
 19312  		v1.AddArg(p)
 19313  		v0.AddArg(v1)
 19314  		v0.AddArg(mem)
 19315  		return true
 19316  	}
 19317  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 19318  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19319  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19320  	for {
 19321  		t := v.Type
 19322  		_ = v.Args[1]
 19323  		s0 := v.Args[0]
 19324  		if s0.Op != OpPPC64SLDconst {
 19325  			break
 19326  		}
 19327  		if s0.AuxInt != 56 {
 19328  			break
 19329  		}
 19330  		x0 := s0.Args[0]
 19331  		if x0.Op != OpPPC64MOVBZload {
 19332  			break
 19333  		}
 19334  		i0 := x0.AuxInt
 19335  		s := x0.Aux
 19336  		_ = x0.Args[1]
 19337  		p := x0.Args[0]
 19338  		mem := x0.Args[1]
 19339  		o0 := v.Args[1]
 19340  		if o0.Op != OpPPC64OR {
 19341  			break
 19342  		}
 19343  		if o0.Type != t {
 19344  			break
 19345  		}
 19346  		_ = o0.Args[1]
 19347  		s1 := o0.Args[0]
 19348  		if s1.Op != OpPPC64SLDconst {
 19349  			break
 19350  		}
 19351  		if s1.AuxInt != 48 {
 19352  			break
 19353  		}
 19354  		x1 := s1.Args[0]
 19355  		if x1.Op != OpPPC64MOVBZload {
 19356  			break
 19357  		}
 19358  		i1 := x1.AuxInt
 19359  		if x1.Aux != s {
 19360  			break
 19361  		}
 19362  		_ = x1.Args[1]
 19363  		if p != x1.Args[0] {
 19364  			break
 19365  		}
 19366  		if mem != x1.Args[1] {
 19367  			break
 19368  		}
 19369  		o1 := o0.Args[1]
 19370  		if o1.Op != OpPPC64OR {
 19371  			break
 19372  		}
 19373  		if o1.Type != t {
 19374  			break
 19375  		}
 19376  		_ = o1.Args[1]
 19377  		o2 := o1.Args[0]
 19378  		if o2.Op != OpPPC64OR {
 19379  			break
 19380  		}
 19381  		if o2.Type != t {
 19382  			break
 19383  		}
 19384  		_ = o2.Args[1]
 19385  		x4 := o2.Args[0]
 19386  		if x4.Op != OpPPC64MOVWBRload {
 19387  			break
 19388  		}
 19389  		if x4.Type != t {
 19390  			break
 19391  		}
 19392  		_ = x4.Args[1]
 19393  		x4_0 := x4.Args[0]
 19394  		if x4_0.Op != OpPPC64MOVDaddr {
 19395  			break
 19396  		}
 19397  		if x4_0.Type != typ.Uintptr {
 19398  			break
 19399  		}
 19400  		i4 := x4_0.AuxInt
 19401  		if p != x4_0.Args[0] {
 19402  			break
 19403  		}
 19404  		if mem != x4.Args[1] {
 19405  			break
 19406  		}
 19407  		s3 := o2.Args[1]
 19408  		if s3.Op != OpPPC64SLDconst {
 19409  			break
 19410  		}
 19411  		if s3.AuxInt != 32 {
 19412  			break
 19413  		}
 19414  		x3 := s3.Args[0]
 19415  		if x3.Op != OpPPC64MOVBZload {
 19416  			break
 19417  		}
 19418  		i3 := x3.AuxInt
 19419  		if x3.Aux != s {
 19420  			break
 19421  		}
 19422  		_ = x3.Args[1]
 19423  		if p != x3.Args[0] {
 19424  			break
 19425  		}
 19426  		if mem != x3.Args[1] {
 19427  			break
 19428  		}
 19429  		s2 := o1.Args[1]
 19430  		if s2.Op != OpPPC64SLDconst {
 19431  			break
 19432  		}
 19433  		if s2.AuxInt != 40 {
 19434  			break
 19435  		}
 19436  		x2 := s2.Args[0]
 19437  		if x2.Op != OpPPC64MOVBZload {
 19438  			break
 19439  		}
 19440  		i2 := x2.AuxInt
 19441  		if x2.Aux != s {
 19442  			break
 19443  		}
 19444  		_ = x2.Args[1]
 19445  		if p != x2.Args[0] {
 19446  			break
 19447  		}
 19448  		if mem != x2.Args[1] {
 19449  			break
 19450  		}
 19451  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19452  			break
 19453  		}
 19454  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19455  		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
 19456  		v.reset(OpCopy)
 19457  		v.AddArg(v0)
 19458  		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19459  		v1.AuxInt = i0
 19460  		v1.Aux = s
 19461  		v1.AddArg(p)
 19462  		v0.AddArg(v1)
 19463  		v0.AddArg(mem)
 19464  		return true
 19465  	}
 19466  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19467  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19468  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19469  	for {
 19470  		t := v.Type
 19471  		_ = v.Args[1]
 19472  		s0 := v.Args[0]
 19473  		if s0.Op != OpPPC64SLDconst {
 19474  			break
 19475  		}
 19476  		if s0.AuxInt != 56 {
 19477  			break
 19478  		}
 19479  		x0 := s0.Args[0]
 19480  		if x0.Op != OpPPC64MOVBZload {
 19481  			break
 19482  		}
 19483  		i0 := x0.AuxInt
 19484  		s := x0.Aux
 19485  		_ = x0.Args[1]
 19486  		p := x0.Args[0]
 19487  		mem := x0.Args[1]
 19488  		o0 := v.Args[1]
 19489  		if o0.Op != OpPPC64OR {
 19490  			break
 19491  		}
 19492  		if o0.Type != t {
 19493  			break
 19494  		}
 19495  		_ = o0.Args[1]
 19496  		o1 := o0.Args[0]
 19497  		if o1.Op != OpPPC64OR {
 19498  			break
 19499  		}
 19500  		if o1.Type != t {
 19501  			break
 19502  		}
 19503  		_ = o1.Args[1]
 19504  		s2 := o1.Args[0]
 19505  		if s2.Op != OpPPC64SLDconst {
 19506  			break
 19507  		}
 19508  		if s2.AuxInt != 40 {
 19509  			break
 19510  		}
 19511  		x2 := s2.Args[0]
 19512  		if x2.Op != OpPPC64MOVBZload {
 19513  			break
 19514  		}
 19515  		i2 := x2.AuxInt
 19516  		if x2.Aux != s {
 19517  			break
 19518  		}
 19519  		_ = x2.Args[1]
 19520  		if p != x2.Args[0] {
 19521  			break
 19522  		}
 19523  		if mem != x2.Args[1] {
 19524  			break
 19525  		}
 19526  		o2 := o1.Args[1]
 19527  		if o2.Op != OpPPC64OR {
 19528  			break
 19529  		}
 19530  		if o2.Type != t {
 19531  			break
 19532  		}
 19533  		_ = o2.Args[1]
 19534  		s3 := o2.Args[0]
 19535  		if s3.Op != OpPPC64SLDconst {
 19536  			break
 19537  		}
 19538  		if s3.AuxInt != 32 {
 19539  			break
 19540  		}
 19541  		x3 := s3.Args[0]
 19542  		if x3.Op != OpPPC64MOVBZload {
 19543  			break
 19544  		}
 19545  		i3 := x3.AuxInt
 19546  		if x3.Aux != s {
 19547  			break
 19548  		}
 19549  		_ = x3.Args[1]
 19550  		if p != x3.Args[0] {
 19551  			break
 19552  		}
 19553  		if mem != x3.Args[1] {
 19554  			break
 19555  		}
 19556  		x4 := o2.Args[1]
 19557  		if x4.Op != OpPPC64MOVWBRload {
 19558  			break
 19559  		}
 19560  		if x4.Type != t {
 19561  			break
 19562  		}
 19563  		_ = x4.Args[1]
 19564  		x4_0 := x4.Args[0]
 19565  		if x4_0.Op != OpPPC64MOVDaddr {
 19566  			break
 19567  		}
 19568  		if x4_0.Type != typ.Uintptr {
 19569  			break
 19570  		}
 19571  		i4 := x4_0.AuxInt
 19572  		if p != x4_0.Args[0] {
 19573  			break
 19574  		}
 19575  		if mem != x4.Args[1] {
 19576  			break
 19577  		}
 19578  		s1 := o0.Args[1]
 19579  		if s1.Op != OpPPC64SLDconst {
 19580  			break
 19581  		}
 19582  		if s1.AuxInt != 48 {
 19583  			break
 19584  		}
 19585  		x1 := s1.Args[0]
 19586  		if x1.Op != OpPPC64MOVBZload {
 19587  			break
 19588  		}
 19589  		i1 := x1.AuxInt
 19590  		if x1.Aux != s {
 19591  			break
 19592  		}
 19593  		_ = x1.Args[1]
 19594  		if p != x1.Args[0] {
 19595  			break
 19596  		}
 19597  		if mem != x1.Args[1] {
 19598  			break
 19599  		}
 19600  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19601  			break
 19602  		}
 19603  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19604  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19605  		v.reset(OpCopy)
 19606  		v.AddArg(v0)
 19607  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19608  		v1.AuxInt = i0
 19609  		v1.Aux = s
 19610  		v1.AddArg(p)
 19611  		v0.AddArg(v1)
 19612  		v0.AddArg(mem)
 19613  		return true
 19614  	}
 19615  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19616  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19617  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19618  	for {
 19619  		t := v.Type
 19620  		_ = v.Args[1]
 19621  		s0 := v.Args[0]
 19622  		if s0.Op != OpPPC64SLDconst {
 19623  			break
 19624  		}
 19625  		if s0.AuxInt != 56 {
 19626  			break
 19627  		}
 19628  		x0 := s0.Args[0]
 19629  		if x0.Op != OpPPC64MOVBZload {
 19630  			break
 19631  		}
 19632  		i0 := x0.AuxInt
 19633  		s := x0.Aux
 19634  		_ = x0.Args[1]
 19635  		p := x0.Args[0]
 19636  		mem := x0.Args[1]
 19637  		o0 := v.Args[1]
 19638  		if o0.Op != OpPPC64OR {
 19639  			break
 19640  		}
 19641  		if o0.Type != t {
 19642  			break
 19643  		}
 19644  		_ = o0.Args[1]
 19645  		o1 := o0.Args[0]
 19646  		if o1.Op != OpPPC64OR {
 19647  			break
 19648  		}
 19649  		if o1.Type != t {
 19650  			break
 19651  		}
 19652  		_ = o1.Args[1]
 19653  		s2 := o1.Args[0]
 19654  		if s2.Op != OpPPC64SLDconst {
 19655  			break
 19656  		}
 19657  		if s2.AuxInt != 40 {
 19658  			break
 19659  		}
 19660  		x2 := s2.Args[0]
 19661  		if x2.Op != OpPPC64MOVBZload {
 19662  			break
 19663  		}
 19664  		i2 := x2.AuxInt
 19665  		if x2.Aux != s {
 19666  			break
 19667  		}
 19668  		_ = x2.Args[1]
 19669  		if p != x2.Args[0] {
 19670  			break
 19671  		}
 19672  		if mem != x2.Args[1] {
 19673  			break
 19674  		}
 19675  		o2 := o1.Args[1]
 19676  		if o2.Op != OpPPC64OR {
 19677  			break
 19678  		}
 19679  		if o2.Type != t {
 19680  			break
 19681  		}
 19682  		_ = o2.Args[1]
 19683  		x4 := o2.Args[0]
 19684  		if x4.Op != OpPPC64MOVWBRload {
 19685  			break
 19686  		}
 19687  		if x4.Type != t {
 19688  			break
 19689  		}
 19690  		_ = x4.Args[1]
 19691  		x4_0 := x4.Args[0]
 19692  		if x4_0.Op != OpPPC64MOVDaddr {
 19693  			break
 19694  		}
 19695  		if x4_0.Type != typ.Uintptr {
 19696  			break
 19697  		}
 19698  		i4 := x4_0.AuxInt
 19699  		if p != x4_0.Args[0] {
 19700  			break
 19701  		}
 19702  		if mem != x4.Args[1] {
 19703  			break
 19704  		}
 19705  		s3 := o2.Args[1]
 19706  		if s3.Op != OpPPC64SLDconst {
 19707  			break
 19708  		}
 19709  		if s3.AuxInt != 32 {
 19710  			break
 19711  		}
 19712  		x3 := s3.Args[0]
 19713  		if x3.Op != OpPPC64MOVBZload {
 19714  			break
 19715  		}
 19716  		i3 := x3.AuxInt
 19717  		if x3.Aux != s {
 19718  			break
 19719  		}
 19720  		_ = x3.Args[1]
 19721  		if p != x3.Args[0] {
 19722  			break
 19723  		}
 19724  		if mem != x3.Args[1] {
 19725  			break
 19726  		}
 19727  		s1 := o0.Args[1]
 19728  		if s1.Op != OpPPC64SLDconst {
 19729  			break
 19730  		}
 19731  		if s1.AuxInt != 48 {
 19732  			break
 19733  		}
 19734  		x1 := s1.Args[0]
 19735  		if x1.Op != OpPPC64MOVBZload {
 19736  			break
 19737  		}
 19738  		i1 := x1.AuxInt
 19739  		if x1.Aux != s {
 19740  			break
 19741  		}
 19742  		_ = x1.Args[1]
 19743  		if p != x1.Args[0] {
 19744  			break
 19745  		}
 19746  		if mem != x1.Args[1] {
 19747  			break
 19748  		}
 19749  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19750  			break
 19751  		}
 19752  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19753  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19754  		v.reset(OpCopy)
 19755  		v.AddArg(v0)
 19756  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19757  		v1.AuxInt = i0
 19758  		v1.Aux = s
 19759  		v1.AddArg(p)
 19760  		v0.AddArg(v1)
 19761  		v0.AddArg(mem)
 19762  		return true
 19763  	}
 19764  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19765  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19766  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19767  	for {
 19768  		t := v.Type
 19769  		_ = v.Args[1]
 19770  		s0 := v.Args[0]
 19771  		if s0.Op != OpPPC64SLDconst {
 19772  			break
 19773  		}
 19774  		if s0.AuxInt != 56 {
 19775  			break
 19776  		}
 19777  		x0 := s0.Args[0]
 19778  		if x0.Op != OpPPC64MOVBZload {
 19779  			break
 19780  		}
 19781  		i0 := x0.AuxInt
 19782  		s := x0.Aux
 19783  		_ = x0.Args[1]
 19784  		p := x0.Args[0]
 19785  		mem := x0.Args[1]
 19786  		o0 := v.Args[1]
 19787  		if o0.Op != OpPPC64OR {
 19788  			break
 19789  		}
 19790  		if o0.Type != t {
 19791  			break
 19792  		}
 19793  		_ = o0.Args[1]
 19794  		o1 := o0.Args[0]
 19795  		if o1.Op != OpPPC64OR {
 19796  			break
 19797  		}
 19798  		if o1.Type != t {
 19799  			break
 19800  		}
 19801  		_ = o1.Args[1]
 19802  		o2 := o1.Args[0]
 19803  		if o2.Op != OpPPC64OR {
 19804  			break
 19805  		}
 19806  		if o2.Type != t {
 19807  			break
 19808  		}
 19809  		_ = o2.Args[1]
 19810  		s3 := o2.Args[0]
 19811  		if s3.Op != OpPPC64SLDconst {
 19812  			break
 19813  		}
 19814  		if s3.AuxInt != 32 {
 19815  			break
 19816  		}
 19817  		x3 := s3.Args[0]
 19818  		if x3.Op != OpPPC64MOVBZload {
 19819  			break
 19820  		}
 19821  		i3 := x3.AuxInt
 19822  		if x3.Aux != s {
 19823  			break
 19824  		}
 19825  		_ = x3.Args[1]
 19826  		if p != x3.Args[0] {
 19827  			break
 19828  		}
 19829  		if mem != x3.Args[1] {
 19830  			break
 19831  		}
 19832  		x4 := o2.Args[1]
 19833  		if x4.Op != OpPPC64MOVWBRload {
 19834  			break
 19835  		}
 19836  		if x4.Type != t {
 19837  			break
 19838  		}
 19839  		_ = x4.Args[1]
 19840  		x4_0 := x4.Args[0]
 19841  		if x4_0.Op != OpPPC64MOVDaddr {
 19842  			break
 19843  		}
 19844  		if x4_0.Type != typ.Uintptr {
 19845  			break
 19846  		}
 19847  		i4 := x4_0.AuxInt
 19848  		if p != x4_0.Args[0] {
 19849  			break
 19850  		}
 19851  		if mem != x4.Args[1] {
 19852  			break
 19853  		}
 19854  		s2 := o1.Args[1]
 19855  		if s2.Op != OpPPC64SLDconst {
 19856  			break
 19857  		}
 19858  		if s2.AuxInt != 40 {
 19859  			break
 19860  		}
 19861  		x2 := s2.Args[0]
 19862  		if x2.Op != OpPPC64MOVBZload {
 19863  			break
 19864  		}
 19865  		i2 := x2.AuxInt
 19866  		if x2.Aux != s {
 19867  			break
 19868  		}
 19869  		_ = x2.Args[1]
 19870  		if p != x2.Args[0] {
 19871  			break
 19872  		}
 19873  		if mem != x2.Args[1] {
 19874  			break
 19875  		}
 19876  		s1 := o0.Args[1]
 19877  		if s1.Op != OpPPC64SLDconst {
 19878  			break
 19879  		}
 19880  		if s1.AuxInt != 48 {
 19881  			break
 19882  		}
 19883  		x1 := s1.Args[0]
 19884  		if x1.Op != OpPPC64MOVBZload {
 19885  			break
 19886  		}
 19887  		i1 := x1.AuxInt
 19888  		if x1.Aux != s {
 19889  			break
 19890  		}
 19891  		_ = x1.Args[1]
 19892  		if p != x1.Args[0] {
 19893  			break
 19894  		}
 19895  		if mem != x1.Args[1] {
 19896  			break
 19897  		}
 19898  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19899  			break
 19900  		}
 19901  		b = mergePoint(b, x0, x1, x2, x3, x4)
 19902  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19903  		v.reset(OpCopy)
 19904  		v.AddArg(v0)
 19905  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19906  		v1.AuxInt = i0
 19907  		v1.Aux = s
 19908  		v1.AddArg(p)
 19909  		v0.AddArg(v1)
 19910  		v0.AddArg(mem)
 19911  		return true
 19912  	}
 19913  	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19914  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19915  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19916  	for {
 19917  		t := v.Type
 19918  		_ = v.Args[1]
 19919  		s0 := v.Args[0]
 19920  		if s0.Op != OpPPC64SLDconst {
 19921  			break
 19922  		}
 19923  		if s0.AuxInt != 56 {
 19924  			break
 19925  		}
 19926  		x0 := s0.Args[0]
 19927  		if x0.Op != OpPPC64MOVBZload {
 19928  			break
 19929  		}
 19930  		i0 := x0.AuxInt
 19931  		s := x0.Aux
 19932  		_ = x0.Args[1]
 19933  		p := x0.Args[0]
 19934  		mem := x0.Args[1]
 19935  		o0 := v.Args[1]
 19936  		if o0.Op != OpPPC64OR {
 19937  			break
 19938  		}
 19939  		if o0.Type != t {
 19940  			break
 19941  		}
 19942  		_ = o0.Args[1]
 19943  		o1 := o0.Args[0]
 19944  		if o1.Op != OpPPC64OR {
 19945  			break
 19946  		}
 19947  		if o1.Type != t {
 19948  			break
 19949  		}
 19950  		_ = o1.Args[1]
 19951  		o2 := o1.Args[0]
 19952  		if o2.Op != OpPPC64OR {
 19953  			break
 19954  		}
 19955  		if o2.Type != t {
 19956  			break
 19957  		}
 19958  		_ = o2.Args[1]
 19959  		x4 := o2.Args[0]
 19960  		if x4.Op != OpPPC64MOVWBRload {
 19961  			break
 19962  		}
 19963  		if x4.Type != t {
 19964  			break
 19965  		}
 19966  		_ = x4.Args[1]
 19967  		x4_0 := x4.Args[0]
 19968  		if x4_0.Op != OpPPC64MOVDaddr {
 19969  			break
 19970  		}
 19971  		if x4_0.Type != typ.Uintptr {
 19972  			break
 19973  		}
 19974  		i4 := x4_0.AuxInt
 19975  		if p != x4_0.Args[0] {
 19976  			break
 19977  		}
 19978  		if mem != x4.Args[1] {
 19979  			break
 19980  		}
 19981  		s3 := o2.Args[1]
 19982  		if s3.Op != OpPPC64SLDconst {
 19983  			break
 19984  		}
 19985  		if s3.AuxInt != 32 {
 19986  			break
 19987  		}
 19988  		x3 := s3.Args[0]
 19989  		if x3.Op != OpPPC64MOVBZload {
 19990  			break
 19991  		}
 19992  		i3 := x3.AuxInt
 19993  		if x3.Aux != s {
 19994  			break
 19995  		}
 19996  		_ = x3.Args[1]
 19997  		if p != x3.Args[0] {
 19998  			break
 19999  		}
 20000  		if mem != x3.Args[1] {
 20001  			break
 20002  		}
 20003  		s2 := o1.Args[1]
 20004  		if s2.Op != OpPPC64SLDconst {
 20005  			break
 20006  		}
 20007  		if s2.AuxInt != 40 {
 20008  			break
 20009  		}
 20010  		x2 := s2.Args[0]
 20011  		if x2.Op != OpPPC64MOVBZload {
 20012  			break
 20013  		}
 20014  		i2 := x2.AuxInt
 20015  		if x2.Aux != s {
 20016  			break
 20017  		}
 20018  		_ = x2.Args[1]
 20019  		if p != x2.Args[0] {
 20020  			break
 20021  		}
 20022  		if mem != x2.Args[1] {
 20023  			break
 20024  		}
 20025  		s1 := o0.Args[1]
 20026  		if s1.Op != OpPPC64SLDconst {
 20027  			break
 20028  		}
 20029  		if s1.AuxInt != 48 {
 20030  			break
 20031  		}
 20032  		x1 := s1.Args[0]
 20033  		if x1.Op != OpPPC64MOVBZload {
 20034  			break
 20035  		}
 20036  		i1 := x1.AuxInt
 20037  		if x1.Aux != s {
 20038  			break
 20039  		}
 20040  		_ = x1.Args[1]
 20041  		if p != x1.Args[0] {
 20042  			break
 20043  		}
 20044  		if mem != x1.Args[1] {
 20045  			break
 20046  		}
 20047  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20048  			break
 20049  		}
 20050  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20051  		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 20052  		v.reset(OpCopy)
 20053  		v.AddArg(v0)
 20054  		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20055  		v1.AuxInt = i0
 20056  		v1.Aux = s
 20057  		v1.AddArg(p)
 20058  		v0.AddArg(v1)
 20059  		v0.AddArg(mem)
 20060  		return true
 20061  	}
 20062  	return false
 20063  }
 20064  func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
 20065  	b := v.Block
 20066  	_ = b
 20067  	config := b.Func.Config
 20068  	_ = config
 20069  	typ := &b.Func.Config.Types
 20070  	_ = typ
 20071  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20072  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20073  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20074  	for {
 20075  		t := v.Type
 20076  		_ = v.Args[1]
 20077  		o0 := v.Args[0]
 20078  		if o0.Op != OpPPC64OR {
 20079  			break
 20080  		}
 20081  		if o0.Type != t {
 20082  			break
 20083  		}
 20084  		_ = o0.Args[1]
 20085  		s1 := o0.Args[0]
 20086  		if s1.Op != OpPPC64SLDconst {
 20087  			break
 20088  		}
 20089  		if s1.AuxInt != 48 {
 20090  			break
 20091  		}
 20092  		x1 := s1.Args[0]
 20093  		if x1.Op != OpPPC64MOVBZload {
 20094  			break
 20095  		}
 20096  		i1 := x1.AuxInt
 20097  		s := x1.Aux
 20098  		_ = x1.Args[1]
 20099  		p := x1.Args[0]
 20100  		mem := x1.Args[1]
 20101  		o1 := o0.Args[1]
 20102  		if o1.Op != OpPPC64OR {
 20103  			break
 20104  		}
 20105  		if o1.Type != t {
 20106  			break
 20107  		}
 20108  		_ = o1.Args[1]
 20109  		s2 := o1.Args[0]
 20110  		if s2.Op != OpPPC64SLDconst {
 20111  			break
 20112  		}
 20113  		if s2.AuxInt != 40 {
 20114  			break
 20115  		}
 20116  		x2 := s2.Args[0]
 20117  		if x2.Op != OpPPC64MOVBZload {
 20118  			break
 20119  		}
 20120  		i2 := x2.AuxInt
 20121  		if x2.Aux != s {
 20122  			break
 20123  		}
 20124  		_ = x2.Args[1]
 20125  		if p != x2.Args[0] {
 20126  			break
 20127  		}
 20128  		if mem != x2.Args[1] {
 20129  			break
 20130  		}
 20131  		o2 := o1.Args[1]
 20132  		if o2.Op != OpPPC64OR {
 20133  			break
 20134  		}
 20135  		if o2.Type != t {
 20136  			break
 20137  		}
 20138  		_ = o2.Args[1]
 20139  		s3 := o2.Args[0]
 20140  		if s3.Op != OpPPC64SLDconst {
 20141  			break
 20142  		}
 20143  		if s3.AuxInt != 32 {
 20144  			break
 20145  		}
 20146  		x3 := s3.Args[0]
 20147  		if x3.Op != OpPPC64MOVBZload {
 20148  			break
 20149  		}
 20150  		i3 := x3.AuxInt
 20151  		if x3.Aux != s {
 20152  			break
 20153  		}
 20154  		_ = x3.Args[1]
 20155  		if p != x3.Args[0] {
 20156  			break
 20157  		}
 20158  		if mem != x3.Args[1] {
 20159  			break
 20160  		}
 20161  		x4 := o2.Args[1]
 20162  		if x4.Op != OpPPC64MOVWBRload {
 20163  			break
 20164  		}
 20165  		if x4.Type != t {
 20166  			break
 20167  		}
 20168  		_ = x4.Args[1]
 20169  		x4_0 := x4.Args[0]
 20170  		if x4_0.Op != OpPPC64MOVDaddr {
 20171  			break
 20172  		}
 20173  		if x4_0.Type != typ.Uintptr {
 20174  			break
 20175  		}
 20176  		i4 := x4_0.AuxInt
 20177  		if p != x4_0.Args[0] {
 20178  			break
 20179  		}
 20180  		if mem != x4.Args[1] {
 20181  			break
 20182  		}
 20183  		s0 := v.Args[1]
 20184  		if s0.Op != OpPPC64SLDconst {
 20185  			break
 20186  		}
 20187  		if s0.AuxInt != 56 {
 20188  			break
 20189  		}
 20190  		x0 := s0.Args[0]
 20191  		if x0.Op != OpPPC64MOVBZload {
 20192  			break
 20193  		}
 20194  		i0 := x0.AuxInt
 20195  		if x0.Aux != s {
 20196  			break
 20197  		}
 20198  		_ = x0.Args[1]
 20199  		if p != x0.Args[0] {
 20200  			break
 20201  		}
 20202  		if mem != x0.Args[1] {
 20203  			break
 20204  		}
 20205  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20206  			break
 20207  		}
 20208  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20209  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20210  		v.reset(OpCopy)
 20211  		v.AddArg(v0)
 20212  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20213  		v1.AuxInt = i0
 20214  		v1.Aux = s
 20215  		v1.AddArg(p)
 20216  		v0.AddArg(v1)
 20217  		v0.AddArg(mem)
 20218  		return true
 20219  	}
 20220  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20221  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20222  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20223  	for {
 20224  		t := v.Type
 20225  		_ = v.Args[1]
 20226  		o0 := v.Args[0]
 20227  		if o0.Op != OpPPC64OR {
 20228  			break
 20229  		}
 20230  		if o0.Type != t {
 20231  			break
 20232  		}
 20233  		_ = o0.Args[1]
 20234  		s1 := o0.Args[0]
 20235  		if s1.Op != OpPPC64SLDconst {
 20236  			break
 20237  		}
 20238  		if s1.AuxInt != 48 {
 20239  			break
 20240  		}
 20241  		x1 := s1.Args[0]
 20242  		if x1.Op != OpPPC64MOVBZload {
 20243  			break
 20244  		}
 20245  		i1 := x1.AuxInt
 20246  		s := x1.Aux
 20247  		_ = x1.Args[1]
 20248  		p := x1.Args[0]
 20249  		mem := x1.Args[1]
 20250  		o1 := o0.Args[1]
 20251  		if o1.Op != OpPPC64OR {
 20252  			break
 20253  		}
 20254  		if o1.Type != t {
 20255  			break
 20256  		}
 20257  		_ = o1.Args[1]
 20258  		s2 := o1.Args[0]
 20259  		if s2.Op != OpPPC64SLDconst {
 20260  			break
 20261  		}
 20262  		if s2.AuxInt != 40 {
 20263  			break
 20264  		}
 20265  		x2 := s2.Args[0]
 20266  		if x2.Op != OpPPC64MOVBZload {
 20267  			break
 20268  		}
 20269  		i2 := x2.AuxInt
 20270  		if x2.Aux != s {
 20271  			break
 20272  		}
 20273  		_ = x2.Args[1]
 20274  		if p != x2.Args[0] {
 20275  			break
 20276  		}
 20277  		if mem != x2.Args[1] {
 20278  			break
 20279  		}
 20280  		o2 := o1.Args[1]
 20281  		if o2.Op != OpPPC64OR {
 20282  			break
 20283  		}
 20284  		if o2.Type != t {
 20285  			break
 20286  		}
 20287  		_ = o2.Args[1]
 20288  		x4 := o2.Args[0]
 20289  		if x4.Op != OpPPC64MOVWBRload {
 20290  			break
 20291  		}
 20292  		if x4.Type != t {
 20293  			break
 20294  		}
 20295  		_ = x4.Args[1]
 20296  		x4_0 := x4.Args[0]
 20297  		if x4_0.Op != OpPPC64MOVDaddr {
 20298  			break
 20299  		}
 20300  		if x4_0.Type != typ.Uintptr {
 20301  			break
 20302  		}
 20303  		i4 := x4_0.AuxInt
 20304  		if p != x4_0.Args[0] {
 20305  			break
 20306  		}
 20307  		if mem != x4.Args[1] {
 20308  			break
 20309  		}
 20310  		s3 := o2.Args[1]
 20311  		if s3.Op != OpPPC64SLDconst {
 20312  			break
 20313  		}
 20314  		if s3.AuxInt != 32 {
 20315  			break
 20316  		}
 20317  		x3 := s3.Args[0]
 20318  		if x3.Op != OpPPC64MOVBZload {
 20319  			break
 20320  		}
 20321  		i3 := x3.AuxInt
 20322  		if x3.Aux != s {
 20323  			break
 20324  		}
 20325  		_ = x3.Args[1]
 20326  		if p != x3.Args[0] {
 20327  			break
 20328  		}
 20329  		if mem != x3.Args[1] {
 20330  			break
 20331  		}
 20332  		s0 := v.Args[1]
 20333  		if s0.Op != OpPPC64SLDconst {
 20334  			break
 20335  		}
 20336  		if s0.AuxInt != 56 {
 20337  			break
 20338  		}
 20339  		x0 := s0.Args[0]
 20340  		if x0.Op != OpPPC64MOVBZload {
 20341  			break
 20342  		}
 20343  		i0 := x0.AuxInt
 20344  		if x0.Aux != s {
 20345  			break
 20346  		}
 20347  		_ = x0.Args[1]
 20348  		if p != x0.Args[0] {
 20349  			break
 20350  		}
 20351  		if mem != x0.Args[1] {
 20352  			break
 20353  		}
 20354  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20355  			break
 20356  		}
 20357  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20358  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20359  		v.reset(OpCopy)
 20360  		v.AddArg(v0)
 20361  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20362  		v1.AuxInt = i0
 20363  		v1.Aux = s
 20364  		v1.AddArg(p)
 20365  		v0.AddArg(v1)
 20366  		v0.AddArg(mem)
 20367  		return true
 20368  	}
 20369  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20370  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20371  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20372  	for {
 20373  		t := v.Type
 20374  		_ = v.Args[1]
 20375  		o0 := v.Args[0]
 20376  		if o0.Op != OpPPC64OR {
 20377  			break
 20378  		}
 20379  		if o0.Type != t {
 20380  			break
 20381  		}
 20382  		_ = o0.Args[1]
 20383  		s1 := o0.Args[0]
 20384  		if s1.Op != OpPPC64SLDconst {
 20385  			break
 20386  		}
 20387  		if s1.AuxInt != 48 {
 20388  			break
 20389  		}
 20390  		x1 := s1.Args[0]
 20391  		if x1.Op != OpPPC64MOVBZload {
 20392  			break
 20393  		}
 20394  		i1 := x1.AuxInt
 20395  		s := x1.Aux
 20396  		_ = x1.Args[1]
 20397  		p := x1.Args[0]
 20398  		mem := x1.Args[1]
 20399  		o1 := o0.Args[1]
 20400  		if o1.Op != OpPPC64OR {
 20401  			break
 20402  		}
 20403  		if o1.Type != t {
 20404  			break
 20405  		}
 20406  		_ = o1.Args[1]
 20407  		o2 := o1.Args[0]
 20408  		if o2.Op != OpPPC64OR {
 20409  			break
 20410  		}
 20411  		if o2.Type != t {
 20412  			break
 20413  		}
 20414  		_ = o2.Args[1]
 20415  		s3 := o2.Args[0]
 20416  		if s3.Op != OpPPC64SLDconst {
 20417  			break
 20418  		}
 20419  		if s3.AuxInt != 32 {
 20420  			break
 20421  		}
 20422  		x3 := s3.Args[0]
 20423  		if x3.Op != OpPPC64MOVBZload {
 20424  			break
 20425  		}
 20426  		i3 := x3.AuxInt
 20427  		if x3.Aux != s {
 20428  			break
 20429  		}
 20430  		_ = x3.Args[1]
 20431  		if p != x3.Args[0] {
 20432  			break
 20433  		}
 20434  		if mem != x3.Args[1] {
 20435  			break
 20436  		}
 20437  		x4 := o2.Args[1]
 20438  		if x4.Op != OpPPC64MOVWBRload {
 20439  			break
 20440  		}
 20441  		if x4.Type != t {
 20442  			break
 20443  		}
 20444  		_ = x4.Args[1]
 20445  		x4_0 := x4.Args[0]
 20446  		if x4_0.Op != OpPPC64MOVDaddr {
 20447  			break
 20448  		}
 20449  		if x4_0.Type != typ.Uintptr {
 20450  			break
 20451  		}
 20452  		i4 := x4_0.AuxInt
 20453  		if p != x4_0.Args[0] {
 20454  			break
 20455  		}
 20456  		if mem != x4.Args[1] {
 20457  			break
 20458  		}
 20459  		s2 := o1.Args[1]
 20460  		if s2.Op != OpPPC64SLDconst {
 20461  			break
 20462  		}
 20463  		if s2.AuxInt != 40 {
 20464  			break
 20465  		}
 20466  		x2 := s2.Args[0]
 20467  		if x2.Op != OpPPC64MOVBZload {
 20468  			break
 20469  		}
 20470  		i2 := x2.AuxInt
 20471  		if x2.Aux != s {
 20472  			break
 20473  		}
 20474  		_ = x2.Args[1]
 20475  		if p != x2.Args[0] {
 20476  			break
 20477  		}
 20478  		if mem != x2.Args[1] {
 20479  			break
 20480  		}
 20481  		s0 := v.Args[1]
 20482  		if s0.Op != OpPPC64SLDconst {
 20483  			break
 20484  		}
 20485  		if s0.AuxInt != 56 {
 20486  			break
 20487  		}
 20488  		x0 := s0.Args[0]
 20489  		if x0.Op != OpPPC64MOVBZload {
 20490  			break
 20491  		}
 20492  		i0 := x0.AuxInt
 20493  		if x0.Aux != s {
 20494  			break
 20495  		}
 20496  		_ = x0.Args[1]
 20497  		if p != x0.Args[0] {
 20498  			break
 20499  		}
 20500  		if mem != x0.Args[1] {
 20501  			break
 20502  		}
 20503  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20504  			break
 20505  		}
 20506  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20507  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20508  		v.reset(OpCopy)
 20509  		v.AddArg(v0)
 20510  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20511  		v1.AuxInt = i0
 20512  		v1.Aux = s
 20513  		v1.AddArg(p)
 20514  		v0.AddArg(v1)
 20515  		v0.AddArg(mem)
 20516  		return true
 20517  	}
 20518  	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20519  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20520  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20521  	for {
 20522  		t := v.Type
 20523  		_ = v.Args[1]
 20524  		o0 := v.Args[0]
 20525  		if o0.Op != OpPPC64OR {
 20526  			break
 20527  		}
 20528  		if o0.Type != t {
 20529  			break
 20530  		}
 20531  		_ = o0.Args[1]
 20532  		s1 := o0.Args[0]
 20533  		if s1.Op != OpPPC64SLDconst {
 20534  			break
 20535  		}
 20536  		if s1.AuxInt != 48 {
 20537  			break
 20538  		}
 20539  		x1 := s1.Args[0]
 20540  		if x1.Op != OpPPC64MOVBZload {
 20541  			break
 20542  		}
 20543  		i1 := x1.AuxInt
 20544  		s := x1.Aux
 20545  		_ = x1.Args[1]
 20546  		p := x1.Args[0]
 20547  		mem := x1.Args[1]
 20548  		o1 := o0.Args[1]
 20549  		if o1.Op != OpPPC64OR {
 20550  			break
 20551  		}
 20552  		if o1.Type != t {
 20553  			break
 20554  		}
 20555  		_ = o1.Args[1]
 20556  		o2 := o1.Args[0]
 20557  		if o2.Op != OpPPC64OR {
 20558  			break
 20559  		}
 20560  		if o2.Type != t {
 20561  			break
 20562  		}
 20563  		_ = o2.Args[1]
 20564  		x4 := o2.Args[0]
 20565  		if x4.Op != OpPPC64MOVWBRload {
 20566  			break
 20567  		}
 20568  		if x4.Type != t {
 20569  			break
 20570  		}
 20571  		_ = x4.Args[1]
 20572  		x4_0 := x4.Args[0]
 20573  		if x4_0.Op != OpPPC64MOVDaddr {
 20574  			break
 20575  		}
 20576  		if x4_0.Type != typ.Uintptr {
 20577  			break
 20578  		}
 20579  		i4 := x4_0.AuxInt
 20580  		if p != x4_0.Args[0] {
 20581  			break
 20582  		}
 20583  		if mem != x4.Args[1] {
 20584  			break
 20585  		}
 20586  		s3 := o2.Args[1]
 20587  		if s3.Op != OpPPC64SLDconst {
 20588  			break
 20589  		}
 20590  		if s3.AuxInt != 32 {
 20591  			break
 20592  		}
 20593  		x3 := s3.Args[0]
 20594  		if x3.Op != OpPPC64MOVBZload {
 20595  			break
 20596  		}
 20597  		i3 := x3.AuxInt
 20598  		if x3.Aux != s {
 20599  			break
 20600  		}
 20601  		_ = x3.Args[1]
 20602  		if p != x3.Args[0] {
 20603  			break
 20604  		}
 20605  		if mem != x3.Args[1] {
 20606  			break
 20607  		}
 20608  		s2 := o1.Args[1]
 20609  		if s2.Op != OpPPC64SLDconst {
 20610  			break
 20611  		}
 20612  		if s2.AuxInt != 40 {
 20613  			break
 20614  		}
 20615  		x2 := s2.Args[0]
 20616  		if x2.Op != OpPPC64MOVBZload {
 20617  			break
 20618  		}
 20619  		i2 := x2.AuxInt
 20620  		if x2.Aux != s {
 20621  			break
 20622  		}
 20623  		_ = x2.Args[1]
 20624  		if p != x2.Args[0] {
 20625  			break
 20626  		}
 20627  		if mem != x2.Args[1] {
 20628  			break
 20629  		}
 20630  		s0 := v.Args[1]
 20631  		if s0.Op != OpPPC64SLDconst {
 20632  			break
 20633  		}
 20634  		if s0.AuxInt != 56 {
 20635  			break
 20636  		}
 20637  		x0 := s0.Args[0]
 20638  		if x0.Op != OpPPC64MOVBZload {
 20639  			break
 20640  		}
 20641  		i0 := x0.AuxInt
 20642  		if x0.Aux != s {
 20643  			break
 20644  		}
 20645  		_ = x0.Args[1]
 20646  		if p != x0.Args[0] {
 20647  			break
 20648  		}
 20649  		if mem != x0.Args[1] {
 20650  			break
 20651  		}
 20652  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20653  			break
 20654  		}
 20655  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20656  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20657  		v.reset(OpCopy)
 20658  		v.AddArg(v0)
 20659  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20660  		v1.AuxInt = i0
 20661  		v1.Aux = s
 20662  		v1.AddArg(p)
 20663  		v0.AddArg(v1)
 20664  		v0.AddArg(mem)
 20665  		return true
 20666  	}
 20667  	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20668  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20669  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20670  	for {
 20671  		t := v.Type
 20672  		_ = v.Args[1]
 20673  		o0 := v.Args[0]
 20674  		if o0.Op != OpPPC64OR {
 20675  			break
 20676  		}
 20677  		if o0.Type != t {
 20678  			break
 20679  		}
 20680  		_ = o0.Args[1]
 20681  		o1 := o0.Args[0]
 20682  		if o1.Op != OpPPC64OR {
 20683  			break
 20684  		}
 20685  		if o1.Type != t {
 20686  			break
 20687  		}
 20688  		_ = o1.Args[1]
 20689  		s2 := o1.Args[0]
 20690  		if s2.Op != OpPPC64SLDconst {
 20691  			break
 20692  		}
 20693  		if s2.AuxInt != 40 {
 20694  			break
 20695  		}
 20696  		x2 := s2.Args[0]
 20697  		if x2.Op != OpPPC64MOVBZload {
 20698  			break
 20699  		}
 20700  		i2 := x2.AuxInt
 20701  		s := x2.Aux
 20702  		_ = x2.Args[1]
 20703  		p := x2.Args[0]
 20704  		mem := x2.Args[1]
 20705  		o2 := o1.Args[1]
 20706  		if o2.Op != OpPPC64OR {
 20707  			break
 20708  		}
 20709  		if o2.Type != t {
 20710  			break
 20711  		}
 20712  		_ = o2.Args[1]
 20713  		s3 := o2.Args[0]
 20714  		if s3.Op != OpPPC64SLDconst {
 20715  			break
 20716  		}
 20717  		if s3.AuxInt != 32 {
 20718  			break
 20719  		}
 20720  		x3 := s3.Args[0]
 20721  		if x3.Op != OpPPC64MOVBZload {
 20722  			break
 20723  		}
 20724  		i3 := x3.AuxInt
 20725  		if x3.Aux != s {
 20726  			break
 20727  		}
 20728  		_ = x3.Args[1]
 20729  		if p != x3.Args[0] {
 20730  			break
 20731  		}
 20732  		if mem != x3.Args[1] {
 20733  			break
 20734  		}
 20735  		x4 := o2.Args[1]
 20736  		if x4.Op != OpPPC64MOVWBRload {
 20737  			break
 20738  		}
 20739  		if x4.Type != t {
 20740  			break
 20741  		}
 20742  		_ = x4.Args[1]
 20743  		x4_0 := x4.Args[0]
 20744  		if x4_0.Op != OpPPC64MOVDaddr {
 20745  			break
 20746  		}
 20747  		if x4_0.Type != typ.Uintptr {
 20748  			break
 20749  		}
 20750  		i4 := x4_0.AuxInt
 20751  		if p != x4_0.Args[0] {
 20752  			break
 20753  		}
 20754  		if mem != x4.Args[1] {
 20755  			break
 20756  		}
 20757  		s1 := o0.Args[1]
 20758  		if s1.Op != OpPPC64SLDconst {
 20759  			break
 20760  		}
 20761  		if s1.AuxInt != 48 {
 20762  			break
 20763  		}
 20764  		x1 := s1.Args[0]
 20765  		if x1.Op != OpPPC64MOVBZload {
 20766  			break
 20767  		}
 20768  		i1 := x1.AuxInt
 20769  		if x1.Aux != s {
 20770  			break
 20771  		}
 20772  		_ = x1.Args[1]
 20773  		if p != x1.Args[0] {
 20774  			break
 20775  		}
 20776  		if mem != x1.Args[1] {
 20777  			break
 20778  		}
 20779  		s0 := v.Args[1]
 20780  		if s0.Op != OpPPC64SLDconst {
 20781  			break
 20782  		}
 20783  		if s0.AuxInt != 56 {
 20784  			break
 20785  		}
 20786  		x0 := s0.Args[0]
 20787  		if x0.Op != OpPPC64MOVBZload {
 20788  			break
 20789  		}
 20790  		i0 := x0.AuxInt
 20791  		if x0.Aux != s {
 20792  			break
 20793  		}
 20794  		_ = x0.Args[1]
 20795  		if p != x0.Args[0] {
 20796  			break
 20797  		}
 20798  		if mem != x0.Args[1] {
 20799  			break
 20800  		}
 20801  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20802  			break
 20803  		}
 20804  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20805  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20806  		v.reset(OpCopy)
 20807  		v.AddArg(v0)
 20808  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20809  		v1.AuxInt = i0
 20810  		v1.Aux = s
 20811  		v1.AddArg(p)
 20812  		v0.AddArg(v1)
 20813  		v0.AddArg(mem)
 20814  		return true
 20815  	}
 20816  	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20817  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20818  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20819  	for {
 20820  		t := v.Type
 20821  		_ = v.Args[1]
 20822  		o0 := v.Args[0]
 20823  		if o0.Op != OpPPC64OR {
 20824  			break
 20825  		}
 20826  		if o0.Type != t {
 20827  			break
 20828  		}
 20829  		_ = o0.Args[1]
 20830  		o1 := o0.Args[0]
 20831  		if o1.Op != OpPPC64OR {
 20832  			break
 20833  		}
 20834  		if o1.Type != t {
 20835  			break
 20836  		}
 20837  		_ = o1.Args[1]
 20838  		s2 := o1.Args[0]
 20839  		if s2.Op != OpPPC64SLDconst {
 20840  			break
 20841  		}
 20842  		if s2.AuxInt != 40 {
 20843  			break
 20844  		}
 20845  		x2 := s2.Args[0]
 20846  		if x2.Op != OpPPC64MOVBZload {
 20847  			break
 20848  		}
 20849  		i2 := x2.AuxInt
 20850  		s := x2.Aux
 20851  		_ = x2.Args[1]
 20852  		p := x2.Args[0]
 20853  		mem := x2.Args[1]
 20854  		o2 := o1.Args[1]
 20855  		if o2.Op != OpPPC64OR {
 20856  			break
 20857  		}
 20858  		if o2.Type != t {
 20859  			break
 20860  		}
 20861  		_ = o2.Args[1]
 20862  		x4 := o2.Args[0]
 20863  		if x4.Op != OpPPC64MOVWBRload {
 20864  			break
 20865  		}
 20866  		if x4.Type != t {
 20867  			break
 20868  		}
 20869  		_ = x4.Args[1]
 20870  		x4_0 := x4.Args[0]
 20871  		if x4_0.Op != OpPPC64MOVDaddr {
 20872  			break
 20873  		}
 20874  		if x4_0.Type != typ.Uintptr {
 20875  			break
 20876  		}
 20877  		i4 := x4_0.AuxInt
 20878  		if p != x4_0.Args[0] {
 20879  			break
 20880  		}
 20881  		if mem != x4.Args[1] {
 20882  			break
 20883  		}
 20884  		s3 := o2.Args[1]
 20885  		if s3.Op != OpPPC64SLDconst {
 20886  			break
 20887  		}
 20888  		if s3.AuxInt != 32 {
 20889  			break
 20890  		}
 20891  		x3 := s3.Args[0]
 20892  		if x3.Op != OpPPC64MOVBZload {
 20893  			break
 20894  		}
 20895  		i3 := x3.AuxInt
 20896  		if x3.Aux != s {
 20897  			break
 20898  		}
 20899  		_ = x3.Args[1]
 20900  		if p != x3.Args[0] {
 20901  			break
 20902  		}
 20903  		if mem != x3.Args[1] {
 20904  			break
 20905  		}
 20906  		s1 := o0.Args[1]
 20907  		if s1.Op != OpPPC64SLDconst {
 20908  			break
 20909  		}
 20910  		if s1.AuxInt != 48 {
 20911  			break
 20912  		}
 20913  		x1 := s1.Args[0]
 20914  		if x1.Op != OpPPC64MOVBZload {
 20915  			break
 20916  		}
 20917  		i1 := x1.AuxInt
 20918  		if x1.Aux != s {
 20919  			break
 20920  		}
 20921  		_ = x1.Args[1]
 20922  		if p != x1.Args[0] {
 20923  			break
 20924  		}
 20925  		if mem != x1.Args[1] {
 20926  			break
 20927  		}
 20928  		s0 := v.Args[1]
 20929  		if s0.Op != OpPPC64SLDconst {
 20930  			break
 20931  		}
 20932  		if s0.AuxInt != 56 {
 20933  			break
 20934  		}
 20935  		x0 := s0.Args[0]
 20936  		if x0.Op != OpPPC64MOVBZload {
 20937  			break
 20938  		}
 20939  		i0 := x0.AuxInt
 20940  		if x0.Aux != s {
 20941  			break
 20942  		}
 20943  		_ = x0.Args[1]
 20944  		if p != x0.Args[0] {
 20945  			break
 20946  		}
 20947  		if mem != x0.Args[1] {
 20948  			break
 20949  		}
 20950  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20951  			break
 20952  		}
 20953  		b = mergePoint(b, x0, x1, x2, x3, x4)
 20954  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20955  		v.reset(OpCopy)
 20956  		v.AddArg(v0)
 20957  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20958  		v1.AuxInt = i0
 20959  		v1.Aux = s
 20960  		v1.AddArg(p)
 20961  		v0.AddArg(v1)
 20962  		v0.AddArg(mem)
 20963  		return true
 20964  	}
 20965  	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20966  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20967  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20968  	for {
 20969  		t := v.Type
 20970  		_ = v.Args[1]
 20971  		o0 := v.Args[0]
 20972  		if o0.Op != OpPPC64OR {
 20973  			break
 20974  		}
 20975  		if o0.Type != t {
 20976  			break
 20977  		}
 20978  		_ = o0.Args[1]
 20979  		o1 := o0.Args[0]
 20980  		if o1.Op != OpPPC64OR {
 20981  			break
 20982  		}
 20983  		if o1.Type != t {
 20984  			break
 20985  		}
 20986  		_ = o1.Args[1]
 20987  		o2 := o1.Args[0]
 20988  		if o2.Op != OpPPC64OR {
 20989  			break
 20990  		}
 20991  		if o2.Type != t {
 20992  			break
 20993  		}
 20994  		_ = o2.Args[1]
 20995  		s3 := o2.Args[0]
 20996  		if s3.Op != OpPPC64SLDconst {
 20997  			break
 20998  		}
 20999  		if s3.AuxInt != 32 {
 21000  			break
 21001  		}
 21002  		x3 := s3.Args[0]
 21003  		if x3.Op != OpPPC64MOVBZload {
 21004  			break
 21005  		}
 21006  		i3 := x3.AuxInt
 21007  		s := x3.Aux
 21008  		_ = x3.Args[1]
 21009  		p := x3.Args[0]
 21010  		mem := x3.Args[1]
 21011  		x4 := o2.Args[1]
 21012  		if x4.Op != OpPPC64MOVWBRload {
 21013  			break
 21014  		}
 21015  		if x4.Type != t {
 21016  			break
 21017  		}
 21018  		_ = x4.Args[1]
 21019  		x4_0 := x4.Args[0]
 21020  		if x4_0.Op != OpPPC64MOVDaddr {
 21021  			break
 21022  		}
 21023  		if x4_0.Type != typ.Uintptr {
 21024  			break
 21025  		}
 21026  		i4 := x4_0.AuxInt
 21027  		if p != x4_0.Args[0] {
 21028  			break
 21029  		}
 21030  		if mem != x4.Args[1] {
 21031  			break
 21032  		}
 21033  		s2 := o1.Args[1]
 21034  		if s2.Op != OpPPC64SLDconst {
 21035  			break
 21036  		}
 21037  		if s2.AuxInt != 40 {
 21038  			break
 21039  		}
 21040  		x2 := s2.Args[0]
 21041  		if x2.Op != OpPPC64MOVBZload {
 21042  			break
 21043  		}
 21044  		i2 := x2.AuxInt
 21045  		if x2.Aux != s {
 21046  			break
 21047  		}
 21048  		_ = x2.Args[1]
 21049  		if p != x2.Args[0] {
 21050  			break
 21051  		}
 21052  		if mem != x2.Args[1] {
 21053  			break
 21054  		}
 21055  		s1 := o0.Args[1]
 21056  		if s1.Op != OpPPC64SLDconst {
 21057  			break
 21058  		}
 21059  		if s1.AuxInt != 48 {
 21060  			break
 21061  		}
 21062  		x1 := s1.Args[0]
 21063  		if x1.Op != OpPPC64MOVBZload {
 21064  			break
 21065  		}
 21066  		i1 := x1.AuxInt
 21067  		if x1.Aux != s {
 21068  			break
 21069  		}
 21070  		_ = x1.Args[1]
 21071  		if p != x1.Args[0] {
 21072  			break
 21073  		}
 21074  		if mem != x1.Args[1] {
 21075  			break
 21076  		}
 21077  		s0 := v.Args[1]
 21078  		if s0.Op != OpPPC64SLDconst {
 21079  			break
 21080  		}
 21081  		if s0.AuxInt != 56 {
 21082  			break
 21083  		}
 21084  		x0 := s0.Args[0]
 21085  		if x0.Op != OpPPC64MOVBZload {
 21086  			break
 21087  		}
 21088  		i0 := x0.AuxInt
 21089  		if x0.Aux != s {
 21090  			break
 21091  		}
 21092  		_ = x0.Args[1]
 21093  		if p != x0.Args[0] {
 21094  			break
 21095  		}
 21096  		if mem != x0.Args[1] {
 21097  			break
 21098  		}
 21099  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 21100  			break
 21101  		}
 21102  		b = mergePoint(b, x0, x1, x2, x3, x4)
 21103  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 21104  		v.reset(OpCopy)
 21105  		v.AddArg(v0)
 21106  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21107  		v1.AuxInt = i0
 21108  		v1.Aux = s
 21109  		v1.AddArg(p)
 21110  		v0.AddArg(v1)
 21111  		v0.AddArg(mem)
 21112  		return true
 21113  	}
 21114  	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 21115  	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 21116  	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21117  	for {
 21118  		t := v.Type
 21119  		_ = v.Args[1]
 21120  		o0 := v.Args[0]
 21121  		if o0.Op != OpPPC64OR {
 21122  			break
 21123  		}
 21124  		if o0.Type != t {
 21125  			break
 21126  		}
 21127  		_ = o0.Args[1]
 21128  		o1 := o0.Args[0]
 21129  		if o1.Op != OpPPC64OR {
 21130  			break
 21131  		}
 21132  		if o1.Type != t {
 21133  			break
 21134  		}
 21135  		_ = o1.Args[1]
 21136  		o2 := o1.Args[0]
 21137  		if o2.Op != OpPPC64OR {
 21138  			break
 21139  		}
 21140  		if o2.Type != t {
 21141  			break
 21142  		}
 21143  		_ = o2.Args[1]
 21144  		x4 := o2.Args[0]
 21145  		if x4.Op != OpPPC64MOVWBRload {
 21146  			break
 21147  		}
 21148  		if x4.Type != t {
 21149  			break
 21150  		}
 21151  		_ = x4.Args[1]
 21152  		x4_0 := x4.Args[0]
 21153  		if x4_0.Op != OpPPC64MOVDaddr {
 21154  			break
 21155  		}
 21156  		if x4_0.Type != typ.Uintptr {
 21157  			break
 21158  		}
 21159  		i4 := x4_0.AuxInt
 21160  		p := x4_0.Args[0]
 21161  		mem := x4.Args[1]
 21162  		s3 := o2.Args[1]
 21163  		if s3.Op != OpPPC64SLDconst {
 21164  			break
 21165  		}
 21166  		if s3.AuxInt != 32 {
 21167  			break
 21168  		}
 21169  		x3 := s3.Args[0]
 21170  		if x3.Op != OpPPC64MOVBZload {
 21171  			break
 21172  		}
 21173  		i3 := x3.AuxInt
 21174  		s := x3.Aux
 21175  		_ = x3.Args[1]
 21176  		if p != x3.Args[0] {
 21177  			break
 21178  		}
 21179  		if mem != x3.Args[1] {
 21180  			break
 21181  		}
 21182  		s2 := o1.Args[1]
 21183  		if s2.Op != OpPPC64SLDconst {
 21184  			break
 21185  		}
 21186  		if s2.AuxInt != 40 {
 21187  			break
 21188  		}
 21189  		x2 := s2.Args[0]
 21190  		if x2.Op != OpPPC64MOVBZload {
 21191  			break
 21192  		}
 21193  		i2 := x2.AuxInt
 21194  		if x2.Aux != s {
 21195  			break
 21196  		}
 21197  		_ = x2.Args[1]
 21198  		if p != x2.Args[0] {
 21199  			break
 21200  		}
 21201  		if mem != x2.Args[1] {
 21202  			break
 21203  		}
 21204  		s1 := o0.Args[1]
 21205  		if s1.Op != OpPPC64SLDconst {
 21206  			break
 21207  		}
 21208  		if s1.AuxInt != 48 {
 21209  			break
 21210  		}
 21211  		x1 := s1.Args[0]
 21212  		if x1.Op != OpPPC64MOVBZload {
 21213  			break
 21214  		}
 21215  		i1 := x1.AuxInt
 21216  		if x1.Aux != s {
 21217  			break
 21218  		}
 21219  		_ = x1.Args[1]
 21220  		if p != x1.Args[0] {
 21221  			break
 21222  		}
 21223  		if mem != x1.Args[1] {
 21224  			break
 21225  		}
 21226  		s0 := v.Args[1]
 21227  		if s0.Op != OpPPC64SLDconst {
 21228  			break
 21229  		}
 21230  		if s0.AuxInt != 56 {
 21231  			break
 21232  		}
 21233  		x0 := s0.Args[0]
 21234  		if x0.Op != OpPPC64MOVBZload {
 21235  			break
 21236  		}
 21237  		i0 := x0.AuxInt
 21238  		if x0.Aux != s {
 21239  			break
 21240  		}
 21241  		_ = x0.Args[1]
 21242  		if p != x0.Args[0] {
 21243  			break
 21244  		}
 21245  		if mem != x0.Args[1] {
 21246  			break
 21247  		}
 21248  		if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 21249  			break
 21250  		}
 21251  		b = mergePoint(b, x0, x1, x2, x3, x4)
 21252  		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 21253  		v.reset(OpCopy)
 21254  		v.AddArg(v0)
 21255  		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21256  		v1.AuxInt = i0
 21257  		v1.Aux = s
 21258  		v1.AddArg(p)
 21259  		v0.AddArg(v1)
 21260  		v0.AddArg(mem)
 21261  		return true
 21262  	}
 21263  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 21264  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21265  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21266  	for {
 21267  		t := v.Type
 21268  		_ = v.Args[1]
 21269  		x7 := v.Args[0]
 21270  		if x7.Op != OpPPC64MOVBZload {
 21271  			break
 21272  		}
 21273  		i7 := x7.AuxInt
 21274  		s := x7.Aux
 21275  		_ = x7.Args[1]
 21276  		p := x7.Args[0]
 21277  		mem := x7.Args[1]
 21278  		o5 := v.Args[1]
 21279  		if o5.Op != OpPPC64OR {
 21280  			break
 21281  		}
 21282  		if o5.Type != t {
 21283  			break
 21284  		}
 21285  		_ = o5.Args[1]
 21286  		s6 := o5.Args[0]
 21287  		if s6.Op != OpPPC64SLDconst {
 21288  			break
 21289  		}
 21290  		if s6.AuxInt != 8 {
 21291  			break
 21292  		}
 21293  		x6 := s6.Args[0]
 21294  		if x6.Op != OpPPC64MOVBZload {
 21295  			break
 21296  		}
 21297  		i6 := x6.AuxInt
 21298  		if x6.Aux != s {
 21299  			break
 21300  		}
 21301  		_ = x6.Args[1]
 21302  		if p != x6.Args[0] {
 21303  			break
 21304  		}
 21305  		if mem != x6.Args[1] {
 21306  			break
 21307  		}
 21308  		o4 := o5.Args[1]
 21309  		if o4.Op != OpPPC64OR {
 21310  			break
 21311  		}
 21312  		if o4.Type != t {
 21313  			break
 21314  		}
 21315  		_ = o4.Args[1]
 21316  		s5 := o4.Args[0]
 21317  		if s5.Op != OpPPC64SLDconst {
 21318  			break
 21319  		}
 21320  		if s5.AuxInt != 16 {
 21321  			break
 21322  		}
 21323  		x5 := s5.Args[0]
 21324  		if x5.Op != OpPPC64MOVBZload {
 21325  			break
 21326  		}
 21327  		i5 := x5.AuxInt
 21328  		if x5.Aux != s {
 21329  			break
 21330  		}
 21331  		_ = x5.Args[1]
 21332  		if p != x5.Args[0] {
 21333  			break
 21334  		}
 21335  		if mem != x5.Args[1] {
 21336  			break
 21337  		}
 21338  		o3 := o4.Args[1]
 21339  		if o3.Op != OpPPC64OR {
 21340  			break
 21341  		}
 21342  		if o3.Type != t {
 21343  			break
 21344  		}
 21345  		_ = o3.Args[1]
 21346  		s4 := o3.Args[0]
 21347  		if s4.Op != OpPPC64SLDconst {
 21348  			break
 21349  		}
 21350  		if s4.AuxInt != 24 {
 21351  			break
 21352  		}
 21353  		x4 := s4.Args[0]
 21354  		if x4.Op != OpPPC64MOVBZload {
 21355  			break
 21356  		}
 21357  		i4 := x4.AuxInt
 21358  		if x4.Aux != s {
 21359  			break
 21360  		}
 21361  		_ = x4.Args[1]
 21362  		if p != x4.Args[0] {
 21363  			break
 21364  		}
 21365  		if mem != x4.Args[1] {
 21366  			break
 21367  		}
 21368  		s0 := o3.Args[1]
 21369  		if s0.Op != OpPPC64SLWconst {
 21370  			break
 21371  		}
 21372  		if s0.AuxInt != 32 {
 21373  			break
 21374  		}
 21375  		x3 := s0.Args[0]
 21376  		if x3.Op != OpPPC64MOVWBRload {
 21377  			break
 21378  		}
 21379  		if x3.Type != t {
 21380  			break
 21381  		}
 21382  		_ = x3.Args[1]
 21383  		x3_0 := x3.Args[0]
 21384  		if x3_0.Op != OpPPC64MOVDaddr {
 21385  			break
 21386  		}
 21387  		if x3_0.Type != typ.Uintptr {
 21388  			break
 21389  		}
 21390  		i0 := x3_0.AuxInt
 21391  		if x3_0.Aux != s {
 21392  			break
 21393  		}
 21394  		if p != x3_0.Args[0] {
 21395  			break
 21396  		}
 21397  		if mem != x3.Args[1] {
 21398  			break
 21399  		}
 21400  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21401  			break
 21402  		}
 21403  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21404  		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 21405  		v.reset(OpCopy)
 21406  		v.AddArg(v0)
 21407  		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21408  		v1.AuxInt = i0
 21409  		v1.Aux = s
 21410  		v1.AddArg(p)
 21411  		v0.AddArg(v1)
 21412  		v0.AddArg(mem)
 21413  		return true
 21414  	}
 21415  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 21416  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21417  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21418  	for {
 21419  		t := v.Type
 21420  		_ = v.Args[1]
 21421  		x7 := v.Args[0]
 21422  		if x7.Op != OpPPC64MOVBZload {
 21423  			break
 21424  		}
 21425  		i7 := x7.AuxInt
 21426  		s := x7.Aux
 21427  		_ = x7.Args[1]
 21428  		p := x7.Args[0]
 21429  		mem := x7.Args[1]
 21430  		o5 := v.Args[1]
 21431  		if o5.Op != OpPPC64OR {
 21432  			break
 21433  		}
 21434  		if o5.Type != t {
 21435  			break
 21436  		}
 21437  		_ = o5.Args[1]
 21438  		s6 := o5.Args[0]
 21439  		if s6.Op != OpPPC64SLDconst {
 21440  			break
 21441  		}
 21442  		if s6.AuxInt != 8 {
 21443  			break
 21444  		}
 21445  		x6 := s6.Args[0]
 21446  		if x6.Op != OpPPC64MOVBZload {
 21447  			break
 21448  		}
 21449  		i6 := x6.AuxInt
 21450  		if x6.Aux != s {
 21451  			break
 21452  		}
 21453  		_ = x6.Args[1]
 21454  		if p != x6.Args[0] {
 21455  			break
 21456  		}
 21457  		if mem != x6.Args[1] {
 21458  			break
 21459  		}
 21460  		o4 := o5.Args[1]
 21461  		if o4.Op != OpPPC64OR {
 21462  			break
 21463  		}
 21464  		if o4.Type != t {
 21465  			break
 21466  		}
 21467  		_ = o4.Args[1]
 21468  		s5 := o4.Args[0]
 21469  		if s5.Op != OpPPC64SLDconst {
 21470  			break
 21471  		}
 21472  		if s5.AuxInt != 16 {
 21473  			break
 21474  		}
 21475  		x5 := s5.Args[0]
 21476  		if x5.Op != OpPPC64MOVBZload {
 21477  			break
 21478  		}
 21479  		i5 := x5.AuxInt
 21480  		if x5.Aux != s {
 21481  			break
 21482  		}
 21483  		_ = x5.Args[1]
 21484  		if p != x5.Args[0] {
 21485  			break
 21486  		}
 21487  		if mem != x5.Args[1] {
 21488  			break
 21489  		}
 21490  		o3 := o4.Args[1]
 21491  		if o3.Op != OpPPC64OR {
 21492  			break
 21493  		}
 21494  		if o3.Type != t {
 21495  			break
 21496  		}
 21497  		_ = o3.Args[1]
 21498  		s0 := o3.Args[0]
 21499  		if s0.Op != OpPPC64SLWconst {
 21500  			break
 21501  		}
 21502  		if s0.AuxInt != 32 {
 21503  			break
 21504  		}
 21505  		x3 := s0.Args[0]
 21506  		if x3.Op != OpPPC64MOVWBRload {
 21507  			break
 21508  		}
 21509  		if x3.Type != t {
 21510  			break
 21511  		}
 21512  		_ = x3.Args[1]
 21513  		x3_0 := x3.Args[0]
 21514  		if x3_0.Op != OpPPC64MOVDaddr {
 21515  			break
 21516  		}
 21517  		if x3_0.Type != typ.Uintptr {
 21518  			break
 21519  		}
 21520  		i0 := x3_0.AuxInt
 21521  		if x3_0.Aux != s {
 21522  			break
 21523  		}
 21524  		if p != x3_0.Args[0] {
 21525  			break
 21526  		}
 21527  		if mem != x3.Args[1] {
 21528  			break
 21529  		}
 21530  		s4 := o3.Args[1]
 21531  		if s4.Op != OpPPC64SLDconst {
 21532  			break
 21533  		}
 21534  		if s4.AuxInt != 24 {
 21535  			break
 21536  		}
 21537  		x4 := s4.Args[0]
 21538  		if x4.Op != OpPPC64MOVBZload {
 21539  			break
 21540  		}
 21541  		i4 := x4.AuxInt
 21542  		if x4.Aux != s {
 21543  			break
 21544  		}
 21545  		_ = x4.Args[1]
 21546  		if p != x4.Args[0] {
 21547  			break
 21548  		}
 21549  		if mem != x4.Args[1] {
 21550  			break
 21551  		}
 21552  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21553  			break
 21554  		}
 21555  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21556  		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 21557  		v.reset(OpCopy)
 21558  		v.AddArg(v0)
 21559  		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21560  		v1.AuxInt = i0
 21561  		v1.Aux = s
 21562  		v1.AddArg(p)
 21563  		v0.AddArg(v1)
 21564  		v0.AddArg(mem)
 21565  		return true
 21566  	}
 21567  	return false
 21568  }
 21569  func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
 21570  	b := v.Block
 21571  	_ = b
 21572  	config := b.Func.Config
 21573  	_ = config
 21574  	typ := &b.Func.Config.Types
 21575  	_ = typ
 21576  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21577  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21578  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21579  	for {
 21580  		t := v.Type
 21581  		_ = v.Args[1]
 21582  		x7 := v.Args[0]
 21583  		if x7.Op != OpPPC64MOVBZload {
 21584  			break
 21585  		}
 21586  		i7 := x7.AuxInt
 21587  		s := x7.Aux
 21588  		_ = x7.Args[1]
 21589  		p := x7.Args[0]
 21590  		mem := x7.Args[1]
 21591  		o5 := v.Args[1]
 21592  		if o5.Op != OpPPC64OR {
 21593  			break
 21594  		}
 21595  		if o5.Type != t {
 21596  			break
 21597  		}
 21598  		_ = o5.Args[1]
 21599  		s6 := o5.Args[0]
 21600  		if s6.Op != OpPPC64SLDconst {
 21601  			break
 21602  		}
 21603  		if s6.AuxInt != 8 {
 21604  			break
 21605  		}
 21606  		x6 := s6.Args[0]
 21607  		if x6.Op != OpPPC64MOVBZload {
 21608  			break
 21609  		}
 21610  		i6 := x6.AuxInt
 21611  		if x6.Aux != s {
 21612  			break
 21613  		}
 21614  		_ = x6.Args[1]
 21615  		if p != x6.Args[0] {
 21616  			break
 21617  		}
 21618  		if mem != x6.Args[1] {
 21619  			break
 21620  		}
 21621  		o4 := o5.Args[1]
 21622  		if o4.Op != OpPPC64OR {
 21623  			break
 21624  		}
 21625  		if o4.Type != t {
 21626  			break
 21627  		}
 21628  		_ = o4.Args[1]
 21629  		o3 := o4.Args[0]
 21630  		if o3.Op != OpPPC64OR {
 21631  			break
 21632  		}
 21633  		if o3.Type != t {
 21634  			break
 21635  		}
 21636  		_ = o3.Args[1]
 21637  		s4 := o3.Args[0]
 21638  		if s4.Op != OpPPC64SLDconst {
 21639  			break
 21640  		}
 21641  		if s4.AuxInt != 24 {
 21642  			break
 21643  		}
 21644  		x4 := s4.Args[0]
 21645  		if x4.Op != OpPPC64MOVBZload {
 21646  			break
 21647  		}
 21648  		i4 := x4.AuxInt
 21649  		if x4.Aux != s {
 21650  			break
 21651  		}
 21652  		_ = x4.Args[1]
 21653  		if p != x4.Args[0] {
 21654  			break
 21655  		}
 21656  		if mem != x4.Args[1] {
 21657  			break
 21658  		}
 21659  		s0 := o3.Args[1]
 21660  		if s0.Op != OpPPC64SLWconst {
 21661  			break
 21662  		}
 21663  		if s0.AuxInt != 32 {
 21664  			break
 21665  		}
 21666  		x3 := s0.Args[0]
 21667  		if x3.Op != OpPPC64MOVWBRload {
 21668  			break
 21669  		}
 21670  		if x3.Type != t {
 21671  			break
 21672  		}
 21673  		_ = x3.Args[1]
 21674  		x3_0 := x3.Args[0]
 21675  		if x3_0.Op != OpPPC64MOVDaddr {
 21676  			break
 21677  		}
 21678  		if x3_0.Type != typ.Uintptr {
 21679  			break
 21680  		}
 21681  		i0 := x3_0.AuxInt
 21682  		if x3_0.Aux != s {
 21683  			break
 21684  		}
 21685  		if p != x3_0.Args[0] {
 21686  			break
 21687  		}
 21688  		if mem != x3.Args[1] {
 21689  			break
 21690  		}
 21691  		s5 := o4.Args[1]
 21692  		if s5.Op != OpPPC64SLDconst {
 21693  			break
 21694  		}
 21695  		if s5.AuxInt != 16 {
 21696  			break
 21697  		}
 21698  		x5 := s5.Args[0]
 21699  		if x5.Op != OpPPC64MOVBZload {
 21700  			break
 21701  		}
 21702  		i5 := x5.AuxInt
 21703  		if x5.Aux != s {
 21704  			break
 21705  		}
 21706  		_ = x5.Args[1]
 21707  		if p != x5.Args[0] {
 21708  			break
 21709  		}
 21710  		if mem != x5.Args[1] {
 21711  			break
 21712  		}
 21713  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21714  			break
 21715  		}
 21716  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21717  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 21718  		v.reset(OpCopy)
 21719  		v.AddArg(v0)
 21720  		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21721  		v1.AuxInt = i0
 21722  		v1.Aux = s
 21723  		v1.AddArg(p)
 21724  		v0.AddArg(v1)
 21725  		v0.AddArg(mem)
 21726  		return true
 21727  	}
 21728  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21729  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21730  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21731  	for {
 21732  		t := v.Type
 21733  		_ = v.Args[1]
 21734  		x7 := v.Args[0]
 21735  		if x7.Op != OpPPC64MOVBZload {
 21736  			break
 21737  		}
 21738  		i7 := x7.AuxInt
 21739  		s := x7.Aux
 21740  		_ = x7.Args[1]
 21741  		p := x7.Args[0]
 21742  		mem := x7.Args[1]
 21743  		o5 := v.Args[1]
 21744  		if o5.Op != OpPPC64OR {
 21745  			break
 21746  		}
 21747  		if o5.Type != t {
 21748  			break
 21749  		}
 21750  		_ = o5.Args[1]
 21751  		s6 := o5.Args[0]
 21752  		if s6.Op != OpPPC64SLDconst {
 21753  			break
 21754  		}
 21755  		if s6.AuxInt != 8 {
 21756  			break
 21757  		}
 21758  		x6 := s6.Args[0]
 21759  		if x6.Op != OpPPC64MOVBZload {
 21760  			break
 21761  		}
 21762  		i6 := x6.AuxInt
 21763  		if x6.Aux != s {
 21764  			break
 21765  		}
 21766  		_ = x6.Args[1]
 21767  		if p != x6.Args[0] {
 21768  			break
 21769  		}
 21770  		if mem != x6.Args[1] {
 21771  			break
 21772  		}
 21773  		o4 := o5.Args[1]
 21774  		if o4.Op != OpPPC64OR {
 21775  			break
 21776  		}
 21777  		if o4.Type != t {
 21778  			break
 21779  		}
 21780  		_ = o4.Args[1]
 21781  		o3 := o4.Args[0]
 21782  		if o3.Op != OpPPC64OR {
 21783  			break
 21784  		}
 21785  		if o3.Type != t {
 21786  			break
 21787  		}
 21788  		_ = o3.Args[1]
 21789  		s0 := o3.Args[0]
 21790  		if s0.Op != OpPPC64SLWconst {
 21791  			break
 21792  		}
 21793  		if s0.AuxInt != 32 {
 21794  			break
 21795  		}
 21796  		x3 := s0.Args[0]
 21797  		if x3.Op != OpPPC64MOVWBRload {
 21798  			break
 21799  		}
 21800  		if x3.Type != t {
 21801  			break
 21802  		}
 21803  		_ = x3.Args[1]
 21804  		x3_0 := x3.Args[0]
 21805  		if x3_0.Op != OpPPC64MOVDaddr {
 21806  			break
 21807  		}
 21808  		if x3_0.Type != typ.Uintptr {
 21809  			break
 21810  		}
 21811  		i0 := x3_0.AuxInt
 21812  		if x3_0.Aux != s {
 21813  			break
 21814  		}
 21815  		if p != x3_0.Args[0] {
 21816  			break
 21817  		}
 21818  		if mem != x3.Args[1] {
 21819  			break
 21820  		}
 21821  		s4 := o3.Args[1]
 21822  		if s4.Op != OpPPC64SLDconst {
 21823  			break
 21824  		}
 21825  		if s4.AuxInt != 24 {
 21826  			break
 21827  		}
 21828  		x4 := s4.Args[0]
 21829  		if x4.Op != OpPPC64MOVBZload {
 21830  			break
 21831  		}
 21832  		i4 := x4.AuxInt
 21833  		if x4.Aux != s {
 21834  			break
 21835  		}
 21836  		_ = x4.Args[1]
 21837  		if p != x4.Args[0] {
 21838  			break
 21839  		}
 21840  		if mem != x4.Args[1] {
 21841  			break
 21842  		}
 21843  		s5 := o4.Args[1]
 21844  		if s5.Op != OpPPC64SLDconst {
 21845  			break
 21846  		}
 21847  		if s5.AuxInt != 16 {
 21848  			break
 21849  		}
 21850  		x5 := s5.Args[0]
 21851  		if x5.Op != OpPPC64MOVBZload {
 21852  			break
 21853  		}
 21854  		i5 := x5.AuxInt
 21855  		if x5.Aux != s {
 21856  			break
 21857  		}
 21858  		_ = x5.Args[1]
 21859  		if p != x5.Args[0] {
 21860  			break
 21861  		}
 21862  		if mem != x5.Args[1] {
 21863  			break
 21864  		}
 21865  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21866  			break
 21867  		}
 21868  		b = mergePoint(b, x3, x4, x5, x6, x7)
 21869  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 21870  		v.reset(OpCopy)
 21871  		v.AddArg(v0)
 21872  		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21873  		v1.AuxInt = i0
 21874  		v1.Aux = s
 21875  		v1.AddArg(p)
 21876  		v0.AddArg(v1)
 21877  		v0.AddArg(mem)
 21878  		return true
 21879  	}
 21880  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21881  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21882  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21883  	for {
 21884  		t := v.Type
 21885  		_ = v.Args[1]
 21886  		x7 := v.Args[0]
 21887  		if x7.Op != OpPPC64MOVBZload {
 21888  			break
 21889  		}
 21890  		i7 := x7.AuxInt
 21891  		s := x7.Aux
 21892  		_ = x7.Args[1]
 21893  		p := x7.Args[0]
 21894  		mem := x7.Args[1]
 21895  		o5 := v.Args[1]
 21896  		if o5.Op != OpPPC64OR {
 21897  			break
 21898  		}
 21899  		if o5.Type != t {
 21900  			break
 21901  		}
 21902  		_ = o5.Args[1]
 21903  		o4 := o5.Args[0]
 21904  		if o4.Op != OpPPC64OR {
 21905  			break
 21906  		}
 21907  		if o4.Type != t {
 21908  			break
 21909  		}
 21910  		_ = o4.Args[1]
 21911  		s5 := o4.Args[0]
 21912  		if s5.Op != OpPPC64SLDconst {
 21913  			break
 21914  		}
 21915  		if s5.AuxInt != 16 {
 21916  			break
 21917  		}
 21918  		x5 := s5.Args[0]
 21919  		if x5.Op != OpPPC64MOVBZload {
 21920  			break
 21921  		}
 21922  		i5 := x5.AuxInt
 21923  		if x5.Aux != s {
 21924  			break
 21925  		}
 21926  		_ = x5.Args[1]
 21927  		if p != x5.Args[0] {
 21928  			break
 21929  		}
 21930  		if mem != x5.Args[1] {
 21931  			break
 21932  		}
 21933  		o3 := o4.Args[1]
 21934  		if o3.Op != OpPPC64OR {
 21935  			break
 21936  		}
 21937  		if o3.Type != t {
 21938  			break
 21939  		}
 21940  		_ = o3.Args[1]
 21941  		s4 := o3.Args[0]
 21942  		if s4.Op != OpPPC64SLDconst {
 21943  			break
 21944  		}
 21945  		if s4.AuxInt != 24 {
 21946  			break
 21947  		}
 21948  		x4 := s4.Args[0]
 21949  		if x4.Op != OpPPC64MOVBZload {
 21950  			break
 21951  		}
 21952  		i4 := x4.AuxInt
 21953  		if x4.Aux != s {
 21954  			break
 21955  		}
 21956  		_ = x4.Args[1]
 21957  		if p != x4.Args[0] {
 21958  			break
 21959  		}
 21960  		if mem != x4.Args[1] {
 21961  			break
 21962  		}
 21963  		s0 := o3.Args[1]
 21964  		if s0.Op != OpPPC64SLWconst {
 21965  			break
 21966  		}
 21967  		if s0.AuxInt != 32 {
 21968  			break
 21969  		}
 21970  		x3 := s0.Args[0]
 21971  		if x3.Op != OpPPC64MOVWBRload {
 21972  			break
 21973  		}
 21974  		if x3.Type != t {
 21975  			break
 21976  		}
 21977  		_ = x3.Args[1]
 21978  		x3_0 := x3.Args[0]
 21979  		if x3_0.Op != OpPPC64MOVDaddr {
 21980  			break
 21981  		}
 21982  		if x3_0.Type != typ.Uintptr {
 21983  			break
 21984  		}
 21985  		i0 := x3_0.AuxInt
 21986  		if x3_0.Aux != s {
 21987  			break
 21988  		}
 21989  		if p != x3_0.Args[0] {
 21990  			break
 21991  		}
 21992  		if mem != x3.Args[1] {
 21993  			break
 21994  		}
 21995  		s6 := o5.Args[1]
 21996  		if s6.Op != OpPPC64SLDconst {
 21997  			break
 21998  		}
 21999  		if s6.AuxInt != 8 {
 22000  			break
 22001  		}
 22002  		x6 := s6.Args[0]
 22003  		if x6.Op != OpPPC64MOVBZload {
 22004  			break
 22005  		}
 22006  		i6 := x6.AuxInt
 22007  		if x6.Aux != s {
 22008  			break
 22009  		}
 22010  		_ = x6.Args[1]
 22011  		if p != x6.Args[0] {
 22012  			break
 22013  		}
 22014  		if mem != x6.Args[1] {
 22015  			break
 22016  		}
 22017  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22018  			break
 22019  		}
 22020  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22021  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 22022  		v.reset(OpCopy)
 22023  		v.AddArg(v0)
 22024  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22025  		v1.AuxInt = i0
 22026  		v1.Aux = s
 22027  		v1.AddArg(p)
 22028  		v0.AddArg(v1)
 22029  		v0.AddArg(mem)
 22030  		return true
 22031  	}
 22032  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22033  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22034  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22035  	for {
 22036  		t := v.Type
 22037  		_ = v.Args[1]
 22038  		x7 := v.Args[0]
 22039  		if x7.Op != OpPPC64MOVBZload {
 22040  			break
 22041  		}
 22042  		i7 := x7.AuxInt
 22043  		s := x7.Aux
 22044  		_ = x7.Args[1]
 22045  		p := x7.Args[0]
 22046  		mem := x7.Args[1]
 22047  		o5 := v.Args[1]
 22048  		if o5.Op != OpPPC64OR {
 22049  			break
 22050  		}
 22051  		if o5.Type != t {
 22052  			break
 22053  		}
 22054  		_ = o5.Args[1]
 22055  		o4 := o5.Args[0]
 22056  		if o4.Op != OpPPC64OR {
 22057  			break
 22058  		}
 22059  		if o4.Type != t {
 22060  			break
 22061  		}
 22062  		_ = o4.Args[1]
 22063  		s5 := o4.Args[0]
 22064  		if s5.Op != OpPPC64SLDconst {
 22065  			break
 22066  		}
 22067  		if s5.AuxInt != 16 {
 22068  			break
 22069  		}
 22070  		x5 := s5.Args[0]
 22071  		if x5.Op != OpPPC64MOVBZload {
 22072  			break
 22073  		}
 22074  		i5 := x5.AuxInt
 22075  		if x5.Aux != s {
 22076  			break
 22077  		}
 22078  		_ = x5.Args[1]
 22079  		if p != x5.Args[0] {
 22080  			break
 22081  		}
 22082  		if mem != x5.Args[1] {
 22083  			break
 22084  		}
 22085  		o3 := o4.Args[1]
 22086  		if o3.Op != OpPPC64OR {
 22087  			break
 22088  		}
 22089  		if o3.Type != t {
 22090  			break
 22091  		}
 22092  		_ = o3.Args[1]
 22093  		s0 := o3.Args[0]
 22094  		if s0.Op != OpPPC64SLWconst {
 22095  			break
 22096  		}
 22097  		if s0.AuxInt != 32 {
 22098  			break
 22099  		}
 22100  		x3 := s0.Args[0]
 22101  		if x3.Op != OpPPC64MOVWBRload {
 22102  			break
 22103  		}
 22104  		if x3.Type != t {
 22105  			break
 22106  		}
 22107  		_ = x3.Args[1]
 22108  		x3_0 := x3.Args[0]
 22109  		if x3_0.Op != OpPPC64MOVDaddr {
 22110  			break
 22111  		}
 22112  		if x3_0.Type != typ.Uintptr {
 22113  			break
 22114  		}
 22115  		i0 := x3_0.AuxInt
 22116  		if x3_0.Aux != s {
 22117  			break
 22118  		}
 22119  		if p != x3_0.Args[0] {
 22120  			break
 22121  		}
 22122  		if mem != x3.Args[1] {
 22123  			break
 22124  		}
 22125  		s4 := o3.Args[1]
 22126  		if s4.Op != OpPPC64SLDconst {
 22127  			break
 22128  		}
 22129  		if s4.AuxInt != 24 {
 22130  			break
 22131  		}
 22132  		x4 := s4.Args[0]
 22133  		if x4.Op != OpPPC64MOVBZload {
 22134  			break
 22135  		}
 22136  		i4 := x4.AuxInt
 22137  		if x4.Aux != s {
 22138  			break
 22139  		}
 22140  		_ = x4.Args[1]
 22141  		if p != x4.Args[0] {
 22142  			break
 22143  		}
 22144  		if mem != x4.Args[1] {
 22145  			break
 22146  		}
 22147  		s6 := o5.Args[1]
 22148  		if s6.Op != OpPPC64SLDconst {
 22149  			break
 22150  		}
 22151  		if s6.AuxInt != 8 {
 22152  			break
 22153  		}
 22154  		x6 := s6.Args[0]
 22155  		if x6.Op != OpPPC64MOVBZload {
 22156  			break
 22157  		}
 22158  		i6 := x6.AuxInt
 22159  		if x6.Aux != s {
 22160  			break
 22161  		}
 22162  		_ = x6.Args[1]
 22163  		if p != x6.Args[0] {
 22164  			break
 22165  		}
 22166  		if mem != x6.Args[1] {
 22167  			break
 22168  		}
 22169  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22170  			break
 22171  		}
 22172  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22173  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 22174  		v.reset(OpCopy)
 22175  		v.AddArg(v0)
 22176  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22177  		v1.AuxInt = i0
 22178  		v1.Aux = s
 22179  		v1.AddArg(p)
 22180  		v0.AddArg(v1)
 22181  		v0.AddArg(mem)
 22182  		return true
 22183  	}
 22184  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22185  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22186  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22187  	for {
 22188  		t := v.Type
 22189  		_ = v.Args[1]
 22190  		x7 := v.Args[0]
 22191  		if x7.Op != OpPPC64MOVBZload {
 22192  			break
 22193  		}
 22194  		i7 := x7.AuxInt
 22195  		s := x7.Aux
 22196  		_ = x7.Args[1]
 22197  		p := x7.Args[0]
 22198  		mem := x7.Args[1]
 22199  		o5 := v.Args[1]
 22200  		if o5.Op != OpPPC64OR {
 22201  			break
 22202  		}
 22203  		if o5.Type != t {
 22204  			break
 22205  		}
 22206  		_ = o5.Args[1]
 22207  		o4 := o5.Args[0]
 22208  		if o4.Op != OpPPC64OR {
 22209  			break
 22210  		}
 22211  		if o4.Type != t {
 22212  			break
 22213  		}
 22214  		_ = o4.Args[1]
 22215  		o3 := o4.Args[0]
 22216  		if o3.Op != OpPPC64OR {
 22217  			break
 22218  		}
 22219  		if o3.Type != t {
 22220  			break
 22221  		}
 22222  		_ = o3.Args[1]
 22223  		s4 := o3.Args[0]
 22224  		if s4.Op != OpPPC64SLDconst {
 22225  			break
 22226  		}
 22227  		if s4.AuxInt != 24 {
 22228  			break
 22229  		}
 22230  		x4 := s4.Args[0]
 22231  		if x4.Op != OpPPC64MOVBZload {
 22232  			break
 22233  		}
 22234  		i4 := x4.AuxInt
 22235  		if x4.Aux != s {
 22236  			break
 22237  		}
 22238  		_ = x4.Args[1]
 22239  		if p != x4.Args[0] {
 22240  			break
 22241  		}
 22242  		if mem != x4.Args[1] {
 22243  			break
 22244  		}
 22245  		s0 := o3.Args[1]
 22246  		if s0.Op != OpPPC64SLWconst {
 22247  			break
 22248  		}
 22249  		if s0.AuxInt != 32 {
 22250  			break
 22251  		}
 22252  		x3 := s0.Args[0]
 22253  		if x3.Op != OpPPC64MOVWBRload {
 22254  			break
 22255  		}
 22256  		if x3.Type != t {
 22257  			break
 22258  		}
 22259  		_ = x3.Args[1]
 22260  		x3_0 := x3.Args[0]
 22261  		if x3_0.Op != OpPPC64MOVDaddr {
 22262  			break
 22263  		}
 22264  		if x3_0.Type != typ.Uintptr {
 22265  			break
 22266  		}
 22267  		i0 := x3_0.AuxInt
 22268  		if x3_0.Aux != s {
 22269  			break
 22270  		}
 22271  		if p != x3_0.Args[0] {
 22272  			break
 22273  		}
 22274  		if mem != x3.Args[1] {
 22275  			break
 22276  		}
 22277  		s5 := o4.Args[1]
 22278  		if s5.Op != OpPPC64SLDconst {
 22279  			break
 22280  		}
 22281  		if s5.AuxInt != 16 {
 22282  			break
 22283  		}
 22284  		x5 := s5.Args[0]
 22285  		if x5.Op != OpPPC64MOVBZload {
 22286  			break
 22287  		}
 22288  		i5 := x5.AuxInt
 22289  		if x5.Aux != s {
 22290  			break
 22291  		}
 22292  		_ = x5.Args[1]
 22293  		if p != x5.Args[0] {
 22294  			break
 22295  		}
 22296  		if mem != x5.Args[1] {
 22297  			break
 22298  		}
 22299  		s6 := o5.Args[1]
 22300  		if s6.Op != OpPPC64SLDconst {
 22301  			break
 22302  		}
 22303  		if s6.AuxInt != 8 {
 22304  			break
 22305  		}
 22306  		x6 := s6.Args[0]
 22307  		if x6.Op != OpPPC64MOVBZload {
 22308  			break
 22309  		}
 22310  		i6 := x6.AuxInt
 22311  		if x6.Aux != s {
 22312  			break
 22313  		}
 22314  		_ = x6.Args[1]
 22315  		if p != x6.Args[0] {
 22316  			break
 22317  		}
 22318  		if mem != x6.Args[1] {
 22319  			break
 22320  		}
 22321  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22322  			break
 22323  		}
 22324  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22325  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 22326  		v.reset(OpCopy)
 22327  		v.AddArg(v0)
 22328  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22329  		v1.AuxInt = i0
 22330  		v1.Aux = s
 22331  		v1.AddArg(p)
 22332  		v0.AddArg(v1)
 22333  		v0.AddArg(mem)
 22334  		return true
 22335  	}
 22336  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 22337  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22338  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22339  	for {
 22340  		t := v.Type
 22341  		_ = v.Args[1]
 22342  		x7 := v.Args[0]
 22343  		if x7.Op != OpPPC64MOVBZload {
 22344  			break
 22345  		}
 22346  		i7 := x7.AuxInt
 22347  		s := x7.Aux
 22348  		_ = x7.Args[1]
 22349  		p := x7.Args[0]
 22350  		mem := x7.Args[1]
 22351  		o5 := v.Args[1]
 22352  		if o5.Op != OpPPC64OR {
 22353  			break
 22354  		}
 22355  		if o5.Type != t {
 22356  			break
 22357  		}
 22358  		_ = o5.Args[1]
 22359  		o4 := o5.Args[0]
 22360  		if o4.Op != OpPPC64OR {
 22361  			break
 22362  		}
 22363  		if o4.Type != t {
 22364  			break
 22365  		}
 22366  		_ = o4.Args[1]
 22367  		o3 := o4.Args[0]
 22368  		if o3.Op != OpPPC64OR {
 22369  			break
 22370  		}
 22371  		if o3.Type != t {
 22372  			break
 22373  		}
 22374  		_ = o3.Args[1]
 22375  		s0 := o3.Args[0]
 22376  		if s0.Op != OpPPC64SLWconst {
 22377  			break
 22378  		}
 22379  		if s0.AuxInt != 32 {
 22380  			break
 22381  		}
 22382  		x3 := s0.Args[0]
 22383  		if x3.Op != OpPPC64MOVWBRload {
 22384  			break
 22385  		}
 22386  		if x3.Type != t {
 22387  			break
 22388  		}
 22389  		_ = x3.Args[1]
 22390  		x3_0 := x3.Args[0]
 22391  		if x3_0.Op != OpPPC64MOVDaddr {
 22392  			break
 22393  		}
 22394  		if x3_0.Type != typ.Uintptr {
 22395  			break
 22396  		}
 22397  		i0 := x3_0.AuxInt
 22398  		if x3_0.Aux != s {
 22399  			break
 22400  		}
 22401  		if p != x3_0.Args[0] {
 22402  			break
 22403  		}
 22404  		if mem != x3.Args[1] {
 22405  			break
 22406  		}
 22407  		s4 := o3.Args[1]
 22408  		if s4.Op != OpPPC64SLDconst {
 22409  			break
 22410  		}
 22411  		if s4.AuxInt != 24 {
 22412  			break
 22413  		}
 22414  		x4 := s4.Args[0]
 22415  		if x4.Op != OpPPC64MOVBZload {
 22416  			break
 22417  		}
 22418  		i4 := x4.AuxInt
 22419  		if x4.Aux != s {
 22420  			break
 22421  		}
 22422  		_ = x4.Args[1]
 22423  		if p != x4.Args[0] {
 22424  			break
 22425  		}
 22426  		if mem != x4.Args[1] {
 22427  			break
 22428  		}
 22429  		s5 := o4.Args[1]
 22430  		if s5.Op != OpPPC64SLDconst {
 22431  			break
 22432  		}
 22433  		if s5.AuxInt != 16 {
 22434  			break
 22435  		}
 22436  		x5 := s5.Args[0]
 22437  		if x5.Op != OpPPC64MOVBZload {
 22438  			break
 22439  		}
 22440  		i5 := x5.AuxInt
 22441  		if x5.Aux != s {
 22442  			break
 22443  		}
 22444  		_ = x5.Args[1]
 22445  		if p != x5.Args[0] {
 22446  			break
 22447  		}
 22448  		if mem != x5.Args[1] {
 22449  			break
 22450  		}
 22451  		s6 := o5.Args[1]
 22452  		if s6.Op != OpPPC64SLDconst {
 22453  			break
 22454  		}
 22455  		if s6.AuxInt != 8 {
 22456  			break
 22457  		}
 22458  		x6 := s6.Args[0]
 22459  		if x6.Op != OpPPC64MOVBZload {
 22460  			break
 22461  		}
 22462  		i6 := x6.AuxInt
 22463  		if x6.Aux != s {
 22464  			break
 22465  		}
 22466  		_ = x6.Args[1]
 22467  		if p != x6.Args[0] {
 22468  			break
 22469  		}
 22470  		if mem != x6.Args[1] {
 22471  			break
 22472  		}
 22473  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22474  			break
 22475  		}
 22476  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22477  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 22478  		v.reset(OpCopy)
 22479  		v.AddArg(v0)
 22480  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22481  		v1.AuxInt = i0
 22482  		v1.Aux = s
 22483  		v1.AddArg(p)
 22484  		v0.AddArg(v1)
 22485  		v0.AddArg(mem)
 22486  		return true
 22487  	}
 22488  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 22489  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22490  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22491  	for {
 22492  		t := v.Type
 22493  		_ = v.Args[1]
 22494  		o5 := v.Args[0]
 22495  		if o5.Op != OpPPC64OR {
 22496  			break
 22497  		}
 22498  		if o5.Type != t {
 22499  			break
 22500  		}
 22501  		_ = o5.Args[1]
 22502  		s6 := o5.Args[0]
 22503  		if s6.Op != OpPPC64SLDconst {
 22504  			break
 22505  		}
 22506  		if s6.AuxInt != 8 {
 22507  			break
 22508  		}
 22509  		x6 := s6.Args[0]
 22510  		if x6.Op != OpPPC64MOVBZload {
 22511  			break
 22512  		}
 22513  		i6 := x6.AuxInt
 22514  		s := x6.Aux
 22515  		_ = x6.Args[1]
 22516  		p := x6.Args[0]
 22517  		mem := x6.Args[1]
 22518  		o4 := o5.Args[1]
 22519  		if o4.Op != OpPPC64OR {
 22520  			break
 22521  		}
 22522  		if o4.Type != t {
 22523  			break
 22524  		}
 22525  		_ = o4.Args[1]
 22526  		s5 := o4.Args[0]
 22527  		if s5.Op != OpPPC64SLDconst {
 22528  			break
 22529  		}
 22530  		if s5.AuxInt != 16 {
 22531  			break
 22532  		}
 22533  		x5 := s5.Args[0]
 22534  		if x5.Op != OpPPC64MOVBZload {
 22535  			break
 22536  		}
 22537  		i5 := x5.AuxInt
 22538  		if x5.Aux != s {
 22539  			break
 22540  		}
 22541  		_ = x5.Args[1]
 22542  		if p != x5.Args[0] {
 22543  			break
 22544  		}
 22545  		if mem != x5.Args[1] {
 22546  			break
 22547  		}
 22548  		o3 := o4.Args[1]
 22549  		if o3.Op != OpPPC64OR {
 22550  			break
 22551  		}
 22552  		if o3.Type != t {
 22553  			break
 22554  		}
 22555  		_ = o3.Args[1]
 22556  		s4 := o3.Args[0]
 22557  		if s4.Op != OpPPC64SLDconst {
 22558  			break
 22559  		}
 22560  		if s4.AuxInt != 24 {
 22561  			break
 22562  		}
 22563  		x4 := s4.Args[0]
 22564  		if x4.Op != OpPPC64MOVBZload {
 22565  			break
 22566  		}
 22567  		i4 := x4.AuxInt
 22568  		if x4.Aux != s {
 22569  			break
 22570  		}
 22571  		_ = x4.Args[1]
 22572  		if p != x4.Args[0] {
 22573  			break
 22574  		}
 22575  		if mem != x4.Args[1] {
 22576  			break
 22577  		}
 22578  		s0 := o3.Args[1]
 22579  		if s0.Op != OpPPC64SLWconst {
 22580  			break
 22581  		}
 22582  		if s0.AuxInt != 32 {
 22583  			break
 22584  		}
 22585  		x3 := s0.Args[0]
 22586  		if x3.Op != OpPPC64MOVWBRload {
 22587  			break
 22588  		}
 22589  		if x3.Type != t {
 22590  			break
 22591  		}
 22592  		_ = x3.Args[1]
 22593  		x3_0 := x3.Args[0]
 22594  		if x3_0.Op != OpPPC64MOVDaddr {
 22595  			break
 22596  		}
 22597  		if x3_0.Type != typ.Uintptr {
 22598  			break
 22599  		}
 22600  		i0 := x3_0.AuxInt
 22601  		if x3_0.Aux != s {
 22602  			break
 22603  		}
 22604  		if p != x3_0.Args[0] {
 22605  			break
 22606  		}
 22607  		if mem != x3.Args[1] {
 22608  			break
 22609  		}
 22610  		x7 := v.Args[1]
 22611  		if x7.Op != OpPPC64MOVBZload {
 22612  			break
 22613  		}
 22614  		i7 := x7.AuxInt
 22615  		if x7.Aux != s {
 22616  			break
 22617  		}
 22618  		_ = x7.Args[1]
 22619  		if p != x7.Args[0] {
 22620  			break
 22621  		}
 22622  		if mem != x7.Args[1] {
 22623  			break
 22624  		}
 22625  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22626  			break
 22627  		}
 22628  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22629  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22630  		v.reset(OpCopy)
 22631  		v.AddArg(v0)
 22632  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22633  		v1.AuxInt = i0
 22634  		v1.Aux = s
 22635  		v1.AddArg(p)
 22636  		v0.AddArg(v1)
 22637  		v0.AddArg(mem)
 22638  		return true
 22639  	}
 22640  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 22641  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22642  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22643  	for {
 22644  		t := v.Type
 22645  		_ = v.Args[1]
 22646  		o5 := v.Args[0]
 22647  		if o5.Op != OpPPC64OR {
 22648  			break
 22649  		}
 22650  		if o5.Type != t {
 22651  			break
 22652  		}
 22653  		_ = o5.Args[1]
 22654  		s6 := o5.Args[0]
 22655  		if s6.Op != OpPPC64SLDconst {
 22656  			break
 22657  		}
 22658  		if s6.AuxInt != 8 {
 22659  			break
 22660  		}
 22661  		x6 := s6.Args[0]
 22662  		if x6.Op != OpPPC64MOVBZload {
 22663  			break
 22664  		}
 22665  		i6 := x6.AuxInt
 22666  		s := x6.Aux
 22667  		_ = x6.Args[1]
 22668  		p := x6.Args[0]
 22669  		mem := x6.Args[1]
 22670  		o4 := o5.Args[1]
 22671  		if o4.Op != OpPPC64OR {
 22672  			break
 22673  		}
 22674  		if o4.Type != t {
 22675  			break
 22676  		}
 22677  		_ = o4.Args[1]
 22678  		s5 := o4.Args[0]
 22679  		if s5.Op != OpPPC64SLDconst {
 22680  			break
 22681  		}
 22682  		if s5.AuxInt != 16 {
 22683  			break
 22684  		}
 22685  		x5 := s5.Args[0]
 22686  		if x5.Op != OpPPC64MOVBZload {
 22687  			break
 22688  		}
 22689  		i5 := x5.AuxInt
 22690  		if x5.Aux != s {
 22691  			break
 22692  		}
 22693  		_ = x5.Args[1]
 22694  		if p != x5.Args[0] {
 22695  			break
 22696  		}
 22697  		if mem != x5.Args[1] {
 22698  			break
 22699  		}
 22700  		o3 := o4.Args[1]
 22701  		if o3.Op != OpPPC64OR {
 22702  			break
 22703  		}
 22704  		if o3.Type != t {
 22705  			break
 22706  		}
 22707  		_ = o3.Args[1]
 22708  		s0 := o3.Args[0]
 22709  		if s0.Op != OpPPC64SLWconst {
 22710  			break
 22711  		}
 22712  		if s0.AuxInt != 32 {
 22713  			break
 22714  		}
 22715  		x3 := s0.Args[0]
 22716  		if x3.Op != OpPPC64MOVWBRload {
 22717  			break
 22718  		}
 22719  		if x3.Type != t {
 22720  			break
 22721  		}
 22722  		_ = x3.Args[1]
 22723  		x3_0 := x3.Args[0]
 22724  		if x3_0.Op != OpPPC64MOVDaddr {
 22725  			break
 22726  		}
 22727  		if x3_0.Type != typ.Uintptr {
 22728  			break
 22729  		}
 22730  		i0 := x3_0.AuxInt
 22731  		if x3_0.Aux != s {
 22732  			break
 22733  		}
 22734  		if p != x3_0.Args[0] {
 22735  			break
 22736  		}
 22737  		if mem != x3.Args[1] {
 22738  			break
 22739  		}
 22740  		s4 := o3.Args[1]
 22741  		if s4.Op != OpPPC64SLDconst {
 22742  			break
 22743  		}
 22744  		if s4.AuxInt != 24 {
 22745  			break
 22746  		}
 22747  		x4 := s4.Args[0]
 22748  		if x4.Op != OpPPC64MOVBZload {
 22749  			break
 22750  		}
 22751  		i4 := x4.AuxInt
 22752  		if x4.Aux != s {
 22753  			break
 22754  		}
 22755  		_ = x4.Args[1]
 22756  		if p != x4.Args[0] {
 22757  			break
 22758  		}
 22759  		if mem != x4.Args[1] {
 22760  			break
 22761  		}
 22762  		x7 := v.Args[1]
 22763  		if x7.Op != OpPPC64MOVBZload {
 22764  			break
 22765  		}
 22766  		i7 := x7.AuxInt
 22767  		if x7.Aux != s {
 22768  			break
 22769  		}
 22770  		_ = x7.Args[1]
 22771  		if p != x7.Args[0] {
 22772  			break
 22773  		}
 22774  		if mem != x7.Args[1] {
 22775  			break
 22776  		}
 22777  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22778  			break
 22779  		}
 22780  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22781  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22782  		v.reset(OpCopy)
 22783  		v.AddArg(v0)
 22784  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22785  		v1.AuxInt = i0
 22786  		v1.Aux = s
 22787  		v1.AddArg(p)
 22788  		v0.AddArg(v1)
 22789  		v0.AddArg(mem)
 22790  		return true
 22791  	}
 22792  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22793  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22794  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22795  	for {
 22796  		t := v.Type
 22797  		_ = v.Args[1]
 22798  		o5 := v.Args[0]
 22799  		if o5.Op != OpPPC64OR {
 22800  			break
 22801  		}
 22802  		if o5.Type != t {
 22803  			break
 22804  		}
 22805  		_ = o5.Args[1]
 22806  		s6 := o5.Args[0]
 22807  		if s6.Op != OpPPC64SLDconst {
 22808  			break
 22809  		}
 22810  		if s6.AuxInt != 8 {
 22811  			break
 22812  		}
 22813  		x6 := s6.Args[0]
 22814  		if x6.Op != OpPPC64MOVBZload {
 22815  			break
 22816  		}
 22817  		i6 := x6.AuxInt
 22818  		s := x6.Aux
 22819  		_ = x6.Args[1]
 22820  		p := x6.Args[0]
 22821  		mem := x6.Args[1]
 22822  		o4 := o5.Args[1]
 22823  		if o4.Op != OpPPC64OR {
 22824  			break
 22825  		}
 22826  		if o4.Type != t {
 22827  			break
 22828  		}
 22829  		_ = o4.Args[1]
 22830  		o3 := o4.Args[0]
 22831  		if o3.Op != OpPPC64OR {
 22832  			break
 22833  		}
 22834  		if o3.Type != t {
 22835  			break
 22836  		}
 22837  		_ = o3.Args[1]
 22838  		s4 := o3.Args[0]
 22839  		if s4.Op != OpPPC64SLDconst {
 22840  			break
 22841  		}
 22842  		if s4.AuxInt != 24 {
 22843  			break
 22844  		}
 22845  		x4 := s4.Args[0]
 22846  		if x4.Op != OpPPC64MOVBZload {
 22847  			break
 22848  		}
 22849  		i4 := x4.AuxInt
 22850  		if x4.Aux != s {
 22851  			break
 22852  		}
 22853  		_ = x4.Args[1]
 22854  		if p != x4.Args[0] {
 22855  			break
 22856  		}
 22857  		if mem != x4.Args[1] {
 22858  			break
 22859  		}
 22860  		s0 := o3.Args[1]
 22861  		if s0.Op != OpPPC64SLWconst {
 22862  			break
 22863  		}
 22864  		if s0.AuxInt != 32 {
 22865  			break
 22866  		}
 22867  		x3 := s0.Args[0]
 22868  		if x3.Op != OpPPC64MOVWBRload {
 22869  			break
 22870  		}
 22871  		if x3.Type != t {
 22872  			break
 22873  		}
 22874  		_ = x3.Args[1]
 22875  		x3_0 := x3.Args[0]
 22876  		if x3_0.Op != OpPPC64MOVDaddr {
 22877  			break
 22878  		}
 22879  		if x3_0.Type != typ.Uintptr {
 22880  			break
 22881  		}
 22882  		i0 := x3_0.AuxInt
 22883  		if x3_0.Aux != s {
 22884  			break
 22885  		}
 22886  		if p != x3_0.Args[0] {
 22887  			break
 22888  		}
 22889  		if mem != x3.Args[1] {
 22890  			break
 22891  		}
 22892  		s5 := o4.Args[1]
 22893  		if s5.Op != OpPPC64SLDconst {
 22894  			break
 22895  		}
 22896  		if s5.AuxInt != 16 {
 22897  			break
 22898  		}
 22899  		x5 := s5.Args[0]
 22900  		if x5.Op != OpPPC64MOVBZload {
 22901  			break
 22902  		}
 22903  		i5 := x5.AuxInt
 22904  		if x5.Aux != s {
 22905  			break
 22906  		}
 22907  		_ = x5.Args[1]
 22908  		if p != x5.Args[0] {
 22909  			break
 22910  		}
 22911  		if mem != x5.Args[1] {
 22912  			break
 22913  		}
 22914  		x7 := v.Args[1]
 22915  		if x7.Op != OpPPC64MOVBZload {
 22916  			break
 22917  		}
 22918  		i7 := x7.AuxInt
 22919  		if x7.Aux != s {
 22920  			break
 22921  		}
 22922  		_ = x7.Args[1]
 22923  		if p != x7.Args[0] {
 22924  			break
 22925  		}
 22926  		if mem != x7.Args[1] {
 22927  			break
 22928  		}
 22929  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22930  			break
 22931  		}
 22932  		b = mergePoint(b, x3, x4, x5, x6, x7)
 22933  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22934  		v.reset(OpCopy)
 22935  		v.AddArg(v0)
 22936  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22937  		v1.AuxInt = i0
 22938  		v1.Aux = s
 22939  		v1.AddArg(p)
 22940  		v0.AddArg(v1)
 22941  		v0.AddArg(mem)
 22942  		return true
 22943  	}
 22944  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22945  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22946  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22947  	for {
 22948  		t := v.Type
 22949  		_ = v.Args[1]
 22950  		o5 := v.Args[0]
 22951  		if o5.Op != OpPPC64OR {
 22952  			break
 22953  		}
 22954  		if o5.Type != t {
 22955  			break
 22956  		}
 22957  		_ = o5.Args[1]
 22958  		s6 := o5.Args[0]
 22959  		if s6.Op != OpPPC64SLDconst {
 22960  			break
 22961  		}
 22962  		if s6.AuxInt != 8 {
 22963  			break
 22964  		}
 22965  		x6 := s6.Args[0]
 22966  		if x6.Op != OpPPC64MOVBZload {
 22967  			break
 22968  		}
 22969  		i6 := x6.AuxInt
 22970  		s := x6.Aux
 22971  		_ = x6.Args[1]
 22972  		p := x6.Args[0]
 22973  		mem := x6.Args[1]
 22974  		o4 := o5.Args[1]
 22975  		if o4.Op != OpPPC64OR {
 22976  			break
 22977  		}
 22978  		if o4.Type != t {
 22979  			break
 22980  		}
 22981  		_ = o4.Args[1]
 22982  		o3 := o4.Args[0]
 22983  		if o3.Op != OpPPC64OR {
 22984  			break
 22985  		}
 22986  		if o3.Type != t {
 22987  			break
 22988  		}
 22989  		_ = o3.Args[1]
 22990  		s0 := o3.Args[0]
 22991  		if s0.Op != OpPPC64SLWconst {
 22992  			break
 22993  		}
 22994  		if s0.AuxInt != 32 {
 22995  			break
 22996  		}
 22997  		x3 := s0.Args[0]
 22998  		if x3.Op != OpPPC64MOVWBRload {
 22999  			break
 23000  		}
 23001  		if x3.Type != t {
 23002  			break
 23003  		}
 23004  		_ = x3.Args[1]
 23005  		x3_0 := x3.Args[0]
 23006  		if x3_0.Op != OpPPC64MOVDaddr {
 23007  			break
 23008  		}
 23009  		if x3_0.Type != typ.Uintptr {
 23010  			break
 23011  		}
 23012  		i0 := x3_0.AuxInt
 23013  		if x3_0.Aux != s {
 23014  			break
 23015  		}
 23016  		if p != x3_0.Args[0] {
 23017  			break
 23018  		}
 23019  		if mem != x3.Args[1] {
 23020  			break
 23021  		}
 23022  		s4 := o3.Args[1]
 23023  		if s4.Op != OpPPC64SLDconst {
 23024  			break
 23025  		}
 23026  		if s4.AuxInt != 24 {
 23027  			break
 23028  		}
 23029  		x4 := s4.Args[0]
 23030  		if x4.Op != OpPPC64MOVBZload {
 23031  			break
 23032  		}
 23033  		i4 := x4.AuxInt
 23034  		if x4.Aux != s {
 23035  			break
 23036  		}
 23037  		_ = x4.Args[1]
 23038  		if p != x4.Args[0] {
 23039  			break
 23040  		}
 23041  		if mem != x4.Args[1] {
 23042  			break
 23043  		}
 23044  		s5 := o4.Args[1]
 23045  		if s5.Op != OpPPC64SLDconst {
 23046  			break
 23047  		}
 23048  		if s5.AuxInt != 16 {
 23049  			break
 23050  		}
 23051  		x5 := s5.Args[0]
 23052  		if x5.Op != OpPPC64MOVBZload {
 23053  			break
 23054  		}
 23055  		i5 := x5.AuxInt
 23056  		if x5.Aux != s {
 23057  			break
 23058  		}
 23059  		_ = x5.Args[1]
 23060  		if p != x5.Args[0] {
 23061  			break
 23062  		}
 23063  		if mem != x5.Args[1] {
 23064  			break
 23065  		}
 23066  		x7 := v.Args[1]
 23067  		if x7.Op != OpPPC64MOVBZload {
 23068  			break
 23069  		}
 23070  		i7 := x7.AuxInt
 23071  		if x7.Aux != s {
 23072  			break
 23073  		}
 23074  		_ = x7.Args[1]
 23075  		if p != x7.Args[0] {
 23076  			break
 23077  		}
 23078  		if mem != x7.Args[1] {
 23079  			break
 23080  		}
 23081  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23082  			break
 23083  		}
 23084  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23085  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23086  		v.reset(OpCopy)
 23087  		v.AddArg(v0)
 23088  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23089  		v1.AuxInt = i0
 23090  		v1.Aux = s
 23091  		v1.AddArg(p)
 23092  		v0.AddArg(v1)
 23093  		v0.AddArg(mem)
 23094  		return true
 23095  	}
 23096  	return false
 23097  }
 23098  func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
 23099  	b := v.Block
 23100  	_ = b
 23101  	config := b.Func.Config
 23102  	_ = config
 23103  	typ := &b.Func.Config.Types
 23104  	_ = typ
 23105  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23106  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23107  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23108  	for {
 23109  		t := v.Type
 23110  		_ = v.Args[1]
 23111  		o5 := v.Args[0]
 23112  		if o5.Op != OpPPC64OR {
 23113  			break
 23114  		}
 23115  		if o5.Type != t {
 23116  			break
 23117  		}
 23118  		_ = o5.Args[1]
 23119  		o4 := o5.Args[0]
 23120  		if o4.Op != OpPPC64OR {
 23121  			break
 23122  		}
 23123  		if o4.Type != t {
 23124  			break
 23125  		}
 23126  		_ = o4.Args[1]
 23127  		s5 := o4.Args[0]
 23128  		if s5.Op != OpPPC64SLDconst {
 23129  			break
 23130  		}
 23131  		if s5.AuxInt != 16 {
 23132  			break
 23133  		}
 23134  		x5 := s5.Args[0]
 23135  		if x5.Op != OpPPC64MOVBZload {
 23136  			break
 23137  		}
 23138  		i5 := x5.AuxInt
 23139  		s := x5.Aux
 23140  		_ = x5.Args[1]
 23141  		p := x5.Args[0]
 23142  		mem := x5.Args[1]
 23143  		o3 := o4.Args[1]
 23144  		if o3.Op != OpPPC64OR {
 23145  			break
 23146  		}
 23147  		if o3.Type != t {
 23148  			break
 23149  		}
 23150  		_ = o3.Args[1]
 23151  		s4 := o3.Args[0]
 23152  		if s4.Op != OpPPC64SLDconst {
 23153  			break
 23154  		}
 23155  		if s4.AuxInt != 24 {
 23156  			break
 23157  		}
 23158  		x4 := s4.Args[0]
 23159  		if x4.Op != OpPPC64MOVBZload {
 23160  			break
 23161  		}
 23162  		i4 := x4.AuxInt
 23163  		if x4.Aux != s {
 23164  			break
 23165  		}
 23166  		_ = x4.Args[1]
 23167  		if p != x4.Args[0] {
 23168  			break
 23169  		}
 23170  		if mem != x4.Args[1] {
 23171  			break
 23172  		}
 23173  		s0 := o3.Args[1]
 23174  		if s0.Op != OpPPC64SLWconst {
 23175  			break
 23176  		}
 23177  		if s0.AuxInt != 32 {
 23178  			break
 23179  		}
 23180  		x3 := s0.Args[0]
 23181  		if x3.Op != OpPPC64MOVWBRload {
 23182  			break
 23183  		}
 23184  		if x3.Type != t {
 23185  			break
 23186  		}
 23187  		_ = x3.Args[1]
 23188  		x3_0 := x3.Args[0]
 23189  		if x3_0.Op != OpPPC64MOVDaddr {
 23190  			break
 23191  		}
 23192  		if x3_0.Type != typ.Uintptr {
 23193  			break
 23194  		}
 23195  		i0 := x3_0.AuxInt
 23196  		if x3_0.Aux != s {
 23197  			break
 23198  		}
 23199  		if p != x3_0.Args[0] {
 23200  			break
 23201  		}
 23202  		if mem != x3.Args[1] {
 23203  			break
 23204  		}
 23205  		s6 := o5.Args[1]
 23206  		if s6.Op != OpPPC64SLDconst {
 23207  			break
 23208  		}
 23209  		if s6.AuxInt != 8 {
 23210  			break
 23211  		}
 23212  		x6 := s6.Args[0]
 23213  		if x6.Op != OpPPC64MOVBZload {
 23214  			break
 23215  		}
 23216  		i6 := x6.AuxInt
 23217  		if x6.Aux != s {
 23218  			break
 23219  		}
 23220  		_ = x6.Args[1]
 23221  		if p != x6.Args[0] {
 23222  			break
 23223  		}
 23224  		if mem != x6.Args[1] {
 23225  			break
 23226  		}
 23227  		x7 := v.Args[1]
 23228  		if x7.Op != OpPPC64MOVBZload {
 23229  			break
 23230  		}
 23231  		i7 := x7.AuxInt
 23232  		if x7.Aux != s {
 23233  			break
 23234  		}
 23235  		_ = x7.Args[1]
 23236  		if p != x7.Args[0] {
 23237  			break
 23238  		}
 23239  		if mem != x7.Args[1] {
 23240  			break
 23241  		}
 23242  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23243  			break
 23244  		}
 23245  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23246  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23247  		v.reset(OpCopy)
 23248  		v.AddArg(v0)
 23249  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23250  		v1.AuxInt = i0
 23251  		v1.Aux = s
 23252  		v1.AddArg(p)
 23253  		v0.AddArg(v1)
 23254  		v0.AddArg(mem)
 23255  		return true
 23256  	}
 23257  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23258  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23259  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23260  	for {
 23261  		t := v.Type
 23262  		_ = v.Args[1]
 23263  		o5 := v.Args[0]
 23264  		if o5.Op != OpPPC64OR {
 23265  			break
 23266  		}
 23267  		if o5.Type != t {
 23268  			break
 23269  		}
 23270  		_ = o5.Args[1]
 23271  		o4 := o5.Args[0]
 23272  		if o4.Op != OpPPC64OR {
 23273  			break
 23274  		}
 23275  		if o4.Type != t {
 23276  			break
 23277  		}
 23278  		_ = o4.Args[1]
 23279  		s5 := o4.Args[0]
 23280  		if s5.Op != OpPPC64SLDconst {
 23281  			break
 23282  		}
 23283  		if s5.AuxInt != 16 {
 23284  			break
 23285  		}
 23286  		x5 := s5.Args[0]
 23287  		if x5.Op != OpPPC64MOVBZload {
 23288  			break
 23289  		}
 23290  		i5 := x5.AuxInt
 23291  		s := x5.Aux
 23292  		_ = x5.Args[1]
 23293  		p := x5.Args[0]
 23294  		mem := x5.Args[1]
 23295  		o3 := o4.Args[1]
 23296  		if o3.Op != OpPPC64OR {
 23297  			break
 23298  		}
 23299  		if o3.Type != t {
 23300  			break
 23301  		}
 23302  		_ = o3.Args[1]
 23303  		s0 := o3.Args[0]
 23304  		if s0.Op != OpPPC64SLWconst {
 23305  			break
 23306  		}
 23307  		if s0.AuxInt != 32 {
 23308  			break
 23309  		}
 23310  		x3 := s0.Args[0]
 23311  		if x3.Op != OpPPC64MOVWBRload {
 23312  			break
 23313  		}
 23314  		if x3.Type != t {
 23315  			break
 23316  		}
 23317  		_ = x3.Args[1]
 23318  		x3_0 := x3.Args[0]
 23319  		if x3_0.Op != OpPPC64MOVDaddr {
 23320  			break
 23321  		}
 23322  		if x3_0.Type != typ.Uintptr {
 23323  			break
 23324  		}
 23325  		i0 := x3_0.AuxInt
 23326  		if x3_0.Aux != s {
 23327  			break
 23328  		}
 23329  		if p != x3_0.Args[0] {
 23330  			break
 23331  		}
 23332  		if mem != x3.Args[1] {
 23333  			break
 23334  		}
 23335  		s4 := o3.Args[1]
 23336  		if s4.Op != OpPPC64SLDconst {
 23337  			break
 23338  		}
 23339  		if s4.AuxInt != 24 {
 23340  			break
 23341  		}
 23342  		x4 := s4.Args[0]
 23343  		if x4.Op != OpPPC64MOVBZload {
 23344  			break
 23345  		}
 23346  		i4 := x4.AuxInt
 23347  		if x4.Aux != s {
 23348  			break
 23349  		}
 23350  		_ = x4.Args[1]
 23351  		if p != x4.Args[0] {
 23352  			break
 23353  		}
 23354  		if mem != x4.Args[1] {
 23355  			break
 23356  		}
 23357  		s6 := o5.Args[1]
 23358  		if s6.Op != OpPPC64SLDconst {
 23359  			break
 23360  		}
 23361  		if s6.AuxInt != 8 {
 23362  			break
 23363  		}
 23364  		x6 := s6.Args[0]
 23365  		if x6.Op != OpPPC64MOVBZload {
 23366  			break
 23367  		}
 23368  		i6 := x6.AuxInt
 23369  		if x6.Aux != s {
 23370  			break
 23371  		}
 23372  		_ = x6.Args[1]
 23373  		if p != x6.Args[0] {
 23374  			break
 23375  		}
 23376  		if mem != x6.Args[1] {
 23377  			break
 23378  		}
 23379  		x7 := v.Args[1]
 23380  		if x7.Op != OpPPC64MOVBZload {
 23381  			break
 23382  		}
 23383  		i7 := x7.AuxInt
 23384  		if x7.Aux != s {
 23385  			break
 23386  		}
 23387  		_ = x7.Args[1]
 23388  		if p != x7.Args[0] {
 23389  			break
 23390  		}
 23391  		if mem != x7.Args[1] {
 23392  			break
 23393  		}
 23394  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23395  			break
 23396  		}
 23397  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23398  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23399  		v.reset(OpCopy)
 23400  		v.AddArg(v0)
 23401  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23402  		v1.AuxInt = i0
 23403  		v1.Aux = s
 23404  		v1.AddArg(p)
 23405  		v0.AddArg(v1)
 23406  		v0.AddArg(mem)
 23407  		return true
 23408  	}
 23409  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23410  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23411  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23412  	for {
 23413  		t := v.Type
 23414  		_ = v.Args[1]
 23415  		o5 := v.Args[0]
 23416  		if o5.Op != OpPPC64OR {
 23417  			break
 23418  		}
 23419  		if o5.Type != t {
 23420  			break
 23421  		}
 23422  		_ = o5.Args[1]
 23423  		o4 := o5.Args[0]
 23424  		if o4.Op != OpPPC64OR {
 23425  			break
 23426  		}
 23427  		if o4.Type != t {
 23428  			break
 23429  		}
 23430  		_ = o4.Args[1]
 23431  		o3 := o4.Args[0]
 23432  		if o3.Op != OpPPC64OR {
 23433  			break
 23434  		}
 23435  		if o3.Type != t {
 23436  			break
 23437  		}
 23438  		_ = o3.Args[1]
 23439  		s4 := o3.Args[0]
 23440  		if s4.Op != OpPPC64SLDconst {
 23441  			break
 23442  		}
 23443  		if s4.AuxInt != 24 {
 23444  			break
 23445  		}
 23446  		x4 := s4.Args[0]
 23447  		if x4.Op != OpPPC64MOVBZload {
 23448  			break
 23449  		}
 23450  		i4 := x4.AuxInt
 23451  		s := x4.Aux
 23452  		_ = x4.Args[1]
 23453  		p := x4.Args[0]
 23454  		mem := x4.Args[1]
 23455  		s0 := o3.Args[1]
 23456  		if s0.Op != OpPPC64SLWconst {
 23457  			break
 23458  		}
 23459  		if s0.AuxInt != 32 {
 23460  			break
 23461  		}
 23462  		x3 := s0.Args[0]
 23463  		if x3.Op != OpPPC64MOVWBRload {
 23464  			break
 23465  		}
 23466  		if x3.Type != t {
 23467  			break
 23468  		}
 23469  		_ = x3.Args[1]
 23470  		x3_0 := x3.Args[0]
 23471  		if x3_0.Op != OpPPC64MOVDaddr {
 23472  			break
 23473  		}
 23474  		if x3_0.Type != typ.Uintptr {
 23475  			break
 23476  		}
 23477  		i0 := x3_0.AuxInt
 23478  		if x3_0.Aux != s {
 23479  			break
 23480  		}
 23481  		if p != x3_0.Args[0] {
 23482  			break
 23483  		}
 23484  		if mem != x3.Args[1] {
 23485  			break
 23486  		}
 23487  		s5 := o4.Args[1]
 23488  		if s5.Op != OpPPC64SLDconst {
 23489  			break
 23490  		}
 23491  		if s5.AuxInt != 16 {
 23492  			break
 23493  		}
 23494  		x5 := s5.Args[0]
 23495  		if x5.Op != OpPPC64MOVBZload {
 23496  			break
 23497  		}
 23498  		i5 := x5.AuxInt
 23499  		if x5.Aux != s {
 23500  			break
 23501  		}
 23502  		_ = x5.Args[1]
 23503  		if p != x5.Args[0] {
 23504  			break
 23505  		}
 23506  		if mem != x5.Args[1] {
 23507  			break
 23508  		}
 23509  		s6 := o5.Args[1]
 23510  		if s6.Op != OpPPC64SLDconst {
 23511  			break
 23512  		}
 23513  		if s6.AuxInt != 8 {
 23514  			break
 23515  		}
 23516  		x6 := s6.Args[0]
 23517  		if x6.Op != OpPPC64MOVBZload {
 23518  			break
 23519  		}
 23520  		i6 := x6.AuxInt
 23521  		if x6.Aux != s {
 23522  			break
 23523  		}
 23524  		_ = x6.Args[1]
 23525  		if p != x6.Args[0] {
 23526  			break
 23527  		}
 23528  		if mem != x6.Args[1] {
 23529  			break
 23530  		}
 23531  		x7 := v.Args[1]
 23532  		if x7.Op != OpPPC64MOVBZload {
 23533  			break
 23534  		}
 23535  		i7 := x7.AuxInt
 23536  		if x7.Aux != s {
 23537  			break
 23538  		}
 23539  		_ = x7.Args[1]
 23540  		if p != x7.Args[0] {
 23541  			break
 23542  		}
 23543  		if mem != x7.Args[1] {
 23544  			break
 23545  		}
 23546  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23547  			break
 23548  		}
 23549  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23550  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23551  		v.reset(OpCopy)
 23552  		v.AddArg(v0)
 23553  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23554  		v1.AuxInt = i0
 23555  		v1.Aux = s
 23556  		v1.AddArg(p)
 23557  		v0.AddArg(v1)
 23558  		v0.AddArg(mem)
 23559  		return true
 23560  	}
 23561  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 23562  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23563  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23564  	for {
 23565  		t := v.Type
 23566  		_ = v.Args[1]
 23567  		o5 := v.Args[0]
 23568  		if o5.Op != OpPPC64OR {
 23569  			break
 23570  		}
 23571  		if o5.Type != t {
 23572  			break
 23573  		}
 23574  		_ = o5.Args[1]
 23575  		o4 := o5.Args[0]
 23576  		if o4.Op != OpPPC64OR {
 23577  			break
 23578  		}
 23579  		if o4.Type != t {
 23580  			break
 23581  		}
 23582  		_ = o4.Args[1]
 23583  		o3 := o4.Args[0]
 23584  		if o3.Op != OpPPC64OR {
 23585  			break
 23586  		}
 23587  		if o3.Type != t {
 23588  			break
 23589  		}
 23590  		_ = o3.Args[1]
 23591  		s0 := o3.Args[0]
 23592  		if s0.Op != OpPPC64SLWconst {
 23593  			break
 23594  		}
 23595  		if s0.AuxInt != 32 {
 23596  			break
 23597  		}
 23598  		x3 := s0.Args[0]
 23599  		if x3.Op != OpPPC64MOVWBRload {
 23600  			break
 23601  		}
 23602  		if x3.Type != t {
 23603  			break
 23604  		}
 23605  		_ = x3.Args[1]
 23606  		x3_0 := x3.Args[0]
 23607  		if x3_0.Op != OpPPC64MOVDaddr {
 23608  			break
 23609  		}
 23610  		if x3_0.Type != typ.Uintptr {
 23611  			break
 23612  		}
 23613  		i0 := x3_0.AuxInt
 23614  		s := x3_0.Aux
 23615  		p := x3_0.Args[0]
 23616  		mem := x3.Args[1]
 23617  		s4 := o3.Args[1]
 23618  		if s4.Op != OpPPC64SLDconst {
 23619  			break
 23620  		}
 23621  		if s4.AuxInt != 24 {
 23622  			break
 23623  		}
 23624  		x4 := s4.Args[0]
 23625  		if x4.Op != OpPPC64MOVBZload {
 23626  			break
 23627  		}
 23628  		i4 := x4.AuxInt
 23629  		if x4.Aux != s {
 23630  			break
 23631  		}
 23632  		_ = x4.Args[1]
 23633  		if p != x4.Args[0] {
 23634  			break
 23635  		}
 23636  		if mem != x4.Args[1] {
 23637  			break
 23638  		}
 23639  		s5 := o4.Args[1]
 23640  		if s5.Op != OpPPC64SLDconst {
 23641  			break
 23642  		}
 23643  		if s5.AuxInt != 16 {
 23644  			break
 23645  		}
 23646  		x5 := s5.Args[0]
 23647  		if x5.Op != OpPPC64MOVBZload {
 23648  			break
 23649  		}
 23650  		i5 := x5.AuxInt
 23651  		if x5.Aux != s {
 23652  			break
 23653  		}
 23654  		_ = x5.Args[1]
 23655  		if p != x5.Args[0] {
 23656  			break
 23657  		}
 23658  		if mem != x5.Args[1] {
 23659  			break
 23660  		}
 23661  		s6 := o5.Args[1]
 23662  		if s6.Op != OpPPC64SLDconst {
 23663  			break
 23664  		}
 23665  		if s6.AuxInt != 8 {
 23666  			break
 23667  		}
 23668  		x6 := s6.Args[0]
 23669  		if x6.Op != OpPPC64MOVBZload {
 23670  			break
 23671  		}
 23672  		i6 := x6.AuxInt
 23673  		if x6.Aux != s {
 23674  			break
 23675  		}
 23676  		_ = x6.Args[1]
 23677  		if p != x6.Args[0] {
 23678  			break
 23679  		}
 23680  		if mem != x6.Args[1] {
 23681  			break
 23682  		}
 23683  		x7 := v.Args[1]
 23684  		if x7.Op != OpPPC64MOVBZload {
 23685  			break
 23686  		}
 23687  		i7 := x7.AuxInt
 23688  		if x7.Aux != s {
 23689  			break
 23690  		}
 23691  		_ = x7.Args[1]
 23692  		if p != x7.Args[0] {
 23693  			break
 23694  		}
 23695  		if mem != x7.Args[1] {
 23696  			break
 23697  		}
 23698  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23699  			break
 23700  		}
 23701  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23702  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23703  		v.reset(OpCopy)
 23704  		v.AddArg(v0)
 23705  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23706  		v1.AuxInt = i0
 23707  		v1.Aux = s
 23708  		v1.AddArg(p)
 23709  		v0.AddArg(v1)
 23710  		v0.AddArg(mem)
 23711  		return true
 23712  	}
 23713  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 23714  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23715  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23716  	for {
 23717  		t := v.Type
 23718  		_ = v.Args[1]
 23719  		x7 := v.Args[0]
 23720  		if x7.Op != OpPPC64MOVBZload {
 23721  			break
 23722  		}
 23723  		i7 := x7.AuxInt
 23724  		s := x7.Aux
 23725  		_ = x7.Args[1]
 23726  		p := x7.Args[0]
 23727  		mem := x7.Args[1]
 23728  		o5 := v.Args[1]
 23729  		if o5.Op != OpPPC64OR {
 23730  			break
 23731  		}
 23732  		if o5.Type != t {
 23733  			break
 23734  		}
 23735  		_ = o5.Args[1]
 23736  		s6 := o5.Args[0]
 23737  		if s6.Op != OpPPC64SLDconst {
 23738  			break
 23739  		}
 23740  		if s6.AuxInt != 8 {
 23741  			break
 23742  		}
 23743  		x6 := s6.Args[0]
 23744  		if x6.Op != OpPPC64MOVBZload {
 23745  			break
 23746  		}
 23747  		i6 := x6.AuxInt
 23748  		if x6.Aux != s {
 23749  			break
 23750  		}
 23751  		_ = x6.Args[1]
 23752  		if p != x6.Args[0] {
 23753  			break
 23754  		}
 23755  		if mem != x6.Args[1] {
 23756  			break
 23757  		}
 23758  		o4 := o5.Args[1]
 23759  		if o4.Op != OpPPC64OR {
 23760  			break
 23761  		}
 23762  		if o4.Type != t {
 23763  			break
 23764  		}
 23765  		_ = o4.Args[1]
 23766  		s5 := o4.Args[0]
 23767  		if s5.Op != OpPPC64SLDconst {
 23768  			break
 23769  		}
 23770  		if s5.AuxInt != 16 {
 23771  			break
 23772  		}
 23773  		x5 := s5.Args[0]
 23774  		if x5.Op != OpPPC64MOVBZload {
 23775  			break
 23776  		}
 23777  		i5 := x5.AuxInt
 23778  		if x5.Aux != s {
 23779  			break
 23780  		}
 23781  		_ = x5.Args[1]
 23782  		if p != x5.Args[0] {
 23783  			break
 23784  		}
 23785  		if mem != x5.Args[1] {
 23786  			break
 23787  		}
 23788  		o3 := o4.Args[1]
 23789  		if o3.Op != OpPPC64OR {
 23790  			break
 23791  		}
 23792  		if o3.Type != t {
 23793  			break
 23794  		}
 23795  		_ = o3.Args[1]
 23796  		s4 := o3.Args[0]
 23797  		if s4.Op != OpPPC64SLDconst {
 23798  			break
 23799  		}
 23800  		if s4.AuxInt != 24 {
 23801  			break
 23802  		}
 23803  		x4 := s4.Args[0]
 23804  		if x4.Op != OpPPC64MOVBZload {
 23805  			break
 23806  		}
 23807  		i4 := x4.AuxInt
 23808  		if x4.Aux != s {
 23809  			break
 23810  		}
 23811  		_ = x4.Args[1]
 23812  		if p != x4.Args[0] {
 23813  			break
 23814  		}
 23815  		if mem != x4.Args[1] {
 23816  			break
 23817  		}
 23818  		s0 := o3.Args[1]
 23819  		if s0.Op != OpPPC64SLDconst {
 23820  			break
 23821  		}
 23822  		if s0.AuxInt != 32 {
 23823  			break
 23824  		}
 23825  		x3 := s0.Args[0]
 23826  		if x3.Op != OpPPC64MOVWBRload {
 23827  			break
 23828  		}
 23829  		if x3.Type != t {
 23830  			break
 23831  		}
 23832  		_ = x3.Args[1]
 23833  		x3_0 := x3.Args[0]
 23834  		if x3_0.Op != OpPPC64MOVDaddr {
 23835  			break
 23836  		}
 23837  		if x3_0.Type != typ.Uintptr {
 23838  			break
 23839  		}
 23840  		i0 := x3_0.AuxInt
 23841  		if x3_0.Aux != s {
 23842  			break
 23843  		}
 23844  		if p != x3_0.Args[0] {
 23845  			break
 23846  		}
 23847  		if mem != x3.Args[1] {
 23848  			break
 23849  		}
 23850  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23851  			break
 23852  		}
 23853  		b = mergePoint(b, x3, x4, x5, x6, x7)
 23854  		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 23855  		v.reset(OpCopy)
 23856  		v.AddArg(v0)
 23857  		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23858  		v1.AuxInt = i0
 23859  		v1.Aux = s
 23860  		v1.AddArg(p)
 23861  		v0.AddArg(v1)
 23862  		v0.AddArg(mem)
 23863  		return true
 23864  	}
 23865  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 23866  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23867  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23868  	for {
 23869  		t := v.Type
 23870  		_ = v.Args[1]
 23871  		x7 := v.Args[0]
 23872  		if x7.Op != OpPPC64MOVBZload {
 23873  			break
 23874  		}
 23875  		i7 := x7.AuxInt
 23876  		s := x7.Aux
 23877  		_ = x7.Args[1]
 23878  		p := x7.Args[0]
 23879  		mem := x7.Args[1]
 23880  		o5 := v.Args[1]
 23881  		if o5.Op != OpPPC64OR {
 23882  			break
 23883  		}
 23884  		if o5.Type != t {
 23885  			break
 23886  		}
 23887  		_ = o5.Args[1]
 23888  		s6 := o5.Args[0]
 23889  		if s6.Op != OpPPC64SLDconst {
 23890  			break
 23891  		}
 23892  		if s6.AuxInt != 8 {
 23893  			break
 23894  		}
 23895  		x6 := s6.Args[0]
 23896  		if x6.Op != OpPPC64MOVBZload {
 23897  			break
 23898  		}
 23899  		i6 := x6.AuxInt
 23900  		if x6.Aux != s {
 23901  			break
 23902  		}
 23903  		_ = x6.Args[1]
 23904  		if p != x6.Args[0] {
 23905  			break
 23906  		}
 23907  		if mem != x6.Args[1] {
 23908  			break
 23909  		}
 23910  		o4 := o5.Args[1]
 23911  		if o4.Op != OpPPC64OR {
 23912  			break
 23913  		}
 23914  		if o4.Type != t {
 23915  			break
 23916  		}
 23917  		_ = o4.Args[1]
 23918  		s5 := o4.Args[0]
 23919  		if s5.Op != OpPPC64SLDconst {
 23920  			break
 23921  		}
 23922  		if s5.AuxInt != 16 {
 23923  			break
 23924  		}
 23925  		x5 := s5.Args[0]
 23926  		if x5.Op != OpPPC64MOVBZload {
 23927  			break
 23928  		}
 23929  		i5 := x5.AuxInt
 23930  		if x5.Aux != s {
 23931  			break
 23932  		}
 23933  		_ = x5.Args[1]
 23934  		if p != x5.Args[0] {
 23935  			break
 23936  		}
 23937  		if mem != x5.Args[1] {
 23938  			break
 23939  		}
 23940  		o3 := o4.Args[1]
 23941  		if o3.Op != OpPPC64OR {
 23942  			break
 23943  		}
 23944  		if o3.Type != t {
 23945  			break
 23946  		}
 23947  		_ = o3.Args[1]
 23948  		s0 := o3.Args[0]
 23949  		if s0.Op != OpPPC64SLDconst {
 23950  			break
 23951  		}
 23952  		if s0.AuxInt != 32 {
 23953  			break
 23954  		}
 23955  		x3 := s0.Args[0]
 23956  		if x3.Op != OpPPC64MOVWBRload {
 23957  			break
 23958  		}
 23959  		if x3.Type != t {
 23960  			break
 23961  		}
 23962  		_ = x3.Args[1]
 23963  		x3_0 := x3.Args[0]
 23964  		if x3_0.Op != OpPPC64MOVDaddr {
 23965  			break
 23966  		}
 23967  		if x3_0.Type != typ.Uintptr {
 23968  			break
 23969  		}
 23970  		i0 := x3_0.AuxInt
 23971  		if x3_0.Aux != s {
 23972  			break
 23973  		}
 23974  		if p != x3_0.Args[0] {
 23975  			break
 23976  		}
 23977  		if mem != x3.Args[1] {
 23978  			break
 23979  		}
 23980  		s4 := o3.Args[1]
 23981  		if s4.Op != OpPPC64SLDconst {
 23982  			break
 23983  		}
 23984  		if s4.AuxInt != 24 {
 23985  			break
 23986  		}
 23987  		x4 := s4.Args[0]
 23988  		if x4.Op != OpPPC64MOVBZload {
 23989  			break
 23990  		}
 23991  		i4 := x4.AuxInt
 23992  		if x4.Aux != s {
 23993  			break
 23994  		}
 23995  		_ = x4.Args[1]
 23996  		if p != x4.Args[0] {
 23997  			break
 23998  		}
 23999  		if mem != x4.Args[1] {
 24000  			break
 24001  		}
 24002  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24003  			break
 24004  		}
 24005  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24006  		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 24007  		v.reset(OpCopy)
 24008  		v.AddArg(v0)
 24009  		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24010  		v1.AuxInt = i0
 24011  		v1.Aux = s
 24012  		v1.AddArg(p)
 24013  		v0.AddArg(v1)
 24014  		v0.AddArg(mem)
 24015  		return true
 24016  	}
 24017  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 24018  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24019  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24020  	for {
 24021  		t := v.Type
 24022  		_ = v.Args[1]
 24023  		x7 := v.Args[0]
 24024  		if x7.Op != OpPPC64MOVBZload {
 24025  			break
 24026  		}
 24027  		i7 := x7.AuxInt
 24028  		s := x7.Aux
 24029  		_ = x7.Args[1]
 24030  		p := x7.Args[0]
 24031  		mem := x7.Args[1]
 24032  		o5 := v.Args[1]
 24033  		if o5.Op != OpPPC64OR {
 24034  			break
 24035  		}
 24036  		if o5.Type != t {
 24037  			break
 24038  		}
 24039  		_ = o5.Args[1]
 24040  		s6 := o5.Args[0]
 24041  		if s6.Op != OpPPC64SLDconst {
 24042  			break
 24043  		}
 24044  		if s6.AuxInt != 8 {
 24045  			break
 24046  		}
 24047  		x6 := s6.Args[0]
 24048  		if x6.Op != OpPPC64MOVBZload {
 24049  			break
 24050  		}
 24051  		i6 := x6.AuxInt
 24052  		if x6.Aux != s {
 24053  			break
 24054  		}
 24055  		_ = x6.Args[1]
 24056  		if p != x6.Args[0] {
 24057  			break
 24058  		}
 24059  		if mem != x6.Args[1] {
 24060  			break
 24061  		}
 24062  		o4 := o5.Args[1]
 24063  		if o4.Op != OpPPC64OR {
 24064  			break
 24065  		}
 24066  		if o4.Type != t {
 24067  			break
 24068  		}
 24069  		_ = o4.Args[1]
 24070  		o3 := o4.Args[0]
 24071  		if o3.Op != OpPPC64OR {
 24072  			break
 24073  		}
 24074  		if o3.Type != t {
 24075  			break
 24076  		}
 24077  		_ = o3.Args[1]
 24078  		s4 := o3.Args[0]
 24079  		if s4.Op != OpPPC64SLDconst {
 24080  			break
 24081  		}
 24082  		if s4.AuxInt != 24 {
 24083  			break
 24084  		}
 24085  		x4 := s4.Args[0]
 24086  		if x4.Op != OpPPC64MOVBZload {
 24087  			break
 24088  		}
 24089  		i4 := x4.AuxInt
 24090  		if x4.Aux != s {
 24091  			break
 24092  		}
 24093  		_ = x4.Args[1]
 24094  		if p != x4.Args[0] {
 24095  			break
 24096  		}
 24097  		if mem != x4.Args[1] {
 24098  			break
 24099  		}
 24100  		s0 := o3.Args[1]
 24101  		if s0.Op != OpPPC64SLDconst {
 24102  			break
 24103  		}
 24104  		if s0.AuxInt != 32 {
 24105  			break
 24106  		}
 24107  		x3 := s0.Args[0]
 24108  		if x3.Op != OpPPC64MOVWBRload {
 24109  			break
 24110  		}
 24111  		if x3.Type != t {
 24112  			break
 24113  		}
 24114  		_ = x3.Args[1]
 24115  		x3_0 := x3.Args[0]
 24116  		if x3_0.Op != OpPPC64MOVDaddr {
 24117  			break
 24118  		}
 24119  		if x3_0.Type != typ.Uintptr {
 24120  			break
 24121  		}
 24122  		i0 := x3_0.AuxInt
 24123  		if x3_0.Aux != s {
 24124  			break
 24125  		}
 24126  		if p != x3_0.Args[0] {
 24127  			break
 24128  		}
 24129  		if mem != x3.Args[1] {
 24130  			break
 24131  		}
 24132  		s5 := o4.Args[1]
 24133  		if s5.Op != OpPPC64SLDconst {
 24134  			break
 24135  		}
 24136  		if s5.AuxInt != 16 {
 24137  			break
 24138  		}
 24139  		x5 := s5.Args[0]
 24140  		if x5.Op != OpPPC64MOVBZload {
 24141  			break
 24142  		}
 24143  		i5 := x5.AuxInt
 24144  		if x5.Aux != s {
 24145  			break
 24146  		}
 24147  		_ = x5.Args[1]
 24148  		if p != x5.Args[0] {
 24149  			break
 24150  		}
 24151  		if mem != x5.Args[1] {
 24152  			break
 24153  		}
 24154  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24155  			break
 24156  		}
 24157  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24158  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 24159  		v.reset(OpCopy)
 24160  		v.AddArg(v0)
 24161  		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24162  		v1.AuxInt = i0
 24163  		v1.Aux = s
 24164  		v1.AddArg(p)
 24165  		v0.AddArg(v1)
 24166  		v0.AddArg(mem)
 24167  		return true
 24168  	}
 24169  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 24170  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24171  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24172  	for {
 24173  		t := v.Type
 24174  		_ = v.Args[1]
 24175  		x7 := v.Args[0]
 24176  		if x7.Op != OpPPC64MOVBZload {
 24177  			break
 24178  		}
 24179  		i7 := x7.AuxInt
 24180  		s := x7.Aux
 24181  		_ = x7.Args[1]
 24182  		p := x7.Args[0]
 24183  		mem := x7.Args[1]
 24184  		o5 := v.Args[1]
 24185  		if o5.Op != OpPPC64OR {
 24186  			break
 24187  		}
 24188  		if o5.Type != t {
 24189  			break
 24190  		}
 24191  		_ = o5.Args[1]
 24192  		s6 := o5.Args[0]
 24193  		if s6.Op != OpPPC64SLDconst {
 24194  			break
 24195  		}
 24196  		if s6.AuxInt != 8 {
 24197  			break
 24198  		}
 24199  		x6 := s6.Args[0]
 24200  		if x6.Op != OpPPC64MOVBZload {
 24201  			break
 24202  		}
 24203  		i6 := x6.AuxInt
 24204  		if x6.Aux != s {
 24205  			break
 24206  		}
 24207  		_ = x6.Args[1]
 24208  		if p != x6.Args[0] {
 24209  			break
 24210  		}
 24211  		if mem != x6.Args[1] {
 24212  			break
 24213  		}
 24214  		o4 := o5.Args[1]
 24215  		if o4.Op != OpPPC64OR {
 24216  			break
 24217  		}
 24218  		if o4.Type != t {
 24219  			break
 24220  		}
 24221  		_ = o4.Args[1]
 24222  		o3 := o4.Args[0]
 24223  		if o3.Op != OpPPC64OR {
 24224  			break
 24225  		}
 24226  		if o3.Type != t {
 24227  			break
 24228  		}
 24229  		_ = o3.Args[1]
 24230  		s0 := o3.Args[0]
 24231  		if s0.Op != OpPPC64SLDconst {
 24232  			break
 24233  		}
 24234  		if s0.AuxInt != 32 {
 24235  			break
 24236  		}
 24237  		x3 := s0.Args[0]
 24238  		if x3.Op != OpPPC64MOVWBRload {
 24239  			break
 24240  		}
 24241  		if x3.Type != t {
 24242  			break
 24243  		}
 24244  		_ = x3.Args[1]
 24245  		x3_0 := x3.Args[0]
 24246  		if x3_0.Op != OpPPC64MOVDaddr {
 24247  			break
 24248  		}
 24249  		if x3_0.Type != typ.Uintptr {
 24250  			break
 24251  		}
 24252  		i0 := x3_0.AuxInt
 24253  		if x3_0.Aux != s {
 24254  			break
 24255  		}
 24256  		if p != x3_0.Args[0] {
 24257  			break
 24258  		}
 24259  		if mem != x3.Args[1] {
 24260  			break
 24261  		}
 24262  		s4 := o3.Args[1]
 24263  		if s4.Op != OpPPC64SLDconst {
 24264  			break
 24265  		}
 24266  		if s4.AuxInt != 24 {
 24267  			break
 24268  		}
 24269  		x4 := s4.Args[0]
 24270  		if x4.Op != OpPPC64MOVBZload {
 24271  			break
 24272  		}
 24273  		i4 := x4.AuxInt
 24274  		if x4.Aux != s {
 24275  			break
 24276  		}
 24277  		_ = x4.Args[1]
 24278  		if p != x4.Args[0] {
 24279  			break
 24280  		}
 24281  		if mem != x4.Args[1] {
 24282  			break
 24283  		}
 24284  		s5 := o4.Args[1]
 24285  		if s5.Op != OpPPC64SLDconst {
 24286  			break
 24287  		}
 24288  		if s5.AuxInt != 16 {
 24289  			break
 24290  		}
 24291  		x5 := s5.Args[0]
 24292  		if x5.Op != OpPPC64MOVBZload {
 24293  			break
 24294  		}
 24295  		i5 := x5.AuxInt
 24296  		if x5.Aux != s {
 24297  			break
 24298  		}
 24299  		_ = x5.Args[1]
 24300  		if p != x5.Args[0] {
 24301  			break
 24302  		}
 24303  		if mem != x5.Args[1] {
 24304  			break
 24305  		}
 24306  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24307  			break
 24308  		}
 24309  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24310  		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 24311  		v.reset(OpCopy)
 24312  		v.AddArg(v0)
 24313  		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24314  		v1.AuxInt = i0
 24315  		v1.Aux = s
 24316  		v1.AddArg(p)
 24317  		v0.AddArg(v1)
 24318  		v0.AddArg(mem)
 24319  		return true
 24320  	}
 24321  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24322  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24323  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24324  	for {
 24325  		t := v.Type
 24326  		_ = v.Args[1]
 24327  		x7 := v.Args[0]
 24328  		if x7.Op != OpPPC64MOVBZload {
 24329  			break
 24330  		}
 24331  		i7 := x7.AuxInt
 24332  		s := x7.Aux
 24333  		_ = x7.Args[1]
 24334  		p := x7.Args[0]
 24335  		mem := x7.Args[1]
 24336  		o5 := v.Args[1]
 24337  		if o5.Op != OpPPC64OR {
 24338  			break
 24339  		}
 24340  		if o5.Type != t {
 24341  			break
 24342  		}
 24343  		_ = o5.Args[1]
 24344  		o4 := o5.Args[0]
 24345  		if o4.Op != OpPPC64OR {
 24346  			break
 24347  		}
 24348  		if o4.Type != t {
 24349  			break
 24350  		}
 24351  		_ = o4.Args[1]
 24352  		s5 := o4.Args[0]
 24353  		if s5.Op != OpPPC64SLDconst {
 24354  			break
 24355  		}
 24356  		if s5.AuxInt != 16 {
 24357  			break
 24358  		}
 24359  		x5 := s5.Args[0]
 24360  		if x5.Op != OpPPC64MOVBZload {
 24361  			break
 24362  		}
 24363  		i5 := x5.AuxInt
 24364  		if x5.Aux != s {
 24365  			break
 24366  		}
 24367  		_ = x5.Args[1]
 24368  		if p != x5.Args[0] {
 24369  			break
 24370  		}
 24371  		if mem != x5.Args[1] {
 24372  			break
 24373  		}
 24374  		o3 := o4.Args[1]
 24375  		if o3.Op != OpPPC64OR {
 24376  			break
 24377  		}
 24378  		if o3.Type != t {
 24379  			break
 24380  		}
 24381  		_ = o3.Args[1]
 24382  		s4 := o3.Args[0]
 24383  		if s4.Op != OpPPC64SLDconst {
 24384  			break
 24385  		}
 24386  		if s4.AuxInt != 24 {
 24387  			break
 24388  		}
 24389  		x4 := s4.Args[0]
 24390  		if x4.Op != OpPPC64MOVBZload {
 24391  			break
 24392  		}
 24393  		i4 := x4.AuxInt
 24394  		if x4.Aux != s {
 24395  			break
 24396  		}
 24397  		_ = x4.Args[1]
 24398  		if p != x4.Args[0] {
 24399  			break
 24400  		}
 24401  		if mem != x4.Args[1] {
 24402  			break
 24403  		}
 24404  		s0 := o3.Args[1]
 24405  		if s0.Op != OpPPC64SLDconst {
 24406  			break
 24407  		}
 24408  		if s0.AuxInt != 32 {
 24409  			break
 24410  		}
 24411  		x3 := s0.Args[0]
 24412  		if x3.Op != OpPPC64MOVWBRload {
 24413  			break
 24414  		}
 24415  		if x3.Type != t {
 24416  			break
 24417  		}
 24418  		_ = x3.Args[1]
 24419  		x3_0 := x3.Args[0]
 24420  		if x3_0.Op != OpPPC64MOVDaddr {
 24421  			break
 24422  		}
 24423  		if x3_0.Type != typ.Uintptr {
 24424  			break
 24425  		}
 24426  		i0 := x3_0.AuxInt
 24427  		if x3_0.Aux != s {
 24428  			break
 24429  		}
 24430  		if p != x3_0.Args[0] {
 24431  			break
 24432  		}
 24433  		if mem != x3.Args[1] {
 24434  			break
 24435  		}
 24436  		s6 := o5.Args[1]
 24437  		if s6.Op != OpPPC64SLDconst {
 24438  			break
 24439  		}
 24440  		if s6.AuxInt != 8 {
 24441  			break
 24442  		}
 24443  		x6 := s6.Args[0]
 24444  		if x6.Op != OpPPC64MOVBZload {
 24445  			break
 24446  		}
 24447  		i6 := x6.AuxInt
 24448  		if x6.Aux != s {
 24449  			break
 24450  		}
 24451  		_ = x6.Args[1]
 24452  		if p != x6.Args[0] {
 24453  			break
 24454  		}
 24455  		if mem != x6.Args[1] {
 24456  			break
 24457  		}
 24458  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24459  			break
 24460  		}
 24461  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24462  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24463  		v.reset(OpCopy)
 24464  		v.AddArg(v0)
 24465  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24466  		v1.AuxInt = i0
 24467  		v1.Aux = s
 24468  		v1.AddArg(p)
 24469  		v0.AddArg(v1)
 24470  		v0.AddArg(mem)
 24471  		return true
 24472  	}
 24473  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24474  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24475  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24476  	for {
 24477  		t := v.Type
 24478  		_ = v.Args[1]
 24479  		x7 := v.Args[0]
 24480  		if x7.Op != OpPPC64MOVBZload {
 24481  			break
 24482  		}
 24483  		i7 := x7.AuxInt
 24484  		s := x7.Aux
 24485  		_ = x7.Args[1]
 24486  		p := x7.Args[0]
 24487  		mem := x7.Args[1]
 24488  		o5 := v.Args[1]
 24489  		if o5.Op != OpPPC64OR {
 24490  			break
 24491  		}
 24492  		if o5.Type != t {
 24493  			break
 24494  		}
 24495  		_ = o5.Args[1]
 24496  		o4 := o5.Args[0]
 24497  		if o4.Op != OpPPC64OR {
 24498  			break
 24499  		}
 24500  		if o4.Type != t {
 24501  			break
 24502  		}
 24503  		_ = o4.Args[1]
 24504  		s5 := o4.Args[0]
 24505  		if s5.Op != OpPPC64SLDconst {
 24506  			break
 24507  		}
 24508  		if s5.AuxInt != 16 {
 24509  			break
 24510  		}
 24511  		x5 := s5.Args[0]
 24512  		if x5.Op != OpPPC64MOVBZload {
 24513  			break
 24514  		}
 24515  		i5 := x5.AuxInt
 24516  		if x5.Aux != s {
 24517  			break
 24518  		}
 24519  		_ = x5.Args[1]
 24520  		if p != x5.Args[0] {
 24521  			break
 24522  		}
 24523  		if mem != x5.Args[1] {
 24524  			break
 24525  		}
 24526  		o3 := o4.Args[1]
 24527  		if o3.Op != OpPPC64OR {
 24528  			break
 24529  		}
 24530  		if o3.Type != t {
 24531  			break
 24532  		}
 24533  		_ = o3.Args[1]
 24534  		s0 := o3.Args[0]
 24535  		if s0.Op != OpPPC64SLDconst {
 24536  			break
 24537  		}
 24538  		if s0.AuxInt != 32 {
 24539  			break
 24540  		}
 24541  		x3 := s0.Args[0]
 24542  		if x3.Op != OpPPC64MOVWBRload {
 24543  			break
 24544  		}
 24545  		if x3.Type != t {
 24546  			break
 24547  		}
 24548  		_ = x3.Args[1]
 24549  		x3_0 := x3.Args[0]
 24550  		if x3_0.Op != OpPPC64MOVDaddr {
 24551  			break
 24552  		}
 24553  		if x3_0.Type != typ.Uintptr {
 24554  			break
 24555  		}
 24556  		i0 := x3_0.AuxInt
 24557  		if x3_0.Aux != s {
 24558  			break
 24559  		}
 24560  		if p != x3_0.Args[0] {
 24561  			break
 24562  		}
 24563  		if mem != x3.Args[1] {
 24564  			break
 24565  		}
 24566  		s4 := o3.Args[1]
 24567  		if s4.Op != OpPPC64SLDconst {
 24568  			break
 24569  		}
 24570  		if s4.AuxInt != 24 {
 24571  			break
 24572  		}
 24573  		x4 := s4.Args[0]
 24574  		if x4.Op != OpPPC64MOVBZload {
 24575  			break
 24576  		}
 24577  		i4 := x4.AuxInt
 24578  		if x4.Aux != s {
 24579  			break
 24580  		}
 24581  		_ = x4.Args[1]
 24582  		if p != x4.Args[0] {
 24583  			break
 24584  		}
 24585  		if mem != x4.Args[1] {
 24586  			break
 24587  		}
 24588  		s6 := o5.Args[1]
 24589  		if s6.Op != OpPPC64SLDconst {
 24590  			break
 24591  		}
 24592  		if s6.AuxInt != 8 {
 24593  			break
 24594  		}
 24595  		x6 := s6.Args[0]
 24596  		if x6.Op != OpPPC64MOVBZload {
 24597  			break
 24598  		}
 24599  		i6 := x6.AuxInt
 24600  		if x6.Aux != s {
 24601  			break
 24602  		}
 24603  		_ = x6.Args[1]
 24604  		if p != x6.Args[0] {
 24605  			break
 24606  		}
 24607  		if mem != x6.Args[1] {
 24608  			break
 24609  		}
 24610  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24611  			break
 24612  		}
 24613  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24614  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24615  		v.reset(OpCopy)
 24616  		v.AddArg(v0)
 24617  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24618  		v1.AuxInt = i0
 24619  		v1.Aux = s
 24620  		v1.AddArg(p)
 24621  		v0.AddArg(v1)
 24622  		v0.AddArg(mem)
 24623  		return true
 24624  	}
 24625  	return false
 24626  }
 24627  func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
 24628  	b := v.Block
 24629  	_ = b
 24630  	config := b.Func.Config
 24631  	_ = config
 24632  	typ := &b.Func.Config.Types
 24633  	_ = typ
 24634  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24635  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24636  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24637  	for {
 24638  		t := v.Type
 24639  		_ = v.Args[1]
 24640  		x7 := v.Args[0]
 24641  		if x7.Op != OpPPC64MOVBZload {
 24642  			break
 24643  		}
 24644  		i7 := x7.AuxInt
 24645  		s := x7.Aux
 24646  		_ = x7.Args[1]
 24647  		p := x7.Args[0]
 24648  		mem := x7.Args[1]
 24649  		o5 := v.Args[1]
 24650  		if o5.Op != OpPPC64OR {
 24651  			break
 24652  		}
 24653  		if o5.Type != t {
 24654  			break
 24655  		}
 24656  		_ = o5.Args[1]
 24657  		o4 := o5.Args[0]
 24658  		if o4.Op != OpPPC64OR {
 24659  			break
 24660  		}
 24661  		if o4.Type != t {
 24662  			break
 24663  		}
 24664  		_ = o4.Args[1]
 24665  		o3 := o4.Args[0]
 24666  		if o3.Op != OpPPC64OR {
 24667  			break
 24668  		}
 24669  		if o3.Type != t {
 24670  			break
 24671  		}
 24672  		_ = o3.Args[1]
 24673  		s4 := o3.Args[0]
 24674  		if s4.Op != OpPPC64SLDconst {
 24675  			break
 24676  		}
 24677  		if s4.AuxInt != 24 {
 24678  			break
 24679  		}
 24680  		x4 := s4.Args[0]
 24681  		if x4.Op != OpPPC64MOVBZload {
 24682  			break
 24683  		}
 24684  		i4 := x4.AuxInt
 24685  		if x4.Aux != s {
 24686  			break
 24687  		}
 24688  		_ = x4.Args[1]
 24689  		if p != x4.Args[0] {
 24690  			break
 24691  		}
 24692  		if mem != x4.Args[1] {
 24693  			break
 24694  		}
 24695  		s0 := o3.Args[1]
 24696  		if s0.Op != OpPPC64SLDconst {
 24697  			break
 24698  		}
 24699  		if s0.AuxInt != 32 {
 24700  			break
 24701  		}
 24702  		x3 := s0.Args[0]
 24703  		if x3.Op != OpPPC64MOVWBRload {
 24704  			break
 24705  		}
 24706  		if x3.Type != t {
 24707  			break
 24708  		}
 24709  		_ = x3.Args[1]
 24710  		x3_0 := x3.Args[0]
 24711  		if x3_0.Op != OpPPC64MOVDaddr {
 24712  			break
 24713  		}
 24714  		if x3_0.Type != typ.Uintptr {
 24715  			break
 24716  		}
 24717  		i0 := x3_0.AuxInt
 24718  		if x3_0.Aux != s {
 24719  			break
 24720  		}
 24721  		if p != x3_0.Args[0] {
 24722  			break
 24723  		}
 24724  		if mem != x3.Args[1] {
 24725  			break
 24726  		}
 24727  		s5 := o4.Args[1]
 24728  		if s5.Op != OpPPC64SLDconst {
 24729  			break
 24730  		}
 24731  		if s5.AuxInt != 16 {
 24732  			break
 24733  		}
 24734  		x5 := s5.Args[0]
 24735  		if x5.Op != OpPPC64MOVBZload {
 24736  			break
 24737  		}
 24738  		i5 := x5.AuxInt
 24739  		if x5.Aux != s {
 24740  			break
 24741  		}
 24742  		_ = x5.Args[1]
 24743  		if p != x5.Args[0] {
 24744  			break
 24745  		}
 24746  		if mem != x5.Args[1] {
 24747  			break
 24748  		}
 24749  		s6 := o5.Args[1]
 24750  		if s6.Op != OpPPC64SLDconst {
 24751  			break
 24752  		}
 24753  		if s6.AuxInt != 8 {
 24754  			break
 24755  		}
 24756  		x6 := s6.Args[0]
 24757  		if x6.Op != OpPPC64MOVBZload {
 24758  			break
 24759  		}
 24760  		i6 := x6.AuxInt
 24761  		if x6.Aux != s {
 24762  			break
 24763  		}
 24764  		_ = x6.Args[1]
 24765  		if p != x6.Args[0] {
 24766  			break
 24767  		}
 24768  		if mem != x6.Args[1] {
 24769  			break
 24770  		}
 24771  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24772  			break
 24773  		}
 24774  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24775  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24776  		v.reset(OpCopy)
 24777  		v.AddArg(v0)
 24778  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24779  		v1.AuxInt = i0
 24780  		v1.Aux = s
 24781  		v1.AddArg(p)
 24782  		v0.AddArg(v1)
 24783  		v0.AddArg(mem)
 24784  		return true
 24785  	}
 24786  	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24787  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24788  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24789  	for {
 24790  		t := v.Type
 24791  		_ = v.Args[1]
 24792  		x7 := v.Args[0]
 24793  		if x7.Op != OpPPC64MOVBZload {
 24794  			break
 24795  		}
 24796  		i7 := x7.AuxInt
 24797  		s := x7.Aux
 24798  		_ = x7.Args[1]
 24799  		p := x7.Args[0]
 24800  		mem := x7.Args[1]
 24801  		o5 := v.Args[1]
 24802  		if o5.Op != OpPPC64OR {
 24803  			break
 24804  		}
 24805  		if o5.Type != t {
 24806  			break
 24807  		}
 24808  		_ = o5.Args[1]
 24809  		o4 := o5.Args[0]
 24810  		if o4.Op != OpPPC64OR {
 24811  			break
 24812  		}
 24813  		if o4.Type != t {
 24814  			break
 24815  		}
 24816  		_ = o4.Args[1]
 24817  		o3 := o4.Args[0]
 24818  		if o3.Op != OpPPC64OR {
 24819  			break
 24820  		}
 24821  		if o3.Type != t {
 24822  			break
 24823  		}
 24824  		_ = o3.Args[1]
 24825  		s0 := o3.Args[0]
 24826  		if s0.Op != OpPPC64SLDconst {
 24827  			break
 24828  		}
 24829  		if s0.AuxInt != 32 {
 24830  			break
 24831  		}
 24832  		x3 := s0.Args[0]
 24833  		if x3.Op != OpPPC64MOVWBRload {
 24834  			break
 24835  		}
 24836  		if x3.Type != t {
 24837  			break
 24838  		}
 24839  		_ = x3.Args[1]
 24840  		x3_0 := x3.Args[0]
 24841  		if x3_0.Op != OpPPC64MOVDaddr {
 24842  			break
 24843  		}
 24844  		if x3_0.Type != typ.Uintptr {
 24845  			break
 24846  		}
 24847  		i0 := x3_0.AuxInt
 24848  		if x3_0.Aux != s {
 24849  			break
 24850  		}
 24851  		if p != x3_0.Args[0] {
 24852  			break
 24853  		}
 24854  		if mem != x3.Args[1] {
 24855  			break
 24856  		}
 24857  		s4 := o3.Args[1]
 24858  		if s4.Op != OpPPC64SLDconst {
 24859  			break
 24860  		}
 24861  		if s4.AuxInt != 24 {
 24862  			break
 24863  		}
 24864  		x4 := s4.Args[0]
 24865  		if x4.Op != OpPPC64MOVBZload {
 24866  			break
 24867  		}
 24868  		i4 := x4.AuxInt
 24869  		if x4.Aux != s {
 24870  			break
 24871  		}
 24872  		_ = x4.Args[1]
 24873  		if p != x4.Args[0] {
 24874  			break
 24875  		}
 24876  		if mem != x4.Args[1] {
 24877  			break
 24878  		}
 24879  		s5 := o4.Args[1]
 24880  		if s5.Op != OpPPC64SLDconst {
 24881  			break
 24882  		}
 24883  		if s5.AuxInt != 16 {
 24884  			break
 24885  		}
 24886  		x5 := s5.Args[0]
 24887  		if x5.Op != OpPPC64MOVBZload {
 24888  			break
 24889  		}
 24890  		i5 := x5.AuxInt
 24891  		if x5.Aux != s {
 24892  			break
 24893  		}
 24894  		_ = x5.Args[1]
 24895  		if p != x5.Args[0] {
 24896  			break
 24897  		}
 24898  		if mem != x5.Args[1] {
 24899  			break
 24900  		}
 24901  		s6 := o5.Args[1]
 24902  		if s6.Op != OpPPC64SLDconst {
 24903  			break
 24904  		}
 24905  		if s6.AuxInt != 8 {
 24906  			break
 24907  		}
 24908  		x6 := s6.Args[0]
 24909  		if x6.Op != OpPPC64MOVBZload {
 24910  			break
 24911  		}
 24912  		i6 := x6.AuxInt
 24913  		if x6.Aux != s {
 24914  			break
 24915  		}
 24916  		_ = x6.Args[1]
 24917  		if p != x6.Args[0] {
 24918  			break
 24919  		}
 24920  		if mem != x6.Args[1] {
 24921  			break
 24922  		}
 24923  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24924  			break
 24925  		}
 24926  		b = mergePoint(b, x3, x4, x5, x6, x7)
 24927  		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24928  		v.reset(OpCopy)
 24929  		v.AddArg(v0)
 24930  		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24931  		v1.AuxInt = i0
 24932  		v1.Aux = s
 24933  		v1.AddArg(p)
 24934  		v0.AddArg(v1)
 24935  		v0.AddArg(mem)
 24936  		return true
 24937  	}
 24938  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 24939  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24940  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24941  	for {
 24942  		t := v.Type
 24943  		_ = v.Args[1]
 24944  		o5 := v.Args[0]
 24945  		if o5.Op != OpPPC64OR {
 24946  			break
 24947  		}
 24948  		if o5.Type != t {
 24949  			break
 24950  		}
 24951  		_ = o5.Args[1]
 24952  		s6 := o5.Args[0]
 24953  		if s6.Op != OpPPC64SLDconst {
 24954  			break
 24955  		}
 24956  		if s6.AuxInt != 8 {
 24957  			break
 24958  		}
 24959  		x6 := s6.Args[0]
 24960  		if x6.Op != OpPPC64MOVBZload {
 24961  			break
 24962  		}
 24963  		i6 := x6.AuxInt
 24964  		s := x6.Aux
 24965  		_ = x6.Args[1]
 24966  		p := x6.Args[0]
 24967  		mem := x6.Args[1]
 24968  		o4 := o5.Args[1]
 24969  		if o4.Op != OpPPC64OR {
 24970  			break
 24971  		}
 24972  		if o4.Type != t {
 24973  			break
 24974  		}
 24975  		_ = o4.Args[1]
 24976  		s5 := o4.Args[0]
 24977  		if s5.Op != OpPPC64SLDconst {
 24978  			break
 24979  		}
 24980  		if s5.AuxInt != 16 {
 24981  			break
 24982  		}
 24983  		x5 := s5.Args[0]
 24984  		if x5.Op != OpPPC64MOVBZload {
 24985  			break
 24986  		}
 24987  		i5 := x5.AuxInt
 24988  		if x5.Aux != s {
 24989  			break
 24990  		}
 24991  		_ = x5.Args[1]
 24992  		if p != x5.Args[0] {
 24993  			break
 24994  		}
 24995  		if mem != x5.Args[1] {
 24996  			break
 24997  		}
 24998  		o3 := o4.Args[1]
 24999  		if o3.Op != OpPPC64OR {
 25000  			break
 25001  		}
 25002  		if o3.Type != t {
 25003  			break
 25004  		}
 25005  		_ = o3.Args[1]
 25006  		s4 := o3.Args[0]
 25007  		if s4.Op != OpPPC64SLDconst {
 25008  			break
 25009  		}
 25010  		if s4.AuxInt != 24 {
 25011  			break
 25012  		}
 25013  		x4 := s4.Args[0]
 25014  		if x4.Op != OpPPC64MOVBZload {
 25015  			break
 25016  		}
 25017  		i4 := x4.AuxInt
 25018  		if x4.Aux != s {
 25019  			break
 25020  		}
 25021  		_ = x4.Args[1]
 25022  		if p != x4.Args[0] {
 25023  			break
 25024  		}
 25025  		if mem != x4.Args[1] {
 25026  			break
 25027  		}
 25028  		s0 := o3.Args[1]
 25029  		if s0.Op != OpPPC64SLDconst {
 25030  			break
 25031  		}
 25032  		if s0.AuxInt != 32 {
 25033  			break
 25034  		}
 25035  		x3 := s0.Args[0]
 25036  		if x3.Op != OpPPC64MOVWBRload {
 25037  			break
 25038  		}
 25039  		if x3.Type != t {
 25040  			break
 25041  		}
 25042  		_ = x3.Args[1]
 25043  		x3_0 := x3.Args[0]
 25044  		if x3_0.Op != OpPPC64MOVDaddr {
 25045  			break
 25046  		}
 25047  		if x3_0.Type != typ.Uintptr {
 25048  			break
 25049  		}
 25050  		i0 := x3_0.AuxInt
 25051  		if x3_0.Aux != s {
 25052  			break
 25053  		}
 25054  		if p != x3_0.Args[0] {
 25055  			break
 25056  		}
 25057  		if mem != x3.Args[1] {
 25058  			break
 25059  		}
 25060  		x7 := v.Args[1]
 25061  		if x7.Op != OpPPC64MOVBZload {
 25062  			break
 25063  		}
 25064  		i7 := x7.AuxInt
 25065  		if x7.Aux != s {
 25066  			break
 25067  		}
 25068  		_ = x7.Args[1]
 25069  		if p != x7.Args[0] {
 25070  			break
 25071  		}
 25072  		if mem != x7.Args[1] {
 25073  			break
 25074  		}
 25075  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25076  			break
 25077  		}
 25078  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25079  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25080  		v.reset(OpCopy)
 25081  		v.AddArg(v0)
 25082  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25083  		v1.AuxInt = i0
 25084  		v1.Aux = s
 25085  		v1.AddArg(p)
 25086  		v0.AddArg(v1)
 25087  		v0.AddArg(mem)
 25088  		return true
 25089  	}
 25090  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 25091  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25092  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25093  	for {
 25094  		t := v.Type
 25095  		_ = v.Args[1]
 25096  		o5 := v.Args[0]
 25097  		if o5.Op != OpPPC64OR {
 25098  			break
 25099  		}
 25100  		if o5.Type != t {
 25101  			break
 25102  		}
 25103  		_ = o5.Args[1]
 25104  		s6 := o5.Args[0]
 25105  		if s6.Op != OpPPC64SLDconst {
 25106  			break
 25107  		}
 25108  		if s6.AuxInt != 8 {
 25109  			break
 25110  		}
 25111  		x6 := s6.Args[0]
 25112  		if x6.Op != OpPPC64MOVBZload {
 25113  			break
 25114  		}
 25115  		i6 := x6.AuxInt
 25116  		s := x6.Aux
 25117  		_ = x6.Args[1]
 25118  		p := x6.Args[0]
 25119  		mem := x6.Args[1]
 25120  		o4 := o5.Args[1]
 25121  		if o4.Op != OpPPC64OR {
 25122  			break
 25123  		}
 25124  		if o4.Type != t {
 25125  			break
 25126  		}
 25127  		_ = o4.Args[1]
 25128  		s5 := o4.Args[0]
 25129  		if s5.Op != OpPPC64SLDconst {
 25130  			break
 25131  		}
 25132  		if s5.AuxInt != 16 {
 25133  			break
 25134  		}
 25135  		x5 := s5.Args[0]
 25136  		if x5.Op != OpPPC64MOVBZload {
 25137  			break
 25138  		}
 25139  		i5 := x5.AuxInt
 25140  		if x5.Aux != s {
 25141  			break
 25142  		}
 25143  		_ = x5.Args[1]
 25144  		if p != x5.Args[0] {
 25145  			break
 25146  		}
 25147  		if mem != x5.Args[1] {
 25148  			break
 25149  		}
 25150  		o3 := o4.Args[1]
 25151  		if o3.Op != OpPPC64OR {
 25152  			break
 25153  		}
 25154  		if o3.Type != t {
 25155  			break
 25156  		}
 25157  		_ = o3.Args[1]
 25158  		s0 := o3.Args[0]
 25159  		if s0.Op != OpPPC64SLDconst {
 25160  			break
 25161  		}
 25162  		if s0.AuxInt != 32 {
 25163  			break
 25164  		}
 25165  		x3 := s0.Args[0]
 25166  		if x3.Op != OpPPC64MOVWBRload {
 25167  			break
 25168  		}
 25169  		if x3.Type != t {
 25170  			break
 25171  		}
 25172  		_ = x3.Args[1]
 25173  		x3_0 := x3.Args[0]
 25174  		if x3_0.Op != OpPPC64MOVDaddr {
 25175  			break
 25176  		}
 25177  		if x3_0.Type != typ.Uintptr {
 25178  			break
 25179  		}
 25180  		i0 := x3_0.AuxInt
 25181  		if x3_0.Aux != s {
 25182  			break
 25183  		}
 25184  		if p != x3_0.Args[0] {
 25185  			break
 25186  		}
 25187  		if mem != x3.Args[1] {
 25188  			break
 25189  		}
 25190  		s4 := o3.Args[1]
 25191  		if s4.Op != OpPPC64SLDconst {
 25192  			break
 25193  		}
 25194  		if s4.AuxInt != 24 {
 25195  			break
 25196  		}
 25197  		x4 := s4.Args[0]
 25198  		if x4.Op != OpPPC64MOVBZload {
 25199  			break
 25200  		}
 25201  		i4 := x4.AuxInt
 25202  		if x4.Aux != s {
 25203  			break
 25204  		}
 25205  		_ = x4.Args[1]
 25206  		if p != x4.Args[0] {
 25207  			break
 25208  		}
 25209  		if mem != x4.Args[1] {
 25210  			break
 25211  		}
 25212  		x7 := v.Args[1]
 25213  		if x7.Op != OpPPC64MOVBZload {
 25214  			break
 25215  		}
 25216  		i7 := x7.AuxInt
 25217  		if x7.Aux != s {
 25218  			break
 25219  		}
 25220  		_ = x7.Args[1]
 25221  		if p != x7.Args[0] {
 25222  			break
 25223  		}
 25224  		if mem != x7.Args[1] {
 25225  			break
 25226  		}
 25227  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25228  			break
 25229  		}
 25230  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25231  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25232  		v.reset(OpCopy)
 25233  		v.AddArg(v0)
 25234  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25235  		v1.AuxInt = i0
 25236  		v1.Aux = s
 25237  		v1.AddArg(p)
 25238  		v0.AddArg(v1)
 25239  		v0.AddArg(mem)
 25240  		return true
 25241  	}
 25242  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 25243  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25244  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25245  	for {
 25246  		t := v.Type
 25247  		_ = v.Args[1]
 25248  		o5 := v.Args[0]
 25249  		if o5.Op != OpPPC64OR {
 25250  			break
 25251  		}
 25252  		if o5.Type != t {
 25253  			break
 25254  		}
 25255  		_ = o5.Args[1]
 25256  		s6 := o5.Args[0]
 25257  		if s6.Op != OpPPC64SLDconst {
 25258  			break
 25259  		}
 25260  		if s6.AuxInt != 8 {
 25261  			break
 25262  		}
 25263  		x6 := s6.Args[0]
 25264  		if x6.Op != OpPPC64MOVBZload {
 25265  			break
 25266  		}
 25267  		i6 := x6.AuxInt
 25268  		s := x6.Aux
 25269  		_ = x6.Args[1]
 25270  		p := x6.Args[0]
 25271  		mem := x6.Args[1]
 25272  		o4 := o5.Args[1]
 25273  		if o4.Op != OpPPC64OR {
 25274  			break
 25275  		}
 25276  		if o4.Type != t {
 25277  			break
 25278  		}
 25279  		_ = o4.Args[1]
 25280  		o3 := o4.Args[0]
 25281  		if o3.Op != OpPPC64OR {
 25282  			break
 25283  		}
 25284  		if o3.Type != t {
 25285  			break
 25286  		}
 25287  		_ = o3.Args[1]
 25288  		s4 := o3.Args[0]
 25289  		if s4.Op != OpPPC64SLDconst {
 25290  			break
 25291  		}
 25292  		if s4.AuxInt != 24 {
 25293  			break
 25294  		}
 25295  		x4 := s4.Args[0]
 25296  		if x4.Op != OpPPC64MOVBZload {
 25297  			break
 25298  		}
 25299  		i4 := x4.AuxInt
 25300  		if x4.Aux != s {
 25301  			break
 25302  		}
 25303  		_ = x4.Args[1]
 25304  		if p != x4.Args[0] {
 25305  			break
 25306  		}
 25307  		if mem != x4.Args[1] {
 25308  			break
 25309  		}
 25310  		s0 := o3.Args[1]
 25311  		if s0.Op != OpPPC64SLDconst {
 25312  			break
 25313  		}
 25314  		if s0.AuxInt != 32 {
 25315  			break
 25316  		}
 25317  		x3 := s0.Args[0]
 25318  		if x3.Op != OpPPC64MOVWBRload {
 25319  			break
 25320  		}
 25321  		if x3.Type != t {
 25322  			break
 25323  		}
 25324  		_ = x3.Args[1]
 25325  		x3_0 := x3.Args[0]
 25326  		if x3_0.Op != OpPPC64MOVDaddr {
 25327  			break
 25328  		}
 25329  		if x3_0.Type != typ.Uintptr {
 25330  			break
 25331  		}
 25332  		i0 := x3_0.AuxInt
 25333  		if x3_0.Aux != s {
 25334  			break
 25335  		}
 25336  		if p != x3_0.Args[0] {
 25337  			break
 25338  		}
 25339  		if mem != x3.Args[1] {
 25340  			break
 25341  		}
 25342  		s5 := o4.Args[1]
 25343  		if s5.Op != OpPPC64SLDconst {
 25344  			break
 25345  		}
 25346  		if s5.AuxInt != 16 {
 25347  			break
 25348  		}
 25349  		x5 := s5.Args[0]
 25350  		if x5.Op != OpPPC64MOVBZload {
 25351  			break
 25352  		}
 25353  		i5 := x5.AuxInt
 25354  		if x5.Aux != s {
 25355  			break
 25356  		}
 25357  		_ = x5.Args[1]
 25358  		if p != x5.Args[0] {
 25359  			break
 25360  		}
 25361  		if mem != x5.Args[1] {
 25362  			break
 25363  		}
 25364  		x7 := v.Args[1]
 25365  		if x7.Op != OpPPC64MOVBZload {
 25366  			break
 25367  		}
 25368  		i7 := x7.AuxInt
 25369  		if x7.Aux != s {
 25370  			break
 25371  		}
 25372  		_ = x7.Args[1]
 25373  		if p != x7.Args[0] {
 25374  			break
 25375  		}
 25376  		if mem != x7.Args[1] {
 25377  			break
 25378  		}
 25379  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25380  			break
 25381  		}
 25382  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25383  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25384  		v.reset(OpCopy)
 25385  		v.AddArg(v0)
 25386  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25387  		v1.AuxInt = i0
 25388  		v1.Aux = s
 25389  		v1.AddArg(p)
 25390  		v0.AddArg(v1)
 25391  		v0.AddArg(mem)
 25392  		return true
 25393  	}
 25394  	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 25395  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25396  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25397  	for {
 25398  		t := v.Type
 25399  		_ = v.Args[1]
 25400  		o5 := v.Args[0]
 25401  		if o5.Op != OpPPC64OR {
 25402  			break
 25403  		}
 25404  		if o5.Type != t {
 25405  			break
 25406  		}
 25407  		_ = o5.Args[1]
 25408  		s6 := o5.Args[0]
 25409  		if s6.Op != OpPPC64SLDconst {
 25410  			break
 25411  		}
 25412  		if s6.AuxInt != 8 {
 25413  			break
 25414  		}
 25415  		x6 := s6.Args[0]
 25416  		if x6.Op != OpPPC64MOVBZload {
 25417  			break
 25418  		}
 25419  		i6 := x6.AuxInt
 25420  		s := x6.Aux
 25421  		_ = x6.Args[1]
 25422  		p := x6.Args[0]
 25423  		mem := x6.Args[1]
 25424  		o4 := o5.Args[1]
 25425  		if o4.Op != OpPPC64OR {
 25426  			break
 25427  		}
 25428  		if o4.Type != t {
 25429  			break
 25430  		}
 25431  		_ = o4.Args[1]
 25432  		o3 := o4.Args[0]
 25433  		if o3.Op != OpPPC64OR {
 25434  			break
 25435  		}
 25436  		if o3.Type != t {
 25437  			break
 25438  		}
 25439  		_ = o3.Args[1]
 25440  		s0 := o3.Args[0]
 25441  		if s0.Op != OpPPC64SLDconst {
 25442  			break
 25443  		}
 25444  		if s0.AuxInt != 32 {
 25445  			break
 25446  		}
 25447  		x3 := s0.Args[0]
 25448  		if x3.Op != OpPPC64MOVWBRload {
 25449  			break
 25450  		}
 25451  		if x3.Type != t {
 25452  			break
 25453  		}
 25454  		_ = x3.Args[1]
 25455  		x3_0 := x3.Args[0]
 25456  		if x3_0.Op != OpPPC64MOVDaddr {
 25457  			break
 25458  		}
 25459  		if x3_0.Type != typ.Uintptr {
 25460  			break
 25461  		}
 25462  		i0 := x3_0.AuxInt
 25463  		if x3_0.Aux != s {
 25464  			break
 25465  		}
 25466  		if p != x3_0.Args[0] {
 25467  			break
 25468  		}
 25469  		if mem != x3.Args[1] {
 25470  			break
 25471  		}
 25472  		s4 := o3.Args[1]
 25473  		if s4.Op != OpPPC64SLDconst {
 25474  			break
 25475  		}
 25476  		if s4.AuxInt != 24 {
 25477  			break
 25478  		}
 25479  		x4 := s4.Args[0]
 25480  		if x4.Op != OpPPC64MOVBZload {
 25481  			break
 25482  		}
 25483  		i4 := x4.AuxInt
 25484  		if x4.Aux != s {
 25485  			break
 25486  		}
 25487  		_ = x4.Args[1]
 25488  		if p != x4.Args[0] {
 25489  			break
 25490  		}
 25491  		if mem != x4.Args[1] {
 25492  			break
 25493  		}
 25494  		s5 := o4.Args[1]
 25495  		if s5.Op != OpPPC64SLDconst {
 25496  			break
 25497  		}
 25498  		if s5.AuxInt != 16 {
 25499  			break
 25500  		}
 25501  		x5 := s5.Args[0]
 25502  		if x5.Op != OpPPC64MOVBZload {
 25503  			break
 25504  		}
 25505  		i5 := x5.AuxInt
 25506  		if x5.Aux != s {
 25507  			break
 25508  		}
 25509  		_ = x5.Args[1]
 25510  		if p != x5.Args[0] {
 25511  			break
 25512  		}
 25513  		if mem != x5.Args[1] {
 25514  			break
 25515  		}
 25516  		x7 := v.Args[1]
 25517  		if x7.Op != OpPPC64MOVBZload {
 25518  			break
 25519  		}
 25520  		i7 := x7.AuxInt
 25521  		if x7.Aux != s {
 25522  			break
 25523  		}
 25524  		_ = x7.Args[1]
 25525  		if p != x7.Args[0] {
 25526  			break
 25527  		}
 25528  		if mem != x7.Args[1] {
 25529  			break
 25530  		}
 25531  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25532  			break
 25533  		}
 25534  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25535  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25536  		v.reset(OpCopy)
 25537  		v.AddArg(v0)
 25538  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25539  		v1.AuxInt = i0
 25540  		v1.Aux = s
 25541  		v1.AddArg(p)
 25542  		v0.AddArg(v1)
 25543  		v0.AddArg(mem)
 25544  		return true
 25545  	}
 25546  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25547  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25548  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25549  	for {
 25550  		t := v.Type
 25551  		_ = v.Args[1]
 25552  		o5 := v.Args[0]
 25553  		if o5.Op != OpPPC64OR {
 25554  			break
 25555  		}
 25556  		if o5.Type != t {
 25557  			break
 25558  		}
 25559  		_ = o5.Args[1]
 25560  		o4 := o5.Args[0]
 25561  		if o4.Op != OpPPC64OR {
 25562  			break
 25563  		}
 25564  		if o4.Type != t {
 25565  			break
 25566  		}
 25567  		_ = o4.Args[1]
 25568  		s5 := o4.Args[0]
 25569  		if s5.Op != OpPPC64SLDconst {
 25570  			break
 25571  		}
 25572  		if s5.AuxInt != 16 {
 25573  			break
 25574  		}
 25575  		x5 := s5.Args[0]
 25576  		if x5.Op != OpPPC64MOVBZload {
 25577  			break
 25578  		}
 25579  		i5 := x5.AuxInt
 25580  		s := x5.Aux
 25581  		_ = x5.Args[1]
 25582  		p := x5.Args[0]
 25583  		mem := x5.Args[1]
 25584  		o3 := o4.Args[1]
 25585  		if o3.Op != OpPPC64OR {
 25586  			break
 25587  		}
 25588  		if o3.Type != t {
 25589  			break
 25590  		}
 25591  		_ = o3.Args[1]
 25592  		s4 := o3.Args[0]
 25593  		if s4.Op != OpPPC64SLDconst {
 25594  			break
 25595  		}
 25596  		if s4.AuxInt != 24 {
 25597  			break
 25598  		}
 25599  		x4 := s4.Args[0]
 25600  		if x4.Op != OpPPC64MOVBZload {
 25601  			break
 25602  		}
 25603  		i4 := x4.AuxInt
 25604  		if x4.Aux != s {
 25605  			break
 25606  		}
 25607  		_ = x4.Args[1]
 25608  		if p != x4.Args[0] {
 25609  			break
 25610  		}
 25611  		if mem != x4.Args[1] {
 25612  			break
 25613  		}
 25614  		s0 := o3.Args[1]
 25615  		if s0.Op != OpPPC64SLDconst {
 25616  			break
 25617  		}
 25618  		if s0.AuxInt != 32 {
 25619  			break
 25620  		}
 25621  		x3 := s0.Args[0]
 25622  		if x3.Op != OpPPC64MOVWBRload {
 25623  			break
 25624  		}
 25625  		if x3.Type != t {
 25626  			break
 25627  		}
 25628  		_ = x3.Args[1]
 25629  		x3_0 := x3.Args[0]
 25630  		if x3_0.Op != OpPPC64MOVDaddr {
 25631  			break
 25632  		}
 25633  		if x3_0.Type != typ.Uintptr {
 25634  			break
 25635  		}
 25636  		i0 := x3_0.AuxInt
 25637  		if x3_0.Aux != s {
 25638  			break
 25639  		}
 25640  		if p != x3_0.Args[0] {
 25641  			break
 25642  		}
 25643  		if mem != x3.Args[1] {
 25644  			break
 25645  		}
 25646  		s6 := o5.Args[1]
 25647  		if s6.Op != OpPPC64SLDconst {
 25648  			break
 25649  		}
 25650  		if s6.AuxInt != 8 {
 25651  			break
 25652  		}
 25653  		x6 := s6.Args[0]
 25654  		if x6.Op != OpPPC64MOVBZload {
 25655  			break
 25656  		}
 25657  		i6 := x6.AuxInt
 25658  		if x6.Aux != s {
 25659  			break
 25660  		}
 25661  		_ = x6.Args[1]
 25662  		if p != x6.Args[0] {
 25663  			break
 25664  		}
 25665  		if mem != x6.Args[1] {
 25666  			break
 25667  		}
 25668  		x7 := v.Args[1]
 25669  		if x7.Op != OpPPC64MOVBZload {
 25670  			break
 25671  		}
 25672  		i7 := x7.AuxInt
 25673  		if x7.Aux != s {
 25674  			break
 25675  		}
 25676  		_ = x7.Args[1]
 25677  		if p != x7.Args[0] {
 25678  			break
 25679  		}
 25680  		if mem != x7.Args[1] {
 25681  			break
 25682  		}
 25683  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25684  			break
 25685  		}
 25686  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25687  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25688  		v.reset(OpCopy)
 25689  		v.AddArg(v0)
 25690  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25691  		v1.AuxInt = i0
 25692  		v1.Aux = s
 25693  		v1.AddArg(p)
 25694  		v0.AddArg(v1)
 25695  		v0.AddArg(mem)
 25696  		return true
 25697  	}
 25698  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25699  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25700  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25701  	for {
 25702  		t := v.Type
 25703  		_ = v.Args[1]
 25704  		o5 := v.Args[0]
 25705  		if o5.Op != OpPPC64OR {
 25706  			break
 25707  		}
 25708  		if o5.Type != t {
 25709  			break
 25710  		}
 25711  		_ = o5.Args[1]
 25712  		o4 := o5.Args[0]
 25713  		if o4.Op != OpPPC64OR {
 25714  			break
 25715  		}
 25716  		if o4.Type != t {
 25717  			break
 25718  		}
 25719  		_ = o4.Args[1]
 25720  		s5 := o4.Args[0]
 25721  		if s5.Op != OpPPC64SLDconst {
 25722  			break
 25723  		}
 25724  		if s5.AuxInt != 16 {
 25725  			break
 25726  		}
 25727  		x5 := s5.Args[0]
 25728  		if x5.Op != OpPPC64MOVBZload {
 25729  			break
 25730  		}
 25731  		i5 := x5.AuxInt
 25732  		s := x5.Aux
 25733  		_ = x5.Args[1]
 25734  		p := x5.Args[0]
 25735  		mem := x5.Args[1]
 25736  		o3 := o4.Args[1]
 25737  		if o3.Op != OpPPC64OR {
 25738  			break
 25739  		}
 25740  		if o3.Type != t {
 25741  			break
 25742  		}
 25743  		_ = o3.Args[1]
 25744  		s0 := o3.Args[0]
 25745  		if s0.Op != OpPPC64SLDconst {
 25746  			break
 25747  		}
 25748  		if s0.AuxInt != 32 {
 25749  			break
 25750  		}
 25751  		x3 := s0.Args[0]
 25752  		if x3.Op != OpPPC64MOVWBRload {
 25753  			break
 25754  		}
 25755  		if x3.Type != t {
 25756  			break
 25757  		}
 25758  		_ = x3.Args[1]
 25759  		x3_0 := x3.Args[0]
 25760  		if x3_0.Op != OpPPC64MOVDaddr {
 25761  			break
 25762  		}
 25763  		if x3_0.Type != typ.Uintptr {
 25764  			break
 25765  		}
 25766  		i0 := x3_0.AuxInt
 25767  		if x3_0.Aux != s {
 25768  			break
 25769  		}
 25770  		if p != x3_0.Args[0] {
 25771  			break
 25772  		}
 25773  		if mem != x3.Args[1] {
 25774  			break
 25775  		}
 25776  		s4 := o3.Args[1]
 25777  		if s4.Op != OpPPC64SLDconst {
 25778  			break
 25779  		}
 25780  		if s4.AuxInt != 24 {
 25781  			break
 25782  		}
 25783  		x4 := s4.Args[0]
 25784  		if x4.Op != OpPPC64MOVBZload {
 25785  			break
 25786  		}
 25787  		i4 := x4.AuxInt
 25788  		if x4.Aux != s {
 25789  			break
 25790  		}
 25791  		_ = x4.Args[1]
 25792  		if p != x4.Args[0] {
 25793  			break
 25794  		}
 25795  		if mem != x4.Args[1] {
 25796  			break
 25797  		}
 25798  		s6 := o5.Args[1]
 25799  		if s6.Op != OpPPC64SLDconst {
 25800  			break
 25801  		}
 25802  		if s6.AuxInt != 8 {
 25803  			break
 25804  		}
 25805  		x6 := s6.Args[0]
 25806  		if x6.Op != OpPPC64MOVBZload {
 25807  			break
 25808  		}
 25809  		i6 := x6.AuxInt
 25810  		if x6.Aux != s {
 25811  			break
 25812  		}
 25813  		_ = x6.Args[1]
 25814  		if p != x6.Args[0] {
 25815  			break
 25816  		}
 25817  		if mem != x6.Args[1] {
 25818  			break
 25819  		}
 25820  		x7 := v.Args[1]
 25821  		if x7.Op != OpPPC64MOVBZload {
 25822  			break
 25823  		}
 25824  		i7 := x7.AuxInt
 25825  		if x7.Aux != s {
 25826  			break
 25827  		}
 25828  		_ = x7.Args[1]
 25829  		if p != x7.Args[0] {
 25830  			break
 25831  		}
 25832  		if mem != x7.Args[1] {
 25833  			break
 25834  		}
 25835  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25836  			break
 25837  		}
 25838  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25839  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25840  		v.reset(OpCopy)
 25841  		v.AddArg(v0)
 25842  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25843  		v1.AuxInt = i0
 25844  		v1.Aux = s
 25845  		v1.AddArg(p)
 25846  		v0.AddArg(v1)
 25847  		v0.AddArg(mem)
 25848  		return true
 25849  	}
 25850  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25851  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25852  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25853  	for {
 25854  		t := v.Type
 25855  		_ = v.Args[1]
 25856  		o5 := v.Args[0]
 25857  		if o5.Op != OpPPC64OR {
 25858  			break
 25859  		}
 25860  		if o5.Type != t {
 25861  			break
 25862  		}
 25863  		_ = o5.Args[1]
 25864  		o4 := o5.Args[0]
 25865  		if o4.Op != OpPPC64OR {
 25866  			break
 25867  		}
 25868  		if o4.Type != t {
 25869  			break
 25870  		}
 25871  		_ = o4.Args[1]
 25872  		o3 := o4.Args[0]
 25873  		if o3.Op != OpPPC64OR {
 25874  			break
 25875  		}
 25876  		if o3.Type != t {
 25877  			break
 25878  		}
 25879  		_ = o3.Args[1]
 25880  		s4 := o3.Args[0]
 25881  		if s4.Op != OpPPC64SLDconst {
 25882  			break
 25883  		}
 25884  		if s4.AuxInt != 24 {
 25885  			break
 25886  		}
 25887  		x4 := s4.Args[0]
 25888  		if x4.Op != OpPPC64MOVBZload {
 25889  			break
 25890  		}
 25891  		i4 := x4.AuxInt
 25892  		s := x4.Aux
 25893  		_ = x4.Args[1]
 25894  		p := x4.Args[0]
 25895  		mem := x4.Args[1]
 25896  		s0 := o3.Args[1]
 25897  		if s0.Op != OpPPC64SLDconst {
 25898  			break
 25899  		}
 25900  		if s0.AuxInt != 32 {
 25901  			break
 25902  		}
 25903  		x3 := s0.Args[0]
 25904  		if x3.Op != OpPPC64MOVWBRload {
 25905  			break
 25906  		}
 25907  		if x3.Type != t {
 25908  			break
 25909  		}
 25910  		_ = x3.Args[1]
 25911  		x3_0 := x3.Args[0]
 25912  		if x3_0.Op != OpPPC64MOVDaddr {
 25913  			break
 25914  		}
 25915  		if x3_0.Type != typ.Uintptr {
 25916  			break
 25917  		}
 25918  		i0 := x3_0.AuxInt
 25919  		if x3_0.Aux != s {
 25920  			break
 25921  		}
 25922  		if p != x3_0.Args[0] {
 25923  			break
 25924  		}
 25925  		if mem != x3.Args[1] {
 25926  			break
 25927  		}
 25928  		s5 := o4.Args[1]
 25929  		if s5.Op != OpPPC64SLDconst {
 25930  			break
 25931  		}
 25932  		if s5.AuxInt != 16 {
 25933  			break
 25934  		}
 25935  		x5 := s5.Args[0]
 25936  		if x5.Op != OpPPC64MOVBZload {
 25937  			break
 25938  		}
 25939  		i5 := x5.AuxInt
 25940  		if x5.Aux != s {
 25941  			break
 25942  		}
 25943  		_ = x5.Args[1]
 25944  		if p != x5.Args[0] {
 25945  			break
 25946  		}
 25947  		if mem != x5.Args[1] {
 25948  			break
 25949  		}
 25950  		s6 := o5.Args[1]
 25951  		if s6.Op != OpPPC64SLDconst {
 25952  			break
 25953  		}
 25954  		if s6.AuxInt != 8 {
 25955  			break
 25956  		}
 25957  		x6 := s6.Args[0]
 25958  		if x6.Op != OpPPC64MOVBZload {
 25959  			break
 25960  		}
 25961  		i6 := x6.AuxInt
 25962  		if x6.Aux != s {
 25963  			break
 25964  		}
 25965  		_ = x6.Args[1]
 25966  		if p != x6.Args[0] {
 25967  			break
 25968  		}
 25969  		if mem != x6.Args[1] {
 25970  			break
 25971  		}
 25972  		x7 := v.Args[1]
 25973  		if x7.Op != OpPPC64MOVBZload {
 25974  			break
 25975  		}
 25976  		i7 := x7.AuxInt
 25977  		if x7.Aux != s {
 25978  			break
 25979  		}
 25980  		_ = x7.Args[1]
 25981  		if p != x7.Args[0] {
 25982  			break
 25983  		}
 25984  		if mem != x7.Args[1] {
 25985  			break
 25986  		}
 25987  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25988  			break
 25989  		}
 25990  		b = mergePoint(b, x3, x4, x5, x6, x7)
 25991  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25992  		v.reset(OpCopy)
 25993  		v.AddArg(v0)
 25994  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25995  		v1.AuxInt = i0
 25996  		v1.Aux = s
 25997  		v1.AddArg(p)
 25998  		v0.AddArg(v1)
 25999  		v0.AddArg(mem)
 26000  		return true
 26001  	}
 26002  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 26003  	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 26004  	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 26005  	for {
 26006  		t := v.Type
 26007  		_ = v.Args[1]
 26008  		o5 := v.Args[0]
 26009  		if o5.Op != OpPPC64OR {
 26010  			break
 26011  		}
 26012  		if o5.Type != t {
 26013  			break
 26014  		}
 26015  		_ = o5.Args[1]
 26016  		o4 := o5.Args[0]
 26017  		if o4.Op != OpPPC64OR {
 26018  			break
 26019  		}
 26020  		if o4.Type != t {
 26021  			break
 26022  		}
 26023  		_ = o4.Args[1]
 26024  		o3 := o4.Args[0]
 26025  		if o3.Op != OpPPC64OR {
 26026  			break
 26027  		}
 26028  		if o3.Type != t {
 26029  			break
 26030  		}
 26031  		_ = o3.Args[1]
 26032  		s0 := o3.Args[0]
 26033  		if s0.Op != OpPPC64SLDconst {
 26034  			break
 26035  		}
 26036  		if s0.AuxInt != 32 {
 26037  			break
 26038  		}
 26039  		x3 := s0.Args[0]
 26040  		if x3.Op != OpPPC64MOVWBRload {
 26041  			break
 26042  		}
 26043  		if x3.Type != t {
 26044  			break
 26045  		}
 26046  		_ = x3.Args[1]
 26047  		x3_0 := x3.Args[0]
 26048  		if x3_0.Op != OpPPC64MOVDaddr {
 26049  			break
 26050  		}
 26051  		if x3_0.Type != typ.Uintptr {
 26052  			break
 26053  		}
 26054  		i0 := x3_0.AuxInt
 26055  		s := x3_0.Aux
 26056  		p := x3_0.Args[0]
 26057  		mem := x3.Args[1]
 26058  		s4 := o3.Args[1]
 26059  		if s4.Op != OpPPC64SLDconst {
 26060  			break
 26061  		}
 26062  		if s4.AuxInt != 24 {
 26063  			break
 26064  		}
 26065  		x4 := s4.Args[0]
 26066  		if x4.Op != OpPPC64MOVBZload {
 26067  			break
 26068  		}
 26069  		i4 := x4.AuxInt
 26070  		if x4.Aux != s {
 26071  			break
 26072  		}
 26073  		_ = x4.Args[1]
 26074  		if p != x4.Args[0] {
 26075  			break
 26076  		}
 26077  		if mem != x4.Args[1] {
 26078  			break
 26079  		}
 26080  		s5 := o4.Args[1]
 26081  		if s5.Op != OpPPC64SLDconst {
 26082  			break
 26083  		}
 26084  		if s5.AuxInt != 16 {
 26085  			break
 26086  		}
 26087  		x5 := s5.Args[0]
 26088  		if x5.Op != OpPPC64MOVBZload {
 26089  			break
 26090  		}
 26091  		i5 := x5.AuxInt
 26092  		if x5.Aux != s {
 26093  			break
 26094  		}
 26095  		_ = x5.Args[1]
 26096  		if p != x5.Args[0] {
 26097  			break
 26098  		}
 26099  		if mem != x5.Args[1] {
 26100  			break
 26101  		}
 26102  		s6 := o5.Args[1]
 26103  		if s6.Op != OpPPC64SLDconst {
 26104  			break
 26105  		}
 26106  		if s6.AuxInt != 8 {
 26107  			break
 26108  		}
 26109  		x6 := s6.Args[0]
 26110  		if x6.Op != OpPPC64MOVBZload {
 26111  			break
 26112  		}
 26113  		i6 := x6.AuxInt
 26114  		if x6.Aux != s {
 26115  			break
 26116  		}
 26117  		_ = x6.Args[1]
 26118  		if p != x6.Args[0] {
 26119  			break
 26120  		}
 26121  		if mem != x6.Args[1] {
 26122  			break
 26123  		}
 26124  		x7 := v.Args[1]
 26125  		if x7.Op != OpPPC64MOVBZload {
 26126  			break
 26127  		}
 26128  		i7 := x7.AuxInt
 26129  		if x7.Aux != s {
 26130  			break
 26131  		}
 26132  		_ = x7.Args[1]
 26133  		if p != x7.Args[0] {
 26134  			break
 26135  		}
 26136  		if mem != x7.Args[1] {
 26137  			break
 26138  		}
 26139  		if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 26140  			break
 26141  		}
 26142  		b = mergePoint(b, x3, x4, x5, x6, x7)
 26143  		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 26144  		v.reset(OpCopy)
 26145  		v.AddArg(v0)
 26146  		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 26147  		v1.AuxInt = i0
 26148  		v1.Aux = s
 26149  		v1.AddArg(p)
 26150  		v0.AddArg(v1)
 26151  		v0.AddArg(mem)
 26152  		return true
 26153  	}
 26154  	return false
 26155  }
 26156  func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
 26157  	// match: (ORN x (MOVDconst [-1]))
 26158  	// cond:
 26159  	// result: x
 26160  	for {
 26161  		_ = v.Args[1]
 26162  		x := v.Args[0]
 26163  		v_1 := v.Args[1]
 26164  		if v_1.Op != OpPPC64MOVDconst {
 26165  			break
 26166  		}
 26167  		if v_1.AuxInt != -1 {
 26168  			break
 26169  		}
 26170  		v.reset(OpCopy)
 26171  		v.Type = x.Type
 26172  		v.AddArg(x)
 26173  		return true
 26174  	}
 26175  	return false
 26176  }
 26177  func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
 26178  	// match: (ORconst [c] (ORconst [d] x))
 26179  	// cond:
 26180  	// result: (ORconst [c|d] x)
 26181  	for {
 26182  		c := v.AuxInt
 26183  		v_0 := v.Args[0]
 26184  		if v_0.Op != OpPPC64ORconst {
 26185  			break
 26186  		}
 26187  		d := v_0.AuxInt
 26188  		x := v_0.Args[0]
 26189  		v.reset(OpPPC64ORconst)
 26190  		v.AuxInt = c | d
 26191  		v.AddArg(x)
 26192  		return true
 26193  	}
 26194  	// match: (ORconst [-1] _)
 26195  	// cond:
 26196  	// result: (MOVDconst [-1])
 26197  	for {
 26198  		if v.AuxInt != -1 {
 26199  			break
 26200  		}
 26201  		v.reset(OpPPC64MOVDconst)
 26202  		v.AuxInt = -1
 26203  		return true
 26204  	}
 26205  	// match: (ORconst [0] x)
 26206  	// cond:
 26207  	// result: x
 26208  	for {
 26209  		if v.AuxInt != 0 {
 26210  			break
 26211  		}
 26212  		x := v.Args[0]
 26213  		v.reset(OpCopy)
 26214  		v.Type = x.Type
 26215  		v.AddArg(x)
 26216  		return true
 26217  	}
 26218  	return false
 26219  }
 26220  func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
 26221  	// match: (SUB x (MOVDconst [c]))
 26222  	// cond: is32Bit(-c)
 26223  	// result: (ADDconst [-c] x)
 26224  	for {
 26225  		_ = v.Args[1]
 26226  		x := v.Args[0]
 26227  		v_1 := v.Args[1]
 26228  		if v_1.Op != OpPPC64MOVDconst {
 26229  			break
 26230  		}
 26231  		c := v_1.AuxInt
 26232  		if !(is32Bit(-c)) {
 26233  			break
 26234  		}
 26235  		v.reset(OpPPC64ADDconst)
 26236  		v.AuxInt = -c
 26237  		v.AddArg(x)
 26238  		return true
 26239  	}
 26240  	return false
 26241  }
 26242  func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
 26243  	b := v.Block
 26244  	_ = b
 26245  	typ := &b.Func.Config.Types
 26246  	_ = typ
 26247  	// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
 26248  	// cond: d == 64-c
 26249  	// result: (ROTLconst [c] x)
 26250  	for {
 26251  		_ = v.Args[1]
 26252  		v_0 := v.Args[0]
 26253  		if v_0.Op != OpPPC64SLDconst {
 26254  			break
 26255  		}
 26256  		c := v_0.AuxInt
 26257  		x := v_0.Args[0]
 26258  		v_1 := v.Args[1]
 26259  		if v_1.Op != OpPPC64SRDconst {
 26260  			break
 26261  		}
 26262  		d := v_1.AuxInt
 26263  		if x != v_1.Args[0] {
 26264  			break
 26265  		}
 26266  		if !(d == 64-c) {
 26267  			break
 26268  		}
 26269  		v.reset(OpPPC64ROTLconst)
 26270  		v.AuxInt = c
 26271  		v.AddArg(x)
 26272  		return true
 26273  	}
 26274  	// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
 26275  	// cond: d == 64-c
 26276  	// result: (ROTLconst [c] x)
 26277  	for {
 26278  		_ = v.Args[1]
 26279  		v_0 := v.Args[0]
 26280  		if v_0.Op != OpPPC64SRDconst {
 26281  			break
 26282  		}
 26283  		d := v_0.AuxInt
 26284  		x := v_0.Args[0]
 26285  		v_1 := v.Args[1]
 26286  		if v_1.Op != OpPPC64SLDconst {
 26287  			break
 26288  		}
 26289  		c := v_1.AuxInt
 26290  		if x != v_1.Args[0] {
 26291  			break
 26292  		}
 26293  		if !(d == 64-c) {
 26294  			break
 26295  		}
 26296  		v.reset(OpPPC64ROTLconst)
 26297  		v.AuxInt = c
 26298  		v.AddArg(x)
 26299  		return true
 26300  	}
 26301  	// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
 26302  	// cond: d == 32-c
 26303  	// result: (ROTLWconst [c] x)
 26304  	for {
 26305  		_ = v.Args[1]
 26306  		v_0 := v.Args[0]
 26307  		if v_0.Op != OpPPC64SLWconst {
 26308  			break
 26309  		}
 26310  		c := v_0.AuxInt
 26311  		x := v_0.Args[0]
 26312  		v_1 := v.Args[1]
 26313  		if v_1.Op != OpPPC64SRWconst {
 26314  			break
 26315  		}
 26316  		d := v_1.AuxInt
 26317  		if x != v_1.Args[0] {
 26318  			break
 26319  		}
 26320  		if !(d == 32-c) {
 26321  			break
 26322  		}
 26323  		v.reset(OpPPC64ROTLWconst)
 26324  		v.AuxInt = c
 26325  		v.AddArg(x)
 26326  		return true
 26327  	}
 26328  	// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
 26329  	// cond: d == 32-c
 26330  	// result: (ROTLWconst [c] x)
 26331  	for {
 26332  		_ = v.Args[1]
 26333  		v_0 := v.Args[0]
 26334  		if v_0.Op != OpPPC64SRWconst {
 26335  			break
 26336  		}
 26337  		d := v_0.AuxInt
 26338  		x := v_0.Args[0]
 26339  		v_1 := v.Args[1]
 26340  		if v_1.Op != OpPPC64SLWconst {
 26341  			break
 26342  		}
 26343  		c := v_1.AuxInt
 26344  		if x != v_1.Args[0] {
 26345  			break
 26346  		}
 26347  		if !(d == 32-c) {
 26348  			break
 26349  		}
 26350  		v.reset(OpPPC64ROTLWconst)
 26351  		v.AuxInt = c
 26352  		v.AddArg(x)
 26353  		return true
 26354  	}
 26355  	// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 26356  	// cond:
 26357  	// result: (ROTL x y)
 26358  	for {
 26359  		_ = v.Args[1]
 26360  		v_0 := v.Args[0]
 26361  		if v_0.Op != OpPPC64SLD {
 26362  			break
 26363  		}
 26364  		_ = v_0.Args[1]
 26365  		x := v_0.Args[0]
 26366  		v_0_1 := v_0.Args[1]
 26367  		if v_0_1.Op != OpPPC64ANDconst {
 26368  			break
 26369  		}
 26370  		if v_0_1.Type != typ.Int64 {
 26371  			break
 26372  		}
 26373  		if v_0_1.AuxInt != 63 {
 26374  			break
 26375  		}
 26376  		y := v_0_1.Args[0]
 26377  		v_1 := v.Args[1]
 26378  		if v_1.Op != OpPPC64SRD {
 26379  			break
 26380  		}
 26381  		_ = v_1.Args[1]
 26382  		if x != v_1.Args[0] {
 26383  			break
 26384  		}
 26385  		v_1_1 := v_1.Args[1]
 26386  		if v_1_1.Op != OpPPC64SUB {
 26387  			break
 26388  		}
 26389  		if v_1_1.Type != typ.UInt {
 26390  			break
 26391  		}
 26392  		_ = v_1_1.Args[1]
 26393  		v_1_1_0 := v_1_1.Args[0]
 26394  		if v_1_1_0.Op != OpPPC64MOVDconst {
 26395  			break
 26396  		}
 26397  		if v_1_1_0.AuxInt != 64 {
 26398  			break
 26399  		}
 26400  		v_1_1_1 := v_1_1.Args[1]
 26401  		if v_1_1_1.Op != OpPPC64ANDconst {
 26402  			break
 26403  		}
 26404  		if v_1_1_1.Type != typ.UInt {
 26405  			break
 26406  		}
 26407  		if v_1_1_1.AuxInt != 63 {
 26408  			break
 26409  		}
 26410  		if y != v_1_1_1.Args[0] {
 26411  			break
 26412  		}
 26413  		v.reset(OpPPC64ROTL)
 26414  		v.AddArg(x)
 26415  		v.AddArg(y)
 26416  		return true
 26417  	}
 26418  	// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 26419  	// cond:
 26420  	// result: (ROTL x y)
 26421  	for {
 26422  		_ = v.Args[1]
 26423  		v_0 := v.Args[0]
 26424  		if v_0.Op != OpPPC64SRD {
 26425  			break
 26426  		}
 26427  		_ = v_0.Args[1]
 26428  		x := v_0.Args[0]
 26429  		v_0_1 := v_0.Args[1]
 26430  		if v_0_1.Op != OpPPC64SUB {
 26431  			break
 26432  		}
 26433  		if v_0_1.Type != typ.UInt {
 26434  			break
 26435  		}
 26436  		_ = v_0_1.Args[1]
 26437  		v_0_1_0 := v_0_1.Args[0]
 26438  		if v_0_1_0.Op != OpPPC64MOVDconst {
 26439  			break
 26440  		}
 26441  		if v_0_1_0.AuxInt != 64 {
 26442  			break
 26443  		}
 26444  		v_0_1_1 := v_0_1.Args[1]
 26445  		if v_0_1_1.Op != OpPPC64ANDconst {
 26446  			break
 26447  		}
 26448  		if v_0_1_1.Type != typ.UInt {
 26449  			break
 26450  		}
 26451  		if v_0_1_1.AuxInt != 63 {
 26452  			break
 26453  		}
 26454  		y := v_0_1_1.Args[0]
 26455  		v_1 := v.Args[1]
 26456  		if v_1.Op != OpPPC64SLD {
 26457  			break
 26458  		}
 26459  		_ = v_1.Args[1]
 26460  		if x != v_1.Args[0] {
 26461  			break
 26462  		}
 26463  		v_1_1 := v_1.Args[1]
 26464  		if v_1_1.Op != OpPPC64ANDconst {
 26465  			break
 26466  		}
 26467  		if v_1_1.Type != typ.Int64 {
 26468  			break
 26469  		}
 26470  		if v_1_1.AuxInt != 63 {
 26471  			break
 26472  		}
 26473  		if y != v_1_1.Args[0] {
 26474  			break
 26475  		}
 26476  		v.reset(OpPPC64ROTL)
 26477  		v.AddArg(x)
 26478  		v.AddArg(y)
 26479  		return true
 26480  	}
 26481  	// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 26482  	// cond:
 26483  	// result: (ROTLW x y)
 26484  	for {
 26485  		_ = v.Args[1]
 26486  		v_0 := v.Args[0]
 26487  		if v_0.Op != OpPPC64SLW {
 26488  			break
 26489  		}
 26490  		_ = v_0.Args[1]
 26491  		x := v_0.Args[0]
 26492  		v_0_1 := v_0.Args[1]
 26493  		if v_0_1.Op != OpPPC64ANDconst {
 26494  			break
 26495  		}
 26496  		if v_0_1.Type != typ.Int32 {
 26497  			break
 26498  		}
 26499  		if v_0_1.AuxInt != 31 {
 26500  			break
 26501  		}
 26502  		y := v_0_1.Args[0]
 26503  		v_1 := v.Args[1]
 26504  		if v_1.Op != OpPPC64SRW {
 26505  			break
 26506  		}
 26507  		_ = v_1.Args[1]
 26508  		if x != v_1.Args[0] {
 26509  			break
 26510  		}
 26511  		v_1_1 := v_1.Args[1]
 26512  		if v_1_1.Op != OpPPC64SUB {
 26513  			break
 26514  		}
 26515  		if v_1_1.Type != typ.UInt {
 26516  			break
 26517  		}
 26518  		_ = v_1_1.Args[1]
 26519  		v_1_1_0 := v_1_1.Args[0]
 26520  		if v_1_1_0.Op != OpPPC64MOVDconst {
 26521  			break
 26522  		}
 26523  		if v_1_1_0.AuxInt != 32 {
 26524  			break
 26525  		}
 26526  		v_1_1_1 := v_1_1.Args[1]
 26527  		if v_1_1_1.Op != OpPPC64ANDconst {
 26528  			break
 26529  		}
 26530  		if v_1_1_1.Type != typ.UInt {
 26531  			break
 26532  		}
 26533  		if v_1_1_1.AuxInt != 31 {
 26534  			break
 26535  		}
 26536  		if y != v_1_1_1.Args[0] {
 26537  			break
 26538  		}
 26539  		v.reset(OpPPC64ROTLW)
 26540  		v.AddArg(x)
 26541  		v.AddArg(y)
 26542  		return true
 26543  	}
 26544  	// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 26545  	// cond:
 26546  	// result: (ROTLW x y)
 26547  	for {
 26548  		_ = v.Args[1]
 26549  		v_0 := v.Args[0]
 26550  		if v_0.Op != OpPPC64SRW {
 26551  			break
 26552  		}
 26553  		_ = v_0.Args[1]
 26554  		x := v_0.Args[0]
 26555  		v_0_1 := v_0.Args[1]
 26556  		if v_0_1.Op != OpPPC64SUB {
 26557  			break
 26558  		}
 26559  		if v_0_1.Type != typ.UInt {
 26560  			break
 26561  		}
 26562  		_ = v_0_1.Args[1]
 26563  		v_0_1_0 := v_0_1.Args[0]
 26564  		if v_0_1_0.Op != OpPPC64MOVDconst {
 26565  			break
 26566  		}
 26567  		if v_0_1_0.AuxInt != 32 {
 26568  			break
 26569  		}
 26570  		v_0_1_1 := v_0_1.Args[1]
 26571  		if v_0_1_1.Op != OpPPC64ANDconst {
 26572  			break
 26573  		}
 26574  		if v_0_1_1.Type != typ.UInt {
 26575  			break
 26576  		}
 26577  		if v_0_1_1.AuxInt != 31 {
 26578  			break
 26579  		}
 26580  		y := v_0_1_1.Args[0]
 26581  		v_1 := v.Args[1]
 26582  		if v_1.Op != OpPPC64SLW {
 26583  			break
 26584  		}
 26585  		_ = v_1.Args[1]
 26586  		if x != v_1.Args[0] {
 26587  			break
 26588  		}
 26589  		v_1_1 := v_1.Args[1]
 26590  		if v_1_1.Op != OpPPC64ANDconst {
 26591  			break
 26592  		}
 26593  		if v_1_1.Type != typ.Int32 {
 26594  			break
 26595  		}
 26596  		if v_1_1.AuxInt != 31 {
 26597  			break
 26598  		}
 26599  		if y != v_1_1.Args[0] {
 26600  			break
 26601  		}
 26602  		v.reset(OpPPC64ROTLW)
 26603  		v.AddArg(x)
 26604  		v.AddArg(y)
 26605  		return true
 26606  	}
 26607  	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
 26608  	// cond:
 26609  	// result: (MOVDconst [c^d])
 26610  	for {
 26611  		_ = v.Args[1]
 26612  		v_0 := v.Args[0]
 26613  		if v_0.Op != OpPPC64MOVDconst {
 26614  			break
 26615  		}
 26616  		c := v_0.AuxInt
 26617  		v_1 := v.Args[1]
 26618  		if v_1.Op != OpPPC64MOVDconst {
 26619  			break
 26620  		}
 26621  		d := v_1.AuxInt
 26622  		v.reset(OpPPC64MOVDconst)
 26623  		v.AuxInt = c ^ d
 26624  		return true
 26625  	}
 26626  	// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
 26627  	// cond:
 26628  	// result: (MOVDconst [c^d])
 26629  	for {
 26630  		_ = v.Args[1]
 26631  		v_0 := v.Args[0]
 26632  		if v_0.Op != OpPPC64MOVDconst {
 26633  			break
 26634  		}
 26635  		d := v_0.AuxInt
 26636  		v_1 := v.Args[1]
 26637  		if v_1.Op != OpPPC64MOVDconst {
 26638  			break
 26639  		}
 26640  		c := v_1.AuxInt
 26641  		v.reset(OpPPC64MOVDconst)
 26642  		v.AuxInt = c ^ d
 26643  		return true
 26644  	}
 26645  	return false
 26646  }
 26647  func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
 26648  	// match: (XOR x (MOVDconst [c]))
 26649  	// cond: isU32Bit(c)
 26650  	// result: (XORconst [c] x)
 26651  	for {
 26652  		_ = v.Args[1]
 26653  		x := v.Args[0]
 26654  		v_1 := v.Args[1]
 26655  		if v_1.Op != OpPPC64MOVDconst {
 26656  			break
 26657  		}
 26658  		c := v_1.AuxInt
 26659  		if !(isU32Bit(c)) {
 26660  			break
 26661  		}
 26662  		v.reset(OpPPC64XORconst)
 26663  		v.AuxInt = c
 26664  		v.AddArg(x)
 26665  		return true
 26666  	}
 26667  	// match: (XOR (MOVDconst [c]) x)
 26668  	// cond: isU32Bit(c)
 26669  	// result: (XORconst [c] x)
 26670  	for {
 26671  		_ = v.Args[1]
 26672  		v_0 := v.Args[0]
 26673  		if v_0.Op != OpPPC64MOVDconst {
 26674  			break
 26675  		}
 26676  		c := v_0.AuxInt
 26677  		x := v.Args[1]
 26678  		if !(isU32Bit(c)) {
 26679  			break
 26680  		}
 26681  		v.reset(OpPPC64XORconst)
 26682  		v.AuxInt = c
 26683  		v.AddArg(x)
 26684  		return true
 26685  	}
 26686  	return false
 26687  }
 26688  func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
 26689  	// match: (XORconst [c] (XORconst [d] x))
 26690  	// cond:
 26691  	// result: (XORconst [c^d] x)
 26692  	for {
 26693  		c := v.AuxInt
 26694  		v_0 := v.Args[0]
 26695  		if v_0.Op != OpPPC64XORconst {
 26696  			break
 26697  		}
 26698  		d := v_0.AuxInt
 26699  		x := v_0.Args[0]
 26700  		v.reset(OpPPC64XORconst)
 26701  		v.AuxInt = c ^ d
 26702  		v.AddArg(x)
 26703  		return true
 26704  	}
 26705  	// match: (XORconst [0] x)
 26706  	// cond:
 26707  	// result: x
 26708  	for {
 26709  		if v.AuxInt != 0 {
 26710  			break
 26711  		}
 26712  		x := v.Args[0]
 26713  		v.reset(OpCopy)
 26714  		v.Type = x.Type
 26715  		v.AddArg(x)
 26716  		return true
 26717  	}
 26718  	return false
 26719  }
 26720  func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
 26721  	b := v.Block
 26722  	_ = b
 26723  	typ := &b.Func.Config.Types
 26724  	_ = typ
 26725  	// match: (PopCount16 x)
 26726  	// cond:
 26727  	// result: (POPCNTW (MOVHZreg x))
 26728  	for {
 26729  		x := v.Args[0]
 26730  		v.reset(OpPPC64POPCNTW)
 26731  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26732  		v0.AddArg(x)
 26733  		v.AddArg(v0)
 26734  		return true
 26735  	}
 26736  }
 26737  func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
 26738  	b := v.Block
 26739  	_ = b
 26740  	typ := &b.Func.Config.Types
 26741  	_ = typ
 26742  	// match: (PopCount32 x)
 26743  	// cond:
 26744  	// result: (POPCNTW (MOVWZreg x))
 26745  	for {
 26746  		x := v.Args[0]
 26747  		v.reset(OpPPC64POPCNTW)
 26748  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 26749  		v0.AddArg(x)
 26750  		v.AddArg(v0)
 26751  		return true
 26752  	}
 26753  }
 26754  func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
 26755  	// match: (PopCount64 x)
 26756  	// cond:
 26757  	// result: (POPCNTD x)
 26758  	for {
 26759  		x := v.Args[0]
 26760  		v.reset(OpPPC64POPCNTD)
 26761  		v.AddArg(x)
 26762  		return true
 26763  	}
 26764  }
 26765  func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
 26766  	b := v.Block
 26767  	_ = b
 26768  	typ := &b.Func.Config.Types
 26769  	_ = typ
 26770  	// match: (PopCount8 x)
 26771  	// cond:
 26772  	// result: (POPCNTB (MOVBZreg x))
 26773  	for {
 26774  		x := v.Args[0]
 26775  		v.reset(OpPPC64POPCNTB)
 26776  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 26777  		v0.AddArg(x)
 26778  		v.AddArg(v0)
 26779  		return true
 26780  	}
 26781  }
 26782  func rewriteValuePPC64_OpRound_0(v *Value) bool {
 26783  	// match: (Round x)
 26784  	// cond:
 26785  	// result: (FROUND x)
 26786  	for {
 26787  		x := v.Args[0]
 26788  		v.reset(OpPPC64FROUND)
 26789  		v.AddArg(x)
 26790  		return true
 26791  	}
 26792  }
 26793  func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
 26794  	// match: (Round32F x)
 26795  	// cond:
 26796  	// result: (LoweredRound32F x)
 26797  	for {
 26798  		x := v.Args[0]
 26799  		v.reset(OpPPC64LoweredRound32F)
 26800  		v.AddArg(x)
 26801  		return true
 26802  	}
 26803  }
 26804  func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
 26805  	// match: (Round64F x)
 26806  	// cond:
 26807  	// result: (LoweredRound64F x)
 26808  	for {
 26809  		x := v.Args[0]
 26810  		v.reset(OpPPC64LoweredRound64F)
 26811  		v.AddArg(x)
 26812  		return true
 26813  	}
 26814  }
 26815  func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
 26816  	b := v.Block
 26817  	_ = b
 26818  	typ := &b.Func.Config.Types
 26819  	_ = typ
 26820  	// match: (Rsh16Ux16 x y)
 26821  	// cond: shiftIsBounded(v)
 26822  	// result: (SRW (MOVHZreg x) y)
 26823  	for {
 26824  		_ = v.Args[1]
 26825  		x := v.Args[0]
 26826  		y := v.Args[1]
 26827  		if !(shiftIsBounded(v)) {
 26828  			break
 26829  		}
 26830  		v.reset(OpPPC64SRW)
 26831  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26832  		v0.AddArg(x)
 26833  		v.AddArg(v0)
 26834  		v.AddArg(y)
 26835  		return true
 26836  	}
 26837  	// match: (Rsh16Ux16 x y)
 26838  	// cond:
 26839  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 26840  	for {
 26841  		_ = v.Args[1]
 26842  		x := v.Args[0]
 26843  		y := v.Args[1]
 26844  		v.reset(OpPPC64SRW)
 26845  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26846  		v0.AddArg(x)
 26847  		v.AddArg(v0)
 26848  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26849  		v1.AddArg(y)
 26850  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26851  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26852  		v3.AuxInt = -16
 26853  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 26854  		v4.AddArg(y)
 26855  		v3.AddArg(v4)
 26856  		v2.AddArg(v3)
 26857  		v1.AddArg(v2)
 26858  		v.AddArg(v1)
 26859  		return true
 26860  	}
 26861  }
 26862  func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
 26863  	b := v.Block
 26864  	_ = b
 26865  	typ := &b.Func.Config.Types
 26866  	_ = typ
 26867  	// match: (Rsh16Ux32 x (Const64 [c]))
 26868  	// cond: uint32(c) < 16
 26869  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26870  	for {
 26871  		_ = v.Args[1]
 26872  		x := v.Args[0]
 26873  		v_1 := v.Args[1]
 26874  		if v_1.Op != OpConst64 {
 26875  			break
 26876  		}
 26877  		c := v_1.AuxInt
 26878  		if !(uint32(c) < 16) {
 26879  			break
 26880  		}
 26881  		v.reset(OpPPC64SRWconst)
 26882  		v.AuxInt = c
 26883  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26884  		v0.AddArg(x)
 26885  		v.AddArg(v0)
 26886  		return true
 26887  	}
 26888  	// match: (Rsh16Ux32 x (MOVDconst [c]))
 26889  	// cond: uint32(c) < 16
 26890  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26891  	for {
 26892  		_ = v.Args[1]
 26893  		x := v.Args[0]
 26894  		v_1 := v.Args[1]
 26895  		if v_1.Op != OpPPC64MOVDconst {
 26896  			break
 26897  		}
 26898  		c := v_1.AuxInt
 26899  		if !(uint32(c) < 16) {
 26900  			break
 26901  		}
 26902  		v.reset(OpPPC64SRWconst)
 26903  		v.AuxInt = c
 26904  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26905  		v0.AddArg(x)
 26906  		v.AddArg(v0)
 26907  		return true
 26908  	}
 26909  	// match: (Rsh16Ux32 x y)
 26910  	// cond: shiftIsBounded(v)
 26911  	// result: (SRW (MOVHZreg x) y)
 26912  	for {
 26913  		_ = v.Args[1]
 26914  		x := v.Args[0]
 26915  		y := v.Args[1]
 26916  		if !(shiftIsBounded(v)) {
 26917  			break
 26918  		}
 26919  		v.reset(OpPPC64SRW)
 26920  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26921  		v0.AddArg(x)
 26922  		v.AddArg(v0)
 26923  		v.AddArg(y)
 26924  		return true
 26925  	}
 26926  	// match: (Rsh16Ux32 x y)
 26927  	// cond:
 26928  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 26929  	for {
 26930  		_ = v.Args[1]
 26931  		x := v.Args[0]
 26932  		y := v.Args[1]
 26933  		v.reset(OpPPC64SRW)
 26934  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26935  		v0.AddArg(x)
 26936  		v.AddArg(v0)
 26937  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26938  		v1.AddArg(y)
 26939  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26940  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26941  		v3.AuxInt = -16
 26942  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 26943  		v4.AddArg(y)
 26944  		v3.AddArg(v4)
 26945  		v2.AddArg(v3)
 26946  		v1.AddArg(v2)
 26947  		v.AddArg(v1)
 26948  		return true
 26949  	}
 26950  }
 26951  func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
 26952  	b := v.Block
 26953  	_ = b
 26954  	typ := &b.Func.Config.Types
 26955  	_ = typ
 26956  	// match: (Rsh16Ux64 x (Const64 [c]))
 26957  	// cond: uint64(c) < 16
 26958  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26959  	for {
 26960  		_ = v.Args[1]
 26961  		x := v.Args[0]
 26962  		v_1 := v.Args[1]
 26963  		if v_1.Op != OpConst64 {
 26964  			break
 26965  		}
 26966  		c := v_1.AuxInt
 26967  		if !(uint64(c) < 16) {
 26968  			break
 26969  		}
 26970  		v.reset(OpPPC64SRWconst)
 26971  		v.AuxInt = c
 26972  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26973  		v0.AddArg(x)
 26974  		v.AddArg(v0)
 26975  		return true
 26976  	}
 26977  	// match: (Rsh16Ux64 _ (Const64 [c]))
 26978  	// cond: uint64(c) >= 16
 26979  	// result: (MOVDconst [0])
 26980  	for {
 26981  		_ = v.Args[1]
 26982  		v_1 := v.Args[1]
 26983  		if v_1.Op != OpConst64 {
 26984  			break
 26985  		}
 26986  		c := v_1.AuxInt
 26987  		if !(uint64(c) >= 16) {
 26988  			break
 26989  		}
 26990  		v.reset(OpPPC64MOVDconst)
 26991  		v.AuxInt = 0
 26992  		return true
 26993  	}
 26994  	// match: (Rsh16Ux64 x (MOVDconst [c]))
 26995  	// cond: uint64(c) < 16
 26996  	// result: (SRWconst (ZeroExt16to32 x) [c])
 26997  	for {
 26998  		_ = v.Args[1]
 26999  		x := v.Args[0]
 27000  		v_1 := v.Args[1]
 27001  		if v_1.Op != OpPPC64MOVDconst {
 27002  			break
 27003  		}
 27004  		c := v_1.AuxInt
 27005  		if !(uint64(c) < 16) {
 27006  			break
 27007  		}
 27008  		v.reset(OpPPC64SRWconst)
 27009  		v.AuxInt = c
 27010  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27011  		v0.AddArg(x)
 27012  		v.AddArg(v0)
 27013  		return true
 27014  	}
 27015  	// match: (Rsh16Ux64 x y)
 27016  	// cond: shiftIsBounded(v)
 27017  	// result: (SRW (MOVHZreg x) y)
 27018  	for {
 27019  		_ = v.Args[1]
 27020  		x := v.Args[0]
 27021  		y := v.Args[1]
 27022  		if !(shiftIsBounded(v)) {
 27023  			break
 27024  		}
 27025  		v.reset(OpPPC64SRW)
 27026  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 27027  		v0.AddArg(x)
 27028  		v.AddArg(v0)
 27029  		v.AddArg(y)
 27030  		return true
 27031  	}
 27032  	// match: (Rsh16Ux64 x y)
 27033  	// cond:
 27034  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 27035  	for {
 27036  		_ = v.Args[1]
 27037  		x := v.Args[0]
 27038  		y := v.Args[1]
 27039  		v.reset(OpPPC64SRW)
 27040  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27041  		v0.AddArg(x)
 27042  		v.AddArg(v0)
 27043  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27044  		v1.AddArg(y)
 27045  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27046  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27047  		v3.AuxInt = -16
 27048  		v3.AddArg(y)
 27049  		v2.AddArg(v3)
 27050  		v1.AddArg(v2)
 27051  		v.AddArg(v1)
 27052  		return true
 27053  	}
 27054  }
 27055  func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
 27056  	b := v.Block
 27057  	_ = b
 27058  	typ := &b.Func.Config.Types
 27059  	_ = typ
 27060  	// match: (Rsh16Ux8 x y)
 27061  	// cond: shiftIsBounded(v)
 27062  	// result: (SRW (MOVHZreg x) y)
 27063  	for {
 27064  		_ = v.Args[1]
 27065  		x := v.Args[0]
 27066  		y := v.Args[1]
 27067  		if !(shiftIsBounded(v)) {
 27068  			break
 27069  		}
 27070  		v.reset(OpPPC64SRW)
 27071  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 27072  		v0.AddArg(x)
 27073  		v.AddArg(v0)
 27074  		v.AddArg(y)
 27075  		return true
 27076  	}
 27077  	// match: (Rsh16Ux8 x y)
 27078  	// cond:
 27079  	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 27080  	for {
 27081  		_ = v.Args[1]
 27082  		x := v.Args[0]
 27083  		y := v.Args[1]
 27084  		v.reset(OpPPC64SRW)
 27085  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 27086  		v0.AddArg(x)
 27087  		v.AddArg(v0)
 27088  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27089  		v1.AddArg(y)
 27090  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27091  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27092  		v3.AuxInt = -16
 27093  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27094  		v4.AddArg(y)
 27095  		v3.AddArg(v4)
 27096  		v2.AddArg(v3)
 27097  		v1.AddArg(v2)
 27098  		v.AddArg(v1)
 27099  		return true
 27100  	}
 27101  }
 27102  func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
 27103  	b := v.Block
 27104  	_ = b
 27105  	typ := &b.Func.Config.Types
 27106  	_ = typ
 27107  	// match: (Rsh16x16 x y)
 27108  	// cond: shiftIsBounded(v)
 27109  	// result: (SRAW (MOVHreg x) y)
 27110  	for {
 27111  		_ = v.Args[1]
 27112  		x := v.Args[0]
 27113  		y := v.Args[1]
 27114  		if !(shiftIsBounded(v)) {
 27115  			break
 27116  		}
 27117  		v.reset(OpPPC64SRAW)
 27118  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27119  		v0.AddArg(x)
 27120  		v.AddArg(v0)
 27121  		v.AddArg(y)
 27122  		return true
 27123  	}
 27124  	// match: (Rsh16x16 x y)
 27125  	// cond:
 27126  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 27127  	for {
 27128  		_ = v.Args[1]
 27129  		x := v.Args[0]
 27130  		y := v.Args[1]
 27131  		v.reset(OpPPC64SRAW)
 27132  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27133  		v0.AddArg(x)
 27134  		v.AddArg(v0)
 27135  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27136  		v1.AddArg(y)
 27137  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27138  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27139  		v3.AuxInt = -16
 27140  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27141  		v4.AddArg(y)
 27142  		v3.AddArg(v4)
 27143  		v2.AddArg(v3)
 27144  		v1.AddArg(v2)
 27145  		v.AddArg(v1)
 27146  		return true
 27147  	}
 27148  }
 27149  func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
 27150  	b := v.Block
 27151  	_ = b
 27152  	typ := &b.Func.Config.Types
 27153  	_ = typ
 27154  	// match: (Rsh16x32 x (Const64 [c]))
 27155  	// cond: uint32(c) < 16
 27156  	// result: (SRAWconst (SignExt16to32 x) [c])
 27157  	for {
 27158  		_ = v.Args[1]
 27159  		x := v.Args[0]
 27160  		v_1 := v.Args[1]
 27161  		if v_1.Op != OpConst64 {
 27162  			break
 27163  		}
 27164  		c := v_1.AuxInt
 27165  		if !(uint32(c) < 16) {
 27166  			break
 27167  		}
 27168  		v.reset(OpPPC64SRAWconst)
 27169  		v.AuxInt = c
 27170  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27171  		v0.AddArg(x)
 27172  		v.AddArg(v0)
 27173  		return true
 27174  	}
 27175  	// match: (Rsh16x32 x (MOVDconst [c]))
 27176  	// cond: uint32(c) < 16
 27177  	// result: (SRAWconst (SignExt16to32 x) [c])
 27178  	for {
 27179  		_ = v.Args[1]
 27180  		x := v.Args[0]
 27181  		v_1 := v.Args[1]
 27182  		if v_1.Op != OpPPC64MOVDconst {
 27183  			break
 27184  		}
 27185  		c := v_1.AuxInt
 27186  		if !(uint32(c) < 16) {
 27187  			break
 27188  		}
 27189  		v.reset(OpPPC64SRAWconst)
 27190  		v.AuxInt = c
 27191  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27192  		v0.AddArg(x)
 27193  		v.AddArg(v0)
 27194  		return true
 27195  	}
 27196  	// match: (Rsh16x32 x y)
 27197  	// cond: shiftIsBounded(v)
 27198  	// result: (SRAW (MOVHreg x) y)
 27199  	for {
 27200  		_ = v.Args[1]
 27201  		x := v.Args[0]
 27202  		y := v.Args[1]
 27203  		if !(shiftIsBounded(v)) {
 27204  			break
 27205  		}
 27206  		v.reset(OpPPC64SRAW)
 27207  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27208  		v0.AddArg(x)
 27209  		v.AddArg(v0)
 27210  		v.AddArg(y)
 27211  		return true
 27212  	}
 27213  	// match: (Rsh16x32 x y)
 27214  	// cond:
 27215  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 27216  	for {
 27217  		_ = v.Args[1]
 27218  		x := v.Args[0]
 27219  		y := v.Args[1]
 27220  		v.reset(OpPPC64SRAW)
 27221  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27222  		v0.AddArg(x)
 27223  		v.AddArg(v0)
 27224  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27225  		v1.AddArg(y)
 27226  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27227  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27228  		v3.AuxInt = -16
 27229  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27230  		v4.AddArg(y)
 27231  		v3.AddArg(v4)
 27232  		v2.AddArg(v3)
 27233  		v1.AddArg(v2)
 27234  		v.AddArg(v1)
 27235  		return true
 27236  	}
 27237  }
 27238  func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
 27239  	b := v.Block
 27240  	_ = b
 27241  	typ := &b.Func.Config.Types
 27242  	_ = typ
 27243  	// match: (Rsh16x64 x (Const64 [c]))
 27244  	// cond: uint64(c) < 16
 27245  	// result: (SRAWconst (SignExt16to32 x) [c])
 27246  	for {
 27247  		_ = v.Args[1]
 27248  		x := v.Args[0]
 27249  		v_1 := v.Args[1]
 27250  		if v_1.Op != OpConst64 {
 27251  			break
 27252  		}
 27253  		c := v_1.AuxInt
 27254  		if !(uint64(c) < 16) {
 27255  			break
 27256  		}
 27257  		v.reset(OpPPC64SRAWconst)
 27258  		v.AuxInt = c
 27259  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27260  		v0.AddArg(x)
 27261  		v.AddArg(v0)
 27262  		return true
 27263  	}
 27264  	// match: (Rsh16x64 x (Const64 [c]))
 27265  	// cond: uint64(c) >= 16
 27266  	// result: (SRAWconst (SignExt16to32 x) [63])
 27267  	for {
 27268  		_ = v.Args[1]
 27269  		x := v.Args[0]
 27270  		v_1 := v.Args[1]
 27271  		if v_1.Op != OpConst64 {
 27272  			break
 27273  		}
 27274  		c := v_1.AuxInt
 27275  		if !(uint64(c) >= 16) {
 27276  			break
 27277  		}
 27278  		v.reset(OpPPC64SRAWconst)
 27279  		v.AuxInt = 63
 27280  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27281  		v0.AddArg(x)
 27282  		v.AddArg(v0)
 27283  		return true
 27284  	}
 27285  	// match: (Rsh16x64 x (MOVDconst [c]))
 27286  	// cond: uint64(c) < 16
 27287  	// result: (SRAWconst (SignExt16to32 x) [c])
 27288  	for {
 27289  		_ = v.Args[1]
 27290  		x := v.Args[0]
 27291  		v_1 := v.Args[1]
 27292  		if v_1.Op != OpPPC64MOVDconst {
 27293  			break
 27294  		}
 27295  		c := v_1.AuxInt
 27296  		if !(uint64(c) < 16) {
 27297  			break
 27298  		}
 27299  		v.reset(OpPPC64SRAWconst)
 27300  		v.AuxInt = c
 27301  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27302  		v0.AddArg(x)
 27303  		v.AddArg(v0)
 27304  		return true
 27305  	}
 27306  	// match: (Rsh16x64 x y)
 27307  	// cond: shiftIsBounded(v)
 27308  	// result: (SRAW (MOVHreg x) y)
 27309  	for {
 27310  		_ = v.Args[1]
 27311  		x := v.Args[0]
 27312  		y := v.Args[1]
 27313  		if !(shiftIsBounded(v)) {
 27314  			break
 27315  		}
 27316  		v.reset(OpPPC64SRAW)
 27317  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27318  		v0.AddArg(x)
 27319  		v.AddArg(v0)
 27320  		v.AddArg(y)
 27321  		return true
 27322  	}
 27323  	// match: (Rsh16x64 x y)
 27324  	// cond:
 27325  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 27326  	for {
 27327  		_ = v.Args[1]
 27328  		x := v.Args[0]
 27329  		y := v.Args[1]
 27330  		v.reset(OpPPC64SRAW)
 27331  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27332  		v0.AddArg(x)
 27333  		v.AddArg(v0)
 27334  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27335  		v1.AddArg(y)
 27336  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27337  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27338  		v3.AuxInt = -16
 27339  		v3.AddArg(y)
 27340  		v2.AddArg(v3)
 27341  		v1.AddArg(v2)
 27342  		v.AddArg(v1)
 27343  		return true
 27344  	}
 27345  }
 27346  func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
 27347  	b := v.Block
 27348  	_ = b
 27349  	typ := &b.Func.Config.Types
 27350  	_ = typ
 27351  	// match: (Rsh16x8 x y)
 27352  	// cond: shiftIsBounded(v)
 27353  	// result: (SRAW (MOVHreg x) y)
 27354  	for {
 27355  		_ = v.Args[1]
 27356  		x := v.Args[0]
 27357  		y := v.Args[1]
 27358  		if !(shiftIsBounded(v)) {
 27359  			break
 27360  		}
 27361  		v.reset(OpPPC64SRAW)
 27362  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 27363  		v0.AddArg(x)
 27364  		v.AddArg(v0)
 27365  		v.AddArg(y)
 27366  		return true
 27367  	}
 27368  	// match: (Rsh16x8 x y)
 27369  	// cond:
 27370  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 27371  	for {
 27372  		_ = v.Args[1]
 27373  		x := v.Args[0]
 27374  		y := v.Args[1]
 27375  		v.reset(OpPPC64SRAW)
 27376  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 27377  		v0.AddArg(x)
 27378  		v.AddArg(v0)
 27379  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27380  		v1.AddArg(y)
 27381  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27382  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27383  		v3.AuxInt = -16
 27384  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27385  		v4.AddArg(y)
 27386  		v3.AddArg(v4)
 27387  		v2.AddArg(v3)
 27388  		v1.AddArg(v2)
 27389  		v.AddArg(v1)
 27390  		return true
 27391  	}
 27392  }
 27393  func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
 27394  	b := v.Block
 27395  	_ = b
 27396  	typ := &b.Func.Config.Types
 27397  	_ = typ
 27398  	// match: (Rsh32Ux16 x y)
 27399  	// cond: shiftIsBounded(v)
 27400  	// result: (SRW x y)
 27401  	for {
 27402  		_ = v.Args[1]
 27403  		x := v.Args[0]
 27404  		y := v.Args[1]
 27405  		if !(shiftIsBounded(v)) {
 27406  			break
 27407  		}
 27408  		v.reset(OpPPC64SRW)
 27409  		v.AddArg(x)
 27410  		v.AddArg(y)
 27411  		return true
 27412  	}
 27413  	// match: (Rsh32Ux16 x y)
 27414  	// cond:
 27415  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 27416  	for {
 27417  		_ = v.Args[1]
 27418  		x := v.Args[0]
 27419  		y := v.Args[1]
 27420  		v.reset(OpPPC64SRW)
 27421  		v.AddArg(x)
 27422  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27423  		v0.AddArg(y)
 27424  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27425  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27426  		v2.AuxInt = -32
 27427  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27428  		v3.AddArg(y)
 27429  		v2.AddArg(v3)
 27430  		v1.AddArg(v2)
 27431  		v0.AddArg(v1)
 27432  		v.AddArg(v0)
 27433  		return true
 27434  	}
 27435  }
 27436  func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
 27437  	b := v.Block
 27438  	_ = b
 27439  	typ := &b.Func.Config.Types
 27440  	_ = typ
 27441  	// match: (Rsh32Ux32 x (Const64 [c]))
 27442  	// cond: uint32(c) < 32
 27443  	// result: (SRWconst x [c])
 27444  	for {
 27445  		_ = v.Args[1]
 27446  		x := v.Args[0]
 27447  		v_1 := v.Args[1]
 27448  		if v_1.Op != OpConst64 {
 27449  			break
 27450  		}
 27451  		c := v_1.AuxInt
 27452  		if !(uint32(c) < 32) {
 27453  			break
 27454  		}
 27455  		v.reset(OpPPC64SRWconst)
 27456  		v.AuxInt = c
 27457  		v.AddArg(x)
 27458  		return true
 27459  	}
 27460  	// match: (Rsh32Ux32 x (MOVDconst [c]))
 27461  	// cond: uint32(c) < 32
 27462  	// result: (SRWconst x [c])
 27463  	for {
 27464  		_ = v.Args[1]
 27465  		x := v.Args[0]
 27466  		v_1 := v.Args[1]
 27467  		if v_1.Op != OpPPC64MOVDconst {
 27468  			break
 27469  		}
 27470  		c := v_1.AuxInt
 27471  		if !(uint32(c) < 32) {
 27472  			break
 27473  		}
 27474  		v.reset(OpPPC64SRWconst)
 27475  		v.AuxInt = c
 27476  		v.AddArg(x)
 27477  		return true
 27478  	}
 27479  	// match: (Rsh32Ux32 x y)
 27480  	// cond: shiftIsBounded(v)
 27481  	// result: (SRW x y)
 27482  	for {
 27483  		_ = v.Args[1]
 27484  		x := v.Args[0]
 27485  		y := v.Args[1]
 27486  		if !(shiftIsBounded(v)) {
 27487  			break
 27488  		}
 27489  		v.reset(OpPPC64SRW)
 27490  		v.AddArg(x)
 27491  		v.AddArg(y)
 27492  		return true
 27493  	}
 27494  	// match: (Rsh32Ux32 x y)
 27495  	// cond:
 27496  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27497  	for {
 27498  		_ = v.Args[1]
 27499  		x := v.Args[0]
 27500  		y := v.Args[1]
 27501  		v.reset(OpPPC64SRW)
 27502  		v.AddArg(x)
 27503  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27504  		v0.AddArg(y)
 27505  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27506  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27507  		v2.AuxInt = -32
 27508  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27509  		v3.AddArg(y)
 27510  		v2.AddArg(v3)
 27511  		v1.AddArg(v2)
 27512  		v0.AddArg(v1)
 27513  		v.AddArg(v0)
 27514  		return true
 27515  	}
 27516  }
 27517  func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
 27518  	b := v.Block
 27519  	_ = b
 27520  	typ := &b.Func.Config.Types
 27521  	_ = typ
 27522  	// match: (Rsh32Ux64 x (Const64 [c]))
 27523  	// cond: uint64(c) < 32
 27524  	// result: (SRWconst x [c])
 27525  	for {
 27526  		_ = v.Args[1]
 27527  		x := v.Args[0]
 27528  		v_1 := v.Args[1]
 27529  		if v_1.Op != OpConst64 {
 27530  			break
 27531  		}
 27532  		c := v_1.AuxInt
 27533  		if !(uint64(c) < 32) {
 27534  			break
 27535  		}
 27536  		v.reset(OpPPC64SRWconst)
 27537  		v.AuxInt = c
 27538  		v.AddArg(x)
 27539  		return true
 27540  	}
 27541  	// match: (Rsh32Ux64 _ (Const64 [c]))
 27542  	// cond: uint64(c) >= 32
 27543  	// result: (MOVDconst [0])
 27544  	for {
 27545  		_ = v.Args[1]
 27546  		v_1 := v.Args[1]
 27547  		if v_1.Op != OpConst64 {
 27548  			break
 27549  		}
 27550  		c := v_1.AuxInt
 27551  		if !(uint64(c) >= 32) {
 27552  			break
 27553  		}
 27554  		v.reset(OpPPC64MOVDconst)
 27555  		v.AuxInt = 0
 27556  		return true
 27557  	}
 27558  	// match: (Rsh32Ux64 x (MOVDconst [c]))
 27559  	// cond: uint64(c) < 32
 27560  	// result: (SRWconst x [c])
 27561  	for {
 27562  		_ = v.Args[1]
 27563  		x := v.Args[0]
 27564  		v_1 := v.Args[1]
 27565  		if v_1.Op != OpPPC64MOVDconst {
 27566  			break
 27567  		}
 27568  		c := v_1.AuxInt
 27569  		if !(uint64(c) < 32) {
 27570  			break
 27571  		}
 27572  		v.reset(OpPPC64SRWconst)
 27573  		v.AuxInt = c
 27574  		v.AddArg(x)
 27575  		return true
 27576  	}
 27577  	// match: (Rsh32Ux64 x y)
 27578  	// cond: shiftIsBounded(v)
 27579  	// result: (SRW x y)
 27580  	for {
 27581  		_ = v.Args[1]
 27582  		x := v.Args[0]
 27583  		y := v.Args[1]
 27584  		if !(shiftIsBounded(v)) {
 27585  			break
 27586  		}
 27587  		v.reset(OpPPC64SRW)
 27588  		v.AddArg(x)
 27589  		v.AddArg(y)
 27590  		return true
 27591  	}
 27592  	// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
 27593  	// cond:
 27594  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27595  	for {
 27596  		_ = v.Args[1]
 27597  		x := v.Args[0]
 27598  		v_1 := v.Args[1]
 27599  		if v_1.Op != OpPPC64AND {
 27600  			break
 27601  		}
 27602  		_ = v_1.Args[1]
 27603  		y := v_1.Args[0]
 27604  		v_1_1 := v_1.Args[1]
 27605  		if v_1_1.Op != OpPPC64MOVDconst {
 27606  			break
 27607  		}
 27608  		if v_1_1.AuxInt != 31 {
 27609  			break
 27610  		}
 27611  		v.reset(OpPPC64SRW)
 27612  		v.AddArg(x)
 27613  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27614  		v0.AuxInt = 31
 27615  		v0.AddArg(y)
 27616  		v.AddArg(v0)
 27617  		return true
 27618  	}
 27619  	// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
 27620  	// cond:
 27621  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27622  	for {
 27623  		_ = v.Args[1]
 27624  		x := v.Args[0]
 27625  		v_1 := v.Args[1]
 27626  		if v_1.Op != OpPPC64AND {
 27627  			break
 27628  		}
 27629  		_ = v_1.Args[1]
 27630  		v_1_0 := v_1.Args[0]
 27631  		if v_1_0.Op != OpPPC64MOVDconst {
 27632  			break
 27633  		}
 27634  		if v_1_0.AuxInt != 31 {
 27635  			break
 27636  		}
 27637  		y := v_1.Args[1]
 27638  		v.reset(OpPPC64SRW)
 27639  		v.AddArg(x)
 27640  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27641  		v0.AuxInt = 31
 27642  		v0.AddArg(y)
 27643  		v.AddArg(v0)
 27644  		return true
 27645  	}
 27646  	// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
 27647  	// cond:
 27648  	// result: (SRW x (ANDconst <typ.UInt> [31] y))
 27649  	for {
 27650  		_ = v.Args[1]
 27651  		x := v.Args[0]
 27652  		v_1 := v.Args[1]
 27653  		if v_1.Op != OpPPC64ANDconst {
 27654  			break
 27655  		}
 27656  		if v_1.Type != typ.UInt {
 27657  			break
 27658  		}
 27659  		if v_1.AuxInt != 31 {
 27660  			break
 27661  		}
 27662  		y := v_1.Args[0]
 27663  		v.reset(OpPPC64SRW)
 27664  		v.AddArg(x)
 27665  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27666  		v0.AuxInt = 31
 27667  		v0.AddArg(y)
 27668  		v.AddArg(v0)
 27669  		return true
 27670  	}
 27671  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27672  	// cond:
 27673  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27674  	for {
 27675  		_ = v.Args[1]
 27676  		x := v.Args[0]
 27677  		v_1 := v.Args[1]
 27678  		if v_1.Op != OpPPC64SUB {
 27679  			break
 27680  		}
 27681  		if v_1.Type != typ.UInt {
 27682  			break
 27683  		}
 27684  		_ = v_1.Args[1]
 27685  		v_1_0 := v_1.Args[0]
 27686  		if v_1_0.Op != OpPPC64MOVDconst {
 27687  			break
 27688  		}
 27689  		if v_1_0.AuxInt != 32 {
 27690  			break
 27691  		}
 27692  		v_1_1 := v_1.Args[1]
 27693  		if v_1_1.Op != OpPPC64ANDconst {
 27694  			break
 27695  		}
 27696  		if v_1_1.Type != typ.UInt {
 27697  			break
 27698  		}
 27699  		if v_1_1.AuxInt != 31 {
 27700  			break
 27701  		}
 27702  		y := v_1_1.Args[0]
 27703  		v.reset(OpPPC64SRW)
 27704  		v.AddArg(x)
 27705  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27706  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27707  		v1.AuxInt = 32
 27708  		v0.AddArg(v1)
 27709  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27710  		v2.AuxInt = 31
 27711  		v2.AddArg(y)
 27712  		v0.AddArg(v2)
 27713  		v.AddArg(v0)
 27714  		return true
 27715  	}
 27716  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 27717  	// cond:
 27718  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27719  	for {
 27720  		_ = v.Args[1]
 27721  		x := v.Args[0]
 27722  		v_1 := v.Args[1]
 27723  		if v_1.Op != OpPPC64SUB {
 27724  			break
 27725  		}
 27726  		if v_1.Type != typ.UInt {
 27727  			break
 27728  		}
 27729  		_ = v_1.Args[1]
 27730  		v_1_0 := v_1.Args[0]
 27731  		if v_1_0.Op != OpPPC64MOVDconst {
 27732  			break
 27733  		}
 27734  		if v_1_0.AuxInt != 32 {
 27735  			break
 27736  		}
 27737  		v_1_1 := v_1.Args[1]
 27738  		if v_1_1.Op != OpPPC64AND {
 27739  			break
 27740  		}
 27741  		if v_1_1.Type != typ.UInt {
 27742  			break
 27743  		}
 27744  		_ = v_1_1.Args[1]
 27745  		y := v_1_1.Args[0]
 27746  		v_1_1_1 := v_1_1.Args[1]
 27747  		if v_1_1_1.Op != OpPPC64MOVDconst {
 27748  			break
 27749  		}
 27750  		if v_1_1_1.AuxInt != 31 {
 27751  			break
 27752  		}
 27753  		v.reset(OpPPC64SRW)
 27754  		v.AddArg(x)
 27755  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27756  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27757  		v1.AuxInt = 32
 27758  		v0.AddArg(v1)
 27759  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27760  		v2.AuxInt = 31
 27761  		v2.AddArg(y)
 27762  		v0.AddArg(v2)
 27763  		v.AddArg(v0)
 27764  		return true
 27765  	}
 27766  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 27767  	// cond:
 27768  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27769  	for {
 27770  		_ = v.Args[1]
 27771  		x := v.Args[0]
 27772  		v_1 := v.Args[1]
 27773  		if v_1.Op != OpPPC64SUB {
 27774  			break
 27775  		}
 27776  		if v_1.Type != typ.UInt {
 27777  			break
 27778  		}
 27779  		_ = v_1.Args[1]
 27780  		v_1_0 := v_1.Args[0]
 27781  		if v_1_0.Op != OpPPC64MOVDconst {
 27782  			break
 27783  		}
 27784  		if v_1_0.AuxInt != 32 {
 27785  			break
 27786  		}
 27787  		v_1_1 := v_1.Args[1]
 27788  		if v_1_1.Op != OpPPC64AND {
 27789  			break
 27790  		}
 27791  		if v_1_1.Type != typ.UInt {
 27792  			break
 27793  		}
 27794  		_ = v_1_1.Args[1]
 27795  		v_1_1_0 := v_1_1.Args[0]
 27796  		if v_1_1_0.Op != OpPPC64MOVDconst {
 27797  			break
 27798  		}
 27799  		if v_1_1_0.AuxInt != 31 {
 27800  			break
 27801  		}
 27802  		y := v_1_1.Args[1]
 27803  		v.reset(OpPPC64SRW)
 27804  		v.AddArg(x)
 27805  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27806  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27807  		v1.AuxInt = 32
 27808  		v0.AddArg(v1)
 27809  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27810  		v2.AuxInt = 31
 27811  		v2.AddArg(y)
 27812  		v0.AddArg(v2)
 27813  		v.AddArg(v0)
 27814  		return true
 27815  	}
 27816  	return false
 27817  }
 27818  func rewriteValuePPC64_OpRsh32Ux64_10(v *Value) bool {
 27819  	b := v.Block
 27820  	_ = b
 27821  	typ := &b.Func.Config.Types
 27822  	_ = typ
 27823  	// match: (Rsh32Ux64 x y)
 27824  	// cond:
 27825  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 27826  	for {
 27827  		_ = v.Args[1]
 27828  		x := v.Args[0]
 27829  		y := v.Args[1]
 27830  		v.reset(OpPPC64SRW)
 27831  		v.AddArg(x)
 27832  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27833  		v0.AddArg(y)
 27834  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27835  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27836  		v2.AuxInt = -32
 27837  		v2.AddArg(y)
 27838  		v1.AddArg(v2)
 27839  		v0.AddArg(v1)
 27840  		v.AddArg(v0)
 27841  		return true
 27842  	}
 27843  }
 27844  func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
 27845  	b := v.Block
 27846  	_ = b
 27847  	typ := &b.Func.Config.Types
 27848  	_ = typ
 27849  	// match: (Rsh32Ux8 x y)
 27850  	// cond: shiftIsBounded(v)
 27851  	// result: (SRW x y)
 27852  	for {
 27853  		_ = v.Args[1]
 27854  		x := v.Args[0]
 27855  		y := v.Args[1]
 27856  		if !(shiftIsBounded(v)) {
 27857  			break
 27858  		}
 27859  		v.reset(OpPPC64SRW)
 27860  		v.AddArg(x)
 27861  		v.AddArg(y)
 27862  		return true
 27863  	}
 27864  	// match: (Rsh32Ux8 x y)
 27865  	// cond:
 27866  	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 27867  	for {
 27868  		_ = v.Args[1]
 27869  		x := v.Args[0]
 27870  		y := v.Args[1]
 27871  		v.reset(OpPPC64SRW)
 27872  		v.AddArg(x)
 27873  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27874  		v0.AddArg(y)
 27875  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27876  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27877  		v2.AuxInt = -32
 27878  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27879  		v3.AddArg(y)
 27880  		v2.AddArg(v3)
 27881  		v1.AddArg(v2)
 27882  		v0.AddArg(v1)
 27883  		v.AddArg(v0)
 27884  		return true
 27885  	}
 27886  }
 27887  func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
 27888  	b := v.Block
 27889  	_ = b
 27890  	typ := &b.Func.Config.Types
 27891  	_ = typ
 27892  	// match: (Rsh32x16 x y)
 27893  	// cond: shiftIsBounded(v)
 27894  	// result: (SRAW x y)
 27895  	for {
 27896  		_ = v.Args[1]
 27897  		x := v.Args[0]
 27898  		y := v.Args[1]
 27899  		if !(shiftIsBounded(v)) {
 27900  			break
 27901  		}
 27902  		v.reset(OpPPC64SRAW)
 27903  		v.AddArg(x)
 27904  		v.AddArg(y)
 27905  		return true
 27906  	}
 27907  	// match: (Rsh32x16 x y)
 27908  	// cond:
 27909  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 27910  	for {
 27911  		_ = v.Args[1]
 27912  		x := v.Args[0]
 27913  		y := v.Args[1]
 27914  		v.reset(OpPPC64SRAW)
 27915  		v.AddArg(x)
 27916  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27917  		v0.AddArg(y)
 27918  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27919  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27920  		v2.AuxInt = -32
 27921  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27922  		v3.AddArg(y)
 27923  		v2.AddArg(v3)
 27924  		v1.AddArg(v2)
 27925  		v0.AddArg(v1)
 27926  		v.AddArg(v0)
 27927  		return true
 27928  	}
 27929  }
 27930  func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
 27931  	b := v.Block
 27932  	_ = b
 27933  	typ := &b.Func.Config.Types
 27934  	_ = typ
 27935  	// match: (Rsh32x32 x (Const64 [c]))
 27936  	// cond: uint32(c) < 32
 27937  	// result: (SRAWconst x [c])
 27938  	for {
 27939  		_ = v.Args[1]
 27940  		x := v.Args[0]
 27941  		v_1 := v.Args[1]
 27942  		if v_1.Op != OpConst64 {
 27943  			break
 27944  		}
 27945  		c := v_1.AuxInt
 27946  		if !(uint32(c) < 32) {
 27947  			break
 27948  		}
 27949  		v.reset(OpPPC64SRAWconst)
 27950  		v.AuxInt = c
 27951  		v.AddArg(x)
 27952  		return true
 27953  	}
 27954  	// match: (Rsh32x32 x (MOVDconst [c]))
 27955  	// cond: uint32(c) < 32
 27956  	// result: (SRAWconst x [c])
 27957  	for {
 27958  		_ = v.Args[1]
 27959  		x := v.Args[0]
 27960  		v_1 := v.Args[1]
 27961  		if v_1.Op != OpPPC64MOVDconst {
 27962  			break
 27963  		}
 27964  		c := v_1.AuxInt
 27965  		if !(uint32(c) < 32) {
 27966  			break
 27967  		}
 27968  		v.reset(OpPPC64SRAWconst)
 27969  		v.AuxInt = c
 27970  		v.AddArg(x)
 27971  		return true
 27972  	}
 27973  	// match: (Rsh32x32 x y)
 27974  	// cond: shiftIsBounded(v)
 27975  	// result: (SRAW x y)
 27976  	for {
 27977  		_ = v.Args[1]
 27978  		x := v.Args[0]
 27979  		y := v.Args[1]
 27980  		if !(shiftIsBounded(v)) {
 27981  			break
 27982  		}
 27983  		v.reset(OpPPC64SRAW)
 27984  		v.AddArg(x)
 27985  		v.AddArg(y)
 27986  		return true
 27987  	}
 27988  	// match: (Rsh32x32 x y)
 27989  	// cond:
 27990  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27991  	for {
 27992  		_ = v.Args[1]
 27993  		x := v.Args[0]
 27994  		y := v.Args[1]
 27995  		v.reset(OpPPC64SRAW)
 27996  		v.AddArg(x)
 27997  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27998  		v0.AddArg(y)
 27999  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28000  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28001  		v2.AuxInt = -32
 28002  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28003  		v3.AddArg(y)
 28004  		v2.AddArg(v3)
 28005  		v1.AddArg(v2)
 28006  		v0.AddArg(v1)
 28007  		v.AddArg(v0)
 28008  		return true
 28009  	}
 28010  }
 28011  func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
 28012  	b := v.Block
 28013  	_ = b
 28014  	typ := &b.Func.Config.Types
 28015  	_ = typ
 28016  	// match: (Rsh32x64 x (Const64 [c]))
 28017  	// cond: uint64(c) < 32
 28018  	// result: (SRAWconst x [c])
 28019  	for {
 28020  		_ = v.Args[1]
 28021  		x := v.Args[0]
 28022  		v_1 := v.Args[1]
 28023  		if v_1.Op != OpConst64 {
 28024  			break
 28025  		}
 28026  		c := v_1.AuxInt
 28027  		if !(uint64(c) < 32) {
 28028  			break
 28029  		}
 28030  		v.reset(OpPPC64SRAWconst)
 28031  		v.AuxInt = c
 28032  		v.AddArg(x)
 28033  		return true
 28034  	}
 28035  	// match: (Rsh32x64 x (Const64 [c]))
 28036  	// cond: uint64(c) >= 32
 28037  	// result: (SRAWconst x [63])
 28038  	for {
 28039  		_ = v.Args[1]
 28040  		x := v.Args[0]
 28041  		v_1 := v.Args[1]
 28042  		if v_1.Op != OpConst64 {
 28043  			break
 28044  		}
 28045  		c := v_1.AuxInt
 28046  		if !(uint64(c) >= 32) {
 28047  			break
 28048  		}
 28049  		v.reset(OpPPC64SRAWconst)
 28050  		v.AuxInt = 63
 28051  		v.AddArg(x)
 28052  		return true
 28053  	}
 28054  	// match: (Rsh32x64 x (MOVDconst [c]))
 28055  	// cond: uint64(c) < 32
 28056  	// result: (SRAWconst x [c])
 28057  	for {
 28058  		_ = v.Args[1]
 28059  		x := v.Args[0]
 28060  		v_1 := v.Args[1]
 28061  		if v_1.Op != OpPPC64MOVDconst {
 28062  			break
 28063  		}
 28064  		c := v_1.AuxInt
 28065  		if !(uint64(c) < 32) {
 28066  			break
 28067  		}
 28068  		v.reset(OpPPC64SRAWconst)
 28069  		v.AuxInt = c
 28070  		v.AddArg(x)
 28071  		return true
 28072  	}
 28073  	// match: (Rsh32x64 x y)
 28074  	// cond: shiftIsBounded(v)
 28075  	// result: (SRAW x y)
 28076  	for {
 28077  		_ = v.Args[1]
 28078  		x := v.Args[0]
 28079  		y := v.Args[1]
 28080  		if !(shiftIsBounded(v)) {
 28081  			break
 28082  		}
 28083  		v.reset(OpPPC64SRAW)
 28084  		v.AddArg(x)
 28085  		v.AddArg(y)
 28086  		return true
 28087  	}
 28088  	// match: (Rsh32x64 x (AND y (MOVDconst [31])))
 28089  	// cond:
 28090  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 28091  	for {
 28092  		_ = v.Args[1]
 28093  		x := v.Args[0]
 28094  		v_1 := v.Args[1]
 28095  		if v_1.Op != OpPPC64AND {
 28096  			break
 28097  		}
 28098  		_ = v_1.Args[1]
 28099  		y := v_1.Args[0]
 28100  		v_1_1 := v_1.Args[1]
 28101  		if v_1_1.Op != OpPPC64MOVDconst {
 28102  			break
 28103  		}
 28104  		if v_1_1.AuxInt != 31 {
 28105  			break
 28106  		}
 28107  		v.reset(OpPPC64SRAW)
 28108  		v.AddArg(x)
 28109  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 28110  		v0.AuxInt = 31
 28111  		v0.AddArg(y)
 28112  		v.AddArg(v0)
 28113  		return true
 28114  	}
 28115  	// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
 28116  	// cond:
 28117  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 28118  	for {
 28119  		_ = v.Args[1]
 28120  		x := v.Args[0]
 28121  		v_1 := v.Args[1]
 28122  		if v_1.Op != OpPPC64AND {
 28123  			break
 28124  		}
 28125  		_ = v_1.Args[1]
 28126  		v_1_0 := v_1.Args[0]
 28127  		if v_1_0.Op != OpPPC64MOVDconst {
 28128  			break
 28129  		}
 28130  		if v_1_0.AuxInt != 31 {
 28131  			break
 28132  		}
 28133  		y := v_1.Args[1]
 28134  		v.reset(OpPPC64SRAW)
 28135  		v.AddArg(x)
 28136  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 28137  		v0.AuxInt = 31
 28138  		v0.AddArg(y)
 28139  		v.AddArg(v0)
 28140  		return true
 28141  	}
 28142  	// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
 28143  	// cond:
 28144  	// result: (SRAW x (ANDconst <typ.UInt> [31] y))
 28145  	for {
 28146  		_ = v.Args[1]
 28147  		x := v.Args[0]
 28148  		v_1 := v.Args[1]
 28149  		if v_1.Op != OpPPC64ANDconst {
 28150  			break
 28151  		}
 28152  		if v_1.Type != typ.UInt {
 28153  			break
 28154  		}
 28155  		if v_1.AuxInt != 31 {
 28156  			break
 28157  		}
 28158  		y := v_1.Args[0]
 28159  		v.reset(OpPPC64SRAW)
 28160  		v.AddArg(x)
 28161  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28162  		v0.AuxInt = 31
 28163  		v0.AddArg(y)
 28164  		v.AddArg(v0)
 28165  		return true
 28166  	}
 28167  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28168  	// cond:
 28169  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28170  	for {
 28171  		_ = v.Args[1]
 28172  		x := v.Args[0]
 28173  		v_1 := v.Args[1]
 28174  		if v_1.Op != OpPPC64SUB {
 28175  			break
 28176  		}
 28177  		if v_1.Type != typ.UInt {
 28178  			break
 28179  		}
 28180  		_ = v_1.Args[1]
 28181  		v_1_0 := v_1.Args[0]
 28182  		if v_1_0.Op != OpPPC64MOVDconst {
 28183  			break
 28184  		}
 28185  		if v_1_0.AuxInt != 32 {
 28186  			break
 28187  		}
 28188  		v_1_1 := v_1.Args[1]
 28189  		if v_1_1.Op != OpPPC64ANDconst {
 28190  			break
 28191  		}
 28192  		if v_1_1.Type != typ.UInt {
 28193  			break
 28194  		}
 28195  		if v_1_1.AuxInt != 31 {
 28196  			break
 28197  		}
 28198  		y := v_1_1.Args[0]
 28199  		v.reset(OpPPC64SRAW)
 28200  		v.AddArg(x)
 28201  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28202  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28203  		v1.AuxInt = 32
 28204  		v0.AddArg(v1)
 28205  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28206  		v2.AuxInt = 31
 28207  		v2.AddArg(y)
 28208  		v0.AddArg(v2)
 28209  		v.AddArg(v0)
 28210  		return true
 28211  	}
 28212  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 28213  	// cond:
 28214  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28215  	for {
 28216  		_ = v.Args[1]
 28217  		x := v.Args[0]
 28218  		v_1 := v.Args[1]
 28219  		if v_1.Op != OpPPC64SUB {
 28220  			break
 28221  		}
 28222  		if v_1.Type != typ.UInt {
 28223  			break
 28224  		}
 28225  		_ = v_1.Args[1]
 28226  		v_1_0 := v_1.Args[0]
 28227  		if v_1_0.Op != OpPPC64MOVDconst {
 28228  			break
 28229  		}
 28230  		if v_1_0.AuxInt != 32 {
 28231  			break
 28232  		}
 28233  		v_1_1 := v_1.Args[1]
 28234  		if v_1_1.Op != OpPPC64AND {
 28235  			break
 28236  		}
 28237  		if v_1_1.Type != typ.UInt {
 28238  			break
 28239  		}
 28240  		_ = v_1_1.Args[1]
 28241  		y := v_1_1.Args[0]
 28242  		v_1_1_1 := v_1_1.Args[1]
 28243  		if v_1_1_1.Op != OpPPC64MOVDconst {
 28244  			break
 28245  		}
 28246  		if v_1_1_1.AuxInt != 31 {
 28247  			break
 28248  		}
 28249  		v.reset(OpPPC64SRAW)
 28250  		v.AddArg(x)
 28251  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28252  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28253  		v1.AuxInt = 32
 28254  		v0.AddArg(v1)
 28255  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28256  		v2.AuxInt = 31
 28257  		v2.AddArg(y)
 28258  		v0.AddArg(v2)
 28259  		v.AddArg(v0)
 28260  		return true
 28261  	}
 28262  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 28263  	// cond:
 28264  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 28265  	for {
 28266  		_ = v.Args[1]
 28267  		x := v.Args[0]
 28268  		v_1 := v.Args[1]
 28269  		if v_1.Op != OpPPC64SUB {
 28270  			break
 28271  		}
 28272  		if v_1.Type != typ.UInt {
 28273  			break
 28274  		}
 28275  		_ = v_1.Args[1]
 28276  		v_1_0 := v_1.Args[0]
 28277  		if v_1_0.Op != OpPPC64MOVDconst {
 28278  			break
 28279  		}
 28280  		if v_1_0.AuxInt != 32 {
 28281  			break
 28282  		}
 28283  		v_1_1 := v_1.Args[1]
 28284  		if v_1_1.Op != OpPPC64AND {
 28285  			break
 28286  		}
 28287  		if v_1_1.Type != typ.UInt {
 28288  			break
 28289  		}
 28290  		_ = v_1_1.Args[1]
 28291  		v_1_1_0 := v_1_1.Args[0]
 28292  		if v_1_1_0.Op != OpPPC64MOVDconst {
 28293  			break
 28294  		}
 28295  		if v_1_1_0.AuxInt != 31 {
 28296  			break
 28297  		}
 28298  		y := v_1_1.Args[1]
 28299  		v.reset(OpPPC64SRAW)
 28300  		v.AddArg(x)
 28301  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28302  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28303  		v1.AuxInt = 32
 28304  		v0.AddArg(v1)
 28305  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28306  		v2.AuxInt = 31
 28307  		v2.AddArg(y)
 28308  		v0.AddArg(v2)
 28309  		v.AddArg(v0)
 28310  		return true
 28311  	}
 28312  	return false
 28313  }
 28314  func rewriteValuePPC64_OpRsh32x64_10(v *Value) bool {
 28315  	b := v.Block
 28316  	_ = b
 28317  	typ := &b.Func.Config.Types
 28318  	_ = typ
 28319  	// match: (Rsh32x64 x y)
 28320  	// cond:
 28321  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 28322  	for {
 28323  		_ = v.Args[1]
 28324  		x := v.Args[0]
 28325  		y := v.Args[1]
 28326  		v.reset(OpPPC64SRAW)
 28327  		v.AddArg(x)
 28328  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28329  		v0.AddArg(y)
 28330  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28331  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28332  		v2.AuxInt = -32
 28333  		v2.AddArg(y)
 28334  		v1.AddArg(v2)
 28335  		v0.AddArg(v1)
 28336  		v.AddArg(v0)
 28337  		return true
 28338  	}
 28339  }
 28340  func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
 28341  	b := v.Block
 28342  	_ = b
 28343  	typ := &b.Func.Config.Types
 28344  	_ = typ
 28345  	// match: (Rsh32x8 x y)
 28346  	// cond: shiftIsBounded(v)
 28347  	// result: (SRAW x y)
 28348  	for {
 28349  		_ = v.Args[1]
 28350  		x := v.Args[0]
 28351  		y := v.Args[1]
 28352  		if !(shiftIsBounded(v)) {
 28353  			break
 28354  		}
 28355  		v.reset(OpPPC64SRAW)
 28356  		v.AddArg(x)
 28357  		v.AddArg(y)
 28358  		return true
 28359  	}
 28360  	// match: (Rsh32x8 x y)
 28361  	// cond:
 28362  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 28363  	for {
 28364  		_ = v.Args[1]
 28365  		x := v.Args[0]
 28366  		y := v.Args[1]
 28367  		v.reset(OpPPC64SRAW)
 28368  		v.AddArg(x)
 28369  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28370  		v0.AddArg(y)
 28371  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28372  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28373  		v2.AuxInt = -32
 28374  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28375  		v3.AddArg(y)
 28376  		v2.AddArg(v3)
 28377  		v1.AddArg(v2)
 28378  		v0.AddArg(v1)
 28379  		v.AddArg(v0)
 28380  		return true
 28381  	}
 28382  }
 28383  func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
 28384  	b := v.Block
 28385  	_ = b
 28386  	typ := &b.Func.Config.Types
 28387  	_ = typ
 28388  	// match: (Rsh64Ux16 x y)
 28389  	// cond: shiftIsBounded(v)
 28390  	// result: (SRD x y)
 28391  	for {
 28392  		_ = v.Args[1]
 28393  		x := v.Args[0]
 28394  		y := v.Args[1]
 28395  		if !(shiftIsBounded(v)) {
 28396  			break
 28397  		}
 28398  		v.reset(OpPPC64SRD)
 28399  		v.AddArg(x)
 28400  		v.AddArg(y)
 28401  		return true
 28402  	}
 28403  	// match: (Rsh64Ux16 x y)
 28404  	// cond:
 28405  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 28406  	for {
 28407  		_ = v.Args[1]
 28408  		x := v.Args[0]
 28409  		y := v.Args[1]
 28410  		v.reset(OpPPC64SRD)
 28411  		v.AddArg(x)
 28412  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28413  		v0.AddArg(y)
 28414  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28415  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28416  		v2.AuxInt = -64
 28417  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28418  		v3.AddArg(y)
 28419  		v2.AddArg(v3)
 28420  		v1.AddArg(v2)
 28421  		v0.AddArg(v1)
 28422  		v.AddArg(v0)
 28423  		return true
 28424  	}
 28425  }
 28426  func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
 28427  	b := v.Block
 28428  	_ = b
 28429  	typ := &b.Func.Config.Types
 28430  	_ = typ
 28431  	// match: (Rsh64Ux32 x (Const64 [c]))
 28432  	// cond: uint32(c) < 64
 28433  	// result: (SRDconst x [c])
 28434  	for {
 28435  		_ = v.Args[1]
 28436  		x := v.Args[0]
 28437  		v_1 := v.Args[1]
 28438  		if v_1.Op != OpConst64 {
 28439  			break
 28440  		}
 28441  		c := v_1.AuxInt
 28442  		if !(uint32(c) < 64) {
 28443  			break
 28444  		}
 28445  		v.reset(OpPPC64SRDconst)
 28446  		v.AuxInt = c
 28447  		v.AddArg(x)
 28448  		return true
 28449  	}
 28450  	// match: (Rsh64Ux32 x (MOVDconst [c]))
 28451  	// cond: uint32(c) < 64
 28452  	// result: (SRDconst x [c])
 28453  	for {
 28454  		_ = v.Args[1]
 28455  		x := v.Args[0]
 28456  		v_1 := v.Args[1]
 28457  		if v_1.Op != OpPPC64MOVDconst {
 28458  			break
 28459  		}
 28460  		c := v_1.AuxInt
 28461  		if !(uint32(c) < 64) {
 28462  			break
 28463  		}
 28464  		v.reset(OpPPC64SRDconst)
 28465  		v.AuxInt = c
 28466  		v.AddArg(x)
 28467  		return true
 28468  	}
 28469  	// match: (Rsh64Ux32 x y)
 28470  	// cond: shiftIsBounded(v)
 28471  	// result: (SRD x y)
 28472  	for {
 28473  		_ = v.Args[1]
 28474  		x := v.Args[0]
 28475  		y := v.Args[1]
 28476  		if !(shiftIsBounded(v)) {
 28477  			break
 28478  		}
 28479  		v.reset(OpPPC64SRD)
 28480  		v.AddArg(x)
 28481  		v.AddArg(y)
 28482  		return true
 28483  	}
 28484  	// match: (Rsh64Ux32 x y)
 28485  	// cond:
 28486  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28487  	for {
 28488  		_ = v.Args[1]
 28489  		x := v.Args[0]
 28490  		y := v.Args[1]
 28491  		v.reset(OpPPC64SRD)
 28492  		v.AddArg(x)
 28493  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28494  		v0.AddArg(y)
 28495  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28496  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28497  		v2.AuxInt = -64
 28498  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28499  		v3.AddArg(y)
 28500  		v2.AddArg(v3)
 28501  		v1.AddArg(v2)
 28502  		v0.AddArg(v1)
 28503  		v.AddArg(v0)
 28504  		return true
 28505  	}
 28506  }
 28507  func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
 28508  	b := v.Block
 28509  	_ = b
 28510  	typ := &b.Func.Config.Types
 28511  	_ = typ
 28512  	// match: (Rsh64Ux64 x (Const64 [c]))
 28513  	// cond: uint64(c) < 64
 28514  	// result: (SRDconst x [c])
 28515  	for {
 28516  		_ = v.Args[1]
 28517  		x := v.Args[0]
 28518  		v_1 := v.Args[1]
 28519  		if v_1.Op != OpConst64 {
 28520  			break
 28521  		}
 28522  		c := v_1.AuxInt
 28523  		if !(uint64(c) < 64) {
 28524  			break
 28525  		}
 28526  		v.reset(OpPPC64SRDconst)
 28527  		v.AuxInt = c
 28528  		v.AddArg(x)
 28529  		return true
 28530  	}
 28531  	// match: (Rsh64Ux64 _ (Const64 [c]))
 28532  	// cond: uint64(c) >= 64
 28533  	// result: (MOVDconst [0])
 28534  	for {
 28535  		_ = v.Args[1]
 28536  		v_1 := v.Args[1]
 28537  		if v_1.Op != OpConst64 {
 28538  			break
 28539  		}
 28540  		c := v_1.AuxInt
 28541  		if !(uint64(c) >= 64) {
 28542  			break
 28543  		}
 28544  		v.reset(OpPPC64MOVDconst)
 28545  		v.AuxInt = 0
 28546  		return true
 28547  	}
 28548  	// match: (Rsh64Ux64 x (MOVDconst [c]))
 28549  	// cond: uint64(c) < 64
 28550  	// result: (SRDconst x [c])
 28551  	for {
 28552  		_ = v.Args[1]
 28553  		x := v.Args[0]
 28554  		v_1 := v.Args[1]
 28555  		if v_1.Op != OpPPC64MOVDconst {
 28556  			break
 28557  		}
 28558  		c := v_1.AuxInt
 28559  		if !(uint64(c) < 64) {
 28560  			break
 28561  		}
 28562  		v.reset(OpPPC64SRDconst)
 28563  		v.AuxInt = c
 28564  		v.AddArg(x)
 28565  		return true
 28566  	}
 28567  	// match: (Rsh64Ux64 x y)
 28568  	// cond: shiftIsBounded(v)
 28569  	// result: (SRD x y)
 28570  	for {
 28571  		_ = v.Args[1]
 28572  		x := v.Args[0]
 28573  		y := v.Args[1]
 28574  		if !(shiftIsBounded(v)) {
 28575  			break
 28576  		}
 28577  		v.reset(OpPPC64SRD)
 28578  		v.AddArg(x)
 28579  		v.AddArg(y)
 28580  		return true
 28581  	}
 28582  	// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
 28583  	// cond:
 28584  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28585  	for {
 28586  		_ = v.Args[1]
 28587  		x := v.Args[0]
 28588  		v_1 := v.Args[1]
 28589  		if v_1.Op != OpPPC64AND {
 28590  			break
 28591  		}
 28592  		_ = v_1.Args[1]
 28593  		y := v_1.Args[0]
 28594  		v_1_1 := v_1.Args[1]
 28595  		if v_1_1.Op != OpPPC64MOVDconst {
 28596  			break
 28597  		}
 28598  		if v_1_1.AuxInt != 63 {
 28599  			break
 28600  		}
 28601  		v.reset(OpPPC64SRD)
 28602  		v.AddArg(x)
 28603  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28604  		v0.AuxInt = 63
 28605  		v0.AddArg(y)
 28606  		v.AddArg(v0)
 28607  		return true
 28608  	}
 28609  	// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
 28610  	// cond:
 28611  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28612  	for {
 28613  		_ = v.Args[1]
 28614  		x := v.Args[0]
 28615  		v_1 := v.Args[1]
 28616  		if v_1.Op != OpPPC64AND {
 28617  			break
 28618  		}
 28619  		_ = v_1.Args[1]
 28620  		v_1_0 := v_1.Args[0]
 28621  		if v_1_0.Op != OpPPC64MOVDconst {
 28622  			break
 28623  		}
 28624  		if v_1_0.AuxInt != 63 {
 28625  			break
 28626  		}
 28627  		y := v_1.Args[1]
 28628  		v.reset(OpPPC64SRD)
 28629  		v.AddArg(x)
 28630  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28631  		v0.AuxInt = 63
 28632  		v0.AddArg(y)
 28633  		v.AddArg(v0)
 28634  		return true
 28635  	}
 28636  	// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
 28637  	// cond:
 28638  	// result: (SRD x (ANDconst <typ.UInt> [63] y))
 28639  	for {
 28640  		_ = v.Args[1]
 28641  		x := v.Args[0]
 28642  		v_1 := v.Args[1]
 28643  		if v_1.Op != OpPPC64ANDconst {
 28644  			break
 28645  		}
 28646  		if v_1.Type != typ.UInt {
 28647  			break
 28648  		}
 28649  		if v_1.AuxInt != 63 {
 28650  			break
 28651  		}
 28652  		y := v_1.Args[0]
 28653  		v.reset(OpPPC64SRD)
 28654  		v.AddArg(x)
 28655  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28656  		v0.AuxInt = 63
 28657  		v0.AddArg(y)
 28658  		v.AddArg(v0)
 28659  		return true
 28660  	}
 28661  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28662  	// cond:
 28663  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28664  	for {
 28665  		_ = v.Args[1]
 28666  		x := v.Args[0]
 28667  		v_1 := v.Args[1]
 28668  		if v_1.Op != OpPPC64SUB {
 28669  			break
 28670  		}
 28671  		if v_1.Type != typ.UInt {
 28672  			break
 28673  		}
 28674  		_ = v_1.Args[1]
 28675  		v_1_0 := v_1.Args[0]
 28676  		if v_1_0.Op != OpPPC64MOVDconst {
 28677  			break
 28678  		}
 28679  		if v_1_0.AuxInt != 64 {
 28680  			break
 28681  		}
 28682  		v_1_1 := v_1.Args[1]
 28683  		if v_1_1.Op != OpPPC64ANDconst {
 28684  			break
 28685  		}
 28686  		if v_1_1.Type != typ.UInt {
 28687  			break
 28688  		}
 28689  		if v_1_1.AuxInt != 63 {
 28690  			break
 28691  		}
 28692  		y := v_1_1.Args[0]
 28693  		v.reset(OpPPC64SRD)
 28694  		v.AddArg(x)
 28695  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28696  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28697  		v1.AuxInt = 64
 28698  		v0.AddArg(v1)
 28699  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28700  		v2.AuxInt = 63
 28701  		v2.AddArg(y)
 28702  		v0.AddArg(v2)
 28703  		v.AddArg(v0)
 28704  		return true
 28705  	}
 28706  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 28707  	// cond:
 28708  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28709  	for {
 28710  		_ = v.Args[1]
 28711  		x := v.Args[0]
 28712  		v_1 := v.Args[1]
 28713  		if v_1.Op != OpPPC64SUB {
 28714  			break
 28715  		}
 28716  		if v_1.Type != typ.UInt {
 28717  			break
 28718  		}
 28719  		_ = v_1.Args[1]
 28720  		v_1_0 := v_1.Args[0]
 28721  		if v_1_0.Op != OpPPC64MOVDconst {
 28722  			break
 28723  		}
 28724  		if v_1_0.AuxInt != 64 {
 28725  			break
 28726  		}
 28727  		v_1_1 := v_1.Args[1]
 28728  		if v_1_1.Op != OpPPC64AND {
 28729  			break
 28730  		}
 28731  		if v_1_1.Type != typ.UInt {
 28732  			break
 28733  		}
 28734  		_ = v_1_1.Args[1]
 28735  		y := v_1_1.Args[0]
 28736  		v_1_1_1 := v_1_1.Args[1]
 28737  		if v_1_1_1.Op != OpPPC64MOVDconst {
 28738  			break
 28739  		}
 28740  		if v_1_1_1.AuxInt != 63 {
 28741  			break
 28742  		}
 28743  		v.reset(OpPPC64SRD)
 28744  		v.AddArg(x)
 28745  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28746  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28747  		v1.AuxInt = 64
 28748  		v0.AddArg(v1)
 28749  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28750  		v2.AuxInt = 63
 28751  		v2.AddArg(y)
 28752  		v0.AddArg(v2)
 28753  		v.AddArg(v0)
 28754  		return true
 28755  	}
 28756  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 28757  	// cond:
 28758  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28759  	for {
 28760  		_ = v.Args[1]
 28761  		x := v.Args[0]
 28762  		v_1 := v.Args[1]
 28763  		if v_1.Op != OpPPC64SUB {
 28764  			break
 28765  		}
 28766  		if v_1.Type != typ.UInt {
 28767  			break
 28768  		}
 28769  		_ = v_1.Args[1]
 28770  		v_1_0 := v_1.Args[0]
 28771  		if v_1_0.Op != OpPPC64MOVDconst {
 28772  			break
 28773  		}
 28774  		if v_1_0.AuxInt != 64 {
 28775  			break
 28776  		}
 28777  		v_1_1 := v_1.Args[1]
 28778  		if v_1_1.Op != OpPPC64AND {
 28779  			break
 28780  		}
 28781  		if v_1_1.Type != typ.UInt {
 28782  			break
 28783  		}
 28784  		_ = v_1_1.Args[1]
 28785  		v_1_1_0 := v_1_1.Args[0]
 28786  		if v_1_1_0.Op != OpPPC64MOVDconst {
 28787  			break
 28788  		}
 28789  		if v_1_1_0.AuxInt != 63 {
 28790  			break
 28791  		}
 28792  		y := v_1_1.Args[1]
 28793  		v.reset(OpPPC64SRD)
 28794  		v.AddArg(x)
 28795  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28796  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28797  		v1.AuxInt = 64
 28798  		v0.AddArg(v1)
 28799  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28800  		v2.AuxInt = 63
 28801  		v2.AddArg(y)
 28802  		v0.AddArg(v2)
 28803  		v.AddArg(v0)
 28804  		return true
 28805  	}
 28806  	return false
 28807  }
 28808  func rewriteValuePPC64_OpRsh64Ux64_10(v *Value) bool {
 28809  	b := v.Block
 28810  	_ = b
 28811  	typ := &b.Func.Config.Types
 28812  	_ = typ
 28813  	// match: (Rsh64Ux64 x y)
 28814  	// cond:
 28815  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 28816  	for {
 28817  		_ = v.Args[1]
 28818  		x := v.Args[0]
 28819  		y := v.Args[1]
 28820  		v.reset(OpPPC64SRD)
 28821  		v.AddArg(x)
 28822  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28823  		v0.AddArg(y)
 28824  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28825  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28826  		v2.AuxInt = -64
 28827  		v2.AddArg(y)
 28828  		v1.AddArg(v2)
 28829  		v0.AddArg(v1)
 28830  		v.AddArg(v0)
 28831  		return true
 28832  	}
 28833  }
 28834  func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
 28835  	b := v.Block
 28836  	_ = b
 28837  	typ := &b.Func.Config.Types
 28838  	_ = typ
 28839  	// match: (Rsh64Ux8 x y)
 28840  	// cond: shiftIsBounded(v)
 28841  	// result: (SRD x y)
 28842  	for {
 28843  		_ = v.Args[1]
 28844  		x := v.Args[0]
 28845  		y := v.Args[1]
 28846  		if !(shiftIsBounded(v)) {
 28847  			break
 28848  		}
 28849  		v.reset(OpPPC64SRD)
 28850  		v.AddArg(x)
 28851  		v.AddArg(y)
 28852  		return true
 28853  	}
 28854  	// match: (Rsh64Ux8 x y)
 28855  	// cond:
 28856  	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 28857  	for {
 28858  		_ = v.Args[1]
 28859  		x := v.Args[0]
 28860  		y := v.Args[1]
 28861  		v.reset(OpPPC64SRD)
 28862  		v.AddArg(x)
 28863  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28864  		v0.AddArg(y)
 28865  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28866  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28867  		v2.AuxInt = -64
 28868  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28869  		v3.AddArg(y)
 28870  		v2.AddArg(v3)
 28871  		v1.AddArg(v2)
 28872  		v0.AddArg(v1)
 28873  		v.AddArg(v0)
 28874  		return true
 28875  	}
 28876  }
 28877  func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
 28878  	b := v.Block
 28879  	_ = b
 28880  	typ := &b.Func.Config.Types
 28881  	_ = typ
 28882  	// match: (Rsh64x16 x y)
 28883  	// cond: shiftIsBounded(v)
 28884  	// result: (SRAD x y)
 28885  	for {
 28886  		_ = v.Args[1]
 28887  		x := v.Args[0]
 28888  		y := v.Args[1]
 28889  		if !(shiftIsBounded(v)) {
 28890  			break
 28891  		}
 28892  		v.reset(OpPPC64SRAD)
 28893  		v.AddArg(x)
 28894  		v.AddArg(y)
 28895  		return true
 28896  	}
 28897  	// match: (Rsh64x16 x y)
 28898  	// cond:
 28899  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 28900  	for {
 28901  		_ = v.Args[1]
 28902  		x := v.Args[0]
 28903  		y := v.Args[1]
 28904  		v.reset(OpPPC64SRAD)
 28905  		v.AddArg(x)
 28906  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28907  		v0.AddArg(y)
 28908  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28909  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28910  		v2.AuxInt = -64
 28911  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28912  		v3.AddArg(y)
 28913  		v2.AddArg(v3)
 28914  		v1.AddArg(v2)
 28915  		v0.AddArg(v1)
 28916  		v.AddArg(v0)
 28917  		return true
 28918  	}
 28919  }
 28920  func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
 28921  	b := v.Block
 28922  	_ = b
 28923  	typ := &b.Func.Config.Types
 28924  	_ = typ
 28925  	// match: (Rsh64x32 x (Const64 [c]))
 28926  	// cond: uint32(c) < 64
 28927  	// result: (SRADconst x [c])
 28928  	for {
 28929  		_ = v.Args[1]
 28930  		x := v.Args[0]
 28931  		v_1 := v.Args[1]
 28932  		if v_1.Op != OpConst64 {
 28933  			break
 28934  		}
 28935  		c := v_1.AuxInt
 28936  		if !(uint32(c) < 64) {
 28937  			break
 28938  		}
 28939  		v.reset(OpPPC64SRADconst)
 28940  		v.AuxInt = c
 28941  		v.AddArg(x)
 28942  		return true
 28943  	}
 28944  	// match: (Rsh64x32 x (MOVDconst [c]))
 28945  	// cond: uint32(c) < 64
 28946  	// result: (SRADconst x [c])
 28947  	for {
 28948  		_ = v.Args[1]
 28949  		x := v.Args[0]
 28950  		v_1 := v.Args[1]
 28951  		if v_1.Op != OpPPC64MOVDconst {
 28952  			break
 28953  		}
 28954  		c := v_1.AuxInt
 28955  		if !(uint32(c) < 64) {
 28956  			break
 28957  		}
 28958  		v.reset(OpPPC64SRADconst)
 28959  		v.AuxInt = c
 28960  		v.AddArg(x)
 28961  		return true
 28962  	}
 28963  	// match: (Rsh64x32 x y)
 28964  	// cond: shiftIsBounded(v)
 28965  	// result: (SRAD x y)
 28966  	for {
 28967  		_ = v.Args[1]
 28968  		x := v.Args[0]
 28969  		y := v.Args[1]
 28970  		if !(shiftIsBounded(v)) {
 28971  			break
 28972  		}
 28973  		v.reset(OpPPC64SRAD)
 28974  		v.AddArg(x)
 28975  		v.AddArg(y)
 28976  		return true
 28977  	}
 28978  	// match: (Rsh64x32 x y)
 28979  	// cond:
 28980  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28981  	for {
 28982  		_ = v.Args[1]
 28983  		x := v.Args[0]
 28984  		y := v.Args[1]
 28985  		v.reset(OpPPC64SRAD)
 28986  		v.AddArg(x)
 28987  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28988  		v0.AddArg(y)
 28989  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28990  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28991  		v2.AuxInt = -64
 28992  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28993  		v3.AddArg(y)
 28994  		v2.AddArg(v3)
 28995  		v1.AddArg(v2)
 28996  		v0.AddArg(v1)
 28997  		v.AddArg(v0)
 28998  		return true
 28999  	}
 29000  }
 29001  func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
 29002  	b := v.Block
 29003  	_ = b
 29004  	typ := &b.Func.Config.Types
 29005  	_ = typ
 29006  	// match: (Rsh64x64 x (Const64 [c]))
 29007  	// cond: uint64(c) < 64
 29008  	// result: (SRADconst x [c])
 29009  	for {
 29010  		_ = v.Args[1]
 29011  		x := v.Args[0]
 29012  		v_1 := v.Args[1]
 29013  		if v_1.Op != OpConst64 {
 29014  			break
 29015  		}
 29016  		c := v_1.AuxInt
 29017  		if !(uint64(c) < 64) {
 29018  			break
 29019  		}
 29020  		v.reset(OpPPC64SRADconst)
 29021  		v.AuxInt = c
 29022  		v.AddArg(x)
 29023  		return true
 29024  	}
 29025  	// match: (Rsh64x64 x (Const64 [c]))
 29026  	// cond: uint64(c) >= 64
 29027  	// result: (SRADconst x [63])
 29028  	for {
 29029  		_ = v.Args[1]
 29030  		x := v.Args[0]
 29031  		v_1 := v.Args[1]
 29032  		if v_1.Op != OpConst64 {
 29033  			break
 29034  		}
 29035  		c := v_1.AuxInt
 29036  		if !(uint64(c) >= 64) {
 29037  			break
 29038  		}
 29039  		v.reset(OpPPC64SRADconst)
 29040  		v.AuxInt = 63
 29041  		v.AddArg(x)
 29042  		return true
 29043  	}
 29044  	// match: (Rsh64x64 x (MOVDconst [c]))
 29045  	// cond: uint64(c) < 64
 29046  	// result: (SRADconst x [c])
 29047  	for {
 29048  		_ = v.Args[1]
 29049  		x := v.Args[0]
 29050  		v_1 := v.Args[1]
 29051  		if v_1.Op != OpPPC64MOVDconst {
 29052  			break
 29053  		}
 29054  		c := v_1.AuxInt
 29055  		if !(uint64(c) < 64) {
 29056  			break
 29057  		}
 29058  		v.reset(OpPPC64SRADconst)
 29059  		v.AuxInt = c
 29060  		v.AddArg(x)
 29061  		return true
 29062  	}
 29063  	// match: (Rsh64x64 x y)
 29064  	// cond: shiftIsBounded(v)
 29065  	// result: (SRAD x y)
 29066  	for {
 29067  		_ = v.Args[1]
 29068  		x := v.Args[0]
 29069  		y := v.Args[1]
 29070  		if !(shiftIsBounded(v)) {
 29071  			break
 29072  		}
 29073  		v.reset(OpPPC64SRAD)
 29074  		v.AddArg(x)
 29075  		v.AddArg(y)
 29076  		return true
 29077  	}
 29078  	// match: (Rsh64x64 x (AND y (MOVDconst [63])))
 29079  	// cond:
 29080  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 29081  	for {
 29082  		_ = v.Args[1]
 29083  		x := v.Args[0]
 29084  		v_1 := v.Args[1]
 29085  		if v_1.Op != OpPPC64AND {
 29086  			break
 29087  		}
 29088  		_ = v_1.Args[1]
 29089  		y := v_1.Args[0]
 29090  		v_1_1 := v_1.Args[1]
 29091  		if v_1_1.Op != OpPPC64MOVDconst {
 29092  			break
 29093  		}
 29094  		if v_1_1.AuxInt != 63 {
 29095  			break
 29096  		}
 29097  		v.reset(OpPPC64SRAD)
 29098  		v.AddArg(x)
 29099  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 29100  		v0.AuxInt = 63
 29101  		v0.AddArg(y)
 29102  		v.AddArg(v0)
 29103  		return true
 29104  	}
 29105  	// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
 29106  	// cond:
 29107  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 29108  	for {
 29109  		_ = v.Args[1]
 29110  		x := v.Args[0]
 29111  		v_1 := v.Args[1]
 29112  		if v_1.Op != OpPPC64AND {
 29113  			break
 29114  		}
 29115  		_ = v_1.Args[1]
 29116  		v_1_0 := v_1.Args[0]
 29117  		if v_1_0.Op != OpPPC64MOVDconst {
 29118  			break
 29119  		}
 29120  		if v_1_0.AuxInt != 63 {
 29121  			break
 29122  		}
 29123  		y := v_1.Args[1]
 29124  		v.reset(OpPPC64SRAD)
 29125  		v.AddArg(x)
 29126  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 29127  		v0.AuxInt = 63
 29128  		v0.AddArg(y)
 29129  		v.AddArg(v0)
 29130  		return true
 29131  	}
 29132  	// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
 29133  	// cond:
 29134  	// result: (SRAD x (ANDconst <typ.UInt> [63] y))
 29135  	for {
 29136  		_ = v.Args[1]
 29137  		x := v.Args[0]
 29138  		v_1 := v.Args[1]
 29139  		if v_1.Op != OpPPC64ANDconst {
 29140  			break
 29141  		}
 29142  		if v_1.Type != typ.UInt {
 29143  			break
 29144  		}
 29145  		if v_1.AuxInt != 63 {
 29146  			break
 29147  		}
 29148  		y := v_1.Args[0]
 29149  		v.reset(OpPPC64SRAD)
 29150  		v.AddArg(x)
 29151  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29152  		v0.AuxInt = 63
 29153  		v0.AddArg(y)
 29154  		v.AddArg(v0)
 29155  		return true
 29156  	}
 29157  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29158  	// cond:
 29159  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29160  	for {
 29161  		_ = v.Args[1]
 29162  		x := v.Args[0]
 29163  		v_1 := v.Args[1]
 29164  		if v_1.Op != OpPPC64SUB {
 29165  			break
 29166  		}
 29167  		if v_1.Type != typ.UInt {
 29168  			break
 29169  		}
 29170  		_ = v_1.Args[1]
 29171  		v_1_0 := v_1.Args[0]
 29172  		if v_1_0.Op != OpPPC64MOVDconst {
 29173  			break
 29174  		}
 29175  		if v_1_0.AuxInt != 64 {
 29176  			break
 29177  		}
 29178  		v_1_1 := v_1.Args[1]
 29179  		if v_1_1.Op != OpPPC64ANDconst {
 29180  			break
 29181  		}
 29182  		if v_1_1.Type != typ.UInt {
 29183  			break
 29184  		}
 29185  		if v_1_1.AuxInt != 63 {
 29186  			break
 29187  		}
 29188  		y := v_1_1.Args[0]
 29189  		v.reset(OpPPC64SRAD)
 29190  		v.AddArg(x)
 29191  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29192  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29193  		v1.AuxInt = 64
 29194  		v0.AddArg(v1)
 29195  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29196  		v2.AuxInt = 63
 29197  		v2.AddArg(y)
 29198  		v0.AddArg(v2)
 29199  		v.AddArg(v0)
 29200  		return true
 29201  	}
 29202  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 29203  	// cond:
 29204  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29205  	for {
 29206  		_ = v.Args[1]
 29207  		x := v.Args[0]
 29208  		v_1 := v.Args[1]
 29209  		if v_1.Op != OpPPC64SUB {
 29210  			break
 29211  		}
 29212  		if v_1.Type != typ.UInt {
 29213  			break
 29214  		}
 29215  		_ = v_1.Args[1]
 29216  		v_1_0 := v_1.Args[0]
 29217  		if v_1_0.Op != OpPPC64MOVDconst {
 29218  			break
 29219  		}
 29220  		if v_1_0.AuxInt != 64 {
 29221  			break
 29222  		}
 29223  		v_1_1 := v_1.Args[1]
 29224  		if v_1_1.Op != OpPPC64AND {
 29225  			break
 29226  		}
 29227  		if v_1_1.Type != typ.UInt {
 29228  			break
 29229  		}
 29230  		_ = v_1_1.Args[1]
 29231  		y := v_1_1.Args[0]
 29232  		v_1_1_1 := v_1_1.Args[1]
 29233  		if v_1_1_1.Op != OpPPC64MOVDconst {
 29234  			break
 29235  		}
 29236  		if v_1_1_1.AuxInt != 63 {
 29237  			break
 29238  		}
 29239  		v.reset(OpPPC64SRAD)
 29240  		v.AddArg(x)
 29241  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29242  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29243  		v1.AuxInt = 64
 29244  		v0.AddArg(v1)
 29245  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29246  		v2.AuxInt = 63
 29247  		v2.AddArg(y)
 29248  		v0.AddArg(v2)
 29249  		v.AddArg(v0)
 29250  		return true
 29251  	}
 29252  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 29253  	// cond:
 29254  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 29255  	for {
 29256  		_ = v.Args[1]
 29257  		x := v.Args[0]
 29258  		v_1 := v.Args[1]
 29259  		if v_1.Op != OpPPC64SUB {
 29260  			break
 29261  		}
 29262  		if v_1.Type != typ.UInt {
 29263  			break
 29264  		}
 29265  		_ = v_1.Args[1]
 29266  		v_1_0 := v_1.Args[0]
 29267  		if v_1_0.Op != OpPPC64MOVDconst {
 29268  			break
 29269  		}
 29270  		if v_1_0.AuxInt != 64 {
 29271  			break
 29272  		}
 29273  		v_1_1 := v_1.Args[1]
 29274  		if v_1_1.Op != OpPPC64AND {
 29275  			break
 29276  		}
 29277  		if v_1_1.Type != typ.UInt {
 29278  			break
 29279  		}
 29280  		_ = v_1_1.Args[1]
 29281  		v_1_1_0 := v_1_1.Args[0]
 29282  		if v_1_1_0.Op != OpPPC64MOVDconst {
 29283  			break
 29284  		}
 29285  		if v_1_1_0.AuxInt != 63 {
 29286  			break
 29287  		}
 29288  		y := v_1_1.Args[1]
 29289  		v.reset(OpPPC64SRAD)
 29290  		v.AddArg(x)
 29291  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 29292  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 29293  		v1.AuxInt = 64
 29294  		v0.AddArg(v1)
 29295  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 29296  		v2.AuxInt = 63
 29297  		v2.AddArg(y)
 29298  		v0.AddArg(v2)
 29299  		v.AddArg(v0)
 29300  		return true
 29301  	}
 29302  	return false
 29303  }
 29304  func rewriteValuePPC64_OpRsh64x64_10(v *Value) bool {
 29305  	b := v.Block
 29306  	_ = b
 29307  	typ := &b.Func.Config.Types
 29308  	_ = typ
 29309  	// match: (Rsh64x64 x y)
 29310  	// cond:
 29311  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 29312  	for {
 29313  		_ = v.Args[1]
 29314  		x := v.Args[0]
 29315  		y := v.Args[1]
 29316  		v.reset(OpPPC64SRAD)
 29317  		v.AddArg(x)
 29318  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29319  		v0.AddArg(y)
 29320  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29321  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29322  		v2.AuxInt = -64
 29323  		v2.AddArg(y)
 29324  		v1.AddArg(v2)
 29325  		v0.AddArg(v1)
 29326  		v.AddArg(v0)
 29327  		return true
 29328  	}
 29329  }
 29330  func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
 29331  	b := v.Block
 29332  	_ = b
 29333  	typ := &b.Func.Config.Types
 29334  	_ = typ
 29335  	// match: (Rsh64x8 x y)
 29336  	// cond: shiftIsBounded(v)
 29337  	// result: (SRAD x y)
 29338  	for {
 29339  		_ = v.Args[1]
 29340  		x := v.Args[0]
 29341  		y := v.Args[1]
 29342  		if !(shiftIsBounded(v)) {
 29343  			break
 29344  		}
 29345  		v.reset(OpPPC64SRAD)
 29346  		v.AddArg(x)
 29347  		v.AddArg(y)
 29348  		return true
 29349  	}
 29350  	// match: (Rsh64x8 x y)
 29351  	// cond:
 29352  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 29353  	for {
 29354  		_ = v.Args[1]
 29355  		x := v.Args[0]
 29356  		y := v.Args[1]
 29357  		v.reset(OpPPC64SRAD)
 29358  		v.AddArg(x)
 29359  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29360  		v0.AddArg(y)
 29361  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29362  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29363  		v2.AuxInt = -64
 29364  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29365  		v3.AddArg(y)
 29366  		v2.AddArg(v3)
 29367  		v1.AddArg(v2)
 29368  		v0.AddArg(v1)
 29369  		v.AddArg(v0)
 29370  		return true
 29371  	}
 29372  }
 29373  func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
 29374  	b := v.Block
 29375  	_ = b
 29376  	typ := &b.Func.Config.Types
 29377  	_ = typ
 29378  	// match: (Rsh8Ux16 x y)
 29379  	// cond: shiftIsBounded(v)
 29380  	// result: (SRW (MOVBZreg x) y)
 29381  	for {
 29382  		_ = v.Args[1]
 29383  		x := v.Args[0]
 29384  		y := v.Args[1]
 29385  		if !(shiftIsBounded(v)) {
 29386  			break
 29387  		}
 29388  		v.reset(OpPPC64SRW)
 29389  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29390  		v0.AddArg(x)
 29391  		v.AddArg(v0)
 29392  		v.AddArg(y)
 29393  		return true
 29394  	}
 29395  	// match: (Rsh8Ux16 x y)
 29396  	// cond:
 29397  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 29398  	for {
 29399  		_ = v.Args[1]
 29400  		x := v.Args[0]
 29401  		y := v.Args[1]
 29402  		v.reset(OpPPC64SRW)
 29403  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29404  		v0.AddArg(x)
 29405  		v.AddArg(v0)
 29406  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29407  		v1.AddArg(y)
 29408  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29409  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29410  		v3.AuxInt = -8
 29411  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 29412  		v4.AddArg(y)
 29413  		v3.AddArg(v4)
 29414  		v2.AddArg(v3)
 29415  		v1.AddArg(v2)
 29416  		v.AddArg(v1)
 29417  		return true
 29418  	}
 29419  }
 29420  func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
 29421  	b := v.Block
 29422  	_ = b
 29423  	typ := &b.Func.Config.Types
 29424  	_ = typ
 29425  	// match: (Rsh8Ux32 x (Const64 [c]))
 29426  	// cond: uint32(c) < 8
 29427  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29428  	for {
 29429  		_ = v.Args[1]
 29430  		x := v.Args[0]
 29431  		v_1 := v.Args[1]
 29432  		if v_1.Op != OpConst64 {
 29433  			break
 29434  		}
 29435  		c := v_1.AuxInt
 29436  		if !(uint32(c) < 8) {
 29437  			break
 29438  		}
 29439  		v.reset(OpPPC64SRWconst)
 29440  		v.AuxInt = c
 29441  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29442  		v0.AddArg(x)
 29443  		v.AddArg(v0)
 29444  		return true
 29445  	}
 29446  	// match: (Rsh8Ux32 x (MOVDconst [c]))
 29447  	// cond: uint32(c) < 8
 29448  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29449  	for {
 29450  		_ = v.Args[1]
 29451  		x := v.Args[0]
 29452  		v_1 := v.Args[1]
 29453  		if v_1.Op != OpPPC64MOVDconst {
 29454  			break
 29455  		}
 29456  		c := v_1.AuxInt
 29457  		if !(uint32(c) < 8) {
 29458  			break
 29459  		}
 29460  		v.reset(OpPPC64SRWconst)
 29461  		v.AuxInt = c
 29462  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29463  		v0.AddArg(x)
 29464  		v.AddArg(v0)
 29465  		return true
 29466  	}
 29467  	// match: (Rsh8Ux32 x y)
 29468  	// cond: shiftIsBounded(v)
 29469  	// result: (SRW (MOVBZreg x) y)
 29470  	for {
 29471  		_ = v.Args[1]
 29472  		x := v.Args[0]
 29473  		y := v.Args[1]
 29474  		if !(shiftIsBounded(v)) {
 29475  			break
 29476  		}
 29477  		v.reset(OpPPC64SRW)
 29478  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29479  		v0.AddArg(x)
 29480  		v.AddArg(v0)
 29481  		v.AddArg(y)
 29482  		return true
 29483  	}
 29484  	// match: (Rsh8Ux32 x y)
 29485  	// cond:
 29486  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 29487  	for {
 29488  		_ = v.Args[1]
 29489  		x := v.Args[0]
 29490  		y := v.Args[1]
 29491  		v.reset(OpPPC64SRW)
 29492  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29493  		v0.AddArg(x)
 29494  		v.AddArg(v0)
 29495  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29496  		v1.AddArg(y)
 29497  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29498  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29499  		v3.AuxInt = -8
 29500  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 29501  		v4.AddArg(y)
 29502  		v3.AddArg(v4)
 29503  		v2.AddArg(v3)
 29504  		v1.AddArg(v2)
 29505  		v.AddArg(v1)
 29506  		return true
 29507  	}
 29508  }
 29509  func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
 29510  	b := v.Block
 29511  	_ = b
 29512  	typ := &b.Func.Config.Types
 29513  	_ = typ
 29514  	// match: (Rsh8Ux64 x (Const64 [c]))
 29515  	// cond: uint64(c) < 8
 29516  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29517  	for {
 29518  		_ = v.Args[1]
 29519  		x := v.Args[0]
 29520  		v_1 := v.Args[1]
 29521  		if v_1.Op != OpConst64 {
 29522  			break
 29523  		}
 29524  		c := v_1.AuxInt
 29525  		if !(uint64(c) < 8) {
 29526  			break
 29527  		}
 29528  		v.reset(OpPPC64SRWconst)
 29529  		v.AuxInt = c
 29530  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29531  		v0.AddArg(x)
 29532  		v.AddArg(v0)
 29533  		return true
 29534  	}
 29535  	// match: (Rsh8Ux64 _ (Const64 [c]))
 29536  	// cond: uint64(c) >= 8
 29537  	// result: (MOVDconst [0])
 29538  	for {
 29539  		_ = v.Args[1]
 29540  		v_1 := v.Args[1]
 29541  		if v_1.Op != OpConst64 {
 29542  			break
 29543  		}
 29544  		c := v_1.AuxInt
 29545  		if !(uint64(c) >= 8) {
 29546  			break
 29547  		}
 29548  		v.reset(OpPPC64MOVDconst)
 29549  		v.AuxInt = 0
 29550  		return true
 29551  	}
 29552  	// match: (Rsh8Ux64 x (MOVDconst [c]))
 29553  	// cond: uint64(c) < 8
 29554  	// result: (SRWconst (ZeroExt8to32 x) [c])
 29555  	for {
 29556  		_ = v.Args[1]
 29557  		x := v.Args[0]
 29558  		v_1 := v.Args[1]
 29559  		if v_1.Op != OpPPC64MOVDconst {
 29560  			break
 29561  		}
 29562  		c := v_1.AuxInt
 29563  		if !(uint64(c) < 8) {
 29564  			break
 29565  		}
 29566  		v.reset(OpPPC64SRWconst)
 29567  		v.AuxInt = c
 29568  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29569  		v0.AddArg(x)
 29570  		v.AddArg(v0)
 29571  		return true
 29572  	}
 29573  	// match: (Rsh8Ux64 x y)
 29574  	// cond: shiftIsBounded(v)
 29575  	// result: (SRW (MOVBZreg x) y)
 29576  	for {
 29577  		_ = v.Args[1]
 29578  		x := v.Args[0]
 29579  		y := v.Args[1]
 29580  		if !(shiftIsBounded(v)) {
 29581  			break
 29582  		}
 29583  		v.reset(OpPPC64SRW)
 29584  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29585  		v0.AddArg(x)
 29586  		v.AddArg(v0)
 29587  		v.AddArg(y)
 29588  		return true
 29589  	}
 29590  	// match: (Rsh8Ux64 x y)
 29591  	// cond:
 29592  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29593  	for {
 29594  		_ = v.Args[1]
 29595  		x := v.Args[0]
 29596  		y := v.Args[1]
 29597  		v.reset(OpPPC64SRW)
 29598  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29599  		v0.AddArg(x)
 29600  		v.AddArg(v0)
 29601  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29602  		v1.AddArg(y)
 29603  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29604  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29605  		v3.AuxInt = -8
 29606  		v3.AddArg(y)
 29607  		v2.AddArg(v3)
 29608  		v1.AddArg(v2)
 29609  		v.AddArg(v1)
 29610  		return true
 29611  	}
 29612  }
 29613  func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
 29614  	b := v.Block
 29615  	_ = b
 29616  	typ := &b.Func.Config.Types
 29617  	_ = typ
 29618  	// match: (Rsh8Ux8 x y)
 29619  	// cond: shiftIsBounded(v)
 29620  	// result: (SRW (MOVBZreg x) y)
 29621  	for {
 29622  		_ = v.Args[1]
 29623  		x := v.Args[0]
 29624  		y := v.Args[1]
 29625  		if !(shiftIsBounded(v)) {
 29626  			break
 29627  		}
 29628  		v.reset(OpPPC64SRW)
 29629  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29630  		v0.AddArg(x)
 29631  		v.AddArg(v0)
 29632  		v.AddArg(y)
 29633  		return true
 29634  	}
 29635  	// match: (Rsh8Ux8 x y)
 29636  	// cond:
 29637  	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29638  	for {
 29639  		_ = v.Args[1]
 29640  		x := v.Args[0]
 29641  		y := v.Args[1]
 29642  		v.reset(OpPPC64SRW)
 29643  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29644  		v0.AddArg(x)
 29645  		v.AddArg(v0)
 29646  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29647  		v1.AddArg(y)
 29648  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29649  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29650  		v3.AuxInt = -8
 29651  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29652  		v4.AddArg(y)
 29653  		v3.AddArg(v4)
 29654  		v2.AddArg(v3)
 29655  		v1.AddArg(v2)
 29656  		v.AddArg(v1)
 29657  		return true
 29658  	}
 29659  }
 29660  func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
 29661  	b := v.Block
 29662  	_ = b
 29663  	typ := &b.Func.Config.Types
 29664  	_ = typ
 29665  	// match: (Rsh8x16 x y)
 29666  	// cond: shiftIsBounded(v)
 29667  	// result: (SRAW (MOVBreg x) y)
 29668  	for {
 29669  		_ = v.Args[1]
 29670  		x := v.Args[0]
 29671  		y := v.Args[1]
 29672  		if !(shiftIsBounded(v)) {
 29673  			break
 29674  		}
 29675  		v.reset(OpPPC64SRAW)
 29676  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29677  		v0.AddArg(x)
 29678  		v.AddArg(v0)
 29679  		v.AddArg(y)
 29680  		return true
 29681  	}
 29682  	// match: (Rsh8x16 x y)
 29683  	// cond:
 29684  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 29685  	for {
 29686  		_ = v.Args[1]
 29687  		x := v.Args[0]
 29688  		y := v.Args[1]
 29689  		v.reset(OpPPC64SRAW)
 29690  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29691  		v0.AddArg(x)
 29692  		v.AddArg(v0)
 29693  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29694  		v1.AddArg(y)
 29695  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29696  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29697  		v3.AuxInt = -8
 29698  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 29699  		v4.AddArg(y)
 29700  		v3.AddArg(v4)
 29701  		v2.AddArg(v3)
 29702  		v1.AddArg(v2)
 29703  		v.AddArg(v1)
 29704  		return true
 29705  	}
 29706  }
 29707  func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
 29708  	b := v.Block
 29709  	_ = b
 29710  	typ := &b.Func.Config.Types
 29711  	_ = typ
 29712  	// match: (Rsh8x32 x (Const64 [c]))
 29713  	// cond: uint32(c) < 8
 29714  	// result: (SRAWconst (SignExt8to32 x) [c])
 29715  	for {
 29716  		_ = v.Args[1]
 29717  		x := v.Args[0]
 29718  		v_1 := v.Args[1]
 29719  		if v_1.Op != OpConst64 {
 29720  			break
 29721  		}
 29722  		c := v_1.AuxInt
 29723  		if !(uint32(c) < 8) {
 29724  			break
 29725  		}
 29726  		v.reset(OpPPC64SRAWconst)
 29727  		v.AuxInt = c
 29728  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29729  		v0.AddArg(x)
 29730  		v.AddArg(v0)
 29731  		return true
 29732  	}
 29733  	// match: (Rsh8x32 x (MOVDconst [c]))
 29734  	// cond: uint32(c) < 8
 29735  	// result: (SRAWconst (SignExt8to32 x) [c])
 29736  	for {
 29737  		_ = v.Args[1]
 29738  		x := v.Args[0]
 29739  		v_1 := v.Args[1]
 29740  		if v_1.Op != OpPPC64MOVDconst {
 29741  			break
 29742  		}
 29743  		c := v_1.AuxInt
 29744  		if !(uint32(c) < 8) {
 29745  			break
 29746  		}
 29747  		v.reset(OpPPC64SRAWconst)
 29748  		v.AuxInt = c
 29749  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29750  		v0.AddArg(x)
 29751  		v.AddArg(v0)
 29752  		return true
 29753  	}
 29754  	// match: (Rsh8x32 x y)
 29755  	// cond: shiftIsBounded(v)
 29756  	// result: (SRAW (MOVBreg x) y)
 29757  	for {
 29758  		_ = v.Args[1]
 29759  		x := v.Args[0]
 29760  		y := v.Args[1]
 29761  		if !(shiftIsBounded(v)) {
 29762  			break
 29763  		}
 29764  		v.reset(OpPPC64SRAW)
 29765  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29766  		v0.AddArg(x)
 29767  		v.AddArg(v0)
 29768  		v.AddArg(y)
 29769  		return true
 29770  	}
 29771  	// match: (Rsh8x32 x y)
 29772  	// cond:
 29773  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 29774  	for {
 29775  		_ = v.Args[1]
 29776  		x := v.Args[0]
 29777  		y := v.Args[1]
 29778  		v.reset(OpPPC64SRAW)
 29779  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29780  		v0.AddArg(x)
 29781  		v.AddArg(v0)
 29782  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29783  		v1.AddArg(y)
 29784  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29785  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29786  		v3.AuxInt = -8
 29787  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 29788  		v4.AddArg(y)
 29789  		v3.AddArg(v4)
 29790  		v2.AddArg(v3)
 29791  		v1.AddArg(v2)
 29792  		v.AddArg(v1)
 29793  		return true
 29794  	}
 29795  }
 29796  func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
 29797  	b := v.Block
 29798  	_ = b
 29799  	typ := &b.Func.Config.Types
 29800  	_ = typ
 29801  	// match: (Rsh8x64 x (Const64 [c]))
 29802  	// cond: uint64(c) < 8
 29803  	// result: (SRAWconst (SignExt8to32 x) [c])
 29804  	for {
 29805  		_ = v.Args[1]
 29806  		x := v.Args[0]
 29807  		v_1 := v.Args[1]
 29808  		if v_1.Op != OpConst64 {
 29809  			break
 29810  		}
 29811  		c := v_1.AuxInt
 29812  		if !(uint64(c) < 8) {
 29813  			break
 29814  		}
 29815  		v.reset(OpPPC64SRAWconst)
 29816  		v.AuxInt = c
 29817  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29818  		v0.AddArg(x)
 29819  		v.AddArg(v0)
 29820  		return true
 29821  	}
 29822  	// match: (Rsh8x64 x (Const64 [c]))
 29823  	// cond: uint64(c) >= 8
 29824  	// result: (SRAWconst (SignExt8to32 x) [63])
 29825  	for {
 29826  		_ = v.Args[1]
 29827  		x := v.Args[0]
 29828  		v_1 := v.Args[1]
 29829  		if v_1.Op != OpConst64 {
 29830  			break
 29831  		}
 29832  		c := v_1.AuxInt
 29833  		if !(uint64(c) >= 8) {
 29834  			break
 29835  		}
 29836  		v.reset(OpPPC64SRAWconst)
 29837  		v.AuxInt = 63
 29838  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29839  		v0.AddArg(x)
 29840  		v.AddArg(v0)
 29841  		return true
 29842  	}
 29843  	// match: (Rsh8x64 x (MOVDconst [c]))
 29844  	// cond: uint64(c) < 8
 29845  	// result: (SRAWconst (SignExt8to32 x) [c])
 29846  	for {
 29847  		_ = v.Args[1]
 29848  		x := v.Args[0]
 29849  		v_1 := v.Args[1]
 29850  		if v_1.Op != OpPPC64MOVDconst {
 29851  			break
 29852  		}
 29853  		c := v_1.AuxInt
 29854  		if !(uint64(c) < 8) {
 29855  			break
 29856  		}
 29857  		v.reset(OpPPC64SRAWconst)
 29858  		v.AuxInt = c
 29859  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29860  		v0.AddArg(x)
 29861  		v.AddArg(v0)
 29862  		return true
 29863  	}
 29864  	// match: (Rsh8x64 x y)
 29865  	// cond: shiftIsBounded(v)
 29866  	// result: (SRAW (MOVBreg x) y)
 29867  	for {
 29868  		_ = v.Args[1]
 29869  		x := v.Args[0]
 29870  		y := v.Args[1]
 29871  		if !(shiftIsBounded(v)) {
 29872  			break
 29873  		}
 29874  		v.reset(OpPPC64SRAW)
 29875  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29876  		v0.AddArg(x)
 29877  		v.AddArg(v0)
 29878  		v.AddArg(y)
 29879  		return true
 29880  	}
 29881  	// match: (Rsh8x64 x y)
 29882  	// cond:
 29883  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29884  	for {
 29885  		_ = v.Args[1]
 29886  		x := v.Args[0]
 29887  		y := v.Args[1]
 29888  		v.reset(OpPPC64SRAW)
 29889  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29890  		v0.AddArg(x)
 29891  		v.AddArg(v0)
 29892  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29893  		v1.AddArg(y)
 29894  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29895  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29896  		v3.AuxInt = -8
 29897  		v3.AddArg(y)
 29898  		v2.AddArg(v3)
 29899  		v1.AddArg(v2)
 29900  		v.AddArg(v1)
 29901  		return true
 29902  	}
 29903  }
 29904  func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
 29905  	b := v.Block
 29906  	_ = b
 29907  	typ := &b.Func.Config.Types
 29908  	_ = typ
 29909  	// match: (Rsh8x8 x y)
 29910  	// cond: shiftIsBounded(v)
 29911  	// result: (SRAW (MOVBreg x) y)
 29912  	for {
 29913  		_ = v.Args[1]
 29914  		x := v.Args[0]
 29915  		y := v.Args[1]
 29916  		if !(shiftIsBounded(v)) {
 29917  			break
 29918  		}
 29919  		v.reset(OpPPC64SRAW)
 29920  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29921  		v0.AddArg(x)
 29922  		v.AddArg(v0)
 29923  		v.AddArg(y)
 29924  		return true
 29925  	}
 29926  	// match: (Rsh8x8 x y)
 29927  	// cond:
 29928  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29929  	for {
 29930  		_ = v.Args[1]
 29931  		x := v.Args[0]
 29932  		y := v.Args[1]
 29933  		v.reset(OpPPC64SRAW)
 29934  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29935  		v0.AddArg(x)
 29936  		v.AddArg(v0)
 29937  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29938  		v1.AddArg(y)
 29939  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29940  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29941  		v3.AuxInt = -8
 29942  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29943  		v4.AddArg(y)
 29944  		v3.AddArg(v4)
 29945  		v2.AddArg(v3)
 29946  		v1.AddArg(v2)
 29947  		v.AddArg(v1)
 29948  		return true
 29949  	}
 29950  }
 29951  func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
 29952  	// match: (SignExt16to32 x)
 29953  	// cond:
 29954  	// result: (MOVHreg x)
 29955  	for {
 29956  		x := v.Args[0]
 29957  		v.reset(OpPPC64MOVHreg)
 29958  		v.AddArg(x)
 29959  		return true
 29960  	}
 29961  }
 29962  func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
 29963  	// match: (SignExt16to64 x)
 29964  	// cond:
 29965  	// result: (MOVHreg x)
 29966  	for {
 29967  		x := v.Args[0]
 29968  		v.reset(OpPPC64MOVHreg)
 29969  		v.AddArg(x)
 29970  		return true
 29971  	}
 29972  }
 29973  func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
 29974  	// match: (SignExt32to64 x)
 29975  	// cond:
 29976  	// result: (MOVWreg x)
 29977  	for {
 29978  		x := v.Args[0]
 29979  		v.reset(OpPPC64MOVWreg)
 29980  		v.AddArg(x)
 29981  		return true
 29982  	}
 29983  }
 29984  func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
 29985  	// match: (SignExt8to16 x)
 29986  	// cond:
 29987  	// result: (MOVBreg x)
 29988  	for {
 29989  		x := v.Args[0]
 29990  		v.reset(OpPPC64MOVBreg)
 29991  		v.AddArg(x)
 29992  		return true
 29993  	}
 29994  }
 29995  func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
 29996  	// match: (SignExt8to32 x)
 29997  	// cond:
 29998  	// result: (MOVBreg x)
 29999  	for {
 30000  		x := v.Args[0]
 30001  		v.reset(OpPPC64MOVBreg)
 30002  		v.AddArg(x)
 30003  		return true
 30004  	}
 30005  }
 30006  func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
 30007  	// match: (SignExt8to64 x)
 30008  	// cond:
 30009  	// result: (MOVBreg x)
 30010  	for {
 30011  		x := v.Args[0]
 30012  		v.reset(OpPPC64MOVBreg)
 30013  		v.AddArg(x)
 30014  		return true
 30015  	}
 30016  }
 30017  func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
 30018  	b := v.Block
 30019  	_ = b
 30020  	// match: (Slicemask <t> x)
 30021  	// cond:
 30022  	// result: (SRADconst (NEG <t> x) [63])
 30023  	for {
 30024  		t := v.Type
 30025  		x := v.Args[0]
 30026  		v.reset(OpPPC64SRADconst)
 30027  		v.AuxInt = 63
 30028  		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
 30029  		v0.AddArg(x)
 30030  		v.AddArg(v0)
 30031  		return true
 30032  	}
 30033  }
 30034  func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
 30035  	// match: (Sqrt x)
 30036  	// cond:
 30037  	// result: (FSQRT x)
 30038  	for {
 30039  		x := v.Args[0]
 30040  		v.reset(OpPPC64FSQRT)
 30041  		v.AddArg(x)
 30042  		return true
 30043  	}
 30044  }
 30045  func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
 30046  	// match: (StaticCall [argwid] {target} mem)
 30047  	// cond:
 30048  	// result: (CALLstatic [argwid] {target} mem)
 30049  	for {
 30050  		argwid := v.AuxInt
 30051  		target := v.Aux
 30052  		mem := v.Args[0]
 30053  		v.reset(OpPPC64CALLstatic)
 30054  		v.AuxInt = argwid
 30055  		v.Aux = target
 30056  		v.AddArg(mem)
 30057  		return true
 30058  	}
 30059  }
 30060  func rewriteValuePPC64_OpStore_0(v *Value) bool {
 30061  	// match: (Store {t} ptr val mem)
 30062  	// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
 30063  	// result: (FMOVDstore ptr val mem)
 30064  	for {
 30065  		t := v.Aux
 30066  		_ = v.Args[2]
 30067  		ptr := v.Args[0]
 30068  		val := v.Args[1]
 30069  		mem := v.Args[2]
 30070  		if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
 30071  			break
 30072  		}
 30073  		v.reset(OpPPC64FMOVDstore)
 30074  		v.AddArg(ptr)
 30075  		v.AddArg(val)
 30076  		v.AddArg(mem)
 30077  		return true
 30078  	}
 30079  	// match: (Store {t} ptr val mem)
 30080  	// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
 30081  	// result: (FMOVDstore ptr val mem)
 30082  	for {
 30083  		t := v.Aux
 30084  		_ = v.Args[2]
 30085  		ptr := v.Args[0]
 30086  		val := v.Args[1]
 30087  		mem := v.Args[2]
 30088  		if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
 30089  			break
 30090  		}
 30091  		v.reset(OpPPC64FMOVDstore)
 30092  		v.AddArg(ptr)
 30093  		v.AddArg(val)
 30094  		v.AddArg(mem)
 30095  		return true
 30096  	}
 30097  	// match: (Store {t} ptr val mem)
 30098  	// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
 30099  	// result: (FMOVSstore ptr val mem)
 30100  	for {
 30101  		t := v.Aux
 30102  		_ = v.Args[2]
 30103  		ptr := v.Args[0]
 30104  		val := v.Args[1]
 30105  		mem := v.Args[2]
 30106  		if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
 30107  			break
 30108  		}
 30109  		v.reset(OpPPC64FMOVSstore)
 30110  		v.AddArg(ptr)
 30111  		v.AddArg(val)
 30112  		v.AddArg(mem)
 30113  		return true
 30114  	}
 30115  	// match: (Store {t} ptr val mem)
 30116  	// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
 30117  	// result: (MOVDstore ptr val mem)
 30118  	for {
 30119  		t := v.Aux
 30120  		_ = v.Args[2]
 30121  		ptr := v.Args[0]
 30122  		val := v.Args[1]
 30123  		mem := v.Args[2]
 30124  		if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
 30125  			break
 30126  		}
 30127  		v.reset(OpPPC64MOVDstore)
 30128  		v.AddArg(ptr)
 30129  		v.AddArg(val)
 30130  		v.AddArg(mem)
 30131  		return true
 30132  	}
 30133  	// match: (Store {t} ptr val mem)
 30134  	// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
 30135  	// result: (MOVWstore ptr val mem)
 30136  	for {
 30137  		t := v.Aux
 30138  		_ = v.Args[2]
 30139  		ptr := v.Args[0]
 30140  		val := v.Args[1]
 30141  		mem := v.Args[2]
 30142  		if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
 30143  			break
 30144  		}
 30145  		v.reset(OpPPC64MOVWstore)
 30146  		v.AddArg(ptr)
 30147  		v.AddArg(val)
 30148  		v.AddArg(mem)
 30149  		return true
 30150  	}
 30151  	// match: (Store {t} ptr val mem)
 30152  	// cond: t.(*types.Type).Size() == 2
 30153  	// result: (MOVHstore ptr val mem)
 30154  	for {
 30155  		t := v.Aux
 30156  		_ = v.Args[2]
 30157  		ptr := v.Args[0]
 30158  		val := v.Args[1]
 30159  		mem := v.Args[2]
 30160  		if !(t.(*types.Type).Size() == 2) {
 30161  			break
 30162  		}
 30163  		v.reset(OpPPC64MOVHstore)
 30164  		v.AddArg(ptr)
 30165  		v.AddArg(val)
 30166  		v.AddArg(mem)
 30167  		return true
 30168  	}
 30169  	// match: (Store {t} ptr val mem)
 30170  	// cond: t.(*types.Type).Size() == 1
 30171  	// result: (MOVBstore ptr val mem)
 30172  	for {
 30173  		t := v.Aux
 30174  		_ = v.Args[2]
 30175  		ptr := v.Args[0]
 30176  		val := v.Args[1]
 30177  		mem := v.Args[2]
 30178  		if !(t.(*types.Type).Size() == 1) {
 30179  			break
 30180  		}
 30181  		v.reset(OpPPC64MOVBstore)
 30182  		v.AddArg(ptr)
 30183  		v.AddArg(val)
 30184  		v.AddArg(mem)
 30185  		return true
 30186  	}
 30187  	return false
 30188  }
 30189  func rewriteValuePPC64_OpSub16_0(v *Value) bool {
 30190  	// match: (Sub16 x y)
 30191  	// cond:
 30192  	// result: (SUB x y)
 30193  	for {
 30194  		_ = v.Args[1]
 30195  		x := v.Args[0]
 30196  		y := v.Args[1]
 30197  		v.reset(OpPPC64SUB)
 30198  		v.AddArg(x)
 30199  		v.AddArg(y)
 30200  		return true
 30201  	}
 30202  }
 30203  func rewriteValuePPC64_OpSub32_0(v *Value) bool {
 30204  	// match: (Sub32 x y)
 30205  	// cond:
 30206  	// result: (SUB x y)
 30207  	for {
 30208  		_ = v.Args[1]
 30209  		x := v.Args[0]
 30210  		y := v.Args[1]
 30211  		v.reset(OpPPC64SUB)
 30212  		v.AddArg(x)
 30213  		v.AddArg(y)
 30214  		return true
 30215  	}
 30216  }
 30217  func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
 30218  	// match: (Sub32F x y)
 30219  	// cond:
 30220  	// result: (FSUBS x y)
 30221  	for {
 30222  		_ = v.Args[1]
 30223  		x := v.Args[0]
 30224  		y := v.Args[1]
 30225  		v.reset(OpPPC64FSUBS)
 30226  		v.AddArg(x)
 30227  		v.AddArg(y)
 30228  		return true
 30229  	}
 30230  }
 30231  func rewriteValuePPC64_OpSub64_0(v *Value) bool {
 30232  	// match: (Sub64 x y)
 30233  	// cond:
 30234  	// result: (SUB x y)
 30235  	for {
 30236  		_ = v.Args[1]
 30237  		x := v.Args[0]
 30238  		y := v.Args[1]
 30239  		v.reset(OpPPC64SUB)
 30240  		v.AddArg(x)
 30241  		v.AddArg(y)
 30242  		return true
 30243  	}
 30244  }
 30245  func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
 30246  	// match: (Sub64F x y)
 30247  	// cond:
 30248  	// result: (FSUB x y)
 30249  	for {
 30250  		_ = v.Args[1]
 30251  		x := v.Args[0]
 30252  		y := v.Args[1]
 30253  		v.reset(OpPPC64FSUB)
 30254  		v.AddArg(x)
 30255  		v.AddArg(y)
 30256  		return true
 30257  	}
 30258  }
 30259  func rewriteValuePPC64_OpSub8_0(v *Value) bool {
 30260  	// match: (Sub8 x y)
 30261  	// cond:
 30262  	// result: (SUB x y)
 30263  	for {
 30264  		_ = v.Args[1]
 30265  		x := v.Args[0]
 30266  		y := v.Args[1]
 30267  		v.reset(OpPPC64SUB)
 30268  		v.AddArg(x)
 30269  		v.AddArg(y)
 30270  		return true
 30271  	}
 30272  }
 30273  func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
 30274  	// match: (SubPtr x y)
 30275  	// cond:
 30276  	// result: (SUB x y)
 30277  	for {
 30278  		_ = v.Args[1]
 30279  		x := v.Args[0]
 30280  		y := v.Args[1]
 30281  		v.reset(OpPPC64SUB)
 30282  		v.AddArg(x)
 30283  		v.AddArg(y)
 30284  		return true
 30285  	}
 30286  }
 30287  func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
 30288  	// match: (Trunc x)
 30289  	// cond:
 30290  	// result: (FTRUNC x)
 30291  	for {
 30292  		x := v.Args[0]
 30293  		v.reset(OpPPC64FTRUNC)
 30294  		v.AddArg(x)
 30295  		return true
 30296  	}
 30297  }
 30298  func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
 30299  	// match: (Trunc16to8 <t> x)
 30300  	// cond: isSigned(t)
 30301  	// result: (MOVBreg x)
 30302  	for {
 30303  		t := v.Type
 30304  		x := v.Args[0]
 30305  		if !(isSigned(t)) {
 30306  			break
 30307  		}
 30308  		v.reset(OpPPC64MOVBreg)
 30309  		v.AddArg(x)
 30310  		return true
 30311  	}
 30312  	// match: (Trunc16to8 x)
 30313  	// cond:
 30314  	// result: (MOVBZreg x)
 30315  	for {
 30316  		x := v.Args[0]
 30317  		v.reset(OpPPC64MOVBZreg)
 30318  		v.AddArg(x)
 30319  		return true
 30320  	}
 30321  }
 30322  func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
 30323  	// match: (Trunc32to16 <t> x)
 30324  	// cond: isSigned(t)
 30325  	// result: (MOVHreg x)
 30326  	for {
 30327  		t := v.Type
 30328  		x := v.Args[0]
 30329  		if !(isSigned(t)) {
 30330  			break
 30331  		}
 30332  		v.reset(OpPPC64MOVHreg)
 30333  		v.AddArg(x)
 30334  		return true
 30335  	}
 30336  	// match: (Trunc32to16 x)
 30337  	// cond:
 30338  	// result: (MOVHZreg x)
 30339  	for {
 30340  		x := v.Args[0]
 30341  		v.reset(OpPPC64MOVHZreg)
 30342  		v.AddArg(x)
 30343  		return true
 30344  	}
 30345  }
 30346  func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
 30347  	// match: (Trunc32to8 <t> x)
 30348  	// cond: isSigned(t)
 30349  	// result: (MOVBreg x)
 30350  	for {
 30351  		t := v.Type
 30352  		x := v.Args[0]
 30353  		if !(isSigned(t)) {
 30354  			break
 30355  		}
 30356  		v.reset(OpPPC64MOVBreg)
 30357  		v.AddArg(x)
 30358  		return true
 30359  	}
 30360  	// match: (Trunc32to8 x)
 30361  	// cond:
 30362  	// result: (MOVBZreg x)
 30363  	for {
 30364  		x := v.Args[0]
 30365  		v.reset(OpPPC64MOVBZreg)
 30366  		v.AddArg(x)
 30367  		return true
 30368  	}
 30369  }
 30370  func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
 30371  	// match: (Trunc64to16 <t> x)
 30372  	// cond: isSigned(t)
 30373  	// result: (MOVHreg x)
 30374  	for {
 30375  		t := v.Type
 30376  		x := v.Args[0]
 30377  		if !(isSigned(t)) {
 30378  			break
 30379  		}
 30380  		v.reset(OpPPC64MOVHreg)
 30381  		v.AddArg(x)
 30382  		return true
 30383  	}
 30384  	// match: (Trunc64to16 x)
 30385  	// cond:
 30386  	// result: (MOVHZreg x)
 30387  	for {
 30388  		x := v.Args[0]
 30389  		v.reset(OpPPC64MOVHZreg)
 30390  		v.AddArg(x)
 30391  		return true
 30392  	}
 30393  }
 30394  func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
 30395  	// match: (Trunc64to32 <t> x)
 30396  	// cond: isSigned(t)
 30397  	// result: (MOVWreg x)
 30398  	for {
 30399  		t := v.Type
 30400  		x := v.Args[0]
 30401  		if !(isSigned(t)) {
 30402  			break
 30403  		}
 30404  		v.reset(OpPPC64MOVWreg)
 30405  		v.AddArg(x)
 30406  		return true
 30407  	}
 30408  	// match: (Trunc64to32 x)
 30409  	// cond:
 30410  	// result: (MOVWZreg x)
 30411  	for {
 30412  		x := v.Args[0]
 30413  		v.reset(OpPPC64MOVWZreg)
 30414  		v.AddArg(x)
 30415  		return true
 30416  	}
 30417  }
 30418  func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
 30419  	// match: (Trunc64to8 <t> x)
 30420  	// cond: isSigned(t)
 30421  	// result: (MOVBreg x)
 30422  	for {
 30423  		t := v.Type
 30424  		x := v.Args[0]
 30425  		if !(isSigned(t)) {
 30426  			break
 30427  		}
 30428  		v.reset(OpPPC64MOVBreg)
 30429  		v.AddArg(x)
 30430  		return true
 30431  	}
 30432  	// match: (Trunc64to8 x)
 30433  	// cond:
 30434  	// result: (MOVBZreg x)
 30435  	for {
 30436  		x := v.Args[0]
 30437  		v.reset(OpPPC64MOVBZreg)
 30438  		v.AddArg(x)
 30439  		return true
 30440  	}
 30441  }
 30442  func rewriteValuePPC64_OpWB_0(v *Value) bool {
 30443  	// match: (WB {fn} destptr srcptr mem)
 30444  	// cond:
 30445  	// result: (LoweredWB {fn} destptr srcptr mem)
 30446  	for {
 30447  		fn := v.Aux
 30448  		_ = v.Args[2]
 30449  		destptr := v.Args[0]
 30450  		srcptr := v.Args[1]
 30451  		mem := v.Args[2]
 30452  		v.reset(OpPPC64LoweredWB)
 30453  		v.Aux = fn
 30454  		v.AddArg(destptr)
 30455  		v.AddArg(srcptr)
 30456  		v.AddArg(mem)
 30457  		return true
 30458  	}
 30459  }
 30460  func rewriteValuePPC64_OpXor16_0(v *Value) bool {
 30461  	// match: (Xor16 x y)
 30462  	// cond:
 30463  	// result: (XOR x y)
 30464  	for {
 30465  		_ = v.Args[1]
 30466  		x := v.Args[0]
 30467  		y := v.Args[1]
 30468  		v.reset(OpPPC64XOR)
 30469  		v.AddArg(x)
 30470  		v.AddArg(y)
 30471  		return true
 30472  	}
 30473  }
 30474  func rewriteValuePPC64_OpXor32_0(v *Value) bool {
 30475  	// match: (Xor32 x y)
 30476  	// cond:
 30477  	// result: (XOR x y)
 30478  	for {
 30479  		_ = v.Args[1]
 30480  		x := v.Args[0]
 30481  		y := v.Args[1]
 30482  		v.reset(OpPPC64XOR)
 30483  		v.AddArg(x)
 30484  		v.AddArg(y)
 30485  		return true
 30486  	}
 30487  }
 30488  func rewriteValuePPC64_OpXor64_0(v *Value) bool {
 30489  	// match: (Xor64 x y)
 30490  	// cond:
 30491  	// result: (XOR x y)
 30492  	for {
 30493  		_ = v.Args[1]
 30494  		x := v.Args[0]
 30495  		y := v.Args[1]
 30496  		v.reset(OpPPC64XOR)
 30497  		v.AddArg(x)
 30498  		v.AddArg(y)
 30499  		return true
 30500  	}
 30501  }
 30502  func rewriteValuePPC64_OpXor8_0(v *Value) bool {
 30503  	// match: (Xor8 x y)
 30504  	// cond:
 30505  	// result: (XOR x y)
 30506  	for {
 30507  		_ = v.Args[1]
 30508  		x := v.Args[0]
 30509  		y := v.Args[1]
 30510  		v.reset(OpPPC64XOR)
 30511  		v.AddArg(x)
 30512  		v.AddArg(y)
 30513  		return true
 30514  	}
 30515  }
 30516  func rewriteValuePPC64_OpZero_0(v *Value) bool {
 30517  	b := v.Block
 30518  	_ = b
 30519  	// match: (Zero [0] _ mem)
 30520  	// cond:
 30521  	// result: mem
 30522  	for {
 30523  		if v.AuxInt != 0 {
 30524  			break
 30525  		}
 30526  		_ = v.Args[1]
 30527  		mem := v.Args[1]
 30528  		v.reset(OpCopy)
 30529  		v.Type = mem.Type
 30530  		v.AddArg(mem)
 30531  		return true
 30532  	}
 30533  	// match: (Zero [1] destptr mem)
 30534  	// cond:
 30535  	// result: (MOVBstorezero destptr mem)
 30536  	for {
 30537  		if v.AuxInt != 1 {
 30538  			break
 30539  		}
 30540  		_ = v.Args[1]
 30541  		destptr := v.Args[0]
 30542  		mem := v.Args[1]
 30543  		v.reset(OpPPC64MOVBstorezero)
 30544  		v.AddArg(destptr)
 30545  		v.AddArg(mem)
 30546  		return true
 30547  	}
 30548  	// match: (Zero [2] destptr mem)
 30549  	// cond:
 30550  	// result: (MOVHstorezero destptr mem)
 30551  	for {
 30552  		if v.AuxInt != 2 {
 30553  			break
 30554  		}
 30555  		_ = v.Args[1]
 30556  		destptr := v.Args[0]
 30557  		mem := v.Args[1]
 30558  		v.reset(OpPPC64MOVHstorezero)
 30559  		v.AddArg(destptr)
 30560  		v.AddArg(mem)
 30561  		return true
 30562  	}
 30563  	// match: (Zero [3] destptr mem)
 30564  	// cond:
 30565  	// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
 30566  	for {
 30567  		if v.AuxInt != 3 {
 30568  			break
 30569  		}
 30570  		_ = v.Args[1]
 30571  		destptr := v.Args[0]
 30572  		mem := v.Args[1]
 30573  		v.reset(OpPPC64MOVBstorezero)
 30574  		v.AuxInt = 2
 30575  		v.AddArg(destptr)
 30576  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30577  		v0.AddArg(destptr)
 30578  		v0.AddArg(mem)
 30579  		v.AddArg(v0)
 30580  		return true
 30581  	}
 30582  	// match: (Zero [4] destptr mem)
 30583  	// cond:
 30584  	// result: (MOVWstorezero destptr mem)
 30585  	for {
 30586  		if v.AuxInt != 4 {
 30587  			break
 30588  		}
 30589  		_ = v.Args[1]
 30590  		destptr := v.Args[0]
 30591  		mem := v.Args[1]
 30592  		v.reset(OpPPC64MOVWstorezero)
 30593  		v.AddArg(destptr)
 30594  		v.AddArg(mem)
 30595  		return true
 30596  	}
 30597  	// match: (Zero [5] destptr mem)
 30598  	// cond:
 30599  	// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
 30600  	for {
 30601  		if v.AuxInt != 5 {
 30602  			break
 30603  		}
 30604  		_ = v.Args[1]
 30605  		destptr := v.Args[0]
 30606  		mem := v.Args[1]
 30607  		v.reset(OpPPC64MOVBstorezero)
 30608  		v.AuxInt = 4
 30609  		v.AddArg(destptr)
 30610  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30611  		v0.AddArg(destptr)
 30612  		v0.AddArg(mem)
 30613  		v.AddArg(v0)
 30614  		return true
 30615  	}
 30616  	// match: (Zero [6] destptr mem)
 30617  	// cond:
 30618  	// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
 30619  	for {
 30620  		if v.AuxInt != 6 {
 30621  			break
 30622  		}
 30623  		_ = v.Args[1]
 30624  		destptr := v.Args[0]
 30625  		mem := v.Args[1]
 30626  		v.reset(OpPPC64MOVHstorezero)
 30627  		v.AuxInt = 4
 30628  		v.AddArg(destptr)
 30629  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30630  		v0.AddArg(destptr)
 30631  		v0.AddArg(mem)
 30632  		v.AddArg(v0)
 30633  		return true
 30634  	}
 30635  	// match: (Zero [7] destptr mem)
 30636  	// cond:
 30637  	// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
 30638  	for {
 30639  		if v.AuxInt != 7 {
 30640  			break
 30641  		}
 30642  		_ = v.Args[1]
 30643  		destptr := v.Args[0]
 30644  		mem := v.Args[1]
 30645  		v.reset(OpPPC64MOVBstorezero)
 30646  		v.AuxInt = 6
 30647  		v.AddArg(destptr)
 30648  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30649  		v0.AuxInt = 4
 30650  		v0.AddArg(destptr)
 30651  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30652  		v1.AddArg(destptr)
 30653  		v1.AddArg(mem)
 30654  		v0.AddArg(v1)
 30655  		v.AddArg(v0)
 30656  		return true
 30657  	}
 30658  	// match: (Zero [8] {t} destptr mem)
 30659  	// cond: t.(*types.Type).Alignment()%4 == 0
 30660  	// result: (MOVDstorezero destptr mem)
 30661  	for {
 30662  		if v.AuxInt != 8 {
 30663  			break
 30664  		}
 30665  		t := v.Aux
 30666  		_ = v.Args[1]
 30667  		destptr := v.Args[0]
 30668  		mem := v.Args[1]
 30669  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30670  			break
 30671  		}
 30672  		v.reset(OpPPC64MOVDstorezero)
 30673  		v.AddArg(destptr)
 30674  		v.AddArg(mem)
 30675  		return true
 30676  	}
 30677  	// match: (Zero [8] destptr mem)
 30678  	// cond:
 30679  	// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
 30680  	for {
 30681  		if v.AuxInt != 8 {
 30682  			break
 30683  		}
 30684  		_ = v.Args[1]
 30685  		destptr := v.Args[0]
 30686  		mem := v.Args[1]
 30687  		v.reset(OpPPC64MOVWstorezero)
 30688  		v.AuxInt = 4
 30689  		v.AddArg(destptr)
 30690  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30691  		v0.AuxInt = 0
 30692  		v0.AddArg(destptr)
 30693  		v0.AddArg(mem)
 30694  		v.AddArg(v0)
 30695  		return true
 30696  	}
 30697  	return false
 30698  }
 30699  func rewriteValuePPC64_OpZero_10(v *Value) bool {
 30700  	b := v.Block
 30701  	_ = b
 30702  	// match: (Zero [12] {t} destptr mem)
 30703  	// cond: t.(*types.Type).Alignment()%4 == 0
 30704  	// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30705  	for {
 30706  		if v.AuxInt != 12 {
 30707  			break
 30708  		}
 30709  		t := v.Aux
 30710  		_ = v.Args[1]
 30711  		destptr := v.Args[0]
 30712  		mem := v.Args[1]
 30713  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30714  			break
 30715  		}
 30716  		v.reset(OpPPC64MOVWstorezero)
 30717  		v.AuxInt = 8
 30718  		v.AddArg(destptr)
 30719  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30720  		v0.AuxInt = 0
 30721  		v0.AddArg(destptr)
 30722  		v0.AddArg(mem)
 30723  		v.AddArg(v0)
 30724  		return true
 30725  	}
 30726  	// match: (Zero [16] {t} destptr mem)
 30727  	// cond: t.(*types.Type).Alignment()%4 == 0
 30728  	// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30729  	for {
 30730  		if v.AuxInt != 16 {
 30731  			break
 30732  		}
 30733  		t := v.Aux
 30734  		_ = v.Args[1]
 30735  		destptr := v.Args[0]
 30736  		mem := v.Args[1]
 30737  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30738  			break
 30739  		}
 30740  		v.reset(OpPPC64MOVDstorezero)
 30741  		v.AuxInt = 8
 30742  		v.AddArg(destptr)
 30743  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30744  		v0.AuxInt = 0
 30745  		v0.AddArg(destptr)
 30746  		v0.AddArg(mem)
 30747  		v.AddArg(v0)
 30748  		return true
 30749  	}
 30750  	// match: (Zero [24] {t} destptr mem)
 30751  	// cond: t.(*types.Type).Alignment()%4 == 0
 30752  	// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
 30753  	for {
 30754  		if v.AuxInt != 24 {
 30755  			break
 30756  		}
 30757  		t := v.Aux
 30758  		_ = v.Args[1]
 30759  		destptr := v.Args[0]
 30760  		mem := v.Args[1]
 30761  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30762  			break
 30763  		}
 30764  		v.reset(OpPPC64MOVDstorezero)
 30765  		v.AuxInt = 16
 30766  		v.AddArg(destptr)
 30767  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30768  		v0.AuxInt = 8
 30769  		v0.AddArg(destptr)
 30770  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30771  		v1.AuxInt = 0
 30772  		v1.AddArg(destptr)
 30773  		v1.AddArg(mem)
 30774  		v0.AddArg(v1)
 30775  		v.AddArg(v0)
 30776  		return true
 30777  	}
 30778  	// match: (Zero [32] {t} destptr mem)
 30779  	// cond: t.(*types.Type).Alignment()%4 == 0
 30780  	// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
 30781  	for {
 30782  		if v.AuxInt != 32 {
 30783  			break
 30784  		}
 30785  		t := v.Aux
 30786  		_ = v.Args[1]
 30787  		destptr := v.Args[0]
 30788  		mem := v.Args[1]
 30789  		if !(t.(*types.Type).Alignment()%4 == 0) {
 30790  			break
 30791  		}
 30792  		v.reset(OpPPC64MOVDstorezero)
 30793  		v.AuxInt = 24
 30794  		v.AddArg(destptr)
 30795  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30796  		v0.AuxInt = 16
 30797  		v0.AddArg(destptr)
 30798  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30799  		v1.AuxInt = 8
 30800  		v1.AddArg(destptr)
 30801  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30802  		v2.AuxInt = 0
 30803  		v2.AddArg(destptr)
 30804  		v2.AddArg(mem)
 30805  		v1.AddArg(v2)
 30806  		v0.AddArg(v1)
 30807  		v.AddArg(v0)
 30808  		return true
 30809  	}
 30810  	// match: (Zero [s] ptr mem)
 30811  	// cond:
 30812  	// result: (LoweredZero [s] ptr mem)
 30813  	for {
 30814  		s := v.AuxInt
 30815  		_ = v.Args[1]
 30816  		ptr := v.Args[0]
 30817  		mem := v.Args[1]
 30818  		v.reset(OpPPC64LoweredZero)
 30819  		v.AuxInt = s
 30820  		v.AddArg(ptr)
 30821  		v.AddArg(mem)
 30822  		return true
 30823  	}
 30824  }
 30825  func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
 30826  	// match: (ZeroExt16to32 x)
 30827  	// cond:
 30828  	// result: (MOVHZreg x)
 30829  	for {
 30830  		x := v.Args[0]
 30831  		v.reset(OpPPC64MOVHZreg)
 30832  		v.AddArg(x)
 30833  		return true
 30834  	}
 30835  }
 30836  func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
 30837  	// match: (ZeroExt16to64 x)
 30838  	// cond:
 30839  	// result: (MOVHZreg x)
 30840  	for {
 30841  		x := v.Args[0]
 30842  		v.reset(OpPPC64MOVHZreg)
 30843  		v.AddArg(x)
 30844  		return true
 30845  	}
 30846  }
 30847  func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
 30848  	// match: (ZeroExt32to64 x)
 30849  	// cond:
 30850  	// result: (MOVWZreg x)
 30851  	for {
 30852  		x := v.Args[0]
 30853  		v.reset(OpPPC64MOVWZreg)
 30854  		v.AddArg(x)
 30855  		return true
 30856  	}
 30857  }
 30858  func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
 30859  	// match: (ZeroExt8to16 x)
 30860  	// cond:
 30861  	// result: (MOVBZreg x)
 30862  	for {
 30863  		x := v.Args[0]
 30864  		v.reset(OpPPC64MOVBZreg)
 30865  		v.AddArg(x)
 30866  		return true
 30867  	}
 30868  }
 30869  func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
 30870  	// match: (ZeroExt8to32 x)
 30871  	// cond:
 30872  	// result: (MOVBZreg x)
 30873  	for {
 30874  		x := v.Args[0]
 30875  		v.reset(OpPPC64MOVBZreg)
 30876  		v.AddArg(x)
 30877  		return true
 30878  	}
 30879  }
 30880  func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
 30881  	// match: (ZeroExt8to64 x)
 30882  	// cond:
 30883  	// result: (MOVBZreg x)
 30884  	for {
 30885  		x := v.Args[0]
 30886  		v.reset(OpPPC64MOVBZreg)
 30887  		v.AddArg(x)
 30888  		return true
 30889  	}
 30890  }
 30891  func rewriteBlockPPC64(b *Block) bool {
 30892  	config := b.Func.Config
 30893  	_ = config
 30894  	fe := b.Func.fe
 30895  	_ = fe
 30896  	typ := &config.Types
 30897  	_ = typ
 30898  	switch b.Kind {
 30899  	case BlockPPC64EQ:
 30900  		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 30901  		// cond:
 30902  		// result: (EQ (ANDCCconst [c] x) yes no)
 30903  		for {
 30904  			v := b.Control
 30905  			if v.Op != OpPPC64CMPconst {
 30906  				break
 30907  			}
 30908  			if v.AuxInt != 0 {
 30909  				break
 30910  			}
 30911  			v_0 := v.Args[0]
 30912  			if v_0.Op != OpPPC64ANDconst {
 30913  				break
 30914  			}
 30915  			c := v_0.AuxInt
 30916  			x := v_0.Args[0]
 30917  			b.Kind = BlockPPC64EQ
 30918  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30919  			v0.AuxInt = c
 30920  			v0.AddArg(x)
 30921  			b.SetControl(v0)
 30922  			b.Aux = nil
 30923  			return true
 30924  		}
 30925  		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 30926  		// cond:
 30927  		// result: (EQ (ANDCCconst [c] x) yes no)
 30928  		for {
 30929  			v := b.Control
 30930  			if v.Op != OpPPC64CMPWconst {
 30931  				break
 30932  			}
 30933  			if v.AuxInt != 0 {
 30934  				break
 30935  			}
 30936  			v_0 := v.Args[0]
 30937  			if v_0.Op != OpPPC64ANDconst {
 30938  				break
 30939  			}
 30940  			c := v_0.AuxInt
 30941  			x := v_0.Args[0]
 30942  			b.Kind = BlockPPC64EQ
 30943  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30944  			v0.AuxInt = c
 30945  			v0.AddArg(x)
 30946  			b.SetControl(v0)
 30947  			b.Aux = nil
 30948  			return true
 30949  		}
 30950  		// match: (EQ (FlagEQ) yes no)
 30951  		// cond:
 30952  		// result: (First nil yes no)
 30953  		for {
 30954  			v := b.Control
 30955  			if v.Op != OpPPC64FlagEQ {
 30956  				break
 30957  			}
 30958  			b.Kind = BlockFirst
 30959  			b.SetControl(nil)
 30960  			b.Aux = nil
 30961  			return true
 30962  		}
 30963  		// match: (EQ (FlagLT) yes no)
 30964  		// cond:
 30965  		// result: (First nil no yes)
 30966  		for {
 30967  			v := b.Control
 30968  			if v.Op != OpPPC64FlagLT {
 30969  				break
 30970  			}
 30971  			b.Kind = BlockFirst
 30972  			b.SetControl(nil)
 30973  			b.Aux = nil
 30974  			b.swapSuccessors()
 30975  			return true
 30976  		}
 30977  		// match: (EQ (FlagGT) yes no)
 30978  		// cond:
 30979  		// result: (First nil no yes)
 30980  		for {
 30981  			v := b.Control
 30982  			if v.Op != OpPPC64FlagGT {
 30983  				break
 30984  			}
 30985  			b.Kind = BlockFirst
 30986  			b.SetControl(nil)
 30987  			b.Aux = nil
 30988  			b.swapSuccessors()
 30989  			return true
 30990  		}
 30991  		// match: (EQ (InvertFlags cmp) yes no)
 30992  		// cond:
 30993  		// result: (EQ cmp yes no)
 30994  		for {
 30995  			v := b.Control
 30996  			if v.Op != OpPPC64InvertFlags {
 30997  				break
 30998  			}
 30999  			cmp := v.Args[0]
 31000  			b.Kind = BlockPPC64EQ
 31001  			b.SetControl(cmp)
 31002  			b.Aux = nil
 31003  			return true
 31004  		}
 31005  		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 31006  		// cond:
 31007  		// result: (EQ (ANDCCconst [c] x) yes no)
 31008  		for {
 31009  			v := b.Control
 31010  			if v.Op != OpPPC64CMPconst {
 31011  				break
 31012  			}
 31013  			if v.AuxInt != 0 {
 31014  				break
 31015  			}
 31016  			v_0 := v.Args[0]
 31017  			if v_0.Op != OpPPC64ANDconst {
 31018  				break
 31019  			}
 31020  			c := v_0.AuxInt
 31021  			x := v_0.Args[0]
 31022  			b.Kind = BlockPPC64EQ
 31023  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31024  			v0.AuxInt = c
 31025  			v0.AddArg(x)
 31026  			b.SetControl(v0)
 31027  			b.Aux = nil
 31028  			return true
 31029  		}
 31030  		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 31031  		// cond:
 31032  		// result: (EQ (ANDCCconst [c] x) yes no)
 31033  		for {
 31034  			v := b.Control
 31035  			if v.Op != OpPPC64CMPWconst {
 31036  				break
 31037  			}
 31038  			if v.AuxInt != 0 {
 31039  				break
 31040  			}
 31041  			v_0 := v.Args[0]
 31042  			if v_0.Op != OpPPC64ANDconst {
 31043  				break
 31044  			}
 31045  			c := v_0.AuxInt
 31046  			x := v_0.Args[0]
 31047  			b.Kind = BlockPPC64EQ
 31048  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31049  			v0.AuxInt = c
 31050  			v0.AddArg(x)
 31051  			b.SetControl(v0)
 31052  			b.Aux = nil
 31053  			return true
 31054  		}
 31055  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 31056  		// cond: z.Uses == 1
 31057  		// result: (EQ (ANDCC x y) yes no)
 31058  		for {
 31059  			v := b.Control
 31060  			if v.Op != OpPPC64CMPconst {
 31061  				break
 31062  			}
 31063  			if v.AuxInt != 0 {
 31064  				break
 31065  			}
 31066  			z := v.Args[0]
 31067  			if z.Op != OpPPC64AND {
 31068  				break
 31069  			}
 31070  			_ = z.Args[1]
 31071  			x := z.Args[0]
 31072  			y := z.Args[1]
 31073  			if !(z.Uses == 1) {
 31074  				break
 31075  			}
 31076  			b.Kind = BlockPPC64EQ
 31077  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31078  			v0.AddArg(x)
 31079  			v0.AddArg(y)
 31080  			b.SetControl(v0)
 31081  			b.Aux = nil
 31082  			return true
 31083  		}
 31084  		// match: (EQ (CMPconst [0] z:(OR x y)) yes no)
 31085  		// cond: z.Uses == 1
 31086  		// result: (EQ (ORCC x y) yes no)
 31087  		for {
 31088  			v := b.Control
 31089  			if v.Op != OpPPC64CMPconst {
 31090  				break
 31091  			}
 31092  			if v.AuxInt != 0 {
 31093  				break
 31094  			}
 31095  			z := v.Args[0]
 31096  			if z.Op != OpPPC64OR {
 31097  				break
 31098  			}
 31099  			_ = z.Args[1]
 31100  			x := z.Args[0]
 31101  			y := z.Args[1]
 31102  			if !(z.Uses == 1) {
 31103  				break
 31104  			}
 31105  			b.Kind = BlockPPC64EQ
 31106  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31107  			v0.AddArg(x)
 31108  			v0.AddArg(y)
 31109  			b.SetControl(v0)
 31110  			b.Aux = nil
 31111  			return true
 31112  		}
 31113  		// match: (EQ (CMPconst [0] z:(XOR x y)) yes no)
 31114  		// cond: z.Uses == 1
 31115  		// result: (EQ (XORCC x y) yes no)
 31116  		for {
 31117  			v := b.Control
 31118  			if v.Op != OpPPC64CMPconst {
 31119  				break
 31120  			}
 31121  			if v.AuxInt != 0 {
 31122  				break
 31123  			}
 31124  			z := v.Args[0]
 31125  			if z.Op != OpPPC64XOR {
 31126  				break
 31127  			}
 31128  			_ = z.Args[1]
 31129  			x := z.Args[0]
 31130  			y := z.Args[1]
 31131  			if !(z.Uses == 1) {
 31132  				break
 31133  			}
 31134  			b.Kind = BlockPPC64EQ
 31135  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31136  			v0.AddArg(x)
 31137  			v0.AddArg(y)
 31138  			b.SetControl(v0)
 31139  			b.Aux = nil
 31140  			return true
 31141  		}
 31142  	case BlockPPC64GE:
 31143  		// match: (GE (FlagEQ) yes no)
 31144  		// cond:
 31145  		// result: (First nil yes no)
 31146  		for {
 31147  			v := b.Control
 31148  			if v.Op != OpPPC64FlagEQ {
 31149  				break
 31150  			}
 31151  			b.Kind = BlockFirst
 31152  			b.SetControl(nil)
 31153  			b.Aux = nil
 31154  			return true
 31155  		}
 31156  		// match: (GE (FlagLT) yes no)
 31157  		// cond:
 31158  		// result: (First nil no yes)
 31159  		for {
 31160  			v := b.Control
 31161  			if v.Op != OpPPC64FlagLT {
 31162  				break
 31163  			}
 31164  			b.Kind = BlockFirst
 31165  			b.SetControl(nil)
 31166  			b.Aux = nil
 31167  			b.swapSuccessors()
 31168  			return true
 31169  		}
 31170  		// match: (GE (FlagGT) yes no)
 31171  		// cond:
 31172  		// result: (First nil yes no)
 31173  		for {
 31174  			v := b.Control
 31175  			if v.Op != OpPPC64FlagGT {
 31176  				break
 31177  			}
 31178  			b.Kind = BlockFirst
 31179  			b.SetControl(nil)
 31180  			b.Aux = nil
 31181  			return true
 31182  		}
 31183  		// match: (GE (InvertFlags cmp) yes no)
 31184  		// cond:
 31185  		// result: (LE cmp yes no)
 31186  		for {
 31187  			v := b.Control
 31188  			if v.Op != OpPPC64InvertFlags {
 31189  				break
 31190  			}
 31191  			cmp := v.Args[0]
 31192  			b.Kind = BlockPPC64LE
 31193  			b.SetControl(cmp)
 31194  			b.Aux = nil
 31195  			return true
 31196  		}
 31197  		// match: (GE (CMPconst [0] (ANDconst [c] x)) yes no)
 31198  		// cond:
 31199  		// result: (GE (ANDCCconst [c] x) yes no)
 31200  		for {
 31201  			v := b.Control
 31202  			if v.Op != OpPPC64CMPconst {
 31203  				break
 31204  			}
 31205  			if v.AuxInt != 0 {
 31206  				break
 31207  			}
 31208  			v_0 := v.Args[0]
 31209  			if v_0.Op != OpPPC64ANDconst {
 31210  				break
 31211  			}
 31212  			c := v_0.AuxInt
 31213  			x := v_0.Args[0]
 31214  			b.Kind = BlockPPC64GE
 31215  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31216  			v0.AuxInt = c
 31217  			v0.AddArg(x)
 31218  			b.SetControl(v0)
 31219  			b.Aux = nil
 31220  			return true
 31221  		}
 31222  		// match: (GE (CMPWconst [0] (ANDconst [c] x)) yes no)
 31223  		// cond:
 31224  		// result: (GE (ANDCCconst [c] x) yes no)
 31225  		for {
 31226  			v := b.Control
 31227  			if v.Op != OpPPC64CMPWconst {
 31228  				break
 31229  			}
 31230  			if v.AuxInt != 0 {
 31231  				break
 31232  			}
 31233  			v_0 := v.Args[0]
 31234  			if v_0.Op != OpPPC64ANDconst {
 31235  				break
 31236  			}
 31237  			c := v_0.AuxInt
 31238  			x := v_0.Args[0]
 31239  			b.Kind = BlockPPC64GE
 31240  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31241  			v0.AuxInt = c
 31242  			v0.AddArg(x)
 31243  			b.SetControl(v0)
 31244  			b.Aux = nil
 31245  			return true
 31246  		}
 31247  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 31248  		// cond: z.Uses == 1
 31249  		// result: (GE (ANDCC x y) yes no)
 31250  		for {
 31251  			v := b.Control
 31252  			if v.Op != OpPPC64CMPconst {
 31253  				break
 31254  			}
 31255  			if v.AuxInt != 0 {
 31256  				break
 31257  			}
 31258  			z := v.Args[0]
 31259  			if z.Op != OpPPC64AND {
 31260  				break
 31261  			}
 31262  			_ = z.Args[1]
 31263  			x := z.Args[0]
 31264  			y := z.Args[1]
 31265  			if !(z.Uses == 1) {
 31266  				break
 31267  			}
 31268  			b.Kind = BlockPPC64GE
 31269  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31270  			v0.AddArg(x)
 31271  			v0.AddArg(y)
 31272  			b.SetControl(v0)
 31273  			b.Aux = nil
 31274  			return true
 31275  		}
 31276  		// match: (GE (CMPconst [0] z:(OR x y)) yes no)
 31277  		// cond: z.Uses == 1
 31278  		// result: (GE (ORCC x y) yes no)
 31279  		for {
 31280  			v := b.Control
 31281  			if v.Op != OpPPC64CMPconst {
 31282  				break
 31283  			}
 31284  			if v.AuxInt != 0 {
 31285  				break
 31286  			}
 31287  			z := v.Args[0]
 31288  			if z.Op != OpPPC64OR {
 31289  				break
 31290  			}
 31291  			_ = z.Args[1]
 31292  			x := z.Args[0]
 31293  			y := z.Args[1]
 31294  			if !(z.Uses == 1) {
 31295  				break
 31296  			}
 31297  			b.Kind = BlockPPC64GE
 31298  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31299  			v0.AddArg(x)
 31300  			v0.AddArg(y)
 31301  			b.SetControl(v0)
 31302  			b.Aux = nil
 31303  			return true
 31304  		}
 31305  		// match: (GE (CMPconst [0] z:(XOR x y)) yes no)
 31306  		// cond: z.Uses == 1
 31307  		// result: (GE (XORCC x y) yes no)
 31308  		for {
 31309  			v := b.Control
 31310  			if v.Op != OpPPC64CMPconst {
 31311  				break
 31312  			}
 31313  			if v.AuxInt != 0 {
 31314  				break
 31315  			}
 31316  			z := v.Args[0]
 31317  			if z.Op != OpPPC64XOR {
 31318  				break
 31319  			}
 31320  			_ = z.Args[1]
 31321  			x := z.Args[0]
 31322  			y := z.Args[1]
 31323  			if !(z.Uses == 1) {
 31324  				break
 31325  			}
 31326  			b.Kind = BlockPPC64GE
 31327  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31328  			v0.AddArg(x)
 31329  			v0.AddArg(y)
 31330  			b.SetControl(v0)
 31331  			b.Aux = nil
 31332  			return true
 31333  		}
 31334  	case BlockPPC64GT:
 31335  		// match: (GT (FlagEQ) yes no)
 31336  		// cond:
 31337  		// result: (First nil no yes)
 31338  		for {
 31339  			v := b.Control
 31340  			if v.Op != OpPPC64FlagEQ {
 31341  				break
 31342  			}
 31343  			b.Kind = BlockFirst
 31344  			b.SetControl(nil)
 31345  			b.Aux = nil
 31346  			b.swapSuccessors()
 31347  			return true
 31348  		}
 31349  		// match: (GT (FlagLT) yes no)
 31350  		// cond:
 31351  		// result: (First nil no yes)
 31352  		for {
 31353  			v := b.Control
 31354  			if v.Op != OpPPC64FlagLT {
 31355  				break
 31356  			}
 31357  			b.Kind = BlockFirst
 31358  			b.SetControl(nil)
 31359  			b.Aux = nil
 31360  			b.swapSuccessors()
 31361  			return true
 31362  		}
 31363  		// match: (GT (FlagGT) yes no)
 31364  		// cond:
 31365  		// result: (First nil yes no)
 31366  		for {
 31367  			v := b.Control
 31368  			if v.Op != OpPPC64FlagGT {
 31369  				break
 31370  			}
 31371  			b.Kind = BlockFirst
 31372  			b.SetControl(nil)
 31373  			b.Aux = nil
 31374  			return true
 31375  		}
 31376  		// match: (GT (InvertFlags cmp) yes no)
 31377  		// cond:
 31378  		// result: (LT cmp yes no)
 31379  		for {
 31380  			v := b.Control
 31381  			if v.Op != OpPPC64InvertFlags {
 31382  				break
 31383  			}
 31384  			cmp := v.Args[0]
 31385  			b.Kind = BlockPPC64LT
 31386  			b.SetControl(cmp)
 31387  			b.Aux = nil
 31388  			return true
 31389  		}
 31390  		// match: (GT (CMPconst [0] (ANDconst [c] x)) yes no)
 31391  		// cond:
 31392  		// result: (GT (ANDCCconst [c] x) yes no)
 31393  		for {
 31394  			v := b.Control
 31395  			if v.Op != OpPPC64CMPconst {
 31396  				break
 31397  			}
 31398  			if v.AuxInt != 0 {
 31399  				break
 31400  			}
 31401  			v_0 := v.Args[0]
 31402  			if v_0.Op != OpPPC64ANDconst {
 31403  				break
 31404  			}
 31405  			c := v_0.AuxInt
 31406  			x := v_0.Args[0]
 31407  			b.Kind = BlockPPC64GT
 31408  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31409  			v0.AuxInt = c
 31410  			v0.AddArg(x)
 31411  			b.SetControl(v0)
 31412  			b.Aux = nil
 31413  			return true
 31414  		}
 31415  		// match: (GT (CMPWconst [0] (ANDconst [c] x)) yes no)
 31416  		// cond:
 31417  		// result: (GT (ANDCCconst [c] x) yes no)
 31418  		for {
 31419  			v := b.Control
 31420  			if v.Op != OpPPC64CMPWconst {
 31421  				break
 31422  			}
 31423  			if v.AuxInt != 0 {
 31424  				break
 31425  			}
 31426  			v_0 := v.Args[0]
 31427  			if v_0.Op != OpPPC64ANDconst {
 31428  				break
 31429  			}
 31430  			c := v_0.AuxInt
 31431  			x := v_0.Args[0]
 31432  			b.Kind = BlockPPC64GT
 31433  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31434  			v0.AuxInt = c
 31435  			v0.AddArg(x)
 31436  			b.SetControl(v0)
 31437  			b.Aux = nil
 31438  			return true
 31439  		}
 31440  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 31441  		// cond: z.Uses == 1
 31442  		// result: (GT (ANDCC x y) yes no)
 31443  		for {
 31444  			v := b.Control
 31445  			if v.Op != OpPPC64CMPconst {
 31446  				break
 31447  			}
 31448  			if v.AuxInt != 0 {
 31449  				break
 31450  			}
 31451  			z := v.Args[0]
 31452  			if z.Op != OpPPC64AND {
 31453  				break
 31454  			}
 31455  			_ = z.Args[1]
 31456  			x := z.Args[0]
 31457  			y := z.Args[1]
 31458  			if !(z.Uses == 1) {
 31459  				break
 31460  			}
 31461  			b.Kind = BlockPPC64GT
 31462  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31463  			v0.AddArg(x)
 31464  			v0.AddArg(y)
 31465  			b.SetControl(v0)
 31466  			b.Aux = nil
 31467  			return true
 31468  		}
 31469  		// match: (GT (CMPconst [0] z:(OR x y)) yes no)
 31470  		// cond: z.Uses == 1
 31471  		// result: (GT (ORCC x y) yes no)
 31472  		for {
 31473  			v := b.Control
 31474  			if v.Op != OpPPC64CMPconst {
 31475  				break
 31476  			}
 31477  			if v.AuxInt != 0 {
 31478  				break
 31479  			}
 31480  			z := v.Args[0]
 31481  			if z.Op != OpPPC64OR {
 31482  				break
 31483  			}
 31484  			_ = z.Args[1]
 31485  			x := z.Args[0]
 31486  			y := z.Args[1]
 31487  			if !(z.Uses == 1) {
 31488  				break
 31489  			}
 31490  			b.Kind = BlockPPC64GT
 31491  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31492  			v0.AddArg(x)
 31493  			v0.AddArg(y)
 31494  			b.SetControl(v0)
 31495  			b.Aux = nil
 31496  			return true
 31497  		}
 31498  		// match: (GT (CMPconst [0] z:(XOR x y)) yes no)
 31499  		// cond: z.Uses == 1
 31500  		// result: (GT (XORCC x y) yes no)
 31501  		for {
 31502  			v := b.Control
 31503  			if v.Op != OpPPC64CMPconst {
 31504  				break
 31505  			}
 31506  			if v.AuxInt != 0 {
 31507  				break
 31508  			}
 31509  			z := v.Args[0]
 31510  			if z.Op != OpPPC64XOR {
 31511  				break
 31512  			}
 31513  			_ = z.Args[1]
 31514  			x := z.Args[0]
 31515  			y := z.Args[1]
 31516  			if !(z.Uses == 1) {
 31517  				break
 31518  			}
 31519  			b.Kind = BlockPPC64GT
 31520  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31521  			v0.AddArg(x)
 31522  			v0.AddArg(y)
 31523  			b.SetControl(v0)
 31524  			b.Aux = nil
 31525  			return true
 31526  		}
 31527  	case BlockIf:
 31528  		// match: (If (Equal cc) yes no)
 31529  		// cond:
 31530  		// result: (EQ cc yes no)
 31531  		for {
 31532  			v := b.Control
 31533  			if v.Op != OpPPC64Equal {
 31534  				break
 31535  			}
 31536  			cc := v.Args[0]
 31537  			b.Kind = BlockPPC64EQ
 31538  			b.SetControl(cc)
 31539  			b.Aux = nil
 31540  			return true
 31541  		}
 31542  		// match: (If (NotEqual cc) yes no)
 31543  		// cond:
 31544  		// result: (NE cc yes no)
 31545  		for {
 31546  			v := b.Control
 31547  			if v.Op != OpPPC64NotEqual {
 31548  				break
 31549  			}
 31550  			cc := v.Args[0]
 31551  			b.Kind = BlockPPC64NE
 31552  			b.SetControl(cc)
 31553  			b.Aux = nil
 31554  			return true
 31555  		}
 31556  		// match: (If (LessThan cc) yes no)
 31557  		// cond:
 31558  		// result: (LT cc yes no)
 31559  		for {
 31560  			v := b.Control
 31561  			if v.Op != OpPPC64LessThan {
 31562  				break
 31563  			}
 31564  			cc := v.Args[0]
 31565  			b.Kind = BlockPPC64LT
 31566  			b.SetControl(cc)
 31567  			b.Aux = nil
 31568  			return true
 31569  		}
 31570  		// match: (If (LessEqual cc) yes no)
 31571  		// cond:
 31572  		// result: (LE cc yes no)
 31573  		for {
 31574  			v := b.Control
 31575  			if v.Op != OpPPC64LessEqual {
 31576  				break
 31577  			}
 31578  			cc := v.Args[0]
 31579  			b.Kind = BlockPPC64LE
 31580  			b.SetControl(cc)
 31581  			b.Aux = nil
 31582  			return true
 31583  		}
 31584  		// match: (If (GreaterThan cc) yes no)
 31585  		// cond:
 31586  		// result: (GT cc yes no)
 31587  		for {
 31588  			v := b.Control
 31589  			if v.Op != OpPPC64GreaterThan {
 31590  				break
 31591  			}
 31592  			cc := v.Args[0]
 31593  			b.Kind = BlockPPC64GT
 31594  			b.SetControl(cc)
 31595  			b.Aux = nil
 31596  			return true
 31597  		}
 31598  		// match: (If (GreaterEqual cc) yes no)
 31599  		// cond:
 31600  		// result: (GE cc yes no)
 31601  		for {
 31602  			v := b.Control
 31603  			if v.Op != OpPPC64GreaterEqual {
 31604  				break
 31605  			}
 31606  			cc := v.Args[0]
 31607  			b.Kind = BlockPPC64GE
 31608  			b.SetControl(cc)
 31609  			b.Aux = nil
 31610  			return true
 31611  		}
 31612  		// match: (If (FLessThan cc) yes no)
 31613  		// cond:
 31614  		// result: (FLT cc yes no)
 31615  		for {
 31616  			v := b.Control
 31617  			if v.Op != OpPPC64FLessThan {
 31618  				break
 31619  			}
 31620  			cc := v.Args[0]
 31621  			b.Kind = BlockPPC64FLT
 31622  			b.SetControl(cc)
 31623  			b.Aux = nil
 31624  			return true
 31625  		}
 31626  		// match: (If (FLessEqual cc) yes no)
 31627  		// cond:
 31628  		// result: (FLE cc yes no)
 31629  		for {
 31630  			v := b.Control
 31631  			if v.Op != OpPPC64FLessEqual {
 31632  				break
 31633  			}
 31634  			cc := v.Args[0]
 31635  			b.Kind = BlockPPC64FLE
 31636  			b.SetControl(cc)
 31637  			b.Aux = nil
 31638  			return true
 31639  		}
 31640  		// match: (If (FGreaterThan cc) yes no)
 31641  		// cond:
 31642  		// result: (FGT cc yes no)
 31643  		for {
 31644  			v := b.Control
 31645  			if v.Op != OpPPC64FGreaterThan {
 31646  				break
 31647  			}
 31648  			cc := v.Args[0]
 31649  			b.Kind = BlockPPC64FGT
 31650  			b.SetControl(cc)
 31651  			b.Aux = nil
 31652  			return true
 31653  		}
 31654  		// match: (If (FGreaterEqual cc) yes no)
 31655  		// cond:
 31656  		// result: (FGE cc yes no)
 31657  		for {
 31658  			v := b.Control
 31659  			if v.Op != OpPPC64FGreaterEqual {
 31660  				break
 31661  			}
 31662  			cc := v.Args[0]
 31663  			b.Kind = BlockPPC64FGE
 31664  			b.SetControl(cc)
 31665  			b.Aux = nil
 31666  			return true
 31667  		}
 31668  		// match: (If cond yes no)
 31669  		// cond:
 31670  		// result: (NE (CMPWconst [0] cond) yes no)
 31671  		for {
 31672  			v := b.Control
 31673  			_ = v
 31674  			cond := b.Control
 31675  			b.Kind = BlockPPC64NE
 31676  			v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
 31677  			v0.AuxInt = 0
 31678  			v0.AddArg(cond)
 31679  			b.SetControl(v0)
 31680  			b.Aux = nil
 31681  			return true
 31682  		}
 31683  	case BlockPPC64LE:
 31684  		// match: (LE (FlagEQ) yes no)
 31685  		// cond:
 31686  		// result: (First nil yes no)
 31687  		for {
 31688  			v := b.Control
 31689  			if v.Op != OpPPC64FlagEQ {
 31690  				break
 31691  			}
 31692  			b.Kind = BlockFirst
 31693  			b.SetControl(nil)
 31694  			b.Aux = nil
 31695  			return true
 31696  		}
 31697  		// match: (LE (FlagLT) yes no)
 31698  		// cond:
 31699  		// result: (First nil yes no)
 31700  		for {
 31701  			v := b.Control
 31702  			if v.Op != OpPPC64FlagLT {
 31703  				break
 31704  			}
 31705  			b.Kind = BlockFirst
 31706  			b.SetControl(nil)
 31707  			b.Aux = nil
 31708  			return true
 31709  		}
 31710  		// match: (LE (FlagGT) yes no)
 31711  		// cond:
 31712  		// result: (First nil no yes)
 31713  		for {
 31714  			v := b.Control
 31715  			if v.Op != OpPPC64FlagGT {
 31716  				break
 31717  			}
 31718  			b.Kind = BlockFirst
 31719  			b.SetControl(nil)
 31720  			b.Aux = nil
 31721  			b.swapSuccessors()
 31722  			return true
 31723  		}
 31724  		// match: (LE (InvertFlags cmp) yes no)
 31725  		// cond:
 31726  		// result: (GE cmp yes no)
 31727  		for {
 31728  			v := b.Control
 31729  			if v.Op != OpPPC64InvertFlags {
 31730  				break
 31731  			}
 31732  			cmp := v.Args[0]
 31733  			b.Kind = BlockPPC64GE
 31734  			b.SetControl(cmp)
 31735  			b.Aux = nil
 31736  			return true
 31737  		}
 31738  		// match: (LE (CMPconst [0] (ANDconst [c] x)) yes no)
 31739  		// cond:
 31740  		// result: (LE (ANDCCconst [c] x) yes no)
 31741  		for {
 31742  			v := b.Control
 31743  			if v.Op != OpPPC64CMPconst {
 31744  				break
 31745  			}
 31746  			if v.AuxInt != 0 {
 31747  				break
 31748  			}
 31749  			v_0 := v.Args[0]
 31750  			if v_0.Op != OpPPC64ANDconst {
 31751  				break
 31752  			}
 31753  			c := v_0.AuxInt
 31754  			x := v_0.Args[0]
 31755  			b.Kind = BlockPPC64LE
 31756  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31757  			v0.AuxInt = c
 31758  			v0.AddArg(x)
 31759  			b.SetControl(v0)
 31760  			b.Aux = nil
 31761  			return true
 31762  		}
 31763  		// match: (LE (CMPWconst [0] (ANDconst [c] x)) yes no)
 31764  		// cond:
 31765  		// result: (LE (ANDCCconst [c] x) yes no)
 31766  		for {
 31767  			v := b.Control
 31768  			if v.Op != OpPPC64CMPWconst {
 31769  				break
 31770  			}
 31771  			if v.AuxInt != 0 {
 31772  				break
 31773  			}
 31774  			v_0 := v.Args[0]
 31775  			if v_0.Op != OpPPC64ANDconst {
 31776  				break
 31777  			}
 31778  			c := v_0.AuxInt
 31779  			x := v_0.Args[0]
 31780  			b.Kind = BlockPPC64LE
 31781  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31782  			v0.AuxInt = c
 31783  			v0.AddArg(x)
 31784  			b.SetControl(v0)
 31785  			b.Aux = nil
 31786  			return true
 31787  		}
 31788  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 31789  		// cond: z.Uses == 1
 31790  		// result: (LE (ANDCC x y) yes no)
 31791  		for {
 31792  			v := b.Control
 31793  			if v.Op != OpPPC64CMPconst {
 31794  				break
 31795  			}
 31796  			if v.AuxInt != 0 {
 31797  				break
 31798  			}
 31799  			z := v.Args[0]
 31800  			if z.Op != OpPPC64AND {
 31801  				break
 31802  			}
 31803  			_ = z.Args[1]
 31804  			x := z.Args[0]
 31805  			y := z.Args[1]
 31806  			if !(z.Uses == 1) {
 31807  				break
 31808  			}
 31809  			b.Kind = BlockPPC64LE
 31810  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31811  			v0.AddArg(x)
 31812  			v0.AddArg(y)
 31813  			b.SetControl(v0)
 31814  			b.Aux = nil
 31815  			return true
 31816  		}
 31817  		// match: (LE (CMPconst [0] z:(OR x y)) yes no)
 31818  		// cond: z.Uses == 1
 31819  		// result: (LE (ORCC x y) yes no)
 31820  		for {
 31821  			v := b.Control
 31822  			if v.Op != OpPPC64CMPconst {
 31823  				break
 31824  			}
 31825  			if v.AuxInt != 0 {
 31826  				break
 31827  			}
 31828  			z := v.Args[0]
 31829  			if z.Op != OpPPC64OR {
 31830  				break
 31831  			}
 31832  			_ = z.Args[1]
 31833  			x := z.Args[0]
 31834  			y := z.Args[1]
 31835  			if !(z.Uses == 1) {
 31836  				break
 31837  			}
 31838  			b.Kind = BlockPPC64LE
 31839  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31840  			v0.AddArg(x)
 31841  			v0.AddArg(y)
 31842  			b.SetControl(v0)
 31843  			b.Aux = nil
 31844  			return true
 31845  		}
 31846  		// match: (LE (CMPconst [0] z:(XOR x y)) yes no)
 31847  		// cond: z.Uses == 1
 31848  		// result: (LE (XORCC x y) yes no)
 31849  		for {
 31850  			v := b.Control
 31851  			if v.Op != OpPPC64CMPconst {
 31852  				break
 31853  			}
 31854  			if v.AuxInt != 0 {
 31855  				break
 31856  			}
 31857  			z := v.Args[0]
 31858  			if z.Op != OpPPC64XOR {
 31859  				break
 31860  			}
 31861  			_ = z.Args[1]
 31862  			x := z.Args[0]
 31863  			y := z.Args[1]
 31864  			if !(z.Uses == 1) {
 31865  				break
 31866  			}
 31867  			b.Kind = BlockPPC64LE
 31868  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31869  			v0.AddArg(x)
 31870  			v0.AddArg(y)
 31871  			b.SetControl(v0)
 31872  			b.Aux = nil
 31873  			return true
 31874  		}
 31875  	case BlockPPC64LT:
 31876  		// match: (LT (FlagEQ) yes no)
 31877  		// cond:
 31878  		// result: (First nil no yes)
 31879  		for {
 31880  			v := b.Control
 31881  			if v.Op != OpPPC64FlagEQ {
 31882  				break
 31883  			}
 31884  			b.Kind = BlockFirst
 31885  			b.SetControl(nil)
 31886  			b.Aux = nil
 31887  			b.swapSuccessors()
 31888  			return true
 31889  		}
 31890  		// match: (LT (FlagLT) yes no)
 31891  		// cond:
 31892  		// result: (First nil yes no)
 31893  		for {
 31894  			v := b.Control
 31895  			if v.Op != OpPPC64FlagLT {
 31896  				break
 31897  			}
 31898  			b.Kind = BlockFirst
 31899  			b.SetControl(nil)
 31900  			b.Aux = nil
 31901  			return true
 31902  		}
 31903  		// match: (LT (FlagGT) yes no)
 31904  		// cond:
 31905  		// result: (First nil no yes)
 31906  		for {
 31907  			v := b.Control
 31908  			if v.Op != OpPPC64FlagGT {
 31909  				break
 31910  			}
 31911  			b.Kind = BlockFirst
 31912  			b.SetControl(nil)
 31913  			b.Aux = nil
 31914  			b.swapSuccessors()
 31915  			return true
 31916  		}
 31917  		// match: (LT (InvertFlags cmp) yes no)
 31918  		// cond:
 31919  		// result: (GT cmp yes no)
 31920  		for {
 31921  			v := b.Control
 31922  			if v.Op != OpPPC64InvertFlags {
 31923  				break
 31924  			}
 31925  			cmp := v.Args[0]
 31926  			b.Kind = BlockPPC64GT
 31927  			b.SetControl(cmp)
 31928  			b.Aux = nil
 31929  			return true
 31930  		}
 31931  		// match: (LT (CMPconst [0] (ANDconst [c] x)) yes no)
 31932  		// cond:
 31933  		// result: (LT (ANDCCconst [c] x) yes no)
 31934  		for {
 31935  			v := b.Control
 31936  			if v.Op != OpPPC64CMPconst {
 31937  				break
 31938  			}
 31939  			if v.AuxInt != 0 {
 31940  				break
 31941  			}
 31942  			v_0 := v.Args[0]
 31943  			if v_0.Op != OpPPC64ANDconst {
 31944  				break
 31945  			}
 31946  			c := v_0.AuxInt
 31947  			x := v_0.Args[0]
 31948  			b.Kind = BlockPPC64LT
 31949  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31950  			v0.AuxInt = c
 31951  			v0.AddArg(x)
 31952  			b.SetControl(v0)
 31953  			b.Aux = nil
 31954  			return true
 31955  		}
 31956  		// match: (LT (CMPWconst [0] (ANDconst [c] x)) yes no)
 31957  		// cond:
 31958  		// result: (LT (ANDCCconst [c] x) yes no)
 31959  		for {
 31960  			v := b.Control
 31961  			if v.Op != OpPPC64CMPWconst {
 31962  				break
 31963  			}
 31964  			if v.AuxInt != 0 {
 31965  				break
 31966  			}
 31967  			v_0 := v.Args[0]
 31968  			if v_0.Op != OpPPC64ANDconst {
 31969  				break
 31970  			}
 31971  			c := v_0.AuxInt
 31972  			x := v_0.Args[0]
 31973  			b.Kind = BlockPPC64LT
 31974  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31975  			v0.AuxInt = c
 31976  			v0.AddArg(x)
 31977  			b.SetControl(v0)
 31978  			b.Aux = nil
 31979  			return true
 31980  		}
 31981  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 31982  		// cond: z.Uses == 1
 31983  		// result: (LT (ANDCC x y) yes no)
 31984  		for {
 31985  			v := b.Control
 31986  			if v.Op != OpPPC64CMPconst {
 31987  				break
 31988  			}
 31989  			if v.AuxInt != 0 {
 31990  				break
 31991  			}
 31992  			z := v.Args[0]
 31993  			if z.Op != OpPPC64AND {
 31994  				break
 31995  			}
 31996  			_ = z.Args[1]
 31997  			x := z.Args[0]
 31998  			y := z.Args[1]
 31999  			if !(z.Uses == 1) {
 32000  				break
 32001  			}
 32002  			b.Kind = BlockPPC64LT
 32003  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 32004  			v0.AddArg(x)
 32005  			v0.AddArg(y)
 32006  			b.SetControl(v0)
 32007  			b.Aux = nil
 32008  			return true
 32009  		}
 32010  		// match: (LT (CMPconst [0] z:(OR x y)) yes no)
 32011  		// cond: z.Uses == 1
 32012  		// result: (LT (ORCC x y) yes no)
 32013  		for {
 32014  			v := b.Control
 32015  			if v.Op != OpPPC64CMPconst {
 32016  				break
 32017  			}
 32018  			if v.AuxInt != 0 {
 32019  				break
 32020  			}
 32021  			z := v.Args[0]
 32022  			if z.Op != OpPPC64OR {
 32023  				break
 32024  			}
 32025  			_ = z.Args[1]
 32026  			x := z.Args[0]
 32027  			y := z.Args[1]
 32028  			if !(z.Uses == 1) {
 32029  				break
 32030  			}
 32031  			b.Kind = BlockPPC64LT
 32032  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 32033  			v0.AddArg(x)
 32034  			v0.AddArg(y)
 32035  			b.SetControl(v0)
 32036  			b.Aux = nil
 32037  			return true
 32038  		}
 32039  		// match: (LT (CMPconst [0] z:(XOR x y)) yes no)
 32040  		// cond: z.Uses == 1
 32041  		// result: (LT (XORCC x y) yes no)
 32042  		for {
 32043  			v := b.Control
 32044  			if v.Op != OpPPC64CMPconst {
 32045  				break
 32046  			}
 32047  			if v.AuxInt != 0 {
 32048  				break
 32049  			}
 32050  			z := v.Args[0]
 32051  			if z.Op != OpPPC64XOR {
 32052  				break
 32053  			}
 32054  			_ = z.Args[1]
 32055  			x := z.Args[0]
 32056  			y := z.Args[1]
 32057  			if !(z.Uses == 1) {
 32058  				break
 32059  			}
 32060  			b.Kind = BlockPPC64LT
 32061  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 32062  			v0.AddArg(x)
 32063  			v0.AddArg(y)
 32064  			b.SetControl(v0)
 32065  			b.Aux = nil
 32066  			return true
 32067  		}
 32068  	case BlockPPC64NE:
 32069  		// match: (NE (CMPWconst [0] (Equal cc)) yes no)
 32070  		// cond:
 32071  		// result: (EQ cc yes no)
 32072  		for {
 32073  			v := b.Control
 32074  			if v.Op != OpPPC64CMPWconst {
 32075  				break
 32076  			}
 32077  			if v.AuxInt != 0 {
 32078  				break
 32079  			}
 32080  			v_0 := v.Args[0]
 32081  			if v_0.Op != OpPPC64Equal {
 32082  				break
 32083  			}
 32084  			cc := v_0.Args[0]
 32085  			b.Kind = BlockPPC64EQ
 32086  			b.SetControl(cc)
 32087  			b.Aux = nil
 32088  			return true
 32089  		}
 32090  		// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
 32091  		// cond:
 32092  		// result: (NE cc yes no)
 32093  		for {
 32094  			v := b.Control
 32095  			if v.Op != OpPPC64CMPWconst {
 32096  				break
 32097  			}
 32098  			if v.AuxInt != 0 {
 32099  				break
 32100  			}
 32101  			v_0 := v.Args[0]
 32102  			if v_0.Op != OpPPC64NotEqual {
 32103  				break
 32104  			}
 32105  			cc := v_0.Args[0]
 32106  			b.Kind = BlockPPC64NE
 32107  			b.SetControl(cc)
 32108  			b.Aux = nil
 32109  			return true
 32110  		}
 32111  		// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
 32112  		// cond:
 32113  		// result: (LT cc yes no)
 32114  		for {
 32115  			v := b.Control
 32116  			if v.Op != OpPPC64CMPWconst {
 32117  				break
 32118  			}
 32119  			if v.AuxInt != 0 {
 32120  				break
 32121  			}
 32122  			v_0 := v.Args[0]
 32123  			if v_0.Op != OpPPC64LessThan {
 32124  				break
 32125  			}
 32126  			cc := v_0.Args[0]
 32127  			b.Kind = BlockPPC64LT
 32128  			b.SetControl(cc)
 32129  			b.Aux = nil
 32130  			return true
 32131  		}
 32132  		// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
 32133  		// cond:
 32134  		// result: (LE cc yes no)
 32135  		for {
 32136  			v := b.Control
 32137  			if v.Op != OpPPC64CMPWconst {
 32138  				break
 32139  			}
 32140  			if v.AuxInt != 0 {
 32141  				break
 32142  			}
 32143  			v_0 := v.Args[0]
 32144  			if v_0.Op != OpPPC64LessEqual {
 32145  				break
 32146  			}
 32147  			cc := v_0.Args[0]
 32148  			b.Kind = BlockPPC64LE
 32149  			b.SetControl(cc)
 32150  			b.Aux = nil
 32151  			return true
 32152  		}
 32153  		// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
 32154  		// cond:
 32155  		// result: (GT cc yes no)
 32156  		for {
 32157  			v := b.Control
 32158  			if v.Op != OpPPC64CMPWconst {
 32159  				break
 32160  			}
 32161  			if v.AuxInt != 0 {
 32162  				break
 32163  			}
 32164  			v_0 := v.Args[0]
 32165  			if v_0.Op != OpPPC64GreaterThan {
 32166  				break
 32167  			}
 32168  			cc := v_0.Args[0]
 32169  			b.Kind = BlockPPC64GT
 32170  			b.SetControl(cc)
 32171  			b.Aux = nil
 32172  			return true
 32173  		}
 32174  		// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
 32175  		// cond:
 32176  		// result: (GE cc yes no)
 32177  		for {
 32178  			v := b.Control
 32179  			if v.Op != OpPPC64CMPWconst {
 32180  				break
 32181  			}
 32182  			if v.AuxInt != 0 {
 32183  				break
 32184  			}
 32185  			v_0 := v.Args[0]
 32186  			if v_0.Op != OpPPC64GreaterEqual {
 32187  				break
 32188  			}
 32189  			cc := v_0.Args[0]
 32190  			b.Kind = BlockPPC64GE
 32191  			b.SetControl(cc)
 32192  			b.Aux = nil
 32193  			return true
 32194  		}
 32195  		// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
 32196  		// cond:
 32197  		// result: (FLT cc yes no)
 32198  		for {
 32199  			v := b.Control
 32200  			if v.Op != OpPPC64CMPWconst {
 32201  				break
 32202  			}
 32203  			if v.AuxInt != 0 {
 32204  				break
 32205  			}
 32206  			v_0 := v.Args[0]
 32207  			if v_0.Op != OpPPC64FLessThan {
 32208  				break
 32209  			}
 32210  			cc := v_0.Args[0]
 32211  			b.Kind = BlockPPC64FLT
 32212  			b.SetControl(cc)
 32213  			b.Aux = nil
 32214  			return true
 32215  		}
 32216  		// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
 32217  		// cond:
 32218  		// result: (FLE cc yes no)
 32219  		for {
 32220  			v := b.Control
 32221  			if v.Op != OpPPC64CMPWconst {
 32222  				break
 32223  			}
 32224  			if v.AuxInt != 0 {
 32225  				break
 32226  			}
 32227  			v_0 := v.Args[0]
 32228  			if v_0.Op != OpPPC64FLessEqual {
 32229  				break
 32230  			}
 32231  			cc := v_0.Args[0]
 32232  			b.Kind = BlockPPC64FLE
 32233  			b.SetControl(cc)
 32234  			b.Aux = nil
 32235  			return true
 32236  		}
 32237  		// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
 32238  		// cond:
 32239  		// result: (FGT cc yes no)
 32240  		for {
 32241  			v := b.Control
 32242  			if v.Op != OpPPC64CMPWconst {
 32243  				break
 32244  			}
 32245  			if v.AuxInt != 0 {
 32246  				break
 32247  			}
 32248  			v_0 := v.Args[0]
 32249  			if v_0.Op != OpPPC64FGreaterThan {
 32250  				break
 32251  			}
 32252  			cc := v_0.Args[0]
 32253  			b.Kind = BlockPPC64FGT
 32254  			b.SetControl(cc)
 32255  			b.Aux = nil
 32256  			return true
 32257  		}
 32258  		// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
 32259  		// cond:
 32260  		// result: (FGE cc yes no)
 32261  		for {
 32262  			v := b.Control
 32263  			if v.Op != OpPPC64CMPWconst {
 32264  				break
 32265  			}
 32266  			if v.AuxInt != 0 {
 32267  				break
 32268  			}
 32269  			v_0 := v.Args[0]
 32270  			if v_0.Op != OpPPC64FGreaterEqual {
 32271  				break
 32272  			}
 32273  			cc := v_0.Args[0]
 32274  			b.Kind = BlockPPC64FGE
 32275  			b.SetControl(cc)
 32276  			b.Aux = nil
 32277  			return true
 32278  		}
 32279  		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 32280  		// cond:
 32281  		// result: (NE (ANDCCconst [c] x) yes no)
 32282  		for {
 32283  			v := b.Control
 32284  			if v.Op != OpPPC64CMPconst {
 32285  				break
 32286  			}
 32287  			if v.AuxInt != 0 {
 32288  				break
 32289  			}
 32290  			v_0 := v.Args[0]
 32291  			if v_0.Op != OpPPC64ANDconst {
 32292  				break
 32293  			}
 32294  			c := v_0.AuxInt
 32295  			x := v_0.Args[0]
 32296  			b.Kind = BlockPPC64NE
 32297  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 32298  			v0.AuxInt = c
 32299  			v0.AddArg(x)
 32300  			b.SetControl(v0)
 32301  			b.Aux = nil
 32302  			return true
 32303  		}
 32304  		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 32305  		// cond:
 32306  		// result: (NE (ANDCCconst [c] x) yes no)
 32307  		for {
 32308  			v := b.Control
 32309  			if v.Op != OpPPC64CMPWconst {
 32310  				break
 32311  			}
 32312  			if v.AuxInt != 0 {
 32313  				break
 32314  			}
 32315  			v_0 := v.Args[0]
 32316  			if v_0.Op != OpPPC64ANDconst {
 32317  				break
 32318  			}
 32319  			c := v_0.AuxInt
 32320  			x := v_0.Args[0]
 32321  			b.Kind = BlockPPC64NE
 32322  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 32323  			v0.AuxInt = c
 32324  			v0.AddArg(x)
 32325  			b.SetControl(v0)
 32326  			b.Aux = nil
 32327  			return true
 32328  		}
 32329  		// match: (NE (FlagEQ) yes no)
 32330  		// cond:
 32331  		// result: (First nil no yes)
 32332  		for {
 32333  			v := b.Control
 32334  			if v.Op != OpPPC64FlagEQ {
 32335  				break
 32336  			}
 32337  			b.Kind = BlockFirst
 32338  			b.SetControl(nil)
 32339  			b.Aux = nil
 32340  			b.swapSuccessors()
 32341  			return true
 32342  		}
 32343  		// match: (NE (FlagLT) yes no)
 32344  		// cond:
 32345  		// result: (First nil yes no)
 32346  		for {
 32347  			v := b.Control
 32348  			if v.Op != OpPPC64FlagLT {
 32349  				break
 32350  			}
 32351  			b.Kind = BlockFirst
 32352  			b.SetControl(nil)
 32353  			b.Aux = nil
 32354  			return true
 32355  		}
 32356  		// match: (NE (FlagGT) yes no)
 32357  		// cond:
 32358  		// result: (First nil yes no)
 32359  		for {
 32360  			v := b.Control
 32361  			if v.Op != OpPPC64FlagGT {
 32362  				break
 32363  			}
 32364  			b.Kind = BlockFirst
 32365  			b.SetControl(nil)
 32366  			b.Aux = nil
 32367  			return true
 32368  		}
 32369  		// match: (NE (InvertFlags cmp) yes no)
 32370  		// cond:
 32371  		// result: (NE cmp yes no)
 32372  		for {
 32373  			v := b.Control
 32374  			if v.Op != OpPPC64InvertFlags {
 32375  				break
 32376  			}
 32377  			cmp := v.Args[0]
 32378  			b.Kind = BlockPPC64NE
 32379  			b.SetControl(cmp)
 32380  			b.Aux = nil
 32381  			return true
 32382  		}
 32383  		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 32384  		// cond:
 32385  		// result: (NE (ANDCCconst [c] x) yes no)
 32386  		for {
 32387  			v := b.Control
 32388  			if v.Op != OpPPC64CMPconst {
 32389  				break
 32390  			}
 32391  			if v.AuxInt != 0 {
 32392  				break
 32393  			}
 32394  			v_0 := v.Args[0]
 32395  			if v_0.Op != OpPPC64ANDconst {
 32396  				break
 32397  			}
 32398  			c := v_0.AuxInt
 32399  			x := v_0.Args[0]
 32400  			b.Kind = BlockPPC64NE
 32401  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 32402  			v0.AuxInt = c
 32403  			v0.AddArg(x)
 32404  			b.SetControl(v0)
 32405  			b.Aux = nil
 32406  			return true
 32407  		}
 32408  		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 32409  		// cond:
 32410  		// result: (NE (ANDCCconst [c] x) yes no)
 32411  		for {
 32412  			v := b.Control
 32413  			if v.Op != OpPPC64CMPWconst {
 32414  				break
 32415  			}
 32416  			if v.AuxInt != 0 {
 32417  				break
 32418  			}
 32419  			v_0 := v.Args[0]
 32420  			if v_0.Op != OpPPC64ANDconst {
 32421  				break
 32422  			}
 32423  			c := v_0.AuxInt
 32424  			x := v_0.Args[0]
 32425  			b.Kind = BlockPPC64NE
 32426  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 32427  			v0.AuxInt = c
 32428  			v0.AddArg(x)
 32429  			b.SetControl(v0)
 32430  			b.Aux = nil
 32431  			return true
 32432  		}
 32433  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 32434  		// cond: z.Uses == 1
 32435  		// result: (NE (ANDCC x y) yes no)
 32436  		for {
 32437  			v := b.Control
 32438  			if v.Op != OpPPC64CMPconst {
 32439  				break
 32440  			}
 32441  			if v.AuxInt != 0 {
 32442  				break
 32443  			}
 32444  			z := v.Args[0]
 32445  			if z.Op != OpPPC64AND {
 32446  				break
 32447  			}
 32448  			_ = z.Args[1]
 32449  			x := z.Args[0]
 32450  			y := z.Args[1]
 32451  			if !(z.Uses == 1) {
 32452  				break
 32453  			}
 32454  			b.Kind = BlockPPC64NE
 32455  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 32456  			v0.AddArg(x)
 32457  			v0.AddArg(y)
 32458  			b.SetControl(v0)
 32459  			b.Aux = nil
 32460  			return true
 32461  		}
 32462  		// match: (NE (CMPconst [0] z:(OR x y)) yes no)
 32463  		// cond: z.Uses == 1
 32464  		// result: (NE (ORCC x y) yes no)
 32465  		for {
 32466  			v := b.Control
 32467  			if v.Op != OpPPC64CMPconst {
 32468  				break
 32469  			}
 32470  			if v.AuxInt != 0 {
 32471  				break
 32472  			}
 32473  			z := v.Args[0]
 32474  			if z.Op != OpPPC64OR {
 32475  				break
 32476  			}
 32477  			_ = z.Args[1]
 32478  			x := z.Args[0]
 32479  			y := z.Args[1]
 32480  			if !(z.Uses == 1) {
 32481  				break
 32482  			}
 32483  			b.Kind = BlockPPC64NE
 32484  			v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 32485  			v0.AddArg(x)
 32486  			v0.AddArg(y)
 32487  			b.SetControl(v0)
 32488  			b.Aux = nil
 32489  			return true
 32490  		}
 32491  		// match: (NE (CMPconst [0] z:(XOR x y)) yes no)
 32492  		// cond: z.Uses == 1
 32493  		// result: (NE (XORCC x y) yes no)
 32494  		for {
 32495  			v := b.Control
 32496  			if v.Op != OpPPC64CMPconst {
 32497  				break
 32498  			}
 32499  			if v.AuxInt != 0 {
 32500  				break
 32501  			}
 32502  			z := v.Args[0]
 32503  			if z.Op != OpPPC64XOR {
 32504  				break
 32505  			}
 32506  			_ = z.Args[1]
 32507  			x := z.Args[0]
 32508  			y := z.Args[1]
 32509  			if !(z.Uses == 1) {
 32510  				break
 32511  			}
 32512  			b.Kind = BlockPPC64NE
 32513  			v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 32514  			v0.AddArg(x)
 32515  			v0.AddArg(y)
 32516  			b.SetControl(v0)
 32517  			b.Aux = nil
 32518  			return true
 32519  		}
 32520  	}
 32521  	return false
 32522  }