github.com/mh-cbon/go@v0.0.0-20160603070303-9e112a3fe4c0/src/cmd/internal/obj/arm64/a.out.go (about) 1 // cmd/7c/7.out.h from Vita Nuova. 2 // https://code.google.com/p/ken-cc/source/browse/src/cmd/7c/7.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm64 32 33 import "cmd/internal/obj" 34 35 const ( 36 NSNAME = 8 37 NSYM = 50 38 NREG = 32 /* number of general registers */ 39 NFREG = 32 /* number of floating point registers */ 40 ) 41 42 // General purpose registers, kept in the low bits of Prog.Reg. 43 const ( 44 // integer 45 REG_R0 = obj.RBaseARM64 + iota 46 REG_R1 47 REG_R2 48 REG_R3 49 REG_R4 50 REG_R5 51 REG_R6 52 REG_R7 53 REG_R8 54 REG_R9 55 REG_R10 56 REG_R11 57 REG_R12 58 REG_R13 59 REG_R14 60 REG_R15 61 REG_R16 62 REG_R17 63 REG_R18 64 REG_R19 65 REG_R20 66 REG_R21 67 REG_R22 68 REG_R23 69 REG_R24 70 REG_R25 71 REG_R26 72 REG_R27 73 REG_R28 74 REG_R29 75 REG_R30 76 REG_R31 77 78 // scalar floating point 79 REG_F0 80 REG_F1 81 REG_F2 82 REG_F3 83 REG_F4 84 REG_F5 85 REG_F6 86 REG_F7 87 REG_F8 88 REG_F9 89 REG_F10 90 REG_F11 91 REG_F12 92 REG_F13 93 REG_F14 94 REG_F15 95 REG_F16 96 REG_F17 97 REG_F18 98 REG_F19 99 REG_F20 100 REG_F21 101 REG_F22 102 REG_F23 103 REG_F24 104 REG_F25 105 REG_F26 106 REG_F27 107 REG_F28 108 REG_F29 109 REG_F30 110 REG_F31 111 112 // SIMD 113 REG_V0 114 REG_V1 115 REG_V2 116 REG_V3 117 REG_V4 118 REG_V5 119 REG_V6 120 REG_V7 121 REG_V8 122 REG_V9 123 REG_V10 124 REG_V11 125 REG_V12 126 REG_V13 127 REG_V14 128 REG_V15 129 REG_V16 130 REG_V17 131 REG_V18 132 REG_V19 133 REG_V20 134 REG_V21 135 REG_V22 136 REG_V23 137 REG_V24 138 REG_V25 139 REG_V26 140 REG_V27 141 REG_V28 142 REG_V29 143 REG_V30 144 REG_V31 145 146 // The EQ in 147 // CSET EQ, R0 148 // is encoded as TYPE_REG, even though it's not really a register. 149 COND_EQ 150 COND_NE 151 COND_HS 152 COND_LO 153 COND_MI 154 COND_PL 155 COND_VS 156 COND_VC 157 COND_HI 158 COND_LS 159 COND_GE 160 COND_LT 161 COND_GT 162 COND_LE 163 COND_AL 164 COND_NV 165 166 REG_RSP = REG_V31 + 32 // to differentiate ZR/SP, REG_RSP&0x1f = 31 167 ) 168 169 // Not registers, but flags that can be combined with regular register 170 // constants to indicate extended register conversion. When checking, 171 // you should subtract obj.RBaseARM64 first. From this difference, bit 11 172 // indicates extended register, bits 8-10 select the conversion mode. 173 const REG_EXT = obj.RBaseARM64 + 1<<11 174 175 const ( 176 REG_UXTB = REG_EXT + iota<<8 177 REG_UXTH 178 REG_UXTW 179 REG_UXTX 180 REG_SXTB 181 REG_SXTH 182 REG_SXTW 183 REG_SXTX 184 ) 185 186 // Special registers, after subtracting obj.RBaseARM64, bit 12 indicates 187 // a special register and the low bits select the register. 188 const ( 189 REG_SPECIAL = obj.RBaseARM64 + 1<<12 + iota 190 REG_DAIF 191 REG_NZCV 192 REG_FPSR 193 REG_FPCR 194 REG_SPSR_EL1 195 REG_ELR_EL1 196 REG_SPSR_EL2 197 REG_ELR_EL2 198 REG_CurrentEL 199 REG_SP_EL0 200 REG_SPSel 201 REG_DAIFSet 202 REG_DAIFClr 203 ) 204 205 // Register assignments: 206 // 207 // compiler allocates R0 up as temps 208 // compiler allocates register variables R7-R25 209 // compiler allocates external registers R26 down 210 // 211 // compiler allocates register variables F7-F26 212 // compiler allocates external registers F26 down 213 const ( 214 REGMIN = REG_R7 // register variables allocated from here to REGMAX 215 REGRT1 = REG_R16 // ARM64 IP0, for external linker, runtime, duffzero and duffcopy 216 REGRT2 = REG_R17 // ARM64 IP1, for external linker, runtime, duffcopy 217 REGPR = REG_R18 // ARM64 platform register, unused in the Go toolchain 218 REGMAX = REG_R25 219 220 REGCTXT = REG_R26 // environment for closures 221 REGTMP = REG_R27 // reserved for liblink 222 REGG = REG_R28 // G 223 REGFP = REG_R29 // frame pointer, unused in the Go toolchain 224 REGLINK = REG_R30 225 226 // ARM64 uses R31 as both stack pointer and zero register, 227 // depending on the instruction. To differentiate RSP from ZR, 228 // we use a different numeric value for REGZERO and REGSP. 229 REGZERO = REG_R31 230 REGSP = REG_RSP 231 232 FREGRET = REG_F0 233 FREGMIN = REG_F7 // first register variable 234 FREGMAX = REG_F26 // last register variable for 7g only 235 FREGEXT = REG_F26 // first external register 236 FREGZERO = REG_F28 // both float and double 237 FREGHALF = REG_F29 // double 238 FREGONE = REG_F30 // double 239 FREGTWO = REG_F31 // double 240 ) 241 242 const ( 243 BIG = 2048 - 8 244 ) 245 246 const ( 247 /* mark flags */ 248 LABEL = 1 << iota 249 LEAF 250 FLOAT 251 BRANCH 252 LOAD 253 FCMP 254 SYNC 255 LIST 256 FOLL 257 NOSCHED 258 ) 259 260 const ( 261 C_NONE = iota 262 C_REG // R0..R30 263 C_RSP // R0..R30, RSP 264 C_FREG // F0..F31 265 C_VREG // V0..V31 266 C_PAIR // (Rn, Rm) 267 C_SHIFT // Rn<<2 268 C_EXTREG // Rn.UXTB<<3 269 C_SPR // REG_NZCV 270 C_COND // EQ, NE, etc 271 272 C_ZCON // $0 or ZR 273 C_ADDCON0 // 12-bit unsigned, unshifted 274 C_ADDCON // 12-bit unsigned, shifted left by 0 or 12 275 C_MOVCON // generated by a 16-bit constant, optionally inverted and/or shifted by multiple of 16 276 C_BITCON // bitfield and logical immediate masks 277 C_ABCON // could be C_ADDCON or C_BITCON 278 C_MBCON // could be C_MOVCON or C_BITCON 279 C_LCON // 32-bit constant 280 C_VCON // 64-bit constant 281 C_FCON // floating-point constant 282 C_VCONADDR // 64-bit memory address 283 284 C_AACON // ADDCON offset in auto constant $a(FP) 285 C_LACON // 32-bit offset in auto constant $a(FP) 286 C_AECON // ADDCON offset in extern constant $e(SB) 287 288 // TODO(aram): only one branch class should be enough 289 C_SBRA // for TYPE_BRANCH 290 C_LBRA 291 292 C_NPAUTO // -512 <= x < 0, 0 mod 8 293 C_NSAUTO // -256 <= x < 0 294 C_PSAUTO // 0 to 255 295 C_PPAUTO // 0 to 504, 0 mod 8 296 C_UAUTO4K // 0 to 4095 297 C_UAUTO8K // 0 to 8190, 0 mod 2 298 C_UAUTO16K // 0 to 16380, 0 mod 4 299 C_UAUTO32K // 0 to 32760, 0 mod 8 300 C_UAUTO64K // 0 to 65520, 0 mod 16 301 C_LAUTO // any other 32-bit constant 302 303 C_SEXT1 // 0 to 4095, direct 304 C_SEXT2 // 0 to 8190 305 C_SEXT4 // 0 to 16380 306 C_SEXT8 // 0 to 32760 307 C_SEXT16 // 0 to 65520 308 C_LEXT 309 310 // TODO(aram): s/AUTO/INDIR/ 311 C_ZOREG // 0(R) 312 C_NPOREG // mirror NPAUTO, etc 313 C_NSOREG 314 C_PSOREG 315 C_PPOREG 316 C_UOREG4K 317 C_UOREG8K 318 C_UOREG16K 319 C_UOREG32K 320 C_UOREG64K 321 C_LOREG 322 323 C_ADDR // TODO(aram): explain difference from C_VCONADDR 324 325 // The GOT slot for a symbol in -dynlink mode. 326 C_GOTADDR 327 328 // TLS "var" in local exec mode: will become a constant offset from 329 // thread local base that is ultimately chosen by the program linker. 330 C_TLS_LE 331 332 // TLS "var" in initial exec mode: will become a memory address (chosen 333 // by the program linker) that the dynamic linker will fill with the 334 // offset from the thread local base. 335 C_TLS_IE 336 337 C_ROFF // register offset (including register extended) 338 339 C_GOK 340 C_TEXTSIZE 341 C_NCLASS // must be last 342 ) 343 344 const ( 345 C_XPRE = 1 << 6 // match arm.C_WBIT, so Prog.String know how to print it 346 C_XPOST = 1 << 5 // match arm.C_PBIT, so Prog.String know how to print it 347 ) 348 349 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm64 350 351 const ( 352 AADC = obj.ABaseARM64 + obj.A_ARCHSPECIFIC + iota 353 AADCS 354 AADCSW 355 AADCW 356 AADD 357 AADDS 358 AADDSW 359 AADDW 360 AADR 361 AADRP 362 AAND 363 AANDS 364 AANDSW 365 AANDW 366 AASR 367 AASRW 368 AAT 369 ABFI 370 ABFIW 371 ABFM 372 ABFMW 373 ABFXIL 374 ABFXILW 375 ABIC 376 ABICS 377 ABICSW 378 ABICW 379 ABRK 380 ACBNZ 381 ACBNZW 382 ACBZ 383 ACBZW 384 ACCMN 385 ACCMNW 386 ACCMP 387 ACCMPW 388 ACINC 389 ACINCW 390 ACINV 391 ACINVW 392 ACLREX 393 ACLS 394 ACLSW 395 ACLZ 396 ACLZW 397 ACMN 398 ACMNW 399 ACMP 400 ACMPW 401 ACNEG 402 ACNEGW 403 ACRC32B 404 ACRC32CB 405 ACRC32CH 406 ACRC32CW 407 ACRC32CX 408 ACRC32H 409 ACRC32W 410 ACRC32X 411 ACSEL 412 ACSELW 413 ACSET 414 ACSETM 415 ACSETMW 416 ACSETW 417 ACSINC 418 ACSINCW 419 ACSINV 420 ACSINVW 421 ACSNEG 422 ACSNEGW 423 ADC 424 ADCPS1 425 ADCPS2 426 ADCPS3 427 ADMB 428 ADRPS 429 ADSB 430 AEON 431 AEONW 432 AEOR 433 AEORW 434 AERET 435 AEXTR 436 AEXTRW 437 AHINT 438 AHLT 439 AHVC 440 AIC 441 AISB 442 ALDAR 443 ALDARB 444 ALDARH 445 ALDARW 446 ALDAXP 447 ALDAXPW 448 ALDAXR 449 ALDAXRB 450 ALDAXRH 451 ALDAXRW 452 ALDP 453 ALDXR 454 ALDXRB 455 ALDXRH 456 ALDXRW 457 ALDXP 458 ALDXPW 459 ALSL 460 ALSLW 461 ALSR 462 ALSRW 463 AMADD 464 AMADDW 465 AMNEG 466 AMNEGW 467 AMOVK 468 AMOVKW 469 AMOVN 470 AMOVNW 471 AMOVZ 472 AMOVZW 473 AMRS 474 AMSR 475 AMSUB 476 AMSUBW 477 AMUL 478 AMULW 479 AMVN 480 AMVNW 481 ANEG 482 ANEGS 483 ANEGSW 484 ANEGW 485 ANGC 486 ANGCS 487 ANGCSW 488 ANGCW 489 AORN 490 AORNW 491 AORR 492 AORRW 493 APRFM 494 APRFUM 495 ARBIT 496 ARBITW 497 AREM 498 AREMW 499 AREV 500 AREV16 501 AREV16W 502 AREV32 503 AREVW 504 AROR 505 ARORW 506 ASBC 507 ASBCS 508 ASBCSW 509 ASBCW 510 ASBFIZ 511 ASBFIZW 512 ASBFM 513 ASBFMW 514 ASBFX 515 ASBFXW 516 ASDIV 517 ASDIVW 518 ASEV 519 ASEVL 520 ASMADDL 521 ASMC 522 ASMNEGL 523 ASMSUBL 524 ASMULH 525 ASMULL 526 ASTXR 527 ASTXRB 528 ASTXRH 529 ASTXP 530 ASTXPW 531 ASTXRW 532 ASTLP 533 ASTLPW 534 ASTLR 535 ASTLRB 536 ASTLRH 537 ASTLRW 538 ASTLXP 539 ASTLXPW 540 ASTLXR 541 ASTLXRB 542 ASTLXRH 543 ASTLXRW 544 ASTP 545 ASUB 546 ASUBS 547 ASUBSW 548 ASUBW 549 ASVC 550 ASXTB 551 ASXTBW 552 ASXTH 553 ASXTHW 554 ASXTW 555 ASYS 556 ASYSL 557 ATBNZ 558 ATBZ 559 ATLBI 560 ATST 561 ATSTW 562 AUBFIZ 563 AUBFIZW 564 AUBFM 565 AUBFMW 566 AUBFX 567 AUBFXW 568 AUDIV 569 AUDIVW 570 AUMADDL 571 AUMNEGL 572 AUMSUBL 573 AUMULH 574 AUMULL 575 AUREM 576 AUREMW 577 AUXTB 578 AUXTH 579 AUXTW 580 AUXTBW 581 AUXTHW 582 AWFE 583 AWFI 584 AYIELD 585 AMOVB 586 AMOVBU 587 AMOVH 588 AMOVHU 589 AMOVW 590 AMOVWU 591 AMOVD 592 AMOVNP 593 AMOVNPW 594 AMOVP 595 AMOVPD 596 AMOVPQ 597 AMOVPS 598 AMOVPSW 599 AMOVPW 600 ABEQ 601 ABNE 602 ABCS 603 ABHS 604 ABCC 605 ABLO 606 ABMI 607 ABPL 608 ABVS 609 ABVC 610 ABHI 611 ABLS 612 ABGE 613 ABLT 614 ABGT 615 ABLE 616 AFABSD 617 AFABSS 618 AFADDD 619 AFADDS 620 AFCCMPD 621 AFCCMPED 622 AFCCMPS 623 AFCCMPES 624 AFCMPD 625 AFCMPED 626 AFCMPES 627 AFCMPS 628 AFCVTSD 629 AFCVTDS 630 AFCVTZSD 631 AFCVTZSDW 632 AFCVTZSS 633 AFCVTZSSW 634 AFCVTZUD 635 AFCVTZUDW 636 AFCVTZUS 637 AFCVTZUSW 638 AFDIVD 639 AFDIVS 640 AFMOVD 641 AFMOVS 642 AFMULD 643 AFMULS 644 AFNEGD 645 AFNEGS 646 AFSQRTD 647 AFSQRTS 648 AFSUBD 649 AFSUBS 650 ASCVTFD 651 ASCVTFS 652 ASCVTFWD 653 ASCVTFWS 654 AUCVTFD 655 AUCVTFS 656 AUCVTFWD 657 AUCVTFWS 658 AWORD 659 ADWORD 660 AFCSELS 661 AFCSELD 662 AFMAXS 663 AFMINS 664 AFMAXD 665 AFMIND 666 AFMAXNMS 667 AFMAXNMD 668 AFNMULS 669 AFNMULD 670 AFRINTNS 671 AFRINTND 672 AFRINTPS 673 AFRINTPD 674 AFRINTMS 675 AFRINTMD 676 AFRINTZS 677 AFRINTZD 678 AFRINTAS 679 AFRINTAD 680 AFRINTXS 681 AFRINTXD 682 AFRINTIS 683 AFRINTID 684 AFMADDS 685 AFMADDD 686 AFMSUBS 687 AFMSUBD 688 AFNMADDS 689 AFNMADDD 690 AFNMSUBS 691 AFNMSUBD 692 AFMINNMS 693 AFMINNMD 694 AFCVTDH 695 AFCVTHS 696 AFCVTHD 697 AFCVTSH 698 AAESD 699 AAESE 700 AAESIMC 701 AAESMC 702 ASHA1C 703 ASHA1H 704 ASHA1M 705 ASHA1P 706 ASHA1SU0 707 ASHA1SU1 708 ASHA256H 709 ASHA256H2 710 ASHA256SU0 711 ASHA256SU1 712 ALAST 713 AB = obj.AJMP 714 ABL = obj.ACALL 715 )