github.com/nicocha30/gvisor-ligolo@v0.0.0-20230726075806-989fa2c0a413/pkg/ring0/aarch64.go (about)

     1  // Copyright 2019 The gVisor Authors.
     2  //
     3  // Licensed under the Apache License, Version 2.0 (the "License");
     4  // you may not use this file except in compliance with the License.
     5  // You may obtain a copy of the License at
     6  //
     7  //     http://www.apache.org/licenses/LICENSE-2.0
     8  //
     9  // Unless required by applicable law or agreed to in writing, software
    10  // distributed under the License is distributed on an "AS IS" BASIS,
    11  // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    12  // See the License for the specific language governing permissions and
    13  // limitations under the License.
    14  
    15  //go:build arm64
    16  // +build arm64
    17  
    18  package ring0
    19  
    20  // Useful bits.
    21  const (
    22  	_PGD_PGT_BASE = 0x1000
    23  	_PGD_PGT_SIZE = 0x1000
    24  	_PUD_PGT_BASE = 0x2000
    25  	_PUD_PGT_SIZE = 0x1000
    26  	_PMD_PGT_BASE = 0x3000
    27  	_PMD_PGT_SIZE = 0x4000
    28  	_PTE_PGT_BASE = 0x7000
    29  	_PTE_PGT_SIZE = 0x1000
    30  )
    31  
    32  const (
    33  	// VirtualAddressBits is fixed at 48.
    34  	VirtualAddressBits = 48
    35  
    36  	// PhysicalAddressBits is fixed at 40.
    37  	PhysicalAddressBits = 40
    38  
    39  	// DAIF bits:debug, sError, IRQ, FIQ.
    40  	_PSR_D_BIT      = 0x00000200
    41  	_PSR_A_BIT      = 0x00000100
    42  	_PSR_I_BIT      = 0x00000080
    43  	_PSR_F_BIT      = 0x00000040
    44  	_PSR_DAIF_SHIFT = 6
    45  	_PSR_DAIF_MASK  = 0xf << _PSR_DAIF_SHIFT
    46  
    47  	// PSR bits.
    48  	_PSR_MODE_EL0t = 0x00000000
    49  	_PSR_MODE_EL1t = 0x00000004
    50  	_PSR_MODE_EL1h = 0x00000005
    51  	_PSR_MODE_MASK = 0x0000000f
    52  
    53  	PsrFlagsClear = _PSR_MODE_MASK | _PSR_DAIF_MASK
    54  	PsrModeMask   = _PSR_MODE_MASK
    55  
    56  	// KernelFlagsSet should always be set in the kernel.
    57  	KernelFlagsSet = _PSR_MODE_EL1h | _PSR_D_BIT | _PSR_A_BIT | _PSR_I_BIT | _PSR_F_BIT
    58  
    59  	// UserFlagsSet are always set in userspace.
    60  	UserFlagsSet = _PSR_MODE_EL0t
    61  )
    62  
    63  // Vector is an exception vector.
    64  type Vector uintptr
    65  
    66  // Exception vectors.
    67  const (
    68  	El1InvSync = iota
    69  	El1InvIrq
    70  	El1InvFiq
    71  	El1InvError
    72  
    73  	El1Sync
    74  	El1Irq
    75  	El1Fiq
    76  	El1Err
    77  
    78  	El0Sync
    79  	El0Irq
    80  	El0Fiq
    81  	El0Err
    82  
    83  	El0InvSync
    84  	El0InvIrq
    85  	El0InvFiq
    86  	El0InvErr
    87  
    88  	El1SyncDa
    89  	El1SyncIa
    90  	El1SyncSpPc
    91  	El1SyncUndef
    92  	El1SyncDbg
    93  	El1SyncInv
    94  
    95  	El0SyncSVC
    96  	El0SyncDa
    97  	El0SyncIa
    98  	El0SyncFpsimdAcc
    99  	El0SyncSveAcc
   100  	El0SyncFpsimdExc
   101  	El0SyncSys
   102  	El0SyncSpPc
   103  	El0SyncUndef
   104  	El0SyncDbg
   105  	El0SyncWfx
   106  	El0SyncInv
   107  
   108  	El0ErrNMI
   109  	El0ErrBounce
   110  
   111  	_NR_INTERRUPTS
   112  )
   113  
   114  // System call vectors.
   115  const (
   116  	Syscall                 Vector = El0SyncSVC
   117  	PageFault               Vector = El0SyncDa
   118  	VirtualizationException Vector = El0ErrBounce
   119  )