github.com/nicocha30/gvisor-ligolo@v0.0.0-20230726075806-989fa2c0a413/pkg/ring0/lib_arm64.s (about)

     1  // Copyright 2019 The gVisor Authors.
     2  //
     3  // Licensed under the Apache License, Version 2.0 (the "License");
     4  // you may not use this file except in compliance with the License.
     5  // You may obtain a copy of the License at
     6  //
     7  //     http://www.apache.org/licenses/LICENSE-2.0
     8  //
     9  // Unless required by applicable law or agreed to in writing, software
    10  // distributed under the License is distributed on an "AS IS" BASIS,
    11  // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    12  // See the License for the specific language governing permissions and
    13  // limitations under the License.
    14  
    15  #include "funcdata.h"
    16  #include "textflag.h"
    17  
    18  #define TLBI_ASID_SHIFT		48
    19  
    20  TEXT ·FlushTlbByVA(SB),NOSPLIT,$0-8
    21  	MOVD addr+0(FP), R1
    22  	DSB $10                 // dsb(ishst)
    23  	WORD $0xd50883a1        // tlbi vale1is, x1
    24  	DSB $11                 // dsb(ish)
    25  	RET
    26  
    27  TEXT ·FlushTlbByASID(SB),NOSPLIT,$0-8
    28  	MOVD asid+0(FP), R1
    29  	LSL $TLBI_ASID_SHIFT, R1, R1
    30  	DSB $10                 // dsb(ishst)
    31  	WORD $0xd5088341        // tlbi aside1is, x1
    32  	DSB $11                 // dsb(ish)
    33  	RET
    34  
    35  TEXT ·LocalFlushTlbByASID(SB),NOSPLIT,$0-8
    36      MOVD asid+0(FP), R1
    37      LSL $TLBI_ASID_SHIFT, R1, R1
    38      DSB $10                 // dsb(ishst)
    39      WORD $0xd5088741        // tlbi aside1, x1
    40      DSB $11                 // dsb(ish)
    41      RET
    42  
    43  TEXT ·LocalFlushTlbAll(SB),NOSPLIT,$0
    44  	DSB $6			// dsb(nshst)
    45  	WORD $0xd508871f	// __tlbi(vmalle1)
    46  	DSB $7			// dsb(nsh)
    47  	ISB $15
    48  	RET
    49  
    50  TEXT ·FlushTlbAll(SB),NOSPLIT,$0
    51  	DSB $10			// dsb(ishst)
    52  	WORD $0xd508831f	// __tlbi(vmalle1is)
    53  	DSB $11			// dsb(ish)
    54  	ISB $15
    55  	RET
    56  
    57  TEXT ·CPACREL1(SB),NOSPLIT,$0-8
    58  	WORD $0xd5381041 	// MRS CPACR_EL1, R1
    59  	MOVD R1, value+0(FP)
    60  	RET
    61  
    62  TEXT ·GetFPCR(SB),NOSPLIT,$0-8
    63  	MOVD FPCR, R1
    64  	MOVD R1, value+0(FP)
    65  	RET
    66  
    67  TEXT ·GetFPSR(SB),NOSPLIT,$0-8
    68  	MOVD FPSR, R1
    69  	MOVD R1, value+0(FP)
    70  	RET
    71  
    72  TEXT ·SetFPCR(SB),NOSPLIT,$0-8
    73  	MOVD value+0(FP), R1
    74  	MOVD R1, FPCR
    75  	RET
    76  
    77  TEXT ·SetFPSR(SB),NOSPLIT,$0-8
    78  	MOVD value+0(FP), R1
    79  	MOVD R1, FPSR
    80  	RET
    81  
    82  TEXT ·SaveVRegs(SB),NOSPLIT,$0-8
    83  	MOVD arg+0(FP), R0
    84  
    85  	// Skip aarch64_ctx, fpsr, fpcr.
    86  	ADD $16, R0, R0
    87  
    88  	WORD $0xad000400       //  stp  q0, q1, [x0]
    89  	WORD $0xad010c02       //  stp  q2, q3, [x0, #32]
    90  	WORD $0xad021404       //  stp  q4, q5, [x0, #64]
    91  	WORD $0xad031c06       //  stp  q6, q7, [x0, #96]
    92  	WORD $0xad042408       //  stp  q8, q9, [x0, #128]
    93  	WORD $0xad052c0a       //  stp  q10, q11, [x0, #160]
    94  	WORD $0xad06340c       //  stp  q12, q13, [x0, #192]
    95  	WORD $0xad073c0e       //  stp  q14, q15, [x0, #224]
    96  	WORD $0xad084410       //  stp  q16, q17, [x0, #256]
    97  	WORD $0xad094c12       //  stp  q18, q19, [x0, #288]
    98  	WORD $0xad0a5414       //  stp  q20, q21, [x0, #320]
    99  	WORD $0xad0b5c16       //  stp  q22, q23, [x0, #352]
   100  	WORD $0xad0c6418       //  stp  q24, q25, [x0, #384]
   101  	WORD $0xad0d6c1a       //  stp  q26, q27, [x0, #416]
   102  	WORD $0xad0e741c       //  stp  q28, q29, [x0, #448]
   103  	WORD $0xad0f7c1e       //  stp  q30, q31, [x0, #480]
   104  
   105  	RET
   106  
   107  TEXT ·LoadVRegs(SB),NOSPLIT,$0-8
   108  	MOVD arg+0(FP), R0
   109  
   110  	// Skip aarch64_ctx, fpsr, fpcr.
   111  	ADD $16, R0, R0
   112  
   113  	WORD $0xad400400    // ldp  q0, q1, [x0]
   114  	WORD $0xad410c02    // ldp  q2, q3, [x0, #32]
   115  	WORD $0xad421404    // ldp  q4, q5, [x0, #64]
   116  	WORD $0xad431c06    // ldp  q6, q7, [x0, #96]
   117  	WORD $0xad442408    // ldp  q8, q9, [x0, #128]
   118  	WORD $0xad452c0a    // ldp  q10, q11, [x0, #160]
   119  	WORD $0xad46340c    // ldp  q12, q13, [x0, #192]
   120  	WORD $0xad473c0e    // ldp  q14, q15, [x0, #224]
   121  	WORD $0xad484410    // ldp  q16, q17, [x0, #256]
   122  	WORD $0xad494c12    // ldp  q18, q19, [x0, #288]
   123  	WORD $0xad4a5414    // ldp  q20, q21, [x0, #320]
   124  	WORD $0xad4b5c16    // ldp  q22, q23, [x0, #352]
   125  	WORD $0xad4c6418    // ldp  q24, q25, [x0, #384]
   126  	WORD $0xad4d6c1a    // ldp  q26, q27, [x0, #416]
   127  	WORD $0xad4e741c    // ldp  q28, q29, [x0, #448]
   128  	WORD $0xad4f7c1e    // ldp  q30, q31, [x0, #480]
   129  
   130  	RET
   131  
   132  TEXT ·LoadFloatingPoint(SB),NOSPLIT,$0-8
   133  	MOVD arg+0(FP), R0
   134  
   135  	MOVD 0(R0), R1
   136  	MOVD R1, FPSR
   137  	MOVD 8(R0), R1
   138  	MOVD R1, FPCR
   139  
   140  	ADD $16, R0, R0
   141  
   142  	WORD $0xad400400 	// ldp	q0, q1, [x0]
   143  	WORD $0xad410c02 	// ldp	q2, q3, [x0, #32]
   144  	WORD $0xad421404 	// ldp	q4, q5, [x0, #64]
   145  	WORD $0xad431c06 	// ldp	q6, q7, [x0, #96]
   146  	WORD $0xad442408 	// ldp	q8, q9, [x0, #128]
   147  	WORD $0xad452c0a 	// ldp	q10, q11, [x0, #160]
   148  	WORD $0xad46340c 	// ldp	q12, q13, [x0, #192]
   149  	WORD $0xad473c0e 	// ldp	q14, q15, [x0, #224]
   150  	WORD $0xad484410 	// ldp	q16, q17, [x0, #256]
   151  	WORD $0xad494c12 	// ldp	q18, q19, [x0, #288]
   152  	WORD $0xad4a5414 	// ldp	q20, q21, [x0, #320]
   153  	WORD $0xad4b5c16 	// ldp	q22, q23, [x0, #352]
   154  	WORD $0xad4c6418 	// ldp	q24, q25, [x0, #384]
   155  	WORD $0xad4d6c1a 	// ldp	q26, q27, [x0, #416]
   156  	WORD $0xad4e741c 	// ldp	q28, q29, [x0, #448]
   157  	WORD $0xad4f7c1e 	// ldp	q30, q31, [x0, #480]
   158  
   159  	RET
   160  
   161  TEXT ·SaveFloatingPoint(SB),NOSPLIT,$0-8
   162  	MOVD arg+0(FP), R0
   163  
   164  	MOVD FPSR, R1
   165  	MOVD R1, 0(R0)
   166  	MOVD FPCR, R1
   167  	MOVD R1, 8(R0)
   168  
   169  	ADD $16, R0, R0
   170  
   171  	WORD $0xad000400       //  stp	q0, q1, [x0]
   172  	WORD $0xad010c02       //  stp	q2, q3, [x0, #32]
   173  	WORD $0xad021404       //  stp	q4, q5, [x0, #64]
   174  	WORD $0xad031c06       //  stp	q6, q7, [x0, #96]
   175  	WORD $0xad042408       //  stp	q8, q9, [x0, #128]
   176  	WORD $0xad052c0a       //  stp	q10, q11, [x0, #160]
   177  	WORD $0xad06340c       //  stp	q12, q13, [x0, #192]
   178  	WORD $0xad073c0e       //  stp	q14, q15, [x0, #224]
   179  	WORD $0xad084410       //  stp	q16, q17, [x0, #256]
   180  	WORD $0xad094c12       //  stp	q18, q19, [x0, #288]
   181  	WORD $0xad0a5414       //  stp	q20, q21, [x0, #320]
   182  	WORD $0xad0b5c16       //  stp	q22, q23, [x0, #352]
   183  	WORD $0xad0c6418       //  stp	q24, q25, [x0, #384]
   184  	WORD $0xad0d6c1a       //  stp	q26, q27, [x0, #416]
   185  	WORD $0xad0e741c       //  stp	q28, q29, [x0, #448]
   186  	WORD $0xad0f7c1e       //  stp	q30, q31, [x0, #480]
   187  
   188  	RET