github.com/primecitizens/pcz/std@v0.2.1/core/cpu/cpu_arm64.go (about)

     1  // SPDX-License-Identifier: Apache-2.0
     2  // Copyright 2023 The Prime Citizens
     3  //
     4  // Copyright 2017 The Go Authors. All rights reserved.
     5  // Use of this source code is governed by a BSD-style
     6  // license that can be found in the LICENSE file.
     7  
     8  //go:build arm64
     9  
    10  package cpu
    11  
    12  // CacheLinePadSize is used to prevent false sharing of cache lines.
    13  // We choose 128 because Apple Silicon, a.k.a. M1, has 128-byte cache line size.
    14  // It doesn't cost much and is much more future-proof.
    15  const CacheLinePadSize = 128
    16  
    17  func doinit() *ARM64Features {
    18  	// arm64 uses different ways to detect CPU features at runtime depending on the operating system.
    19  	return osInit()
    20  }
    21  
    22  func getisar0() uint64
    23  
    24  func getMIDR() uint64
    25  
    26  func extractBits(data uint64, start, end uint) uint {
    27  	return (uint)(data>>start) & ((1 << (end - start + 1)) - 1)
    28  }
    29  
    30  func parseARM64SystemRegisters(isar0 uint64) {
    31  	// ID_AA64ISAR0_EL1
    32  	switch extractBits(isar0, 4, 7) {
    33  	case 1:
    34  		ARM64 |= ARM64Feature_aes
    35  	case 2:
    36  		ARM64 |= ARM64Feature_aes | ARM64Feature_pmull
    37  	}
    38  
    39  	switch extractBits(isar0, 8, 11) {
    40  	case 1:
    41  		ARM64 |= ARM64Feature_sha1
    42  	}
    43  
    44  	switch extractBits(isar0, 12, 15) {
    45  	case 1:
    46  		ARM64 |= ARM64Feature_sha2
    47  	case 2:
    48  		ARM64 |= ARM64Feature_sha2 | ARM64Feature_sha512
    49  	}
    50  
    51  	switch extractBits(isar0, 16, 19) {
    52  	case 1:
    53  		ARM64 |= ARM64Feature_crc32
    54  	}
    55  
    56  	switch extractBits(isar0, 20, 23) {
    57  	case 2:
    58  		ARM64 |= ARM64Feature_atomics
    59  	}
    60  }