github.com/rakyll/go@v0.0.0-20170216000551-64c02460d703/src/cmd/compile/internal/ssa/gen/ARM.rules (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (AddPtr x y) -> (ADD x y) 6 (Add32 x y) -> (ADD x y) 7 (Add16 x y) -> (ADD x y) 8 (Add8 x y) -> (ADD x y) 9 (Add32F x y) -> (ADDF x y) 10 (Add64F x y) -> (ADDD x y) 11 12 (Add32carry x y) -> (ADDS x y) 13 (Add32withcarry x y c) -> (ADC x y c) 14 15 (SubPtr x y) -> (SUB x y) 16 (Sub32 x y) -> (SUB x y) 17 (Sub16 x y) -> (SUB x y) 18 (Sub8 x y) -> (SUB x y) 19 (Sub32F x y) -> (SUBF x y) 20 (Sub64F x y) -> (SUBD x y) 21 22 (Sub32carry x y) -> (SUBS x y) 23 (Sub32withcarry x y c) -> (SBC x y c) 24 25 (Mul32 x y) -> (MUL x y) 26 (Mul16 x y) -> (MUL x y) 27 (Mul8 x y) -> (MUL x y) 28 (Mul32F x y) -> (MULF x y) 29 (Mul64F x y) -> (MULD x y) 30 31 (Hmul32 x y) -> (HMUL x y) 32 (Hmul32u x y) -> (HMULU x y) 33 (Hmul16 x y) -> (SRAconst (MUL <config.fe.TypeInt32()> (SignExt16to32 x) (SignExt16to32 y)) [16]) 34 (Hmul16u x y) -> (SRLconst (MUL <config.fe.TypeUInt32()> (ZeroExt16to32 x) (ZeroExt16to32 y)) [16]) 35 (Hmul8 x y) -> (SRAconst (MUL <config.fe.TypeInt16()> (SignExt8to32 x) (SignExt8to32 y)) [8]) 36 (Hmul8u x y) -> (SRLconst (MUL <config.fe.TypeUInt16()> (ZeroExt8to32 x) (ZeroExt8to32 y)) [8]) 37 38 (Mul32uhilo x y) -> (MULLU x y) 39 40 (Div32 x y) -> 41 (SUB (XOR <config.fe.TypeUInt32()> // negate the result if one operand is negative 42 (Select0 <config.fe.TypeUInt32()> (UDIVrtcall 43 (SUB <config.fe.TypeUInt32()> (XOR x <config.fe.TypeUInt32()> (Signmask x)) (Signmask x)) // negate x if negative 44 (SUB <config.fe.TypeUInt32()> (XOR y <config.fe.TypeUInt32()> (Signmask y)) (Signmask y)))) // negate y if negative 45 (Signmask (XOR <config.fe.TypeUInt32()> x y))) (Signmask (XOR <config.fe.TypeUInt32()> x y))) 46 (Div32u x y) -> (Select0 <config.fe.TypeUInt32()> (UDIVrtcall x y)) 47 (Div16 x y) -> (Div32 (SignExt16to32 x) (SignExt16to32 y)) 48 (Div16u x y) -> (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 49 (Div8 x y) -> (Div32 (SignExt8to32 x) (SignExt8to32 y)) 50 (Div8u x y) -> (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 51 (Div32F x y) -> (DIVF x y) 52 (Div64F x y) -> (DIVD x y) 53 54 (Mod32 x y) -> 55 (SUB (XOR <config.fe.TypeUInt32()> // negate the result if x is negative 56 (Select1 <config.fe.TypeUInt32()> (UDIVrtcall 57 (SUB <config.fe.TypeUInt32()> (XOR <config.fe.TypeUInt32()> x (Signmask x)) (Signmask x)) // negate x if negative 58 (SUB <config.fe.TypeUInt32()> (XOR <config.fe.TypeUInt32()> y (Signmask y)) (Signmask y)))) // negate y if negative 59 (Signmask x)) (Signmask x)) 60 (Mod32u x y) -> (Select1 <config.fe.TypeUInt32()> (UDIVrtcall x y)) 61 (Mod16 x y) -> (Mod32 (SignExt16to32 x) (SignExt16to32 y)) 62 (Mod16u x y) -> (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y)) 63 (Mod8 x y) -> (Mod32 (SignExt8to32 x) (SignExt8to32 y)) 64 (Mod8u x y) -> (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y)) 65 66 (And32 x y) -> (AND x y) 67 (And16 x y) -> (AND x y) 68 (And8 x y) -> (AND x y) 69 70 (Or32 x y) -> (OR x y) 71 (Or16 x y) -> (OR x y) 72 (Or8 x y) -> (OR x y) 73 74 (Xor32 x y) -> (XOR x y) 75 (Xor16 x y) -> (XOR x y) 76 (Xor8 x y) -> (XOR x y) 77 78 // unary ops 79 (Neg32 x) -> (RSBconst [0] x) 80 (Neg16 x) -> (RSBconst [0] x) 81 (Neg8 x) -> (RSBconst [0] x) 82 (Neg32F x) -> (NEGF x) 83 (Neg64F x) -> (NEGD x) 84 85 (Com32 x) -> (MVN x) 86 (Com16 x) -> (MVN x) 87 (Com8 x) -> (MVN x) 88 89 (Sqrt x) -> (SQRTD x) 90 91 // count trailing zero 92 // 32 - CLZ(x&-x - 1) 93 (Ctz32 <t> x) -> (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1]))) 94 95 // byte swap 96 // let (a, b, c, d) be the bytes of x from high to low 97 // t1 = x right rotate 16 bits -- (c, d, a, b ) 98 // t2 = x ^ t1 -- (a^c, b^d, a^c, b^d) 99 // t3 = t2 &^ 0xff0000 -- (a^c, 0, a^c, b^d) 100 // t4 = t3 >> 8 -- (0, a^c, 0, a^c) 101 // t5 = x right rotate 8 bits -- (d, a, b, c ) 102 // result = t4 ^ t5 -- (d, c, b, a ) 103 // using shifted ops this can be done in 4 instructions. 104 (Bswap32 <t> x) -> 105 (XOR <t> 106 (SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8]) 107 (SRRconst <t> x [8])) 108 109 // boolean ops -- booleans are represented with 0=false, 1=true 110 (AndB x y) -> (AND x y) 111 (OrB x y) -> (OR x y) 112 (EqB x y) -> (XORconst [1] (XOR <config.fe.TypeBool()> x y)) 113 (NeqB x y) -> (XOR x y) 114 (Not x) -> (XORconst [1] x) 115 116 // shifts 117 // hardware instruction uses only the low byte of the shift 118 // we compare to 256 to ensure Go semantics for large shifts 119 (Lsh32x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 120 (Lsh32x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 121 (Lsh32x8 x y) -> (SLL x (ZeroExt8to32 y)) 122 123 (Lsh16x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 124 (Lsh16x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 125 (Lsh16x8 x y) -> (SLL x (ZeroExt8to32 y)) 126 127 (Lsh8x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 128 (Lsh8x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 129 (Lsh8x8 x y) -> (SLL x (ZeroExt8to32 y)) 130 131 (Rsh32Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0]) 132 (Rsh32Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 133 (Rsh32Ux8 x y) -> (SRL x (ZeroExt8to32 y)) 134 135 (Rsh16Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0]) 136 (Rsh16Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 137 (Rsh16Ux8 x y) -> (SRL (ZeroExt16to32 x) (ZeroExt8to32 y)) 138 139 (Rsh8Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0]) 140 (Rsh8Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 141 (Rsh8Ux8 x y) -> (SRL (ZeroExt8to32 x) (ZeroExt8to32 y)) 142 143 (Rsh32x32 x y) -> (SRAcond x y (CMPconst [256] y)) 144 (Rsh32x16 x y) -> (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 145 (Rsh32x8 x y) -> (SRA x (ZeroExt8to32 y)) 146 147 (Rsh16x32 x y) -> (SRAcond (SignExt16to32 x) y (CMPconst [256] y)) 148 (Rsh16x16 x y) -> (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 149 (Rsh16x8 x y) -> (SRA (SignExt16to32 x) (ZeroExt8to32 y)) 150 151 (Rsh8x32 x y) -> (SRAcond (SignExt8to32 x) y (CMPconst [256] y)) 152 (Rsh8x16 x y) -> (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 153 (Rsh8x8 x y) -> (SRA (SignExt8to32 x) (ZeroExt8to32 y)) 154 155 // constant shifts 156 // generic opt rewrites all constant shifts to shift by Const64 157 (Lsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SLLconst x [c]) 158 (Rsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SRAconst x [c]) 159 (Rsh32Ux64 x (Const64 [c])) && uint64(c) < 32 -> (SRLconst x [c]) 160 (Lsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SLLconst x [c]) 161 (Rsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [16]) [c+16]) 162 (Rsh16Ux64 x (Const64 [c])) && uint64(c) < 16 -> (SRLconst (SLLconst <config.fe.TypeUInt32()> x [16]) [c+16]) 163 (Lsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SLLconst x [c]) 164 (Rsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [24]) [c+24]) 165 (Rsh8Ux64 x (Const64 [c])) && uint64(c) < 8 -> (SRLconst (SLLconst <config.fe.TypeUInt32()> x [24]) [c+24]) 166 167 // large constant shifts 168 (Lsh32x64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 169 (Rsh32Ux64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 170 (Lsh16x64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 171 (Rsh16Ux64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 172 (Lsh8x64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 173 (Rsh8Ux64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 174 175 // large constant signed right shift, we leave the sign bit 176 (Rsh32x64 x (Const64 [c])) && uint64(c) >= 32 -> (SRAconst x [31]) 177 (Rsh16x64 x (Const64 [c])) && uint64(c) >= 16 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [16]) [31]) 178 (Rsh8x64 x (Const64 [c])) && uint64(c) >= 8 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [24]) [31]) 179 180 // constants 181 (Const8 [val]) -> (MOVWconst [val]) 182 (Const16 [val]) -> (MOVWconst [val]) 183 (Const32 [val]) -> (MOVWconst [val]) 184 (Const32F [val]) -> (MOVFconst [val]) 185 (Const64F [val]) -> (MOVDconst [val]) 186 (ConstNil) -> (MOVWconst [0]) 187 (ConstBool [b]) -> (MOVWconst [b]) 188 189 // truncations 190 // Because we ignore high parts of registers, truncates are just copies. 191 (Trunc16to8 x) -> x 192 (Trunc32to8 x) -> x 193 (Trunc32to16 x) -> x 194 195 // Zero-/Sign-extensions 196 (ZeroExt8to16 x) -> (MOVBUreg x) 197 (ZeroExt8to32 x) -> (MOVBUreg x) 198 (ZeroExt16to32 x) -> (MOVHUreg x) 199 200 (SignExt8to16 x) -> (MOVBreg x) 201 (SignExt8to32 x) -> (MOVBreg x) 202 (SignExt16to32 x) -> (MOVHreg x) 203 204 (Signmask x) -> (SRAconst x [31]) 205 (Zeromask x) -> (SRAconst (RSBshiftRL <config.fe.TypeInt32()> x x [1]) [31]) // sign bit of uint32(x)>>1 - x 206 (Slicemask <t> x) -> (SRAconst (RSBconst <t> [0] x) [31]) 207 208 // float <-> int conversion 209 (Cvt32to32F x) -> (MOVWF x) 210 (Cvt32to64F x) -> (MOVWD x) 211 (Cvt32Uto32F x) -> (MOVWUF x) 212 (Cvt32Uto64F x) -> (MOVWUD x) 213 (Cvt32Fto32 x) -> (MOVFW x) 214 (Cvt64Fto32 x) -> (MOVDW x) 215 (Cvt32Fto32U x) -> (MOVFWU x) 216 (Cvt64Fto32U x) -> (MOVDWU x) 217 (Cvt32Fto64F x) -> (MOVFD x) 218 (Cvt64Fto32F x) -> (MOVDF x) 219 220 // comparisons 221 (Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 222 (Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 223 (Eq32 x y) -> (Equal (CMP x y)) 224 (EqPtr x y) -> (Equal (CMP x y)) 225 (Eq32F x y) -> (Equal (CMPF x y)) 226 (Eq64F x y) -> (Equal (CMPD x y)) 227 228 (Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 229 (Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 230 (Neq32 x y) -> (NotEqual (CMP x y)) 231 (NeqPtr x y) -> (NotEqual (CMP x y)) 232 (Neq32F x y) -> (NotEqual (CMPF x y)) 233 (Neq64F x y) -> (NotEqual (CMPD x y)) 234 235 (Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 236 (Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 237 (Less32 x y) -> (LessThan (CMP x y)) 238 (Less32F x y) -> (GreaterThan (CMPF y x)) // reverse operands to work around NaN 239 (Less64F x y) -> (GreaterThan (CMPD y x)) // reverse operands to work around NaN 240 241 (Less8U x y) -> (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 242 (Less16U x y) -> (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 243 (Less32U x y) -> (LessThanU (CMP x y)) 244 245 (Leq8 x y) -> (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 246 (Leq16 x y) -> (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 247 (Leq32 x y) -> (LessEqual (CMP x y)) 248 (Leq32F x y) -> (GreaterEqual (CMPF y x)) // reverse operands to work around NaN 249 (Leq64F x y) -> (GreaterEqual (CMPD y x)) // reverse operands to work around NaN 250 251 (Leq8U x y) -> (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 252 (Leq16U x y) -> (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 253 (Leq32U x y) -> (LessEqualU (CMP x y)) 254 255 (Greater8 x y) -> (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 256 (Greater16 x y) -> (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 257 (Greater32 x y) -> (GreaterThan (CMP x y)) 258 (Greater32F x y) -> (GreaterThan (CMPF x y)) 259 (Greater64F x y) -> (GreaterThan (CMPD x y)) 260 261 (Greater8U x y) -> (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 262 (Greater16U x y) -> (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 263 (Greater32U x y) -> (GreaterThanU (CMP x y)) 264 265 (Geq8 x y) -> (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 266 (Geq16 x y) -> (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 267 (Geq32 x y) -> (GreaterEqual (CMP x y)) 268 (Geq32F x y) -> (GreaterEqual (CMPF x y)) 269 (Geq64F x y) -> (GreaterEqual (CMPD x y)) 270 271 (Geq8U x y) -> (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 272 (Geq16U x y) -> (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 273 (Geq32U x y) -> (GreaterEqualU (CMP x y)) 274 275 (OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr) 276 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 277 278 (Addr {sym} base) -> (MOVWaddr {sym} base) 279 280 // loads 281 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 282 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 283 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 284 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 285 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 286 (Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem) 287 (Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem) 288 (Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem) 289 290 // stores 291 (Store [1] ptr val mem) -> (MOVBstore ptr val mem) 292 (Store [2] ptr val mem) -> (MOVHstore ptr val mem) 293 (Store [4] ptr val mem) && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 294 (Store [4] ptr val mem) && is32BitFloat(val.Type) -> (MOVFstore ptr val mem) 295 (Store [8] ptr val mem) && is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 296 297 // zero instructions 298 (Zero [s] _ mem) && SizeAndAlign(s).Size() == 0 -> mem 299 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore ptr (MOVWconst [0]) mem) 300 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 -> 301 (MOVHstore ptr (MOVWconst [0]) mem) 302 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 -> 303 (MOVBstore [1] ptr (MOVWconst [0]) 304 (MOVBstore [0] ptr (MOVWconst [0]) mem)) 305 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 -> 306 (MOVWstore ptr (MOVWconst [0]) mem) 307 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 -> 308 (MOVHstore [2] ptr (MOVWconst [0]) 309 (MOVHstore [0] ptr (MOVWconst [0]) mem)) 310 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 -> 311 (MOVBstore [3] ptr (MOVWconst [0]) 312 (MOVBstore [2] ptr (MOVWconst [0]) 313 (MOVBstore [1] ptr (MOVWconst [0]) 314 (MOVBstore [0] ptr (MOVWconst [0]) mem)))) 315 316 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 3 -> 317 (MOVBstore [2] ptr (MOVWconst [0]) 318 (MOVBstore [1] ptr (MOVWconst [0]) 319 (MOVBstore [0] ptr (MOVWconst [0]) mem))) 320 321 // Medium zeroing uses a duff device 322 // 4 and 128 are magic constants, see runtime/mkduff.go 323 (Zero [s] ptr mem) 324 && SizeAndAlign(s).Size()%4 == 0 && SizeAndAlign(s).Size() > 4 && SizeAndAlign(s).Size() <= 512 325 && SizeAndAlign(s).Align()%4 == 0 && !config.noDuffDevice -> 326 (DUFFZERO [4 * (128 - int64(SizeAndAlign(s).Size()/4))] ptr (MOVWconst [0]) mem) 327 328 // Large zeroing uses a loop 329 (Zero [s] ptr mem) 330 && (SizeAndAlign(s).Size() > 512 || config.noDuffDevice) || SizeAndAlign(s).Align()%4 != 0 -> 331 (LoweredZero [SizeAndAlign(s).Align()] 332 ptr 333 (ADDconst <ptr.Type> ptr [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 334 (MOVWconst [0]) 335 mem) 336 337 // moves 338 (Move [s] _ _ mem) && SizeAndAlign(s).Size() == 0 -> mem 339 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore dst (MOVBUload src mem) mem) 340 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 -> 341 (MOVHstore dst (MOVHUload src mem) mem) 342 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 -> 343 (MOVBstore [1] dst (MOVBUload [1] src mem) 344 (MOVBstore dst (MOVBUload src mem) mem)) 345 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 -> 346 (MOVWstore dst (MOVWload src mem) mem) 347 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 -> 348 (MOVHstore [2] dst (MOVHUload [2] src mem) 349 (MOVHstore dst (MOVHUload src mem) mem)) 350 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 -> 351 (MOVBstore [3] dst (MOVBUload [3] src mem) 352 (MOVBstore [2] dst (MOVBUload [2] src mem) 353 (MOVBstore [1] dst (MOVBUload [1] src mem) 354 (MOVBstore dst (MOVBUload src mem) mem)))) 355 356 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 3 -> 357 (MOVBstore [2] dst (MOVBUload [2] src mem) 358 (MOVBstore [1] dst (MOVBUload [1] src mem) 359 (MOVBstore dst (MOVBUload src mem) mem))) 360 361 // Medium move uses a duff device 362 // 8 and 128 are magic constants, see runtime/mkduff.go 363 (Move [s] dst src mem) 364 && SizeAndAlign(s).Size()%4 == 0 && SizeAndAlign(s).Size() > 4 && SizeAndAlign(s).Size() <= 512 365 && SizeAndAlign(s).Align()%4 == 0 && !config.noDuffDevice -> 366 (DUFFCOPY [8 * (128 - int64(SizeAndAlign(s).Size()/4))] dst src mem) 367 368 // Large move uses a loop 369 (Move [s] dst src mem) 370 && (SizeAndAlign(s).Size() > 512 || config.noDuffDevice) || SizeAndAlign(s).Align()%4 != 0 -> 371 (LoweredMove [SizeAndAlign(s).Align()] 372 dst 373 src 374 (ADDconst <src.Type> src [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 375 mem) 376 377 // calls 378 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 379 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 380 (DeferCall [argwid] mem) -> (CALLdefer [argwid] mem) 381 (GoCall [argwid] mem) -> (CALLgo [argwid] mem) 382 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 383 384 // checks 385 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 386 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 387 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 388 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 389 390 // pseudo-ops 391 (GetClosurePtr) -> (LoweredGetClosurePtr) 392 (Convert x mem) -> (MOVWconvert x mem) 393 394 // Absorb pseudo-ops into blocks. 395 (If (Equal cc) yes no) -> (EQ cc yes no) 396 (If (NotEqual cc) yes no) -> (NE cc yes no) 397 (If (LessThan cc) yes no) -> (LT cc yes no) 398 (If (LessThanU cc) yes no) -> (ULT cc yes no) 399 (If (LessEqual cc) yes no) -> (LE cc yes no) 400 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 401 (If (GreaterThan cc) yes no) -> (GT cc yes no) 402 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 403 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 404 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 405 406 (If cond yes no) -> (NE (CMPconst [0] cond) yes no) 407 408 // Absorb boolean tests into block 409 (NE (CMPconst [0] (Equal cc)) yes no) -> (EQ cc yes no) 410 (NE (CMPconst [0] (NotEqual cc)) yes no) -> (NE cc yes no) 411 (NE (CMPconst [0] (LessThan cc)) yes no) -> (LT cc yes no) 412 (NE (CMPconst [0] (LessThanU cc)) yes no) -> (ULT cc yes no) 413 (NE (CMPconst [0] (LessEqual cc)) yes no) -> (LE cc yes no) 414 (NE (CMPconst [0] (LessEqualU cc)) yes no) -> (ULE cc yes no) 415 (NE (CMPconst [0] (GreaterThan cc)) yes no) -> (GT cc yes no) 416 (NE (CMPconst [0] (GreaterThanU cc)) yes no) -> (UGT cc yes no) 417 (NE (CMPconst [0] (GreaterEqual cc)) yes no) -> (GE cc yes no) 418 (NE (CMPconst [0] (GreaterEqualU cc)) yes no) -> (UGE cc yes no) 419 420 // Optimizations 421 422 // fold offset into address 423 (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off1+off2] {sym} ptr) 424 425 // fold address into load/store 426 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBload [off1+off2] {sym} ptr mem) 427 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBUload [off1+off2] {sym} ptr mem) 428 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHload [off1+off2] {sym} ptr mem) 429 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHUload [off1+off2] {sym} ptr mem) 430 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVWload [off1+off2] {sym} ptr mem) 431 (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVFload [off1+off2] {sym} ptr mem) 432 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVDload [off1+off2] {sym} ptr mem) 433 434 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVBstore [off1+off2] {sym} ptr val mem) 435 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVHstore [off1+off2] {sym} ptr val mem) 436 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVWstore [off1+off2] {sym} ptr val mem) 437 (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVFstore [off1+off2] {sym} ptr val mem) 438 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVDstore [off1+off2] {sym} ptr val mem) 439 440 (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 441 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 442 (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 443 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 444 (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 445 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 446 (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 447 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 448 (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 449 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 450 (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 451 (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 452 (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 453 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 454 455 (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 456 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 457 (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 458 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 459 (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 460 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 461 (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 462 (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 463 (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 464 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 465 466 // replace load from same location as preceding store with copy 467 (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type) -> x 468 (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type) -> x 469 (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type) -> x 470 (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type) -> x 471 (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 472 (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 473 (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 474 475 (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> x 476 (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 477 (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 478 (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 479 480 // fold constant into arithmatic ops 481 (ADD (MOVWconst [c]) x) -> (ADDconst [c] x) 482 (ADD x (MOVWconst [c])) -> (ADDconst [c] x) 483 (SUB (MOVWconst [c]) x) -> (RSBconst [c] x) 484 (SUB x (MOVWconst [c])) -> (SUBconst [c] x) 485 (RSB (MOVWconst [c]) x) -> (SUBconst [c] x) 486 (RSB x (MOVWconst [c])) -> (RSBconst [c] x) 487 488 (ADDS (MOVWconst [c]) x) -> (ADDSconst [c] x) 489 (ADDS x (MOVWconst [c])) -> (ADDSconst [c] x) 490 (SUBS (MOVWconst [c]) x) -> (RSBSconst [c] x) 491 (SUBS x (MOVWconst [c])) -> (SUBSconst [c] x) 492 493 (ADC (MOVWconst [c]) x flags) -> (ADCconst [c] x flags) 494 (ADC x (MOVWconst [c]) flags) -> (ADCconst [c] x flags) 495 (SBC (MOVWconst [c]) x flags) -> (RSCconst [c] x flags) 496 (SBC x (MOVWconst [c]) flags) -> (SBCconst [c] x flags) 497 498 (AND (MOVWconst [c]) x) -> (ANDconst [c] x) 499 (AND x (MOVWconst [c])) -> (ANDconst [c] x) 500 (OR (MOVWconst [c]) x) -> (ORconst [c] x) 501 (OR x (MOVWconst [c])) -> (ORconst [c] x) 502 (XOR (MOVWconst [c]) x) -> (XORconst [c] x) 503 (XOR x (MOVWconst [c])) -> (XORconst [c] x) 504 (BIC x (MOVWconst [c])) -> (BICconst [c] x) 505 506 (SLL x (MOVWconst [c])) -> (SLLconst x [c&31]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=32) 507 (SRL x (MOVWconst [c])) -> (SRLconst x [c&31]) 508 (SRA x (MOVWconst [c])) -> (SRAconst x [c&31]) 509 510 (CMP x (MOVWconst [c])) -> (CMPconst [c] x) 511 (CMP (MOVWconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 512 513 // don't extend after proper load 514 // MOVWreg instruction is not emitted if src and dst registers are same, but it ensures the type. 515 (MOVBreg x:(MOVBload _ _)) -> (MOVWreg x) 516 (MOVBUreg x:(MOVBUload _ _)) -> (MOVWreg x) 517 (MOVHreg x:(MOVBload _ _)) -> (MOVWreg x) 518 (MOVHreg x:(MOVBUload _ _)) -> (MOVWreg x) 519 (MOVHreg x:(MOVHload _ _)) -> (MOVWreg x) 520 (MOVHUreg x:(MOVBUload _ _)) -> (MOVWreg x) 521 (MOVHUreg x:(MOVHUload _ _)) -> (MOVWreg x) 522 523 // fold extensions and ANDs together 524 (MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&0xff] x) 525 (MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&0xffff] x) 526 (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 -> (ANDconst [c&0x7f] x) 527 (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 -> (ANDconst [c&0x7fff] x) 528 529 // fold double extensions 530 (MOVBreg x:(MOVBreg _)) -> (MOVWreg x) 531 (MOVBUreg x:(MOVBUreg _)) -> (MOVWreg x) 532 (MOVHreg x:(MOVBreg _)) -> (MOVWreg x) 533 (MOVHreg x:(MOVBUreg _)) -> (MOVWreg x) 534 (MOVHreg x:(MOVHreg _)) -> (MOVWreg x) 535 (MOVHUreg x:(MOVBUreg _)) -> (MOVWreg x) 536 (MOVHUreg x:(MOVHUreg _)) -> (MOVWreg x) 537 538 // don't extend before store 539 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 540 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 541 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 542 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 543 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 544 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 545 546 // if a register move has only 1 use, just use the same register without emitting instruction 547 // MOVWnop doesn't emit instruction, only for ensuring the type. 548 (MOVWreg x) && x.Uses == 1 -> (MOVWnop x) 549 550 // mul by constant 551 (MUL x (MOVWconst [c])) && int32(c) == -1 -> (RSBconst [0] x) 552 (MUL _ (MOVWconst [0])) -> (MOVWconst [0]) 553 (MUL x (MOVWconst [1])) -> x 554 (MUL x (MOVWconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 555 (MUL x (MOVWconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 556 (MUL x (MOVWconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 557 (MUL x (MOVWconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 558 (MUL x (MOVWconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 559 (MUL x (MOVWconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 560 (MUL x (MOVWconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 561 562 (MUL (MOVWconst [c]) x) && int32(c) == -1 -> (RSBconst [0] x) 563 (MUL (MOVWconst [0]) _) -> (MOVWconst [0]) 564 (MUL (MOVWconst [1]) x) -> x 565 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 566 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 567 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 568 (MUL (MOVWconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 569 (MUL (MOVWconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 570 (MUL (MOVWconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 571 (MUL (MOVWconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 572 573 (MULA x (MOVWconst [c]) a) && int32(c) == -1 -> (SUB a x) 574 (MULA _ (MOVWconst [0]) a) -> a 575 (MULA x (MOVWconst [1]) a) -> (ADD x a) 576 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 577 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 578 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 579 (MULA x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 580 (MULA x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 581 (MULA x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 582 (MULA x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 583 584 (MULA (MOVWconst [c]) x a) && int32(c) == -1 -> (SUB a x) 585 (MULA (MOVWconst [0]) _ a) -> a 586 (MULA (MOVWconst [1]) x a) -> (ADD x a) 587 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 588 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 589 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 590 (MULA (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 591 (MULA (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 592 (MULA (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 593 (MULA (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 594 595 // div by constant 596 (Select0 (UDIVrtcall x (MOVWconst [1]))) -> x 597 (Select1 (UDIVrtcall _ (MOVWconst [1]))) -> (MOVWconst [0]) 598 (Select0 (UDIVrtcall x (MOVWconst [c]))) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 599 (Select1 (UDIVrtcall x (MOVWconst [c]))) && isPowerOfTwo(c) -> (ANDconst [c-1] x) 600 601 // constant comparisons 602 (CMPconst (MOVWconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 603 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 604 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 605 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 606 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 607 608 // other known comparisons 609 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 610 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 611 (CMPconst (ANDconst _ [m]) [n]) && 0 <= int32(m) && int32(m) < int32(n) -> (FlagLT_ULT) 612 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n) -> (FlagLT_ULT) 613 614 // absorb flag constants into branches 615 (EQ (FlagEQ) yes no) -> (First nil yes no) 616 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 617 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 618 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 619 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 620 621 (NE (FlagEQ) yes no) -> (First nil no yes) 622 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 623 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 624 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 625 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 626 627 (LT (FlagEQ) yes no) -> (First nil no yes) 628 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 629 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 630 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 631 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 632 633 (LE (FlagEQ) yes no) -> (First nil yes no) 634 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 635 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 636 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 637 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 638 639 (GT (FlagEQ) yes no) -> (First nil no yes) 640 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 641 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 642 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 643 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 644 645 (GE (FlagEQ) yes no) -> (First nil yes no) 646 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 647 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 648 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 649 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 650 651 (ULT (FlagEQ) yes no) -> (First nil no yes) 652 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 653 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 654 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 655 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 656 657 (ULE (FlagEQ) yes no) -> (First nil yes no) 658 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 659 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 660 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 661 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 662 663 (UGT (FlagEQ) yes no) -> (First nil no yes) 664 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 665 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 666 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 667 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 668 669 (UGE (FlagEQ) yes no) -> (First nil yes no) 670 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 671 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 672 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 673 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 674 675 // absorb InvertFlags into branches 676 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 677 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 678 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 679 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 680 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 681 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 682 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 683 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 684 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 685 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 686 687 // absorb flag constants into boolean values 688 (Equal (FlagEQ)) -> (MOVWconst [1]) 689 (Equal (FlagLT_ULT)) -> (MOVWconst [0]) 690 (Equal (FlagLT_UGT)) -> (MOVWconst [0]) 691 (Equal (FlagGT_ULT)) -> (MOVWconst [0]) 692 (Equal (FlagGT_UGT)) -> (MOVWconst [0]) 693 694 (NotEqual (FlagEQ)) -> (MOVWconst [0]) 695 (NotEqual (FlagLT_ULT)) -> (MOVWconst [1]) 696 (NotEqual (FlagLT_UGT)) -> (MOVWconst [1]) 697 (NotEqual (FlagGT_ULT)) -> (MOVWconst [1]) 698 (NotEqual (FlagGT_UGT)) -> (MOVWconst [1]) 699 700 (LessThan (FlagEQ)) -> (MOVWconst [0]) 701 (LessThan (FlagLT_ULT)) -> (MOVWconst [1]) 702 (LessThan (FlagLT_UGT)) -> (MOVWconst [1]) 703 (LessThan (FlagGT_ULT)) -> (MOVWconst [0]) 704 (LessThan (FlagGT_UGT)) -> (MOVWconst [0]) 705 706 (LessThanU (FlagEQ)) -> (MOVWconst [0]) 707 (LessThanU (FlagLT_ULT)) -> (MOVWconst [1]) 708 (LessThanU (FlagLT_UGT)) -> (MOVWconst [0]) 709 (LessThanU (FlagGT_ULT)) -> (MOVWconst [1]) 710 (LessThanU (FlagGT_UGT)) -> (MOVWconst [0]) 711 712 (LessEqual (FlagEQ)) -> (MOVWconst [1]) 713 (LessEqual (FlagLT_ULT)) -> (MOVWconst [1]) 714 (LessEqual (FlagLT_UGT)) -> (MOVWconst [1]) 715 (LessEqual (FlagGT_ULT)) -> (MOVWconst [0]) 716 (LessEqual (FlagGT_UGT)) -> (MOVWconst [0]) 717 718 (LessEqualU (FlagEQ)) -> (MOVWconst [1]) 719 (LessEqualU (FlagLT_ULT)) -> (MOVWconst [1]) 720 (LessEqualU (FlagLT_UGT)) -> (MOVWconst [0]) 721 (LessEqualU (FlagGT_ULT)) -> (MOVWconst [1]) 722 (LessEqualU (FlagGT_UGT)) -> (MOVWconst [0]) 723 724 (GreaterThan (FlagEQ)) -> (MOVWconst [0]) 725 (GreaterThan (FlagLT_ULT)) -> (MOVWconst [0]) 726 (GreaterThan (FlagLT_UGT)) -> (MOVWconst [0]) 727 (GreaterThan (FlagGT_ULT)) -> (MOVWconst [1]) 728 (GreaterThan (FlagGT_UGT)) -> (MOVWconst [1]) 729 730 (GreaterThanU (FlagEQ)) -> (MOVWconst [0]) 731 (GreaterThanU (FlagLT_ULT)) -> (MOVWconst [0]) 732 (GreaterThanU (FlagLT_UGT)) -> (MOVWconst [1]) 733 (GreaterThanU (FlagGT_ULT)) -> (MOVWconst [0]) 734 (GreaterThanU (FlagGT_UGT)) -> (MOVWconst [1]) 735 736 (GreaterEqual (FlagEQ)) -> (MOVWconst [1]) 737 (GreaterEqual (FlagLT_ULT)) -> (MOVWconst [0]) 738 (GreaterEqual (FlagLT_UGT)) -> (MOVWconst [0]) 739 (GreaterEqual (FlagGT_ULT)) -> (MOVWconst [1]) 740 (GreaterEqual (FlagGT_UGT)) -> (MOVWconst [1]) 741 742 (GreaterEqualU (FlagEQ)) -> (MOVWconst [1]) 743 (GreaterEqualU (FlagLT_ULT)) -> (MOVWconst [0]) 744 (GreaterEqualU (FlagLT_UGT)) -> (MOVWconst [1]) 745 (GreaterEqualU (FlagGT_ULT)) -> (MOVWconst [0]) 746 (GreaterEqualU (FlagGT_UGT)) -> (MOVWconst [1]) 747 748 // absorb InvertFlags into boolean values 749 (Equal (InvertFlags x)) -> (Equal x) 750 (NotEqual (InvertFlags x)) -> (NotEqual x) 751 (LessThan (InvertFlags x)) -> (GreaterThan x) 752 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 753 (GreaterThan (InvertFlags x)) -> (LessThan x) 754 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 755 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 756 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 757 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 758 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 759 760 // absorb flag constants into conditional instructions 761 (CMOVWLSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 762 (CMOVWLSconst _ (FlagLT_ULT) [c]) -> (MOVWconst [c]) 763 (CMOVWLSconst x (FlagLT_UGT)) -> x 764 (CMOVWLSconst _ (FlagGT_ULT) [c]) -> (MOVWconst [c]) 765 (CMOVWLSconst x (FlagGT_UGT)) -> x 766 767 (CMOVWHSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 768 (CMOVWHSconst x (FlagLT_ULT)) -> x 769 (CMOVWHSconst _ (FlagLT_UGT) [c]) -> (MOVWconst [c]) 770 (CMOVWHSconst x (FlagGT_ULT)) -> x 771 (CMOVWHSconst _ (FlagGT_UGT) [c]) -> (MOVWconst [c]) 772 773 (CMOVWLSconst x (InvertFlags flags) [c]) -> (CMOVWHSconst x flags [c]) 774 (CMOVWHSconst x (InvertFlags flags) [c]) -> (CMOVWLSconst x flags [c]) 775 776 (SRAcond x _ (FlagEQ)) -> (SRAconst x [31]) 777 (SRAcond x y (FlagLT_ULT)) -> (SRA x y) 778 (SRAcond x _ (FlagLT_UGT)) -> (SRAconst x [31]) 779 (SRAcond x y (FlagGT_ULT)) -> (SRA x y) 780 (SRAcond x _ (FlagGT_UGT)) -> (SRAconst x [31]) 781 782 // remove redundant *const ops 783 (ADDconst [0] x) -> x 784 (SUBconst [0] x) -> x 785 (ANDconst [0] _) -> (MOVWconst [0]) 786 (ANDconst [c] x) && int32(c)==-1 -> x 787 (ORconst [0] x) -> x 788 (ORconst [c] _) && int32(c)==-1 -> (MOVWconst [-1]) 789 (XORconst [0] x) -> x 790 (BICconst [0] x) -> x 791 (BICconst [c] _) && int32(c)==-1 -> (MOVWconst [0]) 792 793 // generic constant folding 794 (ADDconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c+d))]) 795 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(c+d))] x) 796 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 797 (ADDconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 798 (ADCconst [c] (ADDconst [d] x) flags) -> (ADCconst [int64(int32(c+d))] x flags) 799 (ADCconst [c] (SUBconst [d] x) flags) -> (ADCconst [int64(int32(c-d))] x flags) 800 (SUBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d-c))]) 801 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(-c-d))] x) 802 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(-c+d))] x) 803 (SUBconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(-c+d))] x) 804 (SBCconst [c] (ADDconst [d] x) flags) -> (SBCconst [int64(int32(c-d))] x flags) 805 (SBCconst [c] (SUBconst [d] x) flags) -> (SBCconst [int64(int32(c+d))] x flags) 806 (RSBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c-d))]) 807 (RSBconst [c] (RSBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 808 (RSBconst [c] (ADDconst [d] x)) -> (RSBconst [int64(int32(c-d))] x) 809 (RSBconst [c] (SUBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 810 (RSCconst [c] (ADDconst [d] x) flags) -> (RSCconst [int64(int32(c-d))] x flags) 811 (RSCconst [c] (SUBconst [d] x) flags) -> (RSCconst [int64(int32(c+d))] x flags) 812 (SLLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<uint64(c))]) 813 (SRLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)>>uint64(c))]) 814 (SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))]) 815 (MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))]) 816 (MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a) 817 (Select0 (UDIVrtcall (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)/uint32(d))]) 818 (Select1 (UDIVrtcall (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)%uint32(d))]) 819 (ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d]) 820 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 821 (ORconst [c] (MOVWconst [d])) -> (MOVWconst [c|d]) 822 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 823 (XORconst [c] (MOVWconst [d])) -> (MOVWconst [c^d]) 824 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 825 (BICconst [c] (MOVWconst [d])) -> (MOVWconst [d&^c]) 826 (MVN (MOVWconst [c])) -> (MOVWconst [^c]) 827 (MOVBreg (MOVWconst [c])) -> (MOVWconst [int64(int8(c))]) 828 (MOVBUreg (MOVWconst [c])) -> (MOVWconst [int64(uint8(c))]) 829 (MOVHreg (MOVWconst [c])) -> (MOVWconst [int64(int16(c))]) 830 (MOVHUreg (MOVWconst [c])) -> (MOVWconst [int64(uint16(c))]) 831 (MOVWreg (MOVWconst [c])) -> (MOVWconst [c]) 832 833 // absorb shifts into ops 834 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 835 (ADD (SLLconst [c] y) x) -> (ADDshiftLL x y [c]) 836 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 837 (ADD (SRLconst [c] y) x) -> (ADDshiftRL x y [c]) 838 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 839 (ADD (SRAconst [c] y) x) -> (ADDshiftRA x y [c]) 840 (ADD x (SLL y z)) -> (ADDshiftLLreg x y z) 841 (ADD (SLL y z) x) -> (ADDshiftLLreg x y z) 842 (ADD x (SRL y z)) -> (ADDshiftRLreg x y z) 843 (ADD (SRL y z) x) -> (ADDshiftRLreg x y z) 844 (ADD x (SRA y z)) -> (ADDshiftRAreg x y z) 845 (ADD (SRA y z) x) -> (ADDshiftRAreg x y z) 846 (ADC x (SLLconst [c] y) flags) -> (ADCshiftLL x y [c] flags) 847 (ADC (SLLconst [c] y) x flags) -> (ADCshiftLL x y [c] flags) 848 (ADC x (SRLconst [c] y) flags) -> (ADCshiftRL x y [c] flags) 849 (ADC (SRLconst [c] y) x flags) -> (ADCshiftRL x y [c] flags) 850 (ADC x (SRAconst [c] y) flags) -> (ADCshiftRA x y [c] flags) 851 (ADC (SRAconst [c] y) x flags) -> (ADCshiftRA x y [c] flags) 852 (ADC x (SLL y z) flags) -> (ADCshiftLLreg x y z flags) 853 (ADC (SLL y z) x flags) -> (ADCshiftLLreg x y z flags) 854 (ADC x (SRL y z) flags) -> (ADCshiftRLreg x y z flags) 855 (ADC (SRL y z) x flags) -> (ADCshiftRLreg x y z flags) 856 (ADC x (SRA y z) flags) -> (ADCshiftRAreg x y z flags) 857 (ADC (SRA y z) x flags) -> (ADCshiftRAreg x y z flags) 858 (ADDS x (SLLconst [c] y)) -> (ADDSshiftLL x y [c]) 859 (ADDS (SLLconst [c] y) x) -> (ADDSshiftLL x y [c]) 860 (ADDS x (SRLconst [c] y)) -> (ADDSshiftRL x y [c]) 861 (ADDS (SRLconst [c] y) x) -> (ADDSshiftRL x y [c]) 862 (ADDS x (SRAconst [c] y)) -> (ADDSshiftRA x y [c]) 863 (ADDS (SRAconst [c] y) x) -> (ADDSshiftRA x y [c]) 864 (ADDS x (SLL y z)) -> (ADDSshiftLLreg x y z) 865 (ADDS (SLL y z) x) -> (ADDSshiftLLreg x y z) 866 (ADDS x (SRL y z)) -> (ADDSshiftRLreg x y z) 867 (ADDS (SRL y z) x) -> (ADDSshiftRLreg x y z) 868 (ADDS x (SRA y z)) -> (ADDSshiftRAreg x y z) 869 (ADDS (SRA y z) x) -> (ADDSshiftRAreg x y z) 870 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 871 (SUB (SLLconst [c] y) x) -> (RSBshiftLL x y [c]) 872 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 873 (SUB (SRLconst [c] y) x) -> (RSBshiftRL x y [c]) 874 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 875 (SUB (SRAconst [c] y) x) -> (RSBshiftRA x y [c]) 876 (SUB x (SLL y z)) -> (SUBshiftLLreg x y z) 877 (SUB (SLL y z) x) -> (RSBshiftLLreg x y z) 878 (SUB x (SRL y z)) -> (SUBshiftRLreg x y z) 879 (SUB (SRL y z) x) -> (RSBshiftRLreg x y z) 880 (SUB x (SRA y z)) -> (SUBshiftRAreg x y z) 881 (SUB (SRA y z) x) -> (RSBshiftRAreg x y z) 882 (SBC x (SLLconst [c] y) flags) -> (SBCshiftLL x y [c] flags) 883 (SBC (SLLconst [c] y) x flags) -> (RSCshiftLL x y [c] flags) 884 (SBC x (SRLconst [c] y) flags) -> (SBCshiftRL x y [c] flags) 885 (SBC (SRLconst [c] y) x flags) -> (RSCshiftRL x y [c] flags) 886 (SBC x (SRAconst [c] y) flags) -> (SBCshiftRA x y [c] flags) 887 (SBC (SRAconst [c] y) x flags) -> (RSCshiftRA x y [c] flags) 888 (SBC x (SLL y z) flags) -> (SBCshiftLLreg x y z flags) 889 (SBC (SLL y z) x flags) -> (RSCshiftLLreg x y z flags) 890 (SBC x (SRL y z) flags) -> (SBCshiftRLreg x y z flags) 891 (SBC (SRL y z) x flags) -> (RSCshiftRLreg x y z flags) 892 (SBC x (SRA y z) flags) -> (SBCshiftRAreg x y z flags) 893 (SBC (SRA y z) x flags) -> (RSCshiftRAreg x y z flags) 894 (SUBS x (SLLconst [c] y)) -> (SUBSshiftLL x y [c]) 895 (SUBS (SLLconst [c] y) x) -> (RSBSshiftLL x y [c]) 896 (SUBS x (SRLconst [c] y)) -> (SUBSshiftRL x y [c]) 897 (SUBS (SRLconst [c] y) x) -> (RSBSshiftRL x y [c]) 898 (SUBS x (SRAconst [c] y)) -> (SUBSshiftRA x y [c]) 899 (SUBS (SRAconst [c] y) x) -> (RSBSshiftRA x y [c]) 900 (SUBS x (SLL y z)) -> (SUBSshiftLLreg x y z) 901 (SUBS (SLL y z) x) -> (RSBSshiftLLreg x y z) 902 (SUBS x (SRL y z)) -> (SUBSshiftRLreg x y z) 903 (SUBS (SRL y z) x) -> (RSBSshiftRLreg x y z) 904 (SUBS x (SRA y z)) -> (SUBSshiftRAreg x y z) 905 (SUBS (SRA y z) x) -> (RSBSshiftRAreg x y z) 906 (RSB x (SLLconst [c] y)) -> (RSBshiftLL x y [c]) 907 (RSB (SLLconst [c] y) x) -> (SUBshiftLL x y [c]) 908 (RSB x (SRLconst [c] y)) -> (RSBshiftRL x y [c]) 909 (RSB (SRLconst [c] y) x) -> (SUBshiftRL x y [c]) 910 (RSB x (SRAconst [c] y)) -> (RSBshiftRA x y [c]) 911 (RSB (SRAconst [c] y) x) -> (SUBshiftRA x y [c]) 912 (RSB x (SLL y z)) -> (RSBshiftLLreg x y z) 913 (RSB (SLL y z) x) -> (SUBshiftLLreg x y z) 914 (RSB x (SRL y z)) -> (RSBshiftRLreg x y z) 915 (RSB (SRL y z) x) -> (SUBshiftRLreg x y z) 916 (RSB x (SRA y z)) -> (RSBshiftRAreg x y z) 917 (RSB (SRA y z) x) -> (SUBshiftRAreg x y z) 918 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 919 (AND (SLLconst [c] y) x) -> (ANDshiftLL x y [c]) 920 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 921 (AND (SRLconst [c] y) x) -> (ANDshiftRL x y [c]) 922 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 923 (AND (SRAconst [c] y) x) -> (ANDshiftRA x y [c]) 924 (AND x (SLL y z)) -> (ANDshiftLLreg x y z) 925 (AND (SLL y z) x) -> (ANDshiftLLreg x y z) 926 (AND x (SRL y z)) -> (ANDshiftRLreg x y z) 927 (AND (SRL y z) x) -> (ANDshiftRLreg x y z) 928 (AND x (SRA y z)) -> (ANDshiftRAreg x y z) 929 (AND (SRA y z) x) -> (ANDshiftRAreg x y z) 930 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 931 (OR (SLLconst [c] y) x) -> (ORshiftLL x y [c]) 932 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 933 (OR (SRLconst [c] y) x) -> (ORshiftRL x y [c]) 934 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 935 (OR (SRAconst [c] y) x) -> (ORshiftRA x y [c]) 936 (OR x (SLL y z)) -> (ORshiftLLreg x y z) 937 (OR (SLL y z) x) -> (ORshiftLLreg x y z) 938 (OR x (SRL y z)) -> (ORshiftRLreg x y z) 939 (OR (SRL y z) x) -> (ORshiftRLreg x y z) 940 (OR x (SRA y z)) -> (ORshiftRAreg x y z) 941 (OR (SRA y z) x) -> (ORshiftRAreg x y z) 942 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 943 (XOR (SLLconst [c] y) x) -> (XORshiftLL x y [c]) 944 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 945 (XOR (SRLconst [c] y) x) -> (XORshiftRL x y [c]) 946 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 947 (XOR (SRAconst [c] y) x) -> (XORshiftRA x y [c]) 948 (XOR x (SRRconst [c] y)) -> (XORshiftRR x y [c]) 949 (XOR (SRRconst [c] y) x) -> (XORshiftRR x y [c]) 950 (XOR x (SLL y z)) -> (XORshiftLLreg x y z) 951 (XOR (SLL y z) x) -> (XORshiftLLreg x y z) 952 (XOR x (SRL y z)) -> (XORshiftRLreg x y z) 953 (XOR (SRL y z) x) -> (XORshiftRLreg x y z) 954 (XOR x (SRA y z)) -> (XORshiftRAreg x y z) 955 (XOR (SRA y z) x) -> (XORshiftRAreg x y z) 956 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 957 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 958 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 959 (BIC x (SLL y z)) -> (BICshiftLLreg x y z) 960 (BIC x (SRL y z)) -> (BICshiftRLreg x y z) 961 (BIC x (SRA y z)) -> (BICshiftRAreg x y z) 962 (MVN (SLLconst [c] x)) -> (MVNshiftLL x [c]) 963 (MVN (SRLconst [c] x)) -> (MVNshiftRL x [c]) 964 (MVN (SRAconst [c] x)) -> (MVNshiftRA x [c]) 965 (MVN (SLL x y)) -> (MVNshiftLLreg x y) 966 (MVN (SRL x y)) -> (MVNshiftRLreg x y) 967 (MVN (SRA x y)) -> (MVNshiftRAreg x y) 968 969 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 970 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 971 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 972 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 973 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 974 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 975 (CMP x (SLL y z)) -> (CMPshiftLLreg x y z) 976 (CMP (SLL y z) x) -> (InvertFlags (CMPshiftLLreg x y z)) 977 (CMP x (SRL y z)) -> (CMPshiftRLreg x y z) 978 (CMP (SRL y z) x) -> (InvertFlags (CMPshiftRLreg x y z)) 979 (CMP x (SRA y z)) -> (CMPshiftRAreg x y z) 980 (CMP (SRA y z) x) -> (InvertFlags (CMPshiftRAreg x y z)) 981 982 // prefer *const ops to *shift ops 983 (ADDshiftLL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 984 (ADDshiftRL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 985 (ADDshiftRA (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 986 (ADCshiftLL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SLLconst <x.Type> x [d]) flags) 987 (ADCshiftRL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRLconst <x.Type> x [d]) flags) 988 (ADCshiftRA (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRAconst <x.Type> x [d]) flags) 989 (ADDSshiftLL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SLLconst <x.Type> x [d])) 990 (ADDSshiftRL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRLconst <x.Type> x [d])) 991 (ADDSshiftRA (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRAconst <x.Type> x [d])) 992 (SUBshiftLL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SLLconst <x.Type> x [d])) 993 (SUBshiftRL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRLconst <x.Type> x [d])) 994 (SUBshiftRA (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRAconst <x.Type> x [d])) 995 (SBCshiftLL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SLLconst <x.Type> x [d]) flags) 996 (SBCshiftRL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRLconst <x.Type> x [d]) flags) 997 (SBCshiftRA (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRAconst <x.Type> x [d]) flags) 998 (SUBSshiftLL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SLLconst <x.Type> x [d])) 999 (SUBSshiftRL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRLconst <x.Type> x [d])) 1000 (SUBSshiftRA (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRAconst <x.Type> x [d])) 1001 (RSBshiftLL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SLLconst <x.Type> x [d])) 1002 (RSBshiftRL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRLconst <x.Type> x [d])) 1003 (RSBshiftRA (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRAconst <x.Type> x [d])) 1004 (RSCshiftLL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SLLconst <x.Type> x [d]) flags) 1005 (RSCshiftRL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRLconst <x.Type> x [d]) flags) 1006 (RSCshiftRA (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRAconst <x.Type> x [d]) flags) 1007 (RSBSshiftLL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SLLconst <x.Type> x [d])) 1008 (RSBSshiftRL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRLconst <x.Type> x [d])) 1009 (RSBSshiftRA (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRAconst <x.Type> x [d])) 1010 (ANDshiftLL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 1011 (ANDshiftRL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 1012 (ANDshiftRA (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 1013 (ORshiftLL (MOVWconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 1014 (ORshiftRL (MOVWconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 1015 (ORshiftRA (MOVWconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 1016 (XORshiftLL (MOVWconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 1017 (XORshiftRL (MOVWconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 1018 (XORshiftRA (MOVWconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 1019 (XORshiftRR (MOVWconst [c]) x [d]) -> (XORconst [c] (SRRconst <x.Type> x [d])) 1020 (CMPshiftLL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 1021 (CMPshiftRL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 1022 (CMPshiftRA (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 1023 1024 (ADDshiftLLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SLL <x.Type> x y)) 1025 (ADDshiftRLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRL <x.Type> x y)) 1026 (ADDshiftRAreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRA <x.Type> x y)) 1027 (ADCshiftLLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SLL <x.Type> x y) flags) 1028 (ADCshiftRLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRL <x.Type> x y) flags) 1029 (ADCshiftRAreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRA <x.Type> x y) flags) 1030 (ADDSshiftLLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SLL <x.Type> x y)) 1031 (ADDSshiftRLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRL <x.Type> x y)) 1032 (ADDSshiftRAreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRA <x.Type> x y)) 1033 (SUBshiftLLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SLL <x.Type> x y)) 1034 (SUBshiftRLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRL <x.Type> x y)) 1035 (SUBshiftRAreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRA <x.Type> x y)) 1036 (SBCshiftLLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SLL <x.Type> x y) flags) 1037 (SBCshiftRLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRL <x.Type> x y) flags) 1038 (SBCshiftRAreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRA <x.Type> x y) flags) 1039 (SUBSshiftLLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SLL <x.Type> x y)) 1040 (SUBSshiftRLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRL <x.Type> x y)) 1041 (SUBSshiftRAreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRA <x.Type> x y)) 1042 (RSBshiftLLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SLL <x.Type> x y)) 1043 (RSBshiftRLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRL <x.Type> x y)) 1044 (RSBshiftRAreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRA <x.Type> x y)) 1045 (RSCshiftLLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SLL <x.Type> x y) flags) 1046 (RSCshiftRLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRL <x.Type> x y) flags) 1047 (RSCshiftRAreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRA <x.Type> x y) flags) 1048 (RSBSshiftLLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SLL <x.Type> x y)) 1049 (RSBSshiftRLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRL <x.Type> x y)) 1050 (RSBSshiftRAreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRA <x.Type> x y)) 1051 (ANDshiftLLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SLL <x.Type> x y)) 1052 (ANDshiftRLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRL <x.Type> x y)) 1053 (ANDshiftRAreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRA <x.Type> x y)) 1054 (ORshiftLLreg (MOVWconst [c]) x y) -> (ORconst [c] (SLL <x.Type> x y)) 1055 (ORshiftRLreg (MOVWconst [c]) x y) -> (ORconst [c] (SRL <x.Type> x y)) 1056 (ORshiftRAreg (MOVWconst [c]) x y) -> (ORconst [c] (SRA <x.Type> x y)) 1057 (XORshiftLLreg (MOVWconst [c]) x y) -> (XORconst [c] (SLL <x.Type> x y)) 1058 (XORshiftRLreg (MOVWconst [c]) x y) -> (XORconst [c] (SRL <x.Type> x y)) 1059 (XORshiftRAreg (MOVWconst [c]) x y) -> (XORconst [c] (SRA <x.Type> x y)) 1060 (CMPshiftLLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SLL <x.Type> x y))) 1061 (CMPshiftRLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRL <x.Type> x y))) 1062 (CMPshiftRAreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRA <x.Type> x y))) 1063 1064 // constant folding in *shift ops 1065 (ADDshiftLL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)<<uint64(d))]) 1066 (ADDshiftRL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)>>uint64(d))]) 1067 (ADDshiftRA x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(c)>>uint64(d))]) 1068 (ADCshiftLL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)<<uint64(d))] flags) 1069 (ADCshiftRL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)>>uint64(d))] flags) 1070 (ADCshiftRA x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(c)>>uint64(d))] flags) 1071 (ADDSshiftLL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)<<uint64(d))]) 1072 (ADDSshiftRL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)>>uint64(d))]) 1073 (ADDSshiftRA x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(c)>>uint64(d))]) 1074 (SUBshiftLL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)<<uint64(d))]) 1075 (SUBshiftRL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)>>uint64(d))]) 1076 (SUBshiftRA x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(c)>>uint64(d))]) 1077 (SBCshiftLL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)<<uint64(d))] flags) 1078 (SBCshiftRL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)>>uint64(d))] flags) 1079 (SBCshiftRA x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(c)>>uint64(d))] flags) 1080 (SUBSshiftLL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)<<uint64(d))]) 1081 (SUBSshiftRL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)>>uint64(d))]) 1082 (SUBSshiftRA x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(c)>>uint64(d))]) 1083 (RSBshiftLL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)<<uint64(d))]) 1084 (RSBshiftRL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)>>uint64(d))]) 1085 (RSBshiftRA x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(c)>>uint64(d))]) 1086 (RSCshiftLL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)<<uint64(d))] flags) 1087 (RSCshiftRL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)>>uint64(d))] flags) 1088 (RSCshiftRA x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(c)>>uint64(d))] flags) 1089 (RSBSshiftLL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)<<uint64(d))]) 1090 (RSBSshiftRL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)>>uint64(d))]) 1091 (RSBSshiftRA x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(c)>>uint64(d))]) 1092 (ANDshiftLL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)<<uint64(d))]) 1093 (ANDshiftRL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)>>uint64(d))]) 1094 (ANDshiftRA x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(c)>>uint64(d))]) 1095 (ORshiftLL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)<<uint64(d))]) 1096 (ORshiftRL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)>>uint64(d))]) 1097 (ORshiftRA x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(c)>>uint64(d))]) 1098 (XORshiftLL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)<<uint64(d))]) 1099 (XORshiftRL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)>>uint64(d))]) 1100 (XORshiftRA x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(c)>>uint64(d))]) 1101 (XORshiftRR x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)>>uint64(d)|uint32(c)<<uint64(32-d))]) 1102 (BICshiftLL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)<<uint64(d))]) 1103 (BICshiftRL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)>>uint64(d))]) 1104 (BICshiftRA x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(c)>>uint64(d))]) 1105 (MVNshiftLL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)<<uint64(d))]) 1106 (MVNshiftRL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)>>uint64(d))]) 1107 (MVNshiftRA (MOVWconst [c]) [d]) -> (MOVWconst [^int64(int32(c)>>uint64(d))]) 1108 (CMPshiftLL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)<<uint64(d))]) 1109 (CMPshiftRL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)>>uint64(d))]) 1110 (CMPshiftRA x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(c)>>uint64(d))]) 1111 1112 (ADDshiftLLreg x y (MOVWconst [c])) -> (ADDshiftLL x y [c]) 1113 (ADDshiftRLreg x y (MOVWconst [c])) -> (ADDshiftRL x y [c]) 1114 (ADDshiftRAreg x y (MOVWconst [c])) -> (ADDshiftRA x y [c]) 1115 (ADCshiftLLreg x y (MOVWconst [c]) flags) -> (ADCshiftLL x y [c] flags) 1116 (ADCshiftRLreg x y (MOVWconst [c]) flags) -> (ADCshiftRL x y [c] flags) 1117 (ADCshiftRAreg x y (MOVWconst [c]) flags) -> (ADCshiftRA x y [c] flags) 1118 (ADDSshiftLLreg x y (MOVWconst [c])) -> (ADDSshiftLL x y [c]) 1119 (ADDSshiftRLreg x y (MOVWconst [c])) -> (ADDSshiftRL x y [c]) 1120 (ADDSshiftRAreg x y (MOVWconst [c])) -> (ADDSshiftRA x y [c]) 1121 (SUBshiftLLreg x y (MOVWconst [c])) -> (SUBshiftLL x y [c]) 1122 (SUBshiftRLreg x y (MOVWconst [c])) -> (SUBshiftRL x y [c]) 1123 (SUBshiftRAreg x y (MOVWconst [c])) -> (SUBshiftRA x y [c]) 1124 (SBCshiftLLreg x y (MOVWconst [c]) flags) -> (SBCshiftLL x y [c] flags) 1125 (SBCshiftRLreg x y (MOVWconst [c]) flags) -> (SBCshiftRL x y [c] flags) 1126 (SBCshiftRAreg x y (MOVWconst [c]) flags) -> (SBCshiftRA x y [c] flags) 1127 (SUBSshiftLLreg x y (MOVWconst [c])) -> (SUBSshiftLL x y [c]) 1128 (SUBSshiftRLreg x y (MOVWconst [c])) -> (SUBSshiftRL x y [c]) 1129 (SUBSshiftRAreg x y (MOVWconst [c])) -> (SUBSshiftRA x y [c]) 1130 (RSBshiftLLreg x y (MOVWconst [c])) -> (RSBshiftLL x y [c]) 1131 (RSBshiftRLreg x y (MOVWconst [c])) -> (RSBshiftRL x y [c]) 1132 (RSBshiftRAreg x y (MOVWconst [c])) -> (RSBshiftRA x y [c]) 1133 (RSCshiftLLreg x y (MOVWconst [c]) flags) -> (RSCshiftLL x y [c] flags) 1134 (RSCshiftRLreg x y (MOVWconst [c]) flags) -> (RSCshiftRL x y [c] flags) 1135 (RSCshiftRAreg x y (MOVWconst [c]) flags) -> (RSCshiftRA x y [c] flags) 1136 (RSBSshiftLLreg x y (MOVWconst [c])) -> (RSBSshiftLL x y [c]) 1137 (RSBSshiftRLreg x y (MOVWconst [c])) -> (RSBSshiftRL x y [c]) 1138 (RSBSshiftRAreg x y (MOVWconst [c])) -> (RSBSshiftRA x y [c]) 1139 (ANDshiftLLreg x y (MOVWconst [c])) -> (ANDshiftLL x y [c]) 1140 (ANDshiftRLreg x y (MOVWconst [c])) -> (ANDshiftRL x y [c]) 1141 (ANDshiftRAreg x y (MOVWconst [c])) -> (ANDshiftRA x y [c]) 1142 (ORshiftLLreg x y (MOVWconst [c])) -> (ORshiftLL x y [c]) 1143 (ORshiftRLreg x y (MOVWconst [c])) -> (ORshiftRL x y [c]) 1144 (ORshiftRAreg x y (MOVWconst [c])) -> (ORshiftRA x y [c]) 1145 (XORshiftLLreg x y (MOVWconst [c])) -> (XORshiftLL x y [c]) 1146 (XORshiftRLreg x y (MOVWconst [c])) -> (XORshiftRL x y [c]) 1147 (XORshiftRAreg x y (MOVWconst [c])) -> (XORshiftRA x y [c]) 1148 (BICshiftLLreg x y (MOVWconst [c])) -> (BICshiftLL x y [c]) 1149 (BICshiftRLreg x y (MOVWconst [c])) -> (BICshiftRL x y [c]) 1150 (BICshiftRAreg x y (MOVWconst [c])) -> (BICshiftRA x y [c]) 1151 (MVNshiftLLreg x (MOVWconst [c])) -> (MVNshiftLL x [c]) 1152 (MVNshiftRLreg x (MOVWconst [c])) -> (MVNshiftRL x [c]) 1153 (MVNshiftRAreg x (MOVWconst [c])) -> (MVNshiftRA x [c]) 1154 (CMPshiftLLreg x y (MOVWconst [c])) -> (CMPshiftLL x y [c]) 1155 (CMPshiftRLreg x y (MOVWconst [c])) -> (CMPshiftRL x y [c]) 1156 (CMPshiftRAreg x y (MOVWconst [c])) -> (CMPshiftRA x y [c]) 1157 1158 // Generate rotates 1159 (ADDshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1160 ( ORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1161 (XORshiftLL [c] (SRLconst x [32-c]) x) -> (SRRconst [32-c] x) 1162 (ADDshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1163 ( ORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1164 (XORshiftRL [c] (SLLconst x [32-c]) x) -> (SRRconst [ c] x) 1165 1166 // use indexed loads and stores 1167 (MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVWloadidx ptr idx mem) 1168 (MOVWstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVWstoreidx ptr idx val mem) 1169 (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftLL ptr idx [c] mem) 1170 (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRL ptr idx [c] mem) 1171 (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRA ptr idx [c] mem) 1172 (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftLL ptr idx [c] val mem) 1173 (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRL ptr idx [c] val mem) 1174 (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRA ptr idx [c] val mem) 1175 1176 // constant folding in indexed loads and stores 1177 (MOVWloadidx ptr (MOVWconst [c]) mem) -> (MOVWload [c] ptr mem) 1178 (MOVWloadidx (MOVWconst [c]) ptr mem) -> (MOVWload [c] ptr mem) 1179 1180 (MOVWstoreidx ptr (MOVWconst [c]) val mem) -> (MOVWstore [c] ptr val mem) 1181 (MOVWstoreidx (MOVWconst [c]) ptr val mem) -> (MOVWstore [c] ptr val mem) 1182 1183 (MOVWloadidx ptr (SLLconst idx [c]) mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1184 (MOVWloadidx (SLLconst idx [c]) ptr mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1185 (MOVWloadidx ptr (SRLconst idx [c]) mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1186 (MOVWloadidx (SRLconst idx [c]) ptr mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1187 (MOVWloadidx ptr (SRAconst idx [c]) mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1188 (MOVWloadidx (SRAconst idx [c]) ptr mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1189 1190 (MOVWstoreidx ptr (SLLconst idx [c]) val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1191 (MOVWstoreidx (SLLconst idx [c]) ptr val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1192 (MOVWstoreidx ptr (SRLconst idx [c]) val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1193 (MOVWstoreidx (SRLconst idx [c]) ptr val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1194 (MOVWstoreidx ptr (SRAconst idx [c]) val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1195 (MOVWstoreidx (SRAconst idx [c]) ptr val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1196 1197 (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem) 1198 (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem) 1199 (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(int32(c)>>uint64(d))] ptr mem) 1200 1201 (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem) 1202 (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem) 1203 (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem) 1204 1205 // generic simplifications 1206 (ADD x (RSBconst [0] y)) -> (SUB x y) 1207 (ADD (RSBconst [0] y) x) -> (SUB x y) 1208 (SUB x x) -> (MOVWconst [0]) 1209 (RSB x x) -> (MOVWconst [0]) 1210 (AND x x) -> x 1211 (OR x x) -> x 1212 (XOR x x) -> (MOVWconst [0]) 1213 (BIC x x) -> (MOVWconst [0]) 1214 1215 (ADD (MUL x y) a) -> (MULA x y a) 1216 (ADD a (MUL x y)) -> (MULA x y a) 1217 1218 (AND x (MVN y)) -> (BIC x y) 1219 (AND (MVN y) x) -> (BIC x y) 1220 1221 // simplification with *shift ops 1222 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1223 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1224 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1225 (RSBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1226 (RSBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1227 (RSBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1228 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1229 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1230 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1231 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1232 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1233 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1234 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1235 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1236 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1237 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1238 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1239 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1240 (AND x (MVNshiftLL y [c])) -> (BICshiftLL x y [c]) 1241 (AND (MVNshiftLL y [c]) x) -> (BICshiftLL x y [c]) 1242 (AND x (MVNshiftRL y [c])) -> (BICshiftRL x y [c]) 1243 (AND (MVNshiftRL y [c]) x) -> (BICshiftRL x y [c]) 1244 (AND x (MVNshiftRA y [c])) -> (BICshiftRA x y [c]) 1245 (AND (MVNshiftRA y [c]) x) -> (BICshiftRA x y [c]) 1246 1247 // floating point optimizations 1248 (CMPF x (MOVFconst [0])) -> (CMPF0 x) 1249 (CMPD x (MOVDconst [0])) -> (CMPD0 x)