github.com/rakyll/go@v0.0.0-20170216000551-64c02460d703/src/cmd/compile/internal/ssa/gen/ARM64.rules (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (AddPtr x y) -> (ADD x y) 6 (Add64 x y) -> (ADD x y) 7 (Add32 x y) -> (ADD x y) 8 (Add16 x y) -> (ADD x y) 9 (Add8 x y) -> (ADD x y) 10 (Add32F x y) -> (FADDS x y) 11 (Add64F x y) -> (FADDD x y) 12 13 (SubPtr x y) -> (SUB x y) 14 (Sub64 x y) -> (SUB x y) 15 (Sub32 x y) -> (SUB x y) 16 (Sub16 x y) -> (SUB x y) 17 (Sub8 x y) -> (SUB x y) 18 (Sub32F x y) -> (FSUBS x y) 19 (Sub64F x y) -> (FSUBD x y) 20 21 (Mul64 x y) -> (MUL x y) 22 (Mul32 x y) -> (MULW x y) 23 (Mul16 x y) -> (MULW x y) 24 (Mul8 x y) -> (MULW x y) 25 (Mul32F x y) -> (FMULS x y) 26 (Mul64F x y) -> (FMULD x y) 27 28 (Hmul64 x y) -> (MULH x y) 29 (Hmul64u x y) -> (UMULH x y) 30 (Hmul32 x y) -> (SRAconst (MULL <config.fe.TypeInt64()> x y) [32]) 31 (Hmul32u x y) -> (SRAconst (UMULL <config.fe.TypeUInt64()> x y) [32]) 32 (Hmul16 x y) -> (SRAconst (MULW <config.fe.TypeInt32()> (SignExt16to32 x) (SignExt16to32 y)) [16]) 33 (Hmul16u x y) -> (SRLconst (MUL <config.fe.TypeUInt32()> (ZeroExt16to32 x) (ZeroExt16to32 y)) [16]) 34 (Hmul8 x y) -> (SRAconst (MULW <config.fe.TypeInt16()> (SignExt8to32 x) (SignExt8to32 y)) [8]) 35 (Hmul8u x y) -> (SRLconst (MUL <config.fe.TypeUInt16()> (ZeroExt8to32 x) (ZeroExt8to32 y)) [8]) 36 37 (Div64 x y) -> (DIV x y) 38 (Div64u x y) -> (UDIV x y) 39 (Div32 x y) -> (DIVW x y) 40 (Div32u x y) -> (UDIVW x y) 41 (Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y)) 42 (Div16u x y) -> (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y)) 43 (Div8 x y) -> (DIVW (SignExt8to32 x) (SignExt8to32 y)) 44 (Div8u x y) -> (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y)) 45 (Div32F x y) -> (FDIVS x y) 46 (Div64F x y) -> (FDIVD x y) 47 48 (Mod64 x y) -> (MOD x y) 49 (Mod64u x y) -> (UMOD x y) 50 (Mod32 x y) -> (MODW x y) 51 (Mod32u x y) -> (UMODW x y) 52 (Mod16 x y) -> (MODW (SignExt16to32 x) (SignExt16to32 y)) 53 (Mod16u x y) -> (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y)) 54 (Mod8 x y) -> (MODW (SignExt8to32 x) (SignExt8to32 y)) 55 (Mod8u x y) -> (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y)) 56 57 (Avg64u <t> x y) -> (ADD (ADD <t> (SRLconst <t> x [1]) (SRLconst <t> y [1])) (AND <t> (AND <t> x y) (MOVDconst [1]))) 58 59 (And64 x y) -> (AND x y) 60 (And32 x y) -> (AND x y) 61 (And16 x y) -> (AND x y) 62 (And8 x y) -> (AND x y) 63 64 (Or64 x y) -> (OR x y) 65 (Or32 x y) -> (OR x y) 66 (Or16 x y) -> (OR x y) 67 (Or8 x y) -> (OR x y) 68 69 (Xor64 x y) -> (XOR x y) 70 (Xor32 x y) -> (XOR x y) 71 (Xor16 x y) -> (XOR x y) 72 (Xor8 x y) -> (XOR x y) 73 74 // unary ops 75 (Neg64 x) -> (NEG x) 76 (Neg32 x) -> (NEG x) 77 (Neg16 x) -> (NEG x) 78 (Neg8 x) -> (NEG x) 79 (Neg32F x) -> (FNEGS x) 80 (Neg64F x) -> (FNEGD x) 81 82 (Com64 x) -> (MVN x) 83 (Com32 x) -> (MVN x) 84 (Com16 x) -> (MVN x) 85 (Com8 x) -> (MVN x) 86 87 (Sqrt x) -> (FSQRTD x) 88 89 (Ctz64 <t> x) -> (CLZ (RBIT <t> x)) 90 (Ctz32 <t> x) -> (CLZW (RBITW <t> x)) 91 92 (Bswap64 x) -> (REV x) 93 (Bswap32 x) -> (REVW x) 94 95 // boolean ops -- booleans are represented with 0=false, 1=true 96 (AndB x y) -> (AND x y) 97 (OrB x y) -> (OR x y) 98 (EqB x y) -> (XOR (MOVDconst [1]) (XOR <config.fe.TypeBool()> x y)) 99 (NeqB x y) -> (XOR x y) 100 (Not x) -> (XOR (MOVDconst [1]) x) 101 102 // constant shifts 103 (Lsh64x64 x (MOVDconst [c])) && uint64(c) < 64 -> (SLLconst x [c]) 104 (Rsh64x64 x (MOVDconst [c])) && uint64(c) < 64 -> (SRAconst x [c]) 105 (Rsh64Ux64 x (MOVDconst [c])) && uint64(c) < 64 -> (SRLconst x [c]) 106 (Lsh32x64 x (MOVDconst [c])) && uint64(c) < 32 -> (SLLconst x [c]) 107 (Rsh32x64 x (MOVDconst [c])) && uint64(c) < 32 -> (SRAconst (SignExt32to64 x) [c]) 108 (Rsh32Ux64 x (MOVDconst [c])) && uint64(c) < 32 -> (SRLconst (ZeroExt32to64 x) [c]) 109 (Lsh16x64 x (MOVDconst [c])) && uint64(c) < 16 -> (SLLconst x [c]) 110 (Rsh16x64 x (MOVDconst [c])) && uint64(c) < 16 -> (SRAconst (SignExt16to64 x) [c]) 111 (Rsh16Ux64 x (MOVDconst [c])) && uint64(c) < 16 -> (SRLconst (ZeroExt16to64 x) [c]) 112 (Lsh8x64 x (MOVDconst [c])) && uint64(c) < 8 -> (SLLconst x [c]) 113 (Rsh8x64 x (MOVDconst [c])) && uint64(c) < 8 -> (SRAconst (SignExt8to64 x) [c]) 114 (Rsh8Ux64 x (MOVDconst [c])) && uint64(c) < 8 -> (SRLconst (ZeroExt8to64 x) [c]) 115 116 // large constant shifts 117 (Lsh64x64 _ (MOVDconst [c])) && uint64(c) >= 64 -> (MOVDconst [0]) 118 (Rsh64Ux64 _ (MOVDconst [c])) && uint64(c) >= 64 -> (MOVDconst [0]) 119 (Lsh32x64 _ (MOVDconst [c])) && uint64(c) >= 32 -> (MOVDconst [0]) 120 (Rsh32Ux64 _ (MOVDconst [c])) && uint64(c) >= 32 -> (MOVDconst [0]) 121 (Lsh16x64 _ (MOVDconst [c])) && uint64(c) >= 16 -> (MOVDconst [0]) 122 (Rsh16Ux64 _ (MOVDconst [c])) && uint64(c) >= 16 -> (MOVDconst [0]) 123 (Lsh8x64 _ (MOVDconst [c])) && uint64(c) >= 8 -> (MOVDconst [0]) 124 (Rsh8Ux64 _ (MOVDconst [c])) && uint64(c) >= 8 -> (MOVDconst [0]) 125 126 // large constant signed right shift, we leave the sign bit 127 (Rsh64x64 x (MOVDconst [c])) && uint64(c) >= 64 -> (SRAconst x [63]) 128 (Rsh32x64 x (MOVDconst [c])) && uint64(c) >= 32 -> (SRAconst (SignExt32to64 x) [63]) 129 (Rsh16x64 x (MOVDconst [c])) && uint64(c) >= 16 -> (SRAconst (SignExt16to64 x) [63]) 130 (Rsh8x64 x (MOVDconst [c])) && uint64(c) >= 8 -> (SRAconst (SignExt8to64 x) [63]) 131 132 // shifts 133 // hardware instruction uses only the low 6 bits of the shift 134 // we compare to 64 to ensure Go semantics for large shifts 135 (Lsh64x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 136 (Lsh64x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 137 (Lsh64x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 138 (Lsh64x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 139 140 (Lsh32x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 141 (Lsh32x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 142 (Lsh32x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 143 (Lsh32x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 144 145 (Lsh16x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 146 (Lsh16x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 147 (Lsh16x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 148 (Lsh16x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 149 150 (Lsh8x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 151 (Lsh8x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 152 (Lsh8x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 153 (Lsh8x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 154 155 (Rsh64Ux64 <t> x y) -> (CSELULT (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 156 (Rsh64Ux32 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 157 (Rsh64Ux16 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 158 (Rsh64Ux8 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 159 160 (Rsh32Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 161 (Rsh32Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 162 (Rsh32Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 163 (Rsh32Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 164 165 (Rsh16Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 166 (Rsh16Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 167 (Rsh16Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 168 (Rsh16Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 169 170 (Rsh8Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 171 (Rsh8Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 172 (Rsh8Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 173 (Rsh8Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 174 175 (Rsh64x64 x y) -> (SRA x (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 176 (Rsh64x32 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 177 (Rsh64x16 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 178 (Rsh64x8 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 179 180 (Rsh32x64 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 181 (Rsh32x32 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 182 (Rsh32x16 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 183 (Rsh32x8 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 184 185 (Rsh16x64 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 186 (Rsh16x32 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 187 (Rsh16x16 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 188 (Rsh16x8 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 189 190 (Rsh8x64 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 191 (Rsh8x32 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 192 (Rsh8x16 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 193 (Rsh8x8 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 194 195 // constants 196 (Const64 [val]) -> (MOVDconst [val]) 197 (Const32 [val]) -> (MOVDconst [val]) 198 (Const16 [val]) -> (MOVDconst [val]) 199 (Const8 [val]) -> (MOVDconst [val]) 200 (Const32F [val]) -> (FMOVSconst [val]) 201 (Const64F [val]) -> (FMOVDconst [val]) 202 (ConstNil) -> (MOVDconst [0]) 203 (ConstBool [b]) -> (MOVDconst [b]) 204 205 (Slicemask <t> x) -> (SRAconst (NEG <t> x) [63]) 206 207 // truncations 208 // Because we ignore high parts of registers, truncates are just copies. 209 (Trunc16to8 x) -> x 210 (Trunc32to8 x) -> x 211 (Trunc32to16 x) -> x 212 (Trunc64to8 x) -> x 213 (Trunc64to16 x) -> x 214 (Trunc64to32 x) -> x 215 216 // Zero-/Sign-extensions 217 (ZeroExt8to16 x) -> (MOVBUreg x) 218 (ZeroExt8to32 x) -> (MOVBUreg x) 219 (ZeroExt16to32 x) -> (MOVHUreg x) 220 (ZeroExt8to64 x) -> (MOVBUreg x) 221 (ZeroExt16to64 x) -> (MOVHUreg x) 222 (ZeroExt32to64 x) -> (MOVWUreg x) 223 224 (SignExt8to16 x) -> (MOVBreg x) 225 (SignExt8to32 x) -> (MOVBreg x) 226 (SignExt16to32 x) -> (MOVHreg x) 227 (SignExt8to64 x) -> (MOVBreg x) 228 (SignExt16to64 x) -> (MOVHreg x) 229 (SignExt32to64 x) -> (MOVWreg x) 230 231 // float <-> int conversion 232 (Cvt32to32F x) -> (SCVTFWS x) 233 (Cvt32to64F x) -> (SCVTFWD x) 234 (Cvt64to32F x) -> (SCVTFS x) 235 (Cvt64to64F x) -> (SCVTFD x) 236 (Cvt32Uto32F x) -> (UCVTFWS x) 237 (Cvt32Uto64F x) -> (UCVTFWD x) 238 (Cvt64Uto32F x) -> (UCVTFS x) 239 (Cvt64Uto64F x) -> (UCVTFD x) 240 (Cvt32Fto32 x) -> (FCVTZSSW x) 241 (Cvt64Fto32 x) -> (FCVTZSDW x) 242 (Cvt32Fto64 x) -> (FCVTZSS x) 243 (Cvt64Fto64 x) -> (FCVTZSD x) 244 (Cvt32Fto32U x) -> (FCVTZUSW x) 245 (Cvt64Fto32U x) -> (FCVTZUDW x) 246 (Cvt32Fto64U x) -> (FCVTZUS x) 247 (Cvt64Fto64U x) -> (FCVTZUD x) 248 (Cvt32Fto64F x) -> (FCVTSD x) 249 (Cvt64Fto32F x) -> (FCVTDS x) 250 251 // comparisons 252 (Eq8 x y) -> (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 253 (Eq16 x y) -> (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 254 (Eq32 x y) -> (Equal (CMPW x y)) 255 (Eq64 x y) -> (Equal (CMP x y)) 256 (EqPtr x y) -> (Equal (CMP x y)) 257 (Eq32F x y) -> (Equal (FCMPS x y)) 258 (Eq64F x y) -> (Equal (FCMPD x y)) 259 260 (Neq8 x y) -> (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 261 (Neq16 x y) -> (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 262 (Neq32 x y) -> (NotEqual (CMPW x y)) 263 (Neq64 x y) -> (NotEqual (CMP x y)) 264 (NeqPtr x y) -> (NotEqual (CMP x y)) 265 (Neq32F x y) -> (NotEqual (FCMPS x y)) 266 (Neq64F x y) -> (NotEqual (FCMPD x y)) 267 268 (Less8 x y) -> (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y))) 269 (Less16 x y) -> (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y))) 270 (Less32 x y) -> (LessThan (CMPW x y)) 271 (Less64 x y) -> (LessThan (CMP x y)) 272 (Less32F x y) -> (GreaterThan (FCMPS y x)) // reverse operands to work around NaN 273 (Less64F x y) -> (GreaterThan (FCMPD y x)) // reverse operands to work around NaN 274 275 (Less8U x y) -> (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 276 (Less16U x y) -> (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 277 (Less32U x y) -> (LessThanU (CMPW x y)) 278 (Less64U x y) -> (LessThanU (CMP x y)) 279 280 (Leq8 x y) -> (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y))) 281 (Leq16 x y) -> (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y))) 282 (Leq32 x y) -> (LessEqual (CMPW x y)) 283 (Leq64 x y) -> (LessEqual (CMP x y)) 284 (Leq32F x y) -> (GreaterEqual (FCMPS y x)) // reverse operands to work around NaN 285 (Leq64F x y) -> (GreaterEqual (FCMPD y x)) // reverse operands to work around NaN 286 287 (Leq8U x y) -> (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 288 (Leq16U x y) -> (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 289 (Leq32U x y) -> (LessEqualU (CMPW x y)) 290 (Leq64U x y) -> (LessEqualU (CMP x y)) 291 292 (Greater8 x y) -> (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y))) 293 (Greater16 x y) -> (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y))) 294 (Greater32 x y) -> (GreaterThan (CMPW x y)) 295 (Greater64 x y) -> (GreaterThan (CMP x y)) 296 (Greater32F x y) -> (GreaterThan (FCMPS x y)) 297 (Greater64F x y) -> (GreaterThan (FCMPD x y)) 298 299 (Greater8U x y) -> (GreaterThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 300 (Greater16U x y) -> (GreaterThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 301 (Greater32U x y) -> (GreaterThanU (CMPW x y)) 302 (Greater64U x y) -> (GreaterThanU (CMP x y)) 303 304 (Geq8 x y) -> (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y))) 305 (Geq16 x y) -> (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y))) 306 (Geq32 x y) -> (GreaterEqual (CMPW x y)) 307 (Geq64 x y) -> (GreaterEqual (CMP x y)) 308 (Geq32F x y) -> (GreaterEqual (FCMPS x y)) 309 (Geq64F x y) -> (GreaterEqual (FCMPD x y)) 310 311 (Geq8U x y) -> (GreaterEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 312 (Geq16U x y) -> (GreaterEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 313 (Geq32U x y) -> (GreaterEqualU (CMPW x y)) 314 (Geq64U x y) -> (GreaterEqualU (CMP x y)) 315 316 (OffPtr [off] ptr:(SP)) -> (MOVDaddr [off] ptr) 317 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 318 319 (Addr {sym} base) -> (MOVDaddr {sym} base) 320 321 // loads 322 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 323 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 324 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 325 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 326 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 327 (Load <t> ptr mem) && (is32BitInt(t) && isSigned(t)) -> (MOVWload ptr mem) 328 (Load <t> ptr mem) && (is32BitInt(t) && !isSigned(t)) -> (MOVWUload ptr mem) 329 (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) -> (MOVDload ptr mem) 330 (Load <t> ptr mem) && is32BitFloat(t) -> (FMOVSload ptr mem) 331 (Load <t> ptr mem) && is64BitFloat(t) -> (FMOVDload ptr mem) 332 333 // stores 334 (Store [1] ptr val mem) -> (MOVBstore ptr val mem) 335 (Store [2] ptr val mem) -> (MOVHstore ptr val mem) 336 (Store [4] ptr val mem) && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 337 (Store [8] ptr val mem) && !is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 338 (Store [4] ptr val mem) && is32BitFloat(val.Type) -> (FMOVSstore ptr val mem) 339 (Store [8] ptr val mem) && is64BitFloat(val.Type) -> (FMOVDstore ptr val mem) 340 341 // zeroing 342 (Zero [s] _ mem) && SizeAndAlign(s).Size() == 0 -> mem 343 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore ptr (MOVDconst [0]) mem) 344 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 -> (MOVHstore ptr (MOVDconst [0]) mem) 345 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 -> (MOVWstore ptr (MOVDconst [0]) mem) 346 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 8 -> (MOVDstore ptr (MOVDconst [0]) mem) 347 348 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 3 -> 349 (MOVBstore [2] ptr (MOVDconst [0]) 350 (MOVHstore ptr (MOVDconst [0]) mem)) 351 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 5 -> 352 (MOVBstore [4] ptr (MOVDconst [0]) 353 (MOVWstore ptr (MOVDconst [0]) mem)) 354 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 6 -> 355 (MOVHstore [4] ptr (MOVDconst [0]) 356 (MOVWstore ptr (MOVDconst [0]) mem)) 357 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 7 -> 358 (MOVBstore [6] ptr (MOVDconst [0]) 359 (MOVHstore [4] ptr (MOVDconst [0]) 360 (MOVWstore ptr (MOVDconst [0]) mem))) 361 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 12 -> 362 (MOVWstore [8] ptr (MOVDconst [0]) 363 (MOVDstore ptr (MOVDconst [0]) mem)) 364 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 16 -> 365 (MOVDstore [8] ptr (MOVDconst [0]) 366 (MOVDstore ptr (MOVDconst [0]) mem)) 367 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 24 -> 368 (MOVDstore [16] ptr (MOVDconst [0]) 369 (MOVDstore [8] ptr (MOVDconst [0]) 370 (MOVDstore ptr (MOVDconst [0]) mem))) 371 372 // strip off fractional word zeroing 373 (Zero [s] ptr mem) && SizeAndAlign(s).Size()%8 != 0 && SizeAndAlign(s).Size() > 8 -> 374 (Zero [MakeSizeAndAlign(SizeAndAlign(s).Size()%8, 1).Int64()] 375 (OffPtr <ptr.Type> ptr [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 376 (Zero [MakeSizeAndAlign(SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8, 1).Int64()] ptr mem)) 377 378 // medium zeroing uses a duff device 379 // 4, 8, and 128 are magic constants, see runtime/mkduff.go 380 (Zero [s] ptr mem) 381 && SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 382 && !config.noDuffDevice -> 383 (DUFFZERO [4 * (128 - int64(SizeAndAlign(s).Size()/8))] ptr mem) 384 385 // large zeroing uses a loop 386 (Zero [s] ptr mem) 387 && SizeAndAlign(s).Size()%8 == 0 && (SizeAndAlign(s).Size() > 8*128 || config.noDuffDevice) -> 388 (LoweredZero 389 ptr 390 (ADDconst <ptr.Type> [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)] ptr) 391 mem) 392 393 // moves 394 (Move [s] _ _ mem) && SizeAndAlign(s).Size() == 0 -> mem 395 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore dst (MOVBUload src mem) mem) 396 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 -> (MOVHstore dst (MOVHUload src mem) mem) 397 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 -> (MOVWstore dst (MOVWUload src mem) mem) 398 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 8 -> (MOVDstore dst (MOVDload src mem) mem) 399 400 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 3 -> 401 (MOVBstore [2] dst (MOVBUload [2] src mem) 402 (MOVHstore dst (MOVHUload src mem) mem)) 403 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 5 -> 404 (MOVBstore [4] dst (MOVBUload [4] src mem) 405 (MOVWstore dst (MOVWUload src mem) mem)) 406 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 6 -> 407 (MOVHstore [4] dst (MOVHUload [4] src mem) 408 (MOVWstore dst (MOVWUload src mem) mem)) 409 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 7 -> 410 (MOVBstore [6] dst (MOVBUload [6] src mem) 411 (MOVHstore [4] dst (MOVHUload [4] src mem) 412 (MOVWstore dst (MOVWUload src mem) mem))) 413 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 12 -> 414 (MOVWstore [8] dst (MOVWUload [8] src mem) 415 (MOVDstore dst (MOVDload src mem) mem)) 416 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 16 -> 417 (MOVDstore [8] dst (MOVDload [8] src mem) 418 (MOVDstore dst (MOVDload src mem) mem)) 419 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 24 -> 420 (MOVDstore [16] dst (MOVDload [16] src mem) 421 (MOVDstore [8] dst (MOVDload [8] src mem) 422 (MOVDstore dst (MOVDload src mem) mem))) 423 424 // strip off fractional word move 425 (Move [s] dst src mem) && SizeAndAlign(s).Size()%8 != 0 && SizeAndAlign(s).Size() > 8 -> 426 (Move [MakeSizeAndAlign(SizeAndAlign(s).Size()%8, 1).Int64()] 427 (OffPtr <dst.Type> dst [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 428 (OffPtr <src.Type> src [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 429 (Move [MakeSizeAndAlign(SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8, 1).Int64()] dst src mem)) 430 431 // medium move uses a duff device 432 // 8 and 128 are magic constants, see runtime/mkduff.go 433 (Move [s] dst src mem) 434 && SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 435 && !config.noDuffDevice -> 436 (DUFFCOPY [8 * (128 - int64(SizeAndAlign(s).Size()/8))] dst src mem) 437 438 // large move uses a loop 439 (Move [s] dst src mem) 440 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size()%8 == 0 -> 441 (LoweredMove 442 dst 443 src 444 (ADDconst <src.Type> src [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 445 mem) 446 447 // calls 448 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 449 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 450 (DeferCall [argwid] mem) -> (CALLdefer [argwid] mem) 451 (GoCall [argwid] mem) -> (CALLgo [argwid] mem) 452 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 453 454 // checks 455 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 456 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 457 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 458 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 459 460 // pseudo-ops 461 (GetClosurePtr) -> (LoweredGetClosurePtr) 462 (Convert x mem) -> (MOVDconvert x mem) 463 464 // Absorb pseudo-ops into blocks. 465 (If (Equal cc) yes no) -> (EQ cc yes no) 466 (If (NotEqual cc) yes no) -> (NE cc yes no) 467 (If (LessThan cc) yes no) -> (LT cc yes no) 468 (If (LessThanU cc) yes no) -> (ULT cc yes no) 469 (If (LessEqual cc) yes no) -> (LE cc yes no) 470 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 471 (If (GreaterThan cc) yes no) -> (GT cc yes no) 472 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 473 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 474 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 475 476 (If cond yes no) -> (NZ cond yes no) 477 478 // atomic intrinsics 479 // Note: these ops do not accept offset. 480 (AtomicLoad32 ptr mem) -> (LDARW ptr mem) 481 (AtomicLoad64 ptr mem) -> (LDAR ptr mem) 482 (AtomicLoadPtr ptr mem) -> (LDAR ptr mem) 483 484 (AtomicStore32 ptr val mem) -> (STLRW ptr val mem) 485 (AtomicStore64 ptr val mem) -> (STLR ptr val mem) 486 (AtomicStorePtrNoWB ptr val mem) -> (STLR ptr val mem) 487 488 (AtomicExchange32 ptr val mem) -> (LoweredAtomicExchange32 ptr val mem) 489 (AtomicExchange64 ptr val mem) -> (LoweredAtomicExchange64 ptr val mem) 490 491 (AtomicAdd32 ptr val mem) -> (LoweredAtomicAdd32 ptr val mem) 492 (AtomicAdd64 ptr val mem) -> (LoweredAtomicAdd64 ptr val mem) 493 494 (AtomicCompareAndSwap32 ptr old new_ mem) -> (LoweredAtomicCas32 ptr old new_ mem) 495 (AtomicCompareAndSwap64 ptr old new_ mem) -> (LoweredAtomicCas64 ptr old new_ mem) 496 497 (AtomicAnd8 ptr val mem) -> (LoweredAtomicAnd8 ptr val mem) 498 (AtomicOr8 ptr val mem) -> (LoweredAtomicOr8 ptr val mem) 499 500 // Optimizations 501 502 // Absorb boolean tests into block 503 (NZ (Equal cc) yes no) -> (EQ cc yes no) 504 (NZ (NotEqual cc) yes no) -> (NE cc yes no) 505 (NZ (LessThan cc) yes no) -> (LT cc yes no) 506 (NZ (LessThanU cc) yes no) -> (ULT cc yes no) 507 (NZ (LessEqual cc) yes no) -> (LE cc yes no) 508 (NZ (LessEqualU cc) yes no) -> (ULE cc yes no) 509 (NZ (GreaterThan cc) yes no) -> (GT cc yes no) 510 (NZ (GreaterThanU cc) yes no) -> (UGT cc yes no) 511 (NZ (GreaterEqual cc) yes no) -> (GE cc yes no) 512 (NZ (GreaterEqualU cc) yes no) -> (UGE cc yes no) 513 514 (EQ (CMPconst [0] x) yes no) -> (Z x yes no) 515 (NE (CMPconst [0] x) yes no) -> (NZ x yes no) 516 (EQ (CMPWconst [0] x) yes no) -> (ZW x yes no) 517 (NE (CMPWconst [0] x) yes no) -> (NZW x yes no) 518 519 // fold offset into address 520 (ADDconst [off1] (MOVDaddr [off2] {sym} ptr)) -> (MOVDaddr [off1+off2] {sym} ptr) 521 522 // fold address into load/store 523 // only small offset (between -256 and 256) or offset that is a multiple of data size 524 // can be encoded in the instructions 525 // since this rewriting takes place before stack allocation, the offset to SP is unknown, 526 // so don't do it for args and locals with unaligned offset 527 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 528 (MOVBload [off1+off2] {sym} ptr mem) 529 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 530 (MOVBUload [off1+off2] {sym} ptr mem) 531 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 532 && is32Bit(off1+off2) 533 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 534 (MOVHload [off1+off2] {sym} ptr mem) 535 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) 536 && is32Bit(off1+off2) 537 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 538 (MOVHUload [off1+off2] {sym} ptr mem) 539 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 540 && is32Bit(off1+off2) 541 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 542 (MOVWload [off1+off2] {sym} ptr mem) 543 (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem) 544 && is32Bit(off1+off2) 545 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 546 (MOVWUload [off1+off2] {sym} ptr mem) 547 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 548 && is32Bit(off1+off2) 549 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 550 (MOVDload [off1+off2] {sym} ptr mem) 551 (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 552 && is32Bit(off1+off2) 553 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 554 (FMOVSload [off1+off2] {sym} ptr mem) 555 (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 556 && is32Bit(off1+off2) 557 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 558 (FMOVDload [off1+off2] {sym} ptr mem) 559 560 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is32Bit(off1+off2) -> 561 (MOVBstore [off1+off2] {sym} ptr val mem) 562 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 563 && is32Bit(off1+off2) 564 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 565 (MOVHstore [off1+off2] {sym} ptr val mem) 566 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 567 && is32Bit(off1+off2) 568 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 569 (MOVWstore [off1+off2] {sym} ptr val mem) 570 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 571 && is32Bit(off1+off2) 572 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 573 (MOVDstore [off1+off2] {sym} ptr val mem) 574 (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 575 && is32Bit(off1+off2) 576 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 577 (FMOVSstore [off1+off2] {sym} ptr val mem) 578 (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 579 && is32Bit(off1+off2) 580 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 581 (FMOVDstore [off1+off2] {sym} ptr val mem) 582 (MOVBstorezero [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 583 (MOVBstorezero [off1+off2] {sym} ptr mem) 584 (MOVHstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 585 && is32Bit(off1+off2) 586 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 587 (MOVHstorezero [off1+off2] {sym} ptr mem) 588 (MOVWstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 589 && is32Bit(off1+off2) 590 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 591 (MOVWstorezero [off1+off2] {sym} ptr mem) 592 (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 593 && is32Bit(off1+off2) 594 && ((off1+off2)%2==8 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 595 (MOVDstorezero [off1+off2] {sym} ptr mem) 596 597 (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 598 && is32Bit(off1+off2) -> 599 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 600 (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 601 && is32Bit(off1+off2) -> 602 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 603 (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 604 && is32Bit(off1+off2) 605 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 606 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 607 (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 608 && is32Bit(off1+off2) 609 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 610 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 611 (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 612 && is32Bit(off1+off2) 613 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 614 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 615 (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 616 && is32Bit(off1+off2) 617 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 618 (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 619 (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 620 && is32Bit(off1+off2) 621 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 622 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 623 (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 624 && is32Bit(off1+off2) 625 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 626 (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 627 (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 628 && is32Bit(off1+off2) 629 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 630 (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 631 632 (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 633 && is32Bit(off1+off2) -> 634 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 635 (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 636 && is32Bit(off1+off2) 637 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 638 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 639 (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 640 && is32Bit(off1+off2) 641 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 642 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 643 (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 644 && is32Bit(off1+off2) 645 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 646 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 647 (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 648 && is32Bit(off1+off2) 649 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 650 (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 651 (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 652 && is32Bit(off1+off2) 653 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 654 (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 655 (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 656 && is32Bit(off1+off2) -> 657 (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 658 (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 659 && is32Bit(off1+off2) 660 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 661 (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 662 (MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 663 && is32Bit(off1+off2) 664 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 665 (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 666 (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 667 && is32Bit(off1+off2) 668 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 669 (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 670 671 // store zero 672 (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVBstorezero [off] {sym} ptr mem) 673 (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVHstorezero [off] {sym} ptr mem) 674 (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVWstorezero [off] {sym} ptr mem) 675 (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVDstorezero [off] {sym} ptr mem) 676 677 // replace load from same location as preceding store with copy 678 // these seem to have bad interaction with other rules, resulting in slower code 679 //(MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 680 //(MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 681 //(MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 682 //(MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 683 //(MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 684 //(MOVWUload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 685 //(MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 686 //(FMOVSload [off] {sym} ptr (FMOVSstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 687 //(FMOVDload [off] {sym} ptr (FMOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 688 689 (MOVBload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 690 (MOVBUload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 691 (MOVHload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 692 (MOVHUload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 693 (MOVWload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 694 (MOVWUload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 695 (MOVDload [off] {sym} ptr (MOVDstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 696 697 // don't extend after proper load 698 (MOVBreg x:(MOVBload _ _)) -> (MOVDreg x) 699 (MOVBUreg x:(MOVBUload _ _)) -> (MOVDreg x) 700 (MOVHreg x:(MOVBload _ _)) -> (MOVDreg x) 701 (MOVHreg x:(MOVBUload _ _)) -> (MOVDreg x) 702 (MOVHreg x:(MOVHload _ _)) -> (MOVDreg x) 703 (MOVHUreg x:(MOVBUload _ _)) -> (MOVDreg x) 704 (MOVHUreg x:(MOVHUload _ _)) -> (MOVDreg x) 705 (MOVWreg x:(MOVBload _ _)) -> (MOVDreg x) 706 (MOVWreg x:(MOVBUload _ _)) -> (MOVDreg x) 707 (MOVWreg x:(MOVHload _ _)) -> (MOVDreg x) 708 (MOVWreg x:(MOVHUload _ _)) -> (MOVDreg x) 709 (MOVWreg x:(MOVWload _ _)) -> (MOVDreg x) 710 (MOVWUreg x:(MOVBUload _ _)) -> (MOVDreg x) 711 (MOVWUreg x:(MOVHUload _ _)) -> (MOVDreg x) 712 (MOVWUreg x:(MOVWUload _ _)) -> (MOVDreg x) 713 714 // fold double extensions 715 (MOVBreg x:(MOVBreg _)) -> (MOVDreg x) 716 (MOVBUreg x:(MOVBUreg _)) -> (MOVDreg x) 717 (MOVHreg x:(MOVBreg _)) -> (MOVDreg x) 718 (MOVHreg x:(MOVBUreg _)) -> (MOVDreg x) 719 (MOVHreg x:(MOVHreg _)) -> (MOVDreg x) 720 (MOVHUreg x:(MOVBUreg _)) -> (MOVDreg x) 721 (MOVHUreg x:(MOVHUreg _)) -> (MOVDreg x) 722 (MOVWreg x:(MOVBreg _)) -> (MOVDreg x) 723 (MOVWreg x:(MOVBUreg _)) -> (MOVDreg x) 724 (MOVWreg x:(MOVHreg _)) -> (MOVDreg x) 725 (MOVWreg x:(MOVHreg _)) -> (MOVDreg x) 726 (MOVWreg x:(MOVWreg _)) -> (MOVDreg x) 727 (MOVWUreg x:(MOVBUreg _)) -> (MOVDreg x) 728 (MOVWUreg x:(MOVHUreg _)) -> (MOVDreg x) 729 (MOVWUreg x:(MOVWUreg _)) -> (MOVDreg x) 730 731 // don't extend before store 732 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 733 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 734 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 735 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 736 (MOVBstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 737 (MOVBstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 738 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 739 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 740 (MOVHstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 741 (MOVHstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 742 (MOVWstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVWstore [off] {sym} ptr x mem) 743 (MOVWstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVWstore [off] {sym} ptr x mem) 744 745 // if a register move has only 1 use, just use the same register without emitting instruction 746 // MOVDnop doesn't emit instruction, only for ensuring the type. 747 (MOVDreg x) && x.Uses == 1 -> (MOVDnop x) 748 749 // fold constant into arithmatic ops 750 (ADD (MOVDconst [c]) x) -> (ADDconst [c] x) 751 (ADD x (MOVDconst [c])) -> (ADDconst [c] x) 752 (SUB x (MOVDconst [c])) -> (SUBconst [c] x) 753 (AND (MOVDconst [c]) x) -> (ANDconst [c] x) 754 (AND x (MOVDconst [c])) -> (ANDconst [c] x) 755 (OR (MOVDconst [c]) x) -> (ORconst [c] x) 756 (OR x (MOVDconst [c])) -> (ORconst [c] x) 757 (XOR (MOVDconst [c]) x) -> (XORconst [c] x) 758 (XOR x (MOVDconst [c])) -> (XORconst [c] x) 759 (BIC x (MOVDconst [c])) -> (BICconst [c] x) 760 761 (SLL x (MOVDconst [c])) -> (SLLconst x [c&63]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=64) 762 (SRL x (MOVDconst [c])) -> (SRLconst x [c&63]) 763 (SRA x (MOVDconst [c])) -> (SRAconst x [c&63]) 764 765 (CMP x (MOVDconst [c])) -> (CMPconst [c] x) 766 (CMP (MOVDconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 767 (CMPW x (MOVDconst [c])) -> (CMPWconst [int64(int32(c))] x) 768 (CMPW (MOVDconst [c]) x) -> (InvertFlags (CMPWconst [int64(int32(c))] x)) 769 770 // mul by constant 771 (MUL x (MOVDconst [-1])) -> (NEG x) 772 (MUL _ (MOVDconst [0])) -> (MOVDconst [0]) 773 (MUL x (MOVDconst [1])) -> x 774 (MUL x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 775 (MUL x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (ADDshiftLL x x [log2(c-1)]) 776 (MUL x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 777 (MUL x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 778 (MUL x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 779 (MUL x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 780 (MUL x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 781 782 (MUL (MOVDconst [-1]) x) -> (NEG x) 783 (MUL (MOVDconst [0]) _) -> (MOVDconst [0]) 784 (MUL (MOVDconst [1]) x) -> x 785 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 786 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 787 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c >= 3 -> (ADDshiftLL x x [log2(c-1)]) 788 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 789 (MUL (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 790 (MUL (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 791 (MUL (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 792 (MUL (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 793 794 (MULW x (MOVDconst [c])) && int32(c)==-1 -> (NEG x) 795 (MULW _ (MOVDconst [c])) && int32(c)==0 -> (MOVDconst [0]) 796 (MULW x (MOVDconst [c])) && int32(c)==1 -> x 797 (MULW x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 798 (MULW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 799 (MULW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 800 (MULW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 801 (MULW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 802 (MULW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 803 (MULW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 804 805 (MULW (MOVDconst [c]) x) && int32(c)==-1 -> (NEG x) 806 (MULW (MOVDconst [c]) _) && int32(c)==0 -> (MOVDconst [0]) 807 (MULW (MOVDconst [c]) x) && int32(c)==1 -> x 808 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 809 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 810 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 811 (MULW (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 812 (MULW (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 813 (MULW (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 814 (MULW (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 815 816 // div by constant 817 (UDIV x (MOVDconst [1])) -> x 818 (UDIV x (MOVDconst [c])) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 819 (UDIVW x (MOVDconst [c])) && uint32(c)==1 -> x 820 (UDIVW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (SRLconst [log2(c)] x) 821 (UMOD _ (MOVDconst [1])) -> (MOVDconst [0]) 822 (UMOD x (MOVDconst [c])) && isPowerOfTwo(c) -> (ANDconst [c-1] x) 823 (UMODW _ (MOVDconst [c])) && uint32(c)==1 -> (MOVDconst [0]) 824 (UMODW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (ANDconst [c-1] x) 825 826 // generic simplifications 827 (ADD x (NEG y)) -> (SUB x y) 828 (ADD (NEG y) x) -> (SUB x y) 829 (SUB x x) -> (MOVDconst [0]) 830 (AND x x) -> x 831 (OR x x) -> x 832 (XOR x x) -> (MOVDconst [0]) 833 (BIC x x) -> (MOVDconst [0]) 834 (AND x (MVN y)) -> (BIC x y) 835 (CSELULT x (MOVDconst [0]) flag) -> (CSELULT0 x flag) 836 837 // remove redundant *const ops 838 (ADDconst [0] x) -> x 839 (SUBconst [0] x) -> x 840 (ANDconst [0] _) -> (MOVDconst [0]) 841 (ANDconst [-1] x) -> x 842 (ORconst [0] x) -> x 843 (ORconst [-1] _) -> (MOVDconst [-1]) 844 (XORconst [0] x) -> x 845 (XORconst [-1] x) -> (MVN x) 846 (BICconst [0] x) -> x 847 (BICconst [-1] _) -> (MOVDconst [0]) 848 849 // generic constant folding 850 (ADDconst [c] (MOVDconst [d])) -> (MOVDconst [c+d]) 851 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [c+d] x) 852 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [c-d] x) 853 (SUBconst [c] (MOVDconst [d])) -> (MOVDconst [d-c]) 854 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [-c-d] x) 855 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [-c+d] x) 856 (SLLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)<<uint64(c)]) 857 (SRLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(uint64(d)>>uint64(c))]) 858 (SRAconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)>>uint64(c)]) 859 (MUL (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c*d]) 860 (MULW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)*int32(d))]) 861 (DIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)/int64(d)]) 862 (UDIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)/uint64(d))]) 863 (DIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)/int32(d))]) 864 (UDIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)/uint32(d))]) 865 (MOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)%int64(d)]) 866 (UMOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)%uint64(d))]) 867 (MODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)%int32(d))]) 868 (UMODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)%uint32(d))]) 869 (ANDconst [c] (MOVDconst [d])) -> (MOVDconst [c&d]) 870 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 871 (ORconst [c] (MOVDconst [d])) -> (MOVDconst [c|d]) 872 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 873 (XORconst [c] (MOVDconst [d])) -> (MOVDconst [c^d]) 874 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 875 (BICconst [c] (MOVDconst [d])) -> (MOVDconst [d&^c]) 876 (MVN (MOVDconst [c])) -> (MOVDconst [^c]) 877 (NEG (MOVDconst [c])) -> (MOVDconst [-c]) 878 (MOVBreg (MOVDconst [c])) -> (MOVDconst [int64(int8(c))]) 879 (MOVBUreg (MOVDconst [c])) -> (MOVDconst [int64(uint8(c))]) 880 (MOVHreg (MOVDconst [c])) -> (MOVDconst [int64(int16(c))]) 881 (MOVHUreg (MOVDconst [c])) -> (MOVDconst [int64(uint16(c))]) 882 (MOVWreg (MOVDconst [c])) -> (MOVDconst [int64(int32(c))]) 883 (MOVWUreg (MOVDconst [c])) -> (MOVDconst [int64(uint32(c))]) 884 (MOVDreg (MOVDconst [c])) -> (MOVDconst [c]) 885 886 // constant comparisons 887 (CMPconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ) 888 (CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)<uint64(y) -> (FlagLT_ULT) 889 (CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)>uint64(y) -> (FlagLT_UGT) 890 (CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)<uint64(y) -> (FlagGT_ULT) 891 (CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)>uint64(y) -> (FlagGT_UGT) 892 (CMPWconst (MOVDconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 893 (CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 894 (CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 895 (CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 896 (CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 897 898 // other known comparisons 899 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 900 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 901 (CMPconst (MOVWUreg _) [c]) && 0xffffffff < c -> (FlagLT_ULT) 902 (CMPconst (ANDconst _ [m]) [n]) && 0 <= m && m < n -> (FlagLT_ULT) 903 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n) -> (FlagLT_ULT) 904 (CMPWconst (MOVBUreg _) [c]) && 0xff < int32(c) -> (FlagLT_ULT) 905 (CMPWconst (MOVHUreg _) [c]) && 0xffff < int32(c) -> (FlagLT_ULT) 906 907 // absorb flag constants into branches 908 (EQ (FlagEQ) yes no) -> (First nil yes no) 909 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 910 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 911 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 912 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 913 914 (NE (FlagEQ) yes no) -> (First nil no yes) 915 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 916 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 917 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 918 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 919 920 (LT (FlagEQ) yes no) -> (First nil no yes) 921 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 922 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 923 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 924 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 925 926 (LE (FlagEQ) yes no) -> (First nil yes no) 927 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 928 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 929 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 930 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 931 932 (GT (FlagEQ) yes no) -> (First nil no yes) 933 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 934 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 935 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 936 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 937 938 (GE (FlagEQ) yes no) -> (First nil yes no) 939 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 940 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 941 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 942 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 943 944 (ULT (FlagEQ) yes no) -> (First nil no yes) 945 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 946 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 947 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 948 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 949 950 (ULE (FlagEQ) yes no) -> (First nil yes no) 951 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 952 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 953 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 954 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 955 956 (UGT (FlagEQ) yes no) -> (First nil no yes) 957 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 958 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 959 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 960 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 961 962 (UGE (FlagEQ) yes no) -> (First nil yes no) 963 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 964 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 965 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 966 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 967 968 (Z (MOVDconst [0]) yes no) -> (First nil yes no) 969 (Z (MOVDconst [c]) yes no) && c != 0 -> (First nil no yes) 970 (NZ (MOVDconst [0]) yes no) -> (First nil no yes) 971 (NZ (MOVDconst [c]) yes no) && c != 0 -> (First nil yes no) 972 (ZW (MOVDconst [c]) yes no) && int32(c) == 0 -> (First nil yes no) 973 (ZW (MOVDconst [c]) yes no) && int32(c) != 0 -> (First nil no yes) 974 (NZW (MOVDconst [c]) yes no) && int32(c) == 0 -> (First nil no yes) 975 (NZW (MOVDconst [c]) yes no) && int32(c) != 0 -> (First nil yes no) 976 977 // absorb InvertFlags into branches 978 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 979 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 980 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 981 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 982 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 983 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 984 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 985 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 986 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 987 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 988 989 // absorb flag constants into boolean values 990 (Equal (FlagEQ)) -> (MOVDconst [1]) 991 (Equal (FlagLT_ULT)) -> (MOVDconst [0]) 992 (Equal (FlagLT_UGT)) -> (MOVDconst [0]) 993 (Equal (FlagGT_ULT)) -> (MOVDconst [0]) 994 (Equal (FlagGT_UGT)) -> (MOVDconst [0]) 995 996 (NotEqual (FlagEQ)) -> (MOVDconst [0]) 997 (NotEqual (FlagLT_ULT)) -> (MOVDconst [1]) 998 (NotEqual (FlagLT_UGT)) -> (MOVDconst [1]) 999 (NotEqual (FlagGT_ULT)) -> (MOVDconst [1]) 1000 (NotEqual (FlagGT_UGT)) -> (MOVDconst [1]) 1001 1002 (LessThan (FlagEQ)) -> (MOVDconst [0]) 1003 (LessThan (FlagLT_ULT)) -> (MOVDconst [1]) 1004 (LessThan (FlagLT_UGT)) -> (MOVDconst [1]) 1005 (LessThan (FlagGT_ULT)) -> (MOVDconst [0]) 1006 (LessThan (FlagGT_UGT)) -> (MOVDconst [0]) 1007 1008 (LessThanU (FlagEQ)) -> (MOVDconst [0]) 1009 (LessThanU (FlagLT_ULT)) -> (MOVDconst [1]) 1010 (LessThanU (FlagLT_UGT)) -> (MOVDconst [0]) 1011 (LessThanU (FlagGT_ULT)) -> (MOVDconst [1]) 1012 (LessThanU (FlagGT_UGT)) -> (MOVDconst [0]) 1013 1014 (LessEqual (FlagEQ)) -> (MOVDconst [1]) 1015 (LessEqual (FlagLT_ULT)) -> (MOVDconst [1]) 1016 (LessEqual (FlagLT_UGT)) -> (MOVDconst [1]) 1017 (LessEqual (FlagGT_ULT)) -> (MOVDconst [0]) 1018 (LessEqual (FlagGT_UGT)) -> (MOVDconst [0]) 1019 1020 (LessEqualU (FlagEQ)) -> (MOVDconst [1]) 1021 (LessEqualU (FlagLT_ULT)) -> (MOVDconst [1]) 1022 (LessEqualU (FlagLT_UGT)) -> (MOVDconst [0]) 1023 (LessEqualU (FlagGT_ULT)) -> (MOVDconst [1]) 1024 (LessEqualU (FlagGT_UGT)) -> (MOVDconst [0]) 1025 1026 (GreaterThan (FlagEQ)) -> (MOVDconst [0]) 1027 (GreaterThan (FlagLT_ULT)) -> (MOVDconst [0]) 1028 (GreaterThan (FlagLT_UGT)) -> (MOVDconst [0]) 1029 (GreaterThan (FlagGT_ULT)) -> (MOVDconst [1]) 1030 (GreaterThan (FlagGT_UGT)) -> (MOVDconst [1]) 1031 1032 (GreaterThanU (FlagEQ)) -> (MOVDconst [0]) 1033 (GreaterThanU (FlagLT_ULT)) -> (MOVDconst [0]) 1034 (GreaterThanU (FlagLT_UGT)) -> (MOVDconst [1]) 1035 (GreaterThanU (FlagGT_ULT)) -> (MOVDconst [0]) 1036 (GreaterThanU (FlagGT_UGT)) -> (MOVDconst [1]) 1037 1038 (GreaterEqual (FlagEQ)) -> (MOVDconst [1]) 1039 (GreaterEqual (FlagLT_ULT)) -> (MOVDconst [0]) 1040 (GreaterEqual (FlagLT_UGT)) -> (MOVDconst [0]) 1041 (GreaterEqual (FlagGT_ULT)) -> (MOVDconst [1]) 1042 (GreaterEqual (FlagGT_UGT)) -> (MOVDconst [1]) 1043 1044 (GreaterEqualU (FlagEQ)) -> (MOVDconst [1]) 1045 (GreaterEqualU (FlagLT_ULT)) -> (MOVDconst [0]) 1046 (GreaterEqualU (FlagLT_UGT)) -> (MOVDconst [1]) 1047 (GreaterEqualU (FlagGT_ULT)) -> (MOVDconst [0]) 1048 (GreaterEqualU (FlagGT_UGT)) -> (MOVDconst [1]) 1049 1050 // absorb InvertFlags into boolean values 1051 (Equal (InvertFlags x)) -> (Equal x) 1052 (NotEqual (InvertFlags x)) -> (NotEqual x) 1053 (LessThan (InvertFlags x)) -> (GreaterThan x) 1054 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 1055 (GreaterThan (InvertFlags x)) -> (LessThan x) 1056 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 1057 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 1058 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 1059 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 1060 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 1061 1062 // absorb flag constants into conditional instructions 1063 (CSELULT _ y (FlagEQ)) -> y 1064 (CSELULT x _ (FlagLT_ULT)) -> x 1065 (CSELULT _ y (FlagLT_UGT)) -> y 1066 (CSELULT x _ (FlagGT_ULT)) -> x 1067 (CSELULT _ y (FlagGT_UGT)) -> y 1068 (CSELULT0 _ (FlagEQ)) -> (MOVDconst [0]) 1069 (CSELULT0 x (FlagLT_ULT)) -> x 1070 (CSELULT0 _ (FlagLT_UGT)) -> (MOVDconst [0]) 1071 (CSELULT0 x (FlagGT_ULT)) -> x 1072 (CSELULT0 _ (FlagGT_UGT)) -> (MOVDconst [0]) 1073 1074 // absorb shifts into ops 1075 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 1076 (ADD (SLLconst [c] y) x) -> (ADDshiftLL x y [c]) 1077 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 1078 (ADD (SRLconst [c] y) x) -> (ADDshiftRL x y [c]) 1079 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 1080 (ADD (SRAconst [c] y) x) -> (ADDshiftRA x y [c]) 1081 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 1082 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 1083 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 1084 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 1085 (AND (SLLconst [c] y) x) -> (ANDshiftLL x y [c]) 1086 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 1087 (AND (SRLconst [c] y) x) -> (ANDshiftRL x y [c]) 1088 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 1089 (AND (SRAconst [c] y) x) -> (ANDshiftRA x y [c]) 1090 (OR x s:(SLLconst [c] y)) && s.Uses == 1 && clobber(s) -> (ORshiftLL x y [c]) // useful for combined load 1091 (OR s:(SLLconst [c] y) x) && s.Uses == 1 && clobber(s) -> (ORshiftLL x y [c]) 1092 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 1093 (OR (SLLconst [c] y) x) -> (ORshiftLL x y [c]) 1094 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 1095 (OR (SRLconst [c] y) x) -> (ORshiftRL x y [c]) 1096 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 1097 (OR (SRAconst [c] y) x) -> (ORshiftRA x y [c]) 1098 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 1099 (XOR (SLLconst [c] y) x) -> (XORshiftLL x y [c]) 1100 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 1101 (XOR (SRLconst [c] y) x) -> (XORshiftRL x y [c]) 1102 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 1103 (XOR (SRAconst [c] y) x) -> (XORshiftRA x y [c]) 1104 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 1105 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 1106 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 1107 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 1108 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 1109 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 1110 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 1111 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 1112 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 1113 1114 // prefer *const ops to *shift ops 1115 (ADDshiftLL (MOVDconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 1116 (ADDshiftRL (MOVDconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 1117 (ADDshiftRA (MOVDconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 1118 (ANDshiftLL (MOVDconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 1119 (ANDshiftRL (MOVDconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 1120 (ANDshiftRA (MOVDconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 1121 (ORshiftLL (MOVDconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 1122 (ORshiftRL (MOVDconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 1123 (ORshiftRA (MOVDconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 1124 (XORshiftLL (MOVDconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 1125 (XORshiftRL (MOVDconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 1126 (XORshiftRA (MOVDconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 1127 (CMPshiftLL (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 1128 (CMPshiftRL (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 1129 (CMPshiftRA (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 1130 1131 // constant folding in *shift ops 1132 (ADDshiftLL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)<<uint64(d))]) 1133 (ADDshiftRL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)>>uint64(d))]) 1134 (ADDshiftRA x (MOVDconst [c]) [d]) -> (ADDconst x [int64(int64(c)>>uint64(d))]) 1135 (SUBshiftLL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)<<uint64(d))]) 1136 (SUBshiftRL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)>>uint64(d))]) 1137 (SUBshiftRA x (MOVDconst [c]) [d]) -> (SUBconst x [int64(int64(c)>>uint64(d))]) 1138 (ANDshiftLL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)<<uint64(d))]) 1139 (ANDshiftRL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)>>uint64(d))]) 1140 (ANDshiftRA x (MOVDconst [c]) [d]) -> (ANDconst x [int64(int64(c)>>uint64(d))]) 1141 (ORshiftLL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)<<uint64(d))]) 1142 (ORshiftRL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)>>uint64(d))]) 1143 (ORshiftRA x (MOVDconst [c]) [d]) -> (ORconst x [int64(int64(c)>>uint64(d))]) 1144 (XORshiftLL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)<<uint64(d))]) 1145 (XORshiftRL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)>>uint64(d))]) 1146 (XORshiftRA x (MOVDconst [c]) [d]) -> (XORconst x [int64(int64(c)>>uint64(d))]) 1147 (BICshiftLL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)<<uint64(d))]) 1148 (BICshiftRL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)>>uint64(d))]) 1149 (BICshiftRA x (MOVDconst [c]) [d]) -> (BICconst x [int64(int64(c)>>uint64(d))]) 1150 (CMPshiftLL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)<<uint64(d))]) 1151 (CMPshiftRL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)>>uint64(d))]) 1152 (CMPshiftRA x (MOVDconst [c]) [d]) -> (CMPconst x [int64(int64(c)>>uint64(d))]) 1153 1154 // simplification with *shift ops 1155 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1156 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1157 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1158 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1159 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1160 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1161 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1162 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1163 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1164 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1165 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1166 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1167 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1168 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1169 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1170 1171 // Generate rotates 1172 (ADDshiftLL [c] (SRLconst x [64-c]) x) -> (RORconst [64-c] x) 1173 ( ORshiftLL [c] (SRLconst x [64-c]) x) -> (RORconst [64-c] x) 1174 (XORshiftLL [c] (SRLconst x [64-c]) x) -> (RORconst [64-c] x) 1175 (ADDshiftRL [c] (SLLconst x [64-c]) x) -> (RORconst [ c] x) 1176 ( ORshiftRL [c] (SLLconst x [64-c]) x) -> (RORconst [ c] x) 1177 (XORshiftRL [c] (SLLconst x [64-c]) x) -> (RORconst [ c] x) 1178 1179 (ADDshiftLL <t> [c] (SRLconst (MOVWUreg x) [32-c]) x) && c < 32 && t.Size() == 4 -> (RORWconst [32-c] x) 1180 ( ORshiftLL <t> [c] (SRLconst (MOVWUreg x) [32-c]) x) && c < 32 && t.Size() == 4 -> (RORWconst [32-c] x) 1181 (XORshiftLL <t> [c] (SRLconst (MOVWUreg x) [32-c]) x) && c < 32 && t.Size() == 4 -> (RORWconst [32-c] x) 1182 (ADDshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x)) && c < 32 && t.Size() == 4 -> (RORWconst [ c] x) 1183 ( ORshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x)) && c < 32 && t.Size() == 4 -> (RORWconst [ c] x) 1184 (XORshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x)) && c < 32 && t.Size() == 4 -> (RORWconst [ c] x) 1185 1186 // do combined loads 1187 // little endian loads 1188 // b[0] | b[1]<<8 -> load 16-bit 1189 (ORshiftLL <t> [8] 1190 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem)) 1191 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1192 && x0.Uses == 1 && x1.Uses == 1 1193 && y0.Uses == 1 && y1.Uses == 1 1194 && mergePoint(b,x0,x1) != nil 1195 && clobber(x0) && clobber(x1) 1196 && clobber(y0) && clobber(y1) 1197 -> @mergePoint(b,x0,x1) (MOVHUload <t> {s} (OffPtr <p.Type> [i] p) mem) 1198 1199 // b[0] | b[1]<<8 | b[2]<<16 | b[3]<<24 -> load 32-bit 1200 (ORshiftLL <t> [24] o0:(ORshiftLL [16] 1201 x0:(MOVHUload [i] {s} p mem) 1202 y1:(MOVDnop x1:(MOVBUload [i+2] {s} p mem))) 1203 y2:(MOVDnop x2:(MOVBUload [i+3] {s} p mem))) 1204 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 1205 && y1.Uses == 1 && y2.Uses == 1 1206 && o0.Uses == 1 1207 && mergePoint(b,x0,x1,x2) != nil 1208 && clobber(x0) && clobber(x1) && clobber(x2) 1209 && clobber(y1) && clobber(y2) 1210 && clobber(o0) 1211 -> @mergePoint(b,x0,x1,x2) (MOVWUload <t> {s} (OffPtr <p.Type> [i] p) mem) 1212 1213 // b[0] | b[1]<<8 | b[2]<<16 | b[3]<<24 | b[4]<<32 | b[5]<<40 | b[6]<<48 | b[7]<<56 -> load 64-bit 1214 (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] 1215 x0:(MOVWUload [i] {s} p mem) 1216 y1:(MOVDnop x1:(MOVBUload [i+4] {s} p mem))) 1217 y2:(MOVDnop x2:(MOVBUload [i+5] {s} p mem))) 1218 y3:(MOVDnop x3:(MOVBUload [i+6] {s} p mem))) 1219 y4:(MOVDnop x4:(MOVBUload [i+7] {s} p mem))) 1220 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 1221 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 1222 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 1223 && mergePoint(b,x0,x1,x2,x3,x4) != nil 1224 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) 1225 && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) 1226 && clobber(o0) && clobber(o1) && clobber(o2) 1227 -> @mergePoint(b,x0,x1,x2,x3,x4) (MOVDload <t> {s} (OffPtr <p.Type> [i] p) mem) 1228 1229 // b[3]<<24 | b[2]<<16 | b[1]<<8 | b[0] -> load 32-bit 1230 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] 1231 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1232 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1233 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1234 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1235 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1236 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1237 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 1238 && mergePoint(b,x0,x1,x2,x3) != nil 1239 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1240 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1241 && clobber(o0) && clobber(o1) && clobber(s0) 1242 -> @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i-3] p) mem) 1243 1244 // b[7]<<56 | b[6]<<48 | b[5]<<40 | b[4]<<32 | b[3]<<24 | b[2]<<16 | b[1]<<8 | b[0] -> load 64-bit, reverse 1245 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] 1246 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1247 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1248 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1249 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1250 y4:(MOVDnop x4:(MOVBUload [i-4] {s} p mem))) 1251 y5:(MOVDnop x5:(MOVBUload [i-5] {s} p mem))) 1252 y6:(MOVDnop x6:(MOVBUload [i-6] {s} p mem))) 1253 y7:(MOVDnop x7:(MOVBUload [i-7] {s} p mem))) 1254 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1255 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 1256 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1257 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 1258 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 1259 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 1260 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil 1261 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1262 && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 1263 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1264 && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) 1265 && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) 1266 && clobber(o4) && clobber(o5) && clobber(s0) 1267 -> @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i-7] p) mem)) 1268 1269 // big endian loads 1270 // b[1] | b[0]<<8 -> load 16-bit, reverse 1271 (ORshiftLL <t> [8] 1272 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem)) 1273 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1274 && ((i-1)%2 == 0 || i-1<256 && i-1>-256 && !isArg(s) && !isAuto(s)) 1275 && x0.Uses == 1 && x1.Uses == 1 1276 && y0.Uses == 1 && y1.Uses == 1 1277 && mergePoint(b,x0,x1) != nil 1278 && clobber(x0) && clobber(x1) 1279 && clobber(y0) && clobber(y1) 1280 -> @mergePoint(b,x0,x1) (REV16W <t> (MOVHUload <t> [i-1] {s} p mem)) 1281 1282 // b[3] | b[2]<<8 | b[1]<<16 | b[0]<<24 -> load 32-bit, reverse 1283 (ORshiftLL <t> [24] o0:(ORshiftLL [16] 1284 y0:(REV16W x0:(MOVHUload [i] {s} p mem)) 1285 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1286 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1287 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 1288 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 1289 && o0.Uses == 1 1290 && mergePoint(b,x0,x1,x2) != nil 1291 && clobber(x0) && clobber(x1) && clobber(x2) 1292 && clobber(y0) && clobber(y1) && clobber(y2) 1293 && clobber(o0) 1294 -> @mergePoint(b,x0,x1,x2) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i-2] p) mem)) 1295 1296 // b[7] | b[6]<<8 | b[5]<<16 | b[4]<<24 | b[3]<<32 | b[2]<<40 | b[1]<<48 | b[0]<<56 -> load 64-bit, reverse 1297 (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] 1298 y0:(REVW x0:(MOVWUload [i] {s} p mem)) 1299 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1300 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1301 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1302 y4:(MOVDnop x4:(MOVBUload [i-4] {s} p mem))) 1303 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 1304 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 1305 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 1306 && mergePoint(b,x0,x1,x2,x3,x4) != nil 1307 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) 1308 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) 1309 && clobber(o0) && clobber(o1) && clobber(o2) 1310 -> @mergePoint(b,x0,x1,x2,x3,x4) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i-4] p) mem)) 1311 1312 // b[0]<<24 | b[1]<<16 | b[2]<<8 | b[3] -> load 32-bit, reverse 1313 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] 1314 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1315 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1316 y2:(MOVDnop x2:(MOVBUload [i+2] {s} p mem))) 1317 y3:(MOVDnop x3:(MOVBUload [i+3] {s} p mem))) 1318 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1319 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1320 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 1321 && mergePoint(b,x0,x1,x2,x3) != nil 1322 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1323 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1324 && clobber(o0) && clobber(o1) && clobber(s0) 1325 -> @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i] p) mem)) 1326 1327 // b[0]<<56 | b[1]<<48 | b[2]<<40 | b[3]<<32 | b[4]<<24 | b[5]<<16 | b[6]<<8 | b[7] -> load 64-bit, reverse 1328 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] 1329 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1330 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1331 y2:(MOVDnop x2:(MOVBUload [i+2] {s} p mem))) 1332 y3:(MOVDnop x3:(MOVBUload [i+3] {s} p mem))) 1333 y4:(MOVDnop x4:(MOVBUload [i+4] {s} p mem))) 1334 y5:(MOVDnop x5:(MOVBUload [i+5] {s} p mem))) 1335 y6:(MOVDnop x6:(MOVBUload [i+6] {s} p mem))) 1336 y7:(MOVDnop x7:(MOVBUload [i+7] {s} p mem))) 1337 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1338 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 1339 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1340 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 1341 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 1342 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 1343 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil 1344 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1345 && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 1346 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1347 && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) 1348 && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) 1349 && clobber(o4) && clobber(o5) && clobber(s0) 1350 -> @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i] p) mem))